| ... | ... | @@ -5252,6 +5252,7 @@ static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, |
| 5252 | 5252 | return irb->codegen->invalid_inst_src; |
| 5253 | 5253 | } else { |
| 5254 | 5254 | return_value = ir_build_const_void(irb, scope, node); |
| 5255 | ir_build_end_expr(irb, scope, node, return_value, &result_loc_ret->base); |
| 5255 | 5256 | } |
| 5256 | 5257 | |
| 5257 | 5258 | ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, return_value, result_loc_ret)); |
| ... | ... | @@ -5262,7 +5263,7 @@ static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, |
| 5262 | 5263 | if (!have_err_defers && !irb->codegen->have_err_ret_tracing) { |
| 5263 | 5264 | // only generate unconditional defers |
| 5264 | 5265 | ir_gen_defers_for_block(irb, scope, outer_scope, false); |
| 5265 | | IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value); |
| 5266 | IrInstSrc *result = ir_build_return_src(irb, scope, node, nullptr); |
| 5266 | 5267 | result_loc_ret->base.source_instruction = result; |
| 5267 | 5268 | return result; |
| 5268 | 5269 | } |
| ... | ... | @@ -5271,10 +5272,6 @@ static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, |
| 5271 | 5272 | IrBasicBlockSrc *err_block = ir_create_basic_block(irb, scope, "ErrRetErr"); |
| 5272 | 5273 | IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk"); |
| 5273 | 5274 | |
| 5274 | | if (!have_err_defers) { |
| 5275 | | ir_gen_defers_for_block(irb, scope, outer_scope, false); |
| 5276 | | } |
| 5277 | | |
| 5278 | 5275 | IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true); |
| 5279 | 5276 | |
| 5280 | 5277 | IrInstSrc *is_comptime; |
| ... | ... | @@ -5288,22 +5285,18 @@ static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, |
| 5288 | 5285 | IrBasicBlockSrc *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt"); |
| 5289 | 5286 | |
| 5290 | 5287 | ir_set_cursor_at_end_and_append_block(irb, err_block); |
| 5291 | | if (have_err_defers) { |
| 5292 | | ir_gen_defers_for_block(irb, scope, outer_scope, true); |
| 5293 | | } |
| 5288 | ir_gen_defers_for_block(irb, scope, outer_scope, true); |
| 5294 | 5289 | if (irb->codegen->have_err_ret_tracing && !should_inline) { |
| 5295 | 5290 | ir_build_save_err_ret_addr_src(irb, scope, node); |
| 5296 | 5291 | } |
| 5297 | 5292 | ir_build_br(irb, scope, node, ret_stmt_block, is_comptime); |
| 5298 | 5293 | |
| 5299 | 5294 | ir_set_cursor_at_end_and_append_block(irb, ok_block); |
| 5300 | | if (have_err_defers) { |
| 5301 | | ir_gen_defers_for_block(irb, scope, outer_scope, false); |
| 5302 | | } |
| 5295 | ir_gen_defers_for_block(irb, scope, outer_scope, false); |
| 5303 | 5296 | ir_build_br(irb, scope, node, ret_stmt_block, is_comptime); |
| 5304 | 5297 | |
| 5305 | 5298 | ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block); |
| 5306 | | IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value); |
| 5299 | IrInstSrc *result = ir_build_return_src(irb, scope, node, nullptr); |
| 5307 | 5300 | result_loc_ret->base.source_instruction = result; |
| 5308 | 5301 | return result; |
| 5309 | 5302 | } |
| ... | ... | @@ -9622,7 +9615,10 @@ static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode * |
| 9622 | 9615 | } |
| 9623 | 9616 | |
| 9624 | 9617 | |
| 9625 | | IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr); |
| 9618 | ScopeExpr *spill_scope = create_expr_scope(irb->codegen, op1_node, parent_scope); |
| 9619 | spill_scope->spill_harder = true; |
| 9620 | |
| 9621 | IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, &spill_scope->base, LValPtr, nullptr); |
| 9626 | 9622 | if (err_union_ptr == irb->codegen->invalid_inst_src) |
| 9627 | 9623 | return irb->codegen->invalid_inst_src; |
| 9628 | 9624 | |
| ... | ... | @@ -9644,7 +9640,7 @@ static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode * |
| 9644 | 9640 | is_comptime); |
| 9645 | 9641 | |
| 9646 | 9642 | ir_set_cursor_at_end_and_append_block(irb, err_block); |
| 9647 | | Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, parent_scope, is_comptime); |
| 9643 | Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, &spill_scope->base, is_comptime); |
| 9648 | 9644 | Scope *err_scope; |
| 9649 | 9645 | if (var_node) { |
| 9650 | 9646 | assert(var_node->type == NodeTypeSymbol); |
| ... | ... | @@ -15497,6 +15493,12 @@ static IrInstGen *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira |
| 15497 | 15493 | } |
| 15498 | 15494 | |
| 15499 | 15495 | static IrInstGen *ir_analyze_instruction_return(IrAnalyze *ira, IrInstSrcReturn *instruction) { |
| 15496 | if (instruction->operand == nullptr) { |
| 15497 | // result location mechanism took care of it. |
| 15498 | IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, nullptr); |
| 15499 | return ir_finish_anal(ira, result); |
| 15500 | } |
| 15501 | |
| 15500 | 15502 | IrInstGen *operand = instruction->operand->child; |
| 15501 | 15503 | if (type_is_invalid(operand->value->type)) |
| 15502 | 15504 | return ir_unreach_error(ira); |
| ... | ... | @@ -29551,8 +29553,13 @@ static IrInstGen *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstSrcSp |
| 29551 | 29553 | if (!type_has_bits(operand->value->type)) |
| 29552 | 29554 | return ir_const_void(ira, &instruction->base.base); |
| 29553 | 29555 | |
| 29554 | | ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base.base); |
| 29555 | | ira->new_irb.exec->need_err_code_spill = true; |
| 29556 | switch (instruction->spill_id) { |
| 29557 | case SpillIdInvalid: |
| 29558 | zig_unreachable(); |
| 29559 | case SpillIdRetErrCode: |
| 29560 | ira->new_irb.exec->need_err_code_spill = true; |
| 29561 | break; |
| 29562 | } |
| 29556 | 29563 | |
| 29557 | 29564 | return ir_build_spill_begin_gen(ira, &instruction->base.base, operand, instruction->spill_id); |
| 29558 | 29565 | } |
| ... | ... | @@ -29562,8 +29569,12 @@ static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpil |
| 29562 | 29569 | if (type_is_invalid(operand->value->type)) |
| 29563 | 29570 | return ira->codegen->invalid_inst_gen; |
| 29564 | 29571 | |
| 29565 | | if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || !type_has_bits(operand->value->type)) |
| 29572 | if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || |
| 29573 | !type_has_bits(operand->value->type) || |
| 29574 | instr_is_comptime(operand)) |
| 29575 | { |
| 29566 | 29576 | return operand; |
| 29577 | } |
| 29567 | 29578 | |
| 29568 | 29579 | ir_assert(instruction->begin->base.child->id == IrInstGenIdSpillBegin, &instruction->base.base); |
| 29569 | 29580 | IrInstGenSpillBegin *begin = reinterpret_cast<IrInstGenSpillBegin *>(instruction->begin->base.child); |