| ... | @@ -5437,11 +5437,56 @@ fn airIntToFloat(self: *Self, inst: Air.Inst.Index) !void { | ... | @@ -5437,11 +5437,56 @@ fn airIntToFloat(self: *Self, inst: Air.Inst.Index) !void { |
| 5437 | | 5437 | |
| 5438 | fn airFloatToInt(self: *Self, inst: Air.Inst.Index) !void { | 5438 | fn airFloatToInt(self: *Self, inst: Air.Inst.Index) !void { |
| 5439 | const ty_op = self.air.instructions.items(.data)[inst].ty_op; | 5439 | const ty_op = self.air.instructions.items(.data)[inst].ty_op; |
| 5440 | const result: MCValue = if (self.liveness.isUnused(inst)) | 5440 | if (self.liveness.isUnused(inst)) |
| 5441 | .dead | 5441 | return self.finishAir(inst, .dead, .{ ty_op.operand, .none, .none }); |
| 5442 | else | 5442 | |
| 5443 | return self.fail("TODO implement airFloatToInt for {}", .{self.target.cpu.arch}); | 5443 | const src_ty = self.air.typeOf(ty_op.operand); |
| 5444 | return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); | 5444 | const dst_ty = self.air.typeOfIndex(inst); |
| | 5445 | const operand = try self.resolveInst(ty_op.operand); |
| | 5446 | |
| | 5447 | // move float src to ST(0) |
| | 5448 | const stack_offset = switch (operand) { |
| | 5449 | .stack_offset, .ptr_stack_offset => |offset| offset, |
| | 5450 | else => blk: { |
| | 5451 | const offset = @intCast(i32, try self.allocMem( |
| | 5452 | inst, |
| | 5453 | @intCast(u32, src_ty.abiSize(self.target.*)), |
| | 5454 | src_ty.abiAlignment(self.target.*), |
| | 5455 | )); |
| | 5456 | try self.genSetStack(src_ty, offset, operand, .{}); |
| | 5457 | break :blk offset; |
| | 5458 | }, |
| | 5459 | }; |
| | 5460 | _ = try self.addInst(.{ |
| | 5461 | .tag = .fld, |
| | 5462 | .ops = (Mir.Ops{ |
| | 5463 | .flags = switch (src_ty.abiSize(self.target.*)) { |
| | 5464 | 4 => 0b01, |
| | 5465 | 8 => 0b10, |
| | 5466 | else => |size| return self.fail("TODO load ST(0) with abiSize={}", .{size}), |
| | 5467 | }, |
| | 5468 | .reg1 = .rbp, |
| | 5469 | }).encode(), |
| | 5470 | .data = .{ .imm = @bitCast(u32, -stack_offset) }, |
| | 5471 | }); |
| | 5472 | |
| | 5473 | // convert |
| | 5474 | const stack_dst = try self.allocRegOrMem(inst, false); |
| | 5475 | _ = try self.addInst(.{ |
| | 5476 | .tag = .fisttp, |
| | 5477 | .ops = (Mir.Ops{ |
| | 5478 | .flags = switch (dst_ty.abiSize(self.target.*)) { |
| | 5479 | 1...2 => 0b00, |
| | 5480 | 3...4 => 0b01, |
| | 5481 | 5...8 => 0b10, |
| | 5482 | else => |size| return self.fail("TODO convert float with abiSize={}", .{size}), |
| | 5483 | }, |
| | 5484 | .reg1 = .rbp, |
| | 5485 | }).encode(), |
| | 5486 | .data = .{ .imm = @bitCast(u32, -stack_dst.stack_offset) }, |
| | 5487 | }); |
| | 5488 | |
| | 5489 | return self.finishAir(inst, stack_dst, .{ ty_op.operand, .none, .none }); |
| 5445 | } | 5490 | } |
| 5446 | | 5491 | |
| 5447 | fn airCmpxchg(self: *Self, inst: Air.Inst.Index) !void { | 5492 | fn airCmpxchg(self: *Self, inst: Air.Inst.Index) !void { |