| author | |
| committer | |
| log | 3681da25f865d499cffe923b7f0721cf759d3591 |
| tree | 329952ecd7bb6f5947f96b79e446e372ab3c7006 |
| parent | c23e80e671686278ea2ea23d164a2c0839ca372c |
3 files changed, 26 insertions(+), 38 deletions(-)
src/arch/x86_64/CodeGen.zig+4-4| ... | @@ -1079,9 +1079,9 @@ fn asmSetccRegister(self: *Self, reg: Register, cc: bits.Condition) !void { | ... | @@ -1079,9 +1079,9 @@ fn asmSetccRegister(self: *Self, reg: Register, cc: bits.Condition) !void { |
| 1079 | .fixes = Mir.Inst.Fixes.fromCondition(cc), | 1079 | .fixes = Mir.Inst.Fixes.fromCondition(cc), |
| 1080 | .r1 = reg, | 1080 | .r1 = reg, |
| 1081 | } }, | 1081 | } }, |
| 1082 | .z_and_np, .nz_or_p => .{ .r_scratch = .{ | 1082 | .z_and_np, .nz_or_p => .{ .rr = .{ |
| 1083 | .r1 = reg, | 1083 | .r1 = reg, |
| 1084 | .scratch_reg = (try self.register_manager.allocReg(null, gp)).to8(), | 1084 | .r2 = (try self.register_manager.allocReg(null, gp)).to8(), |
| 1085 | } }, | 1085 | } }, |
| 1086 | }, | 1086 | }, |
| 1087 | }); | 1087 | }); |
| ... | @@ -1120,8 +1120,8 @@ fn asmSetccMemory(self: *Self, m: Memory, cc: bits.Condition) !void { | ... | @@ -1120,8 +1120,8 @@ fn asmSetccMemory(self: *Self, m: Memory, cc: bits.Condition) !void { |
| 1120 | .fixes = Mir.Inst.Fixes.fromCondition(cc), | 1120 | .fixes = Mir.Inst.Fixes.fromCondition(cc), |
| 1121 | .payload = payload, | 1121 | .payload = payload, |
| 1122 | } }, | 1122 | } }, |
| 1123 | .z_and_np, .nz_or_p => .{ .x_scratch = .{ | 1123 | .z_and_np, .nz_or_p => .{ .rx = .{ |
| 1124 | .scratch_reg = (try self.register_manager.allocReg(null, gp)).to8(), | 1124 | .r1 = (try self.register_manager.allocReg(null, gp)).to8(), |
| 1125 | .payload = payload, | 1125 | .payload = payload, |
| 1126 | } }, | 1126 | } }, |
| 1127 | }, | 1127 | }, |
src/arch/x86_64/Lower.zig+16-16| ... | @@ -95,54 +95,54 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct { | ... | @@ -95,54 +95,54 @@ pub fn lowerMir(lower: *Lower, index: Mir.Inst.Index) Error!struct { |
| 95 | }, | 95 | }, |
| 96 | .pseudo_set_z_and_np_r => { | 96 | .pseudo_set_z_and_np_r => { |
| 97 | try lower.emit(.none, .setz, &.{ | 97 | try lower.emit(.none, .setz, &.{ |
| 98 | .{ .reg = inst.data.r_scratch.r1 }, | 98 | .{ .reg = inst.data.rr.r1 }, |
| 99 | }); | 99 | }); |
| 100 | try lower.emit(.none, .setnp, &.{ | 100 | try lower.emit(.none, .setnp, &.{ |
| 101 | .{ .reg = inst.data.r_scratch.scratch_reg }, | 101 | .{ .reg = inst.data.rr.r2 }, |
| 102 | }); | 102 | }); |
| 103 | try lower.emit(.none, .@"and", &.{ | 103 | try lower.emit(.none, .@"and", &.{ |
| 104 | .{ .reg = inst.data.r_scratch.r1 }, | 104 | .{ .reg = inst.data.rr.r1 }, |
| 105 | .{ .reg = inst.data.r_scratch.scratch_reg }, | 105 | .{ .reg = inst.data.rr.r2 }, |
| 106 | }); | 106 | }); |
| 107 | }, | 107 | }, |
| 108 | .pseudo_set_z_and_np_m_sib, | 108 | .pseudo_set_z_and_np_m_sib, |
| 109 | .pseudo_set_z_and_np_m_rip, | 109 | .pseudo_set_z_and_np_m_rip, |
| 110 | => { | 110 | => { |
| 111 | try lower.emit(.none, .setz, &.{ | 111 | try lower.emit(.none, .setz, &.{ |
| 112 | .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, | 112 | .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, |
| 113 | }); | 113 | }); |
| 114 | try lower.emit(.none, .setnp, &.{ | 114 | try lower.emit(.none, .setnp, &.{ |
| 115 | .{ .reg = inst.data.x_scratch.scratch_reg }, | 115 | .{ .reg = inst.data.rx.r1 }, |
| 116 | }); | 116 | }); |
| 117 | try lower.emit(.none, .@"and", &.{ | 117 | try lower.emit(.none, .@"and", &.{ |
| 118 | .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, | 118 | .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, |
| 119 | .{ .reg = inst.data.x_scratch.scratch_reg }, | 119 | .{ .reg = inst.data.rx.r1 }, |
| 120 | }); | 120 | }); |
| 121 | }, | 121 | }, |
| 122 | .pseudo_set_nz_or_p_r => { | 122 | .pseudo_set_nz_or_p_r => { |
| 123 | try lower.emit(.none, .setnz, &.{ | 123 | try lower.emit(.none, .setnz, &.{ |
| 124 | .{ .reg = inst.data.r_scratch.r1 }, | 124 | .{ .reg = inst.data.rr.r1 }, |
| 125 | }); | 125 | }); |
| 126 | try lower.emit(.none, .setp, &.{ | 126 | try lower.emit(.none, .setp, &.{ |
| 127 | .{ .reg = inst.data.r_scratch.scratch_reg }, | 127 | .{ .reg = inst.data.rr.r2 }, |
| 128 | }); | 128 | }); |
| 129 | try lower.emit(.none, .@"or", &.{ | 129 | try lower.emit(.none, .@"or", &.{ |
| 130 | .{ .reg = inst.data.r_scratch.r1 }, | 130 | .{ .reg = inst.data.rr.r1 }, |
| 131 | .{ .reg = inst.data.r_scratch.scratch_reg }, | 131 | .{ .reg = inst.data.rr.r2 }, |
| 132 | }); | 132 | }); |
| 133 | }, | 133 | }, |
| 134 | .pseudo_set_nz_or_p_m_sib, | 134 | .pseudo_set_nz_or_p_m_sib, |
| 135 | .pseudo_set_nz_or_p_m_rip, | 135 | .pseudo_set_nz_or_p_m_rip, |
| 136 | => { | 136 | => { |
| 137 | try lower.emit(.none, .setnz, &.{ | 137 | try lower.emit(.none, .setnz, &.{ |
| 138 | .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, | 138 | .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, |
| 139 | }); | 139 | }); |
| 140 | try lower.emit(.none, .setp, &.{ | 140 | try lower.emit(.none, .setp, &.{ |
| 141 | .{ .reg = inst.data.x_scratch.scratch_reg }, | 141 | .{ .reg = inst.data.rx.r1 }, |
| 142 | }); | 142 | }); |
| 143 | try lower.emit(.none, .@"or", &.{ | 143 | try lower.emit(.none, .@"or", &.{ |
| 144 | .{ .mem = lower.mem(inst.ops, inst.data.x_scratch.payload) }, | 144 | .{ .mem = lower.mem(inst.ops, inst.data.rx.payload) }, |
| 145 | .{ .reg = inst.data.x_scratch.scratch_reg }, | 145 | .{ .reg = inst.data.rx.r1 }, |
| 146 | }); | 146 | }); |
| 147 | }, | 147 | }, |
| 148 | .pseudo_j_z_and_np_inst => { | 148 | .pseudo_j_z_and_np_inst => { |
src/arch/x86_64/Mir.zig+6-18| ... | @@ -711,27 +711,27 @@ pub const Inst = struct { | ... | @@ -711,27 +711,27 @@ pub const Inst = struct { |
| 711 | pseudo_cmov_nz_or_p_rm_rip, | 711 | pseudo_cmov_nz_or_p_rm_rip, |
| 712 | /// Set byte if zero flag set and parity flag not set | 712 | /// Set byte if zero flag set and parity flag not set |
| 713 | /// Requires a scratch register! | 713 | /// Requires a scratch register! |
| 714 | /// Uses `r_scratch` payload. | 714 | /// Uses `rr` payload. |
| 715 | pseudo_set_z_and_np_r, | 715 | pseudo_set_z_and_np_r, |
| 716 | /// Set byte if zero flag set and parity flag not set | 716 | /// Set byte if zero flag set and parity flag not set |
| 717 | /// Requires a scratch register! | 717 | /// Requires a scratch register! |
| 718 | /// Uses `x_scratch` payload. | 718 | /// Uses `rx` payload. |
| 719 | pseudo_set_z_and_np_m_sib, | 719 | pseudo_set_z_and_np_m_sib, |
| 720 | /// Set byte if zero flag set and parity flag not set | 720 | /// Set byte if zero flag set and parity flag not set |
| 721 | /// Requires a scratch register! | 721 | /// Requires a scratch register! |
| 722 | /// Uses `x_scratch` payload. | 722 | /// Uses `rx` payload. |
| 723 | pseudo_set_z_and_np_m_rip, | 723 | pseudo_set_z_and_np_m_rip, |
| 724 | /// Set byte if zero flag not set or parity flag set | 724 | /// Set byte if zero flag not set or parity flag set |
| 725 | /// Requires a scratch register! | 725 | /// Requires a scratch register! |
| 726 | /// Uses `r_scratch` payload. | 726 | /// Uses `rr` payload. |
| 727 | pseudo_set_nz_or_p_r, | 727 | pseudo_set_nz_or_p_r, |
| 728 | /// Set byte if zero flag not set or parity flag set | 728 | /// Set byte if zero flag not set or parity flag set |
| 729 | /// Requires a scratch register! | 729 | /// Requires a scratch register! |
| 730 | /// Uses `x_scratch` payload. | 730 | /// Uses `rx` payload. |
| 731 | pseudo_set_nz_or_p_m_sib, | 731 | pseudo_set_nz_or_p_m_sib, |
| 732 | /// Set byte if zero flag not set or parity flag set | 732 | /// Set byte if zero flag not set or parity flag set |
| 733 | /// Requires a scratch register! | 733 | /// Requires a scratch register! |
| 734 | /// Uses `x_scratch` payload. | 734 | /// Uses `rx` payload. |
| 735 | pseudo_set_nz_or_p_m_rip, | 735 | pseudo_set_nz_or_p_m_rip, |
| 736 | /// Jump if zero flag set and parity flag not set | 736 | /// Jump if zero flag set and parity flag not set |
| 737 | /// Uses `inst` payload. | 737 | /// Uses `inst` payload. |
| ... | @@ -836,18 +836,6 @@ pub const Inst = struct { | ... | @@ -836,18 +836,6 @@ pub const Inst = struct { |
| 836 | i: u8, | 836 | i: u8, |
| 837 | payload: u32, | 837 | payload: u32, |
| 838 | }, | 838 | }, |
| 839 | /// Register, scratch register | ||
| 840 | r_scratch: struct { | ||
| 841 | fixes: Fixes = ._, | ||
| 842 | r1: Register, | ||
| 843 | scratch_reg: Register, | ||
| 844 | }, | ||
| 845 | /// Scratch register, followed by Custom payload found in extra. | ||
| 846 | x_scratch: struct { | ||
| 847 | fixes: Fixes = ._, | ||
| 848 | scratch_reg: Register, | ||
| 849 | payload: u32, | ||
| 850 | }, | ||
| 851 | /// Custom payload found in extra. | 839 | /// Custom payload found in extra. |
| 852 | x: struct { | 840 | x: struct { |
| 853 | fixes: Fixes = ._, | 841 | fixes: Fixes = ._, |