authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2025-09-10 03:10:46-04:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-09-21 21:08:52+02:00
log37985613c760d1d20a1fbba292fd5c25129f400a
tree0d271fcd35f2060a434002c996886d3d4a9cc217
parent670c4fae617af3a7cfbdfcd850b65d61b94d1cf8
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

x86_64: fix safety crashes in `storeRegs`

1 files changed, 16 insertions(+), 6 deletions(-)

src/arch/x86_64/CodeGen.zig+16-6
...@@ -187019,15 +187019,17 @@ const Temp = struct {...@@ -187019,15 +187019,17 @@ const Temp = struct {
187019 },187019 },
187020 .struct_type => {187020 .struct_type => {
187021 assert(src_regs.len - part_index == std.math.divCeil(u32, src_abi_size, 8) catch unreachable);187021 assert(src_regs.len - part_index == std.math.divCeil(u32, src_abi_size, 8) catch unreachable);
187022 break :part_ty .u64;187022 break :part_ty switch (src_abi_size) {
187023 0, 3, 5...7 => unreachable,
187024 1 => .u8,
187025 2 => .u16,
187026 4 => .u32,
187027 else => .u64,
187028 };
187023 },187029 },
187024 };187030 };
187025 const part_size: u31 = @intCast(part_ty.abiSize(zcu));187031 const part_size: u31 = @intCast(part_ty.abiSize(zcu));
187026 const src_rc = src_reg.class();187032 const src_rc = src_reg.class();
187027 const part_bit_size = switch (src_rc) {
187028 else => 8 * part_size,
187029 .x87 => part_ty.bitSize(zcu),
187030 };
187031 if (src_rc == .x87 or std.math.isPowerOfTwo(part_size)) {187033 if (src_rc == .x87 or std.math.isPowerOfTwo(part_size)) {
187032 // hack around linker relocation bugs187034 // hack around linker relocation bugs
187033 switch (ptr.tracking(cg).short) {187035 switch (ptr.tracking(cg).short) {
...@@ -187036,7 +187038,15 @@ const Temp = struct {...@@ -187036,7 +187038,15 @@ const Temp = struct {
187036 }187038 }
187037 const strat = try cg.moveStrategy(part_ty, src_rc, false);187039 const strat = try cg.moveStrategy(part_ty, src_rc, false);
187038 try strat.write(cg, try ptr.tracking(cg).short.deref().mem(cg, .{187040 try strat.write(cg, try ptr.tracking(cg).short.deref().mem(cg, .{
187039 .size = .fromBitSize(part_bit_size),187041 .size = switch (src_rc) {
187042 else => .fromBitSize(8 * part_size),
187043 .x87 => switch (abi.classifySystemV(src_ty, zcu, cg.target, .other)[part_index]) {
187044 else => unreachable,
187045 .float => .dword,
187046 .float_combine, .sse => .qword,
187047 .x87 => .tbyte,
187048 },
187049 },
187040 .disp = part_disp,187050 .disp = part_disp,
187041 }), registerAlias(src_reg, part_size));187051 }), registerAlias(src_reg, part_size));
187042 } else {187052 } else {