authorgravatar for hello@nektro.netMeghan Denny <hello@nektro.net> 2024-03-03 16:57:59-08:00
committergravatar for git@vexu.euVeikka Tuominen <git@vexu.eu> 2024-03-15 16:42:10+02:00
log4b1edad6e2186999ea5f88b4a7a26ff8d800a6e8
tree5a4af2fb1b43dea65c9e939826690fb8e2917731
parent1ddd0691c65ebbd4888509bb51a7b2c7d32acb8f

test: reenable some behavior vector tests

1 files changed, 0 insertions(+), 5 deletions(-)

test/behavior/vector.zig-5
......@@ -717,19 +717,14 @@ test "vector shift operators" {
717717 };
718718
719719 switch (builtin.target.cpu.arch) {
720 .x86,
721 .aarch64,
722720 .aarch64_be,
723721 .aarch64_32,
724 .arm,
725722 .armeb,
726723 .thumb,
727724 .thumbeb,
728725 .mips,
729 .mipsel,
730726 .mips64,
731727 .mips64el,
732 .riscv64,
733728 .sparc64,
734729 => {
735730 // LLVM miscompiles on this architecture