From b5bd111f1085b4c5630ac61c03567cdabf20e286 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 02:27:09 +0200 Subject: [PATCH 01/10] test: arm-haiku only supports hard float --- test/llvm_targets.zig | 1 - 1 file changed, 1 deletion(-) diff --git a/test/llvm_targets.zig b/test/llvm_targets.zig index f3b3af4cc7a91be9183f3ffadf57c71fb7529a32..edff9ff57f72c8bc85931311797e0c43853fe00c 100644 --- a/test/llvm_targets.zig +++ b/test/llvm_targets.zig @@ -53,7 +53,6 @@ const targets = [_]std.Target.Query{ .{ .cpu_arch = .arm, .os_tag = .freestanding, .abi = .eabi }, .{ .cpu_arch = .arm, .os_tag = .freestanding, .abi = .eabihf }, .{ .cpu_arch = .arm, .os_tag = .fuchsia, .abi = .eabihf }, - .{ .cpu_arch = .arm, .os_tag = .haiku, .abi = .eabi }, .{ .cpu_arch = .arm, .os_tag = .haiku, .abi = .eabihf }, .{ .cpu_arch = .arm, .os_tag = .linux, .abi = .androideabi }, .{ .cpu_arch = .arm, .os_tag = .linux, .abi = .eabi }, -- 2.54.0 From 0b00adc6fcfb78991d1873056b447a248a0f702b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 02:26:49 +0200 Subject: [PATCH 02/10] std.Target: make cortex_a55 the baseline for aarch64-haiku Haiku's build system targets this. --- lib/std/Target.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index d4685cb6ba666b81bb803768faf7dae134575c16..d00c8342578836aa4f37064c6929f5b31f1dcde8 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2046,6 +2046,7 @@ pub const Cpu = struct { }, .armeb, .thumbeb => &arm.cpu.baseline, .aarch64 => switch (os.tag) { + .haiku => &aarch64.cpu.cortex_a55, .driverkit, .maccatalyst, .macos => &aarch64.cpu.apple_m1, .ios, .tvos => &aarch64.cpu.apple_a7, .visionos => &aarch64.cpu.apple_m2, -- 2.54.0 From c49f7fbffdc15a67cce4d6f144b0f3488e34a5e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 02:51:17 +0200 Subject: [PATCH 03/10] std.Target: make m68030 the baseline for m68k It's the oldest model that has an integrated MMU. --- lib/std/Target.zig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index d00c8342578836aa4f37064c6929f5b31f1dcde8..252cdd0859dfbfeb572451d12b99e022bcaff551 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2062,7 +2062,7 @@ pub const Cpu = struct { .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model. .loongarch32 => &loongarch.cpu.la32v1_0, .loongarch64 => &loongarch.cpu.la64v1_0, - .m68k => &m68k.cpu.M68000, + .m68k => &m68k.cpu.M68030, .mips => &mips.cpu.mips32r2, .mipsel => switch (os.tag) { .psp => &mips.cpu.allegrex, -- 2.54.0 From 51962172f70c919ab0e89937216a65aef4a06307 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 02:52:36 +0200 Subject: [PATCH 04/10] std.Target: make esp32 the baseline for xtensa This is the MCU that the overwhelming majority of hobbyists target. --- lib/std/Target.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 252cdd0859dfbfeb572451d12b99e022bcaff551..751f68224a897fd0b8cee50f646ce937bf69c5e0 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2086,6 +2086,7 @@ pub const Cpu = struct { else => generic(arch), }, .xcore => &xcore.cpu.xs1b_generic, + .xtensa => &xtensa.cpu.esp32, .wasm32, .wasm64 => &wasm.cpu.lime1, else => generic(arch), -- 2.54.0 From 1fd1fadc0286d8a87816351ca148a36f3c7b463e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:05:48 +0200 Subject: [PATCH 05/10] std.Target: make ultrasparc the baseline for sparc64 No OSs actually support CPUs older than this. --- lib/std/Target.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 751f68224a897fd0b8cee50f646ce937bf69c5e0..c8255f05030876e097d89b6a77f089d5dc30ddc8 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2077,6 +2077,7 @@ pub const Cpu = struct { // gcc/clang do not have a generic s390x model. .s390x => &s390x.cpu.arch8, .sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8. + .sparc64 => &sparc.cpu.ultrasparc, .x86 => &x86.cpu.pentium4, .x86_64 => switch (os.tag) { .driverkit, .maccatalyst => &x86.cpu.nehalem, -- 2.54.0 From 552c0fe914543cdaf0d0c74a759bde028a58e6b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:09:12 +0200 Subject: [PATCH 06/10] std.Target: make pwr9 the baseline for powerpc64-openbsd From https://www.openbsd.org/powerpc64.html: OpenBSD/powerpc64 runs on PowerNV machines using the IBM POWER9 processors. --- lib/std/Target.zig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index c8255f05030876e097d89b6a77f089d5dc30ddc8..e3ff81cd8ed51c4b165090cc021d8b1f0d90c918 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2071,6 +2071,10 @@ pub const Cpu = struct { .mips64, .mips64el => &mips.cpu.mips64r2, .msp430 => &msp430.cpu.msp430, .nvptx, .nvptx64 => &nvptx.cpu.sm_52, + .powerpc64 => switch (os.tag) { + .openbsd => &powerpc.cpu.pwr9, + else => generic(arch), + }, .powerpc64le => &powerpc.cpu.ppc64le, .riscv32, .riscv32be => &riscv.cpu.baseline_rv32, .riscv64, .riscv64be => &riscv.cpu.baseline_rv64, -- 2.54.0 From 9f6d31c1bfd8b490a19c7eda99fece70cbd6d882 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:19:22 +0200 Subject: [PATCH 07/10] std.Target: make 750 the baseline for powerpc-openbsd From https://www.openbsd.org/macppc.html: OpenBSD/macppc runs on the PowerPC-based Macintosh systems from the "New World" family --- lib/std/Target.zig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index e3ff81cd8ed51c4b165090cc021d8b1f0d90c918..5517df03c1aa557088701b3bf2cb5e5bd4ac414c 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2071,6 +2071,10 @@ pub const Cpu = struct { .mips64, .mips64el => &mips.cpu.mips64r2, .msp430 => &msp430.cpu.msp430, .nvptx, .nvptx64 => &nvptx.cpu.sm_52, + .powerpc => switch (os.tag) { + .openbsd => &powerpc.cpu.@"750", + else => generic(arch), + }, .powerpc64 => switch (os.tag) { .openbsd => &powerpc.cpu.pwr9, else => generic(arch), -- 2.54.0 From a8859a6d21e3629a6605921e88987fcbb19b1e34 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:42:22 +0200 Subject: [PATCH 08/10] std.Target: make octeon the baseline for mips64-openbsd From https://www.openbsd.org/octeon.html: OpenBSD/octeon is a port intended to run on MIPS64-based systems that utilize the Cavium OCTEON, OCTEON Plus, OCTEON II, and OCTEON III system on chips. --- lib/std/Target.zig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 5517df03c1aa557088701b3bf2cb5e5bd4ac414c..4f6e8985979bf3607c296c291dbdea1f36077728 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2068,7 +2068,11 @@ pub const Cpu = struct { .psp => &mips.cpu.allegrex, else => &mips.cpu.mips32r2, }, - .mips64, .mips64el => &mips.cpu.mips64r2, + .mips64 => switch (os.tag) { + .openbsd => &mips.cpu.octeon, + else => &mips.cpu.mips64r2, + }, + .mips64el => &mips.cpu.mips64r2, .msp430 => &msp430.cpu.msp430, .nvptx, .nvptx64 => &nvptx.cpu.sm_52, .powerpc => switch (os.tag) { -- 2.54.0 From 8930bdfeb63e47901d4a1de5f1d28f56c88f2026 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:49:19 +0200 Subject: [PATCH 09/10] std.Target: make arch11 (z13) the baseline for s390x arch8 (z10) is from 2008; arch11 (z13) is from 2015. I believe all Linux distros have already made arch11 the baseline, so let's do the same. --- lib/std/Target.zig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 4f6e8985979bf3607c296c291dbdea1f36077728..6e57e8b6311fb37ff7369d47ee5d690788d3da3d 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2086,8 +2086,7 @@ pub const Cpu = struct { .powerpc64le => &powerpc.cpu.ppc64le, .riscv32, .riscv32be => &riscv.cpu.baseline_rv32, .riscv64, .riscv64be => &riscv.cpu.baseline_rv64, - // gcc/clang do not have a generic s390x model. - .s390x => &s390x.cpu.arch8, + .s390x => &s390x.cpu.arch11, .sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8. .sparc64 => &sparc.cpu.ultrasparc, .x86 => &x86.cpu.pentium4, -- 2.54.0 From 038c0783d4dd11d6a79c6d5aa750f1c755847671 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Fri, 22 May 2026 03:53:00 +0200 Subject: [PATCH 10/10] std.Target: only make v9 the baseline for sparc-linux NetBSD supports older models, for example. --- lib/std/Target.zig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 6e57e8b6311fb37ff7369d47ee5d690788d3da3d..7ce30c1ac81b9efde1139fec20a1cf74f249596c 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -2087,7 +2087,10 @@ pub const Cpu = struct { .riscv32, .riscv32be => &riscv.cpu.baseline_rv32, .riscv64, .riscv64be => &riscv.cpu.baseline_rv64, .s390x => &s390x.cpu.arch11, - .sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8. + .sparc => switch (os.tag) { + .linux => &sparc.cpu.v9, // glibc does not work with 'plain' v8. + else => generic(arch), + }, .sparc64 => &sparc.cpu.ultrasparc, .x86 => &x86.cpu.pentium4, .x86_64 => switch (os.tag) { -- 2.54.0