diff --git a/src/codegen/wasm/abi.zig b/src/codegen/wasm/abi.zig
index 0c6afdcc500202b4b4dd4b794d28b9fdb813af70..9f0b9b6dc9ebb7715d16839a6f42fd954d7787a2 100644
--- a/src/codegen/wasm/abi.zig
+++ b/src/codegen/wasm/abi.zig
@@ -84,6 +84,13 @@ pub fn classifyTypeForLlvm(ty: Type, zcu: *const Zcu) LlvmClass {
                 if (explicit_align.compareStrict(.gt, field_ty.abiAlignment(zcu)))
                     return .indirect;
             }
+            if (field_ty.zigTypeTag(zcu) == .array) {
+                switch (field_ty.arrayLenIncludingSentinel(zcu)) {
+                    0 => unreachable,
+                    1 => return classifyTypeForLlvm(field_ty.childType(zcu), zcu),
+                    else => {},
+                }
+            }
             return classifyTypeForLlvm(field_ty, zcu);
         },
         .@"union" => {
diff --git a/test/c_abi/main.zig b/test/c_abi/main.zig
index 15cb889467a794aaadd7ce08eb33523b4ec65885..4cc383805d755af213f3e84a2cb5447c0a5315f1 100644
--- a/test/c_abi/main.zig
+++ b/test/c_abi/main.zig
@@ -16107,20 +16107,12 @@ const Struct_array_1_f32 = extern struct {
     a: [1]f32,
 };
 
-comptime {
-    skip: {
-        if (builtin.cpu.arch.isWasm()) break :skip;
-
-        _ = struct {
-            export fn zig_ret_struct_array_1_f32() Struct_array_1_f32 {
-                return .{ .a = .{1} };
-            }
-            export fn zig_struct_array_1_f32(s: Struct_array_1_f32, i: usize) void {
-                expect(s.a[0] == 2) catch @panic("test failure");
-                expect(i == 3) catch @panic("test failure");
-            }
-        };
-    }
+export fn zig_ret_struct_array_1_f32() Struct_array_1_f32 {
+    return .{ .a = .{1} };
+}
+export fn zig_struct_array_1_f32(s: Struct_array_1_f32, i: usize) void {
+    expect(s.a[0] == 2) catch @panic("test failure");
+    expect(i == 3) catch @panic("test failure");
 }
 
 extern fn c_ret_struct_array_1_f32() Struct_array_1_f32;
@@ -16134,7 +16126,6 @@ test "struct [1]f32" {
     if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
     if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
     if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
-    if (builtin.cpu.arch.isWasm()) return error.SkipZigTest;
 
     const s = c_ret_struct_array_1_f32();
     try expect(s.a[0] == 4);
@@ -16303,7 +16294,6 @@ test "struct [0:sentinel]f32" {
     if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
     if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
     if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
-    if (builtin.cpu.arch.isWasm()) return error.SkipZigTest;
 
     var sentinel_index: usize = 0;
     _ = &sentinel_index;
@@ -16766,20 +16756,12 @@ const Struct_array_1_f64 = extern struct {
     a: [1]f64,
 };
 
-comptime {
-    skip: {
-        if (builtin.cpu.arch.isWasm()) break :skip;
-
-        _ = struct {
-            export fn zig_ret_struct_array_1_f64() Struct_array_1_f64 {
-                return .{ .a = .{1} };
-            }
-            export fn zig_struct_array_1_f64(s: Struct_array_1_f64, i: usize) void {
-                expect(s.a[0] == 2) catch @panic("test failure");
-                expect(i == 3) catch @panic("test failure");
-            }
-        };
-    }
+export fn zig_ret_struct_array_1_f64() Struct_array_1_f64 {
+    return .{ .a = .{1} };
+}
+export fn zig_struct_array_1_f64(s: Struct_array_1_f64, i: usize) void {
+    expect(s.a[0] == 2) catch @panic("test failure");
+    expect(i == 3) catch @panic("test failure");
 }
 
 extern fn c_ret_struct_array_1_f64() Struct_array_1_f64;
@@ -16793,7 +16775,6 @@ test "struct [1]f64" {
     if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
     if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
     if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
-    if (builtin.cpu.arch.isWasm()) return error.SkipZigTest;
 
     const s = c_ret_struct_array_1_f64();
     try expect(s.a[0] == 4);