| ... | ... | @@ -1339,48 +1339,48 @@ pub const Instruction = union(enum) { |
| 1339 | 1339 | |
| 1340 | 1340 | pub fn sll(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1341 | 1341 | return switch (s2) { |
| 1342 | | Register => format3k(0b11, 0b10_0101, .shift32, rs1, rs2, rd), |
| 1343 | | u5 => format3l(0b11, 0b10_0101, rs1, rs2, rd), |
| 1342 | Register => format3k(0b10, 0b10_0101, .shift32, rs1, rs2, rd), |
| 1343 | u5 => format3l(0b10, 0b10_0101, rs1, rs2, rd), |
| 1344 | 1344 | else => unreachable, |
| 1345 | 1345 | }; |
| 1346 | 1346 | } |
| 1347 | 1347 | |
| 1348 | 1348 | pub fn srl(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1349 | 1349 | return switch (s2) { |
| 1350 | | Register => format3k(0b11, 0b10_0110, .shift32, rs1, rs2, rd), |
| 1351 | | u5 => format3l(0b11, 0b10_0110, rs1, rs2, rd), |
| 1350 | Register => format3k(0b10, 0b10_0110, .shift32, rs1, rs2, rd), |
| 1351 | u5 => format3l(0b10, 0b10_0110, rs1, rs2, rd), |
| 1352 | 1352 | else => unreachable, |
| 1353 | 1353 | }; |
| 1354 | 1354 | } |
| 1355 | 1355 | |
| 1356 | 1356 | pub fn sra(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1357 | 1357 | return switch (s2) { |
| 1358 | | Register => format3k(0b11, 0b10_0111, .shift32, rs1, rs2, rd), |
| 1359 | | u5 => format3l(0b11, 0b10_0111, rs1, rs2, rd), |
| 1358 | Register => format3k(0b10, 0b10_0111, .shift32, rs1, rs2, rd), |
| 1359 | u5 => format3l(0b10, 0b10_0111, rs1, rs2, rd), |
| 1360 | 1360 | else => unreachable, |
| 1361 | 1361 | }; |
| 1362 | 1362 | } |
| 1363 | 1363 | |
| 1364 | 1364 | pub fn sllx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1365 | 1365 | return switch (s2) { |
| 1366 | | Register => format3k(0b11, 0b10_0101, .shift64, rs1, rs2, rd), |
| 1367 | | u6 => format3m(0b11, 0b10_0101, rs1, rs2, rd), |
| 1366 | Register => format3k(0b10, 0b10_0101, .shift64, rs1, rs2, rd), |
| 1367 | u6 => format3m(0b10, 0b10_0101, rs1, rs2, rd), |
| 1368 | 1368 | else => unreachable, |
| 1369 | 1369 | }; |
| 1370 | 1370 | } |
| 1371 | 1371 | |
| 1372 | 1372 | pub fn srlx(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1373 | 1373 | return switch (s2) { |
| 1374 | | Register => format3k(0b11, 0b10_0110, .shift64, rs1, rs2, rd), |
| 1375 | | u6 => format3m(0b11, 0b10_0110, rs1, rs2, rd), |
| 1374 | Register => format3k(0b10, 0b10_0110, .shift64, rs1, rs2, rd), |
| 1375 | u6 => format3m(0b10, 0b10_0110, rs1, rs2, rd), |
| 1376 | 1376 | else => unreachable, |
| 1377 | 1377 | }; |
| 1378 | 1378 | } |
| 1379 | 1379 | |
| 1380 | 1380 | pub fn srax(comptime s2: type, rs1: Register, rs2: s2, rd: Register) Instruction { |
| 1381 | 1381 | return switch (s2) { |
| 1382 | | Register => format3k(0b11, 0b10_0111, .shift64, rs1, rs2, rd), |
| 1383 | | u6 => format3m(0b11, 0b10_0111, rs1, rs2, rd), |
| 1382 | Register => format3k(0b10, 0b10_0111, .shift64, rs1, rs2, rd), |
| 1383 | u6 => format3m(0b10, 0b10_0111, rs1, rs2, rd), |
| 1384 | 1384 | else => unreachable, |
| 1385 | 1385 | }; |
| 1386 | 1386 | } |