From 8578b07faaa61f772e928961e3546156c14677dd Mon Sep 17 00:00:00 2001 From: krystiann Date: Wed, 18 Mar 2026 00:30:11 -0700 Subject: [PATCH] std.os.linux: add arc arch bits --- lib/std/os/linux.zig | 16 ++++- lib/std/os/linux/arc.zig | 144 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 158 insertions(+), 2 deletions(-) create mode 100644 lib/std/os/linux/arc.zig diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig index 424f80bb6a3fbe00e0ffc5ca69379ded3d407c5c..bc9fce1506b2ddb691cb36d7b3f58806182cac94 100644 --- a/lib/std/os/linux.zig +++ b/lib/std/os/linux.zig @@ -31,6 +31,7 @@ test { const arch_bits = switch (native_arch) { .aarch64, .aarch64_be => @import("linux/aarch64.zig"), + .arc, .arceb => @import("linux/arc.zig"), .arm, .armeb, .thumb, .thumbeb => @import("linux/arm.zig"), .hexagon => @import("linux/hexagon.zig"), .loongarch32 => @import("linux/loongarch32.zig"), @@ -274,7 +275,13 @@ pub const MAP = switch (native_arch) { UNINITIALIZED: bool = false, _: u5 = 0, }, - .hexagon, .m68k, .or1k, .s390x => packed struct(u32) { + .arc, + .arceb, + .hexagon, + .m68k, + .or1k, + .s390x, + => packed struct(u32) { TYPE: MAP_TYPE, FIXED: bool = false, ANONYMOUS: bool = false, @@ -451,7 +458,12 @@ pub const O = switch (native_arch) { TMPFILE: bool = false, _23: u9 = 0, }, - .hexagon, .or1k, .s390x => packed struct(u32) { + .arc, + .arceb, + .hexagon, + .or1k, + .s390x, + => packed struct(u32) { ACCMODE: ACCMODE = .RDONLY, _2: u4 = 0, CREAT: bool = false, diff --git a/lib/std/os/linux/arc.zig b/lib/std/os/linux/arc.zig new file mode 100644 index 0000000000000000000000000000000000000000..2db12030ecd54d9fa88febec74bf502c96764572 --- /dev/null +++ b/lib/std/os/linux/arc.zig @@ -0,0 +1,144 @@ +const builtin = @import("builtin"); +const std = @import("../../std.zig"); +const SYS = std.os.linux.SYS; + +pub fn syscall0(number: SYS) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + : .{ .memory = true }); +} + +pub fn syscall1(number: SYS, arg1: u32) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + : .{ .memory = true }); +} + +pub fn syscall2(number: SYS, arg1: u32, arg2: u32) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + [arg2] "{r1}" (arg2), + : .{ .memory = true }); +} + +pub fn syscall3(number: SYS, arg1: u32, arg2: u32, arg3: u32) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + [arg2] "{r1}" (arg2), + [arg3] "{r2}" (arg3), + : .{ .memory = true }); +} + +pub fn syscall4(number: SYS, arg1: u32, arg2: u32, arg3: u32, arg4: u32) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + [arg2] "{r1}" (arg2), + [arg3] "{r2}" (arg3), + [arg4] "{r3}" (arg4), + : .{ .memory = true }); +} + +pub fn syscall5(number: SYS, arg1: u32, arg2: u32, arg3: u32, arg4: u32, arg5: u32) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + [arg2] "{r1}" (arg2), + [arg3] "{r2}" (arg3), + [arg4] "{r3}" (arg4), + [arg5] "{r4}" (arg5), + : .{ .memory = true }); +} + +pub fn syscall6( + number: SYS, + arg1: u32, + arg2: u32, + arg3: u32, + arg4: u32, + arg5: u32, + arg6: u32, +) u32 { + return asm volatile ("trap_s 0" + : [ret] "={r0}" (-> u32), + : [number] "{r8}" (@intFromEnum(number)), + [arg1] "{r0}" (arg1), + [arg2] "{r1}" (arg2), + [arg3] "{r2}" (arg3), + [arg4] "{r3}" (arg4), + [arg5] "{r4}" (arg5), + [arg6] "{r5}" (arg6), + : .{ .memory = true }); +} + +pub fn clone() callconv(.naked) u32 { + // __clone(func, stack, flags, arg, ptid, tls, ctid) + // r0, r1, r2, r3, r4, r5, r6 + // + // syscall(SYS_clone, flags, stack, ptid, tls, ctid) + // r8 r0, r1, r2, r3, r4 + asm volatile ( + \\ // Align stack pointer + \\ and r1, r1, -16 + \\ mov r10, r0 + \\ mov r11, r3 + \\ // Setup the arguments + \\ mov r0, r2 + \\ mov r2, r4 + \\ mov r3, r5 + \\ mov r4, r6 + \\ mov r8, 220 // SYS_clone + \\ trap_s 0 + \\ cmp r0, 0 + \\ beq 1f + \\ j [blink] + \\ // Child + \\ 1: + ); + if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile ( + \\ .cfi_undefined blink + ); + + asm volatile ( + \\ mov fp, 0 + \\ mov blink, 0 + \\ + \\ mov r0, r11 + \\ jl [r10] + \\ + \\ // Exit + \\ mov r8, 93 // SYS_exit + \\ trap_s 0 + ); +} + +pub const restore = restore_rt; + +pub fn restore_rt() callconv(.naked) noreturn { + switch (builtin.zig_backend) { + .stage2_c => asm volatile ( + \\ mov r8, %[number] + \\ trap_s 0 + : + : [number] "I" (@intFromEnum(SYS.rt_sigreturn)), + ), + else => asm volatile ( + \\ trap_s 0 + : + : [number] "{r8}" (@intFromEnum(SYS.rt_sigreturn)), + ), + } +} + +pub const time_t = i64; + +pub const VDSO = void; -- 2.54.0