| ... | @@ -1422,3 +1422,166 @@ pub const Strtab = struct { | ... | @@ -1422,3 +1422,166 @@ pub const Strtab = struct { |
| 1422 | return mem.sliceTo(@as([*:0]const u8, @ptrCast(self.buffer.ptr + off)), 0); | 1422 | return mem.sliceTo(@as([*:0]const u8, @ptrCast(self.buffer.ptr + off)), 0); |
| 1423 | } | 1423 | } |
| 1424 | }; | 1424 | }; |
| | 1425 | |
| | 1426 | pub const ImportHeader = extern struct { |
| | 1427 | sig1: MachineType, |
| | 1428 | sig2: u16, |
| | 1429 | version: u16, |
| | 1430 | machine: MachineType, |
| | 1431 | time_date_stamp: u32, |
| | 1432 | size_of_data: u32, |
| | 1433 | hint: u16, |
| | 1434 | types: packed struct { |
| | 1435 | type: ImportType, |
| | 1436 | name_type: ImportNameType, |
| | 1437 | reserved: u11, |
| | 1438 | }, |
| | 1439 | }; |
| | 1440 | |
| | 1441 | pub const ImportType = enum(u2) { |
| | 1442 | /// Executable code. |
| | 1443 | CODE = 0, |
| | 1444 | /// Data. |
| | 1445 | DATA = 1, |
| | 1446 | /// Specified as CONST in .def file. |
| | 1447 | CONST = 2, |
| | 1448 | _, |
| | 1449 | }; |
| | 1450 | |
| | 1451 | pub const ImportNameType = enum(u3) { |
| | 1452 | /// The import is by ordinal. This indicates that the value in the Ordinal/Hint |
| | 1453 | /// field of the import header is the import's ordinal. If this constant is not |
| | 1454 | /// specified, then the Ordinal/Hint field should always be interpreted as the import's hint. |
| | 1455 | ORDINAL = 0, |
| | 1456 | /// The import name is identical to the public symbol name. |
| | 1457 | NAME = 1, |
| | 1458 | /// The import name is the public symbol name, but skipping the leading ?, @, or optionally _. |
| | 1459 | NAME_NOPREFIX = 2, |
| | 1460 | /// The import name is the public symbol name, but skipping the leading ?, @, or optionally _, |
| | 1461 | /// and truncating at the first @. |
| | 1462 | NAME_UNDECORATE = 3, |
| | 1463 | _, |
| | 1464 | }; |
| | 1465 | |
| | 1466 | pub const Relocation = extern struct { |
| | 1467 | virtual_address: u32, |
| | 1468 | symbol_table_index: u32, |
| | 1469 | type: u16, |
| | 1470 | }; |
| | 1471 | |
| | 1472 | pub const ImageRelAmd64 = enum(u16) { |
| | 1473 | /// The relocation is ignored. |
| | 1474 | absolute = 0, |
| | 1475 | |
| | 1476 | /// The 64-bit VA of the relocation target. |
| | 1477 | addr64 = 1, |
| | 1478 | |
| | 1479 | /// The 32-bit VA of the relocation target. |
| | 1480 | addr32 = 2, |
| | 1481 | |
| | 1482 | /// The 32-bit address without an image base. |
| | 1483 | addr32nb = 3, |
| | 1484 | |
| | 1485 | /// The 32-bit relative address from the byte following the relocation. |
| | 1486 | rel32 = 4, |
| | 1487 | |
| | 1488 | /// The 32-bit address relative to byte distance 1 from the relocation. |
| | 1489 | rel32_1 = 5, |
| | 1490 | |
| | 1491 | /// The 32-bit address relative to byte distance 2 from the relocation. |
| | 1492 | rel32_2 = 6, |
| | 1493 | |
| | 1494 | /// The 32-bit address relative to byte distance 3 from the relocation. |
| | 1495 | rel32_3 = 7, |
| | 1496 | |
| | 1497 | /// The 32-bit address relative to byte distance 4 from the relocation. |
| | 1498 | rel32_4 = 8, |
| | 1499 | |
| | 1500 | /// The 32-bit address relative to byte distance 5 from the relocation. |
| | 1501 | rel32_5 = 9, |
| | 1502 | |
| | 1503 | /// The 16-bit section index of the section that contains the target. |
| | 1504 | /// This is used to support debugging information. |
| | 1505 | section = 10, |
| | 1506 | |
| | 1507 | /// The 32-bit offset of the target from the beginning of its section. |
| | 1508 | /// This is used to support debugging information and static thread local storage. |
| | 1509 | secrel = 11, |
| | 1510 | |
| | 1511 | /// A 7-bit unsigned offset from the base of the section that contains the target. |
| | 1512 | secrel7 = 12, |
| | 1513 | |
| | 1514 | /// CLR tokens. |
| | 1515 | token = 13, |
| | 1516 | |
| | 1517 | /// A 32-bit signed span-dependent value emitted into the object. |
| | 1518 | srel32 = 14, |
| | 1519 | |
| | 1520 | /// A pair that must immediately follow every span-dependent value. |
| | 1521 | pair = 15, |
| | 1522 | |
| | 1523 | /// A 32-bit signed span-dependent value that is applied at link time. |
| | 1524 | sspan32 = 16, |
| | 1525 | |
| | 1526 | _, |
| | 1527 | }; |
| | 1528 | |
| | 1529 | pub const ImageRelArm64 = enum(u16) { |
| | 1530 | /// The relocation is ignored. |
| | 1531 | absolute = 0, |
| | 1532 | |
| | 1533 | /// The 32-bit VA of the target. |
| | 1534 | addr32 = 1, |
| | 1535 | |
| | 1536 | /// The 32-bit RVA of the target. |
| | 1537 | addr32nb = 2, |
| | 1538 | |
| | 1539 | /// The 26-bit relative displacement to the target, for B and BL instructions. |
| | 1540 | branch26 = 3, |
| | 1541 | |
| | 1542 | /// The page base of the target, for ADRP instruction. |
| | 1543 | pagebase_rel21 = 4, |
| | 1544 | |
| | 1545 | /// The 21-bit relative displacement to the target, for instruction ADR. |
| | 1546 | rel21 = 5, |
| | 1547 | |
| | 1548 | /// The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) with zero shift. |
| | 1549 | pageoffset_12a = 6, |
| | 1550 | |
| | 1551 | /// The 12-bit page offset of the target, for instruction LDR (indexed, unsigned immediate). |
| | 1552 | pageoffset_12l = 7, |
| | 1553 | |
| | 1554 | /// The 32-bit offset of the target from the beginning of its section. |
| | 1555 | /// This is used to support debugging information and static thread local storage. |
| | 1556 | secrel = 8, |
| | 1557 | |
| | 1558 | /// Bit 0:11 of section offset of the target for instructions ADD/ADDS (immediate) with zero shift. |
| | 1559 | low12a = 9, |
| | 1560 | |
| | 1561 | /// Bit 12:23 of section offset of the target, for instructions ADD/ADDS (immediate) with zero shift. |
| | 1562 | high12a = 10, |
| | 1563 | |
| | 1564 | /// Bit 0:11 of section offset of the target, for instruction LDR (indexed, unsigned immediate). |
| | 1565 | low12l = 11, |
| | 1566 | |
| | 1567 | /// CLR token. |
| | 1568 | token = 12, |
| | 1569 | |
| | 1570 | /// The 16-bit section index of the section that contains the target. |
| | 1571 | /// This is used to support debugging information. |
| | 1572 | section = 13, |
| | 1573 | |
| | 1574 | /// The 64-bit VA of the relocation target. |
| | 1575 | addr64 = 14, |
| | 1576 | |
| | 1577 | /// The 19-bit offset to the relocation target, for conditional B instruction. |
| | 1578 | branch19 = 15, |
| | 1579 | |
| | 1580 | /// The 14-bit offset to the relocation target, for instructions TBZ and TBNZ. |
| | 1581 | branch14 = 16, |
| | 1582 | |
| | 1583 | /// The 32-bit relative address from the byte following the relocation. |
| | 1584 | rel32 = 17, |
| | 1585 | |
| | 1586 | _, |
| | 1587 | }; |