| ... | @@ -3569,11 +3569,13 @@ fn truncRegister( | ... | @@ -3569,11 +3569,13 @@ fn truncRegister( |
| 3569 | }); | 3569 | }); |
| 3570 | }, | 3570 | }, |
| 3571 | 64 => { | 3571 | 64 => { |
| | 3572 | if (dest_reg == operand_reg) |
| | 3573 | return; // Copy register to itself; nothing to do. |
| 3572 | _ = try self.addInst(.{ | 3574 | _ = try self.addInst(.{ |
| 3573 | .tag = .mov, | 3575 | .tag = .mov, |
| 3574 | .data = .{ | 3576 | .data = .{ |
| 3575 | .arithmetic_2op = .{ | 3577 | .arithmetic_2op = .{ |
| 3576 | .is_imm = true, | 3578 | .is_imm = false, |
| 3577 | .rs1 = dest_reg, | 3579 | .rs1 = dest_reg, |
| 3578 | .rs2_or_imm = .{ .rs2 = operand_reg }, | 3580 | .rs2_or_imm = .{ .rs2 = operand_reg }, |
| 3579 | }, | 3581 | }, |