authorgravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2021-11-25 21:27:54+01:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2021-11-25 14:46:52-08:00
log9177f5c17b8dfe55b2aa0be1588bd1a4409386d1
treeb48bba4be514852cff8a4144ee594494639ab895
parentc9352ef9d6d9f1bca94c25710e11de0ae171605f

stage2 RISCV64: remove MCValue.compare_flags_(un)signed

These status flags do not exist in the RISCV architecture

1 files changed, 2 insertions(+), 53 deletions(-)

src/arch/riscv64/CodeGen.zig+2-53
......@@ -119,12 +119,6 @@ const MCValue = union(enum) {
119119 stack_offset: u32,
120120 /// The value is a pointer to one of the stack variables (payload is stack offset).
121121 ptr_stack_offset: u32,
122 /// The value is in the compare flags assuming an unsigned operation,
123 /// with this operator applied on top of it.
124 compare_flags_unsigned: math.CompareOperator,
125 /// The value is in the compare flags assuming a signed operation,
126 /// with this operator applied on top of it.
127 compare_flags_signed: math.CompareOperator,
128122
129123 fn isMemory(mcv: MCValue) bool {
130124 return switch (mcv) {
......@@ -149,8 +143,6 @@ const MCValue = union(enum) {
149143 .immediate,
150144 .embedded_in_code,
151145 .memory,
152 .compare_flags_unsigned,
153 .compare_flags_signed,
154146 .ptr_stack_offset,
155147 .ptr_embedded_in_code,
156148 .undef,
......@@ -844,45 +836,8 @@ fn airBoolToInt(self: *Self, inst: Air.Inst.Index) !void {
844836
845837fn airNot(self: *Self, inst: Air.Inst.Index) !void {
846838 const ty_op = self.air.instructions.items(.data)[inst].ty_op;
847 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
848 const operand = try self.resolveInst(ty_op.operand);
849 switch (operand) {
850 .dead => unreachable,
851 .unreach => unreachable,
852 .compare_flags_unsigned => |op| {
853 const r = MCValue{
854 .compare_flags_unsigned = switch (op) {
855 .gte => .lt,
856 .gt => .lte,
857 .neq => .eq,
858 .lt => .gte,
859 .lte => .gt,
860 .eq => .neq,
861 },
862 };
863 break :result r;
864 },
865 .compare_flags_signed => |op| {
866 const r = MCValue{
867 .compare_flags_signed = switch (op) {
868 .gte => .lt,
869 .gt => .lte,
870 .neq => .eq,
871 .lt => .gte,
872 .lte => .gt,
873 .eq => .neq,
874 },
875 };
876 break :result r;
877 },
878 else => {},
879 }
880
881 return self.fail("TODO implement NOT for {}", .{self.target.cpu.arch});
882 };
883
884 _ = result;
885 // return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
839 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement NOT for {}", .{self.target.cpu.arch});
840 return self.finishAir(inst, result, .{ ty_op.operand, .none, .none });
886841}
887842
888843fn airMin(self: *Self, inst: Air.Inst.Index) !void {
......@@ -1211,8 +1166,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
12111166 .undef => unreachable,
12121167 .unreach => unreachable,
12131168 .dead => unreachable,
1214 .compare_flags_unsigned => unreachable,
1215 .compare_flags_signed => unreachable,
12161169 .immediate => |imm| try self.setRegOrMem(elem_ty, dst_mcv, .{ .memory = imm }),
12171170 .ptr_stack_offset => |off| try self.setRegOrMem(elem_ty, dst_mcv, .{ .stack_offset = off }),
12181171 .ptr_embedded_in_code => |off| {
......@@ -1271,8 +1224,6 @@ fn airStore(self: *Self, inst: Air.Inst.Index) !void {
12711224 .undef => unreachable,
12721225 .unreach => unreachable,
12731226 .dead => unreachable,
1274 .compare_flags_unsigned => unreachable,
1275 .compare_flags_signed => unreachable,
12761227 .immediate => |imm| {
12771228 try self.setRegOrMem(elem_ty, .{ .memory = imm }, value);
12781229 },
......@@ -1427,8 +1378,6 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
14271378 .dead => unreachable,
14281379 .embedded_in_code => unreachable,
14291380 .memory => unreachable,
1430 .compare_flags_signed => unreachable,
1431 .compare_flags_unsigned => unreachable,
14321381 .register => |reg| {
14331382 try self.register_manager.getReg(reg, null);
14341383 try self.genSetReg(arg_ty, reg, arg_mcv);