diff --git a/lib/libc/include/aarch64-linux-any/asm/auxvec.h b/lib/libc/include/aarch64-linux-any/asm/auxvec.h new file mode 100644 index 0000000000000000000000000000000000000000..9a290cde8d34bcc2508e83735fe3d450c1164ebd --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/auxvec.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_AUXVEC_H +#define __ASM_AUXVEC_H + +/* vDSO location */ +#define AT_SYSINFO_EHDR 33 +#define AT_MINSIGSTKSZ 51 /* stack needed for signal delivery */ + +#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */ + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/bitsperlong.h b/lib/libc/include/aarch64-linux-any/asm/bitsperlong.h new file mode 100644 index 0000000000000000000000000000000000000000..0f94175240774f2fea25055c0595a50ae4dee399 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/bitsperlong.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_BITSPERLONG_H +#define __ASM_BITSPERLONG_H + +#define __BITS_PER_LONG 64 + +#include + +#endif /* __ASM_BITSPERLONG_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/bpf_perf_event.h b/lib/libc/include/aarch64-linux-any/asm/bpf_perf_event.h new file mode 100644 index 0000000000000000000000000000000000000000..2e8dc3b979e0ed8afcd612b845ae5b851ae969d0 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/bpf_perf_event.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef __ASM_BPF_PERF_EVENT_H__ +#define __ASM_BPF_PERF_EVENT_H__ + +#include + +typedef struct user_pt_regs bpf_user_pt_regs_t; + +#endif /* __ASM_BPF_PERF_EVENT_H__ */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/byteorder.h b/lib/libc/include/aarch64-linux-any/asm/byteorder.h new file mode 100644 index 0000000000000000000000000000000000000000..6acd73fbc51cf01adc5e39a7ab23fa3c4150f6af --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/byteorder.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_BYTEORDER_H +#define __ASM_BYTEORDER_H + +#ifdef __AARCH64EB__ +#include +#else +#include +#endif + +#endif /* __ASM_BYTEORDER_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/fcntl.h b/lib/libc/include/aarch64-linux-any/asm/fcntl.h new file mode 100644 index 0000000000000000000000000000000000000000..9473344a3f432ea322b626856fb63db875c7a487 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/fcntl.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_FCNTL_H +#define __ASM_FCNTL_H + +/* + * Using our own definitions for AArch32 (compat) support. + */ +#define O_DIRECTORY 040000 /* must be a directory */ +#define O_NOFOLLOW 0100000 /* don't follow links */ +#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ +#define O_LARGEFILE 0400000 + +#include + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/hwcap.h b/lib/libc/include/aarch64-linux-any/asm/hwcap.h new file mode 100644 index 0000000000000000000000000000000000000000..5004bd804b772e3f9ce61844d48376bc4a26426c --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/hwcap.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_HWCAP_H +#define __ASM_HWCAP_H + +/* + * HWCAP flags - for AT_HWCAP + */ +#define HWCAP_FP (1 << 0) +#define HWCAP_ASIMD (1 << 1) +#define HWCAP_EVTSTRM (1 << 2) +#define HWCAP_AES (1 << 3) +#define HWCAP_PMULL (1 << 4) +#define HWCAP_SHA1 (1 << 5) +#define HWCAP_SHA2 (1 << 6) +#define HWCAP_CRC32 (1 << 7) +#define HWCAP_ATOMICS (1 << 8) +#define HWCAP_FPHP (1 << 9) +#define HWCAP_ASIMDHP (1 << 10) +#define HWCAP_CPUID (1 << 11) +#define HWCAP_ASIMDRDM (1 << 12) +#define HWCAP_JSCVT (1 << 13) +#define HWCAP_FCMA (1 << 14) +#define HWCAP_LRCPC (1 << 15) +#define HWCAP_DCPOP (1 << 16) +#define HWCAP_SHA3 (1 << 17) +#define HWCAP_SM3 (1 << 18) +#define HWCAP_SM4 (1 << 19) +#define HWCAP_ASIMDDP (1 << 20) +#define HWCAP_SHA512 (1 << 21) +#define HWCAP_SVE (1 << 22) +#define HWCAP_ASIMDFHM (1 << 23) +#define HWCAP_DIT (1 << 24) +#define HWCAP_USCAT (1 << 25) +#define HWCAP_ILRCPC (1 << 26) +#define HWCAP_FLAGM (1 << 27) +#define HWCAP_SSBS (1 << 28) +#define HWCAP_SB (1 << 29) +#define HWCAP_PACA (1 << 30) +#define HWCAP_PACG (1UL << 31) + +/* + * HWCAP2 flags - for AT_HWCAP2 + */ +#define HWCAP2_DCPODP (1 << 0) +#define HWCAP2_SVE2 (1 << 1) +#define HWCAP2_SVEAES (1 << 2) +#define HWCAP2_SVEPMULL (1 << 3) +#define HWCAP2_SVEBITPERM (1 << 4) +#define HWCAP2_SVESHA3 (1 << 5) +#define HWCAP2_SVESM4 (1 << 6) +#define HWCAP2_FLAGM2 (1 << 7) +#define HWCAP2_FRINT (1 << 8) +#define HWCAP2_SVEI8MM (1 << 9) +#define HWCAP2_SVEF32MM (1 << 10) +#define HWCAP2_SVEF64MM (1 << 11) +#define HWCAP2_SVEBF16 (1 << 12) +#define HWCAP2_I8MM (1 << 13) +#define HWCAP2_BF16 (1 << 14) +#define HWCAP2_DGH (1 << 15) +#define HWCAP2_RNG (1 << 16) +#define HWCAP2_BTI (1 << 17) +#define HWCAP2_MTE (1 << 18) +#define HWCAP2_ECV (1 << 19) + +#endif /* __ASM_HWCAP_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/kvm.h b/lib/libc/include/aarch64-linux-any/asm/kvm.h new file mode 100644 index 0000000000000000000000000000000000000000..2eb52737720b4907d13d8ed7c70a67ae967a4fc0 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/kvm.h @@ -0,0 +1,416 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012,2013 - ARM Ltd + * Author: Marc Zyngier + * + * Derived from arch/arm/include/uapi/asm/kvm.h: + * Copyright (C) 2012 - Virtual Open Systems and Columbia University + * Author: Christoffer Dall + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __ARM_KVM_H__ +#define __ARM_KVM_H__ + +#define KVM_SPSR_EL1 0 +#define KVM_SPSR_SVC KVM_SPSR_EL1 +#define KVM_SPSR_ABT 1 +#define KVM_SPSR_UND 2 +#define KVM_SPSR_IRQ 3 +#define KVM_SPSR_FIQ 4 +#define KVM_NR_SPSR 5 + +#ifndef __ASSEMBLY__ +#include +#include +#include +#include + +#define __KVM_HAVE_GUEST_DEBUG +#define __KVM_HAVE_IRQ_LINE +#define __KVM_HAVE_READONLY_MEM +#define __KVM_HAVE_VCPU_EVENTS + +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 + +#define KVM_REG_SIZE(id) \ + (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) + +struct kvm_regs { + struct user_pt_regs regs; /* sp = sp_el0 */ + + __u64 sp_el1; + __u64 elr_el1; + + __u64 spsr[KVM_NR_SPSR]; + + struct user_fpsimd_state fp_regs; +}; + +/* + * Supported CPU Targets - Adding a new target type is not recommended, + * unless there are some special registers not supported by the + * genericv8 syreg table. + */ +#define KVM_ARM_TARGET_AEM_V8 0 +#define KVM_ARM_TARGET_FOUNDATION_V8 1 +#define KVM_ARM_TARGET_CORTEX_A57 2 +#define KVM_ARM_TARGET_XGENE_POTENZA 3 +#define KVM_ARM_TARGET_CORTEX_A53 4 +/* Generic ARM v8 target */ +#define KVM_ARM_TARGET_GENERIC_V8 5 + +#define KVM_ARM_NUM_TARGETS 6 + +/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ +#define KVM_ARM_DEVICE_TYPE_SHIFT 0 +#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) +#define KVM_ARM_DEVICE_ID_SHIFT 16 +#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) + +/* Supported device IDs */ +#define KVM_ARM_DEVICE_VGIC_V2 0 + +/* Supported VGIC address types */ +#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 +#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 + +#define KVM_VGIC_V2_DIST_SIZE 0x1000 +#define KVM_VGIC_V2_CPU_SIZE 0x2000 + +/* Supported VGICv3 address types */ +#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 +#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 +#define KVM_VGIC_ITS_ADDR_TYPE 4 +#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5 + +#define KVM_VGIC_V3_DIST_SIZE SZ_64K +#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) +#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) + +#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ +#define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ +#define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ +#define KVM_ARM_VCPU_PMU_V3 3 /* Support guest PMUv3 */ +#define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ +#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */ +#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */ + +struct kvm_vcpu_init { + __u32 target; + __u32 features[7]; +}; + +struct kvm_sregs { +}; + +struct kvm_fpu { +}; + +/* + * See v8 ARM ARM D7.3: Debug Registers + * + * The architectural limit is 16 debug registers of each type although + * in practice there are usually less (see ID_AA64DFR0_EL1). + * + * Although the control registers are architecturally defined as 32 + * bits wide we use a 64 bit structure here to keep parity with + * KVM_GET/SET_ONE_REG behaviour which treats all system registers as + * 64 bit values. It also allows for the possibility of the + * architecture expanding the control registers without having to + * change the userspace ABI. + */ +#define KVM_ARM_MAX_DBG_REGS 16 +struct kvm_guest_debug_arch { + __u64 dbg_bcr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_bvr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_wcr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS]; +}; + +struct kvm_debug_exit_arch { + __u32 hsr; + __u64 far; /* used for watchpoints */ +}; + +/* + * Architecture specific defines for kvm_guest_debug->control + */ + +#define KVM_GUESTDBG_USE_SW_BP (1 << 16) +#define KVM_GUESTDBG_USE_HW (1 << 17) + +struct kvm_sync_regs { + /* Used with KVM_CAP_ARM_USER_IRQ */ + __u64 device_irq_level; +}; + +/* + * PMU filter structure. Describe a range of events with a particular + * action. To be used with KVM_ARM_VCPU_PMU_V3_FILTER. + */ +struct kvm_pmu_event_filter { + __u16 base_event; + __u16 nevents; + +#define KVM_PMU_EVENT_ALLOW 0 +#define KVM_PMU_EVENT_DENY 1 + + __u8 action; + __u8 pad[3]; +}; + +/* for KVM_GET/SET_VCPU_EVENTS */ +struct kvm_vcpu_events { + struct { + __u8 serror_pending; + __u8 serror_has_esr; + __u8 ext_dabt_pending; + /* Align it to 8 bytes */ + __u8 pad[5]; + __u64 serror_esr; + } exception; + __u32 reserved[12]; +}; + +struct kvm_arm_copy_mte_tags { + __u64 guest_ipa; + __u64 length; + void *addr; + __u64 flags; + __u64 reserved[2]; +}; + +#define KVM_ARM_TAGS_TO_GUEST 0 +#define KVM_ARM_TAGS_FROM_GUEST 1 + +/* If you need to interpret the index values, here is the key: */ +#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 +#define KVM_REG_ARM_COPROC_SHIFT 16 + +/* Normal registers are mapped as coprocessor 16. */ +#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32)) + +/* Some registers need more space to represent values. */ +#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 +#define KVM_REG_ARM_DEMUX_ID_SHIFT 8 +#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) +#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF +#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 + +/* AArch64 system registers */ +#define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000 +#define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14 +#define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800 +#define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11 +#define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780 +#define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7 +#define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078 +#define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3 +#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007 +#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0 + +#define ARM64_SYS_REG_SHIFT_MASK(x,n) \ + (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \ + KVM_REG_ARM64_SYSREG_ ## n ## _MASK) + +#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ + (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | \ + ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \ + ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \ + ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \ + ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \ + ARM64_SYS_REG_SHIFT_MASK(op2, OP2)) + +#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64) + +/* Physical Timer EL0 Registers */ +#define KVM_REG_ARM_PTIMER_CTL ARM64_SYS_REG(3, 3, 14, 2, 1) +#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2) +#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1) + +/* + * EL0 Virtual Timer Registers + * + * WARNING: + * KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT are not defined + * with the appropriate register encodings. Their values have been + * accidentally swapped. As this is set API, the definitions here + * must be used, rather than ones derived from the encodings. + */ +#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1) +#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) +#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) + +/* KVM-as-firmware specific pseudo-registers */ +#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ + KVM_REG_ARM_FW | ((r) & 0xffff)) +#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2 + +/* + * Only two states can be presented by the host kernel: + * - NOT_REQUIRED: the guest doesn't need to do anything + * - NOT_AVAIL: the guest isn't mitigated (it can still use SSBS if available) + * + * All the other values are deprecated. The host still accepts all + * values (they are ABI), but will narrow them to the above two. + */ +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2) +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3 +#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4) + +/* SVE registers */ +#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT) + +/* Z- and P-regs occupy blocks at the following offsets within this range: */ +#define KVM_REG_ARM64_SVE_ZREG_BASE 0 +#define KVM_REG_ARM64_SVE_PREG_BASE 0x400 +#define KVM_REG_ARM64_SVE_FFR_BASE 0x600 + +#define KVM_ARM64_SVE_NUM_ZREGS __SVE_NUM_ZREGS +#define KVM_ARM64_SVE_NUM_PREGS __SVE_NUM_PREGS + +#define KVM_ARM64_SVE_MAX_SLICES 32 + +#define KVM_REG_ARM64_SVE_ZREG(n, i) \ + (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_ZREG_BASE | \ + KVM_REG_SIZE_U2048 | \ + (((n) & (KVM_ARM64_SVE_NUM_ZREGS - 1)) << 5) | \ + ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) + +#define KVM_REG_ARM64_SVE_PREG(n, i) \ + (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_PREG_BASE | \ + KVM_REG_SIZE_U256 | \ + (((n) & (KVM_ARM64_SVE_NUM_PREGS - 1)) << 5) | \ + ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) + +#define KVM_REG_ARM64_SVE_FFR(i) \ + (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_FFR_BASE | \ + KVM_REG_SIZE_U256 | \ + ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) + +/* + * Register values for KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() and + * KVM_REG_ARM64_SVE_FFR() are represented in memory in an endianness- + * invariant layout which differs from the layout used for the FPSIMD + * V-registers on big-endian systems: see sigcontext.h for more explanation. + */ + +#define KVM_ARM64_SVE_VQ_MIN __SVE_VQ_MIN +#define KVM_ARM64_SVE_VQ_MAX __SVE_VQ_MAX + +/* Vector lengths pseudo-register: */ +#define KVM_REG_ARM64_SVE_VLS (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | \ + KVM_REG_SIZE_U512 | 0xffff) +#define KVM_ARM64_SVE_VLS_WORDS \ + ((KVM_ARM64_SVE_VQ_MAX - KVM_ARM64_SVE_VQ_MIN) / 64 + 1) + +/* Device Control API: ARM VGIC */ +#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 +#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 +#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 +#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 +#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) +#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32 +#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \ + (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT) +#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 +#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) +#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) +#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 +#define KVM_DEV_ARM_VGIC_GRP_CTRL 4 +#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 +#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 +#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ + (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) +#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff +#define VGIC_LEVEL_INFO_LINE_LEVEL 0 + +#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_ITS_SAVE_TABLES 1 +#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 +#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 +#define KVM_DEV_ARM_ITS_CTRL_RESET 4 + +/* Device Control API on vcpu fd */ +#define KVM_ARM_VCPU_PMU_V3_CTRL 0 +#define KVM_ARM_VCPU_PMU_V3_IRQ 0 +#define KVM_ARM_VCPU_PMU_V3_INIT 1 +#define KVM_ARM_VCPU_PMU_V3_FILTER 2 +#define KVM_ARM_VCPU_TIMER_CTRL 1 +#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 +#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 +#define KVM_ARM_VCPU_PVTIME_CTRL 2 +#define KVM_ARM_VCPU_PVTIME_IPA 0 + +/* KVM_IRQ_LINE irq field index values */ +#define KVM_ARM_IRQ_VCPU2_SHIFT 28 +#define KVM_ARM_IRQ_VCPU2_MASK 0xf +#define KVM_ARM_IRQ_TYPE_SHIFT 24 +#define KVM_ARM_IRQ_TYPE_MASK 0xf +#define KVM_ARM_IRQ_VCPU_SHIFT 16 +#define KVM_ARM_IRQ_VCPU_MASK 0xff +#define KVM_ARM_IRQ_NUM_SHIFT 0 +#define KVM_ARM_IRQ_NUM_MASK 0xffff + +/* irq_type field */ +#define KVM_ARM_IRQ_TYPE_CPU 0 +#define KVM_ARM_IRQ_TYPE_SPI 1 +#define KVM_ARM_IRQ_TYPE_PPI 2 + +/* out-of-kernel GIC cpu interrupt injection irq_number field */ +#define KVM_ARM_IRQ_CPU_IRQ 0 +#define KVM_ARM_IRQ_CPU_FIQ 1 + +/* + * This used to hold the highest supported SPI, but it is now obsolete + * and only here to provide source code level compatibility with older + * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS. + */ +#define KVM_ARM_IRQ_GIC_MAX 127 + +/* One single KVM irqchip, ie. the VGIC */ +#define KVM_NR_IRQCHIPS 1 + +/* PSCI interface */ +#define KVM_PSCI_FN_BASE 0x95c1ba5e +#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) + +#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) +#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) +#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) +#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) + +#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS +#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED +#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS +#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED + +#endif + +#endif /* __ARM_KVM_H__ */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/mman.h b/lib/libc/include/aarch64-linux-any/asm/mman.h new file mode 100644 index 0000000000000000000000000000000000000000..74189614ee6486704b289e097698681fff563987 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/mman.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef __ASM_MMAN_H +#define __ASM_MMAN_H + +#include + +#define PROT_BTI 0x10 /* BTI guarded page */ +#define PROT_MTE 0x20 /* Normal Tagged mapping */ + +#endif /* ! _UAPI__ASM_MMAN_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/param.h b/lib/libc/include/aarch64-linux-any/asm/param.h new file mode 100644 index 0000000000000000000000000000000000000000..f58c021601fedff10bb342e7caa188111f328e43 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/param.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_PARAM_H +#define __ASM_PARAM_H + +#define EXEC_PAGESIZE 65536 + +#include + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/perf_regs.h b/lib/libc/include/aarch64-linux-any/asm/perf_regs.h new file mode 100644 index 0000000000000000000000000000000000000000..d63b945af5a0252dcacee51f670e543c25d178d3 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/perf_regs.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef _ASM_ARM64_PERF_REGS_H +#define _ASM_ARM64_PERF_REGS_H + +enum perf_event_arm_regs { + PERF_REG_ARM64_X0, + PERF_REG_ARM64_X1, + PERF_REG_ARM64_X2, + PERF_REG_ARM64_X3, + PERF_REG_ARM64_X4, + PERF_REG_ARM64_X5, + PERF_REG_ARM64_X6, + PERF_REG_ARM64_X7, + PERF_REG_ARM64_X8, + PERF_REG_ARM64_X9, + PERF_REG_ARM64_X10, + PERF_REG_ARM64_X11, + PERF_REG_ARM64_X12, + PERF_REG_ARM64_X13, + PERF_REG_ARM64_X14, + PERF_REG_ARM64_X15, + PERF_REG_ARM64_X16, + PERF_REG_ARM64_X17, + PERF_REG_ARM64_X18, + PERF_REG_ARM64_X19, + PERF_REG_ARM64_X20, + PERF_REG_ARM64_X21, + PERF_REG_ARM64_X22, + PERF_REG_ARM64_X23, + PERF_REG_ARM64_X24, + PERF_REG_ARM64_X25, + PERF_REG_ARM64_X26, + PERF_REG_ARM64_X27, + PERF_REG_ARM64_X28, + PERF_REG_ARM64_X29, + PERF_REG_ARM64_LR, + PERF_REG_ARM64_SP, + PERF_REG_ARM64_PC, + PERF_REG_ARM64_MAX, +}; +#endif /* _ASM_ARM64_PERF_REGS_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/posix_types.h b/lib/libc/include/aarch64-linux-any/asm/posix_types.h new file mode 100644 index 0000000000000000000000000000000000000000..b20f985d3a9fdbeb759ded61119791034ec75b48 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/posix_types.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef __ASM_POSIX_TYPES_H +#define __ASM_POSIX_TYPES_H + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +#define __kernel_old_uid_t __kernel_old_uid_t + +#include + +#endif /* __ASM_POSIX_TYPES_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/ptrace.h b/lib/libc/include/aarch64-linux-any/asm/ptrace.h new file mode 100644 index 0000000000000000000000000000000000000000..044023b65c78d3ba36306e21133d4e84d7b11427 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/ptrace.h @@ -0,0 +1,270 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Based on arch/arm/include/asm/ptrace.h + * + * Copyright (C) 1996-2003 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_PTRACE_H +#define __ASM_PTRACE_H + +#include + +#include +#include + + +/* + * PSR bits + */ +#define PSR_MODE_EL0t 0x00000000 +#define PSR_MODE_EL1t 0x00000004 +#define PSR_MODE_EL1h 0x00000005 +#define PSR_MODE_EL2t 0x00000008 +#define PSR_MODE_EL2h 0x00000009 +#define PSR_MODE_EL3t 0x0000000c +#define PSR_MODE_EL3h 0x0000000d +#define PSR_MODE_MASK 0x0000000f + +/* AArch32 CPSR bits */ +#define PSR_MODE32_BIT 0x00000010 + +/* AArch64 SPSR bits */ +#define PSR_F_BIT 0x00000040 +#define PSR_I_BIT 0x00000080 +#define PSR_A_BIT 0x00000100 +#define PSR_D_BIT 0x00000200 +#define PSR_BTYPE_MASK 0x00000c00 +#define PSR_SSBS_BIT 0x00001000 +#define PSR_PAN_BIT 0x00400000 +#define PSR_UAO_BIT 0x00800000 +#define PSR_DIT_BIT 0x01000000 +#define PSR_TCO_BIT 0x02000000 +#define PSR_V_BIT 0x10000000 +#define PSR_C_BIT 0x20000000 +#define PSR_Z_BIT 0x40000000 +#define PSR_N_BIT 0x80000000 + +#define PSR_BTYPE_SHIFT 10 + +/* + * Groups of PSR bits + */ +#define PSR_f 0xff000000 /* Flags */ +#define PSR_s 0x00ff0000 /* Status */ +#define PSR_x 0x0000ff00 /* Extension */ +#define PSR_c 0x000000ff /* Control */ + +/* Convenience names for the values of PSTATE.BTYPE */ +#define PSR_BTYPE_NONE (0b00 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_C (0b10 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT) + +/* syscall emulation path in ptrace */ +#define PTRACE_SYSEMU 31 +#define PTRACE_SYSEMU_SINGLESTEP 32 +/* MTE allocation tag access */ +#define PTRACE_PEEKMTETAGS 33 +#define PTRACE_POKEMTETAGS 34 + +#ifndef __ASSEMBLY__ + +/* + * User structures for general purpose, floating point and debug registers. + */ +struct user_pt_regs { + __u64 regs[31]; + __u64 sp; + __u64 pc; + __u64 pstate; +}; + +struct user_fpsimd_state { + __uint128_t vregs[32]; + __u32 fpsr; + __u32 fpcr; + __u32 __reserved[2]; +}; + +struct user_hwdebug_state { + __u32 dbg_info; + __u32 pad; + struct { + __u64 addr; + __u32 ctrl; + __u32 pad; + } dbg_regs[16]; +}; + +/* SVE/FP/SIMD state (NT_ARM_SVE) */ + +struct user_sve_header { + __u32 size; /* total meaningful regset content in bytes */ + __u32 max_size; /* maxmium possible size for this thread */ + __u16 vl; /* current vector length */ + __u16 max_vl; /* maximum possible vector length */ + __u16 flags; + __u16 __reserved; +}; + +/* Definitions for user_sve_header.flags: */ +#define SVE_PT_REGS_MASK (1 << 0) + +#define SVE_PT_REGS_FPSIMD 0 +#define SVE_PT_REGS_SVE SVE_PT_REGS_MASK + +/* + * Common SVE_PT_* flags: + * These must be kept in sync with prctl interface in + */ +#define SVE_PT_VL_INHERIT ((1 << 17) /* PR_SVE_VL_INHERIT */ >> 16) +#define SVE_PT_VL_ONEXEC ((1 << 18) /* PR_SVE_SET_VL_ONEXEC */ >> 16) + + +/* + * The remainder of the SVE state follows struct user_sve_header. The + * total size of the SVE state (including header) depends on the + * metadata in the header: SVE_PT_SIZE(vq, flags) gives the total size + * of the state in bytes, including the header. + * + * Refer to for details of how to pass the correct + * "vq" argument to these macros. + */ + +/* Offset from the start of struct user_sve_header to the register data */ +#define SVE_PT_REGS_OFFSET \ + ((sizeof(struct user_sve_header) + (__SVE_VQ_BYTES - 1)) \ + / __SVE_VQ_BYTES * __SVE_VQ_BYTES) + +/* + * The register data content and layout depends on the value of the + * flags field. + */ + +/* + * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case: + * + * The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type + * struct user_fpsimd_state. Additional data might be appended in the + * future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size. + * SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than + * sizeof(struct user_fpsimd_state). + */ + +#define SVE_PT_FPSIMD_OFFSET SVE_PT_REGS_OFFSET + +#define SVE_PT_FPSIMD_SIZE(vq, flags) (sizeof(struct user_fpsimd_state)) + +/* + * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case: + * + * The payload starts at offset SVE_PT_SVE_OFFSET, and is of size + * SVE_PT_SVE_SIZE(vq, flags). + * + * Additional macros describe the contents and layout of the payload. + * For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to + * the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is + * the size in bytes: + * + * x type description + * - ---- ----------- + * ZREGS \ + * ZREG | + * PREGS | refer to + * PREG | + * FFR / + * + * FPSR uint32_t FPSR + * FPCR uint32_t FPCR + * + * Additional data might be appended in the future. + * + * The Z-, P- and FFR registers are represented in memory in an endianness- + * invariant layout which differs from the layout used for the FPSIMD + * V-registers on big-endian systems: see sigcontext.h for more explanation. + */ + +#define SVE_PT_SVE_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) +#define SVE_PT_SVE_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) +#define SVE_PT_SVE_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) +#define SVE_PT_SVE_FPSR_SIZE sizeof(__u32) +#define SVE_PT_SVE_FPCR_SIZE sizeof(__u32) + +#define SVE_PT_SVE_OFFSET SVE_PT_REGS_OFFSET + +#define SVE_PT_SVE_ZREGS_OFFSET \ + (SVE_PT_REGS_OFFSET + __SVE_ZREGS_OFFSET) +#define SVE_PT_SVE_ZREG_OFFSET(vq, n) \ + (SVE_PT_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) +#define SVE_PT_SVE_ZREGS_SIZE(vq) \ + (SVE_PT_SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET) + +#define SVE_PT_SVE_PREGS_OFFSET(vq) \ + (SVE_PT_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) +#define SVE_PT_SVE_PREG_OFFSET(vq, n) \ + (SVE_PT_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) +#define SVE_PT_SVE_PREGS_SIZE(vq) \ + (SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \ + SVE_PT_SVE_PREGS_OFFSET(vq)) + +#define SVE_PT_SVE_FFR_OFFSET(vq) \ + (SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) + +#define SVE_PT_SVE_FPSR_OFFSET(vq) \ + ((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \ + (__SVE_VQ_BYTES - 1)) \ + / __SVE_VQ_BYTES * __SVE_VQ_BYTES) +#define SVE_PT_SVE_FPCR_OFFSET(vq) \ + (SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE) + +/* + * Any future extension appended after FPCR must be aligned to the next + * 128-bit boundary. + */ + +#define SVE_PT_SVE_SIZE(vq, flags) \ + ((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE \ + - SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1)) \ + / __SVE_VQ_BYTES * __SVE_VQ_BYTES) + +#define SVE_PT_SIZE(vq, flags) \ + (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \ + SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags) \ + : SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags)) + +/* pointer authentication masks (NT_ARM_PAC_MASK) */ + +struct user_pac_mask { + __u64 data_mask; + __u64 insn_mask; +}; + +/* pointer authentication keys (NT_ARM_PACA_KEYS, NT_ARM_PACG_KEYS) */ + +struct user_pac_address_keys { + __uint128_t apiakey; + __uint128_t apibkey; + __uint128_t apdakey; + __uint128_t apdbkey; +}; + +struct user_pac_generic_keys { + __uint128_t apgakey; +}; + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_PTRACE_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/setup.h b/lib/libc/include/aarch64-linux-any/asm/setup.h new file mode 100644 index 0000000000000000000000000000000000000000..32e442aba7cfe229940f334797836c878fd2272b --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/setup.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Based on arch/arm/include/asm/setup.h + * + * Copyright (C) 1997-1999 Russell King + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_SETUP_H +#define __ASM_SETUP_H + +#include + +#define COMMAND_LINE_SIZE 2048 + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/sigcontext.h b/lib/libc/include/aarch64-linux-any/asm/sigcontext.h new file mode 100644 index 0000000000000000000000000000000000000000..c1f9d506ac2b443594349c22912c3d3359c637eb --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/sigcontext.h @@ -0,0 +1,252 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_SIGCONTEXT_H +#define __ASM_SIGCONTEXT_H + +#ifndef __ASSEMBLY__ + +#include + +/* + * Signal context structure - contains all info to do with the state + * before the signal handler was invoked. + */ +struct sigcontext { + __u64 fault_address; + /* AArch64 registers */ + __u64 regs[31]; + __u64 sp; + __u64 pc; + __u64 pstate; + /* 4K reserved for FP/SIMD state and future expansion */ + __u8 __reserved[4096] __attribute__((__aligned__(16))); +}; + +/* + * Allocation of __reserved[]: + * (Note: records do not necessarily occur in the order shown here.) + * + * size description + * + * 0x210 fpsimd_context + * 0x10 esr_context + * 0x8a0 sve_context (vl <= 64) (optional) + * 0x20 extra_context (optional) + * 0x10 terminator (null _aarch64_ctx) + * + * 0x510 (reserved for future allocation) + * + * New records that can exceed this space need to be opt-in for userspace, so + * that an expanded signal frame is not generated unexpectedly. The mechanism + * for opting in will depend on the extension that generates each new record. + * The above table documents the maximum set and sizes of records than can be + * generated when userspace does not opt in for any such extension. + */ + +/* + * Header to be used at the beginning of structures extending the user + * context. Such structures must be placed after the rt_sigframe on the stack + * and be 16-byte aligned. The last structure must be a dummy one with the + * magic and size set to 0. + */ +struct _aarch64_ctx { + __u32 magic; + __u32 size; +}; + +#define FPSIMD_MAGIC 0x46508001 + +struct fpsimd_context { + struct _aarch64_ctx head; + __u32 fpsr; + __u32 fpcr; + __uint128_t vregs[32]; +}; + +/* + * Note: similarly to all other integer fields, each V-register is stored in an + * endianness-dependent format, with the byte at offset i from the start of the + * in-memory representation of the register value containing + * + * bits [(7 + 8 * i) : (8 * i)] of the register on little-endian hosts; or + * bits [(127 - 8 * i) : (120 - 8 * i)] on big-endian hosts. + */ + +/* ESR_EL1 context */ +#define ESR_MAGIC 0x45535201 + +struct esr_context { + struct _aarch64_ctx head; + __u64 esr; +}; + +/* + * extra_context: describes extra space in the signal frame for + * additional structures that don't fit in sigcontext.__reserved[]. + * + * Note: + * + * 1) fpsimd_context, esr_context and extra_context must be placed in + * sigcontext.__reserved[] if present. They cannot be placed in the + * extra space. Any other record can be placed either in the extra + * space or in sigcontext.__reserved[], unless otherwise specified in + * this file. + * + * 2) There must not be more than one extra_context. + * + * 3) If extra_context is present, it must be followed immediately in + * sigcontext.__reserved[] by the terminating null _aarch64_ctx. + * + * 4) The extra space to which datap points must start at the first + * 16-byte aligned address immediately after the terminating null + * _aarch64_ctx that follows the extra_context structure in + * __reserved[]. The extra space may overrun the end of __reserved[], + * as indicated by a sufficiently large value for the size field. + * + * 5) The extra space must itself be terminated with a null + * _aarch64_ctx. + */ +#define EXTRA_MAGIC 0x45585401 + +struct extra_context { + struct _aarch64_ctx head; + __u64 datap; /* 16-byte aligned pointer to extra space cast to __u64 */ + __u32 size; /* size in bytes of the extra space */ + __u32 __reserved[3]; +}; + +#define SVE_MAGIC 0x53564501 + +struct sve_context { + struct _aarch64_ctx head; + __u16 vl; + __u16 __reserved[3]; +}; + +#endif /* !__ASSEMBLY__ */ + +#include + +/* + * The SVE architecture leaves space for future expansion of the + * vector length beyond its initial architectural limit of 2048 bits + * (16 quadwords). + * + * See linux/Documentation/arm64/sve.rst for a description of the VL/VQ + * terminology. + */ +#define SVE_VQ_BYTES __SVE_VQ_BYTES /* bytes per quadword */ + +#define SVE_VQ_MIN __SVE_VQ_MIN +#define SVE_VQ_MAX __SVE_VQ_MAX + +#define SVE_VL_MIN __SVE_VL_MIN +#define SVE_VL_MAX __SVE_VL_MAX + +#define SVE_NUM_ZREGS __SVE_NUM_ZREGS +#define SVE_NUM_PREGS __SVE_NUM_PREGS + +#define sve_vl_valid(vl) __sve_vl_valid(vl) +#define sve_vq_from_vl(vl) __sve_vq_from_vl(vl) +#define sve_vl_from_vq(vq) __sve_vl_from_vq(vq) + +/* + * If the SVE registers are currently live for the thread at signal delivery, + * sve_context.head.size >= + * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)) + * and the register data may be accessed using the SVE_SIG_*() macros. + * + * If sve_context.head.size < + * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)), + * the SVE registers were not live for the thread and no register data + * is included: in this case, the SVE_SIG_*() macros should not be + * used except for this check. + * + * The same convention applies when returning from a signal: a caller + * will need to remove or resize the sve_context block if it wants to + * make the SVE registers live when they were previously non-live or + * vice-versa. This may require the caller to allocate fresh + * memory and/or move other context blocks in the signal frame. + * + * Changing the vector length during signal return is not permitted: + * sve_context.vl must equal the thread's current vector length when + * doing a sigreturn. + * + * + * Note: for all these macros, the "vq" argument denotes the SVE + * vector length in quadwords (i.e., units of 128 bits). + * + * The correct way to obtain vq is to use sve_vq_from_vl(vl). The + * result is valid if and only if sve_vl_valid(vl) is true. This is + * guaranteed for a struct sve_context written by the kernel. + * + * + * Additional macros describe the contents and layout of the payload. + * For each, SVE_SIG_x_OFFSET(args) is the start offset relative to + * the start of struct sve_context, and SVE_SIG_x_SIZE(args) is the + * size in bytes: + * + * x type description + * - ---- ----------- + * REGS the entire SVE context + * + * ZREGS __uint128_t[SVE_NUM_ZREGS][vq] all Z-registers + * ZREG __uint128_t[vq] individual Z-register Zn + * + * PREGS uint16_t[SVE_NUM_PREGS][vq] all P-registers + * PREG uint16_t[vq] individual P-register Pn + * + * FFR uint16_t[vq] first-fault status register + * + * Additional data might be appended in the future. + * + * Unlike vregs[] in fpsimd_context, each SVE scalable register (Z-, P- or FFR) + * is encoded in memory in an endianness-invariant format, with the byte at + * offset i from the start of the in-memory representation containing bits + * [(7 + 8 * i) : (8 * i)] of the register value. + */ + +#define SVE_SIG_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) +#define SVE_SIG_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) +#define SVE_SIG_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) + +#define SVE_SIG_REGS_OFFSET \ + ((sizeof(struct sve_context) + (__SVE_VQ_BYTES - 1)) \ + / __SVE_VQ_BYTES * __SVE_VQ_BYTES) + +#define SVE_SIG_ZREGS_OFFSET \ + (SVE_SIG_REGS_OFFSET + __SVE_ZREGS_OFFSET) +#define SVE_SIG_ZREG_OFFSET(vq, n) \ + (SVE_SIG_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) +#define SVE_SIG_ZREGS_SIZE(vq) __SVE_ZREGS_SIZE(vq) + +#define SVE_SIG_PREGS_OFFSET(vq) \ + (SVE_SIG_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) +#define SVE_SIG_PREG_OFFSET(vq, n) \ + (SVE_SIG_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) +#define SVE_SIG_PREGS_SIZE(vq) __SVE_PREGS_SIZE(vq) + +#define SVE_SIG_FFR_OFFSET(vq) \ + (SVE_SIG_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) + +#define SVE_SIG_REGS_SIZE(vq) \ + (__SVE_FFR_OFFSET(vq) + __SVE_FFR_SIZE(vq)) + +#define SVE_SIG_CONTEXT_SIZE(vq) \ + (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq)) + +#endif /* __ASM_SIGCONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/signal.h b/lib/libc/include/aarch64-linux-any/asm/signal.h new file mode 100644 index 0000000000000000000000000000000000000000..167802d3a21a27f1da82fa64364d21d5bb4786aa --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/signal.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_SIGNAL_H +#define __ASM_SIGNAL_H + +/* Required for AArch32 compatibility. */ +#define SA_RESTORER 0x04000000 + +#define MINSIGSTKSZ 5120 +#define SIGSTKSZ 16384 + +#include + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/statfs.h b/lib/libc/include/aarch64-linux-any/asm/statfs.h new file mode 100644 index 0000000000000000000000000000000000000000..dfa2faa7db74670c39807c261970ff83aae76436 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/statfs.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_STATFS_H +#define __ASM_STATFS_H + +#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4))) + +#include + +#endif \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/sve_context.h b/lib/libc/include/aarch64-linux-any/asm/sve_context.h new file mode 100644 index 0000000000000000000000000000000000000000..3dace56616c4b2af506b55516a311b9a4e7a87f6 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/sve_context.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* Copyright (C) 2017-2018 ARM Limited */ + +/* + * For use by other UAPI headers only. + * Do not make direct use of header or its definitions. + */ + +#ifndef __ASM_SVE_CONTEXT_H +#define __ASM_SVE_CONTEXT_H + +#include + +#define __SVE_VQ_BYTES 16 /* number of bytes per quadword */ + +#define __SVE_VQ_MIN 1 +#define __SVE_VQ_MAX 512 + +#define __SVE_VL_MIN (__SVE_VQ_MIN * __SVE_VQ_BYTES) +#define __SVE_VL_MAX (__SVE_VQ_MAX * __SVE_VQ_BYTES) + +#define __SVE_NUM_ZREGS 32 +#define __SVE_NUM_PREGS 16 + +#define __sve_vl_valid(vl) \ + ((vl) % __SVE_VQ_BYTES == 0 && \ + (vl) >= __SVE_VL_MIN && \ + (vl) <= __SVE_VL_MAX) + +#define __sve_vq_from_vl(vl) ((vl) / __SVE_VQ_BYTES) +#define __sve_vl_from_vq(vq) ((vq) * __SVE_VQ_BYTES) + +#define __SVE_ZREG_SIZE(vq) ((__u32)(vq) * __SVE_VQ_BYTES) +#define __SVE_PREG_SIZE(vq) ((__u32)(vq) * (__SVE_VQ_BYTES / 8)) +#define __SVE_FFR_SIZE(vq) __SVE_PREG_SIZE(vq) + +#define __SVE_ZREGS_OFFSET 0 +#define __SVE_ZREG_OFFSET(vq, n) \ + (__SVE_ZREGS_OFFSET + __SVE_ZREG_SIZE(vq) * (n)) +#define __SVE_ZREGS_SIZE(vq) \ + (__SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - __SVE_ZREGS_OFFSET) + +#define __SVE_PREGS_OFFSET(vq) \ + (__SVE_ZREGS_OFFSET + __SVE_ZREGS_SIZE(vq)) +#define __SVE_PREG_OFFSET(vq, n) \ + (__SVE_PREGS_OFFSET(vq) + __SVE_PREG_SIZE(vq) * (n)) +#define __SVE_PREGS_SIZE(vq) \ + (__SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - __SVE_PREGS_OFFSET(vq)) + +#define __SVE_FFR_OFFSET(vq) \ + (__SVE_PREGS_OFFSET(vq) + __SVE_PREGS_SIZE(vq)) + +#endif /* ! _UAPI__ASM_SVE_CONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/ucontext.h b/lib/libc/include/aarch64-linux-any/asm/ucontext.h new file mode 100644 index 0000000000000000000000000000000000000000..87f00793b319167c3d67192961f02caaee33e7d5 --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/ucontext.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#ifndef __ASM_UCONTEXT_H +#define __ASM_UCONTEXT_H + +#include + +struct ucontext { + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + sigset_t uc_sigmask; + /* glibc uses a 1024-bit sigset_t */ + __u8 __unused[1024 / 8 - sizeof(sigset_t)]; + /* last for future expansion */ + struct sigcontext uc_mcontext; +}; + +#endif /* __ASM_UCONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/aarch64-linux-any/asm/unistd.h b/lib/libc/include/aarch64-linux-any/asm/unistd.h new file mode 100644 index 0000000000000000000000000000000000000000..5280df683e5668ed2945fc82b057169c730c8c7d --- /dev/null +++ b/lib/libc/include/aarch64-linux-any/asm/unistd.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (C) 2012 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#define __ARCH_WANT_RENAMEAT +#define __ARCH_WANT_NEW_STAT +#define __ARCH_WANT_SET_GET_RLIMIT +#define __ARCH_WANT_TIME32_SYSCALLS +#define __ARCH_WANT_SYS_CLONE3 +#define __ARCH_WANT_MEMFD_SECRET + +#include \ No newline at end of file diff --git a/lib/libc/include/any-linux-any/asm-generic/poll.h b/lib/libc/include/any-linux-any/asm-generic/poll.h index 5a056d94fb3cf1f236582f46f84cf3f343d108ad..e46fb2b83e862a3b385f95513718320f60fbb318 100644 --- a/lib/libc/include/any-linux-any/asm-generic/poll.h +++ b/lib/libc/include/any-linux-any/asm-generic/poll.h @@ -29,7 +29,7 @@ #define POLLRDHUP 0x2000 #endif -#define POLLFREE (__poll_t)0x4000 /* currently only for epoll */ +#define POLLFREE (__poll_t)0x4000 #define POLL_BUSY_LOOP (__poll_t)0x8000 diff --git a/lib/libc/include/any-linux-any/drm/virtgpu_drm.h b/lib/libc/include/any-linux-any/drm/virtgpu_drm.h index dbfc2d8e8f71340d67327c18235c2617c56b9334..3e6c78ce82e8c1bda23ed97b663264fdd23e64ab 100644 --- a/lib/libc/include/any-linux-any/drm/virtgpu_drm.h +++ b/lib/libc/include/any-linux-any/drm/virtgpu_drm.h @@ -196,6 +196,13 @@ struct drm_virtgpu_context_init { __u64 ctx_set_params; }; +/* + * Event code that's given when VIRTGPU_CONTEXT_PARAM_POLL_RINGS_MASK is in + * effect. The event size is sizeof(drm_event), since there is no additional + * payload. + */ +#define VIRTGPU_EVENT_FENCE_SIGNALED 0x90000000 + #define DRM_IOCTL_VIRTGPU_MAP \ DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map) diff --git a/lib/libc/include/any-linux-any/linux/byteorder/big_endian.h b/lib/libc/include/any-linux-any/linux/byteorder/big_endian.h index 5a2871c6496eb9bb4a4fba8af9d78bdd17b0494a..66d4f0c34467a747c1a24f67aaf60a27257779f9 100644 --- a/lib/libc/include/any-linux-any/linux/byteorder/big_endian.h +++ b/lib/libc/include/any-linux-any/linux/byteorder/big_endian.h @@ -9,6 +9,7 @@ #define __BIG_ENDIAN_BITFIELD #endif +#include #include #include diff --git a/lib/libc/include/any-linux-any/linux/byteorder/little_endian.h b/lib/libc/include/any-linux-any/linux/byteorder/little_endian.h index 981bfec68129c43bf052e18f07d6ceb55b262bb8..5959febbc56a37049fb7058dee1f459ba1a14501 100644 --- a/lib/libc/include/any-linux-any/linux/byteorder/little_endian.h +++ b/lib/libc/include/any-linux-any/linux/byteorder/little_endian.h @@ -9,6 +9,7 @@ #define __LITTLE_ENDIAN_BITFIELD #endif +#include #include #include diff --git a/lib/libc/include/any-linux-any/linux/if_ether.h b/lib/libc/include/any-linux-any/linux/if_ether.h index d7069f0e5e89c7dc2f0dae140247dd8c2b2af30e..53b8462712a1a30518769647cd5fdc479a33bb3f 100644 --- a/lib/libc/include/any-linux-any/linux/if_ether.h +++ b/lib/libc/include/any-linux-any/linux/if_ether.h @@ -117,7 +117,7 @@ #define ETH_P_IFE 0xED3E /* ForCES inter-FE LFB type */ #define ETH_P_AF_IUCV 0xFBFB /* IBM af_iucv [ NOT AN OFFICIALLY REGISTERED ID ] */ -#define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is less than this value +#define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is more than this value * then the frame is Ethernet II. Else it is 802.3 */ /* diff --git a/lib/libc/include/any-linux-any/linux/mptcp.h b/lib/libc/include/any-linux-any/linux/mptcp.h index d58014aa18856b970de8d13bbae8bed51e6162ef..d146c9a3e989683792da233b6c94cbc3fb463978 100644 --- a/lib/libc/include/any-linux-any/linux/mptcp.h +++ b/lib/libc/include/any-linux-any/linux/mptcp.h @@ -134,19 +134,21 @@ struct mptcp_info { * MPTCP_EVENT_REMOVED: token, rem_id * An address has been lost by the peer. * - * MPTCP_EVENT_SUB_ESTABLISHED: token, family, saddr4 | saddr6, - * daddr4 | daddr6, sport, dport, backup, - * if_idx [, error] + * MPTCP_EVENT_SUB_ESTABLISHED: token, family, loc_id, rem_id, + * saddr4 | saddr6, daddr4 | daddr6, sport, + * dport, backup, if_idx [, error] * A new subflow has been established. 'error' should not be set. * - * MPTCP_EVENT_SUB_CLOSED: token, family, saddr4 | saddr6, daddr4 | daddr6, - * sport, dport, backup, if_idx [, error] + * MPTCP_EVENT_SUB_CLOSED: token, family, loc_id, rem_id, saddr4 | saddr6, + * daddr4 | daddr6, sport, dport, backup, if_idx + * [, error] * A subflow has been closed. An error (copy of sk_err) could be set if an * error has been detected for this subflow. * - * MPTCP_EVENT_SUB_PRIORITY: token, family, saddr4 | saddr6, daddr4 | daddr6, - * sport, dport, backup, if_idx [, error] - * The priority of a subflow has changed. 'error' should not be set. + * MPTCP_EVENT_SUB_PRIORITY: token, family, loc_id, rem_id, saddr4 | saddr6, + * daddr4 | daddr6, sport, dport, backup, if_idx + * [, error] + * The priority of a subflow has changed. 'error' should not be set. */ enum mptcp_event_type { MPTCP_EVENT_UNSPEC = 0, diff --git a/lib/libc/include/any-linux-any/linux/nfc.h b/lib/libc/include/any-linux-any/linux/nfc.h index 2ed487942c09b82d05f78feb0fe31e1243dc9eb2..15dee8a25a47120721bcce6f8faf9b8479af9a1b 100644 --- a/lib/libc/include/any-linux-any/linux/nfc.h +++ b/lib/libc/include/any-linux-any/linux/nfc.h @@ -263,7 +263,7 @@ enum nfc_sdp_attr { #define NFC_SE_ENABLED 0x1 struct sockaddr_nfc { - sa_family_t sa_family; + __kernel_sa_family_t sa_family; __u32 dev_idx; __u32 target_idx; __u32 nfc_protocol; @@ -271,14 +271,14 @@ struct sockaddr_nfc { #define NFC_LLCP_MAX_SERVICE_NAME 63 struct sockaddr_nfc_llcp { - sa_family_t sa_family; + __kernel_sa_family_t sa_family; __u32 dev_idx; __u32 target_idx; __u32 nfc_protocol; __u8 dsap; /* Destination SAP, if known */ __u8 ssap; /* Source SAP to be bound to */ char service_name[NFC_LLCP_MAX_SERVICE_NAME]; /* Service name URI */; - size_t service_name_len; + __kernel_size_t service_name_len; }; /* NFC socket protocols */ diff --git a/lib/libc/include/any-linux-any/linux/resource.h b/lib/libc/include/any-linux-any/linux/resource.h index fa597fbb259a1c42b7770936036634d7d65b2161..99d1815c09e0b1483dfc561d95f4ad19bf3b344a 100644 --- a/lib/libc/include/any-linux-any/linux/resource.h +++ b/lib/libc/include/any-linux-any/linux/resource.h @@ -66,10 +66,17 @@ struct rlimit64 { #define _STK_LIM (8*1024*1024) /* - * GPG2 wants 64kB of mlocked memory, to make sure pass phrases - * and other sensitive information are never written to disk. + * Limit the amount of locked memory by some sane default: + * root can always increase this limit if needed. + * + * The main use-cases are (1) preventing sensitive memory + * from being swapped; (2) real-time operations; (3) via + * IOURING_REGISTER_BUFFERS. + * + * The first two don't need much. The latter will take as + * much as it can get. 8MB is a reasonably sane default. */ -#define MLOCK_LIMIT ((PAGE_SIZE > 64*1024) ? PAGE_SIZE : 64*1024) +#define MLOCK_LIMIT (8*1024*1024) /* * Due to binary compatibility, the actual resource numbers diff --git a/lib/libc/include/any-linux-any/linux/version.h b/lib/libc/include/any-linux-any/linux/version.h index 43e0b8295b8ce70977ac57b9b6a477b85dd5d818..118d1d84fcb4a0c2dbd9ec71f2d3c62d37b898d8 100644 --- a/lib/libc/include/any-linux-any/linux/version.h +++ b/lib/libc/include/any-linux-any/linux/version.h @@ -1,5 +1,5 @@ -#define LINUX_VERSION_CODE 331776 +#define LINUX_VERSION_CODE 331778 #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c))) #define LINUX_VERSION_MAJOR 5 #define LINUX_VERSION_PATCHLEVEL 16 -#define LINUX_VERSION_SUBLEVEL 0 \ No newline at end of file +#define LINUX_VERSION_SUBLEVEL 2 \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/auxvec.h b/lib/libc/include/arm64-linux-any/asm/auxvec.h deleted file mode 100644 index 9a290cde8d34bcc2508e83735fe3d450c1164ebd..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/auxvec.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_AUXVEC_H -#define __ASM_AUXVEC_H - -/* vDSO location */ -#define AT_SYSINFO_EHDR 33 -#define AT_MINSIGSTKSZ 51 /* stack needed for signal delivery */ - -#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */ - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/bitsperlong.h b/lib/libc/include/arm64-linux-any/asm/bitsperlong.h deleted file mode 100644 index 0f94175240774f2fea25055c0595a50ae4dee399..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/bitsperlong.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_BITSPERLONG_H -#define __ASM_BITSPERLONG_H - -#define __BITS_PER_LONG 64 - -#include - -#endif /* __ASM_BITSPERLONG_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/bpf_perf_event.h b/lib/libc/include/arm64-linux-any/asm/bpf_perf_event.h deleted file mode 100644 index 2e8dc3b979e0ed8afcd612b845ae5b851ae969d0..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/bpf_perf_event.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#ifndef __ASM_BPF_PERF_EVENT_H__ -#define __ASM_BPF_PERF_EVENT_H__ - -#include - -typedef struct user_pt_regs bpf_user_pt_regs_t; - -#endif /* __ASM_BPF_PERF_EVENT_H__ */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/byteorder.h b/lib/libc/include/arm64-linux-any/asm/byteorder.h deleted file mode 100644 index 6acd73fbc51cf01adc5e39a7ab23fa3c4150f6af..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/byteorder.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_BYTEORDER_H -#define __ASM_BYTEORDER_H - -#ifdef __AARCH64EB__ -#include -#else -#include -#endif - -#endif /* __ASM_BYTEORDER_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/fcntl.h b/lib/libc/include/arm64-linux-any/asm/fcntl.h deleted file mode 100644 index 9473344a3f432ea322b626856fb63db875c7a487..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/fcntl.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_FCNTL_H -#define __ASM_FCNTL_H - -/* - * Using our own definitions for AArch32 (compat) support. - */ -#define O_DIRECTORY 040000 /* must be a directory */ -#define O_NOFOLLOW 0100000 /* don't follow links */ -#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ -#define O_LARGEFILE 0400000 - -#include - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/hwcap.h b/lib/libc/include/arm64-linux-any/asm/hwcap.h deleted file mode 100644 index 5004bd804b772e3f9ce61844d48376bc4a26426c..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/hwcap.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_HWCAP_H -#define __ASM_HWCAP_H - -/* - * HWCAP flags - for AT_HWCAP - */ -#define HWCAP_FP (1 << 0) -#define HWCAP_ASIMD (1 << 1) -#define HWCAP_EVTSTRM (1 << 2) -#define HWCAP_AES (1 << 3) -#define HWCAP_PMULL (1 << 4) -#define HWCAP_SHA1 (1 << 5) -#define HWCAP_SHA2 (1 << 6) -#define HWCAP_CRC32 (1 << 7) -#define HWCAP_ATOMICS (1 << 8) -#define HWCAP_FPHP (1 << 9) -#define HWCAP_ASIMDHP (1 << 10) -#define HWCAP_CPUID (1 << 11) -#define HWCAP_ASIMDRDM (1 << 12) -#define HWCAP_JSCVT (1 << 13) -#define HWCAP_FCMA (1 << 14) -#define HWCAP_LRCPC (1 << 15) -#define HWCAP_DCPOP (1 << 16) -#define HWCAP_SHA3 (1 << 17) -#define HWCAP_SM3 (1 << 18) -#define HWCAP_SM4 (1 << 19) -#define HWCAP_ASIMDDP (1 << 20) -#define HWCAP_SHA512 (1 << 21) -#define HWCAP_SVE (1 << 22) -#define HWCAP_ASIMDFHM (1 << 23) -#define HWCAP_DIT (1 << 24) -#define HWCAP_USCAT (1 << 25) -#define HWCAP_ILRCPC (1 << 26) -#define HWCAP_FLAGM (1 << 27) -#define HWCAP_SSBS (1 << 28) -#define HWCAP_SB (1 << 29) -#define HWCAP_PACA (1 << 30) -#define HWCAP_PACG (1UL << 31) - -/* - * HWCAP2 flags - for AT_HWCAP2 - */ -#define HWCAP2_DCPODP (1 << 0) -#define HWCAP2_SVE2 (1 << 1) -#define HWCAP2_SVEAES (1 << 2) -#define HWCAP2_SVEPMULL (1 << 3) -#define HWCAP2_SVEBITPERM (1 << 4) -#define HWCAP2_SVESHA3 (1 << 5) -#define HWCAP2_SVESM4 (1 << 6) -#define HWCAP2_FLAGM2 (1 << 7) -#define HWCAP2_FRINT (1 << 8) -#define HWCAP2_SVEI8MM (1 << 9) -#define HWCAP2_SVEF32MM (1 << 10) -#define HWCAP2_SVEF64MM (1 << 11) -#define HWCAP2_SVEBF16 (1 << 12) -#define HWCAP2_I8MM (1 << 13) -#define HWCAP2_BF16 (1 << 14) -#define HWCAP2_DGH (1 << 15) -#define HWCAP2_RNG (1 << 16) -#define HWCAP2_BTI (1 << 17) -#define HWCAP2_MTE (1 << 18) -#define HWCAP2_ECV (1 << 19) - -#endif /* __ASM_HWCAP_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/kvm.h b/lib/libc/include/arm64-linux-any/asm/kvm.h deleted file mode 100644 index 2eb52737720b4907d13d8ed7c70a67ae967a4fc0..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/kvm.h +++ /dev/null @@ -1,416 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012,2013 - ARM Ltd - * Author: Marc Zyngier - * - * Derived from arch/arm/include/uapi/asm/kvm.h: - * Copyright (C) 2012 - Virtual Open Systems and Columbia University - * Author: Christoffer Dall - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef __ARM_KVM_H__ -#define __ARM_KVM_H__ - -#define KVM_SPSR_EL1 0 -#define KVM_SPSR_SVC KVM_SPSR_EL1 -#define KVM_SPSR_ABT 1 -#define KVM_SPSR_UND 2 -#define KVM_SPSR_IRQ 3 -#define KVM_SPSR_FIQ 4 -#define KVM_NR_SPSR 5 - -#ifndef __ASSEMBLY__ -#include -#include -#include -#include - -#define __KVM_HAVE_GUEST_DEBUG -#define __KVM_HAVE_IRQ_LINE -#define __KVM_HAVE_READONLY_MEM -#define __KVM_HAVE_VCPU_EVENTS - -#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 - -#define KVM_REG_SIZE(id) \ - (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) - -struct kvm_regs { - struct user_pt_regs regs; /* sp = sp_el0 */ - - __u64 sp_el1; - __u64 elr_el1; - - __u64 spsr[KVM_NR_SPSR]; - - struct user_fpsimd_state fp_regs; -}; - -/* - * Supported CPU Targets - Adding a new target type is not recommended, - * unless there are some special registers not supported by the - * genericv8 syreg table. - */ -#define KVM_ARM_TARGET_AEM_V8 0 -#define KVM_ARM_TARGET_FOUNDATION_V8 1 -#define KVM_ARM_TARGET_CORTEX_A57 2 -#define KVM_ARM_TARGET_XGENE_POTENZA 3 -#define KVM_ARM_TARGET_CORTEX_A53 4 -/* Generic ARM v8 target */ -#define KVM_ARM_TARGET_GENERIC_V8 5 - -#define KVM_ARM_NUM_TARGETS 6 - -/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ -#define KVM_ARM_DEVICE_TYPE_SHIFT 0 -#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) -#define KVM_ARM_DEVICE_ID_SHIFT 16 -#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) - -/* Supported device IDs */ -#define KVM_ARM_DEVICE_VGIC_V2 0 - -/* Supported VGIC address types */ -#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 -#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 - -#define KVM_VGIC_V2_DIST_SIZE 0x1000 -#define KVM_VGIC_V2_CPU_SIZE 0x2000 - -/* Supported VGICv3 address types */ -#define KVM_VGIC_V3_ADDR_TYPE_DIST 2 -#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 -#define KVM_VGIC_ITS_ADDR_TYPE 4 -#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5 - -#define KVM_VGIC_V3_DIST_SIZE SZ_64K -#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) -#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K) - -#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ -#define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ -#define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ -#define KVM_ARM_VCPU_PMU_V3 3 /* Support guest PMUv3 */ -#define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ -#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */ -#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */ - -struct kvm_vcpu_init { - __u32 target; - __u32 features[7]; -}; - -struct kvm_sregs { -}; - -struct kvm_fpu { -}; - -/* - * See v8 ARM ARM D7.3: Debug Registers - * - * The architectural limit is 16 debug registers of each type although - * in practice there are usually less (see ID_AA64DFR0_EL1). - * - * Although the control registers are architecturally defined as 32 - * bits wide we use a 64 bit structure here to keep parity with - * KVM_GET/SET_ONE_REG behaviour which treats all system registers as - * 64 bit values. It also allows for the possibility of the - * architecture expanding the control registers without having to - * change the userspace ABI. - */ -#define KVM_ARM_MAX_DBG_REGS 16 -struct kvm_guest_debug_arch { - __u64 dbg_bcr[KVM_ARM_MAX_DBG_REGS]; - __u64 dbg_bvr[KVM_ARM_MAX_DBG_REGS]; - __u64 dbg_wcr[KVM_ARM_MAX_DBG_REGS]; - __u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS]; -}; - -struct kvm_debug_exit_arch { - __u32 hsr; - __u64 far; /* used for watchpoints */ -}; - -/* - * Architecture specific defines for kvm_guest_debug->control - */ - -#define KVM_GUESTDBG_USE_SW_BP (1 << 16) -#define KVM_GUESTDBG_USE_HW (1 << 17) - -struct kvm_sync_regs { - /* Used with KVM_CAP_ARM_USER_IRQ */ - __u64 device_irq_level; -}; - -/* - * PMU filter structure. Describe a range of events with a particular - * action. To be used with KVM_ARM_VCPU_PMU_V3_FILTER. - */ -struct kvm_pmu_event_filter { - __u16 base_event; - __u16 nevents; - -#define KVM_PMU_EVENT_ALLOW 0 -#define KVM_PMU_EVENT_DENY 1 - - __u8 action; - __u8 pad[3]; -}; - -/* for KVM_GET/SET_VCPU_EVENTS */ -struct kvm_vcpu_events { - struct { - __u8 serror_pending; - __u8 serror_has_esr; - __u8 ext_dabt_pending; - /* Align it to 8 bytes */ - __u8 pad[5]; - __u64 serror_esr; - } exception; - __u32 reserved[12]; -}; - -struct kvm_arm_copy_mte_tags { - __u64 guest_ipa; - __u64 length; - void *addr; - __u64 flags; - __u64 reserved[2]; -}; - -#define KVM_ARM_TAGS_TO_GUEST 0 -#define KVM_ARM_TAGS_FROM_GUEST 1 - -/* If you need to interpret the index values, here is the key: */ -#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 -#define KVM_REG_ARM_COPROC_SHIFT 16 - -/* Normal registers are mapped as coprocessor 16. */ -#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32)) - -/* Some registers need more space to represent values. */ -#define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 -#define KVM_REG_ARM_DEMUX_ID_SHIFT 8 -#define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) -#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF -#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 - -/* AArch64 system registers */ -#define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000 -#define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14 -#define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800 -#define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11 -#define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780 -#define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7 -#define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078 -#define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3 -#define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007 -#define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0 - -#define ARM64_SYS_REG_SHIFT_MASK(x,n) \ - (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) & \ - KVM_REG_ARM64_SYSREG_ ## n ## _MASK) - -#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ - (KVM_REG_ARM64 | KVM_REG_ARM64_SYSREG | \ - ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \ - ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \ - ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \ - ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \ - ARM64_SYS_REG_SHIFT_MASK(op2, OP2)) - -#define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64) - -/* Physical Timer EL0 Registers */ -#define KVM_REG_ARM_PTIMER_CTL ARM64_SYS_REG(3, 3, 14, 2, 1) -#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2) -#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1) - -/* - * EL0 Virtual Timer Registers - * - * WARNING: - * KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT are not defined - * with the appropriate register encodings. Their values have been - * accidentally swapped. As this is set API, the definitions here - * must be used, rather than ones derived from the encodings. - */ -#define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1) -#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) -#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) - -/* KVM-as-firmware specific pseudo-registers */ -#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) -#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ - KVM_REG_ARM_FW | ((r) & 0xffff)) -#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1 KVM_REG_ARM_FW_REG(1) -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL 0 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL 1 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED 2 - -/* - * Only two states can be presented by the host kernel: - * - NOT_REQUIRED: the guest doesn't need to do anything - * - NOT_AVAIL: the guest isn't mitigated (it can still use SSBS if available) - * - * All the other values are deprecated. The host still accepts all - * values (they are ABI), but will narrow them to the above two. - */ -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2 KVM_REG_ARM_FW_REG(2) -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL 0 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN 1 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3 -#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4) - -/* SVE registers */ -#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT) - -/* Z- and P-regs occupy blocks at the following offsets within this range: */ -#define KVM_REG_ARM64_SVE_ZREG_BASE 0 -#define KVM_REG_ARM64_SVE_PREG_BASE 0x400 -#define KVM_REG_ARM64_SVE_FFR_BASE 0x600 - -#define KVM_ARM64_SVE_NUM_ZREGS __SVE_NUM_ZREGS -#define KVM_ARM64_SVE_NUM_PREGS __SVE_NUM_PREGS - -#define KVM_ARM64_SVE_MAX_SLICES 32 - -#define KVM_REG_ARM64_SVE_ZREG(n, i) \ - (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_ZREG_BASE | \ - KVM_REG_SIZE_U2048 | \ - (((n) & (KVM_ARM64_SVE_NUM_ZREGS - 1)) << 5) | \ - ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) - -#define KVM_REG_ARM64_SVE_PREG(n, i) \ - (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_PREG_BASE | \ - KVM_REG_SIZE_U256 | \ - (((n) & (KVM_ARM64_SVE_NUM_PREGS - 1)) << 5) | \ - ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) - -#define KVM_REG_ARM64_SVE_FFR(i) \ - (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | KVM_REG_ARM64_SVE_FFR_BASE | \ - KVM_REG_SIZE_U256 | \ - ((i) & (KVM_ARM64_SVE_MAX_SLICES - 1))) - -/* - * Register values for KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() and - * KVM_REG_ARM64_SVE_FFR() are represented in memory in an endianness- - * invariant layout which differs from the layout used for the FPSIMD - * V-registers on big-endian systems: see sigcontext.h for more explanation. - */ - -#define KVM_ARM64_SVE_VQ_MIN __SVE_VQ_MIN -#define KVM_ARM64_SVE_VQ_MAX __SVE_VQ_MAX - -/* Vector lengths pseudo-register: */ -#define KVM_REG_ARM64_SVE_VLS (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | \ - KVM_REG_SIZE_U512 | 0xffff) -#define KVM_ARM64_SVE_VLS_WORDS \ - ((KVM_ARM64_SVE_VQ_MAX - KVM_ARM64_SVE_VQ_MIN) / 64 + 1) - -/* Device Control API: ARM VGIC */ -#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 -#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 -#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 -#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 -#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) -#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32 -#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \ - (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT) -#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 -#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) -#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff) -#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 -#define KVM_DEV_ARM_VGIC_GRP_CTRL 4 -#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 -#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 -#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 -#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ - (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) -#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff -#define VGIC_LEVEL_INFO_LINE_LEVEL 0 - -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 -#define KVM_DEV_ARM_ITS_SAVE_TABLES 1 -#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 -#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 -#define KVM_DEV_ARM_ITS_CTRL_RESET 4 - -/* Device Control API on vcpu fd */ -#define KVM_ARM_VCPU_PMU_V3_CTRL 0 -#define KVM_ARM_VCPU_PMU_V3_IRQ 0 -#define KVM_ARM_VCPU_PMU_V3_INIT 1 -#define KVM_ARM_VCPU_PMU_V3_FILTER 2 -#define KVM_ARM_VCPU_TIMER_CTRL 1 -#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 -#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 -#define KVM_ARM_VCPU_PVTIME_CTRL 2 -#define KVM_ARM_VCPU_PVTIME_IPA 0 - -/* KVM_IRQ_LINE irq field index values */ -#define KVM_ARM_IRQ_VCPU2_SHIFT 28 -#define KVM_ARM_IRQ_VCPU2_MASK 0xf -#define KVM_ARM_IRQ_TYPE_SHIFT 24 -#define KVM_ARM_IRQ_TYPE_MASK 0xf -#define KVM_ARM_IRQ_VCPU_SHIFT 16 -#define KVM_ARM_IRQ_VCPU_MASK 0xff -#define KVM_ARM_IRQ_NUM_SHIFT 0 -#define KVM_ARM_IRQ_NUM_MASK 0xffff - -/* irq_type field */ -#define KVM_ARM_IRQ_TYPE_CPU 0 -#define KVM_ARM_IRQ_TYPE_SPI 1 -#define KVM_ARM_IRQ_TYPE_PPI 2 - -/* out-of-kernel GIC cpu interrupt injection irq_number field */ -#define KVM_ARM_IRQ_CPU_IRQ 0 -#define KVM_ARM_IRQ_CPU_FIQ 1 - -/* - * This used to hold the highest supported SPI, but it is now obsolete - * and only here to provide source code level compatibility with older - * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS. - */ -#define KVM_ARM_IRQ_GIC_MAX 127 - -/* One single KVM irqchip, ie. the VGIC */ -#define KVM_NR_IRQCHIPS 1 - -/* PSCI interface */ -#define KVM_PSCI_FN_BASE 0x95c1ba5e -#define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) - -#define KVM_PSCI_FN_CPU_SUSPEND KVM_PSCI_FN(0) -#define KVM_PSCI_FN_CPU_OFF KVM_PSCI_FN(1) -#define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) -#define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) - -#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS -#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED -#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS -#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED - -#endif - -#endif /* __ARM_KVM_H__ */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/mman.h b/lib/libc/include/arm64-linux-any/asm/mman.h deleted file mode 100644 index 74189614ee6486704b289e097698681fff563987..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/mman.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#ifndef __ASM_MMAN_H -#define __ASM_MMAN_H - -#include - -#define PROT_BTI 0x10 /* BTI guarded page */ -#define PROT_MTE 0x20 /* Normal Tagged mapping */ - -#endif /* ! _UAPI__ASM_MMAN_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/param.h b/lib/libc/include/arm64-linux-any/asm/param.h deleted file mode 100644 index f58c021601fedff10bb342e7caa188111f328e43..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/param.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_PARAM_H -#define __ASM_PARAM_H - -#define EXEC_PAGESIZE 65536 - -#include - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/perf_regs.h b/lib/libc/include/arm64-linux-any/asm/perf_regs.h deleted file mode 100644 index d63b945af5a0252dcacee51f670e543c25d178d3..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/perf_regs.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#ifndef _ASM_ARM64_PERF_REGS_H -#define _ASM_ARM64_PERF_REGS_H - -enum perf_event_arm_regs { - PERF_REG_ARM64_X0, - PERF_REG_ARM64_X1, - PERF_REG_ARM64_X2, - PERF_REG_ARM64_X3, - PERF_REG_ARM64_X4, - PERF_REG_ARM64_X5, - PERF_REG_ARM64_X6, - PERF_REG_ARM64_X7, - PERF_REG_ARM64_X8, - PERF_REG_ARM64_X9, - PERF_REG_ARM64_X10, - PERF_REG_ARM64_X11, - PERF_REG_ARM64_X12, - PERF_REG_ARM64_X13, - PERF_REG_ARM64_X14, - PERF_REG_ARM64_X15, - PERF_REG_ARM64_X16, - PERF_REG_ARM64_X17, - PERF_REG_ARM64_X18, - PERF_REG_ARM64_X19, - PERF_REG_ARM64_X20, - PERF_REG_ARM64_X21, - PERF_REG_ARM64_X22, - PERF_REG_ARM64_X23, - PERF_REG_ARM64_X24, - PERF_REG_ARM64_X25, - PERF_REG_ARM64_X26, - PERF_REG_ARM64_X27, - PERF_REG_ARM64_X28, - PERF_REG_ARM64_X29, - PERF_REG_ARM64_LR, - PERF_REG_ARM64_SP, - PERF_REG_ARM64_PC, - PERF_REG_ARM64_MAX, -}; -#endif /* _ASM_ARM64_PERF_REGS_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/posix_types.h b/lib/libc/include/arm64-linux-any/asm/posix_types.h deleted file mode 100644 index b20f985d3a9fdbeb759ded61119791034ec75b48..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/posix_types.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -#ifndef __ASM_POSIX_TYPES_H -#define __ASM_POSIX_TYPES_H - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -#define __kernel_old_uid_t __kernel_old_uid_t - -#include - -#endif /* __ASM_POSIX_TYPES_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/ptrace.h b/lib/libc/include/arm64-linux-any/asm/ptrace.h deleted file mode 100644 index 044023b65c78d3ba36306e21133d4e84d7b11427..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/ptrace.h +++ /dev/null @@ -1,270 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Based on arch/arm/include/asm/ptrace.h - * - * Copyright (C) 1996-2003 Russell King - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_PTRACE_H -#define __ASM_PTRACE_H - -#include - -#include -#include - - -/* - * PSR bits - */ -#define PSR_MODE_EL0t 0x00000000 -#define PSR_MODE_EL1t 0x00000004 -#define PSR_MODE_EL1h 0x00000005 -#define PSR_MODE_EL2t 0x00000008 -#define PSR_MODE_EL2h 0x00000009 -#define PSR_MODE_EL3t 0x0000000c -#define PSR_MODE_EL3h 0x0000000d -#define PSR_MODE_MASK 0x0000000f - -/* AArch32 CPSR bits */ -#define PSR_MODE32_BIT 0x00000010 - -/* AArch64 SPSR bits */ -#define PSR_F_BIT 0x00000040 -#define PSR_I_BIT 0x00000080 -#define PSR_A_BIT 0x00000100 -#define PSR_D_BIT 0x00000200 -#define PSR_BTYPE_MASK 0x00000c00 -#define PSR_SSBS_BIT 0x00001000 -#define PSR_PAN_BIT 0x00400000 -#define PSR_UAO_BIT 0x00800000 -#define PSR_DIT_BIT 0x01000000 -#define PSR_TCO_BIT 0x02000000 -#define PSR_V_BIT 0x10000000 -#define PSR_C_BIT 0x20000000 -#define PSR_Z_BIT 0x40000000 -#define PSR_N_BIT 0x80000000 - -#define PSR_BTYPE_SHIFT 10 - -/* - * Groups of PSR bits - */ -#define PSR_f 0xff000000 /* Flags */ -#define PSR_s 0x00ff0000 /* Status */ -#define PSR_x 0x0000ff00 /* Extension */ -#define PSR_c 0x000000ff /* Control */ - -/* Convenience names for the values of PSTATE.BTYPE */ -#define PSR_BTYPE_NONE (0b00 << PSR_BTYPE_SHIFT) -#define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT) -#define PSR_BTYPE_C (0b10 << PSR_BTYPE_SHIFT) -#define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT) - -/* syscall emulation path in ptrace */ -#define PTRACE_SYSEMU 31 -#define PTRACE_SYSEMU_SINGLESTEP 32 -/* MTE allocation tag access */ -#define PTRACE_PEEKMTETAGS 33 -#define PTRACE_POKEMTETAGS 34 - -#ifndef __ASSEMBLY__ - -/* - * User structures for general purpose, floating point and debug registers. - */ -struct user_pt_regs { - __u64 regs[31]; - __u64 sp; - __u64 pc; - __u64 pstate; -}; - -struct user_fpsimd_state { - __uint128_t vregs[32]; - __u32 fpsr; - __u32 fpcr; - __u32 __reserved[2]; -}; - -struct user_hwdebug_state { - __u32 dbg_info; - __u32 pad; - struct { - __u64 addr; - __u32 ctrl; - __u32 pad; - } dbg_regs[16]; -}; - -/* SVE/FP/SIMD state (NT_ARM_SVE) */ - -struct user_sve_header { - __u32 size; /* total meaningful regset content in bytes */ - __u32 max_size; /* maxmium possible size for this thread */ - __u16 vl; /* current vector length */ - __u16 max_vl; /* maximum possible vector length */ - __u16 flags; - __u16 __reserved; -}; - -/* Definitions for user_sve_header.flags: */ -#define SVE_PT_REGS_MASK (1 << 0) - -#define SVE_PT_REGS_FPSIMD 0 -#define SVE_PT_REGS_SVE SVE_PT_REGS_MASK - -/* - * Common SVE_PT_* flags: - * These must be kept in sync with prctl interface in - */ -#define SVE_PT_VL_INHERIT ((1 << 17) /* PR_SVE_VL_INHERIT */ >> 16) -#define SVE_PT_VL_ONEXEC ((1 << 18) /* PR_SVE_SET_VL_ONEXEC */ >> 16) - - -/* - * The remainder of the SVE state follows struct user_sve_header. The - * total size of the SVE state (including header) depends on the - * metadata in the header: SVE_PT_SIZE(vq, flags) gives the total size - * of the state in bytes, including the header. - * - * Refer to for details of how to pass the correct - * "vq" argument to these macros. - */ - -/* Offset from the start of struct user_sve_header to the register data */ -#define SVE_PT_REGS_OFFSET \ - ((sizeof(struct user_sve_header) + (__SVE_VQ_BYTES - 1)) \ - / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - -/* - * The register data content and layout depends on the value of the - * flags field. - */ - -/* - * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case: - * - * The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type - * struct user_fpsimd_state. Additional data might be appended in the - * future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size. - * SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than - * sizeof(struct user_fpsimd_state). - */ - -#define SVE_PT_FPSIMD_OFFSET SVE_PT_REGS_OFFSET - -#define SVE_PT_FPSIMD_SIZE(vq, flags) (sizeof(struct user_fpsimd_state)) - -/* - * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case: - * - * The payload starts at offset SVE_PT_SVE_OFFSET, and is of size - * SVE_PT_SVE_SIZE(vq, flags). - * - * Additional macros describe the contents and layout of the payload. - * For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to - * the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is - * the size in bytes: - * - * x type description - * - ---- ----------- - * ZREGS \ - * ZREG | - * PREGS | refer to - * PREG | - * FFR / - * - * FPSR uint32_t FPSR - * FPCR uint32_t FPCR - * - * Additional data might be appended in the future. - * - * The Z-, P- and FFR registers are represented in memory in an endianness- - * invariant layout which differs from the layout used for the FPSIMD - * V-registers on big-endian systems: see sigcontext.h for more explanation. - */ - -#define SVE_PT_SVE_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) -#define SVE_PT_SVE_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) -#define SVE_PT_SVE_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) -#define SVE_PT_SVE_FPSR_SIZE sizeof(__u32) -#define SVE_PT_SVE_FPCR_SIZE sizeof(__u32) - -#define SVE_PT_SVE_OFFSET SVE_PT_REGS_OFFSET - -#define SVE_PT_SVE_ZREGS_OFFSET \ - (SVE_PT_REGS_OFFSET + __SVE_ZREGS_OFFSET) -#define SVE_PT_SVE_ZREG_OFFSET(vq, n) \ - (SVE_PT_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) -#define SVE_PT_SVE_ZREGS_SIZE(vq) \ - (SVE_PT_SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET) - -#define SVE_PT_SVE_PREGS_OFFSET(vq) \ - (SVE_PT_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) -#define SVE_PT_SVE_PREG_OFFSET(vq, n) \ - (SVE_PT_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) -#define SVE_PT_SVE_PREGS_SIZE(vq) \ - (SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \ - SVE_PT_SVE_PREGS_OFFSET(vq)) - -#define SVE_PT_SVE_FFR_OFFSET(vq) \ - (SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) - -#define SVE_PT_SVE_FPSR_OFFSET(vq) \ - ((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \ - (__SVE_VQ_BYTES - 1)) \ - / __SVE_VQ_BYTES * __SVE_VQ_BYTES) -#define SVE_PT_SVE_FPCR_OFFSET(vq) \ - (SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE) - -/* - * Any future extension appended after FPCR must be aligned to the next - * 128-bit boundary. - */ - -#define SVE_PT_SVE_SIZE(vq, flags) \ - ((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE \ - - SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1)) \ - / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - -#define SVE_PT_SIZE(vq, flags) \ - (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \ - SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags) \ - : SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags)) - -/* pointer authentication masks (NT_ARM_PAC_MASK) */ - -struct user_pac_mask { - __u64 data_mask; - __u64 insn_mask; -}; - -/* pointer authentication keys (NT_ARM_PACA_KEYS, NT_ARM_PACG_KEYS) */ - -struct user_pac_address_keys { - __uint128_t apiakey; - __uint128_t apibkey; - __uint128_t apdakey; - __uint128_t apdbkey; -}; - -struct user_pac_generic_keys { - __uint128_t apgakey; -}; - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_PTRACE_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/setup.h b/lib/libc/include/arm64-linux-any/asm/setup.h deleted file mode 100644 index 32e442aba7cfe229940f334797836c878fd2272b..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/setup.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Based on arch/arm/include/asm/setup.h - * - * Copyright (C) 1997-1999 Russell King - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_SETUP_H -#define __ASM_SETUP_H - -#include - -#define COMMAND_LINE_SIZE 2048 - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/sigcontext.h b/lib/libc/include/arm64-linux-any/asm/sigcontext.h deleted file mode 100644 index c1f9d506ac2b443594349c22912c3d3359c637eb..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/sigcontext.h +++ /dev/null @@ -1,252 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_SIGCONTEXT_H -#define __ASM_SIGCONTEXT_H - -#ifndef __ASSEMBLY__ - -#include - -/* - * Signal context structure - contains all info to do with the state - * before the signal handler was invoked. - */ -struct sigcontext { - __u64 fault_address; - /* AArch64 registers */ - __u64 regs[31]; - __u64 sp; - __u64 pc; - __u64 pstate; - /* 4K reserved for FP/SIMD state and future expansion */ - __u8 __reserved[4096] __attribute__((__aligned__(16))); -}; - -/* - * Allocation of __reserved[]: - * (Note: records do not necessarily occur in the order shown here.) - * - * size description - * - * 0x210 fpsimd_context - * 0x10 esr_context - * 0x8a0 sve_context (vl <= 64) (optional) - * 0x20 extra_context (optional) - * 0x10 terminator (null _aarch64_ctx) - * - * 0x510 (reserved for future allocation) - * - * New records that can exceed this space need to be opt-in for userspace, so - * that an expanded signal frame is not generated unexpectedly. The mechanism - * for opting in will depend on the extension that generates each new record. - * The above table documents the maximum set and sizes of records than can be - * generated when userspace does not opt in for any such extension. - */ - -/* - * Header to be used at the beginning of structures extending the user - * context. Such structures must be placed after the rt_sigframe on the stack - * and be 16-byte aligned. The last structure must be a dummy one with the - * magic and size set to 0. - */ -struct _aarch64_ctx { - __u32 magic; - __u32 size; -}; - -#define FPSIMD_MAGIC 0x46508001 - -struct fpsimd_context { - struct _aarch64_ctx head; - __u32 fpsr; - __u32 fpcr; - __uint128_t vregs[32]; -}; - -/* - * Note: similarly to all other integer fields, each V-register is stored in an - * endianness-dependent format, with the byte at offset i from the start of the - * in-memory representation of the register value containing - * - * bits [(7 + 8 * i) : (8 * i)] of the register on little-endian hosts; or - * bits [(127 - 8 * i) : (120 - 8 * i)] on big-endian hosts. - */ - -/* ESR_EL1 context */ -#define ESR_MAGIC 0x45535201 - -struct esr_context { - struct _aarch64_ctx head; - __u64 esr; -}; - -/* - * extra_context: describes extra space in the signal frame for - * additional structures that don't fit in sigcontext.__reserved[]. - * - * Note: - * - * 1) fpsimd_context, esr_context and extra_context must be placed in - * sigcontext.__reserved[] if present. They cannot be placed in the - * extra space. Any other record can be placed either in the extra - * space or in sigcontext.__reserved[], unless otherwise specified in - * this file. - * - * 2) There must not be more than one extra_context. - * - * 3) If extra_context is present, it must be followed immediately in - * sigcontext.__reserved[] by the terminating null _aarch64_ctx. - * - * 4) The extra space to which datap points must start at the first - * 16-byte aligned address immediately after the terminating null - * _aarch64_ctx that follows the extra_context structure in - * __reserved[]. The extra space may overrun the end of __reserved[], - * as indicated by a sufficiently large value for the size field. - * - * 5) The extra space must itself be terminated with a null - * _aarch64_ctx. - */ -#define EXTRA_MAGIC 0x45585401 - -struct extra_context { - struct _aarch64_ctx head; - __u64 datap; /* 16-byte aligned pointer to extra space cast to __u64 */ - __u32 size; /* size in bytes of the extra space */ - __u32 __reserved[3]; -}; - -#define SVE_MAGIC 0x53564501 - -struct sve_context { - struct _aarch64_ctx head; - __u16 vl; - __u16 __reserved[3]; -}; - -#endif /* !__ASSEMBLY__ */ - -#include - -/* - * The SVE architecture leaves space for future expansion of the - * vector length beyond its initial architectural limit of 2048 bits - * (16 quadwords). - * - * See linux/Documentation/arm64/sve.rst for a description of the VL/VQ - * terminology. - */ -#define SVE_VQ_BYTES __SVE_VQ_BYTES /* bytes per quadword */ - -#define SVE_VQ_MIN __SVE_VQ_MIN -#define SVE_VQ_MAX __SVE_VQ_MAX - -#define SVE_VL_MIN __SVE_VL_MIN -#define SVE_VL_MAX __SVE_VL_MAX - -#define SVE_NUM_ZREGS __SVE_NUM_ZREGS -#define SVE_NUM_PREGS __SVE_NUM_PREGS - -#define sve_vl_valid(vl) __sve_vl_valid(vl) -#define sve_vq_from_vl(vl) __sve_vq_from_vl(vl) -#define sve_vl_from_vq(vq) __sve_vl_from_vq(vq) - -/* - * If the SVE registers are currently live for the thread at signal delivery, - * sve_context.head.size >= - * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)) - * and the register data may be accessed using the SVE_SIG_*() macros. - * - * If sve_context.head.size < - * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)), - * the SVE registers were not live for the thread and no register data - * is included: in this case, the SVE_SIG_*() macros should not be - * used except for this check. - * - * The same convention applies when returning from a signal: a caller - * will need to remove or resize the sve_context block if it wants to - * make the SVE registers live when they were previously non-live or - * vice-versa. This may require the caller to allocate fresh - * memory and/or move other context blocks in the signal frame. - * - * Changing the vector length during signal return is not permitted: - * sve_context.vl must equal the thread's current vector length when - * doing a sigreturn. - * - * - * Note: for all these macros, the "vq" argument denotes the SVE - * vector length in quadwords (i.e., units of 128 bits). - * - * The correct way to obtain vq is to use sve_vq_from_vl(vl). The - * result is valid if and only if sve_vl_valid(vl) is true. This is - * guaranteed for a struct sve_context written by the kernel. - * - * - * Additional macros describe the contents and layout of the payload. - * For each, SVE_SIG_x_OFFSET(args) is the start offset relative to - * the start of struct sve_context, and SVE_SIG_x_SIZE(args) is the - * size in bytes: - * - * x type description - * - ---- ----------- - * REGS the entire SVE context - * - * ZREGS __uint128_t[SVE_NUM_ZREGS][vq] all Z-registers - * ZREG __uint128_t[vq] individual Z-register Zn - * - * PREGS uint16_t[SVE_NUM_PREGS][vq] all P-registers - * PREG uint16_t[vq] individual P-register Pn - * - * FFR uint16_t[vq] first-fault status register - * - * Additional data might be appended in the future. - * - * Unlike vregs[] in fpsimd_context, each SVE scalable register (Z-, P- or FFR) - * is encoded in memory in an endianness-invariant format, with the byte at - * offset i from the start of the in-memory representation containing bits - * [(7 + 8 * i) : (8 * i)] of the register value. - */ - -#define SVE_SIG_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) -#define SVE_SIG_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) -#define SVE_SIG_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) - -#define SVE_SIG_REGS_OFFSET \ - ((sizeof(struct sve_context) + (__SVE_VQ_BYTES - 1)) \ - / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - -#define SVE_SIG_ZREGS_OFFSET \ - (SVE_SIG_REGS_OFFSET + __SVE_ZREGS_OFFSET) -#define SVE_SIG_ZREG_OFFSET(vq, n) \ - (SVE_SIG_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) -#define SVE_SIG_ZREGS_SIZE(vq) __SVE_ZREGS_SIZE(vq) - -#define SVE_SIG_PREGS_OFFSET(vq) \ - (SVE_SIG_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) -#define SVE_SIG_PREG_OFFSET(vq, n) \ - (SVE_SIG_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) -#define SVE_SIG_PREGS_SIZE(vq) __SVE_PREGS_SIZE(vq) - -#define SVE_SIG_FFR_OFFSET(vq) \ - (SVE_SIG_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) - -#define SVE_SIG_REGS_SIZE(vq) \ - (__SVE_FFR_OFFSET(vq) + __SVE_FFR_SIZE(vq)) - -#define SVE_SIG_CONTEXT_SIZE(vq) \ - (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq)) - -#endif /* __ASM_SIGCONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/signal.h b/lib/libc/include/arm64-linux-any/asm/signal.h deleted file mode 100644 index 167802d3a21a27f1da82fa64364d21d5bb4786aa..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/signal.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_SIGNAL_H -#define __ASM_SIGNAL_H - -/* Required for AArch32 compatibility. */ -#define SA_RESTORER 0x04000000 - -#define MINSIGSTKSZ 5120 -#define SIGSTKSZ 16384 - -#include - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/statfs.h b/lib/libc/include/arm64-linux-any/asm/statfs.h deleted file mode 100644 index dfa2faa7db74670c39807c261970ff83aae76436..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/statfs.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_STATFS_H -#define __ASM_STATFS_H - -#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4))) - -#include - -#endif \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/sve_context.h b/lib/libc/include/arm64-linux-any/asm/sve_context.h deleted file mode 100644 index 3dace56616c4b2af506b55516a311b9a4e7a87f6..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/sve_context.h +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* Copyright (C) 2017-2018 ARM Limited */ - -/* - * For use by other UAPI headers only. - * Do not make direct use of header or its definitions. - */ - -#ifndef __ASM_SVE_CONTEXT_H -#define __ASM_SVE_CONTEXT_H - -#include - -#define __SVE_VQ_BYTES 16 /* number of bytes per quadword */ - -#define __SVE_VQ_MIN 1 -#define __SVE_VQ_MAX 512 - -#define __SVE_VL_MIN (__SVE_VQ_MIN * __SVE_VQ_BYTES) -#define __SVE_VL_MAX (__SVE_VQ_MAX * __SVE_VQ_BYTES) - -#define __SVE_NUM_ZREGS 32 -#define __SVE_NUM_PREGS 16 - -#define __sve_vl_valid(vl) \ - ((vl) % __SVE_VQ_BYTES == 0 && \ - (vl) >= __SVE_VL_MIN && \ - (vl) <= __SVE_VL_MAX) - -#define __sve_vq_from_vl(vl) ((vl) / __SVE_VQ_BYTES) -#define __sve_vl_from_vq(vq) ((vq) * __SVE_VQ_BYTES) - -#define __SVE_ZREG_SIZE(vq) ((__u32)(vq) * __SVE_VQ_BYTES) -#define __SVE_PREG_SIZE(vq) ((__u32)(vq) * (__SVE_VQ_BYTES / 8)) -#define __SVE_FFR_SIZE(vq) __SVE_PREG_SIZE(vq) - -#define __SVE_ZREGS_OFFSET 0 -#define __SVE_ZREG_OFFSET(vq, n) \ - (__SVE_ZREGS_OFFSET + __SVE_ZREG_SIZE(vq) * (n)) -#define __SVE_ZREGS_SIZE(vq) \ - (__SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - __SVE_ZREGS_OFFSET) - -#define __SVE_PREGS_OFFSET(vq) \ - (__SVE_ZREGS_OFFSET + __SVE_ZREGS_SIZE(vq)) -#define __SVE_PREG_OFFSET(vq, n) \ - (__SVE_PREGS_OFFSET(vq) + __SVE_PREG_SIZE(vq) * (n)) -#define __SVE_PREGS_SIZE(vq) \ - (__SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - __SVE_PREGS_OFFSET(vq)) - -#define __SVE_FFR_OFFSET(vq) \ - (__SVE_PREGS_OFFSET(vq) + __SVE_PREGS_SIZE(vq)) - -#endif /* ! _UAPI__ASM_SVE_CONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/ucontext.h b/lib/libc/include/arm64-linux-any/asm/ucontext.h deleted file mode 100644 index 87f00793b319167c3d67192961f02caaee33e7d5..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/ucontext.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#ifndef __ASM_UCONTEXT_H -#define __ASM_UCONTEXT_H - -#include - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - sigset_t uc_sigmask; - /* glibc uses a 1024-bit sigset_t */ - __u8 __unused[1024 / 8 - sizeof(sigset_t)]; - /* last for future expansion */ - struct sigcontext uc_mcontext; -}; - -#endif /* __ASM_UCONTEXT_H */ \ No newline at end of file diff --git a/lib/libc/include/arm64-linux-any/asm/unistd.h b/lib/libc/include/arm64-linux-any/asm/unistd.h deleted file mode 100644 index 5280df683e5668ed2945fc82b057169c730c8c7d..0000000000000000000000000000000000000000 --- a/lib/libc/include/arm64-linux-any/asm/unistd.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -/* - * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#define __ARCH_WANT_RENAMEAT -#define __ARCH_WANT_NEW_STAT -#define __ARCH_WANT_SET_GET_RLIMIT -#define __ARCH_WANT_TIME32_SYSCALLS -#define __ARCH_WANT_SYS_CLONE3 -#define __ARCH_WANT_MEMFD_SECRET - -#include \ No newline at end of file diff --git a/src/target.zig b/src/target.zig index 8a95e756bfc8438461fb3caa5f9ce3b7b6510efe..71fd452fad903984a755e7404558dee3b4f2d22a 100644 --- a/src/target.zig +++ b/src/target.zig @@ -113,7 +113,7 @@ pub fn osArchName(target: std.Target) [:0]const u8 { return switch (target.os.tag) { .linux => switch (target.cpu.arch) { .arm, .armeb, .thumb, .thumbeb => "arm", - .aarch64, .aarch64_be, .aarch64_32 => "arm64", + .aarch64, .aarch64_be, .aarch64_32 => "aarch64", .mips, .mipsel, .mips64, .mips64el => "mips", .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc", .riscv32, .riscv64 => "riscv", diff --git a/tools/update-linux-headers.zig b/tools/update-linux-headers.zig index 0a3fb85f71cb366482793b2cf835a2ba3ddfba5f..48fdfbbb344580b4eeaea3946accc7380990d2c1 100644 --- a/tools/update-linux-headers.zig +++ b/tools/update-linux-headers.zig @@ -55,7 +55,7 @@ const linux_targets = [_]LibCTarget{ }, LibCTarget{ .name = "arm64", - .arch = .arm64, + .arch = .{ .specific = .aarch64 }, }, LibCTarget{ .name = "csky",