From 0f46c12f789d10915e04c8aec26f0330536539c7 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Mon, 16 Dec 2019 16:13:03 -0500 Subject: [PATCH 01/63] Create initial target details infrastructure --- lib/std/std.zig | 1 + lib/std/target.zig | 3 + lib/std/target/cpu.zig | 65 + lib/std/target/cpu/AArch64Cpu.zig | 480 ++ lib/std/target/cpu/AmdGpuCpu.zig | 1060 +++++ lib/std/target/cpu/ArmCpu.zig | 1230 ++++++ lib/std/target/cpu/AvrCpu.zig | 3863 +++++++++++++++++ lib/std/target/cpu/BpfCpu.zig | 29 + lib/std/target/cpu/HexagonCpu.zig | 103 + lib/std/target/cpu/MipsCpu.zig | 190 + lib/std/target/cpu/Msp430Cpu.zig | 24 + lib/std/target/cpu/NvptxCpu.zig | 85 + lib/std/target/cpu/PowerPcCpu.zig | 451 ++ lib/std/target/cpu/RiscVCpu.zig | 23 + lib/std/target/cpu/SparcCpu.zig | 216 + lib/std/target/cpu/SystemZCpu.zig | 279 ++ lib/std/target/cpu/WebAssemblyCpu.zig | 28 + lib/std/target/cpu/X86Cpu.zig | 1864 ++++++++ lib/std/target/cpu/empty.zig | 6 + lib/std/target/feature.zig | 76 + lib/std/target/feature/AArch64Feature.zig | 750 ++++ lib/std/target/feature/AmdGpuFeature.zig | 343 ++ lib/std/target/feature/ArmFeature.zig | 818 ++++ lib/std/target/feature/AvrFeature.zig | 230 + lib/std/target/feature/BpfFeature.zig | 17 + lib/std/target/feature/HexagonFeature.zig | 76 + lib/std/target/feature/MipsFeature.zig | 238 + lib/std/target/feature/Msp430Feature.zig | 19 + lib/std/target/feature/NvptxFeature.zig | 61 + lib/std/target/feature/PowerPcFeature.zig | 163 + lib/std/target/feature/RiscVFeature.zig | 31 + lib/std/target/feature/SparcFeature.zig | 49 + lib/std/target/feature/SystemZFeature.zig | 81 + lib/std/target/feature/WebAssemblyFeature.zig | 33 + lib/std/target/feature/X86Feature.zig | 342 ++ lib/std/target/feature/empty.zig | 5 + 36 files changed, 13332 insertions(+) create mode 100644 lib/std/target/cpu.zig create mode 100644 lib/std/target/cpu/AArch64Cpu.zig create mode 100644 lib/std/target/cpu/AmdGpuCpu.zig create mode 100644 lib/std/target/cpu/ArmCpu.zig create mode 100644 lib/std/target/cpu/AvrCpu.zig create mode 100644 lib/std/target/cpu/BpfCpu.zig create mode 100644 lib/std/target/cpu/HexagonCpu.zig create mode 100644 lib/std/target/cpu/MipsCpu.zig create mode 100644 lib/std/target/cpu/Msp430Cpu.zig create mode 100644 lib/std/target/cpu/NvptxCpu.zig create mode 100644 lib/std/target/cpu/PowerPcCpu.zig create mode 100644 lib/std/target/cpu/RiscVCpu.zig create mode 100644 lib/std/target/cpu/SparcCpu.zig create mode 100644 lib/std/target/cpu/SystemZCpu.zig create mode 100644 lib/std/target/cpu/WebAssemblyCpu.zig create mode 100644 lib/std/target/cpu/X86Cpu.zig create mode 100644 lib/std/target/cpu/empty.zig create mode 100644 lib/std/target/feature.zig create mode 100644 lib/std/target/feature/AArch64Feature.zig create mode 100644 lib/std/target/feature/AmdGpuFeature.zig create mode 100644 lib/std/target/feature/ArmFeature.zig create mode 100644 lib/std/target/feature/AvrFeature.zig create mode 100644 lib/std/target/feature/BpfFeature.zig create mode 100644 lib/std/target/feature/HexagonFeature.zig create mode 100644 lib/std/target/feature/MipsFeature.zig create mode 100644 lib/std/target/feature/Msp430Feature.zig create mode 100644 lib/std/target/feature/NvptxFeature.zig create mode 100644 lib/std/target/feature/PowerPcFeature.zig create mode 100644 lib/std/target/feature/RiscVFeature.zig create mode 100644 lib/std/target/feature/SparcFeature.zig create mode 100644 lib/std/target/feature/SystemZFeature.zig create mode 100644 lib/std/target/feature/WebAssemblyFeature.zig create mode 100644 lib/std/target/feature/X86Feature.zig create mode 100644 lib/std/target/feature/empty.zig diff --git a/lib/std/std.zig b/lib/std/std.zig index dd4d968efbc9fa8fa81ffaf07245dc77d56a2896..f268bfe848e6fcc4c943ddb6601b4e8aca5de8cc 100644 --- a/lib/std/std.zig +++ b/lib/std/std.zig @@ -60,6 +60,7 @@ pub const rand = @import("rand.zig"); pub const rb = @import("rb.zig"); pub const sort = @import("sort.zig"); pub const ascii = @import("ascii.zig"); +pub const target = @import("target.zig"); pub const testing = @import("testing.zig"); pub const time = @import("time.zig"); pub const unicode = @import("unicode.zig"); diff --git a/lib/std/target.zig b/lib/std/target.zig index d62786ff7f3474dde175019b9c662c1cee5c0211..029bf0148947c4b175a5f2edb81a082c13870d00 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -2,6 +2,9 @@ const std = @import("std.zig"); const mem = std.mem; const builtin = std.builtin; +pub const feature = @import("target/feature.zig"); +pub const cpu = @import("target/cpu.zig"); + /// TODO Nearly all the functions in this namespace would be /// better off if https://github.com/ziglang/zig/issues/425 /// was solved. diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..02e707078a608724e6e8814664134ec300775fca --- /dev/null +++ b/lib/std/target/cpu.zig @@ -0,0 +1,65 @@ +const std = @import("std"); + +const feature = @import("feature.zig"); +const Arch = @import("arch.zig").Arch; + +pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu; +pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu; +pub const ArmCpu = @import("cpu/ArmCpu.zig").ArmCpu; +pub const AvrCpu = @import("cpu/AvrCpu.zig").AvrCpu; +pub const BpfCpu = @import("cpu/BpfCpu.zig").BpfCpu; +pub const HexagonCpu = @import("cpu/HexagonCpu.zig").HexagonCpu; +pub const MipsCpu = @import("cpu/MipsCpu.zig").MipsCpu; +pub const Msp430Cpu = @import("cpu/Msp430Cpu.zig").Msp430Cpu; +pub const NvptxCpu = @import("cpu/NvptxCpu.zig").NvptxCpu; +pub const PowerPcCpu = @import("cpu/PowerPcCpu.zig").PowerPcCpu; +pub const RiscVCpu = @import("cpu/RiscVCpu.zig").RiscVCpu; +pub const SparcCpu = @import("cpu/SparcCpu.zig").SparcCpu; +pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu; +pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu; +pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu; + +const EmptyCpu = @import("feature/empty.zig").EmptyCpu; + +pub fn ArchCpu(comptime arch: @TagType(Arch)) type { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => ArmCpu, + .aarch64, .aarch64_be, .aarch64_32 => AArch64Cpu, + .avr => AvrCpu, + .bpfel, .bpfeb => BpfCpu, + .hexagon => HexagonCpu, + .mips, .mipsel, .mips64, .mips64el => MipsCpu, + .msp430 => Msp430Cpu, + .powerpc, .powerpc64, .powerpc64le => PowerPcCpu, + .amdgcn => AmdGpuCpu, + .riscv32, .riscv64 => RiscVCpu, + .sparc, .sparcv9, .sparcel => SparcCpu, + .s390x => SystemZCpu, + .i386, .x86_64 => X86Cpu, + .nvptx, .nvptx64 => NvptxCpu, + .wasm32, .wasm64 => WebAssemblyCpu, + + else => EmptyCpu, + }; +} + +pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type { + return CpuInfo(feature.ArchFeature(arch)); +} + +pub fn CpuInfo(comptime FeatureType: type) type { + return struct { + name: []const u8, + + features: []const FeatureType, + + const Self = @This(); + + fn create(name: []const u8, features: []const FeatureType) Self { + return Self { + .name = name, + .features = features, + }; + } + }; +} diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..d6c86aba0a3941a3b70aeaf7c709f6b9648b2fd3 --- /dev/null +++ b/lib/std/target/cpu/AArch64Cpu.zig @@ -0,0 +1,480 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const AArch64Cpu = enum { + AppleLatest, + CortexA35, + CortexA53, + CortexA55, + CortexA57, + CortexA65, + CortexA65ae, + CortexA72, + CortexA73, + CortexA75, + CortexA76, + CortexA76ae, + Cyclone, + ExynosM1, + ExynosM2, + ExynosM3, + ExynosM4, + ExynosM5, + Falkor, + Generic, + Kryo, + NeoverseE1, + NeoverseN1, + Saphira, + Thunderx, + Thunderx2t99, + Thunderxt81, + Thunderxt83, + Thunderxt88, + Tsv110, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.AArch64Feature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType { + .ZczFp, + .ArithCbzFusion, + .FuseAes, + .AlternateSextloadCvtF32Pattern, + .ZczFpWorkaround, + .FpArmv8, + .Perfmon, + .DisableLatencySchedHeuristic, + .Zcm, + .ZczGp, + .ArithBccFusion, + .FuseCryptoEor, + .Cyclone, + }, + CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType { + .Perfmon, + .FpArmv8, + .Crc, + .A35, + }, + CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType { + .UseAa, + .FuseAes, + .FpArmv8, + .Perfmon, + .Crc, + .BalanceFpOps, + .UsePostraScheduler, + .CustomCheapAsMove, + .A53, + }, + CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Uaops, + .Vh, + .Ras, + .A55, + }, + CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType { + .FuseLiterals, + .FuseAes, + .FpArmv8, + .Perfmon, + .Crc, + .BalanceFpOps, + .UsePostraScheduler, + .CustomCheapAsMove, + .PredictableSelectExpensive, + .A57, + }, + CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .A65, + }, + CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .A65, + }, + CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType { + .Perfmon, + .FuseAes, + .FpArmv8, + .Crc, + .A72, + }, + CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType { + .Perfmon, + .FuseAes, + .FpArmv8, + .Crc, + .A73, + }, + CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Uaops, + .Vh, + .Ras, + .A75, + }, + CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .A76, + }, + CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .A76, + }, + CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType { + .ZczFp, + .ArithCbzFusion, + .FuseAes, + .AlternateSextloadCvtF32Pattern, + .ZczFpWorkaround, + .FpArmv8, + .Perfmon, + .DisableLatencySchedHeuristic, + .Zcm, + .ZczGp, + .ArithBccFusion, + .FuseCryptoEor, + .Cyclone, + }, + CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType { + .ZczFp, + .FuseAes, + .SlowPaired128, + .Force32bitJumpTables, + .UseReciprocalSquareRoot, + .FpArmv8, + .Perfmon, + .SlowMisaligned128store, + .Crc, + .UsePostraScheduler, + .CustomCheapAsMove, + .Exynosm1, + }, + CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType { + .ZczFp, + .FuseAes, + .SlowPaired128, + .Force32bitJumpTables, + .FpArmv8, + .Perfmon, + .SlowMisaligned128store, + .Crc, + .UsePostraScheduler, + .CustomCheapAsMove, + .Exynosm2, + }, + CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType { + .ZczFp, + .FuseLiterals, + .FuseAes, + .Force32bitJumpTables, + .FpArmv8, + .Perfmon, + .Crc, + .LslFast, + .FuseAddress, + .UsePostraScheduler, + .CustomCheapAsMove, + .PredictableSelectExpensive, + .FuseCsel, + .Exynosm3, + }, + CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType { + .ZczFp, + .Lse, + .FuseArithLogic, + .Lor, + .UsePostraScheduler, + .Uaops, + .CustomCheapAsMove, + .ArithBccFusion, + .Ccpp, + .Perfmon, + .Pan, + .Rdm, + .FuseLiterals, + .Force32bitJumpTables, + .LslFast, + .FuseAddress, + .ZczGp, + .Ras, + .FuseCsel, + .ArithCbzFusion, + .FuseAes, + .FpArmv8, + .Crc, + .Dotprod, + .Vh, + .Exynosm4, + }, + CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType { + .ZczFp, + .Lse, + .FuseArithLogic, + .Lor, + .UsePostraScheduler, + .Uaops, + .CustomCheapAsMove, + .ArithBccFusion, + .Ccpp, + .Perfmon, + .Pan, + .Rdm, + .FuseLiterals, + .Force32bitJumpTables, + .LslFast, + .FuseAddress, + .ZczGp, + .Ras, + .FuseCsel, + .ArithCbzFusion, + .FuseAes, + .FpArmv8, + .Crc, + .Dotprod, + .Vh, + .Exynosm4, + }, + CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType { + .ZczFp, + .Rdm, + .SlowStrqroStore, + .Perfmon, + .FpArmv8, + .Crc, + .LslFast, + .UsePostraScheduler, + .ZczGp, + .CustomCheapAsMove, + .PredictableSelectExpensive, + .Falkor, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + .Trbe, + .Ete, + .FpArmv8, + .FuseAes, + .Neon, + .Perfmon, + .UsePostraScheduler, + }, + CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType { + .ZczFp, + .Perfmon, + .FpArmv8, + .Crc, + .LslFast, + .UsePostraScheduler, + .ZczGp, + .CustomCheapAsMove, + .PredictableSelectExpensive, + .Kryo, + }, + CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .Neoversee1, + }, + CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { + .Rcpc, + .Spe, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + .Neoversen1, + }, + CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType { + .ZczFp, + .Nv, + .Am, + .Lse, + .Sel2, + .Lor, + .Tracev84, + .Uaops, + .UsePostraScheduler, + .CustomCheapAsMove, + .Ccpp, + .Perfmon, + .TlbRmi, + .PredictableSelectExpensive, + .Fmi, + .Rcpc, + .Pan, + .Rdm, + .LslFast, + .Pa, + .ZczGp, + .Dit, + .Ras, + .Spe, + .Mpam, + .FpArmv8, + .Ccidx, + .Dotprod, + .Crc, + .Vh, + .Saphira, + }, + CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + .Thunderx, + }, + CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType { + .Pan, + .Rdm, + .Vh, + .AggressiveFma, + .FpArmv8, + .Lse, + .Crc, + .Lor, + .UsePostraScheduler, + .ArithBccFusion, + .PredictableSelectExpensive, + .Thunderx2t99, + }, + CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + .Thunderxt81, + }, + CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + .Thunderxt83, + }, + CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + .Thunderxt88, + }, + CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType { + .Uaops, + .Spe, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Vh, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .UsePostraScheduler, + .CustomCheapAsMove, + .Ras, + .Tsv110, + }, + }; +}; diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..f035e0e368670903adef2ec9aa073e35df7f3a6b --- /dev/null +++ b/lib/std/target/cpu/AmdGpuCpu.zig @@ -0,0 +1,1060 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const AmdGpuCpu = enum { + Bonaire, + Carrizo, + Fiji, + Generic, + GenericHsa, + Gfx1010, + Gfx1011, + Gfx1012, + Gfx600, + Gfx601, + Gfx700, + Gfx701, + Gfx702, + Gfx703, + Gfx704, + Gfx801, + Gfx802, + Gfx803, + Gfx810, + Gfx900, + Gfx902, + Gfx904, + Gfx906, + Gfx908, + Gfx909, + Hainan, + Hawaii, + Iceland, + Kabini, + Kaveri, + Mullins, + Oland, + Pitcairn, + Polaris10, + Polaris11, + Stoney, + Tahiti, + Tonga, + Verde, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.AmdGpuFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType { + .CodeObjectV3, + .FastFmaf, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + .Xnack, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + .Wavefrontsize64, + }, + CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType { + .FlatAddressSpace, + .Wavefrontsize64, + }, + CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType { + .CodeObjectV3, + .DlInsts, + .NoXnackSupport, + .FlatSegmentOffsetBug, + .Gfx9Insts, + .NoSdstCmpx, + .Fp64, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .Dpp, + .RegisterBanking, + .Gfx10Insts, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .FlatAddressSpace, + .Gfx8Insts, + .FmaMixInsts, + .PkFmacF16Inst, + .Vop3Literal, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .Movrel, + .Dpp8, + .ApertureRegs, + .NoDataDepHazard, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Vscnt, + .Gfx10, + .InstFwdPrefetchBug, + .Ldsbankcount32, + .LdsBranchVmemWarHazard, + .LdsMisalignedBug, + .NsaEncoding, + .NsaToVmemBug, + .Offset3fBug, + .SmemToVectorWriteHazard, + .ScalarAtomics, + .ScalarFlatScratchInsts, + .ScalarStores, + .VmemToScalarWriteHazard, + .VcmpxExecWarHazard, + .VcmpxPermlaneHazard, + .Wavefrontsize32, + }, + CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType { + .CodeObjectV3, + .DlInsts, + .NoXnackSupport, + .Dot1Insts, + .Dot2Insts, + .Dot5Insts, + .Dot6Insts, + .FlatSegmentOffsetBug, + .Gfx9Insts, + .NoSdstCmpx, + .Fp64, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .Dpp, + .RegisterBanking, + .Gfx10Insts, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .FlatAddressSpace, + .Gfx8Insts, + .FmaMixInsts, + .PkFmacF16Inst, + .Vop3Literal, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .Movrel, + .Dpp8, + .ApertureRegs, + .NoDataDepHazard, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Vscnt, + .Gfx10, + .InstFwdPrefetchBug, + .Ldsbankcount32, + .LdsBranchVmemWarHazard, + .NsaEncoding, + .NsaToVmemBug, + .Offset3fBug, + .SmemToVectorWriteHazard, + .ScalarAtomics, + .ScalarFlatScratchInsts, + .ScalarStores, + .VmemToScalarWriteHazard, + .VcmpxExecWarHazard, + .VcmpxPermlaneHazard, + .Wavefrontsize32, + }, + CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType { + .CodeObjectV3, + .DlInsts, + .NoXnackSupport, + .Dot1Insts, + .Dot2Insts, + .Dot5Insts, + .Dot6Insts, + .FlatSegmentOffsetBug, + .Gfx9Insts, + .NoSdstCmpx, + .Fp64, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .Dpp, + .RegisterBanking, + .Gfx10Insts, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .FlatAddressSpace, + .Gfx8Insts, + .FmaMixInsts, + .PkFmacF16Inst, + .Vop3Literal, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .Movrel, + .Dpp8, + .ApertureRegs, + .NoDataDepHazard, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Vscnt, + .Gfx10, + .InstFwdPrefetchBug, + .Ldsbankcount32, + .LdsBranchVmemWarHazard, + .LdsMisalignedBug, + .NsaEncoding, + .NsaToVmemBug, + .Offset3fBug, + .SmemToVectorWriteHazard, + .ScalarAtomics, + .ScalarFlatScratchInsts, + .ScalarStores, + .VmemToScalarWriteHazard, + .VcmpxExecWarHazard, + .VcmpxPermlaneHazard, + .Wavefrontsize32, + }, + CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .FastFmaf, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + }, + CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .FastFmaf, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .FastFmaf, + .Ldsbankcount16, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount16, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType { + .CodeObjectV3, + .FastFmaf, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + .Xnack, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .SgprInitBug, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType { + .CodeObjectV3, + .Ldsbankcount16, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + .Xnack, + }, + CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType { + .CodeObjectV3, + .NoSramEccSupport, + .NoXnackSupport, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + .MadMixInsts, + }, + CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType { + .CodeObjectV3, + .NoSramEccSupport, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + .MadMixInsts, + .Xnack, + }, + CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType { + .CodeObjectV3, + .NoSramEccSupport, + .NoXnackSupport, + .FmaMixInsts, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + }, + CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType { + .CodeObjectV3, + .DlInsts, + .NoXnackSupport, + .Dot1Insts, + .Dot2Insts, + .FmaMixInsts, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType { + .AtomicFaddInsts, + .CodeObjectV3, + .DlInsts, + .Dot1Insts, + .Dot2Insts, + .Dot3Insts, + .Dot4Insts, + .Dot5Insts, + .Dot6Insts, + .FmaMixInsts, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + .MaiInsts, + .MfmaInlineLiteralBug, + .PkFmacF16Inst, + .SramEcc, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType { + .CodeObjectV3, + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Gfx9, + .Ldsbankcount32, + .MadMixInsts, + .Xnack, + }, + CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + }, + CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .FastFmaf, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .SgprInitBug, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount16, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount16, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + .SeaIslands, + }, + CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + }, + CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + }, + CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType { + .CodeObjectV3, + .Ldsbankcount16, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + .Xnack, + }, + CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .FastFmaf, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + .HalfRate64Ops, + }, + CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .SgprInitBug, + .UnpackedD16Vmem, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + .VolcanicIslands, + }, + CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType { + .CodeObjectV3, + .NoXnackSupport, + .Ldsbankcount32, + .Wavefrontsize64, + .MimgR128, + .Fp64, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize32768, + .SouthernIslands, + }, + }; +}; diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..5e60628d48177d300248ecdc3b2172763e6ac907 --- /dev/null +++ b/lib/std/target/cpu/ArmCpu.zig @@ -0,0 +1,1230 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const ArmCpu = enum { + Arm1020e, + Arm1020t, + Arm1022e, + Arm10e, + Arm10tdmi, + Arm1136jS, + Arm1136jfS, + Arm1156t2S, + Arm1156t2fS, + Arm1176jS, + Arm1176jzS, + Arm1176jzfS, + Arm710t, + Arm720t, + Arm7tdmi, + Arm7tdmiS, + Arm8, + Arm810, + Arm9, + Arm920, + Arm920t, + Arm922t, + Arm926ejS, + Arm940t, + Arm946eS, + Arm966eS, + Arm968eS, + Arm9e, + Arm9tdmi, + CortexA12, + CortexA15, + CortexA17, + CortexA32, + CortexA35, + CortexA5, + CortexA53, + CortexA55, + CortexA57, + CortexA7, + CortexA72, + CortexA73, + CortexA75, + CortexA76, + CortexA76ae, + CortexA8, + CortexA9, + CortexM0, + CortexM0plus, + CortexM1, + CortexM23, + CortexM3, + CortexM33, + CortexM35p, + CortexM4, + CortexM7, + CortexR4, + CortexR4f, + CortexR5, + CortexR52, + CortexR7, + CortexR8, + Cyclone, + Ep9312, + ExynosM1, + ExynosM2, + ExynosM3, + ExynosM4, + ExynosM5, + Generic, + Iwmmxt, + Krait, + Kryo, + Mpcore, + Mpcorenovfp, + NeoverseN1, + Sc000, + Sc300, + Strongarm, + Strongarm110, + Strongarm1100, + Strongarm1110, + Swift, + Xscale, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.ArmFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType { + .V4t, + .Armv5t, + }, + CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType { + .V4t, + .Armv5t, + }, + CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType { + .V4t, + .Dsp, + .Armv6, + }, + CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType { + .V4t, + .Dsp, + .Armv6, + .Slowfpvmlx, + .Fpregs, + .Vfp2, + }, + CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType { + .Thumb2, + .V4t, + .Dsp, + .Armv6t2, + }, + CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType { + .Thumb2, + .V4t, + .Dsp, + .Armv6t2, + .Slowfpvmlx, + .Fpregs, + .Vfp2, + }, + CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType { + .V4t, + .Trustzone, + .Armv6kz, + }, + CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType { + .V4t, + .Trustzone, + .Armv6kz, + }, + CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType { + .V4t, + .Trustzone, + .Armv6kz, + .Slowfpvmlx, + .Fpregs, + .Vfp2, + }, + CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidPartialCpsr, + .RetAddrStack, + .Mp, + .Trustzone, + .Fp16, + .Vfp4, + .VmlxForwarding, + .HwdivArm, + .Hwdiv, + .Virtualization, + .A12, + }, + CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidPartialCpsr, + .VldnAlign, + .DontWidenVmovs, + .RetAddrStack, + .Mp, + .MuxedUnits, + .SplatVfpNeon, + .Trustzone, + .Fp16, + .Vfp4, + .HwdivArm, + .Hwdiv, + .Virtualization, + .A15, + }, + CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidPartialCpsr, + .RetAddrStack, + .Mp, + .Trustzone, + .Fp16, + .Vfp4, + .VmlxForwarding, + .HwdivArm, + .Hwdiv, + .Virtualization, + .A17, + }, + CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + }, + CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + .A35, + }, + CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .RetAddrStack, + .Slowfpvmlx, + .Mp, + .SlowFpBrcc, + .Trustzone, + .Fp16, + .Vfp4, + .VmlxForwarding, + .A5, + }, + CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + .Fpao, + .A53, + }, + CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Dotprod, + .A55, + }, + CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .AvoidPartialCpsr, + .CheapPredicableCpsr, + .Crypto, + .Fpao, + .A57, + }, + CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .RetAddrStack, + .Slowfpvmlx, + .VmlxHazards, + .Mp, + .SlowFpBrcc, + .Trustzone, + .Fp16, + .Vfp4, + .VmlxForwarding, + .HwdivArm, + .Hwdiv, + .Virtualization, + .A7, + }, + CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + .A72, + }, + CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + .A73, + }, + CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Dotprod, + .A75, + }, + CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Crypto, + .Dotprod, + .Fullfp16, + .A76, + }, + CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Crypto, + .Dotprod, + .Fullfp16, + .A76, + }, + CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .RetAddrStack, + .Slowfpvmlx, + .VmlxHazards, + .NonpipelinedVfp, + .SlowFpBrcc, + .Trustzone, + .VmlxForwarding, + .A8, + }, + CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidPartialCpsr, + .VldnAlign, + .ExpandFpMlx, + .Fp16, + .RetAddrStack, + .VmlxHazards, + .Mp, + .MuxedUnits, + .NeonFpmovs, + .PreferVmovsr, + .Trustzone, + .VmlxForwarding, + .A9, + }, + CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + .Armv6M, + }, + CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + .Armv6M, + }, + CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + .Armv6M, + }, + CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .Msecext8, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .AcquireRelease, + .Armv8Mbase, + .NoMovt, + }, + CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .Armv7M, + .NoBranchPredictor, + .LoopAlign, + .UseAa, + .UseMisched, + .M3, + }, + CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Msecext8, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .AcquireRelease, + .Armv8Mmain, + .Dsp, + .Fp16, + .Fpregs, + .FpArmv8d16sp, + .NoBranchPredictor, + .Slowfpvmlx, + .LoopAlign, + .UseAa, + .UseMisched, + }, + CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Msecext8, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .AcquireRelease, + .Armv8Mmain, + .Dsp, + .Fp16, + .Fpregs, + .FpArmv8d16sp, + .NoBranchPredictor, + .Slowfpvmlx, + .LoopAlign, + .UseAa, + .UseMisched, + }, + CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .Armv7eM, + .NoBranchPredictor, + .Slowfpvmlx, + .LoopAlign, + .UseAa, + .UseMisched, + .Fp16, + .Fpregs, + .Vfp4d16sp, + }, + CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .Armv7eM, + .Fp16, + .Fpregs, + .FpArmv8d16, + }, + CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + .Armv7R, + .AvoidPartialCpsr, + .RetAddrStack, + .R4, + }, + CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + .Armv7R, + .AvoidPartialCpsr, + .RetAddrStack, + .Slowfpvmlx, + .SlowFpBrcc, + .Fpregs, + .Vfp3d16, + .R4, + }, + CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + .Armv7R, + .AvoidPartialCpsr, + .HwdivArm, + .RetAddrStack, + .Slowfpvmlx, + .SlowFpBrcc, + .Fpregs, + .Vfp3d16, + .R5, + }, + CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dfb, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .AcquireRelease, + .Armv8R, + .Fpao, + .UseAa, + .UseMisched, + .R52, + }, + CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + .Armv7R, + .AvoidPartialCpsr, + .Fp16, + .HwdivArm, + .RetAddrStack, + .Slowfpvmlx, + .Mp, + .SlowFpBrcc, + .Fpregs, + .Vfp3d16, + .R7, + }, + CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + .Armv7R, + .AvoidPartialCpsr, + .Fp16, + .HwdivArm, + .RetAddrStack, + .Slowfpvmlx, + .Mp, + .SlowFpBrcc, + .Fpregs, + .Vfp3d16, + }, + CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .AvoidMovsShop, + .AvoidPartialCpsr, + .Crypto, + .RetAddrStack, + .Slowfpvmlx, + .Neonfp, + .DisablePostraScheduler, + .UseMisched, + .Vfp4, + .Zcz, + .Swift, + }, + CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType { + .V4t, + .Armv4t, + }, + CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .ExpandFpMlx, + .RetAddrStack, + .UseAa, + .Exynos, + }, + CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .ExpandFpMlx, + .RetAddrStack, + .UseAa, + .Exynos, + }, + CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .ExpandFpMlx, + .RetAddrStack, + .UseAa, + .Exynos, + }, + CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Dotprod, + .Fullfp16, + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .ExpandFpMlx, + .RetAddrStack, + .UseAa, + .Exynos, + }, + CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Dotprod, + .Fullfp16, + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .ExpandFpMlx, + .RetAddrStack, + .UseAa, + .Exynos, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType { + .V4t, + .Armv5te, + }, + CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidPartialCpsr, + .VldnAlign, + .Fp16, + .HwdivArm, + .Hwdiv, + .RetAddrStack, + .MuxedUnits, + .Vfp4, + .VmlxForwarding, + .Krait, + }, + CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv8A, + .Crypto, + .Kryo, + }, + CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType { + .V4t, + .Armv6k, + .Slowfpvmlx, + .Fpregs, + .Vfp2, + }, + CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType { + .V4t, + .Armv6k, + }, + CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + .Armv82A, + .Crypto, + .Dotprod, + }, + CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + .Armv6M, + }, + CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .Armv7M, + .NoBranchPredictor, + .UseAa, + .UseMisched, + .M3, + }, + CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType { + .Armv4, + }, + CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + .Armv7A, + .AvoidMovsShop, + .AvoidPartialCpsr, + .HwdivArm, + .Hwdiv, + .RetAddrStack, + .Slowfpvmlx, + .VmlxHazards, + .Mp, + .Neonfp, + .DisablePostraScheduler, + .PreferIshst, + .ProfUnpr, + .SlowLoadDSubreg, + .SlowOddReg, + .SlowVdup32, + .SlowVgetlni32, + .UseMisched, + .WideStrideVfp, + .Fp16, + .Vfp4, + .Swift, + }, + CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType { + .V4t, + .Armv5te, + }, + }; +}; diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..529152899b222a49092aa6e5bb8188808fe518c5 --- /dev/null +++ b/lib/std/target/cpu/AvrCpu.zig @@ -0,0 +1,3863 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const AvrCpu = enum { + At43usb320, + At43usb355, + At76c711, + At86rf401, + At90c8534, + At90can128, + At90can32, + At90can64, + At90pwm1, + At90pwm161, + At90pwm2, + At90pwm216, + At90pwm2b, + At90pwm3, + At90pwm316, + At90pwm3b, + At90pwm81, + At90s1200, + At90s2313, + At90s2323, + At90s2333, + At90s2343, + At90s4414, + At90s4433, + At90s4434, + At90s8515, + At90s8535, + At90scr100, + At90usb1286, + At90usb1287, + At90usb162, + At90usb646, + At90usb647, + At90usb82, + At94k, + Ata5272, + Ata5505, + Ata5790, + Ata5795, + Ata6285, + Ata6286, + Ata6289, + Atmega103, + Atmega128, + Atmega1280, + Atmega1281, + Atmega1284, + Atmega1284p, + Atmega1284rfr2, + Atmega128a, + Atmega128rfa1, + Atmega128rfr2, + Atmega16, + Atmega161, + Atmega162, + Atmega163, + Atmega164a, + Atmega164p, + Atmega164pa, + Atmega165, + Atmega165a, + Atmega165p, + Atmega165pa, + Atmega168, + Atmega168a, + Atmega168p, + Atmega168pa, + Atmega169, + Atmega169a, + Atmega169p, + Atmega169pa, + Atmega16a, + Atmega16hva, + Atmega16hva2, + Atmega16hvb, + Atmega16hvbrevb, + Atmega16m1, + Atmega16u2, + Atmega16u4, + Atmega2560, + Atmega2561, + Atmega2564rfr2, + Atmega256rfr2, + Atmega32, + Atmega323, + Atmega324a, + Atmega324p, + Atmega324pa, + Atmega325, + Atmega3250, + Atmega3250a, + Atmega3250p, + Atmega3250pa, + Atmega325a, + Atmega325p, + Atmega325pa, + Atmega328, + Atmega328p, + Atmega329, + Atmega3290, + Atmega3290a, + Atmega3290p, + Atmega3290pa, + Atmega329a, + Atmega329p, + Atmega329pa, + Atmega32a, + Atmega32c1, + Atmega32hvb, + Atmega32hvbrevb, + Atmega32m1, + Atmega32u2, + Atmega32u4, + Atmega32u6, + Atmega406, + Atmega48, + Atmega48a, + Atmega48p, + Atmega48pa, + Atmega64, + Atmega640, + Atmega644, + Atmega644a, + Atmega644p, + Atmega644pa, + Atmega644rfr2, + Atmega645, + Atmega6450, + Atmega6450a, + Atmega6450p, + Atmega645a, + Atmega645p, + Atmega649, + Atmega6490, + Atmega6490a, + Atmega6490p, + Atmega649a, + Atmega649p, + Atmega64a, + Atmega64c1, + Atmega64hve, + Atmega64m1, + Atmega64rfr2, + Atmega8, + Atmega8515, + Atmega8535, + Atmega88, + Atmega88a, + Atmega88p, + Atmega88pa, + Atmega8a, + Atmega8hva, + Atmega8u2, + Attiny10, + Attiny102, + Attiny104, + Attiny11, + Attiny12, + Attiny13, + Attiny13a, + Attiny15, + Attiny1634, + Attiny167, + Attiny20, + Attiny22, + Attiny2313, + Attiny2313a, + Attiny24, + Attiny24a, + Attiny25, + Attiny26, + Attiny261, + Attiny261a, + Attiny28, + Attiny4, + Attiny40, + Attiny4313, + Attiny43u, + Attiny44, + Attiny44a, + Attiny45, + Attiny461, + Attiny461a, + Attiny48, + Attiny5, + Attiny828, + Attiny84, + Attiny84a, + Attiny85, + Attiny861, + Attiny861a, + Attiny87, + Attiny88, + Attiny9, + Atxmega128a1, + Atxmega128a1u, + Atxmega128a3, + Atxmega128a3u, + Atxmega128a4u, + Atxmega128b1, + Atxmega128b3, + Atxmega128c3, + Atxmega128d3, + Atxmega128d4, + Atxmega16a4, + Atxmega16a4u, + Atxmega16c4, + Atxmega16d4, + Atxmega16e5, + Atxmega192a3, + Atxmega192a3u, + Atxmega192c3, + Atxmega192d3, + Atxmega256a3, + Atxmega256a3b, + Atxmega256a3bu, + Atxmega256a3u, + Atxmega256c3, + Atxmega256d3, + Atxmega32a4, + Atxmega32a4u, + Atxmega32c4, + Atxmega32d4, + Atxmega32e5, + Atxmega32x1, + Atxmega384c3, + Atxmega384d3, + Atxmega64a1, + Atxmega64a1u, + Atxmega64a3, + Atxmega64a3u, + Atxmega64a4u, + Atxmega64b1, + Atxmega64b3, + Atxmega64c3, + Atxmega64d3, + Atxmega64d4, + Atxmega8e5, + Avr1, + Avr2, + Avr25, + Avr3, + Avr31, + Avr35, + Avr4, + Avr5, + Avr51, + Avr6, + Avrtiny, + Avrxmega1, + Avrxmega2, + Avrxmega3, + Avrxmega4, + Avrxmega5, + Avrxmega6, + Avrxmega7, + M3000, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.AvrFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Elpm, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr31, + }, + CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + }, + CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + }, + CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + .Lpmx, + .Movw, + }, + CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType { + .Avr0, + }, + CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + .Lpmx, + .Movw, + .Mul, + }, + CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Elpm, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr31, + }, + CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + .Lpmx, + .Movw, + .Mul, + .Spm, + }, + CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + .Lpmx, + .Movw, + .Mul, + .Spm, + }, + CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr6, + }, + CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr6, + }, + CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr6, + }, + CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr6, + }, + CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + .Lpmx, + .Movw, + .Mul, + .Spm, + }, + CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + .Lpmx, + .Movw, + .Mul, + .Spm, + }, + CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType { + .Lpm, + .Avr0, + .Avr1, + }, + CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType { + .Lpm, + .Avr0, + .Avr1, + }, + CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType { + .Lpm, + .Avr0, + .Avr1, + }, + CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + .Lpmx, + }, + CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType { + .Lpm, + .Avr0, + .Avr1, + }, + CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmegau, + }, + CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType { + .Lpm, + .Avr0, + .Avr1, + }, + CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + .Avr2, + }, + CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr25, + }, + CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr3, + }, + CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType { + .Ijmpcall, + .Sram, + .Elpm, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr31, + }, + CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr35, + }, + CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + .Avr4, + }, + CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr51, + }, + CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr6, + }, + CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + .Avrtiny, + }, + CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + .Xmega, + }, + CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Avr5, + }, + }; +}; diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..f53b00a915e3fcdb0359c1f80dca812399396eeb --- /dev/null +++ b/lib/std/target/cpu/BpfCpu.zig @@ -0,0 +1,29 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const BpfCpu = enum { + Generic, + Probe, + V1, + V2, + V3, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.BpfFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType { + }, + CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType { + }, + CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType { + }, + CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType { + }, + }; +}; diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..fc0449cb3b27468bea4d7a797988980cd9dc3ab5 --- /dev/null +++ b/lib/std/target/cpu/HexagonCpu.zig @@ -0,0 +1,103 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const HexagonCpu = enum { + Generic, + Hexagonv5, + Hexagonv55, + Hexagonv60, + Hexagonv62, + Hexagonv65, + Hexagonv66, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.HexagonFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + .V5, + .V55, + .V60, + .Duplex, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType { + .V5, + .Duplex, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType { + .V5, + .V55, + .Duplex, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType { + .V5, + .V55, + .V60, + .Duplex, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType { + .V5, + .V55, + .V60, + .V62, + .Duplex, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType { + .V5, + .V55, + .V60, + .V62, + .V65, + .Duplex, + .Mem_noshuf, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType { + .V5, + .V55, + .V60, + .V62, + .V65, + .V66, + .Duplex, + .Mem_noshuf, + .Memops, + .Packets, + .Nvj, + .Nvs, + .SmallData, + }, + }; +}; diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..fc1653d64785c60718b421f53ec867d14c0386c5 --- /dev/null +++ b/lib/std/target/cpu/MipsCpu.zig @@ -0,0 +1,190 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const MipsCpu = enum { + Mips1, + Mips2, + Mips3, + Mips32, + Mips32r2, + Mips32r3, + Mips32r5, + Mips32r6, + Mips4, + Mips5, + Mips64, + Mips64r2, + Mips64r3, + Mips64r5, + Mips64r6, + Octeon, + P5600, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.MipsFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType { + .Mips1, + }, + CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType { + .Mips1, + .Mips2, + }, + CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips3_32r2, + .Mips1, + .Gp64, + .Mips3, + }, + CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType { + .Mips3_32, + .Mips4_32, + .Mips1, + .Mips32, + }, + CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + .Mips32r2, + }, + CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + .Mips32r3, + }, + CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + .Mips32r5, + }, + CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Abs2008, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Nan2008, + .Mips5_32r2, + .Mips32r6, + }, + CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips4, + }, + CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Mips5, + }, + CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Mips64, + }, + CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Mips64r2, + }, + CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Mips64r3, + }, + CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Mips64r5, + }, + CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Abs2008, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Nan2008, + .Gp64, + .Mips5_32r2, + .Mips64r6, + }, + CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + .Cnmips, + .Mips64r2, + }, + CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + .P5600, + }, + }; +}; diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..e501c71063dc35f839f42eba4afeeac38efab36c --- /dev/null +++ b/lib/std/target/cpu/Msp430Cpu.zig @@ -0,0 +1,24 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const Msp430Cpu = enum { + Generic, + Msp430, + Msp430x, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.Msp430Feature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType { + .Ext, + }, + }; +}; diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..5519bc35cb24f8aafbe2352073d0b9b57f052f6f --- /dev/null +++ b/lib/std/target/cpu/NvptxCpu.zig @@ -0,0 +1,85 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const NvptxCpu = enum { + Sm_20, + Sm_21, + Sm_30, + Sm_32, + Sm_35, + Sm_37, + Sm_50, + Sm_52, + Sm_53, + Sm_60, + Sm_61, + Sm_62, + Sm_70, + Sm_72, + Sm_75, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.NvptxFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType { + .Sm_20, + }, + CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType { + .Sm_21, + }, + CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType { + .Sm_30, + }, + CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType { + .Ptx40, + .Sm_32, + }, + CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType { + .Sm_35, + }, + CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType { + .Ptx41, + .Sm_37, + }, + CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType { + .Ptx40, + .Sm_50, + }, + CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType { + .Ptx41, + .Sm_52, + }, + CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType { + .Ptx42, + .Sm_53, + }, + CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType { + .Ptx50, + .Sm_60, + }, + CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType { + .Ptx50, + .Sm_61, + }, + CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType { + .Ptx50, + .Sm_62, + }, + CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType { + .Ptx60, + .Sm_70, + }, + CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType { + .Ptx61, + .Sm_72, + }, + CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType { + .Ptx63, + .Sm_75, + }, + }; +}; diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..8b6deb3222db7df33f9ade0e54bf0ae640010910 --- /dev/null +++ b/lib/std/target/cpu/PowerPcCpu.zig @@ -0,0 +1,451 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const PowerPcCpu = enum { + 440, + 450, + 601, + 602, + 603, + E603, + Ev603, + 604, + E604, + 620, + 7400, + 7450, + 750, + 970, + A2, + A2q, + E500, + E500mc, + E5500, + G3, + G4, + G4+, + G5, + Generic, + Ppc, + Ppc32, + Ppc64, + Ppc64le, + Pwr3, + Pwr4, + Pwr5, + Pwr5x, + Pwr6, + Pwr6x, + Pwr7, + Pwr8, + Pwr9, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.PowerPcFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.440, "440", &[_]FeatureType { + .Icbt, + .Booke, + .HardFloat, + .Fres, + .Frsqrte, + .Isel, + .Msync, + }, + CpuInfo(@This()).create(.450, "450", &[_]FeatureType { + .Icbt, + .Booke, + .HardFloat, + .Fres, + .Frsqrte, + .Isel, + .Msync, + }, + CpuInfo(@This()).create(.601, "601", &[_]FeatureType { + .HardFloat, + .Fpu, + }, + CpuInfo(@This()).create(.602, "602", &[_]FeatureType { + .HardFloat, + .Fpu, + }, + CpuInfo(@This()).create(.603, "603", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.604, "604", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.620, "620", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType { + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType { + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.750, "750", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.970, "970", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType { + .Bit64, + .Icbt, + .Booke, + .Cmpb, + .HardFloat, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Recipprec, + .Stfiwx, + .SlowPopcntd, + }, + CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType { + .Bit64, + .Icbt, + .Booke, + .Cmpb, + .HardFloat, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Qpx, + .Recipprec, + .Stfiwx, + .SlowPopcntd, + }, + CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType { + .Icbt, + .Booke, + .Isel, + }, + CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType { + .Icbt, + .Booke, + .Isel, + .HardFloat, + .Stfiwx, + }, + CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType { + .Bit64, + .Icbt, + .Booke, + .Isel, + .Mfocrf, + .HardFloat, + .Stfiwx, + }, + CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType { + .HardFloat, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType { + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType { + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + }, + CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + .HardFloat, + }, + CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType { + .HardFloat, + }, + CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType { + .HardFloat, + }, + CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Bpermd, + .Cmpb, + .DirectMove, + .Extdiv, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Htm, + .Icbt, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Power8Altivec, + .Crypto, + .Power8Vector, + .Popcntd, + .PartwordAtomics, + .Recipprec, + .Stfiwx, + .TwoConstNr, + .Vsx, + }, + CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fres, + .Frsqrte, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Mfocrf, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Cmpb, + .Fcpsgn, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Lfiwax, + .Mfocrf, + .Recipprec, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Cmpb, + .Fcpsgn, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Lfiwax, + .Mfocrf, + .Recipprec, + .Stfiwx, + }, + CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Bpermd, + .Cmpb, + .Extdiv, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Popcntd, + .Recipprec, + .Stfiwx, + .TwoConstNr, + .Vsx, + }, + CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Bpermd, + .Cmpb, + .DirectMove, + .Extdiv, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Htm, + .Icbt, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Power8Altivec, + .Crypto, + .Power8Vector, + .Popcntd, + .PartwordAtomics, + .Recipprec, + .Stfiwx, + .TwoConstNr, + .Vsx, + }, + CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType { + .Bit64, + .HardFloat, + .Altivec, + .Bpermd, + .Cmpb, + .DirectMove, + .Extdiv, + .Fcpsgn, + .Fpcvt, + .Fprnd, + .Fre, + .Fres, + .Frsqrte, + .Frsqrtes, + .Fsqrt, + .Htm, + .Icbt, + .IsaV30Instructions, + .Isel, + .Ldbrx, + .Lfiwax, + .Mfocrf, + .Power8Altivec, + .Crypto, + .Power8Vector, + .Power9Altivec, + .Power9Vector, + .Popcntd, + .PpcPostraSched, + .PpcPreraSched, + .PartwordAtomics, + .Recipprec, + .Stfiwx, + .TwoConstNr, + .Vsx, + .VectorsUseTwoUnits, + }, + }; +}; diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..d5ba5144686670a4fed1802286350486490c0d40 --- /dev/null +++ b/lib/std/target/cpu/RiscVCpu.zig @@ -0,0 +1,23 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const RiscVCpu = enum { + GenericRv32, + GenericRv64, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.RiscVFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType { + .RvcHints, + }, + CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType { + .Bit64, + .RvcHints, + }, + }; +}; diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..e1887ad7c57fe5605dbcac981c9fb39c7aa483a0 --- /dev/null +++ b/lib/std/target/cpu/SparcCpu.zig @@ -0,0 +1,216 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const SparcCpu = enum { + At697e, + At697f, + F934, + Generic, + Gr712rc, + Gr740, + Hypersparc, + Leon2, + Leon3, + Leon4, + Ma2080, + Ma2085, + Ma2100, + Ma2150, + Ma2155, + Ma2450, + Ma2455, + Ma2480, + Ma2485, + Ma2x5x, + Ma2x8x, + Myriad2, + Myriad21, + Myriad22, + Myriad23, + Niagara, + Niagara2, + Niagara3, + Niagara4, + Sparclet, + Sparclite, + Sparclite86x, + Supersparc, + Tsc701, + Ultrasparc, + Ultrasparc3, + Ut699, + V7, + V8, + V9, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.SparcFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType { + .Leon, + .Insertnopload, + }, + CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType { + .Leon, + .Insertnopload, + }, + CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType { + .Leon, + .Leonpwrpsr, + .Hasleoncasa, + .Leoncyclecounter, + .Hasumacsmac, + }, + CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType { + .Leon, + }, + CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType { + .Leon, + .Hasumacsmac, + }, + CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType { + .Leon, + .Hasleoncasa, + .Hasumacsmac, + }, + CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType { + .Leon, + .Hasleoncasa, + }, + CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + .Vis2, + }, + CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + .Vis2, + .Popc, + }, + CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + .Vis2, + .Popc, + }, + CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + .Vis2, + .Vis3, + .Popc, + }, + CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + }, + CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType { + .DeprecatedV8, + .V9, + .Vis, + .Vis2, + }, + CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType { + .Leon, + .NoFmuls, + .NoFsmuld, + .Fixallfdivsqrt, + .Insertnopload, + }, + CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType { + .NoFsmuld, + .SoftMulDiv, + }, + CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType { + }, + CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType { + .V9, + }, + }; +}; diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..ec5efcc1aed4a9c042a2119fc25544bb807e8e49 --- /dev/null +++ b/lib/std/target/cpu/SystemZCpu.zig @@ -0,0 +1,279 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const SystemZCpu = enum { + Arch10, + Arch11, + Arch12, + Arch13, + Arch8, + Arch9, + Generic, + Z10, + Z13, + Z14, + Z15, + Z196, + ZEC12, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.SystemZFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType { + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadAndTrap, + .LoadStoreOnCond, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MiscellaneousExtensions, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + }, + CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MiscellaneousExtensions, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + }, + CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .GuardedStorage, + .HighWord, + .InsertReferenceBitsMultiple, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MessageSecurityAssistExtension7, + .MessageSecurityAssistExtension8, + .MiscellaneousExtensions, + .MiscellaneousExtensions2, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + .VectorEnhancements1, + .VectorPackedDecimal, + }, + CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DeflateConversion, + .DistinctOps, + .EnhancedDat2, + .EnhancedSort, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .GuardedStorage, + .HighWord, + .InsertReferenceBitsMultiple, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MessageSecurityAssistExtension7, + .MessageSecurityAssistExtension8, + .MessageSecurityAssistExtension9, + .MiscellaneousExtensions, + .MiscellaneousExtensions2, + .MiscellaneousExtensions3, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + .VectorEnhancements1, + .VectorEnhancements2, + .VectorPackedDecimal, + .VectorPackedDecimalEnhancement, + }, + CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType { + .DistinctOps, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadStoreOnCond, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .PopulationCount, + .ResetReferenceBitsMultiple, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MiscellaneousExtensions, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + }, + CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .GuardedStorage, + .HighWord, + .InsertReferenceBitsMultiple, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MessageSecurityAssistExtension7, + .MessageSecurityAssistExtension8, + .MiscellaneousExtensions, + .MiscellaneousExtensions2, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + .VectorEnhancements1, + .VectorPackedDecimal, + }, + CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType { + .DfpPackedConversion, + .DfpZonedConversion, + .DeflateConversion, + .DistinctOps, + .EnhancedDat2, + .EnhancedSort, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .GuardedStorage, + .HighWord, + .InsertReferenceBitsMultiple, + .InterlockedAccess1, + .LoadAndTrap, + .LoadAndZeroRightmostByte, + .LoadStoreOnCond, + .LoadStoreOnCond2, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MessageSecurityAssistExtension5, + .MessageSecurityAssistExtension7, + .MessageSecurityAssistExtension8, + .MessageSecurityAssistExtension9, + .MiscellaneousExtensions, + .MiscellaneousExtensions2, + .MiscellaneousExtensions3, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + .Vector, + .VectorEnhancements1, + .VectorEnhancements2, + .VectorPackedDecimal, + .VectorPackedDecimalEnhancement, + }, + CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType { + .DistinctOps, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadStoreOnCond, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .PopulationCount, + .ResetReferenceBitsMultiple, + }, + CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType { + .DfpZonedConversion, + .DistinctOps, + .EnhancedDat2, + .ExecutionHint, + .FpExtension, + .FastSerialization, + .HighWord, + .InterlockedAccess1, + .LoadAndTrap, + .LoadStoreOnCond, + .MessageSecurityAssistExtension3, + .MessageSecurityAssistExtension4, + .MiscellaneousExtensions, + .PopulationCount, + .ProcessorAssist, + .ResetReferenceBitsMultiple, + .TransactionalExecution, + }, + }; +}; diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..b68b859c13a7f0b4482b3a7bcdc58d442514ce73 --- /dev/null +++ b/lib/std/target/cpu/WebAssemblyCpu.zig @@ -0,0 +1,28 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const WebAssemblyCpu = enum { + BleedingEdge, + Generic, + Mvp, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.WebAssemblyFeature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType { + .Atomics, + .MutableGlobals, + .NontrappingFptoint, + .Simd128, + .SignExt, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType { + }, + }; +}; diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..dba81c654da297232465b0de0871aeefba31285c --- /dev/null +++ b/lib/std/target/cpu/X86Cpu.zig @@ -0,0 +1,1864 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const X86Cpu = enum { + Amdfam10, + Athlon, + Athlon4, + AthlonFx, + AthlonMp, + AthlonTbird, + AthlonXp, + Athlon64, + Athlon64Sse3, + Atom, + Barcelona, + Bdver1, + Bdver2, + Bdver3, + Bdver4, + Bonnell, + Broadwell, + Btver1, + Btver2, + C3, + C32, + Cannonlake, + Cascadelake, + Cooperlake, + CoreAvxI, + CoreAvx2, + Core2, + Corei7, + Corei7Avx, + Generic, + Geode, + Goldmont, + GoldmontPlus, + Haswell, + I386, + I486, + I586, + I686, + IcelakeClient, + IcelakeServer, + Ivybridge, + K6, + K62, + K63, + K8, + K8Sse3, + Knl, + Knm, + Lakemont, + Nehalem, + Nocona, + Opteron, + OpteronSse3, + Penryn, + Pentium, + PentiumM, + PentiumMmx, + Pentium2, + Pentium3, + Pentium3m, + Pentium4, + Pentium4m, + Pentiumpro, + Prescott, + Sandybridge, + Silvermont, + Skx, + Skylake, + SkylakeAvx512, + Slm, + Tigerlake, + Tremont, + Westmere, + WinchipC6, + Winchip2, + X8664, + Yonah, + Znver1, + Znver2, + + pub fn getInfo(self: @This()) CpuInfo { + return cpu_infos[@enumToInt(self)]; + } + + pub const FeatureType = feature.X86Feature; + + const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { + CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastScalarShiftMasks, + .Sahf, + .Lzcnt, + .Nopl, + .Popcnt, + .Sse, + .Sse4a, + .SlowShld, + .X87, + }, + CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cmov, + .Cx8, + .Nopl, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cmov, + .Cx8, + .Fxsr, + .Nopl, + .Sse, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse2, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cmov, + .Cx8, + .Fxsr, + .Nopl, + .Sse, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cmov, + .Cx8, + .Nopl, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cmov, + .Cx8, + .Fxsr, + .Nopl, + .Sse, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse2, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse3, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .LeaSp, + .LeaUsesAg, + .Mmx, + .Movbe, + .Nopl, + .PadShortFunctions, + .Sse, + .Ssse3, + .IdivlToDivb, + .IdivqToDivl, + .SlowTwoMemOps, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastScalarShiftMasks, + .Sahf, + .Lzcnt, + .Nopl, + .Popcnt, + .Sse, + .Sse4a, + .SlowShld, + .X87, + }, + CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Branchfusion, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Fast11bytenop, + .FastScalarShiftMasks, + .Sahf, + .Lwp, + .Lzcnt, + .Mmx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .SlowShld, + .X87, + .Xop, + .Xsave, + }, + CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Bmi, + .Branchfusion, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fma, + .Fxsr, + .Fast11bytenop, + .FastBextr, + .FastScalarShiftMasks, + .Sahf, + .Lwp, + .Lzcnt, + .Mmx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .SlowShld, + .Tbm, + .X87, + .Xop, + .Xsave, + }, + CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Bmi, + .Branchfusion, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .Fast11bytenop, + .FastBextr, + .FastScalarShiftMasks, + .Sahf, + .Lwp, + .Lzcnt, + .Mmx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .SlowShld, + .Tbm, + .X87, + .Xop, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Avx2, + .Bmi, + .Bmi2, + .Branchfusion, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .Fast11bytenop, + .FastBextr, + .FastScalarShiftMasks, + .Sahf, + .Lwp, + .Lzcnt, + .Mmx, + .Mwaitx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .SlowShld, + .Tbm, + .X87, + .Xop, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .LeaSp, + .LeaUsesAg, + .Mmx, + .Movbe, + .Nopl, + .PadShortFunctions, + .Sse, + .Ssse3, + .IdivlToDivb, + .IdivqToDivl, + .SlowTwoMemOps, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Avx, + .Avx2, + .Bmi, + .Bmi2, + .Cmov, + .Cx8, + .Cx16, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .Invpcid, + .Sahf, + .Lzcnt, + .FalseDepsLzcntTzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Rdrnd, + .Rdseed, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Fast15bytenop, + .FastScalarShiftMasks, + .FastVectorShiftMasks, + .Sahf, + .Lzcnt, + .Mmx, + .Nopl, + .Popcnt, + .Prfchw, + .Sse, + .Sse4a, + .Ssse3, + .SlowShld, + .X87, + }, + CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Avx, + .Bmi, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fxsr, + .Fast15bytenop, + .FastBextr, + .FastHops, + .FastLzcnt, + .FastPartialYmmOrZmmWrite, + .FastScalarShiftMasks, + .FastVectorShiftMasks, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .Sse4a, + .Ssse3, + .SlowShld, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType { + .Mmx, + .Dnow3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Sse, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Avx512ifma, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .Prfchw, + .Prefer256Bit, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Avx512vbmi, + .Avx512vl, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Prefer256Bit, + .Rdrnd, + .Rdseed, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Avx512vl, + .Avx512vnni, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Avx512bf16, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Prefer256Bit, + .Rdrnd, + .Rdseed, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Avx512vl, + .Avx512vnni, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .Sahf, + .Mmx, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Rdrnd, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .SlowUnalignedMem32, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Avx2, + .Bmi, + .Bmi2, + .Cmov, + .Cx8, + .Cx16, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .Invpcid, + .Sahf, + .Lzcnt, + .FalseDepsLzcntTzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Rdrnd, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Macrofusion, + .Nopl, + .Sse, + .Ssse3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Macrofusion, + .Nopl, + .Popcnt, + .Sse, + .Sse42, + .X87, + }, + CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .Sahf, + .Mmx, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .SlowUnalignedMem32, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Clflushopt, + .Cmov, + .Cx8, + .Cx16, + .Fsgsbase, + .Fxsr, + .Sahf, + .Mmx, + .Movbe, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Rdrnd, + .Rdseed, + .Sha, + .Sse42, + .Ssse3, + .SlowIncdec, + .SlowLea, + .SlowTwoMemOps, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Clflushopt, + .Cmov, + .Cx8, + .Cx16, + .Fsgsbase, + .Fxsr, + .Sahf, + .Mmx, + .Movbe, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .Ptwrite, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Sse42, + .Ssse3, + .SlowIncdec, + .SlowLea, + .SlowTwoMemOps, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Avx2, + .Bmi, + .Bmi2, + .Cmov, + .Cx8, + .Cx16, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .Invpcid, + .Sahf, + .Lzcnt, + .FalseDepsLzcntTzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Rdrnd, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType { + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType { + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType { + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType { + .Cmov, + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Avx512bitalg, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .Gfni, + .FastGather, + .Avx512ifma, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .Prfchw, + .Prefer256Bit, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Vaes, + .Avx512vbmi, + .Avx512vbmi2, + .Avx512vl, + .Avx512vnni, + .Vpclmulqdq, + .Avx512vpopcntdq, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Avx512bitalg, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .Gfni, + .FastGather, + .Avx512ifma, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pconfig, + .Pku, + .Popcnt, + .Prfchw, + .Prefer256Bit, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Vaes, + .Avx512vbmi, + .Avx512vbmi2, + .Avx512vl, + .Avx512vnni, + .Vpclmulqdq, + .Avx512vpopcntdq, + .Wbnoinvd, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .Sahf, + .Mmx, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Rdrnd, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .SlowUnalignedMem32, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType { + .Cx8, + .Mmx, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType { + .Mmx, + .Dnow3, + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType { + .Mmx, + .Dnow3, + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse2, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse3, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512cd, + .Cmov, + .Cx8, + .Cx16, + .Avx512er, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastPartialYmmOrZmmWrite, + .FastGather, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Nopl, + .Pclmul, + .Avx512pf, + .Popcnt, + .Prefetchwt1, + .Prfchw, + .Rdrnd, + .Rdseed, + .Slow3opsLea, + .IdivqToDivl, + .SlowIncdec, + .SlowPmaddwd, + .SlowTwoMemOps, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512cd, + .Cmov, + .Cx8, + .Cx16, + .Avx512er, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastPartialYmmOrZmmWrite, + .FastGather, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Nopl, + .Pclmul, + .Avx512pf, + .Popcnt, + .Prefetchwt1, + .Prfchw, + .Rdrnd, + .Rdseed, + .Slow3opsLea, + .IdivqToDivl, + .SlowIncdec, + .SlowPmaddwd, + .SlowTwoMemOps, + .Avx512vpopcntdq, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType { + }, + CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Macrofusion, + .Nopl, + .Popcnt, + .Sse, + .Sse42, + .X87, + }, + CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse2, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType { + .Mmx, + .Dnowa3, + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastScalarShiftMasks, + .Nopl, + .Sse, + .Sse3, + .SlowShld, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Macrofusion, + .Nopl, + .Sse, + .Sse41, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType { + .Cx8, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse2, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType { + .Cx8, + .Mmx, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse2, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse2, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType { + .Cmov, + .Cx8, + .Nopl, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType { + .Bit64, + .Sse, + .Avx, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .Sahf, + .Mmx, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .SlowUnalignedMem32, + .X87, + .Xsave, + .Xsaveopt, + }, + CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Movbe, + .Nopl, + .Sse, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Rdrnd, + .Sse42, + .Ssse3, + .IdivqToDivl, + .SlowIncdec, + .SlowLea, + .SlowPmulld, + .SlowTwoMemOps, + .X87, + }, + CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Prefer256Bit, + .Rdrnd, + .Rdseed, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Avx512vl, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Bmi, + .Bmi2, + .Clflushopt, + .Cmov, + .Cx8, + .Cx16, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Rdrnd, + .Rdseed, + .Sgx, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .FastGather, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Prefer256Bit, + .Rdrnd, + .Rdseed, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Avx512vl, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Movbe, + .Nopl, + .Sse, + .Pclmul, + .Popcnt, + .FalseDepsPopcnt, + .Prfchw, + .Rdrnd, + .Sse42, + .Ssse3, + .IdivqToDivl, + .SlowIncdec, + .SlowLea, + .SlowPmulld, + .SlowTwoMemOps, + .X87, + }, + CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx, + .Avx2, + .Avx512f, + .Avx512bitalg, + .Bmi, + .Bmi2, + .Avx512bw, + .Avx512cd, + .Clflushopt, + .Clwb, + .Cmov, + .Cx8, + .Cx16, + .Avx512dq, + .Ermsb, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .FastShldRotate, + .FastScalarFsqrt, + .FastVariableShuffle, + .FastVectorFsqrt, + .Gfni, + .FastGather, + .Avx512ifma, + .Invpcid, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Movdir64b, + .Movdiri, + .Macrofusion, + .MergeToThreewayBranch, + .Nopl, + .Pclmul, + .Pku, + .Popcnt, + .Prfchw, + .Prefer256Bit, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Shstk, + .Sse42, + .Slow3opsLea, + .IdivqToDivl, + .Vaes, + .Avx512vbmi, + .Avx512vbmi2, + .Avx512vl, + .Avx512vnni, + .Avx512vp2intersect, + .Vpclmulqdq, + .Avx512vpopcntdq, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType { + .Bit64, + .Sse, + .Aes, + .Cldemote, + .Clflushopt, + .Cmov, + .Cx8, + .Cx16, + .Fsgsbase, + .Fxsr, + .Gfni, + .Sahf, + .Mmx, + .Movbe, + .Movdir64b, + .Movdiri, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .Ptwrite, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sgx, + .Sha, + .Sse42, + .Ssse3, + .SlowIncdec, + .SlowLea, + .SlowTwoMemOps, + .Waitpkg, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Cx16, + .Fxsr, + .Sahf, + .Mmx, + .Macrofusion, + .Nopl, + .Sse, + .Pclmul, + .Popcnt, + .Sse42, + .X87, + }, + CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType { + .Mmx, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType { + .Mmx, + .Dnow3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType { + .Bit64, + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Macrofusion, + .Nopl, + .Sse, + .Sse2, + .Slow3opsLea, + .SlowIncdec, + .X87, + }, + CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType { + .Cmov, + .Cx8, + .Fxsr, + .Mmx, + .Nopl, + .Sse, + .Sse3, + .SlowUnalignedMem16, + .X87, + }, + CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx2, + .Bmi, + .Bmi2, + .Branchfusion, + .Clflushopt, + .Clzero, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .Fast15bytenop, + .FastBextr, + .FastLzcnt, + .FastScalarShiftMasks, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Mwaitx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .Rdrnd, + .Rdseed, + .Sha, + .Sse4a, + .SlowShld, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType { + .Bit64, + .Adx, + .Sse, + .Aes, + .Avx2, + .Bmi, + .Bmi2, + .Branchfusion, + .Clflushopt, + .Clwb, + .Clzero, + .Cmov, + .Cx8, + .Cx16, + .F16c, + .Fma, + .Fsgsbase, + .Fxsr, + .Fast15bytenop, + .FastBextr, + .FastLzcnt, + .FastScalarShiftMasks, + .Sahf, + .Lzcnt, + .Mmx, + .Movbe, + .Mwaitx, + .Nopl, + .Pclmul, + .Popcnt, + .Prfchw, + .Rdpid, + .Rdrnd, + .Rdseed, + .Sha, + .Sse4a, + .SlowShld, + .Wbnoinvd, + .X87, + .Xsave, + .Xsavec, + .Xsaveopt, + .Xsaves, + }, + }; +}; diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig new file mode 100644 index 0000000000000000000000000000000000000000..79e1826ddc8975f7cf34b56e03601505939199d2 --- /dev/null +++ b/lib/std/target/cpu/empty.zig @@ -0,0 +1,6 @@ +const feature = @import("std").target.feature; +const CpuInfo = @import("std").target.cpu.CpuInfo; + +pub const EmptyCpu = enum { + pub const cpu_infos = [0]CpuInfo(@This()) {}; +}; diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig new file mode 100644 index 0000000000000000000000000000000000000000..31dce695a5ef430a4c3b1538ab3fa58b92bb2847 --- /dev/null +++ b/lib/std/target/feature.zig @@ -0,0 +1,76 @@ +const builtin = @import("builtin"); +const std = @import("std"); +const Arch = std.Target.Arch; + +pub const AArch64Feature = @import("feature/AArch64Feature.zig").AArch64Feature; +pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature; +pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature; +pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature; +pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature; +pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; +pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature; +pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature; +pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature; +pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature; +pub const RiscVFeature = @import("feature/RiscVFeature.zig").RiscVFeature; +pub const SparcFeature = @import("feature/SparcFeature.zig").SparcFeature; +pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature; +pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature; +pub const X86Feature = @import("feature/X86Feature.zig").X86Feature; + +const EmptyFeature = @import("feature/empty.zig").EmptyFeature; + +pub fn ArchFeature(comptime arch: @TagType(Arch)) type { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => ArmFeature, + .aarch64, .aarch64_be, .aarch64_32 => AArch64Feature, + .avr => AvrFeature, + .bpfel, .bpfeb => BpfFeature, + .hexagon => HexagonFeature, + .mips, .mipsel, .mips64, .mips64el => MipsFeature, + .msp430 => Msp430Feature, + .powerpc, .powerpc64, .powerpc64le => PowerPcFeature, + .amdgcn => AmdGpuFeature, + .riscv32, .riscv64 => RiscVFeature, + .sparc, .sparcv9, .sparcel => SparcFeature, + .s390x => SystemZFeature, + .i386, .x86_64 => X86Feature, + .nvptx, .nvptx64 => NvptxFeature, + .wasm32, .wasm64 => WebAssemblyFeature, + + else => EmptyFeature, + }; +} + +pub fn ArchFeatureInfo(comptime arch: @TagType(Arch)) type { + return FeatureInfo(ArchFeature(arch)); +} + +pub fn FeatureInfo(comptime EnumType: type) type { + return struct { + value: EnumType, + name: []const u8, + + dependencies: []const EnumType, + + const Self = @This(); + + fn create(value: EnumType, name: []const u8) Self { + return Self { + .value = value, + .name = name, + + .dependencies = &[_]EnumType{}, + }; + } + + fn createWithDeps(value: EnumType, name: []const u8, dependencies: []const EnumType) Self { + return Self { + .value = value, + .name = name, + + .dependencies = dependencies, + }; + } + }; +} diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig new file mode 100644 index 0000000000000000000000000000000000000000..849c028169709b92a91c8101faf4481786da574d --- /dev/null +++ b/lib/std/target/feature/AArch64Feature.zig @@ -0,0 +1,750 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const AArch64Feature = enum { + Aes, + Am, + AggressiveFma, + Altnzcv, + AlternateSextloadCvtF32Pattern, + ArithBccFusion, + ArithCbzFusion, + BalanceFpOps, + Bti, + Ccidx, + Ccpp, + Crc, + Ccdp, + CallSavedX8, + CallSavedX9, + CallSavedX10, + CallSavedX11, + CallSavedX12, + CallSavedX13, + CallSavedX14, + CallSavedX15, + CallSavedX18, + Complxnum, + Crypto, + CustomCheapAsMove, + Dit, + DisableLatencySchedHeuristic, + Dotprod, + Ete, + ExynosCheapAsMove, + Fmi, + Fp16fml, + FpArmv8, + Fptoint, + Force32bitJumpTables, + Fullfp16, + FuseAes, + FuseAddress, + FuseArithLogic, + FuseCsel, + FuseCryptoEor, + FuseLiterals, + Jsconv, + Lor, + Lse, + LslFast, + Mpam, + Mte, + Neon, + Nv, + NoNegImmediates, + Pa, + Pan, + PanRwv, + Perfmon, + UsePostraScheduler, + Predres, + PredictableSelectExpensive, + Uaops, + Ras, + Rasv8_4, + Rcpc, + RcpcImmo, + Rdm, + Rand, + ReserveX1, + ReserveX2, + ReserveX3, + ReserveX4, + ReserveX5, + ReserveX6, + ReserveX7, + ReserveX9, + ReserveX10, + ReserveX11, + ReserveX12, + ReserveX13, + ReserveX14, + ReserveX15, + ReserveX18, + ReserveX20, + ReserveX21, + ReserveX22, + ReserveX23, + ReserveX24, + ReserveX25, + ReserveX26, + ReserveX27, + ReserveX28, + Sb, + Sel2, + Sha2, + Sha3, + Sm4, + Spe, + Ssbs, + Sve, + Sve2, + Sve2Aes, + Sve2Bitperm, + Sve2Sha3, + Sve2Sm4, + SlowMisaligned128store, + SlowPaired128, + SlowStrqroStore, + Specrestrict, + StrictAlign, + TlbRmi, + Tme, + Tracev84, + Trbe, + TaggedGlobals, + UseAa, + TpidrEl1, + TpidrEl2, + TpidrEl3, + UseReciprocalSquareRoot, + Vh, + Zcm, + Zcz, + ZczFp, + ZczFpWorkaround, + ZczGp, + V81a, + V82a, + V83a, + V84a, + V85a, + A35, + A53, + A55, + A57, + A65, + A72, + A73, + A75, + A76, + Cyclone, + Exynosm1, + Exynosm2, + Exynosm3, + Exynosm4, + Falkor, + Kryo, + Neoversee1, + Neoversen1, + Saphira, + Tsv110, + Thunderx, + Thunderx2t99, + Thunderxt81, + Thunderxt83, + Thunderxt88, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.Am, "am", "Enable v8.4-A Activity Monitors extension", "am"), + FeatureInfo(@This()).create(.AggressiveFma, "aggressive-fma", "Enable Aggressive FMA for floating-point.", "aggressive-fma"), + FeatureInfo(@This()).create(.Altnzcv, "altnzcv", "Enable alternative NZCV format for floating point comparisons", "altnzcv"), + FeatureInfo(@This()).create(.AlternateSextloadCvtF32Pattern, "alternate-sextload-cvt-f32-pattern", "Use alternative pattern for sextload convert to f32", "alternate-sextload-cvt-f32-pattern"), + FeatureInfo(@This()).create(.ArithBccFusion, "arith-bcc-fusion", "CPU fuses arithmetic+bcc operations", "arith-bcc-fusion"), + FeatureInfo(@This()).create(.ArithCbzFusion, "arith-cbz-fusion", "CPU fuses arithmetic + cbz/cbnz operations", "arith-cbz-fusion"), + FeatureInfo(@This()).create(.BalanceFpOps, "balance-fp-ops", "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", "balance-fp-ops"), + FeatureInfo(@This()).create(.Bti, "bti", "Enable Branch Target Identification", "bti"), + FeatureInfo(@This()).create(.Ccidx, "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", "ccidx"), + FeatureInfo(@This()).create(.Ccpp, "ccpp", "Enable v8.2 data Cache Clean to Point of Persistence", "ccpp"), + FeatureInfo(@This()).create(.Crc, "crc", "Enable ARMv8 CRC-32 checksum instructions", "crc"), + FeatureInfo(@This()).create(.Ccdp, "ccdp", "Enable v8.5 Cache Clean to Point of Deep Persistence", "ccdp"), + FeatureInfo(@This()).create(.CallSavedX8, "call-saved-x8", "Make X8 callee saved.", "call-saved-x8"), + FeatureInfo(@This()).create(.CallSavedX9, "call-saved-x9", "Make X9 callee saved.", "call-saved-x9"), + FeatureInfo(@This()).create(.CallSavedX10, "call-saved-x10", "Make X10 callee saved.", "call-saved-x10"), + FeatureInfo(@This()).create(.CallSavedX11, "call-saved-x11", "Make X11 callee saved.", "call-saved-x11"), + FeatureInfo(@This()).create(.CallSavedX12, "call-saved-x12", "Make X12 callee saved.", "call-saved-x12"), + FeatureInfo(@This()).create(.CallSavedX13, "call-saved-x13", "Make X13 callee saved.", "call-saved-x13"), + FeatureInfo(@This()).create(.CallSavedX14, "call-saved-x14", "Make X14 callee saved.", "call-saved-x14"), + FeatureInfo(@This()).create(.CallSavedX15, "call-saved-x15", "Make X15 callee saved.", "call-saved-x15"), + FeatureInfo(@This()).create(.CallSavedX18, "call-saved-x18", "Make X18 callee saved.", "call-saved-x18"), + FeatureInfo(@This()).createWithSubfeatures(.Complxnum, "complxnum", "Enable v8.3-A Floating-point complex number support", "complxnum", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable cryptographic instructions", "crypto", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.CustomCheapAsMove, "custom-cheap-as-move", "Use custom handling of cheap instructions", "custom-cheap-as-move"), + FeatureInfo(@This()).create(.Dit, "dit", "Enable v8.4-A Data Independent Timing instructions", "dit"), + FeatureInfo(@This()).create(.DisableLatencySchedHeuristic, "disable-latency-sched-heuristic", "Disable latency scheduling heuristic", "disable-latency-sched-heuristic"), + FeatureInfo(@This()).create(.Dotprod, "dotprod", "Enable dot product support", "dotprod"), + FeatureInfo(@This()).createWithSubfeatures(.Ete, "ete", "Enable Embedded Trace Extension", "ete", &[_]@This() { + .Trbe, + }), + FeatureInfo(@This()).createWithSubfeatures(.ExynosCheapAsMove, "exynos-cheap-as-move", "Use Exynos specific handling of cheap instructions", "exynos-cheap-as-move", &[_]@This() { + .CustomCheapAsMove, + }), + FeatureInfo(@This()).create(.Fmi, "fmi", "Enable v8.4-A Flag Manipulation Instructions", "fmi"), + FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable FP16 FML instructions", "fp16fml", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8"), + FeatureInfo(@This()).create(.Fptoint, "fptoint", "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", "fptoint"), + FeatureInfo(@This()).create(.Force32bitJumpTables, "force-32bit-jump-tables", "Force jump table entries to be 32-bits wide except at MinSize", "force-32bit-jump-tables"), + FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Full FP16", "fullfp16", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), + FeatureInfo(@This()).create(.FuseAddress, "fuse-address", "CPU fuses address generation and memory operations", "fuse-address"), + FeatureInfo(@This()).create(.FuseArithLogic, "fuse-arith-logic", "CPU fuses arithmetic and logic operations", "fuse-arith-logic"), + FeatureInfo(@This()).create(.FuseCsel, "fuse-csel", "CPU fuses conditional select operations", "fuse-csel"), + FeatureInfo(@This()).create(.FuseCryptoEor, "fuse-crypto-eor", "CPU fuses AES/PMULL and EOR operations", "fuse-crypto-eor"), + FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), + FeatureInfo(@This()).createWithSubfeatures(.Jsconv, "jsconv", "Enable v8.3-A JavaScript FP conversion enchancement", "jsconv", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.Lor, "lor", "Enables ARM v8.1 Limited Ordering Regions extension", "lor"), + FeatureInfo(@This()).create(.Lse, "lse", "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", "lse"), + FeatureInfo(@This()).create(.LslFast, "lsl-fast", "CPU has a fastpath logical shift of up to 3 places", "lsl-fast"), + FeatureInfo(@This()).create(.Mpam, "mpam", "Enable v8.4-A Memory system Partitioning and Monitoring extension", "mpam"), + FeatureInfo(@This()).create(.Mte, "mte", "Enable Memory Tagging Extension", "mte"), + FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable Advanced SIMD instructions", "neon", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.Nv, "nv", "Enable v8.4-A Nested Virtualization Enchancement", "nv"), + FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"), + FeatureInfo(@This()).create(.Pa, "pa", "Enable v8.3-A Pointer Authentication enchancement", "pa"), + FeatureInfo(@This()).create(.Pan, "pan", "Enables ARM v8.1 Privileged Access-Never extension", "pan"), + FeatureInfo(@This()).createWithSubfeatures(.PanRwv, "pan-rwv", "Enable v8.2 PAN s1e1R and s1e1W Variants", "pan-rwv", &[_]@This() { + .Pan, + }), + FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", "perfmon"), + FeatureInfo(@This()).create(.UsePostraScheduler, "use-postra-scheduler", "Schedule again after register allocation", "use-postra-scheduler"), + FeatureInfo(@This()).create(.Predres, "predres", "Enable v8.5a execution and data prediction invalidation instructions", "predres"), + FeatureInfo(@This()).create(.PredictableSelectExpensive, "predictable-select-expensive", "Prefer likely predicted branches over selects", "predictable-select-expensive"), + FeatureInfo(@This()).create(.Uaops, "uaops", "Enable v8.2 UAO PState", "uaops"), + FeatureInfo(@This()).create(.Ras, "ras", "Enable ARMv8 Reliability, Availability and Serviceability Extensions", "ras"), + FeatureInfo(@This()).createWithSubfeatures(.Rasv8_4, "rasv8_4", "Enable v8.4-A Reliability, Availability and Serviceability extension", "rasv8_4", &[_]@This() { + .Ras, + }), + FeatureInfo(@This()).create(.Rcpc, "rcpc", "Enable support for RCPC extension", "rcpc"), + FeatureInfo(@This()).createWithSubfeatures(.RcpcImmo, "rcpc-immo", "Enable v8.4-A RCPC instructions with Immediate Offsets", "rcpc-immo", &[_]@This() { + .Rcpc, + }), + FeatureInfo(@This()).create(.Rdm, "rdm", "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", "rdm"), + FeatureInfo(@This()).create(.Rand, "rand", "Enable Random Number generation instructions", "rand"), + FeatureInfo(@This()).create(.ReserveX1, "reserve-x1", "Reserve X1, making it unavailable as a GPR", "reserve-x1"), + FeatureInfo(@This()).create(.ReserveX2, "reserve-x2", "Reserve X2, making it unavailable as a GPR", "reserve-x2"), + FeatureInfo(@This()).create(.ReserveX3, "reserve-x3", "Reserve X3, making it unavailable as a GPR", "reserve-x3"), + FeatureInfo(@This()).create(.ReserveX4, "reserve-x4", "Reserve X4, making it unavailable as a GPR", "reserve-x4"), + FeatureInfo(@This()).create(.ReserveX5, "reserve-x5", "Reserve X5, making it unavailable as a GPR", "reserve-x5"), + FeatureInfo(@This()).create(.ReserveX6, "reserve-x6", "Reserve X6, making it unavailable as a GPR", "reserve-x6"), + FeatureInfo(@This()).create(.ReserveX7, "reserve-x7", "Reserve X7, making it unavailable as a GPR", "reserve-x7"), + FeatureInfo(@This()).create(.ReserveX9, "reserve-x9", "Reserve X9, making it unavailable as a GPR", "reserve-x9"), + FeatureInfo(@This()).create(.ReserveX10, "reserve-x10", "Reserve X10, making it unavailable as a GPR", "reserve-x10"), + FeatureInfo(@This()).create(.ReserveX11, "reserve-x11", "Reserve X11, making it unavailable as a GPR", "reserve-x11"), + FeatureInfo(@This()).create(.ReserveX12, "reserve-x12", "Reserve X12, making it unavailable as a GPR", "reserve-x12"), + FeatureInfo(@This()).create(.ReserveX13, "reserve-x13", "Reserve X13, making it unavailable as a GPR", "reserve-x13"), + FeatureInfo(@This()).create(.ReserveX14, "reserve-x14", "Reserve X14, making it unavailable as a GPR", "reserve-x14"), + FeatureInfo(@This()).create(.ReserveX15, "reserve-x15", "Reserve X15, making it unavailable as a GPR", "reserve-x15"), + FeatureInfo(@This()).create(.ReserveX18, "reserve-x18", "Reserve X18, making it unavailable as a GPR", "reserve-x18"), + FeatureInfo(@This()).create(.ReserveX20, "reserve-x20", "Reserve X20, making it unavailable as a GPR", "reserve-x20"), + FeatureInfo(@This()).create(.ReserveX21, "reserve-x21", "Reserve X21, making it unavailable as a GPR", "reserve-x21"), + FeatureInfo(@This()).create(.ReserveX22, "reserve-x22", "Reserve X22, making it unavailable as a GPR", "reserve-x22"), + FeatureInfo(@This()).create(.ReserveX23, "reserve-x23", "Reserve X23, making it unavailable as a GPR", "reserve-x23"), + FeatureInfo(@This()).create(.ReserveX24, "reserve-x24", "Reserve X24, making it unavailable as a GPR", "reserve-x24"), + FeatureInfo(@This()).create(.ReserveX25, "reserve-x25", "Reserve X25, making it unavailable as a GPR", "reserve-x25"), + FeatureInfo(@This()).create(.ReserveX26, "reserve-x26", "Reserve X26, making it unavailable as a GPR", "reserve-x26"), + FeatureInfo(@This()).create(.ReserveX27, "reserve-x27", "Reserve X27, making it unavailable as a GPR", "reserve-x27"), + FeatureInfo(@This()).create(.ReserveX28, "reserve-x28", "Reserve X28, making it unavailable as a GPR", "reserve-x28"), + FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5 Speculation Barrier", "sb"), + FeatureInfo(@This()).create(.Sel2, "sel2", "Enable v8.4-A Secure Exception Level 2 extension", "sel2"), + FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sha3, "sha3", "Enable SHA512 and SHA3 support", "sha3", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sm4, "sm4", "Enable SM3 and SM4 support", "sm4", &[_]@This() { + .FpArmv8, + }), + FeatureInfo(@This()).create(.Spe, "spe", "Enable Statistical Profiling extension", "spe"), + FeatureInfo(@This()).create(.Ssbs, "ssbs", "Enable Speculative Store Bypass Safe bit", "ssbs"), + FeatureInfo(@This()).create(.Sve, "sve", "Enable Scalable Vector Extension (SVE) instructions", "sve"), + FeatureInfo(@This()).createWithSubfeatures(.Sve2, "sve2", "Enable Scalable Vector Extension 2 (SVE2) instructions", "sve2", &[_]@This() { + .Sve, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() { + .Sve, + .FpArmv8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() { + .Sve, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() { + .Sve, + .FpArmv8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() { + .Sve, + .FpArmv8, + }), + FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"), + FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"), + FeatureInfo(@This()).create(.SlowStrqroStore, "slow-strqro-store", "STR of Q register with register offset is slow", "slow-strqro-store"), + FeatureInfo(@This()).create(.Specrestrict, "specrestrict", "Enable architectural speculation restriction", "specrestrict"), + FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"), + FeatureInfo(@This()).create(.TlbRmi, "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", "tlb-rmi"), + FeatureInfo(@This()).create(.Tme, "tme", "Enable Transactional Memory Extension", "tme"), + FeatureInfo(@This()).create(.Tracev84, "tracev8.4", "Enable v8.4-A Trace extension", "tracev8.4"), + FeatureInfo(@This()).create(.Trbe, "trbe", "Enable Trace Buffer Extension", "trbe"), + FeatureInfo(@This()).create(.TaggedGlobals, "tagged-globals", "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", "tagged-globals"), + FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), + FeatureInfo(@This()).create(.TpidrEl1, "tpidr-el1", "Permit use of TPIDR_EL1 for the TLS base", "tpidr-el1"), + FeatureInfo(@This()).create(.TpidrEl2, "tpidr-el2", "Permit use of TPIDR_EL2 for the TLS base", "tpidr-el2"), + FeatureInfo(@This()).create(.TpidrEl3, "tpidr-el3", "Permit use of TPIDR_EL3 for the TLS base", "tpidr-el3"), + FeatureInfo(@This()).create(.UseReciprocalSquareRoot, "use-reciprocal-square-root", "Use the reciprocal square root approximation", "use-reciprocal-square-root"), + FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"), + FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"), + FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() { + .ZczFp, + .ZczGp, + }), + FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"), + FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"), + FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"), + FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { + .Pan, + .Rdm, + .Lse, + .Crc, + .Lor, + .Vh, + }), + FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { + .Ccpp, + .Pan, + .Rdm, + .Lse, + .Crc, + .Lor, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Ccidx, + .Crc, + .Lor, + .Pa, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { + .Nv, + .Am, + .Lse, + .Sel2, + .Lor, + .Tracev84, + .Uaops, + .Ccpp, + .TlbRmi, + .Fmi, + .Rcpc, + .Pan, + .Rdm, + .Pa, + .Dit, + .Ras, + .Mpam, + .FpArmv8, + .Ccidx, + .Dotprod, + .Crc, + .Vh, + }), + FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { + .Nv, + .Am, + .Lse, + .Fptoint, + .Sel2, + .Lor, + .Tracev84, + .Uaops, + .Sb, + .Ccpp, + .Specrestrict, + .Bti, + .Ccdp, + .TlbRmi, + .Fmi, + .Rcpc, + .Pan, + .Rdm, + .Pa, + .Ssbs, + .Dit, + .Ras, + .Mpam, + .Altnzcv, + .FpArmv8, + .Ccidx, + .Dotprod, + .Crc, + .Predres, + .Vh, + }), + FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() { + .Perfmon, + .FpArmv8, + .Crc, + }), + FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() { + .UseAa, + .FuseAes, + .FpArmv8, + .Perfmon, + .Crc, + .BalanceFpOps, + .UsePostraScheduler, + .CustomCheapAsMove, + }), + FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() { + .FuseLiterals, + .FuseAes, + .FpArmv8, + .Perfmon, + .Crc, + .BalanceFpOps, + .UsePostraScheduler, + .CustomCheapAsMove, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() { + .Perfmon, + .FuseAes, + .FpArmv8, + .Crc, + }), + FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() { + .Perfmon, + .FuseAes, + .FpArmv8, + .Crc, + }), + FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() { + .ZczFp, + .ArithCbzFusion, + .FuseAes, + .AlternateSextloadCvtF32Pattern, + .ZczFpWorkaround, + .FpArmv8, + .Perfmon, + .DisableLatencySchedHeuristic, + .Zcm, + .ZczGp, + .ArithBccFusion, + .FuseCryptoEor, + }), + FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() { + .ZczFp, + .FuseAes, + .SlowPaired128, + .Force32bitJumpTables, + .UseReciprocalSquareRoot, + .FpArmv8, + .Perfmon, + .SlowMisaligned128store, + .Crc, + .UsePostraScheduler, + .CustomCheapAsMove, + }), + FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() { + .ZczFp, + .FuseAes, + .SlowPaired128, + .Force32bitJumpTables, + .FpArmv8, + .Perfmon, + .SlowMisaligned128store, + .Crc, + .UsePostraScheduler, + .CustomCheapAsMove, + }), + FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() { + .ZczFp, + .FuseLiterals, + .FuseAes, + .Force32bitJumpTables, + .FpArmv8, + .Perfmon, + .Crc, + .LslFast, + .FuseAddress, + .UsePostraScheduler, + .CustomCheapAsMove, + .PredictableSelectExpensive, + .FuseCsel, + }), + FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() { + .ZczFp, + .Lse, + .FuseArithLogic, + .Lor, + .UsePostraScheduler, + .Uaops, + .CustomCheapAsMove, + .ArithBccFusion, + .Ccpp, + .Perfmon, + .Pan, + .Rdm, + .FuseLiterals, + .Force32bitJumpTables, + .LslFast, + .FuseAddress, + .ZczGp, + .Ras, + .FuseCsel, + .ArithCbzFusion, + .FuseAes, + .FpArmv8, + .Crc, + .Dotprod, + .Vh, + }), + FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() { + .ZczFp, + .Rdm, + .SlowStrqroStore, + .Perfmon, + .FpArmv8, + .Crc, + .LslFast, + .UsePostraScheduler, + .ZczGp, + .CustomCheapAsMove, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() { + .ZczFp, + .Perfmon, + .FpArmv8, + .Crc, + .LslFast, + .UsePostraScheduler, + .ZczGp, + .CustomCheapAsMove, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() { + .Rcpc, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() { + .Rcpc, + .Spe, + .Ccpp, + .Pan, + .Rdm, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .Ssbs, + .Uaops, + .Vh, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() { + .ZczFp, + .Nv, + .Am, + .Lse, + .Sel2, + .Lor, + .Tracev84, + .Uaops, + .UsePostraScheduler, + .CustomCheapAsMove, + .Ccpp, + .Perfmon, + .TlbRmi, + .PredictableSelectExpensive, + .Fmi, + .Rcpc, + .Pan, + .Rdm, + .LslFast, + .Pa, + .ZczGp, + .Dit, + .Ras, + .Spe, + .Mpam, + .FpArmv8, + .Ccidx, + .Dotprod, + .Crc, + .Vh, + }), + FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() { + .Uaops, + .Spe, + .Ccpp, + .Pan, + .Rdm, + .FuseAes, + .Vh, + .Perfmon, + .FpArmv8, + .Lse, + .Crc, + .Dotprod, + .Lor, + .UsePostraScheduler, + .CustomCheapAsMove, + .Ras, + }), + FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() { + .Pan, + .Rdm, + .Vh, + .AggressiveFma, + .FpArmv8, + .Lse, + .Crc, + .Lor, + .UsePostraScheduler, + .ArithBccFusion, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + }), + FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() { + .Perfmon, + .FpArmv8, + .Crc, + .UsePostraScheduler, + .PredictableSelectExpensive, + }), + }; +}; diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..e8688a7492e0ba799cc5fc989a6137ee4cb77e4d --- /dev/null +++ b/lib/std/target/feature/AmdGpuFeature.zig @@ -0,0 +1,343 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const AmdGpuFeature = enum { + BitInsts16, + AddNoCarryInsts, + ApertureRegs, + AtomicFaddInsts, + AutoWaitcntBeforeBarrier, + CiInsts, + CodeObjectV3, + Cumode, + DlInsts, + Dpp, + Dpp8, + NoSramEccSupport, + NoXnackSupport, + Dot1Insts, + Dot2Insts, + Dot3Insts, + Dot4Insts, + Dot5Insts, + Dot6Insts, + DumpCode, + Dumpcode, + EnableDs128, + LoadStoreOpt, + EnablePrtStrictNull, + SiScheduler, + UnsafeDsOffsetFolding, + Fmaf, + Fp16Denormals, + Fp32Denormals, + Fp64, + Fp64Denormals, + Fp64Fp16Denormals, + FpExceptions, + FastFmaf, + FlatAddressSpace, + FlatForGlobal, + FlatGlobalInsts, + FlatInstOffsets, + FlatScratchInsts, + FlatSegmentOffsetBug, + FmaMixInsts, + Gcn3Encoding, + Gfx7Gfx8Gfx9Insts, + Gfx8Insts, + Gfx9, + Gfx9Insts, + Gfx10, + Gfx10Insts, + InstFwdPrefetchBug, + IntClampInsts, + Inv2piInlineImm, + Ldsbankcount16, + Ldsbankcount32, + LdsBranchVmemWarHazard, + LdsMisalignedBug, + Localmemorysize0, + Localmemorysize32768, + Localmemorysize65536, + MaiInsts, + MfmaInlineLiteralBug, + MimgR128, + MadMixInsts, + MaxPrivateElementSize4, + MaxPrivateElementSize8, + MaxPrivateElementSize16, + Movrel, + NsaEncoding, + NsaToVmemBug, + NoDataDepHazard, + NoSdstCmpx, + Offset3fBug, + PkFmacF16Inst, + PromoteAlloca, + R128A16, + RegisterBanking, + Sdwa, + SdwaMav, + SdwaOmod, + SdwaOutModsVopc, + SdwaScalar, + SdwaSdst, + SgprInitBug, + SmemToVectorWriteHazard, + SMemrealtime, + SramEcc, + ScalarAtomics, + ScalarFlatScratchInsts, + ScalarStores, + SeaIslands, + SouthernIslands, + TrapHandler, + TrigReducedRange, + UnalignedBufferAccess, + UnalignedScratchAccess, + UnpackedD16Vmem, + VgprIndexMode, + VmemToScalarWriteHazard, + Vop3Literal, + Vop3p, + VcmpxExecWarHazard, + VcmpxPermlaneHazard, + VolcanicIslands, + Vscnt, + Wavefrontsize16, + Wavefrontsize32, + Wavefrontsize64, + Xnack, + HalfRate64Ops, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.BitInsts16, "16-bit-insts", "Has i16/f16 instructions", "16-bit-insts"), + FeatureInfo(@This()).create(.AddNoCarryInsts, "add-no-carry-insts", "Have VALU add/sub instructions without carry out", "add-no-carry-insts"), + FeatureInfo(@This()).create(.ApertureRegs, "aperture-regs", "Has Memory Aperture Base and Size Registers", "aperture-regs"), + FeatureInfo(@This()).create(.AtomicFaddInsts, "atomic-fadd-insts", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", "atomic-fadd-insts"), + FeatureInfo(@This()).create(.AutoWaitcntBeforeBarrier, "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", "auto-waitcnt-before-barrier"), + FeatureInfo(@This()).create(.CiInsts, "ci-insts", "Additional instructions for CI+", "ci-insts"), + FeatureInfo(@This()).create(.CodeObjectV3, "code-object-v3", "Generate code object version 3", "code-object-v3"), + FeatureInfo(@This()).create(.Cumode, "cumode", "Enable CU wavefront execution mode", "cumode"), + FeatureInfo(@This()).create(.DlInsts, "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", "dl-insts"), + FeatureInfo(@This()).create(.Dpp, "dpp", "Support DPP (Data Parallel Primitives) extension", "dpp"), + FeatureInfo(@This()).create(.Dpp8, "dpp8", "Support DPP8 (Data Parallel Primitives) extension", "dpp8"), + FeatureInfo(@This()).create(.NoSramEccSupport, "no-sram-ecc-support", "Hardware does not support SRAM ECC", "no-sram-ecc-support"), + FeatureInfo(@This()).create(.NoXnackSupport, "no-xnack-support", "Hardware does not support XNACK", "no-xnack-support"), + FeatureInfo(@This()).create(.Dot1Insts, "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", "dot1-insts"), + FeatureInfo(@This()).create(.Dot2Insts, "dot2-insts", "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", "dot2-insts"), + FeatureInfo(@This()).create(.Dot3Insts, "dot3-insts", "Has v_dot8c_i32_i4 instruction", "dot3-insts"), + FeatureInfo(@This()).create(.Dot4Insts, "dot4-insts", "Has v_dot2c_i32_i16 instruction", "dot4-insts"), + FeatureInfo(@This()).create(.Dot5Insts, "dot5-insts", "Has v_dot2c_f32_f16 instruction", "dot5-insts"), + FeatureInfo(@This()).create(.Dot6Insts, "dot6-insts", "Has v_dot4c_i32_i8 instruction", "dot6-insts"), + FeatureInfo(@This()).create(.DumpCode, "DumpCode", "Dump MachineInstrs in the CodeEmitter", "DumpCode"), + FeatureInfo(@This()).create(.Dumpcode, "dumpcode", "Dump MachineInstrs in the CodeEmitter", "dumpcode"), + FeatureInfo(@This()).create(.EnableDs128, "enable-ds128", "Use ds_{read|write}_b128", "enable-ds128"), + FeatureInfo(@This()).create(.LoadStoreOpt, "load-store-opt", "Enable SI load/store optimizer pass", "load-store-opt"), + FeatureInfo(@This()).create(.EnablePrtStrictNull, "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", "enable-prt-strict-null"), + FeatureInfo(@This()).create(.SiScheduler, "si-scheduler", "Enable SI Machine Scheduler", "si-scheduler"), + FeatureInfo(@This()).create(.UnsafeDsOffsetFolding, "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", "unsafe-ds-offset-folding"), + FeatureInfo(@This()).create(.Fmaf, "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", "fmaf"), + FeatureInfo(@This()).createWithSubfeatures(.Fp16Denormals, "fp16-denormals", "Enable half precision denormal handling", "fp16-denormals", &[_]@This() { + .Fp64, + }), + FeatureInfo(@This()).create(.Fp32Denormals, "fp32-denormals", "Enable single precision denormal handling", "fp32-denormals"), + FeatureInfo(@This()).create(.Fp64, "fp64", "Enable double precision operations", "fp64"), + FeatureInfo(@This()).createWithSubfeatures(.Fp64Denormals, "fp64-denormals", "Enable double and half precision denormal handling", "fp64-denormals", &[_]@This() { + .Fp64, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fp64Fp16Denormals, "fp64-fp16-denormals", "Enable double and half precision denormal handling", "fp64-fp16-denormals", &[_]@This() { + .Fp64, + }), + FeatureInfo(@This()).create(.FpExceptions, "fp-exceptions", "Enable floating point exceptions", "fp-exceptions"), + FeatureInfo(@This()).create(.FastFmaf, "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", "fast-fmaf"), + FeatureInfo(@This()).create(.FlatAddressSpace, "flat-address-space", "Support flat address space", "flat-address-space"), + FeatureInfo(@This()).create(.FlatForGlobal, "flat-for-global", "Force to generate flat instruction for global", "flat-for-global"), + FeatureInfo(@This()).create(.FlatGlobalInsts, "flat-global-insts", "Have global_* flat memory instructions", "flat-global-insts"), + FeatureInfo(@This()).create(.FlatInstOffsets, "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", "flat-inst-offsets"), + FeatureInfo(@This()).create(.FlatScratchInsts, "flat-scratch-insts", "Have scratch_* flat memory instructions", "flat-scratch-insts"), + FeatureInfo(@This()).create(.FlatSegmentOffsetBug, "flat-segment-offset-bug", "GFX10 bug, inst_offset ignored in flat segment", "flat-segment-offset-bug"), + FeatureInfo(@This()).create(.FmaMixInsts, "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", "fma-mix-insts"), + FeatureInfo(@This()).create(.Gcn3Encoding, "gcn3-encoding", "Encoding format for VI", "gcn3-encoding"), + FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"), + FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"), + FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() { + .Gfx9Insts, + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .VgprIndexMode, + .Dpp, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .ScalarAtomics, + .FlatAddressSpace, + .ScalarFlatScratchInsts, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .R128A16, + .IntClampInsts, + .ScalarStores, + .ApertureRegs, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + }), + FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"), + FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() { + .Gfx9Insts, + .NoSdstCmpx, + .Fp64, + .FastFmaf, + .Sdwa, + .SdwaScalar, + .Dpp, + .RegisterBanking, + .Gfx10Insts, + .AddNoCarryInsts, + .SdwaOmod, + .SdwaSdst, + .FlatAddressSpace, + .Gfx8Insts, + .FmaMixInsts, + .PkFmacF16Inst, + .Vop3Literal, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .Movrel, + .Dpp8, + .ApertureRegs, + .NoDataDepHazard, + .CiInsts, + .FlatGlobalInsts, + .BitInsts16, + .FlatScratchInsts, + .SMemrealtime, + .Vop3p, + .FlatInstOffsets, + .Inv2piInlineImm, + .Localmemorysize65536, + .Vscnt, + }), + FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"), + FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"), + FeatureInfo(@This()).create(.IntClampInsts, "int-clamp-insts", "Support clamp for integer destination", "int-clamp-insts"), + FeatureInfo(@This()).create(.Inv2piInlineImm, "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", "inv-2pi-inline-imm"), + FeatureInfo(@This()).create(.Ldsbankcount16, "ldsbankcount16", "The number of LDS banks per compute unit.", "ldsbankcount16"), + FeatureInfo(@This()).create(.Ldsbankcount32, "ldsbankcount32", "The number of LDS banks per compute unit.", "ldsbankcount32"), + FeatureInfo(@This()).create(.LdsBranchVmemWarHazard, "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", "lds-branch-vmem-war-hazard"), + FeatureInfo(@This()).create(.LdsMisalignedBug, "lds-misaligned-bug", "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", "lds-misaligned-bug"), + FeatureInfo(@This()).create(.Localmemorysize0, "localmemorysize0", "The size of local memory in bytes", "localmemorysize0"), + FeatureInfo(@This()).create(.Localmemorysize32768, "localmemorysize32768", "The size of local memory in bytes", "localmemorysize32768"), + FeatureInfo(@This()).create(.Localmemorysize65536, "localmemorysize65536", "The size of local memory in bytes", "localmemorysize65536"), + FeatureInfo(@This()).create(.MaiInsts, "mai-insts", "Has mAI instructions", "mai-insts"), + FeatureInfo(@This()).create(.MfmaInlineLiteralBug, "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", "mfma-inline-literal-bug"), + FeatureInfo(@This()).create(.MimgR128, "mimg-r128", "Support 128-bit texture resources", "mimg-r128"), + FeatureInfo(@This()).create(.MadMixInsts, "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", "mad-mix-insts"), + FeatureInfo(@This()).create(.MaxPrivateElementSize4, "max-private-element-size-4", "Maximum private access size may be 4", "max-private-element-size-4"), + FeatureInfo(@This()).create(.MaxPrivateElementSize8, "max-private-element-size-8", "Maximum private access size may be 8", "max-private-element-size-8"), + FeatureInfo(@This()).create(.MaxPrivateElementSize16, "max-private-element-size-16", "Maximum private access size may be 16", "max-private-element-size-16"), + FeatureInfo(@This()).create(.Movrel, "movrel", "Has v_movrel*_b32 instructions", "movrel"), + FeatureInfo(@This()).create(.NsaEncoding, "nsa-encoding", "Support NSA encoding for image instructions", "nsa-encoding"), + FeatureInfo(@This()).create(.NsaToVmemBug, "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", "nsa-to-vmem-bug"), + FeatureInfo(@This()).create(.NoDataDepHazard, "no-data-dep-hazard", "Does not need SW waitstates", "no-data-dep-hazard"), + FeatureInfo(@This()).create(.NoSdstCmpx, "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", "no-sdst-cmpx"), + FeatureInfo(@This()).create(.Offset3fBug, "offset-3f-bug", "Branch offset of 3f hardware bug", "offset-3f-bug"), + FeatureInfo(@This()).create(.PkFmacF16Inst, "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", "pk-fmac-f16-inst"), + FeatureInfo(@This()).create(.PromoteAlloca, "promote-alloca", "Enable promote alloca pass", "promote-alloca"), + FeatureInfo(@This()).create(.R128A16, "r128-a16", "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", "r128-a16"), + FeatureInfo(@This()).create(.RegisterBanking, "register-banking", "Has register banking", "register-banking"), + FeatureInfo(@This()).create(.Sdwa, "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", "sdwa"), + FeatureInfo(@This()).create(.SdwaMav, "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", "sdwa-mav"), + FeatureInfo(@This()).create(.SdwaOmod, "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", "sdwa-omod"), + FeatureInfo(@This()).create(.SdwaOutModsVopc, "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-out-mods-vopc"), + FeatureInfo(@This()).create(.SdwaScalar, "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", "sdwa-scalar"), + FeatureInfo(@This()).create(.SdwaSdst, "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-sdst"), + FeatureInfo(@This()).create(.SgprInitBug, "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", "sgpr-init-bug"), + FeatureInfo(@This()).create(.SmemToVectorWriteHazard, "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", "smem-to-vector-write-hazard"), + FeatureInfo(@This()).create(.SMemrealtime, "s-memrealtime", "Has s_memrealtime instruction", "s-memrealtime"), + FeatureInfo(@This()).create(.SramEcc, "sram-ecc", "Enable SRAM ECC", "sram-ecc"), + FeatureInfo(@This()).create(.ScalarAtomics, "scalar-atomics", "Has atomic scalar memory instructions", "scalar-atomics"), + FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"), + FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"), + FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() { + .Wavefrontsize64, + .MimgR128, + .Fp64, + .CiInsts, + .FlatAddressSpace, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Localmemorysize65536, + .Gfx7Gfx8Gfx9Insts, + }), + FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() { + .Wavefrontsize64, + .MimgR128, + .Fp64, + .NoXnackSupport, + .TrigReducedRange, + .NoSramEccSupport, + .Movrel, + .Ldsbankcount32, + .Localmemorysize32768, + }), + FeatureInfo(@This()).create(.TrapHandler, "trap-handler", "Trap handler support", "trap-handler"), + FeatureInfo(@This()).create(.TrigReducedRange, "trig-reduced-range", "Requires use of fract on arguments to trig instructions", "trig-reduced-range"), + FeatureInfo(@This()).create(.UnalignedBufferAccess, "unaligned-buffer-access", "Support unaligned global loads and stores", "unaligned-buffer-access"), + FeatureInfo(@This()).create(.UnalignedScratchAccess, "unaligned-scratch-access", "Support unaligned scratch loads and stores", "unaligned-scratch-access"), + FeatureInfo(@This()).create(.UnpackedD16Vmem, "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", "unpacked-d16-vmem"), + FeatureInfo(@This()).create(.VgprIndexMode, "vgpr-index-mode", "Has VGPR mode register indexing", "vgpr-index-mode"), + FeatureInfo(@This()).create(.VmemToScalarWriteHazard, "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", "vmem-to-scalar-write-hazard"), + FeatureInfo(@This()).create(.Vop3Literal, "vop3-literal", "Can use one literal in VOP3", "vop3-literal"), + FeatureInfo(@This()).create(.Vop3p, "vop3p", "Has VOP3P packed instructions", "vop3p"), + FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"), + FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"), + FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() { + .Wavefrontsize64, + .Fp64, + .Gcn3Encoding, + .TrigReducedRange, + .Sdwa, + .VgprIndexMode, + .Dpp, + .FlatAddressSpace, + .Gfx8Insts, + .Gfx7Gfx8Gfx9Insts, + .MimgR128, + .NoSramEccSupport, + .IntClampInsts, + .ScalarStores, + .Movrel, + .SdwaMav, + .CiInsts, + .BitInsts16, + .SMemrealtime, + .Inv2piInlineImm, + .Localmemorysize65536, + .SdwaOutModsVopc, + }), + FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"), + FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"), + FeatureInfo(@This()).create(.Wavefrontsize32, "wavefrontsize32", "The number of threads per wavefront", "wavefrontsize32"), + FeatureInfo(@This()).create(.Wavefrontsize64, "wavefrontsize64", "The number of threads per wavefront", "wavefrontsize64"), + FeatureInfo(@This()).create(.Xnack, "xnack", "Enable XNACK support", "xnack"), + FeatureInfo(@This()).create(.HalfRate64Ops, "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", "half-rate-64-ops"), + }; +}; diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..842becda2c6f5d36368d96bdf70d150c786cc877 --- /dev/null +++ b/lib/std/target/feature/ArmFeature.zig @@ -0,0 +1,818 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const ArmFeature = enum { + Armv2, + Armv2a, + Armv3, + Armv3m, + Armv4, + Armv4t, + Armv5t, + Armv5te, + Armv5tej, + Armv6, + Armv6j, + Armv6k, + Armv6kz, + Armv6M, + Armv6sM, + Armv6t2, + Armv7A, + Armv7eM, + Armv7k, + Armv7M, + Armv7R, + Armv7s, + Armv7ve, + Armv8A, + Armv8Mbase, + Armv8Mmain, + Armv8R, + Armv81A, + Armv81Mmain, + Armv82A, + Armv83A, + Armv84A, + Armv85A, + Msecext8, + Aclass, + Aes, + AcquireRelease, + AvoidMovsShop, + AvoidPartialCpsr, + Crc, + CheapPredicableCpsr, + VldnAlign, + Crypto, + D32, + Db, + Dfb, + Dsp, + DontWidenVmovs, + Dotprod, + ExecuteOnly, + ExpandFpMlx, + Fp16, + Fp16fml, + Fp64, + Fpao, + FpArmv8, + FpArmv8d16, + FpArmv8d16sp, + FpArmv8sp, + Fpregs, + Fpregs16, + Fpregs64, + Fullfp16, + FuseAes, + FuseLiterals, + HwdivArm, + Hwdiv, + NoBranchPredictor, + RetAddrStack, + Slowfpvmlx, + VmlxHazards, + Lob, + LongCalls, + Mclass, + Mp, + Mve1beat, + Mve2beat, + Mve4beat, + MuxedUnits, + Neon, + Neonfp, + NeonFpmovs, + NaclTrap, + Noarm, + NoMovt, + NoNegImmediates, + DisablePostraScheduler, + NonpipelinedVfp, + Perfmon, + Bit32, + PreferIshst, + LoopAlign, + PreferVmovsr, + ProfUnpr, + Ras, + Rclass, + ReadTpHard, + ReserveR9, + Sb, + Sha2, + SlowFpBrcc, + SlowLoadDSubreg, + SlowOddReg, + SlowVdup32, + SlowVgetlni32, + SplatVfpNeon, + StrictAlign, + Thumb2, + Trustzone, + UseAa, + UseMisched, + WideStrideVfp, + V7clrex, + Vfp2, + Vfp2sp, + Vfp3, + Vfp3d16, + Vfp3d16sp, + Vfp3sp, + Vfp4, + Vfp4d16, + Vfp4d16sp, + Vfp4sp, + VmlxForwarding, + Virtualization, + Zcz, + Mvefp, + Mve, + V4t, + V5te, + V5t, + V6k, + V6m, + V6, + V6t2, + V7, + V8m, + V8mmain, + V8, + V81mmain, + V81a, + V82a, + V83a, + V84a, + V85a, + Iwmmxt, + Iwmmxt2, + SoftFloat, + ThumbMode, + A5, + A7, + A8, + A9, + A12, + A15, + A17, + A32, + A35, + A53, + A55, + A57, + A72, + A73, + A75, + A76, + Exynos, + Krait, + Kryo, + M3, + R4, + R5, + R7, + R52, + Swift, + Xscale, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"), + FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"), + FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"), + FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"), + FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"), + FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() { + .V4t, + .Dsp, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() { + .V4t, + .Dsp, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() { + .V4t, + .Trustzone, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .V4t, + .Noarm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() { + .Thumb2, + .V4t, + .Dsp, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Hwdiv, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() { + .Thumb2, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Aclass, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() { + .Mclass, + .StrictAlign, + .ThumbMode, + .Db, + .Msecext8, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Msecext8, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dfb, + .Dsp, + .Rclass, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() { + .Thumb2, + .Mclass, + .Perfmon, + .ThumbMode, + .Db, + .Msecext8, + .Ras, + .V7clrex, + .V4t, + .Hwdiv, + .Noarm, + .Lob, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() { + .Thumb2, + .Mp, + .Perfmon, + .Sb, + .Db, + .Crc, + .Fp16, + .Ras, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .Hwdiv, + .HwdivArm, + .Aclass, + .Trustzone, + .AcquireRelease, + }), + FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"), + FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"), + FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"), + FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"), + FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"), + FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"), + FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"), + FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"), + FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"), + FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"), + FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"), + FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"), + FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"), + FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"), + FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"), + FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"), + FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"), + FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() { + .Fp16, + .Fpregs, + .D32, + }), + FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() { + .Fp16, + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"), + FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), + FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), + FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"), + FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"), + FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"), + FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"), + FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"), + FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"), + FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"), + FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"), + FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"), + FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"), + FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"), + FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"), + FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"), + FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"), + FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"), + FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"), + FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"), + FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"), + FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"), + FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"), + FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"), + FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"), + FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"), + FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"), + FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"), + FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"), + FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"), + FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"), + FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"), + FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"), + FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"), + FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"), + FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"), + FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"), + FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"), + FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"), + FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"), + FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"), + FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() { + .DontWidenVmovs, + }), + FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"), + FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"), + FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"), + FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), + FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"), + FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"), + FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"), + FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() { + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() { + .Fpregs, + .D32, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() { + .Fp16, + .Fpregs, + .D32, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() { + .Fp16, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() { + .Fp16, + .Fpregs, + .D32, + }), + FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"), + FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() { + .HwdivArm, + .Hwdiv, + }), + FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"), + FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() { + .Thumb2, + .Perfmon, + .Fp16, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() { + .Thumb2, + .Perfmon, + .Dsp, + .V7clrex, + .V4t, + .Fpregs, + }), + FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"), + FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() { + .Thumb2, + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() { + .V7clrex, + .V4t, + .Perfmon, + .Thumb2, + }), + FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() { + .V7clrex, + .V4t, + .Perfmon, + .Thumb2, + }), + FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() { + .Thumb2, + .Perfmon, + .V7clrex, + .V4t, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() { + .V7clrex, + .V4t, + .Perfmon, + .Thumb2, + }), + FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { + .Thumb2, + .Perfmon, + .V7clrex, + .V4t, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { + .Thumb2, + .Perfmon, + .V7clrex, + .V4t, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { + .Thumb2, + .Perfmon, + .V7clrex, + .V4t, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { + .Thumb2, + .Perfmon, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { + .Thumb2, + .Perfmon, + .Sb, + .V7clrex, + .V4t, + .Fpregs, + .D32, + .AcquireRelease, + }), + FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() { + .V4t, + }), + FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"), + FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"), + FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"), + FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"), + FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"), + FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"), + FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"), + FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"), + FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"), + FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"), + FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"), + FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"), + FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"), + FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"), + FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"), + FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"), + FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"), + FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"), + FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() { + .Zcz, + .SlowVdup32, + .SlowVgetlni32, + .DontWidenVmovs, + .Crc, + .FuseAes, + .WideStrideVfp, + .ProfUnpr, + .Slowfpvmlx, + .SlowFpBrcc, + .FuseLiterals, + .Fpregs, + .D32, + .ExpandFpMlx, + .Hwdiv, + .HwdivArm, + .RetAddrStack, + .UseAa, + }), + FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"), + FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"), + FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"), + FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"), + FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"), + FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"), + FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"), + FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"), + FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() { + .V4t, + }), + }; +}; diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..6efacedbc2a95a31580cf045c96cee7736087735 --- /dev/null +++ b/lib/std/target/feature/AvrFeature.zig @@ -0,0 +1,230 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const AvrFeature = enum { + Avr0, + Avr1, + Avr2, + Avr3, + Avr4, + Avr5, + Avr6, + Avr25, + Avr31, + Avr35, + Avr51, + Avrtiny, + Xmega, + Xmegau, + Addsubiw, + Break, + Des, + Eijmpcall, + Elpm, + Elpmx, + Ijmpcall, + Jmpcall, + Lpm, + Lpmx, + Movw, + Mul, + Rmw, + Spm, + Spmx, + Sram, + Special, + Smallstack, + Tinyencoding, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"), + FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() { + .Lpm, + .Avr0, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() { + .Ijmpcall, + .Sram, + .Avr0, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() { + .Ijmpcall, + .Sram, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() { + .Ijmpcall, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() { + .Ijmpcall, + .Sram, + .Elpm, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() { + .Ijmpcall, + .Movw, + .Sram, + .Break, + .Spm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() { + .Ijmpcall, + .Elpmx, + .Movw, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() { + .Break, + .Tinyencoding, + .Avr0, + .Sram, + }), + FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + }), + FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Spm, + .Elpm, + .Lpmx, + .Spmx, + .Avr0, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + }), + FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"), + FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"), + FeatureInfo(@This()).create(.Des, "des", "The device supports the `DES k` encryption instruction", "des"), + FeatureInfo(@This()).create(.Eijmpcall, "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", "eijmpcall"), + FeatureInfo(@This()).create(.Elpm, "elpm", "The device supports the ELPM instruction", "elpm"), + FeatureInfo(@This()).create(.Elpmx, "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", "elpmx"), + FeatureInfo(@This()).create(.Ijmpcall, "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", "ijmpcall"), + FeatureInfo(@This()).create(.Jmpcall, "jmpcall", "The device supports the `JMP` and `CALL` instructions", "jmpcall"), + FeatureInfo(@This()).create(.Lpm, "lpm", "The device supports the `LPM` instruction", "lpm"), + FeatureInfo(@This()).create(.Lpmx, "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", "lpmx"), + FeatureInfo(@This()).create(.Movw, "movw", "The device supports the 16-bit MOVW instruction", "movw"), + FeatureInfo(@This()).create(.Mul, "mul", "The device supports the multiplication instructions", "mul"), + FeatureInfo(@This()).create(.Rmw, "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", "rmw"), + FeatureInfo(@This()).create(.Spm, "spm", "The device supports the `SPM` instruction", "spm"), + FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"), + FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"), + FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() { + .Ijmpcall, + .Elpmx, + .Movw, + .Eijmpcall, + .Mul, + .Rmw, + .Sram, + .Break, + .Elpm, + .Spm, + .Lpmx, + .Spmx, + .Jmpcall, + .Addsubiw, + .Lpm, + .Des, + }), + FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"), + FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"), + }; +}; diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..028974ec2b61662f822154c3a9290d7286355043 --- /dev/null +++ b/lib/std/target/feature/BpfFeature.zig @@ -0,0 +1,17 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const BpfFeature = enum { + Alu32, + Dummy, + Dwarfris, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Alu32, "alu32", "Enable ALU32 instructions", "alu32"), + FeatureInfo(@This()).create(.Dummy, "dummy", "unused feature", "dummy"), + FeatureInfo(@This()).create(.Dwarfris, "dwarfris", "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", "dwarfris"), + }; +}; diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..560f282334b675734bb778f11f56d36f57ecf342 --- /dev/null +++ b/lib/std/target/feature/HexagonFeature.zig @@ -0,0 +1,76 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const HexagonFeature = enum { + V5, + V55, + V60, + V62, + V65, + V66, + Hvx, + HvxLength64b, + HvxLength128b, + Hvxv60, + Hvxv62, + Hvxv65, + Hvxv66, + Zreg, + Duplex, + LongCalls, + Mem_noshuf, + Memops, + Nvj, + Nvs, + NoreturnStackElim, + Packets, + ReservedR19, + SmallData, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.V5, "v5", "Enable Hexagon V5 architecture", "v5"), + FeatureInfo(@This()).create(.V55, "v55", "Enable Hexagon V55 architecture", "v55"), + FeatureInfo(@This()).create(.V60, "v60", "Enable Hexagon V60 architecture", "v60"), + FeatureInfo(@This()).create(.V62, "v62", "Enable Hexagon V62 architecture", "v62"), + FeatureInfo(@This()).create(.V65, "v65", "Enable Hexagon V65 architecture", "v65"), + FeatureInfo(@This()).create(.V66, "v66", "Enable Hexagon V66 architecture", "v66"), + FeatureInfo(@This()).create(.Hvx, "hvx", "Hexagon HVX instructions", "hvx"), + FeatureInfo(@This()).createWithSubfeatures(.HvxLength64b, "hvx-length64b", "Hexagon HVX 64B instructions", "hvx-length64b", &[_]@This() { + .Hvx, + }), + FeatureInfo(@This()).createWithSubfeatures(.HvxLength128b, "hvx-length128b", "Hexagon HVX 128B instructions", "hvx-length128b", &[_]@This() { + .Hvx, + }), + FeatureInfo(@This()).createWithSubfeatures(.Hvxv60, "hvxv60", "Hexagon HVX instructions", "hvxv60", &[_]@This() { + .Hvx, + }), + FeatureInfo(@This()).createWithSubfeatures(.Hvxv62, "hvxv62", "Hexagon HVX instructions", "hvxv62", &[_]@This() { + .Hvx, + }), + FeatureInfo(@This()).createWithSubfeatures(.Hvxv65, "hvxv65", "Hexagon HVX instructions", "hvxv65", &[_]@This() { + .Hvx, + }), + FeatureInfo(@This()).createWithSubfeatures(.Hvxv66, "hvxv66", "Hexagon HVX instructions", "hvxv66", &[_]@This() { + .Hvx, + .Zreg, + }), + FeatureInfo(@This()).create(.Zreg, "zreg", "Hexagon ZReg extension instructions", "zreg"), + FeatureInfo(@This()).create(.Duplex, "duplex", "Enable generation of duplex instruction", "duplex"), + FeatureInfo(@This()).create(.LongCalls, "long-calls", "Use constant-extended calls", "long-calls"), + FeatureInfo(@This()).create(.Mem_noshuf, "mem_noshuf", "Supports mem_noshuf feature", "mem_noshuf"), + FeatureInfo(@This()).create(.Memops, "memops", "Use memop instructions", "memops"), + FeatureInfo(@This()).createWithSubfeatures(.Nvj, "nvj", "Support for new-value jumps", "nvj", &[_]@This() { + .Packets, + }), + FeatureInfo(@This()).createWithSubfeatures(.Nvs, "nvs", "Support for new-value stores", "nvs", &[_]@This() { + .Packets, + }), + FeatureInfo(@This()).create(.NoreturnStackElim, "noreturn-stack-elim", "Eliminate stack allocation in a noreturn function when possible", "noreturn-stack-elim"), + FeatureInfo(@This()).create(.Packets, "packets", "Support for instruction packets", "packets"), + FeatureInfo(@This()).create(.ReservedR19, "reserved-r19", "Reserve register R19", "reserved-r19"), + FeatureInfo(@This()).create(.SmallData, "small-data", "Allow GP-relative addressing of global variables", "small-data"), + }; +}; diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..16c7339f77a4eda1409b86b695096143677c61b0 --- /dev/null +++ b/lib/std/target/feature/MipsFeature.zig @@ -0,0 +1,238 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const MipsFeature = enum { + Abs2008, + Crc, + Cnmips, + Dsp, + Dspr2, + Dspr3, + Eva, + Fp64, + Fpxx, + Ginv, + Gp64, + LongCalls, + Msa, + Mt, + Nomadd4, + Micromips, + Mips1, + Mips2, + Mips3, + Mips3_32, + Mips3_32r2, + Mips4, + Mips4_32, + Mips4_32r2, + Mips5, + Mips5_32r2, + Mips16, + Mips32, + Mips32r2, + Mips32r3, + Mips32r5, + Mips32r6, + Mips64, + Mips64r2, + Mips64r3, + Mips64r5, + Mips64r6, + Nan2008, + Noabicalls, + Nooddspreg, + Ptr64, + SingleFloat, + SoftFloat, + Sym32, + UseIndirectJumpHazard, + UseTccInDiv, + Vfpu, + Virt, + Xgot, + P5600, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"), + FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"), + FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"), + FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() { + .Dsp, + }), + FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() { + .Dsp, + }), + FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"), + FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"), + FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"), + FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"), + FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"), + FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"), + FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"), + FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"), + FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"), + FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"), + FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"), + FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() { + .Mips1, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips3_32r2, + .Mips1, + .Gp64, + }), + FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"), + FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"), + FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + }), + FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"), + FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"), + FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"), + FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"), + FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() { + .Mips3_32, + .Mips4_32, + .Mips1, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Abs2008, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Nan2008, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() { + .Mips3_32, + .Fp64, + .Mips4_32r2, + .Abs2008, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Nan2008, + .Gp64, + .Mips5_32r2, + }), + FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"), + FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"), + FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"), + FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"), + FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"), + FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"), + FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"), + FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"), + FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"), + FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"), + FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"), + FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"), + FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() { + .Mips3_32, + .Mips4_32r2, + .Mips3_32r2, + .Mips1, + .Mips4_32, + .Mips5_32r2, + }), + }; +}; diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig new file mode 100644 index 0000000000000000000000000000000000000000..47c7b71fcae07cf942dfd49e70a87f9c2ab19811 --- /dev/null +++ b/lib/std/target/feature/Msp430Feature.zig @@ -0,0 +1,19 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const Msp430Feature = enum { + Hwmult16, + Hwmult32, + Hwmultf5, + Ext, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Hwmult16, "hwmult16", "Enable 16-bit hardware multiplier", "hwmult16"), + FeatureInfo(@This()).create(.Hwmult32, "hwmult32", "Enable 32-bit hardware multiplier", "hwmult32"), + FeatureInfo(@This()).create(.Hwmultf5, "hwmultf5", "Enable F5 series hardware multiplier", "hwmultf5"), + FeatureInfo(@This()).create(.Ext, "ext", "Enable MSP430-X extensions", "ext"), + }; +}; diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..04250a3e26720008a47877d32344172450bd08fd --- /dev/null +++ b/lib/std/target/feature/NvptxFeature.zig @@ -0,0 +1,61 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const NvptxFeature = enum { + Ptx32, + Ptx40, + Ptx41, + Ptx42, + Ptx43, + Ptx50, + Ptx60, + Ptx61, + Ptx63, + Ptx64, + Sm_20, + Sm_21, + Sm_30, + Sm_32, + Sm_35, + Sm_37, + Sm_50, + Sm_52, + Sm_53, + Sm_60, + Sm_61, + Sm_62, + Sm_70, + Sm_72, + Sm_75, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Ptx32, "ptx32", "Use PTX version 3.2", "ptx32"), + FeatureInfo(@This()).create(.Ptx40, "ptx40", "Use PTX version 4.0", "ptx40"), + FeatureInfo(@This()).create(.Ptx41, "ptx41", "Use PTX version 4.1", "ptx41"), + FeatureInfo(@This()).create(.Ptx42, "ptx42", "Use PTX version 4.2", "ptx42"), + FeatureInfo(@This()).create(.Ptx43, "ptx43", "Use PTX version 4.3", "ptx43"), + FeatureInfo(@This()).create(.Ptx50, "ptx50", "Use PTX version 5.0", "ptx50"), + FeatureInfo(@This()).create(.Ptx60, "ptx60", "Use PTX version 6.0", "ptx60"), + FeatureInfo(@This()).create(.Ptx61, "ptx61", "Use PTX version 6.1", "ptx61"), + FeatureInfo(@This()).create(.Ptx63, "ptx63", "Use PTX version 6.3", "ptx63"), + FeatureInfo(@This()).create(.Ptx64, "ptx64", "Use PTX version 6.4", "ptx64"), + FeatureInfo(@This()).create(.Sm_20, "sm_20", "Target SM 2.0", "sm_20"), + FeatureInfo(@This()).create(.Sm_21, "sm_21", "Target SM 2.1", "sm_21"), + FeatureInfo(@This()).create(.Sm_30, "sm_30", "Target SM 3.0", "sm_30"), + FeatureInfo(@This()).create(.Sm_32, "sm_32", "Target SM 3.2", "sm_32"), + FeatureInfo(@This()).create(.Sm_35, "sm_35", "Target SM 3.5", "sm_35"), + FeatureInfo(@This()).create(.Sm_37, "sm_37", "Target SM 3.7", "sm_37"), + FeatureInfo(@This()).create(.Sm_50, "sm_50", "Target SM 5.0", "sm_50"), + FeatureInfo(@This()).create(.Sm_52, "sm_52", "Target SM 5.2", "sm_52"), + FeatureInfo(@This()).create(.Sm_53, "sm_53", "Target SM 5.3", "sm_53"), + FeatureInfo(@This()).create(.Sm_60, "sm_60", "Target SM 6.0", "sm_60"), + FeatureInfo(@This()).create(.Sm_61, "sm_61", "Target SM 6.1", "sm_61"), + FeatureInfo(@This()).create(.Sm_62, "sm_62", "Target SM 6.2", "sm_62"), + FeatureInfo(@This()).create(.Sm_70, "sm_70", "Target SM 7.0", "sm_70"), + FeatureInfo(@This()).create(.Sm_72, "sm_72", "Target SM 7.2", "sm_72"), + FeatureInfo(@This()).create(.Sm_75, "sm_75", "Target SM 7.5", "sm_75"), + }; +}; diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..9fe67055dd1b43b63daf7b2de3b2a68896e7c5e8 --- /dev/null +++ b/lib/std/target/feature/PowerPcFeature.zig @@ -0,0 +1,163 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const PowerPcFeature = enum { + Bit64, + Bitregs64, + Altivec, + Bpermd, + Booke, + Cmpb, + Crbits, + DirectMove, + E500, + Extdiv, + Fcpsgn, + Fpcvt, + Fprnd, + Fpu, + Fre, + Fres, + Frsqrte, + Frsqrtes, + Fsqrt, + Float128, + Htm, + HardFloat, + Icbt, + IsaV30Instructions, + Isel, + InvariantFunctionDescriptors, + Ldbrx, + Lfiwax, + Longcall, + Mfocrf, + Msync, + Power8Altivec, + Crypto, + Power8Vector, + Power9Altivec, + Power9Vector, + Popcntd, + Ppc4xx, + Ppc6xx, + PpcPostraSched, + PpcPreraSched, + PartwordAtomics, + Qpx, + Recipprec, + Spe, + Stfiwx, + SecurePlt, + SlowPopcntd, + TwoConstNr, + Vsx, + VectorsUseTwoUnits, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Bit64, "64bit", "Enable 64-bit instructions", "64bit"), + FeatureInfo(@This()).create(.Bitregs64, "64bitregs", "Enable 64-bit registers usage for ppc32 [beta]", "64bitregs"), + FeatureInfo(@This()).createWithSubfeatures(.Altivec, "altivec", "Enable Altivec instructions", "altivec", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.Bpermd, "bpermd", "Enable the bpermd instruction", "bpermd"), + FeatureInfo(@This()).createWithSubfeatures(.Booke, "booke", "Enable Book E instructions", "booke", &[_]@This() { + .Icbt, + }), + FeatureInfo(@This()).create(.Cmpb, "cmpb", "Enable the cmpb instruction", "cmpb"), + FeatureInfo(@This()).create(.Crbits, "crbits", "Use condition-register bits individually", "crbits"), + FeatureInfo(@This()).createWithSubfeatures(.DirectMove, "direct-move", "Enable Power8 direct move instructions", "direct-move", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.E500, "e500", "Enable E500/E500mc instructions", "e500"), + FeatureInfo(@This()).create(.Extdiv, "extdiv", "Enable extended divide instructions", "extdiv"), + FeatureInfo(@This()).createWithSubfeatures(.Fcpsgn, "fcpsgn", "Enable the fcpsgn instruction", "fcpsgn", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fpcvt, "fpcvt", "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", "fpcvt", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fprnd, "fprnd", "Enable the fri[mnpz] instructions", "fprnd", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fpu, "fpu", "Enable classic FPU instructions", "fpu", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fre, "fre", "Enable the fre instruction", "fre", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fres, "fres", "Enable the fres instruction", "fres", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Frsqrte, "frsqrte", "Enable the frsqrte instruction", "frsqrte", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Frsqrtes, "frsqrtes", "Enable the frsqrtes instruction", "frsqrtes", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fsqrt, "fsqrt", "Enable the fsqrt instruction", "fsqrt", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Float128, "float128", "Enable the __float128 data type for IEEE-754R Binary128.", "float128", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.Htm, "htm", "Enable Hardware Transactional Memory instructions", "htm"), + FeatureInfo(@This()).create(.HardFloat, "hard-float", "Enable floating-point instructions", "hard-float"), + FeatureInfo(@This()).create(.Icbt, "icbt", "Enable icbt instruction", "icbt"), + FeatureInfo(@This()).create(.IsaV30Instructions, "isa-v30-instructions", "Enable instructions added in ISA 3.0.", "isa-v30-instructions"), + FeatureInfo(@This()).create(.Isel, "isel", "Enable the isel instruction", "isel"), + FeatureInfo(@This()).create(.InvariantFunctionDescriptors, "invariant-function-descriptors", "Assume function descriptors are invariant", "invariant-function-descriptors"), + FeatureInfo(@This()).create(.Ldbrx, "ldbrx", "Enable the ldbrx instruction", "ldbrx"), + FeatureInfo(@This()).createWithSubfeatures(.Lfiwax, "lfiwax", "Enable the lfiwax instruction", "lfiwax", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.Longcall, "longcall", "Always use indirect calls", "longcall"), + FeatureInfo(@This()).create(.Mfocrf, "mfocrf", "Enable the MFOCRF instruction", "mfocrf"), + FeatureInfo(@This()).createWithSubfeatures(.Msync, "msync", "Has only the msync instruction instead of sync", "msync", &[_]@This() { + .Icbt, + }), + FeatureInfo(@This()).createWithSubfeatures(.Power8Altivec, "power8-altivec", "Enable POWER8 Altivec instructions", "power8-altivec", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable POWER8 Crypto instructions", "crypto", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Power8Vector, "power8-vector", "Enable POWER8 vector instructions", "power8-vector", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Power9Altivec, "power9-altivec", "Enable POWER9 Altivec instructions", "power9-altivec", &[_]@This() { + .IsaV30Instructions, + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Power9Vector, "power9-vector", "Enable POWER9 vector instructions", "power9-vector", &[_]@This() { + .IsaV30Instructions, + .HardFloat, + }), + FeatureInfo(@This()).create(.Popcntd, "popcntd", "Enable the popcnt[dw] instructions", "popcntd"), + FeatureInfo(@This()).create(.Ppc4xx, "ppc4xx", "Enable PPC 4xx instructions", "ppc4xx"), + FeatureInfo(@This()).create(.Ppc6xx, "ppc6xx", "Enable PPC 6xx instructions", "ppc6xx"), + FeatureInfo(@This()).create(.PpcPostraSched, "ppc-postra-sched", "Use PowerPC post-RA scheduling strategy", "ppc-postra-sched"), + FeatureInfo(@This()).create(.PpcPreraSched, "ppc-prera-sched", "Use PowerPC pre-RA scheduling strategy", "ppc-prera-sched"), + FeatureInfo(@This()).create(.PartwordAtomics, "partword-atomics", "Enable l[bh]arx and st[bh]cx.", "partword-atomics"), + FeatureInfo(@This()).createWithSubfeatures(.Qpx, "qpx", "Enable QPX instructions", "qpx", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.Recipprec, "recipprec", "Assume higher precision reciprocal estimates", "recipprec"), + FeatureInfo(@This()).createWithSubfeatures(.Spe, "spe", "Enable SPE instructions", "spe", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).createWithSubfeatures(.Stfiwx, "stfiwx", "Enable the stfiwx instruction", "stfiwx", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.SecurePlt, "secure-plt", "Enable secure plt mode", "secure-plt"), + FeatureInfo(@This()).create(.SlowPopcntd, "slow-popcntd", "Has slow popcnt[dw] instructions", "slow-popcntd"), + FeatureInfo(@This()).create(.TwoConstNr, "two-const-nr", "Requires two constant Newton-Raphson computation", "two-const-nr"), + FeatureInfo(@This()).createWithSubfeatures(.Vsx, "vsx", "Enable VSX instructions", "vsx", &[_]@This() { + .HardFloat, + }), + FeatureInfo(@This()).create(.VectorsUseTwoUnits, "vectors-use-two-units", "Vectors use two units", "vectors-use-two-units"), + }; +}; diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..a489b6f5d38f6ff0fd2bf2ebc05a45d61fc678f7 --- /dev/null +++ b/lib/std/target/feature/RiscVFeature.zig @@ -0,0 +1,31 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const RiscVFeature = enum { + Bit64, + E, + RvcHints, + Relax, + A, + C, + D, + F, + M, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Bit64, "64bit", "Implements RV64", "64bit"), + FeatureInfo(@This()).create(.E, "e", "Implements RV32E (provides 16 rather than 32 GPRs)", "e"), + FeatureInfo(@This()).create(.RvcHints, "rvc-hints", "Enable RVC Hint Instructions.", "rvc-hints"), + FeatureInfo(@This()).create(.Relax, "relax", "Enable Linker relaxation.", "relax"), + FeatureInfo(@This()).create(.A, "a", "'A' (Atomic Instructions)", "a"), + FeatureInfo(@This()).create(.C, "c", "'C' (Compressed Instructions)", "c"), + FeatureInfo(@This()).createWithSubfeatures(.D, "d", "'D' (Double-Precision Floating-Point)", "d", &[_]@This() { + .F, + }), + FeatureInfo(@This()).create(.F, "f", "'F' (Single-Precision Floating-Point)", "f"), + FeatureInfo(@This()).create(.M, "m", "'M' (Integer Multiplication and Division)", "m"), + }; +}; diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..b0b65041531eacc08804bf235107fb098b00127d --- /dev/null +++ b/lib/std/target/feature/SparcFeature.zig @@ -0,0 +1,49 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const SparcFeature = enum { + Detectroundchange, + HardQuadFloat, + Leon, + NoFmuls, + NoFsmuld, + Leonpwrpsr, + SoftFloat, + SoftMulDiv, + DeprecatedV8, + V9, + Vis, + Vis2, + Vis3, + Fixallfdivsqrt, + Insertnopload, + Hasleoncasa, + Leoncyclecounter, + Hasumacsmac, + Popc, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Detectroundchange, "detectroundchange", "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", "detectroundchange"), + FeatureInfo(@This()).create(.HardQuadFloat, "hard-quad-float", "Enable quad-word floating point instructions", "hard-quad-float"), + FeatureInfo(@This()).create(.Leon, "leon", "Enable LEON extensions", "leon"), + FeatureInfo(@This()).create(.NoFmuls, "no-fmuls", "Disable the fmuls instruction.", "no-fmuls"), + FeatureInfo(@This()).create(.NoFsmuld, "no-fsmuld", "Disable the fsmuld instruction.", "no-fsmuld"), + FeatureInfo(@This()).create(.Leonpwrpsr, "leonpwrpsr", "Enable the PWRPSR instruction", "leonpwrpsr"), + FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software emulation for floating point", "soft-float"), + FeatureInfo(@This()).create(.SoftMulDiv, "soft-mul-div", "Use software emulation for integer multiply and divide", "soft-mul-div"), + FeatureInfo(@This()).create(.DeprecatedV8, "deprecated-v8", "Enable deprecated V8 instructions in V9 mode", "deprecated-v8"), + FeatureInfo(@This()).create(.V9, "v9", "Enable SPARC-V9 instructions", "v9"), + FeatureInfo(@This()).create(.Vis, "vis", "Enable UltraSPARC Visual Instruction Set extensions", "vis"), + FeatureInfo(@This()).create(.Vis2, "vis2", "Enable Visual Instruction Set extensions II", "vis2"), + FeatureInfo(@This()).create(.Vis3, "vis3", "Enable Visual Instruction Set extensions III", "vis3"), + FeatureInfo(@This()).create(.Fixallfdivsqrt, "fixallfdivsqrt", "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", "fixallfdivsqrt"), + FeatureInfo(@This()).create(.Insertnopload, "insertnopload", "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", "insertnopload"), + FeatureInfo(@This()).create(.Hasleoncasa, "hasleoncasa", "Enable CASA instruction for LEON3 and LEON4 processors", "hasleoncasa"), + FeatureInfo(@This()).create(.Leoncyclecounter, "leoncyclecounter", "Use the Leon cycle counter register", "leoncyclecounter"), + FeatureInfo(@This()).create(.Hasumacsmac, "hasumacsmac", "Enable UMAC and SMAC for LEON3 and LEON4 processors", "hasumacsmac"), + FeatureInfo(@This()).create(.Popc, "popc", "Use the popc (population count) instruction", "popc"), + }; +}; diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..6d3321a5bab2d68c7b98980a0d0d0424cdb7b3fd --- /dev/null +++ b/lib/std/target/feature/SystemZFeature.zig @@ -0,0 +1,81 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const SystemZFeature = enum { + DfpPackedConversion, + DfpZonedConversion, + DeflateConversion, + DistinctOps, + EnhancedDat2, + EnhancedSort, + ExecutionHint, + FpExtension, + FastSerialization, + GuardedStorage, + HighWord, + InsertReferenceBitsMultiple, + InterlockedAccess1, + LoadAndTrap, + LoadAndZeroRightmostByte, + LoadStoreOnCond, + LoadStoreOnCond2, + MessageSecurityAssistExtension3, + MessageSecurityAssistExtension4, + MessageSecurityAssistExtension5, + MessageSecurityAssistExtension7, + MessageSecurityAssistExtension8, + MessageSecurityAssistExtension9, + MiscellaneousExtensions, + MiscellaneousExtensions2, + MiscellaneousExtensions3, + PopulationCount, + ProcessorAssist, + ResetReferenceBitsMultiple, + TransactionalExecution, + Vector, + VectorEnhancements1, + VectorEnhancements2, + VectorPackedDecimal, + VectorPackedDecimalEnhancement, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.DfpPackedConversion, "dfp-packed-conversion", "Assume that the DFP packed-conversion facility is installed", "dfp-packed-conversion"), + FeatureInfo(@This()).create(.DfpZonedConversion, "dfp-zoned-conversion", "Assume that the DFP zoned-conversion facility is installed", "dfp-zoned-conversion"), + FeatureInfo(@This()).create(.DeflateConversion, "deflate-conversion", "Assume that the deflate-conversion facility is installed", "deflate-conversion"), + FeatureInfo(@This()).create(.DistinctOps, "distinct-ops", "Assume that the distinct-operands facility is installed", "distinct-ops"), + FeatureInfo(@This()).create(.EnhancedDat2, "enhanced-dat-2", "Assume that the enhanced-DAT facility 2 is installed", "enhanced-dat-2"), + FeatureInfo(@This()).create(.EnhancedSort, "enhanced-sort", "Assume that the enhanced-sort facility is installed", "enhanced-sort"), + FeatureInfo(@This()).create(.ExecutionHint, "execution-hint", "Assume that the execution-hint facility is installed", "execution-hint"), + FeatureInfo(@This()).create(.FpExtension, "fp-extension", "Assume that the floating-point extension facility is installed", "fp-extension"), + FeatureInfo(@This()).create(.FastSerialization, "fast-serialization", "Assume that the fast-serialization facility is installed", "fast-serialization"), + FeatureInfo(@This()).create(.GuardedStorage, "guarded-storage", "Assume that the guarded-storage facility is installed", "guarded-storage"), + FeatureInfo(@This()).create(.HighWord, "high-word", "Assume that the high-word facility is installed", "high-word"), + FeatureInfo(@This()).create(.InsertReferenceBitsMultiple, "insert-reference-bits-multiple", "Assume that the insert-reference-bits-multiple facility is installed", "insert-reference-bits-multiple"), + FeatureInfo(@This()).create(.InterlockedAccess1, "interlocked-access1", "Assume that interlocked-access facility 1 is installed", "interlocked-access1"), + FeatureInfo(@This()).create(.LoadAndTrap, "load-and-trap", "Assume that the load-and-trap facility is installed", "load-and-trap"), + FeatureInfo(@This()).create(.LoadAndZeroRightmostByte, "load-and-zero-rightmost-byte", "Assume that the load-and-zero-rightmost-byte facility is installed", "load-and-zero-rightmost-byte"), + FeatureInfo(@This()).create(.LoadStoreOnCond, "load-store-on-cond", "Assume that the load/store-on-condition facility is installed", "load-store-on-cond"), + FeatureInfo(@This()).create(.LoadStoreOnCond2, "load-store-on-cond-2", "Assume that the load/store-on-condition facility 2 is installed", "load-store-on-cond-2"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension3, "message-security-assist-extension3", "Assume that the message-security-assist extension facility 3 is installed", "message-security-assist-extension3"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension4, "message-security-assist-extension4", "Assume that the message-security-assist extension facility 4 is installed", "message-security-assist-extension4"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension5, "message-security-assist-extension5", "Assume that the message-security-assist extension facility 5 is installed", "message-security-assist-extension5"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension7, "message-security-assist-extension7", "Assume that the message-security-assist extension facility 7 is installed", "message-security-assist-extension7"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension8, "message-security-assist-extension8", "Assume that the message-security-assist extension facility 8 is installed", "message-security-assist-extension8"), + FeatureInfo(@This()).create(.MessageSecurityAssistExtension9, "message-security-assist-extension9", "Assume that the message-security-assist extension facility 9 is installed", "message-security-assist-extension9"), + FeatureInfo(@This()).create(.MiscellaneousExtensions, "miscellaneous-extensions", "Assume that the miscellaneous-extensions facility is installed", "miscellaneous-extensions"), + FeatureInfo(@This()).create(.MiscellaneousExtensions2, "miscellaneous-extensions-2", "Assume that the miscellaneous-extensions facility 2 is installed", "miscellaneous-extensions-2"), + FeatureInfo(@This()).create(.MiscellaneousExtensions3, "miscellaneous-extensions-3", "Assume that the miscellaneous-extensions facility 3 is installed", "miscellaneous-extensions-3"), + FeatureInfo(@This()).create(.PopulationCount, "population-count", "Assume that the population-count facility is installed", "population-count"), + FeatureInfo(@This()).create(.ProcessorAssist, "processor-assist", "Assume that the processor-assist facility is installed", "processor-assist"), + FeatureInfo(@This()).create(.ResetReferenceBitsMultiple, "reset-reference-bits-multiple", "Assume that the reset-reference-bits-multiple facility is installed", "reset-reference-bits-multiple"), + FeatureInfo(@This()).create(.TransactionalExecution, "transactional-execution", "Assume that the transactional-execution facility is installed", "transactional-execution"), + FeatureInfo(@This()).create(.Vector, "vector", "Assume that the vectory facility is installed", "vector"), + FeatureInfo(@This()).create(.VectorEnhancements1, "vector-enhancements-1", "Assume that the vector enhancements facility 1 is installed", "vector-enhancements-1"), + FeatureInfo(@This()).create(.VectorEnhancements2, "vector-enhancements-2", "Assume that the vector enhancements facility 2 is installed", "vector-enhancements-2"), + FeatureInfo(@This()).create(.VectorPackedDecimal, "vector-packed-decimal", "Assume that the vector packed decimal facility is installed", "vector-packed-decimal"), + FeatureInfo(@This()).create(.VectorPackedDecimalEnhancement, "vector-packed-decimal-enhancement", "Assume that the vector packed decimal enhancement facility is installed", "vector-packed-decimal-enhancement"), + }; +}; diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig new file mode 100644 index 0000000000000000000000000000000000000000..a7aaeee4f0a18db718254a8d50a3943074d23e44 --- /dev/null +++ b/lib/std/target/feature/WebAssemblyFeature.zig @@ -0,0 +1,33 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const WebAssemblyFeature = enum { + Atomics, + BulkMemory, + ExceptionHandling, + Multivalue, + MutableGlobals, + NontrappingFptoint, + Simd128, + SignExt, + TailCall, + UnimplementedSimd128, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).create(.Atomics, "atomics", "Enable Atomics", "atomics"), + FeatureInfo(@This()).create(.BulkMemory, "bulk-memory", "Enable bulk memory operations", "bulk-memory"), + FeatureInfo(@This()).create(.ExceptionHandling, "exception-handling", "Enable Wasm exception handling", "exception-handling"), + FeatureInfo(@This()).create(.Multivalue, "multivalue", "Enable multivalue blocks, instructions, and functions", "multivalue"), + FeatureInfo(@This()).create(.MutableGlobals, "mutable-globals", "Enable mutable globals", "mutable-globals"), + FeatureInfo(@This()).create(.NontrappingFptoint, "nontrapping-fptoint", "Enable non-trapping float-to-int conversion operators", "nontrapping-fptoint"), + FeatureInfo(@This()).create(.Simd128, "simd128", "Enable 128-bit SIMD", "simd128"), + FeatureInfo(@This()).create(.SignExt, "sign-ext", "Enable sign extension operators", "sign-ext"), + FeatureInfo(@This()).create(.TailCall, "tail-call", "Enable tail call instructions", "tail-call"), + FeatureInfo(@This()).createWithSubfeatures(.UnimplementedSimd128, "unimplemented-simd128", "Enable 128-bit SIMD not yet implemented in engines", "unimplemented-simd128", &[_]@This() { + .Simd128, + }), + }; +}; diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig new file mode 100644 index 0000000000000000000000000000000000000000..7a2cc58169ed01c2d04df33a74e93a6457dea132 --- /dev/null +++ b/lib/std/target/feature/X86Feature.zig @@ -0,0 +1,342 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const X86Feature = enum { + Dnow3, + Dnowa3, + Bit64, + Adx, + Aes, + Avx, + Avx2, + Avx512f, + Avx512bf16, + Avx512bitalg, + Bmi, + Bmi2, + Avx512bw, + Branchfusion, + Avx512cd, + Cldemote, + Clflushopt, + Clwb, + Clzero, + Cmov, + Cx8, + Cx16, + Avx512dq, + Mpx, + Enqcmd, + Avx512er, + Ermsb, + F16c, + Fma, + Fma4, + Fsgsbase, + Fxsr, + Fast11bytenop, + Fast15bytenop, + FastBextr, + FastHops, + FastLzcnt, + FastPartialYmmOrZmmWrite, + FastShldRotate, + FastScalarFsqrt, + FastScalarShiftMasks, + FastVariableShuffle, + FastVectorFsqrt, + FastVectorShiftMasks, + Gfni, + FastGather, + Avx512ifma, + Invpcid, + Sahf, + LeaSp, + LeaUsesAg, + Lwp, + Lzcnt, + FalseDepsLzcntTzcnt, + Mmx, + Movbe, + Movdir64b, + Movdiri, + Mwaitx, + Macrofusion, + MergeToThreewayBranch, + Nopl, + Pclmul, + Pconfig, + Avx512pf, + Pku, + Popcnt, + FalseDepsPopcnt, + Prefetchwt1, + Prfchw, + Ptwrite, + PadShortFunctions, + Prefer128Bit, + Prefer256Bit, + Rdpid, + Rdrnd, + Rdseed, + Rtm, + Retpoline, + RetpolineExternalThunk, + RetpolineIndirectBranches, + RetpolineIndirectCalls, + Sgx, + Sha, + Shstk, + Sse, + Sse2, + Sse3, + Sse4a, + Sse41, + Sse42, + SseUnalignedMem, + Ssse3, + Slow3opsLea, + IdivlToDivb, + IdivqToDivl, + SlowIncdec, + SlowLea, + SlowPmaddwd, + SlowPmulld, + SlowShld, + SlowTwoMemOps, + SlowUnalignedMem16, + SlowUnalignedMem32, + SoftFloat, + Tbm, + UseAa, + Vaes, + Avx512vbmi, + Avx512vbmi2, + Avx512vl, + Avx512vnni, + Avx512vp2intersect, + Vpclmulqdq, + Avx512vpopcntdq, + Waitpkg, + Wbnoinvd, + X87, + Xop, + Xsave, + Xsavec, + Xsaveopt, + Xsaves, + BitMode16, + BitMode32, + BitMode64, + + pub fn getInfo(self: @This()) FeatureInfo { + return feature_infos[@enumToInt(self)]; + } + + pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { + FeatureInfo(@This()).createWithSubfeatures(.Dnow3, "3dnow", "Enable 3DNow! instructions", "3dnow", &[_]@This() { + .Mmx, + }), + FeatureInfo(@This()).createWithSubfeatures(.Dnowa3, "3dnowa", "Enable 3DNow! Athlon instructions", "3dnowa", &[_]@This() { + .Mmx, + }), + FeatureInfo(@This()).create(.Bit64, "64bit", "Support 64-bit instructions", "64bit"), + FeatureInfo(@This()).create(.Adx, "adx", "Support ADX instructions", "adx"), + FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES instructions", "aes", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx, "avx", "Enable AVX instructions", "avx", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx2, "avx2", "Enable AVX2 instructions", "avx2", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512f, "avx512f", "Enable AVX-512 instructions", "avx512f", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512bf16, "avx512bf16", "Support bfloat16 floating point", "avx512bf16", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512bitalg, "avx512bitalg", "Enable AVX-512 Bit Algorithms", "avx512bitalg", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Bmi, "bmi", "Support BMI instructions", "bmi"), + FeatureInfo(@This()).create(.Bmi2, "bmi2", "Support BMI2 instructions", "bmi2"), + FeatureInfo(@This()).createWithSubfeatures(.Avx512bw, "avx512bw", "Enable AVX-512 Byte and Word Instructions", "avx512bw", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Branchfusion, "branchfusion", "CMP/TEST can be fused with conditional branches", "branchfusion"), + FeatureInfo(@This()).createWithSubfeatures(.Avx512cd, "avx512cd", "Enable AVX-512 Conflict Detection Instructions", "avx512cd", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Cldemote, "cldemote", "Enable Cache Demote", "cldemote"), + FeatureInfo(@This()).create(.Clflushopt, "clflushopt", "Flush A Cache Line Optimized", "clflushopt"), + FeatureInfo(@This()).create(.Clwb, "clwb", "Cache Line Write Back", "clwb"), + FeatureInfo(@This()).create(.Clzero, "clzero", "Enable Cache Line Zero", "clzero"), + FeatureInfo(@This()).create(.Cmov, "cmov", "Enable conditional move instructions", "cmov"), + FeatureInfo(@This()).create(.Cx8, "cx8", "Support CMPXCHG8B instructions", "cx8"), + FeatureInfo(@This()).createWithSubfeatures(.Cx16, "cx16", "64-bit with cmpxchg16b", "cx16", &[_]@This() { + .Cx8, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512dq, "avx512dq", "Enable AVX-512 Doubleword and Quadword Instructions", "avx512dq", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Mpx, "mpx", "Deprecated. Support MPX instructions", "mpx"), + FeatureInfo(@This()).create(.Enqcmd, "enqcmd", "Has ENQCMD instructions", "enqcmd"), + FeatureInfo(@This()).createWithSubfeatures(.Avx512er, "avx512er", "Enable AVX-512 Exponential and Reciprocal Instructions", "avx512er", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Ermsb, "ermsb", "REP MOVS/STOS are fast", "ermsb"), + FeatureInfo(@This()).createWithSubfeatures(.F16c, "f16c", "Support 16-bit floating point conversion instructions", "f16c", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fma, "fma", "Enable three-operand fused multiple-add", "fma", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Fma4, "fma4", "Enable four-operand fused multiple-add", "fma4", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Fsgsbase, "fsgsbase", "Support FS/GS Base instructions", "fsgsbase"), + FeatureInfo(@This()).create(.Fxsr, "fxsr", "Support fxsave/fxrestore instructions", "fxsr"), + FeatureInfo(@This()).create(.Fast11bytenop, "fast-11bytenop", "Target can quickly decode up to 11 byte NOPs", "fast-11bytenop"), + FeatureInfo(@This()).create(.Fast15bytenop, "fast-15bytenop", "Target can quickly decode up to 15 byte NOPs", "fast-15bytenop"), + FeatureInfo(@This()).create(.FastBextr, "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", "fast-bextr"), + FeatureInfo(@This()).createWithSubfeatures(.FastHops, "fast-hops", "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", "fast-hops", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.FastLzcnt, "fast-lzcnt", "LZCNT instructions are as fast as most simple integer ops", "fast-lzcnt"), + FeatureInfo(@This()).create(.FastPartialYmmOrZmmWrite, "fast-partial-ymm-or-zmm-write", "Partial writes to YMM/ZMM registers are fast", "fast-partial-ymm-or-zmm-write"), + FeatureInfo(@This()).create(.FastShldRotate, "fast-shld-rotate", "SHLD can be used as a faster rotate", "fast-shld-rotate"), + FeatureInfo(@This()).create(.FastScalarFsqrt, "fast-scalar-fsqrt", "Scalar SQRT is fast (disable Newton-Raphson)", "fast-scalar-fsqrt"), + FeatureInfo(@This()).create(.FastScalarShiftMasks, "fast-scalar-shift-masks", "Prefer a left/right scalar logical shift pair over a shift+and pair", "fast-scalar-shift-masks"), + FeatureInfo(@This()).create(.FastVariableShuffle, "fast-variable-shuffle", "Shuffles with variable masks are fast", "fast-variable-shuffle"), + FeatureInfo(@This()).create(.FastVectorFsqrt, "fast-vector-fsqrt", "Vector SQRT is fast (disable Newton-Raphson)", "fast-vector-fsqrt"), + FeatureInfo(@This()).create(.FastVectorShiftMasks, "fast-vector-shift-masks", "Prefer a left/right vector logical shift pair over a shift+and pair", "fast-vector-shift-masks"), + FeatureInfo(@This()).createWithSubfeatures(.Gfni, "gfni", "Enable Galois Field Arithmetic Instructions", "gfni", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.FastGather, "fast-gather", "Indicates if gather is reasonably fast", "fast-gather"), + FeatureInfo(@This()).createWithSubfeatures(.Avx512ifma, "avx512ifma", "Enable AVX-512 Integer Fused Multiple-Add", "avx512ifma", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Invpcid, "invpcid", "Invalidate Process-Context Identifier", "invpcid"), + FeatureInfo(@This()).create(.Sahf, "sahf", "Support LAHF and SAHF instructions", "sahf"), + FeatureInfo(@This()).create(.LeaSp, "lea-sp", "Use LEA for adjusting the stack pointer", "lea-sp"), + FeatureInfo(@This()).create(.LeaUsesAg, "lea-uses-ag", "LEA instruction needs inputs at AG stage", "lea-uses-ag"), + FeatureInfo(@This()).create(.Lwp, "lwp", "Enable LWP instructions", "lwp"), + FeatureInfo(@This()).create(.Lzcnt, "lzcnt", "Support LZCNT instruction", "lzcnt"), + FeatureInfo(@This()).create(.FalseDepsLzcntTzcnt, "false-deps-lzcnt-tzcnt", "LZCNT/TZCNT have a false dependency on dest register", "false-deps-lzcnt-tzcnt"), + FeatureInfo(@This()).create(.Mmx, "mmx", "Enable MMX instructions", "mmx"), + FeatureInfo(@This()).create(.Movbe, "movbe", "Support MOVBE instruction", "movbe"), + FeatureInfo(@This()).create(.Movdir64b, "movdir64b", "Support movdir64b instruction", "movdir64b"), + FeatureInfo(@This()).create(.Movdiri, "movdiri", "Support movdiri instruction", "movdiri"), + FeatureInfo(@This()).create(.Mwaitx, "mwaitx", "Enable MONITORX/MWAITX timer functionality", "mwaitx"), + FeatureInfo(@This()).create(.Macrofusion, "macrofusion", "Various instructions can be fused with conditional branches", "macrofusion"), + FeatureInfo(@This()).create(.MergeToThreewayBranch, "merge-to-threeway-branch", "Merge branches to a three-way conditional branch", "merge-to-threeway-branch"), + FeatureInfo(@This()).create(.Nopl, "nopl", "Enable NOPL instruction", "nopl"), + FeatureInfo(@This()).createWithSubfeatures(.Pclmul, "pclmul", "Enable packed carry-less multiplication instructions", "pclmul", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Pconfig, "pconfig", "platform configuration instruction", "pconfig"), + FeatureInfo(@This()).createWithSubfeatures(.Avx512pf, "avx512pf", "Enable AVX-512 PreFetch Instructions", "avx512pf", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Pku, "pku", "Enable protection keys", "pku"), + FeatureInfo(@This()).create(.Popcnt, "popcnt", "Support POPCNT instruction", "popcnt"), + FeatureInfo(@This()).create(.FalseDepsPopcnt, "false-deps-popcnt", "POPCNT has a false dependency on dest register", "false-deps-popcnt"), + FeatureInfo(@This()).create(.Prefetchwt1, "prefetchwt1", "Prefetch with Intent to Write and T1 Hint", "prefetchwt1"), + FeatureInfo(@This()).create(.Prfchw, "prfchw", "Support PRFCHW instructions", "prfchw"), + FeatureInfo(@This()).create(.Ptwrite, "ptwrite", "Support ptwrite instruction", "ptwrite"), + FeatureInfo(@This()).create(.PadShortFunctions, "pad-short-functions", "Pad short functions", "pad-short-functions"), + FeatureInfo(@This()).create(.Prefer128Bit, "prefer-128-bit", "Prefer 128-bit AVX instructions", "prefer-128-bit"), + FeatureInfo(@This()).create(.Prefer256Bit, "prefer-256-bit", "Prefer 256-bit AVX instructions", "prefer-256-bit"), + FeatureInfo(@This()).create(.Rdpid, "rdpid", "Support RDPID instructions", "rdpid"), + FeatureInfo(@This()).create(.Rdrnd, "rdrnd", "Support RDRAND instruction", "rdrnd"), + FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"), + FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"), + FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() { + .RetpolineIndirectBranches, + .RetpolineIndirectCalls, + }), + FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() { + .RetpolineIndirectCalls, + }), + FeatureInfo(@This()).create(.RetpolineIndirectBranches, "retpoline-indirect-branches", "Remove speculation of indirect branches from the generated code", "retpoline-indirect-branches"), + FeatureInfo(@This()).create(.RetpolineIndirectCalls, "retpoline-indirect-calls", "Remove speculation of indirect calls from the generated code", "retpoline-indirect-calls"), + FeatureInfo(@This()).create(.Sgx, "sgx", "Enable Software Guard Extensions", "sgx"), + FeatureInfo(@This()).createWithSubfeatures(.Sha, "sha", "Enable SHA instructions", "sha", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Shstk, "shstk", "Support CET Shadow-Stack instructions", "shstk"), + FeatureInfo(@This()).create(.Sse, "sse", "Enable SSE instructions", "sse"), + FeatureInfo(@This()).createWithSubfeatures(.Sse2, "sse2", "Enable SSE2 instructions", "sse2", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sse3, "sse3", "Enable SSE3 instructions", "sse3", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sse4a, "sse4a", "Support SSE 4a instructions", "sse4a", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sse41, "sse4.1", "Enable SSE 4.1 instructions", "sse4.1", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Sse42, "sse4.2", "Enable SSE 4.2 instructions", "sse4.2", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.SseUnalignedMem, "sse-unaligned-mem", "Allow unaligned memory operands with SSE instructions", "sse-unaligned-mem"), + FeatureInfo(@This()).createWithSubfeatures(.Ssse3, "ssse3", "Enable SSSE3 instructions", "ssse3", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Slow3opsLea, "slow-3ops-lea", "LEA instruction with 3 ops or certain registers is slow", "slow-3ops-lea"), + FeatureInfo(@This()).create(.IdivlToDivb, "idivl-to-divb", "Use 8-bit divide for positive values less than 256", "idivl-to-divb"), + FeatureInfo(@This()).create(.IdivqToDivl, "idivq-to-divl", "Use 32-bit divide for positive values less than 2^32", "idivq-to-divl"), + FeatureInfo(@This()).create(.SlowIncdec, "slow-incdec", "INC and DEC instructions are slower than ADD and SUB", "slow-incdec"), + FeatureInfo(@This()).create(.SlowLea, "slow-lea", "LEA instruction with certain arguments is slow", "slow-lea"), + FeatureInfo(@This()).create(.SlowPmaddwd, "slow-pmaddwd", "PMADDWD is slower than PMULLD", "slow-pmaddwd"), + FeatureInfo(@This()).create(.SlowPmulld, "slow-pmulld", "PMULLD instruction is slow", "slow-pmulld"), + FeatureInfo(@This()).create(.SlowShld, "slow-shld", "SHLD instruction is slow", "slow-shld"), + FeatureInfo(@This()).create(.SlowTwoMemOps, "slow-two-mem-ops", "Two memory operand instructions are slow", "slow-two-mem-ops"), + FeatureInfo(@This()).create(.SlowUnalignedMem16, "slow-unaligned-mem-16", "Slow unaligned 16-byte memory access", "slow-unaligned-mem-16"), + FeatureInfo(@This()).create(.SlowUnalignedMem32, "slow-unaligned-mem-32", "Slow unaligned 32-byte memory access", "slow-unaligned-mem-32"), + FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features", "soft-float"), + FeatureInfo(@This()).create(.Tbm, "tbm", "Enable TBM instructions", "tbm"), + FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), + FeatureInfo(@This()).createWithSubfeatures(.Vaes, "vaes", "Promote selected AES instructions to AVX512/AVX registers", "vaes", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi, "avx512vbmi", "Enable AVX-512 Vector Byte Manipulation Instructions", "avx512vbmi", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi2, "avx512vbmi2", "Enable AVX-512 further Vector Byte Manipulation Instructions", "avx512vbmi2", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vl, "avx512vl", "Enable AVX-512 Vector Length eXtensions", "avx512vl", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vnni, "avx512vnni", "Enable AVX-512 Vector Neural Network Instructions", "avx512vnni", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vp2intersect, "avx512vp2intersect", "Enable AVX-512 vp2intersect", "avx512vp2intersect", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Vpclmulqdq, "vpclmulqdq", "Enable vpclmulqdq instructions", "vpclmulqdq", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).createWithSubfeatures(.Avx512vpopcntdq, "avx512vpopcntdq", "Enable AVX-512 Population Count Instructions", "avx512vpopcntdq", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Waitpkg, "waitpkg", "Wait and pause enhancements", "waitpkg"), + FeatureInfo(@This()).create(.Wbnoinvd, "wbnoinvd", "Write Back No Invalidate", "wbnoinvd"), + FeatureInfo(@This()).create(.X87, "x87", "Enable X87 float instructions", "x87"), + FeatureInfo(@This()).createWithSubfeatures(.Xop, "xop", "Enable XOP instructions", "xop", &[_]@This() { + .Sse, + }), + FeatureInfo(@This()).create(.Xsave, "xsave", "Support xsave instructions", "xsave"), + FeatureInfo(@This()).create(.Xsavec, "xsavec", "Support xsavec instructions", "xsavec"), + FeatureInfo(@This()).create(.Xsaveopt, "xsaveopt", "Support xsaveopt instructions", "xsaveopt"), + FeatureInfo(@This()).create(.Xsaves, "xsaves", "Support xsaves instructions", "xsaves"), + FeatureInfo(@This()).create(.BitMode16, "16bit-mode", "16-bit mode (i8086)", "16bit-mode"), + FeatureInfo(@This()).create(.BitMode32, "32bit-mode", "32-bit mode (80386)", "32bit-mode"), + FeatureInfo(@This()).create(.BitMode64, "64bit-mode", "64-bit mode (x86_64)", "64bit-mode"), + }; +}; diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig new file mode 100644 index 0000000000000000000000000000000000000000..87a334978dba703130bd08382f68911b4d775093 --- /dev/null +++ b/lib/std/target/feature/empty.zig @@ -0,0 +1,5 @@ +const FeatureInfo = @import("std").target.feature.FeatureInfo; + +pub const EmptyFeature = enum { + pub const feature_infos = [0]FeatureInfo(@This()) {}; +} -- 2.54.0 From 8f191e0166ada745a677e8021dbb54598bcd94ea Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Mon, 16 Dec 2019 16:51:26 -0500 Subject: [PATCH 02/63] Update term feature deps -> subfeatures --- lib/std/target/feature.zig | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig index 31dce695a5ef430a4c3b1538ab3fa58b92bb2847..b5fb4ff96d3a3b1482e3479531ae94c4e0e0694e 100644 --- a/lib/std/target/feature.zig +++ b/lib/std/target/feature.zig @@ -7,8 +7,7 @@ pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature; pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature; pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature; pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature; -pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; -pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature; +pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature; pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature; pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature; pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature; @@ -51,7 +50,7 @@ pub fn FeatureInfo(comptime EnumType: type) type { value: EnumType, name: []const u8, - dependencies: []const EnumType, + subfeatures: []const EnumType, const Self = @This(); @@ -60,16 +59,16 @@ pub fn FeatureInfo(comptime EnumType: type) type { .value = value, .name = name, - .dependencies = &[_]EnumType{}, + .subfeatures = &[_]EnumType{}, }; } - fn createWithDeps(value: EnumType, name: []const u8, dependencies: []const EnumType) Self { + fn createWithSubfeatures(value: EnumType, name: []const u8, subfeatures: []const EnumType) Self { return Self { .value = value, .name = name, - .dependencies = dependencies, + .subfeatures = subfeatures, }; } }; -- 2.54.0 From 8ac138a318d5581fa7fb80cc540d14e0a482f59e Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Tue, 17 Dec 2019 09:43:05 -0500 Subject: [PATCH 03/63] Add parseArchTag and fix parseArchSub --- lib/std/target.zig | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 029bf0148947c4b175a5f2edb81a082c13870d00..4d5de1fc85ead7369d7312405517c76d0913bfe3 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -499,7 +499,7 @@ pub const Target = union(enum) { pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch { const info = @typeInfo(Arch); inline for (info.Union.fields) |field| { - if (mem.eql(u8, text, field.name)) { + if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { if (field.field_type == void) { return @as(Arch, @field(Arch, field.name)); } else { @@ -517,6 +517,31 @@ pub const Target = union(enum) { return error.UnknownArchitecture; } + pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) { + const info = @typeInfo(Arch); + inline for (info.Union.fields) |field| { + if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { + if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name)); + + if (field.field_type == void) { + return error.UnknownArchitecture; + } + + const sub_info = @typeInfo(field.field_type); + inline for (sub_info.Enum.fields) |sub_field| { + const combined = field.name ++ sub_field.name; + if (mem.eql(u8, text, combined)) { + return @as(@TagType(Arch), @field(Arch, field.name)); + } + } + + return error.UnknownSubArchitecture; + } + } + + return error.UnknownArchitecture; + } + pub fn parseOs(text: []const u8) !Os { const info = @typeInfo(Os); inline for (info.Enum.fields) |field| { -- 2.54.0 From 21908e100e42c5630e1e4253167496fb76238670 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Tue, 17 Dec 2019 09:45:00 -0500 Subject: [PATCH 04/63] Fix CPU and feature defs --- lib/std/target/cpu.zig | 12 +- lib/std/target/cpu/AArch64Cpu.zig | 532 +- lib/std/target/cpu/AmdGpuCpu.zig | 1046 ++-- lib/std/target/cpu/ArmCpu.zig | 1020 ++-- lib/std/target/cpu/AvrCpu.zig | 4304 ++++++++--------- lib/std/target/cpu/BpfCpu.zig | 28 +- lib/std/target/cpu/HexagonCpu.zig | 36 +- lib/std/target/cpu/MipsCpu.zig | 220 +- lib/std/target/cpu/Msp430Cpu.zig | 20 +- lib/std/target/cpu/NvptxCpu.zig | 68 +- lib/std/target/cpu/PowerPcCpu.zig | 180 +- lib/std/target/cpu/RiscVCpu.zig | 16 +- lib/std/target/cpu/SparcCpu.zig | 168 +- lib/std/target/cpu/SystemZCpu.zig | 60 +- lib/std/target/cpu/WebAssemblyCpu.zig | 20 +- lib/std/target/cpu/X86Cpu.zig | 324 +- lib/std/target/cpu/empty.zig | 4 +- lib/std/target/feature.zig | 12 +- lib/std/target/feature/AArch64Feature.zig | 440 +- lib/std/target/feature/AmdGpuFeature.zig | 150 +- lib/std/target/feature/ArmFeature.zig | 392 +- lib/std/target/feature/AvrFeature.zig | 162 +- lib/std/target/feature/BpfFeature.zig | 2 +- lib/std/target/feature/HexagonFeature.zig | 2 +- lib/std/target/feature/MipsFeature.zig | 146 +- lib/std/target/feature/Msp430Feature.zig | 2 +- lib/std/target/feature/NvptxFeature.zig | 2 +- lib/std/target/feature/PowerPcFeature.zig | 2 +- lib/std/target/feature/RiscVFeature.zig | 2 +- lib/std/target/feature/SparcFeature.zig | 2 +- lib/std/target/feature/SystemZFeature.zig | 2 +- lib/std/target/feature/WebAssemblyFeature.zig | 2 +- lib/std/target/feature/X86Feature.zig | 4 +- lib/std/target/feature/empty.zig | 4 +- 34 files changed, 4697 insertions(+), 4689 deletions(-) diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig index 02e707078a608724e6e8814664134ec300775fca..99c375874b9b66dbfbd4df2da7a14e2d76ee2255 100644 --- a/lib/std/target/cpu.zig +++ b/lib/std/target/cpu.zig @@ -1,7 +1,7 @@ const std = @import("std"); const feature = @import("feature.zig"); -const Arch = @import("arch.zig").Arch; +const Arch = std.Target.Arch; pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu; pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu; @@ -19,7 +19,7 @@ pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu; pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu; pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu; -const EmptyCpu = @import("feature/empty.zig").EmptyCpu; +pub const EmptyCpu = @import("cpu/empty.zig").EmptyCpu; pub fn ArchCpu(comptime arch: @TagType(Arch)) type { return switch (arch) { @@ -44,19 +44,21 @@ pub fn ArchCpu(comptime arch: @TagType(Arch)) type { } pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type { - return CpuInfo(feature.ArchFeature(arch)); + return CpuInfo(ArchCpu(arch), feature.ArchFeature(arch)); } -pub fn CpuInfo(comptime FeatureType: type) type { +pub fn CpuInfo(comptime CpuType: type, comptime FeatureType: type) type { return struct { + value: CpuType, name: []const u8, features: []const FeatureType, const Self = @This(); - fn create(name: []const u8, features: []const FeatureType) Self { + pub fn create(value: CpuType, name: []const u8, features: []const FeatureType) Self { return Self { + .value = value, .name = name, .features = features, }; diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig index d6c86aba0a3941a3b70aeaf7c709f6b9648b2fd3..1fb36080fd32ae600bea25a4cdd034d273103039 100644 --- a/lib/std/target/cpu/AArch64Cpu.zig +++ b/lib/std/target/cpu/AArch64Cpu.zig @@ -33,298 +33,298 @@ pub const AArch64Cpu = enum { Thunderxt88, Tsv110, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.AArch64Feature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.AArch64Feature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType { - .ZczFp, + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.AppleLatest, "apple-latest", &[_]FeatureType { + .ArithBccFusion, .ArithCbzFusion, - .FuseAes, + .ZczFp, .AlternateSextloadCvtF32Pattern, - .ZczFpWorkaround, - .FpArmv8, - .Perfmon, .DisableLatencySchedHeuristic, - .Zcm, + .Perfmon, .ZczGp, - .ArithBccFusion, + .ZczFpWorkaround, + .Zcm, + .FpArmv8, .FuseCryptoEor, + .FuseAes, .Cyclone, - }, - CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType { .Perfmon, .FpArmv8, .Crc, .A35, - }, - CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType { + .Perfmon, + .UsePostraScheduler, + .Crc, + .CustomCheapAsMove, + .BalanceFpOps, .UseAa, - .FuseAes, .FpArmv8, - .Perfmon, - .Crc, - .BalanceFpOps, - .UsePostraScheduler, - .CustomCheapAsMove, + .FuseAes, .A53, - }, - CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType { - .Rcpc, - .Ccpp, - .Pan, + }), + CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType { + .Lse, + .Vh, .Rdm, - .FuseAes, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, + .Crc, .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, + .FuseAes, .A55, - }, - CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType { - .FuseLiterals, - .FuseAes, - .FpArmv8, + }), + CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType { .Perfmon, - .Crc, - .BalanceFpOps, .UsePostraScheduler, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, + .CustomCheapAsMove, + .BalanceFpOps, + .FuseLiterals, + .FpArmv8, + .FuseAes, .A57, - }, - CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, + }), + CpuInfo(@This(), FeatureType).create(.CortexA65, "cortex-a65", &[_]FeatureType { .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, - .A65, - }, - CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType { .Rcpc, .Ccpp, - .Pan, - .Rdm, .FpArmv8, + .A65, + }), + CpuInfo(@This(), FeatureType).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType { .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, .A65, - }, - CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType { .Perfmon, + .FpArmv8, + .Crc, .FuseAes, - .FpArmv8, - .Crc, .A72, - }, - CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType { .Perfmon, - .FuseAes, .FpArmv8, .Crc, + .FuseAes, .A73, - }, - CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType { - .Rcpc, - .Ccpp, - .Pan, + }), + CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType { + .Lse, + .Vh, .Rdm, - .FuseAes, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, + .Crc, .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, + .FuseAes, .A75, - }, - CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, + }), + CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType { .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, - .A76, - }, - CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { .Rcpc, .Ccpp, - .Pan, - .Rdm, .FpArmv8, + .A76, + }), + CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, .A76, - }, - CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType { - .ZczFp, + }), + CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType { + .ArithBccFusion, .ArithCbzFusion, - .FuseAes, + .ZczFp, .AlternateSextloadCvtF32Pattern, - .ZczFpWorkaround, - .FpArmv8, - .Perfmon, .DisableLatencySchedHeuristic, - .Zcm, + .Perfmon, .ZczGp, - .ArithBccFusion, + .ZczFpWorkaround, + .Zcm, + .FpArmv8, .FuseCryptoEor, + .FuseAes, .Cyclone, - }, - CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType { .ZczFp, - .FuseAes, - .SlowPaired128, - .Force32bitJumpTables, + .Perfmon, + .UsePostraScheduler, + .Crc, .UseReciprocalSquareRoot, - .FpArmv8, - .Perfmon, - .SlowMisaligned128store, - .Crc, - .UsePostraScheduler, .CustomCheapAsMove, + .Force32bitJumpTables, + .SlowMisaligned128store, + .FpArmv8, + .SlowPaired128, + .FuseAes, .Exynosm1, - }, - CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType { .ZczFp, - .FuseAes, - .SlowPaired128, - .Force32bitJumpTables, - .FpArmv8, .Perfmon, - .SlowMisaligned128store, - .Crc, .UsePostraScheduler, + .Crc, .CustomCheapAsMove, + .Force32bitJumpTables, + .SlowMisaligned128store, + .FpArmv8, + .SlowPaired128, + .FuseAes, .Exynosm2, - }, - CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType { + .FuseCsel, .ZczFp, - .FuseLiterals, - .FuseAes, - .Force32bitJumpTables, - .FpArmv8, .Perfmon, - .Crc, - .LslFast, - .FuseAddress, .UsePostraScheduler, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, - .FuseCsel, + .CustomCheapAsMove, + .Force32bitJumpTables, + .FuseLiterals, + .FuseAddress, + .LslFast, + .FpArmv8, + .FuseAes, .Exynosm3, - }, - CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType { + .ArithBccFusion, + .Vh, + .ArithCbzFusion, .ZczFp, - .Lse, - .FuseArithLogic, - .Lor, + .Rdm, .UsePostraScheduler, - .Uaops, - .CustomCheapAsMove, - .ArithBccFusion, + .Ras, + .Force32bitJumpTables, .Ccpp, - .Perfmon, + .FuseCsel, .Pan, - .Rdm, + .Uaops, .FuseLiterals, - .Force32bitJumpTables, .LslFast, + .Lse, + .Perfmon, + .Dotprod, + .Lor, + .FuseArithLogic, + .Crc, + .CustomCheapAsMove, .FuseAddress, .ZczGp, - .Ras, - .FuseCsel, - .ArithCbzFusion, - .FuseAes, .FpArmv8, - .Crc, - .Dotprod, - .Vh, + .FuseAes, .Exynosm4, - }, - CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType { + .ArithBccFusion, + .Vh, + .ArithCbzFusion, .ZczFp, - .Lse, - .FuseArithLogic, - .Lor, + .Rdm, .UsePostraScheduler, - .Uaops, - .CustomCheapAsMove, - .ArithBccFusion, + .Ras, + .Force32bitJumpTables, .Ccpp, - .Perfmon, + .FuseCsel, .Pan, - .Rdm, + .Uaops, .FuseLiterals, - .Force32bitJumpTables, .LslFast, + .Lse, + .Perfmon, + .Dotprod, + .Lor, + .FuseArithLogic, + .Crc, + .CustomCheapAsMove, .FuseAddress, .ZczGp, - .Ras, - .FuseCsel, - .ArithCbzFusion, - .FuseAes, .FpArmv8, - .Crc, - .Dotprod, - .Vh, + .FuseAes, .Exynosm4, - }, - CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Falkor, "falkor", &[_]FeatureType { .ZczFp, .Rdm, + .Perfmon, + .UsePostraScheduler, + .Crc, + .PredictableSelectExpensive, + .CustomCheapAsMove, + .ZczGp, + .FpArmv8, .SlowStrqroStore, - .Perfmon, - .FpArmv8, - .Crc, .LslFast, - .UsePostraScheduler, - .ZczGp, - .CustomCheapAsMove, - .PredictableSelectExpensive, .Falkor, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { .Trbe, .Ete, .FpArmv8, @@ -332,149 +332,149 @@ pub const AArch64Cpu = enum { .Neon, .Perfmon, .UsePostraScheduler, - }, - CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType { .ZczFp, .Perfmon, - .FpArmv8, - .Crc, - .LslFast, .UsePostraScheduler, - .ZczGp, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, + .CustomCheapAsMove, + .ZczGp, + .FpArmv8, + .LslFast, .Kryo, - }, - CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, + }), + CpuInfo(@This(), FeatureType).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType { .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, .Neoversee1, - }, - CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { - .Rcpc, + }), + CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { + .Lse, .Spe, - .Ccpp, - .Pan, + .Vh, .Rdm, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, .Neoversen1, - }, - CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Saphira, "saphira", &[_]FeatureType { + .Spe, + .Vh, .ZczFp, - .Nv, + .Rdm, + .UsePostraScheduler, + .Dit, .Am, - .Lse, + .Ras, + .Rcpc, .Sel2, - .Lor, - .Tracev84, - .Uaops, - .UsePostraScheduler, - .CustomCheapAsMove, .Ccpp, - .Perfmon, - .TlbRmi, - .PredictableSelectExpensive, - .Fmi, - .Rcpc, - .Pan, - .Rdm, - .LslFast, .Pa, - .ZczGp, - .Dit, - .Ras, - .Spe, + .Pan, + .Uaops, + .Tracev84, .Mpam, - .FpArmv8, + .LslFast, + .Lse, + .Nv, + .Perfmon, + .Dotprod, + .TlbRmi, + .Lor, .Ccidx, - .Dotprod, + .PredictableSelectExpensive, .Crc, - .Vh, + .CustomCheapAsMove, + .Fmi, + .ZczGp, + .FpArmv8, .Saphira, - }, - CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Thunderx, "thunderx", &[_]FeatureType { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, .Thunderx, - }, - CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType { - .Pan, - .Rdm, + }), + CpuInfo(@This(), FeatureType).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType { + .Lse, + .ArithBccFusion, .Vh, + .Rdm, + .UsePostraScheduler, + .Crc, + .Lor, + .Pan, .AggressiveFma, .FpArmv8, - .Lse, - .Crc, - .Lor, - .UsePostraScheduler, - .ArithBccFusion, .PredictableSelectExpensive, .Thunderx2t99, - }, - CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Thunderxt81, "thunderxt81", &[_]FeatureType { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, .Thunderxt81, - }, - CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Thunderxt83, "thunderxt83", &[_]FeatureType { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, .Thunderxt83, - }, - CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Thunderxt88, "thunderxt88", &[_]FeatureType { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, .Thunderxt88, - }, - CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType { - .Uaops, + }), + CpuInfo(@This(), FeatureType).create(.Tsv110, "tsv110", &[_]FeatureType { + .Lse, .Spe, - .Ccpp, - .Pan, - .Rdm, - .FuseAes, .Vh, + .Rdm, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .UsePostraScheduler, + .Pan, .Dotprod, + .Crc, .Lor, - .UsePostraScheduler, + .Uaops, .CustomCheapAsMove, .Ras, + .Ccpp, + .FpArmv8, + .FuseAes, .Tsv110, - }, + }), }; }; diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig index f035e0e368670903adef2ec9aa073e35df7f3a6b..3f05f6033578a4966b2901382ff3de75313898f2 100644 --- a/lib/std/target/cpu/AmdGpuCpu.zig +++ b/lib/std/target/cpu/AmdGpuCpu.zig @@ -42,135 +42,135 @@ pub const AmdGpuCpu = enum { Tonga, Verde, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.AmdGpuFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.AmdGpuFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Bonaire, "bonaire", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Carrizo, "carrizo", &[_]FeatureType { .CodeObjectV3, .FastFmaf, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, .Xnack, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Fiji, "fiji", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { .Wavefrontsize64, - }, - CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.GenericHsa, "generic-hsa", &[_]FeatureType { .FlatAddressSpace, .Wavefrontsize64, - }, - CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx1010, "gfx1010", &[_]FeatureType { .CodeObjectV3, .DlInsts, .NoXnackSupport, .FlatSegmentOffsetBug, - .Gfx9Insts, - .NoSdstCmpx, - .Fp64, - .FastFmaf, - .Sdwa, - .SdwaScalar, - .Dpp, - .RegisterBanking, + .Vscnt, + .ApertureRegs, .Gfx10Insts, - .AddNoCarryInsts, + .IntClampInsts, + .PkFmacF16Inst, .SdwaOmod, - .SdwaSdst, + .SdwaScalar, + .AddNoCarryInsts, + .Movrel, + .SMemrealtime, + .NoSdstCmpx, + .CiInsts, .FlatAddressSpace, + .Sdwa, + .NoSramEccSupport, + .SdwaSdst, + .FlatInstOffsets, + .RegisterBanking, + .Dpp, + .Localmemorysize65536, + .Vop3p, + .BitInsts16, + .Dpp8, .Gfx8Insts, + .Inv2piInlineImm, + .Gfx9Insts, .FmaMixInsts, - .PkFmacF16Inst, - .Vop3Literal, .MimgR128, - .NoSramEccSupport, - .IntClampInsts, - .Movrel, - .Dpp8, - .ApertureRegs, - .NoDataDepHazard, - .CiInsts, + .Vop3Literal, .FlatGlobalInsts, - .BitInsts16, .FlatScratchInsts, - .SMemrealtime, - .Vop3p, - .FlatInstOffsets, - .Inv2piInlineImm, - .Localmemorysize65536, - .Vscnt, + .Fp64, + .FastFmaf, + .NoDataDepHazard, .Gfx10, .InstFwdPrefetchBug, .Ldsbankcount32, @@ -187,8 +187,8 @@ pub const AmdGpuCpu = enum { .VcmpxExecWarHazard, .VcmpxPermlaneHazard, .Wavefrontsize32, - }, - CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx1011, "gfx1011", &[_]FeatureType { .CodeObjectV3, .DlInsts, .NoXnackSupport, @@ -197,40 +197,40 @@ pub const AmdGpuCpu = enum { .Dot5Insts, .Dot6Insts, .FlatSegmentOffsetBug, - .Gfx9Insts, - .NoSdstCmpx, - .Fp64, - .FastFmaf, - .Sdwa, - .SdwaScalar, - .Dpp, - .RegisterBanking, + .Vscnt, + .ApertureRegs, .Gfx10Insts, - .AddNoCarryInsts, + .IntClampInsts, + .PkFmacF16Inst, .SdwaOmod, - .SdwaSdst, + .SdwaScalar, + .AddNoCarryInsts, + .Movrel, + .SMemrealtime, + .NoSdstCmpx, + .CiInsts, .FlatAddressSpace, + .Sdwa, + .NoSramEccSupport, + .SdwaSdst, + .FlatInstOffsets, + .RegisterBanking, + .Dpp, + .Localmemorysize65536, + .Vop3p, + .BitInsts16, + .Dpp8, .Gfx8Insts, + .Inv2piInlineImm, + .Gfx9Insts, .FmaMixInsts, - .PkFmacF16Inst, - .Vop3Literal, .MimgR128, - .NoSramEccSupport, - .IntClampInsts, - .Movrel, - .Dpp8, - .ApertureRegs, - .NoDataDepHazard, - .CiInsts, + .Vop3Literal, .FlatGlobalInsts, - .BitInsts16, .FlatScratchInsts, - .SMemrealtime, - .Vop3p, - .FlatInstOffsets, - .Inv2piInlineImm, - .Localmemorysize65536, - .Vscnt, + .Fp64, + .FastFmaf, + .NoDataDepHazard, .Gfx10, .InstFwdPrefetchBug, .Ldsbankcount32, @@ -246,8 +246,8 @@ pub const AmdGpuCpu = enum { .VcmpxExecWarHazard, .VcmpxPermlaneHazard, .Wavefrontsize32, - }, - CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx1012, "gfx1012", &[_]FeatureType { .CodeObjectV3, .DlInsts, .NoXnackSupport, @@ -256,40 +256,40 @@ pub const AmdGpuCpu = enum { .Dot5Insts, .Dot6Insts, .FlatSegmentOffsetBug, - .Gfx9Insts, - .NoSdstCmpx, - .Fp64, - .FastFmaf, - .Sdwa, - .SdwaScalar, - .Dpp, - .RegisterBanking, + .Vscnt, + .ApertureRegs, .Gfx10Insts, - .AddNoCarryInsts, + .IntClampInsts, + .PkFmacF16Inst, .SdwaOmod, - .SdwaSdst, + .SdwaScalar, + .AddNoCarryInsts, + .Movrel, + .SMemrealtime, + .NoSdstCmpx, + .CiInsts, .FlatAddressSpace, + .Sdwa, + .NoSramEccSupport, + .SdwaSdst, + .FlatInstOffsets, + .RegisterBanking, + .Dpp, + .Localmemorysize65536, + .Vop3p, + .BitInsts16, + .Dpp8, .Gfx8Insts, + .Inv2piInlineImm, + .Gfx9Insts, .FmaMixInsts, - .PkFmacF16Inst, - .Vop3Literal, .MimgR128, - .NoSramEccSupport, - .IntClampInsts, - .Movrel, - .Dpp8, - .ApertureRegs, - .NoDataDepHazard, - .CiInsts, + .Vop3Literal, .FlatGlobalInsts, - .BitInsts16, .FlatScratchInsts, - .SMemrealtime, - .Vop3p, - .FlatInstOffsets, - .Inv2piInlineImm, - .Localmemorysize65536, - .Vscnt, + .Fp64, + .FastFmaf, + .NoDataDepHazard, .Gfx10, .InstFwdPrefetchBug, .Ldsbankcount32, @@ -306,392 +306,392 @@ pub const AmdGpuCpu = enum { .VcmpxExecWarHazard, .VcmpxPermlaneHazard, .Wavefrontsize32, - }, - CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx600, "gfx600", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .FastFmaf, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx601, "gfx601", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, - }, - CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx700, "gfx700", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx701, "gfx701", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .FastFmaf, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx702, "gfx702", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .FastFmaf, .Ldsbankcount16, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx703, "gfx703", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount16, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx704, "gfx704", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx801, "gfx801", &[_]FeatureType { .CodeObjectV3, .FastFmaf, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, .Xnack, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx802, "gfx802", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .SgprInitBug, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx803, "gfx803", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx810, "gfx810", &[_]FeatureType { .CodeObjectV3, .Ldsbankcount16, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, + .CiInsts, + .FlatAddressSpace, .Sdwa, - .VgprIndexMode, + .Wavefrontsize64, + .NoSramEccSupport, + .ScalarStores, + .Gfx7Gfx8Gfx9Insts, .Dpp, - .FlatAddressSpace, + .Localmemorysize65536, + .BitInsts16, + .VgprIndexMode, .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, + .Inv2piInlineImm, .MimgR128, - .NoSramEccSupport, - .IntClampInsts, - .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, - .BitInsts16, - .SMemrealtime, - .Inv2piInlineImm, - .Localmemorysize65536, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, .Xnack, - }, - CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx900, "gfx900", &[_]FeatureType { .CodeObjectV3, .NoSramEccSupport, .NoXnackSupport, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, .MadMixInsts, - }, - CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx902, "gfx902", &[_]FeatureType { .CodeObjectV3, .NoSramEccSupport, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, .MadMixInsts, .Xnack, - }, - CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx904, "gfx904", &[_]FeatureType { .CodeObjectV3, .NoSramEccSupport, .NoXnackSupport, .FmaMixInsts, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, - }, - CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx906, "gfx906", &[_]FeatureType { .CodeObjectV3, .DlInsts, .NoXnackSupport, .Dot1Insts, .Dot2Insts, .FmaMixInsts, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx908, "gfx908", &[_]FeatureType { .AtomicFaddInsts, .CodeObjectV3, .DlInsts, @@ -702,36 +702,36 @@ pub const AmdGpuCpu = enum { .Dot5Insts, .Dot6Insts, .FmaMixInsts, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, .MaiInsts, @@ -739,322 +739,322 @@ pub const AmdGpuCpu = enum { .PkFmacF16Inst, .SramEcc, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gfx909, "gfx909", &[_]FeatureType { .CodeObjectV3, - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, + .Dpp, + .Localmemorysize65536, + .Vop3p, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, + .Inv2piInlineImm, + .Gfx9Insts, + .ScalarFlatScratchInsts, .FlatGlobalInsts, - .BitInsts16, .FlatScratchInsts, - .SMemrealtime, - .Vop3p, - .FlatInstOffsets, - .Inv2piInlineImm, - .Localmemorysize65536, + .Fp64, + .FastFmaf, .Gfx9, .Ldsbankcount32, .MadMixInsts, .Xnack, - }, - CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hainan, "hainan", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, - }, - CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hawaii, "hawaii", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .FastFmaf, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Iceland, "iceland", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .SgprInitBug, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Kabini, "kabini", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount16, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Kaveri, "kaveri", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Mullins, "mullins", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount16, - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, .SeaIslands, - }, - CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Oland, "oland", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, - }, - CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pitcairn, "pitcairn", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, - }, - CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Polaris10, "polaris10", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Polaris11, "polaris11", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Stoney, "stoney", &[_]FeatureType { .CodeObjectV3, .Ldsbankcount16, - .Wavefrontsize64, - .Fp64, + .IntClampInsts, + .SdwaMav, + .Movrel, + .SMemrealtime, .Gcn3Encoding, .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, + .CiInsts, .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, + .Sdwa, + .Wavefrontsize64, .NoSramEccSupport, - .IntClampInsts, .ScalarStores, - .Movrel, - .SdwaMav, - .CiInsts, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, .Xnack, - }, - CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Tahiti, "tahiti", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .FastFmaf, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, .HalfRate64Ops, - }, - CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Tonga, "tonga", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, .SgprInitBug, .UnpackedD16Vmem, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, - .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, - .NoSramEccSupport, .IntClampInsts, - .ScalarStores, - .Movrel, .SdwaMav, + .Movrel, + .SMemrealtime, + .Gcn3Encoding, + .TrigReducedRange, .CiInsts, + .FlatAddressSpace, + .Sdwa, + .Wavefrontsize64, + .NoSramEccSupport, + .ScalarStores, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, .VolcanicIslands, - }, - CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Verde, "verde", &[_]FeatureType { .CodeObjectV3, .NoXnackSupport, .Ldsbankcount32, - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Localmemorysize32768, .SouthernIslands, - }, + }), }; }; diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig index 5e60628d48177d300248ecdc3b2172763e6ac907..bb5179464495be7269191ad2161a59d4cc275dfe 100644 --- a/lib/std/target/cpu/ArmCpu.zig +++ b/lib/std/target/cpu/ArmCpu.zig @@ -86,154 +86,154 @@ pub const ArmCpu = enum { Swift, Xscale, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.ArmFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.ArmFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Arm1020e, "arm1020e", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1020t, "arm1020t", &[_]FeatureType { .V4t, .Armv5t, - }, - CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1022e, "arm1022e", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm10e, "arm10e", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType { .V4t, .Armv5t, - }, - CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType { .V4t, .Dsp, .Armv6, - }, - CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType { .V4t, .Dsp, .Armv6, .Slowfpvmlx, .Fpregs, .Vfp2, - }, - CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType { .V4t, + .Thumb2, .Dsp, .Armv6t2, - }, - CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType { .V4t, + .Thumb2, .Dsp, .Armv6t2, .Slowfpvmlx, .Fpregs, .Vfp2, - }, - CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType { .V4t, .Trustzone, .Armv6kz, - }, - CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType { .V4t, .Trustzone, .Armv6kz, - }, - CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType { .V4t, .Trustzone, .Armv6kz, .Slowfpvmlx, .Fpregs, .Vfp2, - }, - CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm710t, "arm710t", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm720t, "arm720t", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm8, "arm8", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm810, "arm810", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm9, "arm9", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm920, "arm920", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm920t, "arm920t", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm922t, "arm922t", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm940t, "arm940t", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm946eS, "arm946e-s", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm966eS, "arm966e-s", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm968eS, "arm968e-s", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm9e, "arm9e", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA12, "cortex-a12", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidPartialCpsr, @@ -247,16 +247,16 @@ pub const ArmCpu = enum { .Hwdiv, .Virtualization, .A12, - }, - CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA15, "cortex-a15", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidPartialCpsr, @@ -273,16 +273,16 @@ pub const ArmCpu = enum { .Hwdiv, .Virtualization, .A15, - }, - CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA17, "cortex-a17", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidPartialCpsr, @@ -296,57 +296,57 @@ pub const ArmCpu = enum { .Hwdiv, .Virtualization, .A17, - }, - CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA32, "cortex-a32", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, - }, - CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, .A35, - }, - CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA5, "cortex-a5", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .RetAddrStack, @@ -358,84 +358,84 @@ pub const ArmCpu = enum { .Vfp4, .VmlxForwarding, .A5, - }, - CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, .Fpao, .A53, - }, - CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Dotprod, .A55, - }, - CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .AvoidPartialCpsr, .CheapPredicableCpsr, .Crypto, .Fpao, .A57, - }, - CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA7, "cortex-a7", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .RetAddrStack, @@ -451,128 +451,128 @@ pub const ArmCpu = enum { .Hwdiv, .Virtualization, .A7, - }, - CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, .A72, - }, - CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, .A73, - }, - CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Dotprod, .A75, - }, - CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Crypto, .Dotprod, .Fullfp16, .A76, - }, - CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Crypto, .Dotprod, .Fullfp16, .A76, - }, - CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA8, "cortex-a8", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .RetAddrStack, @@ -583,16 +583,16 @@ pub const ArmCpu = enum { .Trustzone, .VmlxForwarding, .A8, - }, - CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexA9, "cortex-a9", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidPartialCpsr, @@ -608,171 +608,171 @@ pub const ArmCpu = enum { .Trustzone, .VmlxForwarding, .A9, - }, - CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType { - .Mclass, - .StrictAlign, + }), + CpuInfo(@This(), FeatureType).create(.CortexM0, "cortex-m0", &[_]FeatureType { + .V4t, .ThumbMode, .Db, - .V4t, + .StrictAlign, + .Mclass, .Noarm, .Armv6M, - }, - CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType { - .Mclass, - .StrictAlign, + }), + CpuInfo(@This(), FeatureType).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType { + .V4t, .ThumbMode, .Db, - .V4t, + .StrictAlign, + .Mclass, .Noarm, .Armv6M, - }, - CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType { - .Mclass, - .StrictAlign, + }), + CpuInfo(@This(), FeatureType).create(.CortexM1, "cortex-m1", &[_]FeatureType { + .V4t, .ThumbMode, .Db, - .V4t, + .StrictAlign, + .Mclass, .Noarm, .Armv6M, - }, - CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType { - .Mclass, - .StrictAlign, + }), + CpuInfo(@This(), FeatureType).create(.CortexM23, "cortex-m23", &[_]FeatureType { + .V4t, .ThumbMode, - .Db, .Msecext8, .V7clrex, - .V4t, - .Hwdiv, + .Db, + .StrictAlign, + .Mclass, .Noarm, .AcquireRelease, + .Hwdiv, .Armv8Mbase, .NoMovt, - }, - CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.CortexM3, "cortex-m3", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, .Armv7M, .NoBranchPredictor, .LoopAlign, .UseAa, .UseMisched, .M3, - }, - CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.CortexM33, "cortex-m33", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, .Msecext8, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, .AcquireRelease, + .Hwdiv, .Armv8Mmain, .Dsp, - .Fp16, .Fpregs, + .Fp16, .FpArmv8d16sp, .NoBranchPredictor, .Slowfpvmlx, .LoopAlign, .UseAa, .UseMisched, - }, - CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.CortexM35p, "cortex-m35p", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, .Msecext8, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, .AcquireRelease, + .Hwdiv, .Armv8Mmain, .Dsp, - .Fp16, .Fpregs, + .Fp16, .FpArmv8d16sp, .NoBranchPredictor, .Slowfpvmlx, .LoopAlign, .UseAa, .UseMisched, - }, - CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.CortexM4, "cortex-m4", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, - .Dsp, .V7clrex, - .V4t, - .Hwdiv, + .Dsp, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, .Armv7eM, .NoBranchPredictor, .Slowfpvmlx, .LoopAlign, .UseAa, .UseMisched, - .Fp16, .Fpregs, + .Fp16, .Vfp4d16sp, - }, - CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.CortexM7, "cortex-m7", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, - .Dsp, .V7clrex, - .V4t, - .Hwdiv, + .Dsp, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, .Armv7eM, - .Fp16, .Fpregs, + .Fp16, .FpArmv8d16, - }, - CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexR4, "cortex-r4", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .Rclass, - .V7clrex, .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Hwdiv, + .Rclass, .Armv7R, .AvoidPartialCpsr, .RetAddrStack, .R4, - }, - CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexR4f, "cortex-r4f", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .Rclass, - .V7clrex, .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Hwdiv, + .Rclass, .Armv7R, .AvoidPartialCpsr, .RetAddrStack, @@ -781,16 +781,16 @@ pub const ArmCpu = enum { .Fpregs, .Vfp3d16, .R4, - }, - CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexR5, "cortex-r5", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .Rclass, - .V7clrex, .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Hwdiv, + .Rclass, .Armv7R, .AvoidPartialCpsr, .HwdivArm, @@ -800,39 +800,39 @@ pub const ArmCpu = enum { .Fpregs, .Vfp3d16, .R5, - }, - CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.CortexR52, "cortex-r52", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, .Crc, - .Fp16, + .Fpregs, + .Mp, .Dfb, .Dsp, - .Rclass, - .V7clrex, + .Fp16, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .Db, + .V7clrex, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Rclass, .Armv8R, .Fpao, .UseAa, .UseMisched, .R52, - }, - CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexR7, "cortex-r7", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .Rclass, - .V7clrex, .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Hwdiv, + .Rclass, .Armv7R, .AvoidPartialCpsr, .Fp16, @@ -844,16 +844,16 @@ pub const ArmCpu = enum { .Fpregs, .Vfp3d16, .R7, - }, - CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.CortexR8, "cortex-r8", &[_]FeatureType { .Perfmon, - .Db, + .V4t, + .V7clrex, .Dsp, + .Thumb2, + .Db, + .Hwdiv, .Rclass, - .V7clrex, - .V4t, - .Hwdiv, .Armv7R, .AvoidPartialCpsr, .Fp16, @@ -864,24 +864,24 @@ pub const ArmCpu = enum { .SlowFpBrcc, .Fpregs, .Vfp3d16, - }, - CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .AvoidMovsShop, .AvoidPartialCpsr, @@ -894,197 +894,197 @@ pub const ArmCpu = enum { .Vfp4, .Zcz, .Swift, - }, - CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ep9312, "ep9312", &[_]FeatureType { .V4t, .Armv4t, - }, - CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, - .Zcz, - .SlowVdup32, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, .ExpandFpMlx, - .RetAddrStack, - .UseAa, .Exynos, - }, - CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, - .Zcz, - .SlowVdup32, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, .ExpandFpMlx, - .RetAddrStack, - .UseAa, .Exynos, - }, - CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, - .Zcz, - .SlowVdup32, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, .ExpandFpMlx, - .RetAddrStack, - .UseAa, .Exynos, - }, - CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Dotprod, .Fullfp16, - .Zcz, - .SlowVdup32, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, .ExpandFpMlx, - .RetAddrStack, - .UseAa, .Exynos, - }, - CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Dotprod, .Fullfp16, - .Zcz, - .SlowVdup32, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, .ExpandFpMlx, - .RetAddrStack, - .UseAa, .Exynos, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Iwmmxt, "iwmmxt", &[_]FeatureType { .V4t, .Armv5te, - }, - CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.Krait, "krait", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidPartialCpsr, @@ -1097,107 +1097,107 @@ pub const ArmCpu = enum { .Vfp4, .VmlxForwarding, .Krait, - }, - CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv8A, .Crypto, .Kryo, - }, - CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Mpcore, "mpcore", &[_]FeatureType { .V4t, .Armv6k, .Slowfpvmlx, .Fpregs, .Vfp2, - }, - CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType { .V4t, .Armv6k, - }, - CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { - .Thumb2, - .Mp, + }), + CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, .Armv82A, .Crypto, .Dotprod, - }, - CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType { - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.Sc000, "sc000", &[_]FeatureType { + .V4t, + .ThumbMode, + .Db, .StrictAlign, - .ThumbMode, - .Db, - .V4t, + .Mclass, .Noarm, .Armv6M, - }, - CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType { - .Thumb2, - .Mclass, + }), + CpuInfo(@This(), FeatureType).create(.Sc300, "sc300", &[_]FeatureType { .Perfmon, + .V4t, .ThumbMode, - .Db, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, .Armv7M, .NoBranchPredictor, .UseAa, .UseMisched, .M3, - }, - CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Strongarm, "strongarm", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Strongarm110, "strongarm110", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Strongarm1100, "strongarm1100", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Strongarm1110, "strongarm1110", &[_]FeatureType { .Armv4, - }, - CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType { - .Thumb2, + }), + CpuInfo(@This(), FeatureType).create(.Swift, "swift", &[_]FeatureType { .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, .Armv7A, .AvoidMovsShop, @@ -1221,10 +1221,10 @@ pub const ArmCpu = enum { .Fp16, .Vfp4, .Swift, - }, - CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Xscale, "xscale", &[_]FeatureType { .V4t, .Armv5te, - }, + }), }; }; diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig index 529152899b222a49092aa6e5bb8188808fe518c5..812554134bc274b4e76698160bceb6b50d472ce4 100644 --- a/lib/std/target/cpu/AvrCpu.zig +++ b/lib/std/target/cpu/AvrCpu.zig @@ -260,3604 +260,3604 @@ pub const AvrCpu = enum { Avrxmega7, M3000, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.AvrFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.AvrFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType { - .Ijmpcall, - .Sram, + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.At43usb320, "at43usb320", &[_]FeatureType { + .Lpm, .Elpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr31, - }, - CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr31, + }), + CpuInfo(@This(), FeatureType).create(.At43usb355, "at43usb355", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr3, - }, - CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr3, + }), + CpuInfo(@This(), FeatureType).create(.At76c711, "at76c711", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr3, - }, - CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr3, + }), + CpuInfo(@This(), FeatureType).create(.At86rf401, "at86rf401", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr2, .Lpmx, .Movw, - }, - CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType { - .Ijmpcall, - .Sram, + }), + CpuInfo(@This(), FeatureType).create(.At90c8534, "at90c8534", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90can128, "at90can128", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.At90can32, "at90can32", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90can64, "at90can64", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm1, "at90pwm1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm161, "at90pwm161", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm2, "at90pwm2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm216, "at90pwm216", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm3, "at90pwm3", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm316, "at90pwm316", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.At90pwm81, "at90pwm81", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, .Avr4, - }, - CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.At90s1200, "at90s1200", &[_]FeatureType { .Avr0, - }, - CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType { - .Ijmpcall, - .Sram, + }), + CpuInfo(@This(), FeatureType).create(.At90s2313, "at90s2313", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s2323, "at90s2323", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s2333, "at90s2333", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s2343, "at90s2343", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s4414, "at90s4414", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s4433, "at90s4433", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s4434, "at90s4434", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s8515, "at90s8515", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90s8535, "at90s8535", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType { .Ijmpcall, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.At90scr100, "at90scr100", &[_]FeatureType { + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90usb1286, "at90usb1286", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.At90usb1287, "at90usb1287", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.At90usb162, "at90usb162", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.At90usb646, "at90usb646", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90usb647, "at90usb647", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.At90usb82, "at90usb82", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.At94k, "at94k", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr3, .Lpmx, .Movw, .Mul, - }, - CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Ata5272, "ata5272", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Ata5505, "ata5505", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Ata5790, "ata5790", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Ata5795, "ata5795", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Ata6285, "ata6285", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Ata6286, "ata6286", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Ata6289, "ata6289", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega103, "atmega103", &[_]FeatureType { + .Lpm, .Elpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr31, - }, - CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Avr31, + }), + CpuInfo(@This(), FeatureType).create(.Atmega128, "atmega128", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega1280, "atmega1280", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega1281, "atmega1281", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega1284, "atmega1284", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega1284p, "atmega1284p", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, - .Break, - .Spm, - .Elpm, .Lpmx, + .Ijmpcall, + .Break, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega128a, "atmega128a", &[_]FeatureType { + .Lpm, + .Elpm, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16, "atmega16", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega161, "atmega161", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr3, .Lpmx, .Movw, .Mul, .Spm, - }, - CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Atmega162, "atmega162", &[_]FeatureType { + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega163, "atmega163", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr3, .Lpmx, .Movw, .Mul, .Spm, - }, - CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Atmega164a, "atmega164a", &[_]FeatureType { + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega164p, "atmega164p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega164pa, "atmega164pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega165, "atmega165", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega165a, "atmega165a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega165p, "atmega165p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega165pa, "atmega165pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega168, "atmega168", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega168a, "atmega168a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega168p, "atmega168p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega168pa, "atmega168pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega169, "atmega169", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega169a, "atmega169a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega169p, "atmega169p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega169pa, "atmega169pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16a, "atmega16a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16hva, "atmega16hva", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16m1, "atmega16m1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16u2, "atmega16u2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Atmega16u4, "atmega16u4", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega2560, "atmega2560", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr6, - }, - CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr6, + }), + CpuInfo(@This(), FeatureType).create(.Atmega2561, "atmega2561", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr6, - }, - CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr6, + }), + CpuInfo(@This(), FeatureType).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr6, - }, - CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr6, + }), + CpuInfo(@This(), FeatureType).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr6, - }, - CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr6, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32, "atmega32", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega323, "atmega323", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega324a, "atmega324a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega324p, "atmega324p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega324pa, "atmega324pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega325, "atmega325", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3250, "atmega3250", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3250a, "atmega3250a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3250p, "atmega3250p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega325a, "atmega325a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega325p, "atmega325p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega325pa, "atmega325pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega328, "atmega328", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega328p, "atmega328p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega329, "atmega329", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3290, "atmega3290", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3290a, "atmega3290a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3290p, "atmega3290p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega329a, "atmega329a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega329p, "atmega329p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega329pa, "atmega329pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32a, "atmega32a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32c1, "atmega32c1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32m1, "atmega32m1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32u2, "atmega32u2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32u4, "atmega32u4", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega32u6, "atmega32u6", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega406, "atmega406", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega48, "atmega48", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega48a, "atmega48a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega48p, "atmega48p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega48pa, "atmega48pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64, "atmega64", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega640, "atmega640", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega644, "atmega644", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega644a, "atmega644a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega644p, "atmega644p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega644pa, "atmega644pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega645, "atmega645", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6450, "atmega6450", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6450a, "atmega6450a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6450p, "atmega6450p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega645a, "atmega645a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega645p, "atmega645p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega649, "atmega649", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6490, "atmega6490", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6490a, "atmega6490a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega6490p, "atmega6490p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega649a, "atmega649a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega649p, "atmega649p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64a, "atmega64a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64c1, "atmega64c1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64hve, "atmega64hve", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64m1, "atmega64m1", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8, "atmega8", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8515, "atmega8515", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr2, .Lpmx, .Movw, .Mul, .Spm, - }, - CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType { - .Ijmpcall, - .Sram, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8535, "atmega8535", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr2, .Lpmx, .Movw, .Mul, .Spm, - }, - CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Atmega88, "atmega88", &[_]FeatureType { + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega88a, "atmega88a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega88p, "atmega88p", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega88pa, "atmega88pa", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8a, "atmega8a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8hva, "atmega8hva", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType { + .Mul, + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Atmega8u2, "atmega8u2", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType { + .Lpmx, + .Ijmpcall, .Break, - .Tinyencoding, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Attiny10, "attiny10", &[_]FeatureType { .Avr0, .Sram, - .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType { .Break, .Tinyencoding, + .Avrtiny, + }), + CpuInfo(@This(), FeatureType).create(.Attiny102, "attiny102", &[_]FeatureType { .Avr0, .Sram, - .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType { .Break, .Tinyencoding, + .Avrtiny, + }), + CpuInfo(@This(), FeatureType).create(.Attiny104, "attiny104", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType { - .Lpm, + }), + CpuInfo(@This(), FeatureType).create(.Attiny11, "attiny11", &[_]FeatureType { .Avr0, - .Avr1, - }, - CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType { .Lpm, + .Avr1, + }), + CpuInfo(@This(), FeatureType).create(.Attiny12, "attiny12", &[_]FeatureType { .Avr0, + .Lpm, .Avr1, - }, - CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Attiny13, "attiny13", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny13a, "attiny13a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Lpmx, + .Ijmpcall, + .Break, .Avr25, - }, - CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType { - .Lpm, + }), + CpuInfo(@This(), FeatureType).create(.Attiny15, "attiny15", &[_]FeatureType { .Avr0, + .Lpm, .Avr1, - }, - CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Attiny1634, "attiny1634", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Attiny167, "attiny167", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType { + .Lpmx, + .Ijmpcall, .Break, - .Tinyencoding, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Attiny20, "attiny20", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType { - .Ijmpcall, - .Sram, + }), + CpuInfo(@This(), FeatureType).create(.Attiny22, "attiny22", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType { .Ijmpcall, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.Attiny2313, "attiny2313", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny2313a, "attiny2313a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny24, "attiny24", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny24a, "attiny24a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny25, "attiny25", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny26, "attiny26", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Ijmpcall, .Avr2, .Lpmx, - }, - CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Attiny261, "attiny261", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny261a, "attiny261a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Lpmx, + .Ijmpcall, + .Break, .Avr25, - }, - CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType { - .Lpm, + }), + CpuInfo(@This(), FeatureType).create(.Attiny28, "attiny28", &[_]FeatureType { .Avr0, + .Lpm, .Avr1, - }, - CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType { - .Break, - .Tinyencoding, + }), + CpuInfo(@This(), FeatureType).create(.Attiny4, "attiny4", &[_]FeatureType { .Avr0, .Sram, - .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType { .Break, .Tinyencoding, + .Avrtiny, + }), + CpuInfo(@This(), FeatureType).create(.Attiny40, "attiny40", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Attiny4313, "attiny4313", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny43u, "attiny43u", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny44, "attiny44", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny44a, "attiny44a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny45, "attiny45", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny461, "attiny461", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny461a, "attiny461a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny48, "attiny48", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType { + .Lpmx, + .Ijmpcall, .Break, - .Tinyencoding, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny5, "attiny5", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType { - .Ijmpcall, + }), + CpuInfo(@This(), FeatureType).create(.Attiny828, "attiny828", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny84, "attiny84", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny84a, "attiny84a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny85, "attiny85", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny861, "attiny861", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny861a, "attiny861a", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny87, "attiny87", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Sram, .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny88, "attiny88", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType { + .Lpmx, + .Ijmpcall, .Break, - .Tinyencoding, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Attiny9, "attiny9", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType { - .Ijmpcall, - .Elpmx, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, - .Elpm, - .Lpmx, - .Spmx, - .Avr0, - .Jmpcall, - .Addsubiw, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType { .Lpm, - .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType { - .Ijmpcall, - .Elpmx, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, - .Mul, - .Rmw, - .Sram, - .Break, - .Spm, - .Elpm, - .Lpmx, .Spmx, - .Avr0, - .Jmpcall, .Addsubiw, - .Lpm, - .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, .Mul, - .Sram, - .Break, - .Spm, - .Elpm, .Lpmx, - .Spmx, - .Avr0, - .Jmpcall, - .Addsubiw, - .Lpm, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, - .Elpm, - .Lpmx, - .Spmx, - .Avr0, - .Jmpcall, - .Addsubiw, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType { .Lpm, - .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType { - .Ijmpcall, - .Elpmx, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, - .Mul, - .Rmw, - .Sram, - .Break, - .Spm, - .Elpm, - .Lpmx, .Spmx, - .Avr0, - .Jmpcall, .Addsubiw, - .Lpm, - .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, .Mul, - .Rmw, - .Sram, - .Break, - .Spm, - .Elpm, .Lpmx, - .Spmx, - .Avr0, - .Jmpcall, - .Addsubiw, - .Lpm, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, - .Elpm, - .Lpmx, - .Spmx, - .Avr0, - .Jmpcall, - .Addsubiw, - .Lpm, - .Des, .Xmega, - }, - CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType { - .Ijmpcall, - .Elpmx, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, - .Mul, - .Sram, - .Break, - .Spm, - .Elpm, - .Lpmx, .Spmx, - .Avr0, - .Jmpcall, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, - .Addsubiw, - .Lpm, - .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, - .Sram, + .Lpmx, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, + .Lpmx, .Rmw, - .Sram, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmegau, - }, - CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmegau, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType { .Ijmpcall, - .Elpmx, + .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, + .Elpmx, + .Spm, + .Avr0, + .Sram, + .Jmpcall, .Eijmpcall, + .Spmx, + .Addsubiw, .Mul, - .Sram, + .Lpmx, + .Des, + .Ijmpcall, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, + .Ijmpcall, + .Break, .Xmega, - }, - CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType { - .Lpm, + }), + CpuInfo(@This(), FeatureType).create(.Avr1, "avr1", &[_]FeatureType { .Avr0, + .Lpm, .Avr1, - }, - CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType { - .Ijmpcall, - .Sram, + }), + CpuInfo(@This(), FeatureType).create(.Avr2, "avr2", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr2, - }, - CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType { .Ijmpcall, + .Avr2, + }), + CpuInfo(@This(), FeatureType).create(.Avr25, "avr25", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr25, - }, - CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Sram, + .Break, + .Avr25, + }), + CpuInfo(@This(), FeatureType).create(.Avr3, "avr3", &[_]FeatureType { + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr3, - }, - CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType { .Ijmpcall, - .Sram, + .Avr3, + }), + CpuInfo(@This(), FeatureType).create(.Avr31, "avr31", &[_]FeatureType { + .Lpm, .Elpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr31, - }, - CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType { .Ijmpcall, + .Avr31, + }), + CpuInfo(@This(), FeatureType).create(.Avr35, "avr35", &[_]FeatureType { + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr35, - }, - CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType { + .Lpmx, .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Avr35, + }), + CpuInfo(@This(), FeatureType).create(.Avr4, "avr4", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, - .Avr4, - }, - CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType { - .Ijmpcall, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, + .Avr4, + }), + CpuInfo(@This(), FeatureType).create(.Avr5, "avr5", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr5, - }, - CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr5, + }), + CpuInfo(@This(), FeatureType).create(.Avr51, "avr51", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr51, - }, - CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType { - .Ijmpcall, - .Elpmx, - .Movw, .Mul, - .Sram, + .Lpmx, + .Ijmpcall, .Break, - .Spm, + .Avr51, + }), + CpuInfo(@This(), FeatureType).create(.Avr6, "avr6", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, - .Avr6, - }, - CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType { + .Mul, + .Lpmx, + .Ijmpcall, .Break, - .Tinyencoding, + .Avr6, + }), + CpuInfo(@This(), FeatureType).create(.Avrtiny, "avrtiny", &[_]FeatureType { .Avr0, .Sram, + .Break, + .Tinyencoding, .Avrtiny, - }, - CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType { - .Ijmpcall, - .Elpmx, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega1, "avrxmega1", &[_]FeatureType { + .Lpm, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega2, "avrxmega2", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega3, "avrxmega3", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega4, "avrxmega4", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega5, "avrxmega5", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega6, "avrxmega6", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType { .Ijmpcall, - .Elpmx, - .Movw, - .Eijmpcall, - .Mul, - .Sram, .Break, - .Spm, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.Avrxmega7, "avrxmega7", &[_]FeatureType { + .Lpm, .Elpm, - .Lpmx, - .Spmx, + .Movw, + .Elpmx, + .Spm, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, - .Xmega, - }, - CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType { .Ijmpcall, - .Movw, - .Mul, - .Sram, .Break, + .Xmega, + }), + CpuInfo(@This(), FeatureType).create(.M3000, "m3000", &[_]FeatureType { + .Lpm, + .Movw, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, .Avr5, - }, + }), }; }; diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig index f53b00a915e3fcdb0359c1f80dca812399396eeb..2faecd08bd238da0816b19c1dce8829c434cd82c 100644 --- a/lib/std/target/cpu/BpfCpu.zig +++ b/lib/std/target/cpu/BpfCpu.zig @@ -8,22 +8,22 @@ pub const BpfCpu = enum { V2, V3, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.BpfFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.BpfFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType { - }, - CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType { - }, - CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType { - }, - CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType { - }, + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Probe, "probe", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V1, "v1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V2, "v2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V3, "v3", &[_]FeatureType { + }), }; }; diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig index fc0449cb3b27468bea4d7a797988980cd9dc3ab5..0287eb7acf33ae7e6052dfb7de14aedfb2e63bf7 100644 --- a/lib/std/target/cpu/HexagonCpu.zig +++ b/lib/std/target/cpu/HexagonCpu.zig @@ -10,14 +10,14 @@ pub const HexagonCpu = enum { Hexagonv65, Hexagonv66, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.HexagonFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.HexagonFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { .V5, .V55, .V60, @@ -27,8 +27,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv5, "hexagonv5", &[_]FeatureType { .V5, .Duplex, .Memops, @@ -36,8 +36,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv55, "hexagonv55", &[_]FeatureType { .V5, .V55, .Duplex, @@ -46,8 +46,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv60, "hexagonv60", &[_]FeatureType { .V5, .V55, .V60, @@ -57,8 +57,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv62, "hexagonv62", &[_]FeatureType { .V5, .V55, .V60, @@ -69,8 +69,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv65, "hexagonv65", &[_]FeatureType { .V5, .V55, .V60, @@ -83,8 +83,8 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, - CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hexagonv66, "hexagonv66", &[_]FeatureType { .V5, .V55, .V60, @@ -98,6 +98,6 @@ pub const HexagonCpu = enum { .Nvj, .Nvs, .SmallData, - }, + }), }; }; diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig index fc1653d64785c60718b421f53ec867d14c0386c5..2462e6212ce53cb3f9166b5f9bbd03264bc2e276 100644 --- a/lib/std/target/cpu/MipsCpu.zig +++ b/lib/std/target/cpu/MipsCpu.zig @@ -20,171 +20,171 @@ pub const MipsCpu = enum { Octeon, P5600, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.MipsFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.MipsFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Mips1, "mips1", &[_]FeatureType { .Mips1, - }, - CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Mips2, "mips2", &[_]FeatureType { .Mips1, .Mips2, - }, - CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType { - .Mips3_32, - .Fp64, + }), + CpuInfo(@This(), FeatureType).create(.Mips3, "mips3", &[_]FeatureType { .Mips3_32r2, - .Mips1, + .Fp64, .Gp64, + .Mips1, + .Mips3_32, .Mips3, - }, - CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType { - .Mips3_32, + }), + CpuInfo(@This(), FeatureType).create(.Mips32, "mips32", &[_]FeatureType { .Mips4_32, .Mips1, + .Mips3_32, .Mips32, - }, - CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType { - .Mips3_32, + }), + CpuInfo(@This(), FeatureType).create(.Mips32r2, "mips32r2", &[_]FeatureType { + .Mips5_32r2, .Mips4_32r2, .Mips3_32r2, - .Mips1, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, .Mips32r2, - }, - CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType { - .Mips3_32, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips32r3, "mips32r3", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, .Mips32r3, - }, - CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType { - .Mips3_32, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips32r5, "mips32r5", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, .Mips32r5, - }, - CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType { - .Mips3_32, - .Fp64, + }), + CpuInfo(@This(), FeatureType).create(.Mips32r6, "mips32r6", &[_]FeatureType { + .Mips5_32r2, + .Mips3_32r2, .Mips4_32r2, .Abs2008, - .Mips3_32r2, - .Mips1, - .Mips4_32, .Nan2008, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips32r6, - }, - CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips4, "mips4", &[_]FeatureType { .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, + .Fp64, .Gp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips4, - }, - CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType { - .Mips3_32, - .Fp64, + }), + CpuInfo(@This(), FeatureType).create(.Mips5, "mips5", &[_]FeatureType { + .Mips5_32r2, .Mips4_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips5, - }, - CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips64, "mips64", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips64, - }, - CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips64r2, "mips64r2", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips64r2, - }, - CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips64r3, "mips64r3", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips64r3, - }, - CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Mips64r5, "mips64r5", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips64r5, - }, - CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, - .Abs2008, + }), + CpuInfo(@This(), FeatureType).create(.Mips64r6, "mips64r6", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, .Nan2008, + .Abs2008, + .Mips4_32r2, + .Fp64, .Gp64, - .Mips5_32r2, + .Mips4_32, + .Mips1, + .Mips3_32, .Mips64r6, - }, - CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType { - .Mips3_32, - .Fp64, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.Octeon, "octeon", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, .Cnmips, .Mips64r2, - }, - CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType { - .Mips3_32, - .Mips4_32r2, + }), + CpuInfo(@This(), FeatureType).create(.P5600, "p5600", &[_]FeatureType { + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, .P5600, - }, + }), }; }; diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig index e501c71063dc35f839f42eba4afeeac38efab36c..b64e5102a8540d3adf1c0d7edd9c0e094aae2b00 100644 --- a/lib/std/target/cpu/Msp430Cpu.zig +++ b/lib/std/target/cpu/Msp430Cpu.zig @@ -6,19 +6,19 @@ pub const Msp430Cpu = enum { Msp430, Msp430x, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.Msp430Feature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.Msp430Feature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Msp430, "msp430", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Msp430x, "msp430x", &[_]FeatureType { .Ext, - }, + }), }; }; diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig index 5519bc35cb24f8aafbe2352073d0b9b57f052f6f..03f36e214c3fa1a6e27f9aac98575ad45cce0a08 100644 --- a/lib/std/target/cpu/NvptxCpu.zig +++ b/lib/std/target/cpu/NvptxCpu.zig @@ -18,68 +18,68 @@ pub const NvptxCpu = enum { Sm_72, Sm_75, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.NvptxFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.NvptxFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Sm_20, "sm_20", &[_]FeatureType { .Sm_20, - }, - CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_21, "sm_21", &[_]FeatureType { .Sm_21, - }, - CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_30, "sm_30", &[_]FeatureType { .Sm_30, - }, - CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_32, "sm_32", &[_]FeatureType { .Ptx40, .Sm_32, - }, - CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_35, "sm_35", &[_]FeatureType { .Sm_35, - }, - CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_37, "sm_37", &[_]FeatureType { .Ptx41, .Sm_37, - }, - CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_50, "sm_50", &[_]FeatureType { .Ptx40, .Sm_50, - }, - CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_52, "sm_52", &[_]FeatureType { .Ptx41, .Sm_52, - }, - CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_53, "sm_53", &[_]FeatureType { .Ptx42, .Sm_53, - }, - CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_60, "sm_60", &[_]FeatureType { .Ptx50, .Sm_60, - }, - CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_61, "sm_61", &[_]FeatureType { .Ptx50, .Sm_61, - }, - CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_62, "sm_62", &[_]FeatureType { .Ptx50, .Sm_62, - }, - CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_70, "sm_70", &[_]FeatureType { .Ptx60, .Sm_70, - }, - CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_72, "sm_72", &[_]FeatureType { .Ptx61, .Sm_72, - }, - CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sm_75, "sm_75", &[_]FeatureType { .Ptx63, .Sm_75, - }, + }), }; }; diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig index 8b6deb3222db7df33f9ade0e54bf0ae640010910..7e34cf52cb08d3a269cb9020849a563207ad09d6 100644 --- a/lib/std/target/cpu/PowerPcCpu.zig +++ b/lib/std/target/cpu/PowerPcCpu.zig @@ -2,20 +2,20 @@ const feature = @import("std").target.feature; const CpuInfo = @import("std").target.cpu.CpuInfo; pub const PowerPcCpu = enum { - 440, - 450, - 601, - 602, - 603, + Cpu440, + Cpu450, + Cpu601, + Cpu602, + Cpu603, E603, Ev603, - 604, + Cpu604, E604, - 620, - 7400, - 7450, - 750, - 970, + Cpu620, + Cpu7400, + Cpu7450, + Cpu750, + Cpu970, A2, A2q, E500, @@ -23,7 +23,7 @@ pub const PowerPcCpu = enum { E5500, G3, G4, - G4+, + G4plus, G5, Generic, Ppc, @@ -40,14 +40,14 @@ pub const PowerPcCpu = enum { Pwr8, Pwr9, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.PowerPcFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.PowerPcFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.440, "440", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Cpu440, "440", &[_]FeatureType { .Icbt, .Booke, .HardFloat, @@ -55,8 +55,8 @@ pub const PowerPcCpu = enum { .Frsqrte, .Isel, .Msync, - }, - CpuInfo(@This()).create(.450, "450", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu450, "450", &[_]FeatureType { .Icbt, .Booke, .HardFloat, @@ -64,63 +64,63 @@ pub const PowerPcCpu = enum { .Frsqrte, .Isel, .Msync, - }, - CpuInfo(@This()).create(.601, "601", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu601, "601", &[_]FeatureType { .HardFloat, .Fpu, - }, - CpuInfo(@This()).create(.602, "602", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu602, "602", &[_]FeatureType { .HardFloat, .Fpu, - }, - CpuInfo(@This()).create(.603, "603", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu603, "603", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.E603, "603e", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ev603, "603ev", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.604, "604", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu604, "604", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.E604, "604e", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.620, "620", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu620, "620", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu7400, "7400", &[_]FeatureType { .HardFloat, .Altivec, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu7450, "7450", &[_]FeatureType { .HardFloat, .Altivec, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.750, "750", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu750, "750", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.970, "970", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cpu970, "970", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -129,8 +129,8 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.A2, "a2", &[_]FeatureType { .Bit64, .Icbt, .Booke, @@ -151,8 +151,8 @@ pub const PowerPcCpu = enum { .Recipprec, .Stfiwx, .SlowPopcntd, - }, - CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.A2q, "a2q", &[_]FeatureType { .Bit64, .Icbt, .Booke, @@ -174,20 +174,20 @@ pub const PowerPcCpu = enum { .Recipprec, .Stfiwx, .SlowPopcntd, - }, - CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.E500, "e500", &[_]FeatureType { .Icbt, .Booke, .Isel, - }, - CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.E500mc, "e500mc", &[_]FeatureType { .Icbt, .Booke, .Isel, .HardFloat, .Stfiwx, - }, - CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.E5500, "e5500", &[_]FeatureType { .Bit64, .Icbt, .Booke, @@ -195,25 +195,25 @@ pub const PowerPcCpu = enum { .Mfocrf, .HardFloat, .Stfiwx, - }, - CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.G3, "g3", &[_]FeatureType { .HardFloat, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.G4, "g4", &[_]FeatureType { .HardFloat, .Altivec, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.G4plus, "g4+", &[_]FeatureType { .HardFloat, .Altivec, .Fres, .Frsqrte, - }, - CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.G5, "g5", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -222,17 +222,17 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { .HardFloat, - }, - CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ppc, "ppc", &[_]FeatureType { .HardFloat, - }, - CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ppc32, "ppc32", &[_]FeatureType { .HardFloat, - }, - CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ppc64, "ppc64", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -241,8 +241,8 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ppc64le, "ppc64le", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -273,8 +273,8 @@ pub const PowerPcCpu = enum { .Stfiwx, .TwoConstNr, .Vsx, - }, - CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr3, "pwr3", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -282,8 +282,8 @@ pub const PowerPcCpu = enum { .Frsqrte, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr4, "pwr4", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -292,8 +292,8 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr5, "pwr5", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -304,8 +304,8 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr5x, "pwr5x", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -317,8 +317,8 @@ pub const PowerPcCpu = enum { .Fsqrt, .Mfocrf, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr6, "pwr6", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -334,8 +334,8 @@ pub const PowerPcCpu = enum { .Mfocrf, .Recipprec, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr6x, "pwr6x", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -351,8 +351,8 @@ pub const PowerPcCpu = enum { .Mfocrf, .Recipprec, .Stfiwx, - }, - CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr7, "pwr7", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -376,8 +376,8 @@ pub const PowerPcCpu = enum { .Stfiwx, .TwoConstNr, .Vsx, - }, - CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr8, "pwr8", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -408,8 +408,8 @@ pub const PowerPcCpu = enum { .Stfiwx, .TwoConstNr, .Vsx, - }, - CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pwr9, "pwr9", &[_]FeatureType { .Bit64, .HardFloat, .Altivec, @@ -446,6 +446,6 @@ pub const PowerPcCpu = enum { .TwoConstNr, .Vsx, .VectorsUseTwoUnits, - }, + }), }; }; diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig index d5ba5144686670a4fed1802286350486490c0d40..d191e04acfdf66bde044c000d60381c1612cbc5e 100644 --- a/lib/std/target/cpu/RiscVCpu.zig +++ b/lib/std/target/cpu/RiscVCpu.zig @@ -5,19 +5,19 @@ pub const RiscVCpu = enum { GenericRv32, GenericRv64, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.RiscVFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.RiscVFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.GenericRv32, "generic-rv32", &[_]FeatureType { .RvcHints, - }, - CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.GenericRv64, "generic-rv64", &[_]FeatureType { .Bit64, .RvcHints, - }, + }), }; }; diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig index e1887ad7c57fe5605dbcac981c9fb39c7aa483a0..bd5dca79cabe52f2d0063fdb6af969765b9ecf58 100644 --- a/lib/std/target/cpu/SparcCpu.zig +++ b/lib/std/target/cpu/SparcCpu.zig @@ -43,174 +43,174 @@ pub const SparcCpu = enum { V8, V9, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.SparcFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.SparcFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.At697e, "at697e", &[_]FeatureType { .Leon, .Insertnopload, - }, - CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.At697f, "at697f", &[_]FeatureType { .Leon, .Insertnopload, - }, - CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.F934, "f934", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gr712rc, "gr712rc", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Gr740, "gr740", &[_]FeatureType { .Leon, .Leonpwrpsr, .Hasleoncasa, .Leoncyclecounter, .Hasumacsmac, - }, - CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Hypersparc, "hypersparc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Leon2, "leon2", &[_]FeatureType { .Leon, - }, - CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Leon3, "leon3", &[_]FeatureType { .Leon, .Hasumacsmac, - }, - CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Leon4, "leon4", &[_]FeatureType { .Leon, .Hasleoncasa, .Hasumacsmac, - }, - CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2080, "ma2080", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2085, "ma2085", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2100, "ma2100", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2150, "ma2150", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2155, "ma2155", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2450, "ma2450", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2455, "ma2455", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2480, "ma2480", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2485, "ma2485", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2x5x, "ma2x5x", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ma2x8x, "ma2x8x", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Myriad2, "myriad2", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Myriad21, "myriad2.1", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Myriad22, "myriad2.2", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Myriad23, "myriad2.3", &[_]FeatureType { .Leon, .Hasleoncasa, - }, - CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Niagara, "niagara", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, .Vis2, - }, - CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Niagara2, "niagara2", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, .Vis2, .Popc, - }, - CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Niagara3, "niagara3", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, .Vis2, .Popc, - }, - CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Niagara4, "niagara4", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, .Vis2, .Vis3, .Popc, - }, - CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sparclet, "sparclet", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sparclite, "sparclite", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sparclite86x, "sparclite86x", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Supersparc, "supersparc", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Tsc701, "tsc701", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ultrasparc, "ultrasparc", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, - }, - CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType { .DeprecatedV8, .V9, .Vis, .Vis2, - }, - CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ut699, "ut699", &[_]FeatureType { .Leon, .NoFmuls, .NoFsmuld, .Fixallfdivsqrt, .Insertnopload, - }, - CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V7, "v7", &[_]FeatureType { .NoFsmuld, .SoftMulDiv, - }, - CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType { - }, - CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V8, "v8", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.V9, "v9", &[_]FeatureType { .V9, - }, + }), }; }; diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig index ec5efcc1aed4a9c042a2119fc25544bb807e8e49..7e5b21c85898f184b8b9df3da83519c85efa7595 100644 --- a/lib/std/target/cpu/SystemZCpu.zig +++ b/lib/std/target/cpu/SystemZCpu.zig @@ -16,14 +16,14 @@ pub const SystemZCpu = enum { Z196, ZEC12, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.SystemZFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.SystemZFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Arch10, "arch10", &[_]FeatureType { .DfpZonedConversion, .DistinctOps, .EnhancedDat2, @@ -41,8 +41,8 @@ pub const SystemZCpu = enum { .ProcessorAssist, .ResetReferenceBitsMultiple, .TransactionalExecution, - }, - CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arch11, "arch11", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DistinctOps, @@ -65,8 +65,8 @@ pub const SystemZCpu = enum { .ResetReferenceBitsMultiple, .TransactionalExecution, .Vector, - }, - CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arch12, "arch12", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DistinctOps, @@ -96,8 +96,8 @@ pub const SystemZCpu = enum { .Vector, .VectorEnhancements1, .VectorPackedDecimal, - }, - CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arch13, "arch13", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DeflateConversion, @@ -133,10 +133,10 @@ pub const SystemZCpu = enum { .VectorEnhancements2, .VectorPackedDecimal, .VectorPackedDecimalEnhancement, - }, - CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arch8, "arch8", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Arch9, "arch9", &[_]FeatureType { .DistinctOps, .FpExtension, .FastSerialization, @@ -147,12 +147,12 @@ pub const SystemZCpu = enum { .MessageSecurityAssistExtension4, .PopulationCount, .ResetReferenceBitsMultiple, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Z10, "z10", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Z13, "z13", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DistinctOps, @@ -175,8 +175,8 @@ pub const SystemZCpu = enum { .ResetReferenceBitsMultiple, .TransactionalExecution, .Vector, - }, - CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Z14, "z14", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DistinctOps, @@ -206,8 +206,8 @@ pub const SystemZCpu = enum { .Vector, .VectorEnhancements1, .VectorPackedDecimal, - }, - CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Z15, "z15", &[_]FeatureType { .DfpPackedConversion, .DfpZonedConversion, .DeflateConversion, @@ -243,8 +243,8 @@ pub const SystemZCpu = enum { .VectorEnhancements2, .VectorPackedDecimal, .VectorPackedDecimalEnhancement, - }, - CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Z196, "z196", &[_]FeatureType { .DistinctOps, .FpExtension, .FastSerialization, @@ -255,8 +255,8 @@ pub const SystemZCpu = enum { .MessageSecurityAssistExtension4, .PopulationCount, .ResetReferenceBitsMultiple, - }, - CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.ZEC12, "zEC12", &[_]FeatureType { .DfpZonedConversion, .DistinctOps, .EnhancedDat2, @@ -274,6 +274,6 @@ pub const SystemZCpu = enum { .ProcessorAssist, .ResetReferenceBitsMultiple, .TransactionalExecution, - }, + }), }; }; diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig index b68b859c13a7f0b4482b3a7bcdc58d442514ce73..a05702dac19ac3bcdb86bd4e5374b0b5cb4ddf27 100644 --- a/lib/std/target/cpu/WebAssemblyCpu.zig +++ b/lib/std/target/cpu/WebAssemblyCpu.zig @@ -6,23 +6,23 @@ pub const WebAssemblyCpu = enum { Generic, Mvp, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.WebAssemblyFeature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.WebAssemblyFeature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType { .Atomics, .MutableGlobals, .NontrappingFptoint, .Simd128, .SignExt, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType { - }, + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Mvp, "mvp", &[_]FeatureType { + }), }; }; diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig index dba81c654da297232465b0de0871aeefba31285c..0a3a15f347a3b74a4aa4143d374d03ac5191a5c8 100644 --- a/lib/std/target/cpu/X86Cpu.zig +++ b/lib/std/target/cpu/X86Cpu.zig @@ -82,14 +82,14 @@ pub const X86Cpu = enum { Znver1, Znver2, - pub fn getInfo(self: @This()) CpuInfo { + const FeatureType = feature.X86Feature; + + pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { return cpu_infos[@enumToInt(self)]; } - pub const FeatureType = feature.X86Feature; - - const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) { - CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType { + pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { + CpuInfo(@This(), FeatureType).create(.Amdfam10, "amdfam10", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -106,8 +106,8 @@ pub const X86Cpu = enum { .Sse4a, .SlowShld, .X87, - }, - CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Athlon, "athlon", &[_]FeatureType { .Mmx, .Dnowa3, .Cmov, @@ -116,8 +116,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Athlon4, "athlon-4", &[_]FeatureType { .Mmx, .Dnowa3, .Cmov, @@ -128,8 +128,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.AthlonFx, "athlon-fx", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -143,8 +143,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.AthlonMp, "athlon-mp", &[_]FeatureType { .Mmx, .Dnowa3, .Cmov, @@ -155,8 +155,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType { .Mmx, .Dnowa3, .Cmov, @@ -165,8 +165,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.AthlonXp, "athlon-xp", &[_]FeatureType { .Mmx, .Dnowa3, .Cmov, @@ -177,8 +177,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Athlon64, "athlon64", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -192,8 +192,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -208,8 +208,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Atom, "atom", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -229,8 +229,8 @@ pub const X86Cpu = enum { .SlowTwoMemOps, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Barcelona, "barcelona", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -247,8 +247,8 @@ pub const X86Cpu = enum { .Sse4a, .SlowShld, .X87, - }, - CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Bdver1, "bdver1", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -271,8 +271,8 @@ pub const X86Cpu = enum { .X87, .Xop, .Xsave, - }, - CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Bdver2, "bdver2", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -300,8 +300,8 @@ pub const X86Cpu = enum { .X87, .Xop, .Xsave, - }, - CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Bdver3, "bdver3", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -331,8 +331,8 @@ pub const X86Cpu = enum { .Xop, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Bdver4, "bdver4", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -365,8 +365,8 @@ pub const X86Cpu = enum { .Xop, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Bonnell, "bonnell", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -386,8 +386,8 @@ pub const X86Cpu = enum { .SlowTwoMemOps, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Broadwell, "broadwell", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -427,8 +427,8 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Btver1, "btver1", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -448,8 +448,8 @@ pub const X86Cpu = enum { .Ssse3, .SlowShld, .X87, - }, - CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Btver2, "btver2", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -481,14 +481,14 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.C3, "c3", &[_]FeatureType { .Mmx, .Dnow3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.C32, "c3-2", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -496,8 +496,8 @@ pub const X86Cpu = enum { .Sse, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cannonlake, "cannonlake", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -552,8 +552,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cascadelake, "cascadelake", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -607,8 +607,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Cooperlake, "cooperlake", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -663,8 +663,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CoreAvxI, "core-avx-i", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -692,8 +692,8 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.CoreAvx2, "core-avx2", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -730,8 +730,8 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Core2, "core2", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -745,8 +745,8 @@ pub const X86Cpu = enum { .Ssse3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Corei7, "corei7", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -760,8 +760,8 @@ pub const X86Cpu = enum { .Sse, .Sse42, .X87, - }, - CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Corei7Avx, "corei7-avx", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -786,20 +786,20 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Geode, "geode", &[_]FeatureType { .Mmx, .Dnowa3, .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Goldmont, "goldmont", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -830,8 +830,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -864,8 +864,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Haswell, "haswell", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -902,27 +902,27 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.I386, "i386", &[_]FeatureType { .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.I486, "i486", &[_]FeatureType { .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.I586, "i586", &[_]FeatureType { .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.I686, "i686", &[_]FeatureType { .Cmov, .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.IcelakeClient, "icelake-client", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -986,8 +986,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.IcelakeServer, "icelake-server", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1053,8 +1053,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Ivybridge, "ivybridge", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -1082,28 +1082,28 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.K6, "k6", &[_]FeatureType { .Cx8, .Mmx, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.K62, "k6-2", &[_]FeatureType { .Mmx, .Dnow3, .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.K63, "k6-3", &[_]FeatureType { .Mmx, .Dnow3, .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.K8, "k8", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -1117,8 +1117,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.K8Sse3, "k8-sse3", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -1133,8 +1133,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Knl, "knl", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1173,8 +1173,8 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Knm, "knm", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1214,10 +1214,10 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType { - }, - CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Lakemont, "lakemont", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Nehalem, "nehalem", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1231,8 +1231,8 @@ pub const X86Cpu = enum { .Sse, .Sse42, .X87, - }, - CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Nocona, "nocona", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1244,8 +1244,8 @@ pub const X86Cpu = enum { .Sse3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Opteron, "opteron", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -1259,8 +1259,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType { .Mmx, .Dnowa3, .Bit64, @@ -1275,8 +1275,8 @@ pub const X86Cpu = enum { .SlowShld, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Penryn, "penryn", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1290,13 +1290,13 @@ pub const X86Cpu = enum { .Sse41, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium, "pentium", &[_]FeatureType { .Cx8, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.PentiumM, "pentium-m", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1306,14 +1306,14 @@ pub const X86Cpu = enum { .Sse2, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType { .Cx8, .Mmx, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium2, "pentium2", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1321,8 +1321,8 @@ pub const X86Cpu = enum { .Nopl, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium3, "pentium3", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1331,8 +1331,8 @@ pub const X86Cpu = enum { .Sse, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium3m, "pentium3m", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1341,8 +1341,8 @@ pub const X86Cpu = enum { .Sse, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium4, "pentium4", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1352,8 +1352,8 @@ pub const X86Cpu = enum { .Sse2, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentium4m, "pentium4m", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1363,15 +1363,15 @@ pub const X86Cpu = enum { .Sse2, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Pentiumpro, "pentiumpro", &[_]FeatureType { .Cmov, .Cx8, .Nopl, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Prescott, "prescott", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1381,8 +1381,8 @@ pub const X86Cpu = enum { .Sse3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Sandybridge, "sandybridge", &[_]FeatureType { .Bit64, .Sse, .Avx, @@ -1407,8 +1407,8 @@ pub const X86Cpu = enum { .X87, .Xsave, .Xsaveopt, - }, - CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Silvermont, "silvermont", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1432,8 +1432,8 @@ pub const X86Cpu = enum { .SlowPmulld, .SlowTwoMemOps, .X87, - }, - CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Skx, "skx", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1486,8 +1486,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Skylake, "skylake", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1533,8 +1533,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1587,8 +1587,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Slm, "slm", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1612,8 +1612,8 @@ pub const X86Cpu = enum { .SlowPmulld, .SlowTwoMemOps, .X87, - }, - CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Tigerlake, "tigerlake", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1681,8 +1681,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Tremont, "tremont", &[_]FeatureType { .Bit64, .Sse, .Aes, @@ -1720,8 +1720,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Westmere, "westmere", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1736,19 +1736,19 @@ pub const X86Cpu = enum { .Popcnt, .Sse42, .X87, - }, - CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.WinchipC6, "winchip-c6", &[_]FeatureType { .Mmx, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Winchip2, "winchip2", &[_]FeatureType { .Mmx, .Dnow3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.X8664, "x86-64", &[_]FeatureType { .Bit64, .Cmov, .Cx8, @@ -1761,8 +1761,8 @@ pub const X86Cpu = enum { .Slow3opsLea, .SlowIncdec, .X87, - }, - CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Yonah, "yonah", &[_]FeatureType { .Cmov, .Cx8, .Fxsr, @@ -1772,8 +1772,8 @@ pub const X86Cpu = enum { .Sse3, .SlowUnalignedMem16, .X87, - }, - CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Znver1, "znver1", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1814,8 +1814,8 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, - CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType { + }), + CpuInfo(@This(), FeatureType).create(.Znver2, "znver2", &[_]FeatureType { .Bit64, .Adx, .Sse, @@ -1859,6 +1859,6 @@ pub const X86Cpu = enum { .Xsavec, .Xsaveopt, .Xsaves, - }, + }), }; }; diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig index 79e1826ddc8975f7cf34b56e03601505939199d2..e35eaaf41d1b5bb9447a44309a825d56c9b8d984 100644 --- a/lib/std/target/cpu/empty.zig +++ b/lib/std/target/cpu/empty.zig @@ -1,6 +1,6 @@ const feature = @import("std").target.feature; const CpuInfo = @import("std").target.cpu.CpuInfo; -pub const EmptyCpu = enum { - pub const cpu_infos = [0]CpuInfo(@This()) {}; +pub const EmptyCpu = struct { + pub const cpu_infos = [0]CpuInfo(@This(), feature.EmptyFeature) {}; }; diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig index b5fb4ff96d3a3b1482e3479531ae94c4e0e0694e..d5bf45cd0ef9ddc6cfd450bf20d10e856af6c9f0 100644 --- a/lib/std/target/feature.zig +++ b/lib/std/target/feature.zig @@ -17,7 +17,7 @@ pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature; pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature; pub const X86Feature = @import("feature/X86Feature.zig").X86Feature; -const EmptyFeature = @import("feature/empty.zig").EmptyFeature; +pub const EmptyFeature = @import("feature/empty.zig").EmptyFeature; pub fn ArchFeature(comptime arch: @TagType(Arch)) type { return switch (arch) { @@ -49,24 +49,30 @@ pub fn FeatureInfo(comptime EnumType: type) type { return struct { value: EnumType, name: []const u8, + description: []const u8, + llvm_name: []const u8, subfeatures: []const EnumType, const Self = @This(); - fn create(value: EnumType, name: []const u8) Self { + pub fn create(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8) Self { return Self { .value = value, .name = name, + .description = description, + .llvm_name = llvm_name, .subfeatures = &[_]EnumType{}, }; } - fn createWithSubfeatures(value: EnumType, name: []const u8, subfeatures: []const EnumType) Self { + pub fn createWithSubfeatures(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8, subfeatures: []const EnumType) Self { return Self { .value = value, .name = name, + .description = description, + .llvm_name = llvm_name, .subfeatures = subfeatures, }; diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig index 849c028169709b92a91c8101faf4481786da574d..8044d957be998f9a038bd10e57596d28367b9eab 100644 --- a/lib/std/target/feature/AArch64Feature.zig +++ b/lib/std/target/feature/AArch64Feature.zig @@ -155,7 +155,7 @@ pub const AArch64Feature = enum { Thunderxt83, Thunderxt88, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } @@ -291,19 +291,19 @@ pub const AArch64Feature = enum { .Sve, }), FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() { - .Sve, .FpArmv8, + .Sve, }), FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() { .Sve, }), FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() { - .Sve, .FpArmv8, + .Sve, }), FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() { - .Sve, .FpArmv8, + .Sve, }), FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"), FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"), @@ -323,101 +323,101 @@ pub const AArch64Feature = enum { FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"), FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"), FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() { - .ZczFp, .ZczGp, + .ZczFp, }), FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"), FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"), FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"), FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { - .Pan, - .Rdm, .Lse, + .Rdm, .Crc, .Lor, + .Pan, .Vh, }), FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { - .Ccpp, - .Pan, - .Rdm, .Lse, + .Rdm, + .Pan, .Crc, .Lor, .Uaops, - .Vh, .Ras, + .Ccpp, + .Vh, }), FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, .Lse, - .Ccidx, + .Vh, + .Pa, + .Rdm, + .Pan, .Crc, .Lor, - .Pa, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .Ccidx, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { - .Nv, + .Rdm, + .Dit, .Am, - .Lse, + .Ras, + .Rcpc, .Sel2, - .Lor, - .Tracev84, - .Uaops, .Ccpp, - .TlbRmi, - .Fmi, - .Rcpc, - .Pan, - .Rdm, .Pa, - .Dit, - .Ras, + .Pan, + .Uaops, + .Tracev84, .Mpam, - .FpArmv8, - .Ccidx, + .Lse, + .Nv, .Dotprod, + .TlbRmi, + .Lor, + .Ccidx, + .FpArmv8, .Crc, + .Fmi, .Vh, }), FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { - .Nv, + .Vh, + .Rdm, + .Dit, .Am, - .Lse, - .Fptoint, - .Sel2, - .Lor, - .Tracev84, - .Uaops, - .Sb, - .Ccpp, + .Ssbs, .Specrestrict, + .Ras, + .Rcpc, + .Sel2, + .Ccpp, + .Pa, .Bti, .Ccdp, - .TlbRmi, - .Fmi, - .Rcpc, .Pan, - .Rdm, - .Pa, - .Ssbs, - .Dit, - .Ras, + .Uaops, + .Tracev84, .Mpam, + .Lse, + .Sb, + .Nv, .Altnzcv, - .FpArmv8, - .Ccidx, .Dotprod, - .Crc, + .TlbRmi, + .Lor, + .Ccidx, .Predres, - .Vh, + .Crc, + .Fptoint, + .Fmi, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() { .Perfmon, @@ -425,325 +425,325 @@ pub const AArch64Feature = enum { .Crc, }), FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() { + .Perfmon, + .UsePostraScheduler, + .Crc, + .CustomCheapAsMove, + .BalanceFpOps, .UseAa, - .FuseAes, .FpArmv8, - .Perfmon, - .Crc, - .BalanceFpOps, - .UsePostraScheduler, - .CustomCheapAsMove, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, + .Lse, + .Vh, .Rdm, - .FuseAes, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, + .Crc, .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() { - .FuseLiterals, - .FuseAes, - .FpArmv8, .Perfmon, - .Crc, - .BalanceFpOps, .UsePostraScheduler, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, + .CustomCheapAsMove, + .BalanceFpOps, + .FuseLiterals, + .FpArmv8, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() { .Perfmon, - .FuseAes, .FpArmv8, .Crc, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() { .Perfmon, - .FuseAes, .FpArmv8, .Crc, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, + .Lse, + .Vh, .Rdm, - .FuseAes, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, + .Crc, .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() { - .ZczFp, + .ArithBccFusion, .ArithCbzFusion, - .FuseAes, + .ZczFp, .AlternateSextloadCvtF32Pattern, - .ZczFpWorkaround, - .FpArmv8, - .Perfmon, .DisableLatencySchedHeuristic, + .Perfmon, + .ZczGp, + .ZczFpWorkaround, .Zcm, - .ZczGp, - .ArithBccFusion, + .FpArmv8, .FuseCryptoEor, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() { .ZczFp, - .FuseAes, - .SlowPaired128, - .Force32bitJumpTables, + .Perfmon, + .UsePostraScheduler, + .Crc, .UseReciprocalSquareRoot, - .FpArmv8, - .Perfmon, - .SlowMisaligned128store, - .Crc, - .UsePostraScheduler, .CustomCheapAsMove, + .Force32bitJumpTables, + .SlowMisaligned128store, + .FpArmv8, + .SlowPaired128, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() { .ZczFp, - .FuseAes, - .SlowPaired128, - .Force32bitJumpTables, - .FpArmv8, .Perfmon, - .SlowMisaligned128store, - .Crc, .UsePostraScheduler, + .Crc, .CustomCheapAsMove, + .Force32bitJumpTables, + .SlowMisaligned128store, + .FpArmv8, + .SlowPaired128, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() { + .FuseCsel, .ZczFp, - .FuseLiterals, - .FuseAes, - .Force32bitJumpTables, - .FpArmv8, .Perfmon, - .Crc, - .LslFast, - .FuseAddress, .UsePostraScheduler, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, - .FuseCsel, + .CustomCheapAsMove, + .Force32bitJumpTables, + .FuseLiterals, + .FuseAddress, + .LslFast, + .FpArmv8, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() { + .ArithBccFusion, + .Vh, + .ArithCbzFusion, .ZczFp, + .Rdm, + .UsePostraScheduler, + .Ras, + .Force32bitJumpTables, + .Ccpp, + .FuseCsel, + .Pan, + .Uaops, + .FuseLiterals, + .LslFast, .Lse, + .Perfmon, + .Dotprod, + .Lor, .FuseArithLogic, - .Lor, - .UsePostraScheduler, - .Uaops, + .Crc, .CustomCheapAsMove, - .ArithBccFusion, - .Ccpp, - .Perfmon, - .Pan, - .Rdm, - .FuseLiterals, - .Force32bitJumpTables, - .LslFast, .FuseAddress, .ZczGp, - .Ras, - .FuseCsel, - .ArithCbzFusion, - .FuseAes, .FpArmv8, - .Crc, - .Dotprod, - .Vh, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() { .ZczFp, .Rdm, + .Perfmon, + .UsePostraScheduler, + .Crc, + .PredictableSelectExpensive, + .CustomCheapAsMove, + .ZczGp, + .FpArmv8, .SlowStrqroStore, - .Perfmon, - .FpArmv8, - .Crc, .LslFast, - .UsePostraScheduler, - .ZczGp, - .CustomCheapAsMove, - .PredictableSelectExpensive, }), FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() { .ZczFp, .Perfmon, - .FpArmv8, - .Crc, - .LslFast, .UsePostraScheduler, - .ZczGp, - .CustomCheapAsMove, + .Crc, .PredictableSelectExpensive, + .CustomCheapAsMove, + .ZczGp, + .FpArmv8, + .LslFast, }), FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() { - .Rcpc, - .Ccpp, - .Pan, - .Rdm, - .FpArmv8, .Lse, - .Crc, + .Vh, + .Rdm, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() { - .Rcpc, + .Lse, .Spe, - .Ccpp, - .Pan, + .Vh, .Rdm, - .FpArmv8, - .Lse, - .Crc, + .Pan, .Dotprod, - .Lor, + .Crc, .Ssbs, + .Lor, .Uaops, - .Vh, .Ras, + .Rcpc, + .Ccpp, + .FpArmv8, }), FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() { + .Spe, + .Vh, .ZczFp, - .Nv, + .Rdm, + .UsePostraScheduler, + .Dit, .Am, - .Lse, + .Ras, + .Rcpc, .Sel2, - .Lor, - .Tracev84, - .Uaops, - .UsePostraScheduler, - .CustomCheapAsMove, .Ccpp, + .Pa, + .Pan, + .Uaops, + .Tracev84, + .Mpam, + .LslFast, + .Lse, + .Nv, .Perfmon, + .Dotprod, .TlbRmi, + .Lor, + .Ccidx, .PredictableSelectExpensive, + .Crc, + .CustomCheapAsMove, .Fmi, - .Rcpc, - .Pan, - .Rdm, - .LslFast, - .Pa, .ZczGp, - .Dit, - .Ras, - .Spe, - .Mpam, .FpArmv8, - .Ccidx, - .Dotprod, - .Crc, - .Vh, }), FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() { - .Uaops, + .Lse, .Spe, - .Ccpp, - .Pan, - .Rdm, - .FuseAes, .Vh, + .Rdm, .Perfmon, - .FpArmv8, - .Lse, - .Crc, + .UsePostraScheduler, + .Pan, .Dotprod, + .Crc, .Lor, - .UsePostraScheduler, + .Uaops, .CustomCheapAsMove, .Ras, + .Ccpp, + .FpArmv8, + .FuseAes, }), FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, }), FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() { - .Pan, - .Rdm, + .Lse, + .ArithBccFusion, .Vh, + .Rdm, + .UsePostraScheduler, + .Crc, + .Lor, + .Pan, .AggressiveFma, .FpArmv8, - .Lse, - .Crc, - .Lor, - .UsePostraScheduler, - .ArithBccFusion, .PredictableSelectExpensive, }), FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, }), FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, }), FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() { .Perfmon, - .FpArmv8, - .Crc, .UsePostraScheduler, + .Crc, + .FpArmv8, .PredictableSelectExpensive, }), }; diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig index e8688a7492e0ba799cc5fc989a6137ee4cb77e4d..f7b9cb9da7e8e0d72c069b86cd88d7f2c2e474d5 100644 --- a/lib/std/target/feature/AmdGpuFeature.zig +++ b/lib/std/target/feature/AmdGpuFeature.zig @@ -110,7 +110,7 @@ pub const AmdGpuFeature = enum { Xnack, HalfRate64Ops, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } @@ -166,73 +166,73 @@ pub const AmdGpuFeature = enum { FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"), FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"), FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() { - .Gfx9Insts, - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .FastFmaf, - .Sdwa, + .ApertureRegs, + .IntClampInsts, + .SdwaOmod, .SdwaScalar, - .VgprIndexMode, - .Dpp, .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, .ScalarAtomics, + .SMemrealtime, + .Gcn3Encoding, + .CiInsts, .FlatAddressSpace, - .ScalarFlatScratchInsts, - .Gfx8Insts, + .Sdwa, + .Wavefrontsize64, + .SdwaSdst, + .FlatInstOffsets, + .ScalarStores, .Gfx7Gfx8Gfx9Insts, .R128A16, - .IntClampInsts, - .ScalarStores, - .ApertureRegs, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, + .Dpp, + .Localmemorysize65536, .Vop3p, - .FlatInstOffsets, + .BitInsts16, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .Gfx9Insts, + .ScalarFlatScratchInsts, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, }), FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"), FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() { - .Gfx9Insts, + .Vscnt, + .ApertureRegs, + .Gfx10Insts, + .IntClampInsts, + .PkFmacF16Inst, + .SdwaOmod, + .SdwaScalar, + .AddNoCarryInsts, + .Movrel, + .SMemrealtime, .NoSdstCmpx, - .Fp64, - .FastFmaf, + .CiInsts, + .FlatAddressSpace, .Sdwa, - .SdwaScalar, - .Dpp, + .NoSramEccSupport, + .SdwaSdst, + .FlatInstOffsets, .RegisterBanking, - .Gfx10Insts, - .AddNoCarryInsts, - .SdwaOmod, - .SdwaSdst, - .FlatAddressSpace, + .Dpp, + .Localmemorysize65536, + .Vop3p, + .BitInsts16, + .Dpp8, .Gfx8Insts, + .Inv2piInlineImm, + .Gfx9Insts, .FmaMixInsts, - .PkFmacF16Inst, + .MimgR128, .Vop3Literal, - .MimgR128, - .NoSramEccSupport, - .IntClampInsts, - .Movrel, - .Dpp8, - .ApertureRegs, + .FlatGlobalInsts, + .FlatScratchInsts, + .Fp64, + .FastFmaf, .NoDataDepHazard, - .CiInsts, - .FlatGlobalInsts, - .BitInsts16, - .FlatScratchInsts, - .SMemrealtime, - .Vop3p, - .FlatInstOffsets, - .Inv2piInlineImm, - .Localmemorysize65536, - .Vscnt, }), FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"), FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"), @@ -276,25 +276,25 @@ pub const AmdGpuFeature = enum { FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"), FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"), FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() { - .Wavefrontsize64, - .MimgR128, + .Movrel, + .Gfx7Gfx8Gfx9Insts, .Fp64, + .TrigReducedRange, .CiInsts, .FlatAddressSpace, - .TrigReducedRange, - .NoSramEccSupport, - .Movrel, .Localmemorysize65536, - .Gfx7Gfx8Gfx9Insts, + .Wavefrontsize64, + .NoSramEccSupport, + .MimgR128, }), FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() { - .Wavefrontsize64, + .Movrel, .MimgR128, .Fp64, + .TrigReducedRange, .NoXnackSupport, - .TrigReducedRange, + .Wavefrontsize64, .NoSramEccSupport, - .Movrel, .Ldsbankcount32, .Localmemorysize32768, }), @@ -310,28 +310,28 @@ pub const AmdGpuFeature = enum { FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"), FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"), FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() { - .Wavefrontsize64, - .Fp64, - .Gcn3Encoding, - .TrigReducedRange, - .Sdwa, - .VgprIndexMode, - .Dpp, - .FlatAddressSpace, - .Gfx8Insts, - .Gfx7Gfx8Gfx9Insts, - .MimgR128, - .NoSramEccSupport, .IntClampInsts, - .ScalarStores, - .Movrel, .SdwaMav, + .Movrel, + .SMemrealtime, + .Gcn3Encoding, + .TrigReducedRange, .CiInsts, + .FlatAddressSpace, + .Sdwa, + .Wavefrontsize64, + .NoSramEccSupport, + .ScalarStores, + .Gfx7Gfx8Gfx9Insts, + .Dpp, + .Localmemorysize65536, .BitInsts16, - .SMemrealtime, + .VgprIndexMode, + .Gfx8Insts, .Inv2piInlineImm, - .Localmemorysize65536, + .MimgR128, .SdwaOutModsVopc, + .Fp64, }), FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"), FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"), diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig index 842becda2c6f5d36368d96bdf70d150c786cc877..b7a951a63dbf12371a67f2a8da745a2787290844 100644 --- a/lib/std/target/feature/ArmFeature.zig +++ b/lib/std/target/feature/ArmFeature.zig @@ -177,7 +177,7 @@ pub const ArmFeature = enum { Swift, Xscale, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } @@ -215,283 +215,283 @@ pub const ArmFeature = enum { .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() { - .Mclass, - .StrictAlign, + .V4t, .ThumbMode, .Db, - .V4t, + .StrictAlign, + .Mclass, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() { - .Mclass, - .StrictAlign, + .V4t, .ThumbMode, .Db, - .V4t, + .StrictAlign, + .Mclass, .Noarm, }), FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() { - .Thumb2, .V4t, + .Thumb2, .Dsp, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() { - .Thumb2, .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() { - .Thumb2, - .Mclass, .Perfmon, + .V4t, .ThumbMode, - .Db, - .Dsp, .V7clrex, - .V4t, - .Hwdiv, + .Dsp, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() { - .Thumb2, .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() { - .Thumb2, - .Mclass, .Perfmon, + .V4t, .ThumbMode, - .Db, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, + .Hwdiv, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() { - .Thumb2, .Perfmon, - .Db, - .Dsp, - .Rclass, - .V7clrex, .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Hwdiv, + .Rclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() { - .Thumb2, .Perfmon, - .Db, - .Dsp, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, - .Dsp, - .V7clrex, - .V4t, - .Fpregs, .D32, - .Hwdiv, - .HwdivArm, + .Mp, + .Fpregs, + .V4t, + .V7clrex, + .Dsp, + .Thumb2, + .Db, .Aclass, + .Hwdiv, .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() { - .Mclass, - .StrictAlign, + .V4t, .ThumbMode, - .Db, .Msecext8, .V7clrex, - .V4t, - .Hwdiv, + .Db, + .StrictAlign, + .Mclass, .Noarm, .AcquireRelease, + .Hwdiv, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() { - .Thumb2, - .Mclass, .Perfmon, + .V4t, .ThumbMode, - .Db, .Msecext8, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Mclass, .Noarm, .AcquireRelease, + .Hwdiv, }), FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, .Crc, - .Fp16, + .Fpregs, + .Mp, .Dfb, .Dsp, - .Rclass, - .V7clrex, + .Fp16, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .Db, + .V7clrex, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Rclass, }), FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() { - .Thumb2, - .Mclass, .Perfmon, + .V4t, .ThumbMode, - .Db, .Msecext8, - .Ras, .V7clrex, - .V4t, - .Hwdiv, + .Thumb2, + .Db, + .Ras, + .Mclass, .Noarm, + .AcquireRelease, + .Hwdiv, .Lob, - .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() { - .Thumb2, - .Mp, + .HwdivArm, .Perfmon, - .Sb, - .Db, + .D32, + .Fpregs, .Crc, + .Mp, .Fp16, - .Ras, .Dsp, - .V7clrex, .V4t, - .Fpregs, - .D32, - .Hwdiv, - .HwdivArm, + .V7clrex, + .Db, .Aclass, - .Trustzone, + .Thumb2, + .Ras, + .Sb, .AcquireRelease, + .Hwdiv, + .Trustzone, }), FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"), FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"), FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"), FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"), @@ -500,8 +500,8 @@ pub const ArmFeature = enum { FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"), FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"), FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"), FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"), @@ -509,37 +509,37 @@ pub const ArmFeature = enum { FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"), FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"), FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"), FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"), FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"), FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() { .Fpregs, }), FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() { - .Fp16, - .Fpregs, .D32, + .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() { - .Fp16, - .Fpregs, .D32, + .Fpregs, + .Fp16, }), FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"), FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() { @@ -549,8 +549,8 @@ pub const ArmFeature = enum { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), @@ -569,8 +569,8 @@ pub const ArmFeature = enum { FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"), FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"), FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"), FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"), @@ -592,8 +592,8 @@ pub const ArmFeature = enum { FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"), FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"), FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"), FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"), @@ -617,8 +617,8 @@ pub const ArmFeature = enum { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() { .Fpregs, @@ -627,26 +627,26 @@ pub const ArmFeature = enum { .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() { - .Fpregs, .D32, + .Fpregs, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() { - .Fp16, - .Fpregs, .D32, + .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() { - .Fp16, .Fpregs, + .Fp16, }), FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() { - .Fp16, - .Fpregs, .D32, + .Fpregs, + .Fp16, }), FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"), FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() { @@ -655,21 +655,21 @@ pub const ArmFeature = enum { }), FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"), FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() { - .Thumb2, .Perfmon, - .Fp16, - .Dsp, - .V7clrex, .V4t, .Fpregs, + .V7clrex, + .Fp16, + .Dsp, + .Thumb2, }), FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() { - .Thumb2, .Perfmon, - .Dsp, - .V7clrex, .V4t, .Fpregs, + .V7clrex, + .Dsp, + .Thumb2, }), FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"), FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() { @@ -688,76 +688,76 @@ pub const ArmFeature = enum { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() { - .Thumb2, .V4t, + .Thumb2, }), FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() { - .V7clrex, - .V4t, .Perfmon, .Thumb2, + .V4t, + .V7clrex, }), FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() { .V4t, }), FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() { - .V7clrex, - .V4t, .Perfmon, .Thumb2, + .V4t, + .V7clrex, }), FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() { - .Thumb2, .Perfmon, - .V7clrex, .V4t, + .V7clrex, + .Thumb2, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() { - .V7clrex, - .V4t, .Perfmon, .Thumb2, + .V4t, + .V7clrex, }), FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { - .Thumb2, .Perfmon, - .V7clrex, .V4t, + .V7clrex, + .Thumb2, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { - .Thumb2, .Perfmon, - .V7clrex, .V4t, + .V7clrex, + .Thumb2, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { - .Thumb2, .Perfmon, - .V7clrex, .V4t, + .V7clrex, + .Thumb2, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { - .Thumb2, .Perfmon, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Thumb2, .AcquireRelease, }), FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { - .Thumb2, .Perfmon, - .Sb, - .V7clrex, .V4t, - .Fpregs, .D32, + .Fpregs, + .V7clrex, + .Thumb2, .AcquireRelease, + .Sb, }), FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() { .V4t, @@ -784,24 +784,24 @@ pub const ArmFeature = enum { FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"), FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"), FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() { - .Zcz, - .SlowVdup32, + .HwdivArm, + .D32, + .Crc, + .Fpregs, + .RetAddrStack, .SlowVgetlni32, - .DontWidenVmovs, - .Crc, - .FuseAes, .WideStrideVfp, + .SlowVdup32, + .SlowFpBrcc, .ProfUnpr, + .DontWidenVmovs, + .Zcz, + .Hwdiv, + .FuseAes, .Slowfpvmlx, - .SlowFpBrcc, + .UseAa, .FuseLiterals, - .Fpregs, - .D32, .ExpandFpMlx, - .Hwdiv, - .HwdivArm, - .RetAddrStack, - .UseAa, }), FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"), FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"), diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig index 6efacedbc2a95a31580cf045c96cee7736087735..1749c6c15cac15a8b04097ea2970df27d2fe7056 100644 --- a/lib/std/target/feature/AvrFeature.zig +++ b/lib/std/target/feature/AvrFeature.zig @@ -35,160 +35,160 @@ pub const AvrFeature = enum { Smallstack, Tinyencoding, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"), FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() { - .Lpm, .Avr0, + .Lpm, }), FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() { - .Ijmpcall, - .Sram, + .Lpm, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Ijmpcall, }), FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() { - .Ijmpcall, - .Sram, + .Lpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Ijmpcall, }), FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() { - .Ijmpcall, + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() { - .Ijmpcall, + .Lpm, .Movw, - .Mul, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() { - .Ijmpcall, - .Elpmx, + .Lpm, + .Elpm, .Movw, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() { - .Ijmpcall, + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Addsubiw, - .Lpm, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() { - .Ijmpcall, - .Sram, + .Lpm, .Elpm, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Ijmpcall, }), FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() { - .Ijmpcall, + .Lpm, .Movw, - .Sram, - .Break, .Spm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() { - .Ijmpcall, - .Elpmx, + .Lpm, + .Elpm, .Movw, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, .Avr0, + .Sram, .Jmpcall, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() { + .Avr0, + .Sram, .Break, .Tinyencoding, - .Avr0, - .Sram, }), FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() { - .Ijmpcall, - .Elpmx, + .Lpm, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, .Des, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() { - .Ijmpcall, - .Elpmx, + .Lpm, + .Elpm, .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, - .Break, + .Elpmx, .Spm, - .Elpm, - .Lpmx, - .Spmx, .Avr0, + .Sram, .Jmpcall, + .Eijmpcall, + .Spmx, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"), FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"), @@ -207,22 +207,22 @@ pub const AvrFeature = enum { FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"), FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"), FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() { - .Ijmpcall, + .Lpm, + .Elpm, .Elpmx, .Movw, - .Eijmpcall, - .Mul, - .Rmw, - .Sram, - .Break, - .Elpm, .Spm, - .Lpmx, + .Eijmpcall, .Spmx, .Jmpcall, + .Sram, .Addsubiw, - .Lpm, + .Mul, + .Lpmx, + .Rmw, .Des, + .Ijmpcall, + .Break, }), FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"), FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"), diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig index 028974ec2b61662f822154c3a9290d7286355043..b13da4615362ccedeea99e6c38265d843f920c23 100644 --- a/lib/std/target/feature/BpfFeature.zig +++ b/lib/std/target/feature/BpfFeature.zig @@ -5,7 +5,7 @@ pub const BpfFeature = enum { Dummy, Dwarfris, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig index 560f282334b675734bb778f11f56d36f57ecf342..4b074f1694c04e0ec9c9abf32ca98a8f0041a02a 100644 --- a/lib/std/target/feature/HexagonFeature.zig +++ b/lib/std/target/feature/HexagonFeature.zig @@ -26,7 +26,7 @@ pub const HexagonFeature = enum { ReservedR19, SmallData, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig index 16c7339f77a4eda1409b86b695096143677c61b0..2caaaa0dd048ee42d6ecc80721be7737c3c92638 100644 --- a/lib/std/target/feature/MipsFeature.zig +++ b/lib/std/target/feature/MipsFeature.zig @@ -52,7 +52,7 @@ pub const MipsFeature = enum { Xgot, P5600, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } @@ -60,14 +60,14 @@ pub const MipsFeature = enum { FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"), FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"), FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"), FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() { @@ -91,128 +91,128 @@ pub const MipsFeature = enum { .Mips1, }), FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() { - .Mips3_32, - .Fp64, .Mips3_32r2, - .Mips1, + .Fp64, .Gp64, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"), FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"), FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, + .Fp64, .Gp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"), FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"), FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() { - .Mips3_32, - .Fp64, + .Mips5_32r2, .Mips4_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"), FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"), FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() { - .Mips3_32, .Mips4_32, .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() { - .Mips3_32, + .Mips5_32r2, .Mips4_32r2, .Mips3_32r2, - .Mips1, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() { - .Mips3_32, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() { - .Mips3_32, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() { - .Mips3_32, - .Fp64, + .Mips5_32r2, + .Mips3_32r2, .Mips4_32r2, .Abs2008, - .Mips3_32r2, - .Mips1, - .Mips4_32, .Nan2008, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, + .Mips4_32r2, .Gp64, - .Mips5_32r2, + .Fp64, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() { - .Mips3_32, - .Fp64, - .Mips4_32r2, - .Abs2008, + .Mips5_32r2, .Mips3_32r2, - .Mips1, - .Mips4_32, .Nan2008, + .Abs2008, + .Mips4_32r2, + .Fp64, .Gp64, - .Mips5_32r2, + .Mips4_32, + .Mips1, + .Mips3_32, }), FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"), FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"), @@ -227,12 +227,12 @@ pub const MipsFeature = enum { FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"), FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"), FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() { - .Mips3_32, - .Mips4_32r2, + .Mips5_32r2, .Mips3_32r2, - .Mips1, + .Mips4_32r2, .Mips4_32, - .Mips5_32r2, + .Mips1, + .Mips3_32, }), }; }; diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig index 47c7b71fcae07cf942dfd49e70a87f9c2ab19811..4213283af59f4f290372bc2183c85cd8b5015e07 100644 --- a/lib/std/target/feature/Msp430Feature.zig +++ b/lib/std/target/feature/Msp430Feature.zig @@ -6,7 +6,7 @@ pub const Msp430Feature = enum { Hwmultf5, Ext, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig index 04250a3e26720008a47877d32344172450bd08fd..a22dec066da3aab31f384a001006ac446deee677 100644 --- a/lib/std/target/feature/NvptxFeature.zig +++ b/lib/std/target/feature/NvptxFeature.zig @@ -27,7 +27,7 @@ pub const NvptxFeature = enum { Sm_72, Sm_75, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig index 9fe67055dd1b43b63daf7b2de3b2a68896e7c5e8..c3a43e98c42489998631ecd36deeaab85ba78156 100644 --- a/lib/std/target/feature/PowerPcFeature.zig +++ b/lib/std/target/feature/PowerPcFeature.zig @@ -53,7 +53,7 @@ pub const PowerPcFeature = enum { Vsx, VectorsUseTwoUnits, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig index a489b6f5d38f6ff0fd2bf2ebc05a45d61fc678f7..b8fbe95299fc023103d2f253be6c19b28fba7e53 100644 --- a/lib/std/target/feature/RiscVFeature.zig +++ b/lib/std/target/feature/RiscVFeature.zig @@ -11,7 +11,7 @@ pub const RiscVFeature = enum { F, M, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig index b0b65041531eacc08804bf235107fb098b00127d..07d9375581fdc92a7e5b02b3c8be5367f63f7176 100644 --- a/lib/std/target/feature/SparcFeature.zig +++ b/lib/std/target/feature/SparcFeature.zig @@ -21,7 +21,7 @@ pub const SparcFeature = enum { Hasumacsmac, Popc, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig index 6d3321a5bab2d68c7b98980a0d0d0424cdb7b3fd..773c6583d0f2875aad289644947e27fc074cc70d 100644 --- a/lib/std/target/feature/SystemZFeature.zig +++ b/lib/std/target/feature/SystemZFeature.zig @@ -37,7 +37,7 @@ pub const SystemZFeature = enum { VectorPackedDecimal, VectorPackedDecimalEnhancement, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig index a7aaeee4f0a18db718254a8d50a3943074d23e44..1cd80b0f9424403f500a9efa98532a7266367d14 100644 --- a/lib/std/target/feature/WebAssemblyFeature.zig +++ b/lib/std/target/feature/WebAssemblyFeature.zig @@ -12,7 +12,7 @@ pub const WebAssemblyFeature = enum { TailCall, UnimplementedSimd128, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig index 7a2cc58169ed01c2d04df33a74e93a6457dea132..089215ed3f27a7715c8831d8f6ad2bd0e323ad1c 100644 --- a/lib/std/target/feature/X86Feature.zig +++ b/lib/std/target/feature/X86Feature.zig @@ -128,7 +128,7 @@ pub const X86Feature = enum { BitMode32, BitMode64, - pub fn getInfo(self: @This()) FeatureInfo { + pub fn getInfo(self: @This()) FeatureInfo(@This()) { return feature_infos[@enumToInt(self)]; } @@ -254,8 +254,8 @@ pub const X86Feature = enum { FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"), FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"), FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() { + .RetpolineIndirectCalls, .RetpolineIndirectBranches, - .RetpolineIndirectCalls, }), FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() { .RetpolineIndirectCalls, diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig index 87a334978dba703130bd08382f68911b4d775093..e18d66aa132262804145ee773d7d63949f6a9aec 100644 --- a/lib/std/target/feature/empty.zig +++ b/lib/std/target/feature/empty.zig @@ -1,5 +1,5 @@ const FeatureInfo = @import("std").target.feature.FeatureInfo; -pub const EmptyFeature = enum { +pub const EmptyFeature = struct { pub const feature_infos = [0]FeatureInfo(@This()) {}; -} +}; -- 2.54.0 From 5bc4690d85bfaade48393c182b2b3aa207ebebc7 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Tue, 17 Dec 2019 09:45:30 -0500 Subject: [PATCH 05/63] Make targets cmd able to list CPUs and features --- src-self-hosted/stage1.zig | 99 ++++++++++++++++++++++++++++++++++++++ src/main.cpp | 33 ++++++++++++- src/userland.cpp | 3 ++ src/userland.h | 6 +++ 4 files changed, 139 insertions(+), 2 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index ec683e4ba882b3c6fd14caf96630489f369d549e..fc6cb18bf23b07039a21f41d2a8a7426fc3ddb5f 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -6,9 +6,12 @@ const io = std.io; const mem = std.mem; const fs = std.fs; const process = std.process; +const feature = std.target.feature; +const cpu = std.target.cpu; const Allocator = mem.Allocator; const ArrayList = std.ArrayList; const Buffer = std.Buffer; +const Target = std.Target; const self_hosted_main = @import("main.zig"); const errmsg = @import("errmsg.zig"); const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer; @@ -527,3 +530,99 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.activate(); node.context.maybeRefresh(); } + +// ABI warning +export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { + print_features_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { + std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + }; +} + +fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { + const stdout_stream = &std.io.getStdOut().outStream().stream; + + const arch = Target.parseArchTag(arch_name) catch { + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + return; + }; + + inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| { + if (@enumToInt(arch) == arch_enum_field.value) { + const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value); + + const feature_infos = feature.ArchFeature(enum_arch).feature_infos; + + try stdout_stream.print("Available features for {}:\n", .{ arch_enum_field.name }); + + var longest_len: usize = 0; + for (feature_infos) |feature_info| { + if (feature_info.name.len > longest_len) longest_len = feature_info.name.len; + } + + for (feature_infos) |feature_info| { + try stdout_stream.print(" {}", .{ feature_info.name }); + + var i: usize = 0; + while (i < longest_len - feature_info.name.len) : (i += 1) { + try stdout_stream.write(" "); + } + + try stdout_stream.print(" - {}\n", .{ feature_info.description }); + + if (show_subfeatures and feature_info.subfeatures.len > 0) { + for (feature_info.subfeatures) |subfeature| { + try stdout_stream.print(" {}\n", .{ subfeature.getInfo().name }); + } + } + } + } + } +} + +// ABI warning +export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { + print_cpus_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { + std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + }; +} + +fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { + const stdout_stream = &std.io.getStdOut().outStream().stream; + + const arch = Target.parseArchTag(arch_name) catch { + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + return; + }; + + inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| { + if (@enumToInt(arch) == arch_enum_field.value) { + const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value); + + const cpu_infos = cpu.ArchCpu(enum_arch).cpu_infos; + + try stdout_stream.print("Available cpus for {}:\n", .{ arch_enum_field.name }); + + var longest_len: usize = 0; + for (cpu_infos) |cpu_info| { + if (cpu_info.name.len > longest_len) longest_len = cpu_info.name.len; + } + + for (cpu_infos) |cpu_info| { + try stdout_stream.print(" {}", .{ cpu_info.name }); + + var i: usize = 0; + while (i < longest_len - cpu_info.name.len) : (i += 1) { + try stdout_stream.write(" "); + } + + try stdout_stream.write("\n"); + + if (show_subfeatures and cpu_info.features.len > 0) { + for (cpu_info.features) |subfeature| { + try stdout_stream.print(" {}\n", .{ subfeature.getInfo().name }); + } + } + } + } + } +} diff --git a/src/main.cpp b/src/main.cpp index d89ac352a5e856a2c225a747c6d4ca1222cc205f..5c0a0b23fcf4f71adcfd4ad7aabf51773f65e8c8 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -129,6 +129,11 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --test-name-prefix [text] add prefix to all tests\n" " --test-cmd [arg] specify test execution command one arg at a time\n" " --test-cmd-bin appends test binary path to test cmd args\n" + "\n" + "Targets Options:\n" + " --list-features [arch] list available features for the given architecture\n" + " --list-cpus [arch] list available cpus for the given architecture\n" + " --show-subfeatures list subfeatures for each entry from --list-features or --list-cpus\n" , arg0); return return_code; } @@ -529,6 +534,10 @@ int main(int argc, char **argv) { WantCSanitize want_sanitize_c = WantCSanitizeAuto; bool function_sections = false; + const char *targets_list_features_arch = nullptr; + const char *targets_list_cpus_arch = nullptr; + bool targets_show_subfeatures = false; + ZigList llvm_argv = {0}; llvm_argv.append("zig (LLVM option parsing)"); @@ -779,6 +788,8 @@ int main(int argc, char **argv) { cur_pkg = cur_pkg->parent; } else if (strcmp(arg, "-ffunction-sections") == 0) { function_sections = true; + } else if (strcmp(arg, "--show-subfeatures") == 0) { + targets_show_subfeatures = true; } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); @@ -936,7 +947,11 @@ int main(int argc, char **argv) { , argv[i]); return EXIT_FAILURE; } - } else { + } else if (strcmp(arg, "--list-features") == 0) { + targets_list_features_arch = argv[i]; + } else if (strcmp(arg, "--list-cpus") == 0) { + targets_list_cpus_arch = argv[i]; + }else { fprintf(stderr, "Invalid argument: %s\n", arg); return print_error_usage(arg0); } @@ -1413,7 +1428,21 @@ int main(int argc, char **argv) { return main_exit(root_progress_node, EXIT_SUCCESS); } case CmdTargets: - return print_target_list(stdout); + if (targets_list_features_arch != nullptr) { + stage2_list_features_for_arch( + targets_list_features_arch, + strlen(targets_list_features_arch), + targets_show_subfeatures); + return 0; + } else if (targets_list_cpus_arch != nullptr) { + stage2_list_cpus_for_arch( + targets_list_cpus_arch, + strlen(targets_list_cpus_arch), + targets_show_subfeatures); + return 0; + } else { + return print_target_list(stdout); + } case CmdNone: return print_full_usage(arg0, stderr, EXIT_FAILURE); } diff --git a/src/userland.cpp b/src/userland.cpp index 263ef0cbc38c36a281ef7cd0a2301df17a7fa7d3..87ef99c03a91fa16eb0ce0d06890c3adb2e6dae0 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -88,3 +88,6 @@ void stage2_progress_end(Stage2ProgressNode *node) {} void stage2_progress_complete_one(Stage2ProgressNode *node) {} void stage2_progress_disable_tty(Stage2Progress *progress) {} void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){} + +void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} +void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} diff --git a/src/userland.h b/src/userland.h index fe3f072ae5699cd2631cb8e0e0e6c18613d35ecd..c85684cb36f3f7b37c7462bc21270f9b4022298a 100644 --- a/src/userland.h +++ b/src/userland.h @@ -174,4 +174,10 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node); ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items); +// ABI warning +ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); + +// ABI warning +ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); + #endif -- 2.54.0 From 9d66bda26421c2b687afc26122736515c9cc35da Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Tue, 17 Dec 2019 16:50:48 -0500 Subject: [PATCH 06/63] Fix spacing in main.cpp --- src/main.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main.cpp b/src/main.cpp index 5c0a0b23fcf4f71adcfd4ad7aabf51773f65e8c8..ee2faa9a78ab43b60d4e337bfa17cc4a6c5fb342 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -789,7 +789,7 @@ int main(int argc, char **argv) { } else if (strcmp(arg, "-ffunction-sections") == 0) { function_sections = true; } else if (strcmp(arg, "--show-subfeatures") == 0) { - targets_show_subfeatures = true; + targets_show_subfeatures = true; } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); -- 2.54.0 From c131e50ea7ea0fb95d188c3d0f71ef77bcc96952 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Fri, 20 Dec 2019 19:27:13 -0500 Subject: [PATCH 07/63] Switch CPU/features to simple format --- lib/std/target.zig | 78 +- lib/std/target/aarch64.zig | 2383 +++++++ lib/std/target/amdgpu.zig | 2329 +++++++ lib/std/target/arm.zig | 3595 +++++++++++ lib/std/target/avr.zig | 5578 +++++++++++++++++ lib/std/target/bpf.zig | 75 + lib/std/target/cpu.zig | 67 - lib/std/target/cpu/AArch64Cpu.zig | 480 -- lib/std/target/cpu/AmdGpuCpu.zig | 1060 ---- lib/std/target/cpu/ArmCpu.zig | 1230 ---- lib/std/target/cpu/AvrCpu.zig | 3863 ------------ lib/std/target/cpu/BpfCpu.zig | 29 - lib/std/target/cpu/HexagonCpu.zig | 103 - lib/std/target/cpu/MipsCpu.zig | 190 - lib/std/target/cpu/Msp430Cpu.zig | 24 - lib/std/target/cpu/NvptxCpu.zig | 85 - lib/std/target/cpu/PowerPcCpu.zig | 451 -- lib/std/target/cpu/RiscVCpu.zig | 23 - lib/std/target/cpu/SparcCpu.zig | 216 - lib/std/target/cpu/SystemZCpu.zig | 279 - lib/std/target/cpu/WebAssemblyCpu.zig | 28 - lib/std/target/cpu/X86Cpu.zig | 1864 ------ lib/std/target/cpu/empty.zig | 6 - lib/std/target/feature.zig | 81 - lib/std/target/feature/AArch64Feature.zig | 750 --- lib/std/target/feature/AmdGpuFeature.zig | 343 - lib/std/target/feature/ArmFeature.zig | 818 --- lib/std/target/feature/AvrFeature.zig | 230 - lib/std/target/feature/BpfFeature.zig | 17 - lib/std/target/feature/HexagonFeature.zig | 76 - lib/std/target/feature/MipsFeature.zig | 238 - lib/std/target/feature/Msp430Feature.zig | 19 - lib/std/target/feature/NvptxFeature.zig | 61 - lib/std/target/feature/PowerPcFeature.zig | 163 - lib/std/target/feature/RiscVFeature.zig | 31 - lib/std/target/feature/SparcFeature.zig | 49 - lib/std/target/feature/SystemZFeature.zig | 81 - lib/std/target/feature/WebAssemblyFeature.zig | 33 - lib/std/target/feature/X86Feature.zig | 342 - lib/std/target/feature/empty.zig | 5 - lib/std/target/hexagon.zig | 357 ++ lib/std/target/mips.zig | 828 +++ lib/std/target/msp430.zig | 69 + lib/std/target/nvptx.zig | 379 ++ lib/std/target/powerpc.zig | 1115 ++++ lib/std/target/riscv.zig | 109 + lib/std/target/sparc.zig | 581 ++ lib/std/target/systemz.zig | 653 ++ lib/std/target/wasm.zig | 128 + lib/std/target/x86.zig | 3427 ++++++++++ src-self-hosted/stage1.zig | 88 +- 51 files changed, 21721 insertions(+), 13386 deletions(-) create mode 100644 lib/std/target/aarch64.zig create mode 100644 lib/std/target/amdgpu.zig create mode 100644 lib/std/target/arm.zig create mode 100644 lib/std/target/avr.zig create mode 100644 lib/std/target/bpf.zig delete mode 100644 lib/std/target/cpu.zig delete mode 100644 lib/std/target/cpu/AArch64Cpu.zig delete mode 100644 lib/std/target/cpu/AmdGpuCpu.zig delete mode 100644 lib/std/target/cpu/ArmCpu.zig delete mode 100644 lib/std/target/cpu/AvrCpu.zig delete mode 100644 lib/std/target/cpu/BpfCpu.zig delete mode 100644 lib/std/target/cpu/HexagonCpu.zig delete mode 100644 lib/std/target/cpu/MipsCpu.zig delete mode 100644 lib/std/target/cpu/Msp430Cpu.zig delete mode 100644 lib/std/target/cpu/NvptxCpu.zig delete mode 100644 lib/std/target/cpu/PowerPcCpu.zig delete mode 100644 lib/std/target/cpu/RiscVCpu.zig delete mode 100644 lib/std/target/cpu/SparcCpu.zig delete mode 100644 lib/std/target/cpu/SystemZCpu.zig delete mode 100644 lib/std/target/cpu/WebAssemblyCpu.zig delete mode 100644 lib/std/target/cpu/X86Cpu.zig delete mode 100644 lib/std/target/cpu/empty.zig delete mode 100644 lib/std/target/feature.zig delete mode 100644 lib/std/target/feature/AArch64Feature.zig delete mode 100644 lib/std/target/feature/AmdGpuFeature.zig delete mode 100644 lib/std/target/feature/ArmFeature.zig delete mode 100644 lib/std/target/feature/AvrFeature.zig delete mode 100644 lib/std/target/feature/BpfFeature.zig delete mode 100644 lib/std/target/feature/HexagonFeature.zig delete mode 100644 lib/std/target/feature/MipsFeature.zig delete mode 100644 lib/std/target/feature/Msp430Feature.zig delete mode 100644 lib/std/target/feature/NvptxFeature.zig delete mode 100644 lib/std/target/feature/PowerPcFeature.zig delete mode 100644 lib/std/target/feature/RiscVFeature.zig delete mode 100644 lib/std/target/feature/SparcFeature.zig delete mode 100644 lib/std/target/feature/SystemZFeature.zig delete mode 100644 lib/std/target/feature/WebAssemblyFeature.zig delete mode 100644 lib/std/target/feature/X86Feature.zig delete mode 100644 lib/std/target/feature/empty.zig create mode 100644 lib/std/target/hexagon.zig create mode 100644 lib/std/target/mips.zig create mode 100644 lib/std/target/msp430.zig create mode 100644 lib/std/target/nvptx.zig create mode 100644 lib/std/target/powerpc.zig create mode 100644 lib/std/target/riscv.zig create mode 100644 lib/std/target/sparc.zig create mode 100644 lib/std/target/systemz.zig create mode 100644 lib/std/target/wasm.zig create mode 100644 lib/std/target/x86.zig diff --git a/lib/std/target.zig b/lib/std/target.zig index 4d5de1fc85ead7369d7312405517c76d0913bfe3..c9113118101b9adac6f214ada9f00bae3ea66ff0 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -2,9 +2,6 @@ const std = @import("std.zig"); const mem = std.mem; const builtin = std.builtin; -pub const feature = @import("target/feature.zig"); -pub const cpu = @import("target/cpu.zig"); - /// TODO Nearly all the functions in this namespace would be /// better off if https://github.com/ziglang/zig/issues/425 /// was solved. @@ -844,3 +841,78 @@ pub const Target = union(enum) { return .unavailable; } }; + +pub const aarch64 = @import("target/aarch64.zig"); +pub const amdgpu = @import("target/amdgpu.zig"); +pub const arm = @import("target/arm.zig"); +pub const avr = @import("target/avr.zig"); +pub const bpf = @import("target/bpf.zig"); +pub const hexagon = @import("target/hexagon.zig"); +pub const mips = @import("target/mips.zig"); +pub const msp430 = @import("target/msp430.zig"); +pub const nvptx = @import("target/nvptx.zig"); +pub const powerpc = @import("target/powerpc.zig"); +pub const riscv = @import("target/riscv.zig"); +pub const sparc = @import("target/sparc.zig"); +pub const systemz = @import("target/systemz.zig"); +pub const wasm = @import("target/wasm.zig"); +pub const x86 = @import("target/x86.zig"); + +pub const Feature = struct { + name: []const u8, + description: []const u8, + llvm_name: []const u8, + + subfeatures: []*const Feature, +}; + +pub const Cpu = struct { + name: []const u8, + llvm_name: []const u8, + + subfeatures: []*const Feature, +}; + +pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.features, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.features, + .avr => avr.features, + .bpfel, .bpfeb => bpf.features, + .hexagon => hexagon.features, + .mips, .mipsel, .mips64, .mips64el => mips.features, + .msp430 => msp430.features, + .powerpc, .powerpc64, .powerpc64le => powerpc.features, + .amdgcn => amdgpu.features, + .riscv32, .riscv64 => riscv.features, + .sparc, .sparcv9, .sparcel => sparc.features, + .s390x => systemz.features, + .i386, .x86_64 => x86.features, + .nvptx, .nvptx64 => nvptx.features, + .wasm32, .wasm64 => wasm.features, + + else => &[_]*const Feature{}, + }; +} + +pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.cpus, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus, + .avr => avr.cpus, + .bpfel, .bpfeb => bpf.cpus, + .hexagon => hexagon.cpus, + .mips, .mipsel, .mips64, .mips64el => mips.cpus, + .msp430 => msp430.cpus, + .powerpc, .powerpc64, .powerpc64le => powerpc.cpus, + .amdgcn => amdgpu.cpus, + .riscv32, .riscv64 => riscv.cpus, + .sparc, .sparcv9, .sparcel => sparc.cpus, + .s390x => systemz.cpus, + .i386, .x86_64 => x86.cpus, + .nvptx, .nvptx64 => nvptx.cpus, + .wasm32, .wasm64 => wasm.cpus, + + else => &[_]*const Cpu{}, + }; +} diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig new file mode 100644 index 0000000000000000000000000000000000000000..ca87c33bbbb7c1c0c213fb3591d3157859685c9c --- /dev/null +++ b/lib/std/target/aarch64.zig @@ -0,0 +1,2383 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_aes = Feature{ + .name = "aes", + .description = "Enable AES support", + .llvm_name = "aes", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_am = Feature{ + .name = "am", + .description = "Enable v8.4-A Activity Monitors extension", + .llvm_name = "am", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_aggressiveFma = Feature{ + .name = "aggressive-fma", + .description = "Enable Aggressive FMA for floating-point.", + .llvm_name = "aggressive-fma", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_altnzcv = Feature{ + .name = "altnzcv", + .description = "Enable alternative NZCV format for floating point comparisons", + .llvm_name = "altnzcv", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_alternateSextloadCvtF32Pattern = Feature{ + .name = "alternate-sextload-cvt-f32-pattern", + .description = "Use alternative pattern for sextload convert to f32", + .llvm_name = "alternate-sextload-cvt-f32-pattern", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_arithBccFusion = Feature{ + .name = "arith-bcc-fusion", + .description = "CPU fuses arithmetic+bcc operations", + .llvm_name = "arith-bcc-fusion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_arithCbzFusion = Feature{ + .name = "arith-cbz-fusion", + .description = "CPU fuses arithmetic + cbz/cbnz operations", + .llvm_name = "arith-cbz-fusion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_balanceFpOps = Feature{ + .name = "balance-fp-ops", + .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", + .llvm_name = "balance-fp-ops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bti = Feature{ + .name = "bti", + .description = "Enable Branch Target Identification", + .llvm_name = "bti", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ccidx = Feature{ + .name = "ccidx", + .description = "Enable v8.3-A Extend of the CCSIDR number of sets", + .llvm_name = "ccidx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ccpp = Feature{ + .name = "ccpp", + .description = "Enable v8.2 data Cache Clean to Point of Persistence", + .llvm_name = "ccpp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .description = "Enable ARMv8 CRC-32 checksum instructions", + .llvm_name = "crc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ccdp = Feature{ + .name = "ccdp", + .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", + .llvm_name = "ccdp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX8 = Feature{ + .name = "call-saved-x8", + .description = "Make X8 callee saved.", + .llvm_name = "call-saved-x8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX9 = Feature{ + .name = "call-saved-x9", + .description = "Make X9 callee saved.", + .llvm_name = "call-saved-x9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX10 = Feature{ + .name = "call-saved-x10", + .description = "Make X10 callee saved.", + .llvm_name = "call-saved-x10", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX11 = Feature{ + .name = "call-saved-x11", + .description = "Make X11 callee saved.", + .llvm_name = "call-saved-x11", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX12 = Feature{ + .name = "call-saved-x12", + .description = "Make X12 callee saved.", + .llvm_name = "call-saved-x12", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX13 = Feature{ + .name = "call-saved-x13", + .description = "Make X13 callee saved.", + .llvm_name = "call-saved-x13", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX14 = Feature{ + .name = "call-saved-x14", + .description = "Make X14 callee saved.", + .llvm_name = "call-saved-x14", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX15 = Feature{ + .name = "call-saved-x15", + .description = "Make X15 callee saved.", + .llvm_name = "call-saved-x15", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX18 = Feature{ + .name = "call-saved-x18", + .description = "Make X18 callee saved.", + .llvm_name = "call-saved-x18", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_complxnum = Feature{ + .name = "complxnum", + .description = "Enable v8.3-A Floating-point complex number support", + .llvm_name = "complxnum", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .description = "Enable cryptographic instructions", + .llvm_name = "crypto", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_customCheapAsMove = Feature{ + .name = "custom-cheap-as-move", + .description = "Use custom handling of cheap instructions", + .llvm_name = "custom-cheap-as-move", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dit = Feature{ + .name = "dit", + .description = "Enable v8.4-A Data Independent Timing instructions", + .llvm_name = "dit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_disableLatencySchedHeuristic = Feature{ + .name = "disable-latency-sched-heuristic", + .description = "Disable latency scheduling heuristic", + .llvm_name = "disable-latency-sched-heuristic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dotprod = Feature{ + .name = "dotprod", + .description = "Enable dot product support", + .llvm_name = "dotprod", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ete = Feature{ + .name = "ete", + .description = "Enable Embedded Trace Extension", + .llvm_name = "ete", + .subfeatures = &[_]*const Feature { + &feature_trbe, + }, +}; + +pub const feature_exynosCheapAsMove = Feature{ + .name = "exynos-cheap-as-move", + .description = "Use Exynos specific handling of cheap instructions", + .llvm_name = "exynos-cheap-as-move", + .subfeatures = &[_]*const Feature { + &feature_customCheapAsMove, + }, +}; + +pub const feature_fmi = Feature{ + .name = "fmi", + .description = "Enable v8.4-A Flag Manipulation Instructions", + .llvm_name = "fmi", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp16fml = Feature{ + .name = "fp16fml", + .description = "Enable FP16 FML instructions", + .llvm_name = "fp16fml", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_fpArmv8 = Feature{ + .name = "fp-armv8", + .description = "Enable ARMv8 FP", + .llvm_name = "fp-armv8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fptoint = Feature{ + .name = "fptoint", + .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", + .llvm_name = "fptoint", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_force32bitJumpTables = Feature{ + .name = "force-32bit-jump-tables", + .description = "Force jump table entries to be 32-bits wide except at MinSize", + .llvm_name = "force-32bit-jump-tables", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fullfp16 = Feature{ + .name = "fullfp16", + .description = "Full FP16", + .llvm_name = "fullfp16", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_fuseAes = Feature{ + .name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .llvm_name = "fuse-aes", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseAddress = Feature{ + .name = "fuse-address", + .description = "CPU fuses address generation and memory operations", + .llvm_name = "fuse-address", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseArithLogic = Feature{ + .name = "fuse-arith-logic", + .description = "CPU fuses arithmetic and logic operations", + .llvm_name = "fuse-arith-logic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseCsel = Feature{ + .name = "fuse-csel", + .description = "CPU fuses conditional select operations", + .llvm_name = "fuse-csel", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseCryptoEor = Feature{ + .name = "fuse-crypto-eor", + .description = "CPU fuses AES/PMULL and EOR operations", + .llvm_name = "fuse-crypto-eor", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseLiterals = Feature{ + .name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .llvm_name = "fuse-literals", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_jsconv = Feature{ + .name = "jsconv", + .description = "Enable v8.3-A JavaScript FP conversion enchancement", + .llvm_name = "jsconv", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_lor = Feature{ + .name = "lor", + .description = "Enables ARM v8.1 Limited Ordering Regions extension", + .llvm_name = "lor", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lse = Feature{ + .name = "lse", + .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", + .llvm_name = "lse", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lslFast = Feature{ + .name = "lsl-fast", + .description = "CPU has a fastpath logical shift of up to 3 places", + .llvm_name = "lsl-fast", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mpam = Feature{ + .name = "mpam", + .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", + .llvm_name = "mpam", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mte = Feature{ + .name = "mte", + .description = "Enable Memory Tagging Extension", + .llvm_name = "mte", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_neon = Feature{ + .name = "neon", + .description = "Enable Advanced SIMD instructions", + .llvm_name = "neon", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_nv = Feature{ + .name = "nv", + .description = "Enable v8.4-A Nested Virtualization Enchancement", + .llvm_name = "nv", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noNegImmediates = Feature{ + .name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .llvm_name = "no-neg-immediates", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_pa = Feature{ + .name = "pa", + .description = "Enable v8.3-A Pointer Authentication enchancement", + .llvm_name = "pa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_pan = Feature{ + .name = "pan", + .description = "Enables ARM v8.1 Privileged Access-Never extension", + .llvm_name = "pan", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_panRwv = Feature{ + .name = "pan-rwv", + .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", + .llvm_name = "pan-rwv", + .subfeatures = &[_]*const Feature { + &feature_pan, + }, +}; + +pub const feature_perfmon = Feature{ + .name = "perfmon", + .description = "Enable ARMv8 PMUv3 Performance Monitors extension", + .llvm_name = "perfmon", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_usePostraScheduler = Feature{ + .name = "use-postra-scheduler", + .description = "Schedule again after register allocation", + .llvm_name = "use-postra-scheduler", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_predres = Feature{ + .name = "predres", + .description = "Enable v8.5a execution and data prediction invalidation instructions", + .llvm_name = "predres", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_predictableSelectExpensive = Feature{ + .name = "predictable-select-expensive", + .description = "Prefer likely predicted branches over selects", + .llvm_name = "predictable-select-expensive", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_uaops = Feature{ + .name = "uaops", + .description = "Enable v8.2 UAO PState", + .llvm_name = "uaops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ras = Feature{ + .name = "ras", + .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", + .llvm_name = "ras", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rasv8_4 = Feature{ + .name = "rasv8_4", + .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", + .llvm_name = "rasv8_4", + .subfeatures = &[_]*const Feature { + &feature_ras, + }, +}; + +pub const feature_rcpc = Feature{ + .name = "rcpc", + .description = "Enable support for RCPC extension", + .llvm_name = "rcpc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rcpcImmo = Feature{ + .name = "rcpc-immo", + .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", + .llvm_name = "rcpc-immo", + .subfeatures = &[_]*const Feature { + &feature_rcpc, + }, +}; + +pub const feature_rdm = Feature{ + .name = "rdm", + .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", + .llvm_name = "rdm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rand = Feature{ + .name = "rand", + .description = "Enable Random Number generation instructions", + .llvm_name = "rand", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX1 = Feature{ + .name = "reserve-x1", + .description = "Reserve X1, making it unavailable as a GPR", + .llvm_name = "reserve-x1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX2 = Feature{ + .name = "reserve-x2", + .description = "Reserve X2, making it unavailable as a GPR", + .llvm_name = "reserve-x2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX3 = Feature{ + .name = "reserve-x3", + .description = "Reserve X3, making it unavailable as a GPR", + .llvm_name = "reserve-x3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX4 = Feature{ + .name = "reserve-x4", + .description = "Reserve X4, making it unavailable as a GPR", + .llvm_name = "reserve-x4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX5 = Feature{ + .name = "reserve-x5", + .description = "Reserve X5, making it unavailable as a GPR", + .llvm_name = "reserve-x5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX6 = Feature{ + .name = "reserve-x6", + .description = "Reserve X6, making it unavailable as a GPR", + .llvm_name = "reserve-x6", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX7 = Feature{ + .name = "reserve-x7", + .description = "Reserve X7, making it unavailable as a GPR", + .llvm_name = "reserve-x7", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX9 = Feature{ + .name = "reserve-x9", + .description = "Reserve X9, making it unavailable as a GPR", + .llvm_name = "reserve-x9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX10 = Feature{ + .name = "reserve-x10", + .description = "Reserve X10, making it unavailable as a GPR", + .llvm_name = "reserve-x10", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX11 = Feature{ + .name = "reserve-x11", + .description = "Reserve X11, making it unavailable as a GPR", + .llvm_name = "reserve-x11", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX12 = Feature{ + .name = "reserve-x12", + .description = "Reserve X12, making it unavailable as a GPR", + .llvm_name = "reserve-x12", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX13 = Feature{ + .name = "reserve-x13", + .description = "Reserve X13, making it unavailable as a GPR", + .llvm_name = "reserve-x13", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX14 = Feature{ + .name = "reserve-x14", + .description = "Reserve X14, making it unavailable as a GPR", + .llvm_name = "reserve-x14", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX15 = Feature{ + .name = "reserve-x15", + .description = "Reserve X15, making it unavailable as a GPR", + .llvm_name = "reserve-x15", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX18 = Feature{ + .name = "reserve-x18", + .description = "Reserve X18, making it unavailable as a GPR", + .llvm_name = "reserve-x18", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX20 = Feature{ + .name = "reserve-x20", + .description = "Reserve X20, making it unavailable as a GPR", + .llvm_name = "reserve-x20", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX21 = Feature{ + .name = "reserve-x21", + .description = "Reserve X21, making it unavailable as a GPR", + .llvm_name = "reserve-x21", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX22 = Feature{ + .name = "reserve-x22", + .description = "Reserve X22, making it unavailable as a GPR", + .llvm_name = "reserve-x22", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX23 = Feature{ + .name = "reserve-x23", + .description = "Reserve X23, making it unavailable as a GPR", + .llvm_name = "reserve-x23", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX24 = Feature{ + .name = "reserve-x24", + .description = "Reserve X24, making it unavailable as a GPR", + .llvm_name = "reserve-x24", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX25 = Feature{ + .name = "reserve-x25", + .description = "Reserve X25, making it unavailable as a GPR", + .llvm_name = "reserve-x25", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX26 = Feature{ + .name = "reserve-x26", + .description = "Reserve X26, making it unavailable as a GPR", + .llvm_name = "reserve-x26", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX27 = Feature{ + .name = "reserve-x27", + .description = "Reserve X27, making it unavailable as a GPR", + .llvm_name = "reserve-x27", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveX28 = Feature{ + .name = "reserve-x28", + .description = "Reserve X28, making it unavailable as a GPR", + .llvm_name = "reserve-x28", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sb = Feature{ + .name = "sb", + .description = "Enable v8.5 Speculation Barrier", + .llvm_name = "sb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sel2 = Feature{ + .name = "sel2", + .description = "Enable v8.4-A Secure Exception Level 2 extension", + .llvm_name = "sel2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sha2 = Feature{ + .name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .llvm_name = "sha2", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_sha3 = Feature{ + .name = "sha3", + .description = "Enable SHA512 and SHA3 support", + .llvm_name = "sha3", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_sm4 = Feature{ + .name = "sm4", + .description = "Enable SM3 and SM4 support", + .llvm_name = "sm4", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_spe = Feature{ + .name = "spe", + .description = "Enable Statistical Profiling extension", + .llvm_name = "spe", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ssbs = Feature{ + .name = "ssbs", + .description = "Enable Speculative Store Bypass Safe bit", + .llvm_name = "ssbs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sve = Feature{ + .name = "sve", + .description = "Enable Scalable Vector Extension (SVE) instructions", + .llvm_name = "sve", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sve2 = Feature{ + .name = "sve2", + .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", + .llvm_name = "sve2", + .subfeatures = &[_]*const Feature { + &feature_sve, + }, +}; + +pub const feature_sve2Aes = Feature{ + .name = "sve2-aes", + .description = "Enable AES SVE2 instructions", + .llvm_name = "sve2-aes", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_sve, + }, +}; + +pub const feature_sve2Bitperm = Feature{ + .name = "sve2-bitperm", + .description = "Enable bit permutation SVE2 instructions", + .llvm_name = "sve2-bitperm", + .subfeatures = &[_]*const Feature { + &feature_sve, + }, +}; + +pub const feature_sve2Sha3 = Feature{ + .name = "sve2-sha3", + .description = "Enable SHA3 SVE2 instructions", + .llvm_name = "sve2-sha3", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_sve, + }, +}; + +pub const feature_sve2Sm4 = Feature{ + .name = "sve2-sm4", + .description = "Enable SM4 SVE2 instructions", + .llvm_name = "sve2-sm4", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_sve, + }, +}; + +pub const feature_slowMisaligned128store = Feature{ + .name = "slow-misaligned-128store", + .description = "Misaligned 128 bit stores are slow", + .llvm_name = "slow-misaligned-128store", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowPaired128 = Feature{ + .name = "slow-paired-128", + .description = "Paired 128 bit loads and stores are slow", + .llvm_name = "slow-paired-128", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowStrqroStore = Feature{ + .name = "slow-strqro-store", + .description = "STR of Q register with register offset is slow", + .llvm_name = "slow-strqro-store", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_specrestrict = Feature{ + .name = "specrestrict", + .description = "Enable architectural speculation restriction", + .llvm_name = "specrestrict", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_strictAlign = Feature{ + .name = "strict-align", + .description = "Disallow all unaligned memory access", + .llvm_name = "strict-align", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tlbRmi = Feature{ + .name = "tlb-rmi", + .description = "Enable v8.4-A TLB Range and Maintenance Instructions", + .llvm_name = "tlb-rmi", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tme = Feature{ + .name = "tme", + .description = "Enable Transactional Memory Extension", + .llvm_name = "tme", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tracev84 = Feature{ + .name = "tracev8.4", + .description = "Enable v8.4-A Trace extension", + .llvm_name = "tracev8.4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_trbe = Feature{ + .name = "trbe", + .description = "Enable Trace Buffer Extension", + .llvm_name = "trbe", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_taggedGlobals = Feature{ + .name = "tagged-globals", + .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", + .llvm_name = "tagged-globals", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useAa = Feature{ + .name = "use-aa", + .description = "Use alias analysis during codegen", + .llvm_name = "use-aa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl1 = Feature{ + .name = "tpidr-el1", + .description = "Permit use of TPIDR_EL1 for the TLS base", + .llvm_name = "tpidr-el1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl2 = Feature{ + .name = "tpidr-el2", + .description = "Permit use of TPIDR_EL2 for the TLS base", + .llvm_name = "tpidr-el2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl3 = Feature{ + .name = "tpidr-el3", + .description = "Permit use of TPIDR_EL3 for the TLS base", + .llvm_name = "tpidr-el3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useReciprocalSquareRoot = Feature{ + .name = "use-reciprocal-square-root", + .description = "Use the reciprocal square root approximation", + .llvm_name = "use-reciprocal-square-root", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vh = Feature{ + .name = "vh", + .description = "Enables ARM v8.1 Virtual Host extension", + .llvm_name = "vh", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_zcm = Feature{ + .name = "zcm", + .description = "Has zero-cycle register moves", + .llvm_name = "zcm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_zcz = Feature{ + .name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .llvm_name = "zcz", + .subfeatures = &[_]*const Feature { + &feature_zczGp, + &feature_zczFp, + }, +}; + +pub const feature_zczFp = Feature{ + .name = "zcz-fp", + .description = "Has zero-cycle zeroing instructions for FP registers", + .llvm_name = "zcz-fp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_zczFpWorkaround = Feature{ + .name = "zcz-fp-workaround", + .description = "The zero-cycle floating-point zeroing instruction has a bug", + .llvm_name = "zcz-fp-workaround", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_zczGp = Feature{ + .name = "zcz-gp", + .description = "Has zero-cycle zeroing instructions for generic registers", + .llvm_name = "zcz-gp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v81a = Feature{ + .name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .llvm_name = "v8.1a", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_lse, + &feature_lor, + &feature_crc, + &feature_pan, + &feature_vh, + }, +}; + +pub const feature_v82a = Feature{ + .name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .llvm_name = "v8.2a", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_ras, + &feature_lor, + &feature_crc, + &feature_pan, + &feature_uaops, + &feature_vh, + }, +}; + +pub const feature_v83a = Feature{ + .name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .llvm_name = "v8.3a", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_pa, + &feature_ccpp, + &feature_uaops, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_ccidx, + &feature_vh, + }, +}; + +pub const feature_v84a = Feature{ + .name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .llvm_name = "v8.4a", + .subfeatures = &[_]*const Feature { + &feature_am, + &feature_nv, + &feature_ccpp, + &feature_dotprod, + &feature_lse, + &feature_rcpc, + &feature_uaops, + &feature_ccidx, + &feature_vh, + &feature_tracev84, + &feature_rdm, + &feature_fpArmv8, + &feature_dit, + &feature_mpam, + &feature_ras, + &feature_tlbRmi, + &feature_fmi, + &feature_crc, + &feature_pa, + &feature_sel2, + &feature_lor, + &feature_pan, + }, +}; + +pub const feature_v85a = Feature{ + .name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .llvm_name = "v8.5a", + .subfeatures = &[_]*const Feature { + &feature_am, + &feature_nv, + &feature_specrestrict, + &feature_ccpp, + &feature_dotprod, + &feature_lse, + &feature_ccdp, + &feature_sb, + &feature_rcpc, + &feature_ccidx, + &feature_uaops, + &feature_vh, + &feature_altnzcv, + &feature_tracev84, + &feature_rdm, + &feature_ssbs, + &feature_fpArmv8, + &feature_dit, + &feature_mpam, + &feature_ras, + &feature_tlbRmi, + &feature_fmi, + &feature_crc, + &feature_predres, + &feature_pa, + &feature_sel2, + &feature_lor, + &feature_fptoint, + &feature_bti, + &feature_pan, + }, +}; + +pub const feature_a35 = Feature{ + .name = "a35", + .description = "Cortex-A35 ARM processors", + .llvm_name = "a35", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const feature_a53 = Feature{ + .name = "a53", + .description = "Cortex-A53 ARM processors", + .llvm_name = "a53", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_fpArmv8, + &feature_perfmon, + &feature_useAa, + &feature_crc, + }, +}; + +pub const feature_a55 = Feature{ + .name = "a55", + .description = "Cortex-A55 ARM processors", + .llvm_name = "a55", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + }, +}; + +pub const feature_a57 = Feature{ + .name = "a57", + .description = "Cortex-A57 ARM processors", + .llvm_name = "a57", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_fuseLiterals, + &feature_crc, + }, +}; + +pub const feature_a65 = Feature{ + .name = "a65", + .description = "Cortex-A65 ARM processors", + .llvm_name = "a65", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + }, +}; + +pub const feature_a72 = Feature{ + .name = "a72", + .description = "Cortex-A72 ARM processors", + .llvm_name = "a72", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_fuseAes, + }, +}; + +pub const feature_a73 = Feature{ + .name = "a73", + .description = "Cortex-A73 ARM processors", + .llvm_name = "a73", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_fuseAes, + }, +}; + +pub const feature_a75 = Feature{ + .name = "a75", + .description = "Cortex-A75 ARM processors", + .llvm_name = "a75", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + }, +}; + +pub const feature_a76 = Feature{ + .name = "a76", + .description = "Cortex-A76 ARM processors", + .llvm_name = "a76", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + }, +}; + +pub const feature_cyclone = Feature{ + .name = "cyclone", + .description = "Cyclone", + .llvm_name = "cyclone", + .subfeatures = &[_]*const Feature { + &feature_zczGp, + &feature_arithBccFusion, + &feature_fuseAes, + &feature_zczFp, + &feature_zczFpWorkaround, + &feature_fpArmv8, + &feature_perfmon, + &feature_disableLatencySchedHeuristic, + &feature_zcm, + &feature_arithCbzFusion, + &feature_fuseCryptoEor, + &feature_alternateSextloadCvtF32Pattern, + }, +}; + +pub const feature_exynosm1 = Feature{ + .name = "exynosm1", + .description = "Samsung Exynos-M1 processors", + .llvm_name = "exynosm1", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_slowPaired128, + &feature_useReciprocalSquareRoot, + &feature_force32bitJumpTables, + &feature_crc, + }, +}; + +pub const feature_exynosm2 = Feature{ + .name = "exynosm2", + .description = "Samsung Exynos-M2 processors", + .llvm_name = "exynosm2", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_slowPaired128, + &feature_force32bitJumpTables, + &feature_crc, + }, +}; + +pub const feature_exynosm3 = Feature{ + .name = "exynosm3", + .description = "Samsung Exynos-M3 processors", + .llvm_name = "exynosm3", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_fuseAddress, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_fuseLiterals, + &feature_force32bitJumpTables, + &feature_crc, + &feature_lslFast, + &feature_fuseCsel, + }, +}; + +pub const feature_exynosm4 = Feature{ + .name = "exynosm4", + .description = "Samsung Exynos-M4 processors", + .llvm_name = "exynosm4", + .subfeatures = &[_]*const Feature { + &feature_ccpp, + &feature_perfmon, + &feature_dotprod, + &feature_fuseArithLogic, + &feature_force32bitJumpTables, + &feature_lslFast, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_fuseAddress, + &feature_lse, + &feature_arithCbzFusion, + &feature_uaops, + &feature_fuseCsel, + &feature_vh, + &feature_rdm, + &feature_fpArmv8, + &feature_ras, + &feature_fuseLiterals, + &feature_crc, + &feature_usePostraScheduler, + &feature_arithBccFusion, + &feature_zczFp, + &feature_lor, + &feature_pan, + }, +}; + +pub const feature_falkor = Feature{ + .name = "falkor", + .description = "Qualcomm Falkor processors", + .llvm_name = "falkor", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_zczGp, + &feature_slowStrqroStore, + &feature_customCheapAsMove, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_crc, + &feature_lslFast, + }, +}; + +pub const feature_kryo = Feature{ + .name = "kryo", + .description = "Qualcomm Kryo processors", + .llvm_name = "kryo", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_crc, + &feature_lslFast, + }, +}; + +pub const feature_neoversee1 = Feature{ + .name = "neoversee1", + .description = "Neoverse E1 ARM processors", + .llvm_name = "neoversee1", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + }, +}; + +pub const feature_neoversen1 = Feature{ + .name = "neoversen1", + .description = "Neoverse N1 ARM processors", + .llvm_name = "neoversen1", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_spe, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + }, +}; + +pub const feature_saphira = Feature{ + .name = "saphira", + .description = "Qualcomm Saphira processors", + .llvm_name = "saphira", + .subfeatures = &[_]*const Feature { + &feature_am, + &feature_nv, + &feature_ccpp, + &feature_predictableSelectExpensive, + &feature_perfmon, + &feature_dotprod, + &feature_spe, + &feature_lslFast, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_lse, + &feature_rcpc, + &feature_uaops, + &feature_ccidx, + &feature_vh, + &feature_tracev84, + &feature_rdm, + &feature_fpArmv8, + &feature_dit, + &feature_mpam, + &feature_ras, + &feature_tlbRmi, + &feature_fmi, + &feature_crc, + &feature_usePostraScheduler, + &feature_pa, + &feature_zczFp, + &feature_sel2, + &feature_lor, + &feature_pan, + }, +}; + +pub const feature_tsv110 = Feature{ + .name = "tsv110", + .description = "HiSilicon TS-V110 processors", + .llvm_name = "tsv110", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_spe, + &feature_crc, + &feature_pan, + &feature_uaops, + &feature_vh, + }, +}; + +pub const feature_thunderx = Feature{ + .name = "thunderx", + .description = "Cavium ThunderX processors", + .llvm_name = "thunderx", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const feature_thunderx2t99 = Feature{ + .name = "thunderx2t99", + .description = "Cavium ThunderX2 processors", + .llvm_name = "thunderx2t99", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_arithBccFusion, + &feature_lse, + &feature_fpArmv8, + &feature_predictableSelectExpensive, + &feature_lor, + &feature_crc, + &feature_pan, + &feature_aggressiveFma, + &feature_vh, + }, +}; + +pub const feature_thunderxt81 = Feature{ + .name = "thunderxt81", + .description = "Cavium ThunderX processors", + .llvm_name = "thunderxt81", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const feature_thunderxt83 = Feature{ + .name = "thunderxt83", + .description = "Cavium ThunderX processors", + .llvm_name = "thunderxt83", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const feature_thunderxt88 = Feature{ + .name = "thunderxt88", + .description = "Cavium ThunderX processors", + .llvm_name = "thunderxt88", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const features = &[_]*const Feature { + &feature_aes, + &feature_am, + &feature_aggressiveFma, + &feature_altnzcv, + &feature_alternateSextloadCvtF32Pattern, + &feature_arithBccFusion, + &feature_arithCbzFusion, + &feature_balanceFpOps, + &feature_bti, + &feature_ccidx, + &feature_ccpp, + &feature_crc, + &feature_ccdp, + &feature_callSavedX8, + &feature_callSavedX9, + &feature_callSavedX10, + &feature_callSavedX11, + &feature_callSavedX12, + &feature_callSavedX13, + &feature_callSavedX14, + &feature_callSavedX15, + &feature_callSavedX18, + &feature_complxnum, + &feature_crypto, + &feature_customCheapAsMove, + &feature_dit, + &feature_disableLatencySchedHeuristic, + &feature_dotprod, + &feature_ete, + &feature_exynosCheapAsMove, + &feature_fmi, + &feature_fp16fml, + &feature_fpArmv8, + &feature_fptoint, + &feature_force32bitJumpTables, + &feature_fullfp16, + &feature_fuseAes, + &feature_fuseAddress, + &feature_fuseArithLogic, + &feature_fuseCsel, + &feature_fuseCryptoEor, + &feature_fuseLiterals, + &feature_jsconv, + &feature_lor, + &feature_lse, + &feature_lslFast, + &feature_mpam, + &feature_mte, + &feature_neon, + &feature_nv, + &feature_noNegImmediates, + &feature_pa, + &feature_pan, + &feature_panRwv, + &feature_perfmon, + &feature_usePostraScheduler, + &feature_predres, + &feature_predictableSelectExpensive, + &feature_uaops, + &feature_ras, + &feature_rasv8_4, + &feature_rcpc, + &feature_rcpcImmo, + &feature_rdm, + &feature_rand, + &feature_reserveX1, + &feature_reserveX2, + &feature_reserveX3, + &feature_reserveX4, + &feature_reserveX5, + &feature_reserveX6, + &feature_reserveX7, + &feature_reserveX9, + &feature_reserveX10, + &feature_reserveX11, + &feature_reserveX12, + &feature_reserveX13, + &feature_reserveX14, + &feature_reserveX15, + &feature_reserveX18, + &feature_reserveX20, + &feature_reserveX21, + &feature_reserveX22, + &feature_reserveX23, + &feature_reserveX24, + &feature_reserveX25, + &feature_reserveX26, + &feature_reserveX27, + &feature_reserveX28, + &feature_sb, + &feature_sel2, + &feature_sha2, + &feature_sha3, + &feature_sm4, + &feature_spe, + &feature_ssbs, + &feature_sve, + &feature_sve2, + &feature_sve2Aes, + &feature_sve2Bitperm, + &feature_sve2Sha3, + &feature_sve2Sm4, + &feature_slowMisaligned128store, + &feature_slowPaired128, + &feature_slowStrqroStore, + &feature_specrestrict, + &feature_strictAlign, + &feature_tlbRmi, + &feature_tme, + &feature_tracev84, + &feature_trbe, + &feature_taggedGlobals, + &feature_useAa, + &feature_tpidrEl1, + &feature_tpidrEl2, + &feature_tpidrEl3, + &feature_useReciprocalSquareRoot, + &feature_vh, + &feature_zcm, + &feature_zcz, + &feature_zczFp, + &feature_zczFpWorkaround, + &feature_zczGp, + &feature_v81a, + &feature_v82a, + &feature_v83a, + &feature_v84a, + &feature_v85a, + &feature_a35, + &feature_a53, + &feature_a55, + &feature_a57, + &feature_a65, + &feature_a72, + &feature_a73, + &feature_a75, + &feature_a76, + &feature_cyclone, + &feature_exynosm1, + &feature_exynosm2, + &feature_exynosm3, + &feature_exynosm4, + &feature_falkor, + &feature_kryo, + &feature_neoversee1, + &feature_neoversen1, + &feature_saphira, + &feature_tsv110, + &feature_thunderx, + &feature_thunderx2t99, + &feature_thunderxt81, + &feature_thunderxt83, + &feature_thunderxt88, +}; + +pub const cpu_appleLatest = Cpu{ + .name = "apple-latest", + .llvm_name = "apple-latest", + .subfeatures = &[_]*const Feature { + &feature_zczGp, + &feature_arithBccFusion, + &feature_fuseAes, + &feature_zczFp, + &feature_zczFpWorkaround, + &feature_fpArmv8, + &feature_perfmon, + &feature_disableLatencySchedHeuristic, + &feature_zcm, + &feature_arithCbzFusion, + &feature_fuseCryptoEor, + &feature_alternateSextloadCvtF32Pattern, + &feature_cyclone, + }, +}; + +pub const cpu_cortexA35 = Cpu{ + .name = "cortex-a35", + .llvm_name = "cortex-a35", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_a35, + }, +}; + +pub const cpu_cortexA53 = Cpu{ + .name = "cortex-a53", + .llvm_name = "cortex-a53", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_fpArmv8, + &feature_perfmon, + &feature_useAa, + &feature_crc, + &feature_a53, + }, +}; + +pub const cpu_cortexA55 = Cpu{ + .name = "cortex-a55", + .llvm_name = "cortex-a55", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_a55, + }, +}; + +pub const cpu_cortexA57 = Cpu{ + .name = "cortex-a57", + .llvm_name = "cortex-a57", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_fuseLiterals, + &feature_crc, + &feature_a57, + }, +}; + +pub const cpu_cortexA65 = Cpu{ + .name = "cortex-a65", + .llvm_name = "cortex-a65", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_a65, + }, +}; + +pub const cpu_cortexA65ae = Cpu{ + .name = "cortex-a65ae", + .llvm_name = "cortex-a65ae", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_a65, + }, +}; + +pub const cpu_cortexA72 = Cpu{ + .name = "cortex-a72", + .llvm_name = "cortex-a72", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_fuseAes, + &feature_a72, + }, +}; + +pub const cpu_cortexA73 = Cpu{ + .name = "cortex-a73", + .llvm_name = "cortex-a73", + .subfeatures = &[_]*const Feature { + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_fuseAes, + &feature_a73, + }, +}; + +pub const cpu_cortexA75 = Cpu{ + .name = "cortex-a75", + .llvm_name = "cortex-a75", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_a75, + }, +}; + +pub const cpu_cortexA76 = Cpu{ + .name = "cortex-a76", + .llvm_name = "cortex-a76", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_a76, + }, +}; + +pub const cpu_cortexA76ae = Cpu{ + .name = "cortex-a76ae", + .llvm_name = "cortex-a76ae", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_a76, + }, +}; + +pub const cpu_cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .subfeatures = &[_]*const Feature { + &feature_zczGp, + &feature_arithBccFusion, + &feature_fuseAes, + &feature_zczFp, + &feature_zczFpWorkaround, + &feature_fpArmv8, + &feature_perfmon, + &feature_disableLatencySchedHeuristic, + &feature_zcm, + &feature_arithCbzFusion, + &feature_fuseCryptoEor, + &feature_alternateSextloadCvtF32Pattern, + &feature_cyclone, + }, +}; + +pub const cpu_exynosM1 = Cpu{ + .name = "exynos-m1", + .llvm_name = "exynos-m1", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_slowPaired128, + &feature_useReciprocalSquareRoot, + &feature_force32bitJumpTables, + &feature_crc, + &feature_exynosm1, + }, +}; + +pub const cpu_exynosM2 = Cpu{ + .name = "exynos-m2", + .llvm_name = "exynos-m2", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_slowPaired128, + &feature_force32bitJumpTables, + &feature_crc, + &feature_exynosm2, + }, +}; + +pub const cpu_exynosM3 = Cpu{ + .name = "exynos-m3", + .llvm_name = "exynos-m3", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_fuseAddress, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_fuseLiterals, + &feature_force32bitJumpTables, + &feature_crc, + &feature_lslFast, + &feature_fuseCsel, + &feature_exynosm3, + }, +}; + +pub const cpu_exynosM4 = Cpu{ + .name = "exynos-m4", + .llvm_name = "exynos-m4", + .subfeatures = &[_]*const Feature { + &feature_ccpp, + &feature_perfmon, + &feature_dotprod, + &feature_fuseArithLogic, + &feature_force32bitJumpTables, + &feature_lslFast, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_fuseAddress, + &feature_lse, + &feature_arithCbzFusion, + &feature_uaops, + &feature_fuseCsel, + &feature_vh, + &feature_rdm, + &feature_fpArmv8, + &feature_ras, + &feature_fuseLiterals, + &feature_crc, + &feature_usePostraScheduler, + &feature_arithBccFusion, + &feature_zczFp, + &feature_lor, + &feature_pan, + &feature_exynosm4, + }, +}; + +pub const cpu_exynosM5 = Cpu{ + .name = "exynos-m5", + .llvm_name = "exynos-m5", + .subfeatures = &[_]*const Feature { + &feature_ccpp, + &feature_perfmon, + &feature_dotprod, + &feature_fuseArithLogic, + &feature_force32bitJumpTables, + &feature_lslFast, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_fuseAddress, + &feature_lse, + &feature_arithCbzFusion, + &feature_uaops, + &feature_fuseCsel, + &feature_vh, + &feature_rdm, + &feature_fpArmv8, + &feature_ras, + &feature_fuseLiterals, + &feature_crc, + &feature_usePostraScheduler, + &feature_arithBccFusion, + &feature_zczFp, + &feature_lor, + &feature_pan, + &feature_exynosm4, + }, +}; + +pub const cpu_falkor = Cpu{ + .name = "falkor", + .llvm_name = "falkor", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_zczGp, + &feature_slowStrqroStore, + &feature_customCheapAsMove, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_crc, + &feature_lslFast, + &feature_falkor, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + &feature_trbe, + &feature_ete, + &feature_fpArmv8, + &feature_fuseAes, + &feature_neon, + &feature_perfmon, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_zczFp, + &feature_fpArmv8, + &feature_perfmon, + &feature_predictableSelectExpensive, + &feature_crc, + &feature_lslFast, + &feature_kryo, + }, +}; + +pub const cpu_neoverseE1 = Cpu{ + .name = "neoverse-e1", + .llvm_name = "neoverse-e1", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_neoversee1, + }, +}; + +pub const cpu_neoverseN1 = Cpu{ + .name = "neoverse-n1", + .llvm_name = "neoverse-n1", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_spe, + &feature_pan, + &feature_crc, + &feature_rcpc, + &feature_uaops, + &feature_vh, + &feature_ssbs, + &feature_neoversen1, + }, +}; + +pub const cpu_saphira = Cpu{ + .name = "saphira", + .llvm_name = "saphira", + .subfeatures = &[_]*const Feature { + &feature_am, + &feature_nv, + &feature_ccpp, + &feature_predictableSelectExpensive, + &feature_perfmon, + &feature_dotprod, + &feature_spe, + &feature_lslFast, + &feature_zczGp, + &feature_customCheapAsMove, + &feature_lse, + &feature_rcpc, + &feature_uaops, + &feature_ccidx, + &feature_vh, + &feature_tracev84, + &feature_rdm, + &feature_fpArmv8, + &feature_dit, + &feature_mpam, + &feature_ras, + &feature_tlbRmi, + &feature_fmi, + &feature_crc, + &feature_usePostraScheduler, + &feature_pa, + &feature_zczFp, + &feature_sel2, + &feature_lor, + &feature_pan, + &feature_saphira, + }, +}; + +pub const cpu_thunderx = Cpu{ + .name = "thunderx", + .llvm_name = "thunderx", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_thunderx, + }, +}; + +pub const cpu_thunderx2t99 = Cpu{ + .name = "thunderx2t99", + .llvm_name = "thunderx2t99", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_arithBccFusion, + &feature_lse, + &feature_fpArmv8, + &feature_predictableSelectExpensive, + &feature_lor, + &feature_crc, + &feature_pan, + &feature_aggressiveFma, + &feature_vh, + &feature_thunderx2t99, + }, +}; + +pub const cpu_thunderxt81 = Cpu{ + .name = "thunderxt81", + .llvm_name = "thunderxt81", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_thunderxt81, + }, +}; + +pub const cpu_thunderxt83 = Cpu{ + .name = "thunderxt83", + .llvm_name = "thunderxt83", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_thunderxt83, + }, +}; + +pub const cpu_thunderxt88 = Cpu{ + .name = "thunderxt88", + .llvm_name = "thunderxt88", + .subfeatures = &[_]*const Feature { + &feature_usePostraScheduler, + &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + &feature_thunderxt88, + }, +}; + +pub const cpu_tsv110 = Cpu{ + .name = "tsv110", + .llvm_name = "tsv110", + .subfeatures = &[_]*const Feature { + &feature_rdm, + &feature_usePostraScheduler, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, + &feature_perfmon, + &feature_ras, + &feature_dotprod, + &feature_lor, + &feature_spe, + &feature_crc, + &feature_pan, + &feature_uaops, + &feature_vh, + &feature_tsv110, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_appleLatest, + &cpu_cortexA35, + &cpu_cortexA53, + &cpu_cortexA55, + &cpu_cortexA57, + &cpu_cortexA65, + &cpu_cortexA65ae, + &cpu_cortexA72, + &cpu_cortexA73, + &cpu_cortexA75, + &cpu_cortexA76, + &cpu_cortexA76ae, + &cpu_cyclone, + &cpu_exynosM1, + &cpu_exynosM2, + &cpu_exynosM3, + &cpu_exynosM4, + &cpu_exynosM5, + &cpu_falkor, + &cpu_generic, + &cpu_kryo, + &cpu_neoverseE1, + &cpu_neoverseN1, + &cpu_saphira, + &cpu_thunderx, + &cpu_thunderx2t99, + &cpu_thunderxt81, + &cpu_thunderxt83, + &cpu_thunderxt88, + &cpu_tsv110, +}; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig new file mode 100644 index 0000000000000000000000000000000000000000..80563b4d02a289ab8c9f34805d99e714dedce379 --- /dev/null +++ b/lib/std/target/amdgpu.zig @@ -0,0 +1,2329 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_BitInsts16 = Feature{ + .name = "16-bit-insts", + .description = "Has i16/f16 instructions", + .llvm_name = "16-bit-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_addNoCarryInsts = Feature{ + .name = "add-no-carry-insts", + .description = "Have VALU add/sub instructions without carry out", + .llvm_name = "add-no-carry-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_apertureRegs = Feature{ + .name = "aperture-regs", + .description = "Has Memory Aperture Base and Size Registers", + .llvm_name = "aperture-regs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_atomicFaddInsts = Feature{ + .name = "atomic-fadd-insts", + .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", + .llvm_name = "atomic-fadd-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_autoWaitcntBeforeBarrier = Feature{ + .name = "auto-waitcnt-before-barrier", + .description = "Hardware automatically inserts waitcnt before barrier", + .llvm_name = "auto-waitcnt-before-barrier", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ciInsts = Feature{ + .name = "ci-insts", + .description = "Additional instructions for CI+", + .llvm_name = "ci-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_codeObjectV3 = Feature{ + .name = "code-object-v3", + .description = "Generate code object version 3", + .llvm_name = "code-object-v3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cumode = Feature{ + .name = "cumode", + .description = "Enable CU wavefront execution mode", + .llvm_name = "cumode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dlInsts = Feature{ + .name = "dl-insts", + .description = "Has v_fmac_f32 and v_xnor_b32 instructions", + .llvm_name = "dl-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dpp = Feature{ + .name = "dpp", + .description = "Support DPP (Data Parallel Primitives) extension", + .llvm_name = "dpp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dpp8 = Feature{ + .name = "dpp8", + .description = "Support DPP8 (Data Parallel Primitives) extension", + .llvm_name = "dpp8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noSramEccSupport = Feature{ + .name = "no-sram-ecc-support", + .description = "Hardware does not support SRAM ECC", + .llvm_name = "no-sram-ecc-support", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noXnackSupport = Feature{ + .name = "no-xnack-support", + .description = "Hardware does not support XNACK", + .llvm_name = "no-xnack-support", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot1Insts = Feature{ + .name = "dot1-insts", + .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", + .llvm_name = "dot1-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot2Insts = Feature{ + .name = "dot2-insts", + .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", + .llvm_name = "dot2-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot3Insts = Feature{ + .name = "dot3-insts", + .description = "Has v_dot8c_i32_i4 instruction", + .llvm_name = "dot3-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot4Insts = Feature{ + .name = "dot4-insts", + .description = "Has v_dot2c_i32_i16 instruction", + .llvm_name = "dot4-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot5Insts = Feature{ + .name = "dot5-insts", + .description = "Has v_dot2c_f32_f16 instruction", + .llvm_name = "dot5-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dot6Insts = Feature{ + .name = "dot6-insts", + .description = "Has v_dot4c_i32_i8 instruction", + .llvm_name = "dot6-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_DumpCode = Feature{ + .name = "DumpCode", + .description = "Dump MachineInstrs in the CodeEmitter", + .llvm_name = "DumpCode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dumpcode = Feature{ + .name = "dumpcode", + .description = "Dump MachineInstrs in the CodeEmitter", + .llvm_name = "dumpcode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_enableDs128 = Feature{ + .name = "enable-ds128", + .description = "Use ds_{read|write}_b128", + .llvm_name = "enable-ds128", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOpt = Feature{ + .name = "load-store-opt", + .description = "Enable SI load/store optimizer pass", + .llvm_name = "load-store-opt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_enablePrtStrictNull = Feature{ + .name = "enable-prt-strict-null", + .description = "Enable zeroing of result registers for sparse texture fetches", + .llvm_name = "enable-prt-strict-null", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_siScheduler = Feature{ + .name = "si-scheduler", + .description = "Enable SI Machine Scheduler", + .llvm_name = "si-scheduler", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_unsafeDsOffsetFolding = Feature{ + .name = "unsafe-ds-offset-folding", + .description = "Force using DS instruction immediate offsets on SI", + .llvm_name = "unsafe-ds-offset-folding", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fmaf = Feature{ + .name = "fmaf", + .description = "Enable single precision FMA (not as fast as mul+add, but fused)", + .llvm_name = "fmaf", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp16Denormals = Feature{ + .name = "fp16-denormals", + .description = "Enable half precision denormal handling", + .llvm_name = "fp16-denormals", + .subfeatures = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fp32Denormals = Feature{ + .name = "fp32-denormals", + .description = "Enable single precision denormal handling", + .llvm_name = "fp32-denormals", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .description = "Enable double precision operations", + .llvm_name = "fp64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp64Denormals = Feature{ + .name = "fp64-denormals", + .description = "Enable double and half precision denormal handling", + .llvm_name = "fp64-denormals", + .subfeatures = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fp64Fp16Denormals = Feature{ + .name = "fp64-fp16-denormals", + .description = "Enable double and half precision denormal handling", + .llvm_name = "fp64-fp16-denormals", + .subfeatures = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fpExceptions = Feature{ + .name = "fp-exceptions", + .description = "Enable floating point exceptions", + .llvm_name = "fp-exceptions", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastFmaf = Feature{ + .name = "fast-fmaf", + .description = "Assuming f32 fma is at least as fast as mul + add", + .llvm_name = "fast-fmaf", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatAddressSpace = Feature{ + .name = "flat-address-space", + .description = "Support flat address space", + .llvm_name = "flat-address-space", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatForGlobal = Feature{ + .name = "flat-for-global", + .description = "Force to generate flat instruction for global", + .llvm_name = "flat-for-global", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatGlobalInsts = Feature{ + .name = "flat-global-insts", + .description = "Have global_* flat memory instructions", + .llvm_name = "flat-global-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatInstOffsets = Feature{ + .name = "flat-inst-offsets", + .description = "Flat instructions have immediate offset addressing mode", + .llvm_name = "flat-inst-offsets", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatScratchInsts = Feature{ + .name = "flat-scratch-insts", + .description = "Have scratch_* flat memory instructions", + .llvm_name = "flat-scratch-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_flatSegmentOffsetBug = Feature{ + .name = "flat-segment-offset-bug", + .description = "GFX10 bug, inst_offset ignored in flat segment", + .llvm_name = "flat-segment-offset-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fmaMixInsts = Feature{ + .name = "fma-mix-insts", + .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", + .llvm_name = "fma-mix-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gcn3Encoding = Feature{ + .name = "gcn3-encoding", + .description = "Encoding format for VI", + .llvm_name = "gcn3-encoding", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gfx7Gfx8Gfx9Insts = Feature{ + .name = "gfx7-gfx8-gfx9-insts", + .description = "Instructions shared in GFX7, GFX8, GFX9", + .llvm_name = "gfx7-gfx8-gfx9-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gfx8Insts = Feature{ + .name = "gfx8-insts", + .description = "Additional instructions for GFX8+", + .llvm_name = "gfx8-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gfx9 = Feature{ + .name = "gfx9", + .description = "GFX9 GPU generation", + .llvm_name = "gfx9", + .subfeatures = &[_]*const Feature { + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + }, +}; + +pub const feature_gfx9Insts = Feature{ + .name = "gfx9-insts", + .description = "Additional instructions for GFX9+", + .llvm_name = "gfx9-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gfx10 = Feature{ + .name = "gfx10", + .description = "GFX10 GPU generation", + .llvm_name = "gfx10", + .subfeatures = &[_]*const Feature { + &feature_movrel, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_noSdstCmpx, + &feature_fmaMixInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_vscnt, + &feature_noDataDepHazard, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_dpp8, + &feature_BitInsts16, + &feature_registerBanking, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_gfx10Insts, + }, +}; + +pub const feature_gfx10Insts = Feature{ + .name = "gfx10-insts", + .description = "Additional instructions for GFX10+", + .llvm_name = "gfx10-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_instFwdPrefetchBug = Feature{ + .name = "inst-fwd-prefetch-bug", + .description = "S_INST_PREFETCH instruction causes shader to hang", + .llvm_name = "inst-fwd-prefetch-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_intClampInsts = Feature{ + .name = "int-clamp-insts", + .description = "Support clamp for integer destination", + .llvm_name = "int-clamp-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_inv2piInlineImm = Feature{ + .name = "inv-2pi-inline-imm", + .description = "Has 1 / (2 * pi) as inline immediate", + .llvm_name = "inv-2pi-inline-imm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ldsbankcount16 = Feature{ + .name = "ldsbankcount16", + .description = "The number of LDS banks per compute unit.", + .llvm_name = "ldsbankcount16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ldsbankcount32 = Feature{ + .name = "ldsbankcount32", + .description = "The number of LDS banks per compute unit.", + .llvm_name = "ldsbankcount32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ldsBranchVmemWarHazard = Feature{ + .name = "lds-branch-vmem-war-hazard", + .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", + .llvm_name = "lds-branch-vmem-war-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ldsMisalignedBug = Feature{ + .name = "lds-misaligned-bug", + .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", + .llvm_name = "lds-misaligned-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize0 = Feature{ + .name = "localmemorysize0", + .description = "The size of local memory in bytes", + .llvm_name = "localmemorysize0", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize32768 = Feature{ + .name = "localmemorysize32768", + .description = "The size of local memory in bytes", + .llvm_name = "localmemorysize32768", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize65536 = Feature{ + .name = "localmemorysize65536", + .description = "The size of local memory in bytes", + .llvm_name = "localmemorysize65536", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_maiInsts = Feature{ + .name = "mai-insts", + .description = "Has mAI instructions", + .llvm_name = "mai-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mfmaInlineLiteralBug = Feature{ + .name = "mfma-inline-literal-bug", + .description = "MFMA cannot use inline literal as SrcC", + .llvm_name = "mfma-inline-literal-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mimgR128 = Feature{ + .name = "mimg-r128", + .description = "Support 128-bit texture resources", + .llvm_name = "mimg-r128", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_madMixInsts = Feature{ + .name = "mad-mix-insts", + .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", + .llvm_name = "mad-mix-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize4 = Feature{ + .name = "max-private-element-size-4", + .description = "Maximum private access size may be 4", + .llvm_name = "max-private-element-size-4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize8 = Feature{ + .name = "max-private-element-size-8", + .description = "Maximum private access size may be 8", + .llvm_name = "max-private-element-size-8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize16 = Feature{ + .name = "max-private-element-size-16", + .description = "Maximum private access size may be 16", + .llvm_name = "max-private-element-size-16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_movrel = Feature{ + .name = "movrel", + .description = "Has v_movrel*_b32 instructions", + .llvm_name = "movrel", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nsaEncoding = Feature{ + .name = "nsa-encoding", + .description = "Support NSA encoding for image instructions", + .llvm_name = "nsa-encoding", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nsaToVmemBug = Feature{ + .name = "nsa-to-vmem-bug", + .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", + .llvm_name = "nsa-to-vmem-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noDataDepHazard = Feature{ + .name = "no-data-dep-hazard", + .description = "Does not need SW waitstates", + .llvm_name = "no-data-dep-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noSdstCmpx = Feature{ + .name = "no-sdst-cmpx", + .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", + .llvm_name = "no-sdst-cmpx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_offset3fBug = Feature{ + .name = "offset-3f-bug", + .description = "Branch offset of 3f hardware bug", + .llvm_name = "offset-3f-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_pkFmacF16Inst = Feature{ + .name = "pk-fmac-f16-inst", + .description = "Has v_pk_fmac_f16 instruction", + .llvm_name = "pk-fmac-f16-inst", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_promoteAlloca = Feature{ + .name = "promote-alloca", + .description = "Enable promote alloca pass", + .llvm_name = "promote-alloca", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_r128A16 = Feature{ + .name = "r128-a16", + .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", + .llvm_name = "r128-a16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_registerBanking = Feature{ + .name = "register-banking", + .description = "Has register banking", + .llvm_name = "register-banking", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwa = Feature{ + .name = "sdwa", + .description = "Support SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwaMav = Feature{ + .name = "sdwa-mav", + .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa-mav", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwaOmod = Feature{ + .name = "sdwa-omod", + .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa-omod", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwaOutModsVopc = Feature{ + .name = "sdwa-out-mods-vopc", + .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa-out-mods-vopc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwaScalar = Feature{ + .name = "sdwa-scalar", + .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa-scalar", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sdwaSdst = Feature{ + .name = "sdwa-sdst", + .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", + .llvm_name = "sdwa-sdst", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sgprInitBug = Feature{ + .name = "sgpr-init-bug", + .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", + .llvm_name = "sgpr-init-bug", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_smemToVectorWriteHazard = Feature{ + .name = "smem-to-vector-write-hazard", + .description = "s_load_dword followed by v_cmp page faults", + .llvm_name = "smem-to-vector-write-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sMemrealtime = Feature{ + .name = "s-memrealtime", + .description = "Has s_memrealtime instruction", + .llvm_name = "s-memrealtime", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sramEcc = Feature{ + .name = "sram-ecc", + .description = "Enable SRAM ECC", + .llvm_name = "sram-ecc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_scalarAtomics = Feature{ + .name = "scalar-atomics", + .description = "Has atomic scalar memory instructions", + .llvm_name = "scalar-atomics", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_scalarFlatScratchInsts = Feature{ + .name = "scalar-flat-scratch-insts", + .description = "Have s_scratch_* flat memory instructions", + .llvm_name = "scalar-flat-scratch-insts", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_scalarStores = Feature{ + .name = "scalar-stores", + .description = "Has store scalar memory instructions", + .llvm_name = "scalar-stores", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_seaIslands = Feature{ + .name = "sea-islands", + .description = "SEA_ISLANDS GPU generation", + .llvm_name = "sea-islands", + .subfeatures = &[_]*const Feature { + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + }, +}; + +pub const feature_southernIslands = Feature{ + .name = "southern-islands", + .description = "SOUTHERN_ISLANDS GPU generation", + .llvm_name = "southern-islands", + .subfeatures = &[_]*const Feature { + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_ldsbankcount32, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_fp64, + }, +}; + +pub const feature_trapHandler = Feature{ + .name = "trap-handler", + .description = "Trap handler support", + .llvm_name = "trap-handler", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_trigReducedRange = Feature{ + .name = "trig-reduced-range", + .description = "Requires use of fract on arguments to trig instructions", + .llvm_name = "trig-reduced-range", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_unalignedBufferAccess = Feature{ + .name = "unaligned-buffer-access", + .description = "Support unaligned global loads and stores", + .llvm_name = "unaligned-buffer-access", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_unalignedScratchAccess = Feature{ + .name = "unaligned-scratch-access", + .description = "Support unaligned scratch loads and stores", + .llvm_name = "unaligned-scratch-access", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_unpackedD16Vmem = Feature{ + .name = "unpacked-d16-vmem", + .description = "Has unpacked d16 vmem instructions", + .llvm_name = "unpacked-d16-vmem", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vgprIndexMode = Feature{ + .name = "vgpr-index-mode", + .description = "Has VGPR mode register indexing", + .llvm_name = "vgpr-index-mode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vmemToScalarWriteHazard = Feature{ + .name = "vmem-to-scalar-write-hazard", + .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", + .llvm_name = "vmem-to-scalar-write-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vop3Literal = Feature{ + .name = "vop3-literal", + .description = "Can use one literal in VOP3", + .llvm_name = "vop3-literal", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vop3p = Feature{ + .name = "vop3p", + .description = "Has VOP3P packed instructions", + .llvm_name = "vop3p", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vcmpxExecWarHazard = Feature{ + .name = "vcmpx-exec-war-hazard", + .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", + .llvm_name = "vcmpx-exec-war-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vcmpxPermlaneHazard = Feature{ + .name = "vcmpx-permlane-hazard", + .description = "TODO: describe me", + .llvm_name = "vcmpx-permlane-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_volcanicIslands = Feature{ + .name = "volcanic-islands", + .description = "VOLCANIC_ISLANDS GPU generation", + .llvm_name = "volcanic-islands", + .subfeatures = &[_]*const Feature { + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + }, +}; + +pub const feature_vscnt = Feature{ + .name = "vscnt", + .description = "Has separate store vscnt counter", + .llvm_name = "vscnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize16 = Feature{ + .name = "wavefrontsize16", + .description = "The number of threads per wavefront", + .llvm_name = "wavefrontsize16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize32 = Feature{ + .name = "wavefrontsize32", + .description = "The number of threads per wavefront", + .llvm_name = "wavefrontsize32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize64 = Feature{ + .name = "wavefrontsize64", + .description = "The number of threads per wavefront", + .llvm_name = "wavefrontsize64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xnack = Feature{ + .name = "xnack", + .description = "Enable XNACK support", + .llvm_name = "xnack", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_halfRate64Ops = Feature{ + .name = "half-rate-64-ops", + .description = "Most fp64 instructions are half rate instead of quarter", + .llvm_name = "half-rate-64-ops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_BitInsts16, + &feature_addNoCarryInsts, + &feature_apertureRegs, + &feature_atomicFaddInsts, + &feature_autoWaitcntBeforeBarrier, + &feature_ciInsts, + &feature_codeObjectV3, + &feature_cumode, + &feature_dlInsts, + &feature_dpp, + &feature_dpp8, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot3Insts, + &feature_dot4Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_DumpCode, + &feature_dumpcode, + &feature_enableDs128, + &feature_loadStoreOpt, + &feature_enablePrtStrictNull, + &feature_siScheduler, + &feature_unsafeDsOffsetFolding, + &feature_fmaf, + &feature_fp16Denormals, + &feature_fp32Denormals, + &feature_fp64, + &feature_fp64Denormals, + &feature_fp64Fp16Denormals, + &feature_fpExceptions, + &feature_fastFmaf, + &feature_flatAddressSpace, + &feature_flatForGlobal, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_flatScratchInsts, + &feature_flatSegmentOffsetBug, + &feature_fmaMixInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_gfx8Insts, + &feature_gfx9, + &feature_gfx9Insts, + &feature_gfx10, + &feature_gfx10Insts, + &feature_instFwdPrefetchBug, + &feature_intClampInsts, + &feature_inv2piInlineImm, + &feature_ldsbankcount16, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_localmemorysize0, + &feature_localmemorysize32768, + &feature_localmemorysize65536, + &feature_maiInsts, + &feature_mfmaInlineLiteralBug, + &feature_mimgR128, + &feature_madMixInsts, + &feature_maxPrivateElementSize4, + &feature_maxPrivateElementSize8, + &feature_maxPrivateElementSize16, + &feature_movrel, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_noDataDepHazard, + &feature_noSdstCmpx, + &feature_offset3fBug, + &feature_pkFmacF16Inst, + &feature_promoteAlloca, + &feature_r128A16, + &feature_registerBanking, + &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOmod, + &feature_sdwaOutModsVopc, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_sgprInitBug, + &feature_smemToVectorWriteHazard, + &feature_sMemrealtime, + &feature_sramEcc, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_seaIslands, + &feature_southernIslands, + &feature_trapHandler, + &feature_trigReducedRange, + &feature_unalignedBufferAccess, + &feature_unalignedScratchAccess, + &feature_unpackedD16Vmem, + &feature_vgprIndexMode, + &feature_vmemToScalarWriteHazard, + &feature_vop3Literal, + &feature_vop3p, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_volcanicIslands, + &feature_vscnt, + &feature_wavefrontsize16, + &feature_wavefrontsize32, + &feature_wavefrontsize64, + &feature_xnack, + &feature_halfRate64Ops, +}; + +pub const cpu_bonaire = Cpu{ + .name = "bonaire", + .llvm_name = "bonaire", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_carrizo = Cpu{ + .name = "carrizo", + .llvm_name = "carrizo", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + &feature_xnack, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_fiji = Cpu{ + .name = "fiji", + .llvm_name = "fiji", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + &feature_wavefrontsize64, + }, +}; + +pub const cpu_genericHsa = Cpu{ + .name = "generic-hsa", + .llvm_name = "generic-hsa", + .subfeatures = &[_]*const Feature { + &feature_flatAddressSpace, + &feature_wavefrontsize64, + }, +}; + +pub const cpu_gfx1010 = Cpu{ + .name = "gfx1010", + .llvm_name = "gfx1010", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_flatSegmentOffsetBug, + &feature_movrel, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_noSdstCmpx, + &feature_fmaMixInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_vscnt, + &feature_noDataDepHazard, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_dpp8, + &feature_BitInsts16, + &feature_registerBanking, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_gfx10Insts, + &feature_gfx10, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx1011 = Cpu{ + .name = "gfx1011", + .llvm_name = "gfx1011", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_flatSegmentOffsetBug, + &feature_movrel, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_noSdstCmpx, + &feature_fmaMixInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_vscnt, + &feature_noDataDepHazard, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_dpp8, + &feature_BitInsts16, + &feature_registerBanking, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_gfx10Insts, + &feature_gfx10, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx1012 = Cpu{ + .name = "gfx1012", + .llvm_name = "gfx1012", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_flatSegmentOffsetBug, + &feature_movrel, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_noSdstCmpx, + &feature_fmaMixInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_vscnt, + &feature_noDataDepHazard, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_dpp8, + &feature_BitInsts16, + &feature_registerBanking, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_gfx10Insts, + &feature_gfx10, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx600 = Cpu{ + .name = "gfx600", + .llvm_name = "gfx600", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx601 = Cpu{ + .name = "gfx601", + .llvm_name = "gfx601", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + }, +}; + +pub const cpu_gfx700 = Cpu{ + .name = "gfx700", + .llvm_name = "gfx700", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_gfx701 = Cpu{ + .name = "gfx701", + .llvm_name = "gfx701", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx702 = Cpu{ + .name = "gfx702", + .llvm_name = "gfx702", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount16, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_gfx703 = Cpu{ + .name = "gfx703", + .llvm_name = "gfx703", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_gfx704 = Cpu{ + .name = "gfx704", + .llvm_name = "gfx704", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_gfx801 = Cpu{ + .name = "gfx801", + .llvm_name = "gfx801", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + &feature_xnack, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx802 = Cpu{ + .name = "gfx802", + .llvm_name = "gfx802", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_gfx803 = Cpu{ + .name = "gfx803", + .llvm_name = "gfx803", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_gfx810 = Cpu{ + .name = "gfx810", + .llvm_name = "gfx810", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_ldsbankcount16, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + &feature_xnack, + }, +}; + +pub const cpu_gfx900 = Cpu{ + .name = "gfx900", + .llvm_name = "gfx900", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + &feature_madMixInsts, + }, +}; + +pub const cpu_gfx902 = Cpu{ + .name = "gfx902", + .llvm_name = "gfx902", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + &feature_madMixInsts, + &feature_xnack, + }, +}; + +pub const cpu_gfx904 = Cpu{ + .name = "gfx904", + .llvm_name = "gfx904", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_fmaMixInsts, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + }, +}; + +pub const cpu_gfx906 = Cpu{ + .name = "gfx906", + .llvm_name = "gfx906", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_fmaMixInsts, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx908 = Cpu{ + .name = "gfx908", + .llvm_name = "gfx908", + .subfeatures = &[_]*const Feature { + &feature_atomicFaddInsts, + &feature_codeObjectV3, + &feature_dlInsts, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot3Insts, + &feature_dot4Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_fmaMixInsts, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + &feature_maiInsts, + &feature_mfmaInlineLiteralBug, + &feature_pkFmacF16Inst, + &feature_sramEcc, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx909 = Cpu{ + .name = "gfx909", + .llvm_name = "gfx909", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_gfx9Insts, + &feature_ciInsts, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_flatScratchInsts, + &feature_r128A16, + &feature_flatAddressSpace, + &feature_dpp, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_scalarAtomics, + &feature_flatInstOffsets, + &feature_gfx7Gfx8Gfx9Insts, + &feature_vop3p, + &feature_sMemrealtime, + &feature_intClampInsts, + &feature_fastFmaf, + &feature_sdwaOmod, + &feature_gfx9, + &feature_ldsbankcount32, + &feature_madMixInsts, + &feature_xnack, + }, +}; + +pub const cpu_hainan = Cpu{ + .name = "hainan", + .llvm_name = "hainan", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + }, +}; + +pub const cpu_hawaii = Cpu{ + .name = "hawaii", + .llvm_name = "hawaii", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_iceland = Cpu{ + .name = "iceland", + .llvm_name = "iceland", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_kabini = Cpu{ + .name = "kabini", + .llvm_name = "kabini", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_kaveri = Cpu{ + .name = "kaveri", + .llvm_name = "kaveri", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_mullins = Cpu{ + .name = "mullins", + .llvm_name = "mullins", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_localmemorysize65536, + &feature_movrel, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_fp64, + &feature_seaIslands, + }, +}; + +pub const cpu_oland = Cpu{ + .name = "oland", + .llvm_name = "oland", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + }, +}; + +pub const cpu_pitcairn = Cpu{ + .name = "pitcairn", + .llvm_name = "pitcairn", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + }, +}; + +pub const cpu_polaris10 = Cpu{ + .name = "polaris10", + .llvm_name = "polaris10", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_polaris11 = Cpu{ + .name = "polaris11", + .llvm_name = "polaris11", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_stoney = Cpu{ + .name = "stoney", + .llvm_name = "stoney", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_ldsbankcount16, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + &feature_xnack, + }, +}; + +pub const cpu_tahiti = Cpu{ + .name = "tahiti", + .llvm_name = "tahiti", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_tonga = Cpu{ + .name = "tonga", + .llvm_name = "tonga", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_movrel, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_fp64, + &feature_BitInsts16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_wavefrontsize64, + &feature_gfx8Insts, + &feature_gfx7Gfx8Gfx9Insts, + &feature_mimgR128, + &feature_intClampInsts, + &feature_sMemrealtime, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, + &feature_volcanicIslands, + }, +}; + +pub const cpu_verde = Cpu{ + .name = "verde", + .llvm_name = "verde", + .subfeatures = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_mimgR128, + &feature_movrel, + &feature_localmemorysize32768, + &feature_trigReducedRange, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, + &feature_southernIslands, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_bonaire, + &cpu_carrizo, + &cpu_fiji, + &cpu_generic, + &cpu_genericHsa, + &cpu_gfx1010, + &cpu_gfx1011, + &cpu_gfx1012, + &cpu_gfx600, + &cpu_gfx601, + &cpu_gfx700, + &cpu_gfx701, + &cpu_gfx702, + &cpu_gfx703, + &cpu_gfx704, + &cpu_gfx801, + &cpu_gfx802, + &cpu_gfx803, + &cpu_gfx810, + &cpu_gfx900, + &cpu_gfx902, + &cpu_gfx904, + &cpu_gfx906, + &cpu_gfx908, + &cpu_gfx909, + &cpu_hainan, + &cpu_hawaii, + &cpu_iceland, + &cpu_kabini, + &cpu_kaveri, + &cpu_mullins, + &cpu_oland, + &cpu_pitcairn, + &cpu_polaris10, + &cpu_polaris11, + &cpu_stoney, + &cpu_tahiti, + &cpu_tonga, + &cpu_verde, +}; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig new file mode 100644 index 0000000000000000000000000000000000000000..e45f0170cffcf1d8570b360c155b3fdd51ab32fd --- /dev/null +++ b/lib/std/target/arm.zig @@ -0,0 +1,3595 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_armv2 = Feature{ + .name = "armv2", + .description = "ARMv2 architecture", + .llvm_name = "armv2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_armv2a = Feature{ + .name = "armv2a", + .description = "ARMv2a architecture", + .llvm_name = "armv2a", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_armv3 = Feature{ + .name = "armv3", + .description = "ARMv3 architecture", + .llvm_name = "armv3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_armv3m = Feature{ + .name = "armv3m", + .description = "ARMv3m architecture", + .llvm_name = "armv3m", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_armv4 = Feature{ + .name = "armv4", + .description = "ARMv4 architecture", + .llvm_name = "armv4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_armv4t = Feature{ + .name = "armv4t", + .description = "ARMv4t architecture", + .llvm_name = "armv4t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_armv5t = Feature{ + .name = "armv5t", + .description = "ARMv5t architecture", + .llvm_name = "armv5t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_armv5te = Feature{ + .name = "armv5te", + .description = "ARMv5te architecture", + .llvm_name = "armv5te", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_armv5tej = Feature{ + .name = "armv5tej", + .description = "ARMv5tej architecture", + .llvm_name = "armv5tej", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_armv6 = Feature{ + .name = "armv6", + .description = "ARMv6 architecture", + .llvm_name = "armv6", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + }, +}; + +pub const feature_armv6j = Feature{ + .name = "armv6j", + .description = "ARMv7a architecture", + .llvm_name = "armv6j", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + }, +}; + +pub const feature_armv6k = Feature{ + .name = "armv6k", + .description = "ARMv6k architecture", + .llvm_name = "armv6k", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_armv6kz = Feature{ + .name = "armv6kz", + .description = "ARMv6kz architecture", + .llvm_name = "armv6kz", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_trustzone, + }, +}; + +pub const feature_armv6M = Feature{ + .name = "armv6-m", + .description = "ARMv6m architecture", + .llvm_name = "armv6-m", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + }, +}; + +pub const feature_armv6sM = Feature{ + .name = "armv6s-m", + .description = "ARMv6sm architecture", + .llvm_name = "armv6s-m", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + }, +}; + +pub const feature_armv6t2 = Feature{ + .name = "armv6t2", + .description = "ARMv6t2 architecture", + .llvm_name = "armv6t2", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + &feature_thumb2, + }, +}; + +pub const feature_armv7A = Feature{ + .name = "armv7-a", + .description = "ARMv7a architecture", + .llvm_name = "armv7-a", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv7eM = Feature{ + .name = "armv7e-m", + .description = "ARMv7em architecture", + .llvm_name = "armv7e-m", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + }, +}; + +pub const feature_armv7k = Feature{ + .name = "armv7k", + .description = "ARMv7a architecture", + .llvm_name = "armv7k", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_dsp, + &feature_aclass, + &feature_perfmon, + &feature_fpregs, + }, +}; + +pub const feature_armv7M = Feature{ + .name = "armv7-m", + .description = "ARMv7m architecture", + .llvm_name = "armv7-m", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + }, +}; + +pub const feature_armv7R = Feature{ + .name = "armv7-r", + .description = "ARMv7r architecture", + .llvm_name = "armv7-r", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + }, +}; + +pub const feature_armv7s = Feature{ + .name = "armv7s", + .description = "ARMv7a architecture", + .llvm_name = "armv7s", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_dsp, + &feature_aclass, + &feature_perfmon, + &feature_fpregs, + }, +}; + +pub const feature_armv7ve = Feature{ + .name = "armv7ve", + .description = "ARMv7ve architecture", + .llvm_name = "armv7ve", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv8A = Feature{ + .name = "armv8-a", + .description = "ARMv8a architecture", + .llvm_name = "armv8-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv8Mbase = Feature{ + .name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", + .llvm_name = "armv8-m.base", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_hwdiv, + }, +}; + +pub const feature_armv8Mmain = Feature{ + .name = "armv8-m.main", + .description = "ARMv8mMainline architecture", + .llvm_name = "armv8-m.main", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + }, +}; + +pub const feature_armv8R = Feature{ + .name = "armv8-r", + .description = "ARMv8r architecture", + .llvm_name = "armv8-r", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_dfb, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_rclass, + }, +}; + +pub const feature_armv81A = Feature{ + .name = "armv8.1-a", + .description = "ARMv81a architecture", + .llvm_name = "armv8.1-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv81Mmain = Feature{ + .name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", + .llvm_name = "armv8.1-m.main", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_lob, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumb2, + &feature_mclass, + &feature_ras, + &feature_noarm, + &feature_v4t, + &feature_thumbMode, + &feature_perfmon, + &feature_hwdiv, + }, +}; + +pub const feature_armv82A = Feature{ + .name = "armv8.2-a", + .description = "ARMv82a architecture", + .llvm_name = "armv8.2-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv83A = Feature{ + .name = "armv8.3-a", + .description = "ARMv83a architecture", + .llvm_name = "armv8.3-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv84A = Feature{ + .name = "armv8.4-a", + .description = "ARMv84a architecture", + .llvm_name = "armv8.4-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_armv85A = Feature{ + .name = "armv8.5-a", + .description = "ARMv85a architecture", + .llvm_name = "armv8.5-a", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_sb, + &feature_crc, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_msecext8 = Feature{ + .name = "8msecext", + .description = "Enable support for ARMv8-M Security Extensions", + .llvm_name = "8msecext", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_aclass = Feature{ + .name = "aclass", + .description = "Is application profile ('A' series)", + .llvm_name = "aclass", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_aes = Feature{ + .name = "aes", + .description = "Enable AES support", + .llvm_name = "aes", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_acquireRelease = Feature{ + .name = "acquire-release", + .description = "Has v8 acquire/release (lda/ldaex etc) instructions", + .llvm_name = "acquire-release", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avoidMovsShop = Feature{ + .name = "avoid-movs-shop", + .description = "Avoid movs instructions with shifter operand", + .llvm_name = "avoid-movs-shop", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avoidPartialCpsr = Feature{ + .name = "avoid-partial-cpsr", + .description = "Avoid CPSR partial update for OOO execution", + .llvm_name = "avoid-partial-cpsr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .description = "Enable support for CRC instructions", + .llvm_name = "crc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cheapPredicableCpsr = Feature{ + .name = "cheap-predicable-cpsr", + .description = "Disable +1 predication cost for instructions updating CPSR", + .llvm_name = "cheap-predicable-cpsr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vldnAlign = Feature{ + .name = "vldn-align", + .description = "Check for VLDn unaligned access", + .llvm_name = "vldn-align", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .description = "Enable support for Cryptography extensions", + .llvm_name = "crypto", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_d32 = Feature{ + .name = "d32", + .description = "Extend FP to 32 double registers", + .llvm_name = "d32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_db = Feature{ + .name = "db", + .description = "Has data barrier (dmb/dsb) instructions", + .llvm_name = "db", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dfb = Feature{ + .name = "dfb", + .description = "Has full data barrier (dfb) instruction", + .llvm_name = "dfb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dsp = Feature{ + .name = "dsp", + .description = "Supports DSP instructions in ARM and/or Thumb2", + .llvm_name = "dsp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dontWidenVmovs = Feature{ + .name = "dont-widen-vmovs", + .description = "Don't widen VMOVS to VMOVD", + .llvm_name = "dont-widen-vmovs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dotprod = Feature{ + .name = "dotprod", + .description = "Enable support for dot product instructions", + .llvm_name = "dotprod", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_executeOnly = Feature{ + .name = "execute-only", + .description = "Enable the generation of execute only code.", + .llvm_name = "execute-only", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_expandFpMlx = Feature{ + .name = "expand-fp-mlx", + .description = "Expand VFP/NEON MLA/MLS instructions", + .llvm_name = "expand-fp-mlx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp16 = Feature{ + .name = "fp16", + .description = "Enable half-precision floating point", + .llvm_name = "fp16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp16fml = Feature{ + .name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .llvm_name = "fp16fml", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .description = "Floating point unit supports double precision", + .llvm_name = "fp64", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fpao = Feature{ + .name = "fpao", + .description = "Enable fast computation of positive address offsets", + .llvm_name = "fpao", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fpArmv8 = Feature{ + .name = "fp-armv8", + .description = "Enable ARMv8 FP", + .llvm_name = "fp-armv8", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8d16 = Feature{ + .name = "fp-armv8d16", + .description = "Enable ARMv8 FP with only 16 d-registers", + .llvm_name = "fp-armv8d16", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8d16sp = Feature{ + .name = "fp-armv8d16sp", + .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", + .llvm_name = "fp-armv8d16sp", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8sp = Feature{ + .name = "fp-armv8sp", + .description = "Enable ARMv8 FP with no double precision", + .llvm_name = "fp-armv8sp", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_fpregs = Feature{ + .name = "fpregs", + .description = "Enable FP registers", + .llvm_name = "fpregs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fpregs16 = Feature{ + .name = "fpregs16", + .description = "Enable 16-bit FP registers", + .llvm_name = "fpregs16", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fpregs64 = Feature{ + .name = "fpregs64", + .description = "Enable 64-bit FP registers", + .llvm_name = "fpregs64", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fullfp16 = Feature{ + .name = "fullfp16", + .description = "Enable full half-precision floating point", + .llvm_name = "fullfp16", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fuseAes = Feature{ + .name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .llvm_name = "fuse-aes", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fuseLiterals = Feature{ + .name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .llvm_name = "fuse-literals", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hwdivArm = Feature{ + .name = "hwdiv-arm", + .description = "Enable divide instructions in ARM mode", + .llvm_name = "hwdiv-arm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hwdiv = Feature{ + .name = "hwdiv", + .description = "Enable divide instructions in Thumb", + .llvm_name = "hwdiv", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noBranchPredictor = Feature{ + .name = "no-branch-predictor", + .description = "Has no branch predictor", + .llvm_name = "no-branch-predictor", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_retAddrStack = Feature{ + .name = "ret-addr-stack", + .description = "Has return address stack", + .llvm_name = "ret-addr-stack", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowfpvmlx = Feature{ + .name = "slowfpvmlx", + .description = "Disable VFP / NEON MAC instructions", + .llvm_name = "slowfpvmlx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vmlxHazards = Feature{ + .name = "vmlx-hazards", + .description = "Has VMLx hazards", + .llvm_name = "vmlx-hazards", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lob = Feature{ + .name = "lob", + .description = "Enable Low Overhead Branch extensions", + .llvm_name = "lob", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "long-calls", + .description = "Generate calls via indirect call instructions", + .llvm_name = "long-calls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mclass = Feature{ + .name = "mclass", + .description = "Is microcontroller profile ('M' series)", + .llvm_name = "mclass", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mp = Feature{ + .name = "mp", + .description = "Supports Multiprocessing extension", + .llvm_name = "mp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mve1beat = Feature{ + .name = "mve1beat", + .description = "Model MVE instructions as a 1 beat per tick architecture", + .llvm_name = "mve1beat", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mve2beat = Feature{ + .name = "mve2beat", + .description = "Model MVE instructions as a 2 beats per tick architecture", + .llvm_name = "mve2beat", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mve4beat = Feature{ + .name = "mve4beat", + .description = "Model MVE instructions as a 4 beats per tick architecture", + .llvm_name = "mve4beat", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_muxedUnits = Feature{ + .name = "muxed-units", + .description = "Has muxed AGU and NEON/FPU", + .llvm_name = "muxed-units", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_neon = Feature{ + .name = "neon", + .description = "Enable NEON instructions", + .llvm_name = "neon", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_neonfp = Feature{ + .name = "neonfp", + .description = "Use NEON for single precision FP", + .llvm_name = "neonfp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_neonFpmovs = Feature{ + .name = "neon-fpmovs", + .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", + .llvm_name = "neon-fpmovs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_naclTrap = Feature{ + .name = "nacl-trap", + .description = "NaCl trap", + .llvm_name = "nacl-trap", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noarm = Feature{ + .name = "noarm", + .description = "Does not support ARM mode execution", + .llvm_name = "noarm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noMovt = Feature{ + .name = "no-movt", + .description = "Don't use movt/movw pairs for 32-bit imms", + .llvm_name = "no-movt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noNegImmediates = Feature{ + .name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .llvm_name = "no-neg-immediates", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_disablePostraScheduler = Feature{ + .name = "disable-postra-scheduler", + .description = "Don't schedule again after register allocation", + .llvm_name = "disable-postra-scheduler", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nonpipelinedVfp = Feature{ + .name = "nonpipelined-vfp", + .description = "VFP instructions are not pipelined", + .llvm_name = "nonpipelined-vfp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_perfmon = Feature{ + .name = "perfmon", + .description = "Enable support for Performance Monitor extensions", + .llvm_name = "perfmon", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bit32 = Feature{ + .name = "32bit", + .description = "Prefer 32-bit Thumb instrs", + .llvm_name = "32bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_preferIshst = Feature{ + .name = "prefer-ishst", + .description = "Prefer ISHST barriers", + .llvm_name = "prefer-ishst", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loopAlign = Feature{ + .name = "loop-align", + .description = "Prefer 32-bit alignment for loops", + .llvm_name = "loop-align", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_preferVmovsr = Feature{ + .name = "prefer-vmovsr", + .description = "Prefer VMOVSR", + .llvm_name = "prefer-vmovsr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_profUnpr = Feature{ + .name = "prof-unpr", + .description = "Is profitable to unpredicate", + .llvm_name = "prof-unpr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ras = Feature{ + .name = "ras", + .description = "Enable Reliability, Availability and Serviceability extensions", + .llvm_name = "ras", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rclass = Feature{ + .name = "rclass", + .description = "Is realtime profile ('R' series)", + .llvm_name = "rclass", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_readTpHard = Feature{ + .name = "read-tp-hard", + .description = "Reading thread pointer from register", + .llvm_name = "read-tp-hard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reserveR9 = Feature{ + .name = "reserve-r9", + .description = "Reserve R9, making it unavailable as GPR", + .llvm_name = "reserve-r9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sb = Feature{ + .name = "sb", + .description = "Enable v8.5a Speculation Barrier", + .llvm_name = "sb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sha2 = Feature{ + .name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .llvm_name = "sha2", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_slowFpBrcc = Feature{ + .name = "slow-fp-brcc", + .description = "FP compare + branch is slow", + .llvm_name = "slow-fp-brcc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowLoadDSubreg = Feature{ + .name = "slow-load-D-subreg", + .description = "Loading into D subregs is slow", + .llvm_name = "slow-load-D-subreg", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowOddReg = Feature{ + .name = "slow-odd-reg", + .description = "VLDM/VSTM starting with an odd register is slow", + .llvm_name = "slow-odd-reg", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowVdup32 = Feature{ + .name = "slow-vdup32", + .description = "Has slow VDUP32 - prefer VMOV", + .llvm_name = "slow-vdup32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowVgetlni32 = Feature{ + .name = "slow-vgetlni32", + .description = "Has slow VGETLNi32 - prefer VMOV", + .llvm_name = "slow-vgetlni32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_splatVfpNeon = Feature{ + .name = "splat-vfp-neon", + .description = "Splat register from VFP to NEON", + .llvm_name = "splat-vfp-neon", + .subfeatures = &[_]*const Feature { + &feature_dontWidenVmovs, + }, +}; + +pub const feature_strictAlign = Feature{ + .name = "strict-align", + .description = "Disallow all unaligned memory access", + .llvm_name = "strict-align", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_thumb2 = Feature{ + .name = "thumb2", + .description = "Enable Thumb2 instructions", + .llvm_name = "thumb2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_trustzone = Feature{ + .name = "trustzone", + .description = "Enable support for TrustZone security extensions", + .llvm_name = "trustzone", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useAa = Feature{ + .name = "use-aa", + .description = "Use alias analysis during codegen", + .llvm_name = "use-aa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useMisched = Feature{ + .name = "use-misched", + .description = "Use the MachineScheduler", + .llvm_name = "use-misched", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_wideStrideVfp = Feature{ + .name = "wide-stride-vfp", + .description = "Use a wide stride when allocating VFP registers", + .llvm_name = "wide-stride-vfp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v7clrex = Feature{ + .name = "v7clrex", + .description = "Has v7 clrex instruction", + .llvm_name = "v7clrex", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vfp2 = Feature{ + .name = "vfp2", + .description = "Enable VFP2 instructions", + .llvm_name = "vfp2", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp2sp = Feature{ + .name = "vfp2sp", + .description = "Enable VFP2 instructions with no double precision", + .llvm_name = "vfp2sp", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp3 = Feature{ + .name = "vfp3", + .description = "Enable VFP3 instructions", + .llvm_name = "vfp3", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp3d16 = Feature{ + .name = "vfp3d16", + .description = "Enable VFP3 instructions with only 16 d-registers", + .llvm_name = "vfp3d16", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp3d16sp = Feature{ + .name = "vfp3d16sp", + .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", + .llvm_name = "vfp3d16sp", + .subfeatures = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp3sp = Feature{ + .name = "vfp3sp", + .description = "Enable VFP3 instructions with no double precision", + .llvm_name = "vfp3sp", + .subfeatures = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp4 = Feature{ + .name = "vfp4", + .description = "Enable VFP4 instructions", + .llvm_name = "vfp4", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp4d16 = Feature{ + .name = "vfp4d16", + .description = "Enable VFP4 instructions with only 16 d-registers", + .llvm_name = "vfp4d16", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_vfp4d16sp = Feature{ + .name = "vfp4d16sp", + .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", + .llvm_name = "vfp4d16sp", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_vfp4sp = Feature{ + .name = "vfp4sp", + .description = "Enable VFP4 instructions with no double precision", + .llvm_name = "vfp4sp", + .subfeatures = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vmlxForwarding = Feature{ + .name = "vmlx-forwarding", + .description = "Has multiplier accumulator forwarding", + .llvm_name = "vmlx-forwarding", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_virtualization = Feature{ + .name = "virtualization", + .description = "Supports Virtualization extension", + .llvm_name = "virtualization", + .subfeatures = &[_]*const Feature { + &feature_hwdiv, + &feature_hwdivArm, + }, +}; + +pub const feature_zcz = Feature{ + .name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .llvm_name = "zcz", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mvefp = Feature{ + .name = "mve.fp", + .description = "Support M-Class Vector Extension with integer and floating ops", + .llvm_name = "mve.fp", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_dsp, + &feature_perfmon, + &feature_fpregs, + }, +}; + +pub const feature_mve = Feature{ + .name = "mve", + .description = "Support M-Class Vector Extension with integer ops", + .llvm_name = "mve", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_fpregs, + }, +}; + +pub const feature_v4t = Feature{ + .name = "v4t", + .description = "Support ARM v4T instructions", + .llvm_name = "v4t", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v5te = Feature{ + .name = "v5te", + .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .llvm_name = "v5te", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v5t = Feature{ + .name = "v5t", + .description = "Support ARM v5T instructions", + .llvm_name = "v5t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v6k = Feature{ + .name = "v6k", + .description = "Support ARM v6k instructions", + .llvm_name = "v6k", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v6m = Feature{ + .name = "v6m", + .description = "Support ARM v6M instructions", + .llvm_name = "v6m", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v6 = Feature{ + .name = "v6", + .description = "Support ARM v6 instructions", + .llvm_name = "v6", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v6t2 = Feature{ + .name = "v6t2", + .description = "Support ARM v6t2 instructions", + .llvm_name = "v6t2", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_thumb2, + }, +}; + +pub const feature_v7 = Feature{ + .name = "v7", + .description = "Support ARM v7 instructions", + .llvm_name = "v7", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_v7clrex, + &feature_perfmon, + &feature_thumb2, + }, +}; + +pub const feature_v8m = Feature{ + .name = "v8m", + .description = "Support ARM v8M Baseline instructions", + .llvm_name = "v8m", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_v8mmain = Feature{ + .name = "v8m.main", + .description = "Support ARM v8M Mainline instructions", + .llvm_name = "v8m.main", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_perfmon, + &feature_v7clrex, + &feature_thumb2, + }, +}; + +pub const feature_v8 = Feature{ + .name = "v8", + .description = "Support ARM v8 instructions", + .llvm_name = "v8", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_perfmon, + }, +}; + +pub const feature_v81mmain = Feature{ + .name = "v8.1m.main", + .description = "Support ARM v8-1M Mainline instructions", + .llvm_name = "v8.1m.main", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_v7clrex, + &feature_perfmon, + &feature_thumb2, + }, +}; + +pub const feature_v81a = Feature{ + .name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .llvm_name = "v8.1a", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_perfmon, + }, +}; + +pub const feature_v82a = Feature{ + .name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .llvm_name = "v8.2a", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_perfmon, + }, +}; + +pub const feature_v83a = Feature{ + .name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .llvm_name = "v8.3a", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_perfmon, + }, +}; + +pub const feature_v84a = Feature{ + .name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .llvm_name = "v8.4a", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_perfmon, + &feature_fpregs, + }, +}; + +pub const feature_v85a = Feature{ + .name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .llvm_name = "v8.5a", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_sb, + &feature_perfmon, + &feature_fpregs, + }, +}; + +pub const feature_iwmmxt = Feature{ + .name = "iwmmxt", + .description = "ARMv5te architecture", + .llvm_name = "iwmmxt", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_iwmmxt2 = Feature{ + .name = "iwmmxt2", + .description = "ARMv5te architecture", + .llvm_name = "iwmmxt2", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const feature_softFloat = Feature{ + .name = "soft-float", + .description = "Use software floating point features.", + .llvm_name = "soft-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_thumbMode = Feature{ + .name = "thumb-mode", + .description = "Thumb mode", + .llvm_name = "thumb-mode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a5 = Feature{ + .name = "a5", + .description = "Cortex-A5 ARM processors", + .llvm_name = "a5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a7 = Feature{ + .name = "a7", + .description = "Cortex-A7 ARM processors", + .llvm_name = "a7", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a8 = Feature{ + .name = "a8", + .description = "Cortex-A8 ARM processors", + .llvm_name = "a8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a9 = Feature{ + .name = "a9", + .description = "Cortex-A9 ARM processors", + .llvm_name = "a9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a12 = Feature{ + .name = "a12", + .description = "Cortex-A12 ARM processors", + .llvm_name = "a12", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a15 = Feature{ + .name = "a15", + .description = "Cortex-A15 ARM processors", + .llvm_name = "a15", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a17 = Feature{ + .name = "a17", + .description = "Cortex-A17 ARM processors", + .llvm_name = "a17", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a32 = Feature{ + .name = "a32", + .description = "Cortex-A32 ARM processors", + .llvm_name = "a32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a35 = Feature{ + .name = "a35", + .description = "Cortex-A35 ARM processors", + .llvm_name = "a35", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a53 = Feature{ + .name = "a53", + .description = "Cortex-A53 ARM processors", + .llvm_name = "a53", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a55 = Feature{ + .name = "a55", + .description = "Cortex-A55 ARM processors", + .llvm_name = "a55", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a57 = Feature{ + .name = "a57", + .description = "Cortex-A57 ARM processors", + .llvm_name = "a57", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a72 = Feature{ + .name = "a72", + .description = "Cortex-A72 ARM processors", + .llvm_name = "a72", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a73 = Feature{ + .name = "a73", + .description = "Cortex-A73 ARM processors", + .llvm_name = "a73", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a75 = Feature{ + .name = "a75", + .description = "Cortex-A75 ARM processors", + .llvm_name = "a75", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a76 = Feature{ + .name = "a76", + .description = "Cortex-A76 ARM processors", + .llvm_name = "a76", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_exynos = Feature{ + .name = "exynos", + .description = "Samsung Exynos processors", + .llvm_name = "exynos", + .subfeatures = &[_]*const Feature { + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_hwdiv, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_d32, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_crc, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fpregs, + &feature_fuseLiterals, + }, +}; + +pub const feature_krait = Feature{ + .name = "krait", + .description = "Qualcomm Krait processors", + .llvm_name = "krait", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_kryo = Feature{ + .name = "kryo", + .description = "Qualcomm Kryo processors", + .llvm_name = "kryo", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_m3 = Feature{ + .name = "m3", + .description = "Cortex-M3 ARM processors", + .llvm_name = "m3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_r4 = Feature{ + .name = "r4", + .description = "Cortex-R4 ARM processors", + .llvm_name = "r4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_r5 = Feature{ + .name = "r5", + .description = "Cortex-R5 ARM processors", + .llvm_name = "r5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_r7 = Feature{ + .name = "r7", + .description = "Cortex-R7 ARM processors", + .llvm_name = "r7", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_r52 = Feature{ + .name = "r52", + .description = "Cortex-R52 ARM processors", + .llvm_name = "r52", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_swift = Feature{ + .name = "swift", + .description = "Swift ARM processors", + .llvm_name = "swift", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xscale = Feature{ + .name = "xscale", + .description = "ARMv5te architecture", + .llvm_name = "xscale", + .subfeatures = &[_]*const Feature { + &feature_v4t, + }, +}; + +pub const features = &[_]*const Feature { + &feature_armv2, + &feature_armv2a, + &feature_armv3, + &feature_armv3m, + &feature_armv4, + &feature_armv4t, + &feature_armv5t, + &feature_armv5te, + &feature_armv5tej, + &feature_armv6, + &feature_armv6j, + &feature_armv6k, + &feature_armv6kz, + &feature_armv6M, + &feature_armv6sM, + &feature_armv6t2, + &feature_armv7A, + &feature_armv7eM, + &feature_armv7k, + &feature_armv7M, + &feature_armv7R, + &feature_armv7s, + &feature_armv7ve, + &feature_armv8A, + &feature_armv8Mbase, + &feature_armv8Mmain, + &feature_armv8R, + &feature_armv81A, + &feature_armv81Mmain, + &feature_armv82A, + &feature_armv83A, + &feature_armv84A, + &feature_armv85A, + &feature_msecext8, + &feature_aclass, + &feature_aes, + &feature_acquireRelease, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_crc, + &feature_cheapPredicableCpsr, + &feature_vldnAlign, + &feature_crypto, + &feature_d32, + &feature_db, + &feature_dfb, + &feature_dsp, + &feature_dontWidenVmovs, + &feature_dotprod, + &feature_executeOnly, + &feature_expandFpMlx, + &feature_fp16, + &feature_fp16fml, + &feature_fp64, + &feature_fpao, + &feature_fpArmv8, + &feature_fpArmv8d16, + &feature_fpArmv8d16sp, + &feature_fpArmv8sp, + &feature_fpregs, + &feature_fpregs16, + &feature_fpregs64, + &feature_fullfp16, + &feature_fuseAes, + &feature_fuseLiterals, + &feature_hwdivArm, + &feature_hwdiv, + &feature_noBranchPredictor, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_lob, + &feature_longCalls, + &feature_mclass, + &feature_mp, + &feature_mve1beat, + &feature_mve2beat, + &feature_mve4beat, + &feature_muxedUnits, + &feature_neon, + &feature_neonfp, + &feature_neonFpmovs, + &feature_naclTrap, + &feature_noarm, + &feature_noMovt, + &feature_noNegImmediates, + &feature_disablePostraScheduler, + &feature_nonpipelinedVfp, + &feature_perfmon, + &feature_bit32, + &feature_preferIshst, + &feature_loopAlign, + &feature_preferVmovsr, + &feature_profUnpr, + &feature_ras, + &feature_rclass, + &feature_readTpHard, + &feature_reserveR9, + &feature_sb, + &feature_sha2, + &feature_slowFpBrcc, + &feature_slowLoadDSubreg, + &feature_slowOddReg, + &feature_slowVdup32, + &feature_slowVgetlni32, + &feature_splatVfpNeon, + &feature_strictAlign, + &feature_thumb2, + &feature_trustzone, + &feature_useAa, + &feature_useMisched, + &feature_wideStrideVfp, + &feature_v7clrex, + &feature_vfp2, + &feature_vfp2sp, + &feature_vfp3, + &feature_vfp3d16, + &feature_vfp3d16sp, + &feature_vfp3sp, + &feature_vfp4, + &feature_vfp4d16, + &feature_vfp4d16sp, + &feature_vfp4sp, + &feature_vmlxForwarding, + &feature_virtualization, + &feature_zcz, + &feature_mvefp, + &feature_mve, + &feature_v4t, + &feature_v5te, + &feature_v5t, + &feature_v6k, + &feature_v6m, + &feature_v6, + &feature_v6t2, + &feature_v7, + &feature_v8m, + &feature_v8mmain, + &feature_v8, + &feature_v81mmain, + &feature_v81a, + &feature_v82a, + &feature_v83a, + &feature_v84a, + &feature_v85a, + &feature_iwmmxt, + &feature_iwmmxt2, + &feature_softFloat, + &feature_thumbMode, + &feature_a5, + &feature_a7, + &feature_a8, + &feature_a9, + &feature_a12, + &feature_a15, + &feature_a17, + &feature_a32, + &feature_a35, + &feature_a53, + &feature_a55, + &feature_a57, + &feature_a72, + &feature_a73, + &feature_a75, + &feature_a76, + &feature_exynos, + &feature_krait, + &feature_kryo, + &feature_m3, + &feature_r4, + &feature_r5, + &feature_r7, + &feature_r52, + &feature_swift, + &feature_xscale, +}; + +pub const cpu_arm1020e = Cpu{ + .name = "arm1020e", + .llvm_name = "arm1020e", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm1020t = Cpu{ + .name = "arm1020t", + .llvm_name = "arm1020t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5t, + }, +}; + +pub const cpu_arm1022e = Cpu{ + .name = "arm1022e", + .llvm_name = "arm1022e", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm10e = Cpu{ + .name = "arm10e", + .llvm_name = "arm10e", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm10tdmi = Cpu{ + .name = "arm10tdmi", + .llvm_name = "arm10tdmi", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5t, + }, +}; + +pub const cpu_arm1136jS = Cpu{ + .name = "arm1136j-s", + .llvm_name = "arm1136j-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + &feature_armv6, + }, +}; + +pub const cpu_arm1136jfS = Cpu{ + .name = "arm1136jf-s", + .llvm_name = "arm1136jf-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + &feature_armv6, + &feature_slowfpvmlx, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm1156t2S = Cpu{ + .name = "arm1156t2-s", + .llvm_name = "arm1156t2-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + &feature_thumb2, + &feature_armv6t2, + }, +}; + +pub const cpu_arm1156t2fS = Cpu{ + .name = "arm1156t2f-s", + .llvm_name = "arm1156t2f-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_dsp, + &feature_thumb2, + &feature_armv6t2, + &feature_slowfpvmlx, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm1176jS = Cpu{ + .name = "arm1176j-s", + .llvm_name = "arm1176j-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_trustzone, + &feature_armv6kz, + }, +}; + +pub const cpu_arm1176jzS = Cpu{ + .name = "arm1176jz-s", + .llvm_name = "arm1176jz-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_trustzone, + &feature_armv6kz, + }, +}; + +pub const cpu_arm1176jzfS = Cpu{ + .name = "arm1176jzf-s", + .llvm_name = "arm1176jzf-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_trustzone, + &feature_armv6kz, + &feature_slowfpvmlx, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm710t = Cpu{ + .name = "arm710t", + .llvm_name = "arm710t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm720t = Cpu{ + .name = "arm720t", + .llvm_name = "arm720t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm7tdmi = Cpu{ + .name = "arm7tdmi", + .llvm_name = "arm7tdmi", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm7tdmiS = Cpu{ + .name = "arm7tdmi-s", + .llvm_name = "arm7tdmi-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm8 = Cpu{ + .name = "arm8", + .llvm_name = "arm8", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_arm810 = Cpu{ + .name = "arm810", + .llvm_name = "arm810", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_arm9 = Cpu{ + .name = "arm9", + .llvm_name = "arm9", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm920 = Cpu{ + .name = "arm920", + .llvm_name = "arm920", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm920t = Cpu{ + .name = "arm920t", + .llvm_name = "arm920t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm922t = Cpu{ + .name = "arm922t", + .llvm_name = "arm922t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm926ejS = Cpu{ + .name = "arm926ej-s", + .llvm_name = "arm926ej-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm940t = Cpu{ + .name = "arm940t", + .llvm_name = "arm940t", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_arm946eS = Cpu{ + .name = "arm946e-s", + .llvm_name = "arm946e-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm966eS = Cpu{ + .name = "arm966e-s", + .llvm_name = "arm966e-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm968eS = Cpu{ + .name = "arm968e-s", + .llvm_name = "arm968e-s", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm9e = Cpu{ + .name = "arm9e", + .llvm_name = "arm9e", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_arm9tdmi = Cpu{ + .name = "arm9tdmi", + .llvm_name = "arm9tdmi", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_cortexA12 = Cpu{ + .name = "cortex-a12", + .llvm_name = "cortex-a12", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_mp, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + &feature_a12, + }, +}; + +pub const cpu_cortexA15 = Cpu{ + .name = "cortex-a15", + .llvm_name = "cortex-a15", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_dontWidenVmovs, + &feature_retAddrStack, + &feature_mp, + &feature_muxedUnits, + &feature_splatVfpNeon, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + &feature_a15, + }, +}; + +pub const cpu_cortexA17 = Cpu{ + .name = "cortex-a17", + .llvm_name = "cortex-a17", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_mp, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + &feature_a17, + }, +}; + +pub const cpu_cortexA32 = Cpu{ + .name = "cortex-a32", + .llvm_name = "cortex-a32", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + }, +}; + +pub const cpu_cortexA35 = Cpu{ + .name = "cortex-a35", + .llvm_name = "cortex-a35", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + &feature_a35, + }, +}; + +pub const cpu_cortexA5 = Cpu{ + .name = "cortex-a5", + .llvm_name = "cortex-a5", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_a5, + }, +}; + +pub const cpu_cortexA53 = Cpu{ + .name = "cortex-a53", + .llvm_name = "cortex-a53", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + &feature_fpao, + &feature_a53, + }, +}; + +pub const cpu_cortexA55 = Cpu{ + .name = "cortex-a55", + .llvm_name = "cortex-a55", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_dotprod, + &feature_a55, + }, +}; + +pub const cpu_cortexA57 = Cpu{ + .name = "cortex-a57", + .llvm_name = "cortex-a57", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_avoidPartialCpsr, + &feature_cheapPredicableCpsr, + &feature_crypto, + &feature_fpao, + &feature_a57, + }, +}; + +pub const cpu_cortexA7 = Cpu{ + .name = "cortex-a7", + .llvm_name = "cortex-a7", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_mp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + &feature_a7, + }, +}; + +pub const cpu_cortexA72 = Cpu{ + .name = "cortex-a72", + .llvm_name = "cortex-a72", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + &feature_a72, + }, +}; + +pub const cpu_cortexA73 = Cpu{ + .name = "cortex-a73", + .llvm_name = "cortex-a73", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + &feature_a73, + }, +}; + +pub const cpu_cortexA75 = Cpu{ + .name = "cortex-a75", + .llvm_name = "cortex-a75", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_dotprod, + &feature_a75, + }, +}; + +pub const cpu_cortexA76 = Cpu{ + .name = "cortex-a76", + .llvm_name = "cortex-a76", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_crypto, + &feature_dotprod, + &feature_fullfp16, + &feature_a76, + }, +}; + +pub const cpu_cortexA76ae = Cpu{ + .name = "cortex-a76ae", + .llvm_name = "cortex-a76ae", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_crypto, + &feature_dotprod, + &feature_fullfp16, + &feature_a76, + }, +}; + +pub const cpu_cortexA8 = Cpu{ + .name = "cortex-a8", + .llvm_name = "cortex-a8", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_nonpipelinedVfp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_vmlxForwarding, + &feature_a8, + }, +}; + +pub const cpu_cortexA9 = Cpu{ + .name = "cortex-a9", + .llvm_name = "cortex-a9", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_expandFpMlx, + &feature_fp16, + &feature_retAddrStack, + &feature_vmlxHazards, + &feature_mp, + &feature_muxedUnits, + &feature_neonFpmovs, + &feature_preferVmovsr, + &feature_trustzone, + &feature_vmlxForwarding, + &feature_a9, + }, +}; + +pub const cpu_cortexM0 = Cpu{ + .name = "cortex-m0", + .llvm_name = "cortex-m0", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_armv6M, + }, +}; + +pub const cpu_cortexM0plus = Cpu{ + .name = "cortex-m0plus", + .llvm_name = "cortex-m0plus", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_armv6M, + }, +}; + +pub const cpu_cortexM1 = Cpu{ + .name = "cortex-m1", + .llvm_name = "cortex-m1", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_armv6M, + }, +}; + +pub const cpu_cortexM23 = Cpu{ + .name = "cortex-m23", + .llvm_name = "cortex-m23", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_hwdiv, + &feature_armv8Mbase, + &feature_noMovt, + }, +}; + +pub const cpu_cortexM3 = Cpu{ + .name = "cortex-m3", + .llvm_name = "cortex-m3", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + &feature_armv7M, + &feature_noBranchPredictor, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + &feature_m3, + }, +}; + +pub const cpu_cortexM33 = Cpu{ + .name = "cortex-m33", + .llvm_name = "cortex-m33", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + &feature_armv8Mmain, + &feature_dsp, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16sp, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexM35p = Cpu{ + .name = "cortex-m35p", + .llvm_name = "cortex-m35p", + .subfeatures = &[_]*const Feature { + &feature_acquireRelease, + &feature_v7clrex, + &feature_db, + &feature_msecext8, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + &feature_armv8Mmain, + &feature_dsp, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16sp, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexM4 = Cpu{ + .name = "cortex-m4", + .llvm_name = "cortex-m4", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_armv7eM, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + &feature_fp16, + &feature_fpregs, + &feature_vfp4d16sp, + }, +}; + +pub const cpu_cortexM7 = Cpu{ + .name = "cortex-m7", + .llvm_name = "cortex-m7", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_armv7eM, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16, + }, +}; + +pub const cpu_cortexR4 = Cpu{ + .name = "cortex-r4", + .llvm_name = "cortex-r4", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + &feature_armv7R, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_r4, + }, +}; + +pub const cpu_cortexR4f = Cpu{ + .name = "cortex-r4f", + .llvm_name = "cortex-r4f", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + &feature_armv7R, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + &feature_r4, + }, +}; + +pub const cpu_cortexR5 = Cpu{ + .name = "cortex-r5", + .llvm_name = "cortex-r5", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + &feature_armv7R, + &feature_avoidPartialCpsr, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + &feature_r5, + }, +}; + +pub const cpu_cortexR52 = Cpu{ + .name = "cortex-r52", + .llvm_name = "cortex-r52", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_dfb, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_rclass, + &feature_armv8R, + &feature_fpao, + &feature_useAa, + &feature_useMisched, + &feature_r52, + }, +}; + +pub const cpu_cortexR7 = Cpu{ + .name = "cortex-r7", + .llvm_name = "cortex-r7", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + &feature_armv7R, + &feature_avoidPartialCpsr, + &feature_fp16, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + &feature_r7, + }, +}; + +pub const cpu_cortexR8 = Cpu{ + .name = "cortex-r8", + .llvm_name = "cortex-r8", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_dsp, + &feature_hwdiv, + &feature_rclass, + &feature_armv7R, + &feature_avoidPartialCpsr, + &feature_fp16, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + }, +}; + +pub const cpu_cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_crypto, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_neonfp, + &feature_disablePostraScheduler, + &feature_useMisched, + &feature_vfp4, + &feature_zcz, + &feature_swift, + }, +}; + +pub const cpu_ep9312 = Cpu{ + .name = "ep9312", + .llvm_name = "ep9312", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv4t, + }, +}; + +pub const cpu_exynosM1 = Cpu{ + .name = "exynos-m1", + .llvm_name = "exynos-m1", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fuseLiterals, + &feature_exynos, + }, +}; + +pub const cpu_exynosM2 = Cpu{ + .name = "exynos-m2", + .llvm_name = "exynos-m2", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fuseLiterals, + &feature_exynos, + }, +}; + +pub const cpu_exynosM3 = Cpu{ + .name = "exynos-m3", + .llvm_name = "exynos-m3", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fuseLiterals, + &feature_exynos, + }, +}; + +pub const cpu_exynosM4 = Cpu{ + .name = "exynos-m4", + .llvm_name = "exynos-m4", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_dotprod, + &feature_fullfp16, + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fuseLiterals, + &feature_exynos, + }, +}; + +pub const cpu_exynosM5 = Cpu{ + .name = "exynos-m5", + .llvm_name = "exynos-m5", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_dotprod, + &feature_fullfp16, + &feature_slowFpBrcc, + &feature_slowfpvmlx, + &feature_slowVdup32, + &feature_wideStrideVfp, + &feature_fuseAes, + &feature_slowVgetlni32, + &feature_zcz, + &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_useAa, + &feature_dontWidenVmovs, + &feature_fuseLiterals, + &feature_exynos, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_iwmmxt = Cpu{ + .name = "iwmmxt", + .llvm_name = "iwmmxt", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpu_krait = Cpu{ + .name = "krait", + .llvm_name = "krait", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_fp16, + &feature_hwdivArm, + &feature_hwdiv, + &feature_retAddrStack, + &feature_muxedUnits, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_krait, + }, +}; + +pub const cpu_kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv8A, + &feature_crypto, + &feature_kryo, + }, +}; + +pub const cpu_mpcore = Cpu{ + .name = "mpcore", + .llvm_name = "mpcore", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv6k, + &feature_slowfpvmlx, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_mpcorenovfp = Cpu{ + .name = "mpcorenovfp", + .llvm_name = "mpcorenovfp", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv6k, + }, +}; + +pub const cpu_neoverseN1 = Cpu{ + .name = "neoverse-n1", + .llvm_name = "neoverse-n1", + .subfeatures = &[_]*const Feature { + &feature_mp, + &feature_acquireRelease, + &feature_perfmon, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_ras, + &feature_fp16, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_hwdivArm, + &feature_crc, + &feature_dsp, + &feature_fpregs, + &feature_armv82A, + &feature_crypto, + &feature_dotprod, + }, +}; + +pub const cpu_sc000 = Cpu{ + .name = "sc000", + .llvm_name = "sc000", + .subfeatures = &[_]*const Feature { + &feature_db, + &feature_thumbMode, + &feature_mclass, + &feature_noarm, + &feature_v4t, + &feature_strictAlign, + &feature_armv6M, + }, +}; + +pub const cpu_sc300 = Cpu{ + .name = "sc300", + .llvm_name = "sc300", + .subfeatures = &[_]*const Feature { + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_mclass, + &feature_thumbMode, + &feature_noarm, + &feature_v4t, + &feature_perfmon, + &feature_hwdiv, + &feature_armv7M, + &feature_noBranchPredictor, + &feature_useAa, + &feature_useMisched, + &feature_m3, + }, +}; + +pub const cpu_strongarm = Cpu{ + .name = "strongarm", + .llvm_name = "strongarm", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_strongarm110 = Cpu{ + .name = "strongarm110", + .llvm_name = "strongarm110", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_strongarm1100 = Cpu{ + .name = "strongarm1100", + .llvm_name = "strongarm1100", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_strongarm1110 = Cpu{ + .name = "strongarm1110", + .llvm_name = "strongarm1110", + .subfeatures = &[_]*const Feature { + &feature_armv4, + }, +}; + +pub const cpu_swift = Cpu{ + .name = "swift", + .llvm_name = "swift", + .subfeatures = &[_]*const Feature { + &feature_perfmon, + &feature_v7clrex, + &feature_db, + &feature_thumb2, + &feature_v4t, + &feature_d32, + &feature_aclass, + &feature_dsp, + &feature_fpregs, + &feature_armv7A, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_hwdivArm, + &feature_hwdiv, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_mp, + &feature_neonfp, + &feature_disablePostraScheduler, + &feature_preferIshst, + &feature_profUnpr, + &feature_slowLoadDSubreg, + &feature_slowOddReg, + &feature_slowVdup32, + &feature_slowVgetlni32, + &feature_useMisched, + &feature_wideStrideVfp, + &feature_fp16, + &feature_vfp4, + &feature_swift, + }, +}; + +pub const cpu_xscale = Cpu{ + .name = "xscale", + .llvm_name = "xscale", + .subfeatures = &[_]*const Feature { + &feature_v4t, + &feature_armv5te, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_arm1020e, + &cpu_arm1020t, + &cpu_arm1022e, + &cpu_arm10e, + &cpu_arm10tdmi, + &cpu_arm1136jS, + &cpu_arm1136jfS, + &cpu_arm1156t2S, + &cpu_arm1156t2fS, + &cpu_arm1176jS, + &cpu_arm1176jzS, + &cpu_arm1176jzfS, + &cpu_arm710t, + &cpu_arm720t, + &cpu_arm7tdmi, + &cpu_arm7tdmiS, + &cpu_arm8, + &cpu_arm810, + &cpu_arm9, + &cpu_arm920, + &cpu_arm920t, + &cpu_arm922t, + &cpu_arm926ejS, + &cpu_arm940t, + &cpu_arm946eS, + &cpu_arm966eS, + &cpu_arm968eS, + &cpu_arm9e, + &cpu_arm9tdmi, + &cpu_cortexA12, + &cpu_cortexA15, + &cpu_cortexA17, + &cpu_cortexA32, + &cpu_cortexA35, + &cpu_cortexA5, + &cpu_cortexA53, + &cpu_cortexA55, + &cpu_cortexA57, + &cpu_cortexA7, + &cpu_cortexA72, + &cpu_cortexA73, + &cpu_cortexA75, + &cpu_cortexA76, + &cpu_cortexA76ae, + &cpu_cortexA8, + &cpu_cortexA9, + &cpu_cortexM0, + &cpu_cortexM0plus, + &cpu_cortexM1, + &cpu_cortexM23, + &cpu_cortexM3, + &cpu_cortexM33, + &cpu_cortexM35p, + &cpu_cortexM4, + &cpu_cortexM7, + &cpu_cortexR4, + &cpu_cortexR4f, + &cpu_cortexR5, + &cpu_cortexR52, + &cpu_cortexR7, + &cpu_cortexR8, + &cpu_cyclone, + &cpu_ep9312, + &cpu_exynosM1, + &cpu_exynosM2, + &cpu_exynosM3, + &cpu_exynosM4, + &cpu_exynosM5, + &cpu_generic, + &cpu_iwmmxt, + &cpu_krait, + &cpu_kryo, + &cpu_mpcore, + &cpu_mpcorenovfp, + &cpu_neoverseN1, + &cpu_sc000, + &cpu_sc300, + &cpu_strongarm, + &cpu_strongarm110, + &cpu_strongarm1100, + &cpu_strongarm1110, + &cpu_swift, + &cpu_xscale, +}; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig new file mode 100644 index 0000000000000000000000000000000000000000..a843ba5e28776304461bcf829ee12d6f5d8ae513 --- /dev/null +++ b/lib/std/target/avr.zig @@ -0,0 +1,5578 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_avr0 = Feature{ + .name = "avr0", + .description = "The device is a part of the avr0 family", + .llvm_name = "avr0", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avr1 = Feature{ + .name = "avr1", + .description = "The device is a part of the avr1 family", + .llvm_name = "avr1", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + }, +}; + +pub const feature_avr2 = Feature{ + .name = "avr2", + .description = "The device is a part of the avr2 family", + .llvm_name = "avr2", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + }, +}; + +pub const feature_avr3 = Feature{ + .name = "avr3", + .description = "The device is a part of the avr3 family", + .llvm_name = "avr3", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + }, +}; + +pub const feature_avr4 = Feature{ + .name = "avr4", + .description = "The device is a part of the avr4 family", + .llvm_name = "avr4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + }, +}; + +pub const feature_avr5 = Feature{ + .name = "avr5", + .description = "The device is a part of the avr5 family", + .llvm_name = "avr5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + }, +}; + +pub const feature_avr6 = Feature{ + .name = "avr6", + .description = "The device is a part of the avr6 family", + .llvm_name = "avr6", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + }, +}; + +pub const feature_avr25 = Feature{ + .name = "avr25", + .description = "The device is a part of the avr25 family", + .llvm_name = "avr25", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + }, +}; + +pub const feature_avr31 = Feature{ + .name = "avr31", + .description = "The device is a part of the avr31 family", + .llvm_name = "avr31", + .subfeatures = &[_]*const Feature { + &feature_jmpcall, + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_elpm, + &feature_addsubiw, + }, +}; + +pub const feature_avr35 = Feature{ + .name = "avr35", + .description = "The device is a part of the avr35 family", + .llvm_name = "avr35", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + }, +}; + +pub const feature_avr51 = Feature{ + .name = "avr51", + .description = "The device is a part of the avr51 family", + .llvm_name = "avr51", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + }, +}; + +pub const feature_avrtiny = Feature{ + .name = "avrtiny", + .description = "The device is a part of the avrtiny family", + .llvm_name = "avrtiny", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + }, +}; + +pub const feature_xmega = Feature{ + .name = "xmega", + .description = "The device is a part of the xmega family", + .llvm_name = "xmega", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + }, +}; + +pub const feature_xmegau = Feature{ + .name = "xmegau", + .description = "The device is a part of the xmegau family", + .llvm_name = "xmegau", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + }, +}; + +pub const feature_addsubiw = Feature{ + .name = "addsubiw", + .description = "Enable 16-bit register-immediate addition and subtraction instructions", + .llvm_name = "addsubiw", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_break = Feature{ + .name = "break", + .description = "The device supports the `BREAK` debugging instruction", + .llvm_name = "break", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_des = Feature{ + .name = "des", + .description = "The device supports the `DES k` encryption instruction", + .llvm_name = "des", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_eijmpcall = Feature{ + .name = "eijmpcall", + .description = "The device supports the `EIJMP`/`EICALL` instructions", + .llvm_name = "eijmpcall", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_elpm = Feature{ + .name = "elpm", + .description = "The device supports the ELPM instruction", + .llvm_name = "elpm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_elpmx = Feature{ + .name = "elpmx", + .description = "The device supports the `ELPM Rd, Z[+]` instructions", + .llvm_name = "elpmx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ijmpcall = Feature{ + .name = "ijmpcall", + .description = "The device supports `IJMP`/`ICALL`instructions", + .llvm_name = "ijmpcall", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_jmpcall = Feature{ + .name = "jmpcall", + .description = "The device supports the `JMP` and `CALL` instructions", + .llvm_name = "jmpcall", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lpm = Feature{ + .name = "lpm", + .description = "The device supports the `LPM` instruction", + .llvm_name = "lpm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lpmx = Feature{ + .name = "lpmx", + .description = "The device supports the `LPM Rd, Z[+]` instruction", + .llvm_name = "lpmx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_movw = Feature{ + .name = "movw", + .description = "The device supports the 16-bit MOVW instruction", + .llvm_name = "movw", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mul = Feature{ + .name = "mul", + .description = "The device supports the multiplication instructions", + .llvm_name = "mul", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rmw = Feature{ + .name = "rmw", + .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", + .llvm_name = "rmw", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_spm = Feature{ + .name = "spm", + .description = "The device supports the `SPM` instruction", + .llvm_name = "spm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_spmx = Feature{ + .name = "spmx", + .description = "The device supports the `SPM Z+` instruction", + .llvm_name = "spmx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sram = Feature{ + .name = "sram", + .description = "The device has random access memory", + .llvm_name = "sram", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_special = Feature{ + .name = "special", + .description = "Enable use of the entire instruction set - used for debugging", + .llvm_name = "special", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_rmw, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + }, +}; + +pub const feature_smallstack = Feature{ + .name = "smallstack", + .description = "The device has an 8-bit stack pointer", + .llvm_name = "smallstack", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tinyencoding = Feature{ + .name = "tinyencoding", + .description = "The device has Tiny core specific instruction encodings", + .llvm_name = "tinyencoding", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_avr0, + &feature_avr1, + &feature_avr2, + &feature_avr3, + &feature_avr4, + &feature_avr5, + &feature_avr6, + &feature_avr25, + &feature_avr31, + &feature_avr35, + &feature_avr51, + &feature_avrtiny, + &feature_xmega, + &feature_xmegau, + &feature_addsubiw, + &feature_break, + &feature_des, + &feature_eijmpcall, + &feature_elpm, + &feature_elpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_lpm, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_rmw, + &feature_spm, + &feature_spmx, + &feature_sram, + &feature_special, + &feature_smallstack, + &feature_tinyencoding, +}; + +pub const cpu_at43usb320 = Cpu{ + .name = "at43usb320", + .llvm_name = "at43usb320", + .subfeatures = &[_]*const Feature { + &feature_jmpcall, + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_elpm, + &feature_addsubiw, + &feature_avr31, + }, +}; + +pub const cpu_at43usb355 = Cpu{ + .name = "at43usb355", + .llvm_name = "at43usb355", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + }, +}; + +pub const cpu_at76c711 = Cpu{ + .name = "at76c711", + .llvm_name = "at76c711", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + }, +}; + +pub const cpu_at86rf401 = Cpu{ + .name = "at86rf401", + .llvm_name = "at86rf401", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + &feature_lpmx, + &feature_movw, + }, +}; + +pub const cpu_at90c8534 = Cpu{ + .name = "at90c8534", + .llvm_name = "at90c8534", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90can128 = Cpu{ + .name = "at90can128", + .llvm_name = "at90can128", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_at90can32 = Cpu{ + .name = "at90can32", + .llvm_name = "at90can32", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90can64 = Cpu{ + .name = "at90can64", + .llvm_name = "at90can64", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90pwm1 = Cpu{ + .name = "at90pwm1", + .llvm_name = "at90pwm1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90pwm161 = Cpu{ + .name = "at90pwm161", + .llvm_name = "at90pwm161", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90pwm2 = Cpu{ + .name = "at90pwm2", + .llvm_name = "at90pwm2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90pwm216 = Cpu{ + .name = "at90pwm216", + .llvm_name = "at90pwm216", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90pwm2b = Cpu{ + .name = "at90pwm2b", + .llvm_name = "at90pwm2b", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90pwm3 = Cpu{ + .name = "at90pwm3", + .llvm_name = "at90pwm3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90pwm316 = Cpu{ + .name = "at90pwm316", + .llvm_name = "at90pwm316", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90pwm3b = Cpu{ + .name = "at90pwm3b", + .llvm_name = "at90pwm3b", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90pwm81 = Cpu{ + .name = "at90pwm81", + .llvm_name = "at90pwm81", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_at90s1200 = Cpu{ + .name = "at90s1200", + .llvm_name = "at90s1200", + .subfeatures = &[_]*const Feature { + &feature_avr0, + }, +}; + +pub const cpu_at90s2313 = Cpu{ + .name = "at90s2313", + .llvm_name = "at90s2313", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s2323 = Cpu{ + .name = "at90s2323", + .llvm_name = "at90s2323", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s2333 = Cpu{ + .name = "at90s2333", + .llvm_name = "at90s2333", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s2343 = Cpu{ + .name = "at90s2343", + .llvm_name = "at90s2343", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s4414 = Cpu{ + .name = "at90s4414", + .llvm_name = "at90s4414", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s4433 = Cpu{ + .name = "at90s4433", + .llvm_name = "at90s4433", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s4434 = Cpu{ + .name = "at90s4434", + .llvm_name = "at90s4434", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s8515 = Cpu{ + .name = "at90s8515", + .llvm_name = "at90s8515", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90s8535 = Cpu{ + .name = "at90s8535", + .llvm_name = "at90s8535", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_at90scr100 = Cpu{ + .name = "at90scr100", + .llvm_name = "at90scr100", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90usb1286 = Cpu{ + .name = "at90usb1286", + .llvm_name = "at90usb1286", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_at90usb1287 = Cpu{ + .name = "at90usb1287", + .llvm_name = "at90usb1287", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_at90usb162 = Cpu{ + .name = "at90usb162", + .llvm_name = "at90usb162", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_at90usb646 = Cpu{ + .name = "at90usb646", + .llvm_name = "at90usb646", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90usb647 = Cpu{ + .name = "at90usb647", + .llvm_name = "at90usb647", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_at90usb82 = Cpu{ + .name = "at90usb82", + .llvm_name = "at90usb82", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_at94k = Cpu{ + .name = "at94k", + .llvm_name = "at94k", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + &feature_lpmx, + &feature_movw, + &feature_mul, + }, +}; + +pub const cpu_ata5272 = Cpu{ + .name = "ata5272", + .llvm_name = "ata5272", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_ata5505 = Cpu{ + .name = "ata5505", + .llvm_name = "ata5505", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_ata5790 = Cpu{ + .name = "ata5790", + .llvm_name = "ata5790", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_ata5795 = Cpu{ + .name = "ata5795", + .llvm_name = "ata5795", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_ata6285 = Cpu{ + .name = "ata6285", + .llvm_name = "ata6285", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_ata6286 = Cpu{ + .name = "ata6286", + .llvm_name = "ata6286", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_ata6289 = Cpu{ + .name = "ata6289", + .llvm_name = "ata6289", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega103 = Cpu{ + .name = "atmega103", + .llvm_name = "atmega103", + .subfeatures = &[_]*const Feature { + &feature_jmpcall, + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_elpm, + &feature_addsubiw, + &feature_avr31, + }, +}; + +pub const cpu_atmega128 = Cpu{ + .name = "atmega128", + .llvm_name = "atmega128", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega1280 = Cpu{ + .name = "atmega1280", + .llvm_name = "atmega1280", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega1281 = Cpu{ + .name = "atmega1281", + .llvm_name = "atmega1281", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega1284 = Cpu{ + .name = "atmega1284", + .llvm_name = "atmega1284", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega1284p = Cpu{ + .name = "atmega1284p", + .llvm_name = "atmega1284p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega1284rfr2 = Cpu{ + .name = "atmega1284rfr2", + .llvm_name = "atmega1284rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega128a = Cpu{ + .name = "atmega128a", + .llvm_name = "atmega128a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega128rfa1 = Cpu{ + .name = "atmega128rfa1", + .llvm_name = "atmega128rfa1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega128rfr2 = Cpu{ + .name = "atmega128rfr2", + .llvm_name = "atmega128rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_atmega16 = Cpu{ + .name = "atmega16", + .llvm_name = "atmega16", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega161 = Cpu{ + .name = "atmega161", + .llvm_name = "atmega161", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega162 = Cpu{ + .name = "atmega162", + .llvm_name = "atmega162", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega163 = Cpu{ + .name = "atmega163", + .llvm_name = "atmega163", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega164a = Cpu{ + .name = "atmega164a", + .llvm_name = "atmega164a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega164p = Cpu{ + .name = "atmega164p", + .llvm_name = "atmega164p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega164pa = Cpu{ + .name = "atmega164pa", + .llvm_name = "atmega164pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega165 = Cpu{ + .name = "atmega165", + .llvm_name = "atmega165", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega165a = Cpu{ + .name = "atmega165a", + .llvm_name = "atmega165a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega165p = Cpu{ + .name = "atmega165p", + .llvm_name = "atmega165p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega165pa = Cpu{ + .name = "atmega165pa", + .llvm_name = "atmega165pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega168 = Cpu{ + .name = "atmega168", + .llvm_name = "atmega168", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega168a = Cpu{ + .name = "atmega168a", + .llvm_name = "atmega168a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega168p = Cpu{ + .name = "atmega168p", + .llvm_name = "atmega168p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega168pa = Cpu{ + .name = "atmega168pa", + .llvm_name = "atmega168pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega169 = Cpu{ + .name = "atmega169", + .llvm_name = "atmega169", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega169a = Cpu{ + .name = "atmega169a", + .llvm_name = "atmega169a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega169p = Cpu{ + .name = "atmega169p", + .llvm_name = "atmega169p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega169pa = Cpu{ + .name = "atmega169pa", + .llvm_name = "atmega169pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16a = Cpu{ + .name = "atmega16a", + .llvm_name = "atmega16a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16hva = Cpu{ + .name = "atmega16hva", + .llvm_name = "atmega16hva", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16hva2 = Cpu{ + .name = "atmega16hva2", + .llvm_name = "atmega16hva2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16hvb = Cpu{ + .name = "atmega16hvb", + .llvm_name = "atmega16hvb", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16hvbrevb = Cpu{ + .name = "atmega16hvbrevb", + .llvm_name = "atmega16hvbrevb", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16m1 = Cpu{ + .name = "atmega16m1", + .llvm_name = "atmega16m1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega16u2 = Cpu{ + .name = "atmega16u2", + .llvm_name = "atmega16u2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_atmega16u4 = Cpu{ + .name = "atmega16u4", + .llvm_name = "atmega16u4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega2560 = Cpu{ + .name = "atmega2560", + .llvm_name = "atmega2560", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr6, + }, +}; + +pub const cpu_atmega2561 = Cpu{ + .name = "atmega2561", + .llvm_name = "atmega2561", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr6, + }, +}; + +pub const cpu_atmega2564rfr2 = Cpu{ + .name = "atmega2564rfr2", + .llvm_name = "atmega2564rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr6, + }, +}; + +pub const cpu_atmega256rfr2 = Cpu{ + .name = "atmega256rfr2", + .llvm_name = "atmega256rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr6, + }, +}; + +pub const cpu_atmega32 = Cpu{ + .name = "atmega32", + .llvm_name = "atmega32", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega323 = Cpu{ + .name = "atmega323", + .llvm_name = "atmega323", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega324a = Cpu{ + .name = "atmega324a", + .llvm_name = "atmega324a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega324p = Cpu{ + .name = "atmega324p", + .llvm_name = "atmega324p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega324pa = Cpu{ + .name = "atmega324pa", + .llvm_name = "atmega324pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega325 = Cpu{ + .name = "atmega325", + .llvm_name = "atmega325", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3250 = Cpu{ + .name = "atmega3250", + .llvm_name = "atmega3250", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3250a = Cpu{ + .name = "atmega3250a", + .llvm_name = "atmega3250a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3250p = Cpu{ + .name = "atmega3250p", + .llvm_name = "atmega3250p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3250pa = Cpu{ + .name = "atmega3250pa", + .llvm_name = "atmega3250pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega325a = Cpu{ + .name = "atmega325a", + .llvm_name = "atmega325a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega325p = Cpu{ + .name = "atmega325p", + .llvm_name = "atmega325p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega325pa = Cpu{ + .name = "atmega325pa", + .llvm_name = "atmega325pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega328 = Cpu{ + .name = "atmega328", + .llvm_name = "atmega328", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega328p = Cpu{ + .name = "atmega328p", + .llvm_name = "atmega328p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega329 = Cpu{ + .name = "atmega329", + .llvm_name = "atmega329", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3290 = Cpu{ + .name = "atmega3290", + .llvm_name = "atmega3290", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3290a = Cpu{ + .name = "atmega3290a", + .llvm_name = "atmega3290a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3290p = Cpu{ + .name = "atmega3290p", + .llvm_name = "atmega3290p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega3290pa = Cpu{ + .name = "atmega3290pa", + .llvm_name = "atmega3290pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega329a = Cpu{ + .name = "atmega329a", + .llvm_name = "atmega329a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega329p = Cpu{ + .name = "atmega329p", + .llvm_name = "atmega329p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega329pa = Cpu{ + .name = "atmega329pa", + .llvm_name = "atmega329pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32a = Cpu{ + .name = "atmega32a", + .llvm_name = "atmega32a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32c1 = Cpu{ + .name = "atmega32c1", + .llvm_name = "atmega32c1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32hvb = Cpu{ + .name = "atmega32hvb", + .llvm_name = "atmega32hvb", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32hvbrevb = Cpu{ + .name = "atmega32hvbrevb", + .llvm_name = "atmega32hvbrevb", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32m1 = Cpu{ + .name = "atmega32m1", + .llvm_name = "atmega32m1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32u2 = Cpu{ + .name = "atmega32u2", + .llvm_name = "atmega32u2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_atmega32u4 = Cpu{ + .name = "atmega32u4", + .llvm_name = "atmega32u4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega32u6 = Cpu{ + .name = "atmega32u6", + .llvm_name = "atmega32u6", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega406 = Cpu{ + .name = "atmega406", + .llvm_name = "atmega406", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega48 = Cpu{ + .name = "atmega48", + .llvm_name = "atmega48", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega48a = Cpu{ + .name = "atmega48a", + .llvm_name = "atmega48a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega48p = Cpu{ + .name = "atmega48p", + .llvm_name = "atmega48p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega48pa = Cpu{ + .name = "atmega48pa", + .llvm_name = "atmega48pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega64 = Cpu{ + .name = "atmega64", + .llvm_name = "atmega64", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega640 = Cpu{ + .name = "atmega640", + .llvm_name = "atmega640", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega644 = Cpu{ + .name = "atmega644", + .llvm_name = "atmega644", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega644a = Cpu{ + .name = "atmega644a", + .llvm_name = "atmega644a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega644p = Cpu{ + .name = "atmega644p", + .llvm_name = "atmega644p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega644pa = Cpu{ + .name = "atmega644pa", + .llvm_name = "atmega644pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega644rfr2 = Cpu{ + .name = "atmega644rfr2", + .llvm_name = "atmega644rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega645 = Cpu{ + .name = "atmega645", + .llvm_name = "atmega645", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6450 = Cpu{ + .name = "atmega6450", + .llvm_name = "atmega6450", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6450a = Cpu{ + .name = "atmega6450a", + .llvm_name = "atmega6450a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6450p = Cpu{ + .name = "atmega6450p", + .llvm_name = "atmega6450p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega645a = Cpu{ + .name = "atmega645a", + .llvm_name = "atmega645a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega645p = Cpu{ + .name = "atmega645p", + .llvm_name = "atmega645p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega649 = Cpu{ + .name = "atmega649", + .llvm_name = "atmega649", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6490 = Cpu{ + .name = "atmega6490", + .llvm_name = "atmega6490", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6490a = Cpu{ + .name = "atmega6490a", + .llvm_name = "atmega6490a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega6490p = Cpu{ + .name = "atmega6490p", + .llvm_name = "atmega6490p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega649a = Cpu{ + .name = "atmega649a", + .llvm_name = "atmega649a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega649p = Cpu{ + .name = "atmega649p", + .llvm_name = "atmega649p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega64a = Cpu{ + .name = "atmega64a", + .llvm_name = "atmega64a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega64c1 = Cpu{ + .name = "atmega64c1", + .llvm_name = "atmega64c1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega64hve = Cpu{ + .name = "atmega64hve", + .llvm_name = "atmega64hve", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega64m1 = Cpu{ + .name = "atmega64m1", + .llvm_name = "atmega64m1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega64rfr2 = Cpu{ + .name = "atmega64rfr2", + .llvm_name = "atmega64rfr2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_atmega8 = Cpu{ + .name = "atmega8", + .llvm_name = "atmega8", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega8515 = Cpu{ + .name = "atmega8515", + .llvm_name = "atmega8515", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega8535 = Cpu{ + .name = "atmega8535", + .llvm_name = "atmega8535", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega88 = Cpu{ + .name = "atmega88", + .llvm_name = "atmega88", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega88a = Cpu{ + .name = "atmega88a", + .llvm_name = "atmega88a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega88p = Cpu{ + .name = "atmega88p", + .llvm_name = "atmega88p", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega88pa = Cpu{ + .name = "atmega88pa", + .llvm_name = "atmega88pa", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega8a = Cpu{ + .name = "atmega8a", + .llvm_name = "atmega8a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega8hva = Cpu{ + .name = "atmega8hva", + .llvm_name = "atmega8hva", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_atmega8u2 = Cpu{ + .name = "atmega8u2", + .llvm_name = "atmega8u2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_attiny10 = Cpu{ + .name = "attiny10", + .llvm_name = "attiny10", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny102 = Cpu{ + .name = "attiny102", + .llvm_name = "attiny102", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny104 = Cpu{ + .name = "attiny104", + .llvm_name = "attiny104", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny11 = Cpu{ + .name = "attiny11", + .llvm_name = "attiny11", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + &feature_avr1, + }, +}; + +pub const cpu_attiny12 = Cpu{ + .name = "attiny12", + .llvm_name = "attiny12", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + &feature_avr1, + }, +}; + +pub const cpu_attiny13 = Cpu{ + .name = "attiny13", + .llvm_name = "attiny13", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny13a = Cpu{ + .name = "attiny13a", + .llvm_name = "attiny13a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny15 = Cpu{ + .name = "attiny15", + .llvm_name = "attiny15", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + &feature_avr1, + }, +}; + +pub const cpu_attiny1634 = Cpu{ + .name = "attiny1634", + .llvm_name = "attiny1634", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_attiny167 = Cpu{ + .name = "attiny167", + .llvm_name = "attiny167", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_attiny20 = Cpu{ + .name = "attiny20", + .llvm_name = "attiny20", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny22 = Cpu{ + .name = "attiny22", + .llvm_name = "attiny22", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_attiny2313 = Cpu{ + .name = "attiny2313", + .llvm_name = "attiny2313", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny2313a = Cpu{ + .name = "attiny2313a", + .llvm_name = "attiny2313a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny24 = Cpu{ + .name = "attiny24", + .llvm_name = "attiny24", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny24a = Cpu{ + .name = "attiny24a", + .llvm_name = "attiny24a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny25 = Cpu{ + .name = "attiny25", + .llvm_name = "attiny25", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny26 = Cpu{ + .name = "attiny26", + .llvm_name = "attiny26", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + &feature_lpmx, + }, +}; + +pub const cpu_attiny261 = Cpu{ + .name = "attiny261", + .llvm_name = "attiny261", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny261a = Cpu{ + .name = "attiny261a", + .llvm_name = "attiny261a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny28 = Cpu{ + .name = "attiny28", + .llvm_name = "attiny28", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + &feature_avr1, + }, +}; + +pub const cpu_attiny4 = Cpu{ + .name = "attiny4", + .llvm_name = "attiny4", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny40 = Cpu{ + .name = "attiny40", + .llvm_name = "attiny40", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny4313 = Cpu{ + .name = "attiny4313", + .llvm_name = "attiny4313", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny43u = Cpu{ + .name = "attiny43u", + .llvm_name = "attiny43u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny44 = Cpu{ + .name = "attiny44", + .llvm_name = "attiny44", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny44a = Cpu{ + .name = "attiny44a", + .llvm_name = "attiny44a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny45 = Cpu{ + .name = "attiny45", + .llvm_name = "attiny45", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny461 = Cpu{ + .name = "attiny461", + .llvm_name = "attiny461", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny461a = Cpu{ + .name = "attiny461a", + .llvm_name = "attiny461a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny48 = Cpu{ + .name = "attiny48", + .llvm_name = "attiny48", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny5 = Cpu{ + .name = "attiny5", + .llvm_name = "attiny5", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_attiny828 = Cpu{ + .name = "attiny828", + .llvm_name = "attiny828", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny84 = Cpu{ + .name = "attiny84", + .llvm_name = "attiny84", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny84a = Cpu{ + .name = "attiny84a", + .llvm_name = "attiny84a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny85 = Cpu{ + .name = "attiny85", + .llvm_name = "attiny85", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny861 = Cpu{ + .name = "attiny861", + .llvm_name = "attiny861", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny861a = Cpu{ + .name = "attiny861a", + .llvm_name = "attiny861a", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny87 = Cpu{ + .name = "attiny87", + .llvm_name = "attiny87", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny88 = Cpu{ + .name = "attiny88", + .llvm_name = "attiny88", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_attiny9 = Cpu{ + .name = "attiny9", + .llvm_name = "attiny9", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_atxmega128a1 = Cpu{ + .name = "atxmega128a1", + .llvm_name = "atxmega128a1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega128a1u = Cpu{ + .name = "atxmega128a1u", + .llvm_name = "atxmega128a1u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128a3 = Cpu{ + .name = "atxmega128a3", + .llvm_name = "atxmega128a3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega128a3u = Cpu{ + .name = "atxmega128a3u", + .llvm_name = "atxmega128a3u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128a4u = Cpu{ + .name = "atxmega128a4u", + .llvm_name = "atxmega128a4u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128b1 = Cpu{ + .name = "atxmega128b1", + .llvm_name = "atxmega128b1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128b3 = Cpu{ + .name = "atxmega128b3", + .llvm_name = "atxmega128b3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128c3 = Cpu{ + .name = "atxmega128c3", + .llvm_name = "atxmega128c3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega128d3 = Cpu{ + .name = "atxmega128d3", + .llvm_name = "atxmega128d3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega128d4 = Cpu{ + .name = "atxmega128d4", + .llvm_name = "atxmega128d4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega16a4 = Cpu{ + .name = "atxmega16a4", + .llvm_name = "atxmega16a4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega16a4u = Cpu{ + .name = "atxmega16a4u", + .llvm_name = "atxmega16a4u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega16c4 = Cpu{ + .name = "atxmega16c4", + .llvm_name = "atxmega16c4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega16d4 = Cpu{ + .name = "atxmega16d4", + .llvm_name = "atxmega16d4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega16e5 = Cpu{ + .name = "atxmega16e5", + .llvm_name = "atxmega16e5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega192a3 = Cpu{ + .name = "atxmega192a3", + .llvm_name = "atxmega192a3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega192a3u = Cpu{ + .name = "atxmega192a3u", + .llvm_name = "atxmega192a3u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega192c3 = Cpu{ + .name = "atxmega192c3", + .llvm_name = "atxmega192c3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega192d3 = Cpu{ + .name = "atxmega192d3", + .llvm_name = "atxmega192d3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega256a3 = Cpu{ + .name = "atxmega256a3", + .llvm_name = "atxmega256a3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega256a3b = Cpu{ + .name = "atxmega256a3b", + .llvm_name = "atxmega256a3b", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega256a3bu = Cpu{ + .name = "atxmega256a3bu", + .llvm_name = "atxmega256a3bu", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega256a3u = Cpu{ + .name = "atxmega256a3u", + .llvm_name = "atxmega256a3u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega256c3 = Cpu{ + .name = "atxmega256c3", + .llvm_name = "atxmega256c3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega256d3 = Cpu{ + .name = "atxmega256d3", + .llvm_name = "atxmega256d3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega32a4 = Cpu{ + .name = "atxmega32a4", + .llvm_name = "atxmega32a4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega32a4u = Cpu{ + .name = "atxmega32a4u", + .llvm_name = "atxmega32a4u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega32c4 = Cpu{ + .name = "atxmega32c4", + .llvm_name = "atxmega32c4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega32d4 = Cpu{ + .name = "atxmega32d4", + .llvm_name = "atxmega32d4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega32e5 = Cpu{ + .name = "atxmega32e5", + .llvm_name = "atxmega32e5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega32x1 = Cpu{ + .name = "atxmega32x1", + .llvm_name = "atxmega32x1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega384c3 = Cpu{ + .name = "atxmega384c3", + .llvm_name = "atxmega384c3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega384d3 = Cpu{ + .name = "atxmega384d3", + .llvm_name = "atxmega384d3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega64a1 = Cpu{ + .name = "atxmega64a1", + .llvm_name = "atxmega64a1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega64a1u = Cpu{ + .name = "atxmega64a1u", + .llvm_name = "atxmega64a1u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64a3 = Cpu{ + .name = "atxmega64a3", + .llvm_name = "atxmega64a3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega64a3u = Cpu{ + .name = "atxmega64a3u", + .llvm_name = "atxmega64a3u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64a4u = Cpu{ + .name = "atxmega64a4u", + .llvm_name = "atxmega64a4u", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64b1 = Cpu{ + .name = "atxmega64b1", + .llvm_name = "atxmega64b1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64b3 = Cpu{ + .name = "atxmega64b3", + .llvm_name = "atxmega64b3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64c3 = Cpu{ + .name = "atxmega64c3", + .llvm_name = "atxmega64c3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_rmw, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmegau, + }, +}; + +pub const cpu_atxmega64d3 = Cpu{ + .name = "atxmega64d3", + .llvm_name = "atxmega64d3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega64d4 = Cpu{ + .name = "atxmega64d4", + .llvm_name = "atxmega64d4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_atxmega8e5 = Cpu{ + .name = "atxmega8e5", + .llvm_name = "atxmega8e5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avr1 = Cpu{ + .name = "avr1", + .llvm_name = "avr1", + .subfeatures = &[_]*const Feature { + &feature_avr0, + &feature_lpm, + &feature_avr1, + }, +}; + +pub const cpu_avr2 = Cpu{ + .name = "avr2", + .llvm_name = "avr2", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr2, + }, +}; + +pub const cpu_avr25 = Cpu{ + .name = "avr25", + .llvm_name = "avr25", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr25, + }, +}; + +pub const cpu_avr3 = Cpu{ + .name = "avr3", + .llvm_name = "avr3", + .subfeatures = &[_]*const Feature { + &feature_ijmpcall, + &feature_jmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_addsubiw, + &feature_avr3, + }, +}; + +pub const cpu_avr31 = Cpu{ + .name = "avr31", + .llvm_name = "avr31", + .subfeatures = &[_]*const Feature { + &feature_jmpcall, + &feature_ijmpcall, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_elpm, + &feature_addsubiw, + &feature_avr31, + }, +}; + +pub const cpu_avr35 = Cpu{ + .name = "avr35", + .llvm_name = "avr35", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr35, + }, +}; + +pub const cpu_avr4 = Cpu{ + .name = "avr4", + .llvm_name = "avr4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr4, + }, +}; + +pub const cpu_avr5 = Cpu{ + .name = "avr5", + .llvm_name = "avr5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpu_avr51 = Cpu{ + .name = "avr51", + .llvm_name = "avr51", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr51, + }, +}; + +pub const cpu_avr6 = Cpu{ + .name = "avr6", + .llvm_name = "avr6", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_avr6, + }, +}; + +pub const cpu_avrtiny = Cpu{ + .name = "avrtiny", + .llvm_name = "avrtiny", + .subfeatures = &[_]*const Feature { + &feature_tinyencoding, + &feature_sram, + &feature_break, + &feature_avr0, + &feature_avrtiny, + }, +}; + +pub const cpu_avrxmega1 = Cpu{ + .name = "avrxmega1", + .llvm_name = "avrxmega1", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega2 = Cpu{ + .name = "avrxmega2", + .llvm_name = "avrxmega2", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega3 = Cpu{ + .name = "avrxmega3", + .llvm_name = "avrxmega3", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega4 = Cpu{ + .name = "avrxmega4", + .llvm_name = "avrxmega4", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega5 = Cpu{ + .name = "avrxmega5", + .llvm_name = "avrxmega5", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega6 = Cpu{ + .name = "avrxmega6", + .llvm_name = "avrxmega6", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_avrxmega7 = Cpu{ + .name = "avrxmega7", + .llvm_name = "avrxmega7", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_spmx, + &feature_lpm, + &feature_eijmpcall, + &feature_break, + &feature_spm, + &feature_elpmx, + &feature_elpm, + &feature_addsubiw, + &feature_des, + &feature_xmega, + }, +}; + +pub const cpu_m3000 = Cpu{ + .name = "m3000", + .llvm_name = "m3000", + .subfeatures = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_mul, + &feature_avr0, + &feature_lpm, + &feature_break, + &feature_spm, + &feature_addsubiw, + &feature_avr5, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_at43usb320, + &cpu_at43usb355, + &cpu_at76c711, + &cpu_at86rf401, + &cpu_at90c8534, + &cpu_at90can128, + &cpu_at90can32, + &cpu_at90can64, + &cpu_at90pwm1, + &cpu_at90pwm161, + &cpu_at90pwm2, + &cpu_at90pwm216, + &cpu_at90pwm2b, + &cpu_at90pwm3, + &cpu_at90pwm316, + &cpu_at90pwm3b, + &cpu_at90pwm81, + &cpu_at90s1200, + &cpu_at90s2313, + &cpu_at90s2323, + &cpu_at90s2333, + &cpu_at90s2343, + &cpu_at90s4414, + &cpu_at90s4433, + &cpu_at90s4434, + &cpu_at90s8515, + &cpu_at90s8535, + &cpu_at90scr100, + &cpu_at90usb1286, + &cpu_at90usb1287, + &cpu_at90usb162, + &cpu_at90usb646, + &cpu_at90usb647, + &cpu_at90usb82, + &cpu_at94k, + &cpu_ata5272, + &cpu_ata5505, + &cpu_ata5790, + &cpu_ata5795, + &cpu_ata6285, + &cpu_ata6286, + &cpu_ata6289, + &cpu_atmega103, + &cpu_atmega128, + &cpu_atmega1280, + &cpu_atmega1281, + &cpu_atmega1284, + &cpu_atmega1284p, + &cpu_atmega1284rfr2, + &cpu_atmega128a, + &cpu_atmega128rfa1, + &cpu_atmega128rfr2, + &cpu_atmega16, + &cpu_atmega161, + &cpu_atmega162, + &cpu_atmega163, + &cpu_atmega164a, + &cpu_atmega164p, + &cpu_atmega164pa, + &cpu_atmega165, + &cpu_atmega165a, + &cpu_atmega165p, + &cpu_atmega165pa, + &cpu_atmega168, + &cpu_atmega168a, + &cpu_atmega168p, + &cpu_atmega168pa, + &cpu_atmega169, + &cpu_atmega169a, + &cpu_atmega169p, + &cpu_atmega169pa, + &cpu_atmega16a, + &cpu_atmega16hva, + &cpu_atmega16hva2, + &cpu_atmega16hvb, + &cpu_atmega16hvbrevb, + &cpu_atmega16m1, + &cpu_atmega16u2, + &cpu_atmega16u4, + &cpu_atmega2560, + &cpu_atmega2561, + &cpu_atmega2564rfr2, + &cpu_atmega256rfr2, + &cpu_atmega32, + &cpu_atmega323, + &cpu_atmega324a, + &cpu_atmega324p, + &cpu_atmega324pa, + &cpu_atmega325, + &cpu_atmega3250, + &cpu_atmega3250a, + &cpu_atmega3250p, + &cpu_atmega3250pa, + &cpu_atmega325a, + &cpu_atmega325p, + &cpu_atmega325pa, + &cpu_atmega328, + &cpu_atmega328p, + &cpu_atmega329, + &cpu_atmega3290, + &cpu_atmega3290a, + &cpu_atmega3290p, + &cpu_atmega3290pa, + &cpu_atmega329a, + &cpu_atmega329p, + &cpu_atmega329pa, + &cpu_atmega32a, + &cpu_atmega32c1, + &cpu_atmega32hvb, + &cpu_atmega32hvbrevb, + &cpu_atmega32m1, + &cpu_atmega32u2, + &cpu_atmega32u4, + &cpu_atmega32u6, + &cpu_atmega406, + &cpu_atmega48, + &cpu_atmega48a, + &cpu_atmega48p, + &cpu_atmega48pa, + &cpu_atmega64, + &cpu_atmega640, + &cpu_atmega644, + &cpu_atmega644a, + &cpu_atmega644p, + &cpu_atmega644pa, + &cpu_atmega644rfr2, + &cpu_atmega645, + &cpu_atmega6450, + &cpu_atmega6450a, + &cpu_atmega6450p, + &cpu_atmega645a, + &cpu_atmega645p, + &cpu_atmega649, + &cpu_atmega6490, + &cpu_atmega6490a, + &cpu_atmega6490p, + &cpu_atmega649a, + &cpu_atmega649p, + &cpu_atmega64a, + &cpu_atmega64c1, + &cpu_atmega64hve, + &cpu_atmega64m1, + &cpu_atmega64rfr2, + &cpu_atmega8, + &cpu_atmega8515, + &cpu_atmega8535, + &cpu_atmega88, + &cpu_atmega88a, + &cpu_atmega88p, + &cpu_atmega88pa, + &cpu_atmega8a, + &cpu_atmega8hva, + &cpu_atmega8u2, + &cpu_attiny10, + &cpu_attiny102, + &cpu_attiny104, + &cpu_attiny11, + &cpu_attiny12, + &cpu_attiny13, + &cpu_attiny13a, + &cpu_attiny15, + &cpu_attiny1634, + &cpu_attiny167, + &cpu_attiny20, + &cpu_attiny22, + &cpu_attiny2313, + &cpu_attiny2313a, + &cpu_attiny24, + &cpu_attiny24a, + &cpu_attiny25, + &cpu_attiny26, + &cpu_attiny261, + &cpu_attiny261a, + &cpu_attiny28, + &cpu_attiny4, + &cpu_attiny40, + &cpu_attiny4313, + &cpu_attiny43u, + &cpu_attiny44, + &cpu_attiny44a, + &cpu_attiny45, + &cpu_attiny461, + &cpu_attiny461a, + &cpu_attiny48, + &cpu_attiny5, + &cpu_attiny828, + &cpu_attiny84, + &cpu_attiny84a, + &cpu_attiny85, + &cpu_attiny861, + &cpu_attiny861a, + &cpu_attiny87, + &cpu_attiny88, + &cpu_attiny9, + &cpu_atxmega128a1, + &cpu_atxmega128a1u, + &cpu_atxmega128a3, + &cpu_atxmega128a3u, + &cpu_atxmega128a4u, + &cpu_atxmega128b1, + &cpu_atxmega128b3, + &cpu_atxmega128c3, + &cpu_atxmega128d3, + &cpu_atxmega128d4, + &cpu_atxmega16a4, + &cpu_atxmega16a4u, + &cpu_atxmega16c4, + &cpu_atxmega16d4, + &cpu_atxmega16e5, + &cpu_atxmega192a3, + &cpu_atxmega192a3u, + &cpu_atxmega192c3, + &cpu_atxmega192d3, + &cpu_atxmega256a3, + &cpu_atxmega256a3b, + &cpu_atxmega256a3bu, + &cpu_atxmega256a3u, + &cpu_atxmega256c3, + &cpu_atxmega256d3, + &cpu_atxmega32a4, + &cpu_atxmega32a4u, + &cpu_atxmega32c4, + &cpu_atxmega32d4, + &cpu_atxmega32e5, + &cpu_atxmega32x1, + &cpu_atxmega384c3, + &cpu_atxmega384d3, + &cpu_atxmega64a1, + &cpu_atxmega64a1u, + &cpu_atxmega64a3, + &cpu_atxmega64a3u, + &cpu_atxmega64a4u, + &cpu_atxmega64b1, + &cpu_atxmega64b3, + &cpu_atxmega64c3, + &cpu_atxmega64d3, + &cpu_atxmega64d4, + &cpu_atxmega8e5, + &cpu_avr1, + &cpu_avr2, + &cpu_avr25, + &cpu_avr3, + &cpu_avr31, + &cpu_avr35, + &cpu_avr4, + &cpu_avr5, + &cpu_avr51, + &cpu_avr6, + &cpu_avrtiny, + &cpu_avrxmega1, + &cpu_avrxmega2, + &cpu_avrxmega3, + &cpu_avrxmega4, + &cpu_avrxmega5, + &cpu_avrxmega6, + &cpu_avrxmega7, + &cpu_m3000, +}; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig new file mode 100644 index 0000000000000000000000000000000000000000..8a504eaf9e23d4a19625be4328bb606ce212bac1 --- /dev/null +++ b/lib/std/target/bpf.zig @@ -0,0 +1,75 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_alu32 = Feature{ + .name = "alu32", + .description = "Enable ALU32 instructions", + .llvm_name = "alu32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dummy = Feature{ + .name = "dummy", + .description = "unused feature", + .llvm_name = "dummy", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dwarfris = Feature{ + .name = "dwarfris", + .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", + .llvm_name = "dwarfris", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_alu32, + &feature_dummy, + &feature_dwarfris, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_probe = Cpu{ + .name = "probe", + .llvm_name = "probe", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_v1 = Cpu{ + .name = "v1", + .llvm_name = "v1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_v2 = Cpu{ + .name = "v2", + .llvm_name = "v2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_v3 = Cpu{ + .name = "v3", + .llvm_name = "v3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_probe, + &cpu_v1, + &cpu_v2, + &cpu_v3, +}; diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig deleted file mode 100644 index 99c375874b9b66dbfbd4df2da7a14e2d76ee2255..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu.zig +++ /dev/null @@ -1,67 +0,0 @@ -const std = @import("std"); - -const feature = @import("feature.zig"); -const Arch = std.Target.Arch; - -pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu; -pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu; -pub const ArmCpu = @import("cpu/ArmCpu.zig").ArmCpu; -pub const AvrCpu = @import("cpu/AvrCpu.zig").AvrCpu; -pub const BpfCpu = @import("cpu/BpfCpu.zig").BpfCpu; -pub const HexagonCpu = @import("cpu/HexagonCpu.zig").HexagonCpu; -pub const MipsCpu = @import("cpu/MipsCpu.zig").MipsCpu; -pub const Msp430Cpu = @import("cpu/Msp430Cpu.zig").Msp430Cpu; -pub const NvptxCpu = @import("cpu/NvptxCpu.zig").NvptxCpu; -pub const PowerPcCpu = @import("cpu/PowerPcCpu.zig").PowerPcCpu; -pub const RiscVCpu = @import("cpu/RiscVCpu.zig").RiscVCpu; -pub const SparcCpu = @import("cpu/SparcCpu.zig").SparcCpu; -pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu; -pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu; -pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu; - -pub const EmptyCpu = @import("cpu/empty.zig").EmptyCpu; - -pub fn ArchCpu(comptime arch: @TagType(Arch)) type { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => ArmCpu, - .aarch64, .aarch64_be, .aarch64_32 => AArch64Cpu, - .avr => AvrCpu, - .bpfel, .bpfeb => BpfCpu, - .hexagon => HexagonCpu, - .mips, .mipsel, .mips64, .mips64el => MipsCpu, - .msp430 => Msp430Cpu, - .powerpc, .powerpc64, .powerpc64le => PowerPcCpu, - .amdgcn => AmdGpuCpu, - .riscv32, .riscv64 => RiscVCpu, - .sparc, .sparcv9, .sparcel => SparcCpu, - .s390x => SystemZCpu, - .i386, .x86_64 => X86Cpu, - .nvptx, .nvptx64 => NvptxCpu, - .wasm32, .wasm64 => WebAssemblyCpu, - - else => EmptyCpu, - }; -} - -pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type { - return CpuInfo(ArchCpu(arch), feature.ArchFeature(arch)); -} - -pub fn CpuInfo(comptime CpuType: type, comptime FeatureType: type) type { - return struct { - value: CpuType, - name: []const u8, - - features: []const FeatureType, - - const Self = @This(); - - pub fn create(value: CpuType, name: []const u8, features: []const FeatureType) Self { - return Self { - .value = value, - .name = name, - .features = features, - }; - } - }; -} diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig deleted file mode 100644 index 1fb36080fd32ae600bea25a4cdd034d273103039..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/AArch64Cpu.zig +++ /dev/null @@ -1,480 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const AArch64Cpu = enum { - AppleLatest, - CortexA35, - CortexA53, - CortexA55, - CortexA57, - CortexA65, - CortexA65ae, - CortexA72, - CortexA73, - CortexA75, - CortexA76, - CortexA76ae, - Cyclone, - ExynosM1, - ExynosM2, - ExynosM3, - ExynosM4, - ExynosM5, - Falkor, - Generic, - Kryo, - NeoverseE1, - NeoverseN1, - Saphira, - Thunderx, - Thunderx2t99, - Thunderxt81, - Thunderxt83, - Thunderxt88, - Tsv110, - - const FeatureType = feature.AArch64Feature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.AppleLatest, "apple-latest", &[_]FeatureType { - .ArithBccFusion, - .ArithCbzFusion, - .ZczFp, - .AlternateSextloadCvtF32Pattern, - .DisableLatencySchedHeuristic, - .Perfmon, - .ZczGp, - .ZczFpWorkaround, - .Zcm, - .FpArmv8, - .FuseCryptoEor, - .FuseAes, - .Cyclone, - }), - CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType { - .Perfmon, - .FpArmv8, - .Crc, - .A35, - }), - CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .CustomCheapAsMove, - .BalanceFpOps, - .UseAa, - .FpArmv8, - .FuseAes, - .A53, - }), - CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Perfmon, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .FuseAes, - .A55, - }), - CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .BalanceFpOps, - .FuseLiterals, - .FpArmv8, - .FuseAes, - .A57, - }), - CpuInfo(@This(), FeatureType).create(.CortexA65, "cortex-a65", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .A65, - }), - CpuInfo(@This(), FeatureType).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .A65, - }), - CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType { - .Perfmon, - .FpArmv8, - .Crc, - .FuseAes, - .A72, - }), - CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType { - .Perfmon, - .FpArmv8, - .Crc, - .FuseAes, - .A73, - }), - CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Perfmon, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .FuseAes, - .A75, - }), - CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .A76, - }), - CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .A76, - }), - CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType { - .ArithBccFusion, - .ArithCbzFusion, - .ZczFp, - .AlternateSextloadCvtF32Pattern, - .DisableLatencySchedHeuristic, - .Perfmon, - .ZczGp, - .ZczFpWorkaround, - .Zcm, - .FpArmv8, - .FuseCryptoEor, - .FuseAes, - .Cyclone, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .UseReciprocalSquareRoot, - .CustomCheapAsMove, - .Force32bitJumpTables, - .SlowMisaligned128store, - .FpArmv8, - .SlowPaired128, - .FuseAes, - .Exynosm1, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .CustomCheapAsMove, - .Force32bitJumpTables, - .SlowMisaligned128store, - .FpArmv8, - .SlowPaired128, - .FuseAes, - .Exynosm2, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType { - .FuseCsel, - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .Force32bitJumpTables, - .FuseLiterals, - .FuseAddress, - .LslFast, - .FpArmv8, - .FuseAes, - .Exynosm3, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType { - .ArithBccFusion, - .Vh, - .ArithCbzFusion, - .ZczFp, - .Rdm, - .UsePostraScheduler, - .Ras, - .Force32bitJumpTables, - .Ccpp, - .FuseCsel, - .Pan, - .Uaops, - .FuseLiterals, - .LslFast, - .Lse, - .Perfmon, - .Dotprod, - .Lor, - .FuseArithLogic, - .Crc, - .CustomCheapAsMove, - .FuseAddress, - .ZczGp, - .FpArmv8, - .FuseAes, - .Exynosm4, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType { - .ArithBccFusion, - .Vh, - .ArithCbzFusion, - .ZczFp, - .Rdm, - .UsePostraScheduler, - .Ras, - .Force32bitJumpTables, - .Ccpp, - .FuseCsel, - .Pan, - .Uaops, - .FuseLiterals, - .LslFast, - .Lse, - .Perfmon, - .Dotprod, - .Lor, - .FuseArithLogic, - .Crc, - .CustomCheapAsMove, - .FuseAddress, - .ZczGp, - .FpArmv8, - .FuseAes, - .Exynosm4, - }), - CpuInfo(@This(), FeatureType).create(.Falkor, "falkor", &[_]FeatureType { - .ZczFp, - .Rdm, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .ZczGp, - .FpArmv8, - .SlowStrqroStore, - .LslFast, - .Falkor, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - .Trbe, - .Ete, - .FpArmv8, - .FuseAes, - .Neon, - .Perfmon, - .UsePostraScheduler, - }), - CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .ZczGp, - .FpArmv8, - .LslFast, - .Kryo, - }), - CpuInfo(@This(), FeatureType).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .Neoversee1, - }), - CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { - .Lse, - .Spe, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .Neoversen1, - }), - CpuInfo(@This(), FeatureType).create(.Saphira, "saphira", &[_]FeatureType { - .Spe, - .Vh, - .ZczFp, - .Rdm, - .UsePostraScheduler, - .Dit, - .Am, - .Ras, - .Rcpc, - .Sel2, - .Ccpp, - .Pa, - .Pan, - .Uaops, - .Tracev84, - .Mpam, - .LslFast, - .Lse, - .Nv, - .Perfmon, - .Dotprod, - .TlbRmi, - .Lor, - .Ccidx, - .PredictableSelectExpensive, - .Crc, - .CustomCheapAsMove, - .Fmi, - .ZczGp, - .FpArmv8, - .Saphira, - }), - CpuInfo(@This(), FeatureType).create(.Thunderx, "thunderx", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - .Thunderx, - }), - CpuInfo(@This(), FeatureType).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType { - .Lse, - .ArithBccFusion, - .Vh, - .Rdm, - .UsePostraScheduler, - .Crc, - .Lor, - .Pan, - .AggressiveFma, - .FpArmv8, - .PredictableSelectExpensive, - .Thunderx2t99, - }), - CpuInfo(@This(), FeatureType).create(.Thunderxt81, "thunderxt81", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - .Thunderxt81, - }), - CpuInfo(@This(), FeatureType).create(.Thunderxt83, "thunderxt83", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - .Thunderxt83, - }), - CpuInfo(@This(), FeatureType).create(.Thunderxt88, "thunderxt88", &[_]FeatureType { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - .Thunderxt88, - }), - CpuInfo(@This(), FeatureType).create(.Tsv110, "tsv110", &[_]FeatureType { - .Lse, - .Spe, - .Vh, - .Rdm, - .Perfmon, - .UsePostraScheduler, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .CustomCheapAsMove, - .Ras, - .Ccpp, - .FpArmv8, - .FuseAes, - .Tsv110, - }), - }; -}; diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig deleted file mode 100644 index 3f05f6033578a4966b2901382ff3de75313898f2..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/AmdGpuCpu.zig +++ /dev/null @@ -1,1060 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const AmdGpuCpu = enum { - Bonaire, - Carrizo, - Fiji, - Generic, - GenericHsa, - Gfx1010, - Gfx1011, - Gfx1012, - Gfx600, - Gfx601, - Gfx700, - Gfx701, - Gfx702, - Gfx703, - Gfx704, - Gfx801, - Gfx802, - Gfx803, - Gfx810, - Gfx900, - Gfx902, - Gfx904, - Gfx906, - Gfx908, - Gfx909, - Hainan, - Hawaii, - Iceland, - Kabini, - Kaveri, - Mullins, - Oland, - Pitcairn, - Polaris10, - Polaris11, - Stoney, - Tahiti, - Tonga, - Verde, - - const FeatureType = feature.AmdGpuFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Bonaire, "bonaire", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Carrizo, "carrizo", &[_]FeatureType { - .CodeObjectV3, - .FastFmaf, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - .Xnack, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Fiji, "fiji", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - .Wavefrontsize64, - }), - CpuInfo(@This(), FeatureType).create(.GenericHsa, "generic-hsa", &[_]FeatureType { - .FlatAddressSpace, - .Wavefrontsize64, - }), - CpuInfo(@This(), FeatureType).create(.Gfx1010, "gfx1010", &[_]FeatureType { - .CodeObjectV3, - .DlInsts, - .NoXnackSupport, - .FlatSegmentOffsetBug, - .Vscnt, - .ApertureRegs, - .Gfx10Insts, - .IntClampInsts, - .PkFmacF16Inst, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .Movrel, - .SMemrealtime, - .NoSdstCmpx, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .NoSramEccSupport, - .SdwaSdst, - .FlatInstOffsets, - .RegisterBanking, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .Dpp8, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .FmaMixInsts, - .MimgR128, - .Vop3Literal, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .NoDataDepHazard, - .Gfx10, - .InstFwdPrefetchBug, - .Ldsbankcount32, - .LdsBranchVmemWarHazard, - .LdsMisalignedBug, - .NsaEncoding, - .NsaToVmemBug, - .Offset3fBug, - .SmemToVectorWriteHazard, - .ScalarAtomics, - .ScalarFlatScratchInsts, - .ScalarStores, - .VmemToScalarWriteHazard, - .VcmpxExecWarHazard, - .VcmpxPermlaneHazard, - .Wavefrontsize32, - }), - CpuInfo(@This(), FeatureType).create(.Gfx1011, "gfx1011", &[_]FeatureType { - .CodeObjectV3, - .DlInsts, - .NoXnackSupport, - .Dot1Insts, - .Dot2Insts, - .Dot5Insts, - .Dot6Insts, - .FlatSegmentOffsetBug, - .Vscnt, - .ApertureRegs, - .Gfx10Insts, - .IntClampInsts, - .PkFmacF16Inst, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .Movrel, - .SMemrealtime, - .NoSdstCmpx, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .NoSramEccSupport, - .SdwaSdst, - .FlatInstOffsets, - .RegisterBanking, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .Dpp8, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .FmaMixInsts, - .MimgR128, - .Vop3Literal, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .NoDataDepHazard, - .Gfx10, - .InstFwdPrefetchBug, - .Ldsbankcount32, - .LdsBranchVmemWarHazard, - .NsaEncoding, - .NsaToVmemBug, - .Offset3fBug, - .SmemToVectorWriteHazard, - .ScalarAtomics, - .ScalarFlatScratchInsts, - .ScalarStores, - .VmemToScalarWriteHazard, - .VcmpxExecWarHazard, - .VcmpxPermlaneHazard, - .Wavefrontsize32, - }), - CpuInfo(@This(), FeatureType).create(.Gfx1012, "gfx1012", &[_]FeatureType { - .CodeObjectV3, - .DlInsts, - .NoXnackSupport, - .Dot1Insts, - .Dot2Insts, - .Dot5Insts, - .Dot6Insts, - .FlatSegmentOffsetBug, - .Vscnt, - .ApertureRegs, - .Gfx10Insts, - .IntClampInsts, - .PkFmacF16Inst, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .Movrel, - .SMemrealtime, - .NoSdstCmpx, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .NoSramEccSupport, - .SdwaSdst, - .FlatInstOffsets, - .RegisterBanking, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .Dpp8, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .FmaMixInsts, - .MimgR128, - .Vop3Literal, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .NoDataDepHazard, - .Gfx10, - .InstFwdPrefetchBug, - .Ldsbankcount32, - .LdsBranchVmemWarHazard, - .LdsMisalignedBug, - .NsaEncoding, - .NsaToVmemBug, - .Offset3fBug, - .SmemToVectorWriteHazard, - .ScalarAtomics, - .ScalarFlatScratchInsts, - .ScalarStores, - .VmemToScalarWriteHazard, - .VcmpxExecWarHazard, - .VcmpxPermlaneHazard, - .Wavefrontsize32, - }), - CpuInfo(@This(), FeatureType).create(.Gfx600, "gfx600", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .FastFmaf, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Gfx601, "gfx601", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx700, "gfx700", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx701, "gfx701", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .FastFmaf, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Gfx702, "gfx702", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .FastFmaf, - .Ldsbankcount16, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx703, "gfx703", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount16, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx704, "gfx704", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx801, "gfx801", &[_]FeatureType { - .CodeObjectV3, - .FastFmaf, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - .Xnack, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Gfx802, "gfx802", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .SgprInitBug, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx803, "gfx803", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Gfx810, "gfx810", &[_]FeatureType { - .CodeObjectV3, - .Ldsbankcount16, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - .Xnack, - }), - CpuInfo(@This(), FeatureType).create(.Gfx900, "gfx900", &[_]FeatureType { - .CodeObjectV3, - .NoSramEccSupport, - .NoXnackSupport, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - .MadMixInsts, - }), - CpuInfo(@This(), FeatureType).create(.Gfx902, "gfx902", &[_]FeatureType { - .CodeObjectV3, - .NoSramEccSupport, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - .MadMixInsts, - .Xnack, - }), - CpuInfo(@This(), FeatureType).create(.Gfx904, "gfx904", &[_]FeatureType { - .CodeObjectV3, - .NoSramEccSupport, - .NoXnackSupport, - .FmaMixInsts, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - }), - CpuInfo(@This(), FeatureType).create(.Gfx906, "gfx906", &[_]FeatureType { - .CodeObjectV3, - .DlInsts, - .NoXnackSupport, - .Dot1Insts, - .Dot2Insts, - .FmaMixInsts, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Gfx908, "gfx908", &[_]FeatureType { - .AtomicFaddInsts, - .CodeObjectV3, - .DlInsts, - .Dot1Insts, - .Dot2Insts, - .Dot3Insts, - .Dot4Insts, - .Dot5Insts, - .Dot6Insts, - .FmaMixInsts, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - .MaiInsts, - .MfmaInlineLiteralBug, - .PkFmacF16Inst, - .SramEcc, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Gfx909, "gfx909", &[_]FeatureType { - .CodeObjectV3, - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .Gfx9, - .Ldsbankcount32, - .MadMixInsts, - .Xnack, - }), - CpuInfo(@This(), FeatureType).create(.Hainan, "hainan", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - }), - CpuInfo(@This(), FeatureType).create(.Hawaii, "hawaii", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .FastFmaf, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Iceland, "iceland", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .SgprInitBug, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Kabini, "kabini", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount16, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Kaveri, "kaveri", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Mullins, "mullins", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount16, - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - .SeaIslands, - }), - CpuInfo(@This(), FeatureType).create(.Oland, "oland", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - }), - CpuInfo(@This(), FeatureType).create(.Pitcairn, "pitcairn", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - }), - CpuInfo(@This(), FeatureType).create(.Polaris10, "polaris10", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Polaris11, "polaris11", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Stoney, "stoney", &[_]FeatureType { - .CodeObjectV3, - .Ldsbankcount16, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - .Xnack, - }), - CpuInfo(@This(), FeatureType).create(.Tahiti, "tahiti", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .FastFmaf, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - .HalfRate64Ops, - }), - CpuInfo(@This(), FeatureType).create(.Tonga, "tonga", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .SgprInitBug, - .UnpackedD16Vmem, - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - .VolcanicIslands, - }), - CpuInfo(@This(), FeatureType).create(.Verde, "verde", &[_]FeatureType { - .CodeObjectV3, - .NoXnackSupport, - .Ldsbankcount32, - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .Wavefrontsize64, - .NoSramEccSupport, - .Localmemorysize32768, - .SouthernIslands, - }), - }; -}; diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig deleted file mode 100644 index bb5179464495be7269191ad2161a59d4cc275dfe..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/ArmCpu.zig +++ /dev/null @@ -1,1230 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const ArmCpu = enum { - Arm1020e, - Arm1020t, - Arm1022e, - Arm10e, - Arm10tdmi, - Arm1136jS, - Arm1136jfS, - Arm1156t2S, - Arm1156t2fS, - Arm1176jS, - Arm1176jzS, - Arm1176jzfS, - Arm710t, - Arm720t, - Arm7tdmi, - Arm7tdmiS, - Arm8, - Arm810, - Arm9, - Arm920, - Arm920t, - Arm922t, - Arm926ejS, - Arm940t, - Arm946eS, - Arm966eS, - Arm968eS, - Arm9e, - Arm9tdmi, - CortexA12, - CortexA15, - CortexA17, - CortexA32, - CortexA35, - CortexA5, - CortexA53, - CortexA55, - CortexA57, - CortexA7, - CortexA72, - CortexA73, - CortexA75, - CortexA76, - CortexA76ae, - CortexA8, - CortexA9, - CortexM0, - CortexM0plus, - CortexM1, - CortexM23, - CortexM3, - CortexM33, - CortexM35p, - CortexM4, - CortexM7, - CortexR4, - CortexR4f, - CortexR5, - CortexR52, - CortexR7, - CortexR8, - Cyclone, - Ep9312, - ExynosM1, - ExynosM2, - ExynosM3, - ExynosM4, - ExynosM5, - Generic, - Iwmmxt, - Krait, - Kryo, - Mpcore, - Mpcorenovfp, - NeoverseN1, - Sc000, - Sc300, - Strongarm, - Strongarm110, - Strongarm1100, - Strongarm1110, - Swift, - Xscale, - - const FeatureType = feature.ArmFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Arm1020e, "arm1020e", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm1020t, "arm1020t", &[_]FeatureType { - .V4t, - .Armv5t, - }), - CpuInfo(@This(), FeatureType).create(.Arm1022e, "arm1022e", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm10e, "arm10e", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType { - .V4t, - .Armv5t, - }), - CpuInfo(@This(), FeatureType).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType { - .V4t, - .Dsp, - .Armv6, - }), - CpuInfo(@This(), FeatureType).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType { - .V4t, - .Dsp, - .Armv6, - .Slowfpvmlx, - .Fpregs, - .Vfp2, - }), - CpuInfo(@This(), FeatureType).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType { - .V4t, - .Thumb2, - .Dsp, - .Armv6t2, - }), - CpuInfo(@This(), FeatureType).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType { - .V4t, - .Thumb2, - .Dsp, - .Armv6t2, - .Slowfpvmlx, - .Fpregs, - .Vfp2, - }), - CpuInfo(@This(), FeatureType).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType { - .V4t, - .Trustzone, - .Armv6kz, - }), - CpuInfo(@This(), FeatureType).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType { - .V4t, - .Trustzone, - .Armv6kz, - }), - CpuInfo(@This(), FeatureType).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType { - .V4t, - .Trustzone, - .Armv6kz, - .Slowfpvmlx, - .Fpregs, - .Vfp2, - }), - CpuInfo(@This(), FeatureType).create(.Arm710t, "arm710t", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm720t, "arm720t", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm8, "arm8", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Arm810, "arm810", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Arm9, "arm9", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm920, "arm920", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm920t, "arm920t", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm922t, "arm922t", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm940t, "arm940t", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.Arm946eS, "arm946e-s", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm966eS, "arm966e-s", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm968eS, "arm968e-s", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm9e, "arm9e", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.CortexA12, "cortex-a12", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidPartialCpsr, - .RetAddrStack, - .Mp, - .Trustzone, - .Fp16, - .Vfp4, - .VmlxForwarding, - .HwdivArm, - .Hwdiv, - .Virtualization, - .A12, - }), - CpuInfo(@This(), FeatureType).create(.CortexA15, "cortex-a15", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidPartialCpsr, - .VldnAlign, - .DontWidenVmovs, - .RetAddrStack, - .Mp, - .MuxedUnits, - .SplatVfpNeon, - .Trustzone, - .Fp16, - .Vfp4, - .HwdivArm, - .Hwdiv, - .Virtualization, - .A15, - }), - CpuInfo(@This(), FeatureType).create(.CortexA17, "cortex-a17", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidPartialCpsr, - .RetAddrStack, - .Mp, - .Trustzone, - .Fp16, - .Vfp4, - .VmlxForwarding, - .HwdivArm, - .Hwdiv, - .Virtualization, - .A17, - }), - CpuInfo(@This(), FeatureType).create(.CortexA32, "cortex-a32", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - }), - CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - .A35, - }), - CpuInfo(@This(), FeatureType).create(.CortexA5, "cortex-a5", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .RetAddrStack, - .Slowfpvmlx, - .Mp, - .SlowFpBrcc, - .Trustzone, - .Fp16, - .Vfp4, - .VmlxForwarding, - .A5, - }), - CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - .Fpao, - .A53, - }), - CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Dotprod, - .A55, - }), - CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .AvoidPartialCpsr, - .CheapPredicableCpsr, - .Crypto, - .Fpao, - .A57, - }), - CpuInfo(@This(), FeatureType).create(.CortexA7, "cortex-a7", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .RetAddrStack, - .Slowfpvmlx, - .VmlxHazards, - .Mp, - .SlowFpBrcc, - .Trustzone, - .Fp16, - .Vfp4, - .VmlxForwarding, - .HwdivArm, - .Hwdiv, - .Virtualization, - .A7, - }), - CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - .A72, - }), - CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - .A73, - }), - CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Dotprod, - .A75, - }), - CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Crypto, - .Dotprod, - .Fullfp16, - .A76, - }), - CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Crypto, - .Dotprod, - .Fullfp16, - .A76, - }), - CpuInfo(@This(), FeatureType).create(.CortexA8, "cortex-a8", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .RetAddrStack, - .Slowfpvmlx, - .VmlxHazards, - .NonpipelinedVfp, - .SlowFpBrcc, - .Trustzone, - .VmlxForwarding, - .A8, - }), - CpuInfo(@This(), FeatureType).create(.CortexA9, "cortex-a9", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidPartialCpsr, - .VldnAlign, - .ExpandFpMlx, - .Fp16, - .RetAddrStack, - .VmlxHazards, - .Mp, - .MuxedUnits, - .NeonFpmovs, - .PreferVmovsr, - .Trustzone, - .VmlxForwarding, - .A9, - }), - CpuInfo(@This(), FeatureType).create(.CortexM0, "cortex-m0", &[_]FeatureType { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .Armv6M, - }), - CpuInfo(@This(), FeatureType).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .Armv6M, - }), - CpuInfo(@This(), FeatureType).create(.CortexM1, "cortex-m1", &[_]FeatureType { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .Armv6M, - }), - CpuInfo(@This(), FeatureType).create(.CortexM23, "cortex-m23", &[_]FeatureType { - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - .Armv8Mbase, - .NoMovt, - }), - CpuInfo(@This(), FeatureType).create(.CortexM3, "cortex-m3", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - .Armv7M, - .NoBranchPredictor, - .LoopAlign, - .UseAa, - .UseMisched, - .M3, - }), - CpuInfo(@This(), FeatureType).create(.CortexM33, "cortex-m33", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - .Armv8Mmain, - .Dsp, - .Fpregs, - .Fp16, - .FpArmv8d16sp, - .NoBranchPredictor, - .Slowfpvmlx, - .LoopAlign, - .UseAa, - .UseMisched, - }), - CpuInfo(@This(), FeatureType).create(.CortexM35p, "cortex-m35p", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - .Armv8Mmain, - .Dsp, - .Fpregs, - .Fp16, - .FpArmv8d16sp, - .NoBranchPredictor, - .Slowfpvmlx, - .LoopAlign, - .UseAa, - .UseMisched, - }), - CpuInfo(@This(), FeatureType).create(.CortexM4, "cortex-m4", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - .Armv7eM, - .NoBranchPredictor, - .Slowfpvmlx, - .LoopAlign, - .UseAa, - .UseMisched, - .Fpregs, - .Fp16, - .Vfp4d16sp, - }), - CpuInfo(@This(), FeatureType).create(.CortexM7, "cortex-m7", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - .Armv7eM, - .Fpregs, - .Fp16, - .FpArmv8d16, - }), - CpuInfo(@This(), FeatureType).create(.CortexR4, "cortex-r4", &[_]FeatureType { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - .Armv7R, - .AvoidPartialCpsr, - .RetAddrStack, - .R4, - }), - CpuInfo(@This(), FeatureType).create(.CortexR4f, "cortex-r4f", &[_]FeatureType { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - .Armv7R, - .AvoidPartialCpsr, - .RetAddrStack, - .Slowfpvmlx, - .SlowFpBrcc, - .Fpregs, - .Vfp3d16, - .R4, - }), - CpuInfo(@This(), FeatureType).create(.CortexR5, "cortex-r5", &[_]FeatureType { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - .Armv7R, - .AvoidPartialCpsr, - .HwdivArm, - .RetAddrStack, - .Slowfpvmlx, - .SlowFpBrcc, - .Fpregs, - .Vfp3d16, - .R5, - }), - CpuInfo(@This(), FeatureType).create(.CortexR52, "cortex-r52", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Crc, - .Fpregs, - .Mp, - .Dfb, - .Dsp, - .Fp16, - .V4t, - .Db, - .V7clrex, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Rclass, - .Armv8R, - .Fpao, - .UseAa, - .UseMisched, - .R52, - }), - CpuInfo(@This(), FeatureType).create(.CortexR7, "cortex-r7", &[_]FeatureType { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - .Armv7R, - .AvoidPartialCpsr, - .Fp16, - .HwdivArm, - .RetAddrStack, - .Slowfpvmlx, - .Mp, - .SlowFpBrcc, - .Fpregs, - .Vfp3d16, - .R7, - }), - CpuInfo(@This(), FeatureType).create(.CortexR8, "cortex-r8", &[_]FeatureType { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - .Armv7R, - .AvoidPartialCpsr, - .Fp16, - .HwdivArm, - .RetAddrStack, - .Slowfpvmlx, - .Mp, - .SlowFpBrcc, - .Fpregs, - .Vfp3d16, - }), - CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .AvoidMovsShop, - .AvoidPartialCpsr, - .Crypto, - .RetAddrStack, - .Slowfpvmlx, - .Neonfp, - .DisablePostraScheduler, - .UseMisched, - .Vfp4, - .Zcz, - .Swift, - }), - CpuInfo(@This(), FeatureType).create(.Ep9312, "ep9312", &[_]FeatureType { - .V4t, - .Armv4t, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - .Exynos, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - .Exynos, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - .Exynos, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Dotprod, - .Fullfp16, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - .Exynos, - }), - CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Dotprod, - .Fullfp16, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - .Exynos, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Iwmmxt, "iwmmxt", &[_]FeatureType { - .V4t, - .Armv5te, - }), - CpuInfo(@This(), FeatureType).create(.Krait, "krait", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidPartialCpsr, - .VldnAlign, - .Fp16, - .HwdivArm, - .Hwdiv, - .RetAddrStack, - .MuxedUnits, - .Vfp4, - .VmlxForwarding, - .Krait, - }), - CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv8A, - .Crypto, - .Kryo, - }), - CpuInfo(@This(), FeatureType).create(.Mpcore, "mpcore", &[_]FeatureType { - .V4t, - .Armv6k, - .Slowfpvmlx, - .Fpregs, - .Vfp2, - }), - CpuInfo(@This(), FeatureType).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType { - .V4t, - .Armv6k, - }), - CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - .Armv82A, - .Crypto, - .Dotprod, - }), - CpuInfo(@This(), FeatureType).create(.Sc000, "sc000", &[_]FeatureType { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .Armv6M, - }), - CpuInfo(@This(), FeatureType).create(.Sc300, "sc300", &[_]FeatureType { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - .Armv7M, - .NoBranchPredictor, - .UseAa, - .UseMisched, - .M3, - }), - CpuInfo(@This(), FeatureType).create(.Strongarm, "strongarm", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Strongarm110, "strongarm110", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Strongarm1100, "strongarm1100", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Strongarm1110, "strongarm1110", &[_]FeatureType { - .Armv4, - }), - CpuInfo(@This(), FeatureType).create(.Swift, "swift", &[_]FeatureType { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Armv7A, - .AvoidMovsShop, - .AvoidPartialCpsr, - .HwdivArm, - .Hwdiv, - .RetAddrStack, - .Slowfpvmlx, - .VmlxHazards, - .Mp, - .Neonfp, - .DisablePostraScheduler, - .PreferIshst, - .ProfUnpr, - .SlowLoadDSubreg, - .SlowOddReg, - .SlowVdup32, - .SlowVgetlni32, - .UseMisched, - .WideStrideVfp, - .Fp16, - .Vfp4, - .Swift, - }), - CpuInfo(@This(), FeatureType).create(.Xscale, "xscale", &[_]FeatureType { - .V4t, - .Armv5te, - }), - }; -}; diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig deleted file mode 100644 index 812554134bc274b4e76698160bceb6b50d472ce4..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/AvrCpu.zig +++ /dev/null @@ -1,3863 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const AvrCpu = enum { - At43usb320, - At43usb355, - At76c711, - At86rf401, - At90c8534, - At90can128, - At90can32, - At90can64, - At90pwm1, - At90pwm161, - At90pwm2, - At90pwm216, - At90pwm2b, - At90pwm3, - At90pwm316, - At90pwm3b, - At90pwm81, - At90s1200, - At90s2313, - At90s2323, - At90s2333, - At90s2343, - At90s4414, - At90s4433, - At90s4434, - At90s8515, - At90s8535, - At90scr100, - At90usb1286, - At90usb1287, - At90usb162, - At90usb646, - At90usb647, - At90usb82, - At94k, - Ata5272, - Ata5505, - Ata5790, - Ata5795, - Ata6285, - Ata6286, - Ata6289, - Atmega103, - Atmega128, - Atmega1280, - Atmega1281, - Atmega1284, - Atmega1284p, - Atmega1284rfr2, - Atmega128a, - Atmega128rfa1, - Atmega128rfr2, - Atmega16, - Atmega161, - Atmega162, - Atmega163, - Atmega164a, - Atmega164p, - Atmega164pa, - Atmega165, - Atmega165a, - Atmega165p, - Atmega165pa, - Atmega168, - Atmega168a, - Atmega168p, - Atmega168pa, - Atmega169, - Atmega169a, - Atmega169p, - Atmega169pa, - Atmega16a, - Atmega16hva, - Atmega16hva2, - Atmega16hvb, - Atmega16hvbrevb, - Atmega16m1, - Atmega16u2, - Atmega16u4, - Atmega2560, - Atmega2561, - Atmega2564rfr2, - Atmega256rfr2, - Atmega32, - Atmega323, - Atmega324a, - Atmega324p, - Atmega324pa, - Atmega325, - Atmega3250, - Atmega3250a, - Atmega3250p, - Atmega3250pa, - Atmega325a, - Atmega325p, - Atmega325pa, - Atmega328, - Atmega328p, - Atmega329, - Atmega3290, - Atmega3290a, - Atmega3290p, - Atmega3290pa, - Atmega329a, - Atmega329p, - Atmega329pa, - Atmega32a, - Atmega32c1, - Atmega32hvb, - Atmega32hvbrevb, - Atmega32m1, - Atmega32u2, - Atmega32u4, - Atmega32u6, - Atmega406, - Atmega48, - Atmega48a, - Atmega48p, - Atmega48pa, - Atmega64, - Atmega640, - Atmega644, - Atmega644a, - Atmega644p, - Atmega644pa, - Atmega644rfr2, - Atmega645, - Atmega6450, - Atmega6450a, - Atmega6450p, - Atmega645a, - Atmega645p, - Atmega649, - Atmega6490, - Atmega6490a, - Atmega6490p, - Atmega649a, - Atmega649p, - Atmega64a, - Atmega64c1, - Atmega64hve, - Atmega64m1, - Atmega64rfr2, - Atmega8, - Atmega8515, - Atmega8535, - Atmega88, - Atmega88a, - Atmega88p, - Atmega88pa, - Atmega8a, - Atmega8hva, - Atmega8u2, - Attiny10, - Attiny102, - Attiny104, - Attiny11, - Attiny12, - Attiny13, - Attiny13a, - Attiny15, - Attiny1634, - Attiny167, - Attiny20, - Attiny22, - Attiny2313, - Attiny2313a, - Attiny24, - Attiny24a, - Attiny25, - Attiny26, - Attiny261, - Attiny261a, - Attiny28, - Attiny4, - Attiny40, - Attiny4313, - Attiny43u, - Attiny44, - Attiny44a, - Attiny45, - Attiny461, - Attiny461a, - Attiny48, - Attiny5, - Attiny828, - Attiny84, - Attiny84a, - Attiny85, - Attiny861, - Attiny861a, - Attiny87, - Attiny88, - Attiny9, - Atxmega128a1, - Atxmega128a1u, - Atxmega128a3, - Atxmega128a3u, - Atxmega128a4u, - Atxmega128b1, - Atxmega128b3, - Atxmega128c3, - Atxmega128d3, - Atxmega128d4, - Atxmega16a4, - Atxmega16a4u, - Atxmega16c4, - Atxmega16d4, - Atxmega16e5, - Atxmega192a3, - Atxmega192a3u, - Atxmega192c3, - Atxmega192d3, - Atxmega256a3, - Atxmega256a3b, - Atxmega256a3bu, - Atxmega256a3u, - Atxmega256c3, - Atxmega256d3, - Atxmega32a4, - Atxmega32a4u, - Atxmega32c4, - Atxmega32d4, - Atxmega32e5, - Atxmega32x1, - Atxmega384c3, - Atxmega384d3, - Atxmega64a1, - Atxmega64a1u, - Atxmega64a3, - Atxmega64a3u, - Atxmega64a4u, - Atxmega64b1, - Atxmega64b3, - Atxmega64c3, - Atxmega64d3, - Atxmega64d4, - Atxmega8e5, - Avr1, - Avr2, - Avr25, - Avr3, - Avr31, - Avr35, - Avr4, - Avr5, - Avr51, - Avr6, - Avrtiny, - Avrxmega1, - Avrxmega2, - Avrxmega3, - Avrxmega4, - Avrxmega5, - Avrxmega6, - Avrxmega7, - M3000, - - const FeatureType = feature.AvrFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.At43usb320, "at43usb320", &[_]FeatureType { - .Lpm, - .Elpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr31, - }), - CpuInfo(@This(), FeatureType).create(.At43usb355, "at43usb355", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - }), - CpuInfo(@This(), FeatureType).create(.At76c711, "at76c711", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - }), - CpuInfo(@This(), FeatureType).create(.At86rf401, "at86rf401", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - .Lpmx, - .Movw, - }), - CpuInfo(@This(), FeatureType).create(.At90c8534, "at90c8534", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90can128, "at90can128", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.At90can32, "at90can32", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90can64, "at90can64", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm1, "at90pwm1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm161, "at90pwm161", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm2, "at90pwm2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm216, "at90pwm216", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm3, "at90pwm3", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm316, "at90pwm316", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90pwm81, "at90pwm81", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.At90s1200, "at90s1200", &[_]FeatureType { - .Avr0, - }), - CpuInfo(@This(), FeatureType).create(.At90s2313, "at90s2313", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s2323, "at90s2323", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s2333, "at90s2333", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s2343, "at90s2343", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s4414, "at90s4414", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s4433, "at90s4433", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s4434, "at90s4434", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s8515, "at90s8515", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90s8535, "at90s8535", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.At90scr100, "at90scr100", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90usb1286, "at90usb1286", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.At90usb1287, "at90usb1287", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.At90usb162, "at90usb162", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.At90usb646, "at90usb646", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90usb647, "at90usb647", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.At90usb82, "at90usb82", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.At94k, "at94k", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - .Lpmx, - .Movw, - .Mul, - }), - CpuInfo(@This(), FeatureType).create(.Ata5272, "ata5272", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Ata5505, "ata5505", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Ata5790, "ata5790", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Ata5795, "ata5795", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Ata6285, "ata6285", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Ata6286, "ata6286", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Ata6289, "ata6289", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega103, "atmega103", &[_]FeatureType { - .Lpm, - .Elpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr31, - }), - CpuInfo(@This(), FeatureType).create(.Atmega128, "atmega128", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega1280, "atmega1280", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega1281, "atmega1281", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega1284, "atmega1284", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega1284p, "atmega1284p", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega128a, "atmega128a", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16, "atmega16", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega161, "atmega161", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - .Lpmx, - .Movw, - .Mul, - .Spm, - }), - CpuInfo(@This(), FeatureType).create(.Atmega162, "atmega162", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega163, "atmega163", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - .Lpmx, - .Movw, - .Mul, - .Spm, - }), - CpuInfo(@This(), FeatureType).create(.Atmega164a, "atmega164a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega164p, "atmega164p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega164pa, "atmega164pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega165, "atmega165", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega165a, "atmega165a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega165p, "atmega165p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega165pa, "atmega165pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega168, "atmega168", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega168a, "atmega168a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega168p, "atmega168p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega168pa, "atmega168pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega169, "atmega169", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega169a, "atmega169a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega169p, "atmega169p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega169pa, "atmega169pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16a, "atmega16a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16hva, "atmega16hva", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16m1, "atmega16m1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16u2, "atmega16u2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Atmega16u4, "atmega16u4", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega2560, "atmega2560", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr6, - }), - CpuInfo(@This(), FeatureType).create(.Atmega2561, "atmega2561", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr6, - }), - CpuInfo(@This(), FeatureType).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr6, - }), - CpuInfo(@This(), FeatureType).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr6, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32, "atmega32", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega323, "atmega323", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega324a, "atmega324a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega324p, "atmega324p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega324pa, "atmega324pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega325, "atmega325", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3250, "atmega3250", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3250a, "atmega3250a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3250p, "atmega3250p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega325a, "atmega325a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega325p, "atmega325p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega325pa, "atmega325pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega328, "atmega328", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega328p, "atmega328p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega329, "atmega329", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3290, "atmega3290", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3290a, "atmega3290a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3290p, "atmega3290p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega329a, "atmega329a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega329p, "atmega329p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega329pa, "atmega329pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32a, "atmega32a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32c1, "atmega32c1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32m1, "atmega32m1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32u2, "atmega32u2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32u4, "atmega32u4", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega32u6, "atmega32u6", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega406, "atmega406", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega48, "atmega48", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega48a, "atmega48a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega48p, "atmega48p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega48pa, "atmega48pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64, "atmega64", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega640, "atmega640", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega644, "atmega644", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega644a, "atmega644a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega644p, "atmega644p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega644pa, "atmega644pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega645, "atmega645", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6450, "atmega6450", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6450a, "atmega6450a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6450p, "atmega6450p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega645a, "atmega645a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega645p, "atmega645p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega649, "atmega649", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6490, "atmega6490", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6490a, "atmega6490a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega6490p, "atmega6490p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega649a, "atmega649a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega649p, "atmega649p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64a, "atmega64a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64c1, "atmega64c1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64hve, "atmega64hve", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64m1, "atmega64m1", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8, "atmega8", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8515, "atmega8515", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - .Lpmx, - .Movw, - .Mul, - .Spm, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8535, "atmega8535", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - .Lpmx, - .Movw, - .Mul, - .Spm, - }), - CpuInfo(@This(), FeatureType).create(.Atmega88, "atmega88", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega88a, "atmega88a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega88p, "atmega88p", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega88pa, "atmega88pa", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8a, "atmega8a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8hva, "atmega8hva", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Atmega8u2, "atmega8u2", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Attiny10, "attiny10", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny102, "attiny102", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny104, "attiny104", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny11, "attiny11", &[_]FeatureType { - .Avr0, - .Lpm, - .Avr1, - }), - CpuInfo(@This(), FeatureType).create(.Attiny12, "attiny12", &[_]FeatureType { - .Avr0, - .Lpm, - .Avr1, - }), - CpuInfo(@This(), FeatureType).create(.Attiny13, "attiny13", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny13a, "attiny13a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny15, "attiny15", &[_]FeatureType { - .Avr0, - .Lpm, - .Avr1, - }), - CpuInfo(@This(), FeatureType).create(.Attiny1634, "attiny1634", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Attiny167, "attiny167", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Attiny20, "attiny20", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny22, "attiny22", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.Attiny2313, "attiny2313", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny2313a, "attiny2313a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny24, "attiny24", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny24a, "attiny24a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny25, "attiny25", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny26, "attiny26", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - .Lpmx, - }), - CpuInfo(@This(), FeatureType).create(.Attiny261, "attiny261", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny261a, "attiny261a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny28, "attiny28", &[_]FeatureType { - .Avr0, - .Lpm, - .Avr1, - }), - CpuInfo(@This(), FeatureType).create(.Attiny4, "attiny4", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny40, "attiny40", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny4313, "attiny4313", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny43u, "attiny43u", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny44, "attiny44", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny44a, "attiny44a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny45, "attiny45", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny461, "attiny461", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny461a, "attiny461a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny48, "attiny48", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny5, "attiny5", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Attiny828, "attiny828", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny84, "attiny84", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny84a, "attiny84a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny85, "attiny85", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny861, "attiny861", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny861a, "attiny861a", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny87, "attiny87", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny88, "attiny88", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Attiny9, "attiny9", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - .Xmegau, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avr1, "avr1", &[_]FeatureType { - .Avr0, - .Lpm, - .Avr1, - }), - CpuInfo(@This(), FeatureType).create(.Avr2, "avr2", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - .Avr2, - }), - CpuInfo(@This(), FeatureType).create(.Avr25, "avr25", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr25, - }), - CpuInfo(@This(), FeatureType).create(.Avr3, "avr3", &[_]FeatureType { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr3, - }), - CpuInfo(@This(), FeatureType).create(.Avr31, "avr31", &[_]FeatureType { - .Lpm, - .Elpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - .Avr31, - }), - CpuInfo(@This(), FeatureType).create(.Avr35, "avr35", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - .Avr35, - }), - CpuInfo(@This(), FeatureType).create(.Avr4, "avr4", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr4, - }), - CpuInfo(@This(), FeatureType).create(.Avr5, "avr5", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - CpuInfo(@This(), FeatureType).create(.Avr51, "avr51", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr51, - }), - CpuInfo(@This(), FeatureType).create(.Avr6, "avr6", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr6, - }), - CpuInfo(@This(), FeatureType).create(.Avrtiny, "avrtiny", &[_]FeatureType { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - .Avrtiny, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega1, "avrxmega1", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega2, "avrxmega2", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega3, "avrxmega3", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega4, "avrxmega4", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega5, "avrxmega5", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega6, "avrxmega6", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.Avrxmega7, "avrxmega7", &[_]FeatureType { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - .Xmega, - }), - CpuInfo(@This(), FeatureType).create(.M3000, "m3000", &[_]FeatureType { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - .Avr5, - }), - }; -}; diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig deleted file mode 100644 index 2faecd08bd238da0816b19c1dce8829c434cd82c..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/BpfCpu.zig +++ /dev/null @@ -1,29 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const BpfCpu = enum { - Generic, - Probe, - V1, - V2, - V3, - - const FeatureType = feature.BpfFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Probe, "probe", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.V1, "v1", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.V2, "v2", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.V3, "v3", &[_]FeatureType { - }), - }; -}; diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig deleted file mode 100644 index 0287eb7acf33ae7e6052dfb7de14aedfb2e63bf7..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/HexagonCpu.zig +++ /dev/null @@ -1,103 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const HexagonCpu = enum { - Generic, - Hexagonv5, - Hexagonv55, - Hexagonv60, - Hexagonv62, - Hexagonv65, - Hexagonv66, - - const FeatureType = feature.HexagonFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - .V5, - .V55, - .V60, - .Duplex, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv5, "hexagonv5", &[_]FeatureType { - .V5, - .Duplex, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv55, "hexagonv55", &[_]FeatureType { - .V5, - .V55, - .Duplex, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv60, "hexagonv60", &[_]FeatureType { - .V5, - .V55, - .V60, - .Duplex, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv62, "hexagonv62", &[_]FeatureType { - .V5, - .V55, - .V60, - .V62, - .Duplex, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv65, "hexagonv65", &[_]FeatureType { - .V5, - .V55, - .V60, - .V62, - .V65, - .Duplex, - .Mem_noshuf, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - CpuInfo(@This(), FeatureType).create(.Hexagonv66, "hexagonv66", &[_]FeatureType { - .V5, - .V55, - .V60, - .V62, - .V65, - .V66, - .Duplex, - .Mem_noshuf, - .Memops, - .Packets, - .Nvj, - .Nvs, - .SmallData, - }), - }; -}; diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig deleted file mode 100644 index 2462e6212ce53cb3f9166b5f9bbd03264bc2e276..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/MipsCpu.zig +++ /dev/null @@ -1,190 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const MipsCpu = enum { - Mips1, - Mips2, - Mips3, - Mips32, - Mips32r2, - Mips32r3, - Mips32r5, - Mips32r6, - Mips4, - Mips5, - Mips64, - Mips64r2, - Mips64r3, - Mips64r5, - Mips64r6, - Octeon, - P5600, - - const FeatureType = feature.MipsFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Mips1, "mips1", &[_]FeatureType { - .Mips1, - }), - CpuInfo(@This(), FeatureType).create(.Mips2, "mips2", &[_]FeatureType { - .Mips1, - .Mips2, - }), - CpuInfo(@This(), FeatureType).create(.Mips3, "mips3", &[_]FeatureType { - .Mips3_32r2, - .Fp64, - .Gp64, - .Mips1, - .Mips3_32, - .Mips3, - }), - CpuInfo(@This(), FeatureType).create(.Mips32, "mips32", &[_]FeatureType { - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips32, - }), - CpuInfo(@This(), FeatureType).create(.Mips32r2, "mips32r2", &[_]FeatureType { - .Mips5_32r2, - .Mips4_32r2, - .Mips3_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips32r2, - }), - CpuInfo(@This(), FeatureType).create(.Mips32r3, "mips32r3", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips32r3, - }), - CpuInfo(@This(), FeatureType).create(.Mips32r5, "mips32r5", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips32r5, - }), - CpuInfo(@This(), FeatureType).create(.Mips32r6, "mips32r6", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Abs2008, - .Nan2008, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips32r6, - }), - CpuInfo(@This(), FeatureType).create(.Mips4, "mips4", &[_]FeatureType { - .Mips3_32r2, - .Mips4_32r2, - .Fp64, - .Gp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips4, - }), - CpuInfo(@This(), FeatureType).create(.Mips5, "mips5", &[_]FeatureType { - .Mips5_32r2, - .Mips4_32r2, - .Mips3_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips5, - }), - CpuInfo(@This(), FeatureType).create(.Mips64, "mips64", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips64, - }), - CpuInfo(@This(), FeatureType).create(.Mips64r2, "mips64r2", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips64r2, - }), - CpuInfo(@This(), FeatureType).create(.Mips64r3, "mips64r3", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips64r3, - }), - CpuInfo(@This(), FeatureType).create(.Mips64r5, "mips64r5", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips64r5, - }), - CpuInfo(@This(), FeatureType).create(.Mips64r6, "mips64r6", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Nan2008, - .Abs2008, - .Mips4_32r2, - .Fp64, - .Gp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Mips64r6, - }), - CpuInfo(@This(), FeatureType).create(.Octeon, "octeon", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - .Cnmips, - .Mips64r2, - }), - CpuInfo(@This(), FeatureType).create(.P5600, "p5600", &[_]FeatureType { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - .P5600, - }), - }; -}; diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig deleted file mode 100644 index b64e5102a8540d3adf1c0d7edd9c0e094aae2b00..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/Msp430Cpu.zig +++ /dev/null @@ -1,24 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const Msp430Cpu = enum { - Generic, - Msp430, - Msp430x, - - const FeatureType = feature.Msp430Feature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Msp430, "msp430", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Msp430x, "msp430x", &[_]FeatureType { - .Ext, - }), - }; -}; diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig deleted file mode 100644 index 03f36e214c3fa1a6e27f9aac98575ad45cce0a08..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/NvptxCpu.zig +++ /dev/null @@ -1,85 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const NvptxCpu = enum { - Sm_20, - Sm_21, - Sm_30, - Sm_32, - Sm_35, - Sm_37, - Sm_50, - Sm_52, - Sm_53, - Sm_60, - Sm_61, - Sm_62, - Sm_70, - Sm_72, - Sm_75, - - const FeatureType = feature.NvptxFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Sm_20, "sm_20", &[_]FeatureType { - .Sm_20, - }), - CpuInfo(@This(), FeatureType).create(.Sm_21, "sm_21", &[_]FeatureType { - .Sm_21, - }), - CpuInfo(@This(), FeatureType).create(.Sm_30, "sm_30", &[_]FeatureType { - .Sm_30, - }), - CpuInfo(@This(), FeatureType).create(.Sm_32, "sm_32", &[_]FeatureType { - .Ptx40, - .Sm_32, - }), - CpuInfo(@This(), FeatureType).create(.Sm_35, "sm_35", &[_]FeatureType { - .Sm_35, - }), - CpuInfo(@This(), FeatureType).create(.Sm_37, "sm_37", &[_]FeatureType { - .Ptx41, - .Sm_37, - }), - CpuInfo(@This(), FeatureType).create(.Sm_50, "sm_50", &[_]FeatureType { - .Ptx40, - .Sm_50, - }), - CpuInfo(@This(), FeatureType).create(.Sm_52, "sm_52", &[_]FeatureType { - .Ptx41, - .Sm_52, - }), - CpuInfo(@This(), FeatureType).create(.Sm_53, "sm_53", &[_]FeatureType { - .Ptx42, - .Sm_53, - }), - CpuInfo(@This(), FeatureType).create(.Sm_60, "sm_60", &[_]FeatureType { - .Ptx50, - .Sm_60, - }), - CpuInfo(@This(), FeatureType).create(.Sm_61, "sm_61", &[_]FeatureType { - .Ptx50, - .Sm_61, - }), - CpuInfo(@This(), FeatureType).create(.Sm_62, "sm_62", &[_]FeatureType { - .Ptx50, - .Sm_62, - }), - CpuInfo(@This(), FeatureType).create(.Sm_70, "sm_70", &[_]FeatureType { - .Ptx60, - .Sm_70, - }), - CpuInfo(@This(), FeatureType).create(.Sm_72, "sm_72", &[_]FeatureType { - .Ptx61, - .Sm_72, - }), - CpuInfo(@This(), FeatureType).create(.Sm_75, "sm_75", &[_]FeatureType { - .Ptx63, - .Sm_75, - }), - }; -}; diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig deleted file mode 100644 index 7e34cf52cb08d3a269cb9020849a563207ad09d6..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/PowerPcCpu.zig +++ /dev/null @@ -1,451 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const PowerPcCpu = enum { - Cpu440, - Cpu450, - Cpu601, - Cpu602, - Cpu603, - E603, - Ev603, - Cpu604, - E604, - Cpu620, - Cpu7400, - Cpu7450, - Cpu750, - Cpu970, - A2, - A2q, - E500, - E500mc, - E5500, - G3, - G4, - G4plus, - G5, - Generic, - Ppc, - Ppc32, - Ppc64, - Ppc64le, - Pwr3, - Pwr4, - Pwr5, - Pwr5x, - Pwr6, - Pwr6x, - Pwr7, - Pwr8, - Pwr9, - - const FeatureType = feature.PowerPcFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Cpu440, "440", &[_]FeatureType { - .Icbt, - .Booke, - .HardFloat, - .Fres, - .Frsqrte, - .Isel, - .Msync, - }), - CpuInfo(@This(), FeatureType).create(.Cpu450, "450", &[_]FeatureType { - .Icbt, - .Booke, - .HardFloat, - .Fres, - .Frsqrte, - .Isel, - .Msync, - }), - CpuInfo(@This(), FeatureType).create(.Cpu601, "601", &[_]FeatureType { - .HardFloat, - .Fpu, - }), - CpuInfo(@This(), FeatureType).create(.Cpu602, "602", &[_]FeatureType { - .HardFloat, - .Fpu, - }), - CpuInfo(@This(), FeatureType).create(.Cpu603, "603", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.E603, "603e", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Ev603, "603ev", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu604, "604", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.E604, "604e", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu620, "620", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu7400, "7400", &[_]FeatureType { - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu7450, "7450", &[_]FeatureType { - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu750, "750", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.Cpu970, "970", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.A2, "a2", &[_]FeatureType { - .Bit64, - .Icbt, - .Booke, - .Cmpb, - .HardFloat, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Recipprec, - .Stfiwx, - .SlowPopcntd, - }), - CpuInfo(@This(), FeatureType).create(.A2q, "a2q", &[_]FeatureType { - .Bit64, - .Icbt, - .Booke, - .Cmpb, - .HardFloat, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Qpx, - .Recipprec, - .Stfiwx, - .SlowPopcntd, - }), - CpuInfo(@This(), FeatureType).create(.E500, "e500", &[_]FeatureType { - .Icbt, - .Booke, - .Isel, - }), - CpuInfo(@This(), FeatureType).create(.E500mc, "e500mc", &[_]FeatureType { - .Icbt, - .Booke, - .Isel, - .HardFloat, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.E5500, "e5500", &[_]FeatureType { - .Bit64, - .Icbt, - .Booke, - .Isel, - .Mfocrf, - .HardFloat, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.G3, "g3", &[_]FeatureType { - .HardFloat, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.G4, "g4", &[_]FeatureType { - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.G4plus, "g4+", &[_]FeatureType { - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - }), - CpuInfo(@This(), FeatureType).create(.G5, "g5", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - .HardFloat, - }), - CpuInfo(@This(), FeatureType).create(.Ppc, "ppc", &[_]FeatureType { - .HardFloat, - }), - CpuInfo(@This(), FeatureType).create(.Ppc32, "ppc32", &[_]FeatureType { - .HardFloat, - }), - CpuInfo(@This(), FeatureType).create(.Ppc64, "ppc64", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Ppc64le, "ppc64le", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Bpermd, - .Cmpb, - .DirectMove, - .Extdiv, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Htm, - .Icbt, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Power8Altivec, - .Crypto, - .Power8Vector, - .Popcntd, - .PartwordAtomics, - .Recipprec, - .Stfiwx, - .TwoConstNr, - .Vsx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr3, "pwr3", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr4, "pwr4", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fres, - .Frsqrte, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr5, "pwr5", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr5x, "pwr5x", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Mfocrf, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr6, "pwr6", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Cmpb, - .Fcpsgn, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Lfiwax, - .Mfocrf, - .Recipprec, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr6x, "pwr6x", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Cmpb, - .Fcpsgn, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Lfiwax, - .Mfocrf, - .Recipprec, - .Stfiwx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr7, "pwr7", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Bpermd, - .Cmpb, - .Extdiv, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Popcntd, - .Recipprec, - .Stfiwx, - .TwoConstNr, - .Vsx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr8, "pwr8", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Bpermd, - .Cmpb, - .DirectMove, - .Extdiv, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Htm, - .Icbt, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Power8Altivec, - .Crypto, - .Power8Vector, - .Popcntd, - .PartwordAtomics, - .Recipprec, - .Stfiwx, - .TwoConstNr, - .Vsx, - }), - CpuInfo(@This(), FeatureType).create(.Pwr9, "pwr9", &[_]FeatureType { - .Bit64, - .HardFloat, - .Altivec, - .Bpermd, - .Cmpb, - .DirectMove, - .Extdiv, - .Fcpsgn, - .Fpcvt, - .Fprnd, - .Fre, - .Fres, - .Frsqrte, - .Frsqrtes, - .Fsqrt, - .Htm, - .Icbt, - .IsaV30Instructions, - .Isel, - .Ldbrx, - .Lfiwax, - .Mfocrf, - .Power8Altivec, - .Crypto, - .Power8Vector, - .Power9Altivec, - .Power9Vector, - .Popcntd, - .PpcPostraSched, - .PpcPreraSched, - .PartwordAtomics, - .Recipprec, - .Stfiwx, - .TwoConstNr, - .Vsx, - .VectorsUseTwoUnits, - }), - }; -}; diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig deleted file mode 100644 index d191e04acfdf66bde044c000d60381c1612cbc5e..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/RiscVCpu.zig +++ /dev/null @@ -1,23 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const RiscVCpu = enum { - GenericRv32, - GenericRv64, - - const FeatureType = feature.RiscVFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.GenericRv32, "generic-rv32", &[_]FeatureType { - .RvcHints, - }), - CpuInfo(@This(), FeatureType).create(.GenericRv64, "generic-rv64", &[_]FeatureType { - .Bit64, - .RvcHints, - }), - }; -}; diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig deleted file mode 100644 index bd5dca79cabe52f2d0063fdb6af969765b9ecf58..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/SparcCpu.zig +++ /dev/null @@ -1,216 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const SparcCpu = enum { - At697e, - At697f, - F934, - Generic, - Gr712rc, - Gr740, - Hypersparc, - Leon2, - Leon3, - Leon4, - Ma2080, - Ma2085, - Ma2100, - Ma2150, - Ma2155, - Ma2450, - Ma2455, - Ma2480, - Ma2485, - Ma2x5x, - Ma2x8x, - Myriad2, - Myriad21, - Myriad22, - Myriad23, - Niagara, - Niagara2, - Niagara3, - Niagara4, - Sparclet, - Sparclite, - Sparclite86x, - Supersparc, - Tsc701, - Ultrasparc, - Ultrasparc3, - Ut699, - V7, - V8, - V9, - - const FeatureType = feature.SparcFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.At697e, "at697e", &[_]FeatureType { - .Leon, - .Insertnopload, - }), - CpuInfo(@This(), FeatureType).create(.At697f, "at697f", &[_]FeatureType { - .Leon, - .Insertnopload, - }), - CpuInfo(@This(), FeatureType).create(.F934, "f934", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Gr712rc, "gr712rc", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Gr740, "gr740", &[_]FeatureType { - .Leon, - .Leonpwrpsr, - .Hasleoncasa, - .Leoncyclecounter, - .Hasumacsmac, - }), - CpuInfo(@This(), FeatureType).create(.Hypersparc, "hypersparc", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Leon2, "leon2", &[_]FeatureType { - .Leon, - }), - CpuInfo(@This(), FeatureType).create(.Leon3, "leon3", &[_]FeatureType { - .Leon, - .Hasumacsmac, - }), - CpuInfo(@This(), FeatureType).create(.Leon4, "leon4", &[_]FeatureType { - .Leon, - .Hasleoncasa, - .Hasumacsmac, - }), - CpuInfo(@This(), FeatureType).create(.Ma2080, "ma2080", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2085, "ma2085", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2100, "ma2100", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2150, "ma2150", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2155, "ma2155", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2450, "ma2450", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2455, "ma2455", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2480, "ma2480", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2485, "ma2485", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2x5x, "ma2x5x", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Ma2x8x, "ma2x8x", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Myriad2, "myriad2", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Myriad21, "myriad2.1", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Myriad22, "myriad2.2", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Myriad23, "myriad2.3", &[_]FeatureType { - .Leon, - .Hasleoncasa, - }), - CpuInfo(@This(), FeatureType).create(.Niagara, "niagara", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - .Vis2, - }), - CpuInfo(@This(), FeatureType).create(.Niagara2, "niagara2", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - .Vis2, - .Popc, - }), - CpuInfo(@This(), FeatureType).create(.Niagara3, "niagara3", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - .Vis2, - .Popc, - }), - CpuInfo(@This(), FeatureType).create(.Niagara4, "niagara4", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - .Vis2, - .Vis3, - .Popc, - }), - CpuInfo(@This(), FeatureType).create(.Sparclet, "sparclet", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Sparclite, "sparclite", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Sparclite86x, "sparclite86x", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Supersparc, "supersparc", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Tsc701, "tsc701", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Ultrasparc, "ultrasparc", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - }), - CpuInfo(@This(), FeatureType).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType { - .DeprecatedV8, - .V9, - .Vis, - .Vis2, - }), - CpuInfo(@This(), FeatureType).create(.Ut699, "ut699", &[_]FeatureType { - .Leon, - .NoFmuls, - .NoFsmuld, - .Fixallfdivsqrt, - .Insertnopload, - }), - CpuInfo(@This(), FeatureType).create(.V7, "v7", &[_]FeatureType { - .NoFsmuld, - .SoftMulDiv, - }), - CpuInfo(@This(), FeatureType).create(.V8, "v8", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.V9, "v9", &[_]FeatureType { - .V9, - }), - }; -}; diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig deleted file mode 100644 index 7e5b21c85898f184b8b9df3da83519c85efa7595..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/SystemZCpu.zig +++ /dev/null @@ -1,279 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const SystemZCpu = enum { - Arch10, - Arch11, - Arch12, - Arch13, - Arch8, - Arch9, - Generic, - Z10, - Z13, - Z14, - Z15, - Z196, - ZEC12, - - const FeatureType = feature.SystemZFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Arch10, "arch10", &[_]FeatureType { - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadAndTrap, - .LoadStoreOnCond, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MiscellaneousExtensions, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - }), - CpuInfo(@This(), FeatureType).create(.Arch11, "arch11", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MiscellaneousExtensions, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - }), - CpuInfo(@This(), FeatureType).create(.Arch12, "arch12", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .GuardedStorage, - .HighWord, - .InsertReferenceBitsMultiple, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MessageSecurityAssistExtension7, - .MessageSecurityAssistExtension8, - .MiscellaneousExtensions, - .MiscellaneousExtensions2, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - .VectorEnhancements1, - .VectorPackedDecimal, - }), - CpuInfo(@This(), FeatureType).create(.Arch13, "arch13", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DeflateConversion, - .DistinctOps, - .EnhancedDat2, - .EnhancedSort, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .GuardedStorage, - .HighWord, - .InsertReferenceBitsMultiple, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MessageSecurityAssistExtension7, - .MessageSecurityAssistExtension8, - .MessageSecurityAssistExtension9, - .MiscellaneousExtensions, - .MiscellaneousExtensions2, - .MiscellaneousExtensions3, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - .VectorEnhancements1, - .VectorEnhancements2, - .VectorPackedDecimal, - .VectorPackedDecimalEnhancement, - }), - CpuInfo(@This(), FeatureType).create(.Arch8, "arch8", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Arch9, "arch9", &[_]FeatureType { - .DistinctOps, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadStoreOnCond, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .PopulationCount, - .ResetReferenceBitsMultiple, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Z10, "z10", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Z13, "z13", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MiscellaneousExtensions, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - }), - CpuInfo(@This(), FeatureType).create(.Z14, "z14", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .GuardedStorage, - .HighWord, - .InsertReferenceBitsMultiple, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MessageSecurityAssistExtension7, - .MessageSecurityAssistExtension8, - .MiscellaneousExtensions, - .MiscellaneousExtensions2, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - .VectorEnhancements1, - .VectorPackedDecimal, - }), - CpuInfo(@This(), FeatureType).create(.Z15, "z15", &[_]FeatureType { - .DfpPackedConversion, - .DfpZonedConversion, - .DeflateConversion, - .DistinctOps, - .EnhancedDat2, - .EnhancedSort, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .GuardedStorage, - .HighWord, - .InsertReferenceBitsMultiple, - .InterlockedAccess1, - .LoadAndTrap, - .LoadAndZeroRightmostByte, - .LoadStoreOnCond, - .LoadStoreOnCond2, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MessageSecurityAssistExtension5, - .MessageSecurityAssistExtension7, - .MessageSecurityAssistExtension8, - .MessageSecurityAssistExtension9, - .MiscellaneousExtensions, - .MiscellaneousExtensions2, - .MiscellaneousExtensions3, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - .Vector, - .VectorEnhancements1, - .VectorEnhancements2, - .VectorPackedDecimal, - .VectorPackedDecimalEnhancement, - }), - CpuInfo(@This(), FeatureType).create(.Z196, "z196", &[_]FeatureType { - .DistinctOps, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadStoreOnCond, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .PopulationCount, - .ResetReferenceBitsMultiple, - }), - CpuInfo(@This(), FeatureType).create(.ZEC12, "zEC12", &[_]FeatureType { - .DfpZonedConversion, - .DistinctOps, - .EnhancedDat2, - .ExecutionHint, - .FpExtension, - .FastSerialization, - .HighWord, - .InterlockedAccess1, - .LoadAndTrap, - .LoadStoreOnCond, - .MessageSecurityAssistExtension3, - .MessageSecurityAssistExtension4, - .MiscellaneousExtensions, - .PopulationCount, - .ProcessorAssist, - .ResetReferenceBitsMultiple, - .TransactionalExecution, - }), - }; -}; diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig deleted file mode 100644 index a05702dac19ac3bcdb86bd4e5374b0b5cb4ddf27..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/WebAssemblyCpu.zig +++ /dev/null @@ -1,28 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const WebAssemblyCpu = enum { - BleedingEdge, - Generic, - Mvp, - - const FeatureType = feature.WebAssemblyFeature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType { - .Atomics, - .MutableGlobals, - .NontrappingFptoint, - .Simd128, - .SignExt, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Mvp, "mvp", &[_]FeatureType { - }), - }; -}; diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig deleted file mode 100644 index 0a3a15f347a3b74a4aa4143d374d03ac5191a5c8..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/X86Cpu.zig +++ /dev/null @@ -1,1864 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const X86Cpu = enum { - Amdfam10, - Athlon, - Athlon4, - AthlonFx, - AthlonMp, - AthlonTbird, - AthlonXp, - Athlon64, - Athlon64Sse3, - Atom, - Barcelona, - Bdver1, - Bdver2, - Bdver3, - Bdver4, - Bonnell, - Broadwell, - Btver1, - Btver2, - C3, - C32, - Cannonlake, - Cascadelake, - Cooperlake, - CoreAvxI, - CoreAvx2, - Core2, - Corei7, - Corei7Avx, - Generic, - Geode, - Goldmont, - GoldmontPlus, - Haswell, - I386, - I486, - I586, - I686, - IcelakeClient, - IcelakeServer, - Ivybridge, - K6, - K62, - K63, - K8, - K8Sse3, - Knl, - Knm, - Lakemont, - Nehalem, - Nocona, - Opteron, - OpteronSse3, - Penryn, - Pentium, - PentiumM, - PentiumMmx, - Pentium2, - Pentium3, - Pentium3m, - Pentium4, - Pentium4m, - Pentiumpro, - Prescott, - Sandybridge, - Silvermont, - Skx, - Skylake, - SkylakeAvx512, - Slm, - Tigerlake, - Tremont, - Westmere, - WinchipC6, - Winchip2, - X8664, - Yonah, - Znver1, - Znver2, - - const FeatureType = feature.X86Feature; - - pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) { - return cpu_infos[@enumToInt(self)]; - } - - pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) { - CpuInfo(@This(), FeatureType).create(.Amdfam10, "amdfam10", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastScalarShiftMasks, - .Sahf, - .Lzcnt, - .Nopl, - .Popcnt, - .Sse, - .Sse4a, - .SlowShld, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Athlon, "athlon", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cmov, - .Cx8, - .Nopl, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Athlon4, "athlon-4", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cmov, - .Cx8, - .Fxsr, - .Nopl, - .Sse, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.AthlonFx, "athlon-fx", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse2, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.AthlonMp, "athlon-mp", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cmov, - .Cx8, - .Fxsr, - .Nopl, - .Sse, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cmov, - .Cx8, - .Nopl, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.AthlonXp, "athlon-xp", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cmov, - .Cx8, - .Fxsr, - .Nopl, - .Sse, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Athlon64, "athlon64", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse2, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse3, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Atom, "atom", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .LeaSp, - .LeaUsesAg, - .Mmx, - .Movbe, - .Nopl, - .PadShortFunctions, - .Sse, - .Ssse3, - .IdivlToDivb, - .IdivqToDivl, - .SlowTwoMemOps, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Barcelona, "barcelona", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastScalarShiftMasks, - .Sahf, - .Lzcnt, - .Nopl, - .Popcnt, - .Sse, - .Sse4a, - .SlowShld, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Bdver1, "bdver1", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Branchfusion, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Fast11bytenop, - .FastScalarShiftMasks, - .Sahf, - .Lwp, - .Lzcnt, - .Mmx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .SlowShld, - .X87, - .Xop, - .Xsave, - }), - CpuInfo(@This(), FeatureType).create(.Bdver2, "bdver2", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Bmi, - .Branchfusion, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fma, - .Fxsr, - .Fast11bytenop, - .FastBextr, - .FastScalarShiftMasks, - .Sahf, - .Lwp, - .Lzcnt, - .Mmx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .SlowShld, - .Tbm, - .X87, - .Xop, - .Xsave, - }), - CpuInfo(@This(), FeatureType).create(.Bdver3, "bdver3", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Bmi, - .Branchfusion, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .Fast11bytenop, - .FastBextr, - .FastScalarShiftMasks, - .Sahf, - .Lwp, - .Lzcnt, - .Mmx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .SlowShld, - .Tbm, - .X87, - .Xop, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Bdver4, "bdver4", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Avx2, - .Bmi, - .Bmi2, - .Branchfusion, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .Fast11bytenop, - .FastBextr, - .FastScalarShiftMasks, - .Sahf, - .Lwp, - .Lzcnt, - .Mmx, - .Mwaitx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .SlowShld, - .Tbm, - .X87, - .Xop, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Bonnell, "bonnell", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .LeaSp, - .LeaUsesAg, - .Mmx, - .Movbe, - .Nopl, - .PadShortFunctions, - .Sse, - .Ssse3, - .IdivlToDivb, - .IdivqToDivl, - .SlowTwoMemOps, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Broadwell, "broadwell", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Avx, - .Avx2, - .Bmi, - .Bmi2, - .Cmov, - .Cx8, - .Cx16, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .Invpcid, - .Sahf, - .Lzcnt, - .FalseDepsLzcntTzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Rdrnd, - .Rdseed, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Btver1, "btver1", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Fast15bytenop, - .FastScalarShiftMasks, - .FastVectorShiftMasks, - .Sahf, - .Lzcnt, - .Mmx, - .Nopl, - .Popcnt, - .Prfchw, - .Sse, - .Sse4a, - .Ssse3, - .SlowShld, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Btver2, "btver2", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Avx, - .Bmi, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fxsr, - .Fast15bytenop, - .FastBextr, - .FastHops, - .FastLzcnt, - .FastPartialYmmOrZmmWrite, - .FastScalarShiftMasks, - .FastVectorShiftMasks, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .Sse4a, - .Ssse3, - .SlowShld, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.C3, "c3", &[_]FeatureType { - .Mmx, - .Dnow3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.C32, "c3-2", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Sse, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Cannonlake, "cannonlake", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Avx512ifma, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .Prfchw, - .Prefer256Bit, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Avx512vbmi, - .Avx512vl, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Cascadelake, "cascadelake", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Prefer256Bit, - .Rdrnd, - .Rdseed, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Avx512vl, - .Avx512vnni, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Cooperlake, "cooperlake", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Avx512bf16, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Prefer256Bit, - .Rdrnd, - .Rdseed, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Avx512vl, - .Avx512vnni, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.CoreAvxI, "core-avx-i", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .Sahf, - .Mmx, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Rdrnd, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .SlowUnalignedMem32, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.CoreAvx2, "core-avx2", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Avx2, - .Bmi, - .Bmi2, - .Cmov, - .Cx8, - .Cx16, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .Invpcid, - .Sahf, - .Lzcnt, - .FalseDepsLzcntTzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Rdrnd, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Core2, "core2", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Macrofusion, - .Nopl, - .Sse, - .Ssse3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Corei7, "corei7", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Macrofusion, - .Nopl, - .Popcnt, - .Sse, - .Sse42, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Corei7Avx, "corei7-avx", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .Sahf, - .Mmx, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .SlowUnalignedMem32, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType { - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Geode, "geode", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Goldmont, "goldmont", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Clflushopt, - .Cmov, - .Cx8, - .Cx16, - .Fsgsbase, - .Fxsr, - .Sahf, - .Mmx, - .Movbe, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Rdrnd, - .Rdseed, - .Sha, - .Sse42, - .Ssse3, - .SlowIncdec, - .SlowLea, - .SlowTwoMemOps, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Clflushopt, - .Cmov, - .Cx8, - .Cx16, - .Fsgsbase, - .Fxsr, - .Sahf, - .Mmx, - .Movbe, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .Ptwrite, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Sse42, - .Ssse3, - .SlowIncdec, - .SlowLea, - .SlowTwoMemOps, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Haswell, "haswell", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Avx2, - .Bmi, - .Bmi2, - .Cmov, - .Cx8, - .Cx16, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .Invpcid, - .Sahf, - .Lzcnt, - .FalseDepsLzcntTzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Rdrnd, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.I386, "i386", &[_]FeatureType { - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.I486, "i486", &[_]FeatureType { - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.I586, "i586", &[_]FeatureType { - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.I686, "i686", &[_]FeatureType { - .Cmov, - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.IcelakeClient, "icelake-client", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Avx512bitalg, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .Gfni, - .FastGather, - .Avx512ifma, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .Prfchw, - .Prefer256Bit, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Vaes, - .Avx512vbmi, - .Avx512vbmi2, - .Avx512vl, - .Avx512vnni, - .Vpclmulqdq, - .Avx512vpopcntdq, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.IcelakeServer, "icelake-server", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Avx512bitalg, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .Gfni, - .FastGather, - .Avx512ifma, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pconfig, - .Pku, - .Popcnt, - .Prfchw, - .Prefer256Bit, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Vaes, - .Avx512vbmi, - .Avx512vbmi2, - .Avx512vl, - .Avx512vnni, - .Vpclmulqdq, - .Avx512vpopcntdq, - .Wbnoinvd, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Ivybridge, "ivybridge", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .Sahf, - .Mmx, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Rdrnd, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .SlowUnalignedMem32, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.K6, "k6", &[_]FeatureType { - .Cx8, - .Mmx, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.K62, "k6-2", &[_]FeatureType { - .Mmx, - .Dnow3, - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.K63, "k6-3", &[_]FeatureType { - .Mmx, - .Dnow3, - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.K8, "k8", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse2, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.K8Sse3, "k8-sse3", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse3, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Knl, "knl", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512cd, - .Cmov, - .Cx8, - .Cx16, - .Avx512er, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastPartialYmmOrZmmWrite, - .FastGather, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Nopl, - .Pclmul, - .Avx512pf, - .Popcnt, - .Prefetchwt1, - .Prfchw, - .Rdrnd, - .Rdseed, - .Slow3opsLea, - .IdivqToDivl, - .SlowIncdec, - .SlowPmaddwd, - .SlowTwoMemOps, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Knm, "knm", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512cd, - .Cmov, - .Cx8, - .Cx16, - .Avx512er, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastPartialYmmOrZmmWrite, - .FastGather, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Nopl, - .Pclmul, - .Avx512pf, - .Popcnt, - .Prefetchwt1, - .Prfchw, - .Rdrnd, - .Rdseed, - .Slow3opsLea, - .IdivqToDivl, - .SlowIncdec, - .SlowPmaddwd, - .SlowTwoMemOps, - .Avx512vpopcntdq, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Lakemont, "lakemont", &[_]FeatureType { - }), - CpuInfo(@This(), FeatureType).create(.Nehalem, "nehalem", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Macrofusion, - .Nopl, - .Popcnt, - .Sse, - .Sse42, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Nocona, "nocona", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Opteron, "opteron", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse2, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType { - .Mmx, - .Dnowa3, - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastScalarShiftMasks, - .Nopl, - .Sse, - .Sse3, - .SlowShld, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Penryn, "penryn", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Macrofusion, - .Nopl, - .Sse, - .Sse41, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium, "pentium", &[_]FeatureType { - .Cx8, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.PentiumM, "pentium-m", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse2, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType { - .Cx8, - .Mmx, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium2, "pentium2", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium3, "pentium3", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium3m, "pentium3m", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium4, "pentium4", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse2, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentium4m, "pentium4m", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse2, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Pentiumpro, "pentiumpro", &[_]FeatureType { - .Cmov, - .Cx8, - .Nopl, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Prescott, "prescott", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Sandybridge, "sandybridge", &[_]FeatureType { - .Bit64, - .Sse, - .Avx, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .Sahf, - .Mmx, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .SlowUnalignedMem32, - .X87, - .Xsave, - .Xsaveopt, - }), - CpuInfo(@This(), FeatureType).create(.Silvermont, "silvermont", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Movbe, - .Nopl, - .Sse, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Rdrnd, - .Sse42, - .Ssse3, - .IdivqToDivl, - .SlowIncdec, - .SlowLea, - .SlowPmulld, - .SlowTwoMemOps, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Skx, "skx", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Prefer256Bit, - .Rdrnd, - .Rdseed, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Avx512vl, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Skylake, "skylake", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Bmi, - .Bmi2, - .Clflushopt, - .Cmov, - .Cx8, - .Cx16, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Rdrnd, - .Rdseed, - .Sgx, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .FastGather, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Prefer256Bit, - .Rdrnd, - .Rdseed, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Avx512vl, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Slm, "slm", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Movbe, - .Nopl, - .Sse, - .Pclmul, - .Popcnt, - .FalseDepsPopcnt, - .Prfchw, - .Rdrnd, - .Sse42, - .Ssse3, - .IdivqToDivl, - .SlowIncdec, - .SlowLea, - .SlowPmulld, - .SlowTwoMemOps, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Tigerlake, "tigerlake", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx, - .Avx2, - .Avx512f, - .Avx512bitalg, - .Bmi, - .Bmi2, - .Avx512bw, - .Avx512cd, - .Clflushopt, - .Clwb, - .Cmov, - .Cx8, - .Cx16, - .Avx512dq, - .Ermsb, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .FastShldRotate, - .FastScalarFsqrt, - .FastVariableShuffle, - .FastVectorFsqrt, - .Gfni, - .FastGather, - .Avx512ifma, - .Invpcid, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Movdir64b, - .Movdiri, - .Macrofusion, - .MergeToThreewayBranch, - .Nopl, - .Pclmul, - .Pku, - .Popcnt, - .Prfchw, - .Prefer256Bit, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Shstk, - .Sse42, - .Slow3opsLea, - .IdivqToDivl, - .Vaes, - .Avx512vbmi, - .Avx512vbmi2, - .Avx512vl, - .Avx512vnni, - .Avx512vp2intersect, - .Vpclmulqdq, - .Avx512vpopcntdq, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Tremont, "tremont", &[_]FeatureType { - .Bit64, - .Sse, - .Aes, - .Cldemote, - .Clflushopt, - .Cmov, - .Cx8, - .Cx16, - .Fsgsbase, - .Fxsr, - .Gfni, - .Sahf, - .Mmx, - .Movbe, - .Movdir64b, - .Movdiri, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .Ptwrite, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sgx, - .Sha, - .Sse42, - .Ssse3, - .SlowIncdec, - .SlowLea, - .SlowTwoMemOps, - .Waitpkg, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Westmere, "westmere", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Cx16, - .Fxsr, - .Sahf, - .Mmx, - .Macrofusion, - .Nopl, - .Sse, - .Pclmul, - .Popcnt, - .Sse42, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.WinchipC6, "winchip-c6", &[_]FeatureType { - .Mmx, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Winchip2, "winchip2", &[_]FeatureType { - .Mmx, - .Dnow3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.X8664, "x86-64", &[_]FeatureType { - .Bit64, - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Macrofusion, - .Nopl, - .Sse, - .Sse2, - .Slow3opsLea, - .SlowIncdec, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Yonah, "yonah", &[_]FeatureType { - .Cmov, - .Cx8, - .Fxsr, - .Mmx, - .Nopl, - .Sse, - .Sse3, - .SlowUnalignedMem16, - .X87, - }), - CpuInfo(@This(), FeatureType).create(.Znver1, "znver1", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx2, - .Bmi, - .Bmi2, - .Branchfusion, - .Clflushopt, - .Clzero, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .Fast15bytenop, - .FastBextr, - .FastLzcnt, - .FastScalarShiftMasks, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Mwaitx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .Rdrnd, - .Rdseed, - .Sha, - .Sse4a, - .SlowShld, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - CpuInfo(@This(), FeatureType).create(.Znver2, "znver2", &[_]FeatureType { - .Bit64, - .Adx, - .Sse, - .Aes, - .Avx2, - .Bmi, - .Bmi2, - .Branchfusion, - .Clflushopt, - .Clwb, - .Clzero, - .Cmov, - .Cx8, - .Cx16, - .F16c, - .Fma, - .Fsgsbase, - .Fxsr, - .Fast15bytenop, - .FastBextr, - .FastLzcnt, - .FastScalarShiftMasks, - .Sahf, - .Lzcnt, - .Mmx, - .Movbe, - .Mwaitx, - .Nopl, - .Pclmul, - .Popcnt, - .Prfchw, - .Rdpid, - .Rdrnd, - .Rdseed, - .Sha, - .Sse4a, - .SlowShld, - .Wbnoinvd, - .X87, - .Xsave, - .Xsavec, - .Xsaveopt, - .Xsaves, - }), - }; -}; diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig deleted file mode 100644 index e35eaaf41d1b5bb9447a44309a825d56c9b8d984..0000000000000000000000000000000000000000 --- a/lib/std/target/cpu/empty.zig +++ /dev/null @@ -1,6 +0,0 @@ -const feature = @import("std").target.feature; -const CpuInfo = @import("std").target.cpu.CpuInfo; - -pub const EmptyCpu = struct { - pub const cpu_infos = [0]CpuInfo(@This(), feature.EmptyFeature) {}; -}; diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig deleted file mode 100644 index d5bf45cd0ef9ddc6cfd450bf20d10e856af6c9f0..0000000000000000000000000000000000000000 --- a/lib/std/target/feature.zig +++ /dev/null @@ -1,81 +0,0 @@ -const builtin = @import("builtin"); -const std = @import("std"); -const Arch = std.Target.Arch; - -pub const AArch64Feature = @import("feature/AArch64Feature.zig").AArch64Feature; -pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature; -pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature; -pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature; -pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature; -pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature; -pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature; -pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature; -pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature; -pub const RiscVFeature = @import("feature/RiscVFeature.zig").RiscVFeature; -pub const SparcFeature = @import("feature/SparcFeature.zig").SparcFeature; -pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature; -pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature; -pub const X86Feature = @import("feature/X86Feature.zig").X86Feature; - -pub const EmptyFeature = @import("feature/empty.zig").EmptyFeature; - -pub fn ArchFeature(comptime arch: @TagType(Arch)) type { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => ArmFeature, - .aarch64, .aarch64_be, .aarch64_32 => AArch64Feature, - .avr => AvrFeature, - .bpfel, .bpfeb => BpfFeature, - .hexagon => HexagonFeature, - .mips, .mipsel, .mips64, .mips64el => MipsFeature, - .msp430 => Msp430Feature, - .powerpc, .powerpc64, .powerpc64le => PowerPcFeature, - .amdgcn => AmdGpuFeature, - .riscv32, .riscv64 => RiscVFeature, - .sparc, .sparcv9, .sparcel => SparcFeature, - .s390x => SystemZFeature, - .i386, .x86_64 => X86Feature, - .nvptx, .nvptx64 => NvptxFeature, - .wasm32, .wasm64 => WebAssemblyFeature, - - else => EmptyFeature, - }; -} - -pub fn ArchFeatureInfo(comptime arch: @TagType(Arch)) type { - return FeatureInfo(ArchFeature(arch)); -} - -pub fn FeatureInfo(comptime EnumType: type) type { - return struct { - value: EnumType, - name: []const u8, - description: []const u8, - llvm_name: []const u8, - - subfeatures: []const EnumType, - - const Self = @This(); - - pub fn create(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8) Self { - return Self { - .value = value, - .name = name, - .description = description, - .llvm_name = llvm_name, - - .subfeatures = &[_]EnumType{}, - }; - } - - pub fn createWithSubfeatures(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8, subfeatures: []const EnumType) Self { - return Self { - .value = value, - .name = name, - .description = description, - .llvm_name = llvm_name, - - .subfeatures = subfeatures, - }; - } - }; -} diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig deleted file mode 100644 index 8044d957be998f9a038bd10e57596d28367b9eab..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/AArch64Feature.zig +++ /dev/null @@ -1,750 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const AArch64Feature = enum { - Aes, - Am, - AggressiveFma, - Altnzcv, - AlternateSextloadCvtF32Pattern, - ArithBccFusion, - ArithCbzFusion, - BalanceFpOps, - Bti, - Ccidx, - Ccpp, - Crc, - Ccdp, - CallSavedX8, - CallSavedX9, - CallSavedX10, - CallSavedX11, - CallSavedX12, - CallSavedX13, - CallSavedX14, - CallSavedX15, - CallSavedX18, - Complxnum, - Crypto, - CustomCheapAsMove, - Dit, - DisableLatencySchedHeuristic, - Dotprod, - Ete, - ExynosCheapAsMove, - Fmi, - Fp16fml, - FpArmv8, - Fptoint, - Force32bitJumpTables, - Fullfp16, - FuseAes, - FuseAddress, - FuseArithLogic, - FuseCsel, - FuseCryptoEor, - FuseLiterals, - Jsconv, - Lor, - Lse, - LslFast, - Mpam, - Mte, - Neon, - Nv, - NoNegImmediates, - Pa, - Pan, - PanRwv, - Perfmon, - UsePostraScheduler, - Predres, - PredictableSelectExpensive, - Uaops, - Ras, - Rasv8_4, - Rcpc, - RcpcImmo, - Rdm, - Rand, - ReserveX1, - ReserveX2, - ReserveX3, - ReserveX4, - ReserveX5, - ReserveX6, - ReserveX7, - ReserveX9, - ReserveX10, - ReserveX11, - ReserveX12, - ReserveX13, - ReserveX14, - ReserveX15, - ReserveX18, - ReserveX20, - ReserveX21, - ReserveX22, - ReserveX23, - ReserveX24, - ReserveX25, - ReserveX26, - ReserveX27, - ReserveX28, - Sb, - Sel2, - Sha2, - Sha3, - Sm4, - Spe, - Ssbs, - Sve, - Sve2, - Sve2Aes, - Sve2Bitperm, - Sve2Sha3, - Sve2Sm4, - SlowMisaligned128store, - SlowPaired128, - SlowStrqroStore, - Specrestrict, - StrictAlign, - TlbRmi, - Tme, - Tracev84, - Trbe, - TaggedGlobals, - UseAa, - TpidrEl1, - TpidrEl2, - TpidrEl3, - UseReciprocalSquareRoot, - Vh, - Zcm, - Zcz, - ZczFp, - ZczFpWorkaround, - ZczGp, - V81a, - V82a, - V83a, - V84a, - V85a, - A35, - A53, - A55, - A57, - A65, - A72, - A73, - A75, - A76, - Cyclone, - Exynosm1, - Exynosm2, - Exynosm3, - Exynosm4, - Falkor, - Kryo, - Neoversee1, - Neoversen1, - Saphira, - Tsv110, - Thunderx, - Thunderx2t99, - Thunderxt81, - Thunderxt83, - Thunderxt88, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.Am, "am", "Enable v8.4-A Activity Monitors extension", "am"), - FeatureInfo(@This()).create(.AggressiveFma, "aggressive-fma", "Enable Aggressive FMA for floating-point.", "aggressive-fma"), - FeatureInfo(@This()).create(.Altnzcv, "altnzcv", "Enable alternative NZCV format for floating point comparisons", "altnzcv"), - FeatureInfo(@This()).create(.AlternateSextloadCvtF32Pattern, "alternate-sextload-cvt-f32-pattern", "Use alternative pattern for sextload convert to f32", "alternate-sextload-cvt-f32-pattern"), - FeatureInfo(@This()).create(.ArithBccFusion, "arith-bcc-fusion", "CPU fuses arithmetic+bcc operations", "arith-bcc-fusion"), - FeatureInfo(@This()).create(.ArithCbzFusion, "arith-cbz-fusion", "CPU fuses arithmetic + cbz/cbnz operations", "arith-cbz-fusion"), - FeatureInfo(@This()).create(.BalanceFpOps, "balance-fp-ops", "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", "balance-fp-ops"), - FeatureInfo(@This()).create(.Bti, "bti", "Enable Branch Target Identification", "bti"), - FeatureInfo(@This()).create(.Ccidx, "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", "ccidx"), - FeatureInfo(@This()).create(.Ccpp, "ccpp", "Enable v8.2 data Cache Clean to Point of Persistence", "ccpp"), - FeatureInfo(@This()).create(.Crc, "crc", "Enable ARMv8 CRC-32 checksum instructions", "crc"), - FeatureInfo(@This()).create(.Ccdp, "ccdp", "Enable v8.5 Cache Clean to Point of Deep Persistence", "ccdp"), - FeatureInfo(@This()).create(.CallSavedX8, "call-saved-x8", "Make X8 callee saved.", "call-saved-x8"), - FeatureInfo(@This()).create(.CallSavedX9, "call-saved-x9", "Make X9 callee saved.", "call-saved-x9"), - FeatureInfo(@This()).create(.CallSavedX10, "call-saved-x10", "Make X10 callee saved.", "call-saved-x10"), - FeatureInfo(@This()).create(.CallSavedX11, "call-saved-x11", "Make X11 callee saved.", "call-saved-x11"), - FeatureInfo(@This()).create(.CallSavedX12, "call-saved-x12", "Make X12 callee saved.", "call-saved-x12"), - FeatureInfo(@This()).create(.CallSavedX13, "call-saved-x13", "Make X13 callee saved.", "call-saved-x13"), - FeatureInfo(@This()).create(.CallSavedX14, "call-saved-x14", "Make X14 callee saved.", "call-saved-x14"), - FeatureInfo(@This()).create(.CallSavedX15, "call-saved-x15", "Make X15 callee saved.", "call-saved-x15"), - FeatureInfo(@This()).create(.CallSavedX18, "call-saved-x18", "Make X18 callee saved.", "call-saved-x18"), - FeatureInfo(@This()).createWithSubfeatures(.Complxnum, "complxnum", "Enable v8.3-A Floating-point complex number support", "complxnum", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable cryptographic instructions", "crypto", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.CustomCheapAsMove, "custom-cheap-as-move", "Use custom handling of cheap instructions", "custom-cheap-as-move"), - FeatureInfo(@This()).create(.Dit, "dit", "Enable v8.4-A Data Independent Timing instructions", "dit"), - FeatureInfo(@This()).create(.DisableLatencySchedHeuristic, "disable-latency-sched-heuristic", "Disable latency scheduling heuristic", "disable-latency-sched-heuristic"), - FeatureInfo(@This()).create(.Dotprod, "dotprod", "Enable dot product support", "dotprod"), - FeatureInfo(@This()).createWithSubfeatures(.Ete, "ete", "Enable Embedded Trace Extension", "ete", &[_]@This() { - .Trbe, - }), - FeatureInfo(@This()).createWithSubfeatures(.ExynosCheapAsMove, "exynos-cheap-as-move", "Use Exynos specific handling of cheap instructions", "exynos-cheap-as-move", &[_]@This() { - .CustomCheapAsMove, - }), - FeatureInfo(@This()).create(.Fmi, "fmi", "Enable v8.4-A Flag Manipulation Instructions", "fmi"), - FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable FP16 FML instructions", "fp16fml", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8"), - FeatureInfo(@This()).create(.Fptoint, "fptoint", "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", "fptoint"), - FeatureInfo(@This()).create(.Force32bitJumpTables, "force-32bit-jump-tables", "Force jump table entries to be 32-bits wide except at MinSize", "force-32bit-jump-tables"), - FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Full FP16", "fullfp16", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), - FeatureInfo(@This()).create(.FuseAddress, "fuse-address", "CPU fuses address generation and memory operations", "fuse-address"), - FeatureInfo(@This()).create(.FuseArithLogic, "fuse-arith-logic", "CPU fuses arithmetic and logic operations", "fuse-arith-logic"), - FeatureInfo(@This()).create(.FuseCsel, "fuse-csel", "CPU fuses conditional select operations", "fuse-csel"), - FeatureInfo(@This()).create(.FuseCryptoEor, "fuse-crypto-eor", "CPU fuses AES/PMULL and EOR operations", "fuse-crypto-eor"), - FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), - FeatureInfo(@This()).createWithSubfeatures(.Jsconv, "jsconv", "Enable v8.3-A JavaScript FP conversion enchancement", "jsconv", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.Lor, "lor", "Enables ARM v8.1 Limited Ordering Regions extension", "lor"), - FeatureInfo(@This()).create(.Lse, "lse", "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", "lse"), - FeatureInfo(@This()).create(.LslFast, "lsl-fast", "CPU has a fastpath logical shift of up to 3 places", "lsl-fast"), - FeatureInfo(@This()).create(.Mpam, "mpam", "Enable v8.4-A Memory system Partitioning and Monitoring extension", "mpam"), - FeatureInfo(@This()).create(.Mte, "mte", "Enable Memory Tagging Extension", "mte"), - FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable Advanced SIMD instructions", "neon", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.Nv, "nv", "Enable v8.4-A Nested Virtualization Enchancement", "nv"), - FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"), - FeatureInfo(@This()).create(.Pa, "pa", "Enable v8.3-A Pointer Authentication enchancement", "pa"), - FeatureInfo(@This()).create(.Pan, "pan", "Enables ARM v8.1 Privileged Access-Never extension", "pan"), - FeatureInfo(@This()).createWithSubfeatures(.PanRwv, "pan-rwv", "Enable v8.2 PAN s1e1R and s1e1W Variants", "pan-rwv", &[_]@This() { - .Pan, - }), - FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", "perfmon"), - FeatureInfo(@This()).create(.UsePostraScheduler, "use-postra-scheduler", "Schedule again after register allocation", "use-postra-scheduler"), - FeatureInfo(@This()).create(.Predres, "predres", "Enable v8.5a execution and data prediction invalidation instructions", "predres"), - FeatureInfo(@This()).create(.PredictableSelectExpensive, "predictable-select-expensive", "Prefer likely predicted branches over selects", "predictable-select-expensive"), - FeatureInfo(@This()).create(.Uaops, "uaops", "Enable v8.2 UAO PState", "uaops"), - FeatureInfo(@This()).create(.Ras, "ras", "Enable ARMv8 Reliability, Availability and Serviceability Extensions", "ras"), - FeatureInfo(@This()).createWithSubfeatures(.Rasv8_4, "rasv8_4", "Enable v8.4-A Reliability, Availability and Serviceability extension", "rasv8_4", &[_]@This() { - .Ras, - }), - FeatureInfo(@This()).create(.Rcpc, "rcpc", "Enable support for RCPC extension", "rcpc"), - FeatureInfo(@This()).createWithSubfeatures(.RcpcImmo, "rcpc-immo", "Enable v8.4-A RCPC instructions with Immediate Offsets", "rcpc-immo", &[_]@This() { - .Rcpc, - }), - FeatureInfo(@This()).create(.Rdm, "rdm", "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", "rdm"), - FeatureInfo(@This()).create(.Rand, "rand", "Enable Random Number generation instructions", "rand"), - FeatureInfo(@This()).create(.ReserveX1, "reserve-x1", "Reserve X1, making it unavailable as a GPR", "reserve-x1"), - FeatureInfo(@This()).create(.ReserveX2, "reserve-x2", "Reserve X2, making it unavailable as a GPR", "reserve-x2"), - FeatureInfo(@This()).create(.ReserveX3, "reserve-x3", "Reserve X3, making it unavailable as a GPR", "reserve-x3"), - FeatureInfo(@This()).create(.ReserveX4, "reserve-x4", "Reserve X4, making it unavailable as a GPR", "reserve-x4"), - FeatureInfo(@This()).create(.ReserveX5, "reserve-x5", "Reserve X5, making it unavailable as a GPR", "reserve-x5"), - FeatureInfo(@This()).create(.ReserveX6, "reserve-x6", "Reserve X6, making it unavailable as a GPR", "reserve-x6"), - FeatureInfo(@This()).create(.ReserveX7, "reserve-x7", "Reserve X7, making it unavailable as a GPR", "reserve-x7"), - FeatureInfo(@This()).create(.ReserveX9, "reserve-x9", "Reserve X9, making it unavailable as a GPR", "reserve-x9"), - FeatureInfo(@This()).create(.ReserveX10, "reserve-x10", "Reserve X10, making it unavailable as a GPR", "reserve-x10"), - FeatureInfo(@This()).create(.ReserveX11, "reserve-x11", "Reserve X11, making it unavailable as a GPR", "reserve-x11"), - FeatureInfo(@This()).create(.ReserveX12, "reserve-x12", "Reserve X12, making it unavailable as a GPR", "reserve-x12"), - FeatureInfo(@This()).create(.ReserveX13, "reserve-x13", "Reserve X13, making it unavailable as a GPR", "reserve-x13"), - FeatureInfo(@This()).create(.ReserveX14, "reserve-x14", "Reserve X14, making it unavailable as a GPR", "reserve-x14"), - FeatureInfo(@This()).create(.ReserveX15, "reserve-x15", "Reserve X15, making it unavailable as a GPR", "reserve-x15"), - FeatureInfo(@This()).create(.ReserveX18, "reserve-x18", "Reserve X18, making it unavailable as a GPR", "reserve-x18"), - FeatureInfo(@This()).create(.ReserveX20, "reserve-x20", "Reserve X20, making it unavailable as a GPR", "reserve-x20"), - FeatureInfo(@This()).create(.ReserveX21, "reserve-x21", "Reserve X21, making it unavailable as a GPR", "reserve-x21"), - FeatureInfo(@This()).create(.ReserveX22, "reserve-x22", "Reserve X22, making it unavailable as a GPR", "reserve-x22"), - FeatureInfo(@This()).create(.ReserveX23, "reserve-x23", "Reserve X23, making it unavailable as a GPR", "reserve-x23"), - FeatureInfo(@This()).create(.ReserveX24, "reserve-x24", "Reserve X24, making it unavailable as a GPR", "reserve-x24"), - FeatureInfo(@This()).create(.ReserveX25, "reserve-x25", "Reserve X25, making it unavailable as a GPR", "reserve-x25"), - FeatureInfo(@This()).create(.ReserveX26, "reserve-x26", "Reserve X26, making it unavailable as a GPR", "reserve-x26"), - FeatureInfo(@This()).create(.ReserveX27, "reserve-x27", "Reserve X27, making it unavailable as a GPR", "reserve-x27"), - FeatureInfo(@This()).create(.ReserveX28, "reserve-x28", "Reserve X28, making it unavailable as a GPR", "reserve-x28"), - FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5 Speculation Barrier", "sb"), - FeatureInfo(@This()).create(.Sel2, "sel2", "Enable v8.4-A Secure Exception Level 2 extension", "sel2"), - FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sha3, "sha3", "Enable SHA512 and SHA3 support", "sha3", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sm4, "sm4", "Enable SM3 and SM4 support", "sm4", &[_]@This() { - .FpArmv8, - }), - FeatureInfo(@This()).create(.Spe, "spe", "Enable Statistical Profiling extension", "spe"), - FeatureInfo(@This()).create(.Ssbs, "ssbs", "Enable Speculative Store Bypass Safe bit", "ssbs"), - FeatureInfo(@This()).create(.Sve, "sve", "Enable Scalable Vector Extension (SVE) instructions", "sve"), - FeatureInfo(@This()).createWithSubfeatures(.Sve2, "sve2", "Enable Scalable Vector Extension 2 (SVE2) instructions", "sve2", &[_]@This() { - .Sve, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() { - .FpArmv8, - .Sve, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() { - .Sve, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() { - .FpArmv8, - .Sve, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() { - .FpArmv8, - .Sve, - }), - FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"), - FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"), - FeatureInfo(@This()).create(.SlowStrqroStore, "slow-strqro-store", "STR of Q register with register offset is slow", "slow-strqro-store"), - FeatureInfo(@This()).create(.Specrestrict, "specrestrict", "Enable architectural speculation restriction", "specrestrict"), - FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"), - FeatureInfo(@This()).create(.TlbRmi, "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", "tlb-rmi"), - FeatureInfo(@This()).create(.Tme, "tme", "Enable Transactional Memory Extension", "tme"), - FeatureInfo(@This()).create(.Tracev84, "tracev8.4", "Enable v8.4-A Trace extension", "tracev8.4"), - FeatureInfo(@This()).create(.Trbe, "trbe", "Enable Trace Buffer Extension", "trbe"), - FeatureInfo(@This()).create(.TaggedGlobals, "tagged-globals", "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", "tagged-globals"), - FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), - FeatureInfo(@This()).create(.TpidrEl1, "tpidr-el1", "Permit use of TPIDR_EL1 for the TLS base", "tpidr-el1"), - FeatureInfo(@This()).create(.TpidrEl2, "tpidr-el2", "Permit use of TPIDR_EL2 for the TLS base", "tpidr-el2"), - FeatureInfo(@This()).create(.TpidrEl3, "tpidr-el3", "Permit use of TPIDR_EL3 for the TLS base", "tpidr-el3"), - FeatureInfo(@This()).create(.UseReciprocalSquareRoot, "use-reciprocal-square-root", "Use the reciprocal square root approximation", "use-reciprocal-square-root"), - FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"), - FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"), - FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() { - .ZczGp, - .ZczFp, - }), - FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"), - FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"), - FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"), - FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { - .Lse, - .Rdm, - .Crc, - .Lor, - .Pan, - .Vh, - }), - FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { - .Lse, - .Rdm, - .Pan, - .Crc, - .Lor, - .Uaops, - .Ras, - .Ccpp, - .Vh, - }), - FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { - .Lse, - .Vh, - .Pa, - .Rdm, - .Pan, - .Crc, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .Ccidx, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { - .Rdm, - .Dit, - .Am, - .Ras, - .Rcpc, - .Sel2, - .Ccpp, - .Pa, - .Pan, - .Uaops, - .Tracev84, - .Mpam, - .Lse, - .Nv, - .Dotprod, - .TlbRmi, - .Lor, - .Ccidx, - .FpArmv8, - .Crc, - .Fmi, - .Vh, - }), - FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { - .Vh, - .Rdm, - .Dit, - .Am, - .Ssbs, - .Specrestrict, - .Ras, - .Rcpc, - .Sel2, - .Ccpp, - .Pa, - .Bti, - .Ccdp, - .Pan, - .Uaops, - .Tracev84, - .Mpam, - .Lse, - .Sb, - .Nv, - .Altnzcv, - .Dotprod, - .TlbRmi, - .Lor, - .Ccidx, - .Predres, - .Crc, - .Fptoint, - .Fmi, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() { - .Perfmon, - .FpArmv8, - .Crc, - }), - FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .CustomCheapAsMove, - .BalanceFpOps, - .UseAa, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() { - .Lse, - .Vh, - .Rdm, - .Perfmon, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .BalanceFpOps, - .FuseLiterals, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() { - .Perfmon, - .FpArmv8, - .Crc, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() { - .Perfmon, - .FpArmv8, - .Crc, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() { - .Lse, - .Vh, - .Rdm, - .Perfmon, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() { - .ArithBccFusion, - .ArithCbzFusion, - .ZczFp, - .AlternateSextloadCvtF32Pattern, - .DisableLatencySchedHeuristic, - .Perfmon, - .ZczGp, - .ZczFpWorkaround, - .Zcm, - .FpArmv8, - .FuseCryptoEor, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .UseReciprocalSquareRoot, - .CustomCheapAsMove, - .Force32bitJumpTables, - .SlowMisaligned128store, - .FpArmv8, - .SlowPaired128, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .CustomCheapAsMove, - .Force32bitJumpTables, - .SlowMisaligned128store, - .FpArmv8, - .SlowPaired128, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() { - .FuseCsel, - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .Force32bitJumpTables, - .FuseLiterals, - .FuseAddress, - .LslFast, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() { - .ArithBccFusion, - .Vh, - .ArithCbzFusion, - .ZczFp, - .Rdm, - .UsePostraScheduler, - .Ras, - .Force32bitJumpTables, - .Ccpp, - .FuseCsel, - .Pan, - .Uaops, - .FuseLiterals, - .LslFast, - .Lse, - .Perfmon, - .Dotprod, - .Lor, - .FuseArithLogic, - .Crc, - .CustomCheapAsMove, - .FuseAddress, - .ZczGp, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() { - .ZczFp, - .Rdm, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .ZczGp, - .FpArmv8, - .SlowStrqroStore, - .LslFast, - }), - FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() { - .ZczFp, - .Perfmon, - .UsePostraScheduler, - .Crc, - .PredictableSelectExpensive, - .CustomCheapAsMove, - .ZczGp, - .FpArmv8, - .LslFast, - }), - FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() { - .Lse, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() { - .Lse, - .Spe, - .Vh, - .Rdm, - .Pan, - .Dotprod, - .Crc, - .Ssbs, - .Lor, - .Uaops, - .Ras, - .Rcpc, - .Ccpp, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() { - .Spe, - .Vh, - .ZczFp, - .Rdm, - .UsePostraScheduler, - .Dit, - .Am, - .Ras, - .Rcpc, - .Sel2, - .Ccpp, - .Pa, - .Pan, - .Uaops, - .Tracev84, - .Mpam, - .LslFast, - .Lse, - .Nv, - .Perfmon, - .Dotprod, - .TlbRmi, - .Lor, - .Ccidx, - .PredictableSelectExpensive, - .Crc, - .CustomCheapAsMove, - .Fmi, - .ZczGp, - .FpArmv8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() { - .Lse, - .Spe, - .Vh, - .Rdm, - .Perfmon, - .UsePostraScheduler, - .Pan, - .Dotprod, - .Crc, - .Lor, - .Uaops, - .CustomCheapAsMove, - .Ras, - .Ccpp, - .FpArmv8, - .FuseAes, - }), - FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - }), - FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() { - .Lse, - .ArithBccFusion, - .Vh, - .Rdm, - .UsePostraScheduler, - .Crc, - .Lor, - .Pan, - .AggressiveFma, - .FpArmv8, - .PredictableSelectExpensive, - }), - FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - }), - FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - }), - FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() { - .Perfmon, - .UsePostraScheduler, - .Crc, - .FpArmv8, - .PredictableSelectExpensive, - }), - }; -}; diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig deleted file mode 100644 index f7b9cb9da7e8e0d72c069b86cd88d7f2c2e474d5..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/AmdGpuFeature.zig +++ /dev/null @@ -1,343 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const AmdGpuFeature = enum { - BitInsts16, - AddNoCarryInsts, - ApertureRegs, - AtomicFaddInsts, - AutoWaitcntBeforeBarrier, - CiInsts, - CodeObjectV3, - Cumode, - DlInsts, - Dpp, - Dpp8, - NoSramEccSupport, - NoXnackSupport, - Dot1Insts, - Dot2Insts, - Dot3Insts, - Dot4Insts, - Dot5Insts, - Dot6Insts, - DumpCode, - Dumpcode, - EnableDs128, - LoadStoreOpt, - EnablePrtStrictNull, - SiScheduler, - UnsafeDsOffsetFolding, - Fmaf, - Fp16Denormals, - Fp32Denormals, - Fp64, - Fp64Denormals, - Fp64Fp16Denormals, - FpExceptions, - FastFmaf, - FlatAddressSpace, - FlatForGlobal, - FlatGlobalInsts, - FlatInstOffsets, - FlatScratchInsts, - FlatSegmentOffsetBug, - FmaMixInsts, - Gcn3Encoding, - Gfx7Gfx8Gfx9Insts, - Gfx8Insts, - Gfx9, - Gfx9Insts, - Gfx10, - Gfx10Insts, - InstFwdPrefetchBug, - IntClampInsts, - Inv2piInlineImm, - Ldsbankcount16, - Ldsbankcount32, - LdsBranchVmemWarHazard, - LdsMisalignedBug, - Localmemorysize0, - Localmemorysize32768, - Localmemorysize65536, - MaiInsts, - MfmaInlineLiteralBug, - MimgR128, - MadMixInsts, - MaxPrivateElementSize4, - MaxPrivateElementSize8, - MaxPrivateElementSize16, - Movrel, - NsaEncoding, - NsaToVmemBug, - NoDataDepHazard, - NoSdstCmpx, - Offset3fBug, - PkFmacF16Inst, - PromoteAlloca, - R128A16, - RegisterBanking, - Sdwa, - SdwaMav, - SdwaOmod, - SdwaOutModsVopc, - SdwaScalar, - SdwaSdst, - SgprInitBug, - SmemToVectorWriteHazard, - SMemrealtime, - SramEcc, - ScalarAtomics, - ScalarFlatScratchInsts, - ScalarStores, - SeaIslands, - SouthernIslands, - TrapHandler, - TrigReducedRange, - UnalignedBufferAccess, - UnalignedScratchAccess, - UnpackedD16Vmem, - VgprIndexMode, - VmemToScalarWriteHazard, - Vop3Literal, - Vop3p, - VcmpxExecWarHazard, - VcmpxPermlaneHazard, - VolcanicIslands, - Vscnt, - Wavefrontsize16, - Wavefrontsize32, - Wavefrontsize64, - Xnack, - HalfRate64Ops, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.BitInsts16, "16-bit-insts", "Has i16/f16 instructions", "16-bit-insts"), - FeatureInfo(@This()).create(.AddNoCarryInsts, "add-no-carry-insts", "Have VALU add/sub instructions without carry out", "add-no-carry-insts"), - FeatureInfo(@This()).create(.ApertureRegs, "aperture-regs", "Has Memory Aperture Base and Size Registers", "aperture-regs"), - FeatureInfo(@This()).create(.AtomicFaddInsts, "atomic-fadd-insts", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", "atomic-fadd-insts"), - FeatureInfo(@This()).create(.AutoWaitcntBeforeBarrier, "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", "auto-waitcnt-before-barrier"), - FeatureInfo(@This()).create(.CiInsts, "ci-insts", "Additional instructions for CI+", "ci-insts"), - FeatureInfo(@This()).create(.CodeObjectV3, "code-object-v3", "Generate code object version 3", "code-object-v3"), - FeatureInfo(@This()).create(.Cumode, "cumode", "Enable CU wavefront execution mode", "cumode"), - FeatureInfo(@This()).create(.DlInsts, "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", "dl-insts"), - FeatureInfo(@This()).create(.Dpp, "dpp", "Support DPP (Data Parallel Primitives) extension", "dpp"), - FeatureInfo(@This()).create(.Dpp8, "dpp8", "Support DPP8 (Data Parallel Primitives) extension", "dpp8"), - FeatureInfo(@This()).create(.NoSramEccSupport, "no-sram-ecc-support", "Hardware does not support SRAM ECC", "no-sram-ecc-support"), - FeatureInfo(@This()).create(.NoXnackSupport, "no-xnack-support", "Hardware does not support XNACK", "no-xnack-support"), - FeatureInfo(@This()).create(.Dot1Insts, "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", "dot1-insts"), - FeatureInfo(@This()).create(.Dot2Insts, "dot2-insts", "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", "dot2-insts"), - FeatureInfo(@This()).create(.Dot3Insts, "dot3-insts", "Has v_dot8c_i32_i4 instruction", "dot3-insts"), - FeatureInfo(@This()).create(.Dot4Insts, "dot4-insts", "Has v_dot2c_i32_i16 instruction", "dot4-insts"), - FeatureInfo(@This()).create(.Dot5Insts, "dot5-insts", "Has v_dot2c_f32_f16 instruction", "dot5-insts"), - FeatureInfo(@This()).create(.Dot6Insts, "dot6-insts", "Has v_dot4c_i32_i8 instruction", "dot6-insts"), - FeatureInfo(@This()).create(.DumpCode, "DumpCode", "Dump MachineInstrs in the CodeEmitter", "DumpCode"), - FeatureInfo(@This()).create(.Dumpcode, "dumpcode", "Dump MachineInstrs in the CodeEmitter", "dumpcode"), - FeatureInfo(@This()).create(.EnableDs128, "enable-ds128", "Use ds_{read|write}_b128", "enable-ds128"), - FeatureInfo(@This()).create(.LoadStoreOpt, "load-store-opt", "Enable SI load/store optimizer pass", "load-store-opt"), - FeatureInfo(@This()).create(.EnablePrtStrictNull, "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", "enable-prt-strict-null"), - FeatureInfo(@This()).create(.SiScheduler, "si-scheduler", "Enable SI Machine Scheduler", "si-scheduler"), - FeatureInfo(@This()).create(.UnsafeDsOffsetFolding, "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", "unsafe-ds-offset-folding"), - FeatureInfo(@This()).create(.Fmaf, "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", "fmaf"), - FeatureInfo(@This()).createWithSubfeatures(.Fp16Denormals, "fp16-denormals", "Enable half precision denormal handling", "fp16-denormals", &[_]@This() { - .Fp64, - }), - FeatureInfo(@This()).create(.Fp32Denormals, "fp32-denormals", "Enable single precision denormal handling", "fp32-denormals"), - FeatureInfo(@This()).create(.Fp64, "fp64", "Enable double precision operations", "fp64"), - FeatureInfo(@This()).createWithSubfeatures(.Fp64Denormals, "fp64-denormals", "Enable double and half precision denormal handling", "fp64-denormals", &[_]@This() { - .Fp64, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fp64Fp16Denormals, "fp64-fp16-denormals", "Enable double and half precision denormal handling", "fp64-fp16-denormals", &[_]@This() { - .Fp64, - }), - FeatureInfo(@This()).create(.FpExceptions, "fp-exceptions", "Enable floating point exceptions", "fp-exceptions"), - FeatureInfo(@This()).create(.FastFmaf, "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", "fast-fmaf"), - FeatureInfo(@This()).create(.FlatAddressSpace, "flat-address-space", "Support flat address space", "flat-address-space"), - FeatureInfo(@This()).create(.FlatForGlobal, "flat-for-global", "Force to generate flat instruction for global", "flat-for-global"), - FeatureInfo(@This()).create(.FlatGlobalInsts, "flat-global-insts", "Have global_* flat memory instructions", "flat-global-insts"), - FeatureInfo(@This()).create(.FlatInstOffsets, "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", "flat-inst-offsets"), - FeatureInfo(@This()).create(.FlatScratchInsts, "flat-scratch-insts", "Have scratch_* flat memory instructions", "flat-scratch-insts"), - FeatureInfo(@This()).create(.FlatSegmentOffsetBug, "flat-segment-offset-bug", "GFX10 bug, inst_offset ignored in flat segment", "flat-segment-offset-bug"), - FeatureInfo(@This()).create(.FmaMixInsts, "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", "fma-mix-insts"), - FeatureInfo(@This()).create(.Gcn3Encoding, "gcn3-encoding", "Encoding format for VI", "gcn3-encoding"), - FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"), - FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"), - FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() { - .ApertureRegs, - .IntClampInsts, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .ScalarAtomics, - .SMemrealtime, - .Gcn3Encoding, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .SdwaSdst, - .FlatInstOffsets, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .R128A16, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .ScalarFlatScratchInsts, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - }), - FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"), - FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() { - .Vscnt, - .ApertureRegs, - .Gfx10Insts, - .IntClampInsts, - .PkFmacF16Inst, - .SdwaOmod, - .SdwaScalar, - .AddNoCarryInsts, - .Movrel, - .SMemrealtime, - .NoSdstCmpx, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .NoSramEccSupport, - .SdwaSdst, - .FlatInstOffsets, - .RegisterBanking, - .Dpp, - .Localmemorysize65536, - .Vop3p, - .BitInsts16, - .Dpp8, - .Gfx8Insts, - .Inv2piInlineImm, - .Gfx9Insts, - .FmaMixInsts, - .MimgR128, - .Vop3Literal, - .FlatGlobalInsts, - .FlatScratchInsts, - .Fp64, - .FastFmaf, - .NoDataDepHazard, - }), - FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"), - FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"), - FeatureInfo(@This()).create(.IntClampInsts, "int-clamp-insts", "Support clamp for integer destination", "int-clamp-insts"), - FeatureInfo(@This()).create(.Inv2piInlineImm, "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", "inv-2pi-inline-imm"), - FeatureInfo(@This()).create(.Ldsbankcount16, "ldsbankcount16", "The number of LDS banks per compute unit.", "ldsbankcount16"), - FeatureInfo(@This()).create(.Ldsbankcount32, "ldsbankcount32", "The number of LDS banks per compute unit.", "ldsbankcount32"), - FeatureInfo(@This()).create(.LdsBranchVmemWarHazard, "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", "lds-branch-vmem-war-hazard"), - FeatureInfo(@This()).create(.LdsMisalignedBug, "lds-misaligned-bug", "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", "lds-misaligned-bug"), - FeatureInfo(@This()).create(.Localmemorysize0, "localmemorysize0", "The size of local memory in bytes", "localmemorysize0"), - FeatureInfo(@This()).create(.Localmemorysize32768, "localmemorysize32768", "The size of local memory in bytes", "localmemorysize32768"), - FeatureInfo(@This()).create(.Localmemorysize65536, "localmemorysize65536", "The size of local memory in bytes", "localmemorysize65536"), - FeatureInfo(@This()).create(.MaiInsts, "mai-insts", "Has mAI instructions", "mai-insts"), - FeatureInfo(@This()).create(.MfmaInlineLiteralBug, "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", "mfma-inline-literal-bug"), - FeatureInfo(@This()).create(.MimgR128, "mimg-r128", "Support 128-bit texture resources", "mimg-r128"), - FeatureInfo(@This()).create(.MadMixInsts, "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", "mad-mix-insts"), - FeatureInfo(@This()).create(.MaxPrivateElementSize4, "max-private-element-size-4", "Maximum private access size may be 4", "max-private-element-size-4"), - FeatureInfo(@This()).create(.MaxPrivateElementSize8, "max-private-element-size-8", "Maximum private access size may be 8", "max-private-element-size-8"), - FeatureInfo(@This()).create(.MaxPrivateElementSize16, "max-private-element-size-16", "Maximum private access size may be 16", "max-private-element-size-16"), - FeatureInfo(@This()).create(.Movrel, "movrel", "Has v_movrel*_b32 instructions", "movrel"), - FeatureInfo(@This()).create(.NsaEncoding, "nsa-encoding", "Support NSA encoding for image instructions", "nsa-encoding"), - FeatureInfo(@This()).create(.NsaToVmemBug, "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", "nsa-to-vmem-bug"), - FeatureInfo(@This()).create(.NoDataDepHazard, "no-data-dep-hazard", "Does not need SW waitstates", "no-data-dep-hazard"), - FeatureInfo(@This()).create(.NoSdstCmpx, "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", "no-sdst-cmpx"), - FeatureInfo(@This()).create(.Offset3fBug, "offset-3f-bug", "Branch offset of 3f hardware bug", "offset-3f-bug"), - FeatureInfo(@This()).create(.PkFmacF16Inst, "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", "pk-fmac-f16-inst"), - FeatureInfo(@This()).create(.PromoteAlloca, "promote-alloca", "Enable promote alloca pass", "promote-alloca"), - FeatureInfo(@This()).create(.R128A16, "r128-a16", "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", "r128-a16"), - FeatureInfo(@This()).create(.RegisterBanking, "register-banking", "Has register banking", "register-banking"), - FeatureInfo(@This()).create(.Sdwa, "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", "sdwa"), - FeatureInfo(@This()).create(.SdwaMav, "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", "sdwa-mav"), - FeatureInfo(@This()).create(.SdwaOmod, "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", "sdwa-omod"), - FeatureInfo(@This()).create(.SdwaOutModsVopc, "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-out-mods-vopc"), - FeatureInfo(@This()).create(.SdwaScalar, "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", "sdwa-scalar"), - FeatureInfo(@This()).create(.SdwaSdst, "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-sdst"), - FeatureInfo(@This()).create(.SgprInitBug, "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", "sgpr-init-bug"), - FeatureInfo(@This()).create(.SmemToVectorWriteHazard, "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", "smem-to-vector-write-hazard"), - FeatureInfo(@This()).create(.SMemrealtime, "s-memrealtime", "Has s_memrealtime instruction", "s-memrealtime"), - FeatureInfo(@This()).create(.SramEcc, "sram-ecc", "Enable SRAM ECC", "sram-ecc"), - FeatureInfo(@This()).create(.ScalarAtomics, "scalar-atomics", "Has atomic scalar memory instructions", "scalar-atomics"), - FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"), - FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"), - FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() { - .Movrel, - .Gfx7Gfx8Gfx9Insts, - .Fp64, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Localmemorysize65536, - .Wavefrontsize64, - .NoSramEccSupport, - .MimgR128, - }), - FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() { - .Movrel, - .MimgR128, - .Fp64, - .TrigReducedRange, - .NoXnackSupport, - .Wavefrontsize64, - .NoSramEccSupport, - .Ldsbankcount32, - .Localmemorysize32768, - }), - FeatureInfo(@This()).create(.TrapHandler, "trap-handler", "Trap handler support", "trap-handler"), - FeatureInfo(@This()).create(.TrigReducedRange, "trig-reduced-range", "Requires use of fract on arguments to trig instructions", "trig-reduced-range"), - FeatureInfo(@This()).create(.UnalignedBufferAccess, "unaligned-buffer-access", "Support unaligned global loads and stores", "unaligned-buffer-access"), - FeatureInfo(@This()).create(.UnalignedScratchAccess, "unaligned-scratch-access", "Support unaligned scratch loads and stores", "unaligned-scratch-access"), - FeatureInfo(@This()).create(.UnpackedD16Vmem, "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", "unpacked-d16-vmem"), - FeatureInfo(@This()).create(.VgprIndexMode, "vgpr-index-mode", "Has VGPR mode register indexing", "vgpr-index-mode"), - FeatureInfo(@This()).create(.VmemToScalarWriteHazard, "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", "vmem-to-scalar-write-hazard"), - FeatureInfo(@This()).create(.Vop3Literal, "vop3-literal", "Can use one literal in VOP3", "vop3-literal"), - FeatureInfo(@This()).create(.Vop3p, "vop3p", "Has VOP3P packed instructions", "vop3p"), - FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"), - FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"), - FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() { - .IntClampInsts, - .SdwaMav, - .Movrel, - .SMemrealtime, - .Gcn3Encoding, - .TrigReducedRange, - .CiInsts, - .FlatAddressSpace, - .Sdwa, - .Wavefrontsize64, - .NoSramEccSupport, - .ScalarStores, - .Gfx7Gfx8Gfx9Insts, - .Dpp, - .Localmemorysize65536, - .BitInsts16, - .VgprIndexMode, - .Gfx8Insts, - .Inv2piInlineImm, - .MimgR128, - .SdwaOutModsVopc, - .Fp64, - }), - FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"), - FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"), - FeatureInfo(@This()).create(.Wavefrontsize32, "wavefrontsize32", "The number of threads per wavefront", "wavefrontsize32"), - FeatureInfo(@This()).create(.Wavefrontsize64, "wavefrontsize64", "The number of threads per wavefront", "wavefrontsize64"), - FeatureInfo(@This()).create(.Xnack, "xnack", "Enable XNACK support", "xnack"), - FeatureInfo(@This()).create(.HalfRate64Ops, "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", "half-rate-64-ops"), - }; -}; diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig deleted file mode 100644 index b7a951a63dbf12371a67f2a8da745a2787290844..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/ArmFeature.zig +++ /dev/null @@ -1,818 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const ArmFeature = enum { - Armv2, - Armv2a, - Armv3, - Armv3m, - Armv4, - Armv4t, - Armv5t, - Armv5te, - Armv5tej, - Armv6, - Armv6j, - Armv6k, - Armv6kz, - Armv6M, - Armv6sM, - Armv6t2, - Armv7A, - Armv7eM, - Armv7k, - Armv7M, - Armv7R, - Armv7s, - Armv7ve, - Armv8A, - Armv8Mbase, - Armv8Mmain, - Armv8R, - Armv81A, - Armv81Mmain, - Armv82A, - Armv83A, - Armv84A, - Armv85A, - Msecext8, - Aclass, - Aes, - AcquireRelease, - AvoidMovsShop, - AvoidPartialCpsr, - Crc, - CheapPredicableCpsr, - VldnAlign, - Crypto, - D32, - Db, - Dfb, - Dsp, - DontWidenVmovs, - Dotprod, - ExecuteOnly, - ExpandFpMlx, - Fp16, - Fp16fml, - Fp64, - Fpao, - FpArmv8, - FpArmv8d16, - FpArmv8d16sp, - FpArmv8sp, - Fpregs, - Fpregs16, - Fpregs64, - Fullfp16, - FuseAes, - FuseLiterals, - HwdivArm, - Hwdiv, - NoBranchPredictor, - RetAddrStack, - Slowfpvmlx, - VmlxHazards, - Lob, - LongCalls, - Mclass, - Mp, - Mve1beat, - Mve2beat, - Mve4beat, - MuxedUnits, - Neon, - Neonfp, - NeonFpmovs, - NaclTrap, - Noarm, - NoMovt, - NoNegImmediates, - DisablePostraScheduler, - NonpipelinedVfp, - Perfmon, - Bit32, - PreferIshst, - LoopAlign, - PreferVmovsr, - ProfUnpr, - Ras, - Rclass, - ReadTpHard, - ReserveR9, - Sb, - Sha2, - SlowFpBrcc, - SlowLoadDSubreg, - SlowOddReg, - SlowVdup32, - SlowVgetlni32, - SplatVfpNeon, - StrictAlign, - Thumb2, - Trustzone, - UseAa, - UseMisched, - WideStrideVfp, - V7clrex, - Vfp2, - Vfp2sp, - Vfp3, - Vfp3d16, - Vfp3d16sp, - Vfp3sp, - Vfp4, - Vfp4d16, - Vfp4d16sp, - Vfp4sp, - VmlxForwarding, - Virtualization, - Zcz, - Mvefp, - Mve, - V4t, - V5te, - V5t, - V6k, - V6m, - V6, - V6t2, - V7, - V8m, - V8mmain, - V8, - V81mmain, - V81a, - V82a, - V83a, - V84a, - V85a, - Iwmmxt, - Iwmmxt2, - SoftFloat, - ThumbMode, - A5, - A7, - A8, - A9, - A12, - A15, - A17, - A32, - A35, - A53, - A55, - A57, - A72, - A73, - A75, - A76, - Exynos, - Krait, - Kryo, - M3, - R4, - R5, - R7, - R52, - Swift, - Xscale, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"), - FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"), - FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"), - FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"), - FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"), - FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() { - .V4t, - .Dsp, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() { - .V4t, - .Dsp, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() { - .V4t, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() { - .V4t, - .ThumbMode, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() { - .V4t, - .Thumb2, - .Dsp, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() { - .Perfmon, - .V4t, - .ThumbMode, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .Hwdiv, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() { - .Perfmon, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Hwdiv, - .Rclass, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Mp, - .Fpregs, - .V4t, - .V7clrex, - .Dsp, - .Thumb2, - .Db, - .Aclass, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() { - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Db, - .StrictAlign, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() { - .Perfmon, - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Thumb2, - .Db, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Crc, - .Fpregs, - .Mp, - .Dfb, - .Dsp, - .Fp16, - .V4t, - .Db, - .V7clrex, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Rclass, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() { - .Perfmon, - .V4t, - .ThumbMode, - .Msecext8, - .V7clrex, - .Thumb2, - .Db, - .Ras, - .Mclass, - .Noarm, - .AcquireRelease, - .Hwdiv, - .Lob, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() { - .HwdivArm, - .Perfmon, - .D32, - .Fpregs, - .Crc, - .Mp, - .Fp16, - .Dsp, - .V4t, - .V7clrex, - .Db, - .Aclass, - .Thumb2, - .Ras, - .Sb, - .AcquireRelease, - .Hwdiv, - .Trustzone, - }), - FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"), - FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"), - FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"), - FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"), - FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"), - FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"), - FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"), - FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"), - FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"), - FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"), - FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"), - FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"), - FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"), - FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"), - FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"), - FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"), - FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"), - FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() { - .D32, - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() { - .D32, - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"), - FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"), - FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"), - FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"), - FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"), - FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"), - FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"), - FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"), - FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"), - FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"), - FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"), - FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"), - FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"), - FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"), - FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"), - FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"), - FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"), - FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"), - FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"), - FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"), - FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"), - FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"), - FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"), - FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"), - FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"), - FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"), - FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"), - FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"), - FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"), - FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"), - FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"), - FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"), - FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"), - FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"), - FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"), - FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"), - FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"), - FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"), - FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"), - FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"), - FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"), - FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() { - .DontWidenVmovs, - }), - FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"), - FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"), - FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"), - FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), - FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"), - FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"), - FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"), - FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() { - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() { - .D32, - .Fpregs, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() { - .D32, - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() { - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() { - .D32, - .Fpregs, - .Fp16, - }), - FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"), - FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() { - .HwdivArm, - .Hwdiv, - }), - FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"), - FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() { - .Perfmon, - .V4t, - .Fpregs, - .V7clrex, - .Fp16, - .Dsp, - .Thumb2, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() { - .Perfmon, - .V4t, - .Fpregs, - .V7clrex, - .Dsp, - .Thumb2, - }), - FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"), - FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() { - .V4t, - .Thumb2, - }), - FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() { - .Perfmon, - .Thumb2, - .V4t, - .V7clrex, - }), - FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() { - .Perfmon, - .Thumb2, - .V4t, - .V7clrex, - }), - FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() { - .Perfmon, - .V4t, - .V7clrex, - .Thumb2, - .AcquireRelease, - }), - FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() { - .Perfmon, - .Thumb2, - .V4t, - .V7clrex, - }), - FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() { - .Perfmon, - .V4t, - .V7clrex, - .Thumb2, - .AcquireRelease, - }), - FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() { - .Perfmon, - .V4t, - .V7clrex, - .Thumb2, - .AcquireRelease, - }), - FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() { - .Perfmon, - .V4t, - .V7clrex, - .Thumb2, - .AcquireRelease, - }), - FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Thumb2, - .AcquireRelease, - }), - FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() { - .Perfmon, - .V4t, - .D32, - .Fpregs, - .V7clrex, - .Thumb2, - .AcquireRelease, - .Sb, - }), - FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() { - .V4t, - }), - FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"), - FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"), - FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"), - FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"), - FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"), - FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"), - FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"), - FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"), - FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"), - FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"), - FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"), - FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"), - FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"), - FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"), - FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"), - FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"), - FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"), - FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"), - FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() { - .HwdivArm, - .D32, - .Crc, - .Fpregs, - .RetAddrStack, - .SlowVgetlni32, - .WideStrideVfp, - .SlowVdup32, - .SlowFpBrcc, - .ProfUnpr, - .DontWidenVmovs, - .Zcz, - .Hwdiv, - .FuseAes, - .Slowfpvmlx, - .UseAa, - .FuseLiterals, - .ExpandFpMlx, - }), - FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"), - FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"), - FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"), - FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"), - FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"), - FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"), - FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"), - FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"), - FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() { - .V4t, - }), - }; -}; diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig deleted file mode 100644 index 1749c6c15cac15a8b04097ea2970df27d2fe7056..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/AvrFeature.zig +++ /dev/null @@ -1,230 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const AvrFeature = enum { - Avr0, - Avr1, - Avr2, - Avr3, - Avr4, - Avr5, - Avr6, - Avr25, - Avr31, - Avr35, - Avr51, - Avrtiny, - Xmega, - Xmegau, - Addsubiw, - Break, - Des, - Eijmpcall, - Elpm, - Elpmx, - Ijmpcall, - Jmpcall, - Lpm, - Lpmx, - Movw, - Mul, - Rmw, - Spm, - Spmx, - Sram, - Special, - Smallstack, - Tinyencoding, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"), - FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() { - .Avr0, - .Lpm, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() { - .Lpm, - .Avr0, - .Sram, - .Addsubiw, - .Ijmpcall, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() { - .Lpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() { - .Lpm, - .Elpm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Ijmpcall, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() { - .Lpm, - .Movw, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Addsubiw, - .Mul, - .Lpmx, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() { - .Avr0, - .Sram, - .Break, - .Tinyencoding, - }), - FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Des, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() { - .Lpm, - .Elpm, - .Movw, - .Elpmx, - .Spm, - .Avr0, - .Sram, - .Jmpcall, - .Eijmpcall, - .Spmx, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"), - FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"), - FeatureInfo(@This()).create(.Des, "des", "The device supports the `DES k` encryption instruction", "des"), - FeatureInfo(@This()).create(.Eijmpcall, "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", "eijmpcall"), - FeatureInfo(@This()).create(.Elpm, "elpm", "The device supports the ELPM instruction", "elpm"), - FeatureInfo(@This()).create(.Elpmx, "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", "elpmx"), - FeatureInfo(@This()).create(.Ijmpcall, "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", "ijmpcall"), - FeatureInfo(@This()).create(.Jmpcall, "jmpcall", "The device supports the `JMP` and `CALL` instructions", "jmpcall"), - FeatureInfo(@This()).create(.Lpm, "lpm", "The device supports the `LPM` instruction", "lpm"), - FeatureInfo(@This()).create(.Lpmx, "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", "lpmx"), - FeatureInfo(@This()).create(.Movw, "movw", "The device supports the 16-bit MOVW instruction", "movw"), - FeatureInfo(@This()).create(.Mul, "mul", "The device supports the multiplication instructions", "mul"), - FeatureInfo(@This()).create(.Rmw, "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", "rmw"), - FeatureInfo(@This()).create(.Spm, "spm", "The device supports the `SPM` instruction", "spm"), - FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"), - FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"), - FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() { - .Lpm, - .Elpm, - .Elpmx, - .Movw, - .Spm, - .Eijmpcall, - .Spmx, - .Jmpcall, - .Sram, - .Addsubiw, - .Mul, - .Lpmx, - .Rmw, - .Des, - .Ijmpcall, - .Break, - }), - FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"), - FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"), - }; -}; diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig deleted file mode 100644 index b13da4615362ccedeea99e6c38265d843f920c23..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/BpfFeature.zig +++ /dev/null @@ -1,17 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const BpfFeature = enum { - Alu32, - Dummy, - Dwarfris, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Alu32, "alu32", "Enable ALU32 instructions", "alu32"), - FeatureInfo(@This()).create(.Dummy, "dummy", "unused feature", "dummy"), - FeatureInfo(@This()).create(.Dwarfris, "dwarfris", "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", "dwarfris"), - }; -}; diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig deleted file mode 100644 index 4b074f1694c04e0ec9c9abf32ca98a8f0041a02a..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/HexagonFeature.zig +++ /dev/null @@ -1,76 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const HexagonFeature = enum { - V5, - V55, - V60, - V62, - V65, - V66, - Hvx, - HvxLength64b, - HvxLength128b, - Hvxv60, - Hvxv62, - Hvxv65, - Hvxv66, - Zreg, - Duplex, - LongCalls, - Mem_noshuf, - Memops, - Nvj, - Nvs, - NoreturnStackElim, - Packets, - ReservedR19, - SmallData, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.V5, "v5", "Enable Hexagon V5 architecture", "v5"), - FeatureInfo(@This()).create(.V55, "v55", "Enable Hexagon V55 architecture", "v55"), - FeatureInfo(@This()).create(.V60, "v60", "Enable Hexagon V60 architecture", "v60"), - FeatureInfo(@This()).create(.V62, "v62", "Enable Hexagon V62 architecture", "v62"), - FeatureInfo(@This()).create(.V65, "v65", "Enable Hexagon V65 architecture", "v65"), - FeatureInfo(@This()).create(.V66, "v66", "Enable Hexagon V66 architecture", "v66"), - FeatureInfo(@This()).create(.Hvx, "hvx", "Hexagon HVX instructions", "hvx"), - FeatureInfo(@This()).createWithSubfeatures(.HvxLength64b, "hvx-length64b", "Hexagon HVX 64B instructions", "hvx-length64b", &[_]@This() { - .Hvx, - }), - FeatureInfo(@This()).createWithSubfeatures(.HvxLength128b, "hvx-length128b", "Hexagon HVX 128B instructions", "hvx-length128b", &[_]@This() { - .Hvx, - }), - FeatureInfo(@This()).createWithSubfeatures(.Hvxv60, "hvxv60", "Hexagon HVX instructions", "hvxv60", &[_]@This() { - .Hvx, - }), - FeatureInfo(@This()).createWithSubfeatures(.Hvxv62, "hvxv62", "Hexagon HVX instructions", "hvxv62", &[_]@This() { - .Hvx, - }), - FeatureInfo(@This()).createWithSubfeatures(.Hvxv65, "hvxv65", "Hexagon HVX instructions", "hvxv65", &[_]@This() { - .Hvx, - }), - FeatureInfo(@This()).createWithSubfeatures(.Hvxv66, "hvxv66", "Hexagon HVX instructions", "hvxv66", &[_]@This() { - .Hvx, - .Zreg, - }), - FeatureInfo(@This()).create(.Zreg, "zreg", "Hexagon ZReg extension instructions", "zreg"), - FeatureInfo(@This()).create(.Duplex, "duplex", "Enable generation of duplex instruction", "duplex"), - FeatureInfo(@This()).create(.LongCalls, "long-calls", "Use constant-extended calls", "long-calls"), - FeatureInfo(@This()).create(.Mem_noshuf, "mem_noshuf", "Supports mem_noshuf feature", "mem_noshuf"), - FeatureInfo(@This()).create(.Memops, "memops", "Use memop instructions", "memops"), - FeatureInfo(@This()).createWithSubfeatures(.Nvj, "nvj", "Support for new-value jumps", "nvj", &[_]@This() { - .Packets, - }), - FeatureInfo(@This()).createWithSubfeatures(.Nvs, "nvs", "Support for new-value stores", "nvs", &[_]@This() { - .Packets, - }), - FeatureInfo(@This()).create(.NoreturnStackElim, "noreturn-stack-elim", "Eliminate stack allocation in a noreturn function when possible", "noreturn-stack-elim"), - FeatureInfo(@This()).create(.Packets, "packets", "Support for instruction packets", "packets"), - FeatureInfo(@This()).create(.ReservedR19, "reserved-r19", "Reserve register R19", "reserved-r19"), - FeatureInfo(@This()).create(.SmallData, "small-data", "Allow GP-relative addressing of global variables", "small-data"), - }; -}; diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig deleted file mode 100644 index 2caaaa0dd048ee42d6ecc80721be7737c3c92638..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/MipsFeature.zig +++ /dev/null @@ -1,238 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const MipsFeature = enum { - Abs2008, - Crc, - Cnmips, - Dsp, - Dspr2, - Dspr3, - Eva, - Fp64, - Fpxx, - Ginv, - Gp64, - LongCalls, - Msa, - Mt, - Nomadd4, - Micromips, - Mips1, - Mips2, - Mips3, - Mips3_32, - Mips3_32r2, - Mips4, - Mips4_32, - Mips4_32r2, - Mips5, - Mips5_32r2, - Mips16, - Mips32, - Mips32r2, - Mips32r3, - Mips32r5, - Mips32r6, - Mips64, - Mips64r2, - Mips64r3, - Mips64r5, - Mips64r6, - Nan2008, - Noabicalls, - Nooddspreg, - Ptr64, - SingleFloat, - SoftFloat, - Sym32, - UseIndirectJumpHazard, - UseTccInDiv, - Vfpu, - Virt, - Xgot, - P5600, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"), - FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"), - FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"), - FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() { - .Dsp, - }), - FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() { - .Dsp, - }), - FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"), - FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"), - FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"), - FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"), - FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"), - FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"), - FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"), - FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"), - FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"), - FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"), - FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"), - FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() { - .Mips1, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() { - .Mips3_32r2, - .Fp64, - .Gp64, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"), - FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"), - FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() { - .Mips3_32r2, - .Mips4_32r2, - .Fp64, - .Gp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"), - FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"), - FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() { - .Mips5_32r2, - .Mips4_32r2, - .Mips3_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"), - FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"), - FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() { - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() { - .Mips5_32r2, - .Mips4_32r2, - .Mips3_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Abs2008, - .Nan2008, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Gp64, - .Fp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Nan2008, - .Abs2008, - .Mips4_32r2, - .Fp64, - .Gp64, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"), - FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"), - FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"), - FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"), - FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"), - FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"), - FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"), - FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"), - FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"), - FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"), - FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"), - FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"), - FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() { - .Mips5_32r2, - .Mips3_32r2, - .Mips4_32r2, - .Mips4_32, - .Mips1, - .Mips3_32, - }), - }; -}; diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig deleted file mode 100644 index 4213283af59f4f290372bc2183c85cd8b5015e07..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/Msp430Feature.zig +++ /dev/null @@ -1,19 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const Msp430Feature = enum { - Hwmult16, - Hwmult32, - Hwmultf5, - Ext, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Hwmult16, "hwmult16", "Enable 16-bit hardware multiplier", "hwmult16"), - FeatureInfo(@This()).create(.Hwmult32, "hwmult32", "Enable 32-bit hardware multiplier", "hwmult32"), - FeatureInfo(@This()).create(.Hwmultf5, "hwmultf5", "Enable F5 series hardware multiplier", "hwmultf5"), - FeatureInfo(@This()).create(.Ext, "ext", "Enable MSP430-X extensions", "ext"), - }; -}; diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig deleted file mode 100644 index a22dec066da3aab31f384a001006ac446deee677..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/NvptxFeature.zig +++ /dev/null @@ -1,61 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const NvptxFeature = enum { - Ptx32, - Ptx40, - Ptx41, - Ptx42, - Ptx43, - Ptx50, - Ptx60, - Ptx61, - Ptx63, - Ptx64, - Sm_20, - Sm_21, - Sm_30, - Sm_32, - Sm_35, - Sm_37, - Sm_50, - Sm_52, - Sm_53, - Sm_60, - Sm_61, - Sm_62, - Sm_70, - Sm_72, - Sm_75, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Ptx32, "ptx32", "Use PTX version 3.2", "ptx32"), - FeatureInfo(@This()).create(.Ptx40, "ptx40", "Use PTX version 4.0", "ptx40"), - FeatureInfo(@This()).create(.Ptx41, "ptx41", "Use PTX version 4.1", "ptx41"), - FeatureInfo(@This()).create(.Ptx42, "ptx42", "Use PTX version 4.2", "ptx42"), - FeatureInfo(@This()).create(.Ptx43, "ptx43", "Use PTX version 4.3", "ptx43"), - FeatureInfo(@This()).create(.Ptx50, "ptx50", "Use PTX version 5.0", "ptx50"), - FeatureInfo(@This()).create(.Ptx60, "ptx60", "Use PTX version 6.0", "ptx60"), - FeatureInfo(@This()).create(.Ptx61, "ptx61", "Use PTX version 6.1", "ptx61"), - FeatureInfo(@This()).create(.Ptx63, "ptx63", "Use PTX version 6.3", "ptx63"), - FeatureInfo(@This()).create(.Ptx64, "ptx64", "Use PTX version 6.4", "ptx64"), - FeatureInfo(@This()).create(.Sm_20, "sm_20", "Target SM 2.0", "sm_20"), - FeatureInfo(@This()).create(.Sm_21, "sm_21", "Target SM 2.1", "sm_21"), - FeatureInfo(@This()).create(.Sm_30, "sm_30", "Target SM 3.0", "sm_30"), - FeatureInfo(@This()).create(.Sm_32, "sm_32", "Target SM 3.2", "sm_32"), - FeatureInfo(@This()).create(.Sm_35, "sm_35", "Target SM 3.5", "sm_35"), - FeatureInfo(@This()).create(.Sm_37, "sm_37", "Target SM 3.7", "sm_37"), - FeatureInfo(@This()).create(.Sm_50, "sm_50", "Target SM 5.0", "sm_50"), - FeatureInfo(@This()).create(.Sm_52, "sm_52", "Target SM 5.2", "sm_52"), - FeatureInfo(@This()).create(.Sm_53, "sm_53", "Target SM 5.3", "sm_53"), - FeatureInfo(@This()).create(.Sm_60, "sm_60", "Target SM 6.0", "sm_60"), - FeatureInfo(@This()).create(.Sm_61, "sm_61", "Target SM 6.1", "sm_61"), - FeatureInfo(@This()).create(.Sm_62, "sm_62", "Target SM 6.2", "sm_62"), - FeatureInfo(@This()).create(.Sm_70, "sm_70", "Target SM 7.0", "sm_70"), - FeatureInfo(@This()).create(.Sm_72, "sm_72", "Target SM 7.2", "sm_72"), - FeatureInfo(@This()).create(.Sm_75, "sm_75", "Target SM 7.5", "sm_75"), - }; -}; diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig deleted file mode 100644 index c3a43e98c42489998631ecd36deeaab85ba78156..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/PowerPcFeature.zig +++ /dev/null @@ -1,163 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const PowerPcFeature = enum { - Bit64, - Bitregs64, - Altivec, - Bpermd, - Booke, - Cmpb, - Crbits, - DirectMove, - E500, - Extdiv, - Fcpsgn, - Fpcvt, - Fprnd, - Fpu, - Fre, - Fres, - Frsqrte, - Frsqrtes, - Fsqrt, - Float128, - Htm, - HardFloat, - Icbt, - IsaV30Instructions, - Isel, - InvariantFunctionDescriptors, - Ldbrx, - Lfiwax, - Longcall, - Mfocrf, - Msync, - Power8Altivec, - Crypto, - Power8Vector, - Power9Altivec, - Power9Vector, - Popcntd, - Ppc4xx, - Ppc6xx, - PpcPostraSched, - PpcPreraSched, - PartwordAtomics, - Qpx, - Recipprec, - Spe, - Stfiwx, - SecurePlt, - SlowPopcntd, - TwoConstNr, - Vsx, - VectorsUseTwoUnits, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Bit64, "64bit", "Enable 64-bit instructions", "64bit"), - FeatureInfo(@This()).create(.Bitregs64, "64bitregs", "Enable 64-bit registers usage for ppc32 [beta]", "64bitregs"), - FeatureInfo(@This()).createWithSubfeatures(.Altivec, "altivec", "Enable Altivec instructions", "altivec", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.Bpermd, "bpermd", "Enable the bpermd instruction", "bpermd"), - FeatureInfo(@This()).createWithSubfeatures(.Booke, "booke", "Enable Book E instructions", "booke", &[_]@This() { - .Icbt, - }), - FeatureInfo(@This()).create(.Cmpb, "cmpb", "Enable the cmpb instruction", "cmpb"), - FeatureInfo(@This()).create(.Crbits, "crbits", "Use condition-register bits individually", "crbits"), - FeatureInfo(@This()).createWithSubfeatures(.DirectMove, "direct-move", "Enable Power8 direct move instructions", "direct-move", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.E500, "e500", "Enable E500/E500mc instructions", "e500"), - FeatureInfo(@This()).create(.Extdiv, "extdiv", "Enable extended divide instructions", "extdiv"), - FeatureInfo(@This()).createWithSubfeatures(.Fcpsgn, "fcpsgn", "Enable the fcpsgn instruction", "fcpsgn", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fpcvt, "fpcvt", "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", "fpcvt", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fprnd, "fprnd", "Enable the fri[mnpz] instructions", "fprnd", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fpu, "fpu", "Enable classic FPU instructions", "fpu", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fre, "fre", "Enable the fre instruction", "fre", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fres, "fres", "Enable the fres instruction", "fres", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Frsqrte, "frsqrte", "Enable the frsqrte instruction", "frsqrte", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Frsqrtes, "frsqrtes", "Enable the frsqrtes instruction", "frsqrtes", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fsqrt, "fsqrt", "Enable the fsqrt instruction", "fsqrt", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Float128, "float128", "Enable the __float128 data type for IEEE-754R Binary128.", "float128", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.Htm, "htm", "Enable Hardware Transactional Memory instructions", "htm"), - FeatureInfo(@This()).create(.HardFloat, "hard-float", "Enable floating-point instructions", "hard-float"), - FeatureInfo(@This()).create(.Icbt, "icbt", "Enable icbt instruction", "icbt"), - FeatureInfo(@This()).create(.IsaV30Instructions, "isa-v30-instructions", "Enable instructions added in ISA 3.0.", "isa-v30-instructions"), - FeatureInfo(@This()).create(.Isel, "isel", "Enable the isel instruction", "isel"), - FeatureInfo(@This()).create(.InvariantFunctionDescriptors, "invariant-function-descriptors", "Assume function descriptors are invariant", "invariant-function-descriptors"), - FeatureInfo(@This()).create(.Ldbrx, "ldbrx", "Enable the ldbrx instruction", "ldbrx"), - FeatureInfo(@This()).createWithSubfeatures(.Lfiwax, "lfiwax", "Enable the lfiwax instruction", "lfiwax", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.Longcall, "longcall", "Always use indirect calls", "longcall"), - FeatureInfo(@This()).create(.Mfocrf, "mfocrf", "Enable the MFOCRF instruction", "mfocrf"), - FeatureInfo(@This()).createWithSubfeatures(.Msync, "msync", "Has only the msync instruction instead of sync", "msync", &[_]@This() { - .Icbt, - }), - FeatureInfo(@This()).createWithSubfeatures(.Power8Altivec, "power8-altivec", "Enable POWER8 Altivec instructions", "power8-altivec", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable POWER8 Crypto instructions", "crypto", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Power8Vector, "power8-vector", "Enable POWER8 vector instructions", "power8-vector", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Power9Altivec, "power9-altivec", "Enable POWER9 Altivec instructions", "power9-altivec", &[_]@This() { - .IsaV30Instructions, - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Power9Vector, "power9-vector", "Enable POWER9 vector instructions", "power9-vector", &[_]@This() { - .IsaV30Instructions, - .HardFloat, - }), - FeatureInfo(@This()).create(.Popcntd, "popcntd", "Enable the popcnt[dw] instructions", "popcntd"), - FeatureInfo(@This()).create(.Ppc4xx, "ppc4xx", "Enable PPC 4xx instructions", "ppc4xx"), - FeatureInfo(@This()).create(.Ppc6xx, "ppc6xx", "Enable PPC 6xx instructions", "ppc6xx"), - FeatureInfo(@This()).create(.PpcPostraSched, "ppc-postra-sched", "Use PowerPC post-RA scheduling strategy", "ppc-postra-sched"), - FeatureInfo(@This()).create(.PpcPreraSched, "ppc-prera-sched", "Use PowerPC pre-RA scheduling strategy", "ppc-prera-sched"), - FeatureInfo(@This()).create(.PartwordAtomics, "partword-atomics", "Enable l[bh]arx and st[bh]cx.", "partword-atomics"), - FeatureInfo(@This()).createWithSubfeatures(.Qpx, "qpx", "Enable QPX instructions", "qpx", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.Recipprec, "recipprec", "Assume higher precision reciprocal estimates", "recipprec"), - FeatureInfo(@This()).createWithSubfeatures(.Spe, "spe", "Enable SPE instructions", "spe", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).createWithSubfeatures(.Stfiwx, "stfiwx", "Enable the stfiwx instruction", "stfiwx", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.SecurePlt, "secure-plt", "Enable secure plt mode", "secure-plt"), - FeatureInfo(@This()).create(.SlowPopcntd, "slow-popcntd", "Has slow popcnt[dw] instructions", "slow-popcntd"), - FeatureInfo(@This()).create(.TwoConstNr, "two-const-nr", "Requires two constant Newton-Raphson computation", "two-const-nr"), - FeatureInfo(@This()).createWithSubfeatures(.Vsx, "vsx", "Enable VSX instructions", "vsx", &[_]@This() { - .HardFloat, - }), - FeatureInfo(@This()).create(.VectorsUseTwoUnits, "vectors-use-two-units", "Vectors use two units", "vectors-use-two-units"), - }; -}; diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig deleted file mode 100644 index b8fbe95299fc023103d2f253be6c19b28fba7e53..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/RiscVFeature.zig +++ /dev/null @@ -1,31 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const RiscVFeature = enum { - Bit64, - E, - RvcHints, - Relax, - A, - C, - D, - F, - M, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Bit64, "64bit", "Implements RV64", "64bit"), - FeatureInfo(@This()).create(.E, "e", "Implements RV32E (provides 16 rather than 32 GPRs)", "e"), - FeatureInfo(@This()).create(.RvcHints, "rvc-hints", "Enable RVC Hint Instructions.", "rvc-hints"), - FeatureInfo(@This()).create(.Relax, "relax", "Enable Linker relaxation.", "relax"), - FeatureInfo(@This()).create(.A, "a", "'A' (Atomic Instructions)", "a"), - FeatureInfo(@This()).create(.C, "c", "'C' (Compressed Instructions)", "c"), - FeatureInfo(@This()).createWithSubfeatures(.D, "d", "'D' (Double-Precision Floating-Point)", "d", &[_]@This() { - .F, - }), - FeatureInfo(@This()).create(.F, "f", "'F' (Single-Precision Floating-Point)", "f"), - FeatureInfo(@This()).create(.M, "m", "'M' (Integer Multiplication and Division)", "m"), - }; -}; diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig deleted file mode 100644 index 07d9375581fdc92a7e5b02b3c8be5367f63f7176..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/SparcFeature.zig +++ /dev/null @@ -1,49 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const SparcFeature = enum { - Detectroundchange, - HardQuadFloat, - Leon, - NoFmuls, - NoFsmuld, - Leonpwrpsr, - SoftFloat, - SoftMulDiv, - DeprecatedV8, - V9, - Vis, - Vis2, - Vis3, - Fixallfdivsqrt, - Insertnopload, - Hasleoncasa, - Leoncyclecounter, - Hasumacsmac, - Popc, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Detectroundchange, "detectroundchange", "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", "detectroundchange"), - FeatureInfo(@This()).create(.HardQuadFloat, "hard-quad-float", "Enable quad-word floating point instructions", "hard-quad-float"), - FeatureInfo(@This()).create(.Leon, "leon", "Enable LEON extensions", "leon"), - FeatureInfo(@This()).create(.NoFmuls, "no-fmuls", "Disable the fmuls instruction.", "no-fmuls"), - FeatureInfo(@This()).create(.NoFsmuld, "no-fsmuld", "Disable the fsmuld instruction.", "no-fsmuld"), - FeatureInfo(@This()).create(.Leonpwrpsr, "leonpwrpsr", "Enable the PWRPSR instruction", "leonpwrpsr"), - FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software emulation for floating point", "soft-float"), - FeatureInfo(@This()).create(.SoftMulDiv, "soft-mul-div", "Use software emulation for integer multiply and divide", "soft-mul-div"), - FeatureInfo(@This()).create(.DeprecatedV8, "deprecated-v8", "Enable deprecated V8 instructions in V9 mode", "deprecated-v8"), - FeatureInfo(@This()).create(.V9, "v9", "Enable SPARC-V9 instructions", "v9"), - FeatureInfo(@This()).create(.Vis, "vis", "Enable UltraSPARC Visual Instruction Set extensions", "vis"), - FeatureInfo(@This()).create(.Vis2, "vis2", "Enable Visual Instruction Set extensions II", "vis2"), - FeatureInfo(@This()).create(.Vis3, "vis3", "Enable Visual Instruction Set extensions III", "vis3"), - FeatureInfo(@This()).create(.Fixallfdivsqrt, "fixallfdivsqrt", "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", "fixallfdivsqrt"), - FeatureInfo(@This()).create(.Insertnopload, "insertnopload", "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", "insertnopload"), - FeatureInfo(@This()).create(.Hasleoncasa, "hasleoncasa", "Enable CASA instruction for LEON3 and LEON4 processors", "hasleoncasa"), - FeatureInfo(@This()).create(.Leoncyclecounter, "leoncyclecounter", "Use the Leon cycle counter register", "leoncyclecounter"), - FeatureInfo(@This()).create(.Hasumacsmac, "hasumacsmac", "Enable UMAC and SMAC for LEON3 and LEON4 processors", "hasumacsmac"), - FeatureInfo(@This()).create(.Popc, "popc", "Use the popc (population count) instruction", "popc"), - }; -}; diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig deleted file mode 100644 index 773c6583d0f2875aad289644947e27fc074cc70d..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/SystemZFeature.zig +++ /dev/null @@ -1,81 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const SystemZFeature = enum { - DfpPackedConversion, - DfpZonedConversion, - DeflateConversion, - DistinctOps, - EnhancedDat2, - EnhancedSort, - ExecutionHint, - FpExtension, - FastSerialization, - GuardedStorage, - HighWord, - InsertReferenceBitsMultiple, - InterlockedAccess1, - LoadAndTrap, - LoadAndZeroRightmostByte, - LoadStoreOnCond, - LoadStoreOnCond2, - MessageSecurityAssistExtension3, - MessageSecurityAssistExtension4, - MessageSecurityAssistExtension5, - MessageSecurityAssistExtension7, - MessageSecurityAssistExtension8, - MessageSecurityAssistExtension9, - MiscellaneousExtensions, - MiscellaneousExtensions2, - MiscellaneousExtensions3, - PopulationCount, - ProcessorAssist, - ResetReferenceBitsMultiple, - TransactionalExecution, - Vector, - VectorEnhancements1, - VectorEnhancements2, - VectorPackedDecimal, - VectorPackedDecimalEnhancement, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.DfpPackedConversion, "dfp-packed-conversion", "Assume that the DFP packed-conversion facility is installed", "dfp-packed-conversion"), - FeatureInfo(@This()).create(.DfpZonedConversion, "dfp-zoned-conversion", "Assume that the DFP zoned-conversion facility is installed", "dfp-zoned-conversion"), - FeatureInfo(@This()).create(.DeflateConversion, "deflate-conversion", "Assume that the deflate-conversion facility is installed", "deflate-conversion"), - FeatureInfo(@This()).create(.DistinctOps, "distinct-ops", "Assume that the distinct-operands facility is installed", "distinct-ops"), - FeatureInfo(@This()).create(.EnhancedDat2, "enhanced-dat-2", "Assume that the enhanced-DAT facility 2 is installed", "enhanced-dat-2"), - FeatureInfo(@This()).create(.EnhancedSort, "enhanced-sort", "Assume that the enhanced-sort facility is installed", "enhanced-sort"), - FeatureInfo(@This()).create(.ExecutionHint, "execution-hint", "Assume that the execution-hint facility is installed", "execution-hint"), - FeatureInfo(@This()).create(.FpExtension, "fp-extension", "Assume that the floating-point extension facility is installed", "fp-extension"), - FeatureInfo(@This()).create(.FastSerialization, "fast-serialization", "Assume that the fast-serialization facility is installed", "fast-serialization"), - FeatureInfo(@This()).create(.GuardedStorage, "guarded-storage", "Assume that the guarded-storage facility is installed", "guarded-storage"), - FeatureInfo(@This()).create(.HighWord, "high-word", "Assume that the high-word facility is installed", "high-word"), - FeatureInfo(@This()).create(.InsertReferenceBitsMultiple, "insert-reference-bits-multiple", "Assume that the insert-reference-bits-multiple facility is installed", "insert-reference-bits-multiple"), - FeatureInfo(@This()).create(.InterlockedAccess1, "interlocked-access1", "Assume that interlocked-access facility 1 is installed", "interlocked-access1"), - FeatureInfo(@This()).create(.LoadAndTrap, "load-and-trap", "Assume that the load-and-trap facility is installed", "load-and-trap"), - FeatureInfo(@This()).create(.LoadAndZeroRightmostByte, "load-and-zero-rightmost-byte", "Assume that the load-and-zero-rightmost-byte facility is installed", "load-and-zero-rightmost-byte"), - FeatureInfo(@This()).create(.LoadStoreOnCond, "load-store-on-cond", "Assume that the load/store-on-condition facility is installed", "load-store-on-cond"), - FeatureInfo(@This()).create(.LoadStoreOnCond2, "load-store-on-cond-2", "Assume that the load/store-on-condition facility 2 is installed", "load-store-on-cond-2"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension3, "message-security-assist-extension3", "Assume that the message-security-assist extension facility 3 is installed", "message-security-assist-extension3"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension4, "message-security-assist-extension4", "Assume that the message-security-assist extension facility 4 is installed", "message-security-assist-extension4"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension5, "message-security-assist-extension5", "Assume that the message-security-assist extension facility 5 is installed", "message-security-assist-extension5"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension7, "message-security-assist-extension7", "Assume that the message-security-assist extension facility 7 is installed", "message-security-assist-extension7"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension8, "message-security-assist-extension8", "Assume that the message-security-assist extension facility 8 is installed", "message-security-assist-extension8"), - FeatureInfo(@This()).create(.MessageSecurityAssistExtension9, "message-security-assist-extension9", "Assume that the message-security-assist extension facility 9 is installed", "message-security-assist-extension9"), - FeatureInfo(@This()).create(.MiscellaneousExtensions, "miscellaneous-extensions", "Assume that the miscellaneous-extensions facility is installed", "miscellaneous-extensions"), - FeatureInfo(@This()).create(.MiscellaneousExtensions2, "miscellaneous-extensions-2", "Assume that the miscellaneous-extensions facility 2 is installed", "miscellaneous-extensions-2"), - FeatureInfo(@This()).create(.MiscellaneousExtensions3, "miscellaneous-extensions-3", "Assume that the miscellaneous-extensions facility 3 is installed", "miscellaneous-extensions-3"), - FeatureInfo(@This()).create(.PopulationCount, "population-count", "Assume that the population-count facility is installed", "population-count"), - FeatureInfo(@This()).create(.ProcessorAssist, "processor-assist", "Assume that the processor-assist facility is installed", "processor-assist"), - FeatureInfo(@This()).create(.ResetReferenceBitsMultiple, "reset-reference-bits-multiple", "Assume that the reset-reference-bits-multiple facility is installed", "reset-reference-bits-multiple"), - FeatureInfo(@This()).create(.TransactionalExecution, "transactional-execution", "Assume that the transactional-execution facility is installed", "transactional-execution"), - FeatureInfo(@This()).create(.Vector, "vector", "Assume that the vectory facility is installed", "vector"), - FeatureInfo(@This()).create(.VectorEnhancements1, "vector-enhancements-1", "Assume that the vector enhancements facility 1 is installed", "vector-enhancements-1"), - FeatureInfo(@This()).create(.VectorEnhancements2, "vector-enhancements-2", "Assume that the vector enhancements facility 2 is installed", "vector-enhancements-2"), - FeatureInfo(@This()).create(.VectorPackedDecimal, "vector-packed-decimal", "Assume that the vector packed decimal facility is installed", "vector-packed-decimal"), - FeatureInfo(@This()).create(.VectorPackedDecimalEnhancement, "vector-packed-decimal-enhancement", "Assume that the vector packed decimal enhancement facility is installed", "vector-packed-decimal-enhancement"), - }; -}; diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig deleted file mode 100644 index 1cd80b0f9424403f500a9efa98532a7266367d14..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/WebAssemblyFeature.zig +++ /dev/null @@ -1,33 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const WebAssemblyFeature = enum { - Atomics, - BulkMemory, - ExceptionHandling, - Multivalue, - MutableGlobals, - NontrappingFptoint, - Simd128, - SignExt, - TailCall, - UnimplementedSimd128, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).create(.Atomics, "atomics", "Enable Atomics", "atomics"), - FeatureInfo(@This()).create(.BulkMemory, "bulk-memory", "Enable bulk memory operations", "bulk-memory"), - FeatureInfo(@This()).create(.ExceptionHandling, "exception-handling", "Enable Wasm exception handling", "exception-handling"), - FeatureInfo(@This()).create(.Multivalue, "multivalue", "Enable multivalue blocks, instructions, and functions", "multivalue"), - FeatureInfo(@This()).create(.MutableGlobals, "mutable-globals", "Enable mutable globals", "mutable-globals"), - FeatureInfo(@This()).create(.NontrappingFptoint, "nontrapping-fptoint", "Enable non-trapping float-to-int conversion operators", "nontrapping-fptoint"), - FeatureInfo(@This()).create(.Simd128, "simd128", "Enable 128-bit SIMD", "simd128"), - FeatureInfo(@This()).create(.SignExt, "sign-ext", "Enable sign extension operators", "sign-ext"), - FeatureInfo(@This()).create(.TailCall, "tail-call", "Enable tail call instructions", "tail-call"), - FeatureInfo(@This()).createWithSubfeatures(.UnimplementedSimd128, "unimplemented-simd128", "Enable 128-bit SIMD not yet implemented in engines", "unimplemented-simd128", &[_]@This() { - .Simd128, - }), - }; -}; diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig deleted file mode 100644 index 089215ed3f27a7715c8831d8f6ad2bd0e323ad1c..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/X86Feature.zig +++ /dev/null @@ -1,342 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const X86Feature = enum { - Dnow3, - Dnowa3, - Bit64, - Adx, - Aes, - Avx, - Avx2, - Avx512f, - Avx512bf16, - Avx512bitalg, - Bmi, - Bmi2, - Avx512bw, - Branchfusion, - Avx512cd, - Cldemote, - Clflushopt, - Clwb, - Clzero, - Cmov, - Cx8, - Cx16, - Avx512dq, - Mpx, - Enqcmd, - Avx512er, - Ermsb, - F16c, - Fma, - Fma4, - Fsgsbase, - Fxsr, - Fast11bytenop, - Fast15bytenop, - FastBextr, - FastHops, - FastLzcnt, - FastPartialYmmOrZmmWrite, - FastShldRotate, - FastScalarFsqrt, - FastScalarShiftMasks, - FastVariableShuffle, - FastVectorFsqrt, - FastVectorShiftMasks, - Gfni, - FastGather, - Avx512ifma, - Invpcid, - Sahf, - LeaSp, - LeaUsesAg, - Lwp, - Lzcnt, - FalseDepsLzcntTzcnt, - Mmx, - Movbe, - Movdir64b, - Movdiri, - Mwaitx, - Macrofusion, - MergeToThreewayBranch, - Nopl, - Pclmul, - Pconfig, - Avx512pf, - Pku, - Popcnt, - FalseDepsPopcnt, - Prefetchwt1, - Prfchw, - Ptwrite, - PadShortFunctions, - Prefer128Bit, - Prefer256Bit, - Rdpid, - Rdrnd, - Rdseed, - Rtm, - Retpoline, - RetpolineExternalThunk, - RetpolineIndirectBranches, - RetpolineIndirectCalls, - Sgx, - Sha, - Shstk, - Sse, - Sse2, - Sse3, - Sse4a, - Sse41, - Sse42, - SseUnalignedMem, - Ssse3, - Slow3opsLea, - IdivlToDivb, - IdivqToDivl, - SlowIncdec, - SlowLea, - SlowPmaddwd, - SlowPmulld, - SlowShld, - SlowTwoMemOps, - SlowUnalignedMem16, - SlowUnalignedMem32, - SoftFloat, - Tbm, - UseAa, - Vaes, - Avx512vbmi, - Avx512vbmi2, - Avx512vl, - Avx512vnni, - Avx512vp2intersect, - Vpclmulqdq, - Avx512vpopcntdq, - Waitpkg, - Wbnoinvd, - X87, - Xop, - Xsave, - Xsavec, - Xsaveopt, - Xsaves, - BitMode16, - BitMode32, - BitMode64, - - pub fn getInfo(self: @This()) FeatureInfo(@This()) { - return feature_infos[@enumToInt(self)]; - } - - pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) { - FeatureInfo(@This()).createWithSubfeatures(.Dnow3, "3dnow", "Enable 3DNow! instructions", "3dnow", &[_]@This() { - .Mmx, - }), - FeatureInfo(@This()).createWithSubfeatures(.Dnowa3, "3dnowa", "Enable 3DNow! Athlon instructions", "3dnowa", &[_]@This() { - .Mmx, - }), - FeatureInfo(@This()).create(.Bit64, "64bit", "Support 64-bit instructions", "64bit"), - FeatureInfo(@This()).create(.Adx, "adx", "Support ADX instructions", "adx"), - FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES instructions", "aes", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx, "avx", "Enable AVX instructions", "avx", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx2, "avx2", "Enable AVX2 instructions", "avx2", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512f, "avx512f", "Enable AVX-512 instructions", "avx512f", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512bf16, "avx512bf16", "Support bfloat16 floating point", "avx512bf16", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512bitalg, "avx512bitalg", "Enable AVX-512 Bit Algorithms", "avx512bitalg", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Bmi, "bmi", "Support BMI instructions", "bmi"), - FeatureInfo(@This()).create(.Bmi2, "bmi2", "Support BMI2 instructions", "bmi2"), - FeatureInfo(@This()).createWithSubfeatures(.Avx512bw, "avx512bw", "Enable AVX-512 Byte and Word Instructions", "avx512bw", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Branchfusion, "branchfusion", "CMP/TEST can be fused with conditional branches", "branchfusion"), - FeatureInfo(@This()).createWithSubfeatures(.Avx512cd, "avx512cd", "Enable AVX-512 Conflict Detection Instructions", "avx512cd", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Cldemote, "cldemote", "Enable Cache Demote", "cldemote"), - FeatureInfo(@This()).create(.Clflushopt, "clflushopt", "Flush A Cache Line Optimized", "clflushopt"), - FeatureInfo(@This()).create(.Clwb, "clwb", "Cache Line Write Back", "clwb"), - FeatureInfo(@This()).create(.Clzero, "clzero", "Enable Cache Line Zero", "clzero"), - FeatureInfo(@This()).create(.Cmov, "cmov", "Enable conditional move instructions", "cmov"), - FeatureInfo(@This()).create(.Cx8, "cx8", "Support CMPXCHG8B instructions", "cx8"), - FeatureInfo(@This()).createWithSubfeatures(.Cx16, "cx16", "64-bit with cmpxchg16b", "cx16", &[_]@This() { - .Cx8, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512dq, "avx512dq", "Enable AVX-512 Doubleword and Quadword Instructions", "avx512dq", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Mpx, "mpx", "Deprecated. Support MPX instructions", "mpx"), - FeatureInfo(@This()).create(.Enqcmd, "enqcmd", "Has ENQCMD instructions", "enqcmd"), - FeatureInfo(@This()).createWithSubfeatures(.Avx512er, "avx512er", "Enable AVX-512 Exponential and Reciprocal Instructions", "avx512er", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Ermsb, "ermsb", "REP MOVS/STOS are fast", "ermsb"), - FeatureInfo(@This()).createWithSubfeatures(.F16c, "f16c", "Support 16-bit floating point conversion instructions", "f16c", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fma, "fma", "Enable three-operand fused multiple-add", "fma", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Fma4, "fma4", "Enable four-operand fused multiple-add", "fma4", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Fsgsbase, "fsgsbase", "Support FS/GS Base instructions", "fsgsbase"), - FeatureInfo(@This()).create(.Fxsr, "fxsr", "Support fxsave/fxrestore instructions", "fxsr"), - FeatureInfo(@This()).create(.Fast11bytenop, "fast-11bytenop", "Target can quickly decode up to 11 byte NOPs", "fast-11bytenop"), - FeatureInfo(@This()).create(.Fast15bytenop, "fast-15bytenop", "Target can quickly decode up to 15 byte NOPs", "fast-15bytenop"), - FeatureInfo(@This()).create(.FastBextr, "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", "fast-bextr"), - FeatureInfo(@This()).createWithSubfeatures(.FastHops, "fast-hops", "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", "fast-hops", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.FastLzcnt, "fast-lzcnt", "LZCNT instructions are as fast as most simple integer ops", "fast-lzcnt"), - FeatureInfo(@This()).create(.FastPartialYmmOrZmmWrite, "fast-partial-ymm-or-zmm-write", "Partial writes to YMM/ZMM registers are fast", "fast-partial-ymm-or-zmm-write"), - FeatureInfo(@This()).create(.FastShldRotate, "fast-shld-rotate", "SHLD can be used as a faster rotate", "fast-shld-rotate"), - FeatureInfo(@This()).create(.FastScalarFsqrt, "fast-scalar-fsqrt", "Scalar SQRT is fast (disable Newton-Raphson)", "fast-scalar-fsqrt"), - FeatureInfo(@This()).create(.FastScalarShiftMasks, "fast-scalar-shift-masks", "Prefer a left/right scalar logical shift pair over a shift+and pair", "fast-scalar-shift-masks"), - FeatureInfo(@This()).create(.FastVariableShuffle, "fast-variable-shuffle", "Shuffles with variable masks are fast", "fast-variable-shuffle"), - FeatureInfo(@This()).create(.FastVectorFsqrt, "fast-vector-fsqrt", "Vector SQRT is fast (disable Newton-Raphson)", "fast-vector-fsqrt"), - FeatureInfo(@This()).create(.FastVectorShiftMasks, "fast-vector-shift-masks", "Prefer a left/right vector logical shift pair over a shift+and pair", "fast-vector-shift-masks"), - FeatureInfo(@This()).createWithSubfeatures(.Gfni, "gfni", "Enable Galois Field Arithmetic Instructions", "gfni", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.FastGather, "fast-gather", "Indicates if gather is reasonably fast", "fast-gather"), - FeatureInfo(@This()).createWithSubfeatures(.Avx512ifma, "avx512ifma", "Enable AVX-512 Integer Fused Multiple-Add", "avx512ifma", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Invpcid, "invpcid", "Invalidate Process-Context Identifier", "invpcid"), - FeatureInfo(@This()).create(.Sahf, "sahf", "Support LAHF and SAHF instructions", "sahf"), - FeatureInfo(@This()).create(.LeaSp, "lea-sp", "Use LEA for adjusting the stack pointer", "lea-sp"), - FeatureInfo(@This()).create(.LeaUsesAg, "lea-uses-ag", "LEA instruction needs inputs at AG stage", "lea-uses-ag"), - FeatureInfo(@This()).create(.Lwp, "lwp", "Enable LWP instructions", "lwp"), - FeatureInfo(@This()).create(.Lzcnt, "lzcnt", "Support LZCNT instruction", "lzcnt"), - FeatureInfo(@This()).create(.FalseDepsLzcntTzcnt, "false-deps-lzcnt-tzcnt", "LZCNT/TZCNT have a false dependency on dest register", "false-deps-lzcnt-tzcnt"), - FeatureInfo(@This()).create(.Mmx, "mmx", "Enable MMX instructions", "mmx"), - FeatureInfo(@This()).create(.Movbe, "movbe", "Support MOVBE instruction", "movbe"), - FeatureInfo(@This()).create(.Movdir64b, "movdir64b", "Support movdir64b instruction", "movdir64b"), - FeatureInfo(@This()).create(.Movdiri, "movdiri", "Support movdiri instruction", "movdiri"), - FeatureInfo(@This()).create(.Mwaitx, "mwaitx", "Enable MONITORX/MWAITX timer functionality", "mwaitx"), - FeatureInfo(@This()).create(.Macrofusion, "macrofusion", "Various instructions can be fused with conditional branches", "macrofusion"), - FeatureInfo(@This()).create(.MergeToThreewayBranch, "merge-to-threeway-branch", "Merge branches to a three-way conditional branch", "merge-to-threeway-branch"), - FeatureInfo(@This()).create(.Nopl, "nopl", "Enable NOPL instruction", "nopl"), - FeatureInfo(@This()).createWithSubfeatures(.Pclmul, "pclmul", "Enable packed carry-less multiplication instructions", "pclmul", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Pconfig, "pconfig", "platform configuration instruction", "pconfig"), - FeatureInfo(@This()).createWithSubfeatures(.Avx512pf, "avx512pf", "Enable AVX-512 PreFetch Instructions", "avx512pf", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Pku, "pku", "Enable protection keys", "pku"), - FeatureInfo(@This()).create(.Popcnt, "popcnt", "Support POPCNT instruction", "popcnt"), - FeatureInfo(@This()).create(.FalseDepsPopcnt, "false-deps-popcnt", "POPCNT has a false dependency on dest register", "false-deps-popcnt"), - FeatureInfo(@This()).create(.Prefetchwt1, "prefetchwt1", "Prefetch with Intent to Write and T1 Hint", "prefetchwt1"), - FeatureInfo(@This()).create(.Prfchw, "prfchw", "Support PRFCHW instructions", "prfchw"), - FeatureInfo(@This()).create(.Ptwrite, "ptwrite", "Support ptwrite instruction", "ptwrite"), - FeatureInfo(@This()).create(.PadShortFunctions, "pad-short-functions", "Pad short functions", "pad-short-functions"), - FeatureInfo(@This()).create(.Prefer128Bit, "prefer-128-bit", "Prefer 128-bit AVX instructions", "prefer-128-bit"), - FeatureInfo(@This()).create(.Prefer256Bit, "prefer-256-bit", "Prefer 256-bit AVX instructions", "prefer-256-bit"), - FeatureInfo(@This()).create(.Rdpid, "rdpid", "Support RDPID instructions", "rdpid"), - FeatureInfo(@This()).create(.Rdrnd, "rdrnd", "Support RDRAND instruction", "rdrnd"), - FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"), - FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"), - FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() { - .RetpolineIndirectCalls, - .RetpolineIndirectBranches, - }), - FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() { - .RetpolineIndirectCalls, - }), - FeatureInfo(@This()).create(.RetpolineIndirectBranches, "retpoline-indirect-branches", "Remove speculation of indirect branches from the generated code", "retpoline-indirect-branches"), - FeatureInfo(@This()).create(.RetpolineIndirectCalls, "retpoline-indirect-calls", "Remove speculation of indirect calls from the generated code", "retpoline-indirect-calls"), - FeatureInfo(@This()).create(.Sgx, "sgx", "Enable Software Guard Extensions", "sgx"), - FeatureInfo(@This()).createWithSubfeatures(.Sha, "sha", "Enable SHA instructions", "sha", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Shstk, "shstk", "Support CET Shadow-Stack instructions", "shstk"), - FeatureInfo(@This()).create(.Sse, "sse", "Enable SSE instructions", "sse"), - FeatureInfo(@This()).createWithSubfeatures(.Sse2, "sse2", "Enable SSE2 instructions", "sse2", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sse3, "sse3", "Enable SSE3 instructions", "sse3", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sse4a, "sse4a", "Support SSE 4a instructions", "sse4a", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sse41, "sse4.1", "Enable SSE 4.1 instructions", "sse4.1", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Sse42, "sse4.2", "Enable SSE 4.2 instructions", "sse4.2", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.SseUnalignedMem, "sse-unaligned-mem", "Allow unaligned memory operands with SSE instructions", "sse-unaligned-mem"), - FeatureInfo(@This()).createWithSubfeatures(.Ssse3, "ssse3", "Enable SSSE3 instructions", "ssse3", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Slow3opsLea, "slow-3ops-lea", "LEA instruction with 3 ops or certain registers is slow", "slow-3ops-lea"), - FeatureInfo(@This()).create(.IdivlToDivb, "idivl-to-divb", "Use 8-bit divide for positive values less than 256", "idivl-to-divb"), - FeatureInfo(@This()).create(.IdivqToDivl, "idivq-to-divl", "Use 32-bit divide for positive values less than 2^32", "idivq-to-divl"), - FeatureInfo(@This()).create(.SlowIncdec, "slow-incdec", "INC and DEC instructions are slower than ADD and SUB", "slow-incdec"), - FeatureInfo(@This()).create(.SlowLea, "slow-lea", "LEA instruction with certain arguments is slow", "slow-lea"), - FeatureInfo(@This()).create(.SlowPmaddwd, "slow-pmaddwd", "PMADDWD is slower than PMULLD", "slow-pmaddwd"), - FeatureInfo(@This()).create(.SlowPmulld, "slow-pmulld", "PMULLD instruction is slow", "slow-pmulld"), - FeatureInfo(@This()).create(.SlowShld, "slow-shld", "SHLD instruction is slow", "slow-shld"), - FeatureInfo(@This()).create(.SlowTwoMemOps, "slow-two-mem-ops", "Two memory operand instructions are slow", "slow-two-mem-ops"), - FeatureInfo(@This()).create(.SlowUnalignedMem16, "slow-unaligned-mem-16", "Slow unaligned 16-byte memory access", "slow-unaligned-mem-16"), - FeatureInfo(@This()).create(.SlowUnalignedMem32, "slow-unaligned-mem-32", "Slow unaligned 32-byte memory access", "slow-unaligned-mem-32"), - FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features", "soft-float"), - FeatureInfo(@This()).create(.Tbm, "tbm", "Enable TBM instructions", "tbm"), - FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"), - FeatureInfo(@This()).createWithSubfeatures(.Vaes, "vaes", "Promote selected AES instructions to AVX512/AVX registers", "vaes", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi, "avx512vbmi", "Enable AVX-512 Vector Byte Manipulation Instructions", "avx512vbmi", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi2, "avx512vbmi2", "Enable AVX-512 further Vector Byte Manipulation Instructions", "avx512vbmi2", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vl, "avx512vl", "Enable AVX-512 Vector Length eXtensions", "avx512vl", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vnni, "avx512vnni", "Enable AVX-512 Vector Neural Network Instructions", "avx512vnni", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vp2intersect, "avx512vp2intersect", "Enable AVX-512 vp2intersect", "avx512vp2intersect", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Vpclmulqdq, "vpclmulqdq", "Enable vpclmulqdq instructions", "vpclmulqdq", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).createWithSubfeatures(.Avx512vpopcntdq, "avx512vpopcntdq", "Enable AVX-512 Population Count Instructions", "avx512vpopcntdq", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Waitpkg, "waitpkg", "Wait and pause enhancements", "waitpkg"), - FeatureInfo(@This()).create(.Wbnoinvd, "wbnoinvd", "Write Back No Invalidate", "wbnoinvd"), - FeatureInfo(@This()).create(.X87, "x87", "Enable X87 float instructions", "x87"), - FeatureInfo(@This()).createWithSubfeatures(.Xop, "xop", "Enable XOP instructions", "xop", &[_]@This() { - .Sse, - }), - FeatureInfo(@This()).create(.Xsave, "xsave", "Support xsave instructions", "xsave"), - FeatureInfo(@This()).create(.Xsavec, "xsavec", "Support xsavec instructions", "xsavec"), - FeatureInfo(@This()).create(.Xsaveopt, "xsaveopt", "Support xsaveopt instructions", "xsaveopt"), - FeatureInfo(@This()).create(.Xsaves, "xsaves", "Support xsaves instructions", "xsaves"), - FeatureInfo(@This()).create(.BitMode16, "16bit-mode", "16-bit mode (i8086)", "16bit-mode"), - FeatureInfo(@This()).create(.BitMode32, "32bit-mode", "32-bit mode (80386)", "32bit-mode"), - FeatureInfo(@This()).create(.BitMode64, "64bit-mode", "64-bit mode (x86_64)", "64bit-mode"), - }; -}; diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig deleted file mode 100644 index e18d66aa132262804145ee773d7d63949f6a9aec..0000000000000000000000000000000000000000 --- a/lib/std/target/feature/empty.zig +++ /dev/null @@ -1,5 +0,0 @@ -const FeatureInfo = @import("std").target.feature.FeatureInfo; - -pub const EmptyFeature = struct { - pub const feature_infos = [0]FeatureInfo(@This()) {}; -}; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig new file mode 100644 index 0000000000000000000000000000000000000000..4ebc7edc2f9c20a52d36a7eee2e0a2abb843fbf3 --- /dev/null +++ b/lib/std/target/hexagon.zig @@ -0,0 +1,357 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_v5 = Feature{ + .name = "v5", + .description = "Enable Hexagon V5 architecture", + .llvm_name = "v5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v55 = Feature{ + .name = "v55", + .description = "Enable Hexagon V55 architecture", + .llvm_name = "v55", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v60 = Feature{ + .name = "v60", + .description = "Enable Hexagon V60 architecture", + .llvm_name = "v60", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v62 = Feature{ + .name = "v62", + .description = "Enable Hexagon V62 architecture", + .llvm_name = "v62", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v65 = Feature{ + .name = "v65", + .description = "Enable Hexagon V65 architecture", + .llvm_name = "v65", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v66 = Feature{ + .name = "v66", + .description = "Enable Hexagon V66 architecture", + .llvm_name = "v66", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hvx = Feature{ + .name = "hvx", + .description = "Hexagon HVX instructions", + .llvm_name = "hvx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hvxLength64b = Feature{ + .name = "hvx-length64b", + .description = "Hexagon HVX 64B instructions", + .llvm_name = "hvx-length64b", + .subfeatures = &[_]*const Feature { + &feature_hvx, + }, +}; + +pub const feature_hvxLength128b = Feature{ + .name = "hvx-length128b", + .description = "Hexagon HVX 128B instructions", + .llvm_name = "hvx-length128b", + .subfeatures = &[_]*const Feature { + &feature_hvx, + }, +}; + +pub const feature_hvxv60 = Feature{ + .name = "hvxv60", + .description = "Hexagon HVX instructions", + .llvm_name = "hvxv60", + .subfeatures = &[_]*const Feature { + &feature_hvx, + }, +}; + +pub const feature_hvxv62 = Feature{ + .name = "hvxv62", + .description = "Hexagon HVX instructions", + .llvm_name = "hvxv62", + .subfeatures = &[_]*const Feature { + &feature_hvx, + }, +}; + +pub const feature_hvxv65 = Feature{ + .name = "hvxv65", + .description = "Hexagon HVX instructions", + .llvm_name = "hvxv65", + .subfeatures = &[_]*const Feature { + &feature_hvx, + }, +}; + +pub const feature_hvxv66 = Feature{ + .name = "hvxv66", + .description = "Hexagon HVX instructions", + .llvm_name = "hvxv66", + .subfeatures = &[_]*const Feature { + &feature_zreg, + &feature_hvx, + }, +}; + +pub const feature_zreg = Feature{ + .name = "zreg", + .description = "Hexagon ZReg extension instructions", + .llvm_name = "zreg", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_duplex = Feature{ + .name = "duplex", + .description = "Enable generation of duplex instruction", + .llvm_name = "duplex", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "long-calls", + .description = "Use constant-extended calls", + .llvm_name = "long-calls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mem_noshuf = Feature{ + .name = "mem_noshuf", + .description = "Supports mem_noshuf feature", + .llvm_name = "mem_noshuf", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_memops = Feature{ + .name = "memops", + .description = "Use memop instructions", + .llvm_name = "memops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nvj = Feature{ + .name = "nvj", + .description = "Support for new-value jumps", + .llvm_name = "nvj", + .subfeatures = &[_]*const Feature { + &feature_packets, + }, +}; + +pub const feature_nvs = Feature{ + .name = "nvs", + .description = "Support for new-value stores", + .llvm_name = "nvs", + .subfeatures = &[_]*const Feature { + &feature_packets, + }, +}; + +pub const feature_noreturnStackElim = Feature{ + .name = "noreturn-stack-elim", + .description = "Eliminate stack allocation in a noreturn function when possible", + .llvm_name = "noreturn-stack-elim", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_packets = Feature{ + .name = "packets", + .description = "Support for instruction packets", + .llvm_name = "packets", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_reservedR19 = Feature{ + .name = "reserved-r19", + .description = "Reserve register R19", + .llvm_name = "reserved-r19", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_smallData = Feature{ + .name = "small-data", + .description = "Allow GP-relative addressing of global variables", + .llvm_name = "small-data", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_v62, + &feature_v65, + &feature_v66, + &feature_hvx, + &feature_hvxLength64b, + &feature_hvxLength128b, + &feature_hvxv60, + &feature_hvxv62, + &feature_hvxv65, + &feature_hvxv66, + &feature_zreg, + &feature_duplex, + &feature_longCalls, + &feature_mem_noshuf, + &feature_memops, + &feature_nvj, + &feature_nvs, + &feature_noreturnStackElim, + &feature_packets, + &feature_reservedR19, + &feature_smallData, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv5 = Cpu{ + .name = "hexagonv5", + .llvm_name = "hexagonv5", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv55 = Cpu{ + .name = "hexagonv55", + .llvm_name = "hexagonv55", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv60 = Cpu{ + .name = "hexagonv60", + .llvm_name = "hexagonv60", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv62 = Cpu{ + .name = "hexagonv62", + .llvm_name = "hexagonv62", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_v62, + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv65 = Cpu{ + .name = "hexagonv65", + .llvm_name = "hexagonv65", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_v62, + &feature_v65, + &feature_duplex, + &feature_mem_noshuf, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv66 = Cpu{ + .name = "hexagonv66", + .llvm_name = "hexagonv66", + .subfeatures = &[_]*const Feature { + &feature_v5, + &feature_v55, + &feature_v60, + &feature_v62, + &feature_v65, + &feature_v66, + &feature_duplex, + &feature_mem_noshuf, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_hexagonv5, + &cpu_hexagonv55, + &cpu_hexagonv60, + &cpu_hexagonv62, + &cpu_hexagonv65, + &cpu_hexagonv66, +}; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig new file mode 100644 index 0000000000000000000000000000000000000000..f2de051623fd46fbce71368bd3f9453038c3418e --- /dev/null +++ b/lib/std/target/mips.zig @@ -0,0 +1,828 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_abs2008 = Feature{ + .name = "abs2008", + .description = "Disable IEEE 754-2008 abs.fmt mode", + .llvm_name = "abs2008", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .description = "Mips R6 CRC ASE", + .llvm_name = "crc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cnmips = Feature{ + .name = "cnmips", + .description = "Octeon cnMIPS Support", + .llvm_name = "cnmips", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_dsp = Feature{ + .name = "dsp", + .description = "Mips DSP ASE", + .llvm_name = "dsp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dspr2 = Feature{ + .name = "dspr2", + .description = "Mips DSP-R2 ASE", + .llvm_name = "dspr2", + .subfeatures = &[_]*const Feature { + &feature_dsp, + }, +}; + +pub const feature_dspr3 = Feature{ + .name = "dspr3", + .description = "Mips DSP-R3 ASE", + .llvm_name = "dspr3", + .subfeatures = &[_]*const Feature { + &feature_dsp, + }, +}; + +pub const feature_eva = Feature{ + .name = "eva", + .description = "Mips EVA ASE", + .llvm_name = "eva", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .description = "Support 64-bit FP registers", + .llvm_name = "fp64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fpxx = Feature{ + .name = "fpxx", + .description = "Support for FPXX", + .llvm_name = "fpxx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ginv = Feature{ + .name = "ginv", + .description = "Mips Global Invalidate ASE", + .llvm_name = "ginv", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gp64 = Feature{ + .name = "gp64", + .description = "General Purpose Registers are 64-bit wide", + .llvm_name = "gp64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "long-calls", + .description = "Disable use of the jal instruction", + .llvm_name = "long-calls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_msa = Feature{ + .name = "msa", + .description = "Mips MSA ASE", + .llvm_name = "msa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mt = Feature{ + .name = "mt", + .description = "Mips MT ASE", + .llvm_name = "mt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nomadd4 = Feature{ + .name = "nomadd4", + .description = "Disable 4-operand madd.fmt and related instructions", + .llvm_name = "nomadd4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_micromips = Feature{ + .name = "micromips", + .description = "microMips mode", + .llvm_name = "micromips", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips1 = Feature{ + .name = "mips1", + .description = "Mips I ISA Support [highly experimental]", + .llvm_name = "mips1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips2 = Feature{ + .name = "mips2", + .description = "Mips II ISA Support [highly experimental]", + .llvm_name = "mips2", + .subfeatures = &[_]*const Feature { + &feature_mips1, + }, +}; + +pub const feature_mips3 = Feature{ + .name = "mips3", + .description = "MIPS III ISA Support [highly experimental]", + .llvm_name = "mips3", + .subfeatures = &[_]*const Feature { + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips3_32 = Feature{ + .name = "mips3_32", + .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", + .llvm_name = "mips3_32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips3_32r2 = Feature{ + .name = "mips3_32r2", + .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", + .llvm_name = "mips3_32r2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips4 = Feature{ + .name = "mips4", + .description = "MIPS IV ISA Support", + .llvm_name = "mips4", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips4_32 = Feature{ + .name = "mips4_32", + .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", + .llvm_name = "mips4_32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips4_32r2 = Feature{ + .name = "mips4_32r2", + .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", + .llvm_name = "mips4_32r2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips5 = Feature{ + .name = "mips5", + .description = "MIPS V ISA Support [highly experimental]", + .llvm_name = "mips5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips5_32r2 = Feature{ + .name = "mips5_32r2", + .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", + .llvm_name = "mips5_32r2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips16 = Feature{ + .name = "mips16", + .description = "Mips16 mode", + .llvm_name = "mips16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mips32 = Feature{ + .name = "mips32", + .description = "Mips32 ISA Support", + .llvm_name = "mips32", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32, + &feature_mips1, + }, +}; + +pub const feature_mips32r2 = Feature{ + .name = "mips32r2", + .description = "Mips32r2 ISA Support", + .llvm_name = "mips32r2", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + }, +}; + +pub const feature_mips32r3 = Feature{ + .name = "mips32r3", + .description = "Mips32r3 ISA Support", + .llvm_name = "mips32r3", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + }, +}; + +pub const feature_mips32r5 = Feature{ + .name = "mips32r5", + .description = "Mips32r5 ISA Support", + .llvm_name = "mips32r5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + }, +}; + +pub const feature_mips32r6 = Feature{ + .name = "mips32r6", + .description = "Mips32r6 ISA Support [experimental]", + .llvm_name = "mips32r6", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips1, + &feature_abs2008, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips64 = Feature{ + .name = "mips64", + .description = "Mips64 ISA Support", + .llvm_name = "mips64", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips64r2 = Feature{ + .name = "mips64r2", + .description = "Mips64r2 ISA Support", + .llvm_name = "mips64r2", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips64r3 = Feature{ + .name = "mips64r3", + .description = "Mips64r3 ISA Support", + .llvm_name = "mips64r3", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips64r5 = Feature{ + .name = "mips64r5", + .description = "Mips64r5 ISA Support", + .llvm_name = "mips64r5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_mips64r6 = Feature{ + .name = "mips64r6", + .description = "Mips64r6 ISA Support [experimental]", + .llvm_name = "mips64r6", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips1, + &feature_abs2008, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + }, +}; + +pub const feature_nan2008 = Feature{ + .name = "nan2008", + .description = "IEEE 754-2008 NaN encoding", + .llvm_name = "nan2008", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noabicalls = Feature{ + .name = "noabicalls", + .description = "Disable SVR4-style position-independent code", + .llvm_name = "noabicalls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nooddspreg = Feature{ + .name = "nooddspreg", + .description = "Disable odd numbered single-precision registers", + .llvm_name = "nooddspreg", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptr64 = Feature{ + .name = "ptr64", + .description = "Pointers are 64-bit wide", + .llvm_name = "ptr64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_singleFloat = Feature{ + .name = "single-float", + .description = "Only supports single precision float", + .llvm_name = "single-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "soft-float", + .description = "Does not support floating point instructions", + .llvm_name = "soft-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sym32 = Feature{ + .name = "sym32", + .description = "Symbols are 32 bit on Mips64", + .llvm_name = "sym32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useIndirectJumpHazard = Feature{ + .name = "use-indirect-jump-hazard", + .description = "Use indirect jump guards to prevent certain speculation based attacks", + .llvm_name = "use-indirect-jump-hazard", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useTccInDiv = Feature{ + .name = "use-tcc-in-div", + .description = "Force the assembler to use trapping", + .llvm_name = "use-tcc-in-div", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vfpu = Feature{ + .name = "vfpu", + .description = "Enable vector FPU instructions", + .llvm_name = "vfpu", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_virt = Feature{ + .name = "virt", + .description = "Mips Virtualization ASE", + .llvm_name = "virt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xgot = Feature{ + .name = "xgot", + .description = "Assume 32-bit GOT", + .llvm_name = "xgot", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_p5600 = Feature{ + .name = "p5600", + .description = "The P5600 Processor", + .llvm_name = "p5600", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + }, +}; + +pub const features = &[_]*const Feature { + &feature_abs2008, + &feature_crc, + &feature_cnmips, + &feature_dsp, + &feature_dspr2, + &feature_dspr3, + &feature_eva, + &feature_fp64, + &feature_fpxx, + &feature_ginv, + &feature_gp64, + &feature_longCalls, + &feature_msa, + &feature_mt, + &feature_nomadd4, + &feature_micromips, + &feature_mips1, + &feature_mips2, + &feature_mips3, + &feature_mips3_32, + &feature_mips3_32r2, + &feature_mips4, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_mips5, + &feature_mips5_32r2, + &feature_mips16, + &feature_mips32, + &feature_mips32r2, + &feature_mips32r3, + &feature_mips32r5, + &feature_mips32r6, + &feature_mips64, + &feature_mips64r2, + &feature_mips64r3, + &feature_mips64r5, + &feature_mips64r6, + &feature_nan2008, + &feature_noabicalls, + &feature_nooddspreg, + &feature_ptr64, + &feature_singleFloat, + &feature_softFloat, + &feature_sym32, + &feature_useIndirectJumpHazard, + &feature_useTccInDiv, + &feature_vfpu, + &feature_virt, + &feature_xgot, + &feature_p5600, +}; + +pub const cpu_mips1 = Cpu{ + .name = "mips1", + .llvm_name = "mips1", + .subfeatures = &[_]*const Feature { + &feature_mips1, + }, +}; + +pub const cpu_mips2 = Cpu{ + .name = "mips2", + .llvm_name = "mips2", + .subfeatures = &[_]*const Feature { + &feature_mips1, + &feature_mips2, + }, +}; + +pub const cpu_mips3 = Cpu{ + .name = "mips3", + .llvm_name = "mips3", + .subfeatures = &[_]*const Feature { + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips3_32, + &feature_fp64, + &feature_mips3, + }, +}; + +pub const cpu_mips32 = Cpu{ + .name = "mips32", + .llvm_name = "mips32", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32, + &feature_mips1, + &feature_mips32, + }, +}; + +pub const cpu_mips32r2 = Cpu{ + .name = "mips32r2", + .llvm_name = "mips32r2", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_mips32r2, + }, +}; + +pub const cpu_mips32r3 = Cpu{ + .name = "mips32r3", + .llvm_name = "mips32r3", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_mips32r3, + }, +}; + +pub const cpu_mips32r5 = Cpu{ + .name = "mips32r5", + .llvm_name = "mips32r5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_mips32r5, + }, +}; + +pub const cpu_mips32r6 = Cpu{ + .name = "mips32r6", + .llvm_name = "mips32r6", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips1, + &feature_abs2008, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips32r6, + }, +}; + +pub const cpu_mips4 = Cpu{ + .name = "mips4", + .llvm_name = "mips4", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips4, + }, +}; + +pub const cpu_mips5 = Cpu{ + .name = "mips5", + .llvm_name = "mips5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips5, + }, +}; + +pub const cpu_mips64 = Cpu{ + .name = "mips64", + .llvm_name = "mips64", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips64, + }, +}; + +pub const cpu_mips64r2 = Cpu{ + .name = "mips64r2", + .llvm_name = "mips64r2", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips64r2, + }, +}; + +pub const cpu_mips64r3 = Cpu{ + .name = "mips64r3", + .llvm_name = "mips64r3", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips64r3, + }, +}; + +pub const cpu_mips64r5 = Cpu{ + .name = "mips64r5", + .llvm_name = "mips64r5", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips64r5, + }, +}; + +pub const cpu_mips64r6 = Cpu{ + .name = "mips64r6", + .llvm_name = "mips64r6", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips1, + &feature_abs2008, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_mips64r6, + }, +}; + +pub const cpu_octeon = Cpu{ + .name = "octeon", + .llvm_name = "octeon", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_fp64, + &feature_cnmips, + &feature_mips64r2, + }, +}; + +pub const cpu_p5600 = Cpu{ + .name = "p5600", + .llvm_name = "p5600", + .subfeatures = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips1, + &feature_mips4_32r2, + &feature_mips5_32r2, + &feature_mips3_32, + &feature_p5600, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_mips1, + &cpu_mips2, + &cpu_mips3, + &cpu_mips32, + &cpu_mips32r2, + &cpu_mips32r3, + &cpu_mips32r5, + &cpu_mips32r6, + &cpu_mips4, + &cpu_mips5, + &cpu_mips64, + &cpu_mips64r2, + &cpu_mips64r3, + &cpu_mips64r5, + &cpu_mips64r6, + &cpu_octeon, + &cpu_p5600, +}; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig new file mode 100644 index 0000000000000000000000000000000000000000..8a773328b2fe768baaeb4e649ba10ce949654e87 --- /dev/null +++ b/lib/std/target/msp430.zig @@ -0,0 +1,69 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_hwmult16 = Feature{ + .name = "hwmult16", + .description = "Enable 16-bit hardware multiplier", + .llvm_name = "hwmult16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hwmult32 = Feature{ + .name = "hwmult32", + .description = "Enable 32-bit hardware multiplier", + .llvm_name = "hwmult32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hwmultf5 = Feature{ + .name = "hwmultf5", + .description = "Enable F5 series hardware multiplier", + .llvm_name = "hwmultf5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ext = Feature{ + .name = "ext", + .description = "Enable MSP430-X extensions", + .llvm_name = "ext", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_hwmult16, + &feature_hwmult32, + &feature_hwmultf5, + &feature_ext, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_msp430 = Cpu{ + .name = "msp430", + .llvm_name = "msp430", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_msp430x = Cpu{ + .name = "msp430x", + .llvm_name = "msp430x", + .subfeatures = &[_]*const Feature { + &feature_ext, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_msp430, + &cpu_msp430x, +}; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig new file mode 100644 index 0000000000000000000000000000000000000000..e978f64331b4708b5a60f026db73535565965814 --- /dev/null +++ b/lib/std/target/nvptx.zig @@ -0,0 +1,379 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_ptx32 = Feature{ + .name = "ptx32", + .description = "Use PTX version 3.2", + .llvm_name = "ptx32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx40 = Feature{ + .name = "ptx40", + .description = "Use PTX version 4.0", + .llvm_name = "ptx40", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx41 = Feature{ + .name = "ptx41", + .description = "Use PTX version 4.1", + .llvm_name = "ptx41", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx42 = Feature{ + .name = "ptx42", + .description = "Use PTX version 4.2", + .llvm_name = "ptx42", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx43 = Feature{ + .name = "ptx43", + .description = "Use PTX version 4.3", + .llvm_name = "ptx43", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx50 = Feature{ + .name = "ptx50", + .description = "Use PTX version 5.0", + .llvm_name = "ptx50", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx60 = Feature{ + .name = "ptx60", + .description = "Use PTX version 6.0", + .llvm_name = "ptx60", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx61 = Feature{ + .name = "ptx61", + .description = "Use PTX version 6.1", + .llvm_name = "ptx61", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx63 = Feature{ + .name = "ptx63", + .description = "Use PTX version 6.3", + .llvm_name = "ptx63", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptx64 = Feature{ + .name = "ptx64", + .description = "Use PTX version 6.4", + .llvm_name = "ptx64", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_20 = Feature{ + .name = "sm_20", + .description = "Target SM 2.0", + .llvm_name = "sm_20", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_21 = Feature{ + .name = "sm_21", + .description = "Target SM 2.1", + .llvm_name = "sm_21", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_30 = Feature{ + .name = "sm_30", + .description = "Target SM 3.0", + .llvm_name = "sm_30", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_32 = Feature{ + .name = "sm_32", + .description = "Target SM 3.2", + .llvm_name = "sm_32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_35 = Feature{ + .name = "sm_35", + .description = "Target SM 3.5", + .llvm_name = "sm_35", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_37 = Feature{ + .name = "sm_37", + .description = "Target SM 3.7", + .llvm_name = "sm_37", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_50 = Feature{ + .name = "sm_50", + .description = "Target SM 5.0", + .llvm_name = "sm_50", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_52 = Feature{ + .name = "sm_52", + .description = "Target SM 5.2", + .llvm_name = "sm_52", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_53 = Feature{ + .name = "sm_53", + .description = "Target SM 5.3", + .llvm_name = "sm_53", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_60 = Feature{ + .name = "sm_60", + .description = "Target SM 6.0", + .llvm_name = "sm_60", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_61 = Feature{ + .name = "sm_61", + .description = "Target SM 6.1", + .llvm_name = "sm_61", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_62 = Feature{ + .name = "sm_62", + .description = "Target SM 6.2", + .llvm_name = "sm_62", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_70 = Feature{ + .name = "sm_70", + .description = "Target SM 7.0", + .llvm_name = "sm_70", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_72 = Feature{ + .name = "sm_72", + .description = "Target SM 7.2", + .llvm_name = "sm_72", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sm_75 = Feature{ + .name = "sm_75", + .description = "Target SM 7.5", + .llvm_name = "sm_75", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_ptx32, + &feature_ptx40, + &feature_ptx41, + &feature_ptx42, + &feature_ptx43, + &feature_ptx50, + &feature_ptx60, + &feature_ptx61, + &feature_ptx63, + &feature_ptx64, + &feature_sm_20, + &feature_sm_21, + &feature_sm_30, + &feature_sm_32, + &feature_sm_35, + &feature_sm_37, + &feature_sm_50, + &feature_sm_52, + &feature_sm_53, + &feature_sm_60, + &feature_sm_61, + &feature_sm_62, + &feature_sm_70, + &feature_sm_72, + &feature_sm_75, +}; + +pub const cpu_sm_20 = Cpu{ + .name = "sm_20", + .llvm_name = "sm_20", + .subfeatures = &[_]*const Feature { + &feature_sm_20, + }, +}; + +pub const cpu_sm_21 = Cpu{ + .name = "sm_21", + .llvm_name = "sm_21", + .subfeatures = &[_]*const Feature { + &feature_sm_21, + }, +}; + +pub const cpu_sm_30 = Cpu{ + .name = "sm_30", + .llvm_name = "sm_30", + .subfeatures = &[_]*const Feature { + &feature_sm_30, + }, +}; + +pub const cpu_sm_32 = Cpu{ + .name = "sm_32", + .llvm_name = "sm_32", + .subfeatures = &[_]*const Feature { + &feature_ptx40, + &feature_sm_32, + }, +}; + +pub const cpu_sm_35 = Cpu{ + .name = "sm_35", + .llvm_name = "sm_35", + .subfeatures = &[_]*const Feature { + &feature_sm_35, + }, +}; + +pub const cpu_sm_37 = Cpu{ + .name = "sm_37", + .llvm_name = "sm_37", + .subfeatures = &[_]*const Feature { + &feature_ptx41, + &feature_sm_37, + }, +}; + +pub const cpu_sm_50 = Cpu{ + .name = "sm_50", + .llvm_name = "sm_50", + .subfeatures = &[_]*const Feature { + &feature_ptx40, + &feature_sm_50, + }, +}; + +pub const cpu_sm_52 = Cpu{ + .name = "sm_52", + .llvm_name = "sm_52", + .subfeatures = &[_]*const Feature { + &feature_ptx41, + &feature_sm_52, + }, +}; + +pub const cpu_sm_53 = Cpu{ + .name = "sm_53", + .llvm_name = "sm_53", + .subfeatures = &[_]*const Feature { + &feature_ptx42, + &feature_sm_53, + }, +}; + +pub const cpu_sm_60 = Cpu{ + .name = "sm_60", + .llvm_name = "sm_60", + .subfeatures = &[_]*const Feature { + &feature_ptx50, + &feature_sm_60, + }, +}; + +pub const cpu_sm_61 = Cpu{ + .name = "sm_61", + .llvm_name = "sm_61", + .subfeatures = &[_]*const Feature { + &feature_ptx50, + &feature_sm_61, + }, +}; + +pub const cpu_sm_62 = Cpu{ + .name = "sm_62", + .llvm_name = "sm_62", + .subfeatures = &[_]*const Feature { + &feature_ptx50, + &feature_sm_62, + }, +}; + +pub const cpu_sm_70 = Cpu{ + .name = "sm_70", + .llvm_name = "sm_70", + .subfeatures = &[_]*const Feature { + &feature_ptx60, + &feature_sm_70, + }, +}; + +pub const cpu_sm_72 = Cpu{ + .name = "sm_72", + .llvm_name = "sm_72", + .subfeatures = &[_]*const Feature { + &feature_ptx61, + &feature_sm_72, + }, +}; + +pub const cpu_sm_75 = Cpu{ + .name = "sm_75", + .llvm_name = "sm_75", + .subfeatures = &[_]*const Feature { + &feature_ptx63, + &feature_sm_75, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_sm_20, + &cpu_sm_21, + &cpu_sm_30, + &cpu_sm_32, + &cpu_sm_35, + &cpu_sm_37, + &cpu_sm_50, + &cpu_sm_52, + &cpu_sm_53, + &cpu_sm_60, + &cpu_sm_61, + &cpu_sm_62, + &cpu_sm_70, + &cpu_sm_72, + &cpu_sm_75, +}; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig new file mode 100644 index 0000000000000000000000000000000000000000..49f92cdc1a445651b1adf2ef92c7d39a99a9ff9b --- /dev/null +++ b/lib/std/target/powerpc.zig @@ -0,0 +1,1115 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_bit64 = Feature{ + .name = "64bit", + .description = "Enable 64-bit instructions", + .llvm_name = "64bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bitregs64 = Feature{ + .name = "64bitregs", + .description = "Enable 64-bit registers usage for ppc32 [beta]", + .llvm_name = "64bitregs", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_altivec = Feature{ + .name = "altivec", + .description = "Enable Altivec instructions", + .llvm_name = "altivec", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_bpermd = Feature{ + .name = "bpermd", + .description = "Enable the bpermd instruction", + .llvm_name = "bpermd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_booke = Feature{ + .name = "booke", + .description = "Enable Book E instructions", + .llvm_name = "booke", + .subfeatures = &[_]*const Feature { + &feature_icbt, + }, +}; + +pub const feature_cmpb = Feature{ + .name = "cmpb", + .description = "Enable the cmpb instruction", + .llvm_name = "cmpb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_crbits = Feature{ + .name = "crbits", + .description = "Use condition-register bits individually", + .llvm_name = "crbits", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_directMove = Feature{ + .name = "direct-move", + .description = "Enable Power8 direct move instructions", + .llvm_name = "direct-move", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_e500 = Feature{ + .name = "e500", + .description = "Enable E500/E500mc instructions", + .llvm_name = "e500", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_extdiv = Feature{ + .name = "extdiv", + .description = "Enable extended divide instructions", + .llvm_name = "extdiv", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fcpsgn = Feature{ + .name = "fcpsgn", + .description = "Enable the fcpsgn instruction", + .llvm_name = "fcpsgn", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fpcvt = Feature{ + .name = "fpcvt", + .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", + .llvm_name = "fpcvt", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fprnd = Feature{ + .name = "fprnd", + .description = "Enable the fri[mnpz] instructions", + .llvm_name = "fprnd", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fpu = Feature{ + .name = "fpu", + .description = "Enable classic FPU instructions", + .llvm_name = "fpu", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fre = Feature{ + .name = "fre", + .description = "Enable the fre instruction", + .llvm_name = "fre", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fres = Feature{ + .name = "fres", + .description = "Enable the fres instruction", + .llvm_name = "fres", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_frsqrte = Feature{ + .name = "frsqrte", + .description = "Enable the frsqrte instruction", + .llvm_name = "frsqrte", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_frsqrtes = Feature{ + .name = "frsqrtes", + .description = "Enable the frsqrtes instruction", + .llvm_name = "frsqrtes", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fsqrt = Feature{ + .name = "fsqrt", + .description = "Enable the fsqrt instruction", + .llvm_name = "fsqrt", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_float128 = Feature{ + .name = "float128", + .description = "Enable the __float128 data type for IEEE-754R Binary128.", + .llvm_name = "float128", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_htm = Feature{ + .name = "htm", + .description = "Enable Hardware Transactional Memory instructions", + .llvm_name = "htm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hardFloat = Feature{ + .name = "hard-float", + .description = "Enable floating-point instructions", + .llvm_name = "hard-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_icbt = Feature{ + .name = "icbt", + .description = "Enable icbt instruction", + .llvm_name = "icbt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_isaV30Instructions = Feature{ + .name = "isa-v30-instructions", + .description = "Enable instructions added in ISA 3.0.", + .llvm_name = "isa-v30-instructions", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_isel = Feature{ + .name = "isel", + .description = "Enable the isel instruction", + .llvm_name = "isel", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_invariantFunctionDescriptors = Feature{ + .name = "invariant-function-descriptors", + .description = "Assume function descriptors are invariant", + .llvm_name = "invariant-function-descriptors", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ldbrx = Feature{ + .name = "ldbrx", + .description = "Enable the ldbrx instruction", + .llvm_name = "ldbrx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lfiwax = Feature{ + .name = "lfiwax", + .description = "Enable the lfiwax instruction", + .llvm_name = "lfiwax", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_longcall = Feature{ + .name = "longcall", + .description = "Always use indirect calls", + .llvm_name = "longcall", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mfocrf = Feature{ + .name = "mfocrf", + .description = "Enable the MFOCRF instruction", + .llvm_name = "mfocrf", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_msync = Feature{ + .name = "msync", + .description = "Has only the msync instruction instead of sync", + .llvm_name = "msync", + .subfeatures = &[_]*const Feature { + &feature_icbt, + }, +}; + +pub const feature_power8Altivec = Feature{ + .name = "power8-altivec", + .description = "Enable POWER8 Altivec instructions", + .llvm_name = "power8-altivec", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .description = "Enable POWER8 Crypto instructions", + .llvm_name = "crypto", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_power8Vector = Feature{ + .name = "power8-vector", + .description = "Enable POWER8 vector instructions", + .llvm_name = "power8-vector", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_power9Altivec = Feature{ + .name = "power9-altivec", + .description = "Enable POWER9 Altivec instructions", + .llvm_name = "power9-altivec", + .subfeatures = &[_]*const Feature { + &feature_isaV30Instructions, + &feature_hardFloat, + }, +}; + +pub const feature_power9Vector = Feature{ + .name = "power9-vector", + .description = "Enable POWER9 vector instructions", + .llvm_name = "power9-vector", + .subfeatures = &[_]*const Feature { + &feature_isaV30Instructions, + &feature_hardFloat, + }, +}; + +pub const feature_popcntd = Feature{ + .name = "popcntd", + .description = "Enable the popcnt[dw] instructions", + .llvm_name = "popcntd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ppc4xx = Feature{ + .name = "ppc4xx", + .description = "Enable PPC 4xx instructions", + .llvm_name = "ppc4xx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ppc6xx = Feature{ + .name = "ppc6xx", + .description = "Enable PPC 6xx instructions", + .llvm_name = "ppc6xx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ppcPostraSched = Feature{ + .name = "ppc-postra-sched", + .description = "Use PowerPC post-RA scheduling strategy", + .llvm_name = "ppc-postra-sched", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ppcPreraSched = Feature{ + .name = "ppc-prera-sched", + .description = "Use PowerPC pre-RA scheduling strategy", + .llvm_name = "ppc-prera-sched", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_partwordAtomics = Feature{ + .name = "partword-atomics", + .description = "Enable l[bh]arx and st[bh]cx.", + .llvm_name = "partword-atomics", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_qpx = Feature{ + .name = "qpx", + .description = "Enable QPX instructions", + .llvm_name = "qpx", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_recipprec = Feature{ + .name = "recipprec", + .description = "Assume higher precision reciprocal estimates", + .llvm_name = "recipprec", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_spe = Feature{ + .name = "spe", + .description = "Enable SPE instructions", + .llvm_name = "spe", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_stfiwx = Feature{ + .name = "stfiwx", + .description = "Enable the stfiwx instruction", + .llvm_name = "stfiwx", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_securePlt = Feature{ + .name = "secure-plt", + .description = "Enable secure plt mode", + .llvm_name = "secure-plt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowPopcntd = Feature{ + .name = "slow-popcntd", + .description = "Has slow popcnt[dw] instructions", + .llvm_name = "slow-popcntd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_twoConstNr = Feature{ + .name = "two-const-nr", + .description = "Requires two constant Newton-Raphson computation", + .llvm_name = "two-const-nr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vsx = Feature{ + .name = "vsx", + .description = "Enable VSX instructions", + .llvm_name = "vsx", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_vectorsUseTwoUnits = Feature{ + .name = "vectors-use-two-units", + .description = "Vectors use two units", + .llvm_name = "vectors-use-two-units", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_bit64, + &feature_bitregs64, + &feature_altivec, + &feature_bpermd, + &feature_booke, + &feature_cmpb, + &feature_crbits, + &feature_directMove, + &feature_e500, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fpu, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_float128, + &feature_htm, + &feature_hardFloat, + &feature_icbt, + &feature_isaV30Instructions, + &feature_isel, + &feature_invariantFunctionDescriptors, + &feature_ldbrx, + &feature_lfiwax, + &feature_longcall, + &feature_mfocrf, + &feature_msync, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_power9Altivec, + &feature_power9Vector, + &feature_popcntd, + &feature_ppc4xx, + &feature_ppc6xx, + &feature_ppcPostraSched, + &feature_ppcPreraSched, + &feature_partwordAtomics, + &feature_qpx, + &feature_recipprec, + &feature_spe, + &feature_stfiwx, + &feature_securePlt, + &feature_slowPopcntd, + &feature_twoConstNr, + &feature_vsx, + &feature_vectorsUseTwoUnits, +}; + +pub const cpu_440 = Cpu{ + .name = "440", + .llvm_name = "440", + .subfeatures = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + &feature_isel, + &feature_msync, + }, +}; + +pub const cpu_450 = Cpu{ + .name = "450", + .llvm_name = "450", + .subfeatures = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + &feature_isel, + &feature_msync, + }, +}; + +pub const cpu_601 = Cpu{ + .name = "601", + .llvm_name = "601", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fpu, + }, +}; + +pub const cpu_602 = Cpu{ + .name = "602", + .llvm_name = "602", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fpu, + }, +}; + +pub const cpu_603 = Cpu{ + .name = "603", + .llvm_name = "603", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_e603 = Cpu{ + .name = "603e", + .llvm_name = "603e", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_ev603 = Cpu{ + .name = "603ev", + .llvm_name = "603ev", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_604 = Cpu{ + .name = "604", + .llvm_name = "604", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_e604 = Cpu{ + .name = "604e", + .llvm_name = "604e", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_620 = Cpu{ + .name = "620", + .llvm_name = "620", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_7400 = Cpu{ + .name = "7400", + .llvm_name = "7400", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_7450 = Cpu{ + .name = "7450", + .llvm_name = "7450", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_750 = Cpu{ + .name = "750", + .llvm_name = "750", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_970 = Cpu{ + .name = "970", + .llvm_name = "970", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_a2 = Cpu{ + .name = "a2", + .llvm_name = "a2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_cmpb, + &feature_hardFloat, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + &feature_slowPopcntd, + }, +}; + +pub const cpu_a2q = Cpu{ + .name = "a2q", + .llvm_name = "a2q", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_cmpb, + &feature_hardFloat, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_qpx, + &feature_recipprec, + &feature_stfiwx, + &feature_slowPopcntd, + }, +}; + +pub const cpu_e500 = Cpu{ + .name = "e500", + .llvm_name = "e500", + .subfeatures = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_isel, + }, +}; + +pub const cpu_e500mc = Cpu{ + .name = "e500mc", + .llvm_name = "e500mc", + .subfeatures = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_isel, + &feature_hardFloat, + &feature_stfiwx, + }, +}; + +pub const cpu_e5500 = Cpu{ + .name = "e5500", + .llvm_name = "e5500", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_isel, + &feature_mfocrf, + &feature_hardFloat, + &feature_stfiwx, + }, +}; + +pub const cpu_g3 = Cpu{ + .name = "g3", + .llvm_name = "g3", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g4 = Cpu{ + .name = "g4", + .llvm_name = "g4", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g4Plus = Cpu{ + .name = "g4+", + .llvm_name = "g4+", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g5 = Cpu{ + .name = "g5", + .llvm_name = "g5", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc = Cpu{ + .name = "ppc", + .llvm_name = "ppc", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc32 = Cpu{ + .name = "ppc32", + .llvm_name = "ppc32", + .subfeatures = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc64 = Cpu{ + .name = "ppc64", + .llvm_name = "ppc64", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_ppc64le = Cpu{ + .name = "ppc64le", + .llvm_name = "ppc64le", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_popcntd, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr3 = Cpu{ + .name = "pwr3", + .llvm_name = "pwr3", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr4 = Cpu{ + .name = "pwr4", + .llvm_name = "pwr4", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr5 = Cpu{ + .name = "pwr5", + .llvm_name = "pwr5", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr5x = Cpu{ + .name = "pwr5x", + .llvm_name = "pwr5x", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr6 = Cpu{ + .name = "pwr6", + .llvm_name = "pwr6", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_cmpb, + &feature_fcpsgn, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr6x = Cpu{ + .name = "pwr6x", + .llvm_name = "pwr6x", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_cmpb, + &feature_fcpsgn, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr7 = Cpu{ + .name = "pwr7", + .llvm_name = "pwr7", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_popcntd, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr8 = Cpu{ + .name = "pwr8", + .llvm_name = "pwr8", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_popcntd, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr9 = Cpu{ + .name = "pwr9", + .llvm_name = "pwr9", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isaV30Instructions, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_power9Altivec, + &feature_power9Vector, + &feature_popcntd, + &feature_ppcPostraSched, + &feature_ppcPreraSched, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + &feature_vectorsUseTwoUnits, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_440, + &cpu_450, + &cpu_601, + &cpu_602, + &cpu_603, + &cpu_e603, + &cpu_ev603, + &cpu_604, + &cpu_e604, + &cpu_620, + &cpu_7400, + &cpu_7450, + &cpu_750, + &cpu_970, + &cpu_a2, + &cpu_a2q, + &cpu_e500, + &cpu_e500mc, + &cpu_e5500, + &cpu_g3, + &cpu_g4, + &cpu_g4Plus, + &cpu_g5, + &cpu_generic, + &cpu_ppc, + &cpu_ppc32, + &cpu_ppc64, + &cpu_ppc64le, + &cpu_pwr3, + &cpu_pwr4, + &cpu_pwr5, + &cpu_pwr5x, + &cpu_pwr6, + &cpu_pwr6x, + &cpu_pwr7, + &cpu_pwr8, + &cpu_pwr9, +}; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig new file mode 100644 index 0000000000000000000000000000000000000000..6ed1012f215c8ac557ca2660f1460e1c160aa752 --- /dev/null +++ b/lib/std/target/riscv.zig @@ -0,0 +1,109 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_bit64 = Feature{ + .name = "64bit", + .description = "Implements RV64", + .llvm_name = "64bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_e = Feature{ + .name = "e", + .description = "Implements RV32E (provides 16 rather than 32 GPRs)", + .llvm_name = "e", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rvcHints = Feature{ + .name = "rvc-hints", + .description = "Enable RVC Hint Instructions.", + .llvm_name = "rvc-hints", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_relax = Feature{ + .name = "relax", + .description = "Enable Linker relaxation.", + .llvm_name = "relax", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_a = Feature{ + .name = "a", + .description = "'A' (Atomic Instructions)", + .llvm_name = "a", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_c = Feature{ + .name = "c", + .description = "'C' (Compressed Instructions)", + .llvm_name = "c", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_d = Feature{ + .name = "d", + .description = "'D' (Double-Precision Floating-Point)", + .llvm_name = "d", + .subfeatures = &[_]*const Feature { + &feature_f, + }, +}; + +pub const feature_f = Feature{ + .name = "f", + .description = "'F' (Single-Precision Floating-Point)", + .llvm_name = "f", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_m = Feature{ + .name = "m", + .description = "'M' (Integer Multiplication and Division)", + .llvm_name = "m", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_bit64, + &feature_e, + &feature_rvcHints, + &feature_relax, + &feature_a, + &feature_c, + &feature_d, + &feature_f, + &feature_m, +}; + +pub const cpu_genericRv32 = Cpu{ + .name = "generic-rv32", + .llvm_name = "generic-rv32", + .subfeatures = &[_]*const Feature { + &feature_rvcHints, + }, +}; + +pub const cpu_genericRv64 = Cpu{ + .name = "generic-rv64", + .llvm_name = "generic-rv64", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_rvcHints, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_genericRv32, + &cpu_genericRv64, +}; diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig new file mode 100644 index 0000000000000000000000000000000000000000..69c6208b2a086dd45538584524b025e863df7700 --- /dev/null +++ b/lib/std/target/sparc.zig @@ -0,0 +1,581 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_detectroundchange = Feature{ + .name = "detectroundchange", + .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", + .llvm_name = "detectroundchange", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hardQuadFloat = Feature{ + .name = "hard-quad-float", + .description = "Enable quad-word floating point instructions", + .llvm_name = "hard-quad-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_leon = Feature{ + .name = "leon", + .description = "Enable LEON extensions", + .llvm_name = "leon", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noFmuls = Feature{ + .name = "no-fmuls", + .description = "Disable the fmuls instruction.", + .llvm_name = "no-fmuls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_noFsmuld = Feature{ + .name = "no-fsmuld", + .description = "Disable the fsmuld instruction.", + .llvm_name = "no-fsmuld", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_leonpwrpsr = Feature{ + .name = "leonpwrpsr", + .description = "Enable the PWRPSR instruction", + .llvm_name = "leonpwrpsr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "soft-float", + .description = "Use software emulation for floating point", + .llvm_name = "soft-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_softMulDiv = Feature{ + .name = "soft-mul-div", + .description = "Use software emulation for integer multiply and divide", + .llvm_name = "soft-mul-div", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_deprecatedV8 = Feature{ + .name = "deprecated-v8", + .description = "Enable deprecated V8 instructions in V9 mode", + .llvm_name = "deprecated-v8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_v9 = Feature{ + .name = "v9", + .description = "Enable SPARC-V9 instructions", + .llvm_name = "v9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vis = Feature{ + .name = "vis", + .description = "Enable UltraSPARC Visual Instruction Set extensions", + .llvm_name = "vis", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vis2 = Feature{ + .name = "vis2", + .description = "Enable Visual Instruction Set extensions II", + .llvm_name = "vis2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vis3 = Feature{ + .name = "vis3", + .description = "Enable Visual Instruction Set extensions III", + .llvm_name = "vis3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fixallfdivsqrt = Feature{ + .name = "fixallfdivsqrt", + .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", + .llvm_name = "fixallfdivsqrt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_insertnopload = Feature{ + .name = "insertnopload", + .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", + .llvm_name = "insertnopload", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hasleoncasa = Feature{ + .name = "hasleoncasa", + .description = "Enable CASA instruction for LEON3 and LEON4 processors", + .llvm_name = "hasleoncasa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_leoncyclecounter = Feature{ + .name = "leoncyclecounter", + .description = "Use the Leon cycle counter register", + .llvm_name = "leoncyclecounter", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_hasumacsmac = Feature{ + .name = "hasumacsmac", + .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", + .llvm_name = "hasumacsmac", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_popc = Feature{ + .name = "popc", + .description = "Use the popc (population count) instruction", + .llvm_name = "popc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_detectroundchange, + &feature_hardQuadFloat, + &feature_leon, + &feature_noFmuls, + &feature_noFsmuld, + &feature_leonpwrpsr, + &feature_softFloat, + &feature_softMulDiv, + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_vis3, + &feature_fixallfdivsqrt, + &feature_insertnopload, + &feature_hasleoncasa, + &feature_leoncyclecounter, + &feature_hasumacsmac, + &feature_popc, +}; + +pub const cpu_at697e = Cpu{ + .name = "at697e", + .llvm_name = "at697e", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_insertnopload, + }, +}; + +pub const cpu_at697f = Cpu{ + .name = "at697f", + .llvm_name = "at697f", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_insertnopload, + }, +}; + +pub const cpu_f934 = Cpu{ + .name = "f934", + .llvm_name = "f934", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_gr712rc = Cpu{ + .name = "gr712rc", + .llvm_name = "gr712rc", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_gr740 = Cpu{ + .name = "gr740", + .llvm_name = "gr740", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_leonpwrpsr, + &feature_hasleoncasa, + &feature_leoncyclecounter, + &feature_hasumacsmac, + }, +}; + +pub const cpu_hypersparc = Cpu{ + .name = "hypersparc", + .llvm_name = "hypersparc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_leon2 = Cpu{ + .name = "leon2", + .llvm_name = "leon2", + .subfeatures = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_leon3 = Cpu{ + .name = "leon3", + .llvm_name = "leon3", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasumacsmac, + }, +}; + +pub const cpu_leon4 = Cpu{ + .name = "leon4", + .llvm_name = "leon4", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + &feature_hasumacsmac, + }, +}; + +pub const cpu_ma2080 = Cpu{ + .name = "ma2080", + .llvm_name = "ma2080", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2085 = Cpu{ + .name = "ma2085", + .llvm_name = "ma2085", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2100 = Cpu{ + .name = "ma2100", + .llvm_name = "ma2100", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2150 = Cpu{ + .name = "ma2150", + .llvm_name = "ma2150", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2155 = Cpu{ + .name = "ma2155", + .llvm_name = "ma2155", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2450 = Cpu{ + .name = "ma2450", + .llvm_name = "ma2450", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2455 = Cpu{ + .name = "ma2455", + .llvm_name = "ma2455", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2480 = Cpu{ + .name = "ma2480", + .llvm_name = "ma2480", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2485 = Cpu{ + .name = "ma2485", + .llvm_name = "ma2485", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2x5x = Cpu{ + .name = "ma2x5x", + .llvm_name = "ma2x5x", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_ma2x8x = Cpu{ + .name = "ma2x8x", + .llvm_name = "ma2x8x", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_myriad2 = Cpu{ + .name = "myriad2", + .llvm_name = "myriad2", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_myriad21 = Cpu{ + .name = "myriad2.1", + .llvm_name = "myriad2.1", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_myriad22 = Cpu{ + .name = "myriad2.2", + .llvm_name = "myriad2.2", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_myriad23 = Cpu{ + .name = "myriad2.3", + .llvm_name = "myriad2.3", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_hasleoncasa, + }, +}; + +pub const cpu_niagara = Cpu{ + .name = "niagara", + .llvm_name = "niagara", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_niagara2 = Cpu{ + .name = "niagara2", + .llvm_name = "niagara2", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_popc, + }, +}; + +pub const cpu_niagara3 = Cpu{ + .name = "niagara3", + .llvm_name = "niagara3", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_popc, + }, +}; + +pub const cpu_niagara4 = Cpu{ + .name = "niagara4", + .llvm_name = "niagara4", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_vis3, + &feature_popc, + }, +}; + +pub const cpu_sparclet = Cpu{ + .name = "sparclet", + .llvm_name = "sparclet", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_sparclite = Cpu{ + .name = "sparclite", + .llvm_name = "sparclite", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_sparclite86x = Cpu{ + .name = "sparclite86x", + .llvm_name = "sparclite86x", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_supersparc = Cpu{ + .name = "supersparc", + .llvm_name = "supersparc", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_tsc701 = Cpu{ + .name = "tsc701", + .llvm_name = "tsc701", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_ultrasparc = Cpu{ + .name = "ultrasparc", + .llvm_name = "ultrasparc", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + }, +}; + +pub const cpu_ultrasparc3 = Cpu{ + .name = "ultrasparc3", + .llvm_name = "ultrasparc3", + .subfeatures = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_ut699 = Cpu{ + .name = "ut699", + .llvm_name = "ut699", + .subfeatures = &[_]*const Feature { + &feature_leon, + &feature_noFmuls, + &feature_noFsmuld, + &feature_fixallfdivsqrt, + &feature_insertnopload, + }, +}; + +pub const cpu_v7 = Cpu{ + .name = "v7", + .llvm_name = "v7", + .subfeatures = &[_]*const Feature { + &feature_noFsmuld, + &feature_softMulDiv, + }, +}; + +pub const cpu_v8 = Cpu{ + .name = "v8", + .llvm_name = "v8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_v9 = Cpu{ + .name = "v9", + .llvm_name = "v9", + .subfeatures = &[_]*const Feature { + &feature_v9, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_at697e, + &cpu_at697f, + &cpu_f934, + &cpu_generic, + &cpu_gr712rc, + &cpu_gr740, + &cpu_hypersparc, + &cpu_leon2, + &cpu_leon3, + &cpu_leon4, + &cpu_ma2080, + &cpu_ma2085, + &cpu_ma2100, + &cpu_ma2150, + &cpu_ma2155, + &cpu_ma2450, + &cpu_ma2455, + &cpu_ma2480, + &cpu_ma2485, + &cpu_ma2x5x, + &cpu_ma2x8x, + &cpu_myriad2, + &cpu_myriad21, + &cpu_myriad22, + &cpu_myriad23, + &cpu_niagara, + &cpu_niagara2, + &cpu_niagara3, + &cpu_niagara4, + &cpu_sparclet, + &cpu_sparclite, + &cpu_sparclite86x, + &cpu_supersparc, + &cpu_tsc701, + &cpu_ultrasparc, + &cpu_ultrasparc3, + &cpu_ut699, + &cpu_v7, + &cpu_v8, + &cpu_v9, +}; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig new file mode 100644 index 0000000000000000000000000000000000000000..03fb49ca5530e30fbf668612687aa0dbce3399c0 --- /dev/null +++ b/lib/std/target/systemz.zig @@ -0,0 +1,653 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_dfpPackedConversion = Feature{ + .name = "dfp-packed-conversion", + .description = "Assume that the DFP packed-conversion facility is installed", + .llvm_name = "dfp-packed-conversion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_dfpZonedConversion = Feature{ + .name = "dfp-zoned-conversion", + .description = "Assume that the DFP zoned-conversion facility is installed", + .llvm_name = "dfp-zoned-conversion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_deflateConversion = Feature{ + .name = "deflate-conversion", + .description = "Assume that the deflate-conversion facility is installed", + .llvm_name = "deflate-conversion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_distinctOps = Feature{ + .name = "distinct-ops", + .description = "Assume that the distinct-operands facility is installed", + .llvm_name = "distinct-ops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_enhancedDat2 = Feature{ + .name = "enhanced-dat-2", + .description = "Assume that the enhanced-DAT facility 2 is installed", + .llvm_name = "enhanced-dat-2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_enhancedSort = Feature{ + .name = "enhanced-sort", + .description = "Assume that the enhanced-sort facility is installed", + .llvm_name = "enhanced-sort", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_executionHint = Feature{ + .name = "execution-hint", + .description = "Assume that the execution-hint facility is installed", + .llvm_name = "execution-hint", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fpExtension = Feature{ + .name = "fp-extension", + .description = "Assume that the floating-point extension facility is installed", + .llvm_name = "fp-extension", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastSerialization = Feature{ + .name = "fast-serialization", + .description = "Assume that the fast-serialization facility is installed", + .llvm_name = "fast-serialization", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_guardedStorage = Feature{ + .name = "guarded-storage", + .description = "Assume that the guarded-storage facility is installed", + .llvm_name = "guarded-storage", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_highWord = Feature{ + .name = "high-word", + .description = "Assume that the high-word facility is installed", + .llvm_name = "high-word", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_insertReferenceBitsMultiple = Feature{ + .name = "insert-reference-bits-multiple", + .description = "Assume that the insert-reference-bits-multiple facility is installed", + .llvm_name = "insert-reference-bits-multiple", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_interlockedAccess1 = Feature{ + .name = "interlocked-access1", + .description = "Assume that interlocked-access facility 1 is installed", + .llvm_name = "interlocked-access1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loadAndTrap = Feature{ + .name = "load-and-trap", + .description = "Assume that the load-and-trap facility is installed", + .llvm_name = "load-and-trap", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loadAndZeroRightmostByte = Feature{ + .name = "load-and-zero-rightmost-byte", + .description = "Assume that the load-and-zero-rightmost-byte facility is installed", + .llvm_name = "load-and-zero-rightmost-byte", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOnCond = Feature{ + .name = "load-store-on-cond", + .description = "Assume that the load/store-on-condition facility is installed", + .llvm_name = "load-store-on-cond", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOnCond2 = Feature{ + .name = "load-store-on-cond-2", + .description = "Assume that the load/store-on-condition facility 2 is installed", + .llvm_name = "load-store-on-cond-2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension3 = Feature{ + .name = "message-security-assist-extension3", + .description = "Assume that the message-security-assist extension facility 3 is installed", + .llvm_name = "message-security-assist-extension3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension4 = Feature{ + .name = "message-security-assist-extension4", + .description = "Assume that the message-security-assist extension facility 4 is installed", + .llvm_name = "message-security-assist-extension4", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension5 = Feature{ + .name = "message-security-assist-extension5", + .description = "Assume that the message-security-assist extension facility 5 is installed", + .llvm_name = "message-security-assist-extension5", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension7 = Feature{ + .name = "message-security-assist-extension7", + .description = "Assume that the message-security-assist extension facility 7 is installed", + .llvm_name = "message-security-assist-extension7", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension8 = Feature{ + .name = "message-security-assist-extension8", + .description = "Assume that the message-security-assist extension facility 8 is installed", + .llvm_name = "message-security-assist-extension8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension9 = Feature{ + .name = "message-security-assist-extension9", + .description = "Assume that the message-security-assist extension facility 9 is installed", + .llvm_name = "message-security-assist-extension9", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions = Feature{ + .name = "miscellaneous-extensions", + .description = "Assume that the miscellaneous-extensions facility is installed", + .llvm_name = "miscellaneous-extensions", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions2 = Feature{ + .name = "miscellaneous-extensions-2", + .description = "Assume that the miscellaneous-extensions facility 2 is installed", + .llvm_name = "miscellaneous-extensions-2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions3 = Feature{ + .name = "miscellaneous-extensions-3", + .description = "Assume that the miscellaneous-extensions facility 3 is installed", + .llvm_name = "miscellaneous-extensions-3", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_populationCount = Feature{ + .name = "population-count", + .description = "Assume that the population-count facility is installed", + .llvm_name = "population-count", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_processorAssist = Feature{ + .name = "processor-assist", + .description = "Assume that the processor-assist facility is installed", + .llvm_name = "processor-assist", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_resetReferenceBitsMultiple = Feature{ + .name = "reset-reference-bits-multiple", + .description = "Assume that the reset-reference-bits-multiple facility is installed", + .llvm_name = "reset-reference-bits-multiple", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_transactionalExecution = Feature{ + .name = "transactional-execution", + .description = "Assume that the transactional-execution facility is installed", + .llvm_name = "transactional-execution", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vector = Feature{ + .name = "vector", + .description = "Assume that the vectory facility is installed", + .llvm_name = "vector", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vectorEnhancements1 = Feature{ + .name = "vector-enhancements-1", + .description = "Assume that the vector enhancements facility 1 is installed", + .llvm_name = "vector-enhancements-1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vectorEnhancements2 = Feature{ + .name = "vector-enhancements-2", + .description = "Assume that the vector enhancements facility 2 is installed", + .llvm_name = "vector-enhancements-2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vectorPackedDecimal = Feature{ + .name = "vector-packed-decimal", + .description = "Assume that the vector packed decimal facility is installed", + .llvm_name = "vector-packed-decimal", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vectorPackedDecimalEnhancement = Feature{ + .name = "vector-packed-decimal-enhancement", + .description = "Assume that the vector packed decimal enhancement facility is installed", + .llvm_name = "vector-packed-decimal-enhancement", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_deflateConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_enhancedSort, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_messageSecurityAssistExtension9, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_miscellaneousExtensions3, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorEnhancements2, + &feature_vectorPackedDecimal, + &feature_vectorPackedDecimalEnhancement, +}; + +pub const cpu_arch10 = Cpu{ + .name = "arch10", + .llvm_name = "arch10", + .subfeatures = &[_]*const Feature { + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + }, +}; + +pub const cpu_arch11 = Cpu{ + .name = "arch11", + .llvm_name = "arch11", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + }, +}; + +pub const cpu_arch12 = Cpu{ + .name = "arch12", + .llvm_name = "arch12", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorPackedDecimal, + }, +}; + +pub const cpu_arch13 = Cpu{ + .name = "arch13", + .llvm_name = "arch13", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_deflateConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_enhancedSort, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_messageSecurityAssistExtension9, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_miscellaneousExtensions3, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorEnhancements2, + &feature_vectorPackedDecimal, + &feature_vectorPackedDecimalEnhancement, + }, +}; + +pub const cpu_arch8 = Cpu{ + .name = "arch8", + .llvm_name = "arch8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_arch9 = Cpu{ + .name = "arch9", + .llvm_name = "arch9", + .subfeatures = &[_]*const Feature { + &feature_distinctOps, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_populationCount, + &feature_resetReferenceBitsMultiple, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_z10 = Cpu{ + .name = "z10", + .llvm_name = "z10", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_z13 = Cpu{ + .name = "z13", + .llvm_name = "z13", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + }, +}; + +pub const cpu_z14 = Cpu{ + .name = "z14", + .llvm_name = "z14", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorPackedDecimal, + }, +}; + +pub const cpu_z15 = Cpu{ + .name = "z15", + .llvm_name = "z15", + .subfeatures = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_deflateConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_enhancedSort, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_messageSecurityAssistExtension9, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_miscellaneousExtensions3, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorEnhancements2, + &feature_vectorPackedDecimal, + &feature_vectorPackedDecimalEnhancement, + }, +}; + +pub const cpu_z196 = Cpu{ + .name = "z196", + .llvm_name = "z196", + .subfeatures = &[_]*const Feature { + &feature_distinctOps, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_populationCount, + &feature_resetReferenceBitsMultiple, + }, +}; + +pub const cpu_zEC12 = Cpu{ + .name = "zEC12", + .llvm_name = "zEC12", + .subfeatures = &[_]*const Feature { + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_arch10, + &cpu_arch11, + &cpu_arch12, + &cpu_arch13, + &cpu_arch8, + &cpu_arch9, + &cpu_generic, + &cpu_z10, + &cpu_z13, + &cpu_z14, + &cpu_z15, + &cpu_z196, + &cpu_zEC12, +}; diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig new file mode 100644 index 0000000000000000000000000000000000000000..ba41b622a469aa9f906a4b462e87f3499cbfef30 --- /dev/null +++ b/lib/std/target/wasm.zig @@ -0,0 +1,128 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_atomics = Feature{ + .name = "atomics", + .description = "Enable Atomics", + .llvm_name = "atomics", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bulkMemory = Feature{ + .name = "bulk-memory", + .description = "Enable bulk memory operations", + .llvm_name = "bulk-memory", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_exceptionHandling = Feature{ + .name = "exception-handling", + .description = "Enable Wasm exception handling", + .llvm_name = "exception-handling", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_multivalue = Feature{ + .name = "multivalue", + .description = "Enable multivalue blocks, instructions, and functions", + .llvm_name = "multivalue", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mutableGlobals = Feature{ + .name = "mutable-globals", + .description = "Enable mutable globals", + .llvm_name = "mutable-globals", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nontrappingFptoint = Feature{ + .name = "nontrapping-fptoint", + .description = "Enable non-trapping float-to-int conversion operators", + .llvm_name = "nontrapping-fptoint", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_simd128 = Feature{ + .name = "simd128", + .description = "Enable 128-bit SIMD", + .llvm_name = "simd128", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_signExt = Feature{ + .name = "sign-ext", + .description = "Enable sign extension operators", + .llvm_name = "sign-ext", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tailCall = Feature{ + .name = "tail-call", + .description = "Enable tail call instructions", + .llvm_name = "tail-call", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_unimplementedSimd128 = Feature{ + .name = "unimplemented-simd128", + .description = "Enable 128-bit SIMD not yet implemented in engines", + .llvm_name = "unimplemented-simd128", + .subfeatures = &[_]*const Feature { + &feature_simd128, + }, +}; + +pub const features = &[_]*const Feature { + &feature_atomics, + &feature_bulkMemory, + &feature_exceptionHandling, + &feature_multivalue, + &feature_mutableGlobals, + &feature_nontrappingFptoint, + &feature_simd128, + &feature_signExt, + &feature_tailCall, + &feature_unimplementedSimd128, +}; + +pub const cpu_bleedingEdge = Cpu{ + .name = "bleeding-edge", + .llvm_name = "bleeding-edge", + .subfeatures = &[_]*const Feature { + &feature_atomics, + &feature_mutableGlobals, + &feature_nontrappingFptoint, + &feature_simd128, + &feature_signExt, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_mvp = Cpu{ + .name = "mvp", + .llvm_name = "mvp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_bleedingEdge, + &cpu_generic, + &cpu_mvp, +}; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig new file mode 100644 index 0000000000000000000000000000000000000000..c6497112bb884777e1e4f19e32ae152091eee090 --- /dev/null +++ b/lib/std/target/x86.zig @@ -0,0 +1,3427 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_dnow3 = Feature{ + .name = "3dnow", + .description = "Enable 3DNow! instructions", + .llvm_name = "3dnow", + .subfeatures = &[_]*const Feature { + &feature_mmx, + }, +}; + +pub const feature_dnowa3 = Feature{ + .name = "3dnowa", + .description = "Enable 3DNow! Athlon instructions", + .llvm_name = "3dnowa", + .subfeatures = &[_]*const Feature { + &feature_mmx, + }, +}; + +pub const feature_bit64 = Feature{ + .name = "64bit", + .description = "Support 64-bit instructions", + .llvm_name = "64bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_adx = Feature{ + .name = "adx", + .description = "Support ADX instructions", + .llvm_name = "adx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_aes = Feature{ + .name = "aes", + .description = "Enable AES instructions", + .llvm_name = "aes", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx = Feature{ + .name = "avx", + .description = "Enable AVX instructions", + .llvm_name = "avx", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx2 = Feature{ + .name = "avx2", + .description = "Enable AVX2 instructions", + .llvm_name = "avx2", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512f = Feature{ + .name = "avx512f", + .description = "Enable AVX-512 instructions", + .llvm_name = "avx512f", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512bf16 = Feature{ + .name = "avx512bf16", + .description = "Support bfloat16 floating point", + .llvm_name = "avx512bf16", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512bitalg = Feature{ + .name = "avx512bitalg", + .description = "Enable AVX-512 Bit Algorithms", + .llvm_name = "avx512bitalg", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_bmi = Feature{ + .name = "bmi", + .description = "Support BMI instructions", + .llvm_name = "bmi", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bmi2 = Feature{ + .name = "bmi2", + .description = "Support BMI2 instructions", + .llvm_name = "bmi2", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avx512bw = Feature{ + .name = "avx512bw", + .description = "Enable AVX-512 Byte and Word Instructions", + .llvm_name = "avx512bw", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_branchfusion = Feature{ + .name = "branchfusion", + .description = "CMP/TEST can be fused with conditional branches", + .llvm_name = "branchfusion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avx512cd = Feature{ + .name = "avx512cd", + .description = "Enable AVX-512 Conflict Detection Instructions", + .llvm_name = "avx512cd", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_cldemote = Feature{ + .name = "cldemote", + .description = "Enable Cache Demote", + .llvm_name = "cldemote", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_clflushopt = Feature{ + .name = "clflushopt", + .description = "Flush A Cache Line Optimized", + .llvm_name = "clflushopt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_clwb = Feature{ + .name = "clwb", + .description = "Cache Line Write Back", + .llvm_name = "clwb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_clzero = Feature{ + .name = "clzero", + .description = "Enable Cache Line Zero", + .llvm_name = "clzero", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cmov = Feature{ + .name = "cmov", + .description = "Enable conditional move instructions", + .llvm_name = "cmov", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cx8 = Feature{ + .name = "cx8", + .description = "Support CMPXCHG8B instructions", + .llvm_name = "cx8", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_cx16 = Feature{ + .name = "cx16", + .description = "64-bit with cmpxchg16b", + .llvm_name = "cx16", + .subfeatures = &[_]*const Feature { + &feature_cx8, + }, +}; + +pub const feature_avx512dq = Feature{ + .name = "avx512dq", + .description = "Enable AVX-512 Doubleword and Quadword Instructions", + .llvm_name = "avx512dq", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_mpx = Feature{ + .name = "mpx", + .description = "Deprecated. Support MPX instructions", + .llvm_name = "mpx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_enqcmd = Feature{ + .name = "enqcmd", + .description = "Has ENQCMD instructions", + .llvm_name = "enqcmd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avx512er = Feature{ + .name = "avx512er", + .description = "Enable AVX-512 Exponential and Reciprocal Instructions", + .llvm_name = "avx512er", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_ermsb = Feature{ + .name = "ermsb", + .description = "REP MOVS/STOS are fast", + .llvm_name = "ermsb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_f16c = Feature{ + .name = "f16c", + .description = "Support 16-bit floating point conversion instructions", + .llvm_name = "f16c", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fma = Feature{ + .name = "fma", + .description = "Enable three-operand fused multiple-add", + .llvm_name = "fma", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fma4 = Feature{ + .name = "fma4", + .description = "Enable four-operand fused multiple-add", + .llvm_name = "fma4", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fsgsbase = Feature{ + .name = "fsgsbase", + .description = "Support FS/GS Base instructions", + .llvm_name = "fsgsbase", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fxsr = Feature{ + .name = "fxsr", + .description = "Support fxsave/fxrestore instructions", + .llvm_name = "fxsr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fast11bytenop = Feature{ + .name = "fast-11bytenop", + .description = "Target can quickly decode up to 11 byte NOPs", + .llvm_name = "fast-11bytenop", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fast15bytenop = Feature{ + .name = "fast-15bytenop", + .description = "Target can quickly decode up to 15 byte NOPs", + .llvm_name = "fast-15bytenop", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastBextr = Feature{ + .name = "fast-bextr", + .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", + .llvm_name = "fast-bextr", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastHops = Feature{ + .name = "fast-hops", + .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", + .llvm_name = "fast-hops", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fastLzcnt = Feature{ + .name = "fast-lzcnt", + .description = "LZCNT instructions are as fast as most simple integer ops", + .llvm_name = "fast-lzcnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastPartialYmmOrZmmWrite = Feature{ + .name = "fast-partial-ymm-or-zmm-write", + .description = "Partial writes to YMM/ZMM registers are fast", + .llvm_name = "fast-partial-ymm-or-zmm-write", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastShldRotate = Feature{ + .name = "fast-shld-rotate", + .description = "SHLD can be used as a faster rotate", + .llvm_name = "fast-shld-rotate", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastScalarFsqrt = Feature{ + .name = "fast-scalar-fsqrt", + .description = "Scalar SQRT is fast (disable Newton-Raphson)", + .llvm_name = "fast-scalar-fsqrt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastScalarShiftMasks = Feature{ + .name = "fast-scalar-shift-masks", + .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", + .llvm_name = "fast-scalar-shift-masks", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastVariableShuffle = Feature{ + .name = "fast-variable-shuffle", + .description = "Shuffles with variable masks are fast", + .llvm_name = "fast-variable-shuffle", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastVectorFsqrt = Feature{ + .name = "fast-vector-fsqrt", + .description = "Vector SQRT is fast (disable Newton-Raphson)", + .llvm_name = "fast-vector-fsqrt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_fastVectorShiftMasks = Feature{ + .name = "fast-vector-shift-masks", + .description = "Prefer a left/right vector logical shift pair over a shift+and pair", + .llvm_name = "fast-vector-shift-masks", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_gfni = Feature{ + .name = "gfni", + .description = "Enable Galois Field Arithmetic Instructions", + .llvm_name = "gfni", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fastGather = Feature{ + .name = "fast-gather", + .description = "Indicates if gather is reasonably fast", + .llvm_name = "fast-gather", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avx512ifma = Feature{ + .name = "avx512ifma", + .description = "Enable AVX-512 Integer Fused Multiple-Add", + .llvm_name = "avx512ifma", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_invpcid = Feature{ + .name = "invpcid", + .description = "Invalidate Process-Context Identifier", + .llvm_name = "invpcid", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sahf = Feature{ + .name = "sahf", + .description = "Support LAHF and SAHF instructions", + .llvm_name = "sahf", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_leaSp = Feature{ + .name = "lea-sp", + .description = "Use LEA for adjusting the stack pointer", + .llvm_name = "lea-sp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_leaUsesAg = Feature{ + .name = "lea-uses-ag", + .description = "LEA instruction needs inputs at AG stage", + .llvm_name = "lea-uses-ag", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lwp = Feature{ + .name = "lwp", + .description = "Enable LWP instructions", + .llvm_name = "lwp", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_lzcnt = Feature{ + .name = "lzcnt", + .description = "Support LZCNT instruction", + .llvm_name = "lzcnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_falseDepsLzcntTzcnt = Feature{ + .name = "false-deps-lzcnt-tzcnt", + .description = "LZCNT/TZCNT have a false dependency on dest register", + .llvm_name = "false-deps-lzcnt-tzcnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mmx = Feature{ + .name = "mmx", + .description = "Enable MMX instructions", + .llvm_name = "mmx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_movbe = Feature{ + .name = "movbe", + .description = "Support MOVBE instruction", + .llvm_name = "movbe", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_movdir64b = Feature{ + .name = "movdir64b", + .description = "Support movdir64b instruction", + .llvm_name = "movdir64b", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_movdiri = Feature{ + .name = "movdiri", + .description = "Support movdiri instruction", + .llvm_name = "movdiri", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mwaitx = Feature{ + .name = "mwaitx", + .description = "Enable MONITORX/MWAITX timer functionality", + .llvm_name = "mwaitx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_macrofusion = Feature{ + .name = "macrofusion", + .description = "Various instructions can be fused with conditional branches", + .llvm_name = "macrofusion", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_mergeToThreewayBranch = Feature{ + .name = "merge-to-threeway-branch", + .description = "Merge branches to a three-way conditional branch", + .llvm_name = "merge-to-threeway-branch", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_nopl = Feature{ + .name = "nopl", + .description = "Enable NOPL instruction", + .llvm_name = "nopl", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_pclmul = Feature{ + .name = "pclmul", + .description = "Enable packed carry-less multiplication instructions", + .llvm_name = "pclmul", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_pconfig = Feature{ + .name = "pconfig", + .description = "platform configuration instruction", + .llvm_name = "pconfig", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_avx512pf = Feature{ + .name = "avx512pf", + .description = "Enable AVX-512 PreFetch Instructions", + .llvm_name = "avx512pf", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_pku = Feature{ + .name = "pku", + .description = "Enable protection keys", + .llvm_name = "pku", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_popcnt = Feature{ + .name = "popcnt", + .description = "Support POPCNT instruction", + .llvm_name = "popcnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_falseDepsPopcnt = Feature{ + .name = "false-deps-popcnt", + .description = "POPCNT has a false dependency on dest register", + .llvm_name = "false-deps-popcnt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_prefetchwt1 = Feature{ + .name = "prefetchwt1", + .description = "Prefetch with Intent to Write and T1 Hint", + .llvm_name = "prefetchwt1", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_prfchw = Feature{ + .name = "prfchw", + .description = "Support PRFCHW instructions", + .llvm_name = "prfchw", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ptwrite = Feature{ + .name = "ptwrite", + .description = "Support ptwrite instruction", + .llvm_name = "ptwrite", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_padShortFunctions = Feature{ + .name = "pad-short-functions", + .description = "Pad short functions", + .llvm_name = "pad-short-functions", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_prefer128Bit = Feature{ + .name = "prefer-128-bit", + .description = "Prefer 128-bit AVX instructions", + .llvm_name = "prefer-128-bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_prefer256Bit = Feature{ + .name = "prefer-256-bit", + .description = "Prefer 256-bit AVX instructions", + .llvm_name = "prefer-256-bit", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rdpid = Feature{ + .name = "rdpid", + .description = "Support RDPID instructions", + .llvm_name = "rdpid", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rdrnd = Feature{ + .name = "rdrnd", + .description = "Support RDRAND instruction", + .llvm_name = "rdrnd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rdseed = Feature{ + .name = "rdseed", + .description = "Support RDSEED instruction", + .llvm_name = "rdseed", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_rtm = Feature{ + .name = "rtm", + .description = "Support RTM instructions", + .llvm_name = "rtm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_retpoline = Feature{ + .name = "retpoline", + .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", + .llvm_name = "retpoline", + .subfeatures = &[_]*const Feature { + &feature_retpolineIndirectCalls, + &feature_retpolineIndirectBranches, + }, +}; + +pub const feature_retpolineExternalThunk = Feature{ + .name = "retpoline-external-thunk", + .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", + .llvm_name = "retpoline-external-thunk", + .subfeatures = &[_]*const Feature { + &feature_retpolineIndirectCalls, + }, +}; + +pub const feature_retpolineIndirectBranches = Feature{ + .name = "retpoline-indirect-branches", + .description = "Remove speculation of indirect branches from the generated code", + .llvm_name = "retpoline-indirect-branches", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_retpolineIndirectCalls = Feature{ + .name = "retpoline-indirect-calls", + .description = "Remove speculation of indirect calls from the generated code", + .llvm_name = "retpoline-indirect-calls", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sgx = Feature{ + .name = "sgx", + .description = "Enable Software Guard Extensions", + .llvm_name = "sgx", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sha = Feature{ + .name = "sha", + .description = "Enable SHA instructions", + .llvm_name = "sha", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_shstk = Feature{ + .name = "shstk", + .description = "Support CET Shadow-Stack instructions", + .llvm_name = "shstk", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sse = Feature{ + .name = "sse", + .description = "Enable SSE instructions", + .llvm_name = "sse", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_sse2 = Feature{ + .name = "sse2", + .description = "Enable SSE2 instructions", + .llvm_name = "sse2", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse3 = Feature{ + .name = "sse3", + .description = "Enable SSE3 instructions", + .llvm_name = "sse3", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse4a = Feature{ + .name = "sse4a", + .description = "Support SSE 4a instructions", + .llvm_name = "sse4a", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse41 = Feature{ + .name = "sse4.1", + .description = "Enable SSE 4.1 instructions", + .llvm_name = "sse4.1", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse42 = Feature{ + .name = "sse4.2", + .description = "Enable SSE 4.2 instructions", + .llvm_name = "sse4.2", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sseUnalignedMem = Feature{ + .name = "sse-unaligned-mem", + .description = "Allow unaligned memory operands with SSE instructions", + .llvm_name = "sse-unaligned-mem", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_ssse3 = Feature{ + .name = "ssse3", + .description = "Enable SSSE3 instructions", + .llvm_name = "ssse3", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_slow3opsLea = Feature{ + .name = "slow-3ops-lea", + .description = "LEA instruction with 3 ops or certain registers is slow", + .llvm_name = "slow-3ops-lea", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_idivlToDivb = Feature{ + .name = "idivl-to-divb", + .description = "Use 8-bit divide for positive values less than 256", + .llvm_name = "idivl-to-divb", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_idivqToDivl = Feature{ + .name = "idivq-to-divl", + .description = "Use 32-bit divide for positive values less than 2^32", + .llvm_name = "idivq-to-divl", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowIncdec = Feature{ + .name = "slow-incdec", + .description = "INC and DEC instructions are slower than ADD and SUB", + .llvm_name = "slow-incdec", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowLea = Feature{ + .name = "slow-lea", + .description = "LEA instruction with certain arguments is slow", + .llvm_name = "slow-lea", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowPmaddwd = Feature{ + .name = "slow-pmaddwd", + .description = "PMADDWD is slower than PMULLD", + .llvm_name = "slow-pmaddwd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowPmulld = Feature{ + .name = "slow-pmulld", + .description = "PMULLD instruction is slow", + .llvm_name = "slow-pmulld", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowShld = Feature{ + .name = "slow-shld", + .description = "SHLD instruction is slow", + .llvm_name = "slow-shld", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowTwoMemOps = Feature{ + .name = "slow-two-mem-ops", + .description = "Two memory operand instructions are slow", + .llvm_name = "slow-two-mem-ops", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowUnalignedMem16 = Feature{ + .name = "slow-unaligned-mem-16", + .description = "Slow unaligned 16-byte memory access", + .llvm_name = "slow-unaligned-mem-16", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_slowUnalignedMem32 = Feature{ + .name = "slow-unaligned-mem-32", + .description = "Slow unaligned 32-byte memory access", + .llvm_name = "slow-unaligned-mem-32", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "soft-float", + .description = "Use software floating point features", + .llvm_name = "soft-float", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_tbm = Feature{ + .name = "tbm", + .description = "Enable TBM instructions", + .llvm_name = "tbm", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_useAa = Feature{ + .name = "use-aa", + .description = "Use alias analysis during codegen", + .llvm_name = "use-aa", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_vaes = Feature{ + .name = "vaes", + .description = "Promote selected AES instructions to AVX512/AVX registers", + .llvm_name = "vaes", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vbmi = Feature{ + .name = "avx512vbmi", + .description = "Enable AVX-512 Vector Byte Manipulation Instructions", + .llvm_name = "avx512vbmi", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vbmi2 = Feature{ + .name = "avx512vbmi2", + .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", + .llvm_name = "avx512vbmi2", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vl = Feature{ + .name = "avx512vl", + .description = "Enable AVX-512 Vector Length eXtensions", + .llvm_name = "avx512vl", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vnni = Feature{ + .name = "avx512vnni", + .description = "Enable AVX-512 Vector Neural Network Instructions", + .llvm_name = "avx512vnni", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vp2intersect = Feature{ + .name = "avx512vp2intersect", + .description = "Enable AVX-512 vp2intersect", + .llvm_name = "avx512vp2intersect", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_vpclmulqdq = Feature{ + .name = "vpclmulqdq", + .description = "Enable vpclmulqdq instructions", + .llvm_name = "vpclmulqdq", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vpopcntdq = Feature{ + .name = "avx512vpopcntdq", + .description = "Enable AVX-512 Population Count Instructions", + .llvm_name = "avx512vpopcntdq", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_waitpkg = Feature{ + .name = "waitpkg", + .description = "Wait and pause enhancements", + .llvm_name = "waitpkg", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_wbnoinvd = Feature{ + .name = "wbnoinvd", + .description = "Write Back No Invalidate", + .llvm_name = "wbnoinvd", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_x87 = Feature{ + .name = "x87", + .description = "Enable X87 float instructions", + .llvm_name = "x87", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xop = Feature{ + .name = "xop", + .description = "Enable XOP instructions", + .llvm_name = "xop", + .subfeatures = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_xsave = Feature{ + .name = "xsave", + .description = "Support xsave instructions", + .llvm_name = "xsave", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xsavec = Feature{ + .name = "xsavec", + .description = "Support xsavec instructions", + .llvm_name = "xsavec", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xsaveopt = Feature{ + .name = "xsaveopt", + .description = "Support xsaveopt instructions", + .llvm_name = "xsaveopt", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_xsaves = Feature{ + .name = "xsaves", + .description = "Support xsaves instructions", + .llvm_name = "xsaves", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bitMode16 = Feature{ + .name = "16bit-mode", + .description = "16-bit mode (i8086)", + .llvm_name = "16bit-mode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bitMode32 = Feature{ + .name = "32bit-mode", + .description = "32-bit mode (80386)", + .llvm_name = "32bit-mode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const feature_bitMode64 = Feature{ + .name = "64bit-mode", + .description = "64-bit mode (x86_64)", + .llvm_name = "64bit-mode", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_dnow3, + &feature_dnowa3, + &feature_bit64, + &feature_adx, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bf16, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_branchfusion, + &feature_avx512cd, + &feature_cldemote, + &feature_clflushopt, + &feature_clwb, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_mpx, + &feature_enqcmd, + &feature_avx512er, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fma4, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastHops, + &feature_fastLzcnt, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastScalarShiftMasks, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastVectorShiftMasks, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_lwp, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_movdir64b, + &feature_movdiri, + &feature_mwaitx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pconfig, + &feature_avx512pf, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_ptwrite, + &feature_padShortFunctions, + &feature_prefer128Bit, + &feature_prefer256Bit, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_rtm, + &feature_retpoline, + &feature_retpolineExternalThunk, + &feature_retpolineIndirectBranches, + &feature_retpolineIndirectCalls, + &feature_sgx, + &feature_sha, + &feature_shstk, + &feature_sse, + &feature_sse2, + &feature_sse3, + &feature_sse4a, + &feature_sse41, + &feature_sse42, + &feature_sseUnalignedMem, + &feature_ssse3, + &feature_slow3opsLea, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmaddwd, + &feature_slowPmulld, + &feature_slowShld, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_slowUnalignedMem32, + &feature_softFloat, + &feature_tbm, + &feature_useAa, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_avx512vp2intersect, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_waitpkg, + &feature_wbnoinvd, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + &feature_bitMode16, + &feature_bitMode32, + &feature_bitMode64, +}; + +pub const cpu_amdfam10 = Cpu{ + .name = "amdfam10", + .llvm_name = "amdfam10", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_athlon = Cpu{ + .name = "athlon", + .llvm_name = "athlon", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon4 = Cpu{ + .name = "athlon-4", + .llvm_name = "athlon-4", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonFx = Cpu{ + .name = "athlon-fx", + .llvm_name = "athlon-fx", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonMp = Cpu{ + .name = "athlon-mp", + .llvm_name = "athlon-mp", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonTbird = Cpu{ + .name = "athlon-tbird", + .llvm_name = "athlon-tbird", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonXp = Cpu{ + .name = "athlon-xp", + .llvm_name = "athlon-xp", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon64 = Cpu{ + .name = "athlon64", + .llvm_name = "athlon64", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon64Sse3 = Cpu{ + .name = "athlon64-sse3", + .llvm_name = "athlon64-sse3", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_atom = Cpu{ + .name = "atom", + .llvm_name = "atom", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_padShortFunctions, + &feature_sse, + &feature_ssse3, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_barcelona = Cpu{ + .name = "barcelona", + .llvm_name = "barcelona", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_bdver1 = Cpu{ + .name = "bdver1", + .llvm_name = "bdver1", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_x87, + &feature_xop, + &feature_xsave, + }, +}; + +pub const cpu_bdver2 = Cpu{ + .name = "bdver2", + .llvm_name = "bdver2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_bmi, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + }, +}; + +pub const cpu_bdver3 = Cpu{ + .name = "bdver3", + .llvm_name = "bdver3", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_bmi, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_bdver4 = Cpu{ + .name = "bdver4", + .llvm_name = "bdver4", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_bonnell = Cpu{ + .name = "bonnell", + .llvm_name = "bonnell", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_padShortFunctions, + &feature_sse, + &feature_ssse3, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_broadwell = Cpu{ + .name = "broadwell", + .llvm_name = "broadwell", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_btver1 = Cpu{ + .name = "btver1", + .llvm_name = "btver1", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastScalarShiftMasks, + &feature_fastVectorShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_popcnt, + &feature_prfchw, + &feature_sse, + &feature_sse4a, + &feature_ssse3, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_btver2 = Cpu{ + .name = "btver2", + .llvm_name = "btver2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_bmi, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastHops, + &feature_fastLzcnt, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastScalarShiftMasks, + &feature_fastVectorShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_sse4a, + &feature_ssse3, + &feature_slowShld, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_c3 = Cpu{ + .name = "c3", + .llvm_name = "c3", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_c32 = Cpu{ + .name = "c3-2", + .llvm_name = "c3-2", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_cannonlake = Cpu{ + .name = "cannonlake", + .llvm_name = "cannonlake", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vbmi, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_cascadelake = Cpu{ + .name = "cascadelake", + .llvm_name = "cascadelake", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_avx512vnni, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_cooperlake = Cpu{ + .name = "cooperlake", + .llvm_name = "cooperlake", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bf16, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_avx512vnni, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_coreAvxI = Cpu{ + .name = "core-avx-i", + .llvm_name = "core-avx-i", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_coreAvx2 = Cpu{ + .name = "core-avx2", + .llvm_name = "core-avx2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_core2 = Cpu{ + .name = "core2", + .llvm_name = "core2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_ssse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_corei7 = Cpu{ + .name = "corei7", + .llvm_name = "corei7", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_corei7Avx = Cpu{ + .name = "corei7-avx", + .llvm_name = "corei7-avx", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .subfeatures = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_geode = Cpu{ + .name = "geode", + .llvm_name = "geode", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_goldmont = Cpu{ + .name = "goldmont", + .llvm_name = "goldmont", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_goldmontPlus = Cpu{ + .name = "goldmont-plus", + .llvm_name = "goldmont-plus", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_ptwrite, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_haswell = Cpu{ + .name = "haswell", + .llvm_name = "haswell", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_i386 = Cpu{ + .name = "i386", + .llvm_name = "i386", + .subfeatures = &[_]*const Feature { + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i486 = Cpu{ + .name = "i486", + .llvm_name = "i486", + .subfeatures = &[_]*const Feature { + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i586 = Cpu{ + .name = "i586", + .llvm_name = "i586", + .subfeatures = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i686 = Cpu{ + .name = "i686", + .llvm_name = "i686", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_icelakeClient = Cpu{ + .name = "icelake-client", + .llvm_name = "icelake-client", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_icelakeServer = Cpu{ + .name = "icelake-server", + .llvm_name = "icelake-server", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pconfig, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_wbnoinvd, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_ivybridge = Cpu{ + .name = "ivybridge", + .llvm_name = "ivybridge", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_k6 = Cpu{ + .name = "k6", + .llvm_name = "k6", + .subfeatures = &[_]*const Feature { + &feature_cx8, + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k62 = Cpu{ + .name = "k6-2", + .llvm_name = "k6-2", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k63 = Cpu{ + .name = "k6-3", + .llvm_name = "k6-3", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k8 = Cpu{ + .name = "k8", + .llvm_name = "k8", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k8Sse3 = Cpu{ + .name = "k8-sse3", + .llvm_name = "k8-sse3", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_knl = Cpu{ + .name = "knl", + .llvm_name = "knl", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512cd, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512er, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastGather, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_avx512pf, + &feature_popcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowPmaddwd, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_knm = Cpu{ + .name = "knm", + .llvm_name = "knm", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512cd, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512er, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastGather, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_avx512pf, + &feature_popcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowPmaddwd, + &feature_slowTwoMemOps, + &feature_avx512vpopcntdq, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_lakemont = Cpu{ + .name = "lakemont", + .llvm_name = "lakemont", + .subfeatures = &[_]*const Feature { + }, +}; + +pub const cpu_nehalem = Cpu{ + .name = "nehalem", + .llvm_name = "nehalem", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_nocona = Cpu{ + .name = "nocona", + .llvm_name = "nocona", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_opteron = Cpu{ + .name = "opteron", + .llvm_name = "opteron", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_opteronSse3 = Cpu{ + .name = "opteron-sse3", + .llvm_name = "opteron-sse3", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_penryn = Cpu{ + .name = "penryn", + .llvm_name = "penryn", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_sse41, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium = Cpu{ + .name = "pentium", + .llvm_name = "pentium", + .subfeatures = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumM = Cpu{ + .name = "pentium-m", + .llvm_name = "pentium-m", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumMmx = Cpu{ + .name = "pentium-mmx", + .llvm_name = "pentium-mmx", + .subfeatures = &[_]*const Feature { + &feature_cx8, + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium2 = Cpu{ + .name = "pentium2", + .llvm_name = "pentium2", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium3 = Cpu{ + .name = "pentium3", + .llvm_name = "pentium3", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium3m = Cpu{ + .name = "pentium3m", + .llvm_name = "pentium3m", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium4 = Cpu{ + .name = "pentium4", + .llvm_name = "pentium4", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium4m = Cpu{ + .name = "pentium4m", + .llvm_name = "pentium4m", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumpro = Cpu{ + .name = "pentiumpro", + .llvm_name = "pentiumpro", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_prescott = Cpu{ + .name = "prescott", + .llvm_name = "prescott", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_sandybridge = Cpu{ + .name = "sandybridge", + .llvm_name = "sandybridge", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_silvermont = Cpu{ + .name = "silvermont", + .llvm_name = "silvermont", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_sse42, + &feature_ssse3, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmulld, + &feature_slowTwoMemOps, + &feature_x87, + }, +}; + +pub const cpu_skx = Cpu{ + .name = "skx", + .llvm_name = "skx", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_skylake = Cpu{ + .name = "skylake", + .llvm_name = "skylake", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_skylakeAvx512 = Cpu{ + .name = "skylake-avx512", + .llvm_name = "skylake-avx512", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_slm = Cpu{ + .name = "slm", + .llvm_name = "slm", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_sse42, + &feature_ssse3, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmulld, + &feature_slowTwoMemOps, + &feature_x87, + }, +}; + +pub const cpu_tigerlake = Cpu{ + .name = "tigerlake", + .llvm_name = "tigerlake", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_movdir64b, + &feature_movdiri, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_prefer256Bit, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_shstk, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_avx512vp2intersect, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_tremont = Cpu{ + .name = "tremont", + .llvm_name = "tremont", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_cldemote, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_gfni, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_movdir64b, + &feature_movdiri, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_ptwrite, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_waitpkg, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_westmere = Cpu{ + .name = "westmere", + .llvm_name = "westmere", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_winchipC6 = Cpu{ + .name = "winchip-c6", + .llvm_name = "winchip-c6", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_winchip2 = Cpu{ + .name = "winchip2", + .llvm_name = "winchip2", + .subfeatures = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_x8664 = Cpu{ + .name = "x86-64", + .llvm_name = "x86-64", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slow3opsLea, + &feature_slowIncdec, + &feature_x87, + }, +}; + +pub const cpu_yonah = Cpu{ + .name = "yonah", + .llvm_name = "yonah", + .subfeatures = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_znver1 = Cpu{ + .name = "znver1", + .llvm_name = "znver1", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_clflushopt, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastLzcnt, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_znver2 = Cpu{ + .name = "znver2", + .llvm_name = "znver2", + .subfeatures = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_clflushopt, + &feature_clwb, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastLzcnt, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse4a, + &feature_slowShld, + &feature_wbnoinvd, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_amdfam10, + &cpu_athlon, + &cpu_athlon4, + &cpu_athlonFx, + &cpu_athlonMp, + &cpu_athlonTbird, + &cpu_athlonXp, + &cpu_athlon64, + &cpu_athlon64Sse3, + &cpu_atom, + &cpu_barcelona, + &cpu_bdver1, + &cpu_bdver2, + &cpu_bdver3, + &cpu_bdver4, + &cpu_bonnell, + &cpu_broadwell, + &cpu_btver1, + &cpu_btver2, + &cpu_c3, + &cpu_c32, + &cpu_cannonlake, + &cpu_cascadelake, + &cpu_cooperlake, + &cpu_coreAvxI, + &cpu_coreAvx2, + &cpu_core2, + &cpu_corei7, + &cpu_corei7Avx, + &cpu_generic, + &cpu_geode, + &cpu_goldmont, + &cpu_goldmontPlus, + &cpu_haswell, + &cpu_i386, + &cpu_i486, + &cpu_i586, + &cpu_i686, + &cpu_icelakeClient, + &cpu_icelakeServer, + &cpu_ivybridge, + &cpu_k6, + &cpu_k62, + &cpu_k63, + &cpu_k8, + &cpu_k8Sse3, + &cpu_knl, + &cpu_knm, + &cpu_lakemont, + &cpu_nehalem, + &cpu_nocona, + &cpu_opteron, + &cpu_opteronSse3, + &cpu_penryn, + &cpu_pentium, + &cpu_pentiumM, + &cpu_pentiumMmx, + &cpu_pentium2, + &cpu_pentium3, + &cpu_pentium3m, + &cpu_pentium4, + &cpu_pentium4m, + &cpu_pentiumpro, + &cpu_prescott, + &cpu_sandybridge, + &cpu_silvermont, + &cpu_skx, + &cpu_skylake, + &cpu_skylakeAvx512, + &cpu_slm, + &cpu_tigerlake, + &cpu_tremont, + &cpu_westmere, + &cpu_winchipC6, + &cpu_winchip2, + &cpu_x8664, + &cpu_yonah, + &cpu_znver1, + &cpu_znver2, +}; diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index fc6cb18bf23b07039a21f41d2a8a7426fc3ddb5f..1544fcbc8f2b4fc591c6883f9444ea15fa296622 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -6,8 +6,6 @@ const io = std.io; const mem = std.mem; const fs = std.fs; const process = std.process; -const feature = std.target.feature; -const cpu = std.target.cpu; const Allocator = mem.Allocator; const ArrayList = std.ArrayList; const Buffer = std.Buffer; @@ -546,34 +544,30 @@ fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void return; }; - inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| { - if (@enumToInt(arch) == arch_enum_field.value) { - const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value); + try stdout_stream.print("Available features for {}:\n", .{ @tagName(arch) }); - const feature_infos = feature.ArchFeature(enum_arch).feature_infos; + const features = std.target.getFeaturesForArch(arch); - try stdout_stream.print("Available features for {}:\n", .{ arch_enum_field.name }); + var longest_len: usize = 0; + for (features) |feature| { + if (feature.name.len > longest_len) { + longest_len = feature.name.len; + } + } - var longest_len: usize = 0; - for (feature_infos) |feature_info| { - if (feature_info.name.len > longest_len) longest_len = feature_info.name.len; - } + for (features) |feature| { + try stdout_stream.print(" {}", .{ feature.name }); + + var i: usize = 0; + while (i < longest_len - feature.name.len) : (i += 1) { + try stdout_stream.write(" "); + } - for (feature_infos) |feature_info| { - try stdout_stream.print(" {}", .{ feature_info.name }); - - var i: usize = 0; - while (i < longest_len - feature_info.name.len) : (i += 1) { - try stdout_stream.write(" "); - } + try stdout_stream.print(" - {}\n", .{ feature.description }); - try stdout_stream.print(" - {}\n", .{ feature_info.description }); - - if (show_subfeatures and feature_info.subfeatures.len > 0) { - for (feature_info.subfeatures) |subfeature| { - try stdout_stream.print(" {}\n", .{ subfeature.getInfo().name }); - } - } + if (show_subfeatures and feature.subfeatures.len > 0) { + for (feature.subfeatures) |subfeature| { + try stdout_stream.print(" {}\n", .{ subfeature.name }); } } } @@ -594,35 +588,33 @@ fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { return; }; - inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| { - if (@enumToInt(arch) == arch_enum_field.value) { - const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value); + const cpus = std.target.getCpusForArch(arch); - const cpu_infos = cpu.ArchCpu(enum_arch).cpu_infos; + try stdout_stream.print("Available cpus for {}:\n", .{ @tagName(arch) }); - try stdout_stream.print("Available cpus for {}:\n", .{ arch_enum_field.name }); + var longest_len: usize = 0; + for (cpus) |cpu| { + if (cpu.name.len > longest_len) { + longest_len = cpu.name.len; + } + } - var longest_len: usize = 0; - for (cpu_infos) |cpu_info| { - if (cpu_info.name.len > longest_len) longest_len = cpu_info.name.len; - } + for (cpus) |cpu| { + try stdout_stream.print(" {}", .{ cpu.name }); + + var i: usize = 0; + while (i < longest_len - cpu.name.len) : (i += 1) { + try stdout_stream.write(" "); + } - for (cpu_infos) |cpu_info| { - try stdout_stream.print(" {}", .{ cpu_info.name }); - - var i: usize = 0; - while (i < longest_len - cpu_info.name.len) : (i += 1) { - try stdout_stream.write(" "); - } + try stdout_stream.write("\n"); - try stdout_stream.write("\n"); - - if (show_subfeatures and cpu_info.features.len > 0) { - for (cpu_info.features) |subfeature| { - try stdout_stream.print(" {}\n", .{ subfeature.getInfo().name }); - } - } + if (show_subfeatures and cpu.subfeatures.len > 0) { + for (cpu.subfeatures) |subfeature| { + try stdout_stream.print(" {}\n", .{ subfeature.name }); } } } } + +// use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'. -- 2.54.0 From c8f1e0d6d8f3ccfa952e9612903783baa9b2c12f Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Fri, 20 Dec 2019 20:07:29 -0500 Subject: [PATCH 08/63] Remove llvm_name from features --- lib/std/target.zig | 1 - lib/std/target/aarch64.zig | 985 +++++------ lib/std/target/amdgpu.zig | 1190 ++++++------- lib/std/target/arm.zig | 1311 +++++++-------- lib/std/target/avr.zig | 3223 ++++++++++++++++++------------------ lib/std/target/bpf.zig | 3 - lib/std/target/hexagon.zig | 24 - lib/std/target/mips.zig | 290 ++-- lib/std/target/msp430.zig | 4 - lib/std/target/nvptx.zig | 25 - lib/std/target/powerpc.zig | 55 +- lib/std/target/riscv.zig | 9 - lib/std/target/sparc.zig | 19 - lib/std/target/systemz.zig | 35 - lib/std/target/wasm.zig | 10 - lib/std/target/x86.zig | 128 +- 16 files changed, 3243 insertions(+), 4069 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index c9113118101b9adac6f214ada9f00bae3ea66ff0..ad2ca59ee8d266eb321bf99b37b2f5417b6adf44 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -861,7 +861,6 @@ pub const x86 = @import("target/x86.zig"); pub const Feature = struct { name: []const u8, description: []const u8, - llvm_name: []const u8, subfeatures: []*const Feature, }; diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index ca87c33bbbb7c1c0c213fb3591d3157859685c9c..b7a6283f861e6bcbc721458c69f739bb091f4449 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES support", - .llvm_name = "aes", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -13,7 +12,6 @@ pub const feature_aes = Feature{ pub const feature_am = Feature{ .name = "am", .description = "Enable v8.4-A Activity Monitors extension", - .llvm_name = "am", .subfeatures = &[_]*const Feature { }, }; @@ -21,7 +19,6 @@ pub const feature_am = Feature{ pub const feature_aggressiveFma = Feature{ .name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", - .llvm_name = "aggressive-fma", .subfeatures = &[_]*const Feature { }, }; @@ -29,7 +26,6 @@ pub const feature_aggressiveFma = Feature{ pub const feature_altnzcv = Feature{ .name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", - .llvm_name = "altnzcv", .subfeatures = &[_]*const Feature { }, }; @@ -37,7 +33,6 @@ pub const feature_altnzcv = Feature{ pub const feature_alternateSextloadCvtF32Pattern = Feature{ .name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", - .llvm_name = "alternate-sextload-cvt-f32-pattern", .subfeatures = &[_]*const Feature { }, }; @@ -45,7 +40,6 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{ pub const feature_arithBccFusion = Feature{ .name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", - .llvm_name = "arith-bcc-fusion", .subfeatures = &[_]*const Feature { }, }; @@ -53,7 +47,6 @@ pub const feature_arithBccFusion = Feature{ pub const feature_arithCbzFusion = Feature{ .name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", - .llvm_name = "arith-cbz-fusion", .subfeatures = &[_]*const Feature { }, }; @@ -61,7 +54,6 @@ pub const feature_arithCbzFusion = Feature{ pub const feature_balanceFpOps = Feature{ .name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .llvm_name = "balance-fp-ops", .subfeatures = &[_]*const Feature { }, }; @@ -69,7 +61,6 @@ pub const feature_balanceFpOps = Feature{ pub const feature_bti = Feature{ .name = "bti", .description = "Enable Branch Target Identification", - .llvm_name = "bti", .subfeatures = &[_]*const Feature { }, }; @@ -77,7 +68,6 @@ pub const feature_bti = Feature{ pub const feature_ccidx = Feature{ .name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .llvm_name = "ccidx", .subfeatures = &[_]*const Feature { }, }; @@ -85,7 +75,6 @@ pub const feature_ccidx = Feature{ pub const feature_ccpp = Feature{ .name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .llvm_name = "ccpp", .subfeatures = &[_]*const Feature { }, }; @@ -93,7 +82,6 @@ pub const feature_ccpp = Feature{ pub const feature_crc = Feature{ .name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", - .llvm_name = "crc", .subfeatures = &[_]*const Feature { }, }; @@ -101,7 +89,6 @@ pub const feature_crc = Feature{ pub const feature_ccdp = Feature{ .name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .llvm_name = "ccdp", .subfeatures = &[_]*const Feature { }, }; @@ -109,7 +96,6 @@ pub const feature_ccdp = Feature{ pub const feature_callSavedX8 = Feature{ .name = "call-saved-x8", .description = "Make X8 callee saved.", - .llvm_name = "call-saved-x8", .subfeatures = &[_]*const Feature { }, }; @@ -117,7 +103,6 @@ pub const feature_callSavedX8 = Feature{ pub const feature_callSavedX9 = Feature{ .name = "call-saved-x9", .description = "Make X9 callee saved.", - .llvm_name = "call-saved-x9", .subfeatures = &[_]*const Feature { }, }; @@ -125,7 +110,6 @@ pub const feature_callSavedX9 = Feature{ pub const feature_callSavedX10 = Feature{ .name = "call-saved-x10", .description = "Make X10 callee saved.", - .llvm_name = "call-saved-x10", .subfeatures = &[_]*const Feature { }, }; @@ -133,7 +117,6 @@ pub const feature_callSavedX10 = Feature{ pub const feature_callSavedX11 = Feature{ .name = "call-saved-x11", .description = "Make X11 callee saved.", - .llvm_name = "call-saved-x11", .subfeatures = &[_]*const Feature { }, }; @@ -141,7 +124,6 @@ pub const feature_callSavedX11 = Feature{ pub const feature_callSavedX12 = Feature{ .name = "call-saved-x12", .description = "Make X12 callee saved.", - .llvm_name = "call-saved-x12", .subfeatures = &[_]*const Feature { }, }; @@ -149,7 +131,6 @@ pub const feature_callSavedX12 = Feature{ pub const feature_callSavedX13 = Feature{ .name = "call-saved-x13", .description = "Make X13 callee saved.", - .llvm_name = "call-saved-x13", .subfeatures = &[_]*const Feature { }, }; @@ -157,7 +138,6 @@ pub const feature_callSavedX13 = Feature{ pub const feature_callSavedX14 = Feature{ .name = "call-saved-x14", .description = "Make X14 callee saved.", - .llvm_name = "call-saved-x14", .subfeatures = &[_]*const Feature { }, }; @@ -165,7 +145,6 @@ pub const feature_callSavedX14 = Feature{ pub const feature_callSavedX15 = Feature{ .name = "call-saved-x15", .description = "Make X15 callee saved.", - .llvm_name = "call-saved-x15", .subfeatures = &[_]*const Feature { }, }; @@ -173,7 +152,6 @@ pub const feature_callSavedX15 = Feature{ pub const feature_callSavedX18 = Feature{ .name = "call-saved-x18", .description = "Make X18 callee saved.", - .llvm_name = "call-saved-x18", .subfeatures = &[_]*const Feature { }, }; @@ -181,7 +159,6 @@ pub const feature_callSavedX18 = Feature{ pub const feature_complxnum = Feature{ .name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", - .llvm_name = "complxnum", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -190,7 +167,6 @@ pub const feature_complxnum = Feature{ pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable cryptographic instructions", - .llvm_name = "crypto", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -199,7 +175,6 @@ pub const feature_crypto = Feature{ pub const feature_customCheapAsMove = Feature{ .name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", - .llvm_name = "custom-cheap-as-move", .subfeatures = &[_]*const Feature { }, }; @@ -207,7 +182,6 @@ pub const feature_customCheapAsMove = Feature{ pub const feature_dit = Feature{ .name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", - .llvm_name = "dit", .subfeatures = &[_]*const Feature { }, }; @@ -215,7 +189,6 @@ pub const feature_dit = Feature{ pub const feature_disableLatencySchedHeuristic = Feature{ .name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", - .llvm_name = "disable-latency-sched-heuristic", .subfeatures = &[_]*const Feature { }, }; @@ -223,7 +196,6 @@ pub const feature_disableLatencySchedHeuristic = Feature{ pub const feature_dotprod = Feature{ .name = "dotprod", .description = "Enable dot product support", - .llvm_name = "dotprod", .subfeatures = &[_]*const Feature { }, }; @@ -231,7 +203,6 @@ pub const feature_dotprod = Feature{ pub const feature_ete = Feature{ .name = "ete", .description = "Enable Embedded Trace Extension", - .llvm_name = "ete", .subfeatures = &[_]*const Feature { &feature_trbe, }, @@ -240,7 +211,6 @@ pub const feature_ete = Feature{ pub const feature_exynosCheapAsMove = Feature{ .name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", - .llvm_name = "exynos-cheap-as-move", .subfeatures = &[_]*const Feature { &feature_customCheapAsMove, }, @@ -249,7 +219,6 @@ pub const feature_exynosCheapAsMove = Feature{ pub const feature_fmi = Feature{ .name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", - .llvm_name = "fmi", .subfeatures = &[_]*const Feature { }, }; @@ -257,7 +226,6 @@ pub const feature_fmi = Feature{ pub const feature_fp16fml = Feature{ .name = "fp16fml", .description = "Enable FP16 FML instructions", - .llvm_name = "fp16fml", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -266,7 +234,6 @@ pub const feature_fp16fml = Feature{ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", .description = "Enable ARMv8 FP", - .llvm_name = "fp-armv8", .subfeatures = &[_]*const Feature { }, }; @@ -274,7 +241,6 @@ pub const feature_fpArmv8 = Feature{ pub const feature_fptoint = Feature{ .name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .llvm_name = "fptoint", .subfeatures = &[_]*const Feature { }, }; @@ -282,7 +248,6 @@ pub const feature_fptoint = Feature{ pub const feature_force32bitJumpTables = Feature{ .name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", - .llvm_name = "force-32bit-jump-tables", .subfeatures = &[_]*const Feature { }, }; @@ -290,7 +255,6 @@ pub const feature_force32bitJumpTables = Feature{ pub const feature_fullfp16 = Feature{ .name = "fullfp16", .description = "Full FP16", - .llvm_name = "fullfp16", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -299,7 +263,6 @@ pub const feature_fullfp16 = Feature{ pub const feature_fuseAes = Feature{ .name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .llvm_name = "fuse-aes", .subfeatures = &[_]*const Feature { }, }; @@ -307,7 +270,6 @@ pub const feature_fuseAes = Feature{ pub const feature_fuseAddress = Feature{ .name = "fuse-address", .description = "CPU fuses address generation and memory operations", - .llvm_name = "fuse-address", .subfeatures = &[_]*const Feature { }, }; @@ -315,7 +277,6 @@ pub const feature_fuseAddress = Feature{ pub const feature_fuseArithLogic = Feature{ .name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", - .llvm_name = "fuse-arith-logic", .subfeatures = &[_]*const Feature { }, }; @@ -323,7 +284,6 @@ pub const feature_fuseArithLogic = Feature{ pub const feature_fuseCsel = Feature{ .name = "fuse-csel", .description = "CPU fuses conditional select operations", - .llvm_name = "fuse-csel", .subfeatures = &[_]*const Feature { }, }; @@ -331,7 +291,6 @@ pub const feature_fuseCsel = Feature{ pub const feature_fuseCryptoEor = Feature{ .name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", - .llvm_name = "fuse-crypto-eor", .subfeatures = &[_]*const Feature { }, }; @@ -339,7 +298,6 @@ pub const feature_fuseCryptoEor = Feature{ pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", .description = "CPU fuses literal generation operations", - .llvm_name = "fuse-literals", .subfeatures = &[_]*const Feature { }, }; @@ -347,7 +305,6 @@ pub const feature_fuseLiterals = Feature{ pub const feature_jsconv = Feature{ .name = "jsconv", .description = "Enable v8.3-A JavaScript FP conversion enchancement", - .llvm_name = "jsconv", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -356,7 +313,6 @@ pub const feature_jsconv = Feature{ pub const feature_lor = Feature{ .name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .llvm_name = "lor", .subfeatures = &[_]*const Feature { }, }; @@ -364,7 +320,6 @@ pub const feature_lor = Feature{ pub const feature_lse = Feature{ .name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .llvm_name = "lse", .subfeatures = &[_]*const Feature { }, }; @@ -372,7 +327,6 @@ pub const feature_lse = Feature{ pub const feature_lslFast = Feature{ .name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", - .llvm_name = "lsl-fast", .subfeatures = &[_]*const Feature { }, }; @@ -380,7 +334,6 @@ pub const feature_lslFast = Feature{ pub const feature_mpam = Feature{ .name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .llvm_name = "mpam", .subfeatures = &[_]*const Feature { }, }; @@ -388,7 +341,6 @@ pub const feature_mpam = Feature{ pub const feature_mte = Feature{ .name = "mte", .description = "Enable Memory Tagging Extension", - .llvm_name = "mte", .subfeatures = &[_]*const Feature { }, }; @@ -396,7 +348,6 @@ pub const feature_mte = Feature{ pub const feature_neon = Feature{ .name = "neon", .description = "Enable Advanced SIMD instructions", - .llvm_name = "neon", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -405,7 +356,6 @@ pub const feature_neon = Feature{ pub const feature_nv = Feature{ .name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", - .llvm_name = "nv", .subfeatures = &[_]*const Feature { }, }; @@ -413,7 +363,6 @@ pub const feature_nv = Feature{ pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .llvm_name = "no-neg-immediates", .subfeatures = &[_]*const Feature { }, }; @@ -421,7 +370,6 @@ pub const feature_noNegImmediates = Feature{ pub const feature_pa = Feature{ .name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", - .llvm_name = "pa", .subfeatures = &[_]*const Feature { }, }; @@ -429,7 +377,6 @@ pub const feature_pa = Feature{ pub const feature_pan = Feature{ .name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", - .llvm_name = "pan", .subfeatures = &[_]*const Feature { }, }; @@ -437,7 +384,6 @@ pub const feature_pan = Feature{ pub const feature_panRwv = Feature{ .name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", - .llvm_name = "pan-rwv", .subfeatures = &[_]*const Feature { &feature_pan, }, @@ -446,7 +392,6 @@ pub const feature_panRwv = Feature{ pub const feature_perfmon = Feature{ .name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .llvm_name = "perfmon", .subfeatures = &[_]*const Feature { }, }; @@ -454,7 +399,6 @@ pub const feature_perfmon = Feature{ pub const feature_usePostraScheduler = Feature{ .name = "use-postra-scheduler", .description = "Schedule again after register allocation", - .llvm_name = "use-postra-scheduler", .subfeatures = &[_]*const Feature { }, }; @@ -462,7 +406,6 @@ pub const feature_usePostraScheduler = Feature{ pub const feature_predres = Feature{ .name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", - .llvm_name = "predres", .subfeatures = &[_]*const Feature { }, }; @@ -470,7 +413,6 @@ pub const feature_predres = Feature{ pub const feature_predictableSelectExpensive = Feature{ .name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", - .llvm_name = "predictable-select-expensive", .subfeatures = &[_]*const Feature { }, }; @@ -478,7 +420,6 @@ pub const feature_predictableSelectExpensive = Feature{ pub const feature_uaops = Feature{ .name = "uaops", .description = "Enable v8.2 UAO PState", - .llvm_name = "uaops", .subfeatures = &[_]*const Feature { }, }; @@ -486,7 +427,6 @@ pub const feature_uaops = Feature{ pub const feature_ras = Feature{ .name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .llvm_name = "ras", .subfeatures = &[_]*const Feature { }, }; @@ -494,7 +434,6 @@ pub const feature_ras = Feature{ pub const feature_rasv8_4 = Feature{ .name = "rasv8_4", .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", - .llvm_name = "rasv8_4", .subfeatures = &[_]*const Feature { &feature_ras, }, @@ -503,7 +442,6 @@ pub const feature_rasv8_4 = Feature{ pub const feature_rcpc = Feature{ .name = "rcpc", .description = "Enable support for RCPC extension", - .llvm_name = "rcpc", .subfeatures = &[_]*const Feature { }, }; @@ -511,7 +449,6 @@ pub const feature_rcpc = Feature{ pub const feature_rcpcImmo = Feature{ .name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", - .llvm_name = "rcpc-immo", .subfeatures = &[_]*const Feature { &feature_rcpc, }, @@ -520,7 +457,6 @@ pub const feature_rcpcImmo = Feature{ pub const feature_rdm = Feature{ .name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .llvm_name = "rdm", .subfeatures = &[_]*const Feature { }, }; @@ -528,7 +464,6 @@ pub const feature_rdm = Feature{ pub const feature_rand = Feature{ .name = "rand", .description = "Enable Random Number generation instructions", - .llvm_name = "rand", .subfeatures = &[_]*const Feature { }, }; @@ -536,7 +471,6 @@ pub const feature_rand = Feature{ pub const feature_reserveX1 = Feature{ .name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", - .llvm_name = "reserve-x1", .subfeatures = &[_]*const Feature { }, }; @@ -544,7 +478,6 @@ pub const feature_reserveX1 = Feature{ pub const feature_reserveX2 = Feature{ .name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", - .llvm_name = "reserve-x2", .subfeatures = &[_]*const Feature { }, }; @@ -552,7 +485,6 @@ pub const feature_reserveX2 = Feature{ pub const feature_reserveX3 = Feature{ .name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", - .llvm_name = "reserve-x3", .subfeatures = &[_]*const Feature { }, }; @@ -560,7 +492,6 @@ pub const feature_reserveX3 = Feature{ pub const feature_reserveX4 = Feature{ .name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", - .llvm_name = "reserve-x4", .subfeatures = &[_]*const Feature { }, }; @@ -568,7 +499,6 @@ pub const feature_reserveX4 = Feature{ pub const feature_reserveX5 = Feature{ .name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", - .llvm_name = "reserve-x5", .subfeatures = &[_]*const Feature { }, }; @@ -576,7 +506,6 @@ pub const feature_reserveX5 = Feature{ pub const feature_reserveX6 = Feature{ .name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", - .llvm_name = "reserve-x6", .subfeatures = &[_]*const Feature { }, }; @@ -584,7 +513,6 @@ pub const feature_reserveX6 = Feature{ pub const feature_reserveX7 = Feature{ .name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", - .llvm_name = "reserve-x7", .subfeatures = &[_]*const Feature { }, }; @@ -592,7 +520,6 @@ pub const feature_reserveX7 = Feature{ pub const feature_reserveX9 = Feature{ .name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", - .llvm_name = "reserve-x9", .subfeatures = &[_]*const Feature { }, }; @@ -600,7 +527,6 @@ pub const feature_reserveX9 = Feature{ pub const feature_reserveX10 = Feature{ .name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", - .llvm_name = "reserve-x10", .subfeatures = &[_]*const Feature { }, }; @@ -608,7 +534,6 @@ pub const feature_reserveX10 = Feature{ pub const feature_reserveX11 = Feature{ .name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", - .llvm_name = "reserve-x11", .subfeatures = &[_]*const Feature { }, }; @@ -616,7 +541,6 @@ pub const feature_reserveX11 = Feature{ pub const feature_reserveX12 = Feature{ .name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", - .llvm_name = "reserve-x12", .subfeatures = &[_]*const Feature { }, }; @@ -624,7 +548,6 @@ pub const feature_reserveX12 = Feature{ pub const feature_reserveX13 = Feature{ .name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", - .llvm_name = "reserve-x13", .subfeatures = &[_]*const Feature { }, }; @@ -632,7 +555,6 @@ pub const feature_reserveX13 = Feature{ pub const feature_reserveX14 = Feature{ .name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", - .llvm_name = "reserve-x14", .subfeatures = &[_]*const Feature { }, }; @@ -640,7 +562,6 @@ pub const feature_reserveX14 = Feature{ pub const feature_reserveX15 = Feature{ .name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", - .llvm_name = "reserve-x15", .subfeatures = &[_]*const Feature { }, }; @@ -648,7 +569,6 @@ pub const feature_reserveX15 = Feature{ pub const feature_reserveX18 = Feature{ .name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", - .llvm_name = "reserve-x18", .subfeatures = &[_]*const Feature { }, }; @@ -656,7 +576,6 @@ pub const feature_reserveX18 = Feature{ pub const feature_reserveX20 = Feature{ .name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", - .llvm_name = "reserve-x20", .subfeatures = &[_]*const Feature { }, }; @@ -664,7 +583,6 @@ pub const feature_reserveX20 = Feature{ pub const feature_reserveX21 = Feature{ .name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", - .llvm_name = "reserve-x21", .subfeatures = &[_]*const Feature { }, }; @@ -672,7 +590,6 @@ pub const feature_reserveX21 = Feature{ pub const feature_reserveX22 = Feature{ .name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", - .llvm_name = "reserve-x22", .subfeatures = &[_]*const Feature { }, }; @@ -680,7 +597,6 @@ pub const feature_reserveX22 = Feature{ pub const feature_reserveX23 = Feature{ .name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", - .llvm_name = "reserve-x23", .subfeatures = &[_]*const Feature { }, }; @@ -688,7 +604,6 @@ pub const feature_reserveX23 = Feature{ pub const feature_reserveX24 = Feature{ .name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", - .llvm_name = "reserve-x24", .subfeatures = &[_]*const Feature { }, }; @@ -696,7 +611,6 @@ pub const feature_reserveX24 = Feature{ pub const feature_reserveX25 = Feature{ .name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", - .llvm_name = "reserve-x25", .subfeatures = &[_]*const Feature { }, }; @@ -704,7 +618,6 @@ pub const feature_reserveX25 = Feature{ pub const feature_reserveX26 = Feature{ .name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", - .llvm_name = "reserve-x26", .subfeatures = &[_]*const Feature { }, }; @@ -712,7 +625,6 @@ pub const feature_reserveX26 = Feature{ pub const feature_reserveX27 = Feature{ .name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", - .llvm_name = "reserve-x27", .subfeatures = &[_]*const Feature { }, }; @@ -720,7 +632,6 @@ pub const feature_reserveX27 = Feature{ pub const feature_reserveX28 = Feature{ .name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", - .llvm_name = "reserve-x28", .subfeatures = &[_]*const Feature { }, }; @@ -728,7 +639,6 @@ pub const feature_reserveX28 = Feature{ pub const feature_sb = Feature{ .name = "sb", .description = "Enable v8.5 Speculation Barrier", - .llvm_name = "sb", .subfeatures = &[_]*const Feature { }, }; @@ -736,7 +646,6 @@ pub const feature_sb = Feature{ pub const feature_sel2 = Feature{ .name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", - .llvm_name = "sel2", .subfeatures = &[_]*const Feature { }, }; @@ -744,7 +653,6 @@ pub const feature_sel2 = Feature{ pub const feature_sha2 = Feature{ .name = "sha2", .description = "Enable SHA1 and SHA256 support", - .llvm_name = "sha2", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -753,7 +661,6 @@ pub const feature_sha2 = Feature{ pub const feature_sha3 = Feature{ .name = "sha3", .description = "Enable SHA512 and SHA3 support", - .llvm_name = "sha3", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -762,7 +669,6 @@ pub const feature_sha3 = Feature{ pub const feature_sm4 = Feature{ .name = "sm4", .description = "Enable SM3 and SM4 support", - .llvm_name = "sm4", .subfeatures = &[_]*const Feature { &feature_fpArmv8, }, @@ -771,7 +677,6 @@ pub const feature_sm4 = Feature{ pub const feature_spe = Feature{ .name = "spe", .description = "Enable Statistical Profiling extension", - .llvm_name = "spe", .subfeatures = &[_]*const Feature { }, }; @@ -779,7 +684,6 @@ pub const feature_spe = Feature{ pub const feature_ssbs = Feature{ .name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", - .llvm_name = "ssbs", .subfeatures = &[_]*const Feature { }, }; @@ -787,7 +691,6 @@ pub const feature_ssbs = Feature{ pub const feature_sve = Feature{ .name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .llvm_name = "sve", .subfeatures = &[_]*const Feature { }, }; @@ -795,7 +698,6 @@ pub const feature_sve = Feature{ pub const feature_sve2 = Feature{ .name = "sve2", .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", - .llvm_name = "sve2", .subfeatures = &[_]*const Feature { &feature_sve, }, @@ -804,7 +706,6 @@ pub const feature_sve2 = Feature{ pub const feature_sve2Aes = Feature{ .name = "sve2-aes", .description = "Enable AES SVE2 instructions", - .llvm_name = "sve2-aes", .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_sve, @@ -814,7 +715,6 @@ pub const feature_sve2Aes = Feature{ pub const feature_sve2Bitperm = Feature{ .name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", - .llvm_name = "sve2-bitperm", .subfeatures = &[_]*const Feature { &feature_sve, }, @@ -823,7 +723,6 @@ pub const feature_sve2Bitperm = Feature{ pub const feature_sve2Sha3 = Feature{ .name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", - .llvm_name = "sve2-sha3", .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_sve, @@ -833,7 +732,6 @@ pub const feature_sve2Sha3 = Feature{ pub const feature_sve2Sm4 = Feature{ .name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", - .llvm_name = "sve2-sm4", .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_sve, @@ -843,7 +741,6 @@ pub const feature_sve2Sm4 = Feature{ pub const feature_slowMisaligned128store = Feature{ .name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", - .llvm_name = "slow-misaligned-128store", .subfeatures = &[_]*const Feature { }, }; @@ -851,7 +748,6 @@ pub const feature_slowMisaligned128store = Feature{ pub const feature_slowPaired128 = Feature{ .name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", - .llvm_name = "slow-paired-128", .subfeatures = &[_]*const Feature { }, }; @@ -859,7 +755,6 @@ pub const feature_slowPaired128 = Feature{ pub const feature_slowStrqroStore = Feature{ .name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", - .llvm_name = "slow-strqro-store", .subfeatures = &[_]*const Feature { }, }; @@ -867,7 +762,6 @@ pub const feature_slowStrqroStore = Feature{ pub const feature_specrestrict = Feature{ .name = "specrestrict", .description = "Enable architectural speculation restriction", - .llvm_name = "specrestrict", .subfeatures = &[_]*const Feature { }, }; @@ -875,7 +769,6 @@ pub const feature_specrestrict = Feature{ pub const feature_strictAlign = Feature{ .name = "strict-align", .description = "Disallow all unaligned memory access", - .llvm_name = "strict-align", .subfeatures = &[_]*const Feature { }, }; @@ -883,7 +776,6 @@ pub const feature_strictAlign = Feature{ pub const feature_tlbRmi = Feature{ .name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .llvm_name = "tlb-rmi", .subfeatures = &[_]*const Feature { }, }; @@ -891,7 +783,6 @@ pub const feature_tlbRmi = Feature{ pub const feature_tme = Feature{ .name = "tme", .description = "Enable Transactional Memory Extension", - .llvm_name = "tme", .subfeatures = &[_]*const Feature { }, }; @@ -899,7 +790,6 @@ pub const feature_tme = Feature{ pub const feature_tracev84 = Feature{ .name = "tracev8.4", .description = "Enable v8.4-A Trace extension", - .llvm_name = "tracev8.4", .subfeatures = &[_]*const Feature { }, }; @@ -907,7 +797,6 @@ pub const feature_tracev84 = Feature{ pub const feature_trbe = Feature{ .name = "trbe", .description = "Enable Trace Buffer Extension", - .llvm_name = "trbe", .subfeatures = &[_]*const Feature { }, }; @@ -915,7 +804,6 @@ pub const feature_trbe = Feature{ pub const feature_taggedGlobals = Feature{ .name = "tagged-globals", .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", - .llvm_name = "tagged-globals", .subfeatures = &[_]*const Feature { }, }; @@ -923,7 +811,6 @@ pub const feature_taggedGlobals = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .llvm_name = "use-aa", .subfeatures = &[_]*const Feature { }, }; @@ -931,7 +818,6 @@ pub const feature_useAa = Feature{ pub const feature_tpidrEl1 = Feature{ .name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", - .llvm_name = "tpidr-el1", .subfeatures = &[_]*const Feature { }, }; @@ -939,7 +825,6 @@ pub const feature_tpidrEl1 = Feature{ pub const feature_tpidrEl2 = Feature{ .name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", - .llvm_name = "tpidr-el2", .subfeatures = &[_]*const Feature { }, }; @@ -947,7 +832,6 @@ pub const feature_tpidrEl2 = Feature{ pub const feature_tpidrEl3 = Feature{ .name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", - .llvm_name = "tpidr-el3", .subfeatures = &[_]*const Feature { }, }; @@ -955,7 +839,6 @@ pub const feature_tpidrEl3 = Feature{ pub const feature_useReciprocalSquareRoot = Feature{ .name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", - .llvm_name = "use-reciprocal-square-root", .subfeatures = &[_]*const Feature { }, }; @@ -963,7 +846,6 @@ pub const feature_useReciprocalSquareRoot = Feature{ pub const feature_vh = Feature{ .name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", - .llvm_name = "vh", .subfeatures = &[_]*const Feature { }, }; @@ -971,7 +853,6 @@ pub const feature_vh = Feature{ pub const feature_zcm = Feature{ .name = "zcm", .description = "Has zero-cycle register moves", - .llvm_name = "zcm", .subfeatures = &[_]*const Feature { }, }; @@ -979,7 +860,6 @@ pub const feature_zcm = Feature{ pub const feature_zcz = Feature{ .name = "zcz", .description = "Has zero-cycle zeroing instructions", - .llvm_name = "zcz", .subfeatures = &[_]*const Feature { &feature_zczGp, &feature_zczFp, @@ -989,7 +869,6 @@ pub const feature_zcz = Feature{ pub const feature_zczFp = Feature{ .name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", - .llvm_name = "zcz-fp", .subfeatures = &[_]*const Feature { }, }; @@ -997,7 +876,6 @@ pub const feature_zczFp = Feature{ pub const feature_zczFpWorkaround = Feature{ .name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", - .llvm_name = "zcz-fp-workaround", .subfeatures = &[_]*const Feature { }, }; @@ -1005,7 +883,6 @@ pub const feature_zczFpWorkaround = Feature{ pub const feature_zczGp = Feature{ .name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", - .llvm_name = "zcz-gp", .subfeatures = &[_]*const Feature { }, }; @@ -1013,127 +890,121 @@ pub const feature_zczGp = Feature{ pub const feature_v81a = Feature{ .name = "v8.1a", .description = "Support ARM v8.1a instructions", - .llvm_name = "v8.1a", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_lse, &feature_lor, - &feature_crc, &feature_pan, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_crc, }, }; pub const feature_v82a = Feature{ .name = "v8.2a", .description = "Support ARM v8.2a instructions", - .llvm_name = "v8.2a", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, + &feature_lor, + &feature_pan, &feature_lse, + &feature_rdm, + &feature_vh, &feature_ras, - &feature_lor, &feature_crc, - &feature_pan, &feature_uaops, - &feature_vh, }, }; pub const feature_v83a = Feature{ .name = "v8.3a", .description = "Support ARM v8.3a instructions", - .llvm_name = "v8.3a", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_pa, &feature_ccpp, - &feature_uaops, - &feature_lse, - &feature_fpArmv8, - &feature_ras, &feature_lor, &feature_pan, - &feature_crc, + &feature_lse, + &feature_rdm, + &feature_ras, + &feature_vh, + &feature_fpArmv8, + &feature_uaops, &feature_rcpc, &feature_ccidx, - &feature_vh, + &feature_crc, + &feature_pa, }, }; pub const feature_v84a = Feature{ .name = "v8.4a", .description = "Support ARM v8.4a instructions", - .llvm_name = "v8.4a", .subfeatures = &[_]*const Feature { - &feature_am, - &feature_nv, &feature_ccpp, + &feature_lor, &feature_dotprod, + &feature_fpArmv8, + &feature_crc, + &feature_fmi, + &feature_tracev84, + &feature_tlbRmi, + &feature_rdm, + &feature_ccidx, + &feature_mpam, + &feature_pan, &feature_lse, &feature_rcpc, &feature_uaops, - &feature_ccidx, - &feature_vh, - &feature_tracev84, - &feature_rdm, - &feature_fpArmv8, + &feature_sel2, + &feature_nv, + &feature_am, &feature_dit, - &feature_mpam, + &feature_vh, &feature_ras, - &feature_tlbRmi, - &feature_fmi, - &feature_crc, &feature_pa, - &feature_sel2, - &feature_lor, - &feature_pan, }, }; pub const feature_v85a = Feature{ .name = "v8.5a", .description = "Support ARM v8.5a instructions", - .llvm_name = "v8.5a", .subfeatures = &[_]*const Feature { - &feature_am, - &feature_nv, - &feature_specrestrict, &feature_ccpp, + &feature_lor, &feature_dotprod, - &feature_lse, - &feature_ccdp, + &feature_fpArmv8, + &feature_ssbs, + &feature_crc, + &feature_fmi, + &feature_bti, + &feature_tracev84, + &feature_tlbRmi, + &feature_fptoint, + &feature_rdm, &feature_sb, - &feature_rcpc, &feature_ccidx, - &feature_uaops, - &feature_vh, - &feature_altnzcv, - &feature_tracev84, - &feature_rdm, - &feature_ssbs, - &feature_fpArmv8, - &feature_dit, &feature_mpam, - &feature_ras, - &feature_tlbRmi, - &feature_fmi, - &feature_crc, + &feature_pan, + &feature_lse, &feature_predres, - &feature_pa, + &feature_rcpc, + &feature_uaops, &feature_sel2, - &feature_lor, - &feature_fptoint, - &feature_bti, - &feature_pan, + &feature_nv, + &feature_am, + &feature_dit, + &feature_specrestrict, + &feature_vh, + &feature_altnzcv, + &feature_ras, + &feature_ccdp, + &feature_pa, }, }; pub const feature_a35 = Feature{ .name = "a35", .description = "Cortex-A35 ARM processors", - .llvm_name = "a35", .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_perfmon, @@ -1144,15 +1015,14 @@ pub const feature_a35 = Feature{ pub const feature_a53 = Feature{ .name = "a53", .description = "Cortex-A53 ARM processors", - .llvm_name = "a53", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, - &feature_fuseAes, + &feature_useAa, &feature_balanceFpOps, - &feature_fpArmv8, + &feature_fuseAes, + &feature_usePostraScheduler, &feature_perfmon, - &feature_useAa, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_crc, }, }; @@ -1160,38 +1030,36 @@ pub const feature_a53 = Feature{ pub const feature_a55 = Feature{ .name = "a55", .description = "Cortex-A55 ARM processors", - .llvm_name = "a55", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_fuseAes, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_perfmon, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, + &feature_crc, }, }; pub const feature_a57 = Feature{ .name = "a57", .description = "Cortex-A57 ARM processors", - .llvm_name = "a57", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, - &feature_fuseAes, + &feature_fuseLiterals, &feature_balanceFpOps, - &feature_fpArmv8, - &feature_perfmon, &feature_predictableSelectExpensive, - &feature_fuseLiterals, + &feature_fuseAes, + &feature_usePostraScheduler, + &feature_perfmon, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_crc, }, }; @@ -1199,352 +1067,335 @@ pub const feature_a57 = Feature{ pub const feature_a65 = Feature{ .name = "a65", .description = "Cortex-A65 ARM processors", - .llvm_name = "a65", .subfeatures = &[_]*const Feature { - &feature_rdm, + &feature_rcpc, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_ras, &feature_ssbs, + &feature_crc, }, }; pub const feature_a72 = Feature{ .name = "a72", .description = "Cortex-A72 ARM processors", - .llvm_name = "a72", .subfeatures = &[_]*const Feature { &feature_fpArmv8, - &feature_perfmon, - &feature_crc, &feature_fuseAes, + &feature_crc, + &feature_perfmon, }, }; pub const feature_a73 = Feature{ .name = "a73", .description = "Cortex-A73 ARM processors", - .llvm_name = "a73", .subfeatures = &[_]*const Feature { &feature_fpArmv8, - &feature_perfmon, - &feature_crc, &feature_fuseAes, + &feature_crc, + &feature_perfmon, }, }; pub const feature_a75 = Feature{ .name = "a75", .description = "Cortex-A75 ARM processors", - .llvm_name = "a75", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_fuseAes, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_perfmon, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, + &feature_crc, }, }; pub const feature_a76 = Feature{ .name = "a76", .description = "Cortex-A76 ARM processors", - .llvm_name = "a76", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, }, }; pub const feature_cyclone = Feature{ .name = "cyclone", .description = "Cyclone", - .llvm_name = "cyclone", .subfeatures = &[_]*const Feature { - &feature_zczGp, - &feature_arithBccFusion, - &feature_fuseAes, - &feature_zczFp, &feature_zczFpWorkaround, - &feature_fpArmv8, - &feature_perfmon, - &feature_disableLatencySchedHeuristic, + &feature_fuseAes, &feature_zcm, &feature_arithCbzFusion, - &feature_fuseCryptoEor, + &feature_perfmon, &feature_alternateSextloadCvtF32Pattern, + &feature_arithBccFusion, + &feature_disableLatencySchedHeuristic, + &feature_zczGp, + &feature_fuseCryptoEor, + &feature_fpArmv8, + &feature_zczFp, }, }; pub const feature_exynosm1 = Feature{ .name = "exynosm1", .description = "Samsung Exynos-M1 processors", - .llvm_name = "exynosm1", .subfeatures = &[_]*const Feature { + &feature_useReciprocalSquareRoot, + &feature_fuseAes, &feature_usePostraScheduler, &feature_slowMisaligned128store, - &feature_customCheapAsMove, - &feature_fuseAes, - &feature_zczFp, - &feature_fpArmv8, &feature_perfmon, - &feature_slowPaired128, - &feature_useReciprocalSquareRoot, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, + &feature_slowPaired128, }, }; pub const feature_exynosm2 = Feature{ .name = "exynosm2", .description = "Samsung Exynos-M2 processors", - .llvm_name = "exynosm2", .subfeatures = &[_]*const Feature { + &feature_fuseAes, &feature_usePostraScheduler, &feature_slowMisaligned128store, - &feature_customCheapAsMove, - &feature_fuseAes, - &feature_zczFp, - &feature_fpArmv8, &feature_perfmon, - &feature_slowPaired128, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, + &feature_slowPaired128, }, }; pub const feature_exynosm3 = Feature{ .name = "exynosm3", .description = "Samsung Exynos-M3 processors", - .llvm_name = "exynosm3", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, + &feature_fuseLiterals, + &feature_predictableSelectExpensive, &feature_fuseAes, &feature_fuseAddress, - &feature_zczFp, - &feature_fpArmv8, + &feature_fuseCsel, + &feature_usePostraScheduler, &feature_perfmon, - &feature_predictableSelectExpensive, - &feature_fuseLiterals, + &feature_fpArmv8, + &feature_customCheapAsMove, + &feature_lslFast, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, - &feature_lslFast, - &feature_fuseCsel, }, }; pub const feature_exynosm4 = Feature{ .name = "exynosm4", .description = "Samsung Exynos-M4 processors", - .llvm_name = "exynosm4", .subfeatures = &[_]*const Feature { + &feature_fuseLiterals, + &feature_fuseAes, &feature_ccpp, - &feature_perfmon, + &feature_lor, &feature_dotprod, - &feature_fuseArithLogic, - &feature_force32bitJumpTables, - &feature_lslFast, - &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, - &feature_fuseAes, + &feature_lslFast, + &feature_crc, &feature_fuseAddress, - &feature_lse, &feature_arithCbzFusion, - &feature_uaops, + &feature_perfmon, + &feature_arithBccFusion, + &feature_zczGp, + &feature_rdm, + &feature_force32bitJumpTables, + &feature_pan, + &feature_lse, &feature_fuseCsel, + &feature_uaops, + &feature_fuseArithLogic, + &feature_usePostraScheduler, &feature_vh, - &feature_rdm, - &feature_fpArmv8, &feature_ras, - &feature_fuseLiterals, - &feature_crc, - &feature_usePostraScheduler, - &feature_arithBccFusion, &feature_zczFp, - &feature_lor, - &feature_pan, }, }; pub const feature_falkor = Feature{ .name = "falkor", .description = "Qualcomm Falkor processors", - .llvm_name = "falkor", .subfeatures = &[_]*const Feature { - &feature_rdm, + &feature_predictableSelectExpensive, &feature_usePostraScheduler, - &feature_zczGp, + &feature_perfmon, &feature_slowStrqroStore, + &feature_rdm, + &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, + &feature_lslFast, &feature_zczFp, - &feature_fpArmv8, - &feature_perfmon, - &feature_predictableSelectExpensive, &feature_crc, - &feature_lslFast, }, }; pub const feature_kryo = Feature{ .name = "kryo", .description = "Qualcomm Kryo processors", - .llvm_name = "kryo", .subfeatures = &[_]*const Feature { + &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_perfmon, &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, + &feature_lslFast, &feature_zczFp, - &feature_fpArmv8, - &feature_perfmon, - &feature_predictableSelectExpensive, &feature_crc, - &feature_lslFast, }, }; pub const feature_neoversee1 = Feature{ .name = "neoversee1", .description = "Neoverse E1 ARM processors", - .llvm_name = "neoversee1", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, }, }; pub const feature_neoversen1 = Feature{ .name = "neoversen1", .description = "Neoverse N1 ARM processors", - .llvm_name = "neoversen1", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_spe, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, }, }; pub const feature_saphira = Feature{ .name = "saphira", .description = "Qualcomm Saphira processors", - .llvm_name = "saphira", .subfeatures = &[_]*const Feature { - &feature_am, - &feature_nv, &feature_ccpp, - &feature_predictableSelectExpensive, - &feature_perfmon, + &feature_lor, &feature_dotprod, - &feature_spe, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_lslFast, + &feature_crc, + &feature_fmi, + &feature_predictableSelectExpensive, + &feature_tracev84, + &feature_tlbRmi, + &feature_perfmon, &feature_zczGp, - &feature_customCheapAsMove, + &feature_rdm, + &feature_ccidx, + &feature_mpam, + &feature_pan, &feature_lse, &feature_rcpc, &feature_uaops, - &feature_ccidx, - &feature_vh, - &feature_tracev84, - &feature_rdm, - &feature_fpArmv8, + &feature_sel2, + &feature_usePostraScheduler, + &feature_nv, + &feature_am, + &feature_spe, &feature_dit, - &feature_mpam, + &feature_vh, &feature_ras, - &feature_tlbRmi, - &feature_fmi, - &feature_crc, - &feature_usePostraScheduler, - &feature_pa, &feature_zczFp, - &feature_sel2, - &feature_lor, - &feature_pan, + &feature_pa, }, }; pub const feature_tsv110 = Feature{ .name = "tsv110", .description = "HiSilicon TS-V110 processors", - .llvm_name = "tsv110", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_usePostraScheduler, - &feature_customCheapAsMove, &feature_fuseAes, + &feature_usePostraScheduler, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_uaops, + &feature_perfmon, &feature_spe, - &feature_crc, &feature_pan, - &feature_uaops, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_fpArmv8, + &feature_customCheapAsMove, + &feature_ras, + &feature_crc, }, }; pub const feature_thunderx = Feature{ .name = "thunderx", .description = "Cavium ThunderX processors", - .llvm_name = "thunderx", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, }, }; @@ -1552,31 +1403,29 @@ pub const feature_thunderx = Feature{ pub const feature_thunderx2t99 = Feature{ .name = "thunderx2t99", .description = "Cavium ThunderX2 processors", - .llvm_name = "thunderx2t99", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_usePostraScheduler, - &feature_arithBccFusion, - &feature_lse, - &feature_fpArmv8, &feature_predictableSelectExpensive, + &feature_usePostraScheduler, &feature_lor, - &feature_crc, + &feature_lse, &feature_pan, + &feature_arithBccFusion, + &feature_rdm, &feature_aggressiveFma, &feature_vh, + &feature_fpArmv8, + &feature_crc, }, }; pub const feature_thunderxt81 = Feature{ .name = "thunderxt81", .description = "Cavium ThunderX processors", - .llvm_name = "thunderxt81", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, }, }; @@ -1584,12 +1433,11 @@ pub const feature_thunderxt81 = Feature{ pub const feature_thunderxt83 = Feature{ .name = "thunderxt83", .description = "Cavium ThunderX processors", - .llvm_name = "thunderxt83", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, }, }; @@ -1597,12 +1445,11 @@ pub const feature_thunderxt83 = Feature{ pub const feature_thunderxt88 = Feature{ .name = "thunderxt88", .description = "Cavium ThunderX processors", - .llvm_name = "thunderxt88", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, }, }; @@ -1767,18 +1614,18 @@ pub const cpu_appleLatest = Cpu{ .name = "apple-latest", .llvm_name = "apple-latest", .subfeatures = &[_]*const Feature { - &feature_zczGp, - &feature_arithBccFusion, - &feature_fuseAes, - &feature_zczFp, &feature_zczFpWorkaround, - &feature_fpArmv8, - &feature_perfmon, - &feature_disableLatencySchedHeuristic, + &feature_fuseAes, &feature_zcm, &feature_arithCbzFusion, - &feature_fuseCryptoEor, + &feature_perfmon, &feature_alternateSextloadCvtF32Pattern, + &feature_arithBccFusion, + &feature_disableLatencySchedHeuristic, + &feature_zczGp, + &feature_fuseCryptoEor, + &feature_fpArmv8, + &feature_zczFp, &feature_cyclone, }, }; @@ -1798,13 +1645,13 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, - &feature_fuseAes, + &feature_useAa, &feature_balanceFpOps, - &feature_fpArmv8, + &feature_fuseAes, + &feature_usePostraScheduler, &feature_perfmon, - &feature_useAa, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_crc, &feature_a53, }, @@ -1814,20 +1661,20 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_fuseAes, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_perfmon, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, + &feature_crc, &feature_a55, }, }; @@ -1836,14 +1683,14 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, - &feature_fuseAes, + &feature_fuseLiterals, &feature_balanceFpOps, - &feature_fpArmv8, - &feature_perfmon, &feature_predictableSelectExpensive, - &feature_fuseLiterals, + &feature_fuseAes, + &feature_usePostraScheduler, + &feature_perfmon, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_crc, &feature_a57, }, @@ -1853,19 +1700,19 @@ pub const cpu_cortexA65 = Cpu{ .name = "cortex-a65", .llvm_name = "cortex-a65", .subfeatures = &[_]*const Feature { - &feature_rdm, + &feature_rcpc, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_ras, &feature_ssbs, + &feature_crc, &feature_a65, }, }; @@ -1874,19 +1721,19 @@ pub const cpu_cortexA65ae = Cpu{ .name = "cortex-a65ae", .llvm_name = "cortex-a65ae", .subfeatures = &[_]*const Feature { - &feature_rdm, + &feature_rcpc, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_ras, &feature_ssbs, + &feature_crc, &feature_a65, }, }; @@ -1896,9 +1743,9 @@ pub const cpu_cortexA72 = Cpu{ .llvm_name = "cortex-a72", .subfeatures = &[_]*const Feature { &feature_fpArmv8, - &feature_perfmon, - &feature_crc, &feature_fuseAes, + &feature_crc, + &feature_perfmon, &feature_a72, }, }; @@ -1908,9 +1755,9 @@ pub const cpu_cortexA73 = Cpu{ .llvm_name = "cortex-a73", .subfeatures = &[_]*const Feature { &feature_fpArmv8, - &feature_perfmon, - &feature_crc, &feature_fuseAes, + &feature_crc, + &feature_perfmon, &feature_a73, }, }; @@ -1919,20 +1766,20 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_fuseAes, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_perfmon, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, + &feature_crc, &feature_a75, }, }; @@ -1941,19 +1788,19 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, &feature_a76, }, }; @@ -1962,19 +1809,19 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, &feature_a76, }, }; @@ -1983,18 +1830,18 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .subfeatures = &[_]*const Feature { - &feature_zczGp, - &feature_arithBccFusion, - &feature_fuseAes, - &feature_zczFp, &feature_zczFpWorkaround, - &feature_fpArmv8, - &feature_perfmon, - &feature_disableLatencySchedHeuristic, + &feature_fuseAes, &feature_zcm, &feature_arithCbzFusion, - &feature_fuseCryptoEor, + &feature_perfmon, &feature_alternateSextloadCvtF32Pattern, + &feature_arithBccFusion, + &feature_disableLatencySchedHeuristic, + &feature_zczGp, + &feature_fuseCryptoEor, + &feature_fpArmv8, + &feature_zczFp, &feature_cyclone, }, }; @@ -2003,17 +1850,17 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", .subfeatures = &[_]*const Feature { + &feature_useReciprocalSquareRoot, + &feature_fuseAes, &feature_usePostraScheduler, &feature_slowMisaligned128store, - &feature_customCheapAsMove, - &feature_fuseAes, - &feature_zczFp, - &feature_fpArmv8, &feature_perfmon, - &feature_slowPaired128, - &feature_useReciprocalSquareRoot, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, + &feature_slowPaired128, &feature_exynosm1, }, }; @@ -2022,16 +1869,16 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .subfeatures = &[_]*const Feature { + &feature_fuseAes, &feature_usePostraScheduler, &feature_slowMisaligned128store, - &feature_customCheapAsMove, - &feature_fuseAes, - &feature_zczFp, - &feature_fpArmv8, &feature_perfmon, - &feature_slowPaired128, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, + &feature_slowPaired128, &feature_exynosm2, }, }; @@ -2040,19 +1887,19 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_customCheapAsMove, + &feature_fuseLiterals, + &feature_predictableSelectExpensive, &feature_fuseAes, &feature_fuseAddress, - &feature_zczFp, - &feature_fpArmv8, + &feature_fuseCsel, + &feature_usePostraScheduler, &feature_perfmon, - &feature_predictableSelectExpensive, - &feature_fuseLiterals, + &feature_fpArmv8, + &feature_customCheapAsMove, + &feature_lslFast, &feature_force32bitJumpTables, + &feature_zczFp, &feature_crc, - &feature_lslFast, - &feature_fuseCsel, &feature_exynosm3, }, }; @@ -2061,31 +1908,31 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", .subfeatures = &[_]*const Feature { + &feature_fuseLiterals, + &feature_fuseAes, &feature_ccpp, - &feature_perfmon, + &feature_lor, &feature_dotprod, - &feature_fuseArithLogic, - &feature_force32bitJumpTables, - &feature_lslFast, - &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, - &feature_fuseAes, + &feature_lslFast, + &feature_crc, &feature_fuseAddress, - &feature_lse, &feature_arithCbzFusion, - &feature_uaops, + &feature_perfmon, + &feature_arithBccFusion, + &feature_zczGp, + &feature_rdm, + &feature_force32bitJumpTables, + &feature_pan, + &feature_lse, &feature_fuseCsel, + &feature_uaops, + &feature_fuseArithLogic, + &feature_usePostraScheduler, &feature_vh, - &feature_rdm, - &feature_fpArmv8, &feature_ras, - &feature_fuseLiterals, - &feature_crc, - &feature_usePostraScheduler, - &feature_arithBccFusion, &feature_zczFp, - &feature_lor, - &feature_pan, &feature_exynosm4, }, }; @@ -2094,31 +1941,31 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", .subfeatures = &[_]*const Feature { + &feature_fuseLiterals, + &feature_fuseAes, &feature_ccpp, - &feature_perfmon, + &feature_lor, &feature_dotprod, - &feature_fuseArithLogic, - &feature_force32bitJumpTables, - &feature_lslFast, - &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, - &feature_fuseAes, + &feature_lslFast, + &feature_crc, &feature_fuseAddress, - &feature_lse, &feature_arithCbzFusion, - &feature_uaops, + &feature_perfmon, + &feature_arithBccFusion, + &feature_zczGp, + &feature_rdm, + &feature_force32bitJumpTables, + &feature_pan, + &feature_lse, &feature_fuseCsel, + &feature_uaops, + &feature_fuseArithLogic, + &feature_usePostraScheduler, &feature_vh, - &feature_rdm, - &feature_fpArmv8, &feature_ras, - &feature_fuseLiterals, - &feature_crc, - &feature_usePostraScheduler, - &feature_arithBccFusion, &feature_zczFp, - &feature_lor, - &feature_pan, &feature_exynosm4, }, }; @@ -2127,17 +1974,17 @@ pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .subfeatures = &[_]*const Feature { - &feature_rdm, + &feature_predictableSelectExpensive, &feature_usePostraScheduler, - &feature_zczGp, + &feature_perfmon, &feature_slowStrqroStore, + &feature_rdm, + &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, + &feature_lslFast, &feature_zczFp, - &feature_fpArmv8, - &feature_perfmon, - &feature_predictableSelectExpensive, &feature_crc, - &feature_lslFast, &feature_falkor, }, }; @@ -2160,15 +2007,15 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .subfeatures = &[_]*const Feature { + &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_perfmon, &feature_zczGp, + &feature_fpArmv8, &feature_customCheapAsMove, + &feature_lslFast, &feature_zczFp, - &feature_fpArmv8, - &feature_perfmon, - &feature_predictableSelectExpensive, &feature_crc, - &feature_lslFast, &feature_kryo, }, }; @@ -2177,19 +2024,19 @@ pub const cpu_neoverseE1 = Cpu{ .name = "neoverse-e1", .llvm_name = "neoverse-e1", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, &feature_neoversee1, }, }; @@ -2198,20 +2045,20 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .subfeatures = &[_]*const Feature { - &feature_rdm, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, &feature_spe, &feature_pan, - &feature_crc, - &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_rdm, + &feature_ras, &feature_vh, + &feature_fpArmv8, + &feature_uaops, + &feature_rcpc, &feature_ssbs, + &feature_crc, &feature_neoversen1, }, }; @@ -2220,36 +2067,36 @@ pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .subfeatures = &[_]*const Feature { - &feature_am, - &feature_nv, &feature_ccpp, - &feature_predictableSelectExpensive, - &feature_perfmon, + &feature_lor, &feature_dotprod, - &feature_spe, + &feature_fpArmv8, + &feature_customCheapAsMove, &feature_lslFast, + &feature_crc, + &feature_fmi, + &feature_predictableSelectExpensive, + &feature_tracev84, + &feature_tlbRmi, + &feature_perfmon, &feature_zczGp, - &feature_customCheapAsMove, + &feature_rdm, + &feature_ccidx, + &feature_mpam, + &feature_pan, &feature_lse, &feature_rcpc, &feature_uaops, - &feature_ccidx, - &feature_vh, - &feature_tracev84, - &feature_rdm, - &feature_fpArmv8, + &feature_sel2, + &feature_usePostraScheduler, + &feature_nv, + &feature_am, + &feature_spe, &feature_dit, - &feature_mpam, + &feature_vh, &feature_ras, - &feature_tlbRmi, - &feature_fmi, - &feature_crc, - &feature_usePostraScheduler, - &feature_pa, &feature_zczFp, - &feature_sel2, - &feature_lor, - &feature_pan, + &feature_pa, &feature_saphira, }, }; @@ -2258,10 +2105,10 @@ pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, &feature_thunderx, }, @@ -2271,17 +2118,17 @@ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_usePostraScheduler, - &feature_arithBccFusion, - &feature_lse, - &feature_fpArmv8, &feature_predictableSelectExpensive, + &feature_usePostraScheduler, &feature_lor, - &feature_crc, + &feature_lse, &feature_pan, + &feature_arithBccFusion, + &feature_rdm, &feature_aggressiveFma, &feature_vh, + &feature_fpArmv8, + &feature_crc, &feature_thunderx2t99, }, }; @@ -2290,10 +2137,10 @@ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, &feature_thunderxt81, }, @@ -2303,10 +2150,10 @@ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, &feature_thunderxt83, }, @@ -2316,10 +2163,10 @@ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, &feature_predictableSelectExpensive, - &feature_fpArmv8, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, &feature_crc, &feature_thunderxt88, }, @@ -2329,22 +2176,22 @@ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .subfeatures = &[_]*const Feature { - &feature_rdm, - &feature_usePostraScheduler, - &feature_customCheapAsMove, &feature_fuseAes, + &feature_usePostraScheduler, &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_perfmon, - &feature_ras, - &feature_dotprod, &feature_lor, + &feature_dotprod, + &feature_uaops, + &feature_perfmon, &feature_spe, - &feature_crc, &feature_pan, - &feature_uaops, + &feature_lse, + &feature_rdm, &feature_vh, + &feature_fpArmv8, + &feature_customCheapAsMove, + &feature_ras, + &feature_crc, &feature_tsv110, }, }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 80563b4d02a289ab8c9f34805d99e714dedce379..e6eec35ab3d6c4635c12e1ab3ac3e2d33ec579b6 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_BitInsts16 = Feature{ .name = "16-bit-insts", .description = "Has i16/f16 instructions", - .llvm_name = "16-bit-insts", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_BitInsts16 = Feature{ pub const feature_addNoCarryInsts = Feature{ .name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", - .llvm_name = "add-no-carry-insts", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_addNoCarryInsts = Feature{ pub const feature_apertureRegs = Feature{ .name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", - .llvm_name = "aperture-regs", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_apertureRegs = Feature{ pub const feature_atomicFaddInsts = Feature{ .name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .llvm_name = "atomic-fadd-insts", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_atomicFaddInsts = Feature{ pub const feature_autoWaitcntBeforeBarrier = Feature{ .name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", - .llvm_name = "auto-waitcnt-before-barrier", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{ pub const feature_ciInsts = Feature{ .name = "ci-insts", .description = "Additional instructions for CI+", - .llvm_name = "ci-insts", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_ciInsts = Feature{ pub const feature_codeObjectV3 = Feature{ .name = "code-object-v3", .description = "Generate code object version 3", - .llvm_name = "code-object-v3", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_codeObjectV3 = Feature{ pub const feature_cumode = Feature{ .name = "cumode", .description = "Enable CU wavefront execution mode", - .llvm_name = "cumode", .subfeatures = &[_]*const Feature { }, }; @@ -68,7 +60,6 @@ pub const feature_cumode = Feature{ pub const feature_dlInsts = Feature{ .name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .llvm_name = "dl-insts", .subfeatures = &[_]*const Feature { }, }; @@ -76,7 +67,6 @@ pub const feature_dlInsts = Feature{ pub const feature_dpp = Feature{ .name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", - .llvm_name = "dpp", .subfeatures = &[_]*const Feature { }, }; @@ -84,7 +74,6 @@ pub const feature_dpp = Feature{ pub const feature_dpp8 = Feature{ .name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", - .llvm_name = "dpp8", .subfeatures = &[_]*const Feature { }, }; @@ -92,7 +81,6 @@ pub const feature_dpp8 = Feature{ pub const feature_noSramEccSupport = Feature{ .name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", - .llvm_name = "no-sram-ecc-support", .subfeatures = &[_]*const Feature { }, }; @@ -100,7 +88,6 @@ pub const feature_noSramEccSupport = Feature{ pub const feature_noXnackSupport = Feature{ .name = "no-xnack-support", .description = "Hardware does not support XNACK", - .llvm_name = "no-xnack-support", .subfeatures = &[_]*const Feature { }, }; @@ -108,7 +95,6 @@ pub const feature_noXnackSupport = Feature{ pub const feature_dot1Insts = Feature{ .name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .llvm_name = "dot1-insts", .subfeatures = &[_]*const Feature { }, }; @@ -116,7 +102,6 @@ pub const feature_dot1Insts = Feature{ pub const feature_dot2Insts = Feature{ .name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .llvm_name = "dot2-insts", .subfeatures = &[_]*const Feature { }, }; @@ -124,7 +109,6 @@ pub const feature_dot2Insts = Feature{ pub const feature_dot3Insts = Feature{ .name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", - .llvm_name = "dot3-insts", .subfeatures = &[_]*const Feature { }, }; @@ -132,7 +116,6 @@ pub const feature_dot3Insts = Feature{ pub const feature_dot4Insts = Feature{ .name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", - .llvm_name = "dot4-insts", .subfeatures = &[_]*const Feature { }, }; @@ -140,7 +123,6 @@ pub const feature_dot4Insts = Feature{ pub const feature_dot5Insts = Feature{ .name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", - .llvm_name = "dot5-insts", .subfeatures = &[_]*const Feature { }, }; @@ -148,7 +130,6 @@ pub const feature_dot5Insts = Feature{ pub const feature_dot6Insts = Feature{ .name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", - .llvm_name = "dot6-insts", .subfeatures = &[_]*const Feature { }, }; @@ -156,7 +137,6 @@ pub const feature_dot6Insts = Feature{ pub const feature_DumpCode = Feature{ .name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", - .llvm_name = "DumpCode", .subfeatures = &[_]*const Feature { }, }; @@ -164,7 +144,6 @@ pub const feature_DumpCode = Feature{ pub const feature_dumpcode = Feature{ .name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", - .llvm_name = "dumpcode", .subfeatures = &[_]*const Feature { }, }; @@ -172,7 +151,6 @@ pub const feature_dumpcode = Feature{ pub const feature_enableDs128 = Feature{ .name = "enable-ds128", .description = "Use ds_{read|write}_b128", - .llvm_name = "enable-ds128", .subfeatures = &[_]*const Feature { }, }; @@ -180,7 +158,6 @@ pub const feature_enableDs128 = Feature{ pub const feature_loadStoreOpt = Feature{ .name = "load-store-opt", .description = "Enable SI load/store optimizer pass", - .llvm_name = "load-store-opt", .subfeatures = &[_]*const Feature { }, }; @@ -188,7 +165,6 @@ pub const feature_loadStoreOpt = Feature{ pub const feature_enablePrtStrictNull = Feature{ .name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", - .llvm_name = "enable-prt-strict-null", .subfeatures = &[_]*const Feature { }, }; @@ -196,7 +172,6 @@ pub const feature_enablePrtStrictNull = Feature{ pub const feature_siScheduler = Feature{ .name = "si-scheduler", .description = "Enable SI Machine Scheduler", - .llvm_name = "si-scheduler", .subfeatures = &[_]*const Feature { }, }; @@ -204,7 +179,6 @@ pub const feature_siScheduler = Feature{ pub const feature_unsafeDsOffsetFolding = Feature{ .name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", - .llvm_name = "unsafe-ds-offset-folding", .subfeatures = &[_]*const Feature { }, }; @@ -212,7 +186,6 @@ pub const feature_unsafeDsOffsetFolding = Feature{ pub const feature_fmaf = Feature{ .name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .llvm_name = "fmaf", .subfeatures = &[_]*const Feature { }, }; @@ -220,7 +193,6 @@ pub const feature_fmaf = Feature{ pub const feature_fp16Denormals = Feature{ .name = "fp16-denormals", .description = "Enable half precision denormal handling", - .llvm_name = "fp16-denormals", .subfeatures = &[_]*const Feature { &feature_fp64, }, @@ -229,7 +201,6 @@ pub const feature_fp16Denormals = Feature{ pub const feature_fp32Denormals = Feature{ .name = "fp32-denormals", .description = "Enable single precision denormal handling", - .llvm_name = "fp32-denormals", .subfeatures = &[_]*const Feature { }, }; @@ -237,7 +208,6 @@ pub const feature_fp32Denormals = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", .description = "Enable double precision operations", - .llvm_name = "fp64", .subfeatures = &[_]*const Feature { }, }; @@ -245,7 +215,6 @@ pub const feature_fp64 = Feature{ pub const feature_fp64Denormals = Feature{ .name = "fp64-denormals", .description = "Enable double and half precision denormal handling", - .llvm_name = "fp64-denormals", .subfeatures = &[_]*const Feature { &feature_fp64, }, @@ -254,7 +223,6 @@ pub const feature_fp64Denormals = Feature{ pub const feature_fp64Fp16Denormals = Feature{ .name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", - .llvm_name = "fp64-fp16-denormals", .subfeatures = &[_]*const Feature { &feature_fp64, }, @@ -263,7 +231,6 @@ pub const feature_fp64Fp16Denormals = Feature{ pub const feature_fpExceptions = Feature{ .name = "fp-exceptions", .description = "Enable floating point exceptions", - .llvm_name = "fp-exceptions", .subfeatures = &[_]*const Feature { }, }; @@ -271,7 +238,6 @@ pub const feature_fpExceptions = Feature{ pub const feature_fastFmaf = Feature{ .name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", - .llvm_name = "fast-fmaf", .subfeatures = &[_]*const Feature { }, }; @@ -279,7 +245,6 @@ pub const feature_fastFmaf = Feature{ pub const feature_flatAddressSpace = Feature{ .name = "flat-address-space", .description = "Support flat address space", - .llvm_name = "flat-address-space", .subfeatures = &[_]*const Feature { }, }; @@ -287,7 +252,6 @@ pub const feature_flatAddressSpace = Feature{ pub const feature_flatForGlobal = Feature{ .name = "flat-for-global", .description = "Force to generate flat instruction for global", - .llvm_name = "flat-for-global", .subfeatures = &[_]*const Feature { }, }; @@ -295,7 +259,6 @@ pub const feature_flatForGlobal = Feature{ pub const feature_flatGlobalInsts = Feature{ .name = "flat-global-insts", .description = "Have global_* flat memory instructions", - .llvm_name = "flat-global-insts", .subfeatures = &[_]*const Feature { }, }; @@ -303,7 +266,6 @@ pub const feature_flatGlobalInsts = Feature{ pub const feature_flatInstOffsets = Feature{ .name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", - .llvm_name = "flat-inst-offsets", .subfeatures = &[_]*const Feature { }, }; @@ -311,7 +273,6 @@ pub const feature_flatInstOffsets = Feature{ pub const feature_flatScratchInsts = Feature{ .name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", - .llvm_name = "flat-scratch-insts", .subfeatures = &[_]*const Feature { }, }; @@ -319,7 +280,6 @@ pub const feature_flatScratchInsts = Feature{ pub const feature_flatSegmentOffsetBug = Feature{ .name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", - .llvm_name = "flat-segment-offset-bug", .subfeatures = &[_]*const Feature { }, }; @@ -327,7 +287,6 @@ pub const feature_flatSegmentOffsetBug = Feature{ pub const feature_fmaMixInsts = Feature{ .name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .llvm_name = "fma-mix-insts", .subfeatures = &[_]*const Feature { }, }; @@ -335,7 +294,6 @@ pub const feature_fmaMixInsts = Feature{ pub const feature_gcn3Encoding = Feature{ .name = "gcn3-encoding", .description = "Encoding format for VI", - .llvm_name = "gcn3-encoding", .subfeatures = &[_]*const Feature { }, }; @@ -343,7 +301,6 @@ pub const feature_gcn3Encoding = Feature{ pub const feature_gfx7Gfx8Gfx9Insts = Feature{ .name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", - .llvm_name = "gfx7-gfx8-gfx9-insts", .subfeatures = &[_]*const Feature { }, }; @@ -351,7 +308,6 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{ pub const feature_gfx8Insts = Feature{ .name = "gfx8-insts", .description = "Additional instructions for GFX8+", - .llvm_name = "gfx8-insts", .subfeatures = &[_]*const Feature { }, }; @@ -359,45 +315,43 @@ pub const feature_gfx8Insts = Feature{ pub const feature_gfx9 = Feature{ .name = "gfx9", .description = "GFX9 GPU generation", - .llvm_name = "gfx9", .subfeatures = &[_]*const Feature { - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, }, }; pub const feature_gfx9Insts = Feature{ .name = "gfx9-insts", .description = "Additional instructions for GFX9+", - .llvm_name = "gfx9-insts", .subfeatures = &[_]*const Feature { }, }; @@ -405,49 +359,47 @@ pub const feature_gfx9Insts = Feature{ pub const feature_gfx10 = Feature{ .name = "gfx10", .description = "GFX10 GPU generation", - .llvm_name = "gfx10", .subfeatures = &[_]*const Feature { - &feature_movrel, - &feature_gfx9Insts, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_noSdstCmpx, - &feature_fmaMixInsts, - &feature_sdwa, - &feature_localmemorysize65536, - &feature_sdwaScalar, + &feature_registerBanking, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_sdwaSdst, + &feature_ciInsts, &feature_apertureRegs, + &feature_intClampInsts, &feature_flatScratchInsts, + &feature_sdwaScalar, + &feature_fastFmaf, + &feature_pkFmacF16Inst, &feature_vscnt, - &feature_noDataDepHazard, + &feature_movrel, + &feature_fmaMixInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_sdwaOmod, + &feature_vop3Literal, + &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_addNoCarryInsts, + &feature_noDataDepHazard, + &feature_flatInstOffsets, &feature_inv2piInlineImm, - &feature_fp64, - &feature_dpp8, - &feature_BitInsts16, - &feature_registerBanking, - &feature_gfx8Insts, + &feature_gfx9Insts, &feature_flatGlobalInsts, - &feature_flatInstOffsets, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_fastFmaf, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_gfx10Insts, + &feature_BitInsts16, + &feature_noSdstCmpx, }, }; pub const feature_gfx10Insts = Feature{ .name = "gfx10-insts", .description = "Additional instructions for GFX10+", - .llvm_name = "gfx10-insts", .subfeatures = &[_]*const Feature { }, }; @@ -455,7 +407,6 @@ pub const feature_gfx10Insts = Feature{ pub const feature_instFwdPrefetchBug = Feature{ .name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", - .llvm_name = "inst-fwd-prefetch-bug", .subfeatures = &[_]*const Feature { }, }; @@ -463,7 +414,6 @@ pub const feature_instFwdPrefetchBug = Feature{ pub const feature_intClampInsts = Feature{ .name = "int-clamp-insts", .description = "Support clamp for integer destination", - .llvm_name = "int-clamp-insts", .subfeatures = &[_]*const Feature { }, }; @@ -471,7 +421,6 @@ pub const feature_intClampInsts = Feature{ pub const feature_inv2piInlineImm = Feature{ .name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", - .llvm_name = "inv-2pi-inline-imm", .subfeatures = &[_]*const Feature { }, }; @@ -479,7 +428,6 @@ pub const feature_inv2piInlineImm = Feature{ pub const feature_ldsbankcount16 = Feature{ .name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", - .llvm_name = "ldsbankcount16", .subfeatures = &[_]*const Feature { }, }; @@ -487,7 +435,6 @@ pub const feature_ldsbankcount16 = Feature{ pub const feature_ldsbankcount32 = Feature{ .name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", - .llvm_name = "ldsbankcount32", .subfeatures = &[_]*const Feature { }, }; @@ -495,7 +442,6 @@ pub const feature_ldsbankcount32 = Feature{ pub const feature_ldsBranchVmemWarHazard = Feature{ .name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .llvm_name = "lds-branch-vmem-war-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -503,7 +449,6 @@ pub const feature_ldsBranchVmemWarHazard = Feature{ pub const feature_ldsMisalignedBug = Feature{ .name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .llvm_name = "lds-misaligned-bug", .subfeatures = &[_]*const Feature { }, }; @@ -511,7 +456,6 @@ pub const feature_ldsMisalignedBug = Feature{ pub const feature_localmemorysize0 = Feature{ .name = "localmemorysize0", .description = "The size of local memory in bytes", - .llvm_name = "localmemorysize0", .subfeatures = &[_]*const Feature { }, }; @@ -519,7 +463,6 @@ pub const feature_localmemorysize0 = Feature{ pub const feature_localmemorysize32768 = Feature{ .name = "localmemorysize32768", .description = "The size of local memory in bytes", - .llvm_name = "localmemorysize32768", .subfeatures = &[_]*const Feature { }, }; @@ -527,7 +470,6 @@ pub const feature_localmemorysize32768 = Feature{ pub const feature_localmemorysize65536 = Feature{ .name = "localmemorysize65536", .description = "The size of local memory in bytes", - .llvm_name = "localmemorysize65536", .subfeatures = &[_]*const Feature { }, }; @@ -535,7 +477,6 @@ pub const feature_localmemorysize65536 = Feature{ pub const feature_maiInsts = Feature{ .name = "mai-insts", .description = "Has mAI instructions", - .llvm_name = "mai-insts", .subfeatures = &[_]*const Feature { }, }; @@ -543,7 +484,6 @@ pub const feature_maiInsts = Feature{ pub const feature_mfmaInlineLiteralBug = Feature{ .name = "mfma-inline-literal-bug", .description = "MFMA cannot use inline literal as SrcC", - .llvm_name = "mfma-inline-literal-bug", .subfeatures = &[_]*const Feature { }, }; @@ -551,7 +491,6 @@ pub const feature_mfmaInlineLiteralBug = Feature{ pub const feature_mimgR128 = Feature{ .name = "mimg-r128", .description = "Support 128-bit texture resources", - .llvm_name = "mimg-r128", .subfeatures = &[_]*const Feature { }, }; @@ -559,7 +498,6 @@ pub const feature_mimgR128 = Feature{ pub const feature_madMixInsts = Feature{ .name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .llvm_name = "mad-mix-insts", .subfeatures = &[_]*const Feature { }, }; @@ -567,7 +505,6 @@ pub const feature_madMixInsts = Feature{ pub const feature_maxPrivateElementSize4 = Feature{ .name = "max-private-element-size-4", .description = "Maximum private access size may be 4", - .llvm_name = "max-private-element-size-4", .subfeatures = &[_]*const Feature { }, }; @@ -575,7 +512,6 @@ pub const feature_maxPrivateElementSize4 = Feature{ pub const feature_maxPrivateElementSize8 = Feature{ .name = "max-private-element-size-8", .description = "Maximum private access size may be 8", - .llvm_name = "max-private-element-size-8", .subfeatures = &[_]*const Feature { }, }; @@ -583,7 +519,6 @@ pub const feature_maxPrivateElementSize8 = Feature{ pub const feature_maxPrivateElementSize16 = Feature{ .name = "max-private-element-size-16", .description = "Maximum private access size may be 16", - .llvm_name = "max-private-element-size-16", .subfeatures = &[_]*const Feature { }, }; @@ -591,7 +526,6 @@ pub const feature_maxPrivateElementSize16 = Feature{ pub const feature_movrel = Feature{ .name = "movrel", .description = "Has v_movrel*_b32 instructions", - .llvm_name = "movrel", .subfeatures = &[_]*const Feature { }, }; @@ -599,7 +533,6 @@ pub const feature_movrel = Feature{ pub const feature_nsaEncoding = Feature{ .name = "nsa-encoding", .description = "Support NSA encoding for image instructions", - .llvm_name = "nsa-encoding", .subfeatures = &[_]*const Feature { }, }; @@ -607,7 +540,6 @@ pub const feature_nsaEncoding = Feature{ pub const feature_nsaToVmemBug = Feature{ .name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .llvm_name = "nsa-to-vmem-bug", .subfeatures = &[_]*const Feature { }, }; @@ -615,7 +547,6 @@ pub const feature_nsaToVmemBug = Feature{ pub const feature_noDataDepHazard = Feature{ .name = "no-data-dep-hazard", .description = "Does not need SW waitstates", - .llvm_name = "no-data-dep-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -623,7 +554,6 @@ pub const feature_noDataDepHazard = Feature{ pub const feature_noSdstCmpx = Feature{ .name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .llvm_name = "no-sdst-cmpx", .subfeatures = &[_]*const Feature { }, }; @@ -631,7 +561,6 @@ pub const feature_noSdstCmpx = Feature{ pub const feature_offset3fBug = Feature{ .name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", - .llvm_name = "offset-3f-bug", .subfeatures = &[_]*const Feature { }, }; @@ -639,7 +568,6 @@ pub const feature_offset3fBug = Feature{ pub const feature_pkFmacF16Inst = Feature{ .name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", - .llvm_name = "pk-fmac-f16-inst", .subfeatures = &[_]*const Feature { }, }; @@ -647,7 +575,6 @@ pub const feature_pkFmacF16Inst = Feature{ pub const feature_promoteAlloca = Feature{ .name = "promote-alloca", .description = "Enable promote alloca pass", - .llvm_name = "promote-alloca", .subfeatures = &[_]*const Feature { }, }; @@ -655,7 +582,6 @@ pub const feature_promoteAlloca = Feature{ pub const feature_r128A16 = Feature{ .name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .llvm_name = "r128-a16", .subfeatures = &[_]*const Feature { }, }; @@ -663,7 +589,6 @@ pub const feature_r128A16 = Feature{ pub const feature_registerBanking = Feature{ .name = "register-banking", .description = "Has register banking", - .llvm_name = "register-banking", .subfeatures = &[_]*const Feature { }, }; @@ -671,7 +596,6 @@ pub const feature_registerBanking = Feature{ pub const feature_sdwa = Feature{ .name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa", .subfeatures = &[_]*const Feature { }, }; @@ -679,7 +603,6 @@ pub const feature_sdwa = Feature{ pub const feature_sdwaMav = Feature{ .name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa-mav", .subfeatures = &[_]*const Feature { }, }; @@ -687,7 +610,6 @@ pub const feature_sdwaMav = Feature{ pub const feature_sdwaOmod = Feature{ .name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa-omod", .subfeatures = &[_]*const Feature { }, }; @@ -695,7 +617,6 @@ pub const feature_sdwaOmod = Feature{ pub const feature_sdwaOutModsVopc = Feature{ .name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa-out-mods-vopc", .subfeatures = &[_]*const Feature { }, }; @@ -703,7 +624,6 @@ pub const feature_sdwaOutModsVopc = Feature{ pub const feature_sdwaScalar = Feature{ .name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa-scalar", .subfeatures = &[_]*const Feature { }, }; @@ -711,7 +631,6 @@ pub const feature_sdwaScalar = Feature{ pub const feature_sdwaSdst = Feature{ .name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .llvm_name = "sdwa-sdst", .subfeatures = &[_]*const Feature { }, }; @@ -719,7 +638,6 @@ pub const feature_sdwaSdst = Feature{ pub const feature_sgprInitBug = Feature{ .name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .llvm_name = "sgpr-init-bug", .subfeatures = &[_]*const Feature { }, }; @@ -727,7 +645,6 @@ pub const feature_sgprInitBug = Feature{ pub const feature_smemToVectorWriteHazard = Feature{ .name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", - .llvm_name = "smem-to-vector-write-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -735,7 +652,6 @@ pub const feature_smemToVectorWriteHazard = Feature{ pub const feature_sMemrealtime = Feature{ .name = "s-memrealtime", .description = "Has s_memrealtime instruction", - .llvm_name = "s-memrealtime", .subfeatures = &[_]*const Feature { }, }; @@ -743,7 +659,6 @@ pub const feature_sMemrealtime = Feature{ pub const feature_sramEcc = Feature{ .name = "sram-ecc", .description = "Enable SRAM ECC", - .llvm_name = "sram-ecc", .subfeatures = &[_]*const Feature { }, }; @@ -751,7 +666,6 @@ pub const feature_sramEcc = Feature{ pub const feature_scalarAtomics = Feature{ .name = "scalar-atomics", .description = "Has atomic scalar memory instructions", - .llvm_name = "scalar-atomics", .subfeatures = &[_]*const Feature { }, }; @@ -759,7 +673,6 @@ pub const feature_scalarAtomics = Feature{ pub const feature_scalarFlatScratchInsts = Feature{ .name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", - .llvm_name = "scalar-flat-scratch-insts", .subfeatures = &[_]*const Feature { }, }; @@ -767,7 +680,6 @@ pub const feature_scalarFlatScratchInsts = Feature{ pub const feature_scalarStores = Feature{ .name = "scalar-stores", .description = "Has store scalar memory instructions", - .llvm_name = "scalar-stores", .subfeatures = &[_]*const Feature { }, }; @@ -775,42 +687,39 @@ pub const feature_scalarStores = Feature{ pub const feature_seaIslands = Feature{ .name = "sea-islands", .description = "SEA_ISLANDS GPU generation", - .llvm_name = "sea-islands", .subfeatures = &[_]*const Feature { - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, }, }; pub const feature_southernIslands = Feature{ .name = "southern-islands", .description = "SOUTHERN_ISLANDS GPU generation", - .llvm_name = "southern-islands", .subfeatures = &[_]*const Feature { - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_ldsbankcount32, - &feature_wavefrontsize64, &feature_noSramEccSupport, - &feature_noXnackSupport, &feature_fp64, + &feature_movrel, + &feature_ldsbankcount32, + &feature_noXnackSupport, + &feature_mimgR128, + &feature_wavefrontsize64, }, }; pub const feature_trapHandler = Feature{ .name = "trap-handler", .description = "Trap handler support", - .llvm_name = "trap-handler", .subfeatures = &[_]*const Feature { }, }; @@ -818,7 +727,6 @@ pub const feature_trapHandler = Feature{ pub const feature_trigReducedRange = Feature{ .name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", - .llvm_name = "trig-reduced-range", .subfeatures = &[_]*const Feature { }, }; @@ -826,7 +734,6 @@ pub const feature_trigReducedRange = Feature{ pub const feature_unalignedBufferAccess = Feature{ .name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", - .llvm_name = "unaligned-buffer-access", .subfeatures = &[_]*const Feature { }, }; @@ -834,7 +741,6 @@ pub const feature_unalignedBufferAccess = Feature{ pub const feature_unalignedScratchAccess = Feature{ .name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", - .llvm_name = "unaligned-scratch-access", .subfeatures = &[_]*const Feature { }, }; @@ -842,7 +748,6 @@ pub const feature_unalignedScratchAccess = Feature{ pub const feature_unpackedD16Vmem = Feature{ .name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", - .llvm_name = "unpacked-d16-vmem", .subfeatures = &[_]*const Feature { }, }; @@ -850,7 +755,6 @@ pub const feature_unpackedD16Vmem = Feature{ pub const feature_vgprIndexMode = Feature{ .name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", - .llvm_name = "vgpr-index-mode", .subfeatures = &[_]*const Feature { }, }; @@ -858,7 +762,6 @@ pub const feature_vgprIndexMode = Feature{ pub const feature_vmemToScalarWriteHazard = Feature{ .name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .llvm_name = "vmem-to-scalar-write-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -866,7 +769,6 @@ pub const feature_vmemToScalarWriteHazard = Feature{ pub const feature_vop3Literal = Feature{ .name = "vop3-literal", .description = "Can use one literal in VOP3", - .llvm_name = "vop3-literal", .subfeatures = &[_]*const Feature { }, }; @@ -874,7 +776,6 @@ pub const feature_vop3Literal = Feature{ pub const feature_vop3p = Feature{ .name = "vop3p", .description = "Has VOP3P packed instructions", - .llvm_name = "vop3p", .subfeatures = &[_]*const Feature { }, }; @@ -882,7 +783,6 @@ pub const feature_vop3p = Feature{ pub const feature_vcmpxExecWarHazard = Feature{ .name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .llvm_name = "vcmpx-exec-war-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -890,7 +790,6 @@ pub const feature_vcmpxExecWarHazard = Feature{ pub const feature_vcmpxPermlaneHazard = Feature{ .name = "vcmpx-permlane-hazard", .description = "TODO: describe me", - .llvm_name = "vcmpx-permlane-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -898,37 +797,35 @@ pub const feature_vcmpxPermlaneHazard = Feature{ pub const feature_volcanicIslands = Feature{ .name = "volcanic-islands", .description = "VOLCANIC_ISLANDS GPU generation", - .llvm_name = "volcanic-islands", .subfeatures = &[_]*const Feature { - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, }, }; pub const feature_vscnt = Feature{ .name = "vscnt", .description = "Has separate store vscnt counter", - .llvm_name = "vscnt", .subfeatures = &[_]*const Feature { }, }; @@ -936,7 +833,6 @@ pub const feature_vscnt = Feature{ pub const feature_wavefrontsize16 = Feature{ .name = "wavefrontsize16", .description = "The number of threads per wavefront", - .llvm_name = "wavefrontsize16", .subfeatures = &[_]*const Feature { }, }; @@ -944,7 +840,6 @@ pub const feature_wavefrontsize16 = Feature{ pub const feature_wavefrontsize32 = Feature{ .name = "wavefrontsize32", .description = "The number of threads per wavefront", - .llvm_name = "wavefrontsize32", .subfeatures = &[_]*const Feature { }, }; @@ -952,7 +847,6 @@ pub const feature_wavefrontsize32 = Feature{ pub const feature_wavefrontsize64 = Feature{ .name = "wavefrontsize64", .description = "The number of threads per wavefront", - .llvm_name = "wavefrontsize64", .subfeatures = &[_]*const Feature { }, }; @@ -960,7 +854,6 @@ pub const feature_wavefrontsize64 = Feature{ pub const feature_xnack = Feature{ .name = "xnack", .description = "Enable XNACK support", - .llvm_name = "xnack", .subfeatures = &[_]*const Feature { }, }; @@ -968,7 +861,6 @@ pub const feature_xnack = Feature{ pub const feature_halfRate64Ops = Feature{ .name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", - .llvm_name = "half-rate-64-ops", .subfeatures = &[_]*const Feature { }, }; @@ -1091,16 +983,16 @@ pub const cpu_bonaire = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -1113,28 +1005,28 @@ pub const cpu_carrizo = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, &feature_xnack, &feature_halfRate64Ops, @@ -1149,28 +1041,28 @@ pub const cpu_fiji = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -1200,40 +1092,40 @@ pub const cpu_gfx1010 = Cpu{ &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_movrel, - &feature_gfx9Insts, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_noSdstCmpx, - &feature_fmaMixInsts, - &feature_sdwa, - &feature_localmemorysize65536, - &feature_sdwaScalar, + &feature_registerBanking, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_sdwaSdst, + &feature_ciInsts, &feature_apertureRegs, + &feature_intClampInsts, &feature_flatScratchInsts, + &feature_sdwaScalar, + &feature_fastFmaf, + &feature_pkFmacF16Inst, &feature_vscnt, - &feature_noDataDepHazard, + &feature_movrel, + &feature_fmaMixInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_sdwaOmod, + &feature_vop3Literal, + &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_addNoCarryInsts, + &feature_noDataDepHazard, + &feature_flatInstOffsets, &feature_inv2piInlineImm, - &feature_fp64, - &feature_dpp8, - &feature_BitInsts16, - &feature_registerBanking, - &feature_gfx8Insts, + &feature_gfx9Insts, &feature_flatGlobalInsts, - &feature_flatInstOffsets, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_fastFmaf, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_gfx10Insts, + &feature_BitInsts16, + &feature_noSdstCmpx, &feature_gfx10, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, @@ -1265,40 +1157,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_movrel, - &feature_gfx9Insts, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_noSdstCmpx, - &feature_fmaMixInsts, - &feature_sdwa, - &feature_localmemorysize65536, - &feature_sdwaScalar, + &feature_registerBanking, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_sdwaSdst, + &feature_ciInsts, &feature_apertureRegs, + &feature_intClampInsts, &feature_flatScratchInsts, + &feature_sdwaScalar, + &feature_fastFmaf, + &feature_pkFmacF16Inst, &feature_vscnt, - &feature_noDataDepHazard, + &feature_movrel, + &feature_fmaMixInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_sdwaOmod, + &feature_vop3Literal, + &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_addNoCarryInsts, + &feature_noDataDepHazard, + &feature_flatInstOffsets, &feature_inv2piInlineImm, - &feature_fp64, - &feature_dpp8, - &feature_BitInsts16, - &feature_registerBanking, - &feature_gfx8Insts, + &feature_gfx9Insts, &feature_flatGlobalInsts, - &feature_flatInstOffsets, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_fastFmaf, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_gfx10Insts, + &feature_BitInsts16, + &feature_noSdstCmpx, &feature_gfx10, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, @@ -1329,40 +1221,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_movrel, - &feature_gfx9Insts, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_noSdstCmpx, - &feature_fmaMixInsts, - &feature_sdwa, - &feature_localmemorysize65536, - &feature_sdwaScalar, + &feature_registerBanking, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_sdwaSdst, + &feature_ciInsts, &feature_apertureRegs, + &feature_intClampInsts, &feature_flatScratchInsts, + &feature_sdwaScalar, + &feature_fastFmaf, + &feature_pkFmacF16Inst, &feature_vscnt, - &feature_noDataDepHazard, + &feature_movrel, + &feature_fmaMixInsts, + &feature_noSramEccSupport, + &feature_sdwa, + &feature_sdwaOmod, + &feature_vop3Literal, + &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_addNoCarryInsts, + &feature_noDataDepHazard, + &feature_flatInstOffsets, &feature_inv2piInlineImm, - &feature_fp64, - &feature_dpp8, - &feature_BitInsts16, - &feature_registerBanking, - &feature_gfx8Insts, + &feature_gfx9Insts, &feature_flatGlobalInsts, - &feature_flatInstOffsets, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_fastFmaf, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_gfx10Insts, + &feature_BitInsts16, + &feature_noSdstCmpx, &feature_gfx10, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, @@ -1390,13 +1282,13 @@ pub const cpu_gfx600 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, &feature_halfRate64Ops, }, @@ -1409,13 +1301,13 @@ pub const cpu_gfx601 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, }, }; @@ -1427,16 +1319,16 @@ pub const cpu_gfx700 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -1449,16 +1341,16 @@ pub const cpu_gfx701 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, &feature_halfRate64Ops, }, @@ -1472,16 +1364,16 @@ pub const cpu_gfx702 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount16, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -1493,16 +1385,16 @@ pub const cpu_gfx703 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -1514,16 +1406,16 @@ pub const cpu_gfx704 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -1536,28 +1428,28 @@ pub const cpu_gfx801 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, &feature_xnack, &feature_halfRate64Ops, @@ -1573,28 +1465,28 @@ pub const cpu_gfx802 = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -1607,28 +1499,28 @@ pub const cpu_gfx803 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -1639,28 +1531,28 @@ pub const cpu_gfx810 = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, &feature_xnack, }, @@ -1673,36 +1565,36 @@ pub const cpu_gfx900 = Cpu{ &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, &feature_madMixInsts, @@ -1715,36 +1607,36 @@ pub const cpu_gfx902 = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, &feature_madMixInsts, @@ -1760,36 +1652,36 @@ pub const cpu_gfx904 = Cpu{ &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, }, @@ -1805,36 +1697,36 @@ pub const cpu_gfx906 = Cpu{ &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, &feature_halfRate64Ops, @@ -1855,36 +1747,36 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, &feature_maiInsts, @@ -1900,36 +1792,36 @@ pub const cpu_gfx909 = Cpu{ .llvm_name = "gfx909", .subfeatures = &[_]*const Feature { &feature_codeObjectV3, - &feature_gfx9Insts, + &feature_fp64, + &feature_vop3p, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, + &feature_sdwaSdst, &feature_ciInsts, - &feature_sdwa, - &feature_localmemorysize65536, + &feature_apertureRegs, &feature_scalarStores, - &feature_sdwaScalar, - &feature_sdwaSdst, + &feature_intClampInsts, &feature_gcn3Encoding, - &feature_apertureRegs, &feature_flatScratchInsts, - &feature_r128A16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_addNoCarryInsts, - &feature_inv2piInlineImm, - &feature_fp64, - &feature_BitInsts16, - &feature_vgprIndexMode, + &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, &feature_scalarAtomics, - &feature_flatInstOffsets, - &feature_gfx7Gfx8Gfx9Insts, - &feature_vop3p, - &feature_sMemrealtime, - &feature_intClampInsts, + &feature_sdwaScalar, &feature_fastFmaf, + &feature_vgprIndexMode, + &feature_scalarFlatScratchInsts, + &feature_sdwa, &feature_sdwaOmod, + &feature_localmemorysize65536, + &feature_flatAddressSpace, + &feature_addNoCarryInsts, + &feature_flatInstOffsets, + &feature_inv2piInlineImm, + &feature_gfx9Insts, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_r128A16, &feature_gfx9, &feature_ldsbankcount32, &feature_madMixInsts, @@ -1944,13 +1836,13 @@ pub const cpu_hainan = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, }, }; @@ -1963,16 +1855,16 @@ pub const cpu_hawaii = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, &feature_halfRate64Ops, }, @@ -1987,28 +1879,28 @@ pub const cpu_iceland = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -2020,16 +1912,16 @@ pub const cpu_kabini = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -2041,16 +1933,16 @@ pub const cpu_kaveri = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -2062,16 +1954,16 @@ pub const cpu_mullins = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_localmemorysize65536, - &feature_movrel, &feature_trigReducedRange, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_ciInsts, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_mimgR128, + &feature_wavefrontsize64, + &feature_flatAddressSpace, + &feature_gfx7Gfx8Gfx9Insts, &feature_seaIslands, }, }; @@ -2083,13 +1975,13 @@ pub const cpu_oland = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, }, }; @@ -2101,13 +1993,13 @@ pub const cpu_pitcairn = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, }, }; @@ -2120,28 +2012,28 @@ pub const cpu_polaris10 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -2154,28 +2046,28 @@ pub const cpu_polaris11 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -2186,28 +2078,28 @@ pub const cpu_stoney = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, &feature_xnack, }, @@ -2221,13 +2113,13 @@ pub const cpu_tahiti = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, &feature_halfRate64Ops, }, @@ -2242,28 +2134,28 @@ pub const cpu_tonga = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_movrel, + &feature_fp64, + &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_dpp, &feature_ciInsts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_wavefrontsize64, + &feature_movrel, + &feature_vgprIndexMode, + &feature_trigReducedRange, &feature_noSramEccSupport, &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gcn3Encoding, + &feature_mimgR128, &feature_flatAddressSpace, - &feature_dpp, &feature_inv2piInlineImm, - &feature_fp64, &feature_BitInsts16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_gfx8Insts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_mimgR128, - &feature_intClampInsts, - &feature_sMemrealtime, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_volcanicIslands, }, }; @@ -2275,13 +2167,13 @@ pub const cpu_verde = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_mimgR128, - &feature_movrel, &feature_localmemorysize32768, &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_noSramEccSupport, &feature_fp64, + &feature_movrel, + &feature_mimgR128, + &feature_wavefrontsize64, &feature_southernIslands, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index e45f0170cffcf1d8570b360c155b3fdd51ab32fd..c28ece032f875a4e330d7b35becc897016a575c4 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_armv2 = Feature{ .name = "armv2", .description = "ARMv2 architecture", - .llvm_name = "armv2", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_armv2 = Feature{ pub const feature_armv2a = Feature{ .name = "armv2a", .description = "ARMv2a architecture", - .llvm_name = "armv2a", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_armv2a = Feature{ pub const feature_armv3 = Feature{ .name = "armv3", .description = "ARMv3 architecture", - .llvm_name = "armv3", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_armv3 = Feature{ pub const feature_armv3m = Feature{ .name = "armv3m", .description = "ARMv3m architecture", - .llvm_name = "armv3m", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_armv3m = Feature{ pub const feature_armv4 = Feature{ .name = "armv4", .description = "ARMv4 architecture", - .llvm_name = "armv4", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_armv4 = Feature{ pub const feature_armv4t = Feature{ .name = "armv4t", .description = "ARMv4t architecture", - .llvm_name = "armv4t", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -53,7 +47,6 @@ pub const feature_armv4t = Feature{ pub const feature_armv5t = Feature{ .name = "armv5t", .description = "ARMv5t architecture", - .llvm_name = "armv5t", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -62,7 +55,6 @@ pub const feature_armv5t = Feature{ pub const feature_armv5te = Feature{ .name = "armv5te", .description = "ARMv5te architecture", - .llvm_name = "armv5te", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -71,7 +63,6 @@ pub const feature_armv5te = Feature{ pub const feature_armv5tej = Feature{ .name = "armv5tej", .description = "ARMv5tej architecture", - .llvm_name = "armv5tej", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -80,7 +71,6 @@ pub const feature_armv5tej = Feature{ pub const feature_armv6 = Feature{ .name = "armv6", .description = "ARMv6 architecture", - .llvm_name = "armv6", .subfeatures = &[_]*const Feature { &feature_v4t, &feature_dsp, @@ -90,7 +80,6 @@ pub const feature_armv6 = Feature{ pub const feature_armv6j = Feature{ .name = "armv6j", .description = "ARMv7a architecture", - .llvm_name = "armv6j", .subfeatures = &[_]*const Feature { &feature_v4t, &feature_dsp, @@ -100,7 +89,6 @@ pub const feature_armv6j = Feature{ pub const feature_armv6k = Feature{ .name = "armv6k", .description = "ARMv6k architecture", - .llvm_name = "armv6k", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -109,7 +97,6 @@ pub const feature_armv6k = Feature{ pub const feature_armv6kz = Feature{ .name = "armv6kz", .description = "ARMv6kz architecture", - .llvm_name = "armv6kz", .subfeatures = &[_]*const Feature { &feature_v4t, &feature_trustzone, @@ -119,400 +106,379 @@ pub const feature_armv6kz = Feature{ pub const feature_armv6M = Feature{ .name = "armv6-m", .description = "ARMv6m architecture", - .llvm_name = "armv6-m", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, }, }; pub const feature_armv6sM = Feature{ .name = "armv6s-m", .description = "ARMv6sm architecture", - .llvm_name = "armv6s-m", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, }, }; pub const feature_armv6t2 = Feature{ .name = "armv6t2", .description = "ARMv6t2 architecture", - .llvm_name = "armv6t2", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_dsp, &feature_thumb2, + &feature_dsp, + &feature_v4t, }, }; pub const feature_armv7A = Feature{ .name = "armv7-a", .description = "ARMv7a architecture", - .llvm_name = "armv7-a", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, }, }; pub const feature_armv7eM = Feature{ .name = "armv7e-m", .description = "ARMv7em architecture", - .llvm_name = "armv7e-m", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, + &feature_dsp, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_dsp, - &feature_hwdiv, }, }; pub const feature_armv7k = Feature{ .name = "armv7k", .description = "ARMv7a architecture", - .llvm_name = "armv7k", .subfeatures = &[_]*const Feature { - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, - &feature_d32, &feature_dsp, + &feature_fpregs, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, &feature_perfmon, - &feature_fpregs, + &feature_v4t, + &feature_d32, }, }; pub const feature_armv7M = Feature{ .name = "armv7-m", .description = "ARMv7m architecture", - .llvm_name = "armv7-m", .subfeatures = &[_]*const Feature { - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, }, }; pub const feature_armv7R = Feature{ .name = "armv7-r", .description = "ARMv7r architecture", - .llvm_name = "armv7-r", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, }, }; pub const feature_armv7s = Feature{ .name = "armv7s", .description = "ARMv7a architecture", - .llvm_name = "armv7s", .subfeatures = &[_]*const Feature { - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, - &feature_d32, &feature_dsp, + &feature_fpregs, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, &feature_perfmon, - &feature_fpregs, + &feature_v4t, + &feature_d32, }, }; pub const feature_armv7ve = Feature{ .name = "armv7ve", .description = "ARMv7ve architecture", - .llvm_name = "armv7ve", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_mp, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_hwdivArm, - &feature_dsp, - &feature_fpregs, }, }; pub const feature_armv8A = Feature{ .name = "armv8-a", .description = "ARMv8a architecture", - .llvm_name = "armv8-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, }, }; pub const feature_armv8Mbase = Feature{ .name = "armv8-m.base", .description = "ARMv8mBaseline architecture", - .llvm_name = "armv8-m.base", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_db, - &feature_msecext8, - &feature_thumbMode, &feature_mclass, + &feature_hwdiv, + &feature_thumbMode, + &feature_strictAlign, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, &feature_noarm, &feature_v4t, - &feature_strictAlign, - &feature_hwdiv, }, }; pub const feature_armv8Mmain = Feature{ .name = "armv8-m.main", .description = "ARMv8mMainline architecture", - .llvm_name = "armv8-m.main", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_db, - &feature_msecext8, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, }, }; pub const feature_armv8R = Feature{ .name = "armv8-r", .description = "ARMv8r architecture", - .llvm_name = "armv8-r", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, - &feature_hwdiv, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_dsp, + &feature_hwdivArm, + &feature_hwdiv, + &feature_rclass, + &feature_fpregs, &feature_v4t, - &feature_d32, &feature_dfb, - &feature_hwdivArm, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_crc, - &feature_dsp, - &feature_fpregs, - &feature_rclass, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_d32, }, }; pub const feature_armv81A = Feature{ .name = "armv8.1-a", .description = "ARMv81a architecture", - .llvm_name = "armv8.1-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, }, }; pub const feature_armv81Mmain = Feature{ .name = "armv8.1-m.main", .description = "ARMv81mMainline architecture", - .llvm_name = "armv8.1-m.main", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, + &feature_db, + &feature_mclass, + &feature_hwdiv, &feature_lob, - &feature_v7clrex, - &feature_db, - &feature_msecext8, + &feature_thumbMode, &feature_thumb2, - &feature_mclass, &feature_ras, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_thumbMode, - &feature_perfmon, - &feature_hwdiv, }, }; pub const feature_armv82A = Feature{ .name = "armv8.2-a", .description = "ARMv82a architecture", - .llvm_name = "armv8.2-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, }, }; pub const feature_armv83A = Feature{ .name = "armv8.3-a", .description = "ARMv83a architecture", - .llvm_name = "armv8.3-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, }, }; pub const feature_armv84A = Feature{ .name = "armv8.4-a", .description = "ARMv84a architecture", - .llvm_name = "armv8.4-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, }, }; pub const feature_armv85A = Feature{ .name = "armv8.5-a", .description = "ARMv85a architecture", - .llvm_name = "armv8.5-a", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, - &feature_aclass, - &feature_hwdivArm, &feature_sb, + &feature_aclass, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_v7clrex, + &feature_fp16, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, }, }; pub const feature_msecext8 = Feature{ .name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", - .llvm_name = "8msecext", .subfeatures = &[_]*const Feature { }, }; @@ -520,7 +486,6 @@ pub const feature_msecext8 = Feature{ pub const feature_aclass = Feature{ .name = "aclass", .description = "Is application profile ('A' series)", - .llvm_name = "aclass", .subfeatures = &[_]*const Feature { }, }; @@ -528,17 +493,15 @@ pub const feature_aclass = Feature{ pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES support", - .llvm_name = "aes", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_acquireRelease = Feature{ .name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .llvm_name = "acquire-release", .subfeatures = &[_]*const Feature { }, }; @@ -546,7 +509,6 @@ pub const feature_acquireRelease = Feature{ pub const feature_avoidMovsShop = Feature{ .name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", - .llvm_name = "avoid-movs-shop", .subfeatures = &[_]*const Feature { }, }; @@ -554,7 +516,6 @@ pub const feature_avoidMovsShop = Feature{ pub const feature_avoidPartialCpsr = Feature{ .name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", - .llvm_name = "avoid-partial-cpsr", .subfeatures = &[_]*const Feature { }, }; @@ -562,7 +523,6 @@ pub const feature_avoidPartialCpsr = Feature{ pub const feature_crc = Feature{ .name = "crc", .description = "Enable support for CRC instructions", - .llvm_name = "crc", .subfeatures = &[_]*const Feature { }, }; @@ -570,7 +530,6 @@ pub const feature_crc = Feature{ pub const feature_cheapPredicableCpsr = Feature{ .name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", - .llvm_name = "cheap-predicable-cpsr", .subfeatures = &[_]*const Feature { }, }; @@ -578,7 +537,6 @@ pub const feature_cheapPredicableCpsr = Feature{ pub const feature_vldnAlign = Feature{ .name = "vldn-align", .description = "Check for VLDn unaligned access", - .llvm_name = "vldn-align", .subfeatures = &[_]*const Feature { }, }; @@ -586,17 +544,15 @@ pub const feature_vldnAlign = Feature{ pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable support for Cryptography extensions", - .llvm_name = "crypto", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_d32 = Feature{ .name = "d32", .description = "Extend FP to 32 double registers", - .llvm_name = "d32", .subfeatures = &[_]*const Feature { }, }; @@ -604,7 +560,6 @@ pub const feature_d32 = Feature{ pub const feature_db = Feature{ .name = "db", .description = "Has data barrier (dmb/dsb) instructions", - .llvm_name = "db", .subfeatures = &[_]*const Feature { }, }; @@ -612,7 +567,6 @@ pub const feature_db = Feature{ pub const feature_dfb = Feature{ .name = "dfb", .description = "Has full data barrier (dfb) instruction", - .llvm_name = "dfb", .subfeatures = &[_]*const Feature { }, }; @@ -620,7 +574,6 @@ pub const feature_dfb = Feature{ pub const feature_dsp = Feature{ .name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", - .llvm_name = "dsp", .subfeatures = &[_]*const Feature { }, }; @@ -628,7 +581,6 @@ pub const feature_dsp = Feature{ pub const feature_dontWidenVmovs = Feature{ .name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", - .llvm_name = "dont-widen-vmovs", .subfeatures = &[_]*const Feature { }, }; @@ -636,17 +588,15 @@ pub const feature_dontWidenVmovs = Feature{ pub const feature_dotprod = Feature{ .name = "dotprod", .description = "Enable support for dot product instructions", - .llvm_name = "dotprod", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_executeOnly = Feature{ .name = "execute-only", .description = "Enable the generation of execute only code.", - .llvm_name = "execute-only", .subfeatures = &[_]*const Feature { }, }; @@ -654,7 +604,6 @@ pub const feature_executeOnly = Feature{ pub const feature_expandFpMlx = Feature{ .name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", - .llvm_name = "expand-fp-mlx", .subfeatures = &[_]*const Feature { }, }; @@ -662,7 +611,6 @@ pub const feature_expandFpMlx = Feature{ pub const feature_fp16 = Feature{ .name = "fp16", .description = "Enable half-precision floating point", - .llvm_name = "fp16", .subfeatures = &[_]*const Feature { }, }; @@ -670,7 +618,6 @@ pub const feature_fp16 = Feature{ pub const feature_fp16fml = Feature{ .name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", - .llvm_name = "fp16fml", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_fpregs, @@ -680,7 +627,6 @@ pub const feature_fp16fml = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", .description = "Floating point unit supports double precision", - .llvm_name = "fp64", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -689,7 +635,6 @@ pub const feature_fp64 = Feature{ pub const feature_fpao = Feature{ .name = "fpao", .description = "Enable fast computation of positive address offsets", - .llvm_name = "fpao", .subfeatures = &[_]*const Feature { }, }; @@ -697,28 +642,25 @@ pub const feature_fpao = Feature{ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", .description = "Enable ARMv8 FP", - .llvm_name = "fp-armv8", .subfeatures = &[_]*const Feature { - &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, + &feature_fp16, }, }; pub const feature_fpArmv8d16 = Feature{ .name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", - .llvm_name = "fp-armv8d16", .subfeatures = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; pub const feature_fpArmv8d16sp = Feature{ .name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", - .llvm_name = "fp-armv8d16sp", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_fpregs, @@ -728,7 +670,6 @@ pub const feature_fpArmv8d16sp = Feature{ pub const feature_fpArmv8sp = Feature{ .name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", - .llvm_name = "fp-armv8sp", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_d32, @@ -739,7 +680,6 @@ pub const feature_fpArmv8sp = Feature{ pub const feature_fpregs = Feature{ .name = "fpregs", .description = "Enable FP registers", - .llvm_name = "fpregs", .subfeatures = &[_]*const Feature { }, }; @@ -747,7 +687,6 @@ pub const feature_fpregs = Feature{ pub const feature_fpregs16 = Feature{ .name = "fpregs16", .description = "Enable 16-bit FP registers", - .llvm_name = "fpregs16", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -756,7 +695,6 @@ pub const feature_fpregs16 = Feature{ pub const feature_fpregs64 = Feature{ .name = "fpregs64", .description = "Enable 64-bit FP registers", - .llvm_name = "fpregs64", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -765,7 +703,6 @@ pub const feature_fpregs64 = Feature{ pub const feature_fullfp16 = Feature{ .name = "fullfp16", .description = "Enable full half-precision floating point", - .llvm_name = "fullfp16", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_fpregs, @@ -775,7 +712,6 @@ pub const feature_fullfp16 = Feature{ pub const feature_fuseAes = Feature{ .name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .llvm_name = "fuse-aes", .subfeatures = &[_]*const Feature { }, }; @@ -783,7 +719,6 @@ pub const feature_fuseAes = Feature{ pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", .description = "CPU fuses literal generation operations", - .llvm_name = "fuse-literals", .subfeatures = &[_]*const Feature { }, }; @@ -791,7 +726,6 @@ pub const feature_fuseLiterals = Feature{ pub const feature_hwdivArm = Feature{ .name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", - .llvm_name = "hwdiv-arm", .subfeatures = &[_]*const Feature { }, }; @@ -799,7 +733,6 @@ pub const feature_hwdivArm = Feature{ pub const feature_hwdiv = Feature{ .name = "hwdiv", .description = "Enable divide instructions in Thumb", - .llvm_name = "hwdiv", .subfeatures = &[_]*const Feature { }, }; @@ -807,7 +740,6 @@ pub const feature_hwdiv = Feature{ pub const feature_noBranchPredictor = Feature{ .name = "no-branch-predictor", .description = "Has no branch predictor", - .llvm_name = "no-branch-predictor", .subfeatures = &[_]*const Feature { }, }; @@ -815,7 +747,6 @@ pub const feature_noBranchPredictor = Feature{ pub const feature_retAddrStack = Feature{ .name = "ret-addr-stack", .description = "Has return address stack", - .llvm_name = "ret-addr-stack", .subfeatures = &[_]*const Feature { }, }; @@ -823,7 +754,6 @@ pub const feature_retAddrStack = Feature{ pub const feature_slowfpvmlx = Feature{ .name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", - .llvm_name = "slowfpvmlx", .subfeatures = &[_]*const Feature { }, }; @@ -831,7 +761,6 @@ pub const feature_slowfpvmlx = Feature{ pub const feature_vmlxHazards = Feature{ .name = "vmlx-hazards", .description = "Has VMLx hazards", - .llvm_name = "vmlx-hazards", .subfeatures = &[_]*const Feature { }, }; @@ -839,7 +768,6 @@ pub const feature_vmlxHazards = Feature{ pub const feature_lob = Feature{ .name = "lob", .description = "Enable Low Overhead Branch extensions", - .llvm_name = "lob", .subfeatures = &[_]*const Feature { }, }; @@ -847,7 +775,6 @@ pub const feature_lob = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Generate calls via indirect call instructions", - .llvm_name = "long-calls", .subfeatures = &[_]*const Feature { }, }; @@ -855,7 +782,6 @@ pub const feature_longCalls = Feature{ pub const feature_mclass = Feature{ .name = "mclass", .description = "Is microcontroller profile ('M' series)", - .llvm_name = "mclass", .subfeatures = &[_]*const Feature { }, }; @@ -863,7 +789,6 @@ pub const feature_mclass = Feature{ pub const feature_mp = Feature{ .name = "mp", .description = "Supports Multiprocessing extension", - .llvm_name = "mp", .subfeatures = &[_]*const Feature { }, }; @@ -871,7 +796,6 @@ pub const feature_mp = Feature{ pub const feature_mve1beat = Feature{ .name = "mve1beat", .description = "Model MVE instructions as a 1 beat per tick architecture", - .llvm_name = "mve1beat", .subfeatures = &[_]*const Feature { }, }; @@ -879,7 +803,6 @@ pub const feature_mve1beat = Feature{ pub const feature_mve2beat = Feature{ .name = "mve2beat", .description = "Model MVE instructions as a 2 beats per tick architecture", - .llvm_name = "mve2beat", .subfeatures = &[_]*const Feature { }, }; @@ -887,7 +810,6 @@ pub const feature_mve2beat = Feature{ pub const feature_mve4beat = Feature{ .name = "mve4beat", .description = "Model MVE instructions as a 4 beats per tick architecture", - .llvm_name = "mve4beat", .subfeatures = &[_]*const Feature { }, }; @@ -895,7 +817,6 @@ pub const feature_mve4beat = Feature{ pub const feature_muxedUnits = Feature{ .name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", - .llvm_name = "muxed-units", .subfeatures = &[_]*const Feature { }, }; @@ -903,17 +824,15 @@ pub const feature_muxedUnits = Feature{ pub const feature_neon = Feature{ .name = "neon", .description = "Enable NEON instructions", - .llvm_name = "neon", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_neonfp = Feature{ .name = "neonfp", .description = "Use NEON for single precision FP", - .llvm_name = "neonfp", .subfeatures = &[_]*const Feature { }, }; @@ -921,7 +840,6 @@ pub const feature_neonfp = Feature{ pub const feature_neonFpmovs = Feature{ .name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .llvm_name = "neon-fpmovs", .subfeatures = &[_]*const Feature { }, }; @@ -929,7 +847,6 @@ pub const feature_neonFpmovs = Feature{ pub const feature_naclTrap = Feature{ .name = "nacl-trap", .description = "NaCl trap", - .llvm_name = "nacl-trap", .subfeatures = &[_]*const Feature { }, }; @@ -937,7 +854,6 @@ pub const feature_naclTrap = Feature{ pub const feature_noarm = Feature{ .name = "noarm", .description = "Does not support ARM mode execution", - .llvm_name = "noarm", .subfeatures = &[_]*const Feature { }, }; @@ -945,7 +861,6 @@ pub const feature_noarm = Feature{ pub const feature_noMovt = Feature{ .name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", - .llvm_name = "no-movt", .subfeatures = &[_]*const Feature { }, }; @@ -953,7 +868,6 @@ pub const feature_noMovt = Feature{ pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .llvm_name = "no-neg-immediates", .subfeatures = &[_]*const Feature { }, }; @@ -961,7 +875,6 @@ pub const feature_noNegImmediates = Feature{ pub const feature_disablePostraScheduler = Feature{ .name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", - .llvm_name = "disable-postra-scheduler", .subfeatures = &[_]*const Feature { }, }; @@ -969,7 +882,6 @@ pub const feature_disablePostraScheduler = Feature{ pub const feature_nonpipelinedVfp = Feature{ .name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", - .llvm_name = "nonpipelined-vfp", .subfeatures = &[_]*const Feature { }, }; @@ -977,7 +889,6 @@ pub const feature_nonpipelinedVfp = Feature{ pub const feature_perfmon = Feature{ .name = "perfmon", .description = "Enable support for Performance Monitor extensions", - .llvm_name = "perfmon", .subfeatures = &[_]*const Feature { }, }; @@ -985,7 +896,6 @@ pub const feature_perfmon = Feature{ pub const feature_bit32 = Feature{ .name = "32bit", .description = "Prefer 32-bit Thumb instrs", - .llvm_name = "32bit", .subfeatures = &[_]*const Feature { }, }; @@ -993,7 +903,6 @@ pub const feature_bit32 = Feature{ pub const feature_preferIshst = Feature{ .name = "prefer-ishst", .description = "Prefer ISHST barriers", - .llvm_name = "prefer-ishst", .subfeatures = &[_]*const Feature { }, }; @@ -1001,7 +910,6 @@ pub const feature_preferIshst = Feature{ pub const feature_loopAlign = Feature{ .name = "loop-align", .description = "Prefer 32-bit alignment for loops", - .llvm_name = "loop-align", .subfeatures = &[_]*const Feature { }, }; @@ -1009,7 +917,6 @@ pub const feature_loopAlign = Feature{ pub const feature_preferVmovsr = Feature{ .name = "prefer-vmovsr", .description = "Prefer VMOVSR", - .llvm_name = "prefer-vmovsr", .subfeatures = &[_]*const Feature { }, }; @@ -1017,7 +924,6 @@ pub const feature_preferVmovsr = Feature{ pub const feature_profUnpr = Feature{ .name = "prof-unpr", .description = "Is profitable to unpredicate", - .llvm_name = "prof-unpr", .subfeatures = &[_]*const Feature { }, }; @@ -1025,7 +931,6 @@ pub const feature_profUnpr = Feature{ pub const feature_ras = Feature{ .name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", - .llvm_name = "ras", .subfeatures = &[_]*const Feature { }, }; @@ -1033,7 +938,6 @@ pub const feature_ras = Feature{ pub const feature_rclass = Feature{ .name = "rclass", .description = "Is realtime profile ('R' series)", - .llvm_name = "rclass", .subfeatures = &[_]*const Feature { }, }; @@ -1041,7 +945,6 @@ pub const feature_rclass = Feature{ pub const feature_readTpHard = Feature{ .name = "read-tp-hard", .description = "Reading thread pointer from register", - .llvm_name = "read-tp-hard", .subfeatures = &[_]*const Feature { }, }; @@ -1049,7 +952,6 @@ pub const feature_readTpHard = Feature{ pub const feature_reserveR9 = Feature{ .name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", - .llvm_name = "reserve-r9", .subfeatures = &[_]*const Feature { }, }; @@ -1057,7 +959,6 @@ pub const feature_reserveR9 = Feature{ pub const feature_sb = Feature{ .name = "sb", .description = "Enable v8.5a Speculation Barrier", - .llvm_name = "sb", .subfeatures = &[_]*const Feature { }, }; @@ -1065,17 +966,15 @@ pub const feature_sb = Feature{ pub const feature_sha2 = Feature{ .name = "sha2", .description = "Enable SHA1 and SHA256 support", - .llvm_name = "sha2", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_slowFpBrcc = Feature{ .name = "slow-fp-brcc", .description = "FP compare + branch is slow", - .llvm_name = "slow-fp-brcc", .subfeatures = &[_]*const Feature { }, }; @@ -1083,7 +982,6 @@ pub const feature_slowFpBrcc = Feature{ pub const feature_slowLoadDSubreg = Feature{ .name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", - .llvm_name = "slow-load-D-subreg", .subfeatures = &[_]*const Feature { }, }; @@ -1091,7 +989,6 @@ pub const feature_slowLoadDSubreg = Feature{ pub const feature_slowOddReg = Feature{ .name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", - .llvm_name = "slow-odd-reg", .subfeatures = &[_]*const Feature { }, }; @@ -1099,7 +996,6 @@ pub const feature_slowOddReg = Feature{ pub const feature_slowVdup32 = Feature{ .name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", - .llvm_name = "slow-vdup32", .subfeatures = &[_]*const Feature { }, }; @@ -1107,7 +1003,6 @@ pub const feature_slowVdup32 = Feature{ pub const feature_slowVgetlni32 = Feature{ .name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", - .llvm_name = "slow-vgetlni32", .subfeatures = &[_]*const Feature { }, }; @@ -1115,7 +1010,6 @@ pub const feature_slowVgetlni32 = Feature{ pub const feature_splatVfpNeon = Feature{ .name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", - .llvm_name = "splat-vfp-neon", .subfeatures = &[_]*const Feature { &feature_dontWidenVmovs, }, @@ -1124,7 +1018,6 @@ pub const feature_splatVfpNeon = Feature{ pub const feature_strictAlign = Feature{ .name = "strict-align", .description = "Disallow all unaligned memory access", - .llvm_name = "strict-align", .subfeatures = &[_]*const Feature { }, }; @@ -1132,7 +1025,6 @@ pub const feature_strictAlign = Feature{ pub const feature_thumb2 = Feature{ .name = "thumb2", .description = "Enable Thumb2 instructions", - .llvm_name = "thumb2", .subfeatures = &[_]*const Feature { }, }; @@ -1140,7 +1032,6 @@ pub const feature_thumb2 = Feature{ pub const feature_trustzone = Feature{ .name = "trustzone", .description = "Enable support for TrustZone security extensions", - .llvm_name = "trustzone", .subfeatures = &[_]*const Feature { }, }; @@ -1148,7 +1039,6 @@ pub const feature_trustzone = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .llvm_name = "use-aa", .subfeatures = &[_]*const Feature { }, }; @@ -1156,7 +1046,6 @@ pub const feature_useAa = Feature{ pub const feature_useMisched = Feature{ .name = "use-misched", .description = "Use the MachineScheduler", - .llvm_name = "use-misched", .subfeatures = &[_]*const Feature { }, }; @@ -1164,7 +1053,6 @@ pub const feature_useMisched = Feature{ pub const feature_wideStrideVfp = Feature{ .name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", - .llvm_name = "wide-stride-vfp", .subfeatures = &[_]*const Feature { }, }; @@ -1172,7 +1060,6 @@ pub const feature_wideStrideVfp = Feature{ pub const feature_v7clrex = Feature{ .name = "v7clrex", .description = "Has v7 clrex instruction", - .llvm_name = "v7clrex", .subfeatures = &[_]*const Feature { }, }; @@ -1180,7 +1067,6 @@ pub const feature_v7clrex = Feature{ pub const feature_vfp2 = Feature{ .name = "vfp2", .description = "Enable VFP2 instructions", - .llvm_name = "vfp2", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -1189,7 +1075,6 @@ pub const feature_vfp2 = Feature{ pub const feature_vfp2sp = Feature{ .name = "vfp2sp", .description = "Enable VFP2 instructions with no double precision", - .llvm_name = "vfp2sp", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -1198,17 +1083,15 @@ pub const feature_vfp2sp = Feature{ pub const feature_vfp3 = Feature{ .name = "vfp3", .description = "Enable VFP3 instructions", - .llvm_name = "vfp3", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_vfp3d16 = Feature{ .name = "vfp3d16", .description = "Enable VFP3 instructions with only 16 d-registers", - .llvm_name = "vfp3d16", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -1217,7 +1100,6 @@ pub const feature_vfp3d16 = Feature{ pub const feature_vfp3d16sp = Feature{ .name = "vfp3d16sp", .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", - .llvm_name = "vfp3d16sp", .subfeatures = &[_]*const Feature { &feature_fpregs, }, @@ -1226,17 +1108,15 @@ pub const feature_vfp3d16sp = Feature{ pub const feature_vfp3sp = Feature{ .name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", - .llvm_name = "vfp3sp", .subfeatures = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; pub const feature_vfp4 = Feature{ .name = "vfp4", .description = "Enable VFP4 instructions", - .llvm_name = "vfp4", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_d32, @@ -1247,7 +1127,6 @@ pub const feature_vfp4 = Feature{ pub const feature_vfp4d16 = Feature{ .name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", - .llvm_name = "vfp4d16", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_fpregs, @@ -1257,7 +1136,6 @@ pub const feature_vfp4d16 = Feature{ pub const feature_vfp4d16sp = Feature{ .name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", - .llvm_name = "vfp4d16sp", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_fpregs, @@ -1267,7 +1145,6 @@ pub const feature_vfp4d16sp = Feature{ pub const feature_vfp4sp = Feature{ .name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", - .llvm_name = "vfp4sp", .subfeatures = &[_]*const Feature { &feature_fp16, &feature_d32, @@ -1278,7 +1155,6 @@ pub const feature_vfp4sp = Feature{ pub const feature_vmlxForwarding = Feature{ .name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", - .llvm_name = "vmlx-forwarding", .subfeatures = &[_]*const Feature { }, }; @@ -1286,17 +1162,15 @@ pub const feature_vmlxForwarding = Feature{ pub const feature_virtualization = Feature{ .name = "virtualization", .description = "Supports Virtualization extension", - .llvm_name = "virtualization", .subfeatures = &[_]*const Feature { - &feature_hwdiv, &feature_hwdivArm, + &feature_hwdiv, }, }; pub const feature_zcz = Feature{ .name = "zcz", .description = "Has zero-cycle zeroing instructions", - .llvm_name = "zcz", .subfeatures = &[_]*const Feature { }, }; @@ -1304,36 +1178,33 @@ pub const feature_zcz = Feature{ pub const feature_mvefp = Feature{ .name = "mve.fp", .description = "Support M-Class Vector Extension with integer and floating ops", - .llvm_name = "mve.fp", .subfeatures = &[_]*const Feature { - &feature_v7clrex, - &feature_thumb2, - &feature_fp16, - &feature_v4t, &feature_dsp, - &feature_perfmon, &feature_fpregs, + &feature_v4t, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_fp16, }, }; pub const feature_mve = Feature{ .name = "mve", .description = "Support M-Class Vector Extension with integer ops", - .llvm_name = "mve", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_fpregs, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, }, }; pub const feature_v4t = Feature{ .name = "v4t", .description = "Support ARM v4T instructions", - .llvm_name = "v4t", .subfeatures = &[_]*const Feature { }, }; @@ -1341,7 +1212,6 @@ pub const feature_v4t = Feature{ pub const feature_v5te = Feature{ .name = "v5te", .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", - .llvm_name = "v5te", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1350,7 +1220,6 @@ pub const feature_v5te = Feature{ pub const feature_v5t = Feature{ .name = "v5t", .description = "Support ARM v5T instructions", - .llvm_name = "v5t", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1359,7 +1228,6 @@ pub const feature_v5t = Feature{ pub const feature_v6k = Feature{ .name = "v6k", .description = "Support ARM v6k instructions", - .llvm_name = "v6k", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1368,7 +1236,6 @@ pub const feature_v6k = Feature{ pub const feature_v6m = Feature{ .name = "v6m", .description = "Support ARM v6M instructions", - .llvm_name = "v6m", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1377,7 +1244,6 @@ pub const feature_v6m = Feature{ pub const feature_v6 = Feature{ .name = "v6", .description = "Support ARM v6 instructions", - .llvm_name = "v6", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1386,29 +1252,26 @@ pub const feature_v6 = Feature{ pub const feature_v6t2 = Feature{ .name = "v6t2", .description = "Support ARM v6t2 instructions", - .llvm_name = "v6t2", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_thumb2, + &feature_v4t, }, }; pub const feature_v7 = Feature{ .name = "v7", .description = "Support ARM v7 instructions", - .llvm_name = "v7", .subfeatures = &[_]*const Feature { - &feature_v4t, + &feature_thumb2, &feature_v7clrex, + &feature_v4t, &feature_perfmon, - &feature_thumb2, }, }; pub const feature_v8m = Feature{ .name = "v8m", .description = "Support ARM v8M Baseline instructions", - .llvm_name = "v8m", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1417,114 +1280,105 @@ pub const feature_v8m = Feature{ pub const feature_v8mmain = Feature{ .name = "v8m.main", .description = "Support ARM v8M Mainline instructions", - .llvm_name = "v8m.main", .subfeatures = &[_]*const Feature { + &feature_thumb2, + &feature_v7clrex, &feature_v4t, &feature_perfmon, - &feature_v7clrex, - &feature_thumb2, }, }; pub const feature_v8 = Feature{ .name = "v8", .description = "Support ARM v8 instructions", - .llvm_name = "v8", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_thumb2, - &feature_v4t, + &feature_v7clrex, + &feature_acquireRelease, &feature_perfmon, + &feature_v4t, }, }; pub const feature_v81mmain = Feature{ .name = "v8.1m.main", .description = "Support ARM v8-1M Mainline instructions", - .llvm_name = "v8.1m.main", .subfeatures = &[_]*const Feature { - &feature_v4t, + &feature_thumb2, &feature_v7clrex, + &feature_v4t, &feature_perfmon, - &feature_thumb2, }, }; pub const feature_v81a = Feature{ .name = "v8.1a", .description = "Support ARM v8.1a instructions", - .llvm_name = "v8.1a", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_thumb2, - &feature_v4t, + &feature_v7clrex, + &feature_acquireRelease, &feature_perfmon, + &feature_v4t, }, }; pub const feature_v82a = Feature{ .name = "v8.2a", .description = "Support ARM v8.2a instructions", - .llvm_name = "v8.2a", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_thumb2, - &feature_v4t, + &feature_v7clrex, + &feature_acquireRelease, &feature_perfmon, + &feature_v4t, }, }; pub const feature_v83a = Feature{ .name = "v8.3a", .description = "Support ARM v8.3a instructions", - .llvm_name = "v8.3a", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_thumb2, - &feature_v4t, + &feature_v7clrex, + &feature_acquireRelease, &feature_perfmon, + &feature_v4t, }, }; pub const feature_v84a = Feature{ .name = "v8.4a", .description = "Support ARM v8.4a instructions", - .llvm_name = "v8.4a", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_acquireRelease, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_perfmon, - &feature_fpregs, }, }; pub const feature_v85a = Feature{ .name = "v8.5a", .description = "Support ARM v8.5a instructions", - .llvm_name = "v8.5a", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, + &feature_fpregs, &feature_thumb2, - &feature_v4t, - &feature_d32, &feature_sb, + &feature_v7clrex, + &feature_acquireRelease, &feature_perfmon, - &feature_fpregs, + &feature_v4t, + &feature_d32, }, }; pub const feature_iwmmxt = Feature{ .name = "iwmmxt", .description = "ARMv5te architecture", - .llvm_name = "iwmmxt", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1533,7 +1387,6 @@ pub const feature_iwmmxt = Feature{ pub const feature_iwmmxt2 = Feature{ .name = "iwmmxt2", .description = "ARMv5te architecture", - .llvm_name = "iwmmxt2", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -1542,7 +1395,6 @@ pub const feature_iwmmxt2 = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Use software floating point features.", - .llvm_name = "soft-float", .subfeatures = &[_]*const Feature { }, }; @@ -1550,7 +1402,6 @@ pub const feature_softFloat = Feature{ pub const feature_thumbMode = Feature{ .name = "thumb-mode", .description = "Thumb mode", - .llvm_name = "thumb-mode", .subfeatures = &[_]*const Feature { }, }; @@ -1558,7 +1409,6 @@ pub const feature_thumbMode = Feature{ pub const feature_a5 = Feature{ .name = "a5", .description = "Cortex-A5 ARM processors", - .llvm_name = "a5", .subfeatures = &[_]*const Feature { }, }; @@ -1566,7 +1416,6 @@ pub const feature_a5 = Feature{ pub const feature_a7 = Feature{ .name = "a7", .description = "Cortex-A7 ARM processors", - .llvm_name = "a7", .subfeatures = &[_]*const Feature { }, }; @@ -1574,7 +1423,6 @@ pub const feature_a7 = Feature{ pub const feature_a8 = Feature{ .name = "a8", .description = "Cortex-A8 ARM processors", - .llvm_name = "a8", .subfeatures = &[_]*const Feature { }, }; @@ -1582,7 +1430,6 @@ pub const feature_a8 = Feature{ pub const feature_a9 = Feature{ .name = "a9", .description = "Cortex-A9 ARM processors", - .llvm_name = "a9", .subfeatures = &[_]*const Feature { }, }; @@ -1590,7 +1437,6 @@ pub const feature_a9 = Feature{ pub const feature_a12 = Feature{ .name = "a12", .description = "Cortex-A12 ARM processors", - .llvm_name = "a12", .subfeatures = &[_]*const Feature { }, }; @@ -1598,7 +1444,6 @@ pub const feature_a12 = Feature{ pub const feature_a15 = Feature{ .name = "a15", .description = "Cortex-A15 ARM processors", - .llvm_name = "a15", .subfeatures = &[_]*const Feature { }, }; @@ -1606,7 +1451,6 @@ pub const feature_a15 = Feature{ pub const feature_a17 = Feature{ .name = "a17", .description = "Cortex-A17 ARM processors", - .llvm_name = "a17", .subfeatures = &[_]*const Feature { }, }; @@ -1614,7 +1458,6 @@ pub const feature_a17 = Feature{ pub const feature_a32 = Feature{ .name = "a32", .description = "Cortex-A32 ARM processors", - .llvm_name = "a32", .subfeatures = &[_]*const Feature { }, }; @@ -1622,7 +1465,6 @@ pub const feature_a32 = Feature{ pub const feature_a35 = Feature{ .name = "a35", .description = "Cortex-A35 ARM processors", - .llvm_name = "a35", .subfeatures = &[_]*const Feature { }, }; @@ -1630,7 +1472,6 @@ pub const feature_a35 = Feature{ pub const feature_a53 = Feature{ .name = "a53", .description = "Cortex-A53 ARM processors", - .llvm_name = "a53", .subfeatures = &[_]*const Feature { }, }; @@ -1638,7 +1479,6 @@ pub const feature_a53 = Feature{ pub const feature_a55 = Feature{ .name = "a55", .description = "Cortex-A55 ARM processors", - .llvm_name = "a55", .subfeatures = &[_]*const Feature { }, }; @@ -1646,7 +1486,6 @@ pub const feature_a55 = Feature{ pub const feature_a57 = Feature{ .name = "a57", .description = "Cortex-A57 ARM processors", - .llvm_name = "a57", .subfeatures = &[_]*const Feature { }, }; @@ -1654,7 +1493,6 @@ pub const feature_a57 = Feature{ pub const feature_a72 = Feature{ .name = "a72", .description = "Cortex-A72 ARM processors", - .llvm_name = "a72", .subfeatures = &[_]*const Feature { }, }; @@ -1662,7 +1500,6 @@ pub const feature_a72 = Feature{ pub const feature_a73 = Feature{ .name = "a73", .description = "Cortex-A73 ARM processors", - .llvm_name = "a73", .subfeatures = &[_]*const Feature { }, }; @@ -1670,7 +1507,6 @@ pub const feature_a73 = Feature{ pub const feature_a75 = Feature{ .name = "a75", .description = "Cortex-A75 ARM processors", - .llvm_name = "a75", .subfeatures = &[_]*const Feature { }, }; @@ -1678,7 +1514,6 @@ pub const feature_a75 = Feature{ pub const feature_a76 = Feature{ .name = "a76", .description = "Cortex-A76 ARM processors", - .llvm_name = "a76", .subfeatures = &[_]*const Feature { }, }; @@ -1686,33 +1521,31 @@ pub const feature_a76 = Feature{ pub const feature_exynos = Feature{ .name = "exynos", .description = "Samsung Exynos processors", - .llvm_name = "exynos", .subfeatures = &[_]*const Feature { - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_hwdivArm, + &feature_zcz, &feature_hwdiv, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, + &feature_fpregs, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, - &feature_d32, - &feature_hwdivArm, + &feature_wideStrideVfp, &feature_retAddrStack, + &feature_fuseAes, + &feature_fuseLiterals, &feature_crc, - &feature_expandFpMlx, - &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, &feature_dontWidenVmovs, - &feature_fpregs, - &feature_fuseLiterals, + &feature_d32, }, }; pub const feature_krait = Feature{ .name = "krait", .description = "Qualcomm Krait processors", - .llvm_name = "krait", .subfeatures = &[_]*const Feature { }, }; @@ -1720,7 +1553,6 @@ pub const feature_krait = Feature{ pub const feature_kryo = Feature{ .name = "kryo", .description = "Qualcomm Kryo processors", - .llvm_name = "kryo", .subfeatures = &[_]*const Feature { }, }; @@ -1728,7 +1560,6 @@ pub const feature_kryo = Feature{ pub const feature_m3 = Feature{ .name = "m3", .description = "Cortex-M3 ARM processors", - .llvm_name = "m3", .subfeatures = &[_]*const Feature { }, }; @@ -1736,7 +1567,6 @@ pub const feature_m3 = Feature{ pub const feature_r4 = Feature{ .name = "r4", .description = "Cortex-R4 ARM processors", - .llvm_name = "r4", .subfeatures = &[_]*const Feature { }, }; @@ -1744,7 +1574,6 @@ pub const feature_r4 = Feature{ pub const feature_r5 = Feature{ .name = "r5", .description = "Cortex-R5 ARM processors", - .llvm_name = "r5", .subfeatures = &[_]*const Feature { }, }; @@ -1752,7 +1581,6 @@ pub const feature_r5 = Feature{ pub const feature_r7 = Feature{ .name = "r7", .description = "Cortex-R7 ARM processors", - .llvm_name = "r7", .subfeatures = &[_]*const Feature { }, }; @@ -1760,7 +1588,6 @@ pub const feature_r7 = Feature{ pub const feature_r52 = Feature{ .name = "r52", .description = "Cortex-R52 ARM processors", - .llvm_name = "r52", .subfeatures = &[_]*const Feature { }, }; @@ -1768,7 +1595,6 @@ pub const feature_r52 = Feature{ pub const feature_swift = Feature{ .name = "swift", .description = "Swift ARM processors", - .llvm_name = "swift", .subfeatures = &[_]*const Feature { }, }; @@ -1776,7 +1602,6 @@ pub const feature_swift = Feature{ pub const feature_xscale = Feature{ .name = "xscale", .description = "ARMv5te architecture", - .llvm_name = "xscale", .subfeatures = &[_]*const Feature { &feature_v4t, }, @@ -2032,9 +1857,9 @@ pub const cpu_arm1156t2S = Cpu{ .name = "arm1156t2-s", .llvm_name = "arm1156t2-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_dsp, &feature_thumb2, + &feature_dsp, + &feature_v4t, &feature_armv6t2, }, }; @@ -2043,9 +1868,9 @@ pub const cpu_arm1156t2fS = Cpu{ .name = "arm1156t2f-s", .llvm_name = "arm1156t2f-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_dsp, &feature_thumb2, + &feature_dsp, + &feature_v4t, &feature_armv6t2, &feature_slowfpvmlx, &feature_fpregs, @@ -2241,15 +2066,15 @@ pub const cpu_cortexA12 = Cpu{ .name = "cortex-a12", .llvm_name = "cortex-a12", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -2258,8 +2083,8 @@ pub const cpu_cortexA12 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdiv, &feature_hwdivArm, + &feature_hwdiv, &feature_virtualization, &feature_a12, }, @@ -2269,15 +2094,15 @@ pub const cpu_cortexA15 = Cpu{ .name = "cortex-a15", .llvm_name = "cortex-a15", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -2289,8 +2114,8 @@ pub const cpu_cortexA15 = Cpu{ &feature_trustzone, &feature_fp16, &feature_vfp4, - &feature_hwdiv, &feature_hwdivArm, + &feature_hwdiv, &feature_virtualization, &feature_a15, }, @@ -2300,15 +2125,15 @@ pub const cpu_cortexA17 = Cpu{ .name = "cortex-a17", .llvm_name = "cortex-a17", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -2317,8 +2142,8 @@ pub const cpu_cortexA17 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdiv, &feature_hwdivArm, + &feature_hwdiv, &feature_virtualization, &feature_a17, }, @@ -2328,22 +2153,22 @@ pub const cpu_cortexA32 = Cpu{ .name = "cortex-a32", .llvm_name = "cortex-a32", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, }, @@ -2353,22 +2178,22 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, &feature_a35, @@ -2379,15 +2204,15 @@ pub const cpu_cortexA5 = Cpu{ .name = "cortex-a5", .llvm_name = "cortex-a5", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_retAddrStack, &feature_slowfpvmlx, @@ -2405,22 +2230,22 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, &feature_fpao, @@ -2432,23 +2257,23 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_dotprod, &feature_a55, @@ -2459,22 +2284,22 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, @@ -2488,15 +2313,15 @@ pub const cpu_cortexA7 = Cpu{ .name = "cortex-a7", .llvm_name = "cortex-a7", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_retAddrStack, &feature_slowfpvmlx, @@ -2507,8 +2332,8 @@ pub const cpu_cortexA7 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdiv, &feature_hwdivArm, + &feature_hwdiv, &feature_virtualization, &feature_a7, }, @@ -2518,22 +2343,22 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, &feature_a72, @@ -2544,22 +2369,22 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, &feature_a73, @@ -2570,23 +2395,23 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_dotprod, &feature_a75, @@ -2597,23 +2422,23 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_crypto, &feature_dotprod, @@ -2626,23 +2451,23 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_crypto, &feature_dotprod, @@ -2655,15 +2480,15 @@ pub const cpu_cortexA8 = Cpu{ .name = "cortex-a8", .llvm_name = "cortex-a8", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_retAddrStack, &feature_slowfpvmlx, @@ -2680,15 +2505,15 @@ pub const cpu_cortexA9 = Cpu{ .name = "cortex-a9", .llvm_name = "cortex-a9", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -2711,11 +2536,11 @@ pub const cpu_cortexM0 = Cpu{ .llvm_name = "cortex-m0", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, &feature_armv6M, }, }; @@ -2725,11 +2550,11 @@ pub const cpu_cortexM0plus = Cpu{ .llvm_name = "cortex-m0plus", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, &feature_armv6M, }, }; @@ -2739,11 +2564,11 @@ pub const cpu_cortexM1 = Cpu{ .llvm_name = "cortex-m1", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, &feature_armv6M, }, }; @@ -2752,16 +2577,16 @@ pub const cpu_cortexM23 = Cpu{ .name = "cortex-m23", .llvm_name = "cortex-m23", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_db, - &feature_msecext8, - &feature_thumbMode, &feature_mclass, + &feature_hwdiv, + &feature_thumbMode, + &feature_strictAlign, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, &feature_noarm, &feature_v4t, - &feature_strictAlign, - &feature_hwdiv, &feature_armv8Mbase, &feature_noMovt, }, @@ -2771,15 +2596,15 @@ pub const cpu_cortexM3 = Cpu{ .name = "cortex-m3", .llvm_name = "cortex-m3", .subfeatures = &[_]*const Feature { - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, &feature_armv7M, &feature_noBranchPredictor, &feature_loopAlign, @@ -2793,17 +2618,17 @@ pub const cpu_cortexM33 = Cpu{ .name = "cortex-m33", .llvm_name = "cortex-m33", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_db, - &feature_msecext8, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, &feature_armv8Mmain, &feature_dsp, &feature_fp16, @@ -2821,17 +2646,17 @@ pub const cpu_cortexM35p = Cpu{ .name = "cortex-m35p", .llvm_name = "cortex-m35p", .subfeatures = &[_]*const Feature { - &feature_acquireRelease, - &feature_v7clrex, &feature_db, - &feature_msecext8, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_msecext8, + &feature_acquireRelease, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, &feature_armv8Mmain, &feature_dsp, &feature_fp16, @@ -2849,16 +2674,16 @@ pub const cpu_cortexM4 = Cpu{ .name = "cortex-m4", .llvm_name = "cortex-m4", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, + &feature_dsp, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_dsp, - &feature_hwdiv, &feature_armv7eM, &feature_noBranchPredictor, &feature_slowfpvmlx, @@ -2875,19 +2700,19 @@ pub const cpu_cortexM7 = Cpu{ .name = "cortex-m7", .llvm_name = "cortex-m7", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, + &feature_dsp, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_dsp, - &feature_hwdiv, &feature_armv7eM, - &feature_fp16, &feature_fpregs, + &feature_fp16, &feature_fpArmv8d16, }, }; @@ -2896,14 +2721,14 @@ pub const cpu_cortexR4 = Cpu{ .name = "cortex-r4", .llvm_name = "cortex-r4", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, &feature_armv7R, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -2915,14 +2740,14 @@ pub const cpu_cortexR4f = Cpu{ .name = "cortex-r4f", .llvm_name = "cortex-r4f", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, &feature_armv7R, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -2938,14 +2763,14 @@ pub const cpu_cortexR5 = Cpu{ .name = "cortex-r5", .llvm_name = "cortex-r5", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, &feature_armv7R, &feature_avoidPartialCpsr, &feature_hwdivArm, @@ -2962,22 +2787,22 @@ pub const cpu_cortexR52 = Cpu{ .name = "cortex-r52", .llvm_name = "cortex-r52", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, - &feature_hwdiv, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_dsp, + &feature_hwdivArm, + &feature_hwdiv, + &feature_rclass, + &feature_fpregs, &feature_v4t, - &feature_d32, &feature_dfb, - &feature_hwdivArm, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_crc, - &feature_dsp, - &feature_fpregs, - &feature_rclass, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_d32, &feature_armv8R, &feature_fpao, &feature_useAa, @@ -2990,14 +2815,14 @@ pub const cpu_cortexR7 = Cpu{ .name = "cortex-r7", .llvm_name = "cortex-r7", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, &feature_armv7R, &feature_avoidPartialCpsr, &feature_fp16, @@ -3016,14 +2841,14 @@ pub const cpu_cortexR8 = Cpu{ .name = "cortex-r8", .llvm_name = "cortex-r8", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, - &feature_thumb2, - &feature_v4t, &feature_dsp, &feature_hwdiv, &feature_rclass, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, + &feature_v4t, &feature_armv7R, &feature_avoidPartialCpsr, &feature_fp16, @@ -3041,22 +2866,22 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_avoidMovsShop, &feature_avoidPartialCpsr, @@ -3085,36 +2910,36 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_zcz, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, + &feature_wideStrideVfp, &feature_retAddrStack, - &feature_expandFpMlx, - &feature_useAa, - &feature_dontWidenVmovs, + &feature_fuseAes, &feature_fuseLiterals, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_dontWidenVmovs, &feature_exynos, }, }; @@ -3123,36 +2948,36 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_zcz, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, + &feature_wideStrideVfp, &feature_retAddrStack, - &feature_expandFpMlx, - &feature_useAa, - &feature_dontWidenVmovs, + &feature_fuseAes, &feature_fuseLiterals, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_dontWidenVmovs, &feature_exynos, }, }; @@ -3161,36 +2986,36 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_zcz, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, + &feature_wideStrideVfp, &feature_retAddrStack, - &feature_expandFpMlx, - &feature_useAa, - &feature_dontWidenVmovs, + &feature_fuseAes, &feature_fuseLiterals, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_dontWidenVmovs, &feature_exynos, }, }; @@ -3199,39 +3024,39 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_dotprod, &feature_fullfp16, - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_zcz, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, + &feature_wideStrideVfp, &feature_retAddrStack, - &feature_expandFpMlx, - &feature_useAa, - &feature_dontWidenVmovs, + &feature_fuseAes, &feature_fuseLiterals, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_dontWidenVmovs, &feature_exynos, }, }; @@ -3240,39 +3065,39 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_dotprod, &feature_fullfp16, - &feature_slowFpBrcc, - &feature_slowfpvmlx, + &feature_useAa, + &feature_zcz, + &feature_expandFpMlx, &feature_slowVdup32, - &feature_wideStrideVfp, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_zcz, &feature_profUnpr, + &feature_wideStrideVfp, &feature_retAddrStack, - &feature_expandFpMlx, - &feature_useAa, - &feature_dontWidenVmovs, + &feature_fuseAes, &feature_fuseLiterals, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_dontWidenVmovs, &feature_exynos, }, }; @@ -3297,15 +3122,15 @@ pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -3324,22 +3149,22 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, - &feature_thumb2, - &feature_fp16, + &feature_fpregs, &feature_v4t, - &feature_d32, + &feature_thumb2, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv8A, &feature_crypto, &feature_kryo, @@ -3371,23 +3196,23 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .subfeatures = &[_]*const Feature { - &feature_mp, - &feature_acquireRelease, - &feature_perfmon, + &feature_db, + &feature_dsp, + &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, - &feature_v7clrex, - &feature_db, + &feature_fpregs, + &feature_v4t, &feature_thumb2, &feature_ras, - &feature_fp16, - &feature_v4t, - &feature_d32, + &feature_v7clrex, &feature_aclass, - &feature_hwdivArm, &feature_crc, - &feature_dsp, - &feature_fpregs, + &feature_mp, + &feature_acquireRelease, + &feature_fp16, + &feature_perfmon, + &feature_d32, &feature_armv82A, &feature_crypto, &feature_dotprod, @@ -3399,11 +3224,11 @@ pub const cpu_sc000 = Cpu{ .llvm_name = "sc000", .subfeatures = &[_]*const Feature { &feature_db, - &feature_thumbMode, &feature_mclass, + &feature_thumbMode, + &feature_strictAlign, &feature_noarm, &feature_v4t, - &feature_strictAlign, &feature_armv6M, }, }; @@ -3412,15 +3237,15 @@ pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", .subfeatures = &[_]*const Feature { - &feature_v7clrex, &feature_db, - &feature_thumb2, &feature_mclass, + &feature_hwdiv, &feature_thumbMode, + &feature_thumb2, + &feature_v7clrex, + &feature_perfmon, &feature_noarm, &feature_v4t, - &feature_perfmon, - &feature_hwdiv, &feature_armv7M, &feature_noBranchPredictor, &feature_useAa, @@ -3465,15 +3290,15 @@ pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", .subfeatures = &[_]*const Feature { - &feature_perfmon, - &feature_v7clrex, &feature_db, + &feature_dsp, + &feature_fpregs, &feature_thumb2, + &feature_v7clrex, + &feature_aclass, + &feature_perfmon, &feature_v4t, &feature_d32, - &feature_aclass, - &feature_dsp, - &feature_fpregs, &feature_armv7A, &feature_avoidMovsShop, &feature_avoidPartialCpsr, diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index a843ba5e28776304461bcf829ee12d6f5d8ae513..4ca020d897b10d56f842da34d9c28f693d44e491 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_avr0 = Feature{ .name = "avr0", .description = "The device is a part of the avr0 family", - .llvm_name = "avr0", .subfeatures = &[_]*const Feature { }, }; @@ -12,234 +11,220 @@ pub const feature_avr0 = Feature{ pub const feature_avr1 = Feature{ .name = "avr1", .description = "The device is a part of the avr1 family", - .llvm_name = "avr1", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, }, }; pub const feature_avr2 = Feature{ .name = "avr2", .description = "The device is a part of the avr2 family", - .llvm_name = "avr2", .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, }, }; pub const feature_avr3 = Feature{ .name = "avr3", .description = "The device is a part of the avr3 family", - .llvm_name = "avr3", .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, }, }; pub const feature_avr4 = Feature{ .name = "avr4", .description = "The device is a part of the avr4 family", - .llvm_name = "avr4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, }, }; pub const feature_avr5 = Feature{ .name = "avr5", .description = "The device is a part of the avr5 family", - .llvm_name = "avr5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, }, }; pub const feature_avr6 = Feature{ .name = "avr6", .description = "The device is a part of the avr6 family", - .llvm_name = "avr6", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, }, }; pub const feature_avr25 = Feature{ .name = "avr25", .description = "The device is a part of the avr25 family", - .llvm_name = "avr25", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, }, }; pub const feature_avr31 = Feature{ .name = "avr31", .description = "The device is a part of the avr31 family", - .llvm_name = "avr31", .subfeatures = &[_]*const Feature { - &feature_jmpcall, &feature_ijmpcall, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_elpm, &feature_addsubiw, + &feature_elpm, + &feature_lpm, + &feature_avr0, }, }; pub const feature_avr35 = Feature{ .name = "avr35", .description = "The device is a part of the avr35 family", - .llvm_name = "avr35", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, }, }; pub const feature_avr51 = Feature{ .name = "avr51", .description = "The device is a part of the avr51 family", - .llvm_name = "avr51", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, }, }; pub const feature_avrtiny = Feature{ .name = "avrtiny", .description = "The device is a part of the avrtiny family", - .llvm_name = "avrtiny", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, }, }; pub const feature_xmega = Feature{ .name = "xmega", .description = "The device is a part of the xmega family", - .llvm_name = "xmega", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, }, }; pub const feature_xmegau = Feature{ .name = "xmegau", .description = "The device is a part of the xmegau family", - .llvm_name = "xmegau", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, }, }; pub const feature_addsubiw = Feature{ .name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .llvm_name = "addsubiw", .subfeatures = &[_]*const Feature { }, }; @@ -247,7 +232,6 @@ pub const feature_addsubiw = Feature{ pub const feature_break = Feature{ .name = "break", .description = "The device supports the `BREAK` debugging instruction", - .llvm_name = "break", .subfeatures = &[_]*const Feature { }, }; @@ -255,7 +239,6 @@ pub const feature_break = Feature{ pub const feature_des = Feature{ .name = "des", .description = "The device supports the `DES k` encryption instruction", - .llvm_name = "des", .subfeatures = &[_]*const Feature { }, }; @@ -263,7 +246,6 @@ pub const feature_des = Feature{ pub const feature_eijmpcall = Feature{ .name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", - .llvm_name = "eijmpcall", .subfeatures = &[_]*const Feature { }, }; @@ -271,7 +253,6 @@ pub const feature_eijmpcall = Feature{ pub const feature_elpm = Feature{ .name = "elpm", .description = "The device supports the ELPM instruction", - .llvm_name = "elpm", .subfeatures = &[_]*const Feature { }, }; @@ -279,7 +260,6 @@ pub const feature_elpm = Feature{ pub const feature_elpmx = Feature{ .name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .llvm_name = "elpmx", .subfeatures = &[_]*const Feature { }, }; @@ -287,7 +267,6 @@ pub const feature_elpmx = Feature{ pub const feature_ijmpcall = Feature{ .name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", - .llvm_name = "ijmpcall", .subfeatures = &[_]*const Feature { }, }; @@ -295,7 +274,6 @@ pub const feature_ijmpcall = Feature{ pub const feature_jmpcall = Feature{ .name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", - .llvm_name = "jmpcall", .subfeatures = &[_]*const Feature { }, }; @@ -303,7 +281,6 @@ pub const feature_jmpcall = Feature{ pub const feature_lpm = Feature{ .name = "lpm", .description = "The device supports the `LPM` instruction", - .llvm_name = "lpm", .subfeatures = &[_]*const Feature { }, }; @@ -311,7 +288,6 @@ pub const feature_lpm = Feature{ pub const feature_lpmx = Feature{ .name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", - .llvm_name = "lpmx", .subfeatures = &[_]*const Feature { }, }; @@ -319,7 +295,6 @@ pub const feature_lpmx = Feature{ pub const feature_movw = Feature{ .name = "movw", .description = "The device supports the 16-bit MOVW instruction", - .llvm_name = "movw", .subfeatures = &[_]*const Feature { }, }; @@ -327,7 +302,6 @@ pub const feature_movw = Feature{ pub const feature_mul = Feature{ .name = "mul", .description = "The device supports the multiplication instructions", - .llvm_name = "mul", .subfeatures = &[_]*const Feature { }, }; @@ -335,7 +309,6 @@ pub const feature_mul = Feature{ pub const feature_rmw = Feature{ .name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .llvm_name = "rmw", .subfeatures = &[_]*const Feature { }, }; @@ -343,7 +316,6 @@ pub const feature_rmw = Feature{ pub const feature_spm = Feature{ .name = "spm", .description = "The device supports the `SPM` instruction", - .llvm_name = "spm", .subfeatures = &[_]*const Feature { }, }; @@ -351,7 +323,6 @@ pub const feature_spm = Feature{ pub const feature_spmx = Feature{ .name = "spmx", .description = "The device supports the `SPM Z+` instruction", - .llvm_name = "spmx", .subfeatures = &[_]*const Feature { }, }; @@ -359,7 +330,6 @@ pub const feature_spmx = Feature{ pub const feature_sram = Feature{ .name = "sram", .description = "The device has random access memory", - .llvm_name = "sram", .subfeatures = &[_]*const Feature { }, }; @@ -367,31 +337,29 @@ pub const feature_sram = Feature{ pub const feature_special = Feature{ .name = "special", .description = "Enable use of the entire instruction set - used for debugging", - .llvm_name = "special", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, - &feature_sram, - &feature_mul, &feature_rmw, - &feature_spmx, - &feature_lpm, - &feature_eijmpcall, - &feature_break, - &feature_spm, - &feature_elpmx, + &feature_sram, &feature_elpm, &feature_addsubiw, - &feature_des, + &feature_eijmpcall, + &feature_elpmx, + &feature_break, + &feature_lpm, + &feature_mul, + &feature_movw, + &feature_spmx, }, }; pub const feature_smallstack = Feature{ .name = "smallstack", .description = "The device has an 8-bit stack pointer", - .llvm_name = "smallstack", .subfeatures = &[_]*const Feature { }, }; @@ -399,7 +367,6 @@ pub const feature_smallstack = Feature{ pub const feature_tinyencoding = Feature{ .name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", - .llvm_name = "tinyencoding", .subfeatures = &[_]*const Feature { }, }; @@ -444,13 +411,13 @@ pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", .subfeatures = &[_]*const Feature { - &feature_jmpcall, &feature_ijmpcall, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_elpm, &feature_addsubiw, + &feature_elpm, + &feature_lpm, + &feature_avr0, &feature_avr31, }, }; @@ -462,9 +429,9 @@ pub const cpu_at43usb355 = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, }, }; @@ -476,9 +443,9 @@ pub const cpu_at76c711 = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, }, }; @@ -489,9 +456,9 @@ pub const cpu_at86rf401 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, &feature_lpmx, &feature_movw, @@ -504,9 +471,9 @@ pub const cpu_at90c8534 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -515,19 +482,19 @@ pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -536,17 +503,17 @@ pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -555,17 +522,17 @@ pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -574,16 +541,16 @@ pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -592,17 +559,17 @@ pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -611,16 +578,16 @@ pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -629,17 +596,17 @@ pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -648,16 +615,16 @@ pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -666,16 +633,16 @@ pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -684,17 +651,17 @@ pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -703,16 +670,16 @@ pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -721,16 +688,16 @@ pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -749,9 +716,9 @@ pub const cpu_at90s2313 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -762,9 +729,9 @@ pub const cpu_at90s2323 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -775,9 +742,9 @@ pub const cpu_at90s2333 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -788,9 +755,9 @@ pub const cpu_at90s2343 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -801,9 +768,9 @@ pub const cpu_at90s4414 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -814,9 +781,9 @@ pub const cpu_at90s4433 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -827,9 +794,9 @@ pub const cpu_at90s4434 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -840,9 +807,9 @@ pub const cpu_at90s8515 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -853,9 +820,9 @@ pub const cpu_at90s8535 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -864,17 +831,17 @@ pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -883,19 +850,19 @@ pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -904,19 +871,19 @@ pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -925,16 +892,16 @@ pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -943,17 +910,17 @@ pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -962,17 +929,17 @@ pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -981,16 +948,16 @@ pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -1002,9 +969,9 @@ pub const cpu_at94k = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, &feature_lpmx, &feature_movw, @@ -1016,15 +983,15 @@ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -1033,16 +1000,16 @@ pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -1051,17 +1018,17 @@ pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1070,17 +1037,17 @@ pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1089,16 +1056,16 @@ pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -1107,16 +1074,16 @@ pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -1125,16 +1092,16 @@ pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -1143,13 +1110,13 @@ pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", .subfeatures = &[_]*const Feature { - &feature_jmpcall, &feature_ijmpcall, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_elpm, &feature_addsubiw, + &feature_elpm, + &feature_lpm, + &feature_avr0, &feature_avr31, }, }; @@ -1158,19 +1125,19 @@ pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1179,19 +1146,19 @@ pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1200,19 +1167,19 @@ pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1221,19 +1188,19 @@ pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1242,19 +1209,19 @@ pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1263,19 +1230,19 @@ pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1284,19 +1251,19 @@ pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1305,19 +1272,19 @@ pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1326,19 +1293,19 @@ pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -1347,17 +1314,17 @@ pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1369,9 +1336,9 @@ pub const cpu_atmega161 = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, &feature_lpmx, &feature_movw, @@ -1384,17 +1351,17 @@ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1406,9 +1373,9 @@ pub const cpu_atmega163 = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, &feature_lpmx, &feature_movw, @@ -1421,17 +1388,17 @@ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1440,17 +1407,17 @@ pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1459,17 +1426,17 @@ pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1478,17 +1445,17 @@ pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1497,17 +1464,17 @@ pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1516,17 +1483,17 @@ pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1535,17 +1502,17 @@ pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1554,17 +1521,17 @@ pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1573,17 +1540,17 @@ pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1592,17 +1559,17 @@ pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1611,17 +1578,17 @@ pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1630,17 +1597,17 @@ pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1649,17 +1616,17 @@ pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1668,17 +1635,17 @@ pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1687,17 +1654,17 @@ pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1706,17 +1673,17 @@ pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1725,17 +1692,17 @@ pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1744,17 +1711,17 @@ pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1763,17 +1730,17 @@ pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1782,17 +1749,17 @@ pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1801,17 +1768,17 @@ pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1820,16 +1787,16 @@ pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -1838,17 +1805,17 @@ pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1857,19 +1824,19 @@ pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr6, }, }; @@ -1878,19 +1845,19 @@ pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr6, }, }; @@ -1899,19 +1866,19 @@ pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr6, }, }; @@ -1920,19 +1887,19 @@ pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr6, }, }; @@ -1941,17 +1908,17 @@ pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1960,17 +1927,17 @@ pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1979,17 +1946,17 @@ pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -1998,17 +1965,17 @@ pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2017,17 +1984,17 @@ pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2036,17 +2003,17 @@ pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2055,17 +2022,17 @@ pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2074,17 +2041,17 @@ pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2093,17 +2060,17 @@ pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2112,17 +2079,17 @@ pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2131,17 +2098,17 @@ pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2150,17 +2117,17 @@ pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2169,17 +2136,17 @@ pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2188,17 +2155,17 @@ pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2207,17 +2174,17 @@ pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2226,17 +2193,17 @@ pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2245,17 +2212,17 @@ pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2264,17 +2231,17 @@ pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2283,17 +2250,17 @@ pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2302,17 +2269,17 @@ pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2321,17 +2288,17 @@ pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2340,17 +2307,17 @@ pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2359,17 +2326,17 @@ pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2378,17 +2345,17 @@ pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2397,17 +2364,17 @@ pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2416,17 +2383,17 @@ pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2435,17 +2402,17 @@ pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2454,17 +2421,17 @@ pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2473,16 +2440,16 @@ pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -2491,17 +2458,17 @@ pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2510,17 +2477,17 @@ pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2529,17 +2496,17 @@ pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2548,16 +2515,16 @@ pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -2566,16 +2533,16 @@ pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -2584,16 +2551,16 @@ pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -2602,16 +2569,16 @@ pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -2620,17 +2587,17 @@ pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2639,17 +2606,17 @@ pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2658,17 +2625,17 @@ pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2677,17 +2644,17 @@ pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2696,17 +2663,17 @@ pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2715,17 +2682,17 @@ pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2734,17 +2701,17 @@ pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2753,17 +2720,17 @@ pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2772,17 +2739,17 @@ pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2791,17 +2758,17 @@ pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2810,17 +2777,17 @@ pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2829,17 +2796,17 @@ pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2848,17 +2815,17 @@ pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2867,17 +2834,17 @@ pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2886,17 +2853,17 @@ pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2905,17 +2872,17 @@ pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2924,17 +2891,17 @@ pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2943,17 +2910,17 @@ pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2962,17 +2929,17 @@ pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -2981,17 +2948,17 @@ pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -3000,17 +2967,17 @@ pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -3019,17 +2986,17 @@ pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -3038,17 +3005,17 @@ pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -3057,17 +3024,17 @@ pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -3076,16 +3043,16 @@ pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3096,9 +3063,9 @@ pub const cpu_atmega8515 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, &feature_lpmx, &feature_movw, @@ -3113,9 +3080,9 @@ pub const cpu_atmega8535 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, &feature_lpmx, &feature_movw, @@ -3128,16 +3095,16 @@ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3146,16 +3113,16 @@ pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3164,16 +3131,16 @@ pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3182,16 +3149,16 @@ pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3200,16 +3167,16 @@ pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3218,16 +3185,16 @@ pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -3236,16 +3203,16 @@ pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -3254,10 +3221,10 @@ pub const cpu_attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3266,10 +3233,10 @@ pub const cpu_attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3278,10 +3245,10 @@ pub const cpu_attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3290,8 +3257,8 @@ pub const cpu_attiny11 = Cpu{ .name = "attiny11", .llvm_name = "attiny11", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, &feature_avr1, }, }; @@ -3300,8 +3267,8 @@ pub const cpu_attiny12 = Cpu{ .name = "attiny12", .llvm_name = "attiny12", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, &feature_avr1, }, }; @@ -3310,15 +3277,15 @@ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3327,15 +3294,15 @@ pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3344,8 +3311,8 @@ pub const cpu_attiny15 = Cpu{ .name = "attiny15", .llvm_name = "attiny15", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, &feature_avr1, }, }; @@ -3354,16 +3321,16 @@ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -3372,16 +3339,16 @@ pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -3390,10 +3357,10 @@ pub const cpu_attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3404,9 +3371,9 @@ pub const cpu_attiny22 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -3415,15 +3382,15 @@ pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3432,15 +3399,15 @@ pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3449,15 +3416,15 @@ pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3466,15 +3433,15 @@ pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3483,15 +3450,15 @@ pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3502,9 +3469,9 @@ pub const cpu_attiny26 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, &feature_lpmx, }, @@ -3514,15 +3481,15 @@ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3531,15 +3498,15 @@ pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3548,8 +3515,8 @@ pub const cpu_attiny28 = Cpu{ .name = "attiny28", .llvm_name = "attiny28", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, &feature_avr1, }, }; @@ -3558,10 +3525,10 @@ pub const cpu_attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3570,10 +3537,10 @@ pub const cpu_attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3582,15 +3549,15 @@ pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3599,15 +3566,15 @@ pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3616,15 +3583,15 @@ pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3633,15 +3600,15 @@ pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3650,15 +3617,15 @@ pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3667,15 +3634,15 @@ pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3684,15 +3651,15 @@ pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3701,15 +3668,15 @@ pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3718,10 +3685,10 @@ pub const cpu_attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3730,15 +3697,15 @@ pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3747,15 +3714,15 @@ pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3764,15 +3731,15 @@ pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3781,15 +3748,15 @@ pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3798,15 +3765,15 @@ pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3815,15 +3782,15 @@ pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3832,15 +3799,15 @@ pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3849,15 +3816,15 @@ pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -3866,10 +3833,10 @@ pub const cpu_attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -3878,22 +3845,22 @@ pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -3902,23 +3869,23 @@ pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -3927,22 +3894,22 @@ pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -3951,23 +3918,23 @@ pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -3976,23 +3943,23 @@ pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4001,23 +3968,23 @@ pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4026,23 +3993,23 @@ pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4051,23 +4018,23 @@ pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4076,22 +4043,22 @@ pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4100,22 +4067,22 @@ pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4124,22 +4091,22 @@ pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4148,23 +4115,23 @@ pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4173,23 +4140,23 @@ pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4198,22 +4165,22 @@ pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4222,22 +4189,22 @@ pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4246,22 +4213,22 @@ pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4270,23 +4237,23 @@ pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4295,23 +4262,23 @@ pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4320,22 +4287,22 @@ pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4344,22 +4311,22 @@ pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4368,22 +4335,22 @@ pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4392,23 +4359,23 @@ pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4417,23 +4384,23 @@ pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4442,23 +4409,23 @@ pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4467,22 +4434,22 @@ pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4491,22 +4458,22 @@ pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4515,23 +4482,23 @@ pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4540,23 +4507,23 @@ pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4565,22 +4532,22 @@ pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4589,22 +4556,22 @@ pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4613,22 +4580,22 @@ pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4637,23 +4604,23 @@ pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4662,22 +4629,22 @@ pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4686,22 +4653,22 @@ pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4710,23 +4677,23 @@ pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4735,22 +4702,22 @@ pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4759,23 +4726,23 @@ pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4784,23 +4751,23 @@ pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4809,23 +4776,23 @@ pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4834,23 +4801,23 @@ pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4859,23 +4826,23 @@ pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, + &feature_des, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, &feature_rmw, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmegau, }, }; @@ -4884,22 +4851,22 @@ pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4908,22 +4875,22 @@ pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4932,22 +4899,22 @@ pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -4956,8 +4923,8 @@ pub const cpu_avr1 = Cpu{ .name = "avr1", .llvm_name = "avr1", .subfeatures = &[_]*const Feature { - &feature_avr0, &feature_lpm, + &feature_avr0, &feature_avr1, }, }; @@ -4968,9 +4935,9 @@ pub const cpu_avr2 = Cpu{ .subfeatures = &[_]*const Feature { &feature_ijmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr2, }, }; @@ -4979,15 +4946,15 @@ pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr25, }, }; @@ -4999,9 +4966,9 @@ pub const cpu_avr3 = Cpu{ &feature_ijmpcall, &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, &feature_addsubiw, + &feature_lpm, + &feature_avr0, &feature_avr3, }, }; @@ -5010,13 +4977,13 @@ pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", .subfeatures = &[_]*const Feature { - &feature_jmpcall, &feature_ijmpcall, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_elpm, &feature_addsubiw, + &feature_elpm, + &feature_lpm, + &feature_avr0, &feature_avr31, }, }; @@ -5025,16 +4992,16 @@ pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_avr0, - &feature_lpm, - &feature_break, - &feature_spm, &feature_addsubiw, + &feature_break, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr35, }, }; @@ -5043,16 +5010,16 @@ pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr4, }, }; @@ -5061,17 +5028,17 @@ pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; @@ -5080,19 +5047,19 @@ pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, &feature_ijmpcall, &feature_jmpcall, - &feature_movw, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr51, }, }; @@ -5101,19 +5068,19 @@ pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, + &feature_elpm, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, + &feature_avr0, + &feature_movw, &feature_avr6, }, }; @@ -5122,10 +5089,10 @@ pub const cpu_avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", .subfeatures = &[_]*const Feature { - &feature_tinyencoding, + &feature_avr0, &feature_sram, + &feature_tinyencoding, &feature_break, - &feature_avr0, &feature_avrtiny, }, }; @@ -5134,22 +5101,22 @@ pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5158,22 +5125,22 @@ pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5182,22 +5149,22 @@ pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5206,22 +5173,22 @@ pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5230,22 +5197,22 @@ pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5254,22 +5221,22 @@ pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5278,22 +5245,22 @@ pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, + &feature_des, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, - &feature_mul, - &feature_avr0, - &feature_spmx, - &feature_lpm, + &feature_addsubiw, + &feature_elpm, &feature_eijmpcall, + &feature_mul, &feature_break, - &feature_spm, + &feature_lpm, &feature_elpmx, - &feature_elpm, - &feature_addsubiw, - &feature_des, + &feature_avr0, + &feature_movw, + &feature_spmx, &feature_xmega, }, }; @@ -5302,17 +5269,17 @@ pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", .subfeatures = &[_]*const Feature { + &feature_spm, &feature_lpmx, - &feature_jmpcall, &feature_ijmpcall, - &feature_movw, + &feature_jmpcall, &feature_sram, + &feature_addsubiw, &feature_mul, - &feature_avr0, - &feature_lpm, &feature_break, - &feature_spm, - &feature_addsubiw, + &feature_lpm, + &feature_avr0, + &feature_movw, &feature_avr5, }, }; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 8a504eaf9e23d4a19625be4328bb606ce212bac1..d36f9f2e1deb3ca024577ce0d0867b53e64ceed5 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_alu32 = Feature{ .name = "alu32", .description = "Enable ALU32 instructions", - .llvm_name = "alu32", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_alu32 = Feature{ pub const feature_dummy = Feature{ .name = "dummy", .description = "unused feature", - .llvm_name = "dummy", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_dummy = Feature{ pub const feature_dwarfris = Feature{ .name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .llvm_name = "dwarfris", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 4ebc7edc2f9c20a52d36a7eee2e0a2abb843fbf3..0219b88815a0e85bea4db163cf65c7b1cab16da7 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_v5 = Feature{ .name = "v5", .description = "Enable Hexagon V5 architecture", - .llvm_name = "v5", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_v5 = Feature{ pub const feature_v55 = Feature{ .name = "v55", .description = "Enable Hexagon V55 architecture", - .llvm_name = "v55", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_v55 = Feature{ pub const feature_v60 = Feature{ .name = "v60", .description = "Enable Hexagon V60 architecture", - .llvm_name = "v60", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_v60 = Feature{ pub const feature_v62 = Feature{ .name = "v62", .description = "Enable Hexagon V62 architecture", - .llvm_name = "v62", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_v62 = Feature{ pub const feature_v65 = Feature{ .name = "v65", .description = "Enable Hexagon V65 architecture", - .llvm_name = "v65", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_v65 = Feature{ pub const feature_v66 = Feature{ .name = "v66", .description = "Enable Hexagon V66 architecture", - .llvm_name = "v66", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_v66 = Feature{ pub const feature_hvx = Feature{ .name = "hvx", .description = "Hexagon HVX instructions", - .llvm_name = "hvx", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_hvx = Feature{ pub const feature_hvxLength64b = Feature{ .name = "hvx-length64b", .description = "Hexagon HVX 64B instructions", - .llvm_name = "hvx-length64b", .subfeatures = &[_]*const Feature { &feature_hvx, }, @@ -69,7 +61,6 @@ pub const feature_hvxLength64b = Feature{ pub const feature_hvxLength128b = Feature{ .name = "hvx-length128b", .description = "Hexagon HVX 128B instructions", - .llvm_name = "hvx-length128b", .subfeatures = &[_]*const Feature { &feature_hvx, }, @@ -78,7 +69,6 @@ pub const feature_hvxLength128b = Feature{ pub const feature_hvxv60 = Feature{ .name = "hvxv60", .description = "Hexagon HVX instructions", - .llvm_name = "hvxv60", .subfeatures = &[_]*const Feature { &feature_hvx, }, @@ -87,7 +77,6 @@ pub const feature_hvxv60 = Feature{ pub const feature_hvxv62 = Feature{ .name = "hvxv62", .description = "Hexagon HVX instructions", - .llvm_name = "hvxv62", .subfeatures = &[_]*const Feature { &feature_hvx, }, @@ -96,7 +85,6 @@ pub const feature_hvxv62 = Feature{ pub const feature_hvxv65 = Feature{ .name = "hvxv65", .description = "Hexagon HVX instructions", - .llvm_name = "hvxv65", .subfeatures = &[_]*const Feature { &feature_hvx, }, @@ -105,7 +93,6 @@ pub const feature_hvxv65 = Feature{ pub const feature_hvxv66 = Feature{ .name = "hvxv66", .description = "Hexagon HVX instructions", - .llvm_name = "hvxv66", .subfeatures = &[_]*const Feature { &feature_zreg, &feature_hvx, @@ -115,7 +102,6 @@ pub const feature_hvxv66 = Feature{ pub const feature_zreg = Feature{ .name = "zreg", .description = "Hexagon ZReg extension instructions", - .llvm_name = "zreg", .subfeatures = &[_]*const Feature { }, }; @@ -123,7 +109,6 @@ pub const feature_zreg = Feature{ pub const feature_duplex = Feature{ .name = "duplex", .description = "Enable generation of duplex instruction", - .llvm_name = "duplex", .subfeatures = &[_]*const Feature { }, }; @@ -131,7 +116,6 @@ pub const feature_duplex = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Use constant-extended calls", - .llvm_name = "long-calls", .subfeatures = &[_]*const Feature { }, }; @@ -139,7 +123,6 @@ pub const feature_longCalls = Feature{ pub const feature_mem_noshuf = Feature{ .name = "mem_noshuf", .description = "Supports mem_noshuf feature", - .llvm_name = "mem_noshuf", .subfeatures = &[_]*const Feature { }, }; @@ -147,7 +130,6 @@ pub const feature_mem_noshuf = Feature{ pub const feature_memops = Feature{ .name = "memops", .description = "Use memop instructions", - .llvm_name = "memops", .subfeatures = &[_]*const Feature { }, }; @@ -155,7 +137,6 @@ pub const feature_memops = Feature{ pub const feature_nvj = Feature{ .name = "nvj", .description = "Support for new-value jumps", - .llvm_name = "nvj", .subfeatures = &[_]*const Feature { &feature_packets, }, @@ -164,7 +145,6 @@ pub const feature_nvj = Feature{ pub const feature_nvs = Feature{ .name = "nvs", .description = "Support for new-value stores", - .llvm_name = "nvs", .subfeatures = &[_]*const Feature { &feature_packets, }, @@ -173,7 +153,6 @@ pub const feature_nvs = Feature{ pub const feature_noreturnStackElim = Feature{ .name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", - .llvm_name = "noreturn-stack-elim", .subfeatures = &[_]*const Feature { }, }; @@ -181,7 +160,6 @@ pub const feature_noreturnStackElim = Feature{ pub const feature_packets = Feature{ .name = "packets", .description = "Support for instruction packets", - .llvm_name = "packets", .subfeatures = &[_]*const Feature { }, }; @@ -189,7 +167,6 @@ pub const feature_packets = Feature{ pub const feature_reservedR19 = Feature{ .name = "reserved-r19", .description = "Reserve register R19", - .llvm_name = "reserved-r19", .subfeatures = &[_]*const Feature { }, }; @@ -197,7 +174,6 @@ pub const feature_reservedR19 = Feature{ pub const feature_smallData = Feature{ .name = "small-data", .description = "Allow GP-relative addressing of global variables", - .llvm_name = "small-data", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index f2de051623fd46fbce71368bd3f9453038c3418e..3d02746606192af9566551929dbf2bc40319d61d 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_abs2008 = Feature{ .name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", - .llvm_name = "abs2008", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_abs2008 = Feature{ pub const feature_crc = Feature{ .name = "crc", .description = "Mips R6 CRC ASE", - .llvm_name = "crc", .subfeatures = &[_]*const Feature { }, }; @@ -20,23 +18,21 @@ pub const feature_crc = Feature{ pub const feature_cnmips = Feature{ .name = "cnmips", .description = "Octeon cnMIPS Support", - .llvm_name = "cnmips", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_dsp = Feature{ .name = "dsp", .description = "Mips DSP ASE", - .llvm_name = "dsp", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +40,6 @@ pub const feature_dsp = Feature{ pub const feature_dspr2 = Feature{ .name = "dspr2", .description = "Mips DSP-R2 ASE", - .llvm_name = "dspr2", .subfeatures = &[_]*const Feature { &feature_dsp, }, @@ -53,7 +48,6 @@ pub const feature_dspr2 = Feature{ pub const feature_dspr3 = Feature{ .name = "dspr3", .description = "Mips DSP-R3 ASE", - .llvm_name = "dspr3", .subfeatures = &[_]*const Feature { &feature_dsp, }, @@ -62,7 +56,6 @@ pub const feature_dspr3 = Feature{ pub const feature_eva = Feature{ .name = "eva", .description = "Mips EVA ASE", - .llvm_name = "eva", .subfeatures = &[_]*const Feature { }, }; @@ -70,7 +63,6 @@ pub const feature_eva = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", .description = "Support 64-bit FP registers", - .llvm_name = "fp64", .subfeatures = &[_]*const Feature { }, }; @@ -78,7 +70,6 @@ pub const feature_fp64 = Feature{ pub const feature_fpxx = Feature{ .name = "fpxx", .description = "Support for FPXX", - .llvm_name = "fpxx", .subfeatures = &[_]*const Feature { }, }; @@ -86,7 +77,6 @@ pub const feature_fpxx = Feature{ pub const feature_ginv = Feature{ .name = "ginv", .description = "Mips Global Invalidate ASE", - .llvm_name = "ginv", .subfeatures = &[_]*const Feature { }, }; @@ -94,7 +84,6 @@ pub const feature_ginv = Feature{ pub const feature_gp64 = Feature{ .name = "gp64", .description = "General Purpose Registers are 64-bit wide", - .llvm_name = "gp64", .subfeatures = &[_]*const Feature { }, }; @@ -102,7 +91,6 @@ pub const feature_gp64 = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Disable use of the jal instruction", - .llvm_name = "long-calls", .subfeatures = &[_]*const Feature { }, }; @@ -110,7 +98,6 @@ pub const feature_longCalls = Feature{ pub const feature_msa = Feature{ .name = "msa", .description = "Mips MSA ASE", - .llvm_name = "msa", .subfeatures = &[_]*const Feature { }, }; @@ -118,7 +105,6 @@ pub const feature_msa = Feature{ pub const feature_mt = Feature{ .name = "mt", .description = "Mips MT ASE", - .llvm_name = "mt", .subfeatures = &[_]*const Feature { }, }; @@ -126,7 +112,6 @@ pub const feature_mt = Feature{ pub const feature_nomadd4 = Feature{ .name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", - .llvm_name = "nomadd4", .subfeatures = &[_]*const Feature { }, }; @@ -134,7 +119,6 @@ pub const feature_nomadd4 = Feature{ pub const feature_micromips = Feature{ .name = "micromips", .description = "microMips mode", - .llvm_name = "micromips", .subfeatures = &[_]*const Feature { }, }; @@ -142,7 +126,6 @@ pub const feature_micromips = Feature{ pub const feature_mips1 = Feature{ .name = "mips1", .description = "Mips I ISA Support [highly experimental]", - .llvm_name = "mips1", .subfeatures = &[_]*const Feature { }, }; @@ -150,7 +133,6 @@ pub const feature_mips1 = Feature{ pub const feature_mips2 = Feature{ .name = "mips2", .description = "Mips II ISA Support [highly experimental]", - .llvm_name = "mips2", .subfeatures = &[_]*const Feature { &feature_mips1, }, @@ -159,20 +141,18 @@ pub const feature_mips2 = Feature{ pub const feature_mips3 = Feature{ .name = "mips3", .description = "MIPS III ISA Support [highly experimental]", - .llvm_name = "mips3", .subfeatures = &[_]*const Feature { &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, &feature_mips3_32, + &feature_mips1, &feature_fp64, + &feature_gp64, }, }; pub const feature_mips3_32 = Feature{ .name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .llvm_name = "mips3_32", .subfeatures = &[_]*const Feature { }, }; @@ -180,7 +160,6 @@ pub const feature_mips3_32 = Feature{ pub const feature_mips3_32r2 = Feature{ .name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .llvm_name = "mips3_32r2", .subfeatures = &[_]*const Feature { }, }; @@ -188,22 +167,20 @@ pub const feature_mips3_32r2 = Feature{ pub const feature_mips4 = Feature{ .name = "mips4", .description = "MIPS IV ISA Support", - .llvm_name = "mips4", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips4_32 = Feature{ .name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .llvm_name = "mips4_32", .subfeatures = &[_]*const Feature { }, }; @@ -211,7 +188,6 @@ pub const feature_mips4_32 = Feature{ pub const feature_mips4_32r2 = Feature{ .name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .llvm_name = "mips4_32r2", .subfeatures = &[_]*const Feature { }, }; @@ -219,23 +195,21 @@ pub const feature_mips4_32r2 = Feature{ pub const feature_mips5 = Feature{ .name = "mips5", .description = "MIPS V ISA Support [highly experimental]", - .llvm_name = "mips5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips5_32r2 = Feature{ .name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .llvm_name = "mips5_32r2", .subfeatures = &[_]*const Feature { }, }; @@ -243,7 +217,6 @@ pub const feature_mips5_32r2 = Feature{ pub const feature_mips16 = Feature{ .name = "mips16", .description = "Mips16 mode", - .llvm_name = "mips16", .subfeatures = &[_]*const Feature { }, }; @@ -251,159 +224,148 @@ pub const feature_mips16 = Feature{ pub const feature_mips32 = Feature{ .name = "mips32", .description = "Mips32 ISA Support", - .llvm_name = "mips32", .subfeatures = &[_]*const Feature { + &feature_mips1, &feature_mips4_32, &feature_mips3_32, - &feature_mips1, }, }; pub const feature_mips32r2 = Feature{ .name = "mips32r2", .description = "Mips32r2 ISA Support", - .llvm_name = "mips32r2", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, }, }; pub const feature_mips32r3 = Feature{ .name = "mips32r3", .description = "Mips32r3 ISA Support", - .llvm_name = "mips32r3", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, }, }; pub const feature_mips32r5 = Feature{ .name = "mips32r5", .description = "Mips32r5 ISA Support", - .llvm_name = "mips32r5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, }, }; pub const feature_mips32r6 = Feature{ .name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", - .llvm_name = "mips32r6", .subfeatures = &[_]*const Feature { - &feature_mips4_32, - &feature_nan2008, &feature_mips3_32r2, + &feature_mips3_32, + &feature_nan2008, + &feature_mips4_32r2, &feature_mips1, &feature_abs2008, - &feature_mips4_32r2, - &feature_mips5_32r2, - &feature_mips3_32, &feature_fp64, + &feature_mips5_32r2, + &feature_mips4_32, }, }; pub const feature_mips64 = Feature{ .name = "mips64", .description = "Mips64 ISA Support", - .llvm_name = "mips64", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips64r2 = Feature{ .name = "mips64r2", .description = "Mips64r2 ISA Support", - .llvm_name = "mips64r2", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips64r3 = Feature{ .name = "mips64r3", .description = "Mips64r3 ISA Support", - .llvm_name = "mips64r3", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips64r5 = Feature{ .name = "mips64r5", .description = "Mips64r5 ISA Support", - .llvm_name = "mips64r5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_mips64r6 = Feature{ .name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", - .llvm_name = "mips64r6", .subfeatures = &[_]*const Feature { - &feature_mips4_32, - &feature_nan2008, &feature_mips3_32r2, + &feature_mips3_32, + &feature_nan2008, + &feature_mips4_32r2, &feature_mips1, &feature_abs2008, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, - &feature_mips3_32, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, }, }; pub const feature_nan2008 = Feature{ .name = "nan2008", .description = "IEEE 754-2008 NaN encoding", - .llvm_name = "nan2008", .subfeatures = &[_]*const Feature { }, }; @@ -411,7 +373,6 @@ pub const feature_nan2008 = Feature{ pub const feature_noabicalls = Feature{ .name = "noabicalls", .description = "Disable SVR4-style position-independent code", - .llvm_name = "noabicalls", .subfeatures = &[_]*const Feature { }, }; @@ -419,7 +380,6 @@ pub const feature_noabicalls = Feature{ pub const feature_nooddspreg = Feature{ .name = "nooddspreg", .description = "Disable odd numbered single-precision registers", - .llvm_name = "nooddspreg", .subfeatures = &[_]*const Feature { }, }; @@ -427,7 +387,6 @@ pub const feature_nooddspreg = Feature{ pub const feature_ptr64 = Feature{ .name = "ptr64", .description = "Pointers are 64-bit wide", - .llvm_name = "ptr64", .subfeatures = &[_]*const Feature { }, }; @@ -435,7 +394,6 @@ pub const feature_ptr64 = Feature{ pub const feature_singleFloat = Feature{ .name = "single-float", .description = "Only supports single precision float", - .llvm_name = "single-float", .subfeatures = &[_]*const Feature { }, }; @@ -443,7 +401,6 @@ pub const feature_singleFloat = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Does not support floating point instructions", - .llvm_name = "soft-float", .subfeatures = &[_]*const Feature { }, }; @@ -451,7 +408,6 @@ pub const feature_softFloat = Feature{ pub const feature_sym32 = Feature{ .name = "sym32", .description = "Symbols are 32 bit on Mips64", - .llvm_name = "sym32", .subfeatures = &[_]*const Feature { }, }; @@ -459,7 +415,6 @@ pub const feature_sym32 = Feature{ pub const feature_useIndirectJumpHazard = Feature{ .name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", - .llvm_name = "use-indirect-jump-hazard", .subfeatures = &[_]*const Feature { }, }; @@ -467,7 +422,6 @@ pub const feature_useIndirectJumpHazard = Feature{ pub const feature_useTccInDiv = Feature{ .name = "use-tcc-in-div", .description = "Force the assembler to use trapping", - .llvm_name = "use-tcc-in-div", .subfeatures = &[_]*const Feature { }, }; @@ -475,7 +429,6 @@ pub const feature_useTccInDiv = Feature{ pub const feature_vfpu = Feature{ .name = "vfpu", .description = "Enable vector FPU instructions", - .llvm_name = "vfpu", .subfeatures = &[_]*const Feature { }, }; @@ -483,7 +436,6 @@ pub const feature_vfpu = Feature{ pub const feature_virt = Feature{ .name = "virt", .description = "Mips Virtualization ASE", - .llvm_name = "virt", .subfeatures = &[_]*const Feature { }, }; @@ -491,7 +443,6 @@ pub const feature_virt = Feature{ pub const feature_xgot = Feature{ .name = "xgot", .description = "Assume 32-bit GOT", - .llvm_name = "xgot", .subfeatures = &[_]*const Feature { }, }; @@ -499,14 +450,13 @@ pub const feature_xgot = Feature{ pub const feature_p5600 = Feature{ .name = "p5600", .description = "The P5600 Processor", - .llvm_name = "p5600", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, }, }; @@ -585,10 +535,10 @@ pub const cpu_mips3 = Cpu{ .llvm_name = "mips3", .subfeatures = &[_]*const Feature { &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, &feature_mips3_32, + &feature_mips1, &feature_fp64, + &feature_gp64, &feature_mips3, }, }; @@ -597,9 +547,9 @@ pub const cpu_mips32 = Cpu{ .name = "mips32", .llvm_name = "mips32", .subfeatures = &[_]*const Feature { + &feature_mips1, &feature_mips4_32, &feature_mips3_32, - &feature_mips1, &feature_mips32, }, }; @@ -608,12 +558,12 @@ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, &feature_mips32r2, }, }; @@ -622,12 +572,12 @@ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, &feature_mips32r3, }, }; @@ -636,12 +586,12 @@ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, &feature_mips32r5, }, }; @@ -650,15 +600,15 @@ pub const cpu_mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", .subfeatures = &[_]*const Feature { - &feature_mips4_32, - &feature_nan2008, &feature_mips3_32r2, + &feature_mips3_32, + &feature_nan2008, + &feature_mips4_32r2, &feature_mips1, &feature_abs2008, - &feature_mips4_32r2, - &feature_mips5_32r2, - &feature_mips3_32, &feature_fp64, + &feature_mips5_32r2, + &feature_mips4_32, &feature_mips32r6, }, }; @@ -667,13 +617,13 @@ pub const cpu_mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_gp64, + &feature_mips4_32, &feature_mips4, }, }; @@ -682,14 +632,14 @@ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips5, }, }; @@ -698,14 +648,14 @@ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips64, }, }; @@ -714,14 +664,14 @@ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips64r2, }, }; @@ -730,14 +680,14 @@ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips64r3, }, }; @@ -746,14 +696,14 @@ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips64r5, }, }; @@ -762,16 +712,16 @@ pub const cpu_mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", .subfeatures = &[_]*const Feature { - &feature_mips4_32, - &feature_nan2008, &feature_mips3_32r2, + &feature_mips3_32, + &feature_nan2008, + &feature_mips4_32r2, &feature_mips1, &feature_abs2008, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, - &feature_mips3_32, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_mips64r6, }, }; @@ -780,14 +730,14 @@ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, &feature_fp64, + &feature_mips5_32r2, + &feature_gp64, + &feature_mips4_32, &feature_cnmips, &feature_mips64r2, }, @@ -797,12 +747,12 @@ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", .subfeatures = &[_]*const Feature { - &feature_mips4_32, &feature_mips3_32r2, - &feature_mips1, + &feature_mips3_32, &feature_mips4_32r2, + &feature_mips1, &feature_mips5_32r2, - &feature_mips3_32, + &feature_mips4_32, &feature_p5600, }, }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 8a773328b2fe768baaeb4e649ba10ce949654e87..433537824d7f73651eb3ea17ae46d505973950fb 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_hwmult16 = Feature{ .name = "hwmult16", .description = "Enable 16-bit hardware multiplier", - .llvm_name = "hwmult16", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_hwmult16 = Feature{ pub const feature_hwmult32 = Feature{ .name = "hwmult32", .description = "Enable 32-bit hardware multiplier", - .llvm_name = "hwmult32", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_hwmult32 = Feature{ pub const feature_hwmultf5 = Feature{ .name = "hwmultf5", .description = "Enable F5 series hardware multiplier", - .llvm_name = "hwmultf5", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_hwmultf5 = Feature{ pub const feature_ext = Feature{ .name = "ext", .description = "Enable MSP430-X extensions", - .llvm_name = "ext", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index e978f64331b4708b5a60f026db73535565965814..5d5e27658753b9a823eb5ed79319ab05b1f20863 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_ptx32 = Feature{ .name = "ptx32", .description = "Use PTX version 3.2", - .llvm_name = "ptx32", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_ptx32 = Feature{ pub const feature_ptx40 = Feature{ .name = "ptx40", .description = "Use PTX version 4.0", - .llvm_name = "ptx40", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_ptx40 = Feature{ pub const feature_ptx41 = Feature{ .name = "ptx41", .description = "Use PTX version 4.1", - .llvm_name = "ptx41", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_ptx41 = Feature{ pub const feature_ptx42 = Feature{ .name = "ptx42", .description = "Use PTX version 4.2", - .llvm_name = "ptx42", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_ptx42 = Feature{ pub const feature_ptx43 = Feature{ .name = "ptx43", .description = "Use PTX version 4.3", - .llvm_name = "ptx43", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_ptx43 = Feature{ pub const feature_ptx50 = Feature{ .name = "ptx50", .description = "Use PTX version 5.0", - .llvm_name = "ptx50", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_ptx50 = Feature{ pub const feature_ptx60 = Feature{ .name = "ptx60", .description = "Use PTX version 6.0", - .llvm_name = "ptx60", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_ptx60 = Feature{ pub const feature_ptx61 = Feature{ .name = "ptx61", .description = "Use PTX version 6.1", - .llvm_name = "ptx61", .subfeatures = &[_]*const Feature { }, }; @@ -68,7 +60,6 @@ pub const feature_ptx61 = Feature{ pub const feature_ptx63 = Feature{ .name = "ptx63", .description = "Use PTX version 6.3", - .llvm_name = "ptx63", .subfeatures = &[_]*const Feature { }, }; @@ -76,7 +67,6 @@ pub const feature_ptx63 = Feature{ pub const feature_ptx64 = Feature{ .name = "ptx64", .description = "Use PTX version 6.4", - .llvm_name = "ptx64", .subfeatures = &[_]*const Feature { }, }; @@ -84,7 +74,6 @@ pub const feature_ptx64 = Feature{ pub const feature_sm_20 = Feature{ .name = "sm_20", .description = "Target SM 2.0", - .llvm_name = "sm_20", .subfeatures = &[_]*const Feature { }, }; @@ -92,7 +81,6 @@ pub const feature_sm_20 = Feature{ pub const feature_sm_21 = Feature{ .name = "sm_21", .description = "Target SM 2.1", - .llvm_name = "sm_21", .subfeatures = &[_]*const Feature { }, }; @@ -100,7 +88,6 @@ pub const feature_sm_21 = Feature{ pub const feature_sm_30 = Feature{ .name = "sm_30", .description = "Target SM 3.0", - .llvm_name = "sm_30", .subfeatures = &[_]*const Feature { }, }; @@ -108,7 +95,6 @@ pub const feature_sm_30 = Feature{ pub const feature_sm_32 = Feature{ .name = "sm_32", .description = "Target SM 3.2", - .llvm_name = "sm_32", .subfeatures = &[_]*const Feature { }, }; @@ -116,7 +102,6 @@ pub const feature_sm_32 = Feature{ pub const feature_sm_35 = Feature{ .name = "sm_35", .description = "Target SM 3.5", - .llvm_name = "sm_35", .subfeatures = &[_]*const Feature { }, }; @@ -124,7 +109,6 @@ pub const feature_sm_35 = Feature{ pub const feature_sm_37 = Feature{ .name = "sm_37", .description = "Target SM 3.7", - .llvm_name = "sm_37", .subfeatures = &[_]*const Feature { }, }; @@ -132,7 +116,6 @@ pub const feature_sm_37 = Feature{ pub const feature_sm_50 = Feature{ .name = "sm_50", .description = "Target SM 5.0", - .llvm_name = "sm_50", .subfeatures = &[_]*const Feature { }, }; @@ -140,7 +123,6 @@ pub const feature_sm_50 = Feature{ pub const feature_sm_52 = Feature{ .name = "sm_52", .description = "Target SM 5.2", - .llvm_name = "sm_52", .subfeatures = &[_]*const Feature { }, }; @@ -148,7 +130,6 @@ pub const feature_sm_52 = Feature{ pub const feature_sm_53 = Feature{ .name = "sm_53", .description = "Target SM 5.3", - .llvm_name = "sm_53", .subfeatures = &[_]*const Feature { }, }; @@ -156,7 +137,6 @@ pub const feature_sm_53 = Feature{ pub const feature_sm_60 = Feature{ .name = "sm_60", .description = "Target SM 6.0", - .llvm_name = "sm_60", .subfeatures = &[_]*const Feature { }, }; @@ -164,7 +144,6 @@ pub const feature_sm_60 = Feature{ pub const feature_sm_61 = Feature{ .name = "sm_61", .description = "Target SM 6.1", - .llvm_name = "sm_61", .subfeatures = &[_]*const Feature { }, }; @@ -172,7 +151,6 @@ pub const feature_sm_61 = Feature{ pub const feature_sm_62 = Feature{ .name = "sm_62", .description = "Target SM 6.2", - .llvm_name = "sm_62", .subfeatures = &[_]*const Feature { }, }; @@ -180,7 +158,6 @@ pub const feature_sm_62 = Feature{ pub const feature_sm_70 = Feature{ .name = "sm_70", .description = "Target SM 7.0", - .llvm_name = "sm_70", .subfeatures = &[_]*const Feature { }, }; @@ -188,7 +165,6 @@ pub const feature_sm_70 = Feature{ pub const feature_sm_72 = Feature{ .name = "sm_72", .description = "Target SM 7.2", - .llvm_name = "sm_72", .subfeatures = &[_]*const Feature { }, }; @@ -196,7 +172,6 @@ pub const feature_sm_72 = Feature{ pub const feature_sm_75 = Feature{ .name = "sm_75", .description = "Target SM 7.5", - .llvm_name = "sm_75", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 49f92cdc1a445651b1adf2ef92c7d39a99a9ff9b..212a604a4a05431fbbc1363c468ba774be0ecb5b 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", .description = "Enable 64-bit instructions", - .llvm_name = "64bit", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_bit64 = Feature{ pub const feature_bitregs64 = Feature{ .name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", - .llvm_name = "64bitregs", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_bitregs64 = Feature{ pub const feature_altivec = Feature{ .name = "altivec", .description = "Enable Altivec instructions", - .llvm_name = "altivec", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -29,7 +26,6 @@ pub const feature_altivec = Feature{ pub const feature_bpermd = Feature{ .name = "bpermd", .description = "Enable the bpermd instruction", - .llvm_name = "bpermd", .subfeatures = &[_]*const Feature { }, }; @@ -37,7 +33,6 @@ pub const feature_bpermd = Feature{ pub const feature_booke = Feature{ .name = "booke", .description = "Enable Book E instructions", - .llvm_name = "booke", .subfeatures = &[_]*const Feature { &feature_icbt, }, @@ -46,7 +41,6 @@ pub const feature_booke = Feature{ pub const feature_cmpb = Feature{ .name = "cmpb", .description = "Enable the cmpb instruction", - .llvm_name = "cmpb", .subfeatures = &[_]*const Feature { }, }; @@ -54,7 +48,6 @@ pub const feature_cmpb = Feature{ pub const feature_crbits = Feature{ .name = "crbits", .description = "Use condition-register bits individually", - .llvm_name = "crbits", .subfeatures = &[_]*const Feature { }, }; @@ -62,7 +55,6 @@ pub const feature_crbits = Feature{ pub const feature_directMove = Feature{ .name = "direct-move", .description = "Enable Power8 direct move instructions", - .llvm_name = "direct-move", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -71,7 +63,6 @@ pub const feature_directMove = Feature{ pub const feature_e500 = Feature{ .name = "e500", .description = "Enable E500/E500mc instructions", - .llvm_name = "e500", .subfeatures = &[_]*const Feature { }, }; @@ -79,7 +70,6 @@ pub const feature_e500 = Feature{ pub const feature_extdiv = Feature{ .name = "extdiv", .description = "Enable extended divide instructions", - .llvm_name = "extdiv", .subfeatures = &[_]*const Feature { }, }; @@ -87,7 +77,6 @@ pub const feature_extdiv = Feature{ pub const feature_fcpsgn = Feature{ .name = "fcpsgn", .description = "Enable the fcpsgn instruction", - .llvm_name = "fcpsgn", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -96,7 +85,6 @@ pub const feature_fcpsgn = Feature{ pub const feature_fpcvt = Feature{ .name = "fpcvt", .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", - .llvm_name = "fpcvt", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -105,7 +93,6 @@ pub const feature_fpcvt = Feature{ pub const feature_fprnd = Feature{ .name = "fprnd", .description = "Enable the fri[mnpz] instructions", - .llvm_name = "fprnd", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -114,7 +101,6 @@ pub const feature_fprnd = Feature{ pub const feature_fpu = Feature{ .name = "fpu", .description = "Enable classic FPU instructions", - .llvm_name = "fpu", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -123,7 +109,6 @@ pub const feature_fpu = Feature{ pub const feature_fre = Feature{ .name = "fre", .description = "Enable the fre instruction", - .llvm_name = "fre", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -132,7 +117,6 @@ pub const feature_fre = Feature{ pub const feature_fres = Feature{ .name = "fres", .description = "Enable the fres instruction", - .llvm_name = "fres", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -141,7 +125,6 @@ pub const feature_fres = Feature{ pub const feature_frsqrte = Feature{ .name = "frsqrte", .description = "Enable the frsqrte instruction", - .llvm_name = "frsqrte", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -150,7 +133,6 @@ pub const feature_frsqrte = Feature{ pub const feature_frsqrtes = Feature{ .name = "frsqrtes", .description = "Enable the frsqrtes instruction", - .llvm_name = "frsqrtes", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -159,7 +141,6 @@ pub const feature_frsqrtes = Feature{ pub const feature_fsqrt = Feature{ .name = "fsqrt", .description = "Enable the fsqrt instruction", - .llvm_name = "fsqrt", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -168,7 +149,6 @@ pub const feature_fsqrt = Feature{ pub const feature_float128 = Feature{ .name = "float128", .description = "Enable the __float128 data type for IEEE-754R Binary128.", - .llvm_name = "float128", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -177,7 +157,6 @@ pub const feature_float128 = Feature{ pub const feature_htm = Feature{ .name = "htm", .description = "Enable Hardware Transactional Memory instructions", - .llvm_name = "htm", .subfeatures = &[_]*const Feature { }, }; @@ -185,7 +164,6 @@ pub const feature_htm = Feature{ pub const feature_hardFloat = Feature{ .name = "hard-float", .description = "Enable floating-point instructions", - .llvm_name = "hard-float", .subfeatures = &[_]*const Feature { }, }; @@ -193,7 +171,6 @@ pub const feature_hardFloat = Feature{ pub const feature_icbt = Feature{ .name = "icbt", .description = "Enable icbt instruction", - .llvm_name = "icbt", .subfeatures = &[_]*const Feature { }, }; @@ -201,7 +178,6 @@ pub const feature_icbt = Feature{ pub const feature_isaV30Instructions = Feature{ .name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", - .llvm_name = "isa-v30-instructions", .subfeatures = &[_]*const Feature { }, }; @@ -209,7 +185,6 @@ pub const feature_isaV30Instructions = Feature{ pub const feature_isel = Feature{ .name = "isel", .description = "Enable the isel instruction", - .llvm_name = "isel", .subfeatures = &[_]*const Feature { }, }; @@ -217,7 +192,6 @@ pub const feature_isel = Feature{ pub const feature_invariantFunctionDescriptors = Feature{ .name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", - .llvm_name = "invariant-function-descriptors", .subfeatures = &[_]*const Feature { }, }; @@ -225,7 +199,6 @@ pub const feature_invariantFunctionDescriptors = Feature{ pub const feature_ldbrx = Feature{ .name = "ldbrx", .description = "Enable the ldbrx instruction", - .llvm_name = "ldbrx", .subfeatures = &[_]*const Feature { }, }; @@ -233,7 +206,6 @@ pub const feature_ldbrx = Feature{ pub const feature_lfiwax = Feature{ .name = "lfiwax", .description = "Enable the lfiwax instruction", - .llvm_name = "lfiwax", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -242,7 +214,6 @@ pub const feature_lfiwax = Feature{ pub const feature_longcall = Feature{ .name = "longcall", .description = "Always use indirect calls", - .llvm_name = "longcall", .subfeatures = &[_]*const Feature { }, }; @@ -250,7 +221,6 @@ pub const feature_longcall = Feature{ pub const feature_mfocrf = Feature{ .name = "mfocrf", .description = "Enable the MFOCRF instruction", - .llvm_name = "mfocrf", .subfeatures = &[_]*const Feature { }, }; @@ -258,7 +228,6 @@ pub const feature_mfocrf = Feature{ pub const feature_msync = Feature{ .name = "msync", .description = "Has only the msync instruction instead of sync", - .llvm_name = "msync", .subfeatures = &[_]*const Feature { &feature_icbt, }, @@ -267,7 +236,6 @@ pub const feature_msync = Feature{ pub const feature_power8Altivec = Feature{ .name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", - .llvm_name = "power8-altivec", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -276,7 +244,6 @@ pub const feature_power8Altivec = Feature{ pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable POWER8 Crypto instructions", - .llvm_name = "crypto", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -285,7 +252,6 @@ pub const feature_crypto = Feature{ pub const feature_power8Vector = Feature{ .name = "power8-vector", .description = "Enable POWER8 vector instructions", - .llvm_name = "power8-vector", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -294,27 +260,24 @@ pub const feature_power8Vector = Feature{ pub const feature_power9Altivec = Feature{ .name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", - .llvm_name = "power9-altivec", .subfeatures = &[_]*const Feature { - &feature_isaV30Instructions, &feature_hardFloat, + &feature_isaV30Instructions, }, }; pub const feature_power9Vector = Feature{ .name = "power9-vector", .description = "Enable POWER9 vector instructions", - .llvm_name = "power9-vector", .subfeatures = &[_]*const Feature { - &feature_isaV30Instructions, &feature_hardFloat, + &feature_isaV30Instructions, }, }; pub const feature_popcntd = Feature{ .name = "popcntd", .description = "Enable the popcnt[dw] instructions", - .llvm_name = "popcntd", .subfeatures = &[_]*const Feature { }, }; @@ -322,7 +285,6 @@ pub const feature_popcntd = Feature{ pub const feature_ppc4xx = Feature{ .name = "ppc4xx", .description = "Enable PPC 4xx instructions", - .llvm_name = "ppc4xx", .subfeatures = &[_]*const Feature { }, }; @@ -330,7 +292,6 @@ pub const feature_ppc4xx = Feature{ pub const feature_ppc6xx = Feature{ .name = "ppc6xx", .description = "Enable PPC 6xx instructions", - .llvm_name = "ppc6xx", .subfeatures = &[_]*const Feature { }, }; @@ -338,7 +299,6 @@ pub const feature_ppc6xx = Feature{ pub const feature_ppcPostraSched = Feature{ .name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", - .llvm_name = "ppc-postra-sched", .subfeatures = &[_]*const Feature { }, }; @@ -346,7 +306,6 @@ pub const feature_ppcPostraSched = Feature{ pub const feature_ppcPreraSched = Feature{ .name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", - .llvm_name = "ppc-prera-sched", .subfeatures = &[_]*const Feature { }, }; @@ -354,7 +313,6 @@ pub const feature_ppcPreraSched = Feature{ pub const feature_partwordAtomics = Feature{ .name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", - .llvm_name = "partword-atomics", .subfeatures = &[_]*const Feature { }, }; @@ -362,7 +320,6 @@ pub const feature_partwordAtomics = Feature{ pub const feature_qpx = Feature{ .name = "qpx", .description = "Enable QPX instructions", - .llvm_name = "qpx", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -371,7 +328,6 @@ pub const feature_qpx = Feature{ pub const feature_recipprec = Feature{ .name = "recipprec", .description = "Assume higher precision reciprocal estimates", - .llvm_name = "recipprec", .subfeatures = &[_]*const Feature { }, }; @@ -379,7 +335,6 @@ pub const feature_recipprec = Feature{ pub const feature_spe = Feature{ .name = "spe", .description = "Enable SPE instructions", - .llvm_name = "spe", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -388,7 +343,6 @@ pub const feature_spe = Feature{ pub const feature_stfiwx = Feature{ .name = "stfiwx", .description = "Enable the stfiwx instruction", - .llvm_name = "stfiwx", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -397,7 +351,6 @@ pub const feature_stfiwx = Feature{ pub const feature_securePlt = Feature{ .name = "secure-plt", .description = "Enable secure plt mode", - .llvm_name = "secure-plt", .subfeatures = &[_]*const Feature { }, }; @@ -405,7 +358,6 @@ pub const feature_securePlt = Feature{ pub const feature_slowPopcntd = Feature{ .name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", - .llvm_name = "slow-popcntd", .subfeatures = &[_]*const Feature { }, }; @@ -413,7 +365,6 @@ pub const feature_slowPopcntd = Feature{ pub const feature_twoConstNr = Feature{ .name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", - .llvm_name = "two-const-nr", .subfeatures = &[_]*const Feature { }, }; @@ -421,7 +372,6 @@ pub const feature_twoConstNr = Feature{ pub const feature_vsx = Feature{ .name = "vsx", .description = "Enable VSX instructions", - .llvm_name = "vsx", .subfeatures = &[_]*const Feature { &feature_hardFloat, }, @@ -430,7 +380,6 @@ pub const feature_vsx = Feature{ pub const feature_vectorsUseTwoUnits = Feature{ .name = "vectors-use-two-units", .description = "Vectors use two units", - .llvm_name = "vectors-use-two-units", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index 6ed1012f215c8ac557ca2660f1460e1c160aa752..46f66aff12baaa62e41e5569bc7a9ebcd9f4555a 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", .description = "Implements RV64", - .llvm_name = "64bit", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_bit64 = Feature{ pub const feature_e = Feature{ .name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .llvm_name = "e", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_e = Feature{ pub const feature_rvcHints = Feature{ .name = "rvc-hints", .description = "Enable RVC Hint Instructions.", - .llvm_name = "rvc-hints", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_rvcHints = Feature{ pub const feature_relax = Feature{ .name = "relax", .description = "Enable Linker relaxation.", - .llvm_name = "relax", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_relax = Feature{ pub const feature_a = Feature{ .name = "a", .description = "'A' (Atomic Instructions)", - .llvm_name = "a", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_a = Feature{ pub const feature_c = Feature{ .name = "c", .description = "'C' (Compressed Instructions)", - .llvm_name = "c", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_c = Feature{ pub const feature_d = Feature{ .name = "d", .description = "'D' (Double-Precision Floating-Point)", - .llvm_name = "d", .subfeatures = &[_]*const Feature { &feature_f, }, @@ -61,7 +54,6 @@ pub const feature_d = Feature{ pub const feature_f = Feature{ .name = "f", .description = "'F' (Single-Precision Floating-Point)", - .llvm_name = "f", .subfeatures = &[_]*const Feature { }, }; @@ -69,7 +61,6 @@ pub const feature_f = Feature{ pub const feature_m = Feature{ .name = "m", .description = "'M' (Integer Multiplication and Division)", - .llvm_name = "m", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 69c6208b2a086dd45538584524b025e863df7700..75c824c8bcf8446e8183dbc0dc531955fffe2190 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_detectroundchange = Feature{ .name = "detectroundchange", .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", - .llvm_name = "detectroundchange", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_detectroundchange = Feature{ pub const feature_hardQuadFloat = Feature{ .name = "hard-quad-float", .description = "Enable quad-word floating point instructions", - .llvm_name = "hard-quad-float", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_hardQuadFloat = Feature{ pub const feature_leon = Feature{ .name = "leon", .description = "Enable LEON extensions", - .llvm_name = "leon", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_leon = Feature{ pub const feature_noFmuls = Feature{ .name = "no-fmuls", .description = "Disable the fmuls instruction.", - .llvm_name = "no-fmuls", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_noFmuls = Feature{ pub const feature_noFsmuld = Feature{ .name = "no-fsmuld", .description = "Disable the fsmuld instruction.", - .llvm_name = "no-fsmuld", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_noFsmuld = Feature{ pub const feature_leonpwrpsr = Feature{ .name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", - .llvm_name = "leonpwrpsr", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_leonpwrpsr = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Use software emulation for floating point", - .llvm_name = "soft-float", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_softFloat = Feature{ pub const feature_softMulDiv = Feature{ .name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", - .llvm_name = "soft-mul-div", .subfeatures = &[_]*const Feature { }, }; @@ -68,7 +60,6 @@ pub const feature_softMulDiv = Feature{ pub const feature_deprecatedV8 = Feature{ .name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", - .llvm_name = "deprecated-v8", .subfeatures = &[_]*const Feature { }, }; @@ -76,7 +67,6 @@ pub const feature_deprecatedV8 = Feature{ pub const feature_v9 = Feature{ .name = "v9", .description = "Enable SPARC-V9 instructions", - .llvm_name = "v9", .subfeatures = &[_]*const Feature { }, }; @@ -84,7 +74,6 @@ pub const feature_v9 = Feature{ pub const feature_vis = Feature{ .name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", - .llvm_name = "vis", .subfeatures = &[_]*const Feature { }, }; @@ -92,7 +81,6 @@ pub const feature_vis = Feature{ pub const feature_vis2 = Feature{ .name = "vis2", .description = "Enable Visual Instruction Set extensions II", - .llvm_name = "vis2", .subfeatures = &[_]*const Feature { }, }; @@ -100,7 +88,6 @@ pub const feature_vis2 = Feature{ pub const feature_vis3 = Feature{ .name = "vis3", .description = "Enable Visual Instruction Set extensions III", - .llvm_name = "vis3", .subfeatures = &[_]*const Feature { }, }; @@ -108,7 +95,6 @@ pub const feature_vis3 = Feature{ pub const feature_fixallfdivsqrt = Feature{ .name = "fixallfdivsqrt", .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", - .llvm_name = "fixallfdivsqrt", .subfeatures = &[_]*const Feature { }, }; @@ -116,7 +102,6 @@ pub const feature_fixallfdivsqrt = Feature{ pub const feature_insertnopload = Feature{ .name = "insertnopload", .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", - .llvm_name = "insertnopload", .subfeatures = &[_]*const Feature { }, }; @@ -124,7 +109,6 @@ pub const feature_insertnopload = Feature{ pub const feature_hasleoncasa = Feature{ .name = "hasleoncasa", .description = "Enable CASA instruction for LEON3 and LEON4 processors", - .llvm_name = "hasleoncasa", .subfeatures = &[_]*const Feature { }, }; @@ -132,7 +116,6 @@ pub const feature_hasleoncasa = Feature{ pub const feature_leoncyclecounter = Feature{ .name = "leoncyclecounter", .description = "Use the Leon cycle counter register", - .llvm_name = "leoncyclecounter", .subfeatures = &[_]*const Feature { }, }; @@ -140,7 +123,6 @@ pub const feature_leoncyclecounter = Feature{ pub const feature_hasumacsmac = Feature{ .name = "hasumacsmac", .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", - .llvm_name = "hasumacsmac", .subfeatures = &[_]*const Feature { }, }; @@ -148,7 +130,6 @@ pub const feature_hasumacsmac = Feature{ pub const feature_popc = Feature{ .name = "popc", .description = "Use the popc (population count) instruction", - .llvm_name = "popc", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 03fb49ca5530e30fbf668612687aa0dbce3399c0..e7fa7c7333025e8fa0cbdeedef35c9dbb6fcd4d0 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_dfpPackedConversion = Feature{ .name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", - .llvm_name = "dfp-packed-conversion", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_dfpPackedConversion = Feature{ pub const feature_dfpZonedConversion = Feature{ .name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", - .llvm_name = "dfp-zoned-conversion", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_dfpZonedConversion = Feature{ pub const feature_deflateConversion = Feature{ .name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", - .llvm_name = "deflate-conversion", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_deflateConversion = Feature{ pub const feature_distinctOps = Feature{ .name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", - .llvm_name = "distinct-ops", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_distinctOps = Feature{ pub const feature_enhancedDat2 = Feature{ .name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", - .llvm_name = "enhanced-dat-2", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_enhancedDat2 = Feature{ pub const feature_enhancedSort = Feature{ .name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", - .llvm_name = "enhanced-sort", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_enhancedSort = Feature{ pub const feature_executionHint = Feature{ .name = "execution-hint", .description = "Assume that the execution-hint facility is installed", - .llvm_name = "execution-hint", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_executionHint = Feature{ pub const feature_fpExtension = Feature{ .name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", - .llvm_name = "fp-extension", .subfeatures = &[_]*const Feature { }, }; @@ -68,7 +60,6 @@ pub const feature_fpExtension = Feature{ pub const feature_fastSerialization = Feature{ .name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", - .llvm_name = "fast-serialization", .subfeatures = &[_]*const Feature { }, }; @@ -76,7 +67,6 @@ pub const feature_fastSerialization = Feature{ pub const feature_guardedStorage = Feature{ .name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", - .llvm_name = "guarded-storage", .subfeatures = &[_]*const Feature { }, }; @@ -84,7 +74,6 @@ pub const feature_guardedStorage = Feature{ pub const feature_highWord = Feature{ .name = "high-word", .description = "Assume that the high-word facility is installed", - .llvm_name = "high-word", .subfeatures = &[_]*const Feature { }, }; @@ -92,7 +81,6 @@ pub const feature_highWord = Feature{ pub const feature_insertReferenceBitsMultiple = Feature{ .name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", - .llvm_name = "insert-reference-bits-multiple", .subfeatures = &[_]*const Feature { }, }; @@ -100,7 +88,6 @@ pub const feature_insertReferenceBitsMultiple = Feature{ pub const feature_interlockedAccess1 = Feature{ .name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", - .llvm_name = "interlocked-access1", .subfeatures = &[_]*const Feature { }, }; @@ -108,7 +95,6 @@ pub const feature_interlockedAccess1 = Feature{ pub const feature_loadAndTrap = Feature{ .name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", - .llvm_name = "load-and-trap", .subfeatures = &[_]*const Feature { }, }; @@ -116,7 +102,6 @@ pub const feature_loadAndTrap = Feature{ pub const feature_loadAndZeroRightmostByte = Feature{ .name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .llvm_name = "load-and-zero-rightmost-byte", .subfeatures = &[_]*const Feature { }, }; @@ -124,7 +109,6 @@ pub const feature_loadAndZeroRightmostByte = Feature{ pub const feature_loadStoreOnCond = Feature{ .name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", - .llvm_name = "load-store-on-cond", .subfeatures = &[_]*const Feature { }, }; @@ -132,7 +116,6 @@ pub const feature_loadStoreOnCond = Feature{ pub const feature_loadStoreOnCond2 = Feature{ .name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", - .llvm_name = "load-store-on-cond-2", .subfeatures = &[_]*const Feature { }, }; @@ -140,7 +123,6 @@ pub const feature_loadStoreOnCond2 = Feature{ pub const feature_messageSecurityAssistExtension3 = Feature{ .name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", - .llvm_name = "message-security-assist-extension3", .subfeatures = &[_]*const Feature { }, }; @@ -148,7 +130,6 @@ pub const feature_messageSecurityAssistExtension3 = Feature{ pub const feature_messageSecurityAssistExtension4 = Feature{ .name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", - .llvm_name = "message-security-assist-extension4", .subfeatures = &[_]*const Feature { }, }; @@ -156,7 +137,6 @@ pub const feature_messageSecurityAssistExtension4 = Feature{ pub const feature_messageSecurityAssistExtension5 = Feature{ .name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", - .llvm_name = "message-security-assist-extension5", .subfeatures = &[_]*const Feature { }, }; @@ -164,7 +144,6 @@ pub const feature_messageSecurityAssistExtension5 = Feature{ pub const feature_messageSecurityAssistExtension7 = Feature{ .name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", - .llvm_name = "message-security-assist-extension7", .subfeatures = &[_]*const Feature { }, }; @@ -172,7 +151,6 @@ pub const feature_messageSecurityAssistExtension7 = Feature{ pub const feature_messageSecurityAssistExtension8 = Feature{ .name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", - .llvm_name = "message-security-assist-extension8", .subfeatures = &[_]*const Feature { }, }; @@ -180,7 +158,6 @@ pub const feature_messageSecurityAssistExtension8 = Feature{ pub const feature_messageSecurityAssistExtension9 = Feature{ .name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", - .llvm_name = "message-security-assist-extension9", .subfeatures = &[_]*const Feature { }, }; @@ -188,7 +165,6 @@ pub const feature_messageSecurityAssistExtension9 = Feature{ pub const feature_miscellaneousExtensions = Feature{ .name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", - .llvm_name = "miscellaneous-extensions", .subfeatures = &[_]*const Feature { }, }; @@ -196,7 +172,6 @@ pub const feature_miscellaneousExtensions = Feature{ pub const feature_miscellaneousExtensions2 = Feature{ .name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .llvm_name = "miscellaneous-extensions-2", .subfeatures = &[_]*const Feature { }, }; @@ -204,7 +179,6 @@ pub const feature_miscellaneousExtensions2 = Feature{ pub const feature_miscellaneousExtensions3 = Feature{ .name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .llvm_name = "miscellaneous-extensions-3", .subfeatures = &[_]*const Feature { }, }; @@ -212,7 +186,6 @@ pub const feature_miscellaneousExtensions3 = Feature{ pub const feature_populationCount = Feature{ .name = "population-count", .description = "Assume that the population-count facility is installed", - .llvm_name = "population-count", .subfeatures = &[_]*const Feature { }, }; @@ -220,7 +193,6 @@ pub const feature_populationCount = Feature{ pub const feature_processorAssist = Feature{ .name = "processor-assist", .description = "Assume that the processor-assist facility is installed", - .llvm_name = "processor-assist", .subfeatures = &[_]*const Feature { }, }; @@ -228,7 +200,6 @@ pub const feature_processorAssist = Feature{ pub const feature_resetReferenceBitsMultiple = Feature{ .name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", - .llvm_name = "reset-reference-bits-multiple", .subfeatures = &[_]*const Feature { }, }; @@ -236,7 +207,6 @@ pub const feature_resetReferenceBitsMultiple = Feature{ pub const feature_transactionalExecution = Feature{ .name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", - .llvm_name = "transactional-execution", .subfeatures = &[_]*const Feature { }, }; @@ -244,7 +214,6 @@ pub const feature_transactionalExecution = Feature{ pub const feature_vector = Feature{ .name = "vector", .description = "Assume that the vectory facility is installed", - .llvm_name = "vector", .subfeatures = &[_]*const Feature { }, }; @@ -252,7 +221,6 @@ pub const feature_vector = Feature{ pub const feature_vectorEnhancements1 = Feature{ .name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", - .llvm_name = "vector-enhancements-1", .subfeatures = &[_]*const Feature { }, }; @@ -260,7 +228,6 @@ pub const feature_vectorEnhancements1 = Feature{ pub const feature_vectorEnhancements2 = Feature{ .name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", - .llvm_name = "vector-enhancements-2", .subfeatures = &[_]*const Feature { }, }; @@ -268,7 +235,6 @@ pub const feature_vectorEnhancements2 = Feature{ pub const feature_vectorPackedDecimal = Feature{ .name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", - .llvm_name = "vector-packed-decimal", .subfeatures = &[_]*const Feature { }, }; @@ -276,7 +242,6 @@ pub const feature_vectorPackedDecimal = Feature{ pub const feature_vectorPackedDecimalEnhancement = Feature{ .name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", - .llvm_name = "vector-packed-decimal-enhancement", .subfeatures = &[_]*const Feature { }, }; diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index ba41b622a469aa9f906a4b462e87f3499cbfef30..6b302a9ff661275a5df20b5fa6139b13275cb514 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_atomics = Feature{ .name = "atomics", .description = "Enable Atomics", - .llvm_name = "atomics", .subfeatures = &[_]*const Feature { }, }; @@ -12,7 +11,6 @@ pub const feature_atomics = Feature{ pub const feature_bulkMemory = Feature{ .name = "bulk-memory", .description = "Enable bulk memory operations", - .llvm_name = "bulk-memory", .subfeatures = &[_]*const Feature { }, }; @@ -20,7 +18,6 @@ pub const feature_bulkMemory = Feature{ pub const feature_exceptionHandling = Feature{ .name = "exception-handling", .description = "Enable Wasm exception handling", - .llvm_name = "exception-handling", .subfeatures = &[_]*const Feature { }, }; @@ -28,7 +25,6 @@ pub const feature_exceptionHandling = Feature{ pub const feature_multivalue = Feature{ .name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", - .llvm_name = "multivalue", .subfeatures = &[_]*const Feature { }, }; @@ -36,7 +32,6 @@ pub const feature_multivalue = Feature{ pub const feature_mutableGlobals = Feature{ .name = "mutable-globals", .description = "Enable mutable globals", - .llvm_name = "mutable-globals", .subfeatures = &[_]*const Feature { }, }; @@ -44,7 +39,6 @@ pub const feature_mutableGlobals = Feature{ pub const feature_nontrappingFptoint = Feature{ .name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", - .llvm_name = "nontrapping-fptoint", .subfeatures = &[_]*const Feature { }, }; @@ -52,7 +46,6 @@ pub const feature_nontrappingFptoint = Feature{ pub const feature_simd128 = Feature{ .name = "simd128", .description = "Enable 128-bit SIMD", - .llvm_name = "simd128", .subfeatures = &[_]*const Feature { }, }; @@ -60,7 +53,6 @@ pub const feature_simd128 = Feature{ pub const feature_signExt = Feature{ .name = "sign-ext", .description = "Enable sign extension operators", - .llvm_name = "sign-ext", .subfeatures = &[_]*const Feature { }, }; @@ -68,7 +60,6 @@ pub const feature_signExt = Feature{ pub const feature_tailCall = Feature{ .name = "tail-call", .description = "Enable tail call instructions", - .llvm_name = "tail-call", .subfeatures = &[_]*const Feature { }, }; @@ -76,7 +67,6 @@ pub const feature_tailCall = Feature{ pub const feature_unimplementedSimd128 = Feature{ .name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", - .llvm_name = "unimplemented-simd128", .subfeatures = &[_]*const Feature { &feature_simd128, }, diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index c6497112bb884777e1e4f19e32ae152091eee090..de49ce937cc43000c6567c0e599eb9b907409d18 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu; pub const feature_dnow3 = Feature{ .name = "3dnow", .description = "Enable 3DNow! instructions", - .llvm_name = "3dnow", .subfeatures = &[_]*const Feature { &feature_mmx, }, @@ -13,7 +12,6 @@ pub const feature_dnow3 = Feature{ pub const feature_dnowa3 = Feature{ .name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", - .llvm_name = "3dnowa", .subfeatures = &[_]*const Feature { &feature_mmx, }, @@ -22,7 +20,6 @@ pub const feature_dnowa3 = Feature{ pub const feature_bit64 = Feature{ .name = "64bit", .description = "Support 64-bit instructions", - .llvm_name = "64bit", .subfeatures = &[_]*const Feature { }, }; @@ -30,7 +27,6 @@ pub const feature_bit64 = Feature{ pub const feature_adx = Feature{ .name = "adx", .description = "Support ADX instructions", - .llvm_name = "adx", .subfeatures = &[_]*const Feature { }, }; @@ -38,7 +34,6 @@ pub const feature_adx = Feature{ pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES instructions", - .llvm_name = "aes", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -47,7 +42,6 @@ pub const feature_aes = Feature{ pub const feature_avx = Feature{ .name = "avx", .description = "Enable AVX instructions", - .llvm_name = "avx", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -56,7 +50,6 @@ pub const feature_avx = Feature{ pub const feature_avx2 = Feature{ .name = "avx2", .description = "Enable AVX2 instructions", - .llvm_name = "avx2", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -65,7 +58,6 @@ pub const feature_avx2 = Feature{ pub const feature_avx512f = Feature{ .name = "avx512f", .description = "Enable AVX-512 instructions", - .llvm_name = "avx512f", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -74,7 +66,6 @@ pub const feature_avx512f = Feature{ pub const feature_avx512bf16 = Feature{ .name = "avx512bf16", .description = "Support bfloat16 floating point", - .llvm_name = "avx512bf16", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -83,7 +74,6 @@ pub const feature_avx512bf16 = Feature{ pub const feature_avx512bitalg = Feature{ .name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", - .llvm_name = "avx512bitalg", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -92,7 +82,6 @@ pub const feature_avx512bitalg = Feature{ pub const feature_bmi = Feature{ .name = "bmi", .description = "Support BMI instructions", - .llvm_name = "bmi", .subfeatures = &[_]*const Feature { }, }; @@ -100,7 +89,6 @@ pub const feature_bmi = Feature{ pub const feature_bmi2 = Feature{ .name = "bmi2", .description = "Support BMI2 instructions", - .llvm_name = "bmi2", .subfeatures = &[_]*const Feature { }, }; @@ -108,7 +96,6 @@ pub const feature_bmi2 = Feature{ pub const feature_avx512bw = Feature{ .name = "avx512bw", .description = "Enable AVX-512 Byte and Word Instructions", - .llvm_name = "avx512bw", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -117,7 +104,6 @@ pub const feature_avx512bw = Feature{ pub const feature_branchfusion = Feature{ .name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .llvm_name = "branchfusion", .subfeatures = &[_]*const Feature { }, }; @@ -125,7 +111,6 @@ pub const feature_branchfusion = Feature{ pub const feature_avx512cd = Feature{ .name = "avx512cd", .description = "Enable AVX-512 Conflict Detection Instructions", - .llvm_name = "avx512cd", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -134,7 +119,6 @@ pub const feature_avx512cd = Feature{ pub const feature_cldemote = Feature{ .name = "cldemote", .description = "Enable Cache Demote", - .llvm_name = "cldemote", .subfeatures = &[_]*const Feature { }, }; @@ -142,7 +126,6 @@ pub const feature_cldemote = Feature{ pub const feature_clflushopt = Feature{ .name = "clflushopt", .description = "Flush A Cache Line Optimized", - .llvm_name = "clflushopt", .subfeatures = &[_]*const Feature { }, }; @@ -150,7 +133,6 @@ pub const feature_clflushopt = Feature{ pub const feature_clwb = Feature{ .name = "clwb", .description = "Cache Line Write Back", - .llvm_name = "clwb", .subfeatures = &[_]*const Feature { }, }; @@ -158,7 +140,6 @@ pub const feature_clwb = Feature{ pub const feature_clzero = Feature{ .name = "clzero", .description = "Enable Cache Line Zero", - .llvm_name = "clzero", .subfeatures = &[_]*const Feature { }, }; @@ -166,7 +147,6 @@ pub const feature_clzero = Feature{ pub const feature_cmov = Feature{ .name = "cmov", .description = "Enable conditional move instructions", - .llvm_name = "cmov", .subfeatures = &[_]*const Feature { }, }; @@ -174,7 +154,6 @@ pub const feature_cmov = Feature{ pub const feature_cx8 = Feature{ .name = "cx8", .description = "Support CMPXCHG8B instructions", - .llvm_name = "cx8", .subfeatures = &[_]*const Feature { }, }; @@ -182,7 +161,6 @@ pub const feature_cx8 = Feature{ pub const feature_cx16 = Feature{ .name = "cx16", .description = "64-bit with cmpxchg16b", - .llvm_name = "cx16", .subfeatures = &[_]*const Feature { &feature_cx8, }, @@ -191,7 +169,6 @@ pub const feature_cx16 = Feature{ pub const feature_avx512dq = Feature{ .name = "avx512dq", .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .llvm_name = "avx512dq", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -200,7 +177,6 @@ pub const feature_avx512dq = Feature{ pub const feature_mpx = Feature{ .name = "mpx", .description = "Deprecated. Support MPX instructions", - .llvm_name = "mpx", .subfeatures = &[_]*const Feature { }, }; @@ -208,7 +184,6 @@ pub const feature_mpx = Feature{ pub const feature_enqcmd = Feature{ .name = "enqcmd", .description = "Has ENQCMD instructions", - .llvm_name = "enqcmd", .subfeatures = &[_]*const Feature { }, }; @@ -216,7 +191,6 @@ pub const feature_enqcmd = Feature{ pub const feature_avx512er = Feature{ .name = "avx512er", .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .llvm_name = "avx512er", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -225,7 +199,6 @@ pub const feature_avx512er = Feature{ pub const feature_ermsb = Feature{ .name = "ermsb", .description = "REP MOVS/STOS are fast", - .llvm_name = "ermsb", .subfeatures = &[_]*const Feature { }, }; @@ -233,7 +206,6 @@ pub const feature_ermsb = Feature{ pub const feature_f16c = Feature{ .name = "f16c", .description = "Support 16-bit floating point conversion instructions", - .llvm_name = "f16c", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -242,7 +214,6 @@ pub const feature_f16c = Feature{ pub const feature_fma = Feature{ .name = "fma", .description = "Enable three-operand fused multiple-add", - .llvm_name = "fma", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -251,7 +222,6 @@ pub const feature_fma = Feature{ pub const feature_fma4 = Feature{ .name = "fma4", .description = "Enable four-operand fused multiple-add", - .llvm_name = "fma4", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -260,7 +230,6 @@ pub const feature_fma4 = Feature{ pub const feature_fsgsbase = Feature{ .name = "fsgsbase", .description = "Support FS/GS Base instructions", - .llvm_name = "fsgsbase", .subfeatures = &[_]*const Feature { }, }; @@ -268,7 +237,6 @@ pub const feature_fsgsbase = Feature{ pub const feature_fxsr = Feature{ .name = "fxsr", .description = "Support fxsave/fxrestore instructions", - .llvm_name = "fxsr", .subfeatures = &[_]*const Feature { }, }; @@ -276,7 +244,6 @@ pub const feature_fxsr = Feature{ pub const feature_fast11bytenop = Feature{ .name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", - .llvm_name = "fast-11bytenop", .subfeatures = &[_]*const Feature { }, }; @@ -284,7 +251,6 @@ pub const feature_fast11bytenop = Feature{ pub const feature_fast15bytenop = Feature{ .name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", - .llvm_name = "fast-15bytenop", .subfeatures = &[_]*const Feature { }, }; @@ -292,7 +258,6 @@ pub const feature_fast15bytenop = Feature{ pub const feature_fastBextr = Feature{ .name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .llvm_name = "fast-bextr", .subfeatures = &[_]*const Feature { }, }; @@ -300,7 +265,6 @@ pub const feature_fastBextr = Feature{ pub const feature_fastHops = Feature{ .name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", - .llvm_name = "fast-hops", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -309,7 +273,6 @@ pub const feature_fastHops = Feature{ pub const feature_fastLzcnt = Feature{ .name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", - .llvm_name = "fast-lzcnt", .subfeatures = &[_]*const Feature { }, }; @@ -317,7 +280,6 @@ pub const feature_fastLzcnt = Feature{ pub const feature_fastPartialYmmOrZmmWrite = Feature{ .name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", - .llvm_name = "fast-partial-ymm-or-zmm-write", .subfeatures = &[_]*const Feature { }, }; @@ -325,7 +287,6 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{ pub const feature_fastShldRotate = Feature{ .name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", - .llvm_name = "fast-shld-rotate", .subfeatures = &[_]*const Feature { }, }; @@ -333,7 +294,6 @@ pub const feature_fastShldRotate = Feature{ pub const feature_fastScalarFsqrt = Feature{ .name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .llvm_name = "fast-scalar-fsqrt", .subfeatures = &[_]*const Feature { }, }; @@ -341,7 +301,6 @@ pub const feature_fastScalarFsqrt = Feature{ pub const feature_fastScalarShiftMasks = Feature{ .name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .llvm_name = "fast-scalar-shift-masks", .subfeatures = &[_]*const Feature { }, }; @@ -349,7 +308,6 @@ pub const feature_fastScalarShiftMasks = Feature{ pub const feature_fastVariableShuffle = Feature{ .name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", - .llvm_name = "fast-variable-shuffle", .subfeatures = &[_]*const Feature { }, }; @@ -357,7 +315,6 @@ pub const feature_fastVariableShuffle = Feature{ pub const feature_fastVectorFsqrt = Feature{ .name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", - .llvm_name = "fast-vector-fsqrt", .subfeatures = &[_]*const Feature { }, }; @@ -365,7 +322,6 @@ pub const feature_fastVectorFsqrt = Feature{ pub const feature_fastVectorShiftMasks = Feature{ .name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .llvm_name = "fast-vector-shift-masks", .subfeatures = &[_]*const Feature { }, }; @@ -373,7 +329,6 @@ pub const feature_fastVectorShiftMasks = Feature{ pub const feature_gfni = Feature{ .name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", - .llvm_name = "gfni", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -382,7 +337,6 @@ pub const feature_gfni = Feature{ pub const feature_fastGather = Feature{ .name = "fast-gather", .description = "Indicates if gather is reasonably fast", - .llvm_name = "fast-gather", .subfeatures = &[_]*const Feature { }, }; @@ -390,7 +344,6 @@ pub const feature_fastGather = Feature{ pub const feature_avx512ifma = Feature{ .name = "avx512ifma", .description = "Enable AVX-512 Integer Fused Multiple-Add", - .llvm_name = "avx512ifma", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -399,7 +352,6 @@ pub const feature_avx512ifma = Feature{ pub const feature_invpcid = Feature{ .name = "invpcid", .description = "Invalidate Process-Context Identifier", - .llvm_name = "invpcid", .subfeatures = &[_]*const Feature { }, }; @@ -407,7 +359,6 @@ pub const feature_invpcid = Feature{ pub const feature_sahf = Feature{ .name = "sahf", .description = "Support LAHF and SAHF instructions", - .llvm_name = "sahf", .subfeatures = &[_]*const Feature { }, }; @@ -415,7 +366,6 @@ pub const feature_sahf = Feature{ pub const feature_leaSp = Feature{ .name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", - .llvm_name = "lea-sp", .subfeatures = &[_]*const Feature { }, }; @@ -423,7 +373,6 @@ pub const feature_leaSp = Feature{ pub const feature_leaUsesAg = Feature{ .name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", - .llvm_name = "lea-uses-ag", .subfeatures = &[_]*const Feature { }, }; @@ -431,7 +380,6 @@ pub const feature_leaUsesAg = Feature{ pub const feature_lwp = Feature{ .name = "lwp", .description = "Enable LWP instructions", - .llvm_name = "lwp", .subfeatures = &[_]*const Feature { }, }; @@ -439,7 +387,6 @@ pub const feature_lwp = Feature{ pub const feature_lzcnt = Feature{ .name = "lzcnt", .description = "Support LZCNT instruction", - .llvm_name = "lzcnt", .subfeatures = &[_]*const Feature { }, }; @@ -447,7 +394,6 @@ pub const feature_lzcnt = Feature{ pub const feature_falseDepsLzcntTzcnt = Feature{ .name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", - .llvm_name = "false-deps-lzcnt-tzcnt", .subfeatures = &[_]*const Feature { }, }; @@ -455,7 +401,6 @@ pub const feature_falseDepsLzcntTzcnt = Feature{ pub const feature_mmx = Feature{ .name = "mmx", .description = "Enable MMX instructions", - .llvm_name = "mmx", .subfeatures = &[_]*const Feature { }, }; @@ -463,7 +408,6 @@ pub const feature_mmx = Feature{ pub const feature_movbe = Feature{ .name = "movbe", .description = "Support MOVBE instruction", - .llvm_name = "movbe", .subfeatures = &[_]*const Feature { }, }; @@ -471,7 +415,6 @@ pub const feature_movbe = Feature{ pub const feature_movdir64b = Feature{ .name = "movdir64b", .description = "Support movdir64b instruction", - .llvm_name = "movdir64b", .subfeatures = &[_]*const Feature { }, }; @@ -479,7 +422,6 @@ pub const feature_movdir64b = Feature{ pub const feature_movdiri = Feature{ .name = "movdiri", .description = "Support movdiri instruction", - .llvm_name = "movdiri", .subfeatures = &[_]*const Feature { }, }; @@ -487,7 +429,6 @@ pub const feature_movdiri = Feature{ pub const feature_mwaitx = Feature{ .name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", - .llvm_name = "mwaitx", .subfeatures = &[_]*const Feature { }, }; @@ -495,7 +436,6 @@ pub const feature_mwaitx = Feature{ pub const feature_macrofusion = Feature{ .name = "macrofusion", .description = "Various instructions can be fused with conditional branches", - .llvm_name = "macrofusion", .subfeatures = &[_]*const Feature { }, }; @@ -503,7 +443,6 @@ pub const feature_macrofusion = Feature{ pub const feature_mergeToThreewayBranch = Feature{ .name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", - .llvm_name = "merge-to-threeway-branch", .subfeatures = &[_]*const Feature { }, }; @@ -511,7 +450,6 @@ pub const feature_mergeToThreewayBranch = Feature{ pub const feature_nopl = Feature{ .name = "nopl", .description = "Enable NOPL instruction", - .llvm_name = "nopl", .subfeatures = &[_]*const Feature { }, }; @@ -519,7 +457,6 @@ pub const feature_nopl = Feature{ pub const feature_pclmul = Feature{ .name = "pclmul", .description = "Enable packed carry-less multiplication instructions", - .llvm_name = "pclmul", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -528,7 +465,6 @@ pub const feature_pclmul = Feature{ pub const feature_pconfig = Feature{ .name = "pconfig", .description = "platform configuration instruction", - .llvm_name = "pconfig", .subfeatures = &[_]*const Feature { }, }; @@ -536,7 +472,6 @@ pub const feature_pconfig = Feature{ pub const feature_avx512pf = Feature{ .name = "avx512pf", .description = "Enable AVX-512 PreFetch Instructions", - .llvm_name = "avx512pf", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -545,7 +480,6 @@ pub const feature_avx512pf = Feature{ pub const feature_pku = Feature{ .name = "pku", .description = "Enable protection keys", - .llvm_name = "pku", .subfeatures = &[_]*const Feature { }, }; @@ -553,7 +487,6 @@ pub const feature_pku = Feature{ pub const feature_popcnt = Feature{ .name = "popcnt", .description = "Support POPCNT instruction", - .llvm_name = "popcnt", .subfeatures = &[_]*const Feature { }, }; @@ -561,7 +494,6 @@ pub const feature_popcnt = Feature{ pub const feature_falseDepsPopcnt = Feature{ .name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", - .llvm_name = "false-deps-popcnt", .subfeatures = &[_]*const Feature { }, }; @@ -569,7 +501,6 @@ pub const feature_falseDepsPopcnt = Feature{ pub const feature_prefetchwt1 = Feature{ .name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", - .llvm_name = "prefetchwt1", .subfeatures = &[_]*const Feature { }, }; @@ -577,7 +508,6 @@ pub const feature_prefetchwt1 = Feature{ pub const feature_prfchw = Feature{ .name = "prfchw", .description = "Support PRFCHW instructions", - .llvm_name = "prfchw", .subfeatures = &[_]*const Feature { }, }; @@ -585,7 +515,6 @@ pub const feature_prfchw = Feature{ pub const feature_ptwrite = Feature{ .name = "ptwrite", .description = "Support ptwrite instruction", - .llvm_name = "ptwrite", .subfeatures = &[_]*const Feature { }, }; @@ -593,7 +522,6 @@ pub const feature_ptwrite = Feature{ pub const feature_padShortFunctions = Feature{ .name = "pad-short-functions", .description = "Pad short functions", - .llvm_name = "pad-short-functions", .subfeatures = &[_]*const Feature { }, }; @@ -601,7 +529,6 @@ pub const feature_padShortFunctions = Feature{ pub const feature_prefer128Bit = Feature{ .name = "prefer-128-bit", .description = "Prefer 128-bit AVX instructions", - .llvm_name = "prefer-128-bit", .subfeatures = &[_]*const Feature { }, }; @@ -609,7 +536,6 @@ pub const feature_prefer128Bit = Feature{ pub const feature_prefer256Bit = Feature{ .name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", - .llvm_name = "prefer-256-bit", .subfeatures = &[_]*const Feature { }, }; @@ -617,7 +543,6 @@ pub const feature_prefer256Bit = Feature{ pub const feature_rdpid = Feature{ .name = "rdpid", .description = "Support RDPID instructions", - .llvm_name = "rdpid", .subfeatures = &[_]*const Feature { }, }; @@ -625,7 +550,6 @@ pub const feature_rdpid = Feature{ pub const feature_rdrnd = Feature{ .name = "rdrnd", .description = "Support RDRAND instruction", - .llvm_name = "rdrnd", .subfeatures = &[_]*const Feature { }, }; @@ -633,7 +557,6 @@ pub const feature_rdrnd = Feature{ pub const feature_rdseed = Feature{ .name = "rdseed", .description = "Support RDSEED instruction", - .llvm_name = "rdseed", .subfeatures = &[_]*const Feature { }, }; @@ -641,7 +564,6 @@ pub const feature_rdseed = Feature{ pub const feature_rtm = Feature{ .name = "rtm", .description = "Support RTM instructions", - .llvm_name = "rtm", .subfeatures = &[_]*const Feature { }, }; @@ -649,17 +571,15 @@ pub const feature_rtm = Feature{ pub const feature_retpoline = Feature{ .name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", - .llvm_name = "retpoline", .subfeatures = &[_]*const Feature { - &feature_retpolineIndirectCalls, &feature_retpolineIndirectBranches, + &feature_retpolineIndirectCalls, }, }; pub const feature_retpolineExternalThunk = Feature{ .name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", - .llvm_name = "retpoline-external-thunk", .subfeatures = &[_]*const Feature { &feature_retpolineIndirectCalls, }, @@ -668,7 +588,6 @@ pub const feature_retpolineExternalThunk = Feature{ pub const feature_retpolineIndirectBranches = Feature{ .name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", - .llvm_name = "retpoline-indirect-branches", .subfeatures = &[_]*const Feature { }, }; @@ -676,7 +595,6 @@ pub const feature_retpolineIndirectBranches = Feature{ pub const feature_retpolineIndirectCalls = Feature{ .name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", - .llvm_name = "retpoline-indirect-calls", .subfeatures = &[_]*const Feature { }, }; @@ -684,7 +602,6 @@ pub const feature_retpolineIndirectCalls = Feature{ pub const feature_sgx = Feature{ .name = "sgx", .description = "Enable Software Guard Extensions", - .llvm_name = "sgx", .subfeatures = &[_]*const Feature { }, }; @@ -692,7 +609,6 @@ pub const feature_sgx = Feature{ pub const feature_sha = Feature{ .name = "sha", .description = "Enable SHA instructions", - .llvm_name = "sha", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -701,7 +617,6 @@ pub const feature_sha = Feature{ pub const feature_shstk = Feature{ .name = "shstk", .description = "Support CET Shadow-Stack instructions", - .llvm_name = "shstk", .subfeatures = &[_]*const Feature { }, }; @@ -709,7 +624,6 @@ pub const feature_shstk = Feature{ pub const feature_sse = Feature{ .name = "sse", .description = "Enable SSE instructions", - .llvm_name = "sse", .subfeatures = &[_]*const Feature { }, }; @@ -717,7 +631,6 @@ pub const feature_sse = Feature{ pub const feature_sse2 = Feature{ .name = "sse2", .description = "Enable SSE2 instructions", - .llvm_name = "sse2", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -726,7 +639,6 @@ pub const feature_sse2 = Feature{ pub const feature_sse3 = Feature{ .name = "sse3", .description = "Enable SSE3 instructions", - .llvm_name = "sse3", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -735,7 +647,6 @@ pub const feature_sse3 = Feature{ pub const feature_sse4a = Feature{ .name = "sse4a", .description = "Support SSE 4a instructions", - .llvm_name = "sse4a", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -744,7 +655,6 @@ pub const feature_sse4a = Feature{ pub const feature_sse41 = Feature{ .name = "sse4.1", .description = "Enable SSE 4.1 instructions", - .llvm_name = "sse4.1", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -753,7 +663,6 @@ pub const feature_sse41 = Feature{ pub const feature_sse42 = Feature{ .name = "sse4.2", .description = "Enable SSE 4.2 instructions", - .llvm_name = "sse4.2", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -762,7 +671,6 @@ pub const feature_sse42 = Feature{ pub const feature_sseUnalignedMem = Feature{ .name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", - .llvm_name = "sse-unaligned-mem", .subfeatures = &[_]*const Feature { }, }; @@ -770,7 +678,6 @@ pub const feature_sseUnalignedMem = Feature{ pub const feature_ssse3 = Feature{ .name = "ssse3", .description = "Enable SSSE3 instructions", - .llvm_name = "ssse3", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -779,7 +686,6 @@ pub const feature_ssse3 = Feature{ pub const feature_slow3opsLea = Feature{ .name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", - .llvm_name = "slow-3ops-lea", .subfeatures = &[_]*const Feature { }, }; @@ -787,7 +693,6 @@ pub const feature_slow3opsLea = Feature{ pub const feature_idivlToDivb = Feature{ .name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", - .llvm_name = "idivl-to-divb", .subfeatures = &[_]*const Feature { }, }; @@ -795,7 +700,6 @@ pub const feature_idivlToDivb = Feature{ pub const feature_idivqToDivl = Feature{ .name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", - .llvm_name = "idivq-to-divl", .subfeatures = &[_]*const Feature { }, }; @@ -803,7 +707,6 @@ pub const feature_idivqToDivl = Feature{ pub const feature_slowIncdec = Feature{ .name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", - .llvm_name = "slow-incdec", .subfeatures = &[_]*const Feature { }, }; @@ -811,7 +714,6 @@ pub const feature_slowIncdec = Feature{ pub const feature_slowLea = Feature{ .name = "slow-lea", .description = "LEA instruction with certain arguments is slow", - .llvm_name = "slow-lea", .subfeatures = &[_]*const Feature { }, }; @@ -819,7 +721,6 @@ pub const feature_slowLea = Feature{ pub const feature_slowPmaddwd = Feature{ .name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", - .llvm_name = "slow-pmaddwd", .subfeatures = &[_]*const Feature { }, }; @@ -827,7 +728,6 @@ pub const feature_slowPmaddwd = Feature{ pub const feature_slowPmulld = Feature{ .name = "slow-pmulld", .description = "PMULLD instruction is slow", - .llvm_name = "slow-pmulld", .subfeatures = &[_]*const Feature { }, }; @@ -835,7 +735,6 @@ pub const feature_slowPmulld = Feature{ pub const feature_slowShld = Feature{ .name = "slow-shld", .description = "SHLD instruction is slow", - .llvm_name = "slow-shld", .subfeatures = &[_]*const Feature { }, }; @@ -843,7 +742,6 @@ pub const feature_slowShld = Feature{ pub const feature_slowTwoMemOps = Feature{ .name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", - .llvm_name = "slow-two-mem-ops", .subfeatures = &[_]*const Feature { }, }; @@ -851,7 +749,6 @@ pub const feature_slowTwoMemOps = Feature{ pub const feature_slowUnalignedMem16 = Feature{ .name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", - .llvm_name = "slow-unaligned-mem-16", .subfeatures = &[_]*const Feature { }, }; @@ -859,7 +756,6 @@ pub const feature_slowUnalignedMem16 = Feature{ pub const feature_slowUnalignedMem32 = Feature{ .name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", - .llvm_name = "slow-unaligned-mem-32", .subfeatures = &[_]*const Feature { }, }; @@ -867,7 +763,6 @@ pub const feature_slowUnalignedMem32 = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Use software floating point features", - .llvm_name = "soft-float", .subfeatures = &[_]*const Feature { }, }; @@ -875,7 +770,6 @@ pub const feature_softFloat = Feature{ pub const feature_tbm = Feature{ .name = "tbm", .description = "Enable TBM instructions", - .llvm_name = "tbm", .subfeatures = &[_]*const Feature { }, }; @@ -883,7 +777,6 @@ pub const feature_tbm = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .llvm_name = "use-aa", .subfeatures = &[_]*const Feature { }, }; @@ -891,7 +784,6 @@ pub const feature_useAa = Feature{ pub const feature_vaes = Feature{ .name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", - .llvm_name = "vaes", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -900,7 +792,6 @@ pub const feature_vaes = Feature{ pub const feature_avx512vbmi = Feature{ .name = "avx512vbmi", .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .llvm_name = "avx512vbmi", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -909,7 +800,6 @@ pub const feature_avx512vbmi = Feature{ pub const feature_avx512vbmi2 = Feature{ .name = "avx512vbmi2", .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .llvm_name = "avx512vbmi2", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -918,7 +808,6 @@ pub const feature_avx512vbmi2 = Feature{ pub const feature_avx512vl = Feature{ .name = "avx512vl", .description = "Enable AVX-512 Vector Length eXtensions", - .llvm_name = "avx512vl", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -927,7 +816,6 @@ pub const feature_avx512vl = Feature{ pub const feature_avx512vnni = Feature{ .name = "avx512vnni", .description = "Enable AVX-512 Vector Neural Network Instructions", - .llvm_name = "avx512vnni", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -936,7 +824,6 @@ pub const feature_avx512vnni = Feature{ pub const feature_avx512vp2intersect = Feature{ .name = "avx512vp2intersect", .description = "Enable AVX-512 vp2intersect", - .llvm_name = "avx512vp2intersect", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -945,7 +832,6 @@ pub const feature_avx512vp2intersect = Feature{ pub const feature_vpclmulqdq = Feature{ .name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", - .llvm_name = "vpclmulqdq", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -954,7 +840,6 @@ pub const feature_vpclmulqdq = Feature{ pub const feature_avx512vpopcntdq = Feature{ .name = "avx512vpopcntdq", .description = "Enable AVX-512 Population Count Instructions", - .llvm_name = "avx512vpopcntdq", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -963,7 +848,6 @@ pub const feature_avx512vpopcntdq = Feature{ pub const feature_waitpkg = Feature{ .name = "waitpkg", .description = "Wait and pause enhancements", - .llvm_name = "waitpkg", .subfeatures = &[_]*const Feature { }, }; @@ -971,7 +855,6 @@ pub const feature_waitpkg = Feature{ pub const feature_wbnoinvd = Feature{ .name = "wbnoinvd", .description = "Write Back No Invalidate", - .llvm_name = "wbnoinvd", .subfeatures = &[_]*const Feature { }, }; @@ -979,7 +862,6 @@ pub const feature_wbnoinvd = Feature{ pub const feature_x87 = Feature{ .name = "x87", .description = "Enable X87 float instructions", - .llvm_name = "x87", .subfeatures = &[_]*const Feature { }, }; @@ -987,7 +869,6 @@ pub const feature_x87 = Feature{ pub const feature_xop = Feature{ .name = "xop", .description = "Enable XOP instructions", - .llvm_name = "xop", .subfeatures = &[_]*const Feature { &feature_sse, }, @@ -996,7 +877,6 @@ pub const feature_xop = Feature{ pub const feature_xsave = Feature{ .name = "xsave", .description = "Support xsave instructions", - .llvm_name = "xsave", .subfeatures = &[_]*const Feature { }, }; @@ -1004,7 +884,6 @@ pub const feature_xsave = Feature{ pub const feature_xsavec = Feature{ .name = "xsavec", .description = "Support xsavec instructions", - .llvm_name = "xsavec", .subfeatures = &[_]*const Feature { }, }; @@ -1012,7 +891,6 @@ pub const feature_xsavec = Feature{ pub const feature_xsaveopt = Feature{ .name = "xsaveopt", .description = "Support xsaveopt instructions", - .llvm_name = "xsaveopt", .subfeatures = &[_]*const Feature { }, }; @@ -1020,7 +898,6 @@ pub const feature_xsaveopt = Feature{ pub const feature_xsaves = Feature{ .name = "xsaves", .description = "Support xsaves instructions", - .llvm_name = "xsaves", .subfeatures = &[_]*const Feature { }, }; @@ -1028,7 +905,6 @@ pub const feature_xsaves = Feature{ pub const feature_bitMode16 = Feature{ .name = "16bit-mode", .description = "16-bit mode (i8086)", - .llvm_name = "16bit-mode", .subfeatures = &[_]*const Feature { }, }; @@ -1036,7 +912,6 @@ pub const feature_bitMode16 = Feature{ pub const feature_bitMode32 = Feature{ .name = "32bit-mode", .description = "32-bit mode (80386)", - .llvm_name = "32bit-mode", .subfeatures = &[_]*const Feature { }, }; @@ -1044,7 +919,6 @@ pub const feature_bitMode32 = Feature{ pub const feature_bitMode64 = Feature{ .name = "64bit-mode", .description = "64-bit mode (x86_64)", - .llvm_name = "64bit-mode", .subfeatures = &[_]*const Feature { }, }; -- 2.54.0 From bd6ef21f8556b3872c5780eee70621e6c66a0aa4 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Fri, 20 Dec 2019 21:46:42 -0500 Subject: [PATCH 09/63] Add cpu/feature specification to cmndline --- src-self-hosted/stage1.zig | 95 ++++++++++++++++++++++++++++++++++++-- src/all_types.hpp | 3 ++ src/codegen.cpp | 9 ++++ src/main.cpp | 16 +++++++ src/userland.cpp | 1 + src/userland.h | 3 ++ 6 files changed, 123 insertions(+), 4 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 1544fcbc8f2b4fc591c6883f9444ea15fa296622..8734b37a02e2752b98e9b93fac6d79bb2eedcfc4 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -531,12 +531,12 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz // ABI warning export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { - print_features_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { + printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); }; } -fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { +fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { @@ -575,12 +575,12 @@ fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void // ABI warning export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { - print_cpus_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { + printCpusForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); }; } -fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { +fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { @@ -618,3 +618,90 @@ fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void { } // use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'. +// ABI warning +export fn stage2_validate_cpu_and_features( + arch_name: [*:0]const u8, + cpu: ?[*:0]const u8, + features: ?[*:0]const u8, +) bool { + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_name)) catch { + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + return false; + }; + + const res = validateCpuAndFeatures( + arch, + if (cpu) |def_cpu| std.mem.toSliceConst(u8, def_cpu) else "", + if (features) |def_features| std.mem.toSliceConst(u8, def_features) else ""); + + switch (res) { + .Ok => return true, + .InvalidCpu => |invalid_cpu| { + std.debug.warn("Invalid CPU '{}'\n", .{ invalid_cpu }); + return false; + }, + .InvalidFeaturesString => { + std.debug.warn("Invalid features string\n", .{}); + std.debug.warn("Must have format \"+yes_feature,-no_feature\"\n", .{}); + return false; + }, + .InvalidFeature => |invalid_feature| { + std.debug.warn("Invalid feature '{}'\n", .{ invalid_feature }); + return false; + } + } +} + +const ValidateCpuAndFeaturesResult = union(enum) { + Ok, + InvalidCpu: []const u8, + InvalidFeaturesString, + InvalidFeature: []const u8, +}; + +fn validateCpuAndFeatures(arch: @TagType(std.Target.Arch), cpu: []const u8, features: []const u8) ValidateCpuAndFeaturesResult { + + const known_cpus = std.target.getCpusForArch(arch); + const known_features = std.target.getFeaturesForArch(arch); + + if (cpu.len > 0) { + var found_cpu = false; + for (known_cpus) |known_cpu| { + if (std.mem.eql(u8, cpu, known_cpu.name)) { + found_cpu = true; + break; + } + } + + if (!found_cpu) { + return .{ .InvalidCpu = cpu }; + } + } + + if (features.len > 0) { + var start: usize = 0; + while (start < features.len) { + const next_comma_pos = std.mem.indexOfScalar(u8, features[start..], ',') orelse features.len - start; + var feature = features[start..start+next_comma_pos]; + + if (feature.len < 2) return .{ .InvalidFeaturesString = {} }; + + if (feature[0] != '+' and feature[0] != '-') return .{ .InvalidFeaturesString = {} }; + feature = feature[1..]; + + var found_feature = false; + for (known_features) |known_feature| { + if (std.mem.eql(u8, feature, known_feature.name)) { + found_feature = true; + break; + } + } + + if (!found_feature) return .{ .InvalidFeature = feature }; + + start += next_comma_pos + 1; + } + } + + return .{ .Ok = {} }; +} diff --git a/src/all_types.hpp b/src/all_types.hpp index df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f..af4914e29ecf0f2df75d3528506ac3f72dd960de 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2215,6 +2215,9 @@ struct CodeGen { const char **clang_argv; size_t clang_argv_len; + + const char *llvm_cpu; + const char *llvm_features; }; struct ZigVar { diff --git a/src/codegen.cpp b/src/codegen.cpp index 3d4d2a8c317e0f360c8bce83f2d8e800995e6aee..43fc002a1207ee273cf737f0356cbb861ff90e78 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8800,6 +8800,15 @@ static void init(CodeGen *g) { target_specific_features = ""; } + // Override CPU and features if non-null. + if (g->llvm_cpu != nullptr) { + target_specific_cpu_args = g->llvm_cpu; + } + + if (g->llvm_features != nullptr) { + target_specific_features = g->llvm_features; + } + g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault, g->function_sections); diff --git a/src/main.cpp b/src/main.cpp index ee2faa9a78ab43b60d4e337bfa17cc4a6c5fb342..f061b13414ec1ee2ca83f2ba246c1222a658fe59 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -100,6 +100,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --override-lib-dir [arg] override path to Zig lib directory\n" " -ffunction-sections places each function in a separate section\n" " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n" + " --cpu [cpu] compile for [cpu] on the current target\n" + " --features [feature_str] compile with features in [feature_str] on the current target\n" "\n" "Link Options:\n" " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n" @@ -533,6 +535,8 @@ int main(int argc, char **argv) { WantStackCheck want_stack_check = WantStackCheckAuto; WantCSanitize want_sanitize_c = WantCSanitizeAuto; bool function_sections = false; + const char *cpu = ""; + const char *features = ""; const char *targets_list_features_arch = nullptr; const char *targets_list_cpus_arch = nullptr; @@ -951,6 +955,10 @@ int main(int argc, char **argv) { targets_list_features_arch = argv[i]; } else if (strcmp(arg, "--list-cpus") == 0) { targets_list_cpus_arch = argv[i]; + } else if (strcmp(arg, "--cpu") == 0) { + cpu = argv[i]; + } else if (strcmp(arg, "--features") == 0) { + features = argv[i]; }else { fprintf(stderr, "Invalid argument: %s\n", arg); return print_error_usage(arg0); @@ -1248,6 +1256,7 @@ int main(int argc, char **argv) { g->system_linker_hack = system_linker_hack; g->function_sections = function_sections; + for (size_t i = 0; i < lib_dirs.length; i += 1) { codegen_add_lib_dir(g, lib_dirs.at(i)); } @@ -1269,6 +1278,13 @@ int main(int argc, char **argv) { codegen_add_rpath(g, rpath_list.at(i)); } + if (!stage2_validate_cpu_and_features(target_arch_name(target.arch), cpu, features)) { + return 1; + } + + g->llvm_cpu = cpu; + g->llvm_features = features; + codegen_set_rdynamic(g, rdynamic); if (mmacosx_version_min && mios_version_min) { fprintf(stderr, "-mmacosx-version-min and -mios-version-min options not allowed together\n"); diff --git a/src/userland.cpp b/src/userland.cpp index 87ef99c03a91fa16eb0ce0d06890c3adb2e6dae0..e0c8b33fa2b2d6ed234ab90c3f7adc206d8cd986 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -91,3 +91,4 @@ void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_coun void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} +bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features) { return true; } diff --git a/src/userland.h b/src/userland.h index c85684cb36f3f7b37c7462bc21270f9b4022298a..9d3e9623fba9eda5ffb1ec6cf6d0931a2afc5671 100644 --- a/src/userland.h +++ b/src/userland.h @@ -180,4 +180,7 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_ // ABI warning ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); +// ABI warning +ZIG_EXTERN_C bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features); + #endif -- 2.54.0 From b3324f1901ab9eb7321ad65161e6e07047284cab Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Sat, 21 Dec 2019 21:18:05 -0500 Subject: [PATCH 10/63] Add cpu/feature to cache hash --- src/codegen.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/codegen.cpp b/src/codegen.cpp index 43fc002a1207ee273cf737f0356cbb861ff90e78..798f406c8e02ce11768420ea79110ff8cfd10704 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8655,6 +8655,8 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_bool(&cache_hash, g->valgrind_support); cache_bool(&cache_hash, g->link_eh_frame_hdr); cache_int(&cache_hash, detect_subsystem(g)); + if (g->llvm_cpu) cache_str(&cache_hash, g->llvm_cpu); + if (g->llvm_features) cache_str(&cache_hash, g->llvm_features); Buf digest = BUF_INIT; buf_resize(&digest, 0); @@ -10388,6 +10390,8 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { } cache_buf_opt(ch, g->dynamic_linker_path); cache_buf_opt(ch, g->version_script_path); + if (g->llvm_cpu) cache_str(ch, g->llvm_cpu); + if (g->llvm_features) cache_str(ch, g->llvm_features); // gen_c_objects appends objects to g->link_objects which we want to include in the hash gen_c_objects(g); -- 2.54.0 From c1798cb632a1f8b7a0824a9e5d58cd8c30e4f373 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Sat, 21 Dec 2019 21:38:39 -0500 Subject: [PATCH 11/63] Add build.zig cpu and feature options --- lib/std/build.zig | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/lib/std/build.zig b/lib/std/build.zig index ad4be9e4ca3c252424b4257cd46aaa80ea476a27..65c5a6f0640bcce1618e49abcbec0f04efba25b6 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1199,6 +1199,9 @@ pub const LibExeObjStep = struct { subsystem: ?builtin.SubSystem = null, + cpu: ?[]const u8 = null, + features: ?[]const u8 = null, + const LinkObject = union(enum) { StaticPath: []const u8, OtherStep: *LibExeObjStep, @@ -1384,6 +1387,23 @@ pub const LibExeObjStep = struct { self.computeOutFileNames(); } + pub fn setCpu(self: *LibExeObjStep, cpu: *const std.target.Cpu) void { + self.cpu = cpu.name; + } + + pub fn setFeatures(self: *LibExeObjStep, features: []*const std.target.Feature) void { + var features_str_buffer = std.Buffer.init(self.builder.allocator, "") catch unreachable; + defer features_str_buffer.deinit(); + + for (features) |feature| { + features_str_buffer.append("+") catch unreachable; + features_str_buffer.append(feature.name) catch unreachable; + features_str_buffer.append(",") catch unreachable; + } + + self.features = features_str_buffer.toOwnedSlice(); + } + pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void { self.target_glibc = Version{ .major = major, @@ -1974,6 +1994,16 @@ pub const LibExeObjStep = struct { }, } + if (self.cpu) |cpu| { + try zig_args.append("--cpu"); + try zig_args.append(cpu); + } + + if (self.features) |features| { + try zig_args.append("--features"); + try zig_args.append(features); + } + if (self.target_glibc) |ver| { try zig_args.append("-target-glibc"); try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch })); -- 2.54.0 From 51372200d36ee0f78d32a5f7c7f8d4faf6dc9a35 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Sat, 4 Jan 2020 17:50:19 -0500 Subject: [PATCH 12/63] Filter out non-features --- lib/std/target/aarch64.zig | 1008 ++-------- lib/std/target/amdgpu.zig | 1068 +++++------ lib/std/target/arm.zig | 1862 ++++--------------- lib/std/target/avr.zig | 3538 ++++++++++++++---------------------- lib/std/target/hexagon.zig | 143 -- lib/std/target/mips.zig | 216 +-- lib/std/target/powerpc.zig | 4 +- lib/std/target/sparc.zig | 85 - 8 files changed, 2463 insertions(+), 5461 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index b7a6283f861e6bcbc721458c69f739bb091f4449..b907d96b7d9badf8ce6bd1f56ef88abb6bf78f1f 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -887,573 +887,6 @@ pub const feature_zczGp = Feature{ }, }; -pub const feature_v81a = Feature{ - .name = "v8.1a", - .description = "Support ARM v8.1a instructions", - .subfeatures = &[_]*const Feature { - &feature_lor, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_vh, - &feature_crc, - }, -}; - -pub const feature_v82a = Feature{ - .name = "v8.2a", - .description = "Support ARM v8.2a instructions", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_vh, - &feature_ras, - &feature_crc, - &feature_uaops, - }, -}; - -pub const feature_v83a = Feature{ - .name = "v8.3a", - .description = "Support ARM v8.3a instructions", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ccidx, - &feature_crc, - &feature_pa, - }, -}; - -pub const feature_v84a = Feature{ - .name = "v8.4a", - .description = "Support ARM v8.4a instructions", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_crc, - &feature_fmi, - &feature_tracev84, - &feature_tlbRmi, - &feature_rdm, - &feature_ccidx, - &feature_mpam, - &feature_pan, - &feature_lse, - &feature_rcpc, - &feature_uaops, - &feature_sel2, - &feature_nv, - &feature_am, - &feature_dit, - &feature_vh, - &feature_ras, - &feature_pa, - }, -}; - -pub const feature_v85a = Feature{ - .name = "v8.5a", - .description = "Support ARM v8.5a instructions", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_ssbs, - &feature_crc, - &feature_fmi, - &feature_bti, - &feature_tracev84, - &feature_tlbRmi, - &feature_fptoint, - &feature_rdm, - &feature_sb, - &feature_ccidx, - &feature_mpam, - &feature_pan, - &feature_lse, - &feature_predres, - &feature_rcpc, - &feature_uaops, - &feature_sel2, - &feature_nv, - &feature_am, - &feature_dit, - &feature_specrestrict, - &feature_vh, - &feature_altnzcv, - &feature_ras, - &feature_ccdp, - &feature_pa, - }, -}; - -pub const feature_a35 = Feature{ - .name = "a35", - .description = "Cortex-A35 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fpArmv8, - &feature_perfmon, - &feature_crc, - }, -}; - -pub const feature_a53 = Feature{ - .name = "a53", - .description = "Cortex-A53 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_useAa, - &feature_balanceFpOps, - &feature_fuseAes, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_crc, - }, -}; - -pub const feature_a55 = Feature{ - .name = "a55", - .description = "Cortex-A55 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fuseAes, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_perfmon, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_crc, - }, -}; - -pub const feature_a57 = Feature{ - .name = "a57", - .description = "Cortex-A57 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_balanceFpOps, - &feature_predictableSelectExpensive, - &feature_fuseAes, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_crc, - }, -}; - -pub const feature_a65 = Feature{ - .name = "a65", - .description = "Cortex-A65 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_rcpc, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_ras, - &feature_ssbs, - &feature_crc, - }, -}; - -pub const feature_a72 = Feature{ - .name = "a72", - .description = "Cortex-A72 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fpArmv8, - &feature_fuseAes, - &feature_crc, - &feature_perfmon, - }, -}; - -pub const feature_a73 = Feature{ - .name = "a73", - .description = "Cortex-A73 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fpArmv8, - &feature_fuseAes, - &feature_crc, - &feature_perfmon, - }, -}; - -pub const feature_a75 = Feature{ - .name = "a75", - .description = "Cortex-A75 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_fuseAes, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_perfmon, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_crc, - }, -}; - -pub const feature_a76 = Feature{ - .name = "a76", - .description = "Cortex-A76 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - }, -}; - -pub const feature_cyclone = Feature{ - .name = "cyclone", - .description = "Cyclone", - .subfeatures = &[_]*const Feature { - &feature_zczFpWorkaround, - &feature_fuseAes, - &feature_zcm, - &feature_arithCbzFusion, - &feature_perfmon, - &feature_alternateSextloadCvtF32Pattern, - &feature_arithBccFusion, - &feature_disableLatencySchedHeuristic, - &feature_zczGp, - &feature_fuseCryptoEor, - &feature_fpArmv8, - &feature_zczFp, - }, -}; - -pub const feature_exynosm1 = Feature{ - .name = "exynosm1", - .description = "Samsung Exynos-M1 processors", - .subfeatures = &[_]*const Feature { - &feature_useReciprocalSquareRoot, - &feature_fuseAes, - &feature_usePostraScheduler, - &feature_slowMisaligned128store, - &feature_perfmon, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - &feature_slowPaired128, - }, -}; - -pub const feature_exynosm2 = Feature{ - .name = "exynosm2", - .description = "Samsung Exynos-M2 processors", - .subfeatures = &[_]*const Feature { - &feature_fuseAes, - &feature_usePostraScheduler, - &feature_slowMisaligned128store, - &feature_perfmon, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - &feature_slowPaired128, - }, -}; - -pub const feature_exynosm3 = Feature{ - .name = "exynosm3", - .description = "Samsung Exynos-M3 processors", - .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_predictableSelectExpensive, - &feature_fuseAes, - &feature_fuseAddress, - &feature_fuseCsel, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - }, -}; - -pub const feature_exynosm4 = Feature{ - .name = "exynosm4", - .description = "Samsung Exynos-M4 processors", - .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_fuseAes, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_crc, - &feature_fuseAddress, - &feature_arithCbzFusion, - &feature_perfmon, - &feature_arithBccFusion, - &feature_zczGp, - &feature_rdm, - &feature_force32bitJumpTables, - &feature_pan, - &feature_lse, - &feature_fuseCsel, - &feature_uaops, - &feature_fuseArithLogic, - &feature_usePostraScheduler, - &feature_vh, - &feature_ras, - &feature_zczFp, - }, -}; - -pub const feature_falkor = Feature{ - .name = "falkor", - .description = "Qualcomm Falkor processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_slowStrqroStore, - &feature_rdm, - &feature_zczGp, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_zczFp, - &feature_crc, - }, -}; - -pub const feature_kryo = Feature{ - .name = "kryo", - .description = "Qualcomm Kryo processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_zczGp, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_zczFp, - &feature_crc, - }, -}; - -pub const feature_neoversee1 = Feature{ - .name = "neoversee1", - .description = "Neoverse E1 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - }, -}; - -pub const feature_neoversen1 = Feature{ - .name = "neoversen1", - .description = "Neoverse N1 ARM processors", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_spe, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_ras, - &feature_vh, - &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - }, -}; - -pub const feature_saphira = Feature{ - .name = "saphira", - .description = "Qualcomm Saphira processors", - .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_crc, - &feature_fmi, - &feature_predictableSelectExpensive, - &feature_tracev84, - &feature_tlbRmi, - &feature_perfmon, - &feature_zczGp, - &feature_rdm, - &feature_ccidx, - &feature_mpam, - &feature_pan, - &feature_lse, - &feature_rcpc, - &feature_uaops, - &feature_sel2, - &feature_usePostraScheduler, - &feature_nv, - &feature_am, - &feature_spe, - &feature_dit, - &feature_vh, - &feature_ras, - &feature_zczFp, - &feature_pa, - }, -}; - -pub const feature_tsv110 = Feature{ - .name = "tsv110", - .description = "HiSilicon TS-V110 processors", - .subfeatures = &[_]*const Feature { - &feature_fuseAes, - &feature_usePostraScheduler, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_uaops, - &feature_perfmon, - &feature_spe, - &feature_pan, - &feature_lse, - &feature_rdm, - &feature_vh, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_ras, - &feature_crc, - }, -}; - -pub const feature_thunderx = Feature{ - .name = "thunderx", - .description = "Cavium ThunderX processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_crc, - }, -}; - -pub const feature_thunderx2t99 = Feature{ - .name = "thunderx2t99", - .description = "Cavium ThunderX2 processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_lor, - &feature_lse, - &feature_pan, - &feature_arithBccFusion, - &feature_rdm, - &feature_aggressiveFma, - &feature_vh, - &feature_fpArmv8, - &feature_crc, - }, -}; - -pub const feature_thunderxt81 = Feature{ - .name = "thunderxt81", - .description = "Cavium ThunderX processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_crc, - }, -}; - -pub const feature_thunderxt83 = Feature{ - .name = "thunderxt83", - .description = "Cavium ThunderX processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_crc, - }, -}; - -pub const feature_thunderxt88 = Feature{ - .name = "thunderxt88", - .description = "Cavium ThunderX processors", - .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, - &feature_crc, - }, -}; - pub const features = &[_]*const Feature { &feature_aes, &feature_am, @@ -1578,55 +1011,24 @@ pub const features = &[_]*const Feature { &feature_zczFp, &feature_zczFpWorkaround, &feature_zczGp, - &feature_v81a, - &feature_v82a, - &feature_v83a, - &feature_v84a, - &feature_v85a, - &feature_a35, - &feature_a53, - &feature_a55, - &feature_a57, - &feature_a65, - &feature_a72, - &feature_a73, - &feature_a75, - &feature_a76, - &feature_cyclone, - &feature_exynosm1, - &feature_exynosm2, - &feature_exynosm3, - &feature_exynosm4, - &feature_falkor, - &feature_kryo, - &feature_neoversee1, - &feature_neoversen1, - &feature_saphira, - &feature_tsv110, - &feature_thunderx, - &feature_thunderx2t99, - &feature_thunderxt81, - &feature_thunderxt83, - &feature_thunderxt88, }; pub const cpu_appleLatest = Cpu{ .name = "apple-latest", .llvm_name = "apple-latest", .subfeatures = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_alternateSextloadCvtF32Pattern, &feature_zczFpWorkaround, - &feature_fuseAes, + &feature_fuseCryptoEor, + &feature_disableLatencySchedHeuristic, &feature_zcm, - &feature_arithCbzFusion, + &feature_zczFp, &feature_perfmon, - &feature_alternateSextloadCvtF32Pattern, + &feature_fpArmv8, + &feature_fuseAes, &feature_arithBccFusion, - &feature_disableLatencySchedHeuristic, &feature_zczGp, - &feature_fuseCryptoEor, - &feature_fpArmv8, - &feature_zczFp, - &feature_cyclone, }, }; @@ -1637,7 +1039,6 @@ pub const cpu_cortexA35 = Cpu{ &feature_fpArmv8, &feature_perfmon, &feature_crc, - &feature_a35, }, }; @@ -1645,15 +1046,14 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .subfeatures = &[_]*const Feature { - &feature_useAa, - &feature_balanceFpOps, - &feature_fuseAes, &feature_usePostraScheduler, + &feature_crc, &feature_perfmon, + &feature_fuseAes, + &feature_useAa, &feature_fpArmv8, + &feature_balanceFpOps, &feature_customCheapAsMove, - &feature_crc, - &feature_a53, }, }; @@ -1661,21 +1061,20 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .subfeatures = &[_]*const Feature { - &feature_fuseAes, + &feature_crc, + &feature_dotprod, &feature_ccpp, + &feature_uaops, + &feature_rcpc, + &feature_lse, &feature_lor, - &feature_dotprod, - &feature_perfmon, &feature_pan, - &feature_lse, &feature_rdm, + &feature_perfmon, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_crc, - &feature_a55, + &feature_fuseAes, }, }; @@ -1683,16 +1082,15 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_balanceFpOps, - &feature_predictableSelectExpensive, - &feature_fuseAes, &feature_usePostraScheduler, + &feature_crc, + &feature_fuseLiterals, &feature_perfmon, + &feature_fuseAes, &feature_fpArmv8, + &feature_balanceFpOps, &feature_customCheapAsMove, - &feature_crc, - &feature_a57, + &feature_predictableSelectExpensive, }, }; @@ -1700,20 +1098,19 @@ pub const cpu_cortexA65 = Cpu{ .name = "cortex-a65", .llvm_name = "cortex-a65", .subfeatures = &[_]*const Feature { + &feature_ssbs, + &feature_dotprod, + &feature_crc, + &feature_uaops, &feature_rcpc, - &feature_ccpp, + &feature_lse, &feature_lor, - &feature_dotprod, &feature_pan, - &feature_lse, &feature_rdm, + &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_ras, - &feature_ssbs, - &feature_crc, - &feature_a65, + &feature_ccpp, }, }; @@ -1721,20 +1118,19 @@ pub const cpu_cortexA65ae = Cpu{ .name = "cortex-a65ae", .llvm_name = "cortex-a65ae", .subfeatures = &[_]*const Feature { + &feature_ssbs, + &feature_dotprod, + &feature_crc, + &feature_uaops, &feature_rcpc, - &feature_ccpp, + &feature_lse, &feature_lor, - &feature_dotprod, &feature_pan, - &feature_lse, &feature_rdm, + &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_ras, - &feature_ssbs, - &feature_crc, - &feature_a65, + &feature_ccpp, }, }; @@ -1744,9 +1140,8 @@ pub const cpu_cortexA72 = Cpu{ .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_fuseAes, - &feature_crc, &feature_perfmon, - &feature_a72, + &feature_crc, }, }; @@ -1756,9 +1151,8 @@ pub const cpu_cortexA73 = Cpu{ .subfeatures = &[_]*const Feature { &feature_fpArmv8, &feature_fuseAes, - &feature_crc, &feature_perfmon, - &feature_a73, + &feature_crc, }, }; @@ -1766,21 +1160,20 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .subfeatures = &[_]*const Feature { - &feature_fuseAes, + &feature_crc, + &feature_dotprod, &feature_ccpp, + &feature_uaops, + &feature_rcpc, + &feature_lse, &feature_lor, - &feature_dotprod, - &feature_perfmon, &feature_pan, - &feature_lse, &feature_rdm, + &feature_perfmon, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_crc, - &feature_a75, + &feature_fuseAes, }, }; @@ -1788,20 +1181,19 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, + &feature_crc, + &feature_ssbs, &feature_dotprod, - &feature_pan, + &feature_uaops, + &feature_rcpc, &feature_lse, + &feature_lor, + &feature_pan, &feature_rdm, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - &feature_a76, + &feature_ccpp, }, }; @@ -1809,20 +1201,19 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, + &feature_crc, + &feature_ssbs, &feature_dotprod, - &feature_pan, + &feature_uaops, + &feature_rcpc, &feature_lse, + &feature_lor, + &feature_pan, &feature_rdm, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - &feature_a76, + &feature_ccpp, }, }; @@ -1830,19 +1221,18 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .subfeatures = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_alternateSextloadCvtF32Pattern, &feature_zczFpWorkaround, - &feature_fuseAes, + &feature_fuseCryptoEor, + &feature_disableLatencySchedHeuristic, &feature_zcm, - &feature_arithCbzFusion, + &feature_zczFp, &feature_perfmon, - &feature_alternateSextloadCvtF32Pattern, + &feature_fpArmv8, + &feature_fuseAes, &feature_arithBccFusion, - &feature_disableLatencySchedHeuristic, &feature_zczGp, - &feature_fuseCryptoEor, - &feature_fpArmv8, - &feature_zczFp, - &feature_cyclone, }, }; @@ -1851,17 +1241,16 @@ pub const cpu_exynosM1 = Cpu{ .llvm_name = "exynos-m1", .subfeatures = &[_]*const Feature { &feature_useReciprocalSquareRoot, - &feature_fuseAes, &feature_usePostraScheduler, + &feature_crc, + &feature_zczFp, + &feature_slowPaired128, + &feature_force32bitJumpTables, &feature_slowMisaligned128store, &feature_perfmon, &feature_fpArmv8, + &feature_fuseAes, &feature_customCheapAsMove, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - &feature_slowPaired128, - &feature_exynosm1, }, }; @@ -1869,17 +1258,16 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .subfeatures = &[_]*const Feature { - &feature_fuseAes, &feature_usePostraScheduler, + &feature_crc, + &feature_zczFp, + &feature_slowPaired128, + &feature_force32bitJumpTables, &feature_slowMisaligned128store, &feature_perfmon, &feature_fpArmv8, + &feature_fuseAes, &feature_customCheapAsMove, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - &feature_slowPaired128, - &feature_exynosm2, }, }; @@ -1887,20 +1275,19 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_predictableSelectExpensive, - &feature_fuseAes, &feature_fuseAddress, - &feature_fuseCsel, &feature_usePostraScheduler, + &feature_crc, + &feature_zczFp, + &feature_fuseLiterals, + &feature_lslFast, + &feature_fuseCsel, + &feature_force32bitJumpTables, &feature_perfmon, &feature_fpArmv8, + &feature_fuseAes, &feature_customCheapAsMove, - &feature_lslFast, - &feature_force32bitJumpTables, - &feature_zczFp, - &feature_crc, - &feature_exynosm3, + &feature_predictableSelectExpensive, }, }; @@ -1909,31 +1296,30 @@ pub const cpu_exynosM4 = Cpu{ .llvm_name = "exynos-m4", .subfeatures = &[_]*const Feature { &feature_fuseLiterals, - &feature_fuseAes, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_crc, - &feature_fuseAddress, - &feature_arithCbzFusion, - &feature_perfmon, - &feature_arithBccFusion, - &feature_zczGp, - &feature_rdm, - &feature_force32bitJumpTables, - &feature_pan, - &feature_lse, - &feature_fuseCsel, &feature_uaops, + &feature_fuseCsel, + &feature_force32bitJumpTables, &feature_fuseArithLogic, - &feature_usePostraScheduler, &feature_vh, + &feature_arithBccFusion, + &feature_zczGp, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_lse, + &feature_pan, &feature_ras, + &feature_fuseAes, + &feature_fuseAddress, + &feature_rdm, + &feature_arithCbzFusion, + &feature_crc, &feature_zczFp, - &feature_exynosm4, + &feature_lslFast, + &feature_lor, + &feature_perfmon, + &feature_fpArmv8, + &feature_ccpp, + &feature_customCheapAsMove, }, }; @@ -1942,31 +1328,30 @@ pub const cpu_exynosM5 = Cpu{ .llvm_name = "exynos-m5", .subfeatures = &[_]*const Feature { &feature_fuseLiterals, - &feature_fuseAes, - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_crc, - &feature_fuseAddress, - &feature_arithCbzFusion, - &feature_perfmon, - &feature_arithBccFusion, - &feature_zczGp, - &feature_rdm, - &feature_force32bitJumpTables, - &feature_pan, - &feature_lse, - &feature_fuseCsel, &feature_uaops, + &feature_fuseCsel, + &feature_force32bitJumpTables, &feature_fuseArithLogic, - &feature_usePostraScheduler, &feature_vh, + &feature_arithBccFusion, + &feature_zczGp, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_lse, + &feature_pan, &feature_ras, + &feature_fuseAes, + &feature_fuseAddress, + &feature_rdm, + &feature_arithCbzFusion, + &feature_crc, &feature_zczFp, - &feature_exynosm4, + &feature_lslFast, + &feature_lor, + &feature_perfmon, + &feature_fpArmv8, + &feature_ccpp, + &feature_customCheapAsMove, }, }; @@ -1974,18 +1359,17 @@ pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, - &feature_perfmon, + &feature_crc, + &feature_zczFp, + &feature_lslFast, &feature_slowStrqroStore, &feature_rdm, - &feature_zczGp, + &feature_perfmon, &feature_fpArmv8, + &feature_zczGp, &feature_customCheapAsMove, - &feature_lslFast, - &feature_zczFp, - &feature_crc, - &feature_falkor, + &feature_predictableSelectExpensive, }, }; @@ -2007,16 +1391,15 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_crc, + &feature_zczFp, + &feature_lslFast, &feature_perfmon, - &feature_zczGp, &feature_fpArmv8, + &feature_zczGp, &feature_customCheapAsMove, - &feature_lslFast, - &feature_zczFp, - &feature_crc, - &feature_kryo, + &feature_predictableSelectExpensive, }, }; @@ -2024,20 +1407,19 @@ pub const cpu_neoverseE1 = Cpu{ .name = "neoverse-e1", .llvm_name = "neoverse-e1", .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, + &feature_crc, + &feature_ssbs, &feature_dotprod, - &feature_pan, + &feature_uaops, + &feature_rcpc, &feature_lse, + &feature_lor, + &feature_pan, &feature_rdm, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - &feature_neoversee1, + &feature_ccpp, }, }; @@ -2045,21 +1427,20 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, + &feature_ssbs, &feature_dotprod, + &feature_crc, + &feature_uaops, + &feature_rcpc, + &feature_lse, &feature_spe, + &feature_lor, &feature_pan, - &feature_lse, &feature_rdm, &feature_ras, &feature_vh, &feature_fpArmv8, - &feature_uaops, - &feature_rcpc, - &feature_ssbs, - &feature_crc, - &feature_neoversen1, + &feature_ccpp, }, }; @@ -2067,37 +1448,36 @@ pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .subfeatures = &[_]*const Feature { - &feature_ccpp, - &feature_lor, - &feature_dotprod, - &feature_fpArmv8, - &feature_customCheapAsMove, - &feature_lslFast, - &feature_crc, - &feature_fmi, - &feature_predictableSelectExpensive, - &feature_tracev84, - &feature_tlbRmi, - &feature_perfmon, + &feature_uaops, + &feature_vh, + &feature_nv, &feature_zczGp, - &feature_rdm, - &feature_ccidx, &feature_mpam, - &feature_pan, - &feature_lse, + &feature_predictableSelectExpensive, + &feature_am, + &feature_usePostraScheduler, + &feature_dotprod, &feature_rcpc, - &feature_uaops, + &feature_lse, + &feature_pan, + &feature_ras, + &feature_tlbRmi, &feature_sel2, - &feature_usePostraScheduler, - &feature_nv, - &feature_am, - &feature_spe, + &feature_rdm, + &feature_ccidx, &feature_dit, - &feature_vh, - &feature_ras, + &feature_crc, &feature_zczFp, + &feature_lslFast, + &feature_fmi, + &feature_spe, + &feature_lor, + &feature_perfmon, + &feature_fpArmv8, + &feature_ccpp, + &feature_tracev84, + &feature_customCheapAsMove, &feature_pa, - &feature_saphira, }, }; @@ -2105,12 +1485,11 @@ pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_crc, &feature_perfmon, &feature_fpArmv8, - &feature_crc, - &feature_thunderx, + &feature_predictableSelectExpensive, }, }; @@ -2118,18 +1497,17 @@ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, - &feature_lor, + &feature_crc, &feature_lse, + &feature_lor, + &feature_aggressiveFma, &feature_pan, - &feature_arithBccFusion, &feature_rdm, - &feature_aggressiveFma, &feature_vh, &feature_fpArmv8, - &feature_crc, - &feature_thunderx2t99, + &feature_arithBccFusion, + &feature_predictableSelectExpensive, }, }; @@ -2137,12 +1515,11 @@ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_crc, &feature_perfmon, &feature_fpArmv8, - &feature_crc, - &feature_thunderxt81, + &feature_predictableSelectExpensive, }, }; @@ -2150,12 +1527,11 @@ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_crc, &feature_perfmon, &feature_fpArmv8, - &feature_crc, - &feature_thunderxt83, + &feature_predictableSelectExpensive, }, }; @@ -2163,12 +1539,11 @@ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .subfeatures = &[_]*const Feature { - &feature_predictableSelectExpensive, &feature_usePostraScheduler, + &feature_crc, &feature_perfmon, &feature_fpArmv8, - &feature_crc, - &feature_thunderxt88, + &feature_predictableSelectExpensive, }, }; @@ -2176,23 +1551,22 @@ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .subfeatures = &[_]*const Feature { - &feature_fuseAes, &feature_usePostraScheduler, - &feature_ccpp, - &feature_lor, + &feature_crc, &feature_dotprod, + &feature_ccpp, &feature_uaops, - &feature_perfmon, + &feature_lse, + &feature_lor, &feature_spe, &feature_pan, - &feature_lse, &feature_rdm, + &feature_perfmon, + &feature_ras, &feature_vh, &feature_fpArmv8, + &feature_fuseAes, &feature_customCheapAsMove, - &feature_ras, - &feature_crc, - &feature_tsv110, }, }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index e6eec35ab3d6c4635c12e1ab3ac3e2d33ec579b6..5f6fe8dcf6ffb2e166b4b54afd3e37efc66d7c58 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -312,43 +312,6 @@ pub const feature_gfx8Insts = Feature{ }, }; -pub const feature_gfx9 = Feature{ - .name = "gfx9", - .description = "GFX9 GPU generation", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, - &feature_ciInsts, - &feature_apertureRegs, - &feature_scalarStores, - &feature_intClampInsts, - &feature_gcn3Encoding, - &feature_flatScratchInsts, - &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, - &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, - &feature_localmemorysize65536, - &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, - &feature_BitInsts16, - &feature_r128A16, - }, -}; - pub const feature_gfx9Insts = Feature{ .name = "gfx9-insts", .description = "Additional instructions for GFX9+", @@ -356,47 +319,6 @@ pub const feature_gfx9Insts = Feature{ }, }; -pub const feature_gfx10 = Feature{ - .name = "gfx10", - .description = "GFX10 GPU generation", - .subfeatures = &[_]*const Feature { - &feature_registerBanking, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, - &feature_ciInsts, - &feature_apertureRegs, - &feature_intClampInsts, - &feature_flatScratchInsts, - &feature_sdwaScalar, - &feature_fastFmaf, - &feature_pkFmacF16Inst, - &feature_vscnt, - &feature_movrel, - &feature_fmaMixInsts, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaOmod, - &feature_vop3Literal, - &feature_dpp8, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_mimgR128, - &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_noDataDepHazard, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, - &feature_BitInsts16, - &feature_noSdstCmpx, - }, -}; - pub const feature_gfx10Insts = Feature{ .name = "gfx10-insts", .description = "Additional instructions for GFX10+", @@ -684,39 +606,6 @@ pub const feature_scalarStores = Feature{ }, }; -pub const feature_seaIslands = Feature{ - .name = "sea-islands", - .description = "SEA_ISLANDS GPU generation", - .subfeatures = &[_]*const Feature { - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, - &feature_ciInsts, - &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - }, -}; - -pub const feature_southernIslands = Feature{ - .name = "southern-islands", - .description = "SOUTHERN_ISLANDS GPU generation", - .subfeatures = &[_]*const Feature { - &feature_localmemorysize32768, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, - &feature_ldsbankcount32, - &feature_noXnackSupport, - &feature_mimgR128, - &feature_wavefrontsize64, - }, -}; - pub const feature_trapHandler = Feature{ .name = "trap-handler", .description = "Trap handler support", @@ -794,35 +683,6 @@ pub const feature_vcmpxPermlaneHazard = Feature{ }, }; -pub const feature_volcanicIslands = Feature{ - .name = "volcanic-islands", - .description = "VOLCANIC_ISLANDS GPU generation", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_ciInsts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_gcn3Encoding, - &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, - &feature_localmemorysize65536, - &feature_mimgR128, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_BitInsts16, - }, -}; - pub const feature_vscnt = Feature{ .name = "vscnt", .description = "Has separate store vscnt counter", @@ -910,9 +770,7 @@ pub const features = &[_]*const Feature { &feature_gcn3Encoding, &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_gfx9, &feature_gfx9Insts, - &feature_gfx10, &feature_gfx10Insts, &feature_instFwdPrefetchBug, &feature_intClampInsts, @@ -954,8 +812,6 @@ pub const features = &[_]*const Feature { &feature_scalarAtomics, &feature_scalarFlatScratchInsts, &feature_scalarStores, - &feature_seaIslands, - &feature_southernIslands, &feature_trapHandler, &feature_trigReducedRange, &feature_unalignedBufferAccess, @@ -967,7 +823,6 @@ pub const features = &[_]*const Feature { &feature_vop3p, &feature_vcmpxExecWarHazard, &feature_vcmpxPermlaneHazard, - &feature_volcanicIslands, &feature_vscnt, &feature_wavefrontsize16, &feature_wavefrontsize32, @@ -983,17 +838,16 @@ pub const cpu_bonaire = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1005,29 +859,28 @@ pub const cpu_carrizo = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, &feature_xnack, &feature_halfRate64Ops, }, @@ -1041,29 +894,28 @@ pub const cpu_fiji = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -1092,41 +944,40 @@ pub const cpu_gfx1010 = Cpu{ &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_registerBanking, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_mimgR128, + &feature_addNoCarryInsts, + &feature_dpp8, + &feature_gfx9Insts, &feature_ciInsts, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_registerBanking, &feature_apertureRegs, - &feature_intClampInsts, + &feature_flatGlobalInsts, + &feature_fp64, + &feature_vscnt, &feature_flatScratchInsts, + &feature_dpp, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_pkFmacF16Inst, - &feature_vscnt, + &feature_sdwaSdst, &feature_movrel, - &feature_fmaMixInsts, + &feature_localmemorysize65536, + &feature_noSdstCmpx, + &feature_pkFmacF16Inst, &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaOmod, &feature_vop3Literal, - &feature_dpp8, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_mimgR128, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_noDataDepHazard, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_noSdstCmpx, - &feature_gfx10, + &feature_gfx10Insts, + &feature_sdwa, + &feature_intClampInsts, + &feature_noDataDepHazard, + &feature_fmaMixInsts, + &feature_sdwaOmod, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1157,41 +1008,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_registerBanking, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_mimgR128, + &feature_addNoCarryInsts, + &feature_dpp8, + &feature_gfx9Insts, &feature_ciInsts, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_registerBanking, &feature_apertureRegs, - &feature_intClampInsts, + &feature_flatGlobalInsts, + &feature_fp64, + &feature_vscnt, &feature_flatScratchInsts, + &feature_dpp, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_pkFmacF16Inst, - &feature_vscnt, + &feature_sdwaSdst, &feature_movrel, - &feature_fmaMixInsts, + &feature_localmemorysize65536, + &feature_noSdstCmpx, + &feature_pkFmacF16Inst, &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaOmod, &feature_vop3Literal, - &feature_dpp8, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_mimgR128, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_noDataDepHazard, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_noSdstCmpx, - &feature_gfx10, + &feature_gfx10Insts, + &feature_sdwa, + &feature_intClampInsts, + &feature_noDataDepHazard, + &feature_fmaMixInsts, + &feature_sdwaOmod, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1221,41 +1071,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_registerBanking, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_mimgR128, + &feature_addNoCarryInsts, + &feature_dpp8, + &feature_gfx9Insts, &feature_ciInsts, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_registerBanking, &feature_apertureRegs, - &feature_intClampInsts, + &feature_flatGlobalInsts, + &feature_fp64, + &feature_vscnt, &feature_flatScratchInsts, + &feature_dpp, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_pkFmacF16Inst, - &feature_vscnt, + &feature_sdwaSdst, &feature_movrel, - &feature_fmaMixInsts, + &feature_localmemorysize65536, + &feature_noSdstCmpx, + &feature_pkFmacF16Inst, &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaOmod, &feature_vop3Literal, - &feature_dpp8, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_mimgR128, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_noDataDepHazard, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_noSdstCmpx, - &feature_gfx10, + &feature_gfx10Insts, + &feature_sdwa, + &feature_intClampInsts, + &feature_noDataDepHazard, + &feature_fmaMixInsts, + &feature_sdwaOmod, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1282,14 +1131,13 @@ pub const cpu_gfx600 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, &feature_halfRate64Ops, }, }; @@ -1301,14 +1149,13 @@ pub const cpu_gfx601 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, }, }; @@ -1319,17 +1166,16 @@ pub const cpu_gfx700 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1341,17 +1187,16 @@ pub const cpu_gfx701 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, &feature_halfRate64Ops, }, }; @@ -1364,17 +1209,16 @@ pub const cpu_gfx702 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount16, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1385,17 +1229,16 @@ pub const cpu_gfx703 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1406,17 +1249,16 @@ pub const cpu_gfx704 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1428,29 +1270,28 @@ pub const cpu_gfx801 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, &feature_xnack, &feature_halfRate64Ops, }, @@ -1465,29 +1306,28 @@ pub const cpu_gfx802 = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -1499,29 +1339,28 @@ pub const cpu_gfx803 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -1531,29 +1370,28 @@ pub const cpu_gfx810 = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, &feature_xnack, }, }; @@ -1565,37 +1403,36 @@ pub const cpu_gfx900 = Cpu{ &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, &feature_madMixInsts, }, @@ -1607,37 +1444,36 @@ pub const cpu_gfx902 = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1652,37 +1488,36 @@ pub const cpu_gfx904 = Cpu{ &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, }, }; @@ -1697,37 +1532,36 @@ pub const cpu_gfx906 = Cpu{ &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, &feature_halfRate64Ops, }, @@ -1747,37 +1581,36 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, &feature_maiInsts, &feature_mfmaInlineLiteralBug, @@ -1792,37 +1625,36 @@ pub const cpu_gfx909 = Cpu{ .llvm_name = "gfx909", .subfeatures = &[_]*const Feature { &feature_codeObjectV3, - &feature_fp64, - &feature_vop3p, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, - &feature_sdwaSdst, + &feature_r128A16, + &feature_addNoCarryInsts, + &feature_inv2piInlineImm, + &feature_gfx9Insts, &feature_ciInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_fastFmaf, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_apertureRegs, + &feature_scalarAtomics, + &feature_flatGlobalInsts, + &feature_fp64, &feature_flatScratchInsts, + &feature_dpp, + &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, - &feature_scalarAtomics, + &feature_sMemrealtime, + &feature_vop3p, + &feature_flatInstOffsets, &feature_sdwaScalar, - &feature_fastFmaf, - &feature_vgprIndexMode, - &feature_scalarFlatScratchInsts, - &feature_sdwa, - &feature_sdwaOmod, + &feature_sdwaSdst, &feature_localmemorysize65536, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, - &feature_inv2piInlineImm, - &feature_gfx9Insts, - &feature_flatGlobalInsts, &feature_BitInsts16, - &feature_r128A16, - &feature_gfx9, + &feature_sdwa, + &feature_wavefrontsize64, + &feature_intClampInsts, + &feature_sdwaOmod, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1836,14 +1668,13 @@ pub const cpu_hainan = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, }, }; @@ -1855,17 +1686,16 @@ pub const cpu_hawaii = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, &feature_halfRate64Ops, }, }; @@ -1879,29 +1709,28 @@ pub const cpu_iceland = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -1912,17 +1741,16 @@ pub const cpu_kabini = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1933,17 +1761,16 @@ pub const cpu_kaveri = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1954,17 +1781,16 @@ pub const cpu_mullins = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_trigReducedRange, &feature_noSramEccSupport, + &feature_flatAddressSpace, + &feature_mimgR128, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_ciInsts, + &feature_wavefrontsize64, &feature_fp64, &feature_movrel, - &feature_ciInsts, &feature_localmemorysize65536, - &feature_mimgR128, - &feature_wavefrontsize64, - &feature_flatAddressSpace, - &feature_gfx7Gfx8Gfx9Insts, - &feature_seaIslands, }, }; @@ -1975,14 +1801,13 @@ pub const cpu_oland = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, }, }; @@ -1993,14 +1818,13 @@ pub const cpu_pitcairn = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, }, }; @@ -2012,29 +1836,28 @@ pub const cpu_polaris10 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -2046,29 +1869,28 @@ pub const cpu_polaris11 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -2078,29 +1900,28 @@ pub const cpu_stoney = Cpu{ .subfeatures = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, &feature_xnack, }, }; @@ -2113,14 +1934,13 @@ pub const cpu_tahiti = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, &feature_halfRate64Ops, }, }; @@ -2134,29 +1954,28 @@ pub const cpu_tonga = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, - &feature_sMemrealtime, - &feature_gfx8Insts, - &feature_dpp, + &feature_mimgR128, + &feature_inv2piInlineImm, &feature_ciInsts, + &feature_vgprIndexMode, &feature_scalarStores, - &feature_intClampInsts, &feature_gcn3Encoding, + &feature_fp64, + &feature_dpp, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_wavefrontsize64, + &feature_sMemrealtime, &feature_movrel, - &feature_vgprIndexMode, - &feature_trigReducedRange, - &feature_noSramEccSupport, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOutModsVopc, &feature_localmemorysize65536, - &feature_mimgR128, + &feature_noSramEccSupport, + &feature_gfx8Insts, &feature_flatAddressSpace, - &feature_inv2piInlineImm, &feature_BitInsts16, - &feature_volcanicIslands, + &feature_sdwaMav, + &feature_sdwa, + &feature_sdwaOutModsVopc, + &feature_wavefrontsize64, + &feature_intClampInsts, }, }; @@ -2167,14 +1986,13 @@ pub const cpu_verde = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_trigReducedRange, &feature_noSramEccSupport, - &feature_fp64, - &feature_movrel, &feature_mimgR128, + &feature_trigReducedRange, &feature_wavefrontsize64, - &feature_southernIslands, + &feature_localmemorysize32768, + &feature_fp64, + &feature_movrel, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index c28ece032f875a4e330d7b35becc897016a575c4..73f2d3ead9eaa1ff6a03a9d9366e27bf92da5f77 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -1,481 +1,6 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; -pub const feature_armv2 = Feature{ - .name = "armv2", - .description = "ARMv2 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_armv2a = Feature{ - .name = "armv2a", - .description = "ARMv2a architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_armv3 = Feature{ - .name = "armv3", - .description = "ARMv3 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_armv3m = Feature{ - .name = "armv3m", - .description = "ARMv3m architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_armv4 = Feature{ - .name = "armv4", - .description = "ARMv4 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_armv4t = Feature{ - .name = "armv4t", - .description = "ARMv4t architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_armv5t = Feature{ - .name = "armv5t", - .description = "ARMv5t architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_armv5te = Feature{ - .name = "armv5te", - .description = "ARMv5te architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_armv5tej = Feature{ - .name = "armv5tej", - .description = "ARMv5tej architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_armv6 = Feature{ - .name = "armv6", - .description = "ARMv6 architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_dsp, - }, -}; - -pub const feature_armv6j = Feature{ - .name = "armv6j", - .description = "ARMv7a architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_dsp, - }, -}; - -pub const feature_armv6k = Feature{ - .name = "armv6k", - .description = "ARMv6k architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_armv6kz = Feature{ - .name = "armv6kz", - .description = "ARMv6kz architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_trustzone, - }, -}; - -pub const feature_armv6M = Feature{ - .name = "armv6-m", - .description = "ARMv6m architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_thumbMode, - &feature_strictAlign, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv6sM = Feature{ - .name = "armv6s-m", - .description = "ARMv6sm architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_thumbMode, - &feature_strictAlign, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv6t2 = Feature{ - .name = "armv6t2", - .description = "ARMv6t2 architecture", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_dsp, - &feature_v4t, - }, -}; - -pub const feature_armv7A = Feature{ - .name = "armv7-a", - .description = "ARMv7a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_armv7eM = Feature{ - .name = "armv7e-m", - .description = "ARMv7em architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_hwdiv, - &feature_dsp, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv7k = Feature{ - .name = "armv7k", - .description = "ARMv7a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_armv7M = Feature{ - .name = "armv7-m", - .description = "ARMv7m architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv7R = Feature{ - .name = "armv7-r", - .description = "ARMv7r architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdiv, - &feature_rclass, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_armv7s = Feature{ - .name = "armv7s", - .description = "ARMv7a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_armv7ve = Feature{ - .name = "armv7ve", - .description = "ARMv7ve architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_mp, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_armv8A = Feature{ - .name = "armv8-a", - .description = "ARMv8a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, - &feature_d32, - }, -}; - -pub const feature_armv8Mbase = Feature{ - .name = "armv8-m.base", - .description = "ARMv8mBaseline architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_hwdiv, - &feature_thumbMode, - &feature_strictAlign, - &feature_v7clrex, - &feature_msecext8, - &feature_acquireRelease, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv8Mmain = Feature{ - .name = "armv8-m.main", - .description = "ARMv8mMainline architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, - &feature_msecext8, - &feature_acquireRelease, - &feature_perfmon, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv8R = Feature{ - .name = "armv8-r", - .description = "ARMv8r architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_rclass, - &feature_fpregs, - &feature_v4t, - &feature_dfb, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_d32, - }, -}; - -pub const feature_armv81A = Feature{ - .name = "armv8.1-a", - .description = "ARMv81a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, - &feature_d32, - }, -}; - -pub const feature_armv81Mmain = Feature{ - .name = "armv8.1-m.main", - .description = "ARMv81mMainline architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, - &feature_hwdiv, - &feature_lob, - &feature_thumbMode, - &feature_thumb2, - &feature_ras, - &feature_v7clrex, - &feature_msecext8, - &feature_acquireRelease, - &feature_perfmon, - &feature_noarm, - &feature_v4t, - }, -}; - -pub const feature_armv82A = Feature{ - .name = "armv8.2-a", - .description = "ARMv82a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_ras, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, - &feature_d32, - }, -}; - -pub const feature_armv83A = Feature{ - .name = "armv8.3-a", - .description = "ARMv83a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_ras, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, - &feature_d32, - }, -}; - -pub const feature_armv84A = Feature{ - .name = "armv8.4-a", - .description = "ARMv84a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_ras, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, - &feature_d32, - }, -}; - -pub const feature_armv85A = Feature{ - .name = "armv8.5-a", - .description = "ARMv85a architecture", - .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, - &feature_hwdiv, - &feature_trustzone, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_ras, - &feature_sb, - &feature_aclass, - &feature_crc, - &feature_mp, - &feature_v7clrex, - &feature_fp16, - &feature_acquireRelease, - &feature_d32, - &feature_perfmon, - }, -}; - pub const feature_msecext8 = Feature{ .name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", @@ -643,9 +168,9 @@ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", .description = "Enable ARMv8 FP", .subfeatures = &[_]*const Feature { + &feature_fp16, &feature_fpregs, &feature_d32, - &feature_fp16, }, }; @@ -653,8 +178,8 @@ pub const feature_fpArmv8d16 = Feature{ .name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", .subfeatures = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -672,8 +197,8 @@ pub const feature_fpArmv8sp = Feature{ .description = "Enable ARMv8 FP with no double precision", .subfeatures = &[_]*const Feature { &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -1119,8 +644,8 @@ pub const feature_vfp4 = Feature{ .description = "Enable VFP4 instructions", .subfeatures = &[_]*const Feature { &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -1147,8 +672,8 @@ pub const feature_vfp4sp = Feature{ .description = "Enable VFP4 instructions with no double precision", .subfeatures = &[_]*const Feature { &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -1163,8 +688,8 @@ pub const feature_virtualization = Feature{ .name = "virtualization", .description = "Supports Virtualization extension", .subfeatures = &[_]*const Feature { - &feature_hwdivArm, &feature_hwdiv, + &feature_hwdivArm, }, }; @@ -1175,472 +700,7 @@ pub const feature_zcz = Feature{ }, }; -pub const feature_mvefp = Feature{ - .name = "mve.fp", - .description = "Support M-Class Vector Extension with integer and floating ops", - .subfeatures = &[_]*const Feature { - &feature_dsp, - &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_fp16, - }, -}; - -pub const feature_mve = Feature{ - .name = "mve", - .description = "Support M-Class Vector Extension with integer ops", - .subfeatures = &[_]*const Feature { - &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_v4t = Feature{ - .name = "v4t", - .description = "Support ARM v4T instructions", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v5te = Feature{ - .name = "v5te", - .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v5t = Feature{ - .name = "v5t", - .description = "Support ARM v5T instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v6k = Feature{ - .name = "v6k", - .description = "Support ARM v6k instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v6m = Feature{ - .name = "v6m", - .description = "Support ARM v6M instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v6 = Feature{ - .name = "v6", - .description = "Support ARM v6 instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v6t2 = Feature{ - .name = "v6t2", - .description = "Support ARM v6t2 instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v4t, - }, -}; - -pub const feature_v7 = Feature{ - .name = "v7", - .description = "Support ARM v7 instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_v4t, - &feature_perfmon, - }, -}; - -pub const feature_v8m = Feature{ - .name = "v8m", - .description = "Support ARM v8M Baseline instructions", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_v8mmain = Feature{ - .name = "v8m.main", - .description = "Support ARM v8M Mainline instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_v4t, - &feature_perfmon, - }, -}; - -pub const feature_v8 = Feature{ - .name = "v8", - .description = "Support ARM v8 instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_v81mmain = Feature{ - .name = "v8.1m.main", - .description = "Support ARM v8-1M Mainline instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_v4t, - &feature_perfmon, - }, -}; - -pub const feature_v81a = Feature{ - .name = "v8.1a", - .description = "Support ARM v8.1a instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_v82a = Feature{ - .name = "v8.2a", - .description = "Support ARM v8.2a instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_v83a = Feature{ - .name = "v8.3a", - .description = "Support ARM v8.3a instructions", - .subfeatures = &[_]*const Feature { - &feature_thumb2, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - }, -}; - -pub const feature_v84a = Feature{ - .name = "v8.4a", - .description = "Support ARM v8.4a instructions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_v85a = Feature{ - .name = "v8.5a", - .description = "Support ARM v8.5a instructions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_thumb2, - &feature_sb, - &feature_v7clrex, - &feature_acquireRelease, - &feature_perfmon, - &feature_v4t, - &feature_d32, - }, -}; - -pub const feature_iwmmxt = Feature{ - .name = "iwmmxt", - .description = "ARMv5te architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_iwmmxt2 = Feature{ - .name = "iwmmxt2", - .description = "ARMv5te architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - -pub const feature_softFloat = Feature{ - .name = "soft-float", - .description = "Use software floating point features.", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_thumbMode = Feature{ - .name = "thumb-mode", - .description = "Thumb mode", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a5 = Feature{ - .name = "a5", - .description = "Cortex-A5 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a7 = Feature{ - .name = "a7", - .description = "Cortex-A7 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a8 = Feature{ - .name = "a8", - .description = "Cortex-A8 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a9 = Feature{ - .name = "a9", - .description = "Cortex-A9 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a12 = Feature{ - .name = "a12", - .description = "Cortex-A12 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a15 = Feature{ - .name = "a15", - .description = "Cortex-A15 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a17 = Feature{ - .name = "a17", - .description = "Cortex-A17 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a32 = Feature{ - .name = "a32", - .description = "Cortex-A32 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a35 = Feature{ - .name = "a35", - .description = "Cortex-A35 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a53 = Feature{ - .name = "a53", - .description = "Cortex-A53 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a55 = Feature{ - .name = "a55", - .description = "Cortex-A55 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a57 = Feature{ - .name = "a57", - .description = "Cortex-A57 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a72 = Feature{ - .name = "a72", - .description = "Cortex-A72 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a73 = Feature{ - .name = "a73", - .description = "Cortex-A73 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a75 = Feature{ - .name = "a75", - .description = "Cortex-A75 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_a76 = Feature{ - .name = "a76", - .description = "Cortex-A76 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_exynos = Feature{ - .name = "exynos", - .description = "Samsung Exynos processors", - .subfeatures = &[_]*const Feature { - &feature_useAa, - &feature_hwdivArm, - &feature_zcz, - &feature_hwdiv, - &feature_expandFpMlx, - &feature_slowVdup32, - &feature_fpregs, - &feature_slowVgetlni32, - &feature_profUnpr, - &feature_wideStrideVfp, - &feature_retAddrStack, - &feature_fuseAes, - &feature_fuseLiterals, - &feature_crc, - &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_d32, - }, -}; - -pub const feature_krait = Feature{ - .name = "krait", - .description = "Qualcomm Krait processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_kryo = Feature{ - .name = "kryo", - .description = "Qualcomm Kryo processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_m3 = Feature{ - .name = "m3", - .description = "Cortex-M3 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_r4 = Feature{ - .name = "r4", - .description = "Cortex-R4 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_r5 = Feature{ - .name = "r5", - .description = "Cortex-R5 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_r7 = Feature{ - .name = "r7", - .description = "Cortex-R7 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_r52 = Feature{ - .name = "r52", - .description = "Cortex-R52 ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_swift = Feature{ - .name = "swift", - .description = "Swift ARM processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_xscale = Feature{ - .name = "xscale", - .description = "ARMv5te architecture", - .subfeatures = &[_]*const Feature { - &feature_v4t, - }, -}; - pub const features = &[_]*const Feature { - &feature_armv2, - &feature_armv2a, - &feature_armv3, - &feature_armv3m, - &feature_armv4, - &feature_armv4t, - &feature_armv5t, - &feature_armv5te, - &feature_armv5tej, - &feature_armv6, - &feature_armv6j, - &feature_armv6k, - &feature_armv6kz, - &feature_armv6M, - &feature_armv6sM, - &feature_armv6t2, - &feature_armv7A, - &feature_armv7eM, - &feature_armv7k, - &feature_armv7M, - &feature_armv7R, - &feature_armv7s, - &feature_armv7ve, - &feature_armv8A, - &feature_armv8Mbase, - &feature_armv8Mmain, - &feature_armv8R, - &feature_armv81A, - &feature_armv81Mmain, - &feature_armv82A, - &feature_armv83A, - &feature_armv84A, - &feature_armv85A, &feature_msecext8, &feature_aclass, &feature_aes, @@ -1734,63 +794,12 @@ pub const features = &[_]*const Feature { &feature_vmlxForwarding, &feature_virtualization, &feature_zcz, - &feature_mvefp, - &feature_mve, - &feature_v4t, - &feature_v5te, - &feature_v5t, - &feature_v6k, - &feature_v6m, - &feature_v6, - &feature_v6t2, - &feature_v7, - &feature_v8m, - &feature_v8mmain, - &feature_v8, - &feature_v81mmain, - &feature_v81a, - &feature_v82a, - &feature_v83a, - &feature_v84a, - &feature_v85a, - &feature_iwmmxt, - &feature_iwmmxt2, - &feature_softFloat, - &feature_thumbMode, - &feature_a5, - &feature_a7, - &feature_a8, - &feature_a9, - &feature_a12, - &feature_a15, - &feature_a17, - &feature_a32, - &feature_a35, - &feature_a53, - &feature_a55, - &feature_a57, - &feature_a72, - &feature_a73, - &feature_a75, - &feature_a76, - &feature_exynos, - &feature_krait, - &feature_kryo, - &feature_m3, - &feature_r4, - &feature_r5, - &feature_r7, - &feature_r52, - &feature_swift, - &feature_xscale, }; pub const cpu_arm1020e = Cpu{ .name = "arm1020e", .llvm_name = "arm1020e", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -1798,8 +807,6 @@ pub const cpu_arm1020t = Cpu{ .name = "arm1020t", .llvm_name = "arm1020t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5t, }, }; @@ -1807,8 +814,6 @@ pub const cpu_arm1022e = Cpu{ .name = "arm1022e", .llvm_name = "arm1022e", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -1816,8 +821,6 @@ pub const cpu_arm10e = Cpu{ .name = "arm10e", .llvm_name = "arm10e", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -1825,8 +828,6 @@ pub const cpu_arm10tdmi = Cpu{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5t, }, }; @@ -1834,9 +835,7 @@ pub const cpu_arm1136jS = Cpu{ .name = "arm1136j-s", .llvm_name = "arm1136j-s", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_dsp, - &feature_armv6, }, }; @@ -1844,9 +843,7 @@ pub const cpu_arm1136jfS = Cpu{ .name = "arm1136jf-s", .llvm_name = "arm1136jf-s", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_dsp, - &feature_armv6, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -1857,10 +854,8 @@ pub const cpu_arm1156t2S = Cpu{ .name = "arm1156t2-s", .llvm_name = "arm1156t2-s", .subfeatures = &[_]*const Feature { - &feature_thumb2, &feature_dsp, - &feature_v4t, - &feature_armv6t2, + &feature_thumb2, }, }; @@ -1868,10 +863,8 @@ pub const cpu_arm1156t2fS = Cpu{ .name = "arm1156t2f-s", .llvm_name = "arm1156t2f-s", .subfeatures = &[_]*const Feature { - &feature_thumb2, &feature_dsp, - &feature_v4t, - &feature_armv6t2, + &feature_thumb2, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -1882,9 +875,7 @@ pub const cpu_arm1176jS = Cpu{ .name = "arm1176j-s", .llvm_name = "arm1176j-s", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_trustzone, - &feature_armv6kz, }, }; @@ -1892,9 +883,7 @@ pub const cpu_arm1176jzS = Cpu{ .name = "arm1176jz-s", .llvm_name = "arm1176jz-s", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_trustzone, - &feature_armv6kz, }, }; @@ -1902,9 +891,7 @@ pub const cpu_arm1176jzfS = Cpu{ .name = "arm1176jzf-s", .llvm_name = "arm1176jzf-s", .subfeatures = &[_]*const Feature { - &feature_v4t, &feature_trustzone, - &feature_armv6kz, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -1915,8 +902,6 @@ pub const cpu_arm710t = Cpu{ .name = "arm710t", .llvm_name = "arm710t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1924,8 +909,6 @@ pub const cpu_arm720t = Cpu{ .name = "arm720t", .llvm_name = "arm720t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1933,8 +916,6 @@ pub const cpu_arm7tdmi = Cpu{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1942,8 +923,6 @@ pub const cpu_arm7tdmiS = Cpu{ .name = "arm7tdmi-s", .llvm_name = "arm7tdmi-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1951,7 +930,6 @@ pub const cpu_arm8 = Cpu{ .name = "arm8", .llvm_name = "arm8", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -1959,7 +937,6 @@ pub const cpu_arm810 = Cpu{ .name = "arm810", .llvm_name = "arm810", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -1967,8 +944,6 @@ pub const cpu_arm9 = Cpu{ .name = "arm9", .llvm_name = "arm9", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1976,8 +951,6 @@ pub const cpu_arm920 = Cpu{ .name = "arm920", .llvm_name = "arm920", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1985,8 +958,6 @@ pub const cpu_arm920t = Cpu{ .name = "arm920t", .llvm_name = "arm920t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -1994,8 +965,6 @@ pub const cpu_arm922t = Cpu{ .name = "arm922t", .llvm_name = "arm922t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -2003,8 +972,6 @@ pub const cpu_arm926ejS = Cpu{ .name = "arm926ej-s", .llvm_name = "arm926ej-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -2012,8 +979,6 @@ pub const cpu_arm940t = Cpu{ .name = "arm940t", .llvm_name = "arm940t", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -2021,8 +986,6 @@ pub const cpu_arm946eS = Cpu{ .name = "arm946e-s", .llvm_name = "arm946e-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -2030,8 +993,6 @@ pub const cpu_arm966eS = Cpu{ .name = "arm966e-s", .llvm_name = "arm966e-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -2039,8 +1000,6 @@ pub const cpu_arm968eS = Cpu{ .name = "arm968e-s", .llvm_name = "arm968e-s", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -2048,8 +1007,6 @@ pub const cpu_arm9e = Cpu{ .name = "arm9e", .llvm_name = "arm9e", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -2057,8 +1014,6 @@ pub const cpu_arm9tdmi = Cpu{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -2066,16 +1021,14 @@ pub const cpu_cortexA12 = Cpu{ .name = "cortex-a12", .llvm_name = "cortex-a12", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -2083,10 +1036,9 @@ pub const cpu_cortexA12 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdivArm, &feature_hwdiv, + &feature_hwdivArm, &feature_virtualization, - &feature_a12, }, }; @@ -2094,16 +1046,14 @@ pub const cpu_cortexA15 = Cpu{ .name = "cortex-a15", .llvm_name = "cortex-a15", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_dontWidenVmovs, @@ -2114,10 +1064,9 @@ pub const cpu_cortexA15 = Cpu{ &feature_trustzone, &feature_fp16, &feature_vfp4, - &feature_hwdivArm, &feature_hwdiv, + &feature_hwdivArm, &feature_virtualization, - &feature_a15, }, }; @@ -2125,16 +1074,14 @@ pub const cpu_cortexA17 = Cpu{ .name = "cortex-a17", .llvm_name = "cortex-a17", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -2142,10 +1089,9 @@ pub const cpu_cortexA17 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdivArm, &feature_hwdiv, + &feature_hwdivArm, &feature_virtualization, - &feature_a17, }, }; @@ -2153,23 +1099,21 @@ pub const cpu_cortexA32 = Cpu{ .name = "cortex-a32", .llvm_name = "cortex-a32", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, }, }; @@ -2178,25 +1122,22 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, - &feature_a35, }, }; @@ -2204,16 +1145,14 @@ pub const cpu_cortexA5 = Cpu{ .name = "cortex-a5", .llvm_name = "cortex-a5", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_mp, @@ -2222,7 +1161,6 @@ pub const cpu_cortexA5 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_a5, }, }; @@ -2230,26 +1168,23 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, &feature_fpao, - &feature_a53, }, }; @@ -2257,26 +1192,23 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_dotprod, - &feature_a55, }, }; @@ -2284,28 +1216,25 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, &feature_crypto, &feature_fpao, - &feature_a57, }, }; @@ -2313,16 +1242,14 @@ pub const cpu_cortexA7 = Cpu{ .name = "cortex-a7", .llvm_name = "cortex-a7", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -2332,10 +1259,9 @@ pub const cpu_cortexA7 = Cpu{ &feature_fp16, &feature_vfp4, &feature_vmlxForwarding, - &feature_hwdivArm, &feature_hwdiv, + &feature_hwdivArm, &feature_virtualization, - &feature_a7, }, }; @@ -2343,25 +1269,22 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, - &feature_a72, }, }; @@ -2369,25 +1292,22 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, - &feature_a73, }, }; @@ -2395,26 +1315,23 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_dotprod, - &feature_a75, }, }; @@ -2422,28 +1339,25 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, &feature_dotprod, &feature_fullfp16, - &feature_a76, }, }; @@ -2451,28 +1365,25 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, &feature_dotprod, &feature_fullfp16, - &feature_a76, }, }; @@ -2480,16 +1391,14 @@ pub const cpu_cortexA8 = Cpu{ .name = "cortex-a8", .llvm_name = "cortex-a8", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -2497,7 +1406,6 @@ pub const cpu_cortexA8 = Cpu{ &feature_slowFpBrcc, &feature_trustzone, &feature_vmlxForwarding, - &feature_a8, }, }; @@ -2505,16 +1413,14 @@ pub const cpu_cortexA9 = Cpu{ .name = "cortex-a9", .llvm_name = "cortex-a9", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_expandFpMlx, @@ -2527,7 +1433,6 @@ pub const cpu_cortexA9 = Cpu{ &feature_preferVmovsr, &feature_trustzone, &feature_vmlxForwarding, - &feature_a9, }, }; @@ -2536,12 +1441,9 @@ pub const cpu_cortexM0 = Cpu{ .llvm_name = "cortex-m0", .subfeatures = &[_]*const Feature { &feature_db, - &feature_mclass, - &feature_thumbMode, &feature_strictAlign, &feature_noarm, - &feature_v4t, - &feature_armv6M, + &feature_mclass, }, }; @@ -2550,12 +1452,9 @@ pub const cpu_cortexM0plus = Cpu{ .llvm_name = "cortex-m0plus", .subfeatures = &[_]*const Feature { &feature_db, - &feature_mclass, - &feature_thumbMode, &feature_strictAlign, &feature_noarm, - &feature_v4t, - &feature_armv6M, + &feature_mclass, }, }; @@ -2564,12 +1463,9 @@ pub const cpu_cortexM1 = Cpu{ .llvm_name = "cortex-m1", .subfeatures = &[_]*const Feature { &feature_db, - &feature_mclass, - &feature_thumbMode, &feature_strictAlign, &feature_noarm, - &feature_v4t, - &feature_armv6M, + &feature_mclass, }, }; @@ -2577,17 +1473,14 @@ pub const cpu_cortexM23 = Cpu{ .name = "cortex-m23", .llvm_name = "cortex-m23", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_thumbMode, - &feature_strictAlign, - &feature_v7clrex, &feature_msecext8, + &feature_db, + &feature_strictAlign, &feature_acquireRelease, &feature_noarm, - &feature_v4t, - &feature_armv8Mbase, + &feature_v7clrex, + &feature_mclass, &feature_noMovt, }, }; @@ -2596,21 +1489,17 @@ pub const cpu_cortexM3 = Cpu{ .name = "cortex-m3", .llvm_name = "cortex-m3", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv7M, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_noBranchPredictor, &feature_loopAlign, &feature_useAa, &feature_useMisched, - &feature_m3, }, }; @@ -2618,18 +1507,15 @@ pub const cpu_cortexM33 = Cpu{ .name = "cortex-m33", .llvm_name = "cortex-m33", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, &feature_msecext8, + &feature_db, &feature_acquireRelease, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv8Mmain, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -2646,18 +1532,15 @@ pub const cpu_cortexM35p = Cpu{ .name = "cortex-m35p", .llvm_name = "cortex-m35p", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, &feature_msecext8, + &feature_db, &feature_acquireRelease, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv8Mmain, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -2674,17 +1557,14 @@ pub const cpu_cortexM4 = Cpu{ .name = "cortex-m4", .llvm_name = "cortex-m4", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_dsp, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv7eM, + &feature_dsp, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_noBranchPredictor, &feature_slowfpvmlx, &feature_loopAlign, @@ -2700,19 +1580,16 @@ pub const cpu_cortexM7 = Cpu{ .name = "cortex-m7", .llvm_name = "cortex-m7", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_dsp, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv7eM, - &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_fp16, + &feature_fpregs, &feature_fpArmv8d16, }, }; @@ -2721,18 +1598,15 @@ pub const cpu_cortexR4 = Cpu{ .name = "cortex-r4", .llvm_name = "cortex-r4", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, &feature_hwdiv, &feature_rclass, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, - &feature_v4t, - &feature_armv7R, + &feature_dsp, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, - &feature_r4, }, }; @@ -2740,22 +1614,19 @@ pub const cpu_cortexR4f = Cpu{ .name = "cortex-r4f", .llvm_name = "cortex-r4f", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, &feature_hwdiv, &feature_rclass, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, - &feature_v4t, - &feature_armv7R, + &feature_dsp, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_slowfpvmlx, &feature_slowFpBrcc, &feature_fpregs, &feature_vfp3d16, - &feature_r4, }, }; @@ -2763,15 +1634,13 @@ pub const cpu_cortexR5 = Cpu{ .name = "cortex-r5", .llvm_name = "cortex-r5", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, &feature_hwdiv, &feature_rclass, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, - &feature_v4t, - &feature_armv7R, + &feature_dsp, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_hwdivArm, &feature_retAddrStack, @@ -2779,7 +1648,6 @@ pub const cpu_cortexR5 = Cpu{ &feature_slowFpBrcc, &feature_fpregs, &feature_vfp3d16, - &feature_r5, }, }; @@ -2787,27 +1655,24 @@ pub const cpu_cortexR52 = Cpu{ .name = "cortex-r52", .llvm_name = "cortex-r52", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_rclass, &feature_fpregs, - &feature_v4t, - &feature_dfb, - &feature_thumb2, - &feature_v7clrex, + &feature_db, + &feature_acquireRelease, + &feature_d32, &feature_perfmon, - &feature_crc, &feature_mp, - &feature_acquireRelease, + &feature_dfb, + &feature_hwdivArm, + &feature_dsp, &feature_fp16, - &feature_d32, - &feature_armv8R, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_fpao, &feature_useAa, &feature_useMisched, - &feature_r52, }, }; @@ -2815,15 +1680,13 @@ pub const cpu_cortexR7 = Cpu{ .name = "cortex-r7", .llvm_name = "cortex-r7", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, &feature_hwdiv, &feature_rclass, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, - &feature_v4t, - &feature_armv7R, + &feature_dsp, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -2833,7 +1696,6 @@ pub const cpu_cortexR7 = Cpu{ &feature_slowFpBrcc, &feature_fpregs, &feature_vfp3d16, - &feature_r7, }, }; @@ -2841,15 +1703,13 @@ pub const cpu_cortexR8 = Cpu{ .name = "cortex-r8", .llvm_name = "cortex-r8", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, &feature_hwdiv, &feature_rclass, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, - &feature_v4t, - &feature_armv7R, + &feature_dsp, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -2866,23 +1726,21 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_crypto, @@ -2893,7 +1751,6 @@ pub const cpu_cyclone = Cpu{ &feature_useMisched, &feature_vfp4, &feature_zcz, - &feature_swift, }, }; @@ -2901,8 +1758,6 @@ pub const cpu_ep9312 = Cpu{ .name = "ep9312", .llvm_name = "ep9312", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv4t, }, }; @@ -2910,37 +1765,34 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, - &feature_useAa, - &feature_zcz, - &feature_expandFpMlx, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_slowVdup32, + &feature_expandFpMlx, &feature_slowVgetlni32, - &feature_profUnpr, + &feature_fuseLiterals, &feature_wideStrideVfp, + &feature_slowFpBrcc, &feature_retAddrStack, + &feature_dontWidenVmovs, + &feature_zcz, &feature_fuseAes, - &feature_fuseLiterals, &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_exynos, + &feature_profUnpr, + &feature_useAa, }, }; @@ -2948,37 +1800,34 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, - &feature_useAa, - &feature_zcz, - &feature_expandFpMlx, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_slowVdup32, + &feature_expandFpMlx, &feature_slowVgetlni32, - &feature_profUnpr, + &feature_fuseLiterals, &feature_wideStrideVfp, + &feature_slowFpBrcc, &feature_retAddrStack, + &feature_dontWidenVmovs, + &feature_zcz, &feature_fuseAes, - &feature_fuseLiterals, &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_exynos, + &feature_profUnpr, + &feature_useAa, }, }; @@ -2986,37 +1835,34 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, - &feature_useAa, - &feature_zcz, - &feature_expandFpMlx, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_slowVdup32, + &feature_expandFpMlx, &feature_slowVgetlni32, - &feature_profUnpr, + &feature_fuseLiterals, &feature_wideStrideVfp, + &feature_slowFpBrcc, &feature_retAddrStack, + &feature_dontWidenVmovs, + &feature_zcz, &feature_fuseAes, - &feature_fuseLiterals, &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_exynos, + &feature_profUnpr, + &feature_useAa, }, }; @@ -3024,40 +1870,37 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_dotprod, &feature_fullfp16, - &feature_useAa, - &feature_zcz, - &feature_expandFpMlx, &feature_slowVdup32, + &feature_expandFpMlx, &feature_slowVgetlni32, - &feature_profUnpr, + &feature_fuseLiterals, &feature_wideStrideVfp, + &feature_slowFpBrcc, &feature_retAddrStack, + &feature_dontWidenVmovs, + &feature_zcz, &feature_fuseAes, - &feature_fuseLiterals, &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_exynos, + &feature_profUnpr, + &feature_useAa, }, }; @@ -3065,40 +1908,37 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_dotprod, &feature_fullfp16, - &feature_useAa, - &feature_zcz, - &feature_expandFpMlx, &feature_slowVdup32, + &feature_expandFpMlx, &feature_slowVgetlni32, - &feature_profUnpr, + &feature_fuseLiterals, &feature_wideStrideVfp, + &feature_slowFpBrcc, &feature_retAddrStack, + &feature_dontWidenVmovs, + &feature_zcz, &feature_fuseAes, - &feature_fuseLiterals, &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_dontWidenVmovs, - &feature_exynos, + &feature_profUnpr, + &feature_useAa, }, }; @@ -3113,8 +1953,6 @@ pub const cpu_iwmmxt = Cpu{ .name = "iwmmxt", .llvm_name = "iwmmxt", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; @@ -3122,16 +1960,14 @@ pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_fp16, @@ -3141,7 +1977,6 @@ pub const cpu_krait = Cpu{ &feature_muxedUnits, &feature_vfp4, &feature_vmlxForwarding, - &feature_krait, }, }; @@ -3149,25 +1984,22 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, - &feature_v7clrex, - &feature_aclass, - &feature_crc, - &feature_mp, + &feature_db, &feature_acquireRelease, - &feature_fp16, - &feature_perfmon, &feature_d32, - &feature_armv8A, + &feature_perfmon, + &feature_mp, + &feature_hwdivArm, + &feature_dsp, + &feature_aclass, + &feature_fp16, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, - &feature_kryo, }, }; @@ -3175,8 +2007,6 @@ pub const cpu_mpcore = Cpu{ .name = "mpcore", .llvm_name = "mpcore", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv6k, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -3187,8 +2017,6 @@ pub const cpu_mpcorenovfp = Cpu{ .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv6k, }, }; @@ -3196,24 +2024,22 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_dsp, - &feature_hwdivArm, &feature_hwdiv, &feature_trustzone, &feature_fpregs, - &feature_v4t, - &feature_thumb2, + &feature_db, + &feature_acquireRelease, + &feature_d32, + &feature_perfmon, + &feature_mp, &feature_ras, - &feature_v7clrex, + &feature_hwdivArm, + &feature_dsp, &feature_aclass, - &feature_crc, - &feature_mp, - &feature_acquireRelease, &feature_fp16, - &feature_perfmon, - &feature_d32, - &feature_armv82A, + &feature_v7clrex, + &feature_crc, + &feature_thumb2, &feature_crypto, &feature_dotprod, }, @@ -3224,12 +2050,9 @@ pub const cpu_sc000 = Cpu{ .llvm_name = "sc000", .subfeatures = &[_]*const Feature { &feature_db, - &feature_mclass, - &feature_thumbMode, &feature_strictAlign, &feature_noarm, - &feature_v4t, - &feature_armv6M, + &feature_mclass, }, }; @@ -3237,20 +2060,16 @@ pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", .subfeatures = &[_]*const Feature { - &feature_db, - &feature_mclass, &feature_hwdiv, - &feature_thumbMode, - &feature_thumb2, - &feature_v7clrex, + &feature_db, &feature_perfmon, &feature_noarm, - &feature_v4t, - &feature_armv7M, + &feature_v7clrex, + &feature_mclass, + &feature_thumb2, &feature_noBranchPredictor, &feature_useAa, &feature_useMisched, - &feature_m3, }, }; @@ -3258,7 +2077,6 @@ pub const cpu_strongarm = Cpu{ .name = "strongarm", .llvm_name = "strongarm", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -3266,7 +2084,6 @@ pub const cpu_strongarm110 = Cpu{ .name = "strongarm110", .llvm_name = "strongarm110", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -3274,7 +2091,6 @@ pub const cpu_strongarm1100 = Cpu{ .name = "strongarm1100", .llvm_name = "strongarm1100", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -3282,7 +2098,6 @@ pub const cpu_strongarm1110 = Cpu{ .name = "strongarm1110", .llvm_name = "strongarm1110", .subfeatures = &[_]*const Feature { - &feature_armv4, }, }; @@ -3290,16 +2105,14 @@ pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", .subfeatures = &[_]*const Feature { + &feature_fpregs, &feature_db, + &feature_d32, + &feature_perfmon, &feature_dsp, - &feature_fpregs, - &feature_thumb2, - &feature_v7clrex, &feature_aclass, - &feature_perfmon, - &feature_v4t, - &feature_d32, - &feature_armv7A, + &feature_v7clrex, + &feature_thumb2, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_hwdivArm, @@ -3320,7 +2133,6 @@ pub const cpu_swift = Cpu{ &feature_wideStrideVfp, &feature_fp16, &feature_vfp4, - &feature_swift, }, }; @@ -3328,8 +2140,6 @@ pub const cpu_xscale = Cpu{ .name = "xscale", .llvm_name = "xscale", .subfeatures = &[_]*const Feature { - &feature_v4t, - &feature_armv5te, }, }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 4ca020d897b10d56f842da34d9c28f693d44e491..79cbb04dc458fb5e9e1f80cb492f90df69b9c4b4 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -1,227 +1,6 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; -pub const feature_avr0 = Feature{ - .name = "avr0", - .description = "The device is a part of the avr0 family", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_avr1 = Feature{ - .name = "avr1", - .description = "The device is a part of the avr1 family", - .subfeatures = &[_]*const Feature { - &feature_lpm, - &feature_avr0, - }, -}; - -pub const feature_avr2 = Feature{ - .name = "avr2", - .description = "The device is a part of the avr2 family", - .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, - &feature_addsubiw, - &feature_lpm, - &feature_avr0, - }, -}; - -pub const feature_avr3 = Feature{ - .name = "avr3", - .description = "The device is a part of the avr3 family", - .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_lpm, - &feature_avr0, - }, -}; - -pub const feature_avr4 = Feature{ - .name = "avr4", - .description = "The device is a part of the avr4 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_sram, - &feature_addsubiw, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avr5 = Feature{ - .name = "avr5", - .description = "The device is a part of the avr5 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avr6 = Feature{ - .name = "avr6", - .description = "The device is a part of the avr6 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_elpmx, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avr25 = Feature{ - .name = "avr25", - .description = "The device is a part of the avr25 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_sram, - &feature_addsubiw, - &feature_break, - &feature_lpm, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avr31 = Feature{ - .name = "avr31", - .description = "The device is a part of the avr31 family", - .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_elpm, - &feature_lpm, - &feature_avr0, - }, -}; - -pub const feature_avr35 = Feature{ - .name = "avr35", - .description = "The device is a part of the avr35 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_break, - &feature_lpm, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avr51 = Feature{ - .name = "avr51", - .description = "The device is a part of the avr51 family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_elpmx, - &feature_avr0, - &feature_movw, - }, -}; - -pub const feature_avrtiny = Feature{ - .name = "avrtiny", - .description = "The device is a part of the avrtiny family", - .subfeatures = &[_]*const Feature { - &feature_avr0, - &feature_sram, - &feature_tinyencoding, - &feature_break, - }, -}; - -pub const feature_xmega = Feature{ - .name = "xmega", - .description = "The device is a part of the xmega family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_addsubiw, - &feature_elpm, - &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_elpmx, - &feature_avr0, - &feature_movw, - &feature_spmx, - }, -}; - -pub const feature_xmegau = Feature{ - .name = "xmegau", - .description = "The device is a part of the xmegau family", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, - &feature_rmw, - &feature_addsubiw, - &feature_elpm, - &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, - &feature_elpmx, - &feature_avr0, - &feature_movw, - &feature_spmx, - }, -}; - pub const feature_addsubiw = Feature{ .name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", @@ -334,29 +113,6 @@ pub const feature_sram = Feature{ }, }; -pub const feature_special = Feature{ - .name = "special", - .description = "Enable use of the entire instruction set - used for debugging", - .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_rmw, - &feature_sram, - &feature_elpm, - &feature_addsubiw, - &feature_eijmpcall, - &feature_elpmx, - &feature_break, - &feature_lpm, - &feature_mul, - &feature_movw, - &feature_spmx, - }, -}; - pub const feature_smallstack = Feature{ .name = "smallstack", .description = "The device has an 8-bit stack pointer", @@ -372,20 +128,6 @@ pub const feature_tinyencoding = Feature{ }; pub const features = &[_]*const Feature { - &feature_avr0, - &feature_avr1, - &feature_avr2, - &feature_avr3, - &feature_avr4, - &feature_avr5, - &feature_avr6, - &feature_avr25, - &feature_avr31, - &feature_avr35, - &feature_avr51, - &feature_avrtiny, - &feature_xmega, - &feature_xmegau, &feature_addsubiw, &feature_break, &feature_des, @@ -402,7 +144,6 @@ pub const features = &[_]*const Feature { &feature_spm, &feature_spmx, &feature_sram, - &feature_special, &feature_smallstack, &feature_tinyencoding, }; @@ -411,14 +152,12 @@ pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, - &feature_elpm, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr31, + &feature_elpm, + &feature_sram, + &feature_ijmpcall, }, }; @@ -426,13 +165,11 @@ pub const cpu_at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, }, }; @@ -440,13 +177,11 @@ pub const cpu_at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, }, }; @@ -454,12 +189,10 @@ pub const cpu_at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, }, @@ -469,12 +202,10 @@ pub const cpu_at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -482,20 +213,18 @@ pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -503,18 +232,16 @@ pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -522,18 +249,16 @@ pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -541,17 +266,15 @@ pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -559,18 +282,16 @@ pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -578,17 +299,15 @@ pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -596,18 +315,16 @@ pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -615,17 +332,15 @@ pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -633,17 +348,15 @@ pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -651,18 +364,16 @@ pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -670,17 +381,15 @@ pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -688,17 +397,15 @@ pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -706,7 +413,6 @@ pub const cpu_at90s1200 = Cpu{ .name = "at90s1200", .llvm_name = "at90s1200", .subfeatures = &[_]*const Feature { - &feature_avr0, }, }; @@ -714,12 +420,10 @@ pub const cpu_at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -727,12 +431,10 @@ pub const cpu_at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -740,12 +442,10 @@ pub const cpu_at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -753,12 +453,10 @@ pub const cpu_at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -766,12 +464,10 @@ pub const cpu_at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -779,12 +475,10 @@ pub const cpu_at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -792,12 +486,10 @@ pub const cpu_at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -805,12 +497,10 @@ pub const cpu_at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -818,12 +508,10 @@ pub const cpu_at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -831,18 +519,16 @@ pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -850,20 +536,18 @@ pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -871,20 +555,18 @@ pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -892,17 +574,15 @@ pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -910,18 +590,16 @@ pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -929,18 +607,16 @@ pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -948,17 +624,15 @@ pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -966,13 +640,11 @@ pub const cpu_at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -983,16 +655,14 @@ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -1000,17 +670,15 @@ pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -1018,18 +686,16 @@ pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1037,18 +703,16 @@ pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1056,17 +720,15 @@ pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -1074,17 +736,15 @@ pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -1092,17 +752,15 @@ pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -1110,14 +768,12 @@ pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, - &feature_elpm, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr31, + &feature_elpm, + &feature_sram, + &feature_ijmpcall, }, }; @@ -1125,20 +781,18 @@ pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1146,20 +800,18 @@ pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1167,20 +819,18 @@ pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1188,20 +838,18 @@ pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1209,20 +857,18 @@ pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1230,20 +876,18 @@ pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1251,20 +895,18 @@ pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1272,20 +914,18 @@ pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1293,20 +933,18 @@ pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -1314,18 +952,16 @@ pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1333,13 +969,11 @@ pub const cpu_atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1351,18 +985,16 @@ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1370,13 +1002,11 @@ pub const cpu_atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1388,18 +1018,16 @@ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1407,18 +1035,16 @@ pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1426,18 +1052,16 @@ pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1445,18 +1069,16 @@ pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1464,18 +1086,16 @@ pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1483,18 +1103,16 @@ pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1502,18 +1120,16 @@ pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1521,18 +1137,16 @@ pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1540,18 +1154,16 @@ pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1559,18 +1171,16 @@ pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1578,18 +1188,16 @@ pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1597,18 +1205,16 @@ pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1616,18 +1222,16 @@ pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1635,18 +1239,16 @@ pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1654,18 +1256,16 @@ pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1673,18 +1273,16 @@ pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1692,18 +1290,16 @@ pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1711,18 +1307,16 @@ pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1730,18 +1324,16 @@ pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1749,18 +1341,16 @@ pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1768,18 +1358,16 @@ pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1787,17 +1375,15 @@ pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -1805,18 +1391,16 @@ pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1824,20 +1408,18 @@ pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr6, }, }; @@ -1845,20 +1427,18 @@ pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr6, }, }; @@ -1866,20 +1446,18 @@ pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr6, }, }; @@ -1887,20 +1465,18 @@ pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr6, }, }; @@ -1908,18 +1484,16 @@ pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1927,18 +1501,16 @@ pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1946,18 +1518,16 @@ pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1965,18 +1535,16 @@ pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -1984,18 +1552,16 @@ pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2003,18 +1569,16 @@ pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2022,18 +1586,16 @@ pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2041,18 +1603,16 @@ pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2060,18 +1620,16 @@ pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2079,18 +1637,16 @@ pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2098,18 +1654,16 @@ pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2117,18 +1671,16 @@ pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2136,18 +1688,16 @@ pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2155,18 +1705,16 @@ pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2174,18 +1722,16 @@ pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2193,18 +1739,16 @@ pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2212,18 +1756,16 @@ pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2231,18 +1773,16 @@ pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2250,18 +1790,16 @@ pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2269,18 +1807,16 @@ pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2288,18 +1824,16 @@ pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2307,18 +1841,16 @@ pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2326,18 +1858,16 @@ pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2345,18 +1875,16 @@ pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2364,18 +1892,16 @@ pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2383,18 +1909,16 @@ pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2402,18 +1926,16 @@ pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2421,18 +1943,16 @@ pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2440,17 +1960,15 @@ pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -2458,18 +1976,16 @@ pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2477,18 +1993,16 @@ pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2496,18 +2010,16 @@ pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2515,17 +2027,15 @@ pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -2533,17 +2043,15 @@ pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -2551,17 +2059,15 @@ pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -2569,17 +2075,15 @@ pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -2587,18 +2091,16 @@ pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2606,18 +2108,16 @@ pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2625,18 +2125,16 @@ pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2644,18 +2142,16 @@ pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2663,18 +2159,16 @@ pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2682,18 +2176,16 @@ pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2701,18 +2193,16 @@ pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2720,18 +2210,16 @@ pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2739,18 +2227,16 @@ pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2758,18 +2244,16 @@ pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2777,18 +2261,16 @@ pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2796,18 +2278,16 @@ pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2815,18 +2295,16 @@ pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2834,18 +2312,16 @@ pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2853,18 +2329,16 @@ pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2872,18 +2346,16 @@ pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2891,18 +2363,16 @@ pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2910,18 +2380,16 @@ pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2929,18 +2397,16 @@ pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2948,18 +2414,16 @@ pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2967,18 +2431,16 @@ pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -2986,18 +2448,16 @@ pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -3005,18 +2465,16 @@ pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -3024,18 +2482,16 @@ pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -3043,17 +2499,15 @@ pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3061,12 +2515,10 @@ pub const cpu_atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -3078,12 +2530,10 @@ pub const cpu_atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -3095,17 +2545,15 @@ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3113,17 +2561,15 @@ pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3131,17 +2577,15 @@ pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3149,17 +2593,15 @@ pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3167,17 +2609,15 @@ pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3185,17 +2625,15 @@ pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -3203,17 +2641,15 @@ pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -3221,11 +2657,9 @@ pub const cpu_attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3233,11 +2667,9 @@ pub const cpu_attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3245,11 +2677,9 @@ pub const cpu_attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3258,8 +2688,6 @@ pub const cpu_attiny11 = Cpu{ .llvm_name = "attiny11", .subfeatures = &[_]*const Feature { &feature_lpm, - &feature_avr0, - &feature_avr1, }, }; @@ -3268,8 +2696,6 @@ pub const cpu_attiny12 = Cpu{ .llvm_name = "attiny12", .subfeatures = &[_]*const Feature { &feature_lpm, - &feature_avr0, - &feature_avr1, }, }; @@ -3277,16 +2703,14 @@ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3294,16 +2718,14 @@ pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3312,8 +2734,6 @@ pub const cpu_attiny15 = Cpu{ .llvm_name = "attiny15", .subfeatures = &[_]*const Feature { &feature_lpm, - &feature_avr0, - &feature_avr1, }, }; @@ -3321,17 +2741,15 @@ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -3339,17 +2757,15 @@ pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -3357,11 +2773,9 @@ pub const cpu_attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3369,12 +2783,10 @@ pub const cpu_attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -3382,16 +2794,14 @@ pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3399,16 +2809,14 @@ pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3416,16 +2824,14 @@ pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3433,16 +2839,14 @@ pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3450,16 +2854,14 @@ pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3467,12 +2869,10 @@ pub const cpu_attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, &feature_lpmx, }, }; @@ -3481,16 +2881,14 @@ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3498,16 +2896,14 @@ pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3516,8 +2912,6 @@ pub const cpu_attiny28 = Cpu{ .llvm_name = "attiny28", .subfeatures = &[_]*const Feature { &feature_lpm, - &feature_avr0, - &feature_avr1, }, }; @@ -3525,11 +2919,9 @@ pub const cpu_attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3537,11 +2929,9 @@ pub const cpu_attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3549,16 +2939,14 @@ pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3566,16 +2954,14 @@ pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3583,16 +2969,14 @@ pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3600,16 +2984,14 @@ pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3617,16 +2999,14 @@ pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3634,16 +3014,14 @@ pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3651,16 +3029,14 @@ pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3668,16 +3044,14 @@ pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3685,11 +3059,9 @@ pub const cpu_attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3697,16 +3069,14 @@ pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3714,16 +3084,14 @@ pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3731,16 +3099,14 @@ pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3748,16 +3114,14 @@ pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3765,16 +3129,14 @@ pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3782,16 +3144,14 @@ pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3799,16 +3159,14 @@ pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3816,16 +3174,14 @@ pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -3833,11 +3189,9 @@ pub const cpu_attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -3845,23 +3199,21 @@ pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -3869,24 +3221,22 @@ pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -3894,23 +3244,21 @@ pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -3918,24 +3266,22 @@ pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -3943,24 +3289,22 @@ pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -3968,24 +3312,22 @@ pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -3993,24 +3335,22 @@ pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4018,24 +3358,22 @@ pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4043,23 +3381,21 @@ pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4067,23 +3403,21 @@ pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4091,23 +3425,21 @@ pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4115,24 +3447,22 @@ pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4140,24 +3470,22 @@ pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4165,23 +3493,21 @@ pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4189,23 +3515,21 @@ pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4213,23 +3537,21 @@ pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4237,24 +3559,22 @@ pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4262,24 +3582,22 @@ pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4287,23 +3605,21 @@ pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4311,23 +3627,21 @@ pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4335,23 +3649,21 @@ pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4359,24 +3671,22 @@ pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4384,24 +3694,22 @@ pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4409,24 +3717,22 @@ pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4434,23 +3740,21 @@ pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4458,23 +3762,21 @@ pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4482,24 +3784,22 @@ pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4507,24 +3807,22 @@ pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4532,23 +3830,21 @@ pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4556,23 +3852,21 @@ pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4580,23 +3874,21 @@ pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4604,24 +3896,22 @@ pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4629,23 +3919,21 @@ pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4653,23 +3941,21 @@ pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4677,24 +3963,22 @@ pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4702,23 +3986,21 @@ pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4726,24 +4008,22 @@ pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4751,24 +4031,22 @@ pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4776,24 +4054,22 @@ pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4801,24 +4077,22 @@ pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4826,24 +4100,22 @@ pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .subfeatures = &[_]*const Feature { - &feature_spm, - &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_rmw, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmegau, }, }; @@ -4851,23 +4123,21 @@ pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4875,23 +4145,21 @@ pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4899,23 +4167,21 @@ pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -4924,8 +4190,6 @@ pub const cpu_avr1 = Cpu{ .llvm_name = "avr1", .subfeatures = &[_]*const Feature { &feature_lpm, - &feature_avr0, - &feature_avr1, }, }; @@ -4933,12 +4197,10 @@ pub const cpu_avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_sram, &feature_addsubiw, &feature_lpm, - &feature_avr0, - &feature_avr2, + &feature_sram, + &feature_ijmpcall, }, }; @@ -4946,16 +4208,14 @@ pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, &feature_break, &feature_lpm, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr25, }, }; @@ -4963,13 +4223,11 @@ pub const cpu_avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr3, + &feature_sram, + &feature_ijmpcall, }, }; @@ -4977,14 +4235,12 @@ pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", .subfeatures = &[_]*const Feature { - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, &feature_addsubiw, - &feature_elpm, + &feature_jmpcall, &feature_lpm, - &feature_avr0, - &feature_avr31, + &feature_elpm, + &feature_sram, + &feature_ijmpcall, }, }; @@ -4992,17 +4248,15 @@ pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr35, }, }; @@ -5010,17 +4264,15 @@ pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, &feature_break, &feature_lpm, - &feature_avr0, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr4, }, }; @@ -5028,18 +4280,16 @@ pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; @@ -5047,20 +4297,18 @@ pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr51, }, }; @@ -5068,20 +4316,18 @@ pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_elpm, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, + &feature_break, + &feature_mul, + &feature_elpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr6, }, }; @@ -5089,11 +4335,9 @@ pub const cpu_avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", .subfeatures = &[_]*const Feature { - &feature_avr0, + &feature_break, &feature_sram, &feature_tinyencoding, - &feature_break, - &feature_avrtiny, }, }; @@ -5101,23 +4345,21 @@ pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5125,23 +4367,21 @@ pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5149,23 +4389,21 @@ pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5173,23 +4411,21 @@ pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5197,23 +4433,21 @@ pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5221,23 +4455,21 @@ pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5245,23 +4477,21 @@ pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_des, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, + &feature_jmpcall, + &feature_lpm, + &feature_break, + &feature_mul, &feature_elpm, &feature_eijmpcall, - &feature_mul, - &feature_break, - &feature_lpm, &feature_elpmx, - &feature_avr0, + &feature_sram, + &feature_des, + &feature_ijmpcall, &feature_movw, &feature_spmx, - &feature_xmega, }, }; @@ -5269,18 +4499,16 @@ pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", .subfeatures = &[_]*const Feature { - &feature_spm, &feature_lpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_sram, + &feature_spm, &feature_addsubiw, - &feature_mul, - &feature_break, + &feature_jmpcall, &feature_lpm, - &feature_avr0, + &feature_break, + &feature_mul, + &feature_sram, + &feature_ijmpcall, &feature_movw, - &feature_avr5, }, }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 0219b88815a0e85bea4db163cf65c7b1cab16da7..3051f3273a54294b11adcec592af9f9370286600 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -1,111 +1,6 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; -pub const feature_v5 = Feature{ - .name = "v5", - .description = "Enable Hexagon V5 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v55 = Feature{ - .name = "v55", - .description = "Enable Hexagon V55 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v60 = Feature{ - .name = "v60", - .description = "Enable Hexagon V60 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v62 = Feature{ - .name = "v62", - .description = "Enable Hexagon V62 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v65 = Feature{ - .name = "v65", - .description = "Enable Hexagon V65 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_v66 = Feature{ - .name = "v66", - .description = "Enable Hexagon V66 architecture", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_hvx = Feature{ - .name = "hvx", - .description = "Hexagon HVX instructions", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_hvxLength64b = Feature{ - .name = "hvx-length64b", - .description = "Hexagon HVX 64B instructions", - .subfeatures = &[_]*const Feature { - &feature_hvx, - }, -}; - -pub const feature_hvxLength128b = Feature{ - .name = "hvx-length128b", - .description = "Hexagon HVX 128B instructions", - .subfeatures = &[_]*const Feature { - &feature_hvx, - }, -}; - -pub const feature_hvxv60 = Feature{ - .name = "hvxv60", - .description = "Hexagon HVX instructions", - .subfeatures = &[_]*const Feature { - &feature_hvx, - }, -}; - -pub const feature_hvxv62 = Feature{ - .name = "hvxv62", - .description = "Hexagon HVX instructions", - .subfeatures = &[_]*const Feature { - &feature_hvx, - }, -}; - -pub const feature_hvxv65 = Feature{ - .name = "hvxv65", - .description = "Hexagon HVX instructions", - .subfeatures = &[_]*const Feature { - &feature_hvx, - }, -}; - -pub const feature_hvxv66 = Feature{ - .name = "hvxv66", - .description = "Hexagon HVX instructions", - .subfeatures = &[_]*const Feature { - &feature_zreg, - &feature_hvx, - }, -}; - -pub const feature_zreg = Feature{ - .name = "zreg", - .description = "Hexagon ZReg extension instructions", - .subfeatures = &[_]*const Feature { - }, -}; - pub const feature_duplex = Feature{ .name = "duplex", .description = "Enable generation of duplex instruction", @@ -179,20 +74,6 @@ pub const feature_smallData = Feature{ }; pub const features = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, - &feature_v62, - &feature_v65, - &feature_v66, - &feature_hvx, - &feature_hvxLength64b, - &feature_hvxLength128b, - &feature_hvxv60, - &feature_hvxv62, - &feature_hvxv65, - &feature_hvxv66, - &feature_zreg, &feature_duplex, &feature_longCalls, &feature_mem_noshuf, @@ -209,9 +90,6 @@ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, &feature_duplex, &feature_memops, &feature_packets, @@ -225,7 +103,6 @@ pub const cpu_hexagonv5 = Cpu{ .name = "hexagonv5", .llvm_name = "hexagonv5", .subfeatures = &[_]*const Feature { - &feature_v5, &feature_duplex, &feature_memops, &feature_packets, @@ -239,8 +116,6 @@ pub const cpu_hexagonv55 = Cpu{ .name = "hexagonv55", .llvm_name = "hexagonv55", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, &feature_duplex, &feature_memops, &feature_packets, @@ -254,9 +129,6 @@ pub const cpu_hexagonv60 = Cpu{ .name = "hexagonv60", .llvm_name = "hexagonv60", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, &feature_duplex, &feature_memops, &feature_packets, @@ -270,10 +142,6 @@ pub const cpu_hexagonv62 = Cpu{ .name = "hexagonv62", .llvm_name = "hexagonv62", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, - &feature_v62, &feature_duplex, &feature_memops, &feature_packets, @@ -287,11 +155,6 @@ pub const cpu_hexagonv65 = Cpu{ .name = "hexagonv65", .llvm_name = "hexagonv65", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, - &feature_v62, - &feature_v65, &feature_duplex, &feature_mem_noshuf, &feature_memops, @@ -306,12 +169,6 @@ pub const cpu_hexagonv66 = Cpu{ .name = "hexagonv66", .llvm_name = "hexagonv66", .subfeatures = &[_]*const Feature { - &feature_v5, - &feature_v55, - &feature_v60, - &feature_v62, - &feature_v65, - &feature_v66, &feature_duplex, &feature_mem_noshuf, &feature_memops, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 3d02746606192af9566551929dbf2bc40319d61d..17582a9313a0adeab901ba5606df7112fdeabb22 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -19,14 +19,14 @@ pub const feature_cnmips = Feature{ .name = "cnmips", .description = "Octeon cnMIPS Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -142,11 +142,11 @@ pub const feature_mips3 = Feature{ .name = "mips3", .description = "MIPS III ISA Support [highly experimental]", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips1, &feature_fp64, + &feature_mips1, &feature_gp64, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -168,13 +168,13 @@ pub const feature_mips4 = Feature{ .name = "mips4", .description = "MIPS IV ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, &feature_gp64, &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -196,14 +196,14 @@ pub const feature_mips5 = Feature{ .name = "mips5", .description = "MIPS V ISA Support [highly experimental]", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -235,12 +235,12 @@ pub const feature_mips32r2 = Feature{ .name = "mips32r2", .description = "Mips32r2 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -248,12 +248,12 @@ pub const feature_mips32r3 = Feature{ .name = "mips32r3", .description = "Mips32r3 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -261,12 +261,12 @@ pub const feature_mips32r5 = Feature{ .name = "mips32r5", .description = "Mips32r5 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -274,15 +274,15 @@ pub const feature_mips32r6 = Feature{ .name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_nan2008, - &feature_mips4_32r2, - &feature_mips1, &feature_abs2008, &feature_fp64, - &feature_mips5_32r2, + &feature_mips4_32r2, + &feature_nan2008, + &feature_mips1, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -290,14 +290,14 @@ pub const feature_mips64 = Feature{ .name = "mips64", .description = "Mips64 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -305,14 +305,14 @@ pub const feature_mips64r2 = Feature{ .name = "mips64r2", .description = "Mips64r2 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -320,14 +320,14 @@ pub const feature_mips64r3 = Feature{ .name = "mips64r3", .description = "Mips64r3 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -335,14 +335,14 @@ pub const feature_mips64r5 = Feature{ .name = "mips64r5", .description = "Mips64r5 ISA Support", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -350,16 +350,16 @@ pub const feature_mips64r6 = Feature{ .name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_nan2008, - &feature_mips4_32r2, - &feature_mips1, &feature_abs2008, &feature_fp64, - &feature_mips5_32r2, + &feature_mips4_32r2, + &feature_mips1, &feature_gp64, + &feature_mips5_32r2, &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -451,12 +451,12 @@ pub const feature_p5600 = Feature{ .name = "p5600", .description = "The P5600 Processor", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, }, }; @@ -534,11 +534,11 @@ pub const cpu_mips3 = Cpu{ .name = "mips3", .llvm_name = "mips3", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips1, &feature_fp64, + &feature_mips1, &feature_gp64, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips3, }, }; @@ -558,12 +558,12 @@ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips32r2, }, }; @@ -572,12 +572,12 @@ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips32r3, }, }; @@ -586,12 +586,12 @@ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips32r5, }, }; @@ -600,15 +600,15 @@ pub const cpu_mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_nan2008, - &feature_mips4_32r2, - &feature_mips1, &feature_abs2008, &feature_fp64, - &feature_mips5_32r2, + &feature_mips4_32r2, + &feature_nan2008, + &feature_mips1, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips32r6, }, }; @@ -617,13 +617,13 @@ pub const cpu_mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, &feature_gp64, &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips4, }, }; @@ -632,14 +632,14 @@ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips5, }, }; @@ -648,14 +648,14 @@ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips64, }, }; @@ -664,14 +664,14 @@ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips64r2, }, }; @@ -680,14 +680,14 @@ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips64r3, }, }; @@ -696,14 +696,14 @@ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips64r5, }, }; @@ -712,16 +712,16 @@ pub const cpu_mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_nan2008, - &feature_mips4_32r2, - &feature_mips1, &feature_abs2008, &feature_fp64, - &feature_mips5_32r2, + &feature_mips4_32r2, + &feature_mips1, &feature_gp64, + &feature_mips5_32r2, &feature_mips4_32, + &feature_nan2008, + &feature_mips3_32r2, + &feature_mips3_32, &feature_mips64r6, }, }; @@ -730,14 +730,14 @@ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, + &feature_fp64, &feature_mips4_32r2, &feature_mips1, - &feature_fp64, - &feature_mips5_32r2, &feature_gp64, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_cnmips, &feature_mips64r2, }, @@ -747,12 +747,12 @@ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", .subfeatures = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, &feature_mips4_32r2, &feature_mips1, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, &feature_p5600, }, }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 212a604a4a05431fbbc1363c468ba774be0ecb5b..e8c9d98a1cfd53b8952798892eeef351009e8894 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -261,8 +261,8 @@ pub const feature_power9Altivec = Feature{ .name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", .subfeatures = &[_]*const Feature { - &feature_hardFloat, &feature_isaV30Instructions, + &feature_hardFloat, }, }; @@ -270,8 +270,8 @@ pub const feature_power9Vector = Feature{ .name = "power9-vector", .description = "Enable POWER9 vector instructions", .subfeatures = &[_]*const Feature { - &feature_hardFloat, &feature_isaV30Instructions, + &feature_hardFloat, }, }; diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 75c824c8bcf8446e8183dbc0dc531955fffe2190..d302c28063ec4a8437848a39ae4eed7549ca60ab 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -1,13 +1,6 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; -pub const feature_detectroundchange = Feature{ - .name = "detectroundchange", - .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", - .subfeatures = &[_]*const Feature { - }, -}; - pub const feature_hardQuadFloat = Feature{ .name = "hard-quad-float", .description = "Enable quad-word floating point instructions", @@ -92,50 +85,7 @@ pub const feature_vis3 = Feature{ }, }; -pub const feature_fixallfdivsqrt = Feature{ - .name = "fixallfdivsqrt", - .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_insertnopload = Feature{ - .name = "insertnopload", - .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_hasleoncasa = Feature{ - .name = "hasleoncasa", - .description = "Enable CASA instruction for LEON3 and LEON4 processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_leoncyclecounter = Feature{ - .name = "leoncyclecounter", - .description = "Use the Leon cycle counter register", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_hasumacsmac = Feature{ - .name = "hasumacsmac", - .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", - .subfeatures = &[_]*const Feature { - }, -}; - -pub const feature_popc = Feature{ - .name = "popc", - .description = "Use the popc (population count) instruction", - .subfeatures = &[_]*const Feature { - }, -}; - pub const features = &[_]*const Feature { - &feature_detectroundchange, &feature_hardQuadFloat, &feature_leon, &feature_noFmuls, @@ -148,12 +98,6 @@ pub const features = &[_]*const Feature { &feature_vis, &feature_vis2, &feature_vis3, - &feature_fixallfdivsqrt, - &feature_insertnopload, - &feature_hasleoncasa, - &feature_leoncyclecounter, - &feature_hasumacsmac, - &feature_popc, }; pub const cpu_at697e = Cpu{ @@ -161,7 +105,6 @@ pub const cpu_at697e = Cpu{ .llvm_name = "at697e", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_insertnopload, }, }; @@ -170,7 +113,6 @@ pub const cpu_at697f = Cpu{ .llvm_name = "at697f", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_insertnopload, }, }; @@ -193,7 +135,6 @@ pub const cpu_gr712rc = Cpu{ .llvm_name = "gr712rc", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -203,9 +144,6 @@ pub const cpu_gr740 = Cpu{ .subfeatures = &[_]*const Feature { &feature_leon, &feature_leonpwrpsr, - &feature_hasleoncasa, - &feature_leoncyclecounter, - &feature_hasumacsmac, }, }; @@ -229,7 +167,6 @@ pub const cpu_leon3 = Cpu{ .llvm_name = "leon3", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasumacsmac, }, }; @@ -238,8 +175,6 @@ pub const cpu_leon4 = Cpu{ .llvm_name = "leon4", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, - &feature_hasumacsmac, }, }; @@ -248,7 +183,6 @@ pub const cpu_ma2080 = Cpu{ .llvm_name = "ma2080", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -257,7 +191,6 @@ pub const cpu_ma2085 = Cpu{ .llvm_name = "ma2085", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -266,7 +199,6 @@ pub const cpu_ma2100 = Cpu{ .llvm_name = "ma2100", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -275,7 +207,6 @@ pub const cpu_ma2150 = Cpu{ .llvm_name = "ma2150", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -284,7 +215,6 @@ pub const cpu_ma2155 = Cpu{ .llvm_name = "ma2155", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -293,7 +223,6 @@ pub const cpu_ma2450 = Cpu{ .llvm_name = "ma2450", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -302,7 +231,6 @@ pub const cpu_ma2455 = Cpu{ .llvm_name = "ma2455", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -311,7 +239,6 @@ pub const cpu_ma2480 = Cpu{ .llvm_name = "ma2480", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -320,7 +247,6 @@ pub const cpu_ma2485 = Cpu{ .llvm_name = "ma2485", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -329,7 +255,6 @@ pub const cpu_ma2x5x = Cpu{ .llvm_name = "ma2x5x", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -338,7 +263,6 @@ pub const cpu_ma2x8x = Cpu{ .llvm_name = "ma2x8x", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -347,7 +271,6 @@ pub const cpu_myriad2 = Cpu{ .llvm_name = "myriad2", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -356,7 +279,6 @@ pub const cpu_myriad21 = Cpu{ .llvm_name = "myriad2.1", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -365,7 +287,6 @@ pub const cpu_myriad22 = Cpu{ .llvm_name = "myriad2.2", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -374,7 +295,6 @@ pub const cpu_myriad23 = Cpu{ .llvm_name = "myriad2.3", .subfeatures = &[_]*const Feature { &feature_leon, - &feature_hasleoncasa, }, }; @@ -397,7 +317,6 @@ pub const cpu_niagara2 = Cpu{ &feature_v9, &feature_vis, &feature_vis2, - &feature_popc, }, }; @@ -409,7 +328,6 @@ pub const cpu_niagara3 = Cpu{ &feature_v9, &feature_vis, &feature_vis2, - &feature_popc, }, }; @@ -422,7 +340,6 @@ pub const cpu_niagara4 = Cpu{ &feature_vis, &feature_vis2, &feature_vis3, - &feature_popc, }, }; @@ -489,8 +406,6 @@ pub const cpu_ut699 = Cpu{ &feature_leon, &feature_noFmuls, &feature_noFsmuld, - &feature_fixallfdivsqrt, - &feature_insertnopload, }, }; -- 2.54.0 From e4ecdefa9a668d34c830816eea242b110c30c475 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Tue, 7 Jan 2020 10:36:06 -0500 Subject: [PATCH 13/63] Rename subfeatures -> dependencies --- lib/std/target.zig | 4 +- lib/std/target/aarch64.zig | 748 ++++----- lib/std/target/amdgpu.zig | 1160 ++++++------- lib/std/target/arm.zig | 1020 ++++++------ lib/std/target/avr.zig | 3220 ++++++++++++++++++------------------ lib/std/target/bpf.zig | 16 +- lib/std/target/hexagon.zig | 34 +- lib/std/target/mips.zig | 382 ++--- lib/std/target/msp430.zig | 14 +- lib/std/target/nvptx.zig | 80 +- lib/std/target/powerpc.zig | 176 +- lib/std/target/riscv.zig | 22 +- lib/std/target/sparc.zig | 104 +- lib/std/target/systemz.zig | 96 +- lib/std/target/wasm.zig | 26 +- lib/std/target/x86.zig | 412 ++--- src/main.cpp | 12 +- 17 files changed, 3763 insertions(+), 3763 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index ad2ca59ee8d266eb321bf99b37b2f5417b6adf44..8a86af6733e27a2025864404acd051b313501e2f 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -862,14 +862,14 @@ pub const Feature = struct { name: []const u8, description: []const u8, - subfeatures: []*const Feature, + dependencies: []*const Feature, }; pub const Cpu = struct { name: []const u8, llvm_name: []const u8, - subfeatures: []*const Feature, + dependencies: []*const Feature, }; pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature { diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index b907d96b7d9badf8ce6bd1f56ef88abb6bf78f1f..85ef813dea6e5e7cebecd84122fab6d61d94f188 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -4,7 +4,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -12,154 +12,154 @@ pub const feature_aes = Feature{ pub const feature_am = Feature{ .name = "am", .description = "Enable v8.4-A Activity Monitors extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_aggressiveFma = Feature{ .name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_altnzcv = Feature{ .name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_alternateSextloadCvtF32Pattern = Feature{ .name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_arithBccFusion = Feature{ .name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_arithCbzFusion = Feature{ .name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_balanceFpOps = Feature{ .name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bti = Feature{ .name = "bti", .description = "Enable Branch Target Identification", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ccidx = Feature{ .name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ccpp = Feature{ .name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_crc = Feature{ .name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ccdp = Feature{ .name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX8 = Feature{ .name = "call-saved-x8", .description = "Make X8 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX9 = Feature{ .name = "call-saved-x9", .description = "Make X9 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX10 = Feature{ .name = "call-saved-x10", .description = "Make X10 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX11 = Feature{ .name = "call-saved-x11", .description = "Make X11 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX12 = Feature{ .name = "call-saved-x12", .description = "Make X12 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX13 = Feature{ .name = "call-saved-x13", .description = "Make X13 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX14 = Feature{ .name = "call-saved-x14", .description = "Make X14 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX15 = Feature{ .name = "call-saved-x15", .description = "Make X15 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_callSavedX18 = Feature{ .name = "call-saved-x18", .description = "Make X18 callee saved.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_complxnum = Feature{ .name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -167,7 +167,7 @@ pub const feature_complxnum = Feature{ pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable cryptographic instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -175,35 +175,35 @@ pub const feature_crypto = Feature{ pub const feature_customCheapAsMove = Feature{ .name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dit = Feature{ .name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_disableLatencySchedHeuristic = Feature{ .name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dotprod = Feature{ .name = "dotprod", .description = "Enable dot product support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ete = Feature{ .name = "ete", .description = "Enable Embedded Trace Extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_trbe, }, }; @@ -211,7 +211,7 @@ pub const feature_ete = Feature{ pub const feature_exynosCheapAsMove = Feature{ .name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_customCheapAsMove, }, }; @@ -219,14 +219,14 @@ pub const feature_exynosCheapAsMove = Feature{ pub const feature_fmi = Feature{ .name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp16fml = Feature{ .name = "fp16fml", .description = "Enable FP16 FML instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -234,28 +234,28 @@ pub const feature_fp16fml = Feature{ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", .description = "Enable ARMv8 FP", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fptoint = Feature{ .name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_force32bitJumpTables = Feature{ .name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fullfp16 = Feature{ .name = "fullfp16", .description = "Full FP16", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -263,49 +263,49 @@ pub const feature_fullfp16 = Feature{ pub const feature_fuseAes = Feature{ .name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseAddress = Feature{ .name = "fuse-address", .description = "CPU fuses address generation and memory operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseArithLogic = Feature{ .name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseCsel = Feature{ .name = "fuse-csel", .description = "CPU fuses conditional select operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseCryptoEor = Feature{ .name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", .description = "CPU fuses literal generation operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_jsconv = Feature{ .name = "jsconv", .description = "Enable v8.3-A JavaScript FP conversion enchancement", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -313,42 +313,42 @@ pub const feature_jsconv = Feature{ pub const feature_lor = Feature{ .name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lse = Feature{ .name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lslFast = Feature{ .name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mpam = Feature{ .name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mte = Feature{ .name = "mte", .description = "Enable Memory Tagging Extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_neon = Feature{ .name = "neon", .description = "Enable Advanced SIMD instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -356,35 +356,35 @@ pub const feature_neon = Feature{ pub const feature_nv = Feature{ .name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_pa = Feature{ .name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_pan = Feature{ .name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_panRwv = Feature{ .name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_pan, }, }; @@ -392,49 +392,49 @@ pub const feature_panRwv = Feature{ pub const feature_perfmon = Feature{ .name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_usePostraScheduler = Feature{ .name = "use-postra-scheduler", .description = "Schedule again after register allocation", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_predres = Feature{ .name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_predictableSelectExpensive = Feature{ .name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_uaops = Feature{ .name = "uaops", .description = "Enable v8.2 UAO PState", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ras = Feature{ .name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rasv8_4 = Feature{ .name = "rasv8_4", .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ras, }, }; @@ -442,14 +442,14 @@ pub const feature_rasv8_4 = Feature{ pub const feature_rcpc = Feature{ .name = "rcpc", .description = "Enable support for RCPC extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rcpcImmo = Feature{ .name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_rcpc, }, }; @@ -457,203 +457,203 @@ pub const feature_rcpcImmo = Feature{ pub const feature_rdm = Feature{ .name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rand = Feature{ .name = "rand", .description = "Enable Random Number generation instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX1 = Feature{ .name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX2 = Feature{ .name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX3 = Feature{ .name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX4 = Feature{ .name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX5 = Feature{ .name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX6 = Feature{ .name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX7 = Feature{ .name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX9 = Feature{ .name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX10 = Feature{ .name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX11 = Feature{ .name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX12 = Feature{ .name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX13 = Feature{ .name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX14 = Feature{ .name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX15 = Feature{ .name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX18 = Feature{ .name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX20 = Feature{ .name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX21 = Feature{ .name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX22 = Feature{ .name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX23 = Feature{ .name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX24 = Feature{ .name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX25 = Feature{ .name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX26 = Feature{ .name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX27 = Feature{ .name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveX28 = Feature{ .name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sb = Feature{ .name = "sb", .description = "Enable v8.5 Speculation Barrier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sel2 = Feature{ .name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sha2 = Feature{ .name = "sha2", .description = "Enable SHA1 and SHA256 support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -661,7 +661,7 @@ pub const feature_sha2 = Feature{ pub const feature_sha3 = Feature{ .name = "sha3", .description = "Enable SHA512 and SHA3 support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -669,7 +669,7 @@ pub const feature_sha3 = Feature{ pub const feature_sm4 = Feature{ .name = "sm4", .description = "Enable SM3 and SM4 support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, }, }; @@ -677,28 +677,28 @@ pub const feature_sm4 = Feature{ pub const feature_spe = Feature{ .name = "spe", .description = "Enable Statistical Profiling extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ssbs = Feature{ .name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sve = Feature{ .name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sve2 = Feature{ .name = "sve2", .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sve, }, }; @@ -706,7 +706,7 @@ pub const feature_sve2 = Feature{ pub const feature_sve2Aes = Feature{ .name = "sve2-aes", .description = "Enable AES SVE2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, &feature_sve, }, @@ -715,7 +715,7 @@ pub const feature_sve2Aes = Feature{ pub const feature_sve2Bitperm = Feature{ .name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sve, }, }; @@ -723,7 +723,7 @@ pub const feature_sve2Bitperm = Feature{ pub const feature_sve2Sha3 = Feature{ .name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, &feature_sve, }, @@ -732,7 +732,7 @@ pub const feature_sve2Sha3 = Feature{ pub const feature_sve2Sm4 = Feature{ .name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpArmv8, &feature_sve, }, @@ -741,126 +741,126 @@ pub const feature_sve2Sm4 = Feature{ pub const feature_slowMisaligned128store = Feature{ .name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowPaired128 = Feature{ .name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowStrqroStore = Feature{ .name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_specrestrict = Feature{ .name = "specrestrict", .description = "Enable architectural speculation restriction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_strictAlign = Feature{ .name = "strict-align", .description = "Disallow all unaligned memory access", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tlbRmi = Feature{ .name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tme = Feature{ .name = "tme", .description = "Enable Transactional Memory Extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tracev84 = Feature{ .name = "tracev8.4", .description = "Enable v8.4-A Trace extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_trbe = Feature{ .name = "trbe", .description = "Enable Trace Buffer Extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_taggedGlobals = Feature{ .name = "tagged-globals", .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tpidrEl1 = Feature{ .name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tpidrEl2 = Feature{ .name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tpidrEl3 = Feature{ .name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useReciprocalSquareRoot = Feature{ .name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vh = Feature{ .name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_zcm = Feature{ .name = "zcm", .description = "Has zero-cycle register moves", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_zcz = Feature{ .name = "zcz", .description = "Has zero-cycle zeroing instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_zczGp, &feature_zczFp, }, @@ -869,21 +869,21 @@ pub const feature_zcz = Feature{ pub const feature_zczFp = Feature{ .name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_zczFpWorkaround = Feature{ .name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_zczGp = Feature{ .name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -1016,80 +1016,80 @@ pub const features = &[_]*const Feature { pub const cpu_appleLatest = Cpu{ .name = "apple-latest", .llvm_name = "apple-latest", - .subfeatures = &[_]*const Feature { - &feature_arithCbzFusion, + .dependencies = &[_]*const Feature { &feature_alternateSextloadCvtF32Pattern, - &feature_zczFpWorkaround, &feature_fuseCryptoEor, + &feature_fuseAes, + &feature_zczGp, + &feature_zczFpWorkaround, &feature_disableLatencySchedHeuristic, - &feature_zcm, - &feature_zczFp, &feature_perfmon, &feature_fpArmv8, - &feature_fuseAes, &feature_arithBccFusion, - &feature_zczGp, + &feature_arithCbzFusion, + &feature_zczFp, + &feature_zcm, }, }; pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_crc, &feature_fpArmv8, &feature_perfmon, - &feature_crc, }, }; pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_fuseAes, &feature_usePostraScheduler, - &feature_crc, &feature_perfmon, - &feature_fuseAes, + &feature_fpArmv8, + &feature_crc, + &feature_balanceFpOps, &feature_useAa, - &feature_fpArmv8, - &feature_balanceFpOps, - &feature_customCheapAsMove, }, }; pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", - .subfeatures = &[_]*const Feature { - &feature_crc, - &feature_dotprod, + .dependencies = &[_]*const Feature { + &feature_rdm, &feature_ccpp, - &feature_uaops, - &feature_rcpc, + &feature_fuseAes, &feature_lse, - &feature_lor, - &feature_pan, - &feature_rdm, &feature_perfmon, + &feature_fpArmv8, + &feature_lor, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_fuseAes, + &feature_rcpc, + &feature_dotprod, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_fuseAes, &feature_usePostraScheduler, - &feature_crc, - &feature_fuseLiterals, &feature_perfmon, - &feature_fuseAes, &feature_fpArmv8, + &feature_crc, &feature_balanceFpOps, - &feature_customCheapAsMove, + &feature_fuseLiterals, &feature_predictableSelectExpensive, }, }; @@ -1097,196 +1097,196 @@ pub const cpu_cortexA57 = Cpu{ pub const cpu_cortexA65 = Cpu{ .name = "cortex-a65", .llvm_name = "cortex-a65", - .subfeatures = &[_]*const Feature { - &feature_ssbs, - &feature_dotprod, - &feature_crc, - &feature_uaops, - &feature_rcpc, - &feature_lse, - &feature_lor, - &feature_pan, + .dependencies = &[_]*const Feature { &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, &feature_ras, + &feature_lor, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cortexA65ae = Cpu{ .name = "cortex-a65ae", .llvm_name = "cortex-a65ae", - .subfeatures = &[_]*const Feature { - &feature_ssbs, - &feature_dotprod, - &feature_crc, - &feature_uaops, - &feature_rcpc, - &feature_lse, - &feature_lor, - &feature_pan, + .dependencies = &[_]*const Feature { &feature_rdm, + &feature_ccpp, + &feature_lse, + &feature_fpArmv8, &feature_ras, + &feature_lor, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", - .subfeatures = &[_]*const Feature { - &feature_fpArmv8, + .dependencies = &[_]*const Feature { + &feature_crc, &feature_fuseAes, + &feature_fpArmv8, &feature_perfmon, - &feature_crc, }, }; pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", - .subfeatures = &[_]*const Feature { - &feature_fpArmv8, + .dependencies = &[_]*const Feature { + &feature_crc, &feature_fuseAes, + &feature_fpArmv8, &feature_perfmon, - &feature_crc, }, }; pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", - .subfeatures = &[_]*const Feature { - &feature_crc, - &feature_dotprod, + .dependencies = &[_]*const Feature { + &feature_rdm, &feature_ccpp, - &feature_uaops, - &feature_rcpc, + &feature_fuseAes, &feature_lse, - &feature_lor, - &feature_pan, - &feature_rdm, &feature_perfmon, + &feature_fpArmv8, + &feature_lor, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_fuseAes, + &feature_rcpc, + &feature_dotprod, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", - .subfeatures = &[_]*const Feature { - &feature_crc, - &feature_ssbs, - &feature_dotprod, - &feature_uaops, - &feature_rcpc, + .dependencies = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, &feature_lse, + &feature_fpArmv8, &feature_lor, - &feature_pan, - &feature_rdm, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", - .subfeatures = &[_]*const Feature { - &feature_crc, - &feature_ssbs, - &feature_dotprod, - &feature_uaops, - &feature_rcpc, + .dependencies = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, &feature_lse, + &feature_fpArmv8, &feature_lor, - &feature_pan, - &feature_rdm, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .subfeatures = &[_]*const Feature { - &feature_arithCbzFusion, + .dependencies = &[_]*const Feature { &feature_alternateSextloadCvtF32Pattern, - &feature_zczFpWorkaround, &feature_fuseCryptoEor, + &feature_fuseAes, + &feature_zczGp, + &feature_zczFpWorkaround, &feature_disableLatencySchedHeuristic, - &feature_zcm, - &feature_zczFp, &feature_perfmon, &feature_fpArmv8, - &feature_fuseAes, &feature_arithBccFusion, - &feature_zczGp, + &feature_arithCbzFusion, + &feature_zczFp, + &feature_zcm, }, }; pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_force32bitJumpTables, + &feature_usePostraScheduler, + &feature_perfmon, + &feature_fpArmv8, + &feature_slowMisaligned128store, &feature_useReciprocalSquareRoot, - &feature_usePostraScheduler, &feature_crc, - &feature_zczFp, &feature_slowPaired128, - &feature_force32bitJumpTables, - &feature_slowMisaligned128store, - &feature_perfmon, - &feature_fpArmv8, - &feature_fuseAes, - &feature_customCheapAsMove, + &feature_zczFp, }, }; pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", - .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_crc, - &feature_zczFp, - &feature_slowPaired128, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_fuseAes, &feature_force32bitJumpTables, - &feature_slowMisaligned128store, + &feature_usePostraScheduler, &feature_perfmon, &feature_fpArmv8, - &feature_fuseAes, - &feature_customCheapAsMove, + &feature_slowMisaligned128store, + &feature_crc, + &feature_slowPaired128, + &feature_zczFp, }, }; pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", - .subfeatures = &[_]*const Feature { - &feature_fuseAddress, - &feature_usePostraScheduler, - &feature_crc, - &feature_zczFp, - &feature_fuseLiterals, - &feature_lslFast, - &feature_fuseCsel, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_fuseAes, &feature_force32bitJumpTables, + &feature_usePostraScheduler, &feature_perfmon, &feature_fpArmv8, - &feature_fuseAes, - &feature_customCheapAsMove, + &feature_fuseAddress, + &feature_fuseCsel, + &feature_lslFast, + &feature_zczFp, + &feature_crc, + &feature_fuseLiterals, &feature_predictableSelectExpensive, }, }; @@ -1294,81 +1294,81 @@ pub const cpu_exynosM3 = Cpu{ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", - .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_uaops, - &feature_fuseCsel, - &feature_force32bitJumpTables, - &feature_fuseArithLogic, - &feature_vh, - &feature_arithBccFusion, - &feature_zczGp, - &feature_usePostraScheduler, - &feature_dotprod, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, &feature_lse, - &feature_pan, - &feature_ras, - &feature_fuseAes, + &feature_perfmon, &feature_fuseAddress, - &feature_rdm, + &feature_dotprod, &feature_arithCbzFusion, - &feature_crc, &feature_zczFp, + &feature_fuseArithLogic, + &feature_ccpp, + &feature_fuseAes, + &feature_fuseCsel, + &feature_rdm, + &feature_zczGp, + &feature_force32bitJumpTables, + &feature_usePostraScheduler, &feature_lslFast, - &feature_lor, - &feature_perfmon, + &feature_crc, + &feature_fuseLiterals, + &feature_pan, &feature_fpArmv8, - &feature_ccpp, - &feature_customCheapAsMove, + &feature_lor, + &feature_ras, + &feature_vh, + &feature_arithBccFusion, + &feature_uaops, }, }; pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", - .subfeatures = &[_]*const Feature { - &feature_fuseLiterals, - &feature_uaops, - &feature_fuseCsel, - &feature_force32bitJumpTables, - &feature_fuseArithLogic, - &feature_vh, - &feature_arithBccFusion, - &feature_zczGp, - &feature_usePostraScheduler, - &feature_dotprod, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, &feature_lse, - &feature_pan, - &feature_ras, - &feature_fuseAes, + &feature_perfmon, &feature_fuseAddress, - &feature_rdm, + &feature_dotprod, &feature_arithCbzFusion, - &feature_crc, &feature_zczFp, + &feature_fuseArithLogic, + &feature_ccpp, + &feature_fuseAes, + &feature_fuseCsel, + &feature_rdm, + &feature_zczGp, + &feature_force32bitJumpTables, + &feature_usePostraScheduler, &feature_lslFast, - &feature_lor, - &feature_perfmon, + &feature_crc, + &feature_fuseLiterals, + &feature_pan, &feature_fpArmv8, - &feature_ccpp, - &feature_customCheapAsMove, + &feature_lor, + &feature_ras, + &feature_vh, + &feature_arithBccFusion, + &feature_uaops, }, }; pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_rdm, + &feature_zczGp, &feature_usePostraScheduler, - &feature_crc, - &feature_zczFp, + &feature_perfmon, + &feature_fpArmv8, &feature_lslFast, + &feature_zczFp, + &feature_crc, &feature_slowStrqroStore, - &feature_rdm, - &feature_perfmon, - &feature_fpArmv8, - &feature_zczGp, - &feature_customCheapAsMove, &feature_predictableSelectExpensive, }, }; @@ -1376,7 +1376,7 @@ pub const cpu_falkor = Cpu{ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_trbe, &feature_ete, &feature_fpArmv8, @@ -1390,15 +1390,15 @@ pub const cpu_generic = Cpu{ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_zczGp, &feature_usePostraScheduler, - &feature_crc, - &feature_zczFp, - &feature_lslFast, &feature_perfmon, &feature_fpArmv8, - &feature_zczGp, - &feature_customCheapAsMove, + &feature_lslFast, + &feature_zczFp, + &feature_crc, &feature_predictableSelectExpensive, }, }; @@ -1406,89 +1406,89 @@ pub const cpu_kryo = Cpu{ pub const cpu_neoverseE1 = Cpu{ .name = "neoverse-e1", .llvm_name = "neoverse-e1", - .subfeatures = &[_]*const Feature { - &feature_crc, - &feature_ssbs, - &feature_dotprod, - &feature_uaops, - &feature_rcpc, + .dependencies = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, &feature_lse, + &feature_fpArmv8, &feature_lor, - &feature_pan, - &feature_rdm, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, }, }; pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", - .subfeatures = &[_]*const Feature { - &feature_ssbs, - &feature_dotprod, - &feature_crc, - &feature_uaops, - &feature_rcpc, + .dependencies = &[_]*const Feature { + &feature_rdm, + &feature_ccpp, &feature_lse, - &feature_spe, + &feature_fpArmv8, &feature_lor, - &feature_pan, - &feature_rdm, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_ccpp, + &feature_rcpc, + &feature_dotprod, + &feature_ssbs, + &feature_uaops, + &feature_crc, + &feature_pan, + &feature_spe, }, }; pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", - .subfeatures = &[_]*const Feature { - &feature_uaops, - &feature_vh, - &feature_nv, - &feature_zczGp, - &feature_mpam, - &feature_predictableSelectExpensive, - &feature_am, - &feature_usePostraScheduler, - &feature_dotprod, - &feature_rcpc, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, &feature_lse, - &feature_pan, - &feature_ras, - &feature_tlbRmi, + &feature_fmi, + &feature_perfmon, &feature_sel2, - &feature_rdm, - &feature_ccidx, + &feature_dotprod, + &feature_am, + &feature_zczFp, + &feature_mpam, + &feature_ccpp, &feature_dit, - &feature_crc, - &feature_zczFp, - &feature_lslFast, - &feature_fmi, - &feature_spe, - &feature_lor, - &feature_perfmon, - &feature_fpArmv8, - &feature_ccpp, &feature_tracev84, - &feature_customCheapAsMove, + &feature_spe, + &feature_rdm, + &feature_zczGp, + &feature_usePostraScheduler, + &feature_nv, + &feature_tlbRmi, + &feature_lslFast, + &feature_crc, + &feature_pan, + &feature_ccidx, + &feature_fpArmv8, + &feature_ras, + &feature_lor, + &feature_vh, + &feature_rcpc, + &feature_uaops, &feature_pa, + &feature_predictableSelectExpensive, }, }; pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_usePostraScheduler, - &feature_crc, &feature_perfmon, &feature_fpArmv8, + &feature_crc, &feature_predictableSelectExpensive, }, }; @@ -1496,17 +1496,17 @@ pub const cpu_thunderx = Cpu{ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", - .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_crc, + .dependencies = &[_]*const Feature { + &feature_rdm, &feature_lse, - &feature_lor, + &feature_usePostraScheduler, &feature_aggressiveFma, - &feature_pan, - &feature_rdm, - &feature_vh, &feature_fpArmv8, + &feature_lor, + &feature_vh, &feature_arithBccFusion, + &feature_crc, + &feature_pan, &feature_predictableSelectExpensive, }, }; @@ -1514,11 +1514,11 @@ pub const cpu_thunderx2t99 = Cpu{ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_usePostraScheduler, - &feature_crc, &feature_perfmon, &feature_fpArmv8, + &feature_crc, &feature_predictableSelectExpensive, }, }; @@ -1526,11 +1526,11 @@ pub const cpu_thunderxt81 = Cpu{ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_usePostraScheduler, - &feature_crc, &feature_perfmon, &feature_fpArmv8, + &feature_crc, &feature_predictableSelectExpensive, }, }; @@ -1538,11 +1538,11 @@ pub const cpu_thunderxt83 = Cpu{ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_usePostraScheduler, - &feature_crc, &feature_perfmon, &feature_fpArmv8, + &feature_crc, &feature_predictableSelectExpensive, }, }; @@ -1550,23 +1550,23 @@ pub const cpu_thunderxt88 = Cpu{ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", - .subfeatures = &[_]*const Feature { - &feature_usePostraScheduler, - &feature_crc, - &feature_dotprod, + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_rdm, &feature_ccpp, - &feature_uaops, + &feature_fuseAes, &feature_lse, - &feature_lor, - &feature_spe, - &feature_pan, - &feature_rdm, + &feature_usePostraScheduler, &feature_perfmon, + &feature_fpArmv8, + &feature_lor, &feature_ras, &feature_vh, - &feature_fpArmv8, - &feature_fuseAes, - &feature_customCheapAsMove, + &feature_dotprod, + &feature_uaops, + &feature_crc, + &feature_pan, + &feature_spe, }, }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 5f6fe8dcf6ffb2e166b4b54afd3e37efc66d7c58..b428615124292f136db61cea067683209212f862 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -4,196 +4,196 @@ const Cpu = @import("std").target.Cpu; pub const feature_BitInsts16 = Feature{ .name = "16-bit-insts", .description = "Has i16/f16 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_addNoCarryInsts = Feature{ .name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_apertureRegs = Feature{ .name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_atomicFaddInsts = Feature{ .name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_autoWaitcntBeforeBarrier = Feature{ .name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ciInsts = Feature{ .name = "ci-insts", .description = "Additional instructions for CI+", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_codeObjectV3 = Feature{ .name = "code-object-v3", .description = "Generate code object version 3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cumode = Feature{ .name = "cumode", .description = "Enable CU wavefront execution mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dlInsts = Feature{ .name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dpp = Feature{ .name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dpp8 = Feature{ .name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noSramEccSupport = Feature{ .name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noXnackSupport = Feature{ .name = "no-xnack-support", .description = "Hardware does not support XNACK", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot1Insts = Feature{ .name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot2Insts = Feature{ .name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot3Insts = Feature{ .name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot4Insts = Feature{ .name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot5Insts = Feature{ .name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dot6Insts = Feature{ .name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_DumpCode = Feature{ .name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dumpcode = Feature{ .name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_enableDs128 = Feature{ .name = "enable-ds128", .description = "Use ds_{read|write}_b128", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loadStoreOpt = Feature{ .name = "load-store-opt", .description = "Enable SI load/store optimizer pass", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_enablePrtStrictNull = Feature{ .name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_siScheduler = Feature{ .name = "si-scheduler", .description = "Enable SI Machine Scheduler", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_unsafeDsOffsetFolding = Feature{ .name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fmaf = Feature{ .name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp16Denormals = Feature{ .name = "fp16-denormals", .description = "Enable half precision denormal handling", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp64, }, }; @@ -201,21 +201,21 @@ pub const feature_fp16Denormals = Feature{ pub const feature_fp32Denormals = Feature{ .name = "fp32-denormals", .description = "Enable single precision denormal handling", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp64 = Feature{ .name = "fp64", .description = "Enable double precision operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp64Denormals = Feature{ .name = "fp64-denormals", .description = "Enable double and half precision denormal handling", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp64, }, }; @@ -223,7 +223,7 @@ pub const feature_fp64Denormals = Feature{ pub const feature_fp64Fp16Denormals = Feature{ .name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp64, }, }; @@ -231,497 +231,497 @@ pub const feature_fp64Fp16Denormals = Feature{ pub const feature_fpExceptions = Feature{ .name = "fp-exceptions", .description = "Enable floating point exceptions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastFmaf = Feature{ .name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatAddressSpace = Feature{ .name = "flat-address-space", .description = "Support flat address space", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatForGlobal = Feature{ .name = "flat-for-global", .description = "Force to generate flat instruction for global", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatGlobalInsts = Feature{ .name = "flat-global-insts", .description = "Have global_* flat memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatInstOffsets = Feature{ .name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatScratchInsts = Feature{ .name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_flatSegmentOffsetBug = Feature{ .name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fmaMixInsts = Feature{ .name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gcn3Encoding = Feature{ .name = "gcn3-encoding", .description = "Encoding format for VI", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gfx7Gfx8Gfx9Insts = Feature{ .name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gfx8Insts = Feature{ .name = "gfx8-insts", .description = "Additional instructions for GFX8+", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gfx9Insts = Feature{ .name = "gfx9-insts", .description = "Additional instructions for GFX9+", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gfx10Insts = Feature{ .name = "gfx10-insts", .description = "Additional instructions for GFX10+", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_instFwdPrefetchBug = Feature{ .name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_intClampInsts = Feature{ .name = "int-clamp-insts", .description = "Support clamp for integer destination", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_inv2piInlineImm = Feature{ .name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ldsbankcount16 = Feature{ .name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ldsbankcount32 = Feature{ .name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ldsBranchVmemWarHazard = Feature{ .name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ldsMisalignedBug = Feature{ .name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_localmemorysize0 = Feature{ .name = "localmemorysize0", .description = "The size of local memory in bytes", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_localmemorysize32768 = Feature{ .name = "localmemorysize32768", .description = "The size of local memory in bytes", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_localmemorysize65536 = Feature{ .name = "localmemorysize65536", .description = "The size of local memory in bytes", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_maiInsts = Feature{ .name = "mai-insts", .description = "Has mAI instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mfmaInlineLiteralBug = Feature{ .name = "mfma-inline-literal-bug", .description = "MFMA cannot use inline literal as SrcC", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mimgR128 = Feature{ .name = "mimg-r128", .description = "Support 128-bit texture resources", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_madMixInsts = Feature{ .name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_maxPrivateElementSize4 = Feature{ .name = "max-private-element-size-4", .description = "Maximum private access size may be 4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_maxPrivateElementSize8 = Feature{ .name = "max-private-element-size-8", .description = "Maximum private access size may be 8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_maxPrivateElementSize16 = Feature{ .name = "max-private-element-size-16", .description = "Maximum private access size may be 16", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_movrel = Feature{ .name = "movrel", .description = "Has v_movrel*_b32 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nsaEncoding = Feature{ .name = "nsa-encoding", .description = "Support NSA encoding for image instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nsaToVmemBug = Feature{ .name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noDataDepHazard = Feature{ .name = "no-data-dep-hazard", .description = "Does not need SW waitstates", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noSdstCmpx = Feature{ .name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_offset3fBug = Feature{ .name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_pkFmacF16Inst = Feature{ .name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_promoteAlloca = Feature{ .name = "promote-alloca", .description = "Enable promote alloca pass", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_r128A16 = Feature{ .name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_registerBanking = Feature{ .name = "register-banking", .description = "Has register banking", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwa = Feature{ .name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwaMav = Feature{ .name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwaOmod = Feature{ .name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwaOutModsVopc = Feature{ .name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwaScalar = Feature{ .name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sdwaSdst = Feature{ .name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sgprInitBug = Feature{ .name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_smemToVectorWriteHazard = Feature{ .name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sMemrealtime = Feature{ .name = "s-memrealtime", .description = "Has s_memrealtime instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sramEcc = Feature{ .name = "sram-ecc", .description = "Enable SRAM ECC", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_scalarAtomics = Feature{ .name = "scalar-atomics", .description = "Has atomic scalar memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_scalarFlatScratchInsts = Feature{ .name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_scalarStores = Feature{ .name = "scalar-stores", .description = "Has store scalar memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_trapHandler = Feature{ .name = "trap-handler", .description = "Trap handler support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_trigReducedRange = Feature{ .name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_unalignedBufferAccess = Feature{ .name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_unalignedScratchAccess = Feature{ .name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_unpackedD16Vmem = Feature{ .name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vgprIndexMode = Feature{ .name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vmemToScalarWriteHazard = Feature{ .name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vop3Literal = Feature{ .name = "vop3-literal", .description = "Can use one literal in VOP3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vop3p = Feature{ .name = "vop3p", .description = "Has VOP3P packed instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vcmpxExecWarHazard = Feature{ .name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vcmpxPermlaneHazard = Feature{ .name = "vcmpx-permlane-hazard", .description = "TODO: describe me", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vscnt = Feature{ .name = "vscnt", .description = "Has separate store vscnt counter", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_wavefrontsize16 = Feature{ .name = "wavefrontsize16", .description = "The number of threads per wavefront", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_wavefrontsize32 = Feature{ .name = "wavefrontsize32", .description = "The number of threads per wavefront", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_wavefrontsize64 = Feature{ .name = "wavefrontsize64", .description = "The number of threads per wavefront", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xnack = Feature{ .name = "xnack", .description = "Enable XNACK support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_halfRate64Ops = Feature{ .name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -834,53 +834,53 @@ pub const features = &[_]*const Feature { pub const cpu_bonaire = Cpu{ .name = "bonaire", .llvm_name = "bonaire", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_carrizo = Cpu{ .name = "carrizo", .llvm_name = "carrizo", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, &feature_xnack, &feature_halfRate64Ops, }, @@ -889,40 +889,40 @@ pub const cpu_carrizo = Cpu{ pub const cpu_fiji = Cpu{ .name = "fiji", .llvm_name = "fiji", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_wavefrontsize64, }, }; @@ -930,7 +930,7 @@ pub const cpu_generic = Cpu{ pub const cpu_genericHsa = Cpu{ .name = "generic-hsa", .llvm_name = "generic-hsa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_flatAddressSpace, &feature_wavefrontsize64, }, @@ -939,45 +939,45 @@ pub const cpu_genericHsa = Cpu{ pub const cpu_gfx1010 = Cpu{ .name = "gfx1010", .llvm_name = "gfx1010", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_mimgR128, + &feature_noSdstCmpx, + &feature_flatScratchInsts, + &feature_fp64, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_dpp8, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_vop3Literal, + &feature_apertureRegs, + &feature_mimgR128, + &feature_sdwaScalar, &feature_ciInsts, + &feature_noSramEccSupport, &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_registerBanking, - &feature_apertureRegs, - &feature_flatGlobalInsts, - &feature_fp64, + &feature_gfx8Insts, + &feature_intClampInsts, &feature_vscnt, - &feature_flatScratchInsts, - &feature_dpp, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, - &feature_sdwaSdst, &feature_movrel, &feature_localmemorysize65536, - &feature_noSdstCmpx, - &feature_pkFmacF16Inst, - &feature_noSramEccSupport, - &feature_vop3Literal, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, &feature_gfx10Insts, - &feature_sdwa, - &feature_intClampInsts, - &feature_noDataDepHazard, - &feature_fmaMixInsts, + &feature_flatGlobalInsts, &feature_sdwaOmod, + &feature_dpp8, + &feature_pkFmacF16Inst, + &feature_dpp, + &feature_sdwaSdst, + &feature_flatInstOffsets, + &feature_fmaMixInsts, + &feature_registerBanking, + &feature_noDataDepHazard, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -999,7 +999,7 @@ pub const cpu_gfx1010 = Cpu{ pub const cpu_gfx1011 = Cpu{ .name = "gfx1011", .llvm_name = "gfx1011", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_dlInsts, &feature_noXnackSupport, @@ -1008,40 +1008,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_mimgR128, + &feature_noSdstCmpx, + &feature_flatScratchInsts, + &feature_fp64, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_dpp8, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_vop3Literal, + &feature_apertureRegs, + &feature_mimgR128, + &feature_sdwaScalar, &feature_ciInsts, + &feature_noSramEccSupport, &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_registerBanking, - &feature_apertureRegs, - &feature_flatGlobalInsts, - &feature_fp64, + &feature_gfx8Insts, + &feature_intClampInsts, &feature_vscnt, - &feature_flatScratchInsts, - &feature_dpp, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, - &feature_sdwaSdst, &feature_movrel, &feature_localmemorysize65536, - &feature_noSdstCmpx, - &feature_pkFmacF16Inst, - &feature_noSramEccSupport, - &feature_vop3Literal, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, &feature_gfx10Insts, - &feature_sdwa, - &feature_intClampInsts, - &feature_noDataDepHazard, - &feature_fmaMixInsts, + &feature_flatGlobalInsts, &feature_sdwaOmod, + &feature_dpp8, + &feature_pkFmacF16Inst, + &feature_dpp, + &feature_sdwaSdst, + &feature_flatInstOffsets, + &feature_fmaMixInsts, + &feature_registerBanking, + &feature_noDataDepHazard, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1062,7 +1062,7 @@ pub const cpu_gfx1011 = Cpu{ pub const cpu_gfx1012 = Cpu{ .name = "gfx1012", .llvm_name = "gfx1012", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_dlInsts, &feature_noXnackSupport, @@ -1071,40 +1071,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_mimgR128, + &feature_noSdstCmpx, + &feature_flatScratchInsts, + &feature_fp64, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_dpp8, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_vop3Literal, + &feature_apertureRegs, + &feature_mimgR128, + &feature_sdwaScalar, &feature_ciInsts, + &feature_noSramEccSupport, &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_registerBanking, - &feature_apertureRegs, - &feature_flatGlobalInsts, - &feature_fp64, + &feature_gfx8Insts, + &feature_intClampInsts, &feature_vscnt, - &feature_flatScratchInsts, - &feature_dpp, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, - &feature_sdwaSdst, &feature_movrel, &feature_localmemorysize65536, - &feature_noSdstCmpx, - &feature_pkFmacF16Inst, - &feature_noSramEccSupport, - &feature_vop3Literal, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, &feature_gfx10Insts, - &feature_sdwa, - &feature_intClampInsts, - &feature_noDataDepHazard, - &feature_fmaMixInsts, + &feature_flatGlobalInsts, &feature_sdwaOmod, + &feature_dpp8, + &feature_pkFmacF16Inst, + &feature_dpp, + &feature_sdwaSdst, + &feature_flatInstOffsets, + &feature_fmaMixInsts, + &feature_registerBanking, + &feature_noDataDepHazard, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1126,18 +1126,18 @@ pub const cpu_gfx1012 = Cpu{ pub const cpu_gfx600 = Cpu{ .name = "gfx600", .llvm_name = "gfx600", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1145,58 +1145,58 @@ pub const cpu_gfx600 = Cpu{ pub const cpu_gfx601 = Cpu{ .name = "gfx601", .llvm_name = "gfx601", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_gfx700 = Cpu{ .name = "gfx700", .llvm_name = "gfx700", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_gfx701 = Cpu{ .name = "gfx701", .llvm_name = "gfx701", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1204,94 +1204,94 @@ pub const cpu_gfx701 = Cpu{ pub const cpu_gfx702 = Cpu{ .name = "gfx702", .llvm_name = "gfx702", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount16, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_gfx703 = Cpu{ .name = "gfx703", .llvm_name = "gfx703", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_gfx704 = Cpu{ .name = "gfx704", .llvm_name = "gfx704", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_gfx801 = Cpu{ .name = "gfx801", .llvm_name = "gfx801", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, &feature_xnack, &feature_halfRate64Ops, }, @@ -1300,98 +1300,98 @@ pub const cpu_gfx801 = Cpu{ pub const cpu_gfx802 = Cpu{ .name = "gfx802", .llvm_name = "gfx802", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_gfx803 = Cpu{ .name = "gfx803", .llvm_name = "gfx803", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_gfx810 = Cpu{ .name = "gfx810", .llvm_name = "gfx810", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, &feature_xnack, }, }; @@ -1399,40 +1399,40 @@ pub const cpu_gfx810 = Cpu{ pub const cpu_gfx900 = Cpu{ .name = "gfx900", .llvm_name = "gfx900", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, &feature_madMixInsts, }, @@ -1441,39 +1441,39 @@ pub const cpu_gfx900 = Cpu{ pub const cpu_gfx902 = Cpu{ .name = "gfx902", .llvm_name = "gfx902", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1483,41 +1483,41 @@ pub const cpu_gfx902 = Cpu{ pub const cpu_gfx904 = Cpu{ .name = "gfx904", .llvm_name = "gfx904", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, }, }; @@ -1525,43 +1525,43 @@ pub const cpu_gfx904 = Cpu{ pub const cpu_gfx906 = Cpu{ .name = "gfx906", .llvm_name = "gfx906", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_dlInsts, &feature_noXnackSupport, &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, &feature_halfRate64Ops, }, @@ -1570,7 +1570,7 @@ pub const cpu_gfx906 = Cpu{ pub const cpu_gfx908 = Cpu{ .name = "gfx908", .llvm_name = "gfx908", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_atomicFaddInsts, &feature_codeObjectV3, &feature_dlInsts, @@ -1581,36 +1581,36 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, &feature_maiInsts, &feature_mfmaInlineLiteralBug, @@ -1623,38 +1623,38 @@ pub const cpu_gfx908 = Cpu{ pub const cpu_gfx909 = Cpu{ .name = "gfx909", .llvm_name = "gfx909", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, + &feature_flatScratchInsts, + &feature_fp64, &feature_r128A16, + &feature_sMemrealtime, &feature_addNoCarryInsts, - &feature_inv2piInlineImm, + &feature_vop3p, + &feature_fastFmaf, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, &feature_gfx9Insts, + &feature_flatAddressSpace, + &feature_apertureRegs, + &feature_sdwaScalar, &feature_ciInsts, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_fastFmaf, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_apertureRegs, - &feature_scalarAtomics, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, + &feature_localmemorysize65536, &feature_flatGlobalInsts, - &feature_fp64, - &feature_flatScratchInsts, + &feature_sdwaOmod, &feature_dpp, - &feature_scalarFlatScratchInsts, &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, - &feature_vop3p, - &feature_flatInstOffsets, - &feature_sdwaScalar, &feature_sdwaSdst, - &feature_localmemorysize65536, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwa, - &feature_wavefrontsize64, - &feature_intClampInsts, - &feature_sdwaOmod, + &feature_flatInstOffsets, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1664,38 +1664,38 @@ pub const cpu_gfx909 = Cpu{ pub const cpu_hainan = Cpu{ .name = "hainan", .llvm_name = "hainan", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_hawaii = Cpu{ .name = "hawaii", .llvm_name = "hawaii", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1703,225 +1703,225 @@ pub const cpu_hawaii = Cpu{ pub const cpu_iceland = Cpu{ .name = "iceland", .llvm_name = "iceland", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_kabini = Cpu{ .name = "kabini", .llvm_name = "kabini", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_kaveri = Cpu{ .name = "kaveri", .llvm_name = "kaveri", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_mullins = Cpu{ .name = "mullins", .llvm_name = "mullins", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_noSramEccSupport, &feature_flatAddressSpace, + &feature_fp64, &feature_mimgR128, - &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_ciInsts, - &feature_wavefrontsize64, - &feature_fp64, &feature_movrel, &feature_localmemorysize65536, + &feature_ciInsts, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_oland = Cpu{ .name = "oland", .llvm_name = "oland", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_pitcairn = Cpu{ .name = "pitcairn", .llvm_name = "pitcairn", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; pub const cpu_polaris10 = Cpu{ .name = "polaris10", .llvm_name = "polaris10", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_polaris11 = Cpu{ .name = "polaris11", .llvm_name = "polaris11", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_stoney = Cpu{ .name = "stoney", .llvm_name = "stoney", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, &feature_xnack, }, }; @@ -1929,18 +1929,18 @@ pub const cpu_stoney = Cpu{ pub const cpu_tahiti = Cpu{ .name = "tahiti", .llvm_name = "tahiti", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1948,51 +1948,51 @@ pub const cpu_tahiti = Cpu{ pub const cpu_tonga = Cpu{ .name = "tonga", .llvm_name = "tonga", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, + &feature_fp64, + &feature_sMemrealtime, + &feature_BitInsts16, + &feature_wavefrontsize64, + &feature_sdwa, + &feature_flatAddressSpace, + &feature_sdwaMav, &feature_mimgR128, - &feature_inv2piInlineImm, &feature_ciInsts, + &feature_noSramEccSupport, + &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_scalarStores, &feature_gcn3Encoding, - &feature_fp64, - &feature_dpp, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sMemrealtime, + &feature_gfx8Insts, + &feature_scalarStores, + &feature_intClampInsts, &feature_movrel, &feature_localmemorysize65536, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_flatAddressSpace, - &feature_BitInsts16, - &feature_sdwaMav, - &feature_sdwa, &feature_sdwaOutModsVopc, - &feature_wavefrontsize64, - &feature_intClampInsts, + &feature_dpp, + &feature_gfx7Gfx8Gfx9Insts, + &feature_trigReducedRange, }, }; pub const cpu_verde = Cpu{ .name = "verde", .llvm_name = "verde", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_noSramEccSupport, - &feature_mimgR128, - &feature_trigReducedRange, - &feature_wavefrontsize64, &feature_localmemorysize32768, &feature_fp64, + &feature_mimgR128, &feature_movrel, + &feature_noSramEccSupport, + &feature_wavefrontsize64, + &feature_trigReducedRange, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 73f2d3ead9eaa1ff6a03a9d9366e27bf92da5f77..964b2882af7b2bd511b1270febea273c1441a6c4 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -4,146 +4,146 @@ const Cpu = @import("std").target.Cpu; pub const feature_msecext8 = Feature{ .name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_aclass = Feature{ .name = "aclass", .description = "Is application profile ('A' series)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES support", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_acquireRelease = Feature{ .name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avoidMovsShop = Feature{ .name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avoidPartialCpsr = Feature{ .name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_crc = Feature{ .name = "crc", .description = "Enable support for CRC instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cheapPredicableCpsr = Feature{ .name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vldnAlign = Feature{ .name = "vldn-align", .description = "Check for VLDn unaligned access", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable support for Cryptography extensions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_d32 = Feature{ .name = "d32", .description = "Extend FP to 32 double registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_db = Feature{ .name = "db", .description = "Has data barrier (dmb/dsb) instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dfb = Feature{ .name = "dfb", .description = "Has full data barrier (dfb) instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dsp = Feature{ .name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dontWidenVmovs = Feature{ .name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dotprod = Feature{ .name = "dotprod", .description = "Enable support for dot product instructions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_executeOnly = Feature{ .name = "execute-only", .description = "Enable the generation of execute only code.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_expandFpMlx = Feature{ .name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp16 = Feature{ .name = "fp16", .description = "Enable half-precision floating point", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp16fml = Feature{ .name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp16, &feature_fpregs, }, @@ -152,7 +152,7 @@ pub const feature_fp16fml = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", .description = "Floating point unit supports double precision", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -160,24 +160,24 @@ pub const feature_fp64 = Feature{ pub const feature_fpao = Feature{ .name = "fpao", .description = "Enable fast computation of positive address offsets", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", .description = "Enable ARMv8 FP", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, &feature_d32, + &feature_fp16, }, }; pub const feature_fpArmv8d16 = Feature{ .name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp16, &feature_fpregs, }, @@ -186,7 +186,7 @@ pub const feature_fpArmv8d16 = Feature{ pub const feature_fpArmv8d16sp = Feature{ .name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fp16, &feature_fpregs, }, @@ -195,24 +195,24 @@ pub const feature_fpArmv8d16sp = Feature{ pub const feature_fpArmv8sp = Feature{ .name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, &feature_d32, + &feature_fp16, }, }; pub const feature_fpregs = Feature{ .name = "fpregs", .description = "Enable FP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fpregs16 = Feature{ .name = "fpregs16", .description = "Enable 16-bit FP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -220,7 +220,7 @@ pub const feature_fpregs16 = Feature{ pub const feature_fpregs64 = Feature{ .name = "fpregs64", .description = "Enable 64-bit FP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -228,314 +228,314 @@ pub const feature_fpregs64 = Feature{ pub const feature_fullfp16 = Feature{ .name = "fullfp16", .description = "Enable full half-precision floating point", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, + &feature_fp16, }, }; pub const feature_fuseAes = Feature{ .name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", .description = "CPU fuses literal generation operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_hwdivArm = Feature{ .name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_hwdiv = Feature{ .name = "hwdiv", .description = "Enable divide instructions in Thumb", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noBranchPredictor = Feature{ .name = "no-branch-predictor", .description = "Has no branch predictor", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_retAddrStack = Feature{ .name = "ret-addr-stack", .description = "Has return address stack", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowfpvmlx = Feature{ .name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vmlxHazards = Feature{ .name = "vmlx-hazards", .description = "Has VMLx hazards", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lob = Feature{ .name = "lob", .description = "Enable Low Overhead Branch extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Generate calls via indirect call instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mclass = Feature{ .name = "mclass", .description = "Is microcontroller profile ('M' series)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mp = Feature{ .name = "mp", .description = "Supports Multiprocessing extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mve1beat = Feature{ .name = "mve1beat", .description = "Model MVE instructions as a 1 beat per tick architecture", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mve2beat = Feature{ .name = "mve2beat", .description = "Model MVE instructions as a 2 beats per tick architecture", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mve4beat = Feature{ .name = "mve4beat", .description = "Model MVE instructions as a 4 beats per tick architecture", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_muxedUnits = Feature{ .name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_neon = Feature{ .name = "neon", .description = "Enable NEON instructions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_neonfp = Feature{ .name = "neonfp", .description = "Use NEON for single precision FP", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_neonFpmovs = Feature{ .name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_naclTrap = Feature{ .name = "nacl-trap", .description = "NaCl trap", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noarm = Feature{ .name = "noarm", .description = "Does not support ARM mode execution", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noMovt = Feature{ .name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_disablePostraScheduler = Feature{ .name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nonpipelinedVfp = Feature{ .name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_perfmon = Feature{ .name = "perfmon", .description = "Enable support for Performance Monitor extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bit32 = Feature{ .name = "32bit", .description = "Prefer 32-bit Thumb instrs", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_preferIshst = Feature{ .name = "prefer-ishst", .description = "Prefer ISHST barriers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loopAlign = Feature{ .name = "loop-align", .description = "Prefer 32-bit alignment for loops", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_preferVmovsr = Feature{ .name = "prefer-vmovsr", .description = "Prefer VMOVSR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_profUnpr = Feature{ .name = "prof-unpr", .description = "Is profitable to unpredicate", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ras = Feature{ .name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rclass = Feature{ .name = "rclass", .description = "Is realtime profile ('R' series)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_readTpHard = Feature{ .name = "read-tp-hard", .description = "Reading thread pointer from register", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reserveR9 = Feature{ .name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sb = Feature{ .name = "sb", .description = "Enable v8.5a Speculation Barrier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sha2 = Feature{ .name = "sha2", .description = "Enable SHA1 and SHA256 support", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_slowFpBrcc = Feature{ .name = "slow-fp-brcc", .description = "FP compare + branch is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowLoadDSubreg = Feature{ .name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowOddReg = Feature{ .name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowVdup32 = Feature{ .name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowVgetlni32 = Feature{ .name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_splatVfpNeon = Feature{ .name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dontWidenVmovs, }, }; @@ -543,56 +543,56 @@ pub const feature_splatVfpNeon = Feature{ pub const feature_strictAlign = Feature{ .name = "strict-align", .description = "Disallow all unaligned memory access", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_thumb2 = Feature{ .name = "thumb2", .description = "Enable Thumb2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_trustzone = Feature{ .name = "trustzone", .description = "Enable support for TrustZone security extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useMisched = Feature{ .name = "use-misched", .description = "Use the MachineScheduler", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_wideStrideVfp = Feature{ .name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_v7clrex = Feature{ .name = "v7clrex", .description = "Has v7 clrex instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vfp2 = Feature{ .name = "vfp2", .description = "Enable VFP2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -600,7 +600,7 @@ pub const feature_vfp2 = Feature{ pub const feature_vfp2sp = Feature{ .name = "vfp2sp", .description = "Enable VFP2 instructions with no double precision", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -608,16 +608,16 @@ pub const feature_vfp2sp = Feature{ pub const feature_vfp3 = Feature{ .name = "vfp3", .description = "Enable VFP3 instructions", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_vfp3d16 = Feature{ .name = "vfp3d16", .description = "Enable VFP3 instructions with only 16 d-registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -625,7 +625,7 @@ pub const feature_vfp3d16 = Feature{ pub const feature_vfp3d16sp = Feature{ .name = "vfp3d16sp", .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_fpregs, }, }; @@ -633,61 +633,61 @@ pub const feature_vfp3d16sp = Feature{ pub const feature_vfp3sp = Feature{ .name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", - .subfeatures = &[_]*const Feature { - &feature_fpregs, + .dependencies = &[_]*const Feature { &feature_d32, + &feature_fpregs, }, }; pub const feature_vfp4 = Feature{ .name = "vfp4", .description = "Enable VFP4 instructions", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, &feature_d32, + &feature_fp16, }, }; pub const feature_vfp4d16 = Feature{ .name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, + &feature_fp16, }, }; pub const feature_vfp4d16sp = Feature{ .name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, + &feature_fp16, }, }; pub const feature_vfp4sp = Feature{ .name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", - .subfeatures = &[_]*const Feature { - &feature_fp16, + .dependencies = &[_]*const Feature { &feature_fpregs, &feature_d32, + &feature_fp16, }, }; pub const feature_vmlxForwarding = Feature{ .name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_virtualization = Feature{ .name = "virtualization", .description = "Supports Virtualization extension", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hwdiv, &feature_hwdivArm, }, @@ -696,7 +696,7 @@ pub const feature_virtualization = Feature{ pub const feature_zcz = Feature{ .name = "zcz", .description = "Has zero-cycle zeroing instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -799,42 +799,42 @@ pub const features = &[_]*const Feature { pub const cpu_arm1020e = Cpu{ .name = "arm1020e", .llvm_name = "arm1020e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm1020t = Cpu{ .name = "arm1020t", .llvm_name = "arm1020t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm1022e = Cpu{ .name = "arm1022e", .llvm_name = "arm1022e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm10e = Cpu{ .name = "arm10e", .llvm_name = "arm10e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm10tdmi = Cpu{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm1136jS = Cpu{ .name = "arm1136j-s", .llvm_name = "arm1136j-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dsp, }, }; @@ -842,7 +842,7 @@ pub const cpu_arm1136jS = Cpu{ pub const cpu_arm1136jfS = Cpu{ .name = "arm1136jf-s", .llvm_name = "arm1136jf-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dsp, &feature_slowfpvmlx, &feature_fpregs, @@ -853,18 +853,18 @@ pub const cpu_arm1136jfS = Cpu{ pub const cpu_arm1156t2S = Cpu{ .name = "arm1156t2-s", .llvm_name = "arm1156t2-s", - .subfeatures = &[_]*const Feature { - &feature_dsp, + .dependencies = &[_]*const Feature { &feature_thumb2, + &feature_dsp, }, }; pub const cpu_arm1156t2fS = Cpu{ .name = "arm1156t2f-s", .llvm_name = "arm1156t2f-s", - .subfeatures = &[_]*const Feature { - &feature_dsp, + .dependencies = &[_]*const Feature { &feature_thumb2, + &feature_dsp, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -874,7 +874,7 @@ pub const cpu_arm1156t2fS = Cpu{ pub const cpu_arm1176jS = Cpu{ .name = "arm1176j-s", .llvm_name = "arm1176j-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_trustzone, }, }; @@ -882,7 +882,7 @@ pub const cpu_arm1176jS = Cpu{ pub const cpu_arm1176jzS = Cpu{ .name = "arm1176jz-s", .llvm_name = "arm1176jz-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_trustzone, }, }; @@ -890,7 +890,7 @@ pub const cpu_arm1176jzS = Cpu{ pub const cpu_arm1176jzfS = Cpu{ .name = "arm1176jzf-s", .llvm_name = "arm1176jzf-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_trustzone, &feature_slowfpvmlx, &feature_fpregs, @@ -901,134 +901,134 @@ pub const cpu_arm1176jzfS = Cpu{ pub const cpu_arm710t = Cpu{ .name = "arm710t", .llvm_name = "arm710t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm720t = Cpu{ .name = "arm720t", .llvm_name = "arm720t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm7tdmi = Cpu{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm7tdmiS = Cpu{ .name = "arm7tdmi-s", .llvm_name = "arm7tdmi-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm8 = Cpu{ .name = "arm8", .llvm_name = "arm8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm810 = Cpu{ .name = "arm810", .llvm_name = "arm810", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm9 = Cpu{ .name = "arm9", .llvm_name = "arm9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm920 = Cpu{ .name = "arm920", .llvm_name = "arm920", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm920t = Cpu{ .name = "arm920t", .llvm_name = "arm920t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm922t = Cpu{ .name = "arm922t", .llvm_name = "arm922t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm926ejS = Cpu{ .name = "arm926ej-s", .llvm_name = "arm926ej-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm940t = Cpu{ .name = "arm940t", .llvm_name = "arm940t", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm946eS = Cpu{ .name = "arm946e-s", .llvm_name = "arm946e-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm966eS = Cpu{ .name = "arm966e-s", .llvm_name = "arm966e-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm968eS = Cpu{ .name = "arm968e-s", .llvm_name = "arm968e-s", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm9e = Cpu{ .name = "arm9e", .llvm_name = "arm9e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arm9tdmi = Cpu{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_cortexA12 = Cpu{ .name = "cortex-a12", .llvm_name = "cortex-a12", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1045,15 +1045,15 @@ pub const cpu_cortexA12 = Cpu{ pub const cpu_cortexA15 = Cpu{ .name = "cortex-a15", .llvm_name = "cortex-a15", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_dontWidenVmovs, @@ -1073,15 +1073,15 @@ pub const cpu_cortexA15 = Cpu{ pub const cpu_cortexA17 = Cpu{ .name = "cortex-a17", .llvm_name = "cortex-a17", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1098,22 +1098,22 @@ pub const cpu_cortexA17 = Cpu{ pub const cpu_cortexA32 = Cpu{ .name = "cortex-a32", .llvm_name = "cortex-a32", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, }, }; @@ -1121,22 +1121,22 @@ pub const cpu_cortexA32 = Cpu{ pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, }, }; @@ -1144,15 +1144,15 @@ pub const cpu_cortexA35 = Cpu{ pub const cpu_cortexA5 = Cpu{ .name = "cortex-a5", .llvm_name = "cortex-a5", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_mp, @@ -1167,22 +1167,22 @@ pub const cpu_cortexA5 = Cpu{ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, &feature_fpao, }, @@ -1191,23 +1191,23 @@ pub const cpu_cortexA53 = Cpu{ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_dotprod, }, }; @@ -1215,22 +1215,22 @@ pub const cpu_cortexA55 = Cpu{ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, &feature_crypto, @@ -1241,15 +1241,15 @@ pub const cpu_cortexA57 = Cpu{ pub const cpu_cortexA7 = Cpu{ .name = "cortex-a7", .llvm_name = "cortex-a7", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1268,22 +1268,22 @@ pub const cpu_cortexA7 = Cpu{ pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, }, }; @@ -1291,22 +1291,22 @@ pub const cpu_cortexA72 = Cpu{ pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, }, }; @@ -1314,23 +1314,23 @@ pub const cpu_cortexA73 = Cpu{ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_dotprod, }, }; @@ -1338,23 +1338,23 @@ pub const cpu_cortexA75 = Cpu{ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1364,23 +1364,23 @@ pub const cpu_cortexA76 = Cpu{ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1390,15 +1390,15 @@ pub const cpu_cortexA76ae = Cpu{ pub const cpu_cortexA8 = Cpu{ .name = "cortex-a8", .llvm_name = "cortex-a8", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1412,15 +1412,15 @@ pub const cpu_cortexA8 = Cpu{ pub const cpu_cortexA9 = Cpu{ .name = "cortex-a9", .llvm_name = "cortex-a9", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_expandFpMlx, @@ -1439,48 +1439,48 @@ pub const cpu_cortexA9 = Cpu{ pub const cpu_cortexM0 = Cpu{ .name = "cortex-m0", .llvm_name = "cortex-m0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_db, + &feature_mclass, &feature_strictAlign, &feature_noarm, - &feature_mclass, }, }; pub const cpu_cortexM0plus = Cpu{ .name = "cortex-m0plus", .llvm_name = "cortex-m0plus", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_db, + &feature_mclass, &feature_strictAlign, &feature_noarm, - &feature_mclass, }, }; pub const cpu_cortexM1 = Cpu{ .name = "cortex-m1", .llvm_name = "cortex-m1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_db, + &feature_mclass, &feature_strictAlign, &feature_noarm, - &feature_mclass, }, }; pub const cpu_cortexM23 = Cpu{ .name = "cortex-m23", .llvm_name = "cortex-m23", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_msecext8, + .dependencies = &[_]*const Feature { + &feature_mclass, &feature_db, + &feature_msecext8, &feature_strictAlign, &feature_acquireRelease, - &feature_noarm, + &feature_hwdiv, &feature_v7clrex, - &feature_mclass, + &feature_noarm, &feature_noMovt, }, }; @@ -1488,14 +1488,14 @@ pub const cpu_cortexM23 = Cpu{ pub const cpu_cortexM3 = Cpu{ .name = "cortex-m3", .llvm_name = "cortex-m3", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_v7clrex, + &feature_db, &feature_mclass, &feature_thumb2, + &feature_hwdiv, + &feature_v7clrex, + &feature_noarm, &feature_noBranchPredictor, &feature_loopAlign, &feature_useAa, @@ -1506,16 +1506,16 @@ pub const cpu_cortexM3 = Cpu{ pub const cpu_cortexM33 = Cpu{ .name = "cortex-m33", .llvm_name = "cortex-m33", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_msecext8, - &feature_db, - &feature_acquireRelease, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_v7clrex, &feature_mclass, + &feature_db, + &feature_msecext8, &feature_thumb2, + &feature_acquireRelease, + &feature_hwdiv, + &feature_v7clrex, + &feature_noarm, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -1531,16 +1531,16 @@ pub const cpu_cortexM33 = Cpu{ pub const cpu_cortexM35p = Cpu{ .name = "cortex-m35p", .llvm_name = "cortex-m35p", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_msecext8, - &feature_db, - &feature_acquireRelease, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_v7clrex, &feature_mclass, + &feature_db, + &feature_msecext8, &feature_thumb2, + &feature_acquireRelease, + &feature_hwdiv, + &feature_v7clrex, + &feature_noarm, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -1556,22 +1556,22 @@ pub const cpu_cortexM35p = Cpu{ pub const cpu_cortexM4 = Cpu{ .name = "cortex-m4", .llvm_name = "cortex-m4", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_mclass, &feature_thumb2, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, + &feature_noarm, &feature_noBranchPredictor, &feature_slowfpvmlx, &feature_loopAlign, &feature_useAa, &feature_useMisched, - &feature_fp16, &feature_fpregs, + &feature_fp16, &feature_vfp4d16sp, }, }; @@ -1579,15 +1579,15 @@ pub const cpu_cortexM4 = Cpu{ pub const cpu_cortexM7 = Cpu{ .name = "cortex-m7", .llvm_name = "cortex-m7", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_mclass, &feature_thumb2, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, + &feature_noarm, &feature_fp16, &feature_fpregs, &feature_fpArmv8d16, @@ -1597,14 +1597,14 @@ pub const cpu_cortexM7 = Cpu{ pub const cpu_cortexR4 = Cpu{ .name = "cortex-r4", .llvm_name = "cortex-r4", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_thumb2, + &feature_rclass, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, &feature_avoidPartialCpsr, &feature_retAddrStack, }, @@ -1613,14 +1613,14 @@ pub const cpu_cortexR4 = Cpu{ pub const cpu_cortexR4f = Cpu{ .name = "cortex-r4f", .llvm_name = "cortex-r4f", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_thumb2, + &feature_rclass, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1633,14 +1633,14 @@ pub const cpu_cortexR4f = Cpu{ pub const cpu_cortexR5 = Cpu{ .name = "cortex-r5", .llvm_name = "cortex-r5", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_thumb2, + &feature_rclass, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, &feature_avoidPartialCpsr, &feature_hwdivArm, &feature_retAddrStack, @@ -1654,22 +1654,22 @@ pub const cpu_cortexR5 = Cpu{ pub const cpu_cortexR52 = Cpu{ .name = "cortex-r52", .llvm_name = "cortex-r52", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, + &feature_rclass, &feature_mp, + &feature_acquireRelease, + &feature_hwdiv, + &feature_v7clrex, &feature_dfb, - &feature_hwdivArm, &feature_dsp, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_fpao, &feature_useAa, &feature_useMisched, @@ -1679,14 +1679,14 @@ pub const cpu_cortexR52 = Cpu{ pub const cpu_cortexR7 = Cpu{ .name = "cortex-r7", .llvm_name = "cortex-r7", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_thumb2, + &feature_rclass, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1702,14 +1702,14 @@ pub const cpu_cortexR7 = Cpu{ pub const cpu_cortexR8 = Cpu{ .name = "cortex-r8", .llvm_name = "cortex-r8", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_rclass, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_dsp, - &feature_v7clrex, + &feature_db, &feature_thumb2, + &feature_rclass, + &feature_hwdiv, + &feature_v7clrex, + &feature_dsp, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1725,22 +1725,22 @@ pub const cpu_cortexR8 = Cpu{ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_crypto, @@ -1757,217 +1757,217 @@ pub const cpu_cyclone = Cpu{ pub const cpu_ep9312 = Cpu{ .name = "ep9312", .llvm_name = "ep9312", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, - &feature_slowVdup32, - &feature_expandFpMlx, - &feature_slowVgetlni32, &feature_fuseLiterals, + &feature_profUnpr, &feature_wideStrideVfp, - &feature_slowFpBrcc, - &feature_retAddrStack, + &feature_slowVdup32, + &feature_slowVgetlni32, &feature_dontWidenVmovs, - &feature_zcz, &feature_fuseAes, - &feature_slowfpvmlx, - &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_zcz, &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, }, }; pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, - &feature_slowVdup32, - &feature_expandFpMlx, - &feature_slowVgetlni32, &feature_fuseLiterals, + &feature_profUnpr, &feature_wideStrideVfp, - &feature_slowFpBrcc, - &feature_retAddrStack, + &feature_slowVdup32, + &feature_slowVgetlni32, &feature_dontWidenVmovs, - &feature_zcz, &feature_fuseAes, - &feature_slowfpvmlx, - &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_zcz, &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, }, }; pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, - &feature_slowVdup32, - &feature_expandFpMlx, - &feature_slowVgetlni32, &feature_fuseLiterals, + &feature_profUnpr, &feature_wideStrideVfp, - &feature_slowFpBrcc, - &feature_retAddrStack, + &feature_slowVdup32, + &feature_slowVgetlni32, &feature_dontWidenVmovs, - &feature_zcz, &feature_fuseAes, - &feature_slowfpvmlx, - &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_zcz, &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, }, }; pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_dotprod, &feature_fullfp16, - &feature_slowVdup32, - &feature_expandFpMlx, - &feature_slowVgetlni32, &feature_fuseLiterals, + &feature_profUnpr, &feature_wideStrideVfp, - &feature_slowFpBrcc, - &feature_retAddrStack, + &feature_slowVdup32, + &feature_slowVgetlni32, &feature_dontWidenVmovs, - &feature_zcz, &feature_fuseAes, - &feature_slowfpvmlx, - &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_zcz, &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, }, }; pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_dotprod, &feature_fullfp16, - &feature_slowVdup32, - &feature_expandFpMlx, - &feature_slowVgetlni32, &feature_fuseLiterals, + &feature_profUnpr, &feature_wideStrideVfp, - &feature_slowFpBrcc, - &feature_retAddrStack, + &feature_slowVdup32, + &feature_slowVgetlni32, &feature_dontWidenVmovs, - &feature_zcz, &feature_fuseAes, - &feature_slowfpvmlx, - &feature_profUnpr, + &feature_retAddrStack, + &feature_expandFpMlx, + &feature_zcz, &feature_useAa, + &feature_slowfpvmlx, + &feature_slowFpBrcc, }, }; pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_iwmmxt = Cpu{ .name = "iwmmxt", .llvm_name = "iwmmxt", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_fp16, @@ -1983,22 +1983,22 @@ pub const cpu_krait = Cpu{ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, }, }; @@ -2006,7 +2006,7 @@ pub const cpu_kryo = Cpu{ pub const cpu_mpcore = Cpu{ .name = "mpcore", .llvm_name = "mpcore", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -2016,30 +2016,30 @@ pub const cpu_mpcore = Cpu{ pub const cpu_mpcorenovfp = Cpu{ .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_trustzone, + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_hwdivArm, &feature_fpregs, &feature_db, - &feature_acquireRelease, - &feature_d32, + &feature_crc, + &feature_fp16, + &feature_ras, &feature_perfmon, + &feature_thumb2, &feature_mp, - &feature_ras, - &feature_hwdivArm, + &feature_acquireRelease, + &feature_hwdiv, + &feature_trustzone, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_fp16, - &feature_v7clrex, - &feature_crc, - &feature_thumb2, &feature_crypto, &feature_dotprod, }, @@ -2048,25 +2048,25 @@ pub const cpu_neoverseN1 = Cpu{ pub const cpu_sc000 = Cpu{ .name = "sc000", .llvm_name = "sc000", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_db, + &feature_mclass, &feature_strictAlign, &feature_noarm, - &feature_mclass, }, }; pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", - .subfeatures = &[_]*const Feature { - &feature_hwdiv, - &feature_db, + .dependencies = &[_]*const Feature { &feature_perfmon, - &feature_noarm, - &feature_v7clrex, + &feature_db, &feature_mclass, &feature_thumb2, + &feature_hwdiv, + &feature_v7clrex, + &feature_noarm, &feature_noBranchPredictor, &feature_useAa, &feature_useMisched, @@ -2076,43 +2076,43 @@ pub const cpu_sc300 = Cpu{ pub const cpu_strongarm = Cpu{ .name = "strongarm", .llvm_name = "strongarm", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_strongarm110 = Cpu{ .name = "strongarm110", .llvm_name = "strongarm110", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_strongarm1100 = Cpu{ .name = "strongarm1100", .llvm_name = "strongarm1100", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_strongarm1110 = Cpu{ .name = "strongarm1110", .llvm_name = "strongarm1110", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", - .subfeatures = &[_]*const Feature { - &feature_fpregs, - &feature_db, + .dependencies = &[_]*const Feature { &feature_d32, &feature_perfmon, + &feature_fpregs, + &feature_db, + &feature_thumb2, + &feature_v7clrex, &feature_dsp, &feature_aclass, - &feature_v7clrex, - &feature_thumb2, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_hwdivArm, @@ -2139,7 +2139,7 @@ pub const cpu_swift = Cpu{ pub const cpu_xscale = Cpu{ .name = "xscale", .llvm_name = "xscale", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 79cbb04dc458fb5e9e1f80cb492f90df69b9c4b4..de44399ceaef6b81ebf6d83c3711f3a3b2cc788e 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -4,126 +4,126 @@ const Cpu = @import("std").target.Cpu; pub const feature_addsubiw = Feature{ .name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_break = Feature{ .name = "break", .description = "The device supports the `BREAK` debugging instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_des = Feature{ .name = "des", .description = "The device supports the `DES k` encryption instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_eijmpcall = Feature{ .name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_elpm = Feature{ .name = "elpm", .description = "The device supports the ELPM instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_elpmx = Feature{ .name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ijmpcall = Feature{ .name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_jmpcall = Feature{ .name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lpm = Feature{ .name = "lpm", .description = "The device supports the `LPM` instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lpmx = Feature{ .name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_movw = Feature{ .name = "movw", .description = "The device supports the 16-bit MOVW instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mul = Feature{ .name = "mul", .description = "The device supports the multiplication instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rmw = Feature{ .name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_spm = Feature{ .name = "spm", .description = "The device supports the `SPM` instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_spmx = Feature{ .name = "spmx", .description = "The device supports the `SPM Z+` instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sram = Feature{ .name = "sram", .description = "The device has random access memory", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_smallstack = Feature{ .name = "smallstack", .description = "The device has an 8-bit stack pointer", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tinyencoding = Feature{ .name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -151,48 +151,48 @@ pub const features = &[_]*const Feature { pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, - &feature_lpm, + .dependencies = &[_]*const Feature { &feature_elpm, - &feature_sram, + &feature_lpm, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, &feature_lpmx, &feature_movw, }, @@ -201,450 +201,450 @@ pub const cpu_at86rf401 = Cpu{ pub const cpu_at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90s1200 = Cpu{ .name = "at90s1200", .llvm_name = "at90s1200", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, &feature_lpmx, &feature_movw, &feature_mul, @@ -654,326 +654,326 @@ pub const cpu_at94k = Cpu{ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, - &feature_lpm, + .dependencies = &[_]*const Feature { &feature_elpm, - &feature_sram, + &feature_lpm, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, &feature_lpmx, &feature_movw, &feature_mul, @@ -984,29 +984,29 @@ pub const cpu_atmega161 = Cpu{ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, &feature_lpmx, &feature_movw, &feature_mul, @@ -1017,1508 +1017,1508 @@ pub const cpu_atmega163 = Cpu{ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_elpm, &feature_elpmx, - &feature_sram, - &feature_ijmpcall, - &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_elpm, &feature_elpmx, - &feature_sram, - &feature_ijmpcall, - &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_elpm, &feature_elpmx, - &feature_sram, - &feature_ijmpcall, - &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_elpm, &feature_elpmx, - &feature_sram, - &feature_ijmpcall, - &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, &feature_lpmx, &feature_movw, &feature_mul, @@ -2529,11 +2529,11 @@ pub const cpu_atmega8515 = Cpu{ pub const cpu_atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, &feature_lpmx, &feature_movw, &feature_mul, @@ -2544,149 +2544,149 @@ pub const cpu_atmega8535 = Cpu{ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny11 = Cpu{ .name = "attiny11", .llvm_name = "attiny11", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpm, }, }; @@ -2694,7 +2694,7 @@ pub const cpu_attiny11 = Cpu{ pub const cpu_attiny12 = Cpu{ .name = "attiny12", .llvm_name = "attiny12", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpm, }, }; @@ -2702,37 +2702,37 @@ pub const cpu_attiny12 = Cpu{ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny15 = Cpu{ .name = "attiny15", .llvm_name = "attiny15", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpm, }, }; @@ -2740,139 +2740,139 @@ pub const cpu_attiny15 = Cpu{ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, &feature_lpmx, }, }; @@ -2880,37 +2880,37 @@ pub const cpu_attiny26 = Cpu{ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny28 = Cpu{ .name = "attiny28", .llvm_name = "attiny28", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpm, }, }; @@ -2918,1277 +2918,1277 @@ pub const cpu_attiny28 = Cpu{ pub const cpu_attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", - .subfeatures = &[_]*const Feature { - &feature_rmw, + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, - &feature_eijmpcall, + &feature_ijmpcall, &feature_elpmx, &feature_sram, + &feature_spmx, + &feature_break, + &feature_jmpcall, &feature_des, - &feature_ijmpcall, + &feature_rmw, + &feature_mul, + &feature_eijmpcall, &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avr1 = Cpu{ .name = "avr1", .llvm_name = "avr1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpm, }, }; @@ -4196,319 +4196,319 @@ pub const cpu_avr1 = Cpu{ pub const cpu_avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_addsubiw, }, }; pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_break, &feature_lpm, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, + .dependencies = &[_]*const Feature { &feature_lpm, - &feature_sram, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", - .subfeatures = &[_]*const Feature { - &feature_addsubiw, - &feature_jmpcall, - &feature_lpm, + .dependencies = &[_]*const Feature { &feature_elpm, - &feature_sram, + &feature_lpm, &feature_ijmpcall, + &feature_sram, + &feature_jmpcall, + &feature_addsubiw, }, }; pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_sram, + &feature_spm, &feature_ijmpcall, + &feature_sram, + &feature_break, + &feature_jmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_lpm, &feature_spm, - &feature_addsubiw, + &feature_ijmpcall, + &feature_sram, &feature_break, - &feature_lpm, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, + &feature_elpm, &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, - &feature_break, - &feature_mul, - &feature_elpm, + &feature_ijmpcall, &feature_elpmx, &feature_sram, - &feature_ijmpcall, + &feature_break, + &feature_jmpcall, + &feature_mul, &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_elpm, &feature_elpmx, - &feature_sram, - &feature_ijmpcall, - &feature_movw, + &feature_addsubiw, }, }; pub const cpu_avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_break, - &feature_sram, &feature_tinyencoding, + &feature_sram, }, }; pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, + &feature_elpm, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_movw, + &feature_sram, + &feature_spmx, &feature_break, + &feature_jmpcall, + &feature_des, &feature_mul, - &feature_elpm, &feature_eijmpcall, &feature_elpmx, - &feature_sram, - &feature_des, - &feature_ijmpcall, - &feature_movw, - &feature_spmx, + &feature_addsubiw, }, }; pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_lpmx, - &feature_spm, - &feature_addsubiw, - &feature_jmpcall, &feature_lpm, + &feature_spm, + &feature_ijmpcall, + &feature_sram, &feature_break, + &feature_jmpcall, &feature_mul, - &feature_sram, - &feature_ijmpcall, &feature_movw, + &feature_addsubiw, }, }; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index d36f9f2e1deb3ca024577ce0d0867b53e64ceed5..9dc27093a6b18e141ac4cfb0556341861839204e 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -4,21 +4,21 @@ const Cpu = @import("std").target.Cpu; pub const feature_alu32 = Feature{ .name = "alu32", .description = "Enable ALU32 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dummy = Feature{ .name = "dummy", .description = "unused feature", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dwarfris = Feature{ .name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -31,35 +31,35 @@ pub const features = &[_]*const Feature { pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_probe = Cpu{ .name = "probe", .llvm_name = "probe", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_v1 = Cpu{ .name = "v1", .llvm_name = "v1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_v2 = Cpu{ .name = "v2", .llvm_name = "v2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_v3 = Cpu{ .name = "v3", .llvm_name = "v3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 3051f3273a54294b11adcec592af9f9370286600..a007ee10cf4984b8b15bb77fa746554c03f8de7a 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -4,35 +4,35 @@ const Cpu = @import("std").target.Cpu; pub const feature_duplex = Feature{ .name = "duplex", .description = "Enable generation of duplex instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Use constant-extended calls", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mem_noshuf = Feature{ .name = "mem_noshuf", .description = "Supports mem_noshuf feature", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_memops = Feature{ .name = "memops", .description = "Use memop instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nvj = Feature{ .name = "nvj", .description = "Support for new-value jumps", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_packets, }, }; @@ -40,7 +40,7 @@ pub const feature_nvj = Feature{ pub const feature_nvs = Feature{ .name = "nvs", .description = "Support for new-value stores", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_packets, }, }; @@ -48,28 +48,28 @@ pub const feature_nvs = Feature{ pub const feature_noreturnStackElim = Feature{ .name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_packets = Feature{ .name = "packets", .description = "Support for instruction packets", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_reservedR19 = Feature{ .name = "reserved-r19", .description = "Reserve register R19", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_smallData = Feature{ .name = "small-data", .description = "Allow GP-relative addressing of global variables", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -89,7 +89,7 @@ pub const features = &[_]*const Feature { pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_memops, &feature_packets, @@ -102,7 +102,7 @@ pub const cpu_generic = Cpu{ pub const cpu_hexagonv5 = Cpu{ .name = "hexagonv5", .llvm_name = "hexagonv5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_memops, &feature_packets, @@ -115,7 +115,7 @@ pub const cpu_hexagonv5 = Cpu{ pub const cpu_hexagonv55 = Cpu{ .name = "hexagonv55", .llvm_name = "hexagonv55", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_memops, &feature_packets, @@ -128,7 +128,7 @@ pub const cpu_hexagonv55 = Cpu{ pub const cpu_hexagonv60 = Cpu{ .name = "hexagonv60", .llvm_name = "hexagonv60", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_memops, &feature_packets, @@ -141,7 +141,7 @@ pub const cpu_hexagonv60 = Cpu{ pub const cpu_hexagonv62 = Cpu{ .name = "hexagonv62", .llvm_name = "hexagonv62", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_memops, &feature_packets, @@ -154,7 +154,7 @@ pub const cpu_hexagonv62 = Cpu{ pub const cpu_hexagonv65 = Cpu{ .name = "hexagonv65", .llvm_name = "hexagonv65", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_mem_noshuf, &feature_memops, @@ -168,7 +168,7 @@ pub const cpu_hexagonv65 = Cpu{ pub const cpu_hexagonv66 = Cpu{ .name = "hexagonv66", .llvm_name = "hexagonv66", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_duplex, &feature_mem_noshuf, &feature_memops, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 17582a9313a0adeab901ba5606df7112fdeabb22..e7c26230af4583a094a6bc022e9bf17527d2c900 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -4,43 +4,43 @@ const Cpu = @import("std").target.Cpu; pub const feature_abs2008 = Feature{ .name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_crc = Feature{ .name = "crc", .description = "Mips R6 CRC ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cnmips = Feature{ .name = "cnmips", .description = "Octeon cnMIPS Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, }, }; pub const feature_dsp = Feature{ .name = "dsp", .description = "Mips DSP ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dspr2 = Feature{ .name = "dspr2", .description = "Mips DSP-R2 ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dsp, }, }; @@ -48,7 +48,7 @@ pub const feature_dspr2 = Feature{ pub const feature_dspr3 = Feature{ .name = "dspr3", .description = "Mips DSP-R3 ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dsp, }, }; @@ -56,84 +56,84 @@ pub const feature_dspr3 = Feature{ pub const feature_eva = Feature{ .name = "eva", .description = "Mips EVA ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fp64 = Feature{ .name = "fp64", .description = "Support 64-bit FP registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fpxx = Feature{ .name = "fpxx", .description = "Support for FPXX", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ginv = Feature{ .name = "ginv", .description = "Mips Global Invalidate ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gp64 = Feature{ .name = "gp64", .description = "General Purpose Registers are 64-bit wide", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_longCalls = Feature{ .name = "long-calls", .description = "Disable use of the jal instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_msa = Feature{ .name = "msa", .description = "Mips MSA ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mt = Feature{ .name = "mt", .description = "Mips MT ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nomadd4 = Feature{ .name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_micromips = Feature{ .name = "micromips", .description = "microMips mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips1 = Feature{ .name = "mips1", .description = "Mips I ISA Support [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips2 = Feature{ .name = "mips2", .description = "Mips II ISA Support [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mips1, }, }; @@ -141,322 +141,322 @@ pub const feature_mips2 = Feature{ pub const feature_mips3 = Feature{ .name = "mips3", .description = "MIPS III ISA Support [highly experimental]", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { &feature_mips1, - &feature_gp64, &feature_mips3_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, }, }; pub const feature_mips3_32 = Feature{ .name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips3_32r2 = Feature{ .name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips4 = Feature{ .name = "mips4", .description = "MIPS IV ISA Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, &feature_mips3_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, }, }; pub const feature_mips4_32 = Feature{ .name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips4_32r2 = Feature{ .name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips5 = Feature{ .name = "mips5", .description = "MIPS V ISA Support [highly experimental]", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_mips5_32r2 = Feature{ .name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips16 = Feature{ .name = "mips16", .description = "Mips16 mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mips32 = Feature{ .name = "mips32", .description = "Mips32 ISA Support", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mips1, - &feature_mips4_32, &feature_mips3_32, + &feature_mips4_32, }, }; pub const feature_mips32r2 = Feature{ .name = "mips32r2", .description = "Mips32r2 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, }, }; pub const feature_mips32r3 = Feature{ .name = "mips32r3", .description = "Mips32r3 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, }, }; pub const feature_mips32r5 = Feature{ .name = "mips32r5", .description = "Mips32r5 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, }, }; pub const feature_mips32r6 = Feature{ .name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_fp64, - &feature_mips4_32r2, &feature_nan2008, + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_mips64 = Feature{ .name = "mips64", .description = "Mips64 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, }, }; pub const feature_mips64r2 = Feature{ .name = "mips64r2", .description = "Mips64r2 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_mips64r3 = Feature{ .name = "mips64r3", .description = "Mips64r3 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, - &feature_gp64, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_gp64, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_mips64r5 = Feature{ .name = "mips64r5", .description = "Mips64r5 ISA Support", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_mips64r6 = Feature{ .name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips5_32r2, - &feature_mips4_32, &feature_nan2008, + &feature_mips4_32, + &feature_gp64, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_fp64, }, }; pub const feature_nan2008 = Feature{ .name = "nan2008", .description = "IEEE 754-2008 NaN encoding", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noabicalls = Feature{ .name = "noabicalls", .description = "Disable SVR4-style position-independent code", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nooddspreg = Feature{ .name = "nooddspreg", .description = "Disable odd numbered single-precision registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptr64 = Feature{ .name = "ptr64", .description = "Pointers are 64-bit wide", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_singleFloat = Feature{ .name = "single-float", .description = "Only supports single precision float", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Does not support floating point instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sym32 = Feature{ .name = "sym32", .description = "Symbols are 32 bit on Mips64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useIndirectJumpHazard = Feature{ .name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useTccInDiv = Feature{ .name = "use-tcc-in-div", .description = "Force the assembler to use trapping", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vfpu = Feature{ .name = "vfpu", .description = "Enable vector FPU instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_virt = Feature{ .name = "virt", .description = "Mips Virtualization ASE", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xgot = Feature{ .name = "xgot", .description = "Assume 32-bit GOT", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_p5600 = Feature{ .name = "p5600", .description = "The P5600 Processor", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, }, }; @@ -516,7 +516,7 @@ pub const features = &[_]*const Feature { pub const cpu_mips1 = Cpu{ .name = "mips1", .llvm_name = "mips1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mips1, }, }; @@ -524,7 +524,7 @@ pub const cpu_mips1 = Cpu{ pub const cpu_mips2 = Cpu{ .name = "mips2", .llvm_name = "mips2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips2, }, @@ -533,12 +533,12 @@ pub const cpu_mips2 = Cpu{ pub const cpu_mips3 = Cpu{ .name = "mips3", .llvm_name = "mips3", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { &feature_mips1, - &feature_gp64, &feature_mips3_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, &feature_mips3, }, }; @@ -546,10 +546,10 @@ pub const cpu_mips3 = Cpu{ pub const cpu_mips32 = Cpu{ .name = "mips32", .llvm_name = "mips32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mips1, - &feature_mips4_32, &feature_mips3_32, + &feature_mips4_32, &feature_mips32, }, }; @@ -557,13 +557,13 @@ pub const cpu_mips32 = Cpu{ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, &feature_mips32r2, }, }; @@ -571,13 +571,13 @@ pub const cpu_mips32r2 = Cpu{ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, &feature_mips32r3, }, }; @@ -585,13 +585,13 @@ pub const cpu_mips32r3 = Cpu{ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, &feature_mips32r5, }, }; @@ -599,16 +599,16 @@ pub const cpu_mips32r5 = Cpu{ pub const cpu_mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_fp64, - &feature_mips4_32r2, &feature_nan2008, + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips32r6, }, }; @@ -616,14 +616,14 @@ pub const cpu_mips32r6 = Cpu{ pub const cpu_mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, &feature_mips3_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, &feature_mips4, }, }; @@ -631,15 +631,15 @@ pub const cpu_mips4 = Cpu{ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips5, }, }; @@ -647,15 +647,15 @@ pub const cpu_mips5 = Cpu{ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, &feature_mips64, }, }; @@ -663,15 +663,15 @@ pub const cpu_mips64 = Cpu{ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips64r2, }, }; @@ -679,15 +679,15 @@ pub const cpu_mips64r2 = Cpu{ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, - &feature_gp64, + .dependencies = &[_]*const Feature { &feature_mips4_32, - &feature_mips5_32r2, + &feature_gp64, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips64r3, }, }; @@ -695,15 +695,15 @@ pub const cpu_mips64r3 = Cpu{ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", - .subfeatures = &[_]*const Feature { - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, + &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips64r5, }, }; @@ -711,17 +711,17 @@ pub const cpu_mips64r5 = Cpu{ pub const cpu_mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_fp64, - &feature_mips4_32r2, - &feature_mips1, - &feature_gp64, - &feature_mips5_32r2, - &feature_mips4_32, &feature_nan2008, + &feature_mips4_32, + &feature_gp64, + &feature_mips1, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_fp64, &feature_mips64r6, }, }; @@ -729,15 +729,15 @@ pub const cpu_mips64r6 = Cpu{ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", - .subfeatures = &[_]*const Feature { - &feature_fp64, + .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips4_32r2, &feature_mips1, - &feature_gp64, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, + &feature_mips5_32r2, &feature_mips3_32, + &feature_gp64, + &feature_fp64, &feature_cnmips, &feature_mips64r2, }, @@ -746,13 +746,13 @@ pub const cpu_octeon = Cpu{ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", - .subfeatures = &[_]*const Feature { - &feature_mips4_32r2, + .dependencies = &[_]*const Feature { + &feature_mips3_32, &feature_mips1, - &feature_mips4_32, - &feature_mips5_32r2, &feature_mips3_32r2, - &feature_mips3_32, + &feature_mips5_32r2, + &feature_mips4_32, + &feature_mips4_32r2, &feature_p5600, }, }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 433537824d7f73651eb3ea17ae46d505973950fb..1e3b93b9d0daf31752200f051143cfc74cbf8b13 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -4,28 +4,28 @@ const Cpu = @import("std").target.Cpu; pub const feature_hwmult16 = Feature{ .name = "hwmult16", .description = "Enable 16-bit hardware multiplier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_hwmult32 = Feature{ .name = "hwmult32", .description = "Enable 32-bit hardware multiplier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_hwmultf5 = Feature{ .name = "hwmultf5", .description = "Enable F5 series hardware multiplier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ext = Feature{ .name = "ext", .description = "Enable MSP430-X extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -39,21 +39,21 @@ pub const features = &[_]*const Feature { pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_msp430 = Cpu{ .name = "msp430", .llvm_name = "msp430", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_msp430x = Cpu{ .name = "msp430x", .llvm_name = "msp430x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ext, }, }; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index 5d5e27658753b9a823eb5ed79319ab05b1f20863..815d1116c57ac9f5a2a38becc8e36fdc3829cb47 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -4,175 +4,175 @@ const Cpu = @import("std").target.Cpu; pub const feature_ptx32 = Feature{ .name = "ptx32", .description = "Use PTX version 3.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx40 = Feature{ .name = "ptx40", .description = "Use PTX version 4.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx41 = Feature{ .name = "ptx41", .description = "Use PTX version 4.1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx42 = Feature{ .name = "ptx42", .description = "Use PTX version 4.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx43 = Feature{ .name = "ptx43", .description = "Use PTX version 4.3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx50 = Feature{ .name = "ptx50", .description = "Use PTX version 5.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx60 = Feature{ .name = "ptx60", .description = "Use PTX version 6.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx61 = Feature{ .name = "ptx61", .description = "Use PTX version 6.1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx63 = Feature{ .name = "ptx63", .description = "Use PTX version 6.3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptx64 = Feature{ .name = "ptx64", .description = "Use PTX version 6.4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_20 = Feature{ .name = "sm_20", .description = "Target SM 2.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_21 = Feature{ .name = "sm_21", .description = "Target SM 2.1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_30 = Feature{ .name = "sm_30", .description = "Target SM 3.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_32 = Feature{ .name = "sm_32", .description = "Target SM 3.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_35 = Feature{ .name = "sm_35", .description = "Target SM 3.5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_37 = Feature{ .name = "sm_37", .description = "Target SM 3.7", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_50 = Feature{ .name = "sm_50", .description = "Target SM 5.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_52 = Feature{ .name = "sm_52", .description = "Target SM 5.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_53 = Feature{ .name = "sm_53", .description = "Target SM 5.3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_60 = Feature{ .name = "sm_60", .description = "Target SM 6.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_61 = Feature{ .name = "sm_61", .description = "Target SM 6.1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_62 = Feature{ .name = "sm_62", .description = "Target SM 6.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_70 = Feature{ .name = "sm_70", .description = "Target SM 7.0", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_72 = Feature{ .name = "sm_72", .description = "Target SM 7.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sm_75 = Feature{ .name = "sm_75", .description = "Target SM 7.5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -207,7 +207,7 @@ pub const features = &[_]*const Feature { pub const cpu_sm_20 = Cpu{ .name = "sm_20", .llvm_name = "sm_20", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sm_20, }, }; @@ -215,7 +215,7 @@ pub const cpu_sm_20 = Cpu{ pub const cpu_sm_21 = Cpu{ .name = "sm_21", .llvm_name = "sm_21", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sm_21, }, }; @@ -223,7 +223,7 @@ pub const cpu_sm_21 = Cpu{ pub const cpu_sm_30 = Cpu{ .name = "sm_30", .llvm_name = "sm_30", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sm_30, }, }; @@ -231,7 +231,7 @@ pub const cpu_sm_30 = Cpu{ pub const cpu_sm_32 = Cpu{ .name = "sm_32", .llvm_name = "sm_32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx40, &feature_sm_32, }, @@ -240,7 +240,7 @@ pub const cpu_sm_32 = Cpu{ pub const cpu_sm_35 = Cpu{ .name = "sm_35", .llvm_name = "sm_35", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sm_35, }, }; @@ -248,7 +248,7 @@ pub const cpu_sm_35 = Cpu{ pub const cpu_sm_37 = Cpu{ .name = "sm_37", .llvm_name = "sm_37", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx41, &feature_sm_37, }, @@ -257,7 +257,7 @@ pub const cpu_sm_37 = Cpu{ pub const cpu_sm_50 = Cpu{ .name = "sm_50", .llvm_name = "sm_50", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx40, &feature_sm_50, }, @@ -266,7 +266,7 @@ pub const cpu_sm_50 = Cpu{ pub const cpu_sm_52 = Cpu{ .name = "sm_52", .llvm_name = "sm_52", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx41, &feature_sm_52, }, @@ -275,7 +275,7 @@ pub const cpu_sm_52 = Cpu{ pub const cpu_sm_53 = Cpu{ .name = "sm_53", .llvm_name = "sm_53", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx42, &feature_sm_53, }, @@ -284,7 +284,7 @@ pub const cpu_sm_53 = Cpu{ pub const cpu_sm_60 = Cpu{ .name = "sm_60", .llvm_name = "sm_60", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx50, &feature_sm_60, }, @@ -293,7 +293,7 @@ pub const cpu_sm_60 = Cpu{ pub const cpu_sm_61 = Cpu{ .name = "sm_61", .llvm_name = "sm_61", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx50, &feature_sm_61, }, @@ -302,7 +302,7 @@ pub const cpu_sm_61 = Cpu{ pub const cpu_sm_62 = Cpu{ .name = "sm_62", .llvm_name = "sm_62", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx50, &feature_sm_62, }, @@ -311,7 +311,7 @@ pub const cpu_sm_62 = Cpu{ pub const cpu_sm_70 = Cpu{ .name = "sm_70", .llvm_name = "sm_70", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx60, &feature_sm_70, }, @@ -320,7 +320,7 @@ pub const cpu_sm_70 = Cpu{ pub const cpu_sm_72 = Cpu{ .name = "sm_72", .llvm_name = "sm_72", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx61, &feature_sm_72, }, @@ -329,7 +329,7 @@ pub const cpu_sm_72 = Cpu{ pub const cpu_sm_75 = Cpu{ .name = "sm_75", .llvm_name = "sm_75", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_ptx63, &feature_sm_75, }, diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index e8c9d98a1cfd53b8952798892eeef351009e8894..9e86df21854579b1da8e2c97b7407054ff1b1aa7 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -4,21 +4,21 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", .description = "Enable 64-bit instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bitregs64 = Feature{ .name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_altivec = Feature{ .name = "altivec", .description = "Enable Altivec instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -26,14 +26,14 @@ pub const feature_altivec = Feature{ pub const feature_bpermd = Feature{ .name = "bpermd", .description = "Enable the bpermd instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_booke = Feature{ .name = "booke", .description = "Enable Book E instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, }, }; @@ -41,21 +41,21 @@ pub const feature_booke = Feature{ pub const feature_cmpb = Feature{ .name = "cmpb", .description = "Enable the cmpb instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_crbits = Feature{ .name = "crbits", .description = "Use condition-register bits individually", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_directMove = Feature{ .name = "direct-move", .description = "Enable Power8 direct move instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -63,21 +63,21 @@ pub const feature_directMove = Feature{ pub const feature_e500 = Feature{ .name = "e500", .description = "Enable E500/E500mc instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_extdiv = Feature{ .name = "extdiv", .description = "Enable extended divide instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fcpsgn = Feature{ .name = "fcpsgn", .description = "Enable the fcpsgn instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -85,7 +85,7 @@ pub const feature_fcpsgn = Feature{ pub const feature_fpcvt = Feature{ .name = "fpcvt", .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -93,7 +93,7 @@ pub const feature_fpcvt = Feature{ pub const feature_fprnd = Feature{ .name = "fprnd", .description = "Enable the fri[mnpz] instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -101,7 +101,7 @@ pub const feature_fprnd = Feature{ pub const feature_fpu = Feature{ .name = "fpu", .description = "Enable classic FPU instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -109,7 +109,7 @@ pub const feature_fpu = Feature{ pub const feature_fre = Feature{ .name = "fre", .description = "Enable the fre instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -117,7 +117,7 @@ pub const feature_fre = Feature{ pub const feature_fres = Feature{ .name = "fres", .description = "Enable the fres instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -125,7 +125,7 @@ pub const feature_fres = Feature{ pub const feature_frsqrte = Feature{ .name = "frsqrte", .description = "Enable the frsqrte instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -133,7 +133,7 @@ pub const feature_frsqrte = Feature{ pub const feature_frsqrtes = Feature{ .name = "frsqrtes", .description = "Enable the frsqrtes instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -141,7 +141,7 @@ pub const feature_frsqrtes = Feature{ pub const feature_fsqrt = Feature{ .name = "fsqrt", .description = "Enable the fsqrt instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -149,7 +149,7 @@ pub const feature_fsqrt = Feature{ pub const feature_float128 = Feature{ .name = "float128", .description = "Enable the __float128 data type for IEEE-754R Binary128.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -157,56 +157,56 @@ pub const feature_float128 = Feature{ pub const feature_htm = Feature{ .name = "htm", .description = "Enable Hardware Transactional Memory instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_hardFloat = Feature{ .name = "hard-float", .description = "Enable floating-point instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_icbt = Feature{ .name = "icbt", .description = "Enable icbt instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_isaV30Instructions = Feature{ .name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_isel = Feature{ .name = "isel", .description = "Enable the isel instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_invariantFunctionDescriptors = Feature{ .name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ldbrx = Feature{ .name = "ldbrx", .description = "Enable the ldbrx instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lfiwax = Feature{ .name = "lfiwax", .description = "Enable the lfiwax instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -214,21 +214,21 @@ pub const feature_lfiwax = Feature{ pub const feature_longcall = Feature{ .name = "longcall", .description = "Always use indirect calls", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mfocrf = Feature{ .name = "mfocrf", .description = "Enable the MFOCRF instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_msync = Feature{ .name = "msync", .description = "Has only the msync instruction instead of sync", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, }, }; @@ -236,7 +236,7 @@ pub const feature_msync = Feature{ pub const feature_power8Altivec = Feature{ .name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -244,7 +244,7 @@ pub const feature_power8Altivec = Feature{ pub const feature_crypto = Feature{ .name = "crypto", .description = "Enable POWER8 Crypto instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -252,7 +252,7 @@ pub const feature_crypto = Feature{ pub const feature_power8Vector = Feature{ .name = "power8-vector", .description = "Enable POWER8 vector instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -260,7 +260,7 @@ pub const feature_power8Vector = Feature{ pub const feature_power9Altivec = Feature{ .name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_isaV30Instructions, &feature_hardFloat, }, @@ -269,7 +269,7 @@ pub const feature_power9Altivec = Feature{ pub const feature_power9Vector = Feature{ .name = "power9-vector", .description = "Enable POWER9 vector instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_isaV30Instructions, &feature_hardFloat, }, @@ -278,49 +278,49 @@ pub const feature_power9Vector = Feature{ pub const feature_popcntd = Feature{ .name = "popcntd", .description = "Enable the popcnt[dw] instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ppc4xx = Feature{ .name = "ppc4xx", .description = "Enable PPC 4xx instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ppc6xx = Feature{ .name = "ppc6xx", .description = "Enable PPC 6xx instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ppcPostraSched = Feature{ .name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ppcPreraSched = Feature{ .name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_partwordAtomics = Feature{ .name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_qpx = Feature{ .name = "qpx", .description = "Enable QPX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -328,14 +328,14 @@ pub const feature_qpx = Feature{ pub const feature_recipprec = Feature{ .name = "recipprec", .description = "Assume higher precision reciprocal estimates", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_spe = Feature{ .name = "spe", .description = "Enable SPE instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -343,7 +343,7 @@ pub const feature_spe = Feature{ pub const feature_stfiwx = Feature{ .name = "stfiwx", .description = "Enable the stfiwx instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -351,28 +351,28 @@ pub const feature_stfiwx = Feature{ pub const feature_securePlt = Feature{ .name = "secure-plt", .description = "Enable secure plt mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowPopcntd = Feature{ .name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_twoConstNr = Feature{ .name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vsx = Feature{ .name = "vsx", .description = "Enable VSX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -380,7 +380,7 @@ pub const feature_vsx = Feature{ pub const feature_vectorsUseTwoUnits = Feature{ .name = "vectors-use-two-units", .description = "Vectors use two units", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -441,7 +441,7 @@ pub const features = &[_]*const Feature { pub const cpu_440 = Cpu{ .name = "440", .llvm_name = "440", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, &feature_booke, &feature_hardFloat, @@ -455,7 +455,7 @@ pub const cpu_440 = Cpu{ pub const cpu_450 = Cpu{ .name = "450", .llvm_name = "450", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, &feature_booke, &feature_hardFloat, @@ -469,7 +469,7 @@ pub const cpu_450 = Cpu{ pub const cpu_601 = Cpu{ .name = "601", .llvm_name = "601", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fpu, }, @@ -478,7 +478,7 @@ pub const cpu_601 = Cpu{ pub const cpu_602 = Cpu{ .name = "602", .llvm_name = "602", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fpu, }, @@ -487,7 +487,7 @@ pub const cpu_602 = Cpu{ pub const cpu_603 = Cpu{ .name = "603", .llvm_name = "603", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -497,7 +497,7 @@ pub const cpu_603 = Cpu{ pub const cpu_e603 = Cpu{ .name = "603e", .llvm_name = "603e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -507,7 +507,7 @@ pub const cpu_e603 = Cpu{ pub const cpu_ev603 = Cpu{ .name = "603ev", .llvm_name = "603ev", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -517,7 +517,7 @@ pub const cpu_ev603 = Cpu{ pub const cpu_604 = Cpu{ .name = "604", .llvm_name = "604", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -527,7 +527,7 @@ pub const cpu_604 = Cpu{ pub const cpu_e604 = Cpu{ .name = "604e", .llvm_name = "604e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -537,7 +537,7 @@ pub const cpu_e604 = Cpu{ pub const cpu_620 = Cpu{ .name = "620", .llvm_name = "620", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -547,7 +547,7 @@ pub const cpu_620 = Cpu{ pub const cpu_7400 = Cpu{ .name = "7400", .llvm_name = "7400", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_altivec, &feature_fres, @@ -558,7 +558,7 @@ pub const cpu_7400 = Cpu{ pub const cpu_7450 = Cpu{ .name = "7450", .llvm_name = "7450", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_altivec, &feature_fres, @@ -569,7 +569,7 @@ pub const cpu_7450 = Cpu{ pub const cpu_750 = Cpu{ .name = "750", .llvm_name = "750", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -579,7 +579,7 @@ pub const cpu_750 = Cpu{ pub const cpu_970 = Cpu{ .name = "970", .llvm_name = "970", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -594,7 +594,7 @@ pub const cpu_970 = Cpu{ pub const cpu_a2 = Cpu{ .name = "a2", .llvm_name = "a2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_icbt, &feature_booke, @@ -621,7 +621,7 @@ pub const cpu_a2 = Cpu{ pub const cpu_a2q = Cpu{ .name = "a2q", .llvm_name = "a2q", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_icbt, &feature_booke, @@ -649,7 +649,7 @@ pub const cpu_a2q = Cpu{ pub const cpu_e500 = Cpu{ .name = "e500", .llvm_name = "e500", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, &feature_booke, &feature_isel, @@ -659,7 +659,7 @@ pub const cpu_e500 = Cpu{ pub const cpu_e500mc = Cpu{ .name = "e500mc", .llvm_name = "e500mc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_icbt, &feature_booke, &feature_isel, @@ -671,7 +671,7 @@ pub const cpu_e500mc = Cpu{ pub const cpu_e5500 = Cpu{ .name = "e5500", .llvm_name = "e5500", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_icbt, &feature_booke, @@ -685,7 +685,7 @@ pub const cpu_e5500 = Cpu{ pub const cpu_g3 = Cpu{ .name = "g3", .llvm_name = "g3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_fres, &feature_frsqrte, @@ -695,7 +695,7 @@ pub const cpu_g3 = Cpu{ pub const cpu_g4 = Cpu{ .name = "g4", .llvm_name = "g4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_altivec, &feature_fres, @@ -706,7 +706,7 @@ pub const cpu_g4 = Cpu{ pub const cpu_g4Plus = Cpu{ .name = "g4+", .llvm_name = "g4+", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, &feature_altivec, &feature_fres, @@ -717,7 +717,7 @@ pub const cpu_g4Plus = Cpu{ pub const cpu_g5 = Cpu{ .name = "g5", .llvm_name = "g5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -732,7 +732,7 @@ pub const cpu_g5 = Cpu{ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -740,7 +740,7 @@ pub const cpu_generic = Cpu{ pub const cpu_ppc = Cpu{ .name = "ppc", .llvm_name = "ppc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -748,7 +748,7 @@ pub const cpu_ppc = Cpu{ pub const cpu_ppc32 = Cpu{ .name = "ppc32", .llvm_name = "ppc32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_hardFloat, }, }; @@ -756,7 +756,7 @@ pub const cpu_ppc32 = Cpu{ pub const cpu_ppc64 = Cpu{ .name = "ppc64", .llvm_name = "ppc64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -771,7 +771,7 @@ pub const cpu_ppc64 = Cpu{ pub const cpu_ppc64le = Cpu{ .name = "ppc64le", .llvm_name = "ppc64le", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -808,7 +808,7 @@ pub const cpu_ppc64le = Cpu{ pub const cpu_pwr3 = Cpu{ .name = "pwr3", .llvm_name = "pwr3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -822,7 +822,7 @@ pub const cpu_pwr3 = Cpu{ pub const cpu_pwr4 = Cpu{ .name = "pwr4", .llvm_name = "pwr4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -837,7 +837,7 @@ pub const cpu_pwr4 = Cpu{ pub const cpu_pwr5 = Cpu{ .name = "pwr5", .llvm_name = "pwr5", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -854,7 +854,7 @@ pub const cpu_pwr5 = Cpu{ pub const cpu_pwr5x = Cpu{ .name = "pwr5x", .llvm_name = "pwr5x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -872,7 +872,7 @@ pub const cpu_pwr5x = Cpu{ pub const cpu_pwr6 = Cpu{ .name = "pwr6", .llvm_name = "pwr6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -894,7 +894,7 @@ pub const cpu_pwr6 = Cpu{ pub const cpu_pwr6x = Cpu{ .name = "pwr6x", .llvm_name = "pwr6x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -916,7 +916,7 @@ pub const cpu_pwr6x = Cpu{ pub const cpu_pwr7 = Cpu{ .name = "pwr7", .llvm_name = "pwr7", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -946,7 +946,7 @@ pub const cpu_pwr7 = Cpu{ pub const cpu_pwr8 = Cpu{ .name = "pwr8", .llvm_name = "pwr8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, @@ -983,7 +983,7 @@ pub const cpu_pwr8 = Cpu{ pub const cpu_pwr9 = Cpu{ .name = "pwr9", .llvm_name = "pwr9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_hardFloat, &feature_altivec, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index 46f66aff12baaa62e41e5569bc7a9ebcd9f4555a..cbb7ccb9ad0325fcb4cbf2ec2809ae7b9ffca72d 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -4,49 +4,49 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", .description = "Implements RV64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_e = Feature{ .name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rvcHints = Feature{ .name = "rvc-hints", .description = "Enable RVC Hint Instructions.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_relax = Feature{ .name = "relax", .description = "Enable Linker relaxation.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_a = Feature{ .name = "a", .description = "'A' (Atomic Instructions)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_c = Feature{ .name = "c", .description = "'C' (Compressed Instructions)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_d = Feature{ .name = "d", .description = "'D' (Double-Precision Floating-Point)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_f, }, }; @@ -54,14 +54,14 @@ pub const feature_d = Feature{ pub const feature_f = Feature{ .name = "f", .description = "'F' (Single-Precision Floating-Point)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_m = Feature{ .name = "m", .description = "'M' (Integer Multiplication and Division)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -80,7 +80,7 @@ pub const features = &[_]*const Feature { pub const cpu_genericRv32 = Cpu{ .name = "generic-rv32", .llvm_name = "generic-rv32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_rvcHints, }, }; @@ -88,7 +88,7 @@ pub const cpu_genericRv32 = Cpu{ pub const cpu_genericRv64 = Cpu{ .name = "generic-rv64", .llvm_name = "generic-rv64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_rvcHints, }, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index d302c28063ec4a8437848a39ae4eed7549ca60ab..7cdeddb976cea4dd18b6ae4b0b013429b6a045e1 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -4,84 +4,84 @@ const Cpu = @import("std").target.Cpu; pub const feature_hardQuadFloat = Feature{ .name = "hard-quad-float", .description = "Enable quad-word floating point instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_leon = Feature{ .name = "leon", .description = "Enable LEON extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noFmuls = Feature{ .name = "no-fmuls", .description = "Disable the fmuls instruction.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_noFsmuld = Feature{ .name = "no-fsmuld", .description = "Disable the fsmuld instruction.", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_leonpwrpsr = Feature{ .name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Use software emulation for floating point", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_softMulDiv = Feature{ .name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_deprecatedV8 = Feature{ .name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_v9 = Feature{ .name = "v9", .description = "Enable SPARC-V9 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vis = Feature{ .name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vis2 = Feature{ .name = "vis2", .description = "Enable Visual Instruction Set extensions II", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vis3 = Feature{ .name = "vis3", .description = "Enable Visual Instruction Set extensions III", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -103,7 +103,7 @@ pub const features = &[_]*const Feature { pub const cpu_at697e = Cpu{ .name = "at697e", .llvm_name = "at697e", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -111,7 +111,7 @@ pub const cpu_at697e = Cpu{ pub const cpu_at697f = Cpu{ .name = "at697f", .llvm_name = "at697f", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -119,21 +119,21 @@ pub const cpu_at697f = Cpu{ pub const cpu_f934 = Cpu{ .name = "f934", .llvm_name = "f934", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_gr712rc = Cpu{ .name = "gr712rc", .llvm_name = "gr712rc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -141,7 +141,7 @@ pub const cpu_gr712rc = Cpu{ pub const cpu_gr740 = Cpu{ .name = "gr740", .llvm_name = "gr740", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, &feature_leonpwrpsr, }, @@ -150,14 +150,14 @@ pub const cpu_gr740 = Cpu{ pub const cpu_hypersparc = Cpu{ .name = "hypersparc", .llvm_name = "hypersparc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_leon2 = Cpu{ .name = "leon2", .llvm_name = "leon2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -165,7 +165,7 @@ pub const cpu_leon2 = Cpu{ pub const cpu_leon3 = Cpu{ .name = "leon3", .llvm_name = "leon3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -173,7 +173,7 @@ pub const cpu_leon3 = Cpu{ pub const cpu_leon4 = Cpu{ .name = "leon4", .llvm_name = "leon4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -181,7 +181,7 @@ pub const cpu_leon4 = Cpu{ pub const cpu_ma2080 = Cpu{ .name = "ma2080", .llvm_name = "ma2080", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -189,7 +189,7 @@ pub const cpu_ma2080 = Cpu{ pub const cpu_ma2085 = Cpu{ .name = "ma2085", .llvm_name = "ma2085", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -197,7 +197,7 @@ pub const cpu_ma2085 = Cpu{ pub const cpu_ma2100 = Cpu{ .name = "ma2100", .llvm_name = "ma2100", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -205,7 +205,7 @@ pub const cpu_ma2100 = Cpu{ pub const cpu_ma2150 = Cpu{ .name = "ma2150", .llvm_name = "ma2150", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -213,7 +213,7 @@ pub const cpu_ma2150 = Cpu{ pub const cpu_ma2155 = Cpu{ .name = "ma2155", .llvm_name = "ma2155", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -221,7 +221,7 @@ pub const cpu_ma2155 = Cpu{ pub const cpu_ma2450 = Cpu{ .name = "ma2450", .llvm_name = "ma2450", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -229,7 +229,7 @@ pub const cpu_ma2450 = Cpu{ pub const cpu_ma2455 = Cpu{ .name = "ma2455", .llvm_name = "ma2455", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -237,7 +237,7 @@ pub const cpu_ma2455 = Cpu{ pub const cpu_ma2480 = Cpu{ .name = "ma2480", .llvm_name = "ma2480", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -245,7 +245,7 @@ pub const cpu_ma2480 = Cpu{ pub const cpu_ma2485 = Cpu{ .name = "ma2485", .llvm_name = "ma2485", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -253,7 +253,7 @@ pub const cpu_ma2485 = Cpu{ pub const cpu_ma2x5x = Cpu{ .name = "ma2x5x", .llvm_name = "ma2x5x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -261,7 +261,7 @@ pub const cpu_ma2x5x = Cpu{ pub const cpu_ma2x8x = Cpu{ .name = "ma2x8x", .llvm_name = "ma2x8x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -269,7 +269,7 @@ pub const cpu_ma2x8x = Cpu{ pub const cpu_myriad2 = Cpu{ .name = "myriad2", .llvm_name = "myriad2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -277,7 +277,7 @@ pub const cpu_myriad2 = Cpu{ pub const cpu_myriad21 = Cpu{ .name = "myriad2.1", .llvm_name = "myriad2.1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -285,7 +285,7 @@ pub const cpu_myriad21 = Cpu{ pub const cpu_myriad22 = Cpu{ .name = "myriad2.2", .llvm_name = "myriad2.2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -293,7 +293,7 @@ pub const cpu_myriad22 = Cpu{ pub const cpu_myriad23 = Cpu{ .name = "myriad2.3", .llvm_name = "myriad2.3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, }, }; @@ -301,7 +301,7 @@ pub const cpu_myriad23 = Cpu{ pub const cpu_niagara = Cpu{ .name = "niagara", .llvm_name = "niagara", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -312,7 +312,7 @@ pub const cpu_niagara = Cpu{ pub const cpu_niagara2 = Cpu{ .name = "niagara2", .llvm_name = "niagara2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -323,7 +323,7 @@ pub const cpu_niagara2 = Cpu{ pub const cpu_niagara3 = Cpu{ .name = "niagara3", .llvm_name = "niagara3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -334,7 +334,7 @@ pub const cpu_niagara3 = Cpu{ pub const cpu_niagara4 = Cpu{ .name = "niagara4", .llvm_name = "niagara4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -346,42 +346,42 @@ pub const cpu_niagara4 = Cpu{ pub const cpu_sparclet = Cpu{ .name = "sparclet", .llvm_name = "sparclet", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_sparclite = Cpu{ .name = "sparclite", .llvm_name = "sparclite", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_sparclite86x = Cpu{ .name = "sparclite86x", .llvm_name = "sparclite86x", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_supersparc = Cpu{ .name = "supersparc", .llvm_name = "supersparc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_tsc701 = Cpu{ .name = "tsc701", .llvm_name = "tsc701", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_ultrasparc = Cpu{ .name = "ultrasparc", .llvm_name = "ultrasparc", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -391,7 +391,7 @@ pub const cpu_ultrasparc = Cpu{ pub const cpu_ultrasparc3 = Cpu{ .name = "ultrasparc3", .llvm_name = "ultrasparc3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_deprecatedV8, &feature_v9, &feature_vis, @@ -402,7 +402,7 @@ pub const cpu_ultrasparc3 = Cpu{ pub const cpu_ut699 = Cpu{ .name = "ut699", .llvm_name = "ut699", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_leon, &feature_noFmuls, &feature_noFsmuld, @@ -412,7 +412,7 @@ pub const cpu_ut699 = Cpu{ pub const cpu_v7 = Cpu{ .name = "v7", .llvm_name = "v7", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_noFsmuld, &feature_softMulDiv, }, @@ -421,14 +421,14 @@ pub const cpu_v7 = Cpu{ pub const cpu_v8 = Cpu{ .name = "v8", .llvm_name = "v8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_v9 = Cpu{ .name = "v9", .llvm_name = "v9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_v9, }, }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index e7fa7c7333025e8fa0cbdeedef35c9dbb6fcd4d0..1f5d64846855472b213a07e43d9752789e165090 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -4,245 +4,245 @@ const Cpu = @import("std").target.Cpu; pub const feature_dfpPackedConversion = Feature{ .name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_dfpZonedConversion = Feature{ .name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_deflateConversion = Feature{ .name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_distinctOps = Feature{ .name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_enhancedDat2 = Feature{ .name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_enhancedSort = Feature{ .name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_executionHint = Feature{ .name = "execution-hint", .description = "Assume that the execution-hint facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fpExtension = Feature{ .name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastSerialization = Feature{ .name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_guardedStorage = Feature{ .name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_highWord = Feature{ .name = "high-word", .description = "Assume that the high-word facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_insertReferenceBitsMultiple = Feature{ .name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_interlockedAccess1 = Feature{ .name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loadAndTrap = Feature{ .name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loadAndZeroRightmostByte = Feature{ .name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loadStoreOnCond = Feature{ .name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_loadStoreOnCond2 = Feature{ .name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension3 = Feature{ .name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension4 = Feature{ .name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension5 = Feature{ .name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension7 = Feature{ .name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension8 = Feature{ .name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_messageSecurityAssistExtension9 = Feature{ .name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_miscellaneousExtensions = Feature{ .name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_miscellaneousExtensions2 = Feature{ .name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_miscellaneousExtensions3 = Feature{ .name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_populationCount = Feature{ .name = "population-count", .description = "Assume that the population-count facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_processorAssist = Feature{ .name = "processor-assist", .description = "Assume that the processor-assist facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_resetReferenceBitsMultiple = Feature{ .name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_transactionalExecution = Feature{ .name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vector = Feature{ .name = "vector", .description = "Assume that the vectory facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vectorEnhancements1 = Feature{ .name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vectorEnhancements2 = Feature{ .name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vectorPackedDecimal = Feature{ .name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vectorPackedDecimalEnhancement = Feature{ .name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -287,7 +287,7 @@ pub const features = &[_]*const Feature { pub const cpu_arch10 = Cpu{ .name = "arch10", .llvm_name = "arch10", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpZonedConversion, &feature_distinctOps, &feature_enhancedDat2, @@ -311,7 +311,7 @@ pub const cpu_arch10 = Cpu{ pub const cpu_arch11 = Cpu{ .name = "arch11", .llvm_name = "arch11", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_distinctOps, @@ -340,7 +340,7 @@ pub const cpu_arch11 = Cpu{ pub const cpu_arch12 = Cpu{ .name = "arch12", .llvm_name = "arch12", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_distinctOps, @@ -376,7 +376,7 @@ pub const cpu_arch12 = Cpu{ pub const cpu_arch13 = Cpu{ .name = "arch13", .llvm_name = "arch13", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_deflateConversion, @@ -418,14 +418,14 @@ pub const cpu_arch13 = Cpu{ pub const cpu_arch8 = Cpu{ .name = "arch8", .llvm_name = "arch8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_arch9 = Cpu{ .name = "arch9", .llvm_name = "arch9", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_distinctOps, &feature_fpExtension, &feature_fastSerialization, @@ -442,21 +442,21 @@ pub const cpu_arch9 = Cpu{ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_z10 = Cpu{ .name = "z10", .llvm_name = "z10", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_z13 = Cpu{ .name = "z13", .llvm_name = "z13", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_distinctOps, @@ -485,7 +485,7 @@ pub const cpu_z13 = Cpu{ pub const cpu_z14 = Cpu{ .name = "z14", .llvm_name = "z14", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_distinctOps, @@ -521,7 +521,7 @@ pub const cpu_z14 = Cpu{ pub const cpu_z15 = Cpu{ .name = "z15", .llvm_name = "z15", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpPackedConversion, &feature_dfpZonedConversion, &feature_deflateConversion, @@ -563,7 +563,7 @@ pub const cpu_z15 = Cpu{ pub const cpu_z196 = Cpu{ .name = "z196", .llvm_name = "z196", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_distinctOps, &feature_fpExtension, &feature_fastSerialization, @@ -580,7 +580,7 @@ pub const cpu_z196 = Cpu{ pub const cpu_zEC12 = Cpu{ .name = "zEC12", .llvm_name = "zEC12", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_dfpZonedConversion, &feature_distinctOps, &feature_enhancedDat2, diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 6b302a9ff661275a5df20b5fa6139b13275cb514..17d771770898b209ed7054d83373835d027893a1 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -4,70 +4,70 @@ const Cpu = @import("std").target.Cpu; pub const feature_atomics = Feature{ .name = "atomics", .description = "Enable Atomics", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bulkMemory = Feature{ .name = "bulk-memory", .description = "Enable bulk memory operations", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_exceptionHandling = Feature{ .name = "exception-handling", .description = "Enable Wasm exception handling", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_multivalue = Feature{ .name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mutableGlobals = Feature{ .name = "mutable-globals", .description = "Enable mutable globals", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nontrappingFptoint = Feature{ .name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_simd128 = Feature{ .name = "simd128", .description = "Enable 128-bit SIMD", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_signExt = Feature{ .name = "sign-ext", .description = "Enable sign extension operators", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tailCall = Feature{ .name = "tail-call", .description = "Enable tail call instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_unimplementedSimd128 = Feature{ .name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_simd128, }, }; @@ -88,7 +88,7 @@ pub const features = &[_]*const Feature { pub const cpu_bleedingEdge = Cpu{ .name = "bleeding-edge", .llvm_name = "bleeding-edge", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_atomics, &feature_mutableGlobals, &feature_nontrappingFptoint, @@ -100,14 +100,14 @@ pub const cpu_bleedingEdge = Cpu{ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_mvp = Cpu{ .name = "mvp", .llvm_name = "mvp", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index de49ce937cc43000c6567c0e599eb9b907409d18..573282c664458f912d44d69ef96f1d43bc260116 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -4,7 +4,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_dnow3 = Feature{ .name = "3dnow", .description = "Enable 3DNow! instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, }, }; @@ -12,7 +12,7 @@ pub const feature_dnow3 = Feature{ pub const feature_dnowa3 = Feature{ .name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, }, }; @@ -20,21 +20,21 @@ pub const feature_dnowa3 = Feature{ pub const feature_bit64 = Feature{ .name = "64bit", .description = "Support 64-bit instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_adx = Feature{ .name = "adx", .description = "Support ADX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_aes = Feature{ .name = "aes", .description = "Enable AES instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -42,7 +42,7 @@ pub const feature_aes = Feature{ pub const feature_avx = Feature{ .name = "avx", .description = "Enable AVX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -50,7 +50,7 @@ pub const feature_avx = Feature{ pub const feature_avx2 = Feature{ .name = "avx2", .description = "Enable AVX2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -58,7 +58,7 @@ pub const feature_avx2 = Feature{ pub const feature_avx512f = Feature{ .name = "avx512f", .description = "Enable AVX-512 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -66,7 +66,7 @@ pub const feature_avx512f = Feature{ pub const feature_avx512bf16 = Feature{ .name = "avx512bf16", .description = "Support bfloat16 floating point", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -74,7 +74,7 @@ pub const feature_avx512bf16 = Feature{ pub const feature_avx512bitalg = Feature{ .name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -82,21 +82,21 @@ pub const feature_avx512bitalg = Feature{ pub const feature_bmi = Feature{ .name = "bmi", .description = "Support BMI instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bmi2 = Feature{ .name = "bmi2", .description = "Support BMI2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avx512bw = Feature{ .name = "avx512bw", .description = "Enable AVX-512 Byte and Word Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -104,14 +104,14 @@ pub const feature_avx512bw = Feature{ pub const feature_branchfusion = Feature{ .name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avx512cd = Feature{ .name = "avx512cd", .description = "Enable AVX-512 Conflict Detection Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -119,49 +119,49 @@ pub const feature_avx512cd = Feature{ pub const feature_cldemote = Feature{ .name = "cldemote", .description = "Enable Cache Demote", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_clflushopt = Feature{ .name = "clflushopt", .description = "Flush A Cache Line Optimized", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_clwb = Feature{ .name = "clwb", .description = "Cache Line Write Back", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_clzero = Feature{ .name = "clzero", .description = "Enable Cache Line Zero", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cmov = Feature{ .name = "cmov", .description = "Enable conditional move instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cx8 = Feature{ .name = "cx8", .description = "Support CMPXCHG8B instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_cx16 = Feature{ .name = "cx16", .description = "64-bit with cmpxchg16b", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, }, }; @@ -169,7 +169,7 @@ pub const feature_cx16 = Feature{ pub const feature_avx512dq = Feature{ .name = "avx512dq", .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -177,21 +177,21 @@ pub const feature_avx512dq = Feature{ pub const feature_mpx = Feature{ .name = "mpx", .description = "Deprecated. Support MPX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_enqcmd = Feature{ .name = "enqcmd", .description = "Has ENQCMD instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avx512er = Feature{ .name = "avx512er", .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -199,14 +199,14 @@ pub const feature_avx512er = Feature{ pub const feature_ermsb = Feature{ .name = "ermsb", .description = "REP MOVS/STOS are fast", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_f16c = Feature{ .name = "f16c", .description = "Support 16-bit floating point conversion instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -214,7 +214,7 @@ pub const feature_f16c = Feature{ pub const feature_fma = Feature{ .name = "fma", .description = "Enable three-operand fused multiple-add", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -222,7 +222,7 @@ pub const feature_fma = Feature{ pub const feature_fma4 = Feature{ .name = "fma4", .description = "Enable four-operand fused multiple-add", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -230,42 +230,42 @@ pub const feature_fma4 = Feature{ pub const feature_fsgsbase = Feature{ .name = "fsgsbase", .description = "Support FS/GS Base instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fxsr = Feature{ .name = "fxsr", .description = "Support fxsave/fxrestore instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fast11bytenop = Feature{ .name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fast15bytenop = Feature{ .name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastBextr = Feature{ .name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastHops = Feature{ .name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -273,63 +273,63 @@ pub const feature_fastHops = Feature{ pub const feature_fastLzcnt = Feature{ .name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastPartialYmmOrZmmWrite = Feature{ .name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastShldRotate = Feature{ .name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastScalarFsqrt = Feature{ .name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastScalarShiftMasks = Feature{ .name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastVariableShuffle = Feature{ .name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastVectorFsqrt = Feature{ .name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_fastVectorShiftMasks = Feature{ .name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_gfni = Feature{ .name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -337,14 +337,14 @@ pub const feature_gfni = Feature{ pub const feature_fastGather = Feature{ .name = "fast-gather", .description = "Indicates if gather is reasonably fast", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avx512ifma = Feature{ .name = "avx512ifma", .description = "Enable AVX-512 Integer Fused Multiple-Add", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -352,112 +352,112 @@ pub const feature_avx512ifma = Feature{ pub const feature_invpcid = Feature{ .name = "invpcid", .description = "Invalidate Process-Context Identifier", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sahf = Feature{ .name = "sahf", .description = "Support LAHF and SAHF instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_leaSp = Feature{ .name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_leaUsesAg = Feature{ .name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lwp = Feature{ .name = "lwp", .description = "Enable LWP instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_lzcnt = Feature{ .name = "lzcnt", .description = "Support LZCNT instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_falseDepsLzcntTzcnt = Feature{ .name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mmx = Feature{ .name = "mmx", .description = "Enable MMX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_movbe = Feature{ .name = "movbe", .description = "Support MOVBE instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_movdir64b = Feature{ .name = "movdir64b", .description = "Support movdir64b instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_movdiri = Feature{ .name = "movdiri", .description = "Support movdiri instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mwaitx = Feature{ .name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_macrofusion = Feature{ .name = "macrofusion", .description = "Various instructions can be fused with conditional branches", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_mergeToThreewayBranch = Feature{ .name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_nopl = Feature{ .name = "nopl", .description = "Enable NOPL instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_pclmul = Feature{ .name = "pclmul", .description = "Enable packed carry-less multiplication instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -465,14 +465,14 @@ pub const feature_pclmul = Feature{ pub const feature_pconfig = Feature{ .name = "pconfig", .description = "platform configuration instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_avx512pf = Feature{ .name = "avx512pf", .description = "Enable AVX-512 PreFetch Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -480,107 +480,107 @@ pub const feature_avx512pf = Feature{ pub const feature_pku = Feature{ .name = "pku", .description = "Enable protection keys", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_popcnt = Feature{ .name = "popcnt", .description = "Support POPCNT instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_falseDepsPopcnt = Feature{ .name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_prefetchwt1 = Feature{ .name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_prfchw = Feature{ .name = "prfchw", .description = "Support PRFCHW instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ptwrite = Feature{ .name = "ptwrite", .description = "Support ptwrite instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_padShortFunctions = Feature{ .name = "pad-short-functions", .description = "Pad short functions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_prefer128Bit = Feature{ .name = "prefer-128-bit", .description = "Prefer 128-bit AVX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_prefer256Bit = Feature{ .name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rdpid = Feature{ .name = "rdpid", .description = "Support RDPID instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rdrnd = Feature{ .name = "rdrnd", .description = "Support RDRAND instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rdseed = Feature{ .name = "rdseed", .description = "Support RDSEED instruction", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_rtm = Feature{ .name = "rtm", .description = "Support RTM instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_retpoline = Feature{ .name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { + &feature_retpolineIndirectCalls, &feature_retpolineIndirectBranches, - &feature_retpolineIndirectCalls, }, }; pub const feature_retpolineExternalThunk = Feature{ .name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_retpolineIndirectCalls, }, }; @@ -588,28 +588,28 @@ pub const feature_retpolineExternalThunk = Feature{ pub const feature_retpolineIndirectBranches = Feature{ .name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_retpolineIndirectCalls = Feature{ .name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sgx = Feature{ .name = "sgx", .description = "Enable Software Guard Extensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sha = Feature{ .name = "sha", .description = "Enable SHA instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -617,21 +617,21 @@ pub const feature_sha = Feature{ pub const feature_shstk = Feature{ .name = "shstk", .description = "Support CET Shadow-Stack instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sse = Feature{ .name = "sse", .description = "Enable SSE instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_sse2 = Feature{ .name = "sse2", .description = "Enable SSE2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -639,7 +639,7 @@ pub const feature_sse2 = Feature{ pub const feature_sse3 = Feature{ .name = "sse3", .description = "Enable SSE3 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -647,7 +647,7 @@ pub const feature_sse3 = Feature{ pub const feature_sse4a = Feature{ .name = "sse4a", .description = "Support SSE 4a instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -655,7 +655,7 @@ pub const feature_sse4a = Feature{ pub const feature_sse41 = Feature{ .name = "sse4.1", .description = "Enable SSE 4.1 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -663,7 +663,7 @@ pub const feature_sse41 = Feature{ pub const feature_sse42 = Feature{ .name = "sse4.2", .description = "Enable SSE 4.2 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -671,14 +671,14 @@ pub const feature_sse42 = Feature{ pub const feature_sseUnalignedMem = Feature{ .name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_ssse3 = Feature{ .name = "ssse3", .description = "Enable SSSE3 instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -686,105 +686,105 @@ pub const feature_ssse3 = Feature{ pub const feature_slow3opsLea = Feature{ .name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_idivlToDivb = Feature{ .name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_idivqToDivl = Feature{ .name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowIncdec = Feature{ .name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowLea = Feature{ .name = "slow-lea", .description = "LEA instruction with certain arguments is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowPmaddwd = Feature{ .name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowPmulld = Feature{ .name = "slow-pmulld", .description = "PMULLD instruction is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowShld = Feature{ .name = "slow-shld", .description = "SHLD instruction is slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowTwoMemOps = Feature{ .name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowUnalignedMem16 = Feature{ .name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_slowUnalignedMem32 = Feature{ .name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_softFloat = Feature{ .name = "soft-float", .description = "Use software floating point features", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_tbm = Feature{ .name = "tbm", .description = "Enable TBM instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_useAa = Feature{ .name = "use-aa", .description = "Use alias analysis during codegen", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_vaes = Feature{ .name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -792,7 +792,7 @@ pub const feature_vaes = Feature{ pub const feature_avx512vbmi = Feature{ .name = "avx512vbmi", .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -800,7 +800,7 @@ pub const feature_avx512vbmi = Feature{ pub const feature_avx512vbmi2 = Feature{ .name = "avx512vbmi2", .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -808,7 +808,7 @@ pub const feature_avx512vbmi2 = Feature{ pub const feature_avx512vl = Feature{ .name = "avx512vl", .description = "Enable AVX-512 Vector Length eXtensions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -816,7 +816,7 @@ pub const feature_avx512vl = Feature{ pub const feature_avx512vnni = Feature{ .name = "avx512vnni", .description = "Enable AVX-512 Vector Neural Network Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -824,7 +824,7 @@ pub const feature_avx512vnni = Feature{ pub const feature_avx512vp2intersect = Feature{ .name = "avx512vp2intersect", .description = "Enable AVX-512 vp2intersect", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -832,7 +832,7 @@ pub const feature_avx512vp2intersect = Feature{ pub const feature_vpclmulqdq = Feature{ .name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -840,7 +840,7 @@ pub const feature_vpclmulqdq = Feature{ pub const feature_avx512vpopcntdq = Feature{ .name = "avx512vpopcntdq", .description = "Enable AVX-512 Population Count Instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -848,28 +848,28 @@ pub const feature_avx512vpopcntdq = Feature{ pub const feature_waitpkg = Feature{ .name = "waitpkg", .description = "Wait and pause enhancements", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_wbnoinvd = Feature{ .name = "wbnoinvd", .description = "Write Back No Invalidate", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_x87 = Feature{ .name = "x87", .description = "Enable X87 float instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xop = Feature{ .name = "xop", .description = "Enable XOP instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_sse, }, }; @@ -877,49 +877,49 @@ pub const feature_xop = Feature{ pub const feature_xsave = Feature{ .name = "xsave", .description = "Support xsave instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xsavec = Feature{ .name = "xsavec", .description = "Support xsavec instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xsaveopt = Feature{ .name = "xsaveopt", .description = "Support xsaveopt instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_xsaves = Feature{ .name = "xsaves", .description = "Support xsaves instructions", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bitMode16 = Feature{ .name = "16bit-mode", .description = "16-bit mode (i8086)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bitMode32 = Feature{ .name = "32bit-mode", .description = "32-bit mode (80386)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const feature_bitMode64 = Feature{ .name = "64bit-mode", .description = "64-bit mode (x86_64)", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; @@ -1055,7 +1055,7 @@ pub const features = &[_]*const Feature { pub const cpu_amdfam10 = Cpu{ .name = "amdfam10", .llvm_name = "amdfam10", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -1078,7 +1078,7 @@ pub const cpu_amdfam10 = Cpu{ pub const cpu_athlon = Cpu{ .name = "athlon", .llvm_name = "athlon", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cmov, @@ -1093,7 +1093,7 @@ pub const cpu_athlon = Cpu{ pub const cpu_athlon4 = Cpu{ .name = "athlon-4", .llvm_name = "athlon-4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cmov, @@ -1110,7 +1110,7 @@ pub const cpu_athlon4 = Cpu{ pub const cpu_athlonFx = Cpu{ .name = "athlon-fx", .llvm_name = "athlon-fx", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -1130,7 +1130,7 @@ pub const cpu_athlonFx = Cpu{ pub const cpu_athlonMp = Cpu{ .name = "athlon-mp", .llvm_name = "athlon-mp", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cmov, @@ -1147,7 +1147,7 @@ pub const cpu_athlonMp = Cpu{ pub const cpu_athlonTbird = Cpu{ .name = "athlon-tbird", .llvm_name = "athlon-tbird", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cmov, @@ -1162,7 +1162,7 @@ pub const cpu_athlonTbird = Cpu{ pub const cpu_athlonXp = Cpu{ .name = "athlon-xp", .llvm_name = "athlon-xp", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cmov, @@ -1179,7 +1179,7 @@ pub const cpu_athlonXp = Cpu{ pub const cpu_athlon64 = Cpu{ .name = "athlon64", .llvm_name = "athlon64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -1199,7 +1199,7 @@ pub const cpu_athlon64 = Cpu{ pub const cpu_athlon64Sse3 = Cpu{ .name = "athlon64-sse3", .llvm_name = "athlon64-sse3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -1220,7 +1220,7 @@ pub const cpu_athlon64Sse3 = Cpu{ pub const cpu_atom = Cpu{ .name = "atom", .llvm_name = "atom", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -1246,7 +1246,7 @@ pub const cpu_atom = Cpu{ pub const cpu_barcelona = Cpu{ .name = "barcelona", .llvm_name = "barcelona", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -1269,7 +1269,7 @@ pub const cpu_barcelona = Cpu{ pub const cpu_bdver1 = Cpu{ .name = "bdver1", .llvm_name = "bdver1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1298,7 +1298,7 @@ pub const cpu_bdver1 = Cpu{ pub const cpu_bdver2 = Cpu{ .name = "bdver2", .llvm_name = "bdver2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1332,7 +1332,7 @@ pub const cpu_bdver2 = Cpu{ pub const cpu_bdver3 = Cpu{ .name = "bdver3", .llvm_name = "bdver3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1368,7 +1368,7 @@ pub const cpu_bdver3 = Cpu{ pub const cpu_bdver4 = Cpu{ .name = "bdver4", .llvm_name = "bdver4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1407,7 +1407,7 @@ pub const cpu_bdver4 = Cpu{ pub const cpu_bonnell = Cpu{ .name = "bonnell", .llvm_name = "bonnell", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -1433,7 +1433,7 @@ pub const cpu_bonnell = Cpu{ pub const cpu_broadwell = Cpu{ .name = "broadwell", .llvm_name = "broadwell", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -1479,7 +1479,7 @@ pub const cpu_broadwell = Cpu{ pub const cpu_btver1 = Cpu{ .name = "btver1", .llvm_name = "btver1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -1505,7 +1505,7 @@ pub const cpu_btver1 = Cpu{ pub const cpu_btver2 = Cpu{ .name = "btver2", .llvm_name = "btver2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1543,7 +1543,7 @@ pub const cpu_btver2 = Cpu{ pub const cpu_c3 = Cpu{ .name = "c3", .llvm_name = "c3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnow3, &feature_slowUnalignedMem16, @@ -1554,7 +1554,7 @@ pub const cpu_c3 = Cpu{ pub const cpu_c32 = Cpu{ .name = "c3-2", .llvm_name = "c3-2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -1568,7 +1568,7 @@ pub const cpu_c32 = Cpu{ pub const cpu_cannonlake = Cpu{ .name = "cannonlake", .llvm_name = "cannonlake", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -1629,7 +1629,7 @@ pub const cpu_cannonlake = Cpu{ pub const cpu_cascadelake = Cpu{ .name = "cascadelake", .llvm_name = "cascadelake", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -1689,7 +1689,7 @@ pub const cpu_cascadelake = Cpu{ pub const cpu_cooperlake = Cpu{ .name = "cooperlake", .llvm_name = "cooperlake", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -1750,7 +1750,7 @@ pub const cpu_cooperlake = Cpu{ pub const cpu_coreAvxI = Cpu{ .name = "core-avx-i", .llvm_name = "core-avx-i", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -1784,7 +1784,7 @@ pub const cpu_coreAvxI = Cpu{ pub const cpu_coreAvx2 = Cpu{ .name = "core-avx2", .llvm_name = "core-avx2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -1827,7 +1827,7 @@ pub const cpu_coreAvx2 = Cpu{ pub const cpu_core2 = Cpu{ .name = "core2", .llvm_name = "core2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -1847,7 +1847,7 @@ pub const cpu_core2 = Cpu{ pub const cpu_corei7 = Cpu{ .name = "corei7", .llvm_name = "corei7", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -1867,7 +1867,7 @@ pub const cpu_corei7 = Cpu{ pub const cpu_corei7Avx = Cpu{ .name = "corei7-avx", .llvm_name = "corei7-avx", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -1898,7 +1898,7 @@ pub const cpu_corei7Avx = Cpu{ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, &feature_slowUnalignedMem16, &feature_x87, @@ -1908,7 +1908,7 @@ pub const cpu_generic = Cpu{ pub const cpu_geode = Cpu{ .name = "geode", .llvm_name = "geode", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_cx8, @@ -1920,7 +1920,7 @@ pub const cpu_geode = Cpu{ pub const cpu_goldmont = Cpu{ .name = "goldmont", .llvm_name = "goldmont", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1957,7 +1957,7 @@ pub const cpu_goldmont = Cpu{ pub const cpu_goldmontPlus = Cpu{ .name = "goldmont-plus", .llvm_name = "goldmont-plus", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -1996,7 +1996,7 @@ pub const cpu_goldmontPlus = Cpu{ pub const cpu_haswell = Cpu{ .name = "haswell", .llvm_name = "haswell", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -2039,7 +2039,7 @@ pub const cpu_haswell = Cpu{ pub const cpu_i386 = Cpu{ .name = "i386", .llvm_name = "i386", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_slowUnalignedMem16, &feature_x87, }, @@ -2048,7 +2048,7 @@ pub const cpu_i386 = Cpu{ pub const cpu_i486 = Cpu{ .name = "i486", .llvm_name = "i486", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_slowUnalignedMem16, &feature_x87, }, @@ -2057,7 +2057,7 @@ pub const cpu_i486 = Cpu{ pub const cpu_i586 = Cpu{ .name = "i586", .llvm_name = "i586", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, &feature_slowUnalignedMem16, &feature_x87, @@ -2067,7 +2067,7 @@ pub const cpu_i586 = Cpu{ pub const cpu_i686 = Cpu{ .name = "i686", .llvm_name = "i686", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_slowUnalignedMem16, @@ -2078,7 +2078,7 @@ pub const cpu_i686 = Cpu{ pub const cpu_icelakeClient = Cpu{ .name = "icelake-client", .llvm_name = "icelake-client", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2148,7 +2148,7 @@ pub const cpu_icelakeClient = Cpu{ pub const cpu_icelakeServer = Cpu{ .name = "icelake-server", .llvm_name = "icelake-server", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2220,7 +2220,7 @@ pub const cpu_icelakeServer = Cpu{ pub const cpu_ivybridge = Cpu{ .name = "ivybridge", .llvm_name = "ivybridge", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -2254,7 +2254,7 @@ pub const cpu_ivybridge = Cpu{ pub const cpu_k6 = Cpu{ .name = "k6", .llvm_name = "k6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, &feature_mmx, &feature_slowUnalignedMem16, @@ -2265,7 +2265,7 @@ pub const cpu_k6 = Cpu{ pub const cpu_k62 = Cpu{ .name = "k6-2", .llvm_name = "k6-2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnow3, &feature_cx8, @@ -2277,7 +2277,7 @@ pub const cpu_k62 = Cpu{ pub const cpu_k63 = Cpu{ .name = "k6-3", .llvm_name = "k6-3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnow3, &feature_cx8, @@ -2289,7 +2289,7 @@ pub const cpu_k63 = Cpu{ pub const cpu_k8 = Cpu{ .name = "k8", .llvm_name = "k8", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -2309,7 +2309,7 @@ pub const cpu_k8 = Cpu{ pub const cpu_k8Sse3 = Cpu{ .name = "k8-sse3", .llvm_name = "k8-sse3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -2330,7 +2330,7 @@ pub const cpu_k8Sse3 = Cpu{ pub const cpu_knl = Cpu{ .name = "knl", .llvm_name = "knl", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2375,7 +2375,7 @@ pub const cpu_knl = Cpu{ pub const cpu_knm = Cpu{ .name = "knm", .llvm_name = "knm", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2421,14 +2421,14 @@ pub const cpu_knm = Cpu{ pub const cpu_lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { }, }; pub const cpu_nehalem = Cpu{ .name = "nehalem", .llvm_name = "nehalem", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -2448,7 +2448,7 @@ pub const cpu_nehalem = Cpu{ pub const cpu_nocona = Cpu{ .name = "nocona", .llvm_name = "nocona", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -2466,7 +2466,7 @@ pub const cpu_nocona = Cpu{ pub const cpu_opteron = Cpu{ .name = "opteron", .llvm_name = "opteron", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -2486,7 +2486,7 @@ pub const cpu_opteron = Cpu{ pub const cpu_opteronSse3 = Cpu{ .name = "opteron-sse3", .llvm_name = "opteron-sse3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnowa3, &feature_bit64, @@ -2507,7 +2507,7 @@ pub const cpu_opteronSse3 = Cpu{ pub const cpu_penryn = Cpu{ .name = "penryn", .llvm_name = "penryn", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -2527,7 +2527,7 @@ pub const cpu_penryn = Cpu{ pub const cpu_pentium = Cpu{ .name = "pentium", .llvm_name = "pentium", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, &feature_slowUnalignedMem16, &feature_x87, @@ -2537,7 +2537,7 @@ pub const cpu_pentium = Cpu{ pub const cpu_pentiumM = Cpu{ .name = "pentium-m", .llvm_name = "pentium-m", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2553,7 +2553,7 @@ pub const cpu_pentiumM = Cpu{ pub const cpu_pentiumMmx = Cpu{ .name = "pentium-mmx", .llvm_name = "pentium-mmx", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cx8, &feature_mmx, &feature_slowUnalignedMem16, @@ -2564,7 +2564,7 @@ pub const cpu_pentiumMmx = Cpu{ pub const cpu_pentium2 = Cpu{ .name = "pentium2", .llvm_name = "pentium2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2578,7 +2578,7 @@ pub const cpu_pentium2 = Cpu{ pub const cpu_pentium3 = Cpu{ .name = "pentium3", .llvm_name = "pentium3", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2593,7 +2593,7 @@ pub const cpu_pentium3 = Cpu{ pub const cpu_pentium3m = Cpu{ .name = "pentium3m", .llvm_name = "pentium3m", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2608,7 +2608,7 @@ pub const cpu_pentium3m = Cpu{ pub const cpu_pentium4 = Cpu{ .name = "pentium4", .llvm_name = "pentium4", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2624,7 +2624,7 @@ pub const cpu_pentium4 = Cpu{ pub const cpu_pentium4m = Cpu{ .name = "pentium4m", .llvm_name = "pentium4m", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2640,7 +2640,7 @@ pub const cpu_pentium4m = Cpu{ pub const cpu_pentiumpro = Cpu{ .name = "pentiumpro", .llvm_name = "pentiumpro", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_nopl, @@ -2652,7 +2652,7 @@ pub const cpu_pentiumpro = Cpu{ pub const cpu_prescott = Cpu{ .name = "prescott", .llvm_name = "prescott", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -2668,7 +2668,7 @@ pub const cpu_prescott = Cpu{ pub const cpu_sandybridge = Cpu{ .name = "sandybridge", .llvm_name = "sandybridge", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_avx, @@ -2699,7 +2699,7 @@ pub const cpu_sandybridge = Cpu{ pub const cpu_silvermont = Cpu{ .name = "silvermont", .llvm_name = "silvermont", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -2729,7 +2729,7 @@ pub const cpu_silvermont = Cpu{ pub const cpu_skx = Cpu{ .name = "skx", .llvm_name = "skx", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2788,7 +2788,7 @@ pub const cpu_skx = Cpu{ pub const cpu_skylake = Cpu{ .name = "skylake", .llvm_name = "skylake", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2840,7 +2840,7 @@ pub const cpu_skylake = Cpu{ pub const cpu_skylakeAvx512 = Cpu{ .name = "skylake-avx512", .llvm_name = "skylake-avx512", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -2899,7 +2899,7 @@ pub const cpu_skylakeAvx512 = Cpu{ pub const cpu_slm = Cpu{ .name = "slm", .llvm_name = "slm", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -2929,7 +2929,7 @@ pub const cpu_slm = Cpu{ pub const cpu_tigerlake = Cpu{ .name = "tigerlake", .llvm_name = "tigerlake", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -3003,7 +3003,7 @@ pub const cpu_tigerlake = Cpu{ pub const cpu_tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_sse, &feature_aes, @@ -3047,7 +3047,7 @@ pub const cpu_tremont = Cpu{ pub const cpu_westmere = Cpu{ .name = "westmere", .llvm_name = "westmere", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -3068,7 +3068,7 @@ pub const cpu_westmere = Cpu{ pub const cpu_winchipC6 = Cpu{ .name = "winchip-c6", .llvm_name = "winchip-c6", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_slowUnalignedMem16, &feature_x87, @@ -3078,7 +3078,7 @@ pub const cpu_winchipC6 = Cpu{ pub const cpu_winchip2 = Cpu{ .name = "winchip2", .llvm_name = "winchip2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_mmx, &feature_dnow3, &feature_slowUnalignedMem16, @@ -3089,7 +3089,7 @@ pub const cpu_winchip2 = Cpu{ pub const cpu_x8664 = Cpu{ .name = "x86-64", .llvm_name = "x86-64", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_cmov, &feature_cx8, @@ -3108,7 +3108,7 @@ pub const cpu_x8664 = Cpu{ pub const cpu_yonah = Cpu{ .name = "yonah", .llvm_name = "yonah", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_cmov, &feature_cx8, &feature_fxsr, @@ -3124,7 +3124,7 @@ pub const cpu_yonah = Cpu{ pub const cpu_znver1 = Cpu{ .name = "znver1", .llvm_name = "znver1", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, @@ -3171,7 +3171,7 @@ pub const cpu_znver1 = Cpu{ pub const cpu_znver2 = Cpu{ .name = "znver2", .llvm_name = "znver2", - .subfeatures = &[_]*const Feature { + .dependencies = &[_]*const Feature { &feature_bit64, &feature_adx, &feature_sse, diff --git a/src/main.cpp b/src/main.cpp index f061b13414ec1ee2ca83f2ba246c1222a658fe59..32efb9f0202566cf56e2a31a3a118883efc0bab2 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -135,7 +135,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { "Targets Options:\n" " --list-features [arch] list available features for the given architecture\n" " --list-cpus [arch] list available cpus for the given architecture\n" - " --show-subfeatures list subfeatures for each entry from --list-features or --list-cpus\n" + " --show-dependencies list feature dependencies for each entry from --list-{features,cpus}\n" , arg0); return return_code; } @@ -540,7 +540,7 @@ int main(int argc, char **argv) { const char *targets_list_features_arch = nullptr; const char *targets_list_cpus_arch = nullptr; - bool targets_show_subfeatures = false; + bool targets_show_dependencies = false; ZigList llvm_argv = {0}; llvm_argv.append("zig (LLVM option parsing)"); @@ -792,8 +792,8 @@ int main(int argc, char **argv) { cur_pkg = cur_pkg->parent; } else if (strcmp(arg, "-ffunction-sections") == 0) { function_sections = true; - } else if (strcmp(arg, "--show-subfeatures") == 0) { - targets_show_subfeatures = true; + } else if (strcmp(arg, "--show-dependencies") == 0) { + targets_show_dependencies = true; } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); @@ -1448,13 +1448,13 @@ int main(int argc, char **argv) { stage2_list_features_for_arch( targets_list_features_arch, strlen(targets_list_features_arch), - targets_show_subfeatures); + targets_show_dependencies); return 0; } else if (targets_list_cpus_arch != nullptr) { stage2_list_cpus_for_arch( targets_list_cpus_arch, strlen(targets_list_cpus_arch), - targets_show_subfeatures); + targets_show_dependencies); return 0; } else { return print_target_list(stdout); -- 2.54.0 From 79a2747de490ca2bb1603fd1ce55637fb5278671 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 8 Jan 2020 20:27:05 -0500 Subject: [PATCH 14/63] Add llvm_name to feature defs --- lib/std/target/aarch64.zig | 537 ++++--- lib/std/target/amdgpu.zig | 1037 +++++++------ lib/std/target/arm.zig | 687 +++++---- lib/std/target/avr.zig | 2806 ++++++++++++++++++------------------ lib/std/target/bpf.zig | 3 + lib/std/target/hexagon.zig | 10 + lib/std/target/mips.zig | 242 ++-- lib/std/target/msp430.zig | 4 + lib/std/target/nvptx.zig | 25 + lib/std/target/powerpc.zig | 55 +- lib/std/target/riscv.zig | 9 + lib/std/target/sparc.zig | 12 + lib/std/target/systemz.zig | 35 + lib/std/target/wasm.zig | 10 + lib/std/target/x86.zig | 126 ++ 15 files changed, 3135 insertions(+), 2463 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 85ef813dea6e5e7cebecd84122fab6d61d94f188..404a55e7a5543b747d52e34fd1469d1639c38562 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_aes = Feature{ .name = "aes", + .llvm_name = "aes", .description = "Enable AES support", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -11,6 +12,7 @@ pub const feature_aes = Feature{ pub const feature_am = Feature{ .name = "am", + .llvm_name = "am", .description = "Enable v8.4-A Activity Monitors extension", .dependencies = &[_]*const Feature { }, @@ -18,6 +20,7 @@ pub const feature_am = Feature{ pub const feature_aggressiveFma = Feature{ .name = "aggressive-fma", + .llvm_name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", .dependencies = &[_]*const Feature { }, @@ -25,6 +28,7 @@ pub const feature_aggressiveFma = Feature{ pub const feature_altnzcv = Feature{ .name = "altnzcv", + .llvm_name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", .dependencies = &[_]*const Feature { }, @@ -32,6 +36,7 @@ pub const feature_altnzcv = Feature{ pub const feature_alternateSextloadCvtF32Pattern = Feature{ .name = "alternate-sextload-cvt-f32-pattern", + .llvm_name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", .dependencies = &[_]*const Feature { }, @@ -39,6 +44,7 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{ pub const feature_arithBccFusion = Feature{ .name = "arith-bcc-fusion", + .llvm_name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", .dependencies = &[_]*const Feature { }, @@ -46,6 +52,7 @@ pub const feature_arithBccFusion = Feature{ pub const feature_arithCbzFusion = Feature{ .name = "arith-cbz-fusion", + .llvm_name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", .dependencies = &[_]*const Feature { }, @@ -53,6 +60,7 @@ pub const feature_arithCbzFusion = Feature{ pub const feature_balanceFpOps = Feature{ .name = "balance-fp-ops", + .llvm_name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", .dependencies = &[_]*const Feature { }, @@ -60,6 +68,7 @@ pub const feature_balanceFpOps = Feature{ pub const feature_bti = Feature{ .name = "bti", + .llvm_name = "bti", .description = "Enable Branch Target Identification", .dependencies = &[_]*const Feature { }, @@ -67,6 +76,7 @@ pub const feature_bti = Feature{ pub const feature_ccidx = Feature{ .name = "ccidx", + .llvm_name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", .dependencies = &[_]*const Feature { }, @@ -74,6 +84,7 @@ pub const feature_ccidx = Feature{ pub const feature_ccpp = Feature{ .name = "ccpp", + .llvm_name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", .dependencies = &[_]*const Feature { }, @@ -81,6 +92,7 @@ pub const feature_ccpp = Feature{ pub const feature_crc = Feature{ .name = "crc", + .llvm_name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", .dependencies = &[_]*const Feature { }, @@ -88,6 +100,7 @@ pub const feature_crc = Feature{ pub const feature_ccdp = Feature{ .name = "ccdp", + .llvm_name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", .dependencies = &[_]*const Feature { }, @@ -95,6 +108,7 @@ pub const feature_ccdp = Feature{ pub const feature_callSavedX8 = Feature{ .name = "call-saved-x8", + .llvm_name = "call-saved-x8", .description = "Make X8 callee saved.", .dependencies = &[_]*const Feature { }, @@ -102,6 +116,7 @@ pub const feature_callSavedX8 = Feature{ pub const feature_callSavedX9 = Feature{ .name = "call-saved-x9", + .llvm_name = "call-saved-x9", .description = "Make X9 callee saved.", .dependencies = &[_]*const Feature { }, @@ -109,6 +124,7 @@ pub const feature_callSavedX9 = Feature{ pub const feature_callSavedX10 = Feature{ .name = "call-saved-x10", + .llvm_name = "call-saved-x10", .description = "Make X10 callee saved.", .dependencies = &[_]*const Feature { }, @@ -116,6 +132,7 @@ pub const feature_callSavedX10 = Feature{ pub const feature_callSavedX11 = Feature{ .name = "call-saved-x11", + .llvm_name = "call-saved-x11", .description = "Make X11 callee saved.", .dependencies = &[_]*const Feature { }, @@ -123,6 +140,7 @@ pub const feature_callSavedX11 = Feature{ pub const feature_callSavedX12 = Feature{ .name = "call-saved-x12", + .llvm_name = "call-saved-x12", .description = "Make X12 callee saved.", .dependencies = &[_]*const Feature { }, @@ -130,6 +148,7 @@ pub const feature_callSavedX12 = Feature{ pub const feature_callSavedX13 = Feature{ .name = "call-saved-x13", + .llvm_name = "call-saved-x13", .description = "Make X13 callee saved.", .dependencies = &[_]*const Feature { }, @@ -137,6 +156,7 @@ pub const feature_callSavedX13 = Feature{ pub const feature_callSavedX14 = Feature{ .name = "call-saved-x14", + .llvm_name = "call-saved-x14", .description = "Make X14 callee saved.", .dependencies = &[_]*const Feature { }, @@ -144,6 +164,7 @@ pub const feature_callSavedX14 = Feature{ pub const feature_callSavedX15 = Feature{ .name = "call-saved-x15", + .llvm_name = "call-saved-x15", .description = "Make X15 callee saved.", .dependencies = &[_]*const Feature { }, @@ -151,6 +172,7 @@ pub const feature_callSavedX15 = Feature{ pub const feature_callSavedX18 = Feature{ .name = "call-saved-x18", + .llvm_name = "call-saved-x18", .description = "Make X18 callee saved.", .dependencies = &[_]*const Feature { }, @@ -158,6 +180,7 @@ pub const feature_callSavedX18 = Feature{ pub const feature_complxnum = Feature{ .name = "complxnum", + .llvm_name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -166,6 +189,7 @@ pub const feature_complxnum = Feature{ pub const feature_crypto = Feature{ .name = "crypto", + .llvm_name = "crypto", .description = "Enable cryptographic instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -174,6 +198,7 @@ pub const feature_crypto = Feature{ pub const feature_customCheapAsMove = Feature{ .name = "custom-cheap-as-move", + .llvm_name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", .dependencies = &[_]*const Feature { }, @@ -181,6 +206,7 @@ pub const feature_customCheapAsMove = Feature{ pub const feature_dit = Feature{ .name = "dit", + .llvm_name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", .dependencies = &[_]*const Feature { }, @@ -188,6 +214,7 @@ pub const feature_dit = Feature{ pub const feature_disableLatencySchedHeuristic = Feature{ .name = "disable-latency-sched-heuristic", + .llvm_name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", .dependencies = &[_]*const Feature { }, @@ -195,6 +222,7 @@ pub const feature_disableLatencySchedHeuristic = Feature{ pub const feature_dotprod = Feature{ .name = "dotprod", + .llvm_name = "dotprod", .description = "Enable dot product support", .dependencies = &[_]*const Feature { }, @@ -202,6 +230,7 @@ pub const feature_dotprod = Feature{ pub const feature_ete = Feature{ .name = "ete", + .llvm_name = "ete", .description = "Enable Embedded Trace Extension", .dependencies = &[_]*const Feature { &feature_trbe, @@ -210,6 +239,7 @@ pub const feature_ete = Feature{ pub const feature_exynosCheapAsMove = Feature{ .name = "exynos-cheap-as-move", + .llvm_name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", .dependencies = &[_]*const Feature { &feature_customCheapAsMove, @@ -218,6 +248,7 @@ pub const feature_exynosCheapAsMove = Feature{ pub const feature_fmi = Feature{ .name = "fmi", + .llvm_name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", .dependencies = &[_]*const Feature { }, @@ -225,6 +256,7 @@ pub const feature_fmi = Feature{ pub const feature_fp16fml = Feature{ .name = "fp16fml", + .llvm_name = "fp16fml", .description = "Enable FP16 FML instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -233,6 +265,7 @@ pub const feature_fp16fml = Feature{ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", + .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", .dependencies = &[_]*const Feature { }, @@ -240,6 +273,7 @@ pub const feature_fpArmv8 = Feature{ pub const feature_fptoint = Feature{ .name = "fptoint", + .llvm_name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", .dependencies = &[_]*const Feature { }, @@ -247,6 +281,7 @@ pub const feature_fptoint = Feature{ pub const feature_force32bitJumpTables = Feature{ .name = "force-32bit-jump-tables", + .llvm_name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", .dependencies = &[_]*const Feature { }, @@ -254,6 +289,7 @@ pub const feature_force32bitJumpTables = Feature{ pub const feature_fullfp16 = Feature{ .name = "fullfp16", + .llvm_name = "fullfp16", .description = "Full FP16", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -262,6 +298,7 @@ pub const feature_fullfp16 = Feature{ pub const feature_fuseAes = Feature{ .name = "fuse-aes", + .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", .dependencies = &[_]*const Feature { }, @@ -269,6 +306,7 @@ pub const feature_fuseAes = Feature{ pub const feature_fuseAddress = Feature{ .name = "fuse-address", + .llvm_name = "fuse-address", .description = "CPU fuses address generation and memory operations", .dependencies = &[_]*const Feature { }, @@ -276,6 +314,7 @@ pub const feature_fuseAddress = Feature{ pub const feature_fuseArithLogic = Feature{ .name = "fuse-arith-logic", + .llvm_name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", .dependencies = &[_]*const Feature { }, @@ -283,6 +322,7 @@ pub const feature_fuseArithLogic = Feature{ pub const feature_fuseCsel = Feature{ .name = "fuse-csel", + .llvm_name = "fuse-csel", .description = "CPU fuses conditional select operations", .dependencies = &[_]*const Feature { }, @@ -290,6 +330,7 @@ pub const feature_fuseCsel = Feature{ pub const feature_fuseCryptoEor = Feature{ .name = "fuse-crypto-eor", + .llvm_name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", .dependencies = &[_]*const Feature { }, @@ -297,6 +338,7 @@ pub const feature_fuseCryptoEor = Feature{ pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", + .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", .dependencies = &[_]*const Feature { }, @@ -304,6 +346,7 @@ pub const feature_fuseLiterals = Feature{ pub const feature_jsconv = Feature{ .name = "jsconv", + .llvm_name = "jsconv", .description = "Enable v8.3-A JavaScript FP conversion enchancement", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -312,6 +355,7 @@ pub const feature_jsconv = Feature{ pub const feature_lor = Feature{ .name = "lor", + .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", .dependencies = &[_]*const Feature { }, @@ -319,6 +363,7 @@ pub const feature_lor = Feature{ pub const feature_lse = Feature{ .name = "lse", + .llvm_name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", .dependencies = &[_]*const Feature { }, @@ -326,6 +371,7 @@ pub const feature_lse = Feature{ pub const feature_lslFast = Feature{ .name = "lsl-fast", + .llvm_name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", .dependencies = &[_]*const Feature { }, @@ -333,6 +379,7 @@ pub const feature_lslFast = Feature{ pub const feature_mpam = Feature{ .name = "mpam", + .llvm_name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", .dependencies = &[_]*const Feature { }, @@ -340,6 +387,7 @@ pub const feature_mpam = Feature{ pub const feature_mte = Feature{ .name = "mte", + .llvm_name = "mte", .description = "Enable Memory Tagging Extension", .dependencies = &[_]*const Feature { }, @@ -347,6 +395,7 @@ pub const feature_mte = Feature{ pub const feature_neon = Feature{ .name = "neon", + .llvm_name = "neon", .description = "Enable Advanced SIMD instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -355,6 +404,7 @@ pub const feature_neon = Feature{ pub const feature_nv = Feature{ .name = "nv", + .llvm_name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", .dependencies = &[_]*const Feature { }, @@ -362,6 +412,7 @@ pub const feature_nv = Feature{ pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", + .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", .dependencies = &[_]*const Feature { }, @@ -369,6 +420,7 @@ pub const feature_noNegImmediates = Feature{ pub const feature_pa = Feature{ .name = "pa", + .llvm_name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", .dependencies = &[_]*const Feature { }, @@ -376,6 +428,7 @@ pub const feature_pa = Feature{ pub const feature_pan = Feature{ .name = "pan", + .llvm_name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", .dependencies = &[_]*const Feature { }, @@ -383,6 +436,7 @@ pub const feature_pan = Feature{ pub const feature_panRwv = Feature{ .name = "pan-rwv", + .llvm_name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", .dependencies = &[_]*const Feature { &feature_pan, @@ -391,6 +445,7 @@ pub const feature_panRwv = Feature{ pub const feature_perfmon = Feature{ .name = "perfmon", + .llvm_name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", .dependencies = &[_]*const Feature { }, @@ -398,6 +453,7 @@ pub const feature_perfmon = Feature{ pub const feature_usePostraScheduler = Feature{ .name = "use-postra-scheduler", + .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation", .dependencies = &[_]*const Feature { }, @@ -405,6 +461,7 @@ pub const feature_usePostraScheduler = Feature{ pub const feature_predres = Feature{ .name = "predres", + .llvm_name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", .dependencies = &[_]*const Feature { }, @@ -412,6 +469,7 @@ pub const feature_predres = Feature{ pub const feature_predictableSelectExpensive = Feature{ .name = "predictable-select-expensive", + .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", .dependencies = &[_]*const Feature { }, @@ -419,6 +477,7 @@ pub const feature_predictableSelectExpensive = Feature{ pub const feature_uaops = Feature{ .name = "uaops", + .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", .dependencies = &[_]*const Feature { }, @@ -426,6 +485,7 @@ pub const feature_uaops = Feature{ pub const feature_ras = Feature{ .name = "ras", + .llvm_name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", .dependencies = &[_]*const Feature { }, @@ -433,6 +493,7 @@ pub const feature_ras = Feature{ pub const feature_rasv8_4 = Feature{ .name = "rasv8_4", + .llvm_name = "rasv8_4", .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", .dependencies = &[_]*const Feature { &feature_ras, @@ -441,6 +502,7 @@ pub const feature_rasv8_4 = Feature{ pub const feature_rcpc = Feature{ .name = "rcpc", + .llvm_name = "rcpc", .description = "Enable support for RCPC extension", .dependencies = &[_]*const Feature { }, @@ -448,6 +510,7 @@ pub const feature_rcpc = Feature{ pub const feature_rcpcImmo = Feature{ .name = "rcpc-immo", + .llvm_name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", .dependencies = &[_]*const Feature { &feature_rcpc, @@ -456,6 +519,7 @@ pub const feature_rcpcImmo = Feature{ pub const feature_rdm = Feature{ .name = "rdm", + .llvm_name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", .dependencies = &[_]*const Feature { }, @@ -463,6 +527,7 @@ pub const feature_rdm = Feature{ pub const feature_rand = Feature{ .name = "rand", + .llvm_name = "rand", .description = "Enable Random Number generation instructions", .dependencies = &[_]*const Feature { }, @@ -470,6 +535,7 @@ pub const feature_rand = Feature{ pub const feature_reserveX1 = Feature{ .name = "reserve-x1", + .llvm_name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -477,6 +543,7 @@ pub const feature_reserveX1 = Feature{ pub const feature_reserveX2 = Feature{ .name = "reserve-x2", + .llvm_name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -484,6 +551,7 @@ pub const feature_reserveX2 = Feature{ pub const feature_reserveX3 = Feature{ .name = "reserve-x3", + .llvm_name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -491,6 +559,7 @@ pub const feature_reserveX3 = Feature{ pub const feature_reserveX4 = Feature{ .name = "reserve-x4", + .llvm_name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -498,6 +567,7 @@ pub const feature_reserveX4 = Feature{ pub const feature_reserveX5 = Feature{ .name = "reserve-x5", + .llvm_name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -505,6 +575,7 @@ pub const feature_reserveX5 = Feature{ pub const feature_reserveX6 = Feature{ .name = "reserve-x6", + .llvm_name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -512,6 +583,7 @@ pub const feature_reserveX6 = Feature{ pub const feature_reserveX7 = Feature{ .name = "reserve-x7", + .llvm_name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -519,6 +591,7 @@ pub const feature_reserveX7 = Feature{ pub const feature_reserveX9 = Feature{ .name = "reserve-x9", + .llvm_name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -526,6 +599,7 @@ pub const feature_reserveX9 = Feature{ pub const feature_reserveX10 = Feature{ .name = "reserve-x10", + .llvm_name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -533,6 +607,7 @@ pub const feature_reserveX10 = Feature{ pub const feature_reserveX11 = Feature{ .name = "reserve-x11", + .llvm_name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -540,6 +615,7 @@ pub const feature_reserveX11 = Feature{ pub const feature_reserveX12 = Feature{ .name = "reserve-x12", + .llvm_name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -547,6 +623,7 @@ pub const feature_reserveX12 = Feature{ pub const feature_reserveX13 = Feature{ .name = "reserve-x13", + .llvm_name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -554,6 +631,7 @@ pub const feature_reserveX13 = Feature{ pub const feature_reserveX14 = Feature{ .name = "reserve-x14", + .llvm_name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -561,6 +639,7 @@ pub const feature_reserveX14 = Feature{ pub const feature_reserveX15 = Feature{ .name = "reserve-x15", + .llvm_name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -568,6 +647,7 @@ pub const feature_reserveX15 = Feature{ pub const feature_reserveX18 = Feature{ .name = "reserve-x18", + .llvm_name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -575,6 +655,7 @@ pub const feature_reserveX18 = Feature{ pub const feature_reserveX20 = Feature{ .name = "reserve-x20", + .llvm_name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -582,6 +663,7 @@ pub const feature_reserveX20 = Feature{ pub const feature_reserveX21 = Feature{ .name = "reserve-x21", + .llvm_name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -589,6 +671,7 @@ pub const feature_reserveX21 = Feature{ pub const feature_reserveX22 = Feature{ .name = "reserve-x22", + .llvm_name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -596,6 +679,7 @@ pub const feature_reserveX22 = Feature{ pub const feature_reserveX23 = Feature{ .name = "reserve-x23", + .llvm_name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -603,6 +687,7 @@ pub const feature_reserveX23 = Feature{ pub const feature_reserveX24 = Feature{ .name = "reserve-x24", + .llvm_name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -610,6 +695,7 @@ pub const feature_reserveX24 = Feature{ pub const feature_reserveX25 = Feature{ .name = "reserve-x25", + .llvm_name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -617,6 +703,7 @@ pub const feature_reserveX25 = Feature{ pub const feature_reserveX26 = Feature{ .name = "reserve-x26", + .llvm_name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -624,6 +711,7 @@ pub const feature_reserveX26 = Feature{ pub const feature_reserveX27 = Feature{ .name = "reserve-x27", + .llvm_name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -631,6 +719,7 @@ pub const feature_reserveX27 = Feature{ pub const feature_reserveX28 = Feature{ .name = "reserve-x28", + .llvm_name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", .dependencies = &[_]*const Feature { }, @@ -638,6 +727,7 @@ pub const feature_reserveX28 = Feature{ pub const feature_sb = Feature{ .name = "sb", + .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", .dependencies = &[_]*const Feature { }, @@ -645,6 +735,7 @@ pub const feature_sb = Feature{ pub const feature_sel2 = Feature{ .name = "sel2", + .llvm_name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", .dependencies = &[_]*const Feature { }, @@ -652,6 +743,7 @@ pub const feature_sel2 = Feature{ pub const feature_sha2 = Feature{ .name = "sha2", + .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -660,6 +752,7 @@ pub const feature_sha2 = Feature{ pub const feature_sha3 = Feature{ .name = "sha3", + .llvm_name = "sha3", .description = "Enable SHA512 and SHA3 support", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -668,6 +761,7 @@ pub const feature_sha3 = Feature{ pub const feature_sm4 = Feature{ .name = "sm4", + .llvm_name = "sm4", .description = "Enable SM3 and SM4 support", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -676,6 +770,7 @@ pub const feature_sm4 = Feature{ pub const feature_spe = Feature{ .name = "spe", + .llvm_name = "spe", .description = "Enable Statistical Profiling extension", .dependencies = &[_]*const Feature { }, @@ -683,6 +778,7 @@ pub const feature_spe = Feature{ pub const feature_ssbs = Feature{ .name = "ssbs", + .llvm_name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", .dependencies = &[_]*const Feature { }, @@ -690,6 +786,7 @@ pub const feature_ssbs = Feature{ pub const feature_sve = Feature{ .name = "sve", + .llvm_name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", .dependencies = &[_]*const Feature { }, @@ -697,6 +794,7 @@ pub const feature_sve = Feature{ pub const feature_sve2 = Feature{ .name = "sve2", + .llvm_name = "sve2", .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", .dependencies = &[_]*const Feature { &feature_sve, @@ -705,6 +803,7 @@ pub const feature_sve2 = Feature{ pub const feature_sve2Aes = Feature{ .name = "sve2-aes", + .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -714,6 +813,7 @@ pub const feature_sve2Aes = Feature{ pub const feature_sve2Bitperm = Feature{ .name = "sve2-bitperm", + .llvm_name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", .dependencies = &[_]*const Feature { &feature_sve, @@ -722,6 +822,7 @@ pub const feature_sve2Bitperm = Feature{ pub const feature_sve2Sha3 = Feature{ .name = "sve2-sha3", + .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -731,6 +832,7 @@ pub const feature_sve2Sha3 = Feature{ pub const feature_sve2Sm4 = Feature{ .name = "sve2-sm4", + .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", .dependencies = &[_]*const Feature { &feature_fpArmv8, @@ -740,6 +842,7 @@ pub const feature_sve2Sm4 = Feature{ pub const feature_slowMisaligned128store = Feature{ .name = "slow-misaligned-128store", + .llvm_name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", .dependencies = &[_]*const Feature { }, @@ -747,6 +850,7 @@ pub const feature_slowMisaligned128store = Feature{ pub const feature_slowPaired128 = Feature{ .name = "slow-paired-128", + .llvm_name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", .dependencies = &[_]*const Feature { }, @@ -754,6 +858,7 @@ pub const feature_slowPaired128 = Feature{ pub const feature_slowStrqroStore = Feature{ .name = "slow-strqro-store", + .llvm_name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", .dependencies = &[_]*const Feature { }, @@ -761,6 +866,7 @@ pub const feature_slowStrqroStore = Feature{ pub const feature_specrestrict = Feature{ .name = "specrestrict", + .llvm_name = "specrestrict", .description = "Enable architectural speculation restriction", .dependencies = &[_]*const Feature { }, @@ -768,6 +874,7 @@ pub const feature_specrestrict = Feature{ pub const feature_strictAlign = Feature{ .name = "strict-align", + .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", .dependencies = &[_]*const Feature { }, @@ -775,6 +882,7 @@ pub const feature_strictAlign = Feature{ pub const feature_tlbRmi = Feature{ .name = "tlb-rmi", + .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", .dependencies = &[_]*const Feature { }, @@ -782,6 +890,7 @@ pub const feature_tlbRmi = Feature{ pub const feature_tme = Feature{ .name = "tme", + .llvm_name = "tme", .description = "Enable Transactional Memory Extension", .dependencies = &[_]*const Feature { }, @@ -789,6 +898,7 @@ pub const feature_tme = Feature{ pub const feature_tracev84 = Feature{ .name = "tracev8.4", + .llvm_name = "tracev8.4", .description = "Enable v8.4-A Trace extension", .dependencies = &[_]*const Feature { }, @@ -796,6 +906,7 @@ pub const feature_tracev84 = Feature{ pub const feature_trbe = Feature{ .name = "trbe", + .llvm_name = "trbe", .description = "Enable Trace Buffer Extension", .dependencies = &[_]*const Feature { }, @@ -803,6 +914,7 @@ pub const feature_trbe = Feature{ pub const feature_taggedGlobals = Feature{ .name = "tagged-globals", + .llvm_name = "tagged-globals", .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", .dependencies = &[_]*const Feature { }, @@ -810,6 +922,7 @@ pub const feature_taggedGlobals = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", + .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { }, @@ -817,6 +930,7 @@ pub const feature_useAa = Feature{ pub const feature_tpidrEl1 = Feature{ .name = "tpidr-el1", + .llvm_name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", .dependencies = &[_]*const Feature { }, @@ -824,6 +938,7 @@ pub const feature_tpidrEl1 = Feature{ pub const feature_tpidrEl2 = Feature{ .name = "tpidr-el2", + .llvm_name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", .dependencies = &[_]*const Feature { }, @@ -831,6 +946,7 @@ pub const feature_tpidrEl2 = Feature{ pub const feature_tpidrEl3 = Feature{ .name = "tpidr-el3", + .llvm_name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", .dependencies = &[_]*const Feature { }, @@ -838,6 +954,7 @@ pub const feature_tpidrEl3 = Feature{ pub const feature_useReciprocalSquareRoot = Feature{ .name = "use-reciprocal-square-root", + .llvm_name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", .dependencies = &[_]*const Feature { }, @@ -845,6 +962,7 @@ pub const feature_useReciprocalSquareRoot = Feature{ pub const feature_vh = Feature{ .name = "vh", + .llvm_name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", .dependencies = &[_]*const Feature { }, @@ -852,6 +970,7 @@ pub const feature_vh = Feature{ pub const feature_zcm = Feature{ .name = "zcm", + .llvm_name = "zcm", .description = "Has zero-cycle register moves", .dependencies = &[_]*const Feature { }, @@ -859,6 +978,7 @@ pub const feature_zcm = Feature{ pub const feature_zcz = Feature{ .name = "zcz", + .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", .dependencies = &[_]*const Feature { &feature_zczGp, @@ -868,6 +988,7 @@ pub const feature_zcz = Feature{ pub const feature_zczFp = Feature{ .name = "zcz-fp", + .llvm_name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", .dependencies = &[_]*const Feature { }, @@ -875,6 +996,7 @@ pub const feature_zczFp = Feature{ pub const feature_zczFpWorkaround = Feature{ .name = "zcz-fp-workaround", + .llvm_name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", .dependencies = &[_]*const Feature { }, @@ -882,6 +1004,7 @@ pub const feature_zczFpWorkaround = Feature{ pub const feature_zczGp = Feature{ .name = "zcz-gp", + .llvm_name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", .dependencies = &[_]*const Feature { }, @@ -1017,18 +1140,18 @@ pub const cpu_appleLatest = Cpu{ .name = "apple-latest", .llvm_name = "apple-latest", .dependencies = &[_]*const Feature { - &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, &feature_fuseAes, - &feature_zczGp, &feature_zczFpWorkaround, - &feature_disableLatencySchedHeuristic, &feature_perfmon, - &feature_fpArmv8, - &feature_arithBccFusion, &feature_arithCbzFusion, - &feature_zczFp, + &feature_alternateSextloadCvtF32Pattern, + &feature_fuseCryptoEor, + &feature_disableLatencySchedHeuristic, &feature_zcm, + &feature_zczFp, + &feature_zczGp, + &feature_fpArmv8, + &feature_arithBccFusion, }, }; @@ -1036,9 +1159,9 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { - &feature_crc, &feature_fpArmv8, &feature_perfmon, + &feature_crc, }, }; @@ -1046,13 +1169,13 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, &feature_fuseAes, - &feature_usePostraScheduler, + &feature_balanceFpOps, &feature_perfmon, - &feature_fpArmv8, &feature_crc, - &feature_balanceFpOps, + &feature_customCheapAsMove, + &feature_fpArmv8, + &feature_usePostraScheduler, &feature_useAa, }, }; @@ -1061,20 +1184,20 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, &feature_fuseAes, - &feature_lse, - &feature_perfmon, &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_perfmon, + &feature_lse, + &feature_lor, }, }; @@ -1082,15 +1205,15 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, &feature_fuseAes, - &feature_usePostraScheduler, + &feature_balanceFpOps, &feature_perfmon, - &feature_fpArmv8, &feature_crc, - &feature_balanceFpOps, &feature_fuseLiterals, &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1098,19 +1221,19 @@ pub const cpu_cortexA65 = Cpu{ .name = "cortex-a65", .llvm_name = "cortex-a65", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, &feature_ras, - &feature_lor, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1118,19 +1241,19 @@ pub const cpu_cortexA65ae = Cpu{ .name = "cortex-a65ae", .llvm_name = "cortex-a65ae", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, &feature_ras, - &feature_lor, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1138,10 +1261,10 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { - &feature_crc, - &feature_fuseAes, &feature_fpArmv8, + &feature_fuseAes, &feature_perfmon, + &feature_crc, }, }; @@ -1149,10 +1272,10 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { - &feature_crc, - &feature_fuseAes, &feature_fpArmv8, + &feature_fuseAes, &feature_perfmon, + &feature_crc, }, }; @@ -1160,20 +1283,20 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, &feature_fuseAes, - &feature_lse, - &feature_perfmon, &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_perfmon, + &feature_lse, + &feature_lor, }, }; @@ -1181,19 +1304,19 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1201,19 +1324,19 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1221,18 +1344,18 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, &feature_fuseAes, - &feature_zczGp, &feature_zczFpWorkaround, - &feature_disableLatencySchedHeuristic, &feature_perfmon, - &feature_fpArmv8, - &feature_arithBccFusion, &feature_arithCbzFusion, - &feature_zczFp, + &feature_alternateSextloadCvtF32Pattern, + &feature_fuseCryptoEor, + &feature_disableLatencySchedHeuristic, &feature_zcm, + &feature_zczFp, + &feature_zczGp, + &feature_fpArmv8, + &feature_arithBccFusion, }, }; @@ -1240,17 +1363,17 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, &feature_fuseAes, &feature_force32bitJumpTables, - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, - &feature_slowMisaligned128store, + &feature_crc, &feature_useReciprocalSquareRoot, - &feature_crc, &feature_slowPaired128, &feature_zczFp, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1258,16 +1381,16 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, &feature_fuseAes, &feature_force32bitJumpTables, - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, - &feature_slowMisaligned128store, &feature_crc, &feature_slowPaired128, &feature_zczFp, + &feature_slowMisaligned128store, + &feature_customCheapAsMove, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1275,19 +1398,19 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, &feature_fuseAes, + &feature_lslFast, &feature_force32bitJumpTables, - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, - &feature_fuseAddress, - &feature_fuseCsel, - &feature_lslFast, - &feature_zczFp, &feature_crc, &feature_fuseLiterals, + &feature_fuseCsel, + &feature_zczFp, &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_fpArmv8, + &feature_usePostraScheduler, + &feature_fuseAddress, }, }; @@ -1295,31 +1418,31 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_lse, - &feature_perfmon, - &feature_fuseAddress, - &feature_dotprod, - &feature_arithCbzFusion, - &feature_zczFp, - &feature_fuseArithLogic, - &feature_ccpp, &feature_fuseAes, - &feature_fuseCsel, - &feature_rdm, - &feature_zczGp, - &feature_force32bitJumpTables, - &feature_usePostraScheduler, &feature_lslFast, + &feature_force32bitJumpTables, &feature_crc, - &feature_fuseLiterals, - &feature_pan, + &feature_rdm, &feature_fpArmv8, - &feature_lor, - &feature_ras, + &feature_lse, &feature_vh, + &feature_arithCbzFusion, + &feature_fuseLiterals, + &feature_ccpp, + &feature_lor, &feature_arithBccFusion, + &feature_ras, + &feature_dotprod, + &feature_fuseCsel, + &feature_zczFp, &feature_uaops, + &feature_zczGp, + &feature_perfmon, + &feature_usePostraScheduler, + &feature_fuseAddress, + &feature_fuseArithLogic, + &feature_customCheapAsMove, + &feature_pan, }, }; @@ -1327,31 +1450,31 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_lse, - &feature_perfmon, - &feature_fuseAddress, - &feature_dotprod, - &feature_arithCbzFusion, - &feature_zczFp, - &feature_fuseArithLogic, - &feature_ccpp, &feature_fuseAes, - &feature_fuseCsel, - &feature_rdm, - &feature_zczGp, - &feature_force32bitJumpTables, - &feature_usePostraScheduler, &feature_lslFast, + &feature_force32bitJumpTables, &feature_crc, - &feature_fuseLiterals, - &feature_pan, + &feature_rdm, &feature_fpArmv8, - &feature_lor, - &feature_ras, + &feature_lse, &feature_vh, + &feature_arithCbzFusion, + &feature_fuseLiterals, + &feature_ccpp, + &feature_lor, &feature_arithBccFusion, + &feature_ras, + &feature_dotprod, + &feature_fuseCsel, + &feature_zczFp, &feature_uaops, + &feature_zczGp, + &feature_perfmon, + &feature_usePostraScheduler, + &feature_fuseAddress, + &feature_fuseArithLogic, + &feature_customCheapAsMove, + &feature_pan, }, }; @@ -1359,17 +1482,17 @@ pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_rdm, - &feature_zczGp, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, &feature_lslFast, - &feature_zczFp, + &feature_perfmon, &feature_crc, &feature_slowStrqroStore, + &feature_rdm, + &feature_zczFp, &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_zczGp, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1391,15 +1514,15 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_zczGp, - &feature_usePostraScheduler, - &feature_perfmon, - &feature_fpArmv8, &feature_lslFast, - &feature_zczFp, + &feature_perfmon, &feature_crc, + &feature_zczFp, &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_zczGp, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1407,19 +1530,19 @@ pub const cpu_neoverseE1 = Cpu{ .name = "neoverse-e1", .llvm_name = "neoverse-e1", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1427,20 +1550,20 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_ccpp, - &feature_lse, - &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, - &feature_rcpc, &feature_dotprod, - &feature_ssbs, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, &feature_spe, + &feature_rcpc, + &feature_uaops, + &feature_ssbs, + &feature_fpArmv8, + &feature_lse, + &feature_lor, }, }; @@ -1448,36 +1571,36 @@ pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_lse, - &feature_fmi, - &feature_perfmon, - &feature_sel2, - &feature_dotprod, + &feature_lslFast, + &feature_crc, + &feature_rdm, &feature_am, - &feature_zczFp, &feature_mpam, - &feature_ccpp, + &feature_fmi, + &feature_fpArmv8, + &feature_lse, &feature_dit, - &feature_tracev84, - &feature_spe, - &feature_rdm, - &feature_zczGp, - &feature_usePostraScheduler, + &feature_vh, + &feature_ccpp, + &feature_sel2, + &feature_lor, &feature_nv, + &feature_ras, &feature_tlbRmi, - &feature_lslFast, - &feature_crc, - &feature_pan, - &feature_ccidx, - &feature_fpArmv8, - &feature_ras, - &feature_lor, - &feature_vh, + &feature_dotprod, + &feature_zczFp, + &feature_spe, &feature_rcpc, + &feature_predictableSelectExpensive, &feature_uaops, + &feature_zczGp, + &feature_perfmon, + &feature_usePostraScheduler, &feature_pa, - &feature_predictableSelectExpensive, + &feature_ccidx, + &feature_customCheapAsMove, + &feature_pan, + &feature_tracev84, }, }; @@ -1485,11 +1608,11 @@ pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .dependencies = &[_]*const Feature { - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, &feature_crc, &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1497,17 +1620,17 @@ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .dependencies = &[_]*const Feature { - &feature_rdm, - &feature_lse, - &feature_usePostraScheduler, &feature_aggressiveFma, - &feature_fpArmv8, - &feature_lor, &feature_vh, - &feature_arithBccFusion, &feature_crc, &feature_pan, + &feature_rdm, &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_lse, + &feature_lor, + &feature_usePostraScheduler, + &feature_arithBccFusion, }, }; @@ -1515,11 +1638,11 @@ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .dependencies = &[_]*const Feature { - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, &feature_crc, &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1527,11 +1650,11 @@ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .dependencies = &[_]*const Feature { - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, &feature_crc, &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1539,11 +1662,11 @@ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .dependencies = &[_]*const Feature { - &feature_usePostraScheduler, &feature_perfmon, - &feature_fpArmv8, &feature_crc, &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1551,22 +1674,22 @@ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_rdm, - &feature_ccpp, &feature_fuseAes, - &feature_lse, - &feature_usePostraScheduler, - &feature_perfmon, &feature_fpArmv8, - &feature_lor, &feature_ras, - &feature_vh, &feature_dotprod, - &feature_uaops, + &feature_vh, &feature_crc, &feature_pan, + &feature_ccpp, + &feature_rdm, &feature_spe, + &feature_uaops, + &feature_customCheapAsMove, + &feature_perfmon, + &feature_lse, + &feature_lor, + &feature_usePostraScheduler, }, }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index b428615124292f136db61cea067683209212f862..3d4b4950caf8ac5df673b958edde128864b3e4ee 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_BitInsts16 = Feature{ .name = "16-bit-insts", + .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_BitInsts16 = Feature{ pub const feature_addNoCarryInsts = Feature{ .name = "add-no-carry-insts", + .llvm_name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_addNoCarryInsts = Feature{ pub const feature_apertureRegs = Feature{ .name = "aperture-regs", + .llvm_name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_apertureRegs = Feature{ pub const feature_atomicFaddInsts = Feature{ .name = "atomic-fadd-insts", + .llvm_name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_atomicFaddInsts = Feature{ pub const feature_autoWaitcntBeforeBarrier = Feature{ .name = "auto-waitcnt-before-barrier", + .llvm_name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{ pub const feature_ciInsts = Feature{ .name = "ci-insts", + .llvm_name = "ci-insts", .description = "Additional instructions for CI+", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_ciInsts = Feature{ pub const feature_codeObjectV3 = Feature{ .name = "code-object-v3", + .llvm_name = "code-object-v3", .description = "Generate code object version 3", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_codeObjectV3 = Feature{ pub const feature_cumode = Feature{ .name = "cumode", + .llvm_name = "cumode", .description = "Enable CU wavefront execution mode", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_cumode = Feature{ pub const feature_dlInsts = Feature{ .name = "dl-insts", + .llvm_name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_dlInsts = Feature{ pub const feature_dpp = Feature{ .name = "dpp", + .llvm_name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", .dependencies = &[_]*const Feature { }, @@ -73,6 +83,7 @@ pub const feature_dpp = Feature{ pub const feature_dpp8 = Feature{ .name = "dpp8", + .llvm_name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", .dependencies = &[_]*const Feature { }, @@ -80,6 +91,7 @@ pub const feature_dpp8 = Feature{ pub const feature_noSramEccSupport = Feature{ .name = "no-sram-ecc-support", + .llvm_name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", .dependencies = &[_]*const Feature { }, @@ -87,6 +99,7 @@ pub const feature_noSramEccSupport = Feature{ pub const feature_noXnackSupport = Feature{ .name = "no-xnack-support", + .llvm_name = "no-xnack-support", .description = "Hardware does not support XNACK", .dependencies = &[_]*const Feature { }, @@ -94,6 +107,7 @@ pub const feature_noXnackSupport = Feature{ pub const feature_dot1Insts = Feature{ .name = "dot1-insts", + .llvm_name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", .dependencies = &[_]*const Feature { }, @@ -101,6 +115,7 @@ pub const feature_dot1Insts = Feature{ pub const feature_dot2Insts = Feature{ .name = "dot2-insts", + .llvm_name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", .dependencies = &[_]*const Feature { }, @@ -108,6 +123,7 @@ pub const feature_dot2Insts = Feature{ pub const feature_dot3Insts = Feature{ .name = "dot3-insts", + .llvm_name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", .dependencies = &[_]*const Feature { }, @@ -115,6 +131,7 @@ pub const feature_dot3Insts = Feature{ pub const feature_dot4Insts = Feature{ .name = "dot4-insts", + .llvm_name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", .dependencies = &[_]*const Feature { }, @@ -122,6 +139,7 @@ pub const feature_dot4Insts = Feature{ pub const feature_dot5Insts = Feature{ .name = "dot5-insts", + .llvm_name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", .dependencies = &[_]*const Feature { }, @@ -129,6 +147,7 @@ pub const feature_dot5Insts = Feature{ pub const feature_dot6Insts = Feature{ .name = "dot6-insts", + .llvm_name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", .dependencies = &[_]*const Feature { }, @@ -136,6 +155,7 @@ pub const feature_dot6Insts = Feature{ pub const feature_DumpCode = Feature{ .name = "DumpCode", + .llvm_name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", .dependencies = &[_]*const Feature { }, @@ -143,6 +163,7 @@ pub const feature_DumpCode = Feature{ pub const feature_dumpcode = Feature{ .name = "dumpcode", + .llvm_name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", .dependencies = &[_]*const Feature { }, @@ -150,6 +171,7 @@ pub const feature_dumpcode = Feature{ pub const feature_enableDs128 = Feature{ .name = "enable-ds128", + .llvm_name = "enable-ds128", .description = "Use ds_{read|write}_b128", .dependencies = &[_]*const Feature { }, @@ -157,6 +179,7 @@ pub const feature_enableDs128 = Feature{ pub const feature_loadStoreOpt = Feature{ .name = "load-store-opt", + .llvm_name = "load-store-opt", .description = "Enable SI load/store optimizer pass", .dependencies = &[_]*const Feature { }, @@ -164,6 +187,7 @@ pub const feature_loadStoreOpt = Feature{ pub const feature_enablePrtStrictNull = Feature{ .name = "enable-prt-strict-null", + .llvm_name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", .dependencies = &[_]*const Feature { }, @@ -171,6 +195,7 @@ pub const feature_enablePrtStrictNull = Feature{ pub const feature_siScheduler = Feature{ .name = "si-scheduler", + .llvm_name = "si-scheduler", .description = "Enable SI Machine Scheduler", .dependencies = &[_]*const Feature { }, @@ -178,6 +203,7 @@ pub const feature_siScheduler = Feature{ pub const feature_unsafeDsOffsetFolding = Feature{ .name = "unsafe-ds-offset-folding", + .llvm_name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", .dependencies = &[_]*const Feature { }, @@ -185,6 +211,7 @@ pub const feature_unsafeDsOffsetFolding = Feature{ pub const feature_fmaf = Feature{ .name = "fmaf", + .llvm_name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", .dependencies = &[_]*const Feature { }, @@ -192,6 +219,7 @@ pub const feature_fmaf = Feature{ pub const feature_fp16Denormals = Feature{ .name = "fp16-denormals", + .llvm_name = "fp16-denormals", .description = "Enable half precision denormal handling", .dependencies = &[_]*const Feature { &feature_fp64, @@ -200,6 +228,7 @@ pub const feature_fp16Denormals = Feature{ pub const feature_fp32Denormals = Feature{ .name = "fp32-denormals", + .llvm_name = "fp32-denormals", .description = "Enable single precision denormal handling", .dependencies = &[_]*const Feature { }, @@ -207,6 +236,7 @@ pub const feature_fp32Denormals = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", + .llvm_name = "fp64", .description = "Enable double precision operations", .dependencies = &[_]*const Feature { }, @@ -214,6 +244,7 @@ pub const feature_fp64 = Feature{ pub const feature_fp64Denormals = Feature{ .name = "fp64-denormals", + .llvm_name = "fp64-denormals", .description = "Enable double and half precision denormal handling", .dependencies = &[_]*const Feature { &feature_fp64, @@ -222,6 +253,7 @@ pub const feature_fp64Denormals = Feature{ pub const feature_fp64Fp16Denormals = Feature{ .name = "fp64-fp16-denormals", + .llvm_name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", .dependencies = &[_]*const Feature { &feature_fp64, @@ -230,6 +262,7 @@ pub const feature_fp64Fp16Denormals = Feature{ pub const feature_fpExceptions = Feature{ .name = "fp-exceptions", + .llvm_name = "fp-exceptions", .description = "Enable floating point exceptions", .dependencies = &[_]*const Feature { }, @@ -237,6 +270,7 @@ pub const feature_fpExceptions = Feature{ pub const feature_fastFmaf = Feature{ .name = "fast-fmaf", + .llvm_name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", .dependencies = &[_]*const Feature { }, @@ -244,6 +278,7 @@ pub const feature_fastFmaf = Feature{ pub const feature_flatAddressSpace = Feature{ .name = "flat-address-space", + .llvm_name = "flat-address-space", .description = "Support flat address space", .dependencies = &[_]*const Feature { }, @@ -251,6 +286,7 @@ pub const feature_flatAddressSpace = Feature{ pub const feature_flatForGlobal = Feature{ .name = "flat-for-global", + .llvm_name = "flat-for-global", .description = "Force to generate flat instruction for global", .dependencies = &[_]*const Feature { }, @@ -258,6 +294,7 @@ pub const feature_flatForGlobal = Feature{ pub const feature_flatGlobalInsts = Feature{ .name = "flat-global-insts", + .llvm_name = "flat-global-insts", .description = "Have global_* flat memory instructions", .dependencies = &[_]*const Feature { }, @@ -265,6 +302,7 @@ pub const feature_flatGlobalInsts = Feature{ pub const feature_flatInstOffsets = Feature{ .name = "flat-inst-offsets", + .llvm_name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", .dependencies = &[_]*const Feature { }, @@ -272,6 +310,7 @@ pub const feature_flatInstOffsets = Feature{ pub const feature_flatScratchInsts = Feature{ .name = "flat-scratch-insts", + .llvm_name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", .dependencies = &[_]*const Feature { }, @@ -279,6 +318,7 @@ pub const feature_flatScratchInsts = Feature{ pub const feature_flatSegmentOffsetBug = Feature{ .name = "flat-segment-offset-bug", + .llvm_name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", .dependencies = &[_]*const Feature { }, @@ -286,6 +326,7 @@ pub const feature_flatSegmentOffsetBug = Feature{ pub const feature_fmaMixInsts = Feature{ .name = "fma-mix-insts", + .llvm_name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", .dependencies = &[_]*const Feature { }, @@ -293,6 +334,7 @@ pub const feature_fmaMixInsts = Feature{ pub const feature_gcn3Encoding = Feature{ .name = "gcn3-encoding", + .llvm_name = "gcn3-encoding", .description = "Encoding format for VI", .dependencies = &[_]*const Feature { }, @@ -300,6 +342,7 @@ pub const feature_gcn3Encoding = Feature{ pub const feature_gfx7Gfx8Gfx9Insts = Feature{ .name = "gfx7-gfx8-gfx9-insts", + .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", .dependencies = &[_]*const Feature { }, @@ -307,6 +350,7 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{ pub const feature_gfx8Insts = Feature{ .name = "gfx8-insts", + .llvm_name = "gfx8-insts", .description = "Additional instructions for GFX8+", .dependencies = &[_]*const Feature { }, @@ -314,6 +358,7 @@ pub const feature_gfx8Insts = Feature{ pub const feature_gfx9Insts = Feature{ .name = "gfx9-insts", + .llvm_name = "gfx9-insts", .description = "Additional instructions for GFX9+", .dependencies = &[_]*const Feature { }, @@ -321,6 +366,7 @@ pub const feature_gfx9Insts = Feature{ pub const feature_gfx10Insts = Feature{ .name = "gfx10-insts", + .llvm_name = "gfx10-insts", .description = "Additional instructions for GFX10+", .dependencies = &[_]*const Feature { }, @@ -328,6 +374,7 @@ pub const feature_gfx10Insts = Feature{ pub const feature_instFwdPrefetchBug = Feature{ .name = "inst-fwd-prefetch-bug", + .llvm_name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", .dependencies = &[_]*const Feature { }, @@ -335,6 +382,7 @@ pub const feature_instFwdPrefetchBug = Feature{ pub const feature_intClampInsts = Feature{ .name = "int-clamp-insts", + .llvm_name = "int-clamp-insts", .description = "Support clamp for integer destination", .dependencies = &[_]*const Feature { }, @@ -342,6 +390,7 @@ pub const feature_intClampInsts = Feature{ pub const feature_inv2piInlineImm = Feature{ .name = "inv-2pi-inline-imm", + .llvm_name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", .dependencies = &[_]*const Feature { }, @@ -349,6 +398,7 @@ pub const feature_inv2piInlineImm = Feature{ pub const feature_ldsbankcount16 = Feature{ .name = "ldsbankcount16", + .llvm_name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", .dependencies = &[_]*const Feature { }, @@ -356,6 +406,7 @@ pub const feature_ldsbankcount16 = Feature{ pub const feature_ldsbankcount32 = Feature{ .name = "ldsbankcount32", + .llvm_name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", .dependencies = &[_]*const Feature { }, @@ -363,6 +414,7 @@ pub const feature_ldsbankcount32 = Feature{ pub const feature_ldsBranchVmemWarHazard = Feature{ .name = "lds-branch-vmem-war-hazard", + .llvm_name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", .dependencies = &[_]*const Feature { }, @@ -370,6 +422,7 @@ pub const feature_ldsBranchVmemWarHazard = Feature{ pub const feature_ldsMisalignedBug = Feature{ .name = "lds-misaligned-bug", + .llvm_name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", .dependencies = &[_]*const Feature { }, @@ -377,6 +430,7 @@ pub const feature_ldsMisalignedBug = Feature{ pub const feature_localmemorysize0 = Feature{ .name = "localmemorysize0", + .llvm_name = "localmemorysize0", .description = "The size of local memory in bytes", .dependencies = &[_]*const Feature { }, @@ -384,6 +438,7 @@ pub const feature_localmemorysize0 = Feature{ pub const feature_localmemorysize32768 = Feature{ .name = "localmemorysize32768", + .llvm_name = "localmemorysize32768", .description = "The size of local memory in bytes", .dependencies = &[_]*const Feature { }, @@ -391,6 +446,7 @@ pub const feature_localmemorysize32768 = Feature{ pub const feature_localmemorysize65536 = Feature{ .name = "localmemorysize65536", + .llvm_name = "localmemorysize65536", .description = "The size of local memory in bytes", .dependencies = &[_]*const Feature { }, @@ -398,6 +454,7 @@ pub const feature_localmemorysize65536 = Feature{ pub const feature_maiInsts = Feature{ .name = "mai-insts", + .llvm_name = "mai-insts", .description = "Has mAI instructions", .dependencies = &[_]*const Feature { }, @@ -405,6 +462,7 @@ pub const feature_maiInsts = Feature{ pub const feature_mfmaInlineLiteralBug = Feature{ .name = "mfma-inline-literal-bug", + .llvm_name = "mfma-inline-literal-bug", .description = "MFMA cannot use inline literal as SrcC", .dependencies = &[_]*const Feature { }, @@ -412,6 +470,7 @@ pub const feature_mfmaInlineLiteralBug = Feature{ pub const feature_mimgR128 = Feature{ .name = "mimg-r128", + .llvm_name = "mimg-r128", .description = "Support 128-bit texture resources", .dependencies = &[_]*const Feature { }, @@ -419,6 +478,7 @@ pub const feature_mimgR128 = Feature{ pub const feature_madMixInsts = Feature{ .name = "mad-mix-insts", + .llvm_name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", .dependencies = &[_]*const Feature { }, @@ -426,6 +486,7 @@ pub const feature_madMixInsts = Feature{ pub const feature_maxPrivateElementSize4 = Feature{ .name = "max-private-element-size-4", + .llvm_name = "max-private-element-size-4", .description = "Maximum private access size may be 4", .dependencies = &[_]*const Feature { }, @@ -433,6 +494,7 @@ pub const feature_maxPrivateElementSize4 = Feature{ pub const feature_maxPrivateElementSize8 = Feature{ .name = "max-private-element-size-8", + .llvm_name = "max-private-element-size-8", .description = "Maximum private access size may be 8", .dependencies = &[_]*const Feature { }, @@ -440,6 +502,7 @@ pub const feature_maxPrivateElementSize8 = Feature{ pub const feature_maxPrivateElementSize16 = Feature{ .name = "max-private-element-size-16", + .llvm_name = "max-private-element-size-16", .description = "Maximum private access size may be 16", .dependencies = &[_]*const Feature { }, @@ -447,6 +510,7 @@ pub const feature_maxPrivateElementSize16 = Feature{ pub const feature_movrel = Feature{ .name = "movrel", + .llvm_name = "movrel", .description = "Has v_movrel*_b32 instructions", .dependencies = &[_]*const Feature { }, @@ -454,6 +518,7 @@ pub const feature_movrel = Feature{ pub const feature_nsaEncoding = Feature{ .name = "nsa-encoding", + .llvm_name = "nsa-encoding", .description = "Support NSA encoding for image instructions", .dependencies = &[_]*const Feature { }, @@ -461,6 +526,7 @@ pub const feature_nsaEncoding = Feature{ pub const feature_nsaToVmemBug = Feature{ .name = "nsa-to-vmem-bug", + .llvm_name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", .dependencies = &[_]*const Feature { }, @@ -468,6 +534,7 @@ pub const feature_nsaToVmemBug = Feature{ pub const feature_noDataDepHazard = Feature{ .name = "no-data-dep-hazard", + .llvm_name = "no-data-dep-hazard", .description = "Does not need SW waitstates", .dependencies = &[_]*const Feature { }, @@ -475,6 +542,7 @@ pub const feature_noDataDepHazard = Feature{ pub const feature_noSdstCmpx = Feature{ .name = "no-sdst-cmpx", + .llvm_name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", .dependencies = &[_]*const Feature { }, @@ -482,6 +550,7 @@ pub const feature_noSdstCmpx = Feature{ pub const feature_offset3fBug = Feature{ .name = "offset-3f-bug", + .llvm_name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", .dependencies = &[_]*const Feature { }, @@ -489,6 +558,7 @@ pub const feature_offset3fBug = Feature{ pub const feature_pkFmacF16Inst = Feature{ .name = "pk-fmac-f16-inst", + .llvm_name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", .dependencies = &[_]*const Feature { }, @@ -496,6 +566,7 @@ pub const feature_pkFmacF16Inst = Feature{ pub const feature_promoteAlloca = Feature{ .name = "promote-alloca", + .llvm_name = "promote-alloca", .description = "Enable promote alloca pass", .dependencies = &[_]*const Feature { }, @@ -503,6 +574,7 @@ pub const feature_promoteAlloca = Feature{ pub const feature_r128A16 = Feature{ .name = "r128-a16", + .llvm_name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", .dependencies = &[_]*const Feature { }, @@ -510,6 +582,7 @@ pub const feature_r128A16 = Feature{ pub const feature_registerBanking = Feature{ .name = "register-banking", + .llvm_name = "register-banking", .description = "Has register banking", .dependencies = &[_]*const Feature { }, @@ -517,6 +590,7 @@ pub const feature_registerBanking = Feature{ pub const feature_sdwa = Feature{ .name = "sdwa", + .llvm_name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -524,6 +598,7 @@ pub const feature_sdwa = Feature{ pub const feature_sdwaMav = Feature{ .name = "sdwa-mav", + .llvm_name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -531,6 +606,7 @@ pub const feature_sdwaMav = Feature{ pub const feature_sdwaOmod = Feature{ .name = "sdwa-omod", + .llvm_name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -538,6 +614,7 @@ pub const feature_sdwaOmod = Feature{ pub const feature_sdwaOutModsVopc = Feature{ .name = "sdwa-out-mods-vopc", + .llvm_name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -545,6 +622,7 @@ pub const feature_sdwaOutModsVopc = Feature{ pub const feature_sdwaScalar = Feature{ .name = "sdwa-scalar", + .llvm_name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -552,6 +630,7 @@ pub const feature_sdwaScalar = Feature{ pub const feature_sdwaSdst = Feature{ .name = "sdwa-sdst", + .llvm_name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { }, @@ -559,6 +638,7 @@ pub const feature_sdwaSdst = Feature{ pub const feature_sgprInitBug = Feature{ .name = "sgpr-init-bug", + .llvm_name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", .dependencies = &[_]*const Feature { }, @@ -566,6 +646,7 @@ pub const feature_sgprInitBug = Feature{ pub const feature_smemToVectorWriteHazard = Feature{ .name = "smem-to-vector-write-hazard", + .llvm_name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", .dependencies = &[_]*const Feature { }, @@ -573,6 +654,7 @@ pub const feature_smemToVectorWriteHazard = Feature{ pub const feature_sMemrealtime = Feature{ .name = "s-memrealtime", + .llvm_name = "s-memrealtime", .description = "Has s_memrealtime instruction", .dependencies = &[_]*const Feature { }, @@ -580,6 +662,7 @@ pub const feature_sMemrealtime = Feature{ pub const feature_sramEcc = Feature{ .name = "sram-ecc", + .llvm_name = "sram-ecc", .description = "Enable SRAM ECC", .dependencies = &[_]*const Feature { }, @@ -587,6 +670,7 @@ pub const feature_sramEcc = Feature{ pub const feature_scalarAtomics = Feature{ .name = "scalar-atomics", + .llvm_name = "scalar-atomics", .description = "Has atomic scalar memory instructions", .dependencies = &[_]*const Feature { }, @@ -594,6 +678,7 @@ pub const feature_scalarAtomics = Feature{ pub const feature_scalarFlatScratchInsts = Feature{ .name = "scalar-flat-scratch-insts", + .llvm_name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", .dependencies = &[_]*const Feature { }, @@ -601,6 +686,7 @@ pub const feature_scalarFlatScratchInsts = Feature{ pub const feature_scalarStores = Feature{ .name = "scalar-stores", + .llvm_name = "scalar-stores", .description = "Has store scalar memory instructions", .dependencies = &[_]*const Feature { }, @@ -608,6 +694,7 @@ pub const feature_scalarStores = Feature{ pub const feature_trapHandler = Feature{ .name = "trap-handler", + .llvm_name = "trap-handler", .description = "Trap handler support", .dependencies = &[_]*const Feature { }, @@ -615,6 +702,7 @@ pub const feature_trapHandler = Feature{ pub const feature_trigReducedRange = Feature{ .name = "trig-reduced-range", + .llvm_name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", .dependencies = &[_]*const Feature { }, @@ -622,6 +710,7 @@ pub const feature_trigReducedRange = Feature{ pub const feature_unalignedBufferAccess = Feature{ .name = "unaligned-buffer-access", + .llvm_name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", .dependencies = &[_]*const Feature { }, @@ -629,6 +718,7 @@ pub const feature_unalignedBufferAccess = Feature{ pub const feature_unalignedScratchAccess = Feature{ .name = "unaligned-scratch-access", + .llvm_name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", .dependencies = &[_]*const Feature { }, @@ -636,6 +726,7 @@ pub const feature_unalignedScratchAccess = Feature{ pub const feature_unpackedD16Vmem = Feature{ .name = "unpacked-d16-vmem", + .llvm_name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", .dependencies = &[_]*const Feature { }, @@ -643,6 +734,7 @@ pub const feature_unpackedD16Vmem = Feature{ pub const feature_vgprIndexMode = Feature{ .name = "vgpr-index-mode", + .llvm_name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", .dependencies = &[_]*const Feature { }, @@ -650,6 +742,7 @@ pub const feature_vgprIndexMode = Feature{ pub const feature_vmemToScalarWriteHazard = Feature{ .name = "vmem-to-scalar-write-hazard", + .llvm_name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", .dependencies = &[_]*const Feature { }, @@ -657,6 +750,7 @@ pub const feature_vmemToScalarWriteHazard = Feature{ pub const feature_vop3Literal = Feature{ .name = "vop3-literal", + .llvm_name = "vop3-literal", .description = "Can use one literal in VOP3", .dependencies = &[_]*const Feature { }, @@ -664,6 +758,7 @@ pub const feature_vop3Literal = Feature{ pub const feature_vop3p = Feature{ .name = "vop3p", + .llvm_name = "vop3p", .description = "Has VOP3P packed instructions", .dependencies = &[_]*const Feature { }, @@ -671,6 +766,7 @@ pub const feature_vop3p = Feature{ pub const feature_vcmpxExecWarHazard = Feature{ .name = "vcmpx-exec-war-hazard", + .llvm_name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", .dependencies = &[_]*const Feature { }, @@ -678,6 +774,7 @@ pub const feature_vcmpxExecWarHazard = Feature{ pub const feature_vcmpxPermlaneHazard = Feature{ .name = "vcmpx-permlane-hazard", + .llvm_name = "vcmpx-permlane-hazard", .description = "TODO: describe me", .dependencies = &[_]*const Feature { }, @@ -685,6 +782,7 @@ pub const feature_vcmpxPermlaneHazard = Feature{ pub const feature_vscnt = Feature{ .name = "vscnt", + .llvm_name = "vscnt", .description = "Has separate store vscnt counter", .dependencies = &[_]*const Feature { }, @@ -692,6 +790,7 @@ pub const feature_vscnt = Feature{ pub const feature_wavefrontsize16 = Feature{ .name = "wavefrontsize16", + .llvm_name = "wavefrontsize16", .description = "The number of threads per wavefront", .dependencies = &[_]*const Feature { }, @@ -699,6 +798,7 @@ pub const feature_wavefrontsize16 = Feature{ pub const feature_wavefrontsize32 = Feature{ .name = "wavefrontsize32", + .llvm_name = "wavefrontsize32", .description = "The number of threads per wavefront", .dependencies = &[_]*const Feature { }, @@ -706,6 +806,7 @@ pub const feature_wavefrontsize32 = Feature{ pub const feature_wavefrontsize64 = Feature{ .name = "wavefrontsize64", + .llvm_name = "wavefrontsize64", .description = "The number of threads per wavefront", .dependencies = &[_]*const Feature { }, @@ -713,6 +814,7 @@ pub const feature_wavefrontsize64 = Feature{ pub const feature_xnack = Feature{ .name = "xnack", + .llvm_name = "xnack", .description = "Enable XNACK support", .dependencies = &[_]*const Feature { }, @@ -720,6 +822,7 @@ pub const feature_xnack = Feature{ pub const feature_halfRate64Ops = Feature{ .name = "half-rate-64-ops", + .llvm_name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", .dependencies = &[_]*const Feature { }, @@ -838,16 +941,16 @@ pub const cpu_bonaire = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -859,28 +962,28 @@ pub const cpu_carrizo = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, &feature_xnack, &feature_halfRate64Ops, }, @@ -894,28 +997,28 @@ pub const cpu_fiji = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -944,40 +1047,40 @@ pub const cpu_gfx1010 = Cpu{ &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_noSdstCmpx, - &feature_flatScratchInsts, - &feature_fp64, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, - &feature_fastFmaf, - &feature_BitInsts16, - &feature_sdwa, - &feature_gfx9Insts, &feature_flatAddressSpace, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_gfx9Insts, + &feature_fastFmaf, + &feature_flatScratchInsts, &feature_mimgR128, - &feature_sdwaScalar, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, - &feature_gfx8Insts, + &feature_noSdstCmpx, + &feature_sdwaSdst, + &feature_vop3p, &feature_intClampInsts, - &feature_vscnt, + &feature_dpp, + &feature_registerBanking, &feature_movrel, - &feature_localmemorysize65536, - &feature_gfx10Insts, + &feature_gfx8Insts, + &feature_sdwa, + &feature_noDataDepHazard, &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_pkFmacF16Inst, - &feature_dpp, - &feature_sdwaSdst, &feature_flatInstOffsets, &feature_fmaMixInsts, - &feature_registerBanking, - &feature_noDataDepHazard, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_vscnt, + &feature_apertureRegs, + &feature_dpp8, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, + &feature_vop3Literal, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1008,40 +1111,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_noSdstCmpx, - &feature_flatScratchInsts, - &feature_fp64, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, - &feature_fastFmaf, - &feature_BitInsts16, - &feature_sdwa, - &feature_gfx9Insts, &feature_flatAddressSpace, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_gfx9Insts, + &feature_fastFmaf, + &feature_flatScratchInsts, &feature_mimgR128, - &feature_sdwaScalar, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, - &feature_gfx8Insts, + &feature_noSdstCmpx, + &feature_sdwaSdst, + &feature_vop3p, &feature_intClampInsts, - &feature_vscnt, + &feature_dpp, + &feature_registerBanking, &feature_movrel, - &feature_localmemorysize65536, - &feature_gfx10Insts, + &feature_gfx8Insts, + &feature_sdwa, + &feature_noDataDepHazard, &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_pkFmacF16Inst, - &feature_dpp, - &feature_sdwaSdst, &feature_flatInstOffsets, &feature_fmaMixInsts, - &feature_registerBanking, - &feature_noDataDepHazard, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_vscnt, + &feature_apertureRegs, + &feature_dpp8, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, + &feature_vop3Literal, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1071,40 +1174,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_noSdstCmpx, - &feature_flatScratchInsts, - &feature_fp64, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, - &feature_fastFmaf, - &feature_BitInsts16, - &feature_sdwa, - &feature_gfx9Insts, &feature_flatAddressSpace, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_gfx9Insts, + &feature_fastFmaf, + &feature_flatScratchInsts, &feature_mimgR128, - &feature_sdwaScalar, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, - &feature_gfx8Insts, + &feature_noSdstCmpx, + &feature_sdwaSdst, + &feature_vop3p, &feature_intClampInsts, - &feature_vscnt, + &feature_dpp, + &feature_registerBanking, &feature_movrel, - &feature_localmemorysize65536, - &feature_gfx10Insts, + &feature_gfx8Insts, + &feature_sdwa, + &feature_noDataDepHazard, &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp8, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_pkFmacF16Inst, - &feature_dpp, - &feature_sdwaSdst, &feature_flatInstOffsets, &feature_fmaMixInsts, - &feature_registerBanking, - &feature_noDataDepHazard, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_vscnt, + &feature_apertureRegs, + &feature_dpp8, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, + &feature_vop3Literal, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1131,13 +1234,13 @@ pub const cpu_gfx600 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, &feature_halfRate64Ops, }, }; @@ -1149,13 +1252,13 @@ pub const cpu_gfx601 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, }, }; @@ -1166,16 +1269,16 @@ pub const cpu_gfx700 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1187,16 +1290,16 @@ pub const cpu_gfx701 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1209,16 +1312,16 @@ pub const cpu_gfx702 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount16, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1229,16 +1332,16 @@ pub const cpu_gfx703 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1249,16 +1352,16 @@ pub const cpu_gfx704 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1270,28 +1373,28 @@ pub const cpu_gfx801 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, &feature_xnack, &feature_halfRate64Ops, }, @@ -1306,28 +1409,28 @@ pub const cpu_gfx802 = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1339,28 +1442,28 @@ pub const cpu_gfx803 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1370,28 +1473,28 @@ pub const cpu_gfx810 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, &feature_xnack, }, }; @@ -1403,36 +1506,36 @@ pub const cpu_gfx900 = Cpu{ &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, &feature_madMixInsts, }, @@ -1444,36 +1547,36 @@ pub const cpu_gfx902 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1488,36 +1591,36 @@ pub const cpu_gfx904 = Cpu{ &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, }, }; @@ -1532,36 +1635,36 @@ pub const cpu_gfx906 = Cpu{ &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, &feature_halfRate64Ops, }, @@ -1581,36 +1684,36 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, &feature_maiInsts, &feature_mfmaInlineLiteralBug, @@ -1625,36 +1728,36 @@ pub const cpu_gfx909 = Cpu{ .llvm_name = "gfx909", .dependencies = &[_]*const Feature { &feature_codeObjectV3, - &feature_flatScratchInsts, - &feature_fp64, - &feature_r128A16, + &feature_sdwaOmod, &feature_sMemrealtime, - &feature_addNoCarryInsts, - &feature_vop3p, + &feature_scalarStores, + &feature_flatAddressSpace, + &feature_vgprIndexMode, + &feature_gfx9Insts, + &feature_r128A16, &feature_fastFmaf, - &feature_BitInsts16, &feature_wavefrontsize64, - &feature_sdwa, - &feature_gfx9Insts, - &feature_flatAddressSpace, - &feature_apertureRegs, - &feature_sdwaScalar, - &feature_ciInsts, + &feature_flatScratchInsts, + &feature_sdwaSdst, + &feature_vop3p, + &feature_intClampInsts, + &feature_dpp, &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_inv2piInlineImm, - &feature_vgprIndexMode, &feature_gcn3Encoding, &feature_gfx8Insts, - &feature_scalarStores, - &feature_intClampInsts, - &feature_localmemorysize65536, - &feature_flatGlobalInsts, - &feature_sdwaOmod, - &feature_dpp, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaSdst, + &feature_sdwa, + &feature_flatGlobalInsts, + &feature_localmemorysize65536, + &feature_BitInsts16, + &feature_addNoCarryInsts, &feature_flatInstOffsets, + &feature_sdwaScalar, + &feature_inv2piInlineImm, + &feature_apertureRegs, + &feature_fp64, + &feature_ciInsts, + &feature_scalarFlatScratchInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1668,13 +1771,13 @@ pub const cpu_hainan = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, }, }; @@ -1686,16 +1789,16 @@ pub const cpu_hawaii = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, &feature_halfRate64Ops, }, }; @@ -1709,28 +1812,28 @@ pub const cpu_iceland = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1741,16 +1844,16 @@ pub const cpu_kabini = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1761,16 +1864,16 @@ pub const cpu_kaveri = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1781,16 +1884,16 @@ pub const cpu_mullins = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, + &feature_movrel, &feature_flatAddressSpace, - &feature_fp64, - &feature_mimgR128, + &feature_trigReducedRange, &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, + &feature_wavefrontsize64, + &feature_mimgR128, + &feature_noSramEccSupport, &feature_localmemorysize65536, + &feature_fp64, &feature_ciInsts, - &feature_noSramEccSupport, - &feature_wavefrontsize64, - &feature_trigReducedRange, }, }; @@ -1801,13 +1904,13 @@ pub const cpu_oland = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, }, }; @@ -1818,13 +1921,13 @@ pub const cpu_pitcairn = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, }, }; @@ -1836,28 +1939,28 @@ pub const cpu_polaris10 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1869,28 +1972,28 @@ pub const cpu_polaris11 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1900,28 +2003,28 @@ pub const cpu_stoney = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, &feature_xnack, }, }; @@ -1934,13 +2037,13 @@ pub const cpu_tahiti = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, &feature_halfRate64Ops, }, }; @@ -1954,28 +2057,28 @@ pub const cpu_tonga = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_fp64, &feature_sMemrealtime, - &feature_BitInsts16, - &feature_wavefrontsize64, - &feature_sdwa, + &feature_scalarStores, &feature_flatAddressSpace, - &feature_sdwaMav, - &feature_mimgR128, - &feature_ciInsts, - &feature_noSramEccSupport, - &feature_inv2piInlineImm, &feature_vgprIndexMode, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_scalarStores, + &feature_wavefrontsize64, + &feature_mimgR128, &feature_intClampInsts, + &feature_dpp, &feature_movrel, + &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_sdwaMav, + &feature_sdwa, &feature_localmemorysize65536, + &feature_BitInsts16, &feature_sdwaOutModsVopc, - &feature_dpp, - &feature_gfx7Gfx8Gfx9Insts, - &feature_trigReducedRange, + &feature_inv2piInlineImm, + &feature_noSramEccSupport, + &feature_fp64, + &feature_ciInsts, }, }; @@ -1986,13 +2089,13 @@ pub const cpu_verde = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_localmemorysize32768, - &feature_fp64, - &feature_mimgR128, &feature_movrel, - &feature_noSramEccSupport, - &feature_wavefrontsize64, &feature_trigReducedRange, + &feature_mimgR128, + &feature_localmemorysize32768, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_fp64, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 964b2882af7b2bd511b1270febea273c1441a6c4..6152346468cceff773e7f9cad6e441432413267e 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_msecext8 = Feature{ .name = "8msecext", + .llvm_name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_msecext8 = Feature{ pub const feature_aclass = Feature{ .name = "aclass", + .llvm_name = "aclass", .description = "Is application profile ('A' series)", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_aclass = Feature{ pub const feature_aes = Feature{ .name = "aes", + .llvm_name = "aes", .description = "Enable AES support", .dependencies = &[_]*const Feature { &feature_d32, @@ -26,6 +29,7 @@ pub const feature_aes = Feature{ pub const feature_acquireRelease = Feature{ .name = "acquire-release", + .llvm_name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", .dependencies = &[_]*const Feature { }, @@ -33,6 +37,7 @@ pub const feature_acquireRelease = Feature{ pub const feature_avoidMovsShop = Feature{ .name = "avoid-movs-shop", + .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", .dependencies = &[_]*const Feature { }, @@ -40,6 +45,7 @@ pub const feature_avoidMovsShop = Feature{ pub const feature_avoidPartialCpsr = Feature{ .name = "avoid-partial-cpsr", + .llvm_name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", .dependencies = &[_]*const Feature { }, @@ -47,6 +53,7 @@ pub const feature_avoidPartialCpsr = Feature{ pub const feature_crc = Feature{ .name = "crc", + .llvm_name = "crc", .description = "Enable support for CRC instructions", .dependencies = &[_]*const Feature { }, @@ -54,6 +61,7 @@ pub const feature_crc = Feature{ pub const feature_cheapPredicableCpsr = Feature{ .name = "cheap-predicable-cpsr", + .llvm_name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", .dependencies = &[_]*const Feature { }, @@ -61,6 +69,7 @@ pub const feature_cheapPredicableCpsr = Feature{ pub const feature_vldnAlign = Feature{ .name = "vldn-align", + .llvm_name = "vldn-align", .description = "Check for VLDn unaligned access", .dependencies = &[_]*const Feature { }, @@ -68,6 +77,7 @@ pub const feature_vldnAlign = Feature{ pub const feature_crypto = Feature{ .name = "crypto", + .llvm_name = "crypto", .description = "Enable support for Cryptography extensions", .dependencies = &[_]*const Feature { &feature_d32, @@ -77,6 +87,7 @@ pub const feature_crypto = Feature{ pub const feature_d32 = Feature{ .name = "d32", + .llvm_name = "d32", .description = "Extend FP to 32 double registers", .dependencies = &[_]*const Feature { }, @@ -84,6 +95,7 @@ pub const feature_d32 = Feature{ pub const feature_db = Feature{ .name = "db", + .llvm_name = "db", .description = "Has data barrier (dmb/dsb) instructions", .dependencies = &[_]*const Feature { }, @@ -91,6 +103,7 @@ pub const feature_db = Feature{ pub const feature_dfb = Feature{ .name = "dfb", + .llvm_name = "dfb", .description = "Has full data barrier (dfb) instruction", .dependencies = &[_]*const Feature { }, @@ -98,6 +111,7 @@ pub const feature_dfb = Feature{ pub const feature_dsp = Feature{ .name = "dsp", + .llvm_name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", .dependencies = &[_]*const Feature { }, @@ -105,6 +119,7 @@ pub const feature_dsp = Feature{ pub const feature_dontWidenVmovs = Feature{ .name = "dont-widen-vmovs", + .llvm_name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", .dependencies = &[_]*const Feature { }, @@ -112,6 +127,7 @@ pub const feature_dontWidenVmovs = Feature{ pub const feature_dotprod = Feature{ .name = "dotprod", + .llvm_name = "dotprod", .description = "Enable support for dot product instructions", .dependencies = &[_]*const Feature { &feature_d32, @@ -121,6 +137,7 @@ pub const feature_dotprod = Feature{ pub const feature_executeOnly = Feature{ .name = "execute-only", + .llvm_name = "execute-only", .description = "Enable the generation of execute only code.", .dependencies = &[_]*const Feature { }, @@ -128,6 +145,7 @@ pub const feature_executeOnly = Feature{ pub const feature_expandFpMlx = Feature{ .name = "expand-fp-mlx", + .llvm_name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", .dependencies = &[_]*const Feature { }, @@ -135,6 +153,7 @@ pub const feature_expandFpMlx = Feature{ pub const feature_fp16 = Feature{ .name = "fp16", + .llvm_name = "fp16", .description = "Enable half-precision floating point", .dependencies = &[_]*const Feature { }, @@ -142,6 +161,7 @@ pub const feature_fp16 = Feature{ pub const feature_fp16fml = Feature{ .name = "fp16fml", + .llvm_name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", .dependencies = &[_]*const Feature { &feature_fp16, @@ -151,6 +171,7 @@ pub const feature_fp16fml = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", + .llvm_name = "fp64", .description = "Floating point unit supports double precision", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -159,6 +180,7 @@ pub const feature_fp64 = Feature{ pub const feature_fpao = Feature{ .name = "fpao", + .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", .dependencies = &[_]*const Feature { }, @@ -166,16 +188,18 @@ pub const feature_fpao = Feature{ pub const feature_fpArmv8 = Feature{ .name = "fp-armv8", + .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, &feature_fp16, + &feature_d32, + &feature_fpregs, }, }; pub const feature_fpArmv8d16 = Feature{ .name = "fp-armv8d16", + .llvm_name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", .dependencies = &[_]*const Feature { &feature_fp16, @@ -185,6 +209,7 @@ pub const feature_fpArmv8d16 = Feature{ pub const feature_fpArmv8d16sp = Feature{ .name = "fp-armv8d16sp", + .llvm_name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { &feature_fp16, @@ -194,16 +219,18 @@ pub const feature_fpArmv8d16sp = Feature{ pub const feature_fpArmv8sp = Feature{ .name = "fp-armv8sp", + .llvm_name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, &feature_fp16, + &feature_d32, + &feature_fpregs, }, }; pub const feature_fpregs = Feature{ .name = "fpregs", + .llvm_name = "fpregs", .description = "Enable FP registers", .dependencies = &[_]*const Feature { }, @@ -211,6 +238,7 @@ pub const feature_fpregs = Feature{ pub const feature_fpregs16 = Feature{ .name = "fpregs16", + .llvm_name = "fpregs16", .description = "Enable 16-bit FP registers", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -219,6 +247,7 @@ pub const feature_fpregs16 = Feature{ pub const feature_fpregs64 = Feature{ .name = "fpregs64", + .llvm_name = "fpregs64", .description = "Enable 64-bit FP registers", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -227,15 +256,17 @@ pub const feature_fpregs64 = Feature{ pub const feature_fullfp16 = Feature{ .name = "fullfp16", + .llvm_name = "fullfp16", .description = "Enable full half-precision floating point", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; pub const feature_fuseAes = Feature{ .name = "fuse-aes", + .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", .dependencies = &[_]*const Feature { }, @@ -243,6 +274,7 @@ pub const feature_fuseAes = Feature{ pub const feature_fuseLiterals = Feature{ .name = "fuse-literals", + .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", .dependencies = &[_]*const Feature { }, @@ -250,6 +282,7 @@ pub const feature_fuseLiterals = Feature{ pub const feature_hwdivArm = Feature{ .name = "hwdiv-arm", + .llvm_name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", .dependencies = &[_]*const Feature { }, @@ -257,6 +290,7 @@ pub const feature_hwdivArm = Feature{ pub const feature_hwdiv = Feature{ .name = "hwdiv", + .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", .dependencies = &[_]*const Feature { }, @@ -264,6 +298,7 @@ pub const feature_hwdiv = Feature{ pub const feature_noBranchPredictor = Feature{ .name = "no-branch-predictor", + .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", .dependencies = &[_]*const Feature { }, @@ -271,6 +306,7 @@ pub const feature_noBranchPredictor = Feature{ pub const feature_retAddrStack = Feature{ .name = "ret-addr-stack", + .llvm_name = "ret-addr-stack", .description = "Has return address stack", .dependencies = &[_]*const Feature { }, @@ -278,6 +314,7 @@ pub const feature_retAddrStack = Feature{ pub const feature_slowfpvmlx = Feature{ .name = "slowfpvmlx", + .llvm_name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", .dependencies = &[_]*const Feature { }, @@ -285,6 +322,7 @@ pub const feature_slowfpvmlx = Feature{ pub const feature_vmlxHazards = Feature{ .name = "vmlx-hazards", + .llvm_name = "vmlx-hazards", .description = "Has VMLx hazards", .dependencies = &[_]*const Feature { }, @@ -292,6 +330,7 @@ pub const feature_vmlxHazards = Feature{ pub const feature_lob = Feature{ .name = "lob", + .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", .dependencies = &[_]*const Feature { }, @@ -299,6 +338,7 @@ pub const feature_lob = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", + .llvm_name = "long-calls", .description = "Generate calls via indirect call instructions", .dependencies = &[_]*const Feature { }, @@ -306,6 +346,7 @@ pub const feature_longCalls = Feature{ pub const feature_mclass = Feature{ .name = "mclass", + .llvm_name = "mclass", .description = "Is microcontroller profile ('M' series)", .dependencies = &[_]*const Feature { }, @@ -313,6 +354,7 @@ pub const feature_mclass = Feature{ pub const feature_mp = Feature{ .name = "mp", + .llvm_name = "mp", .description = "Supports Multiprocessing extension", .dependencies = &[_]*const Feature { }, @@ -320,6 +362,7 @@ pub const feature_mp = Feature{ pub const feature_mve1beat = Feature{ .name = "mve1beat", + .llvm_name = "mve1beat", .description = "Model MVE instructions as a 1 beat per tick architecture", .dependencies = &[_]*const Feature { }, @@ -327,6 +370,7 @@ pub const feature_mve1beat = Feature{ pub const feature_mve2beat = Feature{ .name = "mve2beat", + .llvm_name = "mve2beat", .description = "Model MVE instructions as a 2 beats per tick architecture", .dependencies = &[_]*const Feature { }, @@ -334,6 +378,7 @@ pub const feature_mve2beat = Feature{ pub const feature_mve4beat = Feature{ .name = "mve4beat", + .llvm_name = "mve4beat", .description = "Model MVE instructions as a 4 beats per tick architecture", .dependencies = &[_]*const Feature { }, @@ -341,6 +386,7 @@ pub const feature_mve4beat = Feature{ pub const feature_muxedUnits = Feature{ .name = "muxed-units", + .llvm_name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", .dependencies = &[_]*const Feature { }, @@ -348,6 +394,7 @@ pub const feature_muxedUnits = Feature{ pub const feature_neon = Feature{ .name = "neon", + .llvm_name = "neon", .description = "Enable NEON instructions", .dependencies = &[_]*const Feature { &feature_d32, @@ -357,6 +404,7 @@ pub const feature_neon = Feature{ pub const feature_neonfp = Feature{ .name = "neonfp", + .llvm_name = "neonfp", .description = "Use NEON for single precision FP", .dependencies = &[_]*const Feature { }, @@ -364,6 +412,7 @@ pub const feature_neonfp = Feature{ pub const feature_neonFpmovs = Feature{ .name = "neon-fpmovs", + .llvm_name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", .dependencies = &[_]*const Feature { }, @@ -371,6 +420,7 @@ pub const feature_neonFpmovs = Feature{ pub const feature_naclTrap = Feature{ .name = "nacl-trap", + .llvm_name = "nacl-trap", .description = "NaCl trap", .dependencies = &[_]*const Feature { }, @@ -378,6 +428,7 @@ pub const feature_naclTrap = Feature{ pub const feature_noarm = Feature{ .name = "noarm", + .llvm_name = "noarm", .description = "Does not support ARM mode execution", .dependencies = &[_]*const Feature { }, @@ -385,6 +436,7 @@ pub const feature_noarm = Feature{ pub const feature_noMovt = Feature{ .name = "no-movt", + .llvm_name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", .dependencies = &[_]*const Feature { }, @@ -392,6 +444,7 @@ pub const feature_noMovt = Feature{ pub const feature_noNegImmediates = Feature{ .name = "no-neg-immediates", + .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", .dependencies = &[_]*const Feature { }, @@ -399,6 +452,7 @@ pub const feature_noNegImmediates = Feature{ pub const feature_disablePostraScheduler = Feature{ .name = "disable-postra-scheduler", + .llvm_name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", .dependencies = &[_]*const Feature { }, @@ -406,6 +460,7 @@ pub const feature_disablePostraScheduler = Feature{ pub const feature_nonpipelinedVfp = Feature{ .name = "nonpipelined-vfp", + .llvm_name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", .dependencies = &[_]*const Feature { }, @@ -413,6 +468,7 @@ pub const feature_nonpipelinedVfp = Feature{ pub const feature_perfmon = Feature{ .name = "perfmon", + .llvm_name = "perfmon", .description = "Enable support for Performance Monitor extensions", .dependencies = &[_]*const Feature { }, @@ -420,6 +476,7 @@ pub const feature_perfmon = Feature{ pub const feature_bit32 = Feature{ .name = "32bit", + .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", .dependencies = &[_]*const Feature { }, @@ -427,6 +484,7 @@ pub const feature_bit32 = Feature{ pub const feature_preferIshst = Feature{ .name = "prefer-ishst", + .llvm_name = "prefer-ishst", .description = "Prefer ISHST barriers", .dependencies = &[_]*const Feature { }, @@ -434,6 +492,7 @@ pub const feature_preferIshst = Feature{ pub const feature_loopAlign = Feature{ .name = "loop-align", + .llvm_name = "loop-align", .description = "Prefer 32-bit alignment for loops", .dependencies = &[_]*const Feature { }, @@ -441,6 +500,7 @@ pub const feature_loopAlign = Feature{ pub const feature_preferVmovsr = Feature{ .name = "prefer-vmovsr", + .llvm_name = "prefer-vmovsr", .description = "Prefer VMOVSR", .dependencies = &[_]*const Feature { }, @@ -448,6 +508,7 @@ pub const feature_preferVmovsr = Feature{ pub const feature_profUnpr = Feature{ .name = "prof-unpr", + .llvm_name = "prof-unpr", .description = "Is profitable to unpredicate", .dependencies = &[_]*const Feature { }, @@ -455,6 +516,7 @@ pub const feature_profUnpr = Feature{ pub const feature_ras = Feature{ .name = "ras", + .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", .dependencies = &[_]*const Feature { }, @@ -462,6 +524,7 @@ pub const feature_ras = Feature{ pub const feature_rclass = Feature{ .name = "rclass", + .llvm_name = "rclass", .description = "Is realtime profile ('R' series)", .dependencies = &[_]*const Feature { }, @@ -469,6 +532,7 @@ pub const feature_rclass = Feature{ pub const feature_readTpHard = Feature{ .name = "read-tp-hard", + .llvm_name = "read-tp-hard", .description = "Reading thread pointer from register", .dependencies = &[_]*const Feature { }, @@ -476,6 +540,7 @@ pub const feature_readTpHard = Feature{ pub const feature_reserveR9 = Feature{ .name = "reserve-r9", + .llvm_name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", .dependencies = &[_]*const Feature { }, @@ -483,6 +548,7 @@ pub const feature_reserveR9 = Feature{ pub const feature_sb = Feature{ .name = "sb", + .llvm_name = "sb", .description = "Enable v8.5a Speculation Barrier", .dependencies = &[_]*const Feature { }, @@ -490,6 +556,7 @@ pub const feature_sb = Feature{ pub const feature_sha2 = Feature{ .name = "sha2", + .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", .dependencies = &[_]*const Feature { &feature_d32, @@ -499,6 +566,7 @@ pub const feature_sha2 = Feature{ pub const feature_slowFpBrcc = Feature{ .name = "slow-fp-brcc", + .llvm_name = "slow-fp-brcc", .description = "FP compare + branch is slow", .dependencies = &[_]*const Feature { }, @@ -506,6 +574,7 @@ pub const feature_slowFpBrcc = Feature{ pub const feature_slowLoadDSubreg = Feature{ .name = "slow-load-D-subreg", + .llvm_name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", .dependencies = &[_]*const Feature { }, @@ -513,6 +582,7 @@ pub const feature_slowLoadDSubreg = Feature{ pub const feature_slowOddReg = Feature{ .name = "slow-odd-reg", + .llvm_name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", .dependencies = &[_]*const Feature { }, @@ -520,6 +590,7 @@ pub const feature_slowOddReg = Feature{ pub const feature_slowVdup32 = Feature{ .name = "slow-vdup32", + .llvm_name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", .dependencies = &[_]*const Feature { }, @@ -527,6 +598,7 @@ pub const feature_slowVdup32 = Feature{ pub const feature_slowVgetlni32 = Feature{ .name = "slow-vgetlni32", + .llvm_name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", .dependencies = &[_]*const Feature { }, @@ -534,6 +606,7 @@ pub const feature_slowVgetlni32 = Feature{ pub const feature_splatVfpNeon = Feature{ .name = "splat-vfp-neon", + .llvm_name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", .dependencies = &[_]*const Feature { &feature_dontWidenVmovs, @@ -542,6 +615,7 @@ pub const feature_splatVfpNeon = Feature{ pub const feature_strictAlign = Feature{ .name = "strict-align", + .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", .dependencies = &[_]*const Feature { }, @@ -549,6 +623,7 @@ pub const feature_strictAlign = Feature{ pub const feature_thumb2 = Feature{ .name = "thumb2", + .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", .dependencies = &[_]*const Feature { }, @@ -556,6 +631,7 @@ pub const feature_thumb2 = Feature{ pub const feature_trustzone = Feature{ .name = "trustzone", + .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", .dependencies = &[_]*const Feature { }, @@ -563,6 +639,7 @@ pub const feature_trustzone = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", + .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { }, @@ -570,6 +647,7 @@ pub const feature_useAa = Feature{ pub const feature_useMisched = Feature{ .name = "use-misched", + .llvm_name = "use-misched", .description = "Use the MachineScheduler", .dependencies = &[_]*const Feature { }, @@ -577,6 +655,7 @@ pub const feature_useMisched = Feature{ pub const feature_wideStrideVfp = Feature{ .name = "wide-stride-vfp", + .llvm_name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", .dependencies = &[_]*const Feature { }, @@ -584,6 +663,7 @@ pub const feature_wideStrideVfp = Feature{ pub const feature_v7clrex = Feature{ .name = "v7clrex", + .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", .dependencies = &[_]*const Feature { }, @@ -591,6 +671,7 @@ pub const feature_v7clrex = Feature{ pub const feature_vfp2 = Feature{ .name = "vfp2", + .llvm_name = "vfp2", .description = "Enable VFP2 instructions", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -599,6 +680,7 @@ pub const feature_vfp2 = Feature{ pub const feature_vfp2sp = Feature{ .name = "vfp2sp", + .llvm_name = "vfp2sp", .description = "Enable VFP2 instructions with no double precision", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -607,6 +689,7 @@ pub const feature_vfp2sp = Feature{ pub const feature_vfp3 = Feature{ .name = "vfp3", + .llvm_name = "vfp3", .description = "Enable VFP3 instructions", .dependencies = &[_]*const Feature { &feature_d32, @@ -616,6 +699,7 @@ pub const feature_vfp3 = Feature{ pub const feature_vfp3d16 = Feature{ .name = "vfp3d16", + .llvm_name = "vfp3d16", .description = "Enable VFP3 instructions with only 16 d-registers", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -624,6 +708,7 @@ pub const feature_vfp3d16 = Feature{ pub const feature_vfp3d16sp = Feature{ .name = "vfp3d16sp", + .llvm_name = "vfp3d16sp", .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { &feature_fpregs, @@ -632,6 +717,7 @@ pub const feature_vfp3d16sp = Feature{ pub const feature_vfp3sp = Feature{ .name = "vfp3sp", + .llvm_name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", .dependencies = &[_]*const Feature { &feature_d32, @@ -641,44 +727,49 @@ pub const feature_vfp3sp = Feature{ pub const feature_vfp4 = Feature{ .name = "vfp4", + .llvm_name = "vfp4", .description = "Enable VFP4 instructions", .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, &feature_fp16, + &feature_d32, + &feature_fpregs, }, }; pub const feature_vfp4d16 = Feature{ .name = "vfp4d16", + .llvm_name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; pub const feature_vfp4d16sp = Feature{ .name = "vfp4d16sp", + .llvm_name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; pub const feature_vfp4sp = Feature{ .name = "vfp4sp", + .llvm_name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, &feature_fp16, + &feature_d32, + &feature_fpregs, }, }; pub const feature_vmlxForwarding = Feature{ .name = "vmlx-forwarding", + .llvm_name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", .dependencies = &[_]*const Feature { }, @@ -686,6 +777,7 @@ pub const feature_vmlxForwarding = Feature{ pub const feature_virtualization = Feature{ .name = "virtualization", + .llvm_name = "virtualization", .description = "Supports Virtualization extension", .dependencies = &[_]*const Feature { &feature_hwdiv, @@ -695,6 +787,7 @@ pub const feature_virtualization = Feature{ pub const feature_zcz = Feature{ .name = "zcz", + .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", .dependencies = &[_]*const Feature { }, @@ -854,8 +947,8 @@ pub const cpu_arm1156t2S = Cpu{ .name = "arm1156t2-s", .llvm_name = "arm1156t2-s", .dependencies = &[_]*const Feature { - &feature_thumb2, &feature_dsp, + &feature_thumb2, }, }; @@ -863,8 +956,8 @@ pub const cpu_arm1156t2fS = Cpu{ .name = "arm1156t2f-s", .llvm_name = "arm1156t2f-s", .dependencies = &[_]*const Feature { - &feature_thumb2, &feature_dsp, + &feature_thumb2, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -1021,13 +1114,13 @@ pub const cpu_cortexA12 = Cpu{ .name = "cortex-a12", .llvm_name = "cortex-a12", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -1046,13 +1139,13 @@ pub const cpu_cortexA15 = Cpu{ .name = "cortex-a15", .llvm_name = "cortex-a15", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -1074,13 +1167,13 @@ pub const cpu_cortexA17 = Cpu{ .name = "cortex-a17", .llvm_name = "cortex-a17", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_retAddrStack, @@ -1099,20 +1192,20 @@ pub const cpu_cortexA32 = Cpu{ .name = "cortex-a32", .llvm_name = "cortex-a32", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, }, @@ -1122,20 +1215,20 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortex-a35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, }, @@ -1145,13 +1238,13 @@ pub const cpu_cortexA5 = Cpu{ .name = "cortex-a5", .llvm_name = "cortex-a5", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1168,20 +1261,20 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortex-a53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, &feature_fpao, @@ -1192,21 +1285,21 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortex-a55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_dotprod, }, @@ -1216,20 +1309,20 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortex-a57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, @@ -1242,13 +1335,13 @@ pub const cpu_cortexA7 = Cpu{ .name = "cortex-a7", .llvm_name = "cortex-a7", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1269,20 +1362,20 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortex-a72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, }, @@ -1292,20 +1385,20 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortex-a73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, }, @@ -1315,21 +1408,21 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortex-a75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_dotprod, }, @@ -1339,21 +1432,21 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortex-a76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, &feature_dotprod, @@ -1365,21 +1458,21 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortex-a76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, &feature_dotprod, @@ -1391,13 +1484,13 @@ pub const cpu_cortexA8 = Cpu{ .name = "cortex-a8", .llvm_name = "cortex-a8", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1413,13 +1506,13 @@ pub const cpu_cortexA9 = Cpu{ .name = "cortex-a9", .llvm_name = "cortex-a9", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -1441,9 +1534,9 @@ pub const cpu_cortexM0 = Cpu{ .llvm_name = "cortex-m0", .dependencies = &[_]*const Feature { &feature_db, - &feature_mclass, &feature_strictAlign, &feature_noarm, + &feature_mclass, }, }; @@ -1452,9 +1545,9 @@ pub const cpu_cortexM0plus = Cpu{ .llvm_name = "cortex-m0plus", .dependencies = &[_]*const Feature { &feature_db, - &feature_mclass, &feature_strictAlign, &feature_noarm, + &feature_mclass, }, }; @@ -1463,9 +1556,9 @@ pub const cpu_cortexM1 = Cpu{ .llvm_name = "cortex-m1", .dependencies = &[_]*const Feature { &feature_db, - &feature_mclass, &feature_strictAlign, &feature_noarm, + &feature_mclass, }, }; @@ -1473,14 +1566,14 @@ pub const cpu_cortexM23 = Cpu{ .name = "cortex-m23", .llvm_name = "cortex-m23", .dependencies = &[_]*const Feature { - &feature_mclass, &feature_db, - &feature_msecext8, &feature_strictAlign, &feature_acquireRelease, - &feature_hwdiv, &feature_v7clrex, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_msecext8, &feature_noMovt, }, }; @@ -1489,13 +1582,13 @@ pub const cpu_cortexM3 = Cpu{ .name = "cortex-m3", .llvm_name = "cortex-m3", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_mclass, - &feature_thumb2, - &feature_hwdiv, + &feature_perfmon, &feature_v7clrex, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, &feature_noBranchPredictor, &feature_loopAlign, &feature_useAa, @@ -1507,15 +1600,15 @@ pub const cpu_cortexM33 = Cpu{ .name = "cortex-m33", .llvm_name = "cortex-m33", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_mclass, &feature_db, - &feature_msecext8, - &feature_thumb2, + &feature_perfmon, &feature_acquireRelease, - &feature_hwdiv, &feature_v7clrex, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, + &feature_msecext8, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -1532,15 +1625,15 @@ pub const cpu_cortexM35p = Cpu{ .name = "cortex-m35p", .llvm_name = "cortex-m35p", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_mclass, &feature_db, - &feature_msecext8, - &feature_thumb2, + &feature_perfmon, &feature_acquireRelease, - &feature_hwdiv, &feature_v7clrex, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, + &feature_msecext8, &feature_dsp, &feature_fp16, &feature_fpregs, @@ -1557,21 +1650,21 @@ pub const cpu_cortexM4 = Cpu{ .name = "cortex-m4", .llvm_name = "cortex-m4", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_mclass, - &feature_thumb2, - &feature_hwdiv, + &feature_perfmon, &feature_v7clrex, &feature_dsp, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, &feature_noBranchPredictor, &feature_slowfpvmlx, &feature_loopAlign, &feature_useAa, &feature_useMisched, - &feature_fpregs, &feature_fp16, + &feature_fpregs, &feature_vfp4d16sp, }, }; @@ -1580,14 +1673,14 @@ pub const cpu_cortexM7 = Cpu{ .name = "cortex-m7", .llvm_name = "cortex-m7", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_mclass, - &feature_thumb2, - &feature_hwdiv, + &feature_perfmon, &feature_v7clrex, &feature_dsp, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, &feature_fp16, &feature_fpregs, &feature_fpArmv8d16, @@ -1598,13 +1691,13 @@ pub const cpu_cortexR4 = Cpu{ .name = "cortex-r4", .llvm_name = "cortex-r4", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_thumb2, + &feature_perfmon, &feature_rclass, - &feature_hwdiv, &feature_v7clrex, &feature_dsp, + &feature_hwdiv, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, }, @@ -1614,13 +1707,13 @@ pub const cpu_cortexR4f = Cpu{ .name = "cortex-r4f", .llvm_name = "cortex-r4f", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_thumb2, + &feature_perfmon, &feature_rclass, - &feature_hwdiv, &feature_v7clrex, &feature_dsp, + &feature_hwdiv, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1634,13 +1727,13 @@ pub const cpu_cortexR5 = Cpu{ .name = "cortex-r5", .llvm_name = "cortex-r5", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_thumb2, + &feature_perfmon, &feature_rclass, - &feature_hwdiv, &feature_v7clrex, &feature_dsp, + &feature_hwdiv, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_hwdivArm, &feature_retAddrStack, @@ -1655,21 +1748,21 @@ pub const cpu_cortexR52 = Cpu{ .name = "cortex-r52", .llvm_name = "cortex-r52", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, &feature_perfmon, - &feature_thumb2, + &feature_fpregs, &feature_rclass, - &feature_mp, &feature_acquireRelease, - &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_v7clrex, + &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_dfb, - &feature_dsp, &feature_fpao, &feature_useAa, &feature_useMisched, @@ -1680,13 +1773,13 @@ pub const cpu_cortexR7 = Cpu{ .name = "cortex-r7", .llvm_name = "cortex-r7", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_thumb2, + &feature_perfmon, &feature_rclass, - &feature_hwdiv, &feature_v7clrex, &feature_dsp, + &feature_hwdiv, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1703,13 +1796,13 @@ pub const cpu_cortexR8 = Cpu{ .name = "cortex-r8", .llvm_name = "cortex-r8", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_thumb2, + &feature_perfmon, &feature_rclass, - &feature_hwdiv, &feature_v7clrex, &feature_dsp, + &feature_hwdiv, + &feature_thumb2, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1726,20 +1819,20 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_avoidMovsShop, &feature_avoidPartialCpsr, @@ -1765,33 +1858,33 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynos-m1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, + &feature_expandFpMlx, &feature_fuseLiterals, - &feature_profUnpr, + &feature_fuseAes, + &feature_slowVgetlni32, &feature_wideStrideVfp, + &feature_profUnpr, &feature_slowVdup32, - &feature_slowVgetlni32, + &feature_slowfpvmlx, &feature_dontWidenVmovs, - &feature_fuseAes, + &feature_useAa, &feature_retAddrStack, - &feature_expandFpMlx, &feature_zcz, - &feature_useAa, - &feature_slowfpvmlx, &feature_slowFpBrcc, }, }; @@ -1800,33 +1893,33 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynos-m2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, + &feature_expandFpMlx, &feature_fuseLiterals, - &feature_profUnpr, + &feature_fuseAes, + &feature_slowVgetlni32, &feature_wideStrideVfp, + &feature_profUnpr, &feature_slowVdup32, - &feature_slowVgetlni32, + &feature_slowfpvmlx, &feature_dontWidenVmovs, - &feature_fuseAes, + &feature_useAa, &feature_retAddrStack, - &feature_expandFpMlx, &feature_zcz, - &feature_useAa, - &feature_slowfpvmlx, &feature_slowFpBrcc, }, }; @@ -1835,33 +1928,33 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynos-m3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, + &feature_expandFpMlx, &feature_fuseLiterals, - &feature_profUnpr, + &feature_fuseAes, + &feature_slowVgetlni32, &feature_wideStrideVfp, + &feature_profUnpr, &feature_slowVdup32, - &feature_slowVgetlni32, + &feature_slowfpvmlx, &feature_dontWidenVmovs, - &feature_fuseAes, + &feature_useAa, &feature_retAddrStack, - &feature_expandFpMlx, &feature_zcz, - &feature_useAa, - &feature_slowfpvmlx, &feature_slowFpBrcc, }, }; @@ -1870,36 +1963,36 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynos-m4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_dotprod, &feature_fullfp16, + &feature_expandFpMlx, &feature_fuseLiterals, - &feature_profUnpr, + &feature_fuseAes, + &feature_slowVgetlni32, &feature_wideStrideVfp, + &feature_profUnpr, &feature_slowVdup32, - &feature_slowVgetlni32, + &feature_slowfpvmlx, &feature_dontWidenVmovs, - &feature_fuseAes, + &feature_useAa, &feature_retAddrStack, - &feature_expandFpMlx, &feature_zcz, - &feature_useAa, - &feature_slowfpvmlx, &feature_slowFpBrcc, }, }; @@ -1908,36 +2001,36 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynos-m5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_dotprod, &feature_fullfp16, + &feature_expandFpMlx, &feature_fuseLiterals, - &feature_profUnpr, + &feature_fuseAes, + &feature_slowVgetlni32, &feature_wideStrideVfp, + &feature_profUnpr, &feature_slowVdup32, - &feature_slowVgetlni32, + &feature_slowfpvmlx, &feature_dontWidenVmovs, - &feature_fuseAes, + &feature_useAa, &feature_retAddrStack, - &feature_expandFpMlx, &feature_zcz, - &feature_useAa, - &feature_slowfpvmlx, &feature_slowFpBrcc, }, }; @@ -1960,13 +2053,13 @@ pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidPartialCpsr, &feature_vldnAlign, @@ -1984,20 +2077,20 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, &feature_db, - &feature_crc, - &feature_fp16, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, }, @@ -2024,21 +2117,21 @@ pub const cpu_neoverseN1 = Cpu{ .name = "neoverse-n1", .llvm_name = "neoverse-n1", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_hwdivArm, - &feature_fpregs, - &feature_db, - &feature_crc, - &feature_fp16, &feature_ras, + &feature_db, + &feature_trustzone, &feature_perfmon, - &feature_thumb2, - &feature_mp, + &feature_fpregs, &feature_acquireRelease, - &feature_hwdiv, - &feature_trustzone, + &feature_mp, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_crc, + &feature_fp16, + &feature_hwdiv, + &feature_hwdivArm, + &feature_thumb2, &feature_aclass, &feature_crypto, &feature_dotprod, @@ -2050,9 +2143,9 @@ pub const cpu_sc000 = Cpu{ .llvm_name = "sc000", .dependencies = &[_]*const Feature { &feature_db, - &feature_mclass, &feature_strictAlign, &feature_noarm, + &feature_mclass, }, }; @@ -2060,13 +2153,13 @@ pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", .dependencies = &[_]*const Feature { - &feature_perfmon, &feature_db, - &feature_mclass, - &feature_thumb2, - &feature_hwdiv, + &feature_perfmon, &feature_v7clrex, &feature_noarm, + &feature_mclass, + &feature_hwdiv, + &feature_thumb2, &feature_noBranchPredictor, &feature_useAa, &feature_useMisched, @@ -2105,13 +2198,13 @@ pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", .dependencies = &[_]*const Feature { - &feature_d32, + &feature_db, &feature_perfmon, &feature_fpregs, - &feature_db, - &feature_thumb2, + &feature_d32, &feature_v7clrex, &feature_dsp, + &feature_thumb2, &feature_aclass, &feature_avoidMovsShop, &feature_avoidPartialCpsr, diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index de44399ceaef6b81ebf6d83c3711f3a3b2cc788e..ac5c8f17111c23ac40c75d971f2ae8604070c984 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_addsubiw = Feature{ .name = "addsubiw", + .llvm_name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_addsubiw = Feature{ pub const feature_break = Feature{ .name = "break", + .llvm_name = "break", .description = "The device supports the `BREAK` debugging instruction", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_break = Feature{ pub const feature_des = Feature{ .name = "des", + .llvm_name = "des", .description = "The device supports the `DES k` encryption instruction", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_des = Feature{ pub const feature_eijmpcall = Feature{ .name = "eijmpcall", + .llvm_name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_eijmpcall = Feature{ pub const feature_elpm = Feature{ .name = "elpm", + .llvm_name = "elpm", .description = "The device supports the ELPM instruction", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_elpm = Feature{ pub const feature_elpmx = Feature{ .name = "elpmx", + .llvm_name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_elpmx = Feature{ pub const feature_ijmpcall = Feature{ .name = "ijmpcall", + .llvm_name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_ijmpcall = Feature{ pub const feature_jmpcall = Feature{ .name = "jmpcall", + .llvm_name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_jmpcall = Feature{ pub const feature_lpm = Feature{ .name = "lpm", + .llvm_name = "lpm", .description = "The device supports the `LPM` instruction", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_lpm = Feature{ pub const feature_lpmx = Feature{ .name = "lpmx", + .llvm_name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", .dependencies = &[_]*const Feature { }, @@ -73,6 +83,7 @@ pub const feature_lpmx = Feature{ pub const feature_movw = Feature{ .name = "movw", + .llvm_name = "movw", .description = "The device supports the 16-bit MOVW instruction", .dependencies = &[_]*const Feature { }, @@ -80,6 +91,7 @@ pub const feature_movw = Feature{ pub const feature_mul = Feature{ .name = "mul", + .llvm_name = "mul", .description = "The device supports the multiplication instructions", .dependencies = &[_]*const Feature { }, @@ -87,6 +99,7 @@ pub const feature_mul = Feature{ pub const feature_rmw = Feature{ .name = "rmw", + .llvm_name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", .dependencies = &[_]*const Feature { }, @@ -94,6 +107,7 @@ pub const feature_rmw = Feature{ pub const feature_spm = Feature{ .name = "spm", + .llvm_name = "spm", .description = "The device supports the `SPM` instruction", .dependencies = &[_]*const Feature { }, @@ -101,6 +115,7 @@ pub const feature_spm = Feature{ pub const feature_spmx = Feature{ .name = "spmx", + .llvm_name = "spmx", .description = "The device supports the `SPM Z+` instruction", .dependencies = &[_]*const Feature { }, @@ -108,6 +123,7 @@ pub const feature_spmx = Feature{ pub const feature_sram = Feature{ .name = "sram", + .llvm_name = "sram", .description = "The device has random access memory", .dependencies = &[_]*const Feature { }, @@ -115,6 +131,7 @@ pub const feature_sram = Feature{ pub const feature_smallstack = Feature{ .name = "smallstack", + .llvm_name = "smallstack", .description = "The device has an 8-bit stack pointer", .dependencies = &[_]*const Feature { }, @@ -122,6 +139,7 @@ pub const feature_smallstack = Feature{ pub const feature_tinyencoding = Feature{ .name = "tinyencoding", + .llvm_name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", .dependencies = &[_]*const Feature { }, @@ -152,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", .dependencies = &[_]*const Feature { - &feature_elpm, - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_elpm, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -165,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -177,11 +195,11 @@ pub const cpu_at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -189,10 +207,10 @@ pub const cpu_at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, }, @@ -202,10 +220,10 @@ pub const cpu_at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -213,18 +231,18 @@ pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -232,16 +250,16 @@ pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -249,16 +267,16 @@ pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -266,15 +284,15 @@ pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -282,16 +300,16 @@ pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -299,15 +317,15 @@ pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -315,16 +333,16 @@ pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -332,15 +350,15 @@ pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -348,15 +366,15 @@ pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -364,16 +382,16 @@ pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -381,15 +399,15 @@ pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -397,15 +415,15 @@ pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -420,10 +438,10 @@ pub const cpu_at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -431,10 +449,10 @@ pub const cpu_at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -442,10 +460,10 @@ pub const cpu_at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -453,10 +471,10 @@ pub const cpu_at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -464,10 +482,10 @@ pub const cpu_at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -475,10 +493,10 @@ pub const cpu_at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -486,10 +504,10 @@ pub const cpu_at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -497,10 +515,10 @@ pub const cpu_at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -508,10 +526,10 @@ pub const cpu_at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -519,16 +537,16 @@ pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -536,18 +554,18 @@ pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -555,18 +573,18 @@ pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -574,15 +592,15 @@ pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -590,16 +608,16 @@ pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -607,16 +625,16 @@ pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -624,15 +642,15 @@ pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -640,11 +658,11 @@ pub const cpu_at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -655,14 +673,14 @@ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -670,15 +688,15 @@ pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -686,16 +704,16 @@ pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -703,16 +721,16 @@ pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -720,15 +738,15 @@ pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -736,15 +754,15 @@ pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -752,15 +770,15 @@ pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -768,12 +786,12 @@ pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", .dependencies = &[_]*const Feature { - &feature_elpm, - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_elpm, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -781,18 +799,18 @@ pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -800,18 +818,18 @@ pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -819,18 +837,18 @@ pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -838,18 +856,18 @@ pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -857,18 +875,18 @@ pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -876,18 +894,18 @@ pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -895,18 +913,18 @@ pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -914,18 +932,18 @@ pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -933,18 +951,18 @@ pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -952,16 +970,16 @@ pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -969,11 +987,11 @@ pub const cpu_atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -985,16 +1003,16 @@ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1002,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1018,16 +1036,16 @@ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1035,16 +1053,16 @@ pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1052,16 +1070,16 @@ pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1069,16 +1087,16 @@ pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1086,16 +1104,16 @@ pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1103,16 +1121,16 @@ pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1120,16 +1138,16 @@ pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1137,16 +1155,16 @@ pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1154,16 +1172,16 @@ pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1171,16 +1189,16 @@ pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1188,16 +1206,16 @@ pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1205,16 +1223,16 @@ pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1222,16 +1240,16 @@ pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1239,16 +1257,16 @@ pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1256,16 +1274,16 @@ pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1273,16 +1291,16 @@ pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1290,16 +1308,16 @@ pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1307,16 +1325,16 @@ pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1324,16 +1342,16 @@ pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1341,16 +1359,16 @@ pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1358,16 +1376,16 @@ pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1375,15 +1393,15 @@ pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -1391,16 +1409,16 @@ pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1408,18 +1426,18 @@ pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_break, - &feature_jmpcall, - &feature_mul, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -1427,18 +1445,18 @@ pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_break, - &feature_jmpcall, - &feature_mul, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -1446,18 +1464,18 @@ pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_break, - &feature_jmpcall, - &feature_mul, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -1465,18 +1483,18 @@ pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_break, - &feature_jmpcall, - &feature_mul, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -1484,16 +1502,16 @@ pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1501,16 +1519,16 @@ pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1518,16 +1536,16 @@ pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1535,16 +1553,16 @@ pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1552,16 +1570,16 @@ pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1569,16 +1587,16 @@ pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1586,16 +1604,16 @@ pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1603,16 +1621,16 @@ pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1620,16 +1638,16 @@ pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1637,16 +1655,16 @@ pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1654,16 +1672,16 @@ pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1671,16 +1689,16 @@ pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1688,16 +1706,16 @@ pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1705,16 +1723,16 @@ pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1722,16 +1740,16 @@ pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1739,16 +1757,16 @@ pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1756,16 +1774,16 @@ pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1773,16 +1791,16 @@ pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1790,16 +1808,16 @@ pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1807,16 +1825,16 @@ pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1824,16 +1842,16 @@ pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1841,16 +1859,16 @@ pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1858,16 +1876,16 @@ pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1875,16 +1893,16 @@ pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1892,16 +1910,16 @@ pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1909,16 +1927,16 @@ pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1926,16 +1944,16 @@ pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1943,16 +1961,16 @@ pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1960,15 +1978,15 @@ pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -1976,16 +1994,16 @@ pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -1993,16 +2011,16 @@ pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2010,16 +2028,16 @@ pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2027,15 +2045,15 @@ pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2043,15 +2061,15 @@ pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2059,15 +2077,15 @@ pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2075,15 +2093,15 @@ pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2091,16 +2109,16 @@ pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2108,16 +2126,16 @@ pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2125,16 +2143,16 @@ pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2142,16 +2160,16 @@ pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2159,16 +2177,16 @@ pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2176,16 +2194,16 @@ pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2193,16 +2211,16 @@ pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2210,16 +2228,16 @@ pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2227,16 +2245,16 @@ pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2244,16 +2262,16 @@ pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2261,16 +2279,16 @@ pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2278,16 +2296,16 @@ pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2295,16 +2313,16 @@ pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2312,16 +2330,16 @@ pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2329,16 +2347,16 @@ pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2346,16 +2364,16 @@ pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2363,16 +2381,16 @@ pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2380,16 +2398,16 @@ pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2397,16 +2415,16 @@ pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2414,16 +2432,16 @@ pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2431,16 +2449,16 @@ pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2448,16 +2466,16 @@ pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2465,16 +2483,16 @@ pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2482,16 +2500,16 @@ pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2499,15 +2517,15 @@ pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2515,10 +2533,10 @@ pub const cpu_atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -2530,10 +2548,10 @@ pub const cpu_atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -2545,15 +2563,15 @@ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2561,15 +2579,15 @@ pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2577,15 +2595,15 @@ pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2593,15 +2611,15 @@ pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2609,15 +2627,15 @@ pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2625,15 +2643,15 @@ pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -2641,15 +2659,15 @@ pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -2657,9 +2675,9 @@ pub const cpu_attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2667,9 +2685,9 @@ pub const cpu_attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2677,9 +2695,9 @@ pub const cpu_attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2703,14 +2721,14 @@ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2718,14 +2736,14 @@ pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2741,15 +2759,15 @@ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -2757,15 +2775,15 @@ pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -2773,9 +2791,9 @@ pub const cpu_attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2783,10 +2801,10 @@ pub const cpu_attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -2794,14 +2812,14 @@ pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2809,14 +2827,14 @@ pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2824,14 +2842,14 @@ pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2839,14 +2857,14 @@ pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2854,14 +2872,14 @@ pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2869,10 +2887,10 @@ pub const cpu_attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, &feature_lpmx, }, }; @@ -2881,14 +2899,14 @@ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2896,14 +2914,14 @@ pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2919,9 +2937,9 @@ pub const cpu_attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2929,9 +2947,9 @@ pub const cpu_attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -2939,14 +2957,14 @@ pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2954,14 +2972,14 @@ pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2969,14 +2987,14 @@ pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2984,14 +3002,14 @@ pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -2999,14 +3017,14 @@ pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3014,14 +3032,14 @@ pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3029,14 +3047,14 @@ pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3044,14 +3062,14 @@ pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3059,9 +3077,9 @@ pub const cpu_attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -3069,14 +3087,14 @@ pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3084,14 +3102,14 @@ pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3099,14 +3117,14 @@ pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3114,14 +3132,14 @@ pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3129,14 +3147,14 @@ pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3144,14 +3162,14 @@ pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3159,14 +3177,14 @@ pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3174,14 +3192,14 @@ pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -3189,9 +3207,9 @@ pub const cpu_attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -3199,21 +3217,21 @@ pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3221,22 +3239,22 @@ pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3244,21 +3262,21 @@ pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3266,22 +3284,22 @@ pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3289,22 +3307,22 @@ pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3312,22 +3330,22 @@ pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3335,22 +3353,22 @@ pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3358,22 +3376,22 @@ pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3381,21 +3399,21 @@ pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3403,21 +3421,21 @@ pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3425,21 +3443,21 @@ pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3447,22 +3465,22 @@ pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3470,22 +3488,22 @@ pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3493,21 +3511,21 @@ pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3515,21 +3533,21 @@ pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3537,21 +3555,21 @@ pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3559,22 +3577,22 @@ pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3582,22 +3600,22 @@ pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3605,21 +3623,21 @@ pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3627,21 +3645,21 @@ pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3649,21 +3667,21 @@ pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3671,22 +3689,22 @@ pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3694,22 +3712,22 @@ pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3717,22 +3735,22 @@ pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3740,21 +3758,21 @@ pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3762,21 +3780,21 @@ pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3784,22 +3802,22 @@ pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3807,22 +3825,22 @@ pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3830,21 +3848,21 @@ pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3852,21 +3870,21 @@ pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3874,21 +3892,21 @@ pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3896,22 +3914,22 @@ pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3919,21 +3937,21 @@ pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3941,21 +3959,21 @@ pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -3963,22 +3981,22 @@ pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -3986,21 +4004,21 @@ pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4008,22 +4026,22 @@ pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -4031,22 +4049,22 @@ pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -4054,22 +4072,22 @@ pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -4077,22 +4095,22 @@ pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -4100,22 +4118,22 @@ pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_elpm, - &feature_spm, - &feature_lpm, - &feature_ijmpcall, - &feature_elpmx, + &feature_des, &feature_sram, - &feature_spmx, - &feature_break, + &feature_movw, &feature_jmpcall, - &feature_des, - &feature_rmw, &feature_mul, - &feature_eijmpcall, - &feature_movw, + &feature_elpm, + &feature_spmx, + &feature_lpm, + &feature_lpmx, + &feature_spm, &feature_addsubiw, + &feature_rmw, + &feature_ijmpcall, + &feature_eijmpcall, + &feature_break, + &feature_elpmx, }, }; @@ -4123,21 +4141,21 @@ pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4145,21 +4163,21 @@ pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4167,21 +4185,21 @@ pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4197,10 +4215,10 @@ pub const cpu_avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -4208,14 +4226,14 @@ pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, &feature_movw, - &feature_addsubiw, }, }; @@ -4223,11 +4241,11 @@ pub const cpu_avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -4235,12 +4253,12 @@ pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", .dependencies = &[_]*const Feature { - &feature_elpm, - &feature_lpm, - &feature_ijmpcall, &feature_sram, &feature_jmpcall, + &feature_elpm, + &feature_lpm, &feature_addsubiw, + &feature_ijmpcall, }, }; @@ -4248,15 +4266,15 @@ pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, &feature_movw, - &feature_addsubiw, }, }; @@ -4264,15 +4282,15 @@ pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -4280,16 +4298,16 @@ pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -4297,18 +4315,18 @@ pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, - &feature_spm, &feature_lpm, + &feature_lpmx, + &feature_spm, + &feature_addsubiw, &feature_ijmpcall, &feature_elpmx, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; @@ -4316,18 +4334,18 @@ pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_elpm, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_break, - &feature_jmpcall, - &feature_mul, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4335,9 +4353,9 @@ pub const cpu_avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", .dependencies = &[_]*const Feature { - &feature_break, - &feature_tinyencoding, &feature_sram, + &feature_tinyencoding, + &feature_break, }, }; @@ -4345,21 +4363,21 @@ pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4367,21 +4385,21 @@ pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4389,21 +4407,21 @@ pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4411,21 +4429,21 @@ pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4433,21 +4451,21 @@ pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4455,21 +4473,21 @@ pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4477,21 +4495,21 @@ pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_des, + &feature_sram, + &feature_eijmpcall, + &feature_jmpcall, + &feature_mul, &feature_elpm, + &feature_spmx, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_movw, - &feature_sram, - &feature_spmx, - &feature_break, - &feature_jmpcall, - &feature_des, - &feature_mul, - &feature_eijmpcall, &feature_elpmx, - &feature_addsubiw, + &feature_break, + &feature_movw, }, }; @@ -4499,16 +4517,16 @@ pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", .dependencies = &[_]*const Feature { - &feature_lpmx, + &feature_sram, + &feature_jmpcall, + &feature_mul, &feature_lpm, + &feature_lpmx, &feature_spm, + &feature_addsubiw, &feature_ijmpcall, - &feature_sram, &feature_break, - &feature_jmpcall, - &feature_mul, &feature_movw, - &feature_addsubiw, }, }; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 9dc27093a6b18e141ac4cfb0556341861839204e..62c69746f8e9a0171d75050e9efa3d102876cac0 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_alu32 = Feature{ .name = "alu32", + .llvm_name = "alu32", .description = "Enable ALU32 instructions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_alu32 = Feature{ pub const feature_dummy = Feature{ .name = "dummy", + .llvm_name = "dummy", .description = "unused feature", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_dummy = Feature{ pub const feature_dwarfris = Feature{ .name = "dwarfris", + .llvm_name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index a007ee10cf4984b8b15bb77fa746554c03f8de7a..7deecaa6c73a8f2b5159cdc687467943019292ac 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_duplex = Feature{ .name = "duplex", + .llvm_name = "duplex", .description = "Enable generation of duplex instruction", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_duplex = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", + .llvm_name = "long-calls", .description = "Use constant-extended calls", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_longCalls = Feature{ pub const feature_mem_noshuf = Feature{ .name = "mem_noshuf", + .llvm_name = "mem_noshuf", .description = "Supports mem_noshuf feature", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_mem_noshuf = Feature{ pub const feature_memops = Feature{ .name = "memops", + .llvm_name = "memops", .description = "Use memop instructions", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_memops = Feature{ pub const feature_nvj = Feature{ .name = "nvj", + .llvm_name = "nvj", .description = "Support for new-value jumps", .dependencies = &[_]*const Feature { &feature_packets, @@ -39,6 +44,7 @@ pub const feature_nvj = Feature{ pub const feature_nvs = Feature{ .name = "nvs", + .llvm_name = "nvs", .description = "Support for new-value stores", .dependencies = &[_]*const Feature { &feature_packets, @@ -47,6 +53,7 @@ pub const feature_nvs = Feature{ pub const feature_noreturnStackElim = Feature{ .name = "noreturn-stack-elim", + .llvm_name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", .dependencies = &[_]*const Feature { }, @@ -54,6 +61,7 @@ pub const feature_noreturnStackElim = Feature{ pub const feature_packets = Feature{ .name = "packets", + .llvm_name = "packets", .description = "Support for instruction packets", .dependencies = &[_]*const Feature { }, @@ -61,6 +69,7 @@ pub const feature_packets = Feature{ pub const feature_reservedR19 = Feature{ .name = "reserved-r19", + .llvm_name = "reserved-r19", .description = "Reserve register R19", .dependencies = &[_]*const Feature { }, @@ -68,6 +77,7 @@ pub const feature_reservedR19 = Feature{ pub const feature_smallData = Feature{ .name = "small-data", + .llvm_name = "small-data", .description = "Allow GP-relative addressing of global variables", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index e7c26230af4583a094a6bc022e9bf17527d2c900..7b97a84f18d900ea206ec0aac64b0d7d37d1497d 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_abs2008 = Feature{ .name = "abs2008", + .llvm_name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_abs2008 = Feature{ pub const feature_crc = Feature{ .name = "crc", + .llvm_name = "crc", .description = "Mips R6 CRC ASE", .dependencies = &[_]*const Feature { }, @@ -17,21 +19,23 @@ pub const feature_crc = Feature{ pub const feature_cnmips = Feature{ .name = "cnmips", + .llvm_name = "cnmips", .description = "Octeon cnMIPS Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_dsp = Feature{ .name = "dsp", + .llvm_name = "dsp", .description = "Mips DSP ASE", .dependencies = &[_]*const Feature { }, @@ -39,6 +43,7 @@ pub const feature_dsp = Feature{ pub const feature_dspr2 = Feature{ .name = "dspr2", + .llvm_name = "dspr2", .description = "Mips DSP-R2 ASE", .dependencies = &[_]*const Feature { &feature_dsp, @@ -47,6 +52,7 @@ pub const feature_dspr2 = Feature{ pub const feature_dspr3 = Feature{ .name = "dspr3", + .llvm_name = "dspr3", .description = "Mips DSP-R3 ASE", .dependencies = &[_]*const Feature { &feature_dsp, @@ -55,6 +61,7 @@ pub const feature_dspr3 = Feature{ pub const feature_eva = Feature{ .name = "eva", + .llvm_name = "eva", .description = "Mips EVA ASE", .dependencies = &[_]*const Feature { }, @@ -62,6 +69,7 @@ pub const feature_eva = Feature{ pub const feature_fp64 = Feature{ .name = "fp64", + .llvm_name = "fp64", .description = "Support 64-bit FP registers", .dependencies = &[_]*const Feature { }, @@ -69,6 +77,7 @@ pub const feature_fp64 = Feature{ pub const feature_fpxx = Feature{ .name = "fpxx", + .llvm_name = "fpxx", .description = "Support for FPXX", .dependencies = &[_]*const Feature { }, @@ -76,6 +85,7 @@ pub const feature_fpxx = Feature{ pub const feature_ginv = Feature{ .name = "ginv", + .llvm_name = "ginv", .description = "Mips Global Invalidate ASE", .dependencies = &[_]*const Feature { }, @@ -83,6 +93,7 @@ pub const feature_ginv = Feature{ pub const feature_gp64 = Feature{ .name = "gp64", + .llvm_name = "gp64", .description = "General Purpose Registers are 64-bit wide", .dependencies = &[_]*const Feature { }, @@ -90,6 +101,7 @@ pub const feature_gp64 = Feature{ pub const feature_longCalls = Feature{ .name = "long-calls", + .llvm_name = "long-calls", .description = "Disable use of the jal instruction", .dependencies = &[_]*const Feature { }, @@ -97,6 +109,7 @@ pub const feature_longCalls = Feature{ pub const feature_msa = Feature{ .name = "msa", + .llvm_name = "msa", .description = "Mips MSA ASE", .dependencies = &[_]*const Feature { }, @@ -104,6 +117,7 @@ pub const feature_msa = Feature{ pub const feature_mt = Feature{ .name = "mt", + .llvm_name = "mt", .description = "Mips MT ASE", .dependencies = &[_]*const Feature { }, @@ -111,6 +125,7 @@ pub const feature_mt = Feature{ pub const feature_nomadd4 = Feature{ .name = "nomadd4", + .llvm_name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", .dependencies = &[_]*const Feature { }, @@ -118,6 +133,7 @@ pub const feature_nomadd4 = Feature{ pub const feature_micromips = Feature{ .name = "micromips", + .llvm_name = "micromips", .description = "microMips mode", .dependencies = &[_]*const Feature { }, @@ -125,6 +141,7 @@ pub const feature_micromips = Feature{ pub const feature_mips1 = Feature{ .name = "mips1", + .llvm_name = "mips1", .description = "Mips I ISA Support [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -132,6 +149,7 @@ pub const feature_mips1 = Feature{ pub const feature_mips2 = Feature{ .name = "mips2", + .llvm_name = "mips2", .description = "Mips II ISA Support [highly experimental]", .dependencies = &[_]*const Feature { &feature_mips1, @@ -140,18 +158,20 @@ pub const feature_mips2 = Feature{ pub const feature_mips3 = Feature{ .name = "mips3", + .llvm_name = "mips3", .description = "MIPS III ISA Support [highly experimental]", .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips3_32, }, }; pub const feature_mips3_32 = Feature{ .name = "mips3_32", + .llvm_name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -159,6 +179,7 @@ pub const feature_mips3_32 = Feature{ pub const feature_mips3_32r2 = Feature{ .name = "mips3_32r2", + .llvm_name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -166,20 +187,22 @@ pub const feature_mips3_32r2 = Feature{ pub const feature_mips4 = Feature{ .name = "mips4", + .llvm_name = "mips4", .description = "MIPS IV ISA Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, + &feature_mips4_32, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips4_32 = Feature{ .name = "mips4_32", + .llvm_name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -187,6 +210,7 @@ pub const feature_mips4_32 = Feature{ pub const feature_mips4_32r2 = Feature{ .name = "mips4_32r2", + .llvm_name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -194,21 +218,23 @@ pub const feature_mips4_32r2 = Feature{ pub const feature_mips5 = Feature{ .name = "mips5", + .llvm_name = "mips5", .description = "MIPS V ISA Support [highly experimental]", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips5_32r2 = Feature{ .name = "mips5_32r2", + .llvm_name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", .dependencies = &[_]*const Feature { }, @@ -216,6 +242,7 @@ pub const feature_mips5_32r2 = Feature{ pub const feature_mips16 = Feature{ .name = "mips16", + .llvm_name = "mips16", .description = "Mips16 mode", .dependencies = &[_]*const Feature { }, @@ -223,148 +250,159 @@ pub const feature_mips16 = Feature{ pub const feature_mips32 = Feature{ .name = "mips32", + .llvm_name = "mips32", .description = "Mips32 ISA Support", .dependencies = &[_]*const Feature { &feature_mips1, - &feature_mips3_32, &feature_mips4_32, + &feature_mips3_32, }, }; pub const feature_mips32r2 = Feature{ .name = "mips32r2", + .llvm_name = "mips32r2", .description = "Mips32r2 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips32r3 = Feature{ .name = "mips32r3", + .llvm_name = "mips32r3", .description = "Mips32r3 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips32r5 = Feature{ .name = "mips32r5", + .llvm_name = "mips32r5", .description = "Mips32r5 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips32r6 = Feature{ .name = "mips32r6", + .llvm_name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_nan2008, - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_nan2008, + &feature_mips5_32r2, &feature_fp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips64 = Feature{ .name = "mips64", + .llvm_name = "mips64", .description = "Mips64 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips64r2 = Feature{ .name = "mips64r2", + .llvm_name = "mips64r2", .description = "Mips64r2 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips64r3 = Feature{ .name = "mips64r3", + .llvm_name = "mips64r3", .description = "Mips64r3 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_mips4_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips64r5 = Feature{ .name = "mips64r5", + .llvm_name = "mips64r5", .description = "Mips64r5 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_mips64r6 = Feature{ .name = "mips64r6", + .llvm_name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_nan2008, - &feature_mips4_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, + &feature_nan2008, &feature_mips5_32r2, - &feature_mips3_32, - &feature_mips4_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, }, }; pub const feature_nan2008 = Feature{ .name = "nan2008", + .llvm_name = "nan2008", .description = "IEEE 754-2008 NaN encoding", .dependencies = &[_]*const Feature { }, @@ -372,6 +410,7 @@ pub const feature_nan2008 = Feature{ pub const feature_noabicalls = Feature{ .name = "noabicalls", + .llvm_name = "noabicalls", .description = "Disable SVR4-style position-independent code", .dependencies = &[_]*const Feature { }, @@ -379,6 +418,7 @@ pub const feature_noabicalls = Feature{ pub const feature_nooddspreg = Feature{ .name = "nooddspreg", + .llvm_name = "nooddspreg", .description = "Disable odd numbered single-precision registers", .dependencies = &[_]*const Feature { }, @@ -386,6 +426,7 @@ pub const feature_nooddspreg = Feature{ pub const feature_ptr64 = Feature{ .name = "ptr64", + .llvm_name = "ptr64", .description = "Pointers are 64-bit wide", .dependencies = &[_]*const Feature { }, @@ -393,6 +434,7 @@ pub const feature_ptr64 = Feature{ pub const feature_singleFloat = Feature{ .name = "single-float", + .llvm_name = "single-float", .description = "Only supports single precision float", .dependencies = &[_]*const Feature { }, @@ -400,6 +442,7 @@ pub const feature_singleFloat = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", + .llvm_name = "soft-float", .description = "Does not support floating point instructions", .dependencies = &[_]*const Feature { }, @@ -407,6 +450,7 @@ pub const feature_softFloat = Feature{ pub const feature_sym32 = Feature{ .name = "sym32", + .llvm_name = "sym32", .description = "Symbols are 32 bit on Mips64", .dependencies = &[_]*const Feature { }, @@ -414,6 +458,7 @@ pub const feature_sym32 = Feature{ pub const feature_useIndirectJumpHazard = Feature{ .name = "use-indirect-jump-hazard", + .llvm_name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", .dependencies = &[_]*const Feature { }, @@ -421,6 +466,7 @@ pub const feature_useIndirectJumpHazard = Feature{ pub const feature_useTccInDiv = Feature{ .name = "use-tcc-in-div", + .llvm_name = "use-tcc-in-div", .description = "Force the assembler to use trapping", .dependencies = &[_]*const Feature { }, @@ -428,6 +474,7 @@ pub const feature_useTccInDiv = Feature{ pub const feature_vfpu = Feature{ .name = "vfpu", + .llvm_name = "vfpu", .description = "Enable vector FPU instructions", .dependencies = &[_]*const Feature { }, @@ -435,6 +482,7 @@ pub const feature_vfpu = Feature{ pub const feature_virt = Feature{ .name = "virt", + .llvm_name = "virt", .description = "Mips Virtualization ASE", .dependencies = &[_]*const Feature { }, @@ -442,6 +490,7 @@ pub const feature_virt = Feature{ pub const feature_xgot = Feature{ .name = "xgot", + .llvm_name = "xgot", .description = "Assume 32-bit GOT", .dependencies = &[_]*const Feature { }, @@ -449,14 +498,15 @@ pub const feature_xgot = Feature{ pub const feature_p5600 = Feature{ .name = "p5600", + .llvm_name = "p5600", .description = "The P5600 Processor", .dependencies = &[_]*const Feature { - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, &feature_mips4_32r2, + &feature_mips3_32, }, }; @@ -536,9 +586,9 @@ pub const cpu_mips3 = Cpu{ .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips3_32, &feature_mips3, }, }; @@ -548,8 +598,8 @@ pub const cpu_mips32 = Cpu{ .llvm_name = "mips32", .dependencies = &[_]*const Feature { &feature_mips1, - &feature_mips3_32, &feature_mips4_32, + &feature_mips3_32, &feature_mips32, }, }; @@ -558,12 +608,12 @@ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", .dependencies = &[_]*const Feature { - &feature_mips4_32, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, &feature_mips4_32r2, + &feature_mips3_32, &feature_mips32r2, }, }; @@ -572,12 +622,12 @@ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", .dependencies = &[_]*const Feature { - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, &feature_mips4_32r2, + &feature_mips3_32, &feature_mips32r3, }, }; @@ -586,12 +636,12 @@ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", .dependencies = &[_]*const Feature { - &feature_mips4_32, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, &feature_mips4_32r2, + &feature_mips3_32, &feature_mips32r5, }, }; @@ -601,14 +651,14 @@ pub const cpu_mips32r6 = Cpu{ .llvm_name = "mips32r6", .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_nan2008, - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_nan2008, + &feature_mips5_32r2, &feature_fp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips32r6, }, }; @@ -617,13 +667,13 @@ pub const cpu_mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, + &feature_mips4_32, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips4, }, }; @@ -632,14 +682,14 @@ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips5, }, }; @@ -648,14 +698,14 @@ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips64, }, }; @@ -664,14 +714,14 @@ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips64r2, }, }; @@ -680,14 +730,14 @@ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_mips4_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips64r3, }, }; @@ -696,14 +746,14 @@ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, - &feature_mips4_32r2, + &feature_mips5_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips64r5, }, }; @@ -713,15 +763,15 @@ pub const cpu_mips64r6 = Cpu{ .llvm_name = "mips64r6", .dependencies = &[_]*const Feature { &feature_abs2008, - &feature_nan2008, - &feature_mips4_32, - &feature_gp64, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, + &feature_nan2008, &feature_mips5_32r2, - &feature_mips3_32, - &feature_mips4_32r2, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_mips64r6, }, }; @@ -730,14 +780,14 @@ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips4_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips3_32, - &feature_gp64, &feature_fp64, + &feature_gp64, + &feature_mips4_32r2, + &feature_mips3_32, &feature_cnmips, &feature_mips64r2, }, @@ -747,12 +797,12 @@ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", .dependencies = &[_]*const Feature { - &feature_mips3_32, &feature_mips1, &feature_mips3_32r2, - &feature_mips5_32r2, &feature_mips4_32, + &feature_mips5_32r2, &feature_mips4_32r2, + &feature_mips3_32, &feature_p5600, }, }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 1e3b93b9d0daf31752200f051143cfc74cbf8b13..75e641f0dc3edc64760fea53ce59e1ded8fb2841 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_hwmult16 = Feature{ .name = "hwmult16", + .llvm_name = "hwmult16", .description = "Enable 16-bit hardware multiplier", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_hwmult16 = Feature{ pub const feature_hwmult32 = Feature{ .name = "hwmult32", + .llvm_name = "hwmult32", .description = "Enable 32-bit hardware multiplier", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_hwmult32 = Feature{ pub const feature_hwmultf5 = Feature{ .name = "hwmultf5", + .llvm_name = "hwmultf5", .description = "Enable F5 series hardware multiplier", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_hwmultf5 = Feature{ pub const feature_ext = Feature{ .name = "ext", + .llvm_name = "ext", .description = "Enable MSP430-X extensions", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index 815d1116c57ac9f5a2a38becc8e36fdc3829cb47..cddd800f30f4333aa4e2d651266d61d8b400de03 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_ptx32 = Feature{ .name = "ptx32", + .llvm_name = "ptx32", .description = "Use PTX version 3.2", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_ptx32 = Feature{ pub const feature_ptx40 = Feature{ .name = "ptx40", + .llvm_name = "ptx40", .description = "Use PTX version 4.0", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_ptx40 = Feature{ pub const feature_ptx41 = Feature{ .name = "ptx41", + .llvm_name = "ptx41", .description = "Use PTX version 4.1", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_ptx41 = Feature{ pub const feature_ptx42 = Feature{ .name = "ptx42", + .llvm_name = "ptx42", .description = "Use PTX version 4.2", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_ptx42 = Feature{ pub const feature_ptx43 = Feature{ .name = "ptx43", + .llvm_name = "ptx43", .description = "Use PTX version 4.3", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_ptx43 = Feature{ pub const feature_ptx50 = Feature{ .name = "ptx50", + .llvm_name = "ptx50", .description = "Use PTX version 5.0", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_ptx50 = Feature{ pub const feature_ptx60 = Feature{ .name = "ptx60", + .llvm_name = "ptx60", .description = "Use PTX version 6.0", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_ptx60 = Feature{ pub const feature_ptx61 = Feature{ .name = "ptx61", + .llvm_name = "ptx61", .description = "Use PTX version 6.1", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_ptx61 = Feature{ pub const feature_ptx63 = Feature{ .name = "ptx63", + .llvm_name = "ptx63", .description = "Use PTX version 6.3", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_ptx63 = Feature{ pub const feature_ptx64 = Feature{ .name = "ptx64", + .llvm_name = "ptx64", .description = "Use PTX version 6.4", .dependencies = &[_]*const Feature { }, @@ -73,6 +83,7 @@ pub const feature_ptx64 = Feature{ pub const feature_sm_20 = Feature{ .name = "sm_20", + .llvm_name = "sm_20", .description = "Target SM 2.0", .dependencies = &[_]*const Feature { }, @@ -80,6 +91,7 @@ pub const feature_sm_20 = Feature{ pub const feature_sm_21 = Feature{ .name = "sm_21", + .llvm_name = "sm_21", .description = "Target SM 2.1", .dependencies = &[_]*const Feature { }, @@ -87,6 +99,7 @@ pub const feature_sm_21 = Feature{ pub const feature_sm_30 = Feature{ .name = "sm_30", + .llvm_name = "sm_30", .description = "Target SM 3.0", .dependencies = &[_]*const Feature { }, @@ -94,6 +107,7 @@ pub const feature_sm_30 = Feature{ pub const feature_sm_32 = Feature{ .name = "sm_32", + .llvm_name = "sm_32", .description = "Target SM 3.2", .dependencies = &[_]*const Feature { }, @@ -101,6 +115,7 @@ pub const feature_sm_32 = Feature{ pub const feature_sm_35 = Feature{ .name = "sm_35", + .llvm_name = "sm_35", .description = "Target SM 3.5", .dependencies = &[_]*const Feature { }, @@ -108,6 +123,7 @@ pub const feature_sm_35 = Feature{ pub const feature_sm_37 = Feature{ .name = "sm_37", + .llvm_name = "sm_37", .description = "Target SM 3.7", .dependencies = &[_]*const Feature { }, @@ -115,6 +131,7 @@ pub const feature_sm_37 = Feature{ pub const feature_sm_50 = Feature{ .name = "sm_50", + .llvm_name = "sm_50", .description = "Target SM 5.0", .dependencies = &[_]*const Feature { }, @@ -122,6 +139,7 @@ pub const feature_sm_50 = Feature{ pub const feature_sm_52 = Feature{ .name = "sm_52", + .llvm_name = "sm_52", .description = "Target SM 5.2", .dependencies = &[_]*const Feature { }, @@ -129,6 +147,7 @@ pub const feature_sm_52 = Feature{ pub const feature_sm_53 = Feature{ .name = "sm_53", + .llvm_name = "sm_53", .description = "Target SM 5.3", .dependencies = &[_]*const Feature { }, @@ -136,6 +155,7 @@ pub const feature_sm_53 = Feature{ pub const feature_sm_60 = Feature{ .name = "sm_60", + .llvm_name = "sm_60", .description = "Target SM 6.0", .dependencies = &[_]*const Feature { }, @@ -143,6 +163,7 @@ pub const feature_sm_60 = Feature{ pub const feature_sm_61 = Feature{ .name = "sm_61", + .llvm_name = "sm_61", .description = "Target SM 6.1", .dependencies = &[_]*const Feature { }, @@ -150,6 +171,7 @@ pub const feature_sm_61 = Feature{ pub const feature_sm_62 = Feature{ .name = "sm_62", + .llvm_name = "sm_62", .description = "Target SM 6.2", .dependencies = &[_]*const Feature { }, @@ -157,6 +179,7 @@ pub const feature_sm_62 = Feature{ pub const feature_sm_70 = Feature{ .name = "sm_70", + .llvm_name = "sm_70", .description = "Target SM 7.0", .dependencies = &[_]*const Feature { }, @@ -164,6 +187,7 @@ pub const feature_sm_70 = Feature{ pub const feature_sm_72 = Feature{ .name = "sm_72", + .llvm_name = "sm_72", .description = "Target SM 7.2", .dependencies = &[_]*const Feature { }, @@ -171,6 +195,7 @@ pub const feature_sm_72 = Feature{ pub const feature_sm_75 = Feature{ .name = "sm_75", + .llvm_name = "sm_75", .description = "Target SM 7.5", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 9e86df21854579b1da8e2c97b7407054ff1b1aa7..6ad23e946653cff7d1c81e16249351043a2b379d 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", + .llvm_name = "64bit", .description = "Enable 64-bit instructions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_bit64 = Feature{ pub const feature_bitregs64 = Feature{ .name = "64bitregs", + .llvm_name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_bitregs64 = Feature{ pub const feature_altivec = Feature{ .name = "altivec", + .llvm_name = "altivec", .description = "Enable Altivec instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -25,6 +28,7 @@ pub const feature_altivec = Feature{ pub const feature_bpermd = Feature{ .name = "bpermd", + .llvm_name = "bpermd", .description = "Enable the bpermd instruction", .dependencies = &[_]*const Feature { }, @@ -32,6 +36,7 @@ pub const feature_bpermd = Feature{ pub const feature_booke = Feature{ .name = "booke", + .llvm_name = "booke", .description = "Enable Book E instructions", .dependencies = &[_]*const Feature { &feature_icbt, @@ -40,6 +45,7 @@ pub const feature_booke = Feature{ pub const feature_cmpb = Feature{ .name = "cmpb", + .llvm_name = "cmpb", .description = "Enable the cmpb instruction", .dependencies = &[_]*const Feature { }, @@ -47,6 +53,7 @@ pub const feature_cmpb = Feature{ pub const feature_crbits = Feature{ .name = "crbits", + .llvm_name = "crbits", .description = "Use condition-register bits individually", .dependencies = &[_]*const Feature { }, @@ -54,6 +61,7 @@ pub const feature_crbits = Feature{ pub const feature_directMove = Feature{ .name = "direct-move", + .llvm_name = "direct-move", .description = "Enable Power8 direct move instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -62,6 +70,7 @@ pub const feature_directMove = Feature{ pub const feature_e500 = Feature{ .name = "e500", + .llvm_name = "e500", .description = "Enable E500/E500mc instructions", .dependencies = &[_]*const Feature { }, @@ -69,6 +78,7 @@ pub const feature_e500 = Feature{ pub const feature_extdiv = Feature{ .name = "extdiv", + .llvm_name = "extdiv", .description = "Enable extended divide instructions", .dependencies = &[_]*const Feature { }, @@ -76,6 +86,7 @@ pub const feature_extdiv = Feature{ pub const feature_fcpsgn = Feature{ .name = "fcpsgn", + .llvm_name = "fcpsgn", .description = "Enable the fcpsgn instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -84,6 +95,7 @@ pub const feature_fcpsgn = Feature{ pub const feature_fpcvt = Feature{ .name = "fpcvt", + .llvm_name = "fpcvt", .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -92,6 +104,7 @@ pub const feature_fpcvt = Feature{ pub const feature_fprnd = Feature{ .name = "fprnd", + .llvm_name = "fprnd", .description = "Enable the fri[mnpz] instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -100,6 +113,7 @@ pub const feature_fprnd = Feature{ pub const feature_fpu = Feature{ .name = "fpu", + .llvm_name = "fpu", .description = "Enable classic FPU instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -108,6 +122,7 @@ pub const feature_fpu = Feature{ pub const feature_fre = Feature{ .name = "fre", + .llvm_name = "fre", .description = "Enable the fre instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -116,6 +131,7 @@ pub const feature_fre = Feature{ pub const feature_fres = Feature{ .name = "fres", + .llvm_name = "fres", .description = "Enable the fres instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -124,6 +140,7 @@ pub const feature_fres = Feature{ pub const feature_frsqrte = Feature{ .name = "frsqrte", + .llvm_name = "frsqrte", .description = "Enable the frsqrte instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -132,6 +149,7 @@ pub const feature_frsqrte = Feature{ pub const feature_frsqrtes = Feature{ .name = "frsqrtes", + .llvm_name = "frsqrtes", .description = "Enable the frsqrtes instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -140,6 +158,7 @@ pub const feature_frsqrtes = Feature{ pub const feature_fsqrt = Feature{ .name = "fsqrt", + .llvm_name = "fsqrt", .description = "Enable the fsqrt instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -148,6 +167,7 @@ pub const feature_fsqrt = Feature{ pub const feature_float128 = Feature{ .name = "float128", + .llvm_name = "float128", .description = "Enable the __float128 data type for IEEE-754R Binary128.", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -156,6 +176,7 @@ pub const feature_float128 = Feature{ pub const feature_htm = Feature{ .name = "htm", + .llvm_name = "htm", .description = "Enable Hardware Transactional Memory instructions", .dependencies = &[_]*const Feature { }, @@ -163,6 +184,7 @@ pub const feature_htm = Feature{ pub const feature_hardFloat = Feature{ .name = "hard-float", + .llvm_name = "hard-float", .description = "Enable floating-point instructions", .dependencies = &[_]*const Feature { }, @@ -170,6 +192,7 @@ pub const feature_hardFloat = Feature{ pub const feature_icbt = Feature{ .name = "icbt", + .llvm_name = "icbt", .description = "Enable icbt instruction", .dependencies = &[_]*const Feature { }, @@ -177,6 +200,7 @@ pub const feature_icbt = Feature{ pub const feature_isaV30Instructions = Feature{ .name = "isa-v30-instructions", + .llvm_name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", .dependencies = &[_]*const Feature { }, @@ -184,6 +208,7 @@ pub const feature_isaV30Instructions = Feature{ pub const feature_isel = Feature{ .name = "isel", + .llvm_name = "isel", .description = "Enable the isel instruction", .dependencies = &[_]*const Feature { }, @@ -191,6 +216,7 @@ pub const feature_isel = Feature{ pub const feature_invariantFunctionDescriptors = Feature{ .name = "invariant-function-descriptors", + .llvm_name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", .dependencies = &[_]*const Feature { }, @@ -198,6 +224,7 @@ pub const feature_invariantFunctionDescriptors = Feature{ pub const feature_ldbrx = Feature{ .name = "ldbrx", + .llvm_name = "ldbrx", .description = "Enable the ldbrx instruction", .dependencies = &[_]*const Feature { }, @@ -205,6 +232,7 @@ pub const feature_ldbrx = Feature{ pub const feature_lfiwax = Feature{ .name = "lfiwax", + .llvm_name = "lfiwax", .description = "Enable the lfiwax instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -213,6 +241,7 @@ pub const feature_lfiwax = Feature{ pub const feature_longcall = Feature{ .name = "longcall", + .llvm_name = "longcall", .description = "Always use indirect calls", .dependencies = &[_]*const Feature { }, @@ -220,6 +249,7 @@ pub const feature_longcall = Feature{ pub const feature_mfocrf = Feature{ .name = "mfocrf", + .llvm_name = "mfocrf", .description = "Enable the MFOCRF instruction", .dependencies = &[_]*const Feature { }, @@ -227,6 +257,7 @@ pub const feature_mfocrf = Feature{ pub const feature_msync = Feature{ .name = "msync", + .llvm_name = "msync", .description = "Has only the msync instruction instead of sync", .dependencies = &[_]*const Feature { &feature_icbt, @@ -235,6 +266,7 @@ pub const feature_msync = Feature{ pub const feature_power8Altivec = Feature{ .name = "power8-altivec", + .llvm_name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -243,6 +275,7 @@ pub const feature_power8Altivec = Feature{ pub const feature_crypto = Feature{ .name = "crypto", + .llvm_name = "crypto", .description = "Enable POWER8 Crypto instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -251,6 +284,7 @@ pub const feature_crypto = Feature{ pub const feature_power8Vector = Feature{ .name = "power8-vector", + .llvm_name = "power8-vector", .description = "Enable POWER8 vector instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -259,24 +293,27 @@ pub const feature_power8Vector = Feature{ pub const feature_power9Altivec = Feature{ .name = "power9-altivec", + .llvm_name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", .dependencies = &[_]*const Feature { - &feature_isaV30Instructions, &feature_hardFloat, + &feature_isaV30Instructions, }, }; pub const feature_power9Vector = Feature{ .name = "power9-vector", + .llvm_name = "power9-vector", .description = "Enable POWER9 vector instructions", .dependencies = &[_]*const Feature { - &feature_isaV30Instructions, &feature_hardFloat, + &feature_isaV30Instructions, }, }; pub const feature_popcntd = Feature{ .name = "popcntd", + .llvm_name = "popcntd", .description = "Enable the popcnt[dw] instructions", .dependencies = &[_]*const Feature { }, @@ -284,6 +321,7 @@ pub const feature_popcntd = Feature{ pub const feature_ppc4xx = Feature{ .name = "ppc4xx", + .llvm_name = "ppc4xx", .description = "Enable PPC 4xx instructions", .dependencies = &[_]*const Feature { }, @@ -291,6 +329,7 @@ pub const feature_ppc4xx = Feature{ pub const feature_ppc6xx = Feature{ .name = "ppc6xx", + .llvm_name = "ppc6xx", .description = "Enable PPC 6xx instructions", .dependencies = &[_]*const Feature { }, @@ -298,6 +337,7 @@ pub const feature_ppc6xx = Feature{ pub const feature_ppcPostraSched = Feature{ .name = "ppc-postra-sched", + .llvm_name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", .dependencies = &[_]*const Feature { }, @@ -305,6 +345,7 @@ pub const feature_ppcPostraSched = Feature{ pub const feature_ppcPreraSched = Feature{ .name = "ppc-prera-sched", + .llvm_name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", .dependencies = &[_]*const Feature { }, @@ -312,6 +353,7 @@ pub const feature_ppcPreraSched = Feature{ pub const feature_partwordAtomics = Feature{ .name = "partword-atomics", + .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", .dependencies = &[_]*const Feature { }, @@ -319,6 +361,7 @@ pub const feature_partwordAtomics = Feature{ pub const feature_qpx = Feature{ .name = "qpx", + .llvm_name = "qpx", .description = "Enable QPX instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -327,6 +370,7 @@ pub const feature_qpx = Feature{ pub const feature_recipprec = Feature{ .name = "recipprec", + .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", .dependencies = &[_]*const Feature { }, @@ -334,6 +378,7 @@ pub const feature_recipprec = Feature{ pub const feature_spe = Feature{ .name = "spe", + .llvm_name = "spe", .description = "Enable SPE instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -342,6 +387,7 @@ pub const feature_spe = Feature{ pub const feature_stfiwx = Feature{ .name = "stfiwx", + .llvm_name = "stfiwx", .description = "Enable the stfiwx instruction", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -350,6 +396,7 @@ pub const feature_stfiwx = Feature{ pub const feature_securePlt = Feature{ .name = "secure-plt", + .llvm_name = "secure-plt", .description = "Enable secure plt mode", .dependencies = &[_]*const Feature { }, @@ -357,6 +404,7 @@ pub const feature_securePlt = Feature{ pub const feature_slowPopcntd = Feature{ .name = "slow-popcntd", + .llvm_name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", .dependencies = &[_]*const Feature { }, @@ -364,6 +412,7 @@ pub const feature_slowPopcntd = Feature{ pub const feature_twoConstNr = Feature{ .name = "two-const-nr", + .llvm_name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", .dependencies = &[_]*const Feature { }, @@ -371,6 +420,7 @@ pub const feature_twoConstNr = Feature{ pub const feature_vsx = Feature{ .name = "vsx", + .llvm_name = "vsx", .description = "Enable VSX instructions", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -379,6 +429,7 @@ pub const feature_vsx = Feature{ pub const feature_vectorsUseTwoUnits = Feature{ .name = "vectors-use-two-units", + .llvm_name = "vectors-use-two-units", .description = "Vectors use two units", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index cbb7ccb9ad0325fcb4cbf2ec2809ae7b9ffca72d..e9b976b004aa78c152efe3751b7e95867e84da9c 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ .name = "64bit", + .llvm_name = "64bit", .description = "Implements RV64", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_bit64 = Feature{ pub const feature_e = Feature{ .name = "e", + .llvm_name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_e = Feature{ pub const feature_rvcHints = Feature{ .name = "rvc-hints", + .llvm_name = "rvc-hints", .description = "Enable RVC Hint Instructions.", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_rvcHints = Feature{ pub const feature_relax = Feature{ .name = "relax", + .llvm_name = "relax", .description = "Enable Linker relaxation.", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_relax = Feature{ pub const feature_a = Feature{ .name = "a", + .llvm_name = "a", .description = "'A' (Atomic Instructions)", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_a = Feature{ pub const feature_c = Feature{ .name = "c", + .llvm_name = "c", .description = "'C' (Compressed Instructions)", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_c = Feature{ pub const feature_d = Feature{ .name = "d", + .llvm_name = "d", .description = "'D' (Double-Precision Floating-Point)", .dependencies = &[_]*const Feature { &feature_f, @@ -53,6 +60,7 @@ pub const feature_d = Feature{ pub const feature_f = Feature{ .name = "f", + .llvm_name = "f", .description = "'F' (Single-Precision Floating-Point)", .dependencies = &[_]*const Feature { }, @@ -60,6 +68,7 @@ pub const feature_f = Feature{ pub const feature_m = Feature{ .name = "m", + .llvm_name = "m", .description = "'M' (Integer Multiplication and Division)", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 7cdeddb976cea4dd18b6ae4b0b013429b6a045e1..5bf844b8705d01d241bedbbb942974dbfb8551ba 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_hardQuadFloat = Feature{ .name = "hard-quad-float", + .llvm_name = "hard-quad-float", .description = "Enable quad-word floating point instructions", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_hardQuadFloat = Feature{ pub const feature_leon = Feature{ .name = "leon", + .llvm_name = "leon", .description = "Enable LEON extensions", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_leon = Feature{ pub const feature_noFmuls = Feature{ .name = "no-fmuls", + .llvm_name = "no-fmuls", .description = "Disable the fmuls instruction.", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_noFmuls = Feature{ pub const feature_noFsmuld = Feature{ .name = "no-fsmuld", + .llvm_name = "no-fsmuld", .description = "Disable the fsmuld instruction.", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_noFsmuld = Feature{ pub const feature_leonpwrpsr = Feature{ .name = "leonpwrpsr", + .llvm_name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_leonpwrpsr = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", + .llvm_name = "soft-float", .description = "Use software emulation for floating point", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_softFloat = Feature{ pub const feature_softMulDiv = Feature{ .name = "soft-mul-div", + .llvm_name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_softMulDiv = Feature{ pub const feature_deprecatedV8 = Feature{ .name = "deprecated-v8", + .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_deprecatedV8 = Feature{ pub const feature_v9 = Feature{ .name = "v9", + .llvm_name = "v9", .description = "Enable SPARC-V9 instructions", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_v9 = Feature{ pub const feature_vis = Feature{ .name = "vis", + .llvm_name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", .dependencies = &[_]*const Feature { }, @@ -73,6 +83,7 @@ pub const feature_vis = Feature{ pub const feature_vis2 = Feature{ .name = "vis2", + .llvm_name = "vis2", .description = "Enable Visual Instruction Set extensions II", .dependencies = &[_]*const Feature { }, @@ -80,6 +91,7 @@ pub const feature_vis2 = Feature{ pub const feature_vis3 = Feature{ .name = "vis3", + .llvm_name = "vis3", .description = "Enable Visual Instruction Set extensions III", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 1f5d64846855472b213a07e43d9752789e165090..56bd80efd1ae0ba9a7219c173283289d714ada76 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_dfpPackedConversion = Feature{ .name = "dfp-packed-conversion", + .llvm_name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_dfpPackedConversion = Feature{ pub const feature_dfpZonedConversion = Feature{ .name = "dfp-zoned-conversion", + .llvm_name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_dfpZonedConversion = Feature{ pub const feature_deflateConversion = Feature{ .name = "deflate-conversion", + .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_deflateConversion = Feature{ pub const feature_distinctOps = Feature{ .name = "distinct-ops", + .llvm_name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_distinctOps = Feature{ pub const feature_enhancedDat2 = Feature{ .name = "enhanced-dat-2", + .llvm_name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_enhancedDat2 = Feature{ pub const feature_enhancedSort = Feature{ .name = "enhanced-sort", + .llvm_name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_enhancedSort = Feature{ pub const feature_executionHint = Feature{ .name = "execution-hint", + .llvm_name = "execution-hint", .description = "Assume that the execution-hint facility is installed", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_executionHint = Feature{ pub const feature_fpExtension = Feature{ .name = "fp-extension", + .llvm_name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_fpExtension = Feature{ pub const feature_fastSerialization = Feature{ .name = "fast-serialization", + .llvm_name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_fastSerialization = Feature{ pub const feature_guardedStorage = Feature{ .name = "guarded-storage", + .llvm_name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", .dependencies = &[_]*const Feature { }, @@ -73,6 +83,7 @@ pub const feature_guardedStorage = Feature{ pub const feature_highWord = Feature{ .name = "high-word", + .llvm_name = "high-word", .description = "Assume that the high-word facility is installed", .dependencies = &[_]*const Feature { }, @@ -80,6 +91,7 @@ pub const feature_highWord = Feature{ pub const feature_insertReferenceBitsMultiple = Feature{ .name = "insert-reference-bits-multiple", + .llvm_name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", .dependencies = &[_]*const Feature { }, @@ -87,6 +99,7 @@ pub const feature_insertReferenceBitsMultiple = Feature{ pub const feature_interlockedAccess1 = Feature{ .name = "interlocked-access1", + .llvm_name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", .dependencies = &[_]*const Feature { }, @@ -94,6 +107,7 @@ pub const feature_interlockedAccess1 = Feature{ pub const feature_loadAndTrap = Feature{ .name = "load-and-trap", + .llvm_name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", .dependencies = &[_]*const Feature { }, @@ -101,6 +115,7 @@ pub const feature_loadAndTrap = Feature{ pub const feature_loadAndZeroRightmostByte = Feature{ .name = "load-and-zero-rightmost-byte", + .llvm_name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", .dependencies = &[_]*const Feature { }, @@ -108,6 +123,7 @@ pub const feature_loadAndZeroRightmostByte = Feature{ pub const feature_loadStoreOnCond = Feature{ .name = "load-store-on-cond", + .llvm_name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", .dependencies = &[_]*const Feature { }, @@ -115,6 +131,7 @@ pub const feature_loadStoreOnCond = Feature{ pub const feature_loadStoreOnCond2 = Feature{ .name = "load-store-on-cond-2", + .llvm_name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", .dependencies = &[_]*const Feature { }, @@ -122,6 +139,7 @@ pub const feature_loadStoreOnCond2 = Feature{ pub const feature_messageSecurityAssistExtension3 = Feature{ .name = "message-security-assist-extension3", + .llvm_name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", .dependencies = &[_]*const Feature { }, @@ -129,6 +147,7 @@ pub const feature_messageSecurityAssistExtension3 = Feature{ pub const feature_messageSecurityAssistExtension4 = Feature{ .name = "message-security-assist-extension4", + .llvm_name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", .dependencies = &[_]*const Feature { }, @@ -136,6 +155,7 @@ pub const feature_messageSecurityAssistExtension4 = Feature{ pub const feature_messageSecurityAssistExtension5 = Feature{ .name = "message-security-assist-extension5", + .llvm_name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", .dependencies = &[_]*const Feature { }, @@ -143,6 +163,7 @@ pub const feature_messageSecurityAssistExtension5 = Feature{ pub const feature_messageSecurityAssistExtension7 = Feature{ .name = "message-security-assist-extension7", + .llvm_name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", .dependencies = &[_]*const Feature { }, @@ -150,6 +171,7 @@ pub const feature_messageSecurityAssistExtension7 = Feature{ pub const feature_messageSecurityAssistExtension8 = Feature{ .name = "message-security-assist-extension8", + .llvm_name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", .dependencies = &[_]*const Feature { }, @@ -157,6 +179,7 @@ pub const feature_messageSecurityAssistExtension8 = Feature{ pub const feature_messageSecurityAssistExtension9 = Feature{ .name = "message-security-assist-extension9", + .llvm_name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", .dependencies = &[_]*const Feature { }, @@ -164,6 +187,7 @@ pub const feature_messageSecurityAssistExtension9 = Feature{ pub const feature_miscellaneousExtensions = Feature{ .name = "miscellaneous-extensions", + .llvm_name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", .dependencies = &[_]*const Feature { }, @@ -171,6 +195,7 @@ pub const feature_miscellaneousExtensions = Feature{ pub const feature_miscellaneousExtensions2 = Feature{ .name = "miscellaneous-extensions-2", + .llvm_name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", .dependencies = &[_]*const Feature { }, @@ -178,6 +203,7 @@ pub const feature_miscellaneousExtensions2 = Feature{ pub const feature_miscellaneousExtensions3 = Feature{ .name = "miscellaneous-extensions-3", + .llvm_name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", .dependencies = &[_]*const Feature { }, @@ -185,6 +211,7 @@ pub const feature_miscellaneousExtensions3 = Feature{ pub const feature_populationCount = Feature{ .name = "population-count", + .llvm_name = "population-count", .description = "Assume that the population-count facility is installed", .dependencies = &[_]*const Feature { }, @@ -192,6 +219,7 @@ pub const feature_populationCount = Feature{ pub const feature_processorAssist = Feature{ .name = "processor-assist", + .llvm_name = "processor-assist", .description = "Assume that the processor-assist facility is installed", .dependencies = &[_]*const Feature { }, @@ -199,6 +227,7 @@ pub const feature_processorAssist = Feature{ pub const feature_resetReferenceBitsMultiple = Feature{ .name = "reset-reference-bits-multiple", + .llvm_name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", .dependencies = &[_]*const Feature { }, @@ -206,6 +235,7 @@ pub const feature_resetReferenceBitsMultiple = Feature{ pub const feature_transactionalExecution = Feature{ .name = "transactional-execution", + .llvm_name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", .dependencies = &[_]*const Feature { }, @@ -213,6 +243,7 @@ pub const feature_transactionalExecution = Feature{ pub const feature_vector = Feature{ .name = "vector", + .llvm_name = "vector", .description = "Assume that the vectory facility is installed", .dependencies = &[_]*const Feature { }, @@ -220,6 +251,7 @@ pub const feature_vector = Feature{ pub const feature_vectorEnhancements1 = Feature{ .name = "vector-enhancements-1", + .llvm_name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", .dependencies = &[_]*const Feature { }, @@ -227,6 +259,7 @@ pub const feature_vectorEnhancements1 = Feature{ pub const feature_vectorEnhancements2 = Feature{ .name = "vector-enhancements-2", + .llvm_name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", .dependencies = &[_]*const Feature { }, @@ -234,6 +267,7 @@ pub const feature_vectorEnhancements2 = Feature{ pub const feature_vectorPackedDecimal = Feature{ .name = "vector-packed-decimal", + .llvm_name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", .dependencies = &[_]*const Feature { }, @@ -241,6 +275,7 @@ pub const feature_vectorPackedDecimal = Feature{ pub const feature_vectorPackedDecimalEnhancement = Feature{ .name = "vector-packed-decimal-enhancement", + .llvm_name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", .dependencies = &[_]*const Feature { }, diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 17d771770898b209ed7054d83373835d027893a1..ae3bfe913800c2dc6beb10b4306c4dd9f556a3f5 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_atomics = Feature{ .name = "atomics", + .llvm_name = "atomics", .description = "Enable Atomics", .dependencies = &[_]*const Feature { }, @@ -10,6 +11,7 @@ pub const feature_atomics = Feature{ pub const feature_bulkMemory = Feature{ .name = "bulk-memory", + .llvm_name = "bulk-memory", .description = "Enable bulk memory operations", .dependencies = &[_]*const Feature { }, @@ -17,6 +19,7 @@ pub const feature_bulkMemory = Feature{ pub const feature_exceptionHandling = Feature{ .name = "exception-handling", + .llvm_name = "exception-handling", .description = "Enable Wasm exception handling", .dependencies = &[_]*const Feature { }, @@ -24,6 +27,7 @@ pub const feature_exceptionHandling = Feature{ pub const feature_multivalue = Feature{ .name = "multivalue", + .llvm_name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", .dependencies = &[_]*const Feature { }, @@ -31,6 +35,7 @@ pub const feature_multivalue = Feature{ pub const feature_mutableGlobals = Feature{ .name = "mutable-globals", + .llvm_name = "mutable-globals", .description = "Enable mutable globals", .dependencies = &[_]*const Feature { }, @@ -38,6 +43,7 @@ pub const feature_mutableGlobals = Feature{ pub const feature_nontrappingFptoint = Feature{ .name = "nontrapping-fptoint", + .llvm_name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", .dependencies = &[_]*const Feature { }, @@ -45,6 +51,7 @@ pub const feature_nontrappingFptoint = Feature{ pub const feature_simd128 = Feature{ .name = "simd128", + .llvm_name = "simd128", .description = "Enable 128-bit SIMD", .dependencies = &[_]*const Feature { }, @@ -52,6 +59,7 @@ pub const feature_simd128 = Feature{ pub const feature_signExt = Feature{ .name = "sign-ext", + .llvm_name = "sign-ext", .description = "Enable sign extension operators", .dependencies = &[_]*const Feature { }, @@ -59,6 +67,7 @@ pub const feature_signExt = Feature{ pub const feature_tailCall = Feature{ .name = "tail-call", + .llvm_name = "tail-call", .description = "Enable tail call instructions", .dependencies = &[_]*const Feature { }, @@ -66,6 +75,7 @@ pub const feature_tailCall = Feature{ pub const feature_unimplementedSimd128 = Feature{ .name = "unimplemented-simd128", + .llvm_name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", .dependencies = &[_]*const Feature { &feature_simd128, diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 573282c664458f912d44d69ef96f1d43bc260116..29062173ab2e2cb4158d450ae780e43c9e15afca 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu; pub const feature_dnow3 = Feature{ .name = "3dnow", + .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", .dependencies = &[_]*const Feature { &feature_mmx, @@ -11,6 +12,7 @@ pub const feature_dnow3 = Feature{ pub const feature_dnowa3 = Feature{ .name = "3dnowa", + .llvm_name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", .dependencies = &[_]*const Feature { &feature_mmx, @@ -19,6 +21,7 @@ pub const feature_dnowa3 = Feature{ pub const feature_bit64 = Feature{ .name = "64bit", + .llvm_name = "64bit", .description = "Support 64-bit instructions", .dependencies = &[_]*const Feature { }, @@ -26,6 +29,7 @@ pub const feature_bit64 = Feature{ pub const feature_adx = Feature{ .name = "adx", + .llvm_name = "adx", .description = "Support ADX instructions", .dependencies = &[_]*const Feature { }, @@ -33,6 +37,7 @@ pub const feature_adx = Feature{ pub const feature_aes = Feature{ .name = "aes", + .llvm_name = "aes", .description = "Enable AES instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -41,6 +46,7 @@ pub const feature_aes = Feature{ pub const feature_avx = Feature{ .name = "avx", + .llvm_name = "avx", .description = "Enable AVX instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -49,6 +55,7 @@ pub const feature_avx = Feature{ pub const feature_avx2 = Feature{ .name = "avx2", + .llvm_name = "avx2", .description = "Enable AVX2 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -57,6 +64,7 @@ pub const feature_avx2 = Feature{ pub const feature_avx512f = Feature{ .name = "avx512f", + .llvm_name = "avx512f", .description = "Enable AVX-512 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -65,6 +73,7 @@ pub const feature_avx512f = Feature{ pub const feature_avx512bf16 = Feature{ .name = "avx512bf16", + .llvm_name = "avx512bf16", .description = "Support bfloat16 floating point", .dependencies = &[_]*const Feature { &feature_sse, @@ -73,6 +82,7 @@ pub const feature_avx512bf16 = Feature{ pub const feature_avx512bitalg = Feature{ .name = "avx512bitalg", + .llvm_name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", .dependencies = &[_]*const Feature { &feature_sse, @@ -81,6 +91,7 @@ pub const feature_avx512bitalg = Feature{ pub const feature_bmi = Feature{ .name = "bmi", + .llvm_name = "bmi", .description = "Support BMI instructions", .dependencies = &[_]*const Feature { }, @@ -88,6 +99,7 @@ pub const feature_bmi = Feature{ pub const feature_bmi2 = Feature{ .name = "bmi2", + .llvm_name = "bmi2", .description = "Support BMI2 instructions", .dependencies = &[_]*const Feature { }, @@ -95,6 +107,7 @@ pub const feature_bmi2 = Feature{ pub const feature_avx512bw = Feature{ .name = "avx512bw", + .llvm_name = "avx512bw", .description = "Enable AVX-512 Byte and Word Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -103,6 +116,7 @@ pub const feature_avx512bw = Feature{ pub const feature_branchfusion = Feature{ .name = "branchfusion", + .llvm_name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", .dependencies = &[_]*const Feature { }, @@ -110,6 +124,7 @@ pub const feature_branchfusion = Feature{ pub const feature_avx512cd = Feature{ .name = "avx512cd", + .llvm_name = "avx512cd", .description = "Enable AVX-512 Conflict Detection Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -118,6 +133,7 @@ pub const feature_avx512cd = Feature{ pub const feature_cldemote = Feature{ .name = "cldemote", + .llvm_name = "cldemote", .description = "Enable Cache Demote", .dependencies = &[_]*const Feature { }, @@ -125,6 +141,7 @@ pub const feature_cldemote = Feature{ pub const feature_clflushopt = Feature{ .name = "clflushopt", + .llvm_name = "clflushopt", .description = "Flush A Cache Line Optimized", .dependencies = &[_]*const Feature { }, @@ -132,6 +149,7 @@ pub const feature_clflushopt = Feature{ pub const feature_clwb = Feature{ .name = "clwb", + .llvm_name = "clwb", .description = "Cache Line Write Back", .dependencies = &[_]*const Feature { }, @@ -139,6 +157,7 @@ pub const feature_clwb = Feature{ pub const feature_clzero = Feature{ .name = "clzero", + .llvm_name = "clzero", .description = "Enable Cache Line Zero", .dependencies = &[_]*const Feature { }, @@ -146,6 +165,7 @@ pub const feature_clzero = Feature{ pub const feature_cmov = Feature{ .name = "cmov", + .llvm_name = "cmov", .description = "Enable conditional move instructions", .dependencies = &[_]*const Feature { }, @@ -153,6 +173,7 @@ pub const feature_cmov = Feature{ pub const feature_cx8 = Feature{ .name = "cx8", + .llvm_name = "cx8", .description = "Support CMPXCHG8B instructions", .dependencies = &[_]*const Feature { }, @@ -160,6 +181,7 @@ pub const feature_cx8 = Feature{ pub const feature_cx16 = Feature{ .name = "cx16", + .llvm_name = "cx16", .description = "64-bit with cmpxchg16b", .dependencies = &[_]*const Feature { &feature_cx8, @@ -168,6 +190,7 @@ pub const feature_cx16 = Feature{ pub const feature_avx512dq = Feature{ .name = "avx512dq", + .llvm_name = "avx512dq", .description = "Enable AVX-512 Doubleword and Quadword Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -176,6 +199,7 @@ pub const feature_avx512dq = Feature{ pub const feature_mpx = Feature{ .name = "mpx", + .llvm_name = "mpx", .description = "Deprecated. Support MPX instructions", .dependencies = &[_]*const Feature { }, @@ -183,6 +207,7 @@ pub const feature_mpx = Feature{ pub const feature_enqcmd = Feature{ .name = "enqcmd", + .llvm_name = "enqcmd", .description = "Has ENQCMD instructions", .dependencies = &[_]*const Feature { }, @@ -190,6 +215,7 @@ pub const feature_enqcmd = Feature{ pub const feature_avx512er = Feature{ .name = "avx512er", + .llvm_name = "avx512er", .description = "Enable AVX-512 Exponential and Reciprocal Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -198,6 +224,7 @@ pub const feature_avx512er = Feature{ pub const feature_ermsb = Feature{ .name = "ermsb", + .llvm_name = "ermsb", .description = "REP MOVS/STOS are fast", .dependencies = &[_]*const Feature { }, @@ -205,6 +232,7 @@ pub const feature_ermsb = Feature{ pub const feature_f16c = Feature{ .name = "f16c", + .llvm_name = "f16c", .description = "Support 16-bit floating point conversion instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -213,6 +241,7 @@ pub const feature_f16c = Feature{ pub const feature_fma = Feature{ .name = "fma", + .llvm_name = "fma", .description = "Enable three-operand fused multiple-add", .dependencies = &[_]*const Feature { &feature_sse, @@ -221,6 +250,7 @@ pub const feature_fma = Feature{ pub const feature_fma4 = Feature{ .name = "fma4", + .llvm_name = "fma4", .description = "Enable four-operand fused multiple-add", .dependencies = &[_]*const Feature { &feature_sse, @@ -229,6 +259,7 @@ pub const feature_fma4 = Feature{ pub const feature_fsgsbase = Feature{ .name = "fsgsbase", + .llvm_name = "fsgsbase", .description = "Support FS/GS Base instructions", .dependencies = &[_]*const Feature { }, @@ -236,6 +267,7 @@ pub const feature_fsgsbase = Feature{ pub const feature_fxsr = Feature{ .name = "fxsr", + .llvm_name = "fxsr", .description = "Support fxsave/fxrestore instructions", .dependencies = &[_]*const Feature { }, @@ -243,6 +275,7 @@ pub const feature_fxsr = Feature{ pub const feature_fast11bytenop = Feature{ .name = "fast-11bytenop", + .llvm_name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", .dependencies = &[_]*const Feature { }, @@ -250,6 +283,7 @@ pub const feature_fast11bytenop = Feature{ pub const feature_fast15bytenop = Feature{ .name = "fast-15bytenop", + .llvm_name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", .dependencies = &[_]*const Feature { }, @@ -257,6 +291,7 @@ pub const feature_fast15bytenop = Feature{ pub const feature_fastBextr = Feature{ .name = "fast-bextr", + .llvm_name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", .dependencies = &[_]*const Feature { }, @@ -264,6 +299,7 @@ pub const feature_fastBextr = Feature{ pub const feature_fastHops = Feature{ .name = "fast-hops", + .llvm_name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", .dependencies = &[_]*const Feature { &feature_sse, @@ -272,6 +308,7 @@ pub const feature_fastHops = Feature{ pub const feature_fastLzcnt = Feature{ .name = "fast-lzcnt", + .llvm_name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", .dependencies = &[_]*const Feature { }, @@ -279,6 +316,7 @@ pub const feature_fastLzcnt = Feature{ pub const feature_fastPartialYmmOrZmmWrite = Feature{ .name = "fast-partial-ymm-or-zmm-write", + .llvm_name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", .dependencies = &[_]*const Feature { }, @@ -286,6 +324,7 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{ pub const feature_fastShldRotate = Feature{ .name = "fast-shld-rotate", + .llvm_name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", .dependencies = &[_]*const Feature { }, @@ -293,6 +332,7 @@ pub const feature_fastShldRotate = Feature{ pub const feature_fastScalarFsqrt = Feature{ .name = "fast-scalar-fsqrt", + .llvm_name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", .dependencies = &[_]*const Feature { }, @@ -300,6 +340,7 @@ pub const feature_fastScalarFsqrt = Feature{ pub const feature_fastScalarShiftMasks = Feature{ .name = "fast-scalar-shift-masks", + .llvm_name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", .dependencies = &[_]*const Feature { }, @@ -307,6 +348,7 @@ pub const feature_fastScalarShiftMasks = Feature{ pub const feature_fastVariableShuffle = Feature{ .name = "fast-variable-shuffle", + .llvm_name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", .dependencies = &[_]*const Feature { }, @@ -314,6 +356,7 @@ pub const feature_fastVariableShuffle = Feature{ pub const feature_fastVectorFsqrt = Feature{ .name = "fast-vector-fsqrt", + .llvm_name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", .dependencies = &[_]*const Feature { }, @@ -321,6 +364,7 @@ pub const feature_fastVectorFsqrt = Feature{ pub const feature_fastVectorShiftMasks = Feature{ .name = "fast-vector-shift-masks", + .llvm_name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", .dependencies = &[_]*const Feature { }, @@ -328,6 +372,7 @@ pub const feature_fastVectorShiftMasks = Feature{ pub const feature_gfni = Feature{ .name = "gfni", + .llvm_name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -336,6 +381,7 @@ pub const feature_gfni = Feature{ pub const feature_fastGather = Feature{ .name = "fast-gather", + .llvm_name = "fast-gather", .description = "Indicates if gather is reasonably fast", .dependencies = &[_]*const Feature { }, @@ -343,6 +389,7 @@ pub const feature_fastGather = Feature{ pub const feature_avx512ifma = Feature{ .name = "avx512ifma", + .llvm_name = "avx512ifma", .description = "Enable AVX-512 Integer Fused Multiple-Add", .dependencies = &[_]*const Feature { &feature_sse, @@ -351,6 +398,7 @@ pub const feature_avx512ifma = Feature{ pub const feature_invpcid = Feature{ .name = "invpcid", + .llvm_name = "invpcid", .description = "Invalidate Process-Context Identifier", .dependencies = &[_]*const Feature { }, @@ -358,6 +406,7 @@ pub const feature_invpcid = Feature{ pub const feature_sahf = Feature{ .name = "sahf", + .llvm_name = "sahf", .description = "Support LAHF and SAHF instructions", .dependencies = &[_]*const Feature { }, @@ -365,6 +414,7 @@ pub const feature_sahf = Feature{ pub const feature_leaSp = Feature{ .name = "lea-sp", + .llvm_name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", .dependencies = &[_]*const Feature { }, @@ -372,6 +422,7 @@ pub const feature_leaSp = Feature{ pub const feature_leaUsesAg = Feature{ .name = "lea-uses-ag", + .llvm_name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", .dependencies = &[_]*const Feature { }, @@ -379,6 +430,7 @@ pub const feature_leaUsesAg = Feature{ pub const feature_lwp = Feature{ .name = "lwp", + .llvm_name = "lwp", .description = "Enable LWP instructions", .dependencies = &[_]*const Feature { }, @@ -386,6 +438,7 @@ pub const feature_lwp = Feature{ pub const feature_lzcnt = Feature{ .name = "lzcnt", + .llvm_name = "lzcnt", .description = "Support LZCNT instruction", .dependencies = &[_]*const Feature { }, @@ -393,6 +446,7 @@ pub const feature_lzcnt = Feature{ pub const feature_falseDepsLzcntTzcnt = Feature{ .name = "false-deps-lzcnt-tzcnt", + .llvm_name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", .dependencies = &[_]*const Feature { }, @@ -400,6 +454,7 @@ pub const feature_falseDepsLzcntTzcnt = Feature{ pub const feature_mmx = Feature{ .name = "mmx", + .llvm_name = "mmx", .description = "Enable MMX instructions", .dependencies = &[_]*const Feature { }, @@ -407,6 +462,7 @@ pub const feature_mmx = Feature{ pub const feature_movbe = Feature{ .name = "movbe", + .llvm_name = "movbe", .description = "Support MOVBE instruction", .dependencies = &[_]*const Feature { }, @@ -414,6 +470,7 @@ pub const feature_movbe = Feature{ pub const feature_movdir64b = Feature{ .name = "movdir64b", + .llvm_name = "movdir64b", .description = "Support movdir64b instruction", .dependencies = &[_]*const Feature { }, @@ -421,6 +478,7 @@ pub const feature_movdir64b = Feature{ pub const feature_movdiri = Feature{ .name = "movdiri", + .llvm_name = "movdiri", .description = "Support movdiri instruction", .dependencies = &[_]*const Feature { }, @@ -428,6 +486,7 @@ pub const feature_movdiri = Feature{ pub const feature_mwaitx = Feature{ .name = "mwaitx", + .llvm_name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", .dependencies = &[_]*const Feature { }, @@ -435,6 +494,7 @@ pub const feature_mwaitx = Feature{ pub const feature_macrofusion = Feature{ .name = "macrofusion", + .llvm_name = "macrofusion", .description = "Various instructions can be fused with conditional branches", .dependencies = &[_]*const Feature { }, @@ -442,6 +502,7 @@ pub const feature_macrofusion = Feature{ pub const feature_mergeToThreewayBranch = Feature{ .name = "merge-to-threeway-branch", + .llvm_name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", .dependencies = &[_]*const Feature { }, @@ -449,6 +510,7 @@ pub const feature_mergeToThreewayBranch = Feature{ pub const feature_nopl = Feature{ .name = "nopl", + .llvm_name = "nopl", .description = "Enable NOPL instruction", .dependencies = &[_]*const Feature { }, @@ -456,6 +518,7 @@ pub const feature_nopl = Feature{ pub const feature_pclmul = Feature{ .name = "pclmul", + .llvm_name = "pclmul", .description = "Enable packed carry-less multiplication instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -464,6 +527,7 @@ pub const feature_pclmul = Feature{ pub const feature_pconfig = Feature{ .name = "pconfig", + .llvm_name = "pconfig", .description = "platform configuration instruction", .dependencies = &[_]*const Feature { }, @@ -471,6 +535,7 @@ pub const feature_pconfig = Feature{ pub const feature_avx512pf = Feature{ .name = "avx512pf", + .llvm_name = "avx512pf", .description = "Enable AVX-512 PreFetch Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -479,6 +544,7 @@ pub const feature_avx512pf = Feature{ pub const feature_pku = Feature{ .name = "pku", + .llvm_name = "pku", .description = "Enable protection keys", .dependencies = &[_]*const Feature { }, @@ -486,6 +552,7 @@ pub const feature_pku = Feature{ pub const feature_popcnt = Feature{ .name = "popcnt", + .llvm_name = "popcnt", .description = "Support POPCNT instruction", .dependencies = &[_]*const Feature { }, @@ -493,6 +560,7 @@ pub const feature_popcnt = Feature{ pub const feature_falseDepsPopcnt = Feature{ .name = "false-deps-popcnt", + .llvm_name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", .dependencies = &[_]*const Feature { }, @@ -500,6 +568,7 @@ pub const feature_falseDepsPopcnt = Feature{ pub const feature_prefetchwt1 = Feature{ .name = "prefetchwt1", + .llvm_name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", .dependencies = &[_]*const Feature { }, @@ -507,6 +576,7 @@ pub const feature_prefetchwt1 = Feature{ pub const feature_prfchw = Feature{ .name = "prfchw", + .llvm_name = "prfchw", .description = "Support PRFCHW instructions", .dependencies = &[_]*const Feature { }, @@ -514,6 +584,7 @@ pub const feature_prfchw = Feature{ pub const feature_ptwrite = Feature{ .name = "ptwrite", + .llvm_name = "ptwrite", .description = "Support ptwrite instruction", .dependencies = &[_]*const Feature { }, @@ -521,6 +592,7 @@ pub const feature_ptwrite = Feature{ pub const feature_padShortFunctions = Feature{ .name = "pad-short-functions", + .llvm_name = "pad-short-functions", .description = "Pad short functions", .dependencies = &[_]*const Feature { }, @@ -528,6 +600,7 @@ pub const feature_padShortFunctions = Feature{ pub const feature_prefer128Bit = Feature{ .name = "prefer-128-bit", + .llvm_name = "prefer-128-bit", .description = "Prefer 128-bit AVX instructions", .dependencies = &[_]*const Feature { }, @@ -535,6 +608,7 @@ pub const feature_prefer128Bit = Feature{ pub const feature_prefer256Bit = Feature{ .name = "prefer-256-bit", + .llvm_name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", .dependencies = &[_]*const Feature { }, @@ -542,6 +616,7 @@ pub const feature_prefer256Bit = Feature{ pub const feature_rdpid = Feature{ .name = "rdpid", + .llvm_name = "rdpid", .description = "Support RDPID instructions", .dependencies = &[_]*const Feature { }, @@ -549,6 +624,7 @@ pub const feature_rdpid = Feature{ pub const feature_rdrnd = Feature{ .name = "rdrnd", + .llvm_name = "rdrnd", .description = "Support RDRAND instruction", .dependencies = &[_]*const Feature { }, @@ -556,6 +632,7 @@ pub const feature_rdrnd = Feature{ pub const feature_rdseed = Feature{ .name = "rdseed", + .llvm_name = "rdseed", .description = "Support RDSEED instruction", .dependencies = &[_]*const Feature { }, @@ -563,6 +640,7 @@ pub const feature_rdseed = Feature{ pub const feature_rtm = Feature{ .name = "rtm", + .llvm_name = "rtm", .description = "Support RTM instructions", .dependencies = &[_]*const Feature { }, @@ -570,6 +648,7 @@ pub const feature_rtm = Feature{ pub const feature_retpoline = Feature{ .name = "retpoline", + .llvm_name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", .dependencies = &[_]*const Feature { &feature_retpolineIndirectCalls, @@ -579,6 +658,7 @@ pub const feature_retpoline = Feature{ pub const feature_retpolineExternalThunk = Feature{ .name = "retpoline-external-thunk", + .llvm_name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", .dependencies = &[_]*const Feature { &feature_retpolineIndirectCalls, @@ -587,6 +667,7 @@ pub const feature_retpolineExternalThunk = Feature{ pub const feature_retpolineIndirectBranches = Feature{ .name = "retpoline-indirect-branches", + .llvm_name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", .dependencies = &[_]*const Feature { }, @@ -594,6 +675,7 @@ pub const feature_retpolineIndirectBranches = Feature{ pub const feature_retpolineIndirectCalls = Feature{ .name = "retpoline-indirect-calls", + .llvm_name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", .dependencies = &[_]*const Feature { }, @@ -601,6 +683,7 @@ pub const feature_retpolineIndirectCalls = Feature{ pub const feature_sgx = Feature{ .name = "sgx", + .llvm_name = "sgx", .description = "Enable Software Guard Extensions", .dependencies = &[_]*const Feature { }, @@ -608,6 +691,7 @@ pub const feature_sgx = Feature{ pub const feature_sha = Feature{ .name = "sha", + .llvm_name = "sha", .description = "Enable SHA instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -616,6 +700,7 @@ pub const feature_sha = Feature{ pub const feature_shstk = Feature{ .name = "shstk", + .llvm_name = "shstk", .description = "Support CET Shadow-Stack instructions", .dependencies = &[_]*const Feature { }, @@ -623,6 +708,7 @@ pub const feature_shstk = Feature{ pub const feature_sse = Feature{ .name = "sse", + .llvm_name = "sse", .description = "Enable SSE instructions", .dependencies = &[_]*const Feature { }, @@ -630,6 +716,7 @@ pub const feature_sse = Feature{ pub const feature_sse2 = Feature{ .name = "sse2", + .llvm_name = "sse2", .description = "Enable SSE2 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -638,6 +725,7 @@ pub const feature_sse2 = Feature{ pub const feature_sse3 = Feature{ .name = "sse3", + .llvm_name = "sse3", .description = "Enable SSE3 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -646,6 +734,7 @@ pub const feature_sse3 = Feature{ pub const feature_sse4a = Feature{ .name = "sse4a", + .llvm_name = "sse4a", .description = "Support SSE 4a instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -654,6 +743,7 @@ pub const feature_sse4a = Feature{ pub const feature_sse41 = Feature{ .name = "sse4.1", + .llvm_name = "sse4.1", .description = "Enable SSE 4.1 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -662,6 +752,7 @@ pub const feature_sse41 = Feature{ pub const feature_sse42 = Feature{ .name = "sse4.2", + .llvm_name = "sse4.2", .description = "Enable SSE 4.2 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -670,6 +761,7 @@ pub const feature_sse42 = Feature{ pub const feature_sseUnalignedMem = Feature{ .name = "sse-unaligned-mem", + .llvm_name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", .dependencies = &[_]*const Feature { }, @@ -677,6 +769,7 @@ pub const feature_sseUnalignedMem = Feature{ pub const feature_ssse3 = Feature{ .name = "ssse3", + .llvm_name = "ssse3", .description = "Enable SSSE3 instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -685,6 +778,7 @@ pub const feature_ssse3 = Feature{ pub const feature_slow3opsLea = Feature{ .name = "slow-3ops-lea", + .llvm_name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", .dependencies = &[_]*const Feature { }, @@ -692,6 +786,7 @@ pub const feature_slow3opsLea = Feature{ pub const feature_idivlToDivb = Feature{ .name = "idivl-to-divb", + .llvm_name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", .dependencies = &[_]*const Feature { }, @@ -699,6 +794,7 @@ pub const feature_idivlToDivb = Feature{ pub const feature_idivqToDivl = Feature{ .name = "idivq-to-divl", + .llvm_name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", .dependencies = &[_]*const Feature { }, @@ -706,6 +802,7 @@ pub const feature_idivqToDivl = Feature{ pub const feature_slowIncdec = Feature{ .name = "slow-incdec", + .llvm_name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", .dependencies = &[_]*const Feature { }, @@ -713,6 +810,7 @@ pub const feature_slowIncdec = Feature{ pub const feature_slowLea = Feature{ .name = "slow-lea", + .llvm_name = "slow-lea", .description = "LEA instruction with certain arguments is slow", .dependencies = &[_]*const Feature { }, @@ -720,6 +818,7 @@ pub const feature_slowLea = Feature{ pub const feature_slowPmaddwd = Feature{ .name = "slow-pmaddwd", + .llvm_name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", .dependencies = &[_]*const Feature { }, @@ -727,6 +826,7 @@ pub const feature_slowPmaddwd = Feature{ pub const feature_slowPmulld = Feature{ .name = "slow-pmulld", + .llvm_name = "slow-pmulld", .description = "PMULLD instruction is slow", .dependencies = &[_]*const Feature { }, @@ -734,6 +834,7 @@ pub const feature_slowPmulld = Feature{ pub const feature_slowShld = Feature{ .name = "slow-shld", + .llvm_name = "slow-shld", .description = "SHLD instruction is slow", .dependencies = &[_]*const Feature { }, @@ -741,6 +842,7 @@ pub const feature_slowShld = Feature{ pub const feature_slowTwoMemOps = Feature{ .name = "slow-two-mem-ops", + .llvm_name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", .dependencies = &[_]*const Feature { }, @@ -748,6 +850,7 @@ pub const feature_slowTwoMemOps = Feature{ pub const feature_slowUnalignedMem16 = Feature{ .name = "slow-unaligned-mem-16", + .llvm_name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", .dependencies = &[_]*const Feature { }, @@ -755,6 +858,7 @@ pub const feature_slowUnalignedMem16 = Feature{ pub const feature_slowUnalignedMem32 = Feature{ .name = "slow-unaligned-mem-32", + .llvm_name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", .dependencies = &[_]*const Feature { }, @@ -762,6 +866,7 @@ pub const feature_slowUnalignedMem32 = Feature{ pub const feature_softFloat = Feature{ .name = "soft-float", + .llvm_name = "soft-float", .description = "Use software floating point features", .dependencies = &[_]*const Feature { }, @@ -769,6 +874,7 @@ pub const feature_softFloat = Feature{ pub const feature_tbm = Feature{ .name = "tbm", + .llvm_name = "tbm", .description = "Enable TBM instructions", .dependencies = &[_]*const Feature { }, @@ -776,6 +882,7 @@ pub const feature_tbm = Feature{ pub const feature_useAa = Feature{ .name = "use-aa", + .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { }, @@ -783,6 +890,7 @@ pub const feature_useAa = Feature{ pub const feature_vaes = Feature{ .name = "vaes", + .llvm_name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", .dependencies = &[_]*const Feature { &feature_sse, @@ -791,6 +899,7 @@ pub const feature_vaes = Feature{ pub const feature_avx512vbmi = Feature{ .name = "avx512vbmi", + .llvm_name = "avx512vbmi", .description = "Enable AVX-512 Vector Byte Manipulation Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -799,6 +908,7 @@ pub const feature_avx512vbmi = Feature{ pub const feature_avx512vbmi2 = Feature{ .name = "avx512vbmi2", + .llvm_name = "avx512vbmi2", .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -807,6 +917,7 @@ pub const feature_avx512vbmi2 = Feature{ pub const feature_avx512vl = Feature{ .name = "avx512vl", + .llvm_name = "avx512vl", .description = "Enable AVX-512 Vector Length eXtensions", .dependencies = &[_]*const Feature { &feature_sse, @@ -815,6 +926,7 @@ pub const feature_avx512vl = Feature{ pub const feature_avx512vnni = Feature{ .name = "avx512vnni", + .llvm_name = "avx512vnni", .description = "Enable AVX-512 Vector Neural Network Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -823,6 +935,7 @@ pub const feature_avx512vnni = Feature{ pub const feature_avx512vp2intersect = Feature{ .name = "avx512vp2intersect", + .llvm_name = "avx512vp2intersect", .description = "Enable AVX-512 vp2intersect", .dependencies = &[_]*const Feature { &feature_sse, @@ -831,6 +944,7 @@ pub const feature_avx512vp2intersect = Feature{ pub const feature_vpclmulqdq = Feature{ .name = "vpclmulqdq", + .llvm_name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -839,6 +953,7 @@ pub const feature_vpclmulqdq = Feature{ pub const feature_avx512vpopcntdq = Feature{ .name = "avx512vpopcntdq", + .llvm_name = "avx512vpopcntdq", .description = "Enable AVX-512 Population Count Instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -847,6 +962,7 @@ pub const feature_avx512vpopcntdq = Feature{ pub const feature_waitpkg = Feature{ .name = "waitpkg", + .llvm_name = "waitpkg", .description = "Wait and pause enhancements", .dependencies = &[_]*const Feature { }, @@ -854,6 +970,7 @@ pub const feature_waitpkg = Feature{ pub const feature_wbnoinvd = Feature{ .name = "wbnoinvd", + .llvm_name = "wbnoinvd", .description = "Write Back No Invalidate", .dependencies = &[_]*const Feature { }, @@ -861,6 +978,7 @@ pub const feature_wbnoinvd = Feature{ pub const feature_x87 = Feature{ .name = "x87", + .llvm_name = "x87", .description = "Enable X87 float instructions", .dependencies = &[_]*const Feature { }, @@ -868,6 +986,7 @@ pub const feature_x87 = Feature{ pub const feature_xop = Feature{ .name = "xop", + .llvm_name = "xop", .description = "Enable XOP instructions", .dependencies = &[_]*const Feature { &feature_sse, @@ -876,6 +995,7 @@ pub const feature_xop = Feature{ pub const feature_xsave = Feature{ .name = "xsave", + .llvm_name = "xsave", .description = "Support xsave instructions", .dependencies = &[_]*const Feature { }, @@ -883,6 +1003,7 @@ pub const feature_xsave = Feature{ pub const feature_xsavec = Feature{ .name = "xsavec", + .llvm_name = "xsavec", .description = "Support xsavec instructions", .dependencies = &[_]*const Feature { }, @@ -890,6 +1011,7 @@ pub const feature_xsavec = Feature{ pub const feature_xsaveopt = Feature{ .name = "xsaveopt", + .llvm_name = "xsaveopt", .description = "Support xsaveopt instructions", .dependencies = &[_]*const Feature { }, @@ -897,6 +1019,7 @@ pub const feature_xsaveopt = Feature{ pub const feature_xsaves = Feature{ .name = "xsaves", + .llvm_name = "xsaves", .description = "Support xsaves instructions", .dependencies = &[_]*const Feature { }, @@ -904,6 +1027,7 @@ pub const feature_xsaves = Feature{ pub const feature_bitMode16 = Feature{ .name = "16bit-mode", + .llvm_name = "16bit-mode", .description = "16-bit mode (i8086)", .dependencies = &[_]*const Feature { }, @@ -911,6 +1035,7 @@ pub const feature_bitMode16 = Feature{ pub const feature_bitMode32 = Feature{ .name = "32bit-mode", + .llvm_name = "32bit-mode", .description = "32-bit mode (80386)", .dependencies = &[_]*const Feature { }, @@ -918,6 +1043,7 @@ pub const feature_bitMode32 = Feature{ pub const feature_bitMode64 = Feature{ .name = "64bit-mode", + .llvm_name = "64bit-mode", .description = "64-bit mode (x86_64)", .dependencies = &[_]*const Feature { }, -- 2.54.0 From c61856ebcf54a55f1c17a5fd6a3b3300115b2c65 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 8 Jan 2020 20:27:36 -0500 Subject: [PATCH 15/63] Add TargetDetails abstraction --- lib/std/build.zig | 42 +++---- lib/std/target.zig | 6 + src-self-hosted/stage1.zig | 223 +++++++++++++++++++++++-------------- src/all_types.hpp | 3 +- src/codegen.cpp | 23 ++-- src/main.cpp | 25 ++++- src/userland.cpp | 16 ++- src/userland.h | 17 ++- 8 files changed, 227 insertions(+), 128 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index 65c5a6f0640bcce1618e49abcbec0f04efba25b6..72fb173ac9b98c1a5a3f75fa88fd6711f72cb9fe 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1199,8 +1199,7 @@ pub const LibExeObjStep = struct { subsystem: ?builtin.SubSystem = null, - cpu: ?[]const u8 = null, - features: ?[]const u8 = null, + target_details: ?std.target.TargetDetails = null, const LinkObject = union(enum) { StaticPath: []const u8, @@ -1387,21 +1386,8 @@ pub const LibExeObjStep = struct { self.computeOutFileNames(); } - pub fn setCpu(self: *LibExeObjStep, cpu: *const std.target.Cpu) void { - self.cpu = cpu.name; - } - - pub fn setFeatures(self: *LibExeObjStep, features: []*const std.target.Feature) void { - var features_str_buffer = std.Buffer.init(self.builder.allocator, "") catch unreachable; - defer features_str_buffer.deinit(); - - for (features) |feature| { - features_str_buffer.append("+") catch unreachable; - features_str_buffer.append(feature.name) catch unreachable; - features_str_buffer.append(",") catch unreachable; - } - - self.features = features_str_buffer.toOwnedSlice(); + pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void { + self.target_details = target_details; } pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void { @@ -1994,14 +1980,20 @@ pub const LibExeObjStep = struct { }, } - if (self.cpu) |cpu| { - try zig_args.append("--cpu"); - try zig_args.append(cpu); - } - - if (self.features) |features| { - try zig_args.append("--features"); - try zig_args.append(features); + if (self.target_details) |td| { + switch (td) { + .cpu => |cpu| { + try zig_args.append("--cpu"); + try zig_args.append(cpu.name); + }, + .features => |features| { + try zig_args.append("--features"); + for (features) |feature| { + try zig_args.append(feature.name); + try zig_args.append(","); + } + }, + } } if (self.target_glibc) |ver| { diff --git a/lib/std/target.zig b/lib/std/target.zig index 8a86af6733e27a2025864404acd051b313501e2f..9bb4936f1116ffdfbf85e6f8e1dbff42c10a57a0 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -860,6 +860,7 @@ pub const x86 = @import("target/x86.zig"); pub const Feature = struct { name: []const u8, + llvm_name: []const u8, description: []const u8, dependencies: []*const Feature, @@ -872,6 +873,11 @@ pub const Cpu = struct { dependencies: []*const Feature, }; +pub const TargetDetails = union(enum) { + cpu: *const Cpu, + features: []*const Feature, +}; + pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature { return switch (arch) { .arm, .armeb, .thumb, .thumbeb => arm.features, diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 8734b37a02e2752b98e9b93fac6d79bb2eedcfc4..4fdfb05df814b5ffdcf8cb57021d24fe7abe3c32 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -530,13 +530,13 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz } // ABI warning -export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { - printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { +export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { + printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); }; } -fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void { +fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { @@ -565,22 +565,22 @@ fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void { try stdout_stream.print(" - {}\n", .{ feature.description }); - if (show_subfeatures and feature.subfeatures.len > 0) { - for (feature.subfeatures) |subfeature| { - try stdout_stream.print(" {}\n", .{ subfeature.name }); + if (show_dependencies and feature.dependencies.len > 0) { + for (feature.dependencies) |dependency| { + try stdout_stream.print(" {}\n", .{ dependency.name }); } } } } // ABI warning -export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void { - printCpusForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| { +export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { + printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); }; } -fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void { +fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { @@ -609,99 +609,158 @@ fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void { try stdout_stream.write("\n"); - if (show_subfeatures and cpu.subfeatures.len > 0) { - for (cpu.subfeatures) |subfeature| { - try stdout_stream.print(" {}\n", .{ subfeature.name }); + if (show_dependencies and cpu.dependencies.len > 0) { + for (cpu.dependencies) |dependency| { + try stdout_stream.print(" {}\n", .{ dependency.name }); } } } } -// use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'. -// ABI warning -export fn stage2_validate_cpu_and_features( - arch_name: [*:0]const u8, - cpu: ?[*:0]const u8, - features: ?[*:0]const u8, -) bool { - const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_name)) catch { - std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); - return false; - }; - - const res = validateCpuAndFeatures( - arch, - if (cpu) |def_cpu| std.mem.toSliceConst(u8, def_cpu) else "", - if (features) |def_features| std.mem.toSliceConst(u8, def_features) else ""); - - switch (res) { - .Ok => return true, - .InvalidCpu => |invalid_cpu| { - std.debug.warn("Invalid CPU '{}'\n", .{ invalid_cpu }); - return false; - }, - .InvalidFeaturesString => { - std.debug.warn("Invalid features string\n", .{}); - std.debug.warn("Must have format \"+yes_feature,-no_feature\"\n", .{}); - return false; - }, - .InvalidFeature => |invalid_feature| { - std.debug.warn("Invalid feature '{}'\n", .{ invalid_feature }); - return false; - } - } -} - -const ValidateCpuAndFeaturesResult = union(enum) { - Ok, - InvalidCpu: []const u8, - InvalidFeaturesString, - InvalidFeature: []const u8, +const Stage2TargetDetails = struct { + allocator: *std.mem.Allocator, + target_details: std.target.TargetDetails, + + llvm_cpu_str: [:0]const u8, + llvm_features_str: [:0]const u8, }; -fn validateCpuAndFeatures(arch: @TagType(std.Target.Arch), cpu: []const u8, features: []const u8) ValidateCpuAndFeaturesResult { +// ABI warning +export fn stage2_target_details_parse_cpu(arch_str: ?[*:0]const u8, cpu_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (cpu_str == null) return null; + if (arch_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch { + return null; + }; + return parseCpu(arch, std.mem.toSliceConst(u8, cpu_str.?)) catch |err| { + switch (err) { + error.OutOfMemory => @panic("out of memory"), + else => return null, + } + }; +} + +// ABI warning +export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, features_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (features_str == null) return null; + if (arch_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; + return parseFeatures(arch, std.mem.toSliceConst(u8, features_str.?)) catch |err| { + switch (err) { + error.OutOfMemory => @panic("out of memory"), + else => return null, + } + }; +} + +fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { + const cpus = std.target.getCpusForArch(arch); + + for (cpus) |cpu| { + if (std.mem.eql(u8, str, cpu.name)) { + const allocator = std.heap.c_allocator; + + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = .{ + .allocator = allocator, + .target_details = .{ + .cpu = cpu, + }, + .llvm_cpu_str = cpu.name, + .llvm_features_str = "", + }; + + return ptr; + } + } + + return error.InvalidCpu; +} + +fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { + const allocator = std.heap.c_allocator; - const known_cpus = std.target.getCpusForArch(arch); const known_features = std.target.getFeaturesForArch(arch); - - if (cpu.len > 0) { - var found_cpu = false; - for (known_cpus) |known_cpu| { - if (std.mem.eql(u8, cpu, known_cpu.name)) { - found_cpu = true; + + var features = std.ArrayList(*const std.target.Feature).init(allocator); + defer features.deinit(); + + var start: usize = 0; + while (start < str.len) { + const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start; + const feature_str = std.mem.trim(u8, str[start..start+next_comma_pos], " "); + + start += next_comma_pos + 1; + + if (feature_str.len == 0) continue; + + var feature: ?*const std.target.Feature = null; + for (known_features) |known_feature| { + if (std.mem.eql(u8, feature_str, known_feature.name)) { + feature = known_feature; break; } } - if (!found_cpu) { - return .{ .InvalidCpu = cpu }; + if (feature) |f| { + features.append(f) catch @panic("out of memory"); + } else { + return error.InvalidFeature; } } + + const features_slice = features.toOwnedSlice(); - if (features.len > 0) { - var start: usize = 0; - while (start < features.len) { - const next_comma_pos = std.mem.indexOfScalar(u8, features[start..], ',') orelse features.len - start; - var feature = features[start..start+next_comma_pos]; + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); - if (feature.len < 2) return .{ .InvalidFeaturesString = {} }; - - if (feature[0] != '+' and feature[0] != '-') return .{ .InvalidFeaturesString = {} }; - feature = feature[1..]; + for (features_slice) |feature| { + try llvm_features_buffer.append("+"); + try llvm_features_buffer.append(feature.llvm_name); + try llvm_features_buffer.append(","); + } - var found_feature = false; - for (known_features) |known_feature| { - if (std.mem.eql(u8, feature, known_feature.name)) { - found_feature = true; - break; - } - } + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = Stage2TargetDetails{ + .allocator = allocator, + .target_details = std.target.TargetDetails{ + .features = features_slice, + }, + .llvm_cpu_str = "", + .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + }; - if (!found_feature) return .{ .InvalidFeature = feature }; + return ptr; +} - start += next_comma_pos + 1; - } +// ABI warning +export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, switch (td.target_details) { + .cpu => td.llvm_cpu_str, + .features => td.llvm_features_str, + }); + } + + return @as([*:0]const u8, ""); +} + +// ABI warning +export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.llvm_cpu_str); + } + + return @as([*:0]const u8, ""); +} + +// ABI warning +export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.llvm_features_str); } - return .{ .Ok = {} }; + return @as([*:0]const u8, ""); } diff --git a/src/all_types.hpp b/src/all_types.hpp index af4914e29ecf0f2df75d3528506ac3f72dd960de..d81e401232e057cc5a2b5454ed61a0e74cd868df 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2216,8 +2216,7 @@ struct CodeGen { const char **clang_argv; size_t clang_argv_len; - const char *llvm_cpu; - const char *llvm_features; + Stage2TargetDetails *target_details; }; struct ZigVar { diff --git a/src/codegen.cpp b/src/codegen.cpp index 798f406c8e02ce11768420ea79110ff8cfd10704..760284a2e27b0fe4a288a24cf8d58542a7b0f863 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8655,8 +8655,10 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_bool(&cache_hash, g->valgrind_support); cache_bool(&cache_hash, g->link_eh_frame_hdr); cache_int(&cache_hash, detect_subsystem(g)); - if (g->llvm_cpu) cache_str(&cache_hash, g->llvm_cpu); - if (g->llvm_features) cache_str(&cache_hash, g->llvm_features); + + if (g->target_details) { + cache_str(&cache_hash, stage2_target_details_get_cache_str(g->target_details)); + } Buf digest = BUF_INIT; buf_resize(&digest, 0); @@ -8802,15 +8804,12 @@ static void init(CodeGen *g) { target_specific_features = ""; } - // Override CPU and features if non-null. - if (g->llvm_cpu != nullptr) { - target_specific_cpu_args = g->llvm_cpu; + // Override CPU and features if defined by user. + if (g->target_details) { + target_specific_cpu_args = stage2_target_details_get_llvm_cpu(g->target_details); + target_specific_features = stage2_target_details_get_llvm_features(g->target_details); } - if (g->llvm_features != nullptr) { - target_specific_features = g->llvm_features; - } - g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault, g->function_sections); @@ -10390,8 +10389,10 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { } cache_buf_opt(ch, g->dynamic_linker_path); cache_buf_opt(ch, g->version_script_path); - if (g->llvm_cpu) cache_str(ch, g->llvm_cpu); - if (g->llvm_features) cache_str(ch, g->llvm_features); + + if (g->target_details) { + cache_str(ch, stage2_target_details_get_cache_str(g->target_details)); + } // gen_c_objects appends objects to g->link_objects which we want to include in the hash gen_c_objects(g); diff --git a/src/main.cpp b/src/main.cpp index 32efb9f0202566cf56e2a31a3a118883efc0bab2..da8b354796ad445744346d12c6a8fc8ecf25532e 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -535,8 +535,8 @@ int main(int argc, char **argv) { WantStackCheck want_stack_check = WantStackCheckAuto; WantCSanitize want_sanitize_c = WantCSanitizeAuto; bool function_sections = false; - const char *cpu = ""; - const char *features = ""; + const char *cpu = nullptr; + const char *features = nullptr; const char *targets_list_features_arch = nullptr; const char *targets_list_cpus_arch = nullptr; @@ -1278,12 +1278,25 @@ int main(int argc, char **argv) { codegen_add_rpath(g, rpath_list.at(i)); } - if (!stage2_validate_cpu_and_features(target_arch_name(target.arch), cpu, features)) { - return 1; + Stage2TargetDetails *target_details = nullptr; + if (cpu && features) { + fprintf(stderr, "--cpu and --features options not allowed together\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } else if (cpu) { + target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu); + if (!target_details) { + fprintf(stderr, "invalid --cpu value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } else if (features) { + target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features); + if (!target_details) { + fprintf(stderr, "invalid --features value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } } - g->llvm_cpu = cpu; - g->llvm_features = features; + g->target_details = target_details; codegen_set_rdynamic(g, rdynamic); if (mmacosx_version_min && mios_version_min) { diff --git a/src/userland.cpp b/src/userland.cpp index e0c8b33fa2b2d6ed234ab90c3f7adc206d8cd986..468017cb51a63b335558884dffdbc4b226d3c576 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -91,4 +91,18 @@ void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_coun void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} -bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features) { return true; } +Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str) { + return nullptr; +} +Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str) { + return nullptr; +} +const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details) { + return ""; +} +const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details) { + return ""; +} +const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) { + return ""; +} diff --git a/src/userland.h b/src/userland.h index 9d3e9623fba9eda5ffb1ec6cf6d0931a2afc5671..11801e10388a5071f593c17d68ed974bdc6e6c4f 100644 --- a/src/userland.h +++ b/src/userland.h @@ -181,6 +181,21 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_ ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); // ABI warning -ZIG_EXTERN_C bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features); +struct Stage2TargetDetails; + +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str); + +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details); #endif -- 2.54.0 From 03dd376b55a57cbc10269f771f72ced1eaa7aabb Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 8 Jan 2020 21:35:26 -0500 Subject: [PATCH 16/63] Add builtin.zig support --- lib/std/build.zig | 10 +- lib/std/target/aarch64.zig | 658 ++++---- lib/std/target/amdgpu.zig | 1068 ++++++------ lib/std/target/arm.zig | 848 +++++----- lib/std/target/avr.zig | 3166 ++++++++++++++++++------------------ lib/std/target/hexagon.zig | 8 +- lib/std/target/mips.zig | 226 +-- lib/std/target/powerpc.zig | 42 +- lib/std/target/riscv.zig | 8 +- lib/std/target/sparc.zig | 18 +- lib/std/target/systemz.zig | 68 +- lib/std/target/wasm.zig | 16 +- lib/std/target/x86.zig | 136 +- src-self-hosted/stage1.zig | 36 + src/codegen.cpp | 8 + src/main.cpp | 37 +- src/userland.cpp | 3 + src/userland.h | 3 + 18 files changed, 3208 insertions(+), 3151 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index 72fb173ac9b98c1a5a3f75fa88fd6711f72cb9fe..72d26ff0475eff35e5a5da656bfe0c830e4b5cbc 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1988,10 +1988,16 @@ pub const LibExeObjStep = struct { }, .features => |features| { try zig_args.append("--features"); + + var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); + defer feature_str_buffer.deinit(); + for (features) |feature| { - try zig_args.append(feature.name); - try zig_args.append(","); + try feature_str_buffer.append(feature.name); + try feature_str_buffer.append(","); } + + try zig_args.append(feature_str_buffer.toOwnedSlice()); }, } } diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 404a55e7a5543b747d52e34fd1469d1639c38562..c3c530fb6fd66839c2b6e443d6fa72a16186cb5a 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -19,7 +19,7 @@ pub const feature_am = Feature{ }; pub const feature_aggressiveFma = Feature{ - .name = "aggressive-fma", + .name = "aggressiveFma", .llvm_name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", .dependencies = &[_]*const Feature { @@ -35,7 +35,7 @@ pub const feature_altnzcv = Feature{ }; pub const feature_alternateSextloadCvtF32Pattern = Feature{ - .name = "alternate-sextload-cvt-f32-pattern", + .name = "alternateSextloadCvtF32Pattern", .llvm_name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", .dependencies = &[_]*const Feature { @@ -43,7 +43,7 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{ }; pub const feature_arithBccFusion = Feature{ - .name = "arith-bcc-fusion", + .name = "arithBccFusion", .llvm_name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", .dependencies = &[_]*const Feature { @@ -51,7 +51,7 @@ pub const feature_arithBccFusion = Feature{ }; pub const feature_arithCbzFusion = Feature{ - .name = "arith-cbz-fusion", + .name = "arithCbzFusion", .llvm_name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", .dependencies = &[_]*const Feature { @@ -59,7 +59,7 @@ pub const feature_arithCbzFusion = Feature{ }; pub const feature_balanceFpOps = Feature{ - .name = "balance-fp-ops", + .name = "balanceFpOps", .llvm_name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", .dependencies = &[_]*const Feature { @@ -107,7 +107,7 @@ pub const feature_ccdp = Feature{ }; pub const feature_callSavedX8 = Feature{ - .name = "call-saved-x8", + .name = "callSavedX8", .llvm_name = "call-saved-x8", .description = "Make X8 callee saved.", .dependencies = &[_]*const Feature { @@ -115,7 +115,7 @@ pub const feature_callSavedX8 = Feature{ }; pub const feature_callSavedX9 = Feature{ - .name = "call-saved-x9", + .name = "callSavedX9", .llvm_name = "call-saved-x9", .description = "Make X9 callee saved.", .dependencies = &[_]*const Feature { @@ -123,7 +123,7 @@ pub const feature_callSavedX9 = Feature{ }; pub const feature_callSavedX10 = Feature{ - .name = "call-saved-x10", + .name = "callSavedX10", .llvm_name = "call-saved-x10", .description = "Make X10 callee saved.", .dependencies = &[_]*const Feature { @@ -131,7 +131,7 @@ pub const feature_callSavedX10 = Feature{ }; pub const feature_callSavedX11 = Feature{ - .name = "call-saved-x11", + .name = "callSavedX11", .llvm_name = "call-saved-x11", .description = "Make X11 callee saved.", .dependencies = &[_]*const Feature { @@ -139,7 +139,7 @@ pub const feature_callSavedX11 = Feature{ }; pub const feature_callSavedX12 = Feature{ - .name = "call-saved-x12", + .name = "callSavedX12", .llvm_name = "call-saved-x12", .description = "Make X12 callee saved.", .dependencies = &[_]*const Feature { @@ -147,7 +147,7 @@ pub const feature_callSavedX12 = Feature{ }; pub const feature_callSavedX13 = Feature{ - .name = "call-saved-x13", + .name = "callSavedX13", .llvm_name = "call-saved-x13", .description = "Make X13 callee saved.", .dependencies = &[_]*const Feature { @@ -155,7 +155,7 @@ pub const feature_callSavedX13 = Feature{ }; pub const feature_callSavedX14 = Feature{ - .name = "call-saved-x14", + .name = "callSavedX14", .llvm_name = "call-saved-x14", .description = "Make X14 callee saved.", .dependencies = &[_]*const Feature { @@ -163,7 +163,7 @@ pub const feature_callSavedX14 = Feature{ }; pub const feature_callSavedX15 = Feature{ - .name = "call-saved-x15", + .name = "callSavedX15", .llvm_name = "call-saved-x15", .description = "Make X15 callee saved.", .dependencies = &[_]*const Feature { @@ -171,7 +171,7 @@ pub const feature_callSavedX15 = Feature{ }; pub const feature_callSavedX18 = Feature{ - .name = "call-saved-x18", + .name = "callSavedX18", .llvm_name = "call-saved-x18", .description = "Make X18 callee saved.", .dependencies = &[_]*const Feature { @@ -197,7 +197,7 @@ pub const feature_crypto = Feature{ }; pub const feature_customCheapAsMove = Feature{ - .name = "custom-cheap-as-move", + .name = "customCheapAsMove", .llvm_name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", .dependencies = &[_]*const Feature { @@ -213,7 +213,7 @@ pub const feature_dit = Feature{ }; pub const feature_disableLatencySchedHeuristic = Feature{ - .name = "disable-latency-sched-heuristic", + .name = "disableLatencySchedHeuristic", .llvm_name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", .dependencies = &[_]*const Feature { @@ -238,7 +238,7 @@ pub const feature_ete = Feature{ }; pub const feature_exynosCheapAsMove = Feature{ - .name = "exynos-cheap-as-move", + .name = "exynosCheapAsMove", .llvm_name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", .dependencies = &[_]*const Feature { @@ -264,7 +264,7 @@ pub const feature_fp16fml = Feature{ }; pub const feature_fpArmv8 = Feature{ - .name = "fp-armv8", + .name = "fpArmv8", .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", .dependencies = &[_]*const Feature { @@ -280,7 +280,7 @@ pub const feature_fptoint = Feature{ }; pub const feature_force32bitJumpTables = Feature{ - .name = "force-32bit-jump-tables", + .name = "force32bitJumpTables", .llvm_name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", .dependencies = &[_]*const Feature { @@ -297,7 +297,7 @@ pub const feature_fullfp16 = Feature{ }; pub const feature_fuseAes = Feature{ - .name = "fuse-aes", + .name = "fuseAes", .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", .dependencies = &[_]*const Feature { @@ -305,7 +305,7 @@ pub const feature_fuseAes = Feature{ }; pub const feature_fuseAddress = Feature{ - .name = "fuse-address", + .name = "fuseAddress", .llvm_name = "fuse-address", .description = "CPU fuses address generation and memory operations", .dependencies = &[_]*const Feature { @@ -313,7 +313,7 @@ pub const feature_fuseAddress = Feature{ }; pub const feature_fuseArithLogic = Feature{ - .name = "fuse-arith-logic", + .name = "fuseArithLogic", .llvm_name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", .dependencies = &[_]*const Feature { @@ -321,7 +321,7 @@ pub const feature_fuseArithLogic = Feature{ }; pub const feature_fuseCsel = Feature{ - .name = "fuse-csel", + .name = "fuseCsel", .llvm_name = "fuse-csel", .description = "CPU fuses conditional select operations", .dependencies = &[_]*const Feature { @@ -329,7 +329,7 @@ pub const feature_fuseCsel = Feature{ }; pub const feature_fuseCryptoEor = Feature{ - .name = "fuse-crypto-eor", + .name = "fuseCryptoEor", .llvm_name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", .dependencies = &[_]*const Feature { @@ -337,7 +337,7 @@ pub const feature_fuseCryptoEor = Feature{ }; pub const feature_fuseLiterals = Feature{ - .name = "fuse-literals", + .name = "fuseLiterals", .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", .dependencies = &[_]*const Feature { @@ -370,7 +370,7 @@ pub const feature_lse = Feature{ }; pub const feature_lslFast = Feature{ - .name = "lsl-fast", + .name = "lslFast", .llvm_name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", .dependencies = &[_]*const Feature { @@ -411,7 +411,7 @@ pub const feature_nv = Feature{ }; pub const feature_noNegImmediates = Feature{ - .name = "no-neg-immediates", + .name = "noNegImmediates", .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", .dependencies = &[_]*const Feature { @@ -435,7 +435,7 @@ pub const feature_pan = Feature{ }; pub const feature_panRwv = Feature{ - .name = "pan-rwv", + .name = "panRwv", .llvm_name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", .dependencies = &[_]*const Feature { @@ -452,7 +452,7 @@ pub const feature_perfmon = Feature{ }; pub const feature_usePostraScheduler = Feature{ - .name = "use-postra-scheduler", + .name = "usePostraScheduler", .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation", .dependencies = &[_]*const Feature { @@ -468,7 +468,7 @@ pub const feature_predres = Feature{ }; pub const feature_predictableSelectExpensive = Feature{ - .name = "predictable-select-expensive", + .name = "predictableSelectExpensive", .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", .dependencies = &[_]*const Feature { @@ -509,7 +509,7 @@ pub const feature_rcpc = Feature{ }; pub const feature_rcpcImmo = Feature{ - .name = "rcpc-immo", + .name = "rcpcImmo", .llvm_name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", .dependencies = &[_]*const Feature { @@ -534,7 +534,7 @@ pub const feature_rand = Feature{ }; pub const feature_reserveX1 = Feature{ - .name = "reserve-x1", + .name = "reserveX1", .llvm_name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -542,7 +542,7 @@ pub const feature_reserveX1 = Feature{ }; pub const feature_reserveX2 = Feature{ - .name = "reserve-x2", + .name = "reserveX2", .llvm_name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -550,7 +550,7 @@ pub const feature_reserveX2 = Feature{ }; pub const feature_reserveX3 = Feature{ - .name = "reserve-x3", + .name = "reserveX3", .llvm_name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -558,7 +558,7 @@ pub const feature_reserveX3 = Feature{ }; pub const feature_reserveX4 = Feature{ - .name = "reserve-x4", + .name = "reserveX4", .llvm_name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -566,7 +566,7 @@ pub const feature_reserveX4 = Feature{ }; pub const feature_reserveX5 = Feature{ - .name = "reserve-x5", + .name = "reserveX5", .llvm_name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -574,7 +574,7 @@ pub const feature_reserveX5 = Feature{ }; pub const feature_reserveX6 = Feature{ - .name = "reserve-x6", + .name = "reserveX6", .llvm_name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -582,7 +582,7 @@ pub const feature_reserveX6 = Feature{ }; pub const feature_reserveX7 = Feature{ - .name = "reserve-x7", + .name = "reserveX7", .llvm_name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -590,7 +590,7 @@ pub const feature_reserveX7 = Feature{ }; pub const feature_reserveX9 = Feature{ - .name = "reserve-x9", + .name = "reserveX9", .llvm_name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -598,7 +598,7 @@ pub const feature_reserveX9 = Feature{ }; pub const feature_reserveX10 = Feature{ - .name = "reserve-x10", + .name = "reserveX10", .llvm_name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -606,7 +606,7 @@ pub const feature_reserveX10 = Feature{ }; pub const feature_reserveX11 = Feature{ - .name = "reserve-x11", + .name = "reserveX11", .llvm_name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -614,7 +614,7 @@ pub const feature_reserveX11 = Feature{ }; pub const feature_reserveX12 = Feature{ - .name = "reserve-x12", + .name = "reserveX12", .llvm_name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -622,7 +622,7 @@ pub const feature_reserveX12 = Feature{ }; pub const feature_reserveX13 = Feature{ - .name = "reserve-x13", + .name = "reserveX13", .llvm_name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -630,7 +630,7 @@ pub const feature_reserveX13 = Feature{ }; pub const feature_reserveX14 = Feature{ - .name = "reserve-x14", + .name = "reserveX14", .llvm_name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -638,7 +638,7 @@ pub const feature_reserveX14 = Feature{ }; pub const feature_reserveX15 = Feature{ - .name = "reserve-x15", + .name = "reserveX15", .llvm_name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -646,7 +646,7 @@ pub const feature_reserveX15 = Feature{ }; pub const feature_reserveX18 = Feature{ - .name = "reserve-x18", + .name = "reserveX18", .llvm_name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -654,7 +654,7 @@ pub const feature_reserveX18 = Feature{ }; pub const feature_reserveX20 = Feature{ - .name = "reserve-x20", + .name = "reserveX20", .llvm_name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -662,7 +662,7 @@ pub const feature_reserveX20 = Feature{ }; pub const feature_reserveX21 = Feature{ - .name = "reserve-x21", + .name = "reserveX21", .llvm_name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -670,7 +670,7 @@ pub const feature_reserveX21 = Feature{ }; pub const feature_reserveX22 = Feature{ - .name = "reserve-x22", + .name = "reserveX22", .llvm_name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -678,7 +678,7 @@ pub const feature_reserveX22 = Feature{ }; pub const feature_reserveX23 = Feature{ - .name = "reserve-x23", + .name = "reserveX23", .llvm_name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -686,7 +686,7 @@ pub const feature_reserveX23 = Feature{ }; pub const feature_reserveX24 = Feature{ - .name = "reserve-x24", + .name = "reserveX24", .llvm_name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -694,7 +694,7 @@ pub const feature_reserveX24 = Feature{ }; pub const feature_reserveX25 = Feature{ - .name = "reserve-x25", + .name = "reserveX25", .llvm_name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -702,7 +702,7 @@ pub const feature_reserveX25 = Feature{ }; pub const feature_reserveX26 = Feature{ - .name = "reserve-x26", + .name = "reserveX26", .llvm_name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -710,7 +710,7 @@ pub const feature_reserveX26 = Feature{ }; pub const feature_reserveX27 = Feature{ - .name = "reserve-x27", + .name = "reserveX27", .llvm_name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -718,7 +718,7 @@ pub const feature_reserveX27 = Feature{ }; pub const feature_reserveX28 = Feature{ - .name = "reserve-x28", + .name = "reserveX28", .llvm_name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", .dependencies = &[_]*const Feature { @@ -802,7 +802,7 @@ pub const feature_sve2 = Feature{ }; pub const feature_sve2Aes = Feature{ - .name = "sve2-aes", + .name = "sve2Aes", .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", .dependencies = &[_]*const Feature { @@ -812,7 +812,7 @@ pub const feature_sve2Aes = Feature{ }; pub const feature_sve2Bitperm = Feature{ - .name = "sve2-bitperm", + .name = "sve2Bitperm", .llvm_name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", .dependencies = &[_]*const Feature { @@ -821,7 +821,7 @@ pub const feature_sve2Bitperm = Feature{ }; pub const feature_sve2Sha3 = Feature{ - .name = "sve2-sha3", + .name = "sve2Sha3", .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", .dependencies = &[_]*const Feature { @@ -831,7 +831,7 @@ pub const feature_sve2Sha3 = Feature{ }; pub const feature_sve2Sm4 = Feature{ - .name = "sve2-sm4", + .name = "sve2Sm4", .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", .dependencies = &[_]*const Feature { @@ -841,7 +841,7 @@ pub const feature_sve2Sm4 = Feature{ }; pub const feature_slowMisaligned128store = Feature{ - .name = "slow-misaligned-128store", + .name = "slowMisaligned128store", .llvm_name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", .dependencies = &[_]*const Feature { @@ -849,7 +849,7 @@ pub const feature_slowMisaligned128store = Feature{ }; pub const feature_slowPaired128 = Feature{ - .name = "slow-paired-128", + .name = "slowPaired128", .llvm_name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", .dependencies = &[_]*const Feature { @@ -857,7 +857,7 @@ pub const feature_slowPaired128 = Feature{ }; pub const feature_slowStrqroStore = Feature{ - .name = "slow-strqro-store", + .name = "slowStrqroStore", .llvm_name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", .dependencies = &[_]*const Feature { @@ -873,7 +873,7 @@ pub const feature_specrestrict = Feature{ }; pub const feature_strictAlign = Feature{ - .name = "strict-align", + .name = "strictAlign", .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", .dependencies = &[_]*const Feature { @@ -881,7 +881,7 @@ pub const feature_strictAlign = Feature{ }; pub const feature_tlbRmi = Feature{ - .name = "tlb-rmi", + .name = "tlbRmi", .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", .dependencies = &[_]*const Feature { @@ -897,7 +897,7 @@ pub const feature_tme = Feature{ }; pub const feature_tracev84 = Feature{ - .name = "tracev8.4", + .name = "tracev84", .llvm_name = "tracev8.4", .description = "Enable v8.4-A Trace extension", .dependencies = &[_]*const Feature { @@ -913,7 +913,7 @@ pub const feature_trbe = Feature{ }; pub const feature_taggedGlobals = Feature{ - .name = "tagged-globals", + .name = "taggedGlobals", .llvm_name = "tagged-globals", .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", .dependencies = &[_]*const Feature { @@ -921,7 +921,7 @@ pub const feature_taggedGlobals = Feature{ }; pub const feature_useAa = Feature{ - .name = "use-aa", + .name = "useAa", .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { @@ -929,7 +929,7 @@ pub const feature_useAa = Feature{ }; pub const feature_tpidrEl1 = Feature{ - .name = "tpidr-el1", + .name = "tpidrEl1", .llvm_name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", .dependencies = &[_]*const Feature { @@ -937,7 +937,7 @@ pub const feature_tpidrEl1 = Feature{ }; pub const feature_tpidrEl2 = Feature{ - .name = "tpidr-el2", + .name = "tpidrEl2", .llvm_name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", .dependencies = &[_]*const Feature { @@ -945,7 +945,7 @@ pub const feature_tpidrEl2 = Feature{ }; pub const feature_tpidrEl3 = Feature{ - .name = "tpidr-el3", + .name = "tpidrEl3", .llvm_name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", .dependencies = &[_]*const Feature { @@ -953,7 +953,7 @@ pub const feature_tpidrEl3 = Feature{ }; pub const feature_useReciprocalSquareRoot = Feature{ - .name = "use-reciprocal-square-root", + .name = "useReciprocalSquareRoot", .llvm_name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", .dependencies = &[_]*const Feature { @@ -981,13 +981,13 @@ pub const feature_zcz = Feature{ .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", .dependencies = &[_]*const Feature { - &feature_zczGp, &feature_zczFp, + &feature_zczGp, }, }; pub const feature_zczFp = Feature{ - .name = "zcz-fp", + .name = "zczFp", .llvm_name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", .dependencies = &[_]*const Feature { @@ -995,7 +995,7 @@ pub const feature_zczFp = Feature{ }; pub const feature_zczFpWorkaround = Feature{ - .name = "zcz-fp-workaround", + .name = "zczFpWorkaround", .llvm_name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", .dependencies = &[_]*const Feature { @@ -1003,7 +1003,7 @@ pub const feature_zczFpWorkaround = Feature{ }; pub const feature_zczGp = Feature{ - .name = "zcz-gp", + .name = "zczGp", .llvm_name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", .dependencies = &[_]*const Feature { @@ -1137,206 +1137,206 @@ pub const features = &[_]*const Feature { }; pub const cpu_appleLatest = Cpu{ - .name = "apple-latest", + .name = "appleLatest", .llvm_name = "apple-latest", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_zczFpWorkaround, - &feature_perfmon, - &feature_arithCbzFusion, + &feature_fpArmv8, &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, - &feature_disableLatencySchedHeuristic, - &feature_zcm, + &feature_arithBccFusion, &feature_zczFp, &feature_zczGp, - &feature_fpArmv8, - &feature_arithBccFusion, + &feature_zcm, + &feature_fuseAes, + &feature_disableLatencySchedHeuristic, + &feature_fuseCryptoEor, + &feature_perfmon, + &feature_zczFpWorkaround, + &feature_arithCbzFusion, }, }; pub const cpu_cortexA35 = Cpu{ - .name = "cortex-a35", + .name = "cortexA35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { &feature_fpArmv8, - &feature_perfmon, &feature_crc, + &feature_perfmon, }, }; pub const cpu_cortexA53 = Cpu{ - .name = "cortex-a53", + .name = "cortexA53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_fuseAes, + &feature_fpArmv8, &feature_balanceFpOps, - &feature_perfmon, + &feature_usePostraScheduler, &feature_crc, &feature_customCheapAsMove, - &feature_fpArmv8, - &feature_usePostraScheduler, &feature_useAa, + &feature_fuseAes, + &feature_perfmon, }, }; pub const cpu_cortexA55 = Cpu{ - .name = "cortex-a55", + .name = "cortexA55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_fuseAes, &feature_fpArmv8, - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_perfmon, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_fuseAes, + &feature_ras, + &feature_perfmon, + &feature_ccpp, }, }; pub const cpu_cortexA57 = Cpu{ - .name = "cortex-a57", + .name = "cortexA57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_fuseAes, + &feature_fpArmv8, &feature_balanceFpOps, - &feature_perfmon, - &feature_crc, &feature_fuseLiterals, - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_fpArmv8, &feature_usePostraScheduler, + &feature_crc, + &feature_customCheapAsMove, + &feature_fuseAes, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; pub const cpu_cortexA65 = Cpu{ - .name = "cortex-a65", + .name = "cortexA65", .llvm_name = "cortex-a65", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, + &feature_fpArmv8, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; pub const cpu_cortexA65ae = Cpu{ - .name = "cortex-a65ae", + .name = "cortexA65ae", .llvm_name = "cortex-a65ae", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, + &feature_fpArmv8, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; pub const cpu_cortexA72 = Cpu{ - .name = "cortex-a72", + .name = "cortexA72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { &feature_fpArmv8, - &feature_fuseAes, - &feature_perfmon, &feature_crc, + &feature_perfmon, + &feature_fuseAes, }, }; pub const cpu_cortexA73 = Cpu{ - .name = "cortex-a73", + .name = "cortexA73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { &feature_fpArmv8, - &feature_fuseAes, - &feature_perfmon, &feature_crc, + &feature_perfmon, + &feature_fuseAes, }, }; pub const cpu_cortexA75 = Cpu{ - .name = "cortex-a75", + .name = "cortexA75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_fuseAes, &feature_fpArmv8, - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_perfmon, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_fuseAes, + &feature_ras, + &feature_perfmon, + &feature_ccpp, }, }; pub const cpu_cortexA76 = Cpu{ - .name = "cortex-a76", + .name = "cortexA76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, + &feature_fpArmv8, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; pub const cpu_cortexA76ae = Cpu{ - .name = "cortex-a76ae", + .name = "cortexA76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, + &feature_fpArmv8, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; @@ -1344,137 +1344,137 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_zczFpWorkaround, - &feature_perfmon, - &feature_arithCbzFusion, + &feature_fpArmv8, &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, - &feature_disableLatencySchedHeuristic, - &feature_zcm, + &feature_arithBccFusion, &feature_zczFp, &feature_zczGp, - &feature_fpArmv8, - &feature_arithBccFusion, + &feature_zcm, + &feature_fuseAes, + &feature_disableLatencySchedHeuristic, + &feature_fuseCryptoEor, + &feature_perfmon, + &feature_zczFpWorkaround, + &feature_arithCbzFusion, }, }; pub const cpu_exynosM1 = Cpu{ - .name = "exynos-m1", + .name = "exynosM1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_force32bitJumpTables, - &feature_perfmon, - &feature_crc, + &feature_fpArmv8, + &feature_slowMisaligned128store, + &feature_usePostraScheduler, &feature_useReciprocalSquareRoot, - &feature_slowPaired128, + &feature_crc, &feature_zczFp, - &feature_slowMisaligned128store, &feature_customCheapAsMove, - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_force32bitJumpTables, + &feature_fuseAes, + &feature_slowPaired128, + &feature_perfmon, }, }; pub const cpu_exynosM2 = Cpu{ - .name = "exynos-m2", + .name = "exynosM2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_force32bitJumpTables, - &feature_perfmon, + &feature_fpArmv8, + &feature_slowMisaligned128store, + &feature_usePostraScheduler, &feature_crc, - &feature_slowPaired128, &feature_zczFp, - &feature_slowMisaligned128store, &feature_customCheapAsMove, - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_force32bitJumpTables, + &feature_fuseAes, + &feature_slowPaired128, + &feature_perfmon, }, }; pub const cpu_exynosM3 = Cpu{ - .name = "exynos-m3", + .name = "exynosM3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_fuseAes, + &feature_fpArmv8, + &feature_fuseAddress, + &feature_fuseLiterals, + &feature_usePostraScheduler, + &feature_crc, &feature_lslFast, + &feature_customCheapAsMove, + &feature_zczFp, &feature_force32bitJumpTables, - &feature_perfmon, - &feature_crc, - &feature_fuseLiterals, &feature_fuseCsel, - &feature_zczFp, + &feature_fuseAes, + &feature_perfmon, &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_fpArmv8, - &feature_usePostraScheduler, - &feature_fuseAddress, }, }; pub const cpu_exynosM4 = Cpu{ - .name = "exynos-m4", + .name = "exynosM4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_lslFast, - &feature_force32bitJumpTables, + &feature_pan, + &feature_fuseAddress, + &feature_usePostraScheduler, &feature_crc, - &feature_rdm, - &feature_fpArmv8, - &feature_lse, - &feature_vh, - &feature_arithCbzFusion, - &feature_fuseLiterals, - &feature_ccpp, + &feature_customCheapAsMove, + &feature_force32bitJumpTables, + &feature_uaops, &feature_lor, &feature_arithBccFusion, - &feature_ras, + &feature_arithCbzFusion, &feature_dotprod, - &feature_fuseCsel, - &feature_zczFp, - &feature_uaops, + &feature_fuseArithLogic, &feature_zczGp, + &feature_rdm, + &feature_fuseCsel, &feature_perfmon, - &feature_usePostraScheduler, - &feature_fuseAddress, - &feature_fuseArithLogic, - &feature_customCheapAsMove, - &feature_pan, + &feature_fpArmv8, + &feature_vh, + &feature_fuseLiterals, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_fuseAes, + &feature_ras, + &feature_ccpp, }, }; pub const cpu_exynosM5 = Cpu{ - .name = "exynos-m5", + .name = "exynosM5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_lslFast, - &feature_force32bitJumpTables, + &feature_pan, + &feature_fuseAddress, + &feature_usePostraScheduler, &feature_crc, - &feature_rdm, - &feature_fpArmv8, - &feature_lse, - &feature_vh, - &feature_arithCbzFusion, - &feature_fuseLiterals, - &feature_ccpp, + &feature_customCheapAsMove, + &feature_force32bitJumpTables, + &feature_uaops, &feature_lor, &feature_arithBccFusion, - &feature_ras, + &feature_arithCbzFusion, &feature_dotprod, - &feature_fuseCsel, - &feature_zczFp, - &feature_uaops, + &feature_fuseArithLogic, &feature_zczGp, + &feature_rdm, + &feature_fuseCsel, &feature_perfmon, - &feature_usePostraScheduler, - &feature_fuseAddress, - &feature_fuseArithLogic, - &feature_customCheapAsMove, - &feature_pan, + &feature_fpArmv8, + &feature_vh, + &feature_fuseLiterals, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_fuseAes, + &feature_ras, + &feature_ccpp, }, }; @@ -1482,17 +1482,17 @@ pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .dependencies = &[_]*const Feature { - &feature_lslFast, - &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, &feature_crc, + &feature_lslFast, + &feature_customCheapAsMove, &feature_slowStrqroStore, - &feature_rdm, &feature_zczFp, - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, + &feature_rdm, &feature_zczGp, - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; @@ -1514,56 +1514,56 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_lslFast, - &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, &feature_crc, - &feature_zczFp, - &feature_predictableSelectExpensive, + &feature_lslFast, &feature_customCheapAsMove, + &feature_zczFp, &feature_zczGp, - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; pub const cpu_neoverseE1 = Cpu{ - .name = "neoverse-e1", + .name = "neoverseE1", .llvm_name = "neoverse-e1", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, - &feature_vh, - &feature_crc, + &feature_fpArmv8, &feature_pan, - &feature_ccpp, - &feature_rdm, + &feature_vh, + &feature_dotprod, &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, &feature_lse, + &feature_crc, + &feature_uaops, + &feature_rdm, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; pub const cpu_neoverseN1 = Cpu{ - .name = "neoverse-n1", + .name = "neoverseN1", .llvm_name = "neoverse-n1", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_dotprod, + &feature_fpArmv8, + &feature_pan, &feature_vh, + &feature_dotprod, + &feature_rcpc, + &feature_lse, &feature_crc, - &feature_pan, - &feature_ccpp, + &feature_uaops, &feature_rdm, &feature_spe, - &feature_rcpc, - &feature_uaops, - &feature_ssbs, - &feature_fpArmv8, - &feature_lse, &feature_lor, + &feature_ras, + &feature_ssbs, + &feature_ccpp, }, }; @@ -1571,36 +1571,36 @@ pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .dependencies = &[_]*const Feature { - &feature_lslFast, - &feature_crc, - &feature_rdm, &feature_am, - &feature_mpam, - &feature_fmi, - &feature_fpArmv8, - &feature_lse, - &feature_dit, - &feature_vh, - &feature_ccpp, + &feature_pan, + &feature_usePostraScheduler, + &feature_tracev84, + &feature_rcpc, &feature_sel2, - &feature_lor, - &feature_nv, - &feature_ras, + &feature_crc, + &feature_customCheapAsMove, &feature_tlbRmi, - &feature_dotprod, - &feature_zczFp, - &feature_spe, - &feature_rcpc, - &feature_predictableSelectExpensive, &feature_uaops, + &feature_lor, + &feature_dotprod, &feature_zczGp, - &feature_perfmon, - &feature_usePostraScheduler, + &feature_rdm, &feature_pa, + &feature_perfmon, + &feature_fpArmv8, + &feature_vh, + &feature_lse, + &feature_zczFp, + &feature_spe, + &feature_predictableSelectExpensive, + &feature_fmi, + &feature_lslFast, + &feature_mpam, + &feature_dit, + &feature_nv, &feature_ccidx, - &feature_customCheapAsMove, - &feature_pan, - &feature_tracev84, + &feature_ras, + &feature_ccpp, }, }; @@ -1608,11 +1608,11 @@ pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_crc, - &feature_predictableSelectExpensive, &feature_fpArmv8, &feature_usePostraScheduler, + &feature_crc, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; @@ -1620,17 +1620,17 @@ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .dependencies = &[_]*const Feature { + &feature_fpArmv8, + &feature_pan, + &feature_vh, + &feature_usePostraScheduler, + &feature_crc, + &feature_lse, + &feature_rdm, + &feature_lor, + &feature_arithBccFusion, + &feature_predictableSelectExpensive, &feature_aggressiveFma, - &feature_vh, - &feature_crc, - &feature_pan, - &feature_rdm, - &feature_predictableSelectExpensive, - &feature_fpArmv8, - &feature_lse, - &feature_lor, - &feature_usePostraScheduler, - &feature_arithBccFusion, }, }; @@ -1638,11 +1638,11 @@ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_crc, - &feature_predictableSelectExpensive, &feature_fpArmv8, &feature_usePostraScheduler, + &feature_crc, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; @@ -1650,11 +1650,11 @@ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_crc, - &feature_predictableSelectExpensive, &feature_fpArmv8, &feature_usePostraScheduler, + &feature_crc, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; @@ -1662,11 +1662,11 @@ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_crc, - &feature_predictableSelectExpensive, &feature_fpArmv8, &feature_usePostraScheduler, + &feature_crc, + &feature_perfmon, + &feature_predictableSelectExpensive, }, }; @@ -1674,22 +1674,22 @@ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .dependencies = &[_]*const Feature { - &feature_fuseAes, &feature_fpArmv8, - &feature_ras, - &feature_dotprod, + &feature_pan, &feature_vh, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_lse, &feature_crc, - &feature_pan, - &feature_ccpp, + &feature_customCheapAsMove, + &feature_uaops, &feature_rdm, &feature_spe, - &feature_uaops, - &feature_customCheapAsMove, - &feature_perfmon, - &feature_lse, &feature_lor, - &feature_usePostraScheduler, + &feature_fuseAes, + &feature_ras, + &feature_perfmon, + &feature_ccpp, }, }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 3d4b4950caf8ac5df673b958edde128864b3e4ee..f1954628c5a268c9d95872e47fab44470ded3252 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_BitInsts16 = Feature{ - .name = "16-bit-insts", + .name = "BitInsts16", .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", .dependencies = &[_]*const Feature { @@ -10,7 +10,7 @@ pub const feature_BitInsts16 = Feature{ }; pub const feature_addNoCarryInsts = Feature{ - .name = "add-no-carry-insts", + .name = "addNoCarryInsts", .llvm_name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", .dependencies = &[_]*const Feature { @@ -18,7 +18,7 @@ pub const feature_addNoCarryInsts = Feature{ }; pub const feature_apertureRegs = Feature{ - .name = "aperture-regs", + .name = "apertureRegs", .llvm_name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", .dependencies = &[_]*const Feature { @@ -26,7 +26,7 @@ pub const feature_apertureRegs = Feature{ }; pub const feature_atomicFaddInsts = Feature{ - .name = "atomic-fadd-insts", + .name = "atomicFaddInsts", .llvm_name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", .dependencies = &[_]*const Feature { @@ -34,7 +34,7 @@ pub const feature_atomicFaddInsts = Feature{ }; pub const feature_autoWaitcntBeforeBarrier = Feature{ - .name = "auto-waitcnt-before-barrier", + .name = "autoWaitcntBeforeBarrier", .llvm_name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", .dependencies = &[_]*const Feature { @@ -42,7 +42,7 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{ }; pub const feature_ciInsts = Feature{ - .name = "ci-insts", + .name = "ciInsts", .llvm_name = "ci-insts", .description = "Additional instructions for CI+", .dependencies = &[_]*const Feature { @@ -50,7 +50,7 @@ pub const feature_ciInsts = Feature{ }; pub const feature_codeObjectV3 = Feature{ - .name = "code-object-v3", + .name = "codeObjectV3", .llvm_name = "code-object-v3", .description = "Generate code object version 3", .dependencies = &[_]*const Feature { @@ -66,7 +66,7 @@ pub const feature_cumode = Feature{ }; pub const feature_dlInsts = Feature{ - .name = "dl-insts", + .name = "dlInsts", .llvm_name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", .dependencies = &[_]*const Feature { @@ -90,7 +90,7 @@ pub const feature_dpp8 = Feature{ }; pub const feature_noSramEccSupport = Feature{ - .name = "no-sram-ecc-support", + .name = "noSramEccSupport", .llvm_name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", .dependencies = &[_]*const Feature { @@ -98,7 +98,7 @@ pub const feature_noSramEccSupport = Feature{ }; pub const feature_noXnackSupport = Feature{ - .name = "no-xnack-support", + .name = "noXnackSupport", .llvm_name = "no-xnack-support", .description = "Hardware does not support XNACK", .dependencies = &[_]*const Feature { @@ -106,7 +106,7 @@ pub const feature_noXnackSupport = Feature{ }; pub const feature_dot1Insts = Feature{ - .name = "dot1-insts", + .name = "dot1Insts", .llvm_name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", .dependencies = &[_]*const Feature { @@ -114,7 +114,7 @@ pub const feature_dot1Insts = Feature{ }; pub const feature_dot2Insts = Feature{ - .name = "dot2-insts", + .name = "dot2Insts", .llvm_name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", .dependencies = &[_]*const Feature { @@ -122,7 +122,7 @@ pub const feature_dot2Insts = Feature{ }; pub const feature_dot3Insts = Feature{ - .name = "dot3-insts", + .name = "dot3Insts", .llvm_name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", .dependencies = &[_]*const Feature { @@ -130,7 +130,7 @@ pub const feature_dot3Insts = Feature{ }; pub const feature_dot4Insts = Feature{ - .name = "dot4-insts", + .name = "dot4Insts", .llvm_name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", .dependencies = &[_]*const Feature { @@ -138,7 +138,7 @@ pub const feature_dot4Insts = Feature{ }; pub const feature_dot5Insts = Feature{ - .name = "dot5-insts", + .name = "dot5Insts", .llvm_name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", .dependencies = &[_]*const Feature { @@ -146,7 +146,7 @@ pub const feature_dot5Insts = Feature{ }; pub const feature_dot6Insts = Feature{ - .name = "dot6-insts", + .name = "dot6Insts", .llvm_name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", .dependencies = &[_]*const Feature { @@ -170,7 +170,7 @@ pub const feature_dumpcode = Feature{ }; pub const feature_enableDs128 = Feature{ - .name = "enable-ds128", + .name = "enableDs128", .llvm_name = "enable-ds128", .description = "Use ds_{read|write}_b128", .dependencies = &[_]*const Feature { @@ -178,7 +178,7 @@ pub const feature_enableDs128 = Feature{ }; pub const feature_loadStoreOpt = Feature{ - .name = "load-store-opt", + .name = "loadStoreOpt", .llvm_name = "load-store-opt", .description = "Enable SI load/store optimizer pass", .dependencies = &[_]*const Feature { @@ -186,7 +186,7 @@ pub const feature_loadStoreOpt = Feature{ }; pub const feature_enablePrtStrictNull = Feature{ - .name = "enable-prt-strict-null", + .name = "enablePrtStrictNull", .llvm_name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", .dependencies = &[_]*const Feature { @@ -194,7 +194,7 @@ pub const feature_enablePrtStrictNull = Feature{ }; pub const feature_siScheduler = Feature{ - .name = "si-scheduler", + .name = "siScheduler", .llvm_name = "si-scheduler", .description = "Enable SI Machine Scheduler", .dependencies = &[_]*const Feature { @@ -202,7 +202,7 @@ pub const feature_siScheduler = Feature{ }; pub const feature_unsafeDsOffsetFolding = Feature{ - .name = "unsafe-ds-offset-folding", + .name = "unsafeDsOffsetFolding", .llvm_name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", .dependencies = &[_]*const Feature { @@ -218,7 +218,7 @@ pub const feature_fmaf = Feature{ }; pub const feature_fp16Denormals = Feature{ - .name = "fp16-denormals", + .name = "fp16Denormals", .llvm_name = "fp16-denormals", .description = "Enable half precision denormal handling", .dependencies = &[_]*const Feature { @@ -227,7 +227,7 @@ pub const feature_fp16Denormals = Feature{ }; pub const feature_fp32Denormals = Feature{ - .name = "fp32-denormals", + .name = "fp32Denormals", .llvm_name = "fp32-denormals", .description = "Enable single precision denormal handling", .dependencies = &[_]*const Feature { @@ -243,7 +243,7 @@ pub const feature_fp64 = Feature{ }; pub const feature_fp64Denormals = Feature{ - .name = "fp64-denormals", + .name = "fp64Denormals", .llvm_name = "fp64-denormals", .description = "Enable double and half precision denormal handling", .dependencies = &[_]*const Feature { @@ -252,7 +252,7 @@ pub const feature_fp64Denormals = Feature{ }; pub const feature_fp64Fp16Denormals = Feature{ - .name = "fp64-fp16-denormals", + .name = "fp64Fp16Denormals", .llvm_name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", .dependencies = &[_]*const Feature { @@ -261,7 +261,7 @@ pub const feature_fp64Fp16Denormals = Feature{ }; pub const feature_fpExceptions = Feature{ - .name = "fp-exceptions", + .name = "fpExceptions", .llvm_name = "fp-exceptions", .description = "Enable floating point exceptions", .dependencies = &[_]*const Feature { @@ -269,7 +269,7 @@ pub const feature_fpExceptions = Feature{ }; pub const feature_fastFmaf = Feature{ - .name = "fast-fmaf", + .name = "fastFmaf", .llvm_name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", .dependencies = &[_]*const Feature { @@ -277,7 +277,7 @@ pub const feature_fastFmaf = Feature{ }; pub const feature_flatAddressSpace = Feature{ - .name = "flat-address-space", + .name = "flatAddressSpace", .llvm_name = "flat-address-space", .description = "Support flat address space", .dependencies = &[_]*const Feature { @@ -285,7 +285,7 @@ pub const feature_flatAddressSpace = Feature{ }; pub const feature_flatForGlobal = Feature{ - .name = "flat-for-global", + .name = "flatForGlobal", .llvm_name = "flat-for-global", .description = "Force to generate flat instruction for global", .dependencies = &[_]*const Feature { @@ -293,7 +293,7 @@ pub const feature_flatForGlobal = Feature{ }; pub const feature_flatGlobalInsts = Feature{ - .name = "flat-global-insts", + .name = "flatGlobalInsts", .llvm_name = "flat-global-insts", .description = "Have global_* flat memory instructions", .dependencies = &[_]*const Feature { @@ -301,7 +301,7 @@ pub const feature_flatGlobalInsts = Feature{ }; pub const feature_flatInstOffsets = Feature{ - .name = "flat-inst-offsets", + .name = "flatInstOffsets", .llvm_name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", .dependencies = &[_]*const Feature { @@ -309,7 +309,7 @@ pub const feature_flatInstOffsets = Feature{ }; pub const feature_flatScratchInsts = Feature{ - .name = "flat-scratch-insts", + .name = "flatScratchInsts", .llvm_name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", .dependencies = &[_]*const Feature { @@ -317,7 +317,7 @@ pub const feature_flatScratchInsts = Feature{ }; pub const feature_flatSegmentOffsetBug = Feature{ - .name = "flat-segment-offset-bug", + .name = "flatSegmentOffsetBug", .llvm_name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", .dependencies = &[_]*const Feature { @@ -325,7 +325,7 @@ pub const feature_flatSegmentOffsetBug = Feature{ }; pub const feature_fmaMixInsts = Feature{ - .name = "fma-mix-insts", + .name = "fmaMixInsts", .llvm_name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", .dependencies = &[_]*const Feature { @@ -333,7 +333,7 @@ pub const feature_fmaMixInsts = Feature{ }; pub const feature_gcn3Encoding = Feature{ - .name = "gcn3-encoding", + .name = "gcn3Encoding", .llvm_name = "gcn3-encoding", .description = "Encoding format for VI", .dependencies = &[_]*const Feature { @@ -341,7 +341,7 @@ pub const feature_gcn3Encoding = Feature{ }; pub const feature_gfx7Gfx8Gfx9Insts = Feature{ - .name = "gfx7-gfx8-gfx9-insts", + .name = "gfx7Gfx8Gfx9Insts", .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", .dependencies = &[_]*const Feature { @@ -349,7 +349,7 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{ }; pub const feature_gfx8Insts = Feature{ - .name = "gfx8-insts", + .name = "gfx8Insts", .llvm_name = "gfx8-insts", .description = "Additional instructions for GFX8+", .dependencies = &[_]*const Feature { @@ -357,7 +357,7 @@ pub const feature_gfx8Insts = Feature{ }; pub const feature_gfx9Insts = Feature{ - .name = "gfx9-insts", + .name = "gfx9Insts", .llvm_name = "gfx9-insts", .description = "Additional instructions for GFX9+", .dependencies = &[_]*const Feature { @@ -365,7 +365,7 @@ pub const feature_gfx9Insts = Feature{ }; pub const feature_gfx10Insts = Feature{ - .name = "gfx10-insts", + .name = "gfx10Insts", .llvm_name = "gfx10-insts", .description = "Additional instructions for GFX10+", .dependencies = &[_]*const Feature { @@ -373,7 +373,7 @@ pub const feature_gfx10Insts = Feature{ }; pub const feature_instFwdPrefetchBug = Feature{ - .name = "inst-fwd-prefetch-bug", + .name = "instFwdPrefetchBug", .llvm_name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", .dependencies = &[_]*const Feature { @@ -381,7 +381,7 @@ pub const feature_instFwdPrefetchBug = Feature{ }; pub const feature_intClampInsts = Feature{ - .name = "int-clamp-insts", + .name = "intClampInsts", .llvm_name = "int-clamp-insts", .description = "Support clamp for integer destination", .dependencies = &[_]*const Feature { @@ -389,7 +389,7 @@ pub const feature_intClampInsts = Feature{ }; pub const feature_inv2piInlineImm = Feature{ - .name = "inv-2pi-inline-imm", + .name = "inv2piInlineImm", .llvm_name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", .dependencies = &[_]*const Feature { @@ -413,7 +413,7 @@ pub const feature_ldsbankcount32 = Feature{ }; pub const feature_ldsBranchVmemWarHazard = Feature{ - .name = "lds-branch-vmem-war-hazard", + .name = "ldsBranchVmemWarHazard", .llvm_name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", .dependencies = &[_]*const Feature { @@ -421,7 +421,7 @@ pub const feature_ldsBranchVmemWarHazard = Feature{ }; pub const feature_ldsMisalignedBug = Feature{ - .name = "lds-misaligned-bug", + .name = "ldsMisalignedBug", .llvm_name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", .dependencies = &[_]*const Feature { @@ -453,7 +453,7 @@ pub const feature_localmemorysize65536 = Feature{ }; pub const feature_maiInsts = Feature{ - .name = "mai-insts", + .name = "maiInsts", .llvm_name = "mai-insts", .description = "Has mAI instructions", .dependencies = &[_]*const Feature { @@ -461,7 +461,7 @@ pub const feature_maiInsts = Feature{ }; pub const feature_mfmaInlineLiteralBug = Feature{ - .name = "mfma-inline-literal-bug", + .name = "mfmaInlineLiteralBug", .llvm_name = "mfma-inline-literal-bug", .description = "MFMA cannot use inline literal as SrcC", .dependencies = &[_]*const Feature { @@ -469,7 +469,7 @@ pub const feature_mfmaInlineLiteralBug = Feature{ }; pub const feature_mimgR128 = Feature{ - .name = "mimg-r128", + .name = "mimgR128", .llvm_name = "mimg-r128", .description = "Support 128-bit texture resources", .dependencies = &[_]*const Feature { @@ -477,7 +477,7 @@ pub const feature_mimgR128 = Feature{ }; pub const feature_madMixInsts = Feature{ - .name = "mad-mix-insts", + .name = "madMixInsts", .llvm_name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", .dependencies = &[_]*const Feature { @@ -485,7 +485,7 @@ pub const feature_madMixInsts = Feature{ }; pub const feature_maxPrivateElementSize4 = Feature{ - .name = "max-private-element-size-4", + .name = "maxPrivateElementSize4", .llvm_name = "max-private-element-size-4", .description = "Maximum private access size may be 4", .dependencies = &[_]*const Feature { @@ -493,7 +493,7 @@ pub const feature_maxPrivateElementSize4 = Feature{ }; pub const feature_maxPrivateElementSize8 = Feature{ - .name = "max-private-element-size-8", + .name = "maxPrivateElementSize8", .llvm_name = "max-private-element-size-8", .description = "Maximum private access size may be 8", .dependencies = &[_]*const Feature { @@ -501,7 +501,7 @@ pub const feature_maxPrivateElementSize8 = Feature{ }; pub const feature_maxPrivateElementSize16 = Feature{ - .name = "max-private-element-size-16", + .name = "maxPrivateElementSize16", .llvm_name = "max-private-element-size-16", .description = "Maximum private access size may be 16", .dependencies = &[_]*const Feature { @@ -517,7 +517,7 @@ pub const feature_movrel = Feature{ }; pub const feature_nsaEncoding = Feature{ - .name = "nsa-encoding", + .name = "nsaEncoding", .llvm_name = "nsa-encoding", .description = "Support NSA encoding for image instructions", .dependencies = &[_]*const Feature { @@ -525,7 +525,7 @@ pub const feature_nsaEncoding = Feature{ }; pub const feature_nsaToVmemBug = Feature{ - .name = "nsa-to-vmem-bug", + .name = "nsaToVmemBug", .llvm_name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", .dependencies = &[_]*const Feature { @@ -533,7 +533,7 @@ pub const feature_nsaToVmemBug = Feature{ }; pub const feature_noDataDepHazard = Feature{ - .name = "no-data-dep-hazard", + .name = "noDataDepHazard", .llvm_name = "no-data-dep-hazard", .description = "Does not need SW waitstates", .dependencies = &[_]*const Feature { @@ -541,7 +541,7 @@ pub const feature_noDataDepHazard = Feature{ }; pub const feature_noSdstCmpx = Feature{ - .name = "no-sdst-cmpx", + .name = "noSdstCmpx", .llvm_name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", .dependencies = &[_]*const Feature { @@ -549,7 +549,7 @@ pub const feature_noSdstCmpx = Feature{ }; pub const feature_offset3fBug = Feature{ - .name = "offset-3f-bug", + .name = "offset3fBug", .llvm_name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", .dependencies = &[_]*const Feature { @@ -557,7 +557,7 @@ pub const feature_offset3fBug = Feature{ }; pub const feature_pkFmacF16Inst = Feature{ - .name = "pk-fmac-f16-inst", + .name = "pkFmacF16Inst", .llvm_name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", .dependencies = &[_]*const Feature { @@ -565,7 +565,7 @@ pub const feature_pkFmacF16Inst = Feature{ }; pub const feature_promoteAlloca = Feature{ - .name = "promote-alloca", + .name = "promoteAlloca", .llvm_name = "promote-alloca", .description = "Enable promote alloca pass", .dependencies = &[_]*const Feature { @@ -573,7 +573,7 @@ pub const feature_promoteAlloca = Feature{ }; pub const feature_r128A16 = Feature{ - .name = "r128-a16", + .name = "r128A16", .llvm_name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", .dependencies = &[_]*const Feature { @@ -581,7 +581,7 @@ pub const feature_r128A16 = Feature{ }; pub const feature_registerBanking = Feature{ - .name = "register-banking", + .name = "registerBanking", .llvm_name = "register-banking", .description = "Has register banking", .dependencies = &[_]*const Feature { @@ -597,7 +597,7 @@ pub const feature_sdwa = Feature{ }; pub const feature_sdwaMav = Feature{ - .name = "sdwa-mav", + .name = "sdwaMav", .llvm_name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { @@ -605,7 +605,7 @@ pub const feature_sdwaMav = Feature{ }; pub const feature_sdwaOmod = Feature{ - .name = "sdwa-omod", + .name = "sdwaOmod", .llvm_name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { @@ -613,7 +613,7 @@ pub const feature_sdwaOmod = Feature{ }; pub const feature_sdwaOutModsVopc = Feature{ - .name = "sdwa-out-mods-vopc", + .name = "sdwaOutModsVopc", .llvm_name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { @@ -621,7 +621,7 @@ pub const feature_sdwaOutModsVopc = Feature{ }; pub const feature_sdwaScalar = Feature{ - .name = "sdwa-scalar", + .name = "sdwaScalar", .llvm_name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { @@ -629,7 +629,7 @@ pub const feature_sdwaScalar = Feature{ }; pub const feature_sdwaSdst = Feature{ - .name = "sdwa-sdst", + .name = "sdwaSdst", .llvm_name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", .dependencies = &[_]*const Feature { @@ -637,7 +637,7 @@ pub const feature_sdwaSdst = Feature{ }; pub const feature_sgprInitBug = Feature{ - .name = "sgpr-init-bug", + .name = "sgprInitBug", .llvm_name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", .dependencies = &[_]*const Feature { @@ -645,7 +645,7 @@ pub const feature_sgprInitBug = Feature{ }; pub const feature_smemToVectorWriteHazard = Feature{ - .name = "smem-to-vector-write-hazard", + .name = "smemToVectorWriteHazard", .llvm_name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", .dependencies = &[_]*const Feature { @@ -653,7 +653,7 @@ pub const feature_smemToVectorWriteHazard = Feature{ }; pub const feature_sMemrealtime = Feature{ - .name = "s-memrealtime", + .name = "sMemrealtime", .llvm_name = "s-memrealtime", .description = "Has s_memrealtime instruction", .dependencies = &[_]*const Feature { @@ -661,7 +661,7 @@ pub const feature_sMemrealtime = Feature{ }; pub const feature_sramEcc = Feature{ - .name = "sram-ecc", + .name = "sramEcc", .llvm_name = "sram-ecc", .description = "Enable SRAM ECC", .dependencies = &[_]*const Feature { @@ -669,7 +669,7 @@ pub const feature_sramEcc = Feature{ }; pub const feature_scalarAtomics = Feature{ - .name = "scalar-atomics", + .name = "scalarAtomics", .llvm_name = "scalar-atomics", .description = "Has atomic scalar memory instructions", .dependencies = &[_]*const Feature { @@ -677,7 +677,7 @@ pub const feature_scalarAtomics = Feature{ }; pub const feature_scalarFlatScratchInsts = Feature{ - .name = "scalar-flat-scratch-insts", + .name = "scalarFlatScratchInsts", .llvm_name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", .dependencies = &[_]*const Feature { @@ -685,7 +685,7 @@ pub const feature_scalarFlatScratchInsts = Feature{ }; pub const feature_scalarStores = Feature{ - .name = "scalar-stores", + .name = "scalarStores", .llvm_name = "scalar-stores", .description = "Has store scalar memory instructions", .dependencies = &[_]*const Feature { @@ -693,7 +693,7 @@ pub const feature_scalarStores = Feature{ }; pub const feature_trapHandler = Feature{ - .name = "trap-handler", + .name = "trapHandler", .llvm_name = "trap-handler", .description = "Trap handler support", .dependencies = &[_]*const Feature { @@ -701,7 +701,7 @@ pub const feature_trapHandler = Feature{ }; pub const feature_trigReducedRange = Feature{ - .name = "trig-reduced-range", + .name = "trigReducedRange", .llvm_name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", .dependencies = &[_]*const Feature { @@ -709,7 +709,7 @@ pub const feature_trigReducedRange = Feature{ }; pub const feature_unalignedBufferAccess = Feature{ - .name = "unaligned-buffer-access", + .name = "unalignedBufferAccess", .llvm_name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", .dependencies = &[_]*const Feature { @@ -717,7 +717,7 @@ pub const feature_unalignedBufferAccess = Feature{ }; pub const feature_unalignedScratchAccess = Feature{ - .name = "unaligned-scratch-access", + .name = "unalignedScratchAccess", .llvm_name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", .dependencies = &[_]*const Feature { @@ -725,7 +725,7 @@ pub const feature_unalignedScratchAccess = Feature{ }; pub const feature_unpackedD16Vmem = Feature{ - .name = "unpacked-d16-vmem", + .name = "unpackedD16Vmem", .llvm_name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", .dependencies = &[_]*const Feature { @@ -733,7 +733,7 @@ pub const feature_unpackedD16Vmem = Feature{ }; pub const feature_vgprIndexMode = Feature{ - .name = "vgpr-index-mode", + .name = "vgprIndexMode", .llvm_name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", .dependencies = &[_]*const Feature { @@ -741,7 +741,7 @@ pub const feature_vgprIndexMode = Feature{ }; pub const feature_vmemToScalarWriteHazard = Feature{ - .name = "vmem-to-scalar-write-hazard", + .name = "vmemToScalarWriteHazard", .llvm_name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", .dependencies = &[_]*const Feature { @@ -749,7 +749,7 @@ pub const feature_vmemToScalarWriteHazard = Feature{ }; pub const feature_vop3Literal = Feature{ - .name = "vop3-literal", + .name = "vop3Literal", .llvm_name = "vop3-literal", .description = "Can use one literal in VOP3", .dependencies = &[_]*const Feature { @@ -765,7 +765,7 @@ pub const feature_vop3p = Feature{ }; pub const feature_vcmpxExecWarHazard = Feature{ - .name = "vcmpx-exec-war-hazard", + .name = "vcmpxExecWarHazard", .llvm_name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", .dependencies = &[_]*const Feature { @@ -773,7 +773,7 @@ pub const feature_vcmpxExecWarHazard = Feature{ }; pub const feature_vcmpxPermlaneHazard = Feature{ - .name = "vcmpx-permlane-hazard", + .name = "vcmpxPermlaneHazard", .llvm_name = "vcmpx-permlane-hazard", .description = "TODO: describe me", .dependencies = &[_]*const Feature { @@ -821,7 +821,7 @@ pub const feature_xnack = Feature{ }; pub const feature_halfRate64Ops = Feature{ - .name = "half-rate-64-ops", + .name = "halfRate64Ops", .llvm_name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", .dependencies = &[_]*const Feature { @@ -942,15 +942,15 @@ pub const cpu_bonaire = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -962,28 +962,28 @@ pub const cpu_carrizo = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, &feature_xnack, &feature_halfRate64Ops, }, @@ -997,28 +997,28 @@ pub const cpu_fiji = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -1031,7 +1031,7 @@ pub const cpu_generic = Cpu{ }; pub const cpu_genericHsa = Cpu{ - .name = "generic-hsa", + .name = "genericHsa", .llvm_name = "generic-hsa", .dependencies = &[_]*const Feature { &feature_flatAddressSpace, @@ -1047,40 +1047,40 @@ pub const cpu_gfx1010 = Cpu{ &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_gfx9Insts, - &feature_fastFmaf, - &feature_flatScratchInsts, - &feature_mimgR128, - &feature_noSdstCmpx, - &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_registerBanking, - &feature_movrel, - &feature_gfx8Insts, - &feature_sdwa, - &feature_noDataDepHazard, + &feature_vop3Literal, + &feature_apertureRegs, &feature_flatGlobalInsts, &feature_gfx10Insts, - &feature_localmemorysize65536, &feature_BitInsts16, - &feature_addNoCarryInsts, &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_dpp8, + &feature_flatScratchInsts, &feature_flatInstOffsets, + &feature_mimgR128, + &feature_sdwa, &feature_fmaMixInsts, - &feature_sdwaScalar, - &feature_inv2piInlineImm, + &feature_sMemrealtime, &feature_vscnt, - &feature_apertureRegs, - &feature_dpp8, - &feature_noSramEccSupport, + &feature_fastFmaf, + &feature_registerBanking, + &feature_gfx9Insts, + &feature_sdwaSdst, + &feature_noSdstCmpx, &feature_fp64, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaScalar, + &feature_sdwaOmod, + &feature_noDataDepHazard, &feature_ciInsts, - &feature_vop3Literal, + &feature_addNoCarryInsts, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1111,40 +1111,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_gfx9Insts, - &feature_fastFmaf, - &feature_flatScratchInsts, - &feature_mimgR128, - &feature_noSdstCmpx, - &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_registerBanking, - &feature_movrel, - &feature_gfx8Insts, - &feature_sdwa, - &feature_noDataDepHazard, + &feature_vop3Literal, + &feature_apertureRegs, &feature_flatGlobalInsts, &feature_gfx10Insts, - &feature_localmemorysize65536, &feature_BitInsts16, - &feature_addNoCarryInsts, &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_dpp8, + &feature_flatScratchInsts, &feature_flatInstOffsets, + &feature_mimgR128, + &feature_sdwa, &feature_fmaMixInsts, - &feature_sdwaScalar, - &feature_inv2piInlineImm, + &feature_sMemrealtime, &feature_vscnt, - &feature_apertureRegs, - &feature_dpp8, - &feature_noSramEccSupport, + &feature_fastFmaf, + &feature_registerBanking, + &feature_gfx9Insts, + &feature_sdwaSdst, + &feature_noSdstCmpx, &feature_fp64, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaScalar, + &feature_sdwaOmod, + &feature_noDataDepHazard, &feature_ciInsts, - &feature_vop3Literal, + &feature_addNoCarryInsts, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1174,40 +1174,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_gfx9Insts, - &feature_fastFmaf, - &feature_flatScratchInsts, - &feature_mimgR128, - &feature_noSdstCmpx, - &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_registerBanking, - &feature_movrel, - &feature_gfx8Insts, - &feature_sdwa, - &feature_noDataDepHazard, + &feature_vop3Literal, + &feature_apertureRegs, &feature_flatGlobalInsts, &feature_gfx10Insts, - &feature_localmemorysize65536, &feature_BitInsts16, - &feature_addNoCarryInsts, &feature_pkFmacF16Inst, + &feature_vop3p, + &feature_flatAddressSpace, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_dpp8, + &feature_flatScratchInsts, &feature_flatInstOffsets, + &feature_mimgR128, + &feature_sdwa, &feature_fmaMixInsts, - &feature_sdwaScalar, - &feature_inv2piInlineImm, + &feature_sMemrealtime, &feature_vscnt, - &feature_apertureRegs, - &feature_dpp8, - &feature_noSramEccSupport, + &feature_fastFmaf, + &feature_registerBanking, + &feature_gfx9Insts, + &feature_sdwaSdst, + &feature_noSdstCmpx, &feature_fp64, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaScalar, + &feature_sdwaOmod, + &feature_noDataDepHazard, &feature_ciInsts, - &feature_vop3Literal, + &feature_addNoCarryInsts, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1236,11 +1236,11 @@ pub const cpu_gfx600 = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, &feature_halfRate64Ops, }, }; @@ -1254,11 +1254,11 @@ pub const cpu_gfx601 = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, }, }; @@ -1270,15 +1270,15 @@ pub const cpu_gfx700 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1291,15 +1291,15 @@ pub const cpu_gfx701 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, &feature_halfRate64Ops, }, }; @@ -1313,15 +1313,15 @@ pub const cpu_gfx702 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount16, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1333,15 +1333,15 @@ pub const cpu_gfx703 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount16, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1353,15 +1353,15 @@ pub const cpu_gfx704 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1373,28 +1373,28 @@ pub const cpu_gfx801 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, &feature_xnack, &feature_halfRate64Ops, }, @@ -1409,28 +1409,28 @@ pub const cpu_gfx802 = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -1442,28 +1442,28 @@ pub const cpu_gfx803 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -1473,28 +1473,28 @@ pub const cpu_gfx810 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, &feature_xnack, }, }; @@ -1506,36 +1506,36 @@ pub const cpu_gfx900 = Cpu{ &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, }, @@ -1547,36 +1547,36 @@ pub const cpu_gfx902 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1591,36 +1591,36 @@ pub const cpu_gfx904 = Cpu{ &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, }, }; @@ -1635,36 +1635,36 @@ pub const cpu_gfx906 = Cpu{ &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_halfRate64Ops, }, @@ -1684,36 +1684,36 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_maiInsts, &feature_mfmaInlineLiteralBug, @@ -1728,36 +1728,36 @@ pub const cpu_gfx909 = Cpu{ .llvm_name = "gfx909", .dependencies = &[_]*const Feature { &feature_codeObjectV3, - &feature_sdwaOmod, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_apertureRegs, + &feature_flatGlobalInsts, + &feature_BitInsts16, + &feature_vop3p, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_gfx9Insts, - &feature_r128A16, - &feature_fastFmaf, - &feature_wavefrontsize64, + &feature_dpp, + &feature_inv2piInlineImm, + &feature_sdwa, &feature_flatScratchInsts, + &feature_flatInstOffsets, + &feature_scalarFlatScratchInsts, + &feature_sMemrealtime, + &feature_fastFmaf, + &feature_gfx9Insts, &feature_sdwaSdst, - &feature_vop3p, - &feature_intClampInsts, - &feature_dpp, - &feature_scalarAtomics, - &feature_gcn3Encoding, - &feature_gfx8Insts, + &feature_vgprIndexMode, + &feature_fp64, &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwa, - &feature_flatGlobalInsts, + &feature_gfx8Insts, &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_flatInstOffsets, + &feature_intClampInsts, &feature_sdwaScalar, - &feature_inv2piInlineImm, - &feature_apertureRegs, - &feature_fp64, + &feature_sdwaOmod, + &feature_scalarAtomics, + &feature_r128A16, + &feature_wavefrontsize64, &feature_ciInsts, - &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_gcn3Encoding, + &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1773,11 +1773,11 @@ pub const cpu_hainan = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, }, }; @@ -1790,15 +1790,15 @@ pub const cpu_hawaii = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, &feature_halfRate64Ops, }, }; @@ -1812,28 +1812,28 @@ pub const cpu_iceland = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -1845,15 +1845,15 @@ pub const cpu_kabini = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount16, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1865,15 +1865,15 @@ pub const cpu_kaveri = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1885,15 +1885,15 @@ pub const cpu_mullins = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount16, &feature_movrel, - &feature_flatAddressSpace, &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, &feature_wavefrontsize64, + &feature_ciInsts, + &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, + &feature_flatAddressSpace, &feature_localmemorysize65536, - &feature_fp64, - &feature_ciInsts, }, }; @@ -1906,11 +1906,11 @@ pub const cpu_oland = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, }, }; @@ -1923,11 +1923,11 @@ pub const cpu_pitcairn = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, }, }; @@ -1939,28 +1939,28 @@ pub const cpu_polaris10 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -1972,28 +1972,28 @@ pub const cpu_polaris11 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -2003,28 +2003,28 @@ pub const cpu_stoney = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, &feature_xnack, }, }; @@ -2039,11 +2039,11 @@ pub const cpu_tahiti = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, &feature_halfRate64Ops, }, }; @@ -2057,28 +2057,28 @@ pub const cpu_tonga = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_sMemrealtime, - &feature_scalarStores, + &feature_BitInsts16, &feature_flatAddressSpace, - &feature_vgprIndexMode, - &feature_wavefrontsize64, - &feature_mimgR128, - &feature_intClampInsts, &feature_dpp, - &feature_movrel, - &feature_gcn3Encoding, - &feature_gfx8Insts, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_sdwaMav, &feature_sdwa, - &feature_localmemorysize65536, - &feature_BitInsts16, - &feature_sdwaOutModsVopc, + &feature_mimgR128, &feature_inv2piInlineImm, - &feature_noSramEccSupport, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_trigReducedRange, + &feature_vgprIndexMode, &feature_fp64, + &feature_gfx7Gfx8Gfx9Insts, + &feature_noSramEccSupport, + &feature_gfx8Insts, + &feature_localmemorysize65536, + &feature_movrel, + &feature_intClampInsts, + &feature_sdwaMav, + &feature_wavefrontsize64, &feature_ciInsts, + &feature_scalarStores, + &feature_gcn3Encoding, }, }; @@ -2091,11 +2091,11 @@ pub const cpu_verde = Cpu{ &feature_ldsbankcount32, &feature_movrel, &feature_trigReducedRange, - &feature_mimgR128, - &feature_localmemorysize32768, &feature_wavefrontsize64, - &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_fp64, + &feature_noSramEccSupport, + &feature_mimgR128, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 6152346468cceff773e7f9cad6e441432413267e..9861a1ff56f7c9265e198f58eb0945057c26d434 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_msecext8 = Feature{ - .name = "8msecext", + .name = "msecext8", .llvm_name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", .dependencies = &[_]*const Feature { @@ -28,7 +28,7 @@ pub const feature_aes = Feature{ }; pub const feature_acquireRelease = Feature{ - .name = "acquire-release", + .name = "acquireRelease", .llvm_name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", .dependencies = &[_]*const Feature { @@ -36,7 +36,7 @@ pub const feature_acquireRelease = Feature{ }; pub const feature_avoidMovsShop = Feature{ - .name = "avoid-movs-shop", + .name = "avoidMovsShop", .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", .dependencies = &[_]*const Feature { @@ -44,7 +44,7 @@ pub const feature_avoidMovsShop = Feature{ }; pub const feature_avoidPartialCpsr = Feature{ - .name = "avoid-partial-cpsr", + .name = "avoidPartialCpsr", .llvm_name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", .dependencies = &[_]*const Feature { @@ -60,7 +60,7 @@ pub const feature_crc = Feature{ }; pub const feature_cheapPredicableCpsr = Feature{ - .name = "cheap-predicable-cpsr", + .name = "cheapPredicableCpsr", .llvm_name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", .dependencies = &[_]*const Feature { @@ -68,7 +68,7 @@ pub const feature_cheapPredicableCpsr = Feature{ }; pub const feature_vldnAlign = Feature{ - .name = "vldn-align", + .name = "vldnAlign", .llvm_name = "vldn-align", .description = "Check for VLDn unaligned access", .dependencies = &[_]*const Feature { @@ -118,7 +118,7 @@ pub const feature_dsp = Feature{ }; pub const feature_dontWidenVmovs = Feature{ - .name = "dont-widen-vmovs", + .name = "dontWidenVmovs", .llvm_name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", .dependencies = &[_]*const Feature { @@ -136,7 +136,7 @@ pub const feature_dotprod = Feature{ }; pub const feature_executeOnly = Feature{ - .name = "execute-only", + .name = "executeOnly", .llvm_name = "execute-only", .description = "Enable the generation of execute only code.", .dependencies = &[_]*const Feature { @@ -144,7 +144,7 @@ pub const feature_executeOnly = Feature{ }; pub const feature_expandFpMlx = Feature{ - .name = "expand-fp-mlx", + .name = "expandFpMlx", .llvm_name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", .dependencies = &[_]*const Feature { @@ -164,8 +164,8 @@ pub const feature_fp16fml = Feature{ .llvm_name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; @@ -187,44 +187,44 @@ pub const feature_fpao = Feature{ }; pub const feature_fpArmv8 = Feature{ - .name = "fp-armv8", + .name = "fpArmv8", .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_d32, &feature_fpregs, + &feature_fp16, }, }; pub const feature_fpArmv8d16 = Feature{ - .name = "fp-armv8d16", + .name = "fpArmv8d16", .llvm_name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; pub const feature_fpArmv8d16sp = Feature{ - .name = "fp-armv8d16sp", + .name = "fpArmv8d16sp", .llvm_name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; pub const feature_fpArmv8sp = Feature{ - .name = "fp-armv8sp", + .name = "fpArmv8sp", .llvm_name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_d32, &feature_fpregs, + &feature_fp16, }, }; @@ -259,13 +259,13 @@ pub const feature_fullfp16 = Feature{ .llvm_name = "fullfp16", .description = "Enable full half-precision floating point", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; pub const feature_fuseAes = Feature{ - .name = "fuse-aes", + .name = "fuseAes", .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", .dependencies = &[_]*const Feature { @@ -273,7 +273,7 @@ pub const feature_fuseAes = Feature{ }; pub const feature_fuseLiterals = Feature{ - .name = "fuse-literals", + .name = "fuseLiterals", .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", .dependencies = &[_]*const Feature { @@ -281,7 +281,7 @@ pub const feature_fuseLiterals = Feature{ }; pub const feature_hwdivArm = Feature{ - .name = "hwdiv-arm", + .name = "hwdivArm", .llvm_name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", .dependencies = &[_]*const Feature { @@ -297,7 +297,7 @@ pub const feature_hwdiv = Feature{ }; pub const feature_noBranchPredictor = Feature{ - .name = "no-branch-predictor", + .name = "noBranchPredictor", .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", .dependencies = &[_]*const Feature { @@ -305,7 +305,7 @@ pub const feature_noBranchPredictor = Feature{ }; pub const feature_retAddrStack = Feature{ - .name = "ret-addr-stack", + .name = "retAddrStack", .llvm_name = "ret-addr-stack", .description = "Has return address stack", .dependencies = &[_]*const Feature { @@ -321,7 +321,7 @@ pub const feature_slowfpvmlx = Feature{ }; pub const feature_vmlxHazards = Feature{ - .name = "vmlx-hazards", + .name = "vmlxHazards", .llvm_name = "vmlx-hazards", .description = "Has VMLx hazards", .dependencies = &[_]*const Feature { @@ -337,7 +337,7 @@ pub const feature_lob = Feature{ }; pub const feature_longCalls = Feature{ - .name = "long-calls", + .name = "longCalls", .llvm_name = "long-calls", .description = "Generate calls via indirect call instructions", .dependencies = &[_]*const Feature { @@ -385,7 +385,7 @@ pub const feature_mve4beat = Feature{ }; pub const feature_muxedUnits = Feature{ - .name = "muxed-units", + .name = "muxedUnits", .llvm_name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", .dependencies = &[_]*const Feature { @@ -411,7 +411,7 @@ pub const feature_neonfp = Feature{ }; pub const feature_neonFpmovs = Feature{ - .name = "neon-fpmovs", + .name = "neonFpmovs", .llvm_name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", .dependencies = &[_]*const Feature { @@ -419,7 +419,7 @@ pub const feature_neonFpmovs = Feature{ }; pub const feature_naclTrap = Feature{ - .name = "nacl-trap", + .name = "naclTrap", .llvm_name = "nacl-trap", .description = "NaCl trap", .dependencies = &[_]*const Feature { @@ -435,7 +435,7 @@ pub const feature_noarm = Feature{ }; pub const feature_noMovt = Feature{ - .name = "no-movt", + .name = "noMovt", .llvm_name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", .dependencies = &[_]*const Feature { @@ -443,7 +443,7 @@ pub const feature_noMovt = Feature{ }; pub const feature_noNegImmediates = Feature{ - .name = "no-neg-immediates", + .name = "noNegImmediates", .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", .dependencies = &[_]*const Feature { @@ -451,7 +451,7 @@ pub const feature_noNegImmediates = Feature{ }; pub const feature_disablePostraScheduler = Feature{ - .name = "disable-postra-scheduler", + .name = "disablePostraScheduler", .llvm_name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", .dependencies = &[_]*const Feature { @@ -459,7 +459,7 @@ pub const feature_disablePostraScheduler = Feature{ }; pub const feature_nonpipelinedVfp = Feature{ - .name = "nonpipelined-vfp", + .name = "nonpipelinedVfp", .llvm_name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", .dependencies = &[_]*const Feature { @@ -475,7 +475,7 @@ pub const feature_perfmon = Feature{ }; pub const feature_bit32 = Feature{ - .name = "32bit", + .name = "bit32", .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", .dependencies = &[_]*const Feature { @@ -483,7 +483,7 @@ pub const feature_bit32 = Feature{ }; pub const feature_preferIshst = Feature{ - .name = "prefer-ishst", + .name = "preferIshst", .llvm_name = "prefer-ishst", .description = "Prefer ISHST barriers", .dependencies = &[_]*const Feature { @@ -491,7 +491,7 @@ pub const feature_preferIshst = Feature{ }; pub const feature_loopAlign = Feature{ - .name = "loop-align", + .name = "loopAlign", .llvm_name = "loop-align", .description = "Prefer 32-bit alignment for loops", .dependencies = &[_]*const Feature { @@ -499,7 +499,7 @@ pub const feature_loopAlign = Feature{ }; pub const feature_preferVmovsr = Feature{ - .name = "prefer-vmovsr", + .name = "preferVmovsr", .llvm_name = "prefer-vmovsr", .description = "Prefer VMOVSR", .dependencies = &[_]*const Feature { @@ -507,7 +507,7 @@ pub const feature_preferVmovsr = Feature{ }; pub const feature_profUnpr = Feature{ - .name = "prof-unpr", + .name = "profUnpr", .llvm_name = "prof-unpr", .description = "Is profitable to unpredicate", .dependencies = &[_]*const Feature { @@ -531,7 +531,7 @@ pub const feature_rclass = Feature{ }; pub const feature_readTpHard = Feature{ - .name = "read-tp-hard", + .name = "readTpHard", .llvm_name = "read-tp-hard", .description = "Reading thread pointer from register", .dependencies = &[_]*const Feature { @@ -539,7 +539,7 @@ pub const feature_readTpHard = Feature{ }; pub const feature_reserveR9 = Feature{ - .name = "reserve-r9", + .name = "reserveR9", .llvm_name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", .dependencies = &[_]*const Feature { @@ -565,7 +565,7 @@ pub const feature_sha2 = Feature{ }; pub const feature_slowFpBrcc = Feature{ - .name = "slow-fp-brcc", + .name = "slowFpBrcc", .llvm_name = "slow-fp-brcc", .description = "FP compare + branch is slow", .dependencies = &[_]*const Feature { @@ -573,7 +573,7 @@ pub const feature_slowFpBrcc = Feature{ }; pub const feature_slowLoadDSubreg = Feature{ - .name = "slow-load-D-subreg", + .name = "slowLoadDSubreg", .llvm_name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", .dependencies = &[_]*const Feature { @@ -581,7 +581,7 @@ pub const feature_slowLoadDSubreg = Feature{ }; pub const feature_slowOddReg = Feature{ - .name = "slow-odd-reg", + .name = "slowOddReg", .llvm_name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", .dependencies = &[_]*const Feature { @@ -589,7 +589,7 @@ pub const feature_slowOddReg = Feature{ }; pub const feature_slowVdup32 = Feature{ - .name = "slow-vdup32", + .name = "slowVdup32", .llvm_name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", .dependencies = &[_]*const Feature { @@ -597,7 +597,7 @@ pub const feature_slowVdup32 = Feature{ }; pub const feature_slowVgetlni32 = Feature{ - .name = "slow-vgetlni32", + .name = "slowVgetlni32", .llvm_name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", .dependencies = &[_]*const Feature { @@ -605,7 +605,7 @@ pub const feature_slowVgetlni32 = Feature{ }; pub const feature_splatVfpNeon = Feature{ - .name = "splat-vfp-neon", + .name = "splatVfpNeon", .llvm_name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", .dependencies = &[_]*const Feature { @@ -614,7 +614,7 @@ pub const feature_splatVfpNeon = Feature{ }; pub const feature_strictAlign = Feature{ - .name = "strict-align", + .name = "strictAlign", .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", .dependencies = &[_]*const Feature { @@ -638,7 +638,7 @@ pub const feature_trustzone = Feature{ }; pub const feature_useAa = Feature{ - .name = "use-aa", + .name = "useAa", .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { @@ -646,7 +646,7 @@ pub const feature_useAa = Feature{ }; pub const feature_useMisched = Feature{ - .name = "use-misched", + .name = "useMisched", .llvm_name = "use-misched", .description = "Use the MachineScheduler", .dependencies = &[_]*const Feature { @@ -654,7 +654,7 @@ pub const feature_useMisched = Feature{ }; pub const feature_wideStrideVfp = Feature{ - .name = "wide-stride-vfp", + .name = "wideStrideVfp", .llvm_name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", .dependencies = &[_]*const Feature { @@ -730,9 +730,9 @@ pub const feature_vfp4 = Feature{ .llvm_name = "vfp4", .description = "Enable VFP4 instructions", .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, + &feature_fp16, }, }; @@ -741,8 +741,8 @@ pub const feature_vfp4d16 = Feature{ .llvm_name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; @@ -751,8 +751,8 @@ pub const feature_vfp4d16sp = Feature{ .llvm_name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { - &feature_fp16, &feature_fpregs, + &feature_fp16, }, }; @@ -761,14 +761,14 @@ pub const feature_vfp4sp = Feature{ .llvm_name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_d32, &feature_fpregs, + &feature_d32, + &feature_fp16, }, }; pub const feature_vmlxForwarding = Feature{ - .name = "vmlx-forwarding", + .name = "vmlxForwarding", .llvm_name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", .dependencies = &[_]*const Feature { @@ -925,7 +925,7 @@ pub const cpu_arm10tdmi = Cpu{ }; pub const cpu_arm1136jS = Cpu{ - .name = "arm1136j-s", + .name = "arm1136jS", .llvm_name = "arm1136j-s", .dependencies = &[_]*const Feature { &feature_dsp, @@ -933,7 +933,7 @@ pub const cpu_arm1136jS = Cpu{ }; pub const cpu_arm1136jfS = Cpu{ - .name = "arm1136jf-s", + .name = "arm1136jfS", .llvm_name = "arm1136jf-s", .dependencies = &[_]*const Feature { &feature_dsp, @@ -944,20 +944,20 @@ pub const cpu_arm1136jfS = Cpu{ }; pub const cpu_arm1156t2S = Cpu{ - .name = "arm1156t2-s", + .name = "arm1156t2S", .llvm_name = "arm1156t2-s", .dependencies = &[_]*const Feature { - &feature_dsp, &feature_thumb2, + &feature_dsp, }, }; pub const cpu_arm1156t2fS = Cpu{ - .name = "arm1156t2f-s", + .name = "arm1156t2fS", .llvm_name = "arm1156t2f-s", .dependencies = &[_]*const Feature { - &feature_dsp, &feature_thumb2, + &feature_dsp, &feature_slowfpvmlx, &feature_fpregs, &feature_vfp2, @@ -965,7 +965,7 @@ pub const cpu_arm1156t2fS = Cpu{ }; pub const cpu_arm1176jS = Cpu{ - .name = "arm1176j-s", + .name = "arm1176jS", .llvm_name = "arm1176j-s", .dependencies = &[_]*const Feature { &feature_trustzone, @@ -973,7 +973,7 @@ pub const cpu_arm1176jS = Cpu{ }; pub const cpu_arm1176jzS = Cpu{ - .name = "arm1176jz-s", + .name = "arm1176jzS", .llvm_name = "arm1176jz-s", .dependencies = &[_]*const Feature { &feature_trustzone, @@ -981,7 +981,7 @@ pub const cpu_arm1176jzS = Cpu{ }; pub const cpu_arm1176jzfS = Cpu{ - .name = "arm1176jzf-s", + .name = "arm1176jzfS", .llvm_name = "arm1176jzf-s", .dependencies = &[_]*const Feature { &feature_trustzone, @@ -1013,7 +1013,7 @@ pub const cpu_arm7tdmi = Cpu{ }; pub const cpu_arm7tdmiS = Cpu{ - .name = "arm7tdmi-s", + .name = "arm7tdmiS", .llvm_name = "arm7tdmi-s", .dependencies = &[_]*const Feature { }, @@ -1062,7 +1062,7 @@ pub const cpu_arm922t = Cpu{ }; pub const cpu_arm926ejS = Cpu{ - .name = "arm926ej-s", + .name = "arm926ejS", .llvm_name = "arm926ej-s", .dependencies = &[_]*const Feature { }, @@ -1076,21 +1076,21 @@ pub const cpu_arm940t = Cpu{ }; pub const cpu_arm946eS = Cpu{ - .name = "arm946e-s", + .name = "arm946eS", .llvm_name = "arm946e-s", .dependencies = &[_]*const Feature { }, }; pub const cpu_arm966eS = Cpu{ - .name = "arm966e-s", + .name = "arm966eS", .llvm_name = "arm966e-s", .dependencies = &[_]*const Feature { }, }; pub const cpu_arm968eS = Cpu{ - .name = "arm968e-s", + .name = "arm968eS", .llvm_name = "arm968e-s", .dependencies = &[_]*const Feature { }, @@ -1111,17 +1111,17 @@ pub const cpu_arm9tdmi = Cpu{ }; pub const cpu_cortexA12 = Cpu{ - .name = "cortex-a12", + .name = "cortexA12", .llvm_name = "cortex-a12", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1136,17 +1136,17 @@ pub const cpu_cortexA12 = Cpu{ }; pub const cpu_cortexA15 = Cpu{ - .name = "cortex-a15", + .name = "cortexA15", .llvm_name = "cortex-a15", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_dontWidenVmovs, @@ -1164,17 +1164,17 @@ pub const cpu_cortexA15 = Cpu{ }; pub const cpu_cortexA17 = Cpu{ - .name = "cortex-a17", + .name = "cortexA17", .llvm_name = "cortex-a17", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1189,63 +1189,63 @@ pub const cpu_cortexA17 = Cpu{ }; pub const cpu_cortexA32 = Cpu{ - .name = "cortex-a32", + .name = "cortexA32", .llvm_name = "cortex-a32", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, }, }; pub const cpu_cortexA35 = Cpu{ - .name = "cortex-a35", + .name = "cortexA35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, }, }; pub const cpu_cortexA5 = Cpu{ - .name = "cortex-a5", + .name = "cortexA5", .llvm_name = "cortex-a5", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_mp, @@ -1258,72 +1258,72 @@ pub const cpu_cortexA5 = Cpu{ }; pub const cpu_cortexA53 = Cpu{ - .name = "cortex-a53", + .name = "cortexA53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, &feature_fpao, }, }; pub const cpu_cortexA55 = Cpu{ - .name = "cortex-a55", + .name = "cortexA55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_dotprod, }, }; pub const cpu_cortexA57 = Cpu{ - .name = "cortex-a57", + .name = "cortexA57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, &feature_crypto, @@ -1332,17 +1332,17 @@ pub const cpu_cortexA57 = Cpu{ }; pub const cpu_cortexA7 = Cpu{ - .name = "cortex-a7", + .name = "cortexA7", .llvm_name = "cortex-a7", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1359,95 +1359,95 @@ pub const cpu_cortexA7 = Cpu{ }; pub const cpu_cortexA72 = Cpu{ - .name = "cortex-a72", + .name = "cortexA72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, }, }; pub const cpu_cortexA73 = Cpu{ - .name = "cortex-a73", + .name = "cortexA73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, }, }; pub const cpu_cortexA75 = Cpu{ - .name = "cortex-a75", + .name = "cortexA75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_dotprod, }, }; pub const cpu_cortexA76 = Cpu{ - .name = "cortex-a76", + .name = "cortexA76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1455,25 +1455,25 @@ pub const cpu_cortexA76 = Cpu{ }; pub const cpu_cortexA76ae = Cpu{ - .name = "cortex-a76ae", + .name = "cortexA76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1481,17 +1481,17 @@ pub const cpu_cortexA76ae = Cpu{ }; pub const cpu_cortexA8 = Cpu{ - .name = "cortex-a8", + .name = "cortexA8", .llvm_name = "cortex-a8", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1503,17 +1503,17 @@ pub const cpu_cortexA8 = Cpu{ }; pub const cpu_cortexA9 = Cpu{ - .name = "cortex-a9", + .name = "cortexA9", .llvm_name = "cortex-a9", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_expandFpMlx, @@ -1530,65 +1530,65 @@ pub const cpu_cortexA9 = Cpu{ }; pub const cpu_cortexM0 = Cpu{ - .name = "cortex-m0", + .name = "cortexM0", .llvm_name = "cortex-m0", .dependencies = &[_]*const Feature { - &feature_db, - &feature_strictAlign, &feature_noarm, + &feature_strictAlign, &feature_mclass, + &feature_db, }, }; pub const cpu_cortexM0plus = Cpu{ - .name = "cortex-m0plus", + .name = "cortexM0plus", .llvm_name = "cortex-m0plus", .dependencies = &[_]*const Feature { - &feature_db, - &feature_strictAlign, &feature_noarm, + &feature_strictAlign, &feature_mclass, + &feature_db, }, }; pub const cpu_cortexM1 = Cpu{ - .name = "cortex-m1", + .name = "cortexM1", .llvm_name = "cortex-m1", .dependencies = &[_]*const Feature { - &feature_db, - &feature_strictAlign, &feature_noarm, + &feature_strictAlign, &feature_mclass, + &feature_db, }, }; pub const cpu_cortexM23 = Cpu{ - .name = "cortex-m23", + .name = "cortexM23", .llvm_name = "cortex-m23", .dependencies = &[_]*const Feature { - &feature_db, - &feature_strictAlign, + &feature_noarm, &feature_acquireRelease, &feature_v7clrex, - &feature_noarm, + &feature_strictAlign, &feature_mclass, &feature_hwdiv, &feature_msecext8, + &feature_db, &feature_noMovt, }, }; pub const cpu_cortexM3 = Cpu{ - .name = "cortex-m3", + .name = "cortexM3", .llvm_name = "cortex-m3", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, - &feature_v7clrex, + &feature_thumb2, &feature_noarm, + &feature_v7clrex, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_noBranchPredictor, &feature_loopAlign, &feature_useAa, @@ -1597,21 +1597,21 @@ pub const cpu_cortexM3 = Cpu{ }; pub const cpu_cortexM33 = Cpu{ - .name = "cortex-m33", + .name = "cortexM33", .llvm_name = "cortex-m33", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_noarm, &feature_acquireRelease, &feature_v7clrex, - &feature_noarm, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, &feature_msecext8, + &feature_db, &feature_dsp, - &feature_fp16, &feature_fpregs, + &feature_fp16, &feature_fpArmv8d16sp, &feature_noBranchPredictor, &feature_slowfpvmlx, @@ -1622,21 +1622,21 @@ pub const cpu_cortexM33 = Cpu{ }; pub const cpu_cortexM35p = Cpu{ - .name = "cortex-m35p", + .name = "cortexM35p", .llvm_name = "cortex-m35p", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_noarm, &feature_acquireRelease, &feature_v7clrex, - &feature_noarm, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, &feature_msecext8, + &feature_db, &feature_dsp, - &feature_fp16, &feature_fpregs, + &feature_fp16, &feature_fpArmv8d16sp, &feature_noBranchPredictor, &feature_slowfpvmlx, @@ -1647,73 +1647,73 @@ pub const cpu_cortexM35p = Cpu{ }; pub const cpu_cortexM4 = Cpu{ - .name = "cortex-m4", + .name = "cortexM4", .llvm_name = "cortex-m4", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, - &feature_v7clrex, + &feature_thumb2, &feature_dsp, &feature_noarm, + &feature_v7clrex, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_noBranchPredictor, &feature_slowfpvmlx, &feature_loopAlign, &feature_useAa, &feature_useMisched, - &feature_fp16, &feature_fpregs, + &feature_fp16, &feature_vfp4d16sp, }, }; pub const cpu_cortexM7 = Cpu{ - .name = "cortex-m7", + .name = "cortexM7", .llvm_name = "cortex-m7", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, - &feature_v7clrex, + &feature_thumb2, &feature_dsp, &feature_noarm, + &feature_v7clrex, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, - &feature_fp16, + &feature_db, &feature_fpregs, + &feature_fp16, &feature_fpArmv8d16, }, }; pub const cpu_cortexR4 = Cpu{ - .name = "cortex-r4", + .name = "cortexR4", .llvm_name = "cortex-r4", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_dsp, &feature_rclass, &feature_v7clrex, - &feature_dsp, + &feature_perfmon, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, }, }; pub const cpu_cortexR4f = Cpu{ - .name = "cortex-r4f", + .name = "cortexR4f", .llvm_name = "cortex-r4f", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_dsp, &feature_rclass, &feature_v7clrex, - &feature_dsp, + &feature_perfmon, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1724,16 +1724,16 @@ pub const cpu_cortexR4f = Cpu{ }; pub const cpu_cortexR5 = Cpu{ - .name = "cortex-r5", + .name = "cortexR5", .llvm_name = "cortex-r5", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_dsp, &feature_rclass, &feature_v7clrex, - &feature_dsp, + &feature_perfmon, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_avoidPartialCpsr, &feature_hwdivArm, &feature_retAddrStack, @@ -1745,24 +1745,24 @@ pub const cpu_cortexR5 = Cpu{ }; pub const cpu_cortexR52 = Cpu{ - .name = "cortex-r52", + .name = "cortexR52", .llvm_name = "cortex-r52", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_rclass, - &feature_acquireRelease, - &feature_mp, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_crc, - &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, &feature_dfb, + &feature_rclass, + &feature_v7clrex, + &feature_hwdivArm, + &feature_acquireRelease, + &feature_perfmon, + &feature_crc, + &feature_mp, + &feature_hwdiv, + &feature_d32, + &feature_fp16, + &feature_db, &feature_fpao, &feature_useAa, &feature_useMisched, @@ -1770,16 +1770,16 @@ pub const cpu_cortexR52 = Cpu{ }; pub const cpu_cortexR7 = Cpu{ - .name = "cortex-r7", + .name = "cortexR7", .llvm_name = "cortex-r7", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_dsp, &feature_rclass, &feature_v7clrex, - &feature_dsp, + &feature_perfmon, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1793,16 +1793,16 @@ pub const cpu_cortexR7 = Cpu{ }; pub const cpu_cortexR8 = Cpu{ - .name = "cortex-r8", + .name = "cortexR8", .llvm_name = "cortex-r8", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, + &feature_dsp, &feature_rclass, &feature_v7clrex, - &feature_dsp, + &feature_perfmon, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1819,21 +1819,21 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_crypto, @@ -1855,183 +1855,183 @@ pub const cpu_ep9312 = Cpu{ }; pub const cpu_exynosM1 = Cpu{ - .name = "exynos-m1", + .name = "exynosM1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_expandFpMlx, - &feature_fuseLiterals, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_wideStrideVfp, &feature_profUnpr, - &feature_slowVdup32, &feature_slowfpvmlx, - &feature_dontWidenVmovs, + &feature_slowFpBrcc, &feature_useAa, + &feature_dontWidenVmovs, &feature_retAddrStack, + &feature_fuseLiterals, + &feature_wideStrideVfp, &feature_zcz, - &feature_slowFpBrcc, + &feature_fuseAes, + &feature_slowVdup32, }, }; pub const cpu_exynosM2 = Cpu{ - .name = "exynos-m2", + .name = "exynosM2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_expandFpMlx, - &feature_fuseLiterals, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_wideStrideVfp, &feature_profUnpr, - &feature_slowVdup32, &feature_slowfpvmlx, - &feature_dontWidenVmovs, + &feature_slowFpBrcc, &feature_useAa, + &feature_dontWidenVmovs, &feature_retAddrStack, + &feature_fuseLiterals, + &feature_wideStrideVfp, &feature_zcz, - &feature_slowFpBrcc, + &feature_fuseAes, + &feature_slowVdup32, }, }; pub const cpu_exynosM3 = Cpu{ - .name = "exynos-m3", + .name = "exynosM3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_expandFpMlx, - &feature_fuseLiterals, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_wideStrideVfp, &feature_profUnpr, - &feature_slowVdup32, &feature_slowfpvmlx, - &feature_dontWidenVmovs, + &feature_slowFpBrcc, &feature_useAa, + &feature_dontWidenVmovs, &feature_retAddrStack, + &feature_fuseLiterals, + &feature_wideStrideVfp, &feature_zcz, - &feature_slowFpBrcc, + &feature_fuseAes, + &feature_slowVdup32, }, }; pub const cpu_exynosM4 = Cpu{ - .name = "exynos-m4", + .name = "exynosM4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_dotprod, &feature_fullfp16, &feature_expandFpMlx, - &feature_fuseLiterals, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_wideStrideVfp, &feature_profUnpr, - &feature_slowVdup32, &feature_slowfpvmlx, - &feature_dontWidenVmovs, + &feature_slowFpBrcc, &feature_useAa, + &feature_dontWidenVmovs, &feature_retAddrStack, + &feature_fuseLiterals, + &feature_wideStrideVfp, &feature_zcz, - &feature_slowFpBrcc, + &feature_fuseAes, + &feature_slowVdup32, }, }; pub const cpu_exynosM5 = Cpu{ - .name = "exynos-m5", + .name = "exynosM5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_dotprod, &feature_fullfp16, &feature_expandFpMlx, - &feature_fuseLiterals, - &feature_fuseAes, &feature_slowVgetlni32, - &feature_wideStrideVfp, &feature_profUnpr, - &feature_slowVdup32, &feature_slowfpvmlx, - &feature_dontWidenVmovs, + &feature_slowFpBrcc, &feature_useAa, + &feature_dontWidenVmovs, &feature_retAddrStack, + &feature_fuseLiterals, + &feature_wideStrideVfp, &feature_zcz, - &feature_slowFpBrcc, + &feature_fuseAes, + &feature_slowVdup32, }, }; @@ -2053,14 +2053,14 @@ pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_fp16, @@ -2077,21 +2077,21 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, }, }; @@ -2114,25 +2114,25 @@ pub const cpu_mpcorenovfp = Cpu{ }; pub const cpu_neoverseN1 = Cpu{ - .name = "neoverse-n1", + .name = "neoverseN1", .llvm_name = "neoverse-n1", .dependencies = &[_]*const Feature { - &feature_ras, - &feature_db, &feature_trustzone, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, + &feature_dsp, + &feature_ras, + &feature_v7clrex, + &feature_hwdivArm, &feature_acquireRelease, + &feature_aclass, + &feature_perfmon, + &feature_crc, &feature_mp, + &feature_hwdiv, &feature_d32, - &feature_v7clrex, - &feature_dsp, - &feature_crc, &feature_fp16, - &feature_hwdiv, - &feature_hwdivArm, - &feature_thumb2, - &feature_aclass, + &feature_db, &feature_crypto, &feature_dotprod, }, @@ -2142,10 +2142,10 @@ pub const cpu_sc000 = Cpu{ .name = "sc000", .llvm_name = "sc000", .dependencies = &[_]*const Feature { - &feature_db, - &feature_strictAlign, &feature_noarm, + &feature_strictAlign, &feature_mclass, + &feature_db, }, }; @@ -2153,13 +2153,13 @@ pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, - &feature_v7clrex, + &feature_thumb2, &feature_noarm, + &feature_v7clrex, + &feature_perfmon, &feature_mclass, &feature_hwdiv, - &feature_thumb2, + &feature_db, &feature_noBranchPredictor, &feature_useAa, &feature_useMisched, @@ -2198,14 +2198,14 @@ pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", .dependencies = &[_]*const Feature { - &feature_db, - &feature_perfmon, + &feature_thumb2, &feature_fpregs, - &feature_d32, - &feature_v7clrex, &feature_dsp, - &feature_thumb2, + &feature_v7clrex, &feature_aclass, + &feature_perfmon, + &feature_d32, + &feature_db, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_hwdivArm, diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index ac5c8f17111c23ac40c75d971f2ae8604070c984..2f5dc00c74aa93393e94af5285d218c4b2a6b653 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -170,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_elpm, &feature_lpm, + &feature_sram, &feature_addsubiw, + &feature_elpm, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -183,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -195,11 +195,11 @@ pub const cpu_at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -207,8 +207,8 @@ pub const cpu_at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, &feature_lpmx, @@ -220,8 +220,8 @@ pub const cpu_at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -231,18 +231,18 @@ pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -250,16 +250,16 @@ pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -267,16 +267,16 @@ pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -284,15 +284,15 @@ pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -300,16 +300,16 @@ pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -317,15 +317,15 @@ pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -333,16 +333,16 @@ pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -350,15 +350,15 @@ pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -366,15 +366,15 @@ pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -382,16 +382,16 @@ pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -399,15 +399,15 @@ pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -415,15 +415,15 @@ pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -438,8 +438,8 @@ pub const cpu_at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -449,8 +449,8 @@ pub const cpu_at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -460,8 +460,8 @@ pub const cpu_at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -471,8 +471,8 @@ pub const cpu_at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -482,8 +482,8 @@ pub const cpu_at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -493,8 +493,8 @@ pub const cpu_at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -504,8 +504,8 @@ pub const cpu_at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -515,8 +515,8 @@ pub const cpu_at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -526,8 +526,8 @@ pub const cpu_at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -537,16 +537,16 @@ pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -554,18 +554,18 @@ pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -573,18 +573,18 @@ pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -592,15 +592,15 @@ pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -608,16 +608,16 @@ pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -625,16 +625,16 @@ pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -642,15 +642,15 @@ pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -658,11 +658,11 @@ pub const cpu_at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -673,14 +673,14 @@ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -688,15 +688,15 @@ pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -704,16 +704,16 @@ pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -721,16 +721,16 @@ pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -738,15 +738,15 @@ pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -754,15 +754,15 @@ pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -770,15 +770,15 @@ pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -786,12 +786,12 @@ pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_elpm, &feature_lpm, + &feature_sram, &feature_addsubiw, + &feature_elpm, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -799,18 +799,18 @@ pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -818,18 +818,18 @@ pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -837,18 +837,18 @@ pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -856,18 +856,18 @@ pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -875,18 +875,18 @@ pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -894,18 +894,18 @@ pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -913,18 +913,18 @@ pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -932,18 +932,18 @@ pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -951,18 +951,18 @@ pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -970,16 +970,16 @@ pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -987,11 +987,11 @@ pub const cpu_atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1003,16 +1003,16 @@ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1020,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1036,16 +1036,16 @@ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1053,16 +1053,16 @@ pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1070,16 +1070,16 @@ pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1087,16 +1087,16 @@ pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1104,16 +1104,16 @@ pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1121,16 +1121,16 @@ pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1138,16 +1138,16 @@ pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1155,16 +1155,16 @@ pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1172,16 +1172,16 @@ pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1189,16 +1189,16 @@ pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1206,16 +1206,16 @@ pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1223,16 +1223,16 @@ pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1240,16 +1240,16 @@ pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1257,16 +1257,16 @@ pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1274,16 +1274,16 @@ pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1291,16 +1291,16 @@ pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1308,16 +1308,16 @@ pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1325,16 +1325,16 @@ pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1342,16 +1342,16 @@ pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1359,16 +1359,16 @@ pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1376,16 +1376,16 @@ pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1393,15 +1393,15 @@ pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -1409,16 +1409,16 @@ pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1426,18 +1426,18 @@ pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -1445,18 +1445,18 @@ pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -1464,18 +1464,18 @@ pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -1483,18 +1483,18 @@ pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -1502,16 +1502,16 @@ pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1519,16 +1519,16 @@ pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1536,16 +1536,16 @@ pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1553,16 +1553,16 @@ pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1570,16 +1570,16 @@ pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1587,16 +1587,16 @@ pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1604,16 +1604,16 @@ pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1621,16 +1621,16 @@ pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1638,16 +1638,16 @@ pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1655,16 +1655,16 @@ pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1672,16 +1672,16 @@ pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1689,16 +1689,16 @@ pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1706,16 +1706,16 @@ pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1723,16 +1723,16 @@ pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1740,16 +1740,16 @@ pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1757,16 +1757,16 @@ pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1774,16 +1774,16 @@ pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1791,16 +1791,16 @@ pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1808,16 +1808,16 @@ pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1825,16 +1825,16 @@ pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1842,16 +1842,16 @@ pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1859,16 +1859,16 @@ pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1876,16 +1876,16 @@ pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1893,16 +1893,16 @@ pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1910,16 +1910,16 @@ pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1927,16 +1927,16 @@ pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1944,16 +1944,16 @@ pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1961,16 +1961,16 @@ pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -1978,15 +1978,15 @@ pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -1994,16 +1994,16 @@ pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2011,16 +2011,16 @@ pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2028,16 +2028,16 @@ pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2045,15 +2045,15 @@ pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2061,15 +2061,15 @@ pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2077,15 +2077,15 @@ pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2093,15 +2093,15 @@ pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2109,16 +2109,16 @@ pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2126,16 +2126,16 @@ pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2143,16 +2143,16 @@ pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2160,16 +2160,16 @@ pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2177,16 +2177,16 @@ pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2194,16 +2194,16 @@ pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2211,16 +2211,16 @@ pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2228,16 +2228,16 @@ pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2245,16 +2245,16 @@ pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2262,16 +2262,16 @@ pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2279,16 +2279,16 @@ pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2296,16 +2296,16 @@ pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2313,16 +2313,16 @@ pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2330,16 +2330,16 @@ pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2347,16 +2347,16 @@ pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2364,16 +2364,16 @@ pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2381,16 +2381,16 @@ pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2398,16 +2398,16 @@ pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2415,16 +2415,16 @@ pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2432,16 +2432,16 @@ pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2449,16 +2449,16 @@ pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2466,16 +2466,16 @@ pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2483,16 +2483,16 @@ pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2500,16 +2500,16 @@ pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -2517,15 +2517,15 @@ pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2533,8 +2533,8 @@ pub const cpu_atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, &feature_lpmx, @@ -2548,8 +2548,8 @@ pub const cpu_atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, &feature_lpmx, @@ -2563,15 +2563,15 @@ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2579,15 +2579,15 @@ pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2595,15 +2595,15 @@ pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2611,15 +2611,15 @@ pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2627,15 +2627,15 @@ pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2643,15 +2643,15 @@ pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -2659,15 +2659,15 @@ pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -2676,8 +2676,8 @@ pub const cpu_attiny10 = Cpu{ .llvm_name = "attiny10", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2686,8 +2686,8 @@ pub const cpu_attiny102 = Cpu{ .llvm_name = "attiny102", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2696,8 +2696,8 @@ pub const cpu_attiny104 = Cpu{ .llvm_name = "attiny104", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2721,14 +2721,14 @@ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2736,14 +2736,14 @@ pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2759,15 +2759,15 @@ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -2775,15 +2775,15 @@ pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -2792,8 +2792,8 @@ pub const cpu_attiny20 = Cpu{ .llvm_name = "attiny20", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2801,8 +2801,8 @@ pub const cpu_attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -2812,14 +2812,14 @@ pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2827,14 +2827,14 @@ pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2842,14 +2842,14 @@ pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2857,14 +2857,14 @@ pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2872,14 +2872,14 @@ pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2887,8 +2887,8 @@ pub const cpu_attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, &feature_lpmx, @@ -2899,14 +2899,14 @@ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2914,14 +2914,14 @@ pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2938,8 +2938,8 @@ pub const cpu_attiny4 = Cpu{ .llvm_name = "attiny4", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2948,8 +2948,8 @@ pub const cpu_attiny40 = Cpu{ .llvm_name = "attiny40", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -2957,14 +2957,14 @@ pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2972,14 +2972,14 @@ pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -2987,14 +2987,14 @@ pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3002,14 +3002,14 @@ pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3017,14 +3017,14 @@ pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3032,14 +3032,14 @@ pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3047,14 +3047,14 @@ pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3062,14 +3062,14 @@ pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3078,8 +3078,8 @@ pub const cpu_attiny5 = Cpu{ .llvm_name = "attiny5", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -3087,14 +3087,14 @@ pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3102,14 +3102,14 @@ pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3117,14 +3117,14 @@ pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3132,14 +3132,14 @@ pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3147,14 +3147,14 @@ pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3162,14 +3162,14 @@ pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3177,14 +3177,14 @@ pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3192,14 +3192,14 @@ pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -3208,8 +3208,8 @@ pub const cpu_attiny9 = Cpu{ .llvm_name = "attiny9", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -3217,21 +3217,21 @@ pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3239,22 +3239,22 @@ pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3262,21 +3262,21 @@ pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3284,22 +3284,22 @@ pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3307,22 +3307,22 @@ pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3330,22 +3330,22 @@ pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3353,22 +3353,22 @@ pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3376,22 +3376,22 @@ pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3399,21 +3399,21 @@ pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3421,21 +3421,21 @@ pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3443,21 +3443,21 @@ pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3465,22 +3465,22 @@ pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3488,22 +3488,22 @@ pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3511,21 +3511,21 @@ pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3533,21 +3533,21 @@ pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3555,21 +3555,21 @@ pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3577,22 +3577,22 @@ pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3600,22 +3600,22 @@ pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3623,21 +3623,21 @@ pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3645,21 +3645,21 @@ pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3667,21 +3667,21 @@ pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3689,22 +3689,22 @@ pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3712,22 +3712,22 @@ pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3735,22 +3735,22 @@ pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3758,21 +3758,21 @@ pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3780,21 +3780,21 @@ pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3802,22 +3802,22 @@ pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3825,22 +3825,22 @@ pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3848,21 +3848,21 @@ pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3870,21 +3870,21 @@ pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3892,21 +3892,21 @@ pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3914,22 +3914,22 @@ pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -3937,21 +3937,21 @@ pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3959,21 +3959,21 @@ pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -3981,22 +3981,22 @@ pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4004,21 +4004,21 @@ pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4026,22 +4026,22 @@ pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4049,22 +4049,22 @@ pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4072,22 +4072,22 @@ pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4095,22 +4095,22 @@ pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4118,22 +4118,22 @@ pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .dependencies = &[_]*const Feature { - &feature_des, + &feature_eijmpcall, + &feature_lpm, &feature_sram, &feature_movw, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_rmw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_rmw, - &feature_ijmpcall, - &feature_eijmpcall, - &feature_break, &feature_elpmx, + &feature_mul, }, }; @@ -4141,21 +4141,21 @@ pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4163,21 +4163,21 @@ pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4185,21 +4185,21 @@ pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4215,8 +4215,8 @@ pub const cpu_avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, }, @@ -4226,14 +4226,14 @@ pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", .dependencies = &[_]*const Feature { - &feature_sram, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, }, }; @@ -4241,11 +4241,11 @@ pub const cpu_avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, + &feature_sram, &feature_addsubiw, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -4253,12 +4253,12 @@ pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_elpm, &feature_lpm, + &feature_sram, &feature_addsubiw, + &feature_elpm, &feature_ijmpcall, + &feature_jmpcall, }, }; @@ -4266,15 +4266,15 @@ pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, }, }; @@ -4282,15 +4282,15 @@ pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_spm, + &feature_mul, }, }; @@ -4298,16 +4298,16 @@ pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; @@ -4315,18 +4315,18 @@ pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4334,18 +4334,18 @@ pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", .dependencies = &[_]*const Feature { + &feature_lpm, &feature_sram, - &feature_jmpcall, - &feature_mul, + &feature_addsubiw, + &feature_movw, &feature_elpm, - &feature_lpm, + &feature_break, + &feature_ijmpcall, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4354,8 +4354,8 @@ pub const cpu_avrtiny = Cpu{ .llvm_name = "avrtiny", .dependencies = &[_]*const Feature { &feature_sram, - &feature_tinyencoding, &feature_break, + &feature_tinyencoding, }, }; @@ -4363,21 +4363,21 @@ pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4385,21 +4385,21 @@ pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4407,21 +4407,21 @@ pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4429,21 +4429,21 @@ pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4451,21 +4451,21 @@ pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4473,21 +4473,21 @@ pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4495,21 +4495,21 @@ pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", .dependencies = &[_]*const Feature { - &feature_des, - &feature_sram, &feature_eijmpcall, - &feature_jmpcall, - &feature_mul, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, &feature_elpm, + &feature_break, + &feature_ijmpcall, + &feature_des, &feature_spmx, - &feature_lpm, &feature_lpmx, + &feature_jmpcall, &feature_spm, - &feature_addsubiw, - &feature_ijmpcall, &feature_elpmx, - &feature_break, - &feature_movw, + &feature_mul, }, }; @@ -4517,16 +4517,16 @@ pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", .dependencies = &[_]*const Feature { - &feature_sram, - &feature_jmpcall, - &feature_mul, &feature_lpm, - &feature_lpmx, - &feature_spm, + &feature_sram, &feature_addsubiw, - &feature_ijmpcall, - &feature_break, &feature_movw, + &feature_break, + &feature_ijmpcall, + &feature_lpmx, + &feature_jmpcall, + &feature_spm, + &feature_mul, }, }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 7deecaa6c73a8f2b5159cdc687467943019292ac..54f59d651afd85dc633e507d461f43c63bbce46c 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -10,7 +10,7 @@ pub const feature_duplex = Feature{ }; pub const feature_longCalls = Feature{ - .name = "long-calls", + .name = "longCalls", .llvm_name = "long-calls", .description = "Use constant-extended calls", .dependencies = &[_]*const Feature { @@ -52,7 +52,7 @@ pub const feature_nvs = Feature{ }; pub const feature_noreturnStackElim = Feature{ - .name = "noreturn-stack-elim", + .name = "noreturnStackElim", .llvm_name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", .dependencies = &[_]*const Feature { @@ -68,7 +68,7 @@ pub const feature_packets = Feature{ }; pub const feature_reservedR19 = Feature{ - .name = "reserved-r19", + .name = "reservedR19", .llvm_name = "reserved-r19", .description = "Reserve register R19", .dependencies = &[_]*const Feature { @@ -76,7 +76,7 @@ pub const feature_reservedR19 = Feature{ }; pub const feature_smallData = Feature{ - .name = "small-data", + .name = "smallData", .llvm_name = "small-data", .description = "Allow GP-relative addressing of global variables", .dependencies = &[_]*const Feature { diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 7b97a84f18d900ea206ec0aac64b0d7d37d1497d..6eab968c2300cf4bf264fafd9a067c5e4281137e 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -22,14 +22,14 @@ pub const feature_cnmips = Feature{ .llvm_name = "cnmips", .description = "Octeon cnMIPS Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -100,7 +100,7 @@ pub const feature_gp64 = Feature{ }; pub const feature_longCalls = Feature{ - .name = "long-calls", + .name = "longCalls", .llvm_name = "long-calls", .description = "Disable use of the jal instruction", .dependencies = &[_]*const Feature { @@ -163,9 +163,9 @@ pub const feature_mips3 = Feature{ .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_fp64, - &feature_gp64, &feature_mips3_32, + &feature_gp64, + &feature_fp64, }, }; @@ -192,11 +192,11 @@ pub const feature_mips4 = Feature{ .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_fp64, + &feature_mips3_32, &feature_gp64, &feature_mips4_32r2, - &feature_mips3_32, + &feature_mips4_32, + &feature_fp64, }, }; @@ -221,14 +221,14 @@ pub const feature_mips5 = Feature{ .llvm_name = "mips5", .description = "MIPS V ISA Support [highly experimental]", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -253,9 +253,9 @@ pub const feature_mips32 = Feature{ .llvm_name = "mips32", .description = "Mips32 ISA Support", .dependencies = &[_]*const Feature { - &feature_mips1, - &feature_mips4_32, &feature_mips3_32, + &feature_mips4_32, + &feature_mips1, }, }; @@ -264,12 +264,12 @@ pub const feature_mips32r2 = Feature{ .llvm_name = "mips32r2", .description = "Mips32r2 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, }, }; @@ -278,12 +278,12 @@ pub const feature_mips32r3 = Feature{ .llvm_name = "mips32r3", .description = "Mips32r3 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, }, }; @@ -292,12 +292,12 @@ pub const feature_mips32r5 = Feature{ .llvm_name = "mips32r5", .description = "Mips32r5 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, }, }; @@ -306,15 +306,15 @@ pub const feature_mips32r6 = Feature{ .llvm_name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { - &feature_abs2008, + &feature_nan2008, + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, &feature_mips4_32, - &feature_nan2008, - &feature_mips5_32r2, + &feature_abs2008, &feature_fp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -323,14 +323,14 @@ pub const feature_mips64 = Feature{ .llvm_name = "mips64", .description = "Mips64 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -339,14 +339,14 @@ pub const feature_mips64r2 = Feature{ .llvm_name = "mips64r2", .description = "Mips64r2 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -355,14 +355,14 @@ pub const feature_mips64r3 = Feature{ .llvm_name = "mips64r3", .description = "Mips64r3 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -371,14 +371,14 @@ pub const feature_mips64r5 = Feature{ .llvm_name = "mips64r5", .description = "Mips64r5 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -387,16 +387,16 @@ pub const feature_mips64r6 = Feature{ .llvm_name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { - &feature_abs2008, + &feature_nan2008, + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_nan2008, - &feature_mips5_32r2, + &feature_abs2008, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, }, }; @@ -433,7 +433,7 @@ pub const feature_ptr64 = Feature{ }; pub const feature_singleFloat = Feature{ - .name = "single-float", + .name = "singleFloat", .llvm_name = "single-float", .description = "Only supports single precision float", .dependencies = &[_]*const Feature { @@ -441,7 +441,7 @@ pub const feature_singleFloat = Feature{ }; pub const feature_softFloat = Feature{ - .name = "soft-float", + .name = "softFloat", .llvm_name = "soft-float", .description = "Does not support floating point instructions", .dependencies = &[_]*const Feature { @@ -457,7 +457,7 @@ pub const feature_sym32 = Feature{ }; pub const feature_useIndirectJumpHazard = Feature{ - .name = "use-indirect-jump-hazard", + .name = "useIndirectJumpHazard", .llvm_name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", .dependencies = &[_]*const Feature { @@ -465,7 +465,7 @@ pub const feature_useIndirectJumpHazard = Feature{ }; pub const feature_useTccInDiv = Feature{ - .name = "use-tcc-in-div", + .name = "useTccInDiv", .llvm_name = "use-tcc-in-div", .description = "Force the assembler to use trapping", .dependencies = &[_]*const Feature { @@ -501,12 +501,12 @@ pub const feature_p5600 = Feature{ .llvm_name = "p5600", .description = "The P5600 Processor", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, }, }; @@ -586,9 +586,9 @@ pub const cpu_mips3 = Cpu{ .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_fp64, - &feature_gp64, &feature_mips3_32, + &feature_gp64, + &feature_fp64, &feature_mips3, }, }; @@ -597,9 +597,9 @@ pub const cpu_mips32 = Cpu{ .name = "mips32", .llvm_name = "mips32", .dependencies = &[_]*const Feature { - &feature_mips1, - &feature_mips4_32, &feature_mips3_32, + &feature_mips4_32, + &feature_mips1, &feature_mips32, }, }; @@ -608,12 +608,12 @@ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, &feature_mips32r2, }, }; @@ -622,12 +622,12 @@ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, &feature_mips32r3, }, }; @@ -636,12 +636,12 @@ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, &feature_mips32r5, }, }; @@ -650,15 +650,15 @@ pub const cpu_mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", .dependencies = &[_]*const Feature { - &feature_abs2008, + &feature_nan2008, + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, &feature_mips4_32, - &feature_nan2008, - &feature_mips5_32r2, + &feature_abs2008, &feature_fp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips32r6, }, }; @@ -669,11 +669,11 @@ pub const cpu_mips4 = Cpu{ .dependencies = &[_]*const Feature { &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_fp64, + &feature_mips3_32, &feature_gp64, &feature_mips4_32r2, - &feature_mips3_32, + &feature_mips4_32, + &feature_fp64, &feature_mips4, }, }; @@ -682,14 +682,14 @@ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips5, }, }; @@ -698,14 +698,14 @@ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips64, }, }; @@ -714,14 +714,14 @@ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips64r2, }, }; @@ -730,14 +730,14 @@ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips64r3, }, }; @@ -746,14 +746,14 @@ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips64r5, }, }; @@ -762,16 +762,16 @@ pub const cpu_mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", .dependencies = &[_]*const Feature { - &feature_abs2008, + &feature_nan2008, + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_nan2008, - &feature_mips5_32r2, + &feature_abs2008, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_mips64r6, }, }; @@ -780,14 +780,14 @@ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, &feature_mips4_32, - &feature_mips5_32r2, &feature_fp64, - &feature_gp64, - &feature_mips4_32r2, - &feature_mips3_32, &feature_cnmips, &feature_mips64r2, }, @@ -797,12 +797,12 @@ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", .dependencies = &[_]*const Feature { + &feature_mips5_32r2, &feature_mips1, &feature_mips3_32r2, - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips4_32r2, &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips4_32, &feature_p5600, }, }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 6ad23e946653cff7d1c81e16249351043a2b379d..bb68049ecad762a50ccd983727d80aef5f75ca6a 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ - .name = "64bit", + .name = "bit64", .llvm_name = "64bit", .description = "Enable 64-bit instructions", .dependencies = &[_]*const Feature { @@ -10,7 +10,7 @@ pub const feature_bit64 = Feature{ }; pub const feature_bitregs64 = Feature{ - .name = "64bitregs", + .name = "bitregs64", .llvm_name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", .dependencies = &[_]*const Feature { @@ -60,7 +60,7 @@ pub const feature_crbits = Feature{ }; pub const feature_directMove = Feature{ - .name = "direct-move", + .name = "directMove", .llvm_name = "direct-move", .description = "Enable Power8 direct move instructions", .dependencies = &[_]*const Feature { @@ -183,7 +183,7 @@ pub const feature_htm = Feature{ }; pub const feature_hardFloat = Feature{ - .name = "hard-float", + .name = "hardFloat", .llvm_name = "hard-float", .description = "Enable floating-point instructions", .dependencies = &[_]*const Feature { @@ -199,7 +199,7 @@ pub const feature_icbt = Feature{ }; pub const feature_isaV30Instructions = Feature{ - .name = "isa-v30-instructions", + .name = "isaV30Instructions", .llvm_name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", .dependencies = &[_]*const Feature { @@ -215,7 +215,7 @@ pub const feature_isel = Feature{ }; pub const feature_invariantFunctionDescriptors = Feature{ - .name = "invariant-function-descriptors", + .name = "invariantFunctionDescriptors", .llvm_name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", .dependencies = &[_]*const Feature { @@ -265,7 +265,7 @@ pub const feature_msync = Feature{ }; pub const feature_power8Altivec = Feature{ - .name = "power8-altivec", + .name = "power8Altivec", .llvm_name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", .dependencies = &[_]*const Feature { @@ -283,7 +283,7 @@ pub const feature_crypto = Feature{ }; pub const feature_power8Vector = Feature{ - .name = "power8-vector", + .name = "power8Vector", .llvm_name = "power8-vector", .description = "Enable POWER8 vector instructions", .dependencies = &[_]*const Feature { @@ -292,7 +292,7 @@ pub const feature_power8Vector = Feature{ }; pub const feature_power9Altivec = Feature{ - .name = "power9-altivec", + .name = "power9Altivec", .llvm_name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", .dependencies = &[_]*const Feature { @@ -302,7 +302,7 @@ pub const feature_power9Altivec = Feature{ }; pub const feature_power9Vector = Feature{ - .name = "power9-vector", + .name = "power9Vector", .llvm_name = "power9-vector", .description = "Enable POWER9 vector instructions", .dependencies = &[_]*const Feature { @@ -336,7 +336,7 @@ pub const feature_ppc6xx = Feature{ }; pub const feature_ppcPostraSched = Feature{ - .name = "ppc-postra-sched", + .name = "ppcPostraSched", .llvm_name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", .dependencies = &[_]*const Feature { @@ -344,7 +344,7 @@ pub const feature_ppcPostraSched = Feature{ }; pub const feature_ppcPreraSched = Feature{ - .name = "ppc-prera-sched", + .name = "ppcPreraSched", .llvm_name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", .dependencies = &[_]*const Feature { @@ -352,7 +352,7 @@ pub const feature_ppcPreraSched = Feature{ }; pub const feature_partwordAtomics = Feature{ - .name = "partword-atomics", + .name = "partwordAtomics", .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", .dependencies = &[_]*const Feature { @@ -395,7 +395,7 @@ pub const feature_stfiwx = Feature{ }; pub const feature_securePlt = Feature{ - .name = "secure-plt", + .name = "securePlt", .llvm_name = "secure-plt", .description = "Enable secure plt mode", .dependencies = &[_]*const Feature { @@ -403,7 +403,7 @@ pub const feature_securePlt = Feature{ }; pub const feature_slowPopcntd = Feature{ - .name = "slow-popcntd", + .name = "slowPopcntd", .llvm_name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", .dependencies = &[_]*const Feature { @@ -411,7 +411,7 @@ pub const feature_slowPopcntd = Feature{ }; pub const feature_twoConstNr = Feature{ - .name = "two-const-nr", + .name = "twoConstNr", .llvm_name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", .dependencies = &[_]*const Feature { @@ -428,7 +428,7 @@ pub const feature_vsx = Feature{ }; pub const feature_vectorsUseTwoUnits = Feature{ - .name = "vectors-use-two-units", + .name = "vectorsUseTwoUnits", .llvm_name = "vectors-use-two-units", .description = "Vectors use two units", .dependencies = &[_]*const Feature { @@ -546,7 +546,7 @@ pub const cpu_603 = Cpu{ }; pub const cpu_e603 = Cpu{ - .name = "603e", + .name = "e603", .llvm_name = "603e", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -556,7 +556,7 @@ pub const cpu_e603 = Cpu{ }; pub const cpu_ev603 = Cpu{ - .name = "603ev", + .name = "ev603", .llvm_name = "603ev", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -576,7 +576,7 @@ pub const cpu_604 = Cpu{ }; pub const cpu_e604 = Cpu{ - .name = "604e", + .name = "e604", .llvm_name = "604e", .dependencies = &[_]*const Feature { &feature_hardFloat, @@ -755,7 +755,7 @@ pub const cpu_g4 = Cpu{ }; pub const cpu_g4Plus = Cpu{ - .name = "g4+", + .name = "g4Plus", .llvm_name = "g4+", .dependencies = &[_]*const Feature { &feature_hardFloat, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index e9b976b004aa78c152efe3751b7e95867e84da9c..a3f21adc0139c8c67fd1356615038296f9877399 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_bit64 = Feature{ - .name = "64bit", + .name = "bit64", .llvm_name = "64bit", .description = "Implements RV64", .dependencies = &[_]*const Feature { @@ -18,7 +18,7 @@ pub const feature_e = Feature{ }; pub const feature_rvcHints = Feature{ - .name = "rvc-hints", + .name = "rvcHints", .llvm_name = "rvc-hints", .description = "Enable RVC Hint Instructions.", .dependencies = &[_]*const Feature { @@ -87,7 +87,7 @@ pub const features = &[_]*const Feature { }; pub const cpu_genericRv32 = Cpu{ - .name = "generic-rv32", + .name = "genericRv32", .llvm_name = "generic-rv32", .dependencies = &[_]*const Feature { &feature_rvcHints, @@ -95,7 +95,7 @@ pub const cpu_genericRv32 = Cpu{ }; pub const cpu_genericRv64 = Cpu{ - .name = "generic-rv64", + .name = "genericRv64", .llvm_name = "generic-rv64", .dependencies = &[_]*const Feature { &feature_bit64, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 5bf844b8705d01d241bedbbb942974dbfb8551ba..7dfaa47df77b4e1baeb00826b6ebfc3c80ee2df7 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_hardQuadFloat = Feature{ - .name = "hard-quad-float", + .name = "hardQuadFloat", .llvm_name = "hard-quad-float", .description = "Enable quad-word floating point instructions", .dependencies = &[_]*const Feature { @@ -18,7 +18,7 @@ pub const feature_leon = Feature{ }; pub const feature_noFmuls = Feature{ - .name = "no-fmuls", + .name = "noFmuls", .llvm_name = "no-fmuls", .description = "Disable the fmuls instruction.", .dependencies = &[_]*const Feature { @@ -26,7 +26,7 @@ pub const feature_noFmuls = Feature{ }; pub const feature_noFsmuld = Feature{ - .name = "no-fsmuld", + .name = "noFsmuld", .llvm_name = "no-fsmuld", .description = "Disable the fsmuld instruction.", .dependencies = &[_]*const Feature { @@ -42,7 +42,7 @@ pub const feature_leonpwrpsr = Feature{ }; pub const feature_softFloat = Feature{ - .name = "soft-float", + .name = "softFloat", .llvm_name = "soft-float", .description = "Use software emulation for floating point", .dependencies = &[_]*const Feature { @@ -50,7 +50,7 @@ pub const feature_softFloat = Feature{ }; pub const feature_softMulDiv = Feature{ - .name = "soft-mul-div", + .name = "softMulDiv", .llvm_name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", .dependencies = &[_]*const Feature { @@ -58,7 +58,7 @@ pub const feature_softMulDiv = Feature{ }; pub const feature_deprecatedV8 = Feature{ - .name = "deprecated-v8", + .name = "deprecatedV8", .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", .dependencies = &[_]*const Feature { @@ -287,7 +287,7 @@ pub const cpu_myriad2 = Cpu{ }; pub const cpu_myriad21 = Cpu{ - .name = "myriad2.1", + .name = "myriad21", .llvm_name = "myriad2.1", .dependencies = &[_]*const Feature { &feature_leon, @@ -295,7 +295,7 @@ pub const cpu_myriad21 = Cpu{ }; pub const cpu_myriad22 = Cpu{ - .name = "myriad2.2", + .name = "myriad22", .llvm_name = "myriad2.2", .dependencies = &[_]*const Feature { &feature_leon, @@ -303,7 +303,7 @@ pub const cpu_myriad22 = Cpu{ }; pub const cpu_myriad23 = Cpu{ - .name = "myriad2.3", + .name = "myriad23", .llvm_name = "myriad2.3", .dependencies = &[_]*const Feature { &feature_leon, diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 56bd80efd1ae0ba9a7219c173283289d714ada76..7966f4191506720b3709a87f6531109f5add68f9 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_dfpPackedConversion = Feature{ - .name = "dfp-packed-conversion", + .name = "dfpPackedConversion", .llvm_name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", .dependencies = &[_]*const Feature { @@ -10,7 +10,7 @@ pub const feature_dfpPackedConversion = Feature{ }; pub const feature_dfpZonedConversion = Feature{ - .name = "dfp-zoned-conversion", + .name = "dfpZonedConversion", .llvm_name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", .dependencies = &[_]*const Feature { @@ -18,7 +18,7 @@ pub const feature_dfpZonedConversion = Feature{ }; pub const feature_deflateConversion = Feature{ - .name = "deflate-conversion", + .name = "deflateConversion", .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", .dependencies = &[_]*const Feature { @@ -26,7 +26,7 @@ pub const feature_deflateConversion = Feature{ }; pub const feature_distinctOps = Feature{ - .name = "distinct-ops", + .name = "distinctOps", .llvm_name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", .dependencies = &[_]*const Feature { @@ -34,7 +34,7 @@ pub const feature_distinctOps = Feature{ }; pub const feature_enhancedDat2 = Feature{ - .name = "enhanced-dat-2", + .name = "enhancedDat2", .llvm_name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", .dependencies = &[_]*const Feature { @@ -42,7 +42,7 @@ pub const feature_enhancedDat2 = Feature{ }; pub const feature_enhancedSort = Feature{ - .name = "enhanced-sort", + .name = "enhancedSort", .llvm_name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", .dependencies = &[_]*const Feature { @@ -50,7 +50,7 @@ pub const feature_enhancedSort = Feature{ }; pub const feature_executionHint = Feature{ - .name = "execution-hint", + .name = "executionHint", .llvm_name = "execution-hint", .description = "Assume that the execution-hint facility is installed", .dependencies = &[_]*const Feature { @@ -58,7 +58,7 @@ pub const feature_executionHint = Feature{ }; pub const feature_fpExtension = Feature{ - .name = "fp-extension", + .name = "fpExtension", .llvm_name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", .dependencies = &[_]*const Feature { @@ -66,7 +66,7 @@ pub const feature_fpExtension = Feature{ }; pub const feature_fastSerialization = Feature{ - .name = "fast-serialization", + .name = "fastSerialization", .llvm_name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", .dependencies = &[_]*const Feature { @@ -74,7 +74,7 @@ pub const feature_fastSerialization = Feature{ }; pub const feature_guardedStorage = Feature{ - .name = "guarded-storage", + .name = "guardedStorage", .llvm_name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", .dependencies = &[_]*const Feature { @@ -82,7 +82,7 @@ pub const feature_guardedStorage = Feature{ }; pub const feature_highWord = Feature{ - .name = "high-word", + .name = "highWord", .llvm_name = "high-word", .description = "Assume that the high-word facility is installed", .dependencies = &[_]*const Feature { @@ -90,7 +90,7 @@ pub const feature_highWord = Feature{ }; pub const feature_insertReferenceBitsMultiple = Feature{ - .name = "insert-reference-bits-multiple", + .name = "insertReferenceBitsMultiple", .llvm_name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", .dependencies = &[_]*const Feature { @@ -98,7 +98,7 @@ pub const feature_insertReferenceBitsMultiple = Feature{ }; pub const feature_interlockedAccess1 = Feature{ - .name = "interlocked-access1", + .name = "interlockedAccess1", .llvm_name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", .dependencies = &[_]*const Feature { @@ -106,7 +106,7 @@ pub const feature_interlockedAccess1 = Feature{ }; pub const feature_loadAndTrap = Feature{ - .name = "load-and-trap", + .name = "loadAndTrap", .llvm_name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", .dependencies = &[_]*const Feature { @@ -114,7 +114,7 @@ pub const feature_loadAndTrap = Feature{ }; pub const feature_loadAndZeroRightmostByte = Feature{ - .name = "load-and-zero-rightmost-byte", + .name = "loadAndZeroRightmostByte", .llvm_name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", .dependencies = &[_]*const Feature { @@ -122,7 +122,7 @@ pub const feature_loadAndZeroRightmostByte = Feature{ }; pub const feature_loadStoreOnCond = Feature{ - .name = "load-store-on-cond", + .name = "loadStoreOnCond", .llvm_name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", .dependencies = &[_]*const Feature { @@ -130,7 +130,7 @@ pub const feature_loadStoreOnCond = Feature{ }; pub const feature_loadStoreOnCond2 = Feature{ - .name = "load-store-on-cond-2", + .name = "loadStoreOnCond2", .llvm_name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", .dependencies = &[_]*const Feature { @@ -138,7 +138,7 @@ pub const feature_loadStoreOnCond2 = Feature{ }; pub const feature_messageSecurityAssistExtension3 = Feature{ - .name = "message-security-assist-extension3", + .name = "messageSecurityAssistExtension3", .llvm_name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", .dependencies = &[_]*const Feature { @@ -146,7 +146,7 @@ pub const feature_messageSecurityAssistExtension3 = Feature{ }; pub const feature_messageSecurityAssistExtension4 = Feature{ - .name = "message-security-assist-extension4", + .name = "messageSecurityAssistExtension4", .llvm_name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", .dependencies = &[_]*const Feature { @@ -154,7 +154,7 @@ pub const feature_messageSecurityAssistExtension4 = Feature{ }; pub const feature_messageSecurityAssistExtension5 = Feature{ - .name = "message-security-assist-extension5", + .name = "messageSecurityAssistExtension5", .llvm_name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", .dependencies = &[_]*const Feature { @@ -162,7 +162,7 @@ pub const feature_messageSecurityAssistExtension5 = Feature{ }; pub const feature_messageSecurityAssistExtension7 = Feature{ - .name = "message-security-assist-extension7", + .name = "messageSecurityAssistExtension7", .llvm_name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", .dependencies = &[_]*const Feature { @@ -170,7 +170,7 @@ pub const feature_messageSecurityAssistExtension7 = Feature{ }; pub const feature_messageSecurityAssistExtension8 = Feature{ - .name = "message-security-assist-extension8", + .name = "messageSecurityAssistExtension8", .llvm_name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", .dependencies = &[_]*const Feature { @@ -178,7 +178,7 @@ pub const feature_messageSecurityAssistExtension8 = Feature{ }; pub const feature_messageSecurityAssistExtension9 = Feature{ - .name = "message-security-assist-extension9", + .name = "messageSecurityAssistExtension9", .llvm_name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", .dependencies = &[_]*const Feature { @@ -186,7 +186,7 @@ pub const feature_messageSecurityAssistExtension9 = Feature{ }; pub const feature_miscellaneousExtensions = Feature{ - .name = "miscellaneous-extensions", + .name = "miscellaneousExtensions", .llvm_name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", .dependencies = &[_]*const Feature { @@ -194,7 +194,7 @@ pub const feature_miscellaneousExtensions = Feature{ }; pub const feature_miscellaneousExtensions2 = Feature{ - .name = "miscellaneous-extensions-2", + .name = "miscellaneousExtensions2", .llvm_name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", .dependencies = &[_]*const Feature { @@ -202,7 +202,7 @@ pub const feature_miscellaneousExtensions2 = Feature{ }; pub const feature_miscellaneousExtensions3 = Feature{ - .name = "miscellaneous-extensions-3", + .name = "miscellaneousExtensions3", .llvm_name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", .dependencies = &[_]*const Feature { @@ -210,7 +210,7 @@ pub const feature_miscellaneousExtensions3 = Feature{ }; pub const feature_populationCount = Feature{ - .name = "population-count", + .name = "populationCount", .llvm_name = "population-count", .description = "Assume that the population-count facility is installed", .dependencies = &[_]*const Feature { @@ -218,7 +218,7 @@ pub const feature_populationCount = Feature{ }; pub const feature_processorAssist = Feature{ - .name = "processor-assist", + .name = "processorAssist", .llvm_name = "processor-assist", .description = "Assume that the processor-assist facility is installed", .dependencies = &[_]*const Feature { @@ -226,7 +226,7 @@ pub const feature_processorAssist = Feature{ }; pub const feature_resetReferenceBitsMultiple = Feature{ - .name = "reset-reference-bits-multiple", + .name = "resetReferenceBitsMultiple", .llvm_name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", .dependencies = &[_]*const Feature { @@ -234,7 +234,7 @@ pub const feature_resetReferenceBitsMultiple = Feature{ }; pub const feature_transactionalExecution = Feature{ - .name = "transactional-execution", + .name = "transactionalExecution", .llvm_name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", .dependencies = &[_]*const Feature { @@ -250,7 +250,7 @@ pub const feature_vector = Feature{ }; pub const feature_vectorEnhancements1 = Feature{ - .name = "vector-enhancements-1", + .name = "vectorEnhancements1", .llvm_name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", .dependencies = &[_]*const Feature { @@ -258,7 +258,7 @@ pub const feature_vectorEnhancements1 = Feature{ }; pub const feature_vectorEnhancements2 = Feature{ - .name = "vector-enhancements-2", + .name = "vectorEnhancements2", .llvm_name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", .dependencies = &[_]*const Feature { @@ -266,7 +266,7 @@ pub const feature_vectorEnhancements2 = Feature{ }; pub const feature_vectorPackedDecimal = Feature{ - .name = "vector-packed-decimal", + .name = "vectorPackedDecimal", .llvm_name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", .dependencies = &[_]*const Feature { @@ -274,7 +274,7 @@ pub const feature_vectorPackedDecimal = Feature{ }; pub const feature_vectorPackedDecimalEnhancement = Feature{ - .name = "vector-packed-decimal-enhancement", + .name = "vectorPackedDecimalEnhancement", .llvm_name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", .dependencies = &[_]*const Feature { diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index ae3bfe913800c2dc6beb10b4306c4dd9f556a3f5..61df1820b5d55d4a0c099d996febf759b82ca75e 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -10,7 +10,7 @@ pub const feature_atomics = Feature{ }; pub const feature_bulkMemory = Feature{ - .name = "bulk-memory", + .name = "bulkMemory", .llvm_name = "bulk-memory", .description = "Enable bulk memory operations", .dependencies = &[_]*const Feature { @@ -18,7 +18,7 @@ pub const feature_bulkMemory = Feature{ }; pub const feature_exceptionHandling = Feature{ - .name = "exception-handling", + .name = "exceptionHandling", .llvm_name = "exception-handling", .description = "Enable Wasm exception handling", .dependencies = &[_]*const Feature { @@ -34,7 +34,7 @@ pub const feature_multivalue = Feature{ }; pub const feature_mutableGlobals = Feature{ - .name = "mutable-globals", + .name = "mutableGlobals", .llvm_name = "mutable-globals", .description = "Enable mutable globals", .dependencies = &[_]*const Feature { @@ -42,7 +42,7 @@ pub const feature_mutableGlobals = Feature{ }; pub const feature_nontrappingFptoint = Feature{ - .name = "nontrapping-fptoint", + .name = "nontrappingFptoint", .llvm_name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", .dependencies = &[_]*const Feature { @@ -58,7 +58,7 @@ pub const feature_simd128 = Feature{ }; pub const feature_signExt = Feature{ - .name = "sign-ext", + .name = "signExt", .llvm_name = "sign-ext", .description = "Enable sign extension operators", .dependencies = &[_]*const Feature { @@ -66,7 +66,7 @@ pub const feature_signExt = Feature{ }; pub const feature_tailCall = Feature{ - .name = "tail-call", + .name = "tailCall", .llvm_name = "tail-call", .description = "Enable tail call instructions", .dependencies = &[_]*const Feature { @@ -74,7 +74,7 @@ pub const feature_tailCall = Feature{ }; pub const feature_unimplementedSimd128 = Feature{ - .name = "unimplemented-simd128", + .name = "unimplementedSimd128", .llvm_name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", .dependencies = &[_]*const Feature { @@ -96,7 +96,7 @@ pub const features = &[_]*const Feature { }; pub const cpu_bleedingEdge = Cpu{ - .name = "bleeding-edge", + .name = "bleedingEdge", .llvm_name = "bleeding-edge", .dependencies = &[_]*const Feature { &feature_atomics, diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 29062173ab2e2cb4158d450ae780e43c9e15afca..f7469ba47fee4fba216ac64112c5b6e4559c9192 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature; const Cpu = @import("std").target.Cpu; pub const feature_dnow3 = Feature{ - .name = "3dnow", + .name = "dnow3", .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", .dependencies = &[_]*const Feature { @@ -11,7 +11,7 @@ pub const feature_dnow3 = Feature{ }; pub const feature_dnowa3 = Feature{ - .name = "3dnowa", + .name = "dnowa3", .llvm_name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", .dependencies = &[_]*const Feature { @@ -20,7 +20,7 @@ pub const feature_dnowa3 = Feature{ }; pub const feature_bit64 = Feature{ - .name = "64bit", + .name = "bit64", .llvm_name = "64bit", .description = "Support 64-bit instructions", .dependencies = &[_]*const Feature { @@ -274,7 +274,7 @@ pub const feature_fxsr = Feature{ }; pub const feature_fast11bytenop = Feature{ - .name = "fast-11bytenop", + .name = "fast11bytenop", .llvm_name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", .dependencies = &[_]*const Feature { @@ -282,7 +282,7 @@ pub const feature_fast11bytenop = Feature{ }; pub const feature_fast15bytenop = Feature{ - .name = "fast-15bytenop", + .name = "fast15bytenop", .llvm_name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", .dependencies = &[_]*const Feature { @@ -290,7 +290,7 @@ pub const feature_fast15bytenop = Feature{ }; pub const feature_fastBextr = Feature{ - .name = "fast-bextr", + .name = "fastBextr", .llvm_name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", .dependencies = &[_]*const Feature { @@ -298,7 +298,7 @@ pub const feature_fastBextr = Feature{ }; pub const feature_fastHops = Feature{ - .name = "fast-hops", + .name = "fastHops", .llvm_name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", .dependencies = &[_]*const Feature { @@ -307,7 +307,7 @@ pub const feature_fastHops = Feature{ }; pub const feature_fastLzcnt = Feature{ - .name = "fast-lzcnt", + .name = "fastLzcnt", .llvm_name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", .dependencies = &[_]*const Feature { @@ -315,7 +315,7 @@ pub const feature_fastLzcnt = Feature{ }; pub const feature_fastPartialYmmOrZmmWrite = Feature{ - .name = "fast-partial-ymm-or-zmm-write", + .name = "fastPartialYmmOrZmmWrite", .llvm_name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", .dependencies = &[_]*const Feature { @@ -323,7 +323,7 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{ }; pub const feature_fastShldRotate = Feature{ - .name = "fast-shld-rotate", + .name = "fastShldRotate", .llvm_name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", .dependencies = &[_]*const Feature { @@ -331,7 +331,7 @@ pub const feature_fastShldRotate = Feature{ }; pub const feature_fastScalarFsqrt = Feature{ - .name = "fast-scalar-fsqrt", + .name = "fastScalarFsqrt", .llvm_name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", .dependencies = &[_]*const Feature { @@ -339,7 +339,7 @@ pub const feature_fastScalarFsqrt = Feature{ }; pub const feature_fastScalarShiftMasks = Feature{ - .name = "fast-scalar-shift-masks", + .name = "fastScalarShiftMasks", .llvm_name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", .dependencies = &[_]*const Feature { @@ -347,7 +347,7 @@ pub const feature_fastScalarShiftMasks = Feature{ }; pub const feature_fastVariableShuffle = Feature{ - .name = "fast-variable-shuffle", + .name = "fastVariableShuffle", .llvm_name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", .dependencies = &[_]*const Feature { @@ -355,7 +355,7 @@ pub const feature_fastVariableShuffle = Feature{ }; pub const feature_fastVectorFsqrt = Feature{ - .name = "fast-vector-fsqrt", + .name = "fastVectorFsqrt", .llvm_name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", .dependencies = &[_]*const Feature { @@ -363,7 +363,7 @@ pub const feature_fastVectorFsqrt = Feature{ }; pub const feature_fastVectorShiftMasks = Feature{ - .name = "fast-vector-shift-masks", + .name = "fastVectorShiftMasks", .llvm_name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", .dependencies = &[_]*const Feature { @@ -380,7 +380,7 @@ pub const feature_gfni = Feature{ }; pub const feature_fastGather = Feature{ - .name = "fast-gather", + .name = "fastGather", .llvm_name = "fast-gather", .description = "Indicates if gather is reasonably fast", .dependencies = &[_]*const Feature { @@ -413,7 +413,7 @@ pub const feature_sahf = Feature{ }; pub const feature_leaSp = Feature{ - .name = "lea-sp", + .name = "leaSp", .llvm_name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", .dependencies = &[_]*const Feature { @@ -421,7 +421,7 @@ pub const feature_leaSp = Feature{ }; pub const feature_leaUsesAg = Feature{ - .name = "lea-uses-ag", + .name = "leaUsesAg", .llvm_name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", .dependencies = &[_]*const Feature { @@ -445,7 +445,7 @@ pub const feature_lzcnt = Feature{ }; pub const feature_falseDepsLzcntTzcnt = Feature{ - .name = "false-deps-lzcnt-tzcnt", + .name = "falseDepsLzcntTzcnt", .llvm_name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", .dependencies = &[_]*const Feature { @@ -501,7 +501,7 @@ pub const feature_macrofusion = Feature{ }; pub const feature_mergeToThreewayBranch = Feature{ - .name = "merge-to-threeway-branch", + .name = "mergeToThreewayBranch", .llvm_name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", .dependencies = &[_]*const Feature { @@ -559,7 +559,7 @@ pub const feature_popcnt = Feature{ }; pub const feature_falseDepsPopcnt = Feature{ - .name = "false-deps-popcnt", + .name = "falseDepsPopcnt", .llvm_name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", .dependencies = &[_]*const Feature { @@ -591,7 +591,7 @@ pub const feature_ptwrite = Feature{ }; pub const feature_padShortFunctions = Feature{ - .name = "pad-short-functions", + .name = "padShortFunctions", .llvm_name = "pad-short-functions", .description = "Pad short functions", .dependencies = &[_]*const Feature { @@ -599,7 +599,7 @@ pub const feature_padShortFunctions = Feature{ }; pub const feature_prefer128Bit = Feature{ - .name = "prefer-128-bit", + .name = "prefer128Bit", .llvm_name = "prefer-128-bit", .description = "Prefer 128-bit AVX instructions", .dependencies = &[_]*const Feature { @@ -607,7 +607,7 @@ pub const feature_prefer128Bit = Feature{ }; pub const feature_prefer256Bit = Feature{ - .name = "prefer-256-bit", + .name = "prefer256Bit", .llvm_name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", .dependencies = &[_]*const Feature { @@ -657,7 +657,7 @@ pub const feature_retpoline = Feature{ }; pub const feature_retpolineExternalThunk = Feature{ - .name = "retpoline-external-thunk", + .name = "retpolineExternalThunk", .llvm_name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", .dependencies = &[_]*const Feature { @@ -666,7 +666,7 @@ pub const feature_retpolineExternalThunk = Feature{ }; pub const feature_retpolineIndirectBranches = Feature{ - .name = "retpoline-indirect-branches", + .name = "retpolineIndirectBranches", .llvm_name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", .dependencies = &[_]*const Feature { @@ -674,7 +674,7 @@ pub const feature_retpolineIndirectBranches = Feature{ }; pub const feature_retpolineIndirectCalls = Feature{ - .name = "retpoline-indirect-calls", + .name = "retpolineIndirectCalls", .llvm_name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", .dependencies = &[_]*const Feature { @@ -742,7 +742,7 @@ pub const feature_sse4a = Feature{ }; pub const feature_sse41 = Feature{ - .name = "sse4.1", + .name = "sse41", .llvm_name = "sse4.1", .description = "Enable SSE 4.1 instructions", .dependencies = &[_]*const Feature { @@ -751,7 +751,7 @@ pub const feature_sse41 = Feature{ }; pub const feature_sse42 = Feature{ - .name = "sse4.2", + .name = "sse42", .llvm_name = "sse4.2", .description = "Enable SSE 4.2 instructions", .dependencies = &[_]*const Feature { @@ -760,7 +760,7 @@ pub const feature_sse42 = Feature{ }; pub const feature_sseUnalignedMem = Feature{ - .name = "sse-unaligned-mem", + .name = "sseUnalignedMem", .llvm_name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", .dependencies = &[_]*const Feature { @@ -777,7 +777,7 @@ pub const feature_ssse3 = Feature{ }; pub const feature_slow3opsLea = Feature{ - .name = "slow-3ops-lea", + .name = "slow3opsLea", .llvm_name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", .dependencies = &[_]*const Feature { @@ -785,7 +785,7 @@ pub const feature_slow3opsLea = Feature{ }; pub const feature_idivlToDivb = Feature{ - .name = "idivl-to-divb", + .name = "idivlToDivb", .llvm_name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", .dependencies = &[_]*const Feature { @@ -793,7 +793,7 @@ pub const feature_idivlToDivb = Feature{ }; pub const feature_idivqToDivl = Feature{ - .name = "idivq-to-divl", + .name = "idivqToDivl", .llvm_name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", .dependencies = &[_]*const Feature { @@ -801,7 +801,7 @@ pub const feature_idivqToDivl = Feature{ }; pub const feature_slowIncdec = Feature{ - .name = "slow-incdec", + .name = "slowIncdec", .llvm_name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", .dependencies = &[_]*const Feature { @@ -809,7 +809,7 @@ pub const feature_slowIncdec = Feature{ }; pub const feature_slowLea = Feature{ - .name = "slow-lea", + .name = "slowLea", .llvm_name = "slow-lea", .description = "LEA instruction with certain arguments is slow", .dependencies = &[_]*const Feature { @@ -817,7 +817,7 @@ pub const feature_slowLea = Feature{ }; pub const feature_slowPmaddwd = Feature{ - .name = "slow-pmaddwd", + .name = "slowPmaddwd", .llvm_name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", .dependencies = &[_]*const Feature { @@ -825,7 +825,7 @@ pub const feature_slowPmaddwd = Feature{ }; pub const feature_slowPmulld = Feature{ - .name = "slow-pmulld", + .name = "slowPmulld", .llvm_name = "slow-pmulld", .description = "PMULLD instruction is slow", .dependencies = &[_]*const Feature { @@ -833,7 +833,7 @@ pub const feature_slowPmulld = Feature{ }; pub const feature_slowShld = Feature{ - .name = "slow-shld", + .name = "slowShld", .llvm_name = "slow-shld", .description = "SHLD instruction is slow", .dependencies = &[_]*const Feature { @@ -841,7 +841,7 @@ pub const feature_slowShld = Feature{ }; pub const feature_slowTwoMemOps = Feature{ - .name = "slow-two-mem-ops", + .name = "slowTwoMemOps", .llvm_name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", .dependencies = &[_]*const Feature { @@ -849,7 +849,7 @@ pub const feature_slowTwoMemOps = Feature{ }; pub const feature_slowUnalignedMem16 = Feature{ - .name = "slow-unaligned-mem-16", + .name = "slowUnalignedMem16", .llvm_name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", .dependencies = &[_]*const Feature { @@ -857,7 +857,7 @@ pub const feature_slowUnalignedMem16 = Feature{ }; pub const feature_slowUnalignedMem32 = Feature{ - .name = "slow-unaligned-mem-32", + .name = "slowUnalignedMem32", .llvm_name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", .dependencies = &[_]*const Feature { @@ -865,7 +865,7 @@ pub const feature_slowUnalignedMem32 = Feature{ }; pub const feature_softFloat = Feature{ - .name = "soft-float", + .name = "softFloat", .llvm_name = "soft-float", .description = "Use software floating point features", .dependencies = &[_]*const Feature { @@ -881,7 +881,7 @@ pub const feature_tbm = Feature{ }; pub const feature_useAa = Feature{ - .name = "use-aa", + .name = "useAa", .llvm_name = "use-aa", .description = "Use alias analysis during codegen", .dependencies = &[_]*const Feature { @@ -1026,7 +1026,7 @@ pub const feature_xsaves = Feature{ }; pub const feature_bitMode16 = Feature{ - .name = "16bit-mode", + .name = "bitMode16", .llvm_name = "16bit-mode", .description = "16-bit mode (i8086)", .dependencies = &[_]*const Feature { @@ -1034,7 +1034,7 @@ pub const feature_bitMode16 = Feature{ }; pub const feature_bitMode32 = Feature{ - .name = "32bit-mode", + .name = "bitMode32", .llvm_name = "32bit-mode", .description = "32-bit mode (80386)", .dependencies = &[_]*const Feature { @@ -1042,7 +1042,7 @@ pub const feature_bitMode32 = Feature{ }; pub const feature_bitMode64 = Feature{ - .name = "64bit-mode", + .name = "bitMode64", .llvm_name = "64bit-mode", .description = "64-bit mode (x86_64)", .dependencies = &[_]*const Feature { @@ -1217,7 +1217,7 @@ pub const cpu_athlon = Cpu{ }; pub const cpu_athlon4 = Cpu{ - .name = "athlon-4", + .name = "athlon4", .llvm_name = "athlon-4", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1234,7 +1234,7 @@ pub const cpu_athlon4 = Cpu{ }; pub const cpu_athlonFx = Cpu{ - .name = "athlon-fx", + .name = "athlonFx", .llvm_name = "athlon-fx", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1254,7 +1254,7 @@ pub const cpu_athlonFx = Cpu{ }; pub const cpu_athlonMp = Cpu{ - .name = "athlon-mp", + .name = "athlonMp", .llvm_name = "athlon-mp", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1271,7 +1271,7 @@ pub const cpu_athlonMp = Cpu{ }; pub const cpu_athlonTbird = Cpu{ - .name = "athlon-tbird", + .name = "athlonTbird", .llvm_name = "athlon-tbird", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1286,7 +1286,7 @@ pub const cpu_athlonTbird = Cpu{ }; pub const cpu_athlonXp = Cpu{ - .name = "athlon-xp", + .name = "athlonXp", .llvm_name = "athlon-xp", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1323,7 +1323,7 @@ pub const cpu_athlon64 = Cpu{ }; pub const cpu_athlon64Sse3 = Cpu{ - .name = "athlon64-sse3", + .name = "athlon64Sse3", .llvm_name = "athlon64-sse3", .dependencies = &[_]*const Feature { &feature_mmx, @@ -1678,7 +1678,7 @@ pub const cpu_c3 = Cpu{ }; pub const cpu_c32 = Cpu{ - .name = "c3-2", + .name = "c32", .llvm_name = "c3-2", .dependencies = &[_]*const Feature { &feature_cmov, @@ -1874,7 +1874,7 @@ pub const cpu_cooperlake = Cpu{ }; pub const cpu_coreAvxI = Cpu{ - .name = "core-avx-i", + .name = "coreAvxI", .llvm_name = "core-avx-i", .dependencies = &[_]*const Feature { &feature_bit64, @@ -1908,7 +1908,7 @@ pub const cpu_coreAvxI = Cpu{ }; pub const cpu_coreAvx2 = Cpu{ - .name = "core-avx2", + .name = "coreAvx2", .llvm_name = "core-avx2", .dependencies = &[_]*const Feature { &feature_bit64, @@ -1991,7 +1991,7 @@ pub const cpu_corei7 = Cpu{ }; pub const cpu_corei7Avx = Cpu{ - .name = "corei7-avx", + .name = "corei7Avx", .llvm_name = "corei7-avx", .dependencies = &[_]*const Feature { &feature_bit64, @@ -2081,7 +2081,7 @@ pub const cpu_goldmont = Cpu{ }; pub const cpu_goldmontPlus = Cpu{ - .name = "goldmont-plus", + .name = "goldmontPlus", .llvm_name = "goldmont-plus", .dependencies = &[_]*const Feature { &feature_bit64, @@ -2202,7 +2202,7 @@ pub const cpu_i686 = Cpu{ }; pub const cpu_icelakeClient = Cpu{ - .name = "icelake-client", + .name = "icelakeClient", .llvm_name = "icelake-client", .dependencies = &[_]*const Feature { &feature_bit64, @@ -2272,7 +2272,7 @@ pub const cpu_icelakeClient = Cpu{ }; pub const cpu_icelakeServer = Cpu{ - .name = "icelake-server", + .name = "icelakeServer", .llvm_name = "icelake-server", .dependencies = &[_]*const Feature { &feature_bit64, @@ -2389,7 +2389,7 @@ pub const cpu_k6 = Cpu{ }; pub const cpu_k62 = Cpu{ - .name = "k6-2", + .name = "k62", .llvm_name = "k6-2", .dependencies = &[_]*const Feature { &feature_mmx, @@ -2401,7 +2401,7 @@ pub const cpu_k62 = Cpu{ }; pub const cpu_k63 = Cpu{ - .name = "k6-3", + .name = "k63", .llvm_name = "k6-3", .dependencies = &[_]*const Feature { &feature_mmx, @@ -2433,7 +2433,7 @@ pub const cpu_k8 = Cpu{ }; pub const cpu_k8Sse3 = Cpu{ - .name = "k8-sse3", + .name = "k8Sse3", .llvm_name = "k8-sse3", .dependencies = &[_]*const Feature { &feature_mmx, @@ -2610,7 +2610,7 @@ pub const cpu_opteron = Cpu{ }; pub const cpu_opteronSse3 = Cpu{ - .name = "opteron-sse3", + .name = "opteronSse3", .llvm_name = "opteron-sse3", .dependencies = &[_]*const Feature { &feature_mmx, @@ -2661,7 +2661,7 @@ pub const cpu_pentium = Cpu{ }; pub const cpu_pentiumM = Cpu{ - .name = "pentium-m", + .name = "pentiumM", .llvm_name = "pentium-m", .dependencies = &[_]*const Feature { &feature_cmov, @@ -2677,7 +2677,7 @@ pub const cpu_pentiumM = Cpu{ }; pub const cpu_pentiumMmx = Cpu{ - .name = "pentium-mmx", + .name = "pentiumMmx", .llvm_name = "pentium-mmx", .dependencies = &[_]*const Feature { &feature_cx8, @@ -2964,7 +2964,7 @@ pub const cpu_skylake = Cpu{ }; pub const cpu_skylakeAvx512 = Cpu{ - .name = "skylake-avx512", + .name = "skylakeAvx512", .llvm_name = "skylake-avx512", .dependencies = &[_]*const Feature { &feature_bit64, @@ -3192,7 +3192,7 @@ pub const cpu_westmere = Cpu{ }; pub const cpu_winchipC6 = Cpu{ - .name = "winchip-c6", + .name = "winchipC6", .llvm_name = "winchip-c6", .dependencies = &[_]*const Feature { &feature_mmx, @@ -3213,7 +3213,7 @@ pub const cpu_winchip2 = Cpu{ }; pub const cpu_x8664 = Cpu{ - .name = "x86-64", + .name = "x8664", .llvm_name = "x86-64", .dependencies = &[_]*const Feature { &feature_bit64, diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 4fdfb05df814b5ffdcf8cb57021d24fe7abe3c32..55313d16b285e0e7a74177744a7d5a877b722429 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -623,6 +623,8 @@ const Stage2TargetDetails = struct { llvm_cpu_str: [:0]const u8, llvm_features_str: [:0]const u8, + + builtin_str: [:0]const u8, }; // ABI warning @@ -662,6 +664,16 @@ fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDeta if (std.mem.eql(u8, str, cpu.name)) { const allocator = std.heap.c_allocator; + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); + defer builtin_str_buffer.deinit(); + + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".cpu_"); + try builtin_str_buffer.append(cpu.name); + try builtin_str_buffer.append("};"); + const ptr = try allocator.create(Stage2TargetDetails); ptr.* = .{ .allocator = allocator, @@ -670,6 +682,7 @@ fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDeta }, .llvm_cpu_str = cpu.name, .llvm_features_str = "", + .builtin_str = builtin_str_buffer.toOwnedSlice(), }; return ptr; @@ -687,6 +700,11 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe var features = std.ArrayList(*const std.target.Feature).init(allocator); defer features.deinit(); + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); + defer builtin_str_buffer.deinit(); + var start: usize = 0; while (start < str.len) { const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start; @@ -706,10 +724,18 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe if (feature) |f| { features.append(f) catch @panic("out of memory"); + + try builtin_str_buffer.append("&@import(\"std\").target."); + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".feature_"); + try builtin_str_buffer.append(f.name); + try builtin_str_buffer.append(","); } else { return error.InvalidFeature; } } + + try builtin_str_buffer.append("}};"); const features_slice = features.toOwnedSlice(); @@ -730,6 +756,7 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe }, .llvm_cpu_str = "", .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + .builtin_str = builtin_str_buffer.toOwnedSlice(), }; return ptr; @@ -764,3 +791,12 @@ export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2 return @as([*:0]const u8, ""); } + +// ABI warning +export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.builtin_str); + } + + return @as([*:0]const u8, ""); +} diff --git a/src/codegen.cpp b/src/codegen.cpp index 760284a2e27b0fe4a288a24cf8d58542a7b0f863..4aa71f32c796665940164d82f9ad5a4d1e541e21 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8607,6 +8607,14 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { "pub var test_functions: []TestFn = undefined; // overwritten later\n" ); } + + buf_appendf(contents, "pub const target_details: ?@import(\"std\").target.TargetDetails = "); + if (g->target_details) { + buf_appendf(contents, "%s", stage2_target_details_get_builtin_str(g->target_details)); + } else { + buf_appendf(contents, "null;"); + } + buf_appendf(contents, "\n"); return contents; } diff --git a/src/main.cpp b/src/main.cpp index da8b354796ad445744346d12c6a8fc8ecf25532e..f40f62a653736c9ec03297d06176d04ded487c1f 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1074,6 +1074,24 @@ int main(int argc, char **argv) { } } + Stage2TargetDetails *target_details = nullptr; + if (cpu && features) { + fprintf(stderr, "--cpu and --features options not allowed together\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } else if (cpu) { + target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu); + if (!target_details) { + fprintf(stderr, "invalid --cpu value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } else if (features) { + target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features); + if (!target_details) { + fprintf(stderr, "invalid --features value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } + if (output_dir != nullptr && enable_cache == CacheOptOn) { fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n"); return print_error_usage(arg0); @@ -1124,6 +1142,7 @@ int main(int argc, char **argv) { g->want_stack_check = want_stack_check; g->want_sanitize_c = want_sanitize_c; g->want_single_threaded = want_single_threaded; + g->target_details = target_details; Buf *builtin_source = codegen_generate_builtin_source(g); if (fwrite(buf_ptr(builtin_source), 1, buf_len(builtin_source), stdout) != buf_len(builtin_source)) { fprintf(stderr, "unable to write to stdout: %s\n", strerror(ferror(stdout))); @@ -1278,24 +1297,6 @@ int main(int argc, char **argv) { codegen_add_rpath(g, rpath_list.at(i)); } - Stage2TargetDetails *target_details = nullptr; - if (cpu && features) { - fprintf(stderr, "--cpu and --features options not allowed together\n"); - return main_exit(root_progress_node, EXIT_FAILURE); - } else if (cpu) { - target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu); - if (!target_details) { - fprintf(stderr, "invalid --cpu value\n"); - return main_exit(root_progress_node, EXIT_FAILURE); - } - } else if (features) { - target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features); - if (!target_details) { - fprintf(stderr, "invalid --features value\n"); - return main_exit(root_progress_node, EXIT_FAILURE); - } - } - g->target_details = target_details; codegen_set_rdynamic(g, rdynamic); diff --git a/src/userland.cpp b/src/userland.cpp index 468017cb51a63b335558884dffdbc4b226d3c576..9481a3f0b3b2dee192cb1235bd66b19d31a80c6a 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -106,3 +106,6 @@ const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) { return ""; } +const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) { + return ""; +} diff --git a/src/userland.h b/src/userland.h index 11801e10388a5071f593c17d68ed974bdc6e6c4f..0315ac11170c31368e455a3abec44b73da47ab06 100644 --- a/src/userland.h +++ b/src/userland.h @@ -198,4 +198,7 @@ ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDe // ABI warning ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details); +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details); + #endif -- 2.54.0 From fd17a9962b07147a5b20487ab8e4d9bc0aa946cd Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 8 Jan 2020 22:29:12 -0500 Subject: [PATCH 17/63] Add defaut feature support --- src-self-hosted/stage1.zig | 177 ++++++++++++++++++++++++++----------- src/codegen.cpp | 21 +---- src/main.cpp | 6 ++ src/userland.cpp | 3 + src/userland.h | 3 + 5 files changed, 141 insertions(+), 69 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 55313d16b285e0e7a74177744a7d5a877b722429..a1c1a2a5d3a716cb11d9ec16258e37338d9038cc 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -625,6 +625,63 @@ const Stage2TargetDetails = struct { llvm_features_str: [:0]const u8, builtin_str: [:0]const u8, + + const Self = @This(); + + fn initCpu(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), cpu: *const std.target.Cpu) !Self { + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); + defer builtin_str_buffer.deinit(); + + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".cpu_"); + try builtin_str_buffer.append(cpu.name); + try builtin_str_buffer.append("};"); + return Self{ + .allocator = allocator, + .target_details = .{ + .cpu = cpu, + }, + .llvm_cpu_str = cpu.name, + .llvm_features_str = "", + .builtin_str = builtin_str_buffer.toOwnedSlice(), + }; + } + + fn initFeatures(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), features: []*const std.target.Feature) !Self { + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); + defer builtin_str_buffer.deinit(); + + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); + + for (features) |feature| { + try llvm_features_buffer.append("+"); + try llvm_features_buffer.append(feature.llvm_name); + try llvm_features_buffer.append(","); + + try builtin_str_buffer.append("&@import(\"std\").target."); + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".feature_"); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append(","); + } + + try builtin_str_buffer.append("}};"); + + return Self{ + .allocator = allocator, + .target_details = std.target.TargetDetails{ + .features = features, + }, + .llvm_cpu_str = "", + .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + .builtin_str = builtin_str_buffer.toOwnedSlice(), + }; + } }; // ABI warning @@ -658,32 +715,14 @@ export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, feature } fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { + const allocator = std.heap.c_allocator; + const cpus = std.target.getCpusForArch(arch); for (cpus) |cpu| { if (std.mem.eql(u8, str, cpu.name)) { - const allocator = std.heap.c_allocator; - - var builtin_str_buffer = try std.Buffer.init( - allocator, - "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); - defer builtin_str_buffer.deinit(); - - try builtin_str_buffer.append(@tagName(arch)); - try builtin_str_buffer.append(".cpu_"); - try builtin_str_buffer.append(cpu.name); - try builtin_str_buffer.append("};"); - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = .{ - .allocator = allocator, - .target_details = .{ - .cpu = cpu, - }, - .llvm_cpu_str = cpu.name, - .llvm_features_str = "", - .builtin_str = builtin_str_buffer.toOwnedSlice(), - }; + ptr.* = try Stage2TargetDetails.initCpu(std.heap.c_allocator, arch, cpu); return ptr; } @@ -700,11 +739,6 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe var features = std.ArrayList(*const std.target.Feature).init(allocator); defer features.deinit(); - var builtin_str_buffer = try std.Buffer.init( - allocator, - "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); - defer builtin_str_buffer.deinit(); - var start: usize = 0; while (start < str.len) { const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start; @@ -725,39 +759,15 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe if (feature) |f| { features.append(f) catch @panic("out of memory"); - try builtin_str_buffer.append("&@import(\"std\").target."); - try builtin_str_buffer.append(@tagName(arch)); - try builtin_str_buffer.append(".feature_"); - try builtin_str_buffer.append(f.name); - try builtin_str_buffer.append(","); } else { return error.InvalidFeature; } } - try builtin_str_buffer.append("}};"); - const features_slice = features.toOwnedSlice(); - var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); - defer llvm_features_buffer.deinit(); - - for (features_slice) |feature| { - try llvm_features_buffer.append("+"); - try llvm_features_buffer.append(feature.llvm_name); - try llvm_features_buffer.append(","); - } - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = Stage2TargetDetails{ - .allocator = allocator, - .target_details = std.target.TargetDetails{ - .features = features_slice, - }, - .llvm_cpu_str = "", - .llvm_features_str = llvm_features_buffer.toOwnedSlice(), - .builtin_str = builtin_str_buffer.toOwnedSlice(), - }; + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features_slice); return ptr; } @@ -800,3 +810,68 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta return @as([*:0]const u8, ""); } + +const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_sse, + &std.target.x86.feature_sse2, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + +// Same as above but without sse. +const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + +// ABI warning +export fn stage2_target_details_get_default(arch_str: ?[*:0]const u8, os_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (arch_str == null) return null; + if (os_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; + const os = Target.parseOs(std.mem.toSliceConst(u8, os_str.?)) catch return null; + + return createDefaultTargetDetails(arch, os) catch return null; +} + +fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os) !?*Stage2TargetDetails { + const allocator = std.heap.c_allocator; + + return switch (arch) { + .riscv32, .riscv64 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv_default_features); + break :blk ptr; + }, + .i386 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + const features = switch (os) { + .freestanding => i386_default_features_freestanding, + else => i386_default_features, + }; + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features); + break :blk ptr; + }, + else => null, + }; +} diff --git a/src/codegen.cpp b/src/codegen.cpp index 4aa71f32c796665940164d82f9ad5a4d1e541e21..d0749c9432e9e90b0a1302728e2945946a5885c2 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8781,8 +8781,9 @@ static void init(CodeGen *g) { reloc_mode = LLVMRelocStatic; } - const char *target_specific_cpu_args; - const char *target_specific_features; + const char *target_specific_cpu_args = ""; + const char *target_specific_features = ""; + if (g->zig_target->is_native) { // LLVM creates invalid binaries on Windows sometimes. // See https://github.com/ziglang/zig/issues/508 @@ -8794,22 +8795,6 @@ static void init(CodeGen *g) { target_specific_cpu_args = ZigLLVMGetHostCPUName(); target_specific_features = ZigLLVMGetNativeFeatures(); } - } else if (target_is_riscv(g->zig_target)) { - // TODO https://github.com/ziglang/zig/issues/2883 - // Be aware of https://github.com/ziglang/zig/issues/3275 - target_specific_cpu_args = ""; - target_specific_features = riscv_default_features; - } else if (g->zig_target->arch == ZigLLVM_x86) { - // This is because we're really targeting i686 rather than i386. - // It's pretty much impossible to use many of the language features - // such as fp16 if you stick use the x87 only. This is also what clang - // uses as base cpu. - // TODO https://github.com/ziglang/zig/issues/2883 - target_specific_cpu_args = "pentium4"; - target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": ""; - } else { - target_specific_cpu_args = ""; - target_specific_features = ""; } // Override CPU and features if defined by user. diff --git a/src/main.cpp b/src/main.cpp index f40f62a653736c9ec03297d06176d04ded487c1f..441bc2afb0e2e85e31204133a4afa9f7d90467df 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1090,6 +1090,12 @@ int main(int argc, char **argv) { fprintf(stderr, "invalid --features value\n"); return main_exit(root_progress_node, EXIT_FAILURE); } + } else { + // If no details are specified and we are not native, load + // cross-compilation default features. + if (!target.is_native) { + target_details = stage2_target_details_get_default(target_arch_name(target.arch), target_os_name(target.os)); + } } if (output_dir != nullptr && enable_cache == CacheOptOn) { diff --git a/src/userland.cpp b/src/userland.cpp index 9481a3f0b3b2dee192cb1235bd66b19d31a80c6a..0e173d7e76427ece75719341722d5acb2f892fa3 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -109,3 +109,6 @@ const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *t const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) { return ""; } +Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os) { + return nullptr; +} diff --git a/src/userland.h b/src/userland.h index 0315ac11170c31368e455a3abec44b73da47ab06..f954efd3fe0db8a4f72843ff6122bccbfb3b1589 100644 --- a/src/userland.h +++ b/src/userland.h @@ -201,4 +201,7 @@ ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2Tar // ABI warning ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details); +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os); + #endif -- 2.54.0 From ebb6f15bbad7d86c76bd1e8deb39553b5791a69e Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 8 Jan 2020 23:14:25 -0500 Subject: [PATCH 18/63] Make sure llvm strings are null-terminated --- src-self-hosted/stage1.zig | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index a1c1a2a5d3a716cb11d9ec16258e37338d9038cc..5d460f1f981f9abc7076f86e9df58ceddccd98d2 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -617,6 +617,15 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { } } +fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 { + var buffer = try std.Buffer.init(allocator, str); + + const len = buffer.len(); + + // Don't deinit since we steal all the buffer's memory here. + return buffer.list.toOwnedSlice()[0..len :0]; +} + const Stage2TargetDetails = struct { allocator: *std.mem.Allocator, target_details: std.target.TargetDetails, @@ -643,8 +652,8 @@ const Stage2TargetDetails = struct { .target_details = .{ .cpu = cpu, }, - .llvm_cpu_str = cpu.name, - .llvm_features_str = "", + .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name), + .llvm_features_str = try toNullTerminatedStringAlloc(allocator, ""), .builtin_str = builtin_str_buffer.toOwnedSlice(), }; } @@ -672,13 +681,16 @@ const Stage2TargetDetails = struct { try builtin_str_buffer.append("}};"); + // This is needed here because llvm_features_buffer.len() is no longer valid after toOwnedSlice(). + const llvm_features_buffer_len = llvm_features_buffer.len(); + return Self{ .allocator = allocator, .target_details = std.target.TargetDetails{ .features = features, }, - .llvm_cpu_str = "", - .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, ""), + .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0], .builtin_str = builtin_str_buffer.toOwnedSlice(), }; } -- 2.54.0 From 40ff35948625e47964d2adbc3bdec8bd6a40d2db Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 15 Jan 2020 17:51:06 -0500 Subject: [PATCH 19/63] Only enable requested features --- src-self-hosted/stage1.zig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 5d460f1f981f9abc7076f86e9df58ceddccd98d2..1d08616ae28adf2fcbb9e71677c331ec9e216ef5 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -667,6 +667,14 @@ const Stage2TargetDetails = struct { var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); defer llvm_features_buffer.deinit(); + // First, disable all features. + // This way, we only get the ones the user requests. + for (std.target.getFeaturesForArch(arch)) |feature| { + try llvm_features_buffer.append("-"); + try llvm_features_buffer.append(feature.llvm_name); + try llvm_features_buffer.append(","); + } + for (features) |feature| { try llvm_features_buffer.append("+"); try llvm_features_buffer.append(feature.llvm_name); -- 2.54.0 From a5c93975394af6638e04f6a8a8c4f060bc4887d1 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Wed, 15 Jan 2020 18:12:32 -0500 Subject: [PATCH 20/63] No allocations for n.t. empty strings --- src-self-hosted/stage1.zig | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 1d08616ae28adf2fcbb9e71677c331ec9e216ef5..db6d281fea1f8e9b3e6ed581b8660e6aea39180e 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -617,6 +617,8 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { } } +const null_terminated_empty_string = (&[_]u8 { 0 })[0..0 :0]; + fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 { var buffer = try std.Buffer.init(allocator, str); @@ -653,7 +655,7 @@ const Stage2TargetDetails = struct { .cpu = cpu, }, .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name), - .llvm_features_str = try toNullTerminatedStringAlloc(allocator, ""), + .llvm_features_str = null_terminated_empty_string, .builtin_str = builtin_str_buffer.toOwnedSlice(), }; } @@ -697,7 +699,7 @@ const Stage2TargetDetails = struct { .target_details = std.target.TargetDetails{ .features = features, }, - .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, ""), + .llvm_cpu_str = null_terminated_empty_string, .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0], .builtin_str = builtin_str_buffer.toOwnedSlice(), }; @@ -801,7 +803,7 @@ export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2Targ }); } - return @as([*:0]const u8, ""); + return @as([*:0]const u8, null_terminated_empty_string); } // ABI warning @@ -810,7 +812,7 @@ export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2Targe return @as([*:0]const u8, td.llvm_cpu_str); } - return @as([*:0]const u8, ""); + return @as([*:0]const u8, null_terminated_empty_string); } // ABI warning @@ -819,7 +821,7 @@ export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2 return @as([*:0]const u8, td.llvm_features_str); } - return @as([*:0]const u8, ""); + return @as([*:0]const u8, null_terminated_empty_string); } // ABI warning @@ -828,7 +830,7 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta return @as([*:0]const u8, td.builtin_str); } - return @as([*:0]const u8, ""); + return @as([*:0]const u8, null_terminated_empty_string); } const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { -- 2.54.0 From de8a5cf5f54650a5d043c6ad2c41827037f7f75d Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Thu, 16 Jan 2020 14:24:55 -0500 Subject: [PATCH 21/63] Remove features/cpus not in LLVM v9 --- lib/std/target/aarch64.zig | 514 ++++------ lib/std/target/amdgpu.zig | 870 +++++++++-------- lib/std/target/arm.zig | 783 ++++++++------- lib/std/target/avr.zig | 1856 ++++++++++++++++++------------------ lib/std/target/mips.zig | 137 ++- lib/std/target/powerpc.zig | 4 +- lib/std/target/riscv.zig | 11 - lib/std/target/systemz.zig | 43 - lib/std/target/x86.zig | 129 +-- 9 files changed, 2017 insertions(+), 2330 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index c3c530fb6fd66839c2b6e443d6fa72a16186cb5a..56101f20e77204d7e5116215fbdd411d8603461a 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -228,15 +228,6 @@ pub const feature_dotprod = Feature{ }, }; -pub const feature_ete = Feature{ - .name = "ete", - .llvm_name = "ete", - .description = "Enable Embedded Trace Extension", - .dependencies = &[_]*const Feature { - &feature_trbe, - }, -}; - pub const feature_exynosCheapAsMove = Feature{ .name = "exynosCheapAsMove", .llvm_name = "exynos-cheap-as-move", @@ -806,8 +797,8 @@ pub const feature_sve2Aes = Feature{ .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", .dependencies = &[_]*const Feature { - &feature_fpArmv8, &feature_sve, + &feature_fpArmv8, }, }; @@ -825,8 +816,8 @@ pub const feature_sve2Sha3 = Feature{ .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", .dependencies = &[_]*const Feature { - &feature_fpArmv8, &feature_sve, + &feature_fpArmv8, }, }; @@ -835,8 +826,8 @@ pub const feature_sve2Sm4 = Feature{ .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", .dependencies = &[_]*const Feature { - &feature_fpArmv8, &feature_sve, + &feature_fpArmv8, }, }; @@ -888,14 +879,6 @@ pub const feature_tlbRmi = Feature{ }, }; -pub const feature_tme = Feature{ - .name = "tme", - .llvm_name = "tme", - .description = "Enable Transactional Memory Extension", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_tracev84 = Feature{ .name = "tracev84", .llvm_name = "tracev8.4", @@ -904,22 +887,6 @@ pub const feature_tracev84 = Feature{ }, }; -pub const feature_trbe = Feature{ - .name = "trbe", - .llvm_name = "trbe", - .description = "Enable Trace Buffer Extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_taggedGlobals = Feature{ - .name = "taggedGlobals", - .llvm_name = "tagged-globals", - .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_useAa = Feature{ .name = "useAa", .llvm_name = "use-aa", @@ -1039,7 +1006,6 @@ pub const features = &[_]*const Feature { &feature_dit, &feature_disableLatencySchedHeuristic, &feature_dotprod, - &feature_ete, &feature_exynosCheapAsMove, &feature_fmi, &feature_fp16fml, @@ -1119,10 +1085,7 @@ pub const features = &[_]*const Feature { &feature_specrestrict, &feature_strictAlign, &feature_tlbRmi, - &feature_tme, &feature_tracev84, - &feature_trbe, - &feature_taggedGlobals, &feature_useAa, &feature_tpidrEl1, &feature_tpidrEl2, @@ -1140,18 +1103,18 @@ pub const cpu_appleLatest = Cpu{ .name = "appleLatest", .llvm_name = "apple-latest", .dependencies = &[_]*const Feature { - &feature_fpArmv8, + &feature_arithCbzFusion, + &feature_zczFpWorkaround, &feature_alternateSextloadCvtF32Pattern, - &feature_arithBccFusion, - &feature_zczFp, - &feature_zczGp, - &feature_zcm, - &feature_fuseAes, - &feature_disableLatencySchedHeuristic, &feature_fuseCryptoEor, + &feature_zcm, + &feature_zczGp, &feature_perfmon, - &feature_zczFpWorkaround, - &feature_arithCbzFusion, + &feature_disableLatencySchedHeuristic, + &feature_fpArmv8, + &feature_zczFp, + &feature_arithBccFusion, + &feature_fuseAes, }, }; @@ -1159,9 +1122,9 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortexA35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { + &feature_perfmon, &feature_fpArmv8, &feature_crc, - &feature_perfmon, }, }; @@ -1169,14 +1132,14 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortexA53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_balanceFpOps, - &feature_usePostraScheduler, - &feature_crc, &feature_customCheapAsMove, + &feature_crc, + &feature_perfmon, &feature_useAa, + &feature_fpArmv8, &feature_fuseAes, - &feature_perfmon, + &feature_balanceFpOps, + &feature_usePostraScheduler, }, }; @@ -1184,20 +1147,20 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortexA55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, + &feature_ccpp, &feature_rcpc, - &feature_lse, - &feature_crc, &feature_uaops, &feature_rdm, - &feature_lor, - &feature_fuseAes, &feature_ras, + &feature_lse, + &feature_crc, &feature_perfmon, - &feature_ccpp, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_dotprod, + &feature_pan, }, }; @@ -1205,55 +1168,15 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortexA57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_balanceFpOps, &feature_fuseLiterals, - &feature_usePostraScheduler, - &feature_crc, + &feature_predictableSelectExpensive, &feature_customCheapAsMove, - &feature_fuseAes, + &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, - }, -}; - -pub const cpu_cortexA65 = Cpu{ - .name = "cortexA65", - .llvm_name = "cortex-a65", - .dependencies = &[_]*const Feature { &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, - &feature_rcpc, - &feature_lse, - &feature_crc, - &feature_uaops, - &feature_rdm, - &feature_lor, - &feature_ras, - &feature_ssbs, - &feature_ccpp, - }, -}; - -pub const cpu_cortexA65ae = Cpu{ - .name = "cortexA65ae", - .llvm_name = "cortex-a65ae", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, - &feature_rcpc, - &feature_lse, - &feature_crc, - &feature_uaops, - &feature_rdm, - &feature_lor, - &feature_ras, - &feature_ssbs, - &feature_ccpp, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_usePostraScheduler, }, }; @@ -1261,10 +1184,10 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortexA72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { + &feature_fuseAes, &feature_fpArmv8, - &feature_crc, &feature_perfmon, - &feature_fuseAes, + &feature_crc, }, }; @@ -1272,10 +1195,10 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortexA73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { + &feature_fuseAes, &feature_fpArmv8, - &feature_crc, &feature_perfmon, - &feature_fuseAes, + &feature_crc, }, }; @@ -1283,20 +1206,20 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortexA75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, + &feature_ccpp, &feature_rcpc, - &feature_lse, - &feature_crc, &feature_uaops, &feature_rdm, - &feature_lor, - &feature_fuseAes, &feature_ras, + &feature_lse, + &feature_crc, &feature_perfmon, - &feature_ccpp, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_dotprod, + &feature_pan, }, }; @@ -1304,19 +1227,19 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortexA76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, + &feature_ccpp, &feature_rcpc, - &feature_lse, - &feature_crc, &feature_uaops, &feature_rdm, - &feature_lor, &feature_ras, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_lor, &feature_ssbs, - &feature_ccpp, + &feature_dotprod, + &feature_pan, }, }; @@ -1324,19 +1247,19 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortexA76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, + &feature_ccpp, &feature_rcpc, - &feature_lse, - &feature_crc, &feature_uaops, &feature_rdm, - &feature_lor, &feature_ras, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_lor, &feature_ssbs, - &feature_ccpp, + &feature_dotprod, + &feature_pan, }, }; @@ -1344,18 +1267,18 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_fpArmv8, + &feature_arithCbzFusion, + &feature_zczFpWorkaround, &feature_alternateSextloadCvtF32Pattern, - &feature_arithBccFusion, - &feature_zczFp, - &feature_zczGp, - &feature_zcm, - &feature_fuseAes, - &feature_disableLatencySchedHeuristic, &feature_fuseCryptoEor, + &feature_zcm, + &feature_zczGp, &feature_perfmon, - &feature_zczFpWorkaround, - &feature_arithCbzFusion, + &feature_disableLatencySchedHeuristic, + &feature_fpArmv8, + &feature_zczFp, + &feature_arithBccFusion, + &feature_fuseAes, }, }; @@ -1363,17 +1286,17 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynosM1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_fpArmv8, + &feature_customCheapAsMove, + &feature_crc, + &feature_force32bitJumpTables, + &feature_perfmon, &feature_slowMisaligned128store, - &feature_usePostraScheduler, &feature_useReciprocalSquareRoot, - &feature_crc, + &feature_fpArmv8, &feature_zczFp, - &feature_customCheapAsMove, - &feature_force32bitJumpTables, &feature_fuseAes, &feature_slowPaired128, - &feature_perfmon, + &feature_usePostraScheduler, }, }; @@ -1381,16 +1304,16 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynosM2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_slowMisaligned128store, - &feature_usePostraScheduler, - &feature_crc, - &feature_zczFp, &feature_customCheapAsMove, + &feature_crc, &feature_force32bitJumpTables, + &feature_perfmon, + &feature_slowMisaligned128store, + &feature_fpArmv8, + &feature_zczFp, &feature_fuseAes, &feature_slowPaired128, - &feature_perfmon, + &feature_usePostraScheduler, }, }; @@ -1398,19 +1321,19 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynosM3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_fuseAddress, &feature_fuseLiterals, - &feature_usePostraScheduler, - &feature_crc, - &feature_lslFast, + &feature_predictableSelectExpensive, &feature_customCheapAsMove, - &feature_zczFp, + &feature_crc, &feature_force32bitJumpTables, + &feature_fuseAddress, &feature_fuseCsel, - &feature_fuseAes, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_zczFp, + &feature_fuseAes, + &feature_lslFast, + &feature_usePostraScheduler, }, }; @@ -1418,31 +1341,31 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynosM4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_customCheapAsMove, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_lor, + &feature_fuseLiterals, + &feature_ccpp, + &feature_ras, + &feature_fpArmv8, + &feature_fuseAes, &feature_pan, - &feature_fuseAddress, - &feature_usePostraScheduler, + &feature_fuseArithLogic, &feature_crc, - &feature_customCheapAsMove, &feature_force32bitJumpTables, - &feature_uaops, - &feature_lor, + &feature_fuseAddress, + &feature_fuseCsel, &feature_arithBccFusion, - &feature_arithCbzFusion, - &feature_dotprod, - &feature_fuseArithLogic, - &feature_zczGp, + &feature_uaops, &feature_rdm, - &feature_fuseCsel, + &feature_zczGp, &feature_perfmon, - &feature_fpArmv8, &feature_vh, - &feature_fuseLiterals, - &feature_lse, - &feature_zczFp, - &feature_lslFast, - &feature_fuseAes, - &feature_ras, - &feature_ccpp, + &feature_usePostraScheduler, + &feature_dotprod, }, }; @@ -1450,31 +1373,31 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynosM5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_customCheapAsMove, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_lor, + &feature_fuseLiterals, + &feature_ccpp, + &feature_ras, + &feature_fpArmv8, + &feature_fuseAes, &feature_pan, - &feature_fuseAddress, - &feature_usePostraScheduler, + &feature_fuseArithLogic, &feature_crc, - &feature_customCheapAsMove, &feature_force32bitJumpTables, - &feature_uaops, - &feature_lor, + &feature_fuseAddress, + &feature_fuseCsel, &feature_arithBccFusion, - &feature_arithCbzFusion, - &feature_dotprod, - &feature_fuseArithLogic, - &feature_zczGp, + &feature_uaops, &feature_rdm, - &feature_fuseCsel, + &feature_zczGp, &feature_perfmon, - &feature_fpArmv8, &feature_vh, - &feature_fuseLiterals, - &feature_lse, - &feature_zczFp, - &feature_lslFast, - &feature_fuseAes, - &feature_ras, - &feature_ccpp, + &feature_usePostraScheduler, + &feature_dotprod, }, }; @@ -1482,17 +1405,17 @@ pub const cpu_falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, - &feature_crc, - &feature_lslFast, + &feature_predictableSelectExpensive, &feature_customCheapAsMove, + &feature_rdm, &feature_slowStrqroStore, - &feature_zczFp, - &feature_rdm, &feature_zczGp, + &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_zczFp, + &feature_lslFast, + &feature_usePostraScheduler, }, }; @@ -1500,8 +1423,6 @@ pub const cpu_generic = Cpu{ .name = "generic", .llvm_name = "generic", .dependencies = &[_]*const Feature { - &feature_trbe, - &feature_ete, &feature_fpArmv8, &feature_fuseAes, &feature_neon, @@ -1514,56 +1435,15 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, - &feature_crc, - &feature_lslFast, + &feature_predictableSelectExpensive, &feature_customCheapAsMove, - &feature_zczFp, &feature_zczGp, + &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, - }, -}; - -pub const cpu_neoverseE1 = Cpu{ - .name = "neoverseE1", - .llvm_name = "neoverse-e1", - .dependencies = &[_]*const Feature { &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, - &feature_rcpc, - &feature_lse, - &feature_crc, - &feature_uaops, - &feature_rdm, - &feature_lor, - &feature_ras, - &feature_ssbs, - &feature_ccpp, - }, -}; - -pub const cpu_neoverseN1 = Cpu{ - .name = "neoverseN1", - .llvm_name = "neoverse-n1", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_dotprod, - &feature_rcpc, - &feature_lse, - &feature_crc, - &feature_uaops, - &feature_rdm, - &feature_spe, - &feature_lor, - &feature_ras, - &feature_ssbs, - &feature_ccpp, + &feature_zczFp, + &feature_lslFast, + &feature_usePostraScheduler, }, }; @@ -1571,36 +1451,36 @@ pub const cpu_saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .dependencies = &[_]*const Feature { - &feature_am, - &feature_pan, - &feature_usePostraScheduler, - &feature_tracev84, - &feature_rcpc, - &feature_sel2, - &feature_crc, - &feature_customCheapAsMove, - &feature_tlbRmi, - &feature_uaops, - &feature_lor, - &feature_dotprod, - &feature_zczGp, - &feature_rdm, - &feature_pa, - &feature_perfmon, - &feature_fpArmv8, - &feature_vh, - &feature_lse, - &feature_zczFp, - &feature_spe, &feature_predictableSelectExpensive, + &feature_customCheapAsMove, &feature_fmi, + &feature_lse, + &feature_zczFp, &feature_lslFast, - &feature_mpam, + &feature_lor, &feature_dit, - &feature_nv, + &feature_pa, + &feature_ccpp, + &feature_sel2, + &feature_ras, + &feature_fpArmv8, &feature_ccidx, - &feature_ras, - &feature_ccpp, + &feature_pan, + &feature_rcpc, + &feature_crc, + &feature_tracev84, + &feature_mpam, + &feature_am, + &feature_nv, + &feature_tlbRmi, + &feature_uaops, + &feature_rdm, + &feature_zczGp, + &feature_perfmon, + &feature_vh, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_spe, }, }; @@ -1608,11 +1488,11 @@ pub const cpu_thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_predictableSelectExpensive, &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1620,17 +1500,17 @@ pub const cpu_thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_usePostraScheduler, - &feature_crc, - &feature_lse, - &feature_rdm, - &feature_lor, - &feature_arithBccFusion, &feature_predictableSelectExpensive, &feature_aggressiveFma, + &feature_rdm, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_arithBccFusion, + &feature_lor, + &feature_usePostraScheduler, + &feature_pan, }, }; @@ -1638,11 +1518,11 @@ pub const cpu_thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_predictableSelectExpensive, &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1650,11 +1530,11 @@ pub const cpu_thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_predictableSelectExpensive, &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1662,11 +1542,11 @@ pub const cpu_thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_usePostraScheduler, + &feature_predictableSelectExpensive, &feature_crc, &feature_perfmon, - &feature_predictableSelectExpensive, + &feature_fpArmv8, + &feature_usePostraScheduler, }, }; @@ -1674,22 +1554,22 @@ pub const cpu_tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_pan, - &feature_vh, - &feature_usePostraScheduler, - &feature_dotprod, - &feature_lse, - &feature_crc, + &feature_ccpp, &feature_customCheapAsMove, &feature_uaops, &feature_rdm, - &feature_spe, - &feature_lor, - &feature_fuseAes, &feature_ras, + &feature_lse, + &feature_crc, &feature_perfmon, - &feature_ccpp, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_pan, + &feature_spe, }, }; @@ -1699,8 +1579,6 @@ pub const cpus = &[_]*const Cpu { &cpu_cortexA53, &cpu_cortexA55, &cpu_cortexA57, - &cpu_cortexA65, - &cpu_cortexA65ae, &cpu_cortexA72, &cpu_cortexA73, &cpu_cortexA75, @@ -1715,8 +1593,6 @@ pub const cpus = &[_]*const Cpu { &cpu_falkor, &cpu_generic, &cpu_kryo, - &cpu_neoverseE1, - &cpu_neoverseN1, &cpu_saphira, &cpu_thunderx, &cpu_thunderx2t99, diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index f1954628c5a268c9d95872e47fab44470ded3252..5efc6e177f5c29c084c113c1294e3129cfae9b09 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -460,14 +460,6 @@ pub const feature_maiInsts = Feature{ }, }; -pub const feature_mfmaInlineLiteralBug = Feature{ - .name = "mfmaInlineLiteralBug", - .llvm_name = "mfma-inline-literal-bug", - .description = "MFMA cannot use inline literal as SrcC", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_mimgR128 = Feature{ .name = "mimgR128", .llvm_name = "mimg-r128", @@ -886,7 +878,6 @@ pub const features = &[_]*const Feature { &feature_localmemorysize32768, &feature_localmemorysize65536, &feature_maiInsts, - &feature_mfmaInlineLiteralBug, &feature_mimgR128, &feature_madMixInsts, &feature_maxPrivateElementSize4, @@ -941,15 +932,15 @@ pub const cpu_bonaire = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -962,28 +953,28 @@ pub const cpu_carrizo = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, &feature_xnack, &feature_halfRate64Ops, }, @@ -997,28 +988,28 @@ pub const cpu_fiji = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -1047,40 +1038,40 @@ pub const cpu_gfx1010 = Cpu{ &feature_dlInsts, &feature_noXnackSupport, &feature_flatSegmentOffsetBug, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_gfx10Insts, - &feature_BitInsts16, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, - &feature_dpp8, - &feature_flatScratchInsts, - &feature_flatInstOffsets, &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, &feature_sdwa, - &feature_fmaMixInsts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, &feature_sMemrealtime, - &feature_vscnt, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, &feature_fastFmaf, - &feature_registerBanking, - &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_noSdstCmpx, - &feature_fp64, &feature_noSramEccSupport, - &feature_gfx8Insts, + &feature_gfx10Insts, &feature_localmemorysize65536, - &feature_movrel, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, &feature_sdwaOmod, - &feature_noDataDepHazard, - &feature_ciInsts, - &feature_addNoCarryInsts, + &feature_vscnt, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1111,40 +1102,40 @@ pub const cpu_gfx1011 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_gfx10Insts, - &feature_BitInsts16, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, - &feature_dpp8, - &feature_flatScratchInsts, - &feature_flatInstOffsets, &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, &feature_sdwa, - &feature_fmaMixInsts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, &feature_sMemrealtime, - &feature_vscnt, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, &feature_fastFmaf, - &feature_registerBanking, - &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_noSdstCmpx, - &feature_fp64, &feature_noSramEccSupport, - &feature_gfx8Insts, + &feature_gfx10Insts, &feature_localmemorysize65536, - &feature_movrel, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, &feature_sdwaOmod, - &feature_noDataDepHazard, - &feature_ciInsts, - &feature_addNoCarryInsts, + &feature_vscnt, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1174,40 +1165,40 @@ pub const cpu_gfx1012 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_flatSegmentOffsetBug, - &feature_vop3Literal, - &feature_apertureRegs, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_gfx10Insts, - &feature_BitInsts16, - &feature_pkFmacF16Inst, - &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, - &feature_dpp8, - &feature_flatScratchInsts, - &feature_flatInstOffsets, &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, &feature_sdwa, - &feature_fmaMixInsts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, &feature_sMemrealtime, - &feature_vscnt, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, &feature_fastFmaf, - &feature_registerBanking, - &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_noSdstCmpx, - &feature_fp64, &feature_noSramEccSupport, - &feature_gfx8Insts, + &feature_gfx10Insts, &feature_localmemorysize65536, - &feature_movrel, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, &feature_sdwaOmod, - &feature_noDataDepHazard, - &feature_ciInsts, - &feature_addNoCarryInsts, + &feature_vscnt, &feature_instFwdPrefetchBug, &feature_ldsbankcount32, &feature_ldsBranchVmemWarHazard, @@ -1234,13 +1225,13 @@ pub const cpu_gfx600 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_halfRate64Ops, }, }; @@ -1252,13 +1243,13 @@ pub const cpu_gfx601 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, }, }; @@ -1269,15 +1260,15 @@ pub const cpu_gfx700 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1290,15 +1281,15 @@ pub const cpu_gfx701 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, &feature_halfRate64Ops, }, @@ -1312,15 +1303,15 @@ pub const cpu_gfx702 = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount16, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1332,15 +1323,15 @@ pub const cpu_gfx703 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1352,15 +1343,15 @@ pub const cpu_gfx704 = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1373,28 +1364,28 @@ pub const cpu_gfx801 = Cpu{ &feature_fastFmaf, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, &feature_xnack, &feature_halfRate64Ops, }, @@ -1409,28 +1400,28 @@ pub const cpu_gfx802 = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -1442,28 +1433,28 @@ pub const cpu_gfx803 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -1473,28 +1464,28 @@ pub const cpu_gfx810 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, &feature_xnack, }, }; @@ -1506,36 +1497,36 @@ pub const cpu_gfx900 = Cpu{ &feature_codeObjectV3, &feature_noSramEccSupport, &feature_noXnackSupport, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, }, @@ -1547,36 +1538,36 @@ pub const cpu_gfx902 = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_noSramEccSupport, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1591,36 +1582,36 @@ pub const cpu_gfx904 = Cpu{ &feature_noSramEccSupport, &feature_noXnackSupport, &feature_fmaMixInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, }, }; @@ -1635,36 +1626,36 @@ pub const cpu_gfx906 = Cpu{ &feature_dot1Insts, &feature_dot2Insts, &feature_fmaMixInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_halfRate64Ops, }, @@ -1684,39 +1675,38 @@ pub const cpu_gfx908 = Cpu{ &feature_dot5Insts, &feature_dot6Insts, &feature_fmaMixInsts, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_maiInsts, - &feature_mfmaInlineLiteralBug, &feature_pkFmacF16Inst, &feature_sramEcc, &feature_halfRate64Ops, @@ -1728,36 +1718,36 @@ pub const cpu_gfx909 = Cpu{ .llvm_name = "gfx909", .dependencies = &[_]*const Feature { &feature_codeObjectV3, - &feature_apertureRegs, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, &feature_flatGlobalInsts, - &feature_BitInsts16, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, &feature_vop3p, - &feature_flatAddressSpace, - &feature_dpp, - &feature_inv2piInlineImm, &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, &feature_flatScratchInsts, - &feature_flatInstOffsets, - &feature_scalarFlatScratchInsts, + &feature_ciInsts, + &feature_r128A16, &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, &feature_gfx9Insts, - &feature_sdwaSdst, - &feature_vgprIndexMode, - &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_intClampInsts, - &feature_sdwaScalar, + &feature_dpp, + &feature_BitInsts16, &feature_sdwaOmod, - &feature_scalarAtomics, - &feature_r128A16, - &feature_wavefrontsize64, - &feature_ciInsts, - &feature_scalarStores, - &feature_gcn3Encoding, - &feature_addNoCarryInsts, &feature_ldsbankcount32, &feature_madMixInsts, &feature_xnack, @@ -1771,13 +1761,13 @@ pub const cpu_hainan = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, }, }; @@ -1789,15 +1779,15 @@ pub const cpu_hawaii = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, &feature_halfRate64Ops, }, @@ -1812,28 +1802,28 @@ pub const cpu_iceland = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -1844,15 +1834,15 @@ pub const cpu_kabini = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1864,15 +1854,15 @@ pub const cpu_kaveri = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1884,15 +1874,15 @@ pub const cpu_mullins = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount16, - &feature_movrel, &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, &feature_wavefrontsize64, - &feature_ciInsts, &feature_fp64, - &feature_gfx7Gfx8Gfx9Insts, &feature_mimgR128, &feature_noSramEccSupport, - &feature_flatAddressSpace, + &feature_ciInsts, &feature_localmemorysize65536, }, }; @@ -1904,13 +1894,13 @@ pub const cpu_oland = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, }, }; @@ -1921,13 +1911,13 @@ pub const cpu_pitcairn = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, }, }; @@ -1939,28 +1929,28 @@ pub const cpu_polaris10 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -1972,28 +1962,28 @@ pub const cpu_polaris11 = Cpu{ &feature_noXnackSupport, &feature_ldsbankcount32, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -2003,28 +1993,28 @@ pub const cpu_stoney = Cpu{ .dependencies = &[_]*const Feature { &feature_codeObjectV3, &feature_ldsbankcount16, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, &feature_xnack, }, }; @@ -2037,13 +2027,13 @@ pub const cpu_tahiti = Cpu{ &feature_noXnackSupport, &feature_fastFmaf, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, &feature_halfRate64Ops, }, }; @@ -2057,28 +2047,28 @@ pub const cpu_tonga = Cpu{ &feature_ldsbankcount32, &feature_sgprInitBug, &feature_unpackedD16Vmem, - &feature_BitInsts16, - &feature_flatAddressSpace, - &feature_dpp, - &feature_sdwa, - &feature_mimgR128, - &feature_inv2piInlineImm, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, &feature_trigReducedRange, &feature_vgprIndexMode, + &feature_movrel, &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, &feature_gfx7Gfx8Gfx9Insts, - &feature_noSramEccSupport, - &feature_gfx8Insts, - &feature_localmemorysize65536, - &feature_movrel, &feature_intClampInsts, - &feature_sdwaMav, - &feature_wavefrontsize64, &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, &feature_scalarStores, - &feature_gcn3Encoding, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, }, }; @@ -2089,13 +2079,13 @@ pub const cpu_verde = Cpu{ &feature_codeObjectV3, &feature_noXnackSupport, &feature_ldsbankcount32, - &feature_movrel, &feature_trigReducedRange, + &feature_movrel, &feature_wavefrontsize64, - &feature_localmemorysize32768, &feature_fp64, - &feature_noSramEccSupport, &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, }, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 9861a1ff56f7c9265e198f58eb0945057c26d434..d83be5cc48dbc0fa5e621ac65f2b086b72732685 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -22,8 +22,8 @@ pub const feature_aes = Feature{ .llvm_name = "aes", .description = "Enable AES support", .dependencies = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -130,8 +130,8 @@ pub const feature_dotprod = Feature{ .llvm_name = "dotprod", .description = "Enable support for dot product instructions", .dependencies = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -164,8 +164,8 @@ pub const feature_fp16fml = Feature{ .llvm_name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -191,9 +191,9 @@ pub const feature_fpArmv8 = Feature{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", .dependencies = &[_]*const Feature { + &feature_fp16, &feature_d32, &feature_fpregs, - &feature_fp16, }, }; @@ -202,8 +202,8 @@ pub const feature_fpArmv8d16 = Feature{ .llvm_name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -212,8 +212,8 @@ pub const feature_fpArmv8d16sp = Feature{ .llvm_name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -222,9 +222,9 @@ pub const feature_fpArmv8sp = Feature{ .llvm_name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", .dependencies = &[_]*const Feature { - &feature_d32, - &feature_fpregs, &feature_fp16, + &feature_fpregs, + &feature_d32, }, }; @@ -259,8 +259,8 @@ pub const feature_fullfp16 = Feature{ .llvm_name = "fullfp16", .description = "Enable full half-precision floating point", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -360,30 +360,6 @@ pub const feature_mp = Feature{ }, }; -pub const feature_mve1beat = Feature{ - .name = "mve1beat", - .llvm_name = "mve1beat", - .description = "Model MVE instructions as a 1 beat per tick architecture", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mve2beat = Feature{ - .name = "mve2beat", - .llvm_name = "mve2beat", - .description = "Model MVE instructions as a 2 beats per tick architecture", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mve4beat = Feature{ - .name = "mve4beat", - .llvm_name = "mve4beat", - .description = "Model MVE instructions as a 4 beats per tick architecture", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_muxedUnits = Feature{ .name = "muxedUnits", .llvm_name = "muxed-units", @@ -559,8 +535,8 @@ pub const feature_sha2 = Feature{ .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", .dependencies = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -673,6 +649,25 @@ pub const feature_vfp2 = Feature{ .name = "vfp2", .llvm_name = "vfp2", .description = "Enable VFP2 instructions", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp2d16 = Feature{ + .name = "vfp2d16", + .llvm_name = "vfp2d16", + .description = "Enable VFP2 instructions with only 16 d-registers", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp2d16sp = Feature{ + .name = "vfp2d16sp", + .llvm_name = "vfp2d16sp", + .description = "Enable VFP2 instructions with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { &feature_fpregs, }, @@ -684,6 +679,7 @@ pub const feature_vfp2sp = Feature{ .description = "Enable VFP2 instructions with no double precision", .dependencies = &[_]*const Feature { &feature_fpregs, + &feature_d32, }, }; @@ -692,8 +688,8 @@ pub const feature_vfp3 = Feature{ .llvm_name = "vfp3", .description = "Enable VFP3 instructions", .dependencies = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -720,8 +716,8 @@ pub const feature_vfp3sp = Feature{ .llvm_name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", .dependencies = &[_]*const Feature { - &feature_d32, &feature_fpregs, + &feature_d32, }, }; @@ -730,9 +726,9 @@ pub const feature_vfp4 = Feature{ .llvm_name = "vfp4", .description = "Enable VFP4 instructions", .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, &feature_fp16, + &feature_d32, + &feature_fpregs, }, }; @@ -741,8 +737,8 @@ pub const feature_vfp4d16 = Feature{ .llvm_name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -751,8 +747,8 @@ pub const feature_vfp4d16sp = Feature{ .llvm_name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", .dependencies = &[_]*const Feature { - &feature_fpregs, &feature_fp16, + &feature_fpregs, }, }; @@ -761,9 +757,9 @@ pub const feature_vfp4sp = Feature{ .llvm_name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", .dependencies = &[_]*const Feature { + &feature_fp16, &feature_fpregs, &feature_d32, - &feature_fp16, }, }; @@ -836,9 +832,6 @@ pub const features = &[_]*const Feature { &feature_longCalls, &feature_mclass, &feature_mp, - &feature_mve1beat, - &feature_mve2beat, - &feature_mve4beat, &feature_muxedUnits, &feature_neon, &feature_neonfp, @@ -875,6 +868,8 @@ pub const features = &[_]*const Feature { &feature_wideStrideVfp, &feature_v7clrex, &feature_vfp2, + &feature_vfp2d16, + &feature_vfp2d16sp, &feature_vfp2sp, &feature_vfp3, &feature_vfp3d16, @@ -938,6 +933,7 @@ pub const cpu_arm1136jfS = Cpu{ .dependencies = &[_]*const Feature { &feature_dsp, &feature_slowfpvmlx, + &feature_d32, &feature_fpregs, &feature_vfp2, }, @@ -947,8 +943,8 @@ pub const cpu_arm1156t2S = Cpu{ .name = "arm1156t2S", .llvm_name = "arm1156t2-s", .dependencies = &[_]*const Feature { - &feature_thumb2, &feature_dsp, + &feature_thumb2, }, }; @@ -956,9 +952,10 @@ pub const cpu_arm1156t2fS = Cpu{ .name = "arm1156t2fS", .llvm_name = "arm1156t2f-s", .dependencies = &[_]*const Feature { - &feature_thumb2, &feature_dsp, + &feature_thumb2, &feature_slowfpvmlx, + &feature_d32, &feature_fpregs, &feature_vfp2, }, @@ -986,6 +983,7 @@ pub const cpu_arm1176jzfS = Cpu{ .dependencies = &[_]*const Feature { &feature_trustzone, &feature_slowfpvmlx, + &feature_d32, &feature_fpregs, &feature_vfp2, }, @@ -1114,14 +1112,14 @@ pub const cpu_cortexA12 = Cpu{ .name = "cortexA12", .llvm_name = "cortex-a12", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1139,14 +1137,14 @@ pub const cpu_cortexA15 = Cpu{ .name = "cortexA15", .llvm_name = "cortex-a15", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_dontWidenVmovs, @@ -1167,14 +1165,14 @@ pub const cpu_cortexA17 = Cpu{ .name = "cortexA17", .llvm_name = "cortex-a17", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_mp, @@ -1192,21 +1190,21 @@ pub const cpu_cortexA32 = Cpu{ .name = "cortexA32", .llvm_name = "cortex-a32", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, }, }; @@ -1215,21 +1213,21 @@ pub const cpu_cortexA35 = Cpu{ .name = "cortexA35", .llvm_name = "cortex-a35", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, }, }; @@ -1238,14 +1236,14 @@ pub const cpu_cortexA5 = Cpu{ .name = "cortexA5", .llvm_name = "cortex-a5", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_mp, @@ -1261,21 +1259,21 @@ pub const cpu_cortexA53 = Cpu{ .name = "cortexA53", .llvm_name = "cortex-a53", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, &feature_fpao, }, @@ -1285,22 +1283,22 @@ pub const cpu_cortexA55 = Cpu{ .name = "cortexA55", .llvm_name = "cortex-a55", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_dotprod, }, }; @@ -1309,21 +1307,21 @@ pub const cpu_cortexA57 = Cpu{ .name = "cortexA57", .llvm_name = "cortex-a57", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_avoidPartialCpsr, &feature_cheapPredicableCpsr, &feature_crypto, @@ -1335,14 +1333,14 @@ pub const cpu_cortexA7 = Cpu{ .name = "cortexA7", .llvm_name = "cortex-a7", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1362,21 +1360,21 @@ pub const cpu_cortexA72 = Cpu{ .name = "cortexA72", .llvm_name = "cortex-a72", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, }, }; @@ -1385,21 +1383,21 @@ pub const cpu_cortexA73 = Cpu{ .name = "cortexA73", .llvm_name = "cortex-a73", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, }, }; @@ -1408,22 +1406,22 @@ pub const cpu_cortexA75 = Cpu{ .name = "cortexA75", .llvm_name = "cortex-a75", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_dotprod, }, }; @@ -1432,22 +1430,22 @@ pub const cpu_cortexA76 = Cpu{ .name = "cortexA76", .llvm_name = "cortex-a76", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1458,22 +1456,22 @@ pub const cpu_cortexA76ae = Cpu{ .name = "cortexA76ae", .llvm_name = "cortex-a76ae", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_crypto, &feature_dotprod, &feature_fullfp16, @@ -1484,14 +1482,14 @@ pub const cpu_cortexA8 = Cpu{ .name = "cortexA8", .llvm_name = "cortex-a8", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_retAddrStack, &feature_slowfpvmlx, &feature_vmlxHazards, @@ -1506,14 +1504,14 @@ pub const cpu_cortexA9 = Cpu{ .name = "cortexA9", .llvm_name = "cortex-a9", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_expandFpMlx, @@ -1533,10 +1531,10 @@ pub const cpu_cortexM0 = Cpu{ .name = "cortexM0", .llvm_name = "cortex-m0", .dependencies = &[_]*const Feature { - &feature_noarm, - &feature_strictAlign, &feature_mclass, &feature_db, + &feature_noarm, + &feature_strictAlign, }, }; @@ -1544,10 +1542,10 @@ pub const cpu_cortexM0plus = Cpu{ .name = "cortexM0plus", .llvm_name = "cortex-m0plus", .dependencies = &[_]*const Feature { - &feature_noarm, - &feature_strictAlign, &feature_mclass, &feature_db, + &feature_noarm, + &feature_strictAlign, }, }; @@ -1555,10 +1553,10 @@ pub const cpu_cortexM1 = Cpu{ .name = "cortexM1", .llvm_name = "cortex-m1", .dependencies = &[_]*const Feature { - &feature_noarm, - &feature_strictAlign, &feature_mclass, &feature_db, + &feature_noarm, + &feature_strictAlign, }, }; @@ -1566,14 +1564,14 @@ pub const cpu_cortexM23 = Cpu{ .name = "cortexM23", .llvm_name = "cortex-m23", .dependencies = &[_]*const Feature { - &feature_noarm, + &feature_hwdiv, + &feature_mclass, + &feature_db, &feature_acquireRelease, &feature_v7clrex, - &feature_strictAlign, - &feature_mclass, - &feature_hwdiv, + &feature_noarm, &feature_msecext8, - &feature_db, + &feature_strictAlign, &feature_noMovt, }, }; @@ -1582,13 +1580,13 @@ pub const cpu_cortexM3 = Cpu{ .name = "cortexM3", .llvm_name = "cortex-m3", .dependencies = &[_]*const Feature { + &feature_hwdiv, &feature_thumb2, - &feature_noarm, - &feature_v7clrex, - &feature_perfmon, &feature_mclass, - &feature_hwdiv, &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, &feature_noBranchPredictor, &feature_loopAlign, &feature_useAa, @@ -1600,18 +1598,18 @@ pub const cpu_cortexM33 = Cpu{ .name = "cortexM33", .llvm_name = "cortex-m33", .dependencies = &[_]*const Feature { + &feature_hwdiv, &feature_thumb2, - &feature_noarm, + &feature_mclass, + &feature_db, &feature_acquireRelease, &feature_v7clrex, &feature_perfmon, - &feature_mclass, - &feature_hwdiv, + &feature_noarm, &feature_msecext8, - &feature_db, &feature_dsp, - &feature_fpregs, &feature_fp16, + &feature_fpregs, &feature_fpArmv8d16sp, &feature_noBranchPredictor, &feature_slowfpvmlx, @@ -1625,18 +1623,18 @@ pub const cpu_cortexM35p = Cpu{ .name = "cortexM35p", .llvm_name = "cortex-m35p", .dependencies = &[_]*const Feature { + &feature_hwdiv, &feature_thumb2, - &feature_noarm, + &feature_mclass, + &feature_db, &feature_acquireRelease, &feature_v7clrex, &feature_perfmon, - &feature_mclass, - &feature_hwdiv, + &feature_noarm, &feature_msecext8, - &feature_db, &feature_dsp, - &feature_fpregs, &feature_fp16, + &feature_fpregs, &feature_fpArmv8d16sp, &feature_noBranchPredictor, &feature_slowfpvmlx, @@ -1650,21 +1648,21 @@ pub const cpu_cortexM4 = Cpu{ .name = "cortexM4", .llvm_name = "cortex-m4", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, - &feature_noarm, - &feature_v7clrex, - &feature_perfmon, + &feature_thumb2, &feature_mclass, - &feature_hwdiv, &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, &feature_noBranchPredictor, &feature_slowfpvmlx, &feature_loopAlign, &feature_useAa, &feature_useMisched, - &feature_fpregs, &feature_fp16, + &feature_fpregs, &feature_vfp4d16sp, }, }; @@ -1673,16 +1671,16 @@ pub const cpu_cortexM7 = Cpu{ .name = "cortexM7", .llvm_name = "cortex-m7", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, - &feature_noarm, - &feature_v7clrex, - &feature_perfmon, + &feature_thumb2, &feature_mclass, - &feature_hwdiv, &feature_db, - &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, &feature_fp16, + &feature_fpregs, &feature_fpArmv8d16, }, }; @@ -1691,13 +1689,13 @@ pub const cpu_cortexR4 = Cpu{ .name = "cortexR4", .llvm_name = "cortex-r4", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, &feature_rclass, + &feature_thumb2, + &feature_db, &feature_v7clrex, &feature_perfmon, - &feature_hwdiv, - &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, }, @@ -1707,13 +1705,13 @@ pub const cpu_cortexR4f = Cpu{ .name = "cortexR4f", .llvm_name = "cortex-r4f", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, &feature_rclass, + &feature_thumb2, + &feature_db, &feature_v7clrex, &feature_perfmon, - &feature_hwdiv, - &feature_db, &feature_avoidPartialCpsr, &feature_retAddrStack, &feature_slowfpvmlx, @@ -1727,13 +1725,13 @@ pub const cpu_cortexR5 = Cpu{ .name = "cortexR5", .llvm_name = "cortex-r5", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, &feature_rclass, + &feature_thumb2, + &feature_db, &feature_v7clrex, &feature_perfmon, - &feature_hwdiv, - &feature_db, &feature_avoidPartialCpsr, &feature_hwdivArm, &feature_retAddrStack, @@ -1748,21 +1746,21 @@ pub const cpu_cortexR52 = Cpu{ .name = "cortexR52", .llvm_name = "cortex-r52", .dependencies = &[_]*const Feature { - &feature_thumb2, - &feature_fpregs, - &feature_dsp, + &feature_hwdiv, &feature_dfb, - &feature_rclass, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, - &feature_perfmon, - &feature_crc, &feature_mp, - &feature_hwdiv, &feature_d32, - &feature_fp16, + &feature_dsp, + &feature_rclass, + &feature_thumb2, &feature_db, + &feature_fpregs, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_fpao, &feature_useAa, &feature_useMisched, @@ -1773,13 +1771,13 @@ pub const cpu_cortexR7 = Cpu{ .name = "cortexR7", .llvm_name = "cortex-r7", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, &feature_rclass, + &feature_thumb2, + &feature_db, &feature_v7clrex, &feature_perfmon, - &feature_hwdiv, - &feature_db, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1796,13 +1794,13 @@ pub const cpu_cortexR8 = Cpu{ .name = "cortexR8", .llvm_name = "cortex-r8", .dependencies = &[_]*const Feature { - &feature_thumb2, + &feature_hwdiv, &feature_dsp, &feature_rclass, + &feature_thumb2, + &feature_db, &feature_v7clrex, &feature_perfmon, - &feature_hwdiv, - &feature_db, &feature_avoidPartialCpsr, &feature_fp16, &feature_hwdivArm, @@ -1819,21 +1817,21 @@ pub const cpu_cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_crypto, @@ -1858,34 +1856,34 @@ pub const cpu_exynosM1 = Cpu{ .name = "exynosM1", .llvm_name = "exynos-m1", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, - &feature_expandFpMlx, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, &feature_slowVgetlni32, + &feature_slowVdup32, &feature_profUnpr, - &feature_slowfpvmlx, &feature_slowFpBrcc, - &feature_useAa, - &feature_dontWidenVmovs, &feature_retAddrStack, - &feature_fuseLiterals, - &feature_wideStrideVfp, &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, &feature_fuseAes, - &feature_slowVdup32, + &feature_dontWidenVmovs, }, }; @@ -1893,34 +1891,34 @@ pub const cpu_exynosM2 = Cpu{ .name = "exynosM2", .llvm_name = "exynos-m2", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, - &feature_expandFpMlx, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, &feature_slowVgetlni32, + &feature_slowVdup32, &feature_profUnpr, - &feature_slowfpvmlx, &feature_slowFpBrcc, - &feature_useAa, - &feature_dontWidenVmovs, &feature_retAddrStack, - &feature_fuseLiterals, - &feature_wideStrideVfp, &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, &feature_fuseAes, - &feature_slowVdup32, + &feature_dontWidenVmovs, }, }; @@ -1928,34 +1926,34 @@ pub const cpu_exynosM3 = Cpu{ .name = "exynosM3", .llvm_name = "exynos-m3", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, - &feature_expandFpMlx, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, &feature_slowVgetlni32, + &feature_slowVdup32, &feature_profUnpr, - &feature_slowfpvmlx, &feature_slowFpBrcc, - &feature_useAa, - &feature_dontWidenVmovs, &feature_retAddrStack, - &feature_fuseLiterals, - &feature_wideStrideVfp, &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, &feature_fuseAes, - &feature_slowVdup32, + &feature_dontWidenVmovs, }, }; @@ -1963,37 +1961,37 @@ pub const cpu_exynosM4 = Cpu{ .name = "exynosM4", .llvm_name = "exynos-m4", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_dotprod, &feature_fullfp16, - &feature_expandFpMlx, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, &feature_slowVgetlni32, + &feature_slowVdup32, &feature_profUnpr, - &feature_slowfpvmlx, &feature_slowFpBrcc, - &feature_useAa, - &feature_dontWidenVmovs, &feature_retAddrStack, - &feature_fuseLiterals, - &feature_wideStrideVfp, &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, &feature_fuseAes, - &feature_slowVdup32, + &feature_dontWidenVmovs, }, }; @@ -2001,37 +1999,37 @@ pub const cpu_exynosM5 = Cpu{ .name = "exynosM5", .llvm_name = "exynos-m5", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, &feature_dotprod, &feature_fullfp16, - &feature_expandFpMlx, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, &feature_slowVgetlni32, + &feature_slowVdup32, &feature_profUnpr, - &feature_slowfpvmlx, &feature_slowFpBrcc, - &feature_useAa, - &feature_dontWidenVmovs, &feature_retAddrStack, - &feature_fuseLiterals, - &feature_wideStrideVfp, &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, &feature_fuseAes, - &feature_slowVdup32, + &feature_dontWidenVmovs, }, }; @@ -2053,14 +2051,14 @@ pub const cpu_krait = Cpu{ .name = "krait", .llvm_name = "krait", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidPartialCpsr, &feature_vldnAlign, &feature_fp16, @@ -2077,21 +2075,21 @@ pub const cpu_kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, + &feature_hwdiv, + &feature_mp, + &feature_d32, &feature_dsp, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, + &feature_thumb2, + &feature_db, &feature_aclass, - &feature_perfmon, + &feature_fpregs, + &feature_trustzone, &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, &feature_fp16, - &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, &feature_crypto, }, }; @@ -2101,6 +2099,7 @@ pub const cpu_mpcore = Cpu{ .llvm_name = "mpcore", .dependencies = &[_]*const Feature { &feature_slowfpvmlx, + &feature_d32, &feature_fpregs, &feature_vfp2, }, @@ -2113,39 +2112,14 @@ pub const cpu_mpcorenovfp = Cpu{ }, }; -pub const cpu_neoverseN1 = Cpu{ - .name = "neoverseN1", - .llvm_name = "neoverse-n1", - .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_thumb2, - &feature_fpregs, - &feature_dsp, - &feature_ras, - &feature_v7clrex, - &feature_hwdivArm, - &feature_acquireRelease, - &feature_aclass, - &feature_perfmon, - &feature_crc, - &feature_mp, - &feature_hwdiv, - &feature_d32, - &feature_fp16, - &feature_db, - &feature_crypto, - &feature_dotprod, - }, -}; - pub const cpu_sc000 = Cpu{ .name = "sc000", .llvm_name = "sc000", .dependencies = &[_]*const Feature { - &feature_noarm, - &feature_strictAlign, &feature_mclass, &feature_db, + &feature_noarm, + &feature_strictAlign, }, }; @@ -2153,13 +2127,13 @@ pub const cpu_sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", .dependencies = &[_]*const Feature { + &feature_hwdiv, &feature_thumb2, - &feature_noarm, - &feature_v7clrex, - &feature_perfmon, &feature_mclass, - &feature_hwdiv, &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, &feature_noBranchPredictor, &feature_useAa, &feature_useMisched, @@ -2198,14 +2172,14 @@ pub const cpu_swift = Cpu{ .name = "swift", .llvm_name = "swift", .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, &feature_thumb2, + &feature_db, + &feature_aclass, &feature_fpregs, - &feature_dsp, &feature_v7clrex, - &feature_aclass, &feature_perfmon, - &feature_d32, - &feature_db, &feature_avoidMovsShop, &feature_avoidPartialCpsr, &feature_hwdivArm, @@ -2311,7 +2285,6 @@ pub const cpus = &[_]*const Cpu { &cpu_kryo, &cpu_mpcore, &cpu_mpcorenovfp, - &cpu_neoverseN1, &cpu_sc000, &cpu_sc300, &cpu_strongarm, diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 2f5dc00c74aa93393e94af5285d218c4b2a6b653..21b1591b7bdcb8876388bf284ca563bab4856909 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -170,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, - &feature_elpm, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -183,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -195,11 +195,11 @@ pub const cpu_at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -231,17 +231,17 @@ pub const cpu_at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -250,14 +250,14 @@ pub const cpu_at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -267,14 +267,14 @@ pub const cpu_at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -284,13 +284,13 @@ pub const cpu_at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -300,14 +300,14 @@ pub const cpu_at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -317,13 +317,13 @@ pub const cpu_at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -333,14 +333,14 @@ pub const cpu_at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -350,13 +350,13 @@ pub const cpu_at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -366,13 +366,13 @@ pub const cpu_at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -382,14 +382,14 @@ pub const cpu_at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -399,13 +399,13 @@ pub const cpu_at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -415,13 +415,13 @@ pub const cpu_at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -537,14 +537,14 @@ pub const cpu_at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -554,17 +554,17 @@ pub const cpu_at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -573,17 +573,17 @@ pub const cpu_at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -592,14 +592,14 @@ pub const cpu_at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -608,14 +608,14 @@ pub const cpu_at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -625,14 +625,14 @@ pub const cpu_at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -642,14 +642,14 @@ pub const cpu_at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -658,11 +658,11 @@ pub const cpu_at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -673,13 +673,13 @@ pub const cpu_ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -688,14 +688,14 @@ pub const cpu_ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -704,14 +704,14 @@ pub const cpu_ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -721,14 +721,14 @@ pub const cpu_ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -738,13 +738,13 @@ pub const cpu_ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -754,13 +754,13 @@ pub const cpu_ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -770,13 +770,13 @@ pub const cpu_ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -786,12 +786,12 @@ pub const cpu_atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, - &feature_elpm, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -799,17 +799,17 @@ pub const cpu_atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -818,17 +818,17 @@ pub const cpu_atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -837,17 +837,17 @@ pub const cpu_atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -856,17 +856,17 @@ pub const cpu_atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -875,17 +875,17 @@ pub const cpu_atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -894,17 +894,17 @@ pub const cpu_atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -913,17 +913,17 @@ pub const cpu_atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -932,17 +932,17 @@ pub const cpu_atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -951,17 +951,17 @@ pub const cpu_atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -970,14 +970,14 @@ pub const cpu_atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -987,11 +987,11 @@ pub const cpu_atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1003,14 +1003,14 @@ pub const cpu_atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1020,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, &feature_lpmx, &feature_movw, &feature_mul, @@ -1036,14 +1036,14 @@ pub const cpu_atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1053,14 +1053,14 @@ pub const cpu_atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1070,14 +1070,14 @@ pub const cpu_atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1087,14 +1087,14 @@ pub const cpu_atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1104,14 +1104,14 @@ pub const cpu_atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1121,14 +1121,14 @@ pub const cpu_atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1138,14 +1138,14 @@ pub const cpu_atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1155,14 +1155,14 @@ pub const cpu_atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1172,14 +1172,14 @@ pub const cpu_atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1189,14 +1189,14 @@ pub const cpu_atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1206,14 +1206,14 @@ pub const cpu_atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1223,14 +1223,14 @@ pub const cpu_atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1240,14 +1240,14 @@ pub const cpu_atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1257,14 +1257,14 @@ pub const cpu_atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1274,14 +1274,14 @@ pub const cpu_atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1291,14 +1291,14 @@ pub const cpu_atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1308,14 +1308,14 @@ pub const cpu_atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1325,14 +1325,14 @@ pub const cpu_atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1342,14 +1342,14 @@ pub const cpu_atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1359,14 +1359,14 @@ pub const cpu_atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1376,14 +1376,14 @@ pub const cpu_atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1393,14 +1393,14 @@ pub const cpu_atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -1409,14 +1409,14 @@ pub const cpu_atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1426,17 +1426,17 @@ pub const cpu_atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -1445,17 +1445,17 @@ pub const cpu_atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -1464,17 +1464,17 @@ pub const cpu_atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -1483,17 +1483,17 @@ pub const cpu_atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -1502,14 +1502,14 @@ pub const cpu_atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1519,14 +1519,14 @@ pub const cpu_atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1536,14 +1536,14 @@ pub const cpu_atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1553,14 +1553,14 @@ pub const cpu_atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1570,14 +1570,14 @@ pub const cpu_atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1587,14 +1587,14 @@ pub const cpu_atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1604,14 +1604,14 @@ pub const cpu_atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1621,14 +1621,14 @@ pub const cpu_atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1638,14 +1638,14 @@ pub const cpu_atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1655,14 +1655,14 @@ pub const cpu_atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1672,14 +1672,14 @@ pub const cpu_atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1689,14 +1689,14 @@ pub const cpu_atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1706,14 +1706,14 @@ pub const cpu_atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1723,14 +1723,14 @@ pub const cpu_atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1740,14 +1740,14 @@ pub const cpu_atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1757,14 +1757,14 @@ pub const cpu_atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1774,14 +1774,14 @@ pub const cpu_atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1791,14 +1791,14 @@ pub const cpu_atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1808,14 +1808,14 @@ pub const cpu_atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1825,14 +1825,14 @@ pub const cpu_atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1842,14 +1842,14 @@ pub const cpu_atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1859,14 +1859,14 @@ pub const cpu_atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1876,14 +1876,14 @@ pub const cpu_atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1893,14 +1893,14 @@ pub const cpu_atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1910,14 +1910,14 @@ pub const cpu_atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1927,14 +1927,14 @@ pub const cpu_atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1944,14 +1944,14 @@ pub const cpu_atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1961,14 +1961,14 @@ pub const cpu_atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -1978,14 +1978,14 @@ pub const cpu_atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -1994,14 +1994,14 @@ pub const cpu_atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2011,14 +2011,14 @@ pub const cpu_atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2028,14 +2028,14 @@ pub const cpu_atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2045,13 +2045,13 @@ pub const cpu_atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2061,13 +2061,13 @@ pub const cpu_atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2077,13 +2077,13 @@ pub const cpu_atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2093,13 +2093,13 @@ pub const cpu_atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2109,14 +2109,14 @@ pub const cpu_atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2126,14 +2126,14 @@ pub const cpu_atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2143,14 +2143,14 @@ pub const cpu_atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2160,14 +2160,14 @@ pub const cpu_atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2177,14 +2177,14 @@ pub const cpu_atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2194,14 +2194,14 @@ pub const cpu_atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2211,14 +2211,14 @@ pub const cpu_atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2228,14 +2228,14 @@ pub const cpu_atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2245,14 +2245,14 @@ pub const cpu_atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2262,14 +2262,14 @@ pub const cpu_atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2279,14 +2279,14 @@ pub const cpu_atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2296,14 +2296,14 @@ pub const cpu_atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2313,14 +2313,14 @@ pub const cpu_atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2330,14 +2330,14 @@ pub const cpu_atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2347,14 +2347,14 @@ pub const cpu_atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2364,14 +2364,14 @@ pub const cpu_atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2381,14 +2381,14 @@ pub const cpu_atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2398,14 +2398,14 @@ pub const cpu_atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2415,14 +2415,14 @@ pub const cpu_atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2432,14 +2432,14 @@ pub const cpu_atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2449,14 +2449,14 @@ pub const cpu_atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2466,14 +2466,14 @@ pub const cpu_atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2483,14 +2483,14 @@ pub const cpu_atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2500,14 +2500,14 @@ pub const cpu_atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -2517,13 +2517,13 @@ pub const cpu_atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2563,13 +2563,13 @@ pub const cpu_atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2579,13 +2579,13 @@ pub const cpu_atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2595,13 +2595,13 @@ pub const cpu_atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2611,13 +2611,13 @@ pub const cpu_atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2627,13 +2627,13 @@ pub const cpu_atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2643,13 +2643,13 @@ pub const cpu_atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -2659,14 +2659,14 @@ pub const cpu_atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -2721,13 +2721,13 @@ pub const cpu_attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2736,13 +2736,13 @@ pub const cpu_attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2759,14 +2759,14 @@ pub const cpu_attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -2775,14 +2775,14 @@ pub const cpu_attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -2812,13 +2812,13 @@ pub const cpu_attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2827,13 +2827,13 @@ pub const cpu_attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2842,13 +2842,13 @@ pub const cpu_attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2857,13 +2857,13 @@ pub const cpu_attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2872,13 +2872,13 @@ pub const cpu_attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2899,13 +2899,13 @@ pub const cpu_attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2914,13 +2914,13 @@ pub const cpu_attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2957,13 +2957,13 @@ pub const cpu_attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2972,13 +2972,13 @@ pub const cpu_attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -2987,13 +2987,13 @@ pub const cpu_attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3002,13 +3002,13 @@ pub const cpu_attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3017,13 +3017,13 @@ pub const cpu_attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3032,13 +3032,13 @@ pub const cpu_attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3047,13 +3047,13 @@ pub const cpu_attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3062,13 +3062,13 @@ pub const cpu_attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3087,13 +3087,13 @@ pub const cpu_attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3102,13 +3102,13 @@ pub const cpu_attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3117,13 +3117,13 @@ pub const cpu_attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3132,13 +3132,13 @@ pub const cpu_attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3147,13 +3147,13 @@ pub const cpu_attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3162,13 +3162,13 @@ pub const cpu_attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3177,13 +3177,13 @@ pub const cpu_attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3192,13 +3192,13 @@ pub const cpu_attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -3217,20 +3217,20 @@ pub const cpu_atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3239,21 +3239,21 @@ pub const cpu_atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3262,20 +3262,20 @@ pub const cpu_atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3284,21 +3284,21 @@ pub const cpu_atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3307,21 +3307,21 @@ pub const cpu_atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3330,21 +3330,21 @@ pub const cpu_atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3353,21 +3353,21 @@ pub const cpu_atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3376,21 +3376,21 @@ pub const cpu_atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3399,20 +3399,20 @@ pub const cpu_atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3421,20 +3421,20 @@ pub const cpu_atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3443,20 +3443,20 @@ pub const cpu_atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3465,21 +3465,21 @@ pub const cpu_atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3488,21 +3488,21 @@ pub const cpu_atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3511,20 +3511,20 @@ pub const cpu_atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3533,20 +3533,20 @@ pub const cpu_atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3555,20 +3555,20 @@ pub const cpu_atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3577,21 +3577,21 @@ pub const cpu_atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3600,21 +3600,21 @@ pub const cpu_atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3623,20 +3623,20 @@ pub const cpu_atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3645,20 +3645,20 @@ pub const cpu_atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3667,20 +3667,20 @@ pub const cpu_atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3689,21 +3689,21 @@ pub const cpu_atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3712,21 +3712,21 @@ pub const cpu_atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3735,21 +3735,21 @@ pub const cpu_atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3758,20 +3758,20 @@ pub const cpu_atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3780,20 +3780,20 @@ pub const cpu_atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3802,21 +3802,21 @@ pub const cpu_atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3825,21 +3825,21 @@ pub const cpu_atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3848,20 +3848,20 @@ pub const cpu_atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3870,20 +3870,20 @@ pub const cpu_atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3892,20 +3892,20 @@ pub const cpu_atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3914,21 +3914,21 @@ pub const cpu_atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3937,20 +3937,20 @@ pub const cpu_atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3959,20 +3959,20 @@ pub const cpu_atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -3981,21 +3981,21 @@ pub const cpu_atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4004,20 +4004,20 @@ pub const cpu_atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4026,21 +4026,21 @@ pub const cpu_atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4049,21 +4049,21 @@ pub const cpu_atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4072,21 +4072,21 @@ pub const cpu_atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4095,21 +4095,21 @@ pub const cpu_atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4118,21 +4118,21 @@ pub const cpu_atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, - &feature_movw, &feature_addsubiw, + &feature_elpmx, &feature_rmw, - &feature_elpm, - &feature_break, + &feature_movw, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4141,20 +4141,20 @@ pub const cpu_atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4163,20 +4163,20 @@ pub const cpu_atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4185,20 +4185,20 @@ pub const cpu_atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4226,13 +4226,13 @@ pub const cpu_avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, }, }; @@ -4241,11 +4241,11 @@ pub const cpu_avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -4253,12 +4253,12 @@ pub const cpu_avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", .dependencies = &[_]*const Feature { + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, - &feature_elpm, &feature_ijmpcall, - &feature_jmpcall, }, }; @@ -4266,14 +4266,14 @@ pub const cpu_avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, }, }; @@ -4282,13 +4282,13 @@ pub const cpu_avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", .dependencies = &[_]*const Feature { + &feature_lpmx, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, + &feature_break, &feature_spm, &feature_mul, }, @@ -4298,14 +4298,14 @@ pub const cpu_avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, @@ -4315,17 +4315,17 @@ pub const cpu_avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4334,17 +4334,17 @@ pub const cpu_avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4363,20 +4363,20 @@ pub const cpu_avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4385,20 +4385,20 @@ pub const cpu_avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4407,20 +4407,20 @@ pub const cpu_avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4429,20 +4429,20 @@ pub const cpu_avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4451,20 +4451,20 @@ pub const cpu_avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4473,20 +4473,20 @@ pub const cpu_avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4495,20 +4495,20 @@ pub const cpu_avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", .dependencies = &[_]*const Feature { - &feature_eijmpcall, + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, &feature_lpm, + &feature_elpm, &feature_sram, &feature_addsubiw, + &feature_elpmx, &feature_movw, - &feature_elpm, - &feature_break, &feature_ijmpcall, - &feature_des, - &feature_spmx, - &feature_lpmx, - &feature_jmpcall, + &feature_break, + &feature_eijmpcall, &feature_spm, - &feature_elpmx, &feature_mul, }, }; @@ -4517,14 +4517,14 @@ pub const cpu_m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, &feature_lpm, &feature_sram, &feature_addsubiw, &feature_movw, - &feature_break, &feature_ijmpcall, - &feature_lpmx, - &feature_jmpcall, + &feature_break, &feature_spm, &feature_mul, }, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 6eab968c2300cf4bf264fafd9a067c5e4281137e..7c7bb3bfbe2df1f3e67ff395d943505b0d5eb4f5 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -22,13 +22,13 @@ pub const feature_cnmips = Feature{ .llvm_name = "cnmips", .description = "Octeon cnMIPS Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -161,10 +161,10 @@ pub const feature_mips3 = Feature{ .llvm_name = "mips3", .description = "MIPS III ISA Support [highly experimental]", .dependencies = &[_]*const Feature { - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_gp64, + &feature_mips1, &feature_fp64, }, }; @@ -190,12 +190,12 @@ pub const feature_mips4 = Feature{ .llvm_name = "mips4", .description = "MIPS IV ISA Support", .dependencies = &[_]*const Feature { - &feature_mips1, + &feature_mips4_32, &feature_mips3_32r2, &feature_mips3_32, - &feature_gp64, &feature_mips4_32r2, - &feature_mips4_32, + &feature_gp64, + &feature_mips1, &feature_fp64, }, }; @@ -221,13 +221,13 @@ pub const feature_mips5 = Feature{ .llvm_name = "mips5", .description = "MIPS V ISA Support [highly experimental]", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -264,12 +264,12 @@ pub const feature_mips32r2 = Feature{ .llvm_name = "mips32r2", .description = "Mips32r2 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, }, }; @@ -278,12 +278,12 @@ pub const feature_mips32r3 = Feature{ .llvm_name = "mips32r3", .description = "Mips32r3 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, }, }; @@ -292,12 +292,12 @@ pub const feature_mips32r5 = Feature{ .llvm_name = "mips32r5", .description = "Mips32r5 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, }, }; @@ -306,15 +306,15 @@ pub const feature_mips32r6 = Feature{ .llvm_name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { - &feature_nan2008, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, - &feature_abs2008, + &feature_nan2008, + &feature_mips1, &feature_fp64, + &feature_abs2008, }, }; @@ -323,13 +323,13 @@ pub const feature_mips64 = Feature{ .llvm_name = "mips64", .description = "Mips64 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -339,13 +339,13 @@ pub const feature_mips64r2 = Feature{ .llvm_name = "mips64r2", .description = "Mips64r2 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -355,13 +355,13 @@ pub const feature_mips64r3 = Feature{ .llvm_name = "mips64r3", .description = "Mips64r3 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -371,13 +371,13 @@ pub const feature_mips64r5 = Feature{ .llvm_name = "mips64r5", .description = "Mips64r5 ISA Support", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, }, }; @@ -387,16 +387,16 @@ pub const feature_mips64r6 = Feature{ .llvm_name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", .dependencies = &[_]*const Feature { - &feature_nan2008, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, + &feature_nan2008, &feature_gp64, - &feature_mips4_32, - &feature_abs2008, + &feature_mips1, &feature_fp64, + &feature_abs2008, }, }; @@ -488,25 +488,17 @@ pub const feature_virt = Feature{ }, }; -pub const feature_xgot = Feature{ - .name = "xgot", - .llvm_name = "xgot", - .description = "Assume 32-bit GOT", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_p5600 = Feature{ .name = "p5600", .llvm_name = "p5600", .description = "The P5600 Processor", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, }, }; @@ -559,7 +551,6 @@ pub const features = &[_]*const Feature { &feature_useTccInDiv, &feature_vfpu, &feature_virt, - &feature_xgot, &feature_p5600, }; @@ -584,10 +575,10 @@ pub const cpu_mips3 = Cpu{ .name = "mips3", .llvm_name = "mips3", .dependencies = &[_]*const Feature { - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_gp64, + &feature_mips1, &feature_fp64, &feature_mips3, }, @@ -608,12 +599,12 @@ pub const cpu_mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, &feature_mips32r2, }, }; @@ -622,12 +613,12 @@ pub const cpu_mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, &feature_mips32r3, }, }; @@ -636,12 +627,12 @@ pub const cpu_mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, &feature_mips32r5, }, }; @@ -650,15 +641,15 @@ pub const cpu_mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", .dependencies = &[_]*const Feature { - &feature_nan2008, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, - &feature_abs2008, + &feature_nan2008, + &feature_mips1, &feature_fp64, + &feature_abs2008, &feature_mips32r6, }, }; @@ -667,12 +658,12 @@ pub const cpu_mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", .dependencies = &[_]*const Feature { - &feature_mips1, + &feature_mips4_32, &feature_mips3_32r2, &feature_mips3_32, - &feature_gp64, &feature_mips4_32r2, - &feature_mips4_32, + &feature_gp64, + &feature_mips1, &feature_fp64, &feature_mips4, }, @@ -682,13 +673,13 @@ pub const cpu_mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_mips5, }, @@ -698,13 +689,13 @@ pub const cpu_mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_mips64, }, @@ -714,13 +705,13 @@ pub const cpu_mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_mips64r2, }, @@ -730,13 +721,13 @@ pub const cpu_mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_mips64r3, }, @@ -746,13 +737,13 @@ pub const cpu_mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_mips64r5, }, @@ -762,16 +753,16 @@ pub const cpu_mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", .dependencies = &[_]*const Feature { - &feature_nan2008, + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, + &feature_nan2008, &feature_gp64, - &feature_mips4_32, - &feature_abs2008, + &feature_mips1, &feature_fp64, + &feature_abs2008, &feature_mips64r6, }, }; @@ -780,13 +771,13 @@ pub const cpu_octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, &feature_gp64, - &feature_mips4_32, + &feature_mips1, &feature_fp64, &feature_cnmips, &feature_mips64r2, @@ -797,12 +788,12 @@ pub const cpu_p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", .dependencies = &[_]*const Feature { + &feature_mips4_32, &feature_mips5_32r2, - &feature_mips1, &feature_mips3_32r2, &feature_mips3_32, &feature_mips4_32r2, - &feature_mips4_32, + &feature_mips1, &feature_p5600, }, }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index bb68049ecad762a50ccd983727d80aef5f75ca6a..f0d475a6e5999ae61069f1197b5924e993c1094e 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -296,8 +296,8 @@ pub const feature_power9Altivec = Feature{ .llvm_name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", .dependencies = &[_]*const Feature { - &feature_hardFloat, &feature_isaV30Instructions, + &feature_hardFloat, }, }; @@ -306,8 +306,8 @@ pub const feature_power9Vector = Feature{ .llvm_name = "power9-vector", .description = "Enable POWER9 vector instructions", .dependencies = &[_]*const Feature { - &feature_hardFloat, &feature_isaV30Instructions, + &feature_hardFloat, }, }; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index a3f21adc0139c8c67fd1356615038296f9877399..bf82cc9f822cbbb623d4bd91b26f9efab22e09d8 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -17,14 +17,6 @@ pub const feature_e = Feature{ }, }; -pub const feature_rvcHints = Feature{ - .name = "rvcHints", - .llvm_name = "rvc-hints", - .description = "Enable RVC Hint Instructions.", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_relax = Feature{ .name = "relax", .llvm_name = "relax", @@ -77,7 +69,6 @@ pub const feature_m = Feature{ pub const features = &[_]*const Feature { &feature_bit64, &feature_e, - &feature_rvcHints, &feature_relax, &feature_a, &feature_c, @@ -90,7 +81,6 @@ pub const cpu_genericRv32 = Cpu{ .name = "genericRv32", .llvm_name = "generic-rv32", .dependencies = &[_]*const Feature { - &feature_rvcHints, }, }; @@ -99,7 +89,6 @@ pub const cpu_genericRv64 = Cpu{ .llvm_name = "generic-rv64", .dependencies = &[_]*const Feature { &feature_bit64, - &feature_rvcHints, }, }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 7966f4191506720b3709a87f6531109f5add68f9..1a3f8ec9705a77ce58606c2388e1e1938483a3d7 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -553,48 +553,6 @@ pub const cpu_z14 = Cpu{ }, }; -pub const cpu_z15 = Cpu{ - .name = "z15", - .llvm_name = "z15", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_deflateConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_enhancedSort, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_guardedStorage, - &feature_highWord, - &feature_insertReferenceBitsMultiple, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_messageSecurityAssistExtension7, - &feature_messageSecurityAssistExtension8, - &feature_messageSecurityAssistExtension9, - &feature_miscellaneousExtensions, - &feature_miscellaneousExtensions2, - &feature_miscellaneousExtensions3, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - &feature_vectorEnhancements1, - &feature_vectorEnhancements2, - &feature_vectorPackedDecimal, - &feature_vectorPackedDecimalEnhancement, - }, -}; - pub const cpu_z196 = Cpu{ .name = "z196", .llvm_name = "z196", @@ -647,7 +605,6 @@ pub const cpus = &[_]*const Cpu { &cpu_z10, &cpu_z13, &cpu_z14, - &cpu_z15, &cpu_z196, &cpu_zEC12, }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index f7469ba47fee4fba216ac64112c5b6e4559c9192..e755d2cd88bde7e4ffdc9adaf383bf8119034076 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -197,14 +197,6 @@ pub const feature_avx512dq = Feature{ }, }; -pub const feature_mpx = Feature{ - .name = "mpx", - .llvm_name = "mpx", - .description = "Deprecated. Support MPX instructions", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_enqcmd = Feature{ .name = "enqcmd", .llvm_name = "enqcmd", @@ -484,6 +476,14 @@ pub const feature_movdiri = Feature{ }, }; +pub const feature_mpx = Feature{ + .name = "mpx", + .llvm_name = "mpx", + .description = "Support MPX instructions", + .dependencies = &[_]*const Feature { + }, +}; + pub const feature_mwaitx = Feature{ .name = "mwaitx", .llvm_name = "mwaitx", @@ -598,14 +598,6 @@ pub const feature_padShortFunctions = Feature{ }, }; -pub const feature_prefer128Bit = Feature{ - .name = "prefer128Bit", - .llvm_name = "prefer-128-bit", - .description = "Prefer 128-bit AVX instructions", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_prefer256Bit = Feature{ .name = "prefer256Bit", .llvm_name = "prefer-256-bit", @@ -880,14 +872,6 @@ pub const feature_tbm = Feature{ }, }; -pub const feature_useAa = Feature{ - .name = "useAa", - .llvm_name = "use-aa", - .description = "Use alias analysis during codegen", - .dependencies = &[_]*const Feature { - }, -}; - pub const feature_vaes = Feature{ .name = "vaes", .llvm_name = "vaes", @@ -1073,7 +1057,6 @@ pub const features = &[_]*const Feature { &feature_cx8, &feature_cx16, &feature_avx512dq, - &feature_mpx, &feature_enqcmd, &feature_avx512er, &feature_ermsb, @@ -1108,6 +1091,7 @@ pub const features = &[_]*const Feature { &feature_movbe, &feature_movdir64b, &feature_movdiri, + &feature_mpx, &feature_mwaitx, &feature_macrofusion, &feature_mergeToThreewayBranch, @@ -1122,7 +1106,6 @@ pub const features = &[_]*const Feature { &feature_prfchw, &feature_ptwrite, &feature_padShortFunctions, - &feature_prefer128Bit, &feature_prefer256Bit, &feature_rdpid, &feature_rdrnd, @@ -1156,7 +1139,6 @@ pub const features = &[_]*const Feature { &feature_slowUnalignedMem32, &feature_softFloat, &feature_tbm, - &feature_useAa, &feature_vaes, &feature_avx512vbmi, &feature_avx512vbmi2, @@ -1727,6 +1709,7 @@ pub const cpu_cannonlake = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -1734,7 +1717,6 @@ pub const cpu_cannonlake = Cpu{ &feature_pku, &feature_popcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdrnd, &feature_rdseed, &feature_sgx, @@ -1788,6 +1770,7 @@ pub const cpu_cascadelake = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -1796,7 +1779,6 @@ pub const cpu_cascadelake = Cpu{ &feature_popcnt, &feature_falseDepsPopcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdrnd, &feature_rdseed, &feature_sse42, @@ -1849,6 +1831,7 @@ pub const cpu_cooperlake = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -1857,7 +1840,6 @@ pub const cpu_cooperlake = Cpu{ &feature_popcnt, &feature_falseDepsPopcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdrnd, &feature_rdseed, &feature_sse42, @@ -2059,6 +2041,7 @@ pub const cpu_goldmont = Cpu{ &feature_sahf, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_nopl, &feature_pclmul, &feature_popcnt, @@ -2096,6 +2079,7 @@ pub const cpu_goldmontPlus = Cpu{ &feature_sahf, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_nopl, &feature_pclmul, &feature_popcnt, @@ -2240,6 +2224,7 @@ pub const cpu_icelakeClient = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -2247,7 +2232,6 @@ pub const cpu_icelakeClient = Cpu{ &feature_pku, &feature_popcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdpid, &feature_rdrnd, &feature_rdseed, @@ -2310,6 +2294,7 @@ pub const cpu_icelakeServer = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -2318,7 +2303,6 @@ pub const cpu_icelakeServer = Cpu{ &feature_pku, &feature_popcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdpid, &feature_rdrnd, &feature_rdseed, @@ -2888,6 +2872,7 @@ pub const cpu_skx = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -2896,7 +2881,6 @@ pub const cpu_skx = Cpu{ &feature_popcnt, &feature_falseDepsPopcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdrnd, &feature_rdseed, &feature_sse42, @@ -2942,6 +2926,7 @@ pub const cpu_skylake = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -2999,6 +2984,7 @@ pub const cpu_skylakeAvx512 = Cpu{ &feature_lzcnt, &feature_mmx, &feature_movbe, + &feature_mpx, &feature_macrofusion, &feature_mergeToThreewayBranch, &feature_nopl, @@ -3007,7 +2993,6 @@ pub const cpu_skylakeAvx512 = Cpu{ &feature_popcnt, &feature_falseDepsPopcnt, &feature_prfchw, - &feature_prefer256Bit, &feature_rdrnd, &feature_rdseed, &feature_sse42, @@ -3052,80 +3037,6 @@ pub const cpu_slm = Cpu{ }, }; -pub const cpu_tigerlake = Cpu{ - .name = "tigerlake", - .llvm_name = "tigerlake", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_avx512bitalg, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_gfni, - &feature_fastGather, - &feature_avx512ifma, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_movdir64b, - &feature_movdiri, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_prfchw, - &feature_prefer256Bit, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_shstk, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_vaes, - &feature_avx512vbmi, - &feature_avx512vbmi2, - &feature_avx512vl, - &feature_avx512vnni, - &feature_avx512vp2intersect, - &feature_vpclmulqdq, - &feature_avx512vpopcntdq, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - pub const cpu_tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", @@ -3146,6 +3057,7 @@ pub const cpu_tremont = Cpu{ &feature_movbe, &feature_movdir64b, &feature_movdiri, + &feature_mpx, &feature_nopl, &feature_pclmul, &feature_popcnt, @@ -3415,7 +3327,6 @@ pub const cpus = &[_]*const Cpu { &cpu_skylake, &cpu_skylakeAvx512, &cpu_slm, - &cpu_tigerlake, &cpu_tremont, &cpu_westmere, &cpu_winchipC6, -- 2.54.0 From 8902f3ca32c22656e1f11b562dc3ad6030da14ac Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Thu, 16 Jan 2020 15:02:45 -0500 Subject: [PATCH 22/63] Enable 64bit feature for riscv64 --- src-self-hosted/stage1.zig | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index db6d281fea1f8e9b3e6ed581b8660e6aea39180e..98bd677c27642233aab326dc1d560e801f84a41f 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -833,7 +833,17 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta return @as([*:0]const u8, null_terminated_empty_string); } -const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { +const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.riscv.feature_bit64, &std.target.riscv.feature_a, &std.target.riscv.feature_c, &std.target.riscv.feature_d, @@ -880,9 +890,14 @@ fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os const allocator = std.heap.c_allocator; return switch (arch) { - .riscv32, .riscv64 => blk: { + .riscv32 => blk: { const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv_default_features); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv32_default_features); + break :blk ptr; + }, + .riscv64 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv64_default_features); break :blk ptr; }, .i386 => blk: { -- 2.54.0 From 35c681b7b18df1f8679457975f9dcfc6a4a53468 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Thu, 16 Jan 2020 15:26:53 -0500 Subject: [PATCH 23/63] Fix sentinel mismatch in llvm strings Previously, buffers were used with toOwnedSlice() to create c strings for LLVM cpu/feature strings. However, toOwnedSlice() shrinks the string memory to the buffer's length, which cuts off the null terminator. Now toSliceConst() is used instead, and the buffer is not deinited so that the string memory is not freed. --- src-self-hosted/stage1.zig | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 98bd677c27642233aab326dc1d560e801f84a41f..3e52a670a359c036a836a61a891fbd948165750a 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -643,20 +643,20 @@ const Stage2TargetDetails = struct { var builtin_str_buffer = try std.Buffer.init( allocator, "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); - defer builtin_str_buffer.deinit(); try builtin_str_buffer.append(@tagName(arch)); try builtin_str_buffer.append(".cpu_"); try builtin_str_buffer.append(cpu.name); try builtin_str_buffer.append("};"); + return Self{ .allocator = allocator, .target_details = .{ .cpu = cpu, }, - .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name), + .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.llvm_name), .llvm_features_str = null_terminated_empty_string, - .builtin_str = builtin_str_buffer.toOwnedSlice(), + .builtin_str = builtin_str_buffer.toSliceConst(), }; } @@ -664,10 +664,8 @@ const Stage2TargetDetails = struct { var builtin_str_buffer = try std.Buffer.init( allocator, "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); - defer builtin_str_buffer.deinit(); var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); - defer llvm_features_buffer.deinit(); // First, disable all features. // This way, we only get the ones the user requests. @@ -691,17 +689,14 @@ const Stage2TargetDetails = struct { try builtin_str_buffer.append("}};"); - // This is needed here because llvm_features_buffer.len() is no longer valid after toOwnedSlice(). - const llvm_features_buffer_len = llvm_features_buffer.len(); - return Self{ .allocator = allocator, .target_details = std.target.TargetDetails{ .features = features, }, .llvm_cpu_str = null_terminated_empty_string, - .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0], - .builtin_str = builtin_str_buffer.toOwnedSlice(), + .llvm_features_str = llvm_features_buffer.toSliceConst(), + .builtin_str = builtin_str_buffer.toSliceConst(), }; } }; -- 2.54.0 From 62e4cc06feb704391abdd591c048c0678dedcf5e Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Thu, 16 Jan 2020 15:31:53 -0500 Subject: [PATCH 24/63] Pass target details to c compiler --- src/codegen.cpp | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/src/codegen.cpp b/src/codegen.cpp index d0749c9432e9e90b0a1302728e2945946a5885c2..5852f3f0042ca0e1fa8a48b735f47fbb327ebbf0 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -30,11 +30,6 @@ enum ResumeId { ResumeIdCall, }; -// TODO https://github.com/ziglang/zig/issues/2883 -// Until then we have this same default as Clang. -// This avoids https://github.com/ziglang/zig/issues/3275 -static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax"; - static void init_darwin_native(CodeGen *g) { char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET"); char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET"); @@ -9128,21 +9123,18 @@ void add_cc_args(CodeGen *g, ZigList &args, const char *out_dep_pa args.append("-target"); args.append(buf_ptr(&g->llvm_triple_str)); - if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) { - // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's - // cross compilation CPU info for RISCV. - // TODO: https://github.com/ziglang/zig/issues/2883 + if (g->target_details) { args.append("-Xclang"); - args.append("-target-feature"); + args.append("-target-cpu"); args.append("-Xclang"); - args.append(riscv_default_features); - } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) { + args.append(stage2_target_details_get_llvm_cpu(g->target_details)); args.append("-Xclang"); args.append("-target-feature"); args.append("-Xclang"); - args.append("-sse"); + args.append(stage2_target_details_get_llvm_features(g->target_details)); } } + if (g->zig_target->os == OsFreestanding) { args.append("-ffreestanding"); } -- 2.54.0 From 430077df1b1a723fab281c1472773be2cc2106e8 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Thu, 16 Jan 2020 15:39:20 -0500 Subject: [PATCH 25/63] Allow target details with no LLVM support --- lib/std/target.zig | 4 ++-- src-self-hosted/stage1.zig | 32 +++++++++++++++++++------------- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 9bb4936f1116ffdfbf85e6f8e1dbff42c10a57a0..7069f9e833c9bdc33a1431f27d9ce3abb293d35f 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -860,7 +860,7 @@ pub const x86 = @import("target/x86.zig"); pub const Feature = struct { name: []const u8, - llvm_name: []const u8, + llvm_name: ?[]const u8, description: []const u8, dependencies: []*const Feature, @@ -868,7 +868,7 @@ pub const Feature = struct { pub const Cpu = struct { name: []const u8, - llvm_name: []const u8, + llvm_name: ?[]const u8, dependencies: []*const Feature, }; diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 3e52a670a359c036a836a61a891fbd948165750a..9b6ae2548b0fb9c56fa903e9c1e971eb1e637cc7 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -649,12 +649,14 @@ const Stage2TargetDetails = struct { try builtin_str_buffer.append(cpu.name); try builtin_str_buffer.append("};"); + const cpu_string = cpu.llvm_name orelse ""; + return Self{ .allocator = allocator, .target_details = .{ .cpu = cpu, }, - .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.llvm_name), + .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu_string), .llvm_features_str = null_terminated_empty_string, .builtin_str = builtin_str_buffer.toSliceConst(), }; @@ -670,21 +672,25 @@ const Stage2TargetDetails = struct { // First, disable all features. // This way, we only get the ones the user requests. for (std.target.getFeaturesForArch(arch)) |feature| { - try llvm_features_buffer.append("-"); - try llvm_features_buffer.append(feature.llvm_name); - try llvm_features_buffer.append(","); + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("-"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } } for (features) |feature| { - try llvm_features_buffer.append("+"); - try llvm_features_buffer.append(feature.llvm_name); - try llvm_features_buffer.append(","); - - try builtin_str_buffer.append("&@import(\"std\").target."); - try builtin_str_buffer.append(@tagName(arch)); - try builtin_str_buffer.append(".feature_"); - try builtin_str_buffer.append(feature.name); - try builtin_str_buffer.append(","); + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("+"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + + try builtin_str_buffer.append("&@import(\"std\").target."); + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".feature_"); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append(","); + } } try builtin_str_buffer.append("}};"); -- 2.54.0 From c15623428e83bd8baa1450678bf59beab2c2df99 Mon Sep 17 00:00:00 2001 From: Layne Gustafson Date: Fri, 17 Jan 2020 08:30:42 -0500 Subject: [PATCH 26/63] Pass target_details to child CodeGens --- src/codegen.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/codegen.cpp b/src/codegen.cpp index 5852f3f0042ca0e1fa8a48b735f47fbb327ebbf0..b2cae32fa602accc3d89285df5bb257d809d7b66 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -10661,6 +10661,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o CodeGen *child_gen = codegen_create(nullptr, root_src_path, parent_gen->zig_target, out_type, parent_gen->build_mode, parent_gen->zig_lib_dir, libc, get_global_cache_dir(), false, child_progress_node); + child_gen->target_details = parent_gen->target_details; child_gen->root_out_name = buf_create_from_str(name); child_gen->disable_gen_h = true; child_gen->want_stack_check = WantStackCheckDisabled; -- 2.54.0 From a867b43366c7fb132ec44a03f9b40ead888900fb Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 19 Jan 2020 02:40:35 -0500 Subject: [PATCH 27/63] progress towards merging see BRANCH_TODO file --- BRANCH_TODO | 55 + lib/std/buffer.zig | 4 +- lib/std/build.zig | 51 +- lib/std/builtin.zig | 6 + lib/std/fmt.zig | 5 + lib/std/meta.zig | 18 + lib/std/os/linux/tls.zig | 2 +- lib/std/std.zig | 1 - lib/std/target.zig | 324 ++-- lib/std/target/aarch64.zig | 3129 ++++++++++++++++++------------------ src-self-hosted/stage1.zig | 387 ++--- src/all_types.hpp | 2 - src/codegen.cpp | 56 +- src/main.cpp | 24 +- src/target.hpp | 1 + src/userland.cpp | 50 +- src/userland.h | 18 +- 17 files changed, 2089 insertions(+), 2044 deletions(-) create mode 100644 BRANCH_TODO diff --git a/BRANCH_TODO b/BRANCH_TODO new file mode 100644 index 0000000000000000000000000000000000000000..ad1ad76d21d198554c0ef6e8ac445050f43530c7 --- /dev/null +++ b/BRANCH_TODO @@ -0,0 +1,55 @@ +Finish these thigns before merging teh branch + + * need to populate builtin.zig cpu_features, undefined is incorrect. I guess for zig0 it will be always baseline + * need to populate std.Target.current.cpu_features even for native target + + * finish refactoring target/arch/* + * `zig builtin` integration + * move target details to better location + * +foo,-bar vs foo,bar + * baseline features + + +const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ + &std.target.riscv.feature_bit64, + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_sse, + &std.target.x86.feature_sse2, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + +// Same as above but without sse. +const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{ + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + + diff --git a/lib/std/buffer.zig b/lib/std/buffer.zig index 6313d693b71c9aeca1386512f6da83aed5e184c3..21f73112fa497f2d05e7651ac97739b806fe7297 100644 --- a/lib/std/buffer.zig +++ b/lib/std/buffer.zig @@ -57,11 +57,11 @@ pub const Buffer = struct { /// The caller owns the returned memory. The Buffer becomes null and /// is safe to `deinit`. - pub fn toOwnedSlice(self: *Buffer) []u8 { + pub fn toOwnedSlice(self: *Buffer) [:0]u8 { const allocator = self.list.allocator; const result = allocator.shrink(self.list.items, self.len()); self.* = initNull(allocator); - return result; + return result[0 .. result.len - 1 :0]; } pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer { diff --git a/lib/std/build.zig b/lib/std/build.zig index 72d26ff0475eff35e5a5da656bfe0c830e4b5cbc..1eabfb1559aaf9b6e63b9d0014328313d2e9d413 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1199,8 +1199,6 @@ pub const LibExeObjStep = struct { subsystem: ?builtin.SubSystem = null, - target_details: ?std.target.TargetDetails = null, - const LinkObject = union(enum) { StaticPath: []const u8, OtherStep: *LibExeObjStep, @@ -1386,10 +1384,6 @@ pub const LibExeObjStep = struct { self.computeOutFileNames(); } - pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void { - self.target_details = target_details; - } - pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void { self.target_glibc = Version{ .major = major, @@ -1974,34 +1968,33 @@ pub const LibExeObjStep = struct { switch (self.target) { .Native => {}, - .Cross => { + .Cross => |cross| { try zig_args.append("-target"); try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable); + + switch (cross.cpu_features) { + .baseline => {}, + .cpu => |cpu| { + try zig_args.append("-target-cpu"); + try zig_args.append(cpu.name); + }, + .features => |features| { + try zig_args.append("-target-cpu-features"); + + var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); + for (self.target.getArch().allFeaturesList()) |feature, i| { + if (Target.Cpu.Feature.isEnabled(features, @intCast(u7, i))) { + try feature_str_buffer.append(feature.name); + try feature_str_buffer.append(","); + } + } + + try zig_args.append(feature_str_buffer.toSlice()); + }, + } }, } - if (self.target_details) |td| { - switch (td) { - .cpu => |cpu| { - try zig_args.append("--cpu"); - try zig_args.append(cpu.name); - }, - .features => |features| { - try zig_args.append("--features"); - - var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); - defer feature_str_buffer.deinit(); - - for (features) |feature| { - try feature_str_buffer.append(feature.name); - try feature_str_buffer.append(","); - } - - try zig_args.append(feature_str_buffer.toOwnedSlice()); - }, - } - } - if (self.target_glibc) |ver| { try zig_args.append("-target-glibc"); try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch })); diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index 55f044094e410df39d5a502d3b3c592b05765280..712d98b25cac3adabb0aeaa55dac864144a5c608 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -15,6 +15,12 @@ pub const ObjectFormat = std.Target.ObjectFormat; /// Deprecated: use `std.Target.SubSystem`. pub const SubSystem = std.Target.SubSystem; +/// Deprecated: use `std.Target.Cross.CpuFeatures`. +pub const CpuFeatures = std.Target.Cross.CpuFeatures; + +/// Deprecated: use `std.Target.Cpu`. +pub const Cpu = std.Target.Cpu; + /// `explicit_subsystem` is missing when the subsystem is automatically detected, /// so Zig standard library has the subsystem detection logic here. This should generally be /// used rather than `explicit_subsystem`. diff --git a/lib/std/fmt.zig b/lib/std/fmt.zig index 548ef8ccce4eb635af1204a590a6197951f429f2..adbf409baafd9cd471cc6d95a20ac255860c331b 100644 --- a/lib/std/fmt.zig +++ b/lib/std/fmt.zig @@ -1138,6 +1138,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) { size.* += bytes.len; } +pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 { + const result = try allocPrint(allocator, fmt ++ "\x00", args); + return result[0 .. result.len - 1 :0]; +} + test "bufPrintInt" { var buffer: [100]u8 = undefined; const buf = buffer[0..]; diff --git a/lib/std/meta.zig b/lib/std/meta.zig index 5e5850e393a7394d7f746387778600d4148a83fd..5cb9c6589ccb4b117f9cdd915060dc9a4963a2cf 100644 --- a/lib/std/meta.zig +++ b/lib/std/meta.zig @@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void { if (!builtin.is_test) return; _ = declarations(T); } + +/// Returns a slice of pointers to public declarations of a namespace. +pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl { + const S = struct { + fn declNameLessThan(lhs: *const Decl, rhs: *const Decl) bool { + return mem.lessThan(u8, lhs.name, rhs.name); + } + }; + comptime { + const decls = declarations(Namespace); + var array: [decls.len]*const Decl = undefined; + for (decls) |decl, i| { + array[i] = &@field(Namespace, decl.name); + } + std.sort.sort(*const Decl, &array, S.declNameLessThan); + return &array; + } +} diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig index efb1e5fe0499f7e441e91fa0e0f3ddd9afbd62e3..5dbdafb60aa4a7210a9c63c65776bb356164451c 100644 --- a/lib/std/os/linux/tls.zig +++ b/lib/std/os/linux/tls.zig @@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr { if (tls_phdr) |phdr| { // If the cpu is arm-based, check if it supports the TLS register - if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) { + if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) { // If the CPU does not support TLS via a coprocessor register, // a kernel helper function can be used instead on certain linux kernels. // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c. diff --git a/lib/std/std.zig b/lib/std/std.zig index f268bfe848e6fcc4c943ddb6601b4e8aca5de8cc..dd4d968efbc9fa8fa81ffaf07245dc77d56a2896 100644 --- a/lib/std/std.zig +++ b/lib/std/std.zig @@ -60,7 +60,6 @@ pub const rand = @import("rand.zig"); pub const rb = @import("rb.zig"); pub const sort = @import("sort.zig"); pub const ascii = @import("ascii.zig"); -pub const target = @import("target.zig"); pub const testing = @import("testing.zig"); pub const time = @import("time.zig"); pub const unicode = @import("unicode.zig"); diff --git a/lib/std/target.zig b/lib/std/target.zig index 7069f9e833c9bdc33a1431f27d9ce3abb293d35f..263167d738c39e5eddd5a0df1af7db7243255ac4 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -101,6 +101,22 @@ pub const Target = union(enum) { renderscript32, renderscript64, + pub const aarch64 = @import("target/aarch64.zig"); + pub const amdgpu = @import("target/amdgpu.zig"); + pub const arm = @import("target/arm.zig"); + pub const avr = @import("target/avr.zig"); + pub const bpf = @import("target/bpf.zig"); + pub const hexagon = @import("target/hexagon.zig"); + pub const mips = @import("target/mips.zig"); + pub const msp430 = @import("target/msp430.zig"); + pub const nvptx = @import("target/nvptx.zig"); + pub const powerpc = @import("target/powerpc.zig"); + pub const riscv = @import("target/riscv.zig"); + pub const sparc = @import("target/sparc.zig"); + pub const systemz = @import("target/systemz.zig"); + pub const wasm = @import("target/wasm.zig"); + pub const x86 = @import("target/x86.zig"); + pub const Arm32 = enum { v8_5a, v8_4a, @@ -184,6 +200,71 @@ pub const Target = union(enum) { }; } + pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu { + for (arch.allCpus()) |cpu| { + if (mem.eql(u8, cpu_name, cpu.name)) { + return cpu; + } + } + return error.UnknownCpu; + } + + /// This parsing function supports 2 syntaxes. + /// * Comma-separated list of features, with + or - in front of each feature. This + /// form represents a deviation from baseline. + /// * Comma-separated list of features, with no + or - in front of each feature. This + /// form represents an exclusive list of enabled features; no other features besides + /// the ones listed, and their dependencies, will be enabled. + /// Extra commas are ignored. + pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set { + // Here we compute both and choose the correct result at the end, based + // on whether or not we saw + and - signs. + var set: @Vector(2, Cpu.Feature.Set) = [2]Cpu.Feature.Set{ 0, arch.baselineFeatures() }; + var mode: enum { + unknown, + baseline, + whitelist, + } = .unknown; + + var it = mem.tokenize(features_text, ","); + while (it.next()) |item_text| { + const feature_name = blk: { + if (mem.startsWith(u8, item_text, "+")) { + switch (mode) { + .unknown, .baseline => mode = .baseline, + .whitelist => return error.InvalidCpuFeatures, + } + break :blk item_text[1..]; + } else if (mem.startsWith(u8, item_text, "-")) { + switch (mode) { + .unknown, .baseline => mode = .baseline, + .whitelist => return error.InvalidCpuFeatures, + } + break :blk item_text[1..]; + } else { + switch (mode) { + .unknown, .whitelist => mode = .whitelist, + .baseline => return error.InvalidCpuFeatures, + } + break :blk item_text; + } + }; + for (arch.allFeaturesList()) |feature, index| { + if (mem.eql(u8, feature_name, feature.name)) { + set |= @splat(2, 1 << index); + break; + } + } else { + return error.UnknownCpuFeature; + } + } + + return switch (mode) { + .unknown, .whitelist => set[0], + .baseline => set[1], + }; + } + pub fn toElfMachine(arch: Arch) std.elf.EM { return switch (arch) { .avr => ._AVR, @@ -296,6 +377,98 @@ pub const Target = union(enum) { => .Big, }; } + + /// Returns a name that matches the lib/std/target/* directory name. + pub fn genericName(arch: Arch) []const u8 { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => "arm", + .aarch64, .aarch64_be, .aarch64_32 => "aarch64", + .avr => "avr", + .bpfel, .bpfeb => "bpf", + .hexagon => "hexagon", + .mips, .mipsel, .mips64, .mips64el => "mips", + .msp430 => "msp430", + .powerpc, .powerpc64, .powerpc64le => "powerpc", + .amdgcn => "amdgpu", + .riscv32, .riscv64 => "riscv", + .sparc, .sparcv9, .sparcel => "sparc", + .s390x => "systemz", + .i386, .x86_64 => "x86", + .nvptx, .nvptx64 => "nvptx", + .wasm32, .wasm64 => "wasm", + else => @tagName(arch), + }; + } + + /// All CPU features Zig is aware of, sorted lexicographically by name. + pub fn allFeaturesList(arch: Arch) []const *const Cpu.Feature { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.all_features, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_features, + .avr => avr.all_features, + .bpfel, .bpfeb => bpf.all_features, + .hexagon => hexagon.all_features, + .mips, .mipsel, .mips64, .mips64el => mips.all_features, + .msp430 => msp430.all_features, + .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, + .amdgcn => amdgpu.all_features, + .riscv32, .riscv64 => riscv.all_features, + .sparc, .sparcv9, .sparcel => sparc.all_features, + .s390x => systemz.all_features, + .i386, .x86_64 => x86.all_features, + .nvptx, .nvptx64 => nvptx.all_features, + .wasm32, .wasm64 => wasm.all_features, + + else => &[0]*const Cpu.Feature{}, + }; + } + + /// The "default" set of CPU features for cross-compiling. A conservative set + /// of features that is expected to be supported on most available hardware. + pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.baseline_features, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features, + .avr => avr.baseline_features, + .bpfel, .bpfeb => bpf.baseline_features, + .hexagon => hexagon.baseline_features, + .mips, .mipsel, .mips64, .mips64el => mips.baseline_features, + .msp430 => msp430.baseline_features, + .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features, + .amdgcn => amdgpu.baseline_features, + .riscv32, .riscv64 => riscv.baseline_features, + .sparc, .sparcv9, .sparcel => sparc.baseline_features, + .s390x => systemz.baseline_features, + .i386, .x86_64 => x86.baseline_features, + .nvptx, .nvptx64 => nvptx.baseline_features, + .wasm32, .wasm64 => wasm.baseline_features, + + else => &[0]*const Cpu.Feature{}, + }; + } + + /// All CPUs Zig is aware of, sorted lexicographically by name. + pub fn allCpus(arch: Arch) []const *const Cpu { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus, + .avr => avr.all_cpus, + .bpfel, .bpfeb => bpf.all_cpus, + .hexagon => hexagon.all_cpus, + .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, + .msp430 => msp430.all_cpus, + .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, + .amdgcn => amdgpu.all_cpus, + .riscv32, .riscv64 => riscv.all_cpus, + .sparc, .sparcv9, .sparcel => sparc.all_cpus, + .s390x => systemz.all_cpus, + .i386, .x86_64 => x86.all_cpus, + .nvptx, .nvptx64 => nvptx.all_cpus, + .wasm32, .wasm64 => wasm.all_cpus, + + else => &[0]*const Cpu{}, + }; + } }; pub const Abi = enum { @@ -323,6 +496,28 @@ pub const Target = union(enum) { macabi, }; + pub const Cpu = struct { + name: []const u8, + llvm_name: ?[:0]const u8, + features: Feature.Set, + + pub const Feature = struct { + /// The bit index into `Set`. + index: u8, + name: []const u8, + llvm_name: ?[:0]const u8, + description: []const u8, + dependencies: Set, + + /// A bit set of all the features. + pub const Set = u128; + + pub fn isEnabled(set: Set, arch_feature_index: u7) bool { + return (set & (@as(Set, 1) << arch_feature_index)) != 0; + } + }; + }; + pub const ObjectFormat = enum { unknown, coff, @@ -346,6 +541,19 @@ pub const Target = union(enum) { arch: Arch, os: Os, abi: Abi, + cpu_features: CpuFeatures = .baseline, + + pub const CpuFeatures = union(enum) { + /// The "default" set of CPU features for cross-compiling. A conservative set + /// of features that is expected to be supported on most available hardware. + baseline, + + /// Target one specific CPU. + cpu: *const Cpu, + + /// Explicitly provide the entire CPU feature set. + features: Cpu.Feature.Set, + }; }; pub const current = Target{ @@ -353,11 +561,20 @@ pub const Target = union(enum) { .arch = builtin.arch, .os = builtin.os, .abi = builtin.abi, + .cpu_features = builtin.cpu_features, }, }; pub const stack_align = 16; + pub fn cpuFeatures(self: Target) []const *const Cpu.Feature { + return switch (self.cpu_features) { + .baseline => self.arch.baselineFeatures(), + .cpu => |cpu| cpu.features, + .features => |features| features, + }; + } + pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 { return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{ @tagName(self.getArch()), @@ -496,7 +713,7 @@ pub const Target = union(enum) { pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch { const info = @typeInfo(Arch); inline for (info.Union.fields) |field| { - if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { + if (mem.eql(u8, text, field.name)) { if (field.field_type == void) { return @as(Arch, @field(Arch, field.name)); } else { @@ -514,31 +731,6 @@ pub const Target = union(enum) { return error.UnknownArchitecture; } - pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) { - const info = @typeInfo(Arch); - inline for (info.Union.fields) |field| { - if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { - if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name)); - - if (field.field_type == void) { - return error.UnknownArchitecture; - } - - const sub_info = @typeInfo(field.field_type); - inline for (sub_info.Enum.fields) |sub_field| { - const combined = field.name ++ sub_field.name; - if (mem.eql(u8, text, combined)) { - return @as(@TagType(Arch), @field(Arch, field.name)); - } - } - - return error.UnknownSubArchitecture; - } - } - - return error.UnknownArchitecture; - } - pub fn parseOs(text: []const u8) !Os { const info = @typeInfo(Os); inline for (info.Enum.fields) |field| { @@ -841,83 +1033,3 @@ pub const Target = union(enum) { return .unavailable; } }; - -pub const aarch64 = @import("target/aarch64.zig"); -pub const amdgpu = @import("target/amdgpu.zig"); -pub const arm = @import("target/arm.zig"); -pub const avr = @import("target/avr.zig"); -pub const bpf = @import("target/bpf.zig"); -pub const hexagon = @import("target/hexagon.zig"); -pub const mips = @import("target/mips.zig"); -pub const msp430 = @import("target/msp430.zig"); -pub const nvptx = @import("target/nvptx.zig"); -pub const powerpc = @import("target/powerpc.zig"); -pub const riscv = @import("target/riscv.zig"); -pub const sparc = @import("target/sparc.zig"); -pub const systemz = @import("target/systemz.zig"); -pub const wasm = @import("target/wasm.zig"); -pub const x86 = @import("target/x86.zig"); - -pub const Feature = struct { - name: []const u8, - llvm_name: ?[]const u8, - description: []const u8, - - dependencies: []*const Feature, -}; - -pub const Cpu = struct { - name: []const u8, - llvm_name: ?[]const u8, - - dependencies: []*const Feature, -}; - -pub const TargetDetails = union(enum) { - cpu: *const Cpu, - features: []*const Feature, -}; - -pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.features, - .aarch64, .aarch64_be, .aarch64_32 => aarch64.features, - .avr => avr.features, - .bpfel, .bpfeb => bpf.features, - .hexagon => hexagon.features, - .mips, .mipsel, .mips64, .mips64el => mips.features, - .msp430 => msp430.features, - .powerpc, .powerpc64, .powerpc64le => powerpc.features, - .amdgcn => amdgpu.features, - .riscv32, .riscv64 => riscv.features, - .sparc, .sparcv9, .sparcel => sparc.features, - .s390x => systemz.features, - .i386, .x86_64 => x86.features, - .nvptx, .nvptx64 => nvptx.features, - .wasm32, .wasm64 => wasm.features, - - else => &[_]*const Feature{}, - }; -} - -pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.cpus, - .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus, - .avr => avr.cpus, - .bpfel, .bpfeb => bpf.cpus, - .hexagon => hexagon.cpus, - .mips, .mipsel, .mips64, .mips64el => mips.cpus, - .msp430 => msp430.cpus, - .powerpc, .powerpc64, .powerpc64le => powerpc.cpus, - .amdgcn => amdgpu.cpus, - .riscv32, .riscv64 => riscv.cpus, - .sparc, .sparcv9, .sparcel => sparc.cpus, - .s390x => systemz.cpus, - .i386, .x86_64 => x86.cpus, - .nvptx, .nvptx64 => nvptx.cpus, - .wasm32, .wasm64 => wasm.cpus, - - else => &[_]*const Cpu{}, - }; -} diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 56101f20e77204d7e5116215fbdd411d8603461a..77d8c986c9cea7a0c32fc83be2a1464af34b265b 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -1,1603 +1,1528 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_aes = Feature{ - .name = "aes", - .llvm_name = "aes", - .description = "Enable AES support", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_am = Feature{ - .name = "am", - .llvm_name = "am", - .description = "Enable v8.4-A Activity Monitors extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_aggressiveFma = Feature{ - .name = "aggressiveFma", - .llvm_name = "aggressive-fma", - .description = "Enable Aggressive FMA for floating-point.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_altnzcv = Feature{ - .name = "altnzcv", - .llvm_name = "altnzcv", - .description = "Enable alternative NZCV format for floating point comparisons", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_alternateSextloadCvtF32Pattern = Feature{ - .name = "alternateSextloadCvtF32Pattern", - .llvm_name = "alternate-sextload-cvt-f32-pattern", - .description = "Use alternative pattern for sextload convert to f32", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_arithBccFusion = Feature{ - .name = "arithBccFusion", - .llvm_name = "arith-bcc-fusion", - .description = "CPU fuses arithmetic+bcc operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_arithCbzFusion = Feature{ - .name = "arithCbzFusion", - .llvm_name = "arith-cbz-fusion", - .description = "CPU fuses arithmetic + cbz/cbnz operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_balanceFpOps = Feature{ - .name = "balanceFpOps", - .llvm_name = "balance-fp-ops", - .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bti = Feature{ - .name = "bti", - .llvm_name = "bti", - .description = "Enable Branch Target Identification", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ccidx = Feature{ - .name = "ccidx", - .llvm_name = "ccidx", - .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ccpp = Feature{ - .name = "ccpp", - .llvm_name = "ccpp", - .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_crc = Feature{ - .name = "crc", - .llvm_name = "crc", - .description = "Enable ARMv8 CRC-32 checksum instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ccdp = Feature{ - .name = "ccdp", - .llvm_name = "ccdp", - .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX8 = Feature{ - .name = "callSavedX8", - .llvm_name = "call-saved-x8", - .description = "Make X8 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX9 = Feature{ - .name = "callSavedX9", - .llvm_name = "call-saved-x9", - .description = "Make X9 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX10 = Feature{ - .name = "callSavedX10", - .llvm_name = "call-saved-x10", - .description = "Make X10 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX11 = Feature{ - .name = "callSavedX11", - .llvm_name = "call-saved-x11", - .description = "Make X11 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX12 = Feature{ - .name = "callSavedX12", - .llvm_name = "call-saved-x12", - .description = "Make X12 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX13 = Feature{ - .name = "callSavedX13", - .llvm_name = "call-saved-x13", - .description = "Make X13 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX14 = Feature{ - .name = "callSavedX14", - .llvm_name = "call-saved-x14", - .description = "Make X14 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX15 = Feature{ - .name = "callSavedX15", - .llvm_name = "call-saved-x15", - .description = "Make X15 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_callSavedX18 = Feature{ - .name = "callSavedX18", - .llvm_name = "call-saved-x18", - .description = "Make X18 callee saved.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_complxnum = Feature{ - .name = "complxnum", - .llvm_name = "complxnum", - .description = "Enable v8.3-A Floating-point complex number support", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_crypto = Feature{ - .name = "crypto", - .llvm_name = "crypto", - .description = "Enable cryptographic instructions", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_customCheapAsMove = Feature{ - .name = "customCheapAsMove", - .llvm_name = "custom-cheap-as-move", - .description = "Use custom handling of cheap instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dit = Feature{ - .name = "dit", - .llvm_name = "dit", - .description = "Enable v8.4-A Data Independent Timing instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_disableLatencySchedHeuristic = Feature{ - .name = "disableLatencySchedHeuristic", - .llvm_name = "disable-latency-sched-heuristic", - .description = "Disable latency scheduling heuristic", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dotprod = Feature{ - .name = "dotprod", - .llvm_name = "dotprod", - .description = "Enable dot product support", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_exynosCheapAsMove = Feature{ - .name = "exynosCheapAsMove", - .llvm_name = "exynos-cheap-as-move", - .description = "Use Exynos specific handling of cheap instructions", - .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - }, -}; - -pub const feature_fmi = Feature{ - .name = "fmi", - .llvm_name = "fmi", - .description = "Enable v8.4-A Flag Manipulation Instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp16fml = Feature{ - .name = "fp16fml", - .llvm_name = "fp16fml", - .description = "Enable FP16 FML instructions", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_fpArmv8 = Feature{ - .name = "fpArmv8", - .llvm_name = "fp-armv8", - .description = "Enable ARMv8 FP", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fptoint = Feature{ - .name = "fptoint", - .llvm_name = "fptoint", - .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_force32bitJumpTables = Feature{ - .name = "force32bitJumpTables", - .llvm_name = "force-32bit-jump-tables", - .description = "Force jump table entries to be 32-bits wide except at MinSize", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fullfp16 = Feature{ - .name = "fullfp16", - .llvm_name = "fullfp16", - .description = "Full FP16", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_fuseAes = Feature{ - .name = "fuseAes", - .llvm_name = "fuse-aes", - .description = "CPU fuses AES crypto operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseAddress = Feature{ - .name = "fuseAddress", - .llvm_name = "fuse-address", - .description = "CPU fuses address generation and memory operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseArithLogic = Feature{ - .name = "fuseArithLogic", - .llvm_name = "fuse-arith-logic", - .description = "CPU fuses arithmetic and logic operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseCsel = Feature{ - .name = "fuseCsel", - .llvm_name = "fuse-csel", - .description = "CPU fuses conditional select operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseCryptoEor = Feature{ - .name = "fuseCryptoEor", - .llvm_name = "fuse-crypto-eor", - .description = "CPU fuses AES/PMULL and EOR operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseLiterals = Feature{ - .name = "fuseLiterals", - .llvm_name = "fuse-literals", - .description = "CPU fuses literal generation operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_jsconv = Feature{ - .name = "jsconv", - .llvm_name = "jsconv", - .description = "Enable v8.3-A JavaScript FP conversion enchancement", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_lor = Feature{ - .name = "lor", - .llvm_name = "lor", - .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lse = Feature{ - .name = "lse", - .llvm_name = "lse", - .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lslFast = Feature{ - .name = "lslFast", - .llvm_name = "lsl-fast", - .description = "CPU has a fastpath logical shift of up to 3 places", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mpam = Feature{ - .name = "mpam", - .llvm_name = "mpam", - .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mte = Feature{ - .name = "mte", - .llvm_name = "mte", - .description = "Enable Memory Tagging Extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_neon = Feature{ - .name = "neon", - .llvm_name = "neon", - .description = "Enable Advanced SIMD instructions", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_nv = Feature{ - .name = "nv", - .llvm_name = "nv", - .description = "Enable v8.4-A Nested Virtualization Enchancement", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noNegImmediates = Feature{ - .name = "noNegImmediates", - .llvm_name = "no-neg-immediates", - .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_pa = Feature{ - .name = "pa", - .llvm_name = "pa", - .description = "Enable v8.3-A Pointer Authentication enchancement", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_pan = Feature{ - .name = "pan", - .llvm_name = "pan", - .description = "Enables ARM v8.1 Privileged Access-Never extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_panRwv = Feature{ - .name = "panRwv", - .llvm_name = "pan-rwv", - .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", - .dependencies = &[_]*const Feature { - &feature_pan, - }, -}; - -pub const feature_perfmon = Feature{ - .name = "perfmon", - .llvm_name = "perfmon", - .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_usePostraScheduler = Feature{ - .name = "usePostraScheduler", - .llvm_name = "use-postra-scheduler", - .description = "Schedule again after register allocation", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_predres = Feature{ - .name = "predres", - .llvm_name = "predres", - .description = "Enable v8.5a execution and data prediction invalidation instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_predictableSelectExpensive = Feature{ - .name = "predictableSelectExpensive", - .llvm_name = "predictable-select-expensive", - .description = "Prefer likely predicted branches over selects", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_uaops = Feature{ - .name = "uaops", - .llvm_name = "uaops", - .description = "Enable v8.2 UAO PState", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ras = Feature{ - .name = "ras", - .llvm_name = "ras", - .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rasv8_4 = Feature{ - .name = "rasv8_4", - .llvm_name = "rasv8_4", - .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", - .dependencies = &[_]*const Feature { - &feature_ras, - }, -}; - -pub const feature_rcpc = Feature{ - .name = "rcpc", - .llvm_name = "rcpc", - .description = "Enable support for RCPC extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rcpcImmo = Feature{ - .name = "rcpcImmo", - .llvm_name = "rcpc-immo", - .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", - .dependencies = &[_]*const Feature { - &feature_rcpc, - }, -}; - -pub const feature_rdm = Feature{ - .name = "rdm", - .llvm_name = "rdm", - .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rand = Feature{ - .name = "rand", - .llvm_name = "rand", - .description = "Enable Random Number generation instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX1 = Feature{ - .name = "reserveX1", - .llvm_name = "reserve-x1", - .description = "Reserve X1, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX2 = Feature{ - .name = "reserveX2", - .llvm_name = "reserve-x2", - .description = "Reserve X2, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX3 = Feature{ - .name = "reserveX3", - .llvm_name = "reserve-x3", - .description = "Reserve X3, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX4 = Feature{ - .name = "reserveX4", - .llvm_name = "reserve-x4", - .description = "Reserve X4, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX5 = Feature{ - .name = "reserveX5", - .llvm_name = "reserve-x5", - .description = "Reserve X5, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX6 = Feature{ - .name = "reserveX6", - .llvm_name = "reserve-x6", - .description = "Reserve X6, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX7 = Feature{ - .name = "reserveX7", - .llvm_name = "reserve-x7", - .description = "Reserve X7, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX9 = Feature{ - .name = "reserveX9", - .llvm_name = "reserve-x9", - .description = "Reserve X9, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX10 = Feature{ - .name = "reserveX10", - .llvm_name = "reserve-x10", - .description = "Reserve X10, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX11 = Feature{ - .name = "reserveX11", - .llvm_name = "reserve-x11", - .description = "Reserve X11, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX12 = Feature{ - .name = "reserveX12", - .llvm_name = "reserve-x12", - .description = "Reserve X12, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX13 = Feature{ - .name = "reserveX13", - .llvm_name = "reserve-x13", - .description = "Reserve X13, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX14 = Feature{ - .name = "reserveX14", - .llvm_name = "reserve-x14", - .description = "Reserve X14, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX15 = Feature{ - .name = "reserveX15", - .llvm_name = "reserve-x15", - .description = "Reserve X15, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX18 = Feature{ - .name = "reserveX18", - .llvm_name = "reserve-x18", - .description = "Reserve X18, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX20 = Feature{ - .name = "reserveX20", - .llvm_name = "reserve-x20", - .description = "Reserve X20, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX21 = Feature{ - .name = "reserveX21", - .llvm_name = "reserve-x21", - .description = "Reserve X21, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX22 = Feature{ - .name = "reserveX22", - .llvm_name = "reserve-x22", - .description = "Reserve X22, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX23 = Feature{ - .name = "reserveX23", - .llvm_name = "reserve-x23", - .description = "Reserve X23, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX24 = Feature{ - .name = "reserveX24", - .llvm_name = "reserve-x24", - .description = "Reserve X24, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX25 = Feature{ - .name = "reserveX25", - .llvm_name = "reserve-x25", - .description = "Reserve X25, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX26 = Feature{ - .name = "reserveX26", - .llvm_name = "reserve-x26", - .description = "Reserve X26, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX27 = Feature{ - .name = "reserveX27", - .llvm_name = "reserve-x27", - .description = "Reserve X27, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveX28 = Feature{ - .name = "reserveX28", - .llvm_name = "reserve-x28", - .description = "Reserve X28, making it unavailable as a GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sb = Feature{ - .name = "sb", - .llvm_name = "sb", - .description = "Enable v8.5 Speculation Barrier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sel2 = Feature{ - .name = "sel2", - .llvm_name = "sel2", - .description = "Enable v8.4-A Secure Exception Level 2 extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sha2 = Feature{ - .name = "sha2", - .llvm_name = "sha2", - .description = "Enable SHA1 and SHA256 support", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_sha3 = Feature{ - .name = "sha3", - .llvm_name = "sha3", - .description = "Enable SHA512 and SHA3 support", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_sm4 = Feature{ - .name = "sm4", - .llvm_name = "sm4", - .description = "Enable SM3 and SM4 support", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - }, -}; - -pub const feature_spe = Feature{ - .name = "spe", - .llvm_name = "spe", - .description = "Enable Statistical Profiling extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ssbs = Feature{ - .name = "ssbs", - .llvm_name = "ssbs", - .description = "Enable Speculative Store Bypass Safe bit", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sve = Feature{ - .name = "sve", - .llvm_name = "sve", - .description = "Enable Scalable Vector Extension (SVE) instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sve2 = Feature{ - .name = "sve2", - .llvm_name = "sve2", - .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", - .dependencies = &[_]*const Feature { - &feature_sve, - }, -}; - -pub const feature_sve2Aes = Feature{ - .name = "sve2Aes", - .llvm_name = "sve2-aes", - .description = "Enable AES SVE2 instructions", - .dependencies = &[_]*const Feature { - &feature_sve, - &feature_fpArmv8, - }, -}; - -pub const feature_sve2Bitperm = Feature{ - .name = "sve2Bitperm", - .llvm_name = "sve2-bitperm", - .description = "Enable bit permutation SVE2 instructions", - .dependencies = &[_]*const Feature { - &feature_sve, - }, -}; - -pub const feature_sve2Sha3 = Feature{ - .name = "sve2Sha3", - .llvm_name = "sve2-sha3", - .description = "Enable SHA3 SVE2 instructions", - .dependencies = &[_]*const Feature { - &feature_sve, - &feature_fpArmv8, - }, -}; - -pub const feature_sve2Sm4 = Feature{ - .name = "sve2Sm4", - .llvm_name = "sve2-sm4", - .description = "Enable SM4 SVE2 instructions", - .dependencies = &[_]*const Feature { - &feature_sve, - &feature_fpArmv8, - }, -}; - -pub const feature_slowMisaligned128store = Feature{ - .name = "slowMisaligned128store", - .llvm_name = "slow-misaligned-128store", - .description = "Misaligned 128 bit stores are slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowPaired128 = Feature{ - .name = "slowPaired128", - .llvm_name = "slow-paired-128", - .description = "Paired 128 bit loads and stores are slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowStrqroStore = Feature{ - .name = "slowStrqroStore", - .llvm_name = "slow-strqro-store", - .description = "STR of Q register with register offset is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_specrestrict = Feature{ - .name = "specrestrict", - .llvm_name = "specrestrict", - .description = "Enable architectural speculation restriction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_strictAlign = Feature{ - .name = "strictAlign", - .llvm_name = "strict-align", - .description = "Disallow all unaligned memory access", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tlbRmi = Feature{ - .name = "tlbRmi", - .llvm_name = "tlb-rmi", - .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tracev84 = Feature{ - .name = "tracev84", - .llvm_name = "tracev8.4", - .description = "Enable v8.4-A Trace extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useAa = Feature{ - .name = "useAa", - .llvm_name = "use-aa", - .description = "Use alias analysis during codegen", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tpidrEl1 = Feature{ - .name = "tpidrEl1", - .llvm_name = "tpidr-el1", - .description = "Permit use of TPIDR_EL1 for the TLS base", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tpidrEl2 = Feature{ - .name = "tpidrEl2", - .llvm_name = "tpidr-el2", - .description = "Permit use of TPIDR_EL2 for the TLS base", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tpidrEl3 = Feature{ - .name = "tpidrEl3", - .llvm_name = "tpidr-el3", - .description = "Permit use of TPIDR_EL3 for the TLS base", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useReciprocalSquareRoot = Feature{ - .name = "useReciprocalSquareRoot", - .llvm_name = "use-reciprocal-square-root", - .description = "Use the reciprocal square root approximation", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vh = Feature{ - .name = "vh", - .llvm_name = "vh", - .description = "Enables ARM v8.1 Virtual Host extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_zcm = Feature{ - .name = "zcm", - .llvm_name = "zcm", - .description = "Has zero-cycle register moves", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_zcz = Feature{ - .name = "zcz", - .llvm_name = "zcz", - .description = "Has zero-cycle zeroing instructions", - .dependencies = &[_]*const Feature { - &feature_zczFp, - &feature_zczGp, - }, -}; - -pub const feature_zczFp = Feature{ - .name = "zczFp", - .llvm_name = "zcz-fp", - .description = "Has zero-cycle zeroing instructions for FP registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_zczFpWorkaround = Feature{ - .name = "zczFpWorkaround", - .llvm_name = "zcz-fp-workaround", - .description = "The zero-cycle floating-point zeroing instruction has a bug", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_zczGp = Feature{ - .name = "zczGp", - .llvm_name = "zcz-gp", - .description = "Has zero-cycle zeroing instructions for generic registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_aes, - &feature_am, - &feature_aggressiveFma, - &feature_altnzcv, - &feature_alternateSextloadCvtF32Pattern, - &feature_arithBccFusion, - &feature_arithCbzFusion, - &feature_balanceFpOps, - &feature_bti, - &feature_ccidx, - &feature_ccpp, - &feature_crc, - &feature_ccdp, - &feature_callSavedX8, - &feature_callSavedX9, - &feature_callSavedX10, - &feature_callSavedX11, - &feature_callSavedX12, - &feature_callSavedX13, - &feature_callSavedX14, - &feature_callSavedX15, - &feature_callSavedX18, - &feature_complxnum, - &feature_crypto, - &feature_customCheapAsMove, - &feature_dit, - &feature_disableLatencySchedHeuristic, - &feature_dotprod, - &feature_exynosCheapAsMove, - &feature_fmi, - &feature_fp16fml, - &feature_fpArmv8, - &feature_fptoint, - &feature_force32bitJumpTables, - &feature_fullfp16, - &feature_fuseAes, - &feature_fuseAddress, - &feature_fuseArithLogic, - &feature_fuseCsel, - &feature_fuseCryptoEor, - &feature_fuseLiterals, - &feature_jsconv, - &feature_lor, - &feature_lse, - &feature_lslFast, - &feature_mpam, - &feature_mte, - &feature_neon, - &feature_nv, - &feature_noNegImmediates, - &feature_pa, - &feature_pan, - &feature_panRwv, - &feature_perfmon, - &feature_usePostraScheduler, - &feature_predres, - &feature_predictableSelectExpensive, - &feature_uaops, - &feature_ras, - &feature_rasv8_4, - &feature_rcpc, - &feature_rcpcImmo, - &feature_rdm, - &feature_rand, - &feature_reserveX1, - &feature_reserveX2, - &feature_reserveX3, - &feature_reserveX4, - &feature_reserveX5, - &feature_reserveX6, - &feature_reserveX7, - &feature_reserveX9, - &feature_reserveX10, - &feature_reserveX11, - &feature_reserveX12, - &feature_reserveX13, - &feature_reserveX14, - &feature_reserveX15, - &feature_reserveX18, - &feature_reserveX20, - &feature_reserveX21, - &feature_reserveX22, - &feature_reserveX23, - &feature_reserveX24, - &feature_reserveX25, - &feature_reserveX26, - &feature_reserveX27, - &feature_reserveX28, - &feature_sb, - &feature_sel2, - &feature_sha2, - &feature_sha3, - &feature_sm4, - &feature_spe, - &feature_ssbs, - &feature_sve, - &feature_sve2, - &feature_sve2Aes, - &feature_sve2Bitperm, - &feature_sve2Sha3, - &feature_sve2Sm4, - &feature_slowMisaligned128store, - &feature_slowPaired128, - &feature_slowStrqroStore, - &feature_specrestrict, - &feature_strictAlign, - &feature_tlbRmi, - &feature_tracev84, - &feature_useAa, - &feature_tpidrEl1, - &feature_tpidrEl2, - &feature_tpidrEl3, - &feature_useReciprocalSquareRoot, - &feature_vh, - &feature_zcm, - &feature_zcz, - &feature_zczFp, - &feature_zczFpWorkaround, - &feature_zczGp, -}; - -pub const cpu_appleLatest = Cpu{ - .name = "appleLatest", - .llvm_name = "apple-latest", - .dependencies = &[_]*const Feature { - &feature_arithCbzFusion, - &feature_zczFpWorkaround, - &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, - &feature_zcm, - &feature_zczGp, - &feature_perfmon, - &feature_disableLatencySchedHeuristic, - &feature_fpArmv8, - &feature_zczFp, - &feature_arithBccFusion, - &feature_fuseAes, - }, -}; - -pub const cpu_cortexA35 = Cpu{ - .name = "cortexA35", - .llvm_name = "cortex-a35", - .dependencies = &[_]*const Feature { - &feature_perfmon, - &feature_fpArmv8, - &feature_crc, - }, -}; - -pub const cpu_cortexA53 = Cpu{ - .name = "cortexA53", - .llvm_name = "cortex-a53", - .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_crc, - &feature_perfmon, - &feature_useAa, - &feature_fpArmv8, - &feature_fuseAes, - &feature_balanceFpOps, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_cortexA55 = Cpu{ - .name = "cortexA55", - .llvm_name = "cortex-a55", - .dependencies = &[_]*const Feature { - &feature_ccpp, - &feature_rcpc, - &feature_uaops, - &feature_rdm, - &feature_ras, - &feature_lse, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_vh, - &feature_fuseAes, - &feature_lor, - &feature_dotprod, - &feature_pan, - }, -}; - -pub const cpu_cortexA57 = Cpu{ - .name = "cortexA57", - .llvm_name = "cortex-a57", - .dependencies = &[_]*const Feature { - &feature_fuseLiterals, - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_fuseAes, - &feature_balanceFpOps, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_cortexA72 = Cpu{ - .name = "cortexA72", - .llvm_name = "cortex-a72", - .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_fpArmv8, - &feature_perfmon, - &feature_crc, - }, -}; - -pub const cpu_cortexA73 = Cpu{ - .name = "cortexA73", - .llvm_name = "cortex-a73", - .dependencies = &[_]*const Feature { - &feature_fuseAes, - &feature_fpArmv8, - &feature_perfmon, - &feature_crc, - }, -}; - -pub const cpu_cortexA75 = Cpu{ - .name = "cortexA75", - .llvm_name = "cortex-a75", - .dependencies = &[_]*const Feature { - &feature_ccpp, - &feature_rcpc, - &feature_uaops, - &feature_rdm, - &feature_ras, - &feature_lse, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_vh, - &feature_fuseAes, - &feature_lor, - &feature_dotprod, - &feature_pan, - }, -}; - -pub const cpu_cortexA76 = Cpu{ - .name = "cortexA76", - .llvm_name = "cortex-a76", - .dependencies = &[_]*const Feature { - &feature_ccpp, - &feature_rcpc, - &feature_uaops, - &feature_rdm, - &feature_ras, - &feature_lse, - &feature_crc, - &feature_fpArmv8, - &feature_vh, - &feature_lor, - &feature_ssbs, - &feature_dotprod, - &feature_pan, - }, -}; - -pub const cpu_cortexA76ae = Cpu{ - .name = "cortexA76ae", - .llvm_name = "cortex-a76ae", - .dependencies = &[_]*const Feature { - &feature_ccpp, - &feature_rcpc, - &feature_uaops, - &feature_rdm, - &feature_ras, - &feature_lse, - &feature_crc, - &feature_fpArmv8, - &feature_vh, - &feature_lor, - &feature_ssbs, - &feature_dotprod, - &feature_pan, - }, -}; - -pub const cpu_cyclone = Cpu{ - .name = "cyclone", - .llvm_name = "cyclone", - .dependencies = &[_]*const Feature { - &feature_arithCbzFusion, - &feature_zczFpWorkaround, - &feature_alternateSextloadCvtF32Pattern, - &feature_fuseCryptoEor, - &feature_zcm, - &feature_zczGp, - &feature_perfmon, - &feature_disableLatencySchedHeuristic, - &feature_fpArmv8, - &feature_zczFp, - &feature_arithBccFusion, - &feature_fuseAes, - }, -}; - -pub const cpu_exynosM1 = Cpu{ - .name = "exynosM1", - .llvm_name = "exynos-m1", - .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_crc, - &feature_force32bitJumpTables, - &feature_perfmon, - &feature_slowMisaligned128store, - &feature_useReciprocalSquareRoot, - &feature_fpArmv8, - &feature_zczFp, - &feature_fuseAes, - &feature_slowPaired128, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_exynosM2 = Cpu{ - .name = "exynosM2", - .llvm_name = "exynos-m2", - .dependencies = &[_]*const Feature { - &feature_customCheapAsMove, - &feature_crc, - &feature_force32bitJumpTables, - &feature_perfmon, - &feature_slowMisaligned128store, - &feature_fpArmv8, - &feature_zczFp, - &feature_fuseAes, - &feature_slowPaired128, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_exynosM3 = Cpu{ - .name = "exynosM3", - .llvm_name = "exynos-m3", - .dependencies = &[_]*const Feature { - &feature_fuseLiterals, - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_crc, - &feature_force32bitJumpTables, - &feature_fuseAddress, - &feature_fuseCsel, - &feature_perfmon, - &feature_fpArmv8, - &feature_zczFp, - &feature_fuseAes, - &feature_lslFast, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_exynosM4 = Cpu{ - .name = "exynosM4", - .llvm_name = "exynos-m4", - .dependencies = &[_]*const Feature { - &feature_arithCbzFusion, - &feature_customCheapAsMove, - &feature_lse, - &feature_zczFp, - &feature_lslFast, - &feature_lor, - &feature_fuseLiterals, - &feature_ccpp, - &feature_ras, - &feature_fpArmv8, - &feature_fuseAes, - &feature_pan, - &feature_fuseArithLogic, - &feature_crc, - &feature_force32bitJumpTables, - &feature_fuseAddress, - &feature_fuseCsel, - &feature_arithBccFusion, - &feature_uaops, - &feature_rdm, - &feature_zczGp, - &feature_perfmon, - &feature_vh, - &feature_usePostraScheduler, - &feature_dotprod, - }, -}; - -pub const cpu_exynosM5 = Cpu{ - .name = "exynosM5", - .llvm_name = "exynos-m5", - .dependencies = &[_]*const Feature { - &feature_arithCbzFusion, - &feature_customCheapAsMove, - &feature_lse, - &feature_zczFp, - &feature_lslFast, - &feature_lor, - &feature_fuseLiterals, - &feature_ccpp, - &feature_ras, - &feature_fpArmv8, - &feature_fuseAes, - &feature_pan, - &feature_fuseArithLogic, - &feature_crc, - &feature_force32bitJumpTables, - &feature_fuseAddress, - &feature_fuseCsel, - &feature_arithBccFusion, - &feature_uaops, - &feature_rdm, - &feature_zczGp, - &feature_perfmon, - &feature_vh, - &feature_usePostraScheduler, - &feature_dotprod, - }, -}; - -pub const cpu_falkor = Cpu{ - .name = "falkor", - .llvm_name = "falkor", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_rdm, - &feature_slowStrqroStore, - &feature_zczGp, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_zczFp, - &feature_lslFast, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - &feature_fpArmv8, - &feature_fuseAes, - &feature_neon, - &feature_perfmon, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_kryo = Cpu{ - .name = "kryo", - .llvm_name = "kryo", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_zczGp, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_zczFp, - &feature_lslFast, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_saphira = Cpu{ - .name = "saphira", - .llvm_name = "saphira", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_customCheapAsMove, - &feature_fmi, - &feature_lse, - &feature_zczFp, - &feature_lslFast, - &feature_lor, - &feature_dit, - &feature_pa, - &feature_ccpp, - &feature_sel2, - &feature_ras, - &feature_fpArmv8, - &feature_ccidx, - &feature_pan, - &feature_rcpc, - &feature_crc, - &feature_tracev84, - &feature_mpam, - &feature_am, - &feature_nv, - &feature_tlbRmi, - &feature_uaops, - &feature_rdm, - &feature_zczGp, - &feature_perfmon, - &feature_vh, - &feature_usePostraScheduler, - &feature_dotprod, - &feature_spe, - }, -}; - -pub const cpu_thunderx = Cpu{ - .name = "thunderx", - .llvm_name = "thunderx", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_thunderx2t99 = Cpu{ - .name = "thunderx2t99", - .llvm_name = "thunderx2t99", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_aggressiveFma, - &feature_rdm, - &feature_lse, - &feature_crc, - &feature_fpArmv8, - &feature_vh, - &feature_arithBccFusion, - &feature_lor, - &feature_usePostraScheduler, - &feature_pan, - }, -}; - -pub const cpu_thunderxt81 = Cpu{ - .name = "thunderxt81", - .llvm_name = "thunderxt81", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_thunderxt83 = Cpu{ - .name = "thunderxt83", - .llvm_name = "thunderxt83", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_thunderxt88 = Cpu{ - .name = "thunderxt88", - .llvm_name = "thunderxt88", - .dependencies = &[_]*const Feature { - &feature_predictableSelectExpensive, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_usePostraScheduler, - }, -}; - -pub const cpu_tsv110 = Cpu{ - .name = "tsv110", - .llvm_name = "tsv110", - .dependencies = &[_]*const Feature { - &feature_ccpp, - &feature_customCheapAsMove, - &feature_uaops, - &feature_rdm, - &feature_ras, - &feature_lse, - &feature_crc, - &feature_perfmon, - &feature_fpArmv8, - &feature_vh, - &feature_fuseAes, - &feature_lor, - &feature_usePostraScheduler, - &feature_dotprod, - &feature_pan, - &feature_spe, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_appleLatest, - &cpu_cortexA35, - &cpu_cortexA53, - &cpu_cortexA55, - &cpu_cortexA57, - &cpu_cortexA72, - &cpu_cortexA73, - &cpu_cortexA75, - &cpu_cortexA76, - &cpu_cortexA76ae, - &cpu_cyclone, - &cpu_exynosM1, - &cpu_exynosM2, - &cpu_exynosM3, - &cpu_exynosM4, - &cpu_exynosM5, - &cpu_falkor, - &cpu_generic, - &cpu_kryo, - &cpu_saphira, - &cpu_thunderx, - &cpu_thunderx2t99, - &cpu_thunderxt81, - &cpu_thunderxt83, - &cpu_thunderxt88, - &cpu_tsv110, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + aes, + am, + aggressive_fma, + altnzcv, + alternate_sextload_cvt_f32_pattern, + arith_bcc_fusion, + arith_cbz_fusion, + balance_fp_ops, + bti, + ccidx, + ccpp, + crc, + ccdp, + call_saved_x8, + call_saved_x9, + call_saved_x10, + call_saved_x11, + call_saved_x12, + call_saved_x13, + call_saved_x14, + call_saved_x15, + call_saved_x18, + complxnum, + crypto, + custom_cheap_as_move, + dit, + disable_latency_sched_heuristic, + dotprod, + exynos_cheap_as_move, + fmi, + fp16fml, + fp_armv8, + fptoint, + force_32bit_jump_tables, + fullfp16, + fuse_aes, + fuse_address, + fuse_arith_logic, + fuse_csel, + fuse_crypto_eor, + fuse_literals, + jsconv, + lor, + lse, + lsl_fast, + mpam, + mte, + neon, + nv, + no_neg_immediates, + pa, + pan, + pan_rwv, + perfmon, + use_postra_scheduler, + predres, + predictable_select_expensive, + uaops, + ras, + rasv8_4, + rcpc, + rcpc_immo, + rdm, + rand, + reserve_x1, + reserve_x2, + reserve_x3, + reserve_x4, + reserve_x5, + reserve_x6, + reserve_x7, + reserve_x9, + reserve_x10, + reserve_x11, + reserve_x12, + reserve_x13, + reserve_x14, + reserve_x15, + reserve_x18, + reserve_x20, + reserve_x21, + reserve_x22, + reserve_x23, + reserve_x24, + reserve_x25, + reserve_x26, + reserve_x27, + reserve_x28, + sb, + sel2, + sha2, + sha3, + sm4, + spe, + ssbs, + sve, + sve2, + sve2_aes, + sve2_bitperm, + sve2_sha3, + sve2_sm4, + slow_misaligned_128store, + slow_paired_128, + slow_strqro_store, + specrestrict, + strict_align, + tlb_rmi, + tracev84, + use_aa, + tpidr_el1, + tpidr_el2, + tpidr_el3, + use_reciprocal_square_root, + vh, + zcm, + zcz, + zcz_fp, + zcz_fp_workaround, + zcz_gp, +}; + +pub fn featureSet(features: []const Feature) Cpu.Feature.Set { + var x: Cpu.Feature.Set = 0; + for (features) |feature| { + x |= 1 << @enumToInt(feature); + } + return x; +} + +pub fn featureSetHas(set: Feature.Set, feature: Feature) bool { + return (set & (1 << @enumToInt(feature))) != 0; +} + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.aes)] = .{ + .index = @enumToInt(Feature.aes), + .name = @tagName(Feature.aes), + .llvm_name = "aes", + .description = "Enable AES support", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.am)] = .{ + .index = @enumToInt(Feature.am), + .name = @tagName(Feature.am), + .llvm_name = "am", + .description = "Enable v8.4-A Activity Monitors extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.aggressive_fma)] = .{ + .index = @enumToInt(Feature.aggressive_fma), + .name = @tagName(Feature.aggressive_fma), + .llvm_name = "aggressive-fma", + .description = "Enable Aggressive FMA for floating-point.", + .dependencies = 0, + }; + result[@enumToInt(Feature.altnzcv)] = .{ + .index = @enumToInt(Feature.altnzcv), + .name = @tagName(Feature.altnzcv), + .llvm_name = "altnzcv", + .description = "Enable alternative NZCV format for floating point comparisons", + .dependencies = 0, + }; + result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{ + .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern), + .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern), + .llvm_name = "alternate-sextload-cvt-f32-pattern", + .description = "Use alternative pattern for sextload convert to f32", + .dependencies = 0, + }; + result[@enumToInt(Feature.arith_bcc_fusion)] = .{ + .index = @enumToInt(Feature.arith_bcc_fusion), + .name = @tagName(Feature.arith_bcc_fusion), + .llvm_name = "arith-bcc-fusion", + .description = "CPU fuses arithmetic+bcc operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.arith_cbz_fusion)] = .{ + .index = @enumToInt(Feature.arith_cbz_fusion), + .name = @tagName(Feature.arith_cbz_fusion), + .llvm_name = "arith-cbz-fusion", + .description = "CPU fuses arithmetic + cbz/cbnz operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.balance_fp_ops)] = .{ + .index = @enumToInt(Feature.balance_fp_ops), + .name = @tagName(Feature.balance_fp_ops), + .llvm_name = "balance-fp-ops", + .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", + .dependencies = 0, + }; + result[@enumToInt(Feature.bti)] = .{ + .index = @enumToInt(Feature.bti), + .name = @tagName(Feature.bti), + .llvm_name = "bti", + .description = "Enable Branch Target Identification", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccidx)] = .{ + .index = @enumToInt(Feature.ccidx), + .name = @tagName(Feature.ccidx), + .llvm_name = "ccidx", + .description = "Enable v8.3-A Extend of the CCSIDR number of sets", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccpp)] = .{ + .index = @enumToInt(Feature.ccpp), + .name = @tagName(Feature.ccpp), + .llvm_name = "ccpp", + .description = "Enable v8.2 data Cache Clean to Point of Persistence", + .dependencies = 0, + }; + result[@enumToInt(Feature.crc)] = .{ + .index = @enumToInt(Feature.crc), + .name = @tagName(Feature.crc), + .llvm_name = "crc", + .description = "Enable ARMv8 CRC-32 checksum instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccdp)] = .{ + .index = @enumToInt(Feature.ccdp), + .name = @tagName(Feature.ccdp), + .llvm_name = "ccdp", + .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x8)] = .{ + .index = @enumToInt(Feature.call_saved_x8), + .name = @tagName(Feature.call_saved_x8), + .llvm_name = "call-saved-x8", + .description = "Make X8 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x9)] = .{ + .index = @enumToInt(Feature.call_saved_x9), + .name = @tagName(Feature.call_saved_x9), + .llvm_name = "call-saved-x9", + .description = "Make X9 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x10)] = .{ + .index = @enumToInt(Feature.call_saved_x10), + .name = @tagName(Feature.call_saved_x10), + .llvm_name = "call-saved-x10", + .description = "Make X10 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x11)] = .{ + .index = @enumToInt(Feature.call_saved_x11), + .name = @tagName(Feature.call_saved_x11), + .llvm_name = "call-saved-x11", + .description = "Make X11 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x12)] = .{ + .index = @enumToInt(Feature.call_saved_x12), + .name = @tagName(Feature.call_saved_x12), + .llvm_name = "call-saved-x12", + .description = "Make X12 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x13)] = .{ + .index = @enumToInt(Feature.call_saved_x13), + .name = @tagName(Feature.call_saved_x13), + .llvm_name = "call-saved-x13", + .description = "Make X13 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x14)] = .{ + .index = @enumToInt(Feature.call_saved_x14), + .name = @tagName(Feature.call_saved_x14), + .llvm_name = "call-saved-x14", + .description = "Make X14 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x15)] = .{ + .index = @enumToInt(Feature.call_saved_x15), + .name = @tagName(Feature.call_saved_x15), + .llvm_name = "call-saved-x15", + .description = "Make X15 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x18)] = .{ + .index = @enumToInt(Feature.call_saved_x18), + .name = @tagName(Feature.call_saved_x18), + .llvm_name = "call-saved-x18", + .description = "Make X18 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.complxnum)] = .{ + .index = @enumToInt(Feature.complxnum), + .name = @tagName(Feature.complxnum), + .llvm_name = "complxnum", + .description = "Enable v8.3-A Floating-point complex number support", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.crypto)] = .{ + .index = @enumToInt(Feature.crypto), + .name = @tagName(Feature.crypto), + .llvm_name = "crypto", + .description = "Enable cryptographic instructions", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.custom_cheap_as_move)] = .{ + .index = @enumToInt(Feature.custom_cheap_as_move), + .name = @tagName(Feature.custom_cheap_as_move), + .llvm_name = "custom-cheap-as-move", + .description = "Use custom handling of cheap instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dit)] = .{ + .index = @enumToInt(Feature.dit), + .name = @tagName(Feature.dit), + .llvm_name = "dit", + .description = "Enable v8.4-A Data Independent Timing instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ + .index = @enumToInt(Feature.disable_latency_sched_heuristic), + .name = @tagName(Feature.disable_latency_sched_heuristic), + .llvm_name = "disable-latency-sched-heuristic", + .description = "Disable latency scheduling heuristic", + .dependencies = 0, + }; + result[@enumToInt(Feature.dotprod)] = .{ + .index = @enumToInt(Feature.dotprod), + .name = @tagName(Feature.dotprod), + .llvm_name = "dotprod", + .description = "Enable dot product support", + .dependencies = 0, + }; + result[@enumToInt(Feature.exynos_cheap_as_move)] = .{ + .index = @enumToInt(Feature.exynos_cheap_as_move), + .name = @tagName(Feature.exynos_cheap_as_move), + .llvm_name = "exynos-cheap-as-move", + .description = "Use Exynos specific handling of cheap instructions", + .dependencies = featureSet(&[_]Feature{ + .custom_cheap_as_move, + }), + }; + result[@enumToInt(Feature.fmi)] = .{ + .index = @enumToInt(Feature.fmi), + .name = @tagName(Feature.fmi), + .llvm_name = "fmi", + .description = "Enable v8.4-A Flag Manipulation Instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .index = @enumToInt(Feature.fp16fml), + .name = @tagName(Feature.fp16fml), + .llvm_name = "fp16fml", + .description = "Enable FP16 FML instructions", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.fp_armv8)] = .{ + .index = @enumToInt(Feature.fp_armv8), + .name = @tagName(Feature.fp_armv8), + .llvm_name = "fp-armv8", + .description = "Enable ARMv8 FP", + .dependencies = 0, + }; + result[@enumToInt(Feature.fptoint)] = .{ + .index = @enumToInt(Feature.fptoint), + .name = @tagName(Feature.fptoint), + .llvm_name = "fptoint", + .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", + .dependencies = 0, + }; + result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ + .index = @enumToInt(Feature.force_32bit_jump_tables), + .name = @tagName(Feature.force_32bit_jump_tables), + .llvm_name = "force-32bit-jump-tables", + .description = "Force jump table entries to be 32-bits wide except at MinSize", + .dependencies = 0, + }; + result[@enumToInt(Feature.fullfp16)] = .{ + .index = @enumToInt(Feature.fullfp16), + .name = @tagName(Feature.fullfp16), + .llvm_name = "fullfp16", + .description = "Full FP16", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.fuse_aes)] = .{ + .index = @enumToInt(Feature.fuse_aes), + .name = @tagName(Feature.fuse_aes), + .llvm_name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_address)] = .{ + .index = @enumToInt(Feature.fuse_address), + .name = @tagName(Feature.fuse_address), + .llvm_name = "fuse-address", + .description = "CPU fuses address generation and memory operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_arith_logic)] = .{ + .index = @enumToInt(Feature.fuse_arith_logic), + .name = @tagName(Feature.fuse_arith_logic), + .llvm_name = "fuse-arith-logic", + .description = "CPU fuses arithmetic and logic operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_csel)] = .{ + .index = @enumToInt(Feature.fuse_csel), + .name = @tagName(Feature.fuse_csel), + .llvm_name = "fuse-csel", + .description = "CPU fuses conditional select operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_crypto_eor)] = .{ + .index = @enumToInt(Feature.fuse_crypto_eor), + .name = @tagName(Feature.fuse_crypto_eor), + .llvm_name = "fuse-crypto-eor", + .description = "CPU fuses AES/PMULL and EOR operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_literals)] = .{ + .index = @enumToInt(Feature.fuse_literals), + .name = @tagName(Feature.fuse_literals), + .llvm_name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.jsconv)] = .{ + .index = @enumToInt(Feature.jsconv), + .name = @tagName(Feature.jsconv), + .llvm_name = "jsconv", + .description = "Enable v8.3-A JavaScript FP conversion enchancement", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.lor)] = .{ + .index = @enumToInt(Feature.lor), + .name = @tagName(Feature.lor), + .llvm_name = "lor", + .description = "Enables ARM v8.1 Limited Ordering Regions extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.lse)] = .{ + .index = @enumToInt(Feature.lse), + .name = @tagName(Feature.lse), + .llvm_name = "lse", + .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.lsl_fast)] = .{ + .index = @enumToInt(Feature.lsl_fast), + .name = @tagName(Feature.lsl_fast), + .llvm_name = "lsl-fast", + .description = "CPU has a fastpath logical shift of up to 3 places", + .dependencies = 0, + }; + result[@enumToInt(Feature.mpam)] = .{ + .index = @enumToInt(Feature.mpam), + .name = @tagName(Feature.mpam), + .llvm_name = "mpam", + .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.mte)] = .{ + .index = @enumToInt(Feature.mte), + .name = @tagName(Feature.mte), + .llvm_name = "mte", + .description = "Enable Memory Tagging Extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.neon)] = .{ + .index = @enumToInt(Feature.neon), + .name = @tagName(Feature.neon), + .llvm_name = "neon", + .description = "Enable Advanced SIMD instructions", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.nv)] = .{ + .index = @enumToInt(Feature.nv), + .name = @tagName(Feature.nv), + .llvm_name = "nv", + .description = "Enable v8.4-A Nested Virtualization Enchancement", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_neg_immediates)] = .{ + .index = @enumToInt(Feature.no_neg_immediates), + .name = @tagName(Feature.no_neg_immediates), + .llvm_name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .dependencies = 0, + }; + result[@enumToInt(Feature.pa)] = .{ + .index = @enumToInt(Feature.pa), + .name = @tagName(Feature.pa), + .llvm_name = "pa", + .description = "Enable v8.3-A Pointer Authentication enchancement", + .dependencies = 0, + }; + result[@enumToInt(Feature.pan)] = .{ + .index = @enumToInt(Feature.pan), + .name = @tagName(Feature.pan), + .llvm_name = "pan", + .description = "Enables ARM v8.1 Privileged Access-Never extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.pan_rwv)] = .{ + .index = @enumToInt(Feature.pan_rwv), + .name = @tagName(Feature.pan_rwv), + .llvm_name = "pan-rwv", + .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", + .dependencies = featureSet(&[_]Feature{ + .pan, + }), + }; + result[@enumToInt(Feature.perfmon)] = .{ + .index = @enumToInt(Feature.perfmon), + .name = @tagName(Feature.perfmon), + .llvm_name = "perfmon", + .description = "Enable ARMv8 PMUv3 Performance Monitors extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_postra_scheduler)] = .{ + .index = @enumToInt(Feature.use_postra_scheduler), + .name = @tagName(Feature.use_postra_scheduler), + .llvm_name = "use-postra-scheduler", + .description = "Schedule again after register allocation", + .dependencies = 0, + }; + result[@enumToInt(Feature.predres)] = .{ + .index = @enumToInt(Feature.predres), + .name = @tagName(Feature.predres), + .llvm_name = "predres", + .description = "Enable v8.5a execution and data prediction invalidation instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.predictable_select_expensive)] = .{ + .index = @enumToInt(Feature.predictable_select_expensive), + .name = @tagName(Feature.predictable_select_expensive), + .llvm_name = "predictable-select-expensive", + .description = "Prefer likely predicted branches over selects", + .dependencies = 0, + }; + result[@enumToInt(Feature.uaops)] = .{ + .index = @enumToInt(Feature.uaops), + .name = @tagName(Feature.uaops), + .llvm_name = "uaops", + .description = "Enable v8.2 UAO PState", + .dependencies = 0, + }; + result[@enumToInt(Feature.ras)] = .{ + .index = @enumToInt(Feature.ras), + .name = @tagName(Feature.ras), + .llvm_name = "ras", + .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.rasv8_4)] = .{ + .index = @enumToInt(Feature.rasv8_4), + .name = @tagName(Feature.rasv8_4), + .llvm_name = "rasv8_4", + .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", + .dependencies = featureSet(&[_]Feature{ + .ras, + }), + }; + result[@enumToInt(Feature.rcpc)] = .{ + .index = @enumToInt(Feature.rcpc), + .name = @tagName(Feature.rcpc), + .llvm_name = "rcpc", + .description = "Enable support for RCPC extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.rcpc_immo)] = .{ + .index = @enumToInt(Feature.rcpc_immo), + .name = @tagName(Feature.rcpc_immo), + .llvm_name = "rcpc-immo", + .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", + .dependencies = featureSet(&[_]Feature{ + .rcpc, + }), + }; + result[@enumToInt(Feature.rdm)] = .{ + .index = @enumToInt(Feature.rdm), + .name = @tagName(Feature.rdm), + .llvm_name = "rdm", + .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.rand)] = .{ + .index = @enumToInt(Feature.rand), + .name = @tagName(Feature.rand), + .llvm_name = "rand", + .description = "Enable Random Number generation instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x1)] = .{ + .index = @enumToInt(Feature.reserve_x1), + .name = @tagName(Feature.reserve_x1), + .llvm_name = "reserve-x1", + .description = "Reserve X1, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x2)] = .{ + .index = @enumToInt(Feature.reserve_x2), + .name = @tagName(Feature.reserve_x2), + .llvm_name = "reserve-x2", + .description = "Reserve X2, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x3)] = .{ + .index = @enumToInt(Feature.reserve_x3), + .name = @tagName(Feature.reserve_x3), + .llvm_name = "reserve-x3", + .description = "Reserve X3, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x4)] = .{ + .index = @enumToInt(Feature.reserve_x4), + .name = @tagName(Feature.reserve_x4), + .llvm_name = "reserve-x4", + .description = "Reserve X4, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x5)] = .{ + .index = @enumToInt(Feature.reserve_x5), + .name = @tagName(Feature.reserve_x5), + .llvm_name = "reserve-x5", + .description = "Reserve X5, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x6)] = .{ + .index = @enumToInt(Feature.reserve_x6), + .name = @tagName(Feature.reserve_x6), + .llvm_name = "reserve-x6", + .description = "Reserve X6, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x7)] = .{ + .index = @enumToInt(Feature.reserve_x7), + .name = @tagName(Feature.reserve_x7), + .llvm_name = "reserve-x7", + .description = "Reserve X7, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x9)] = .{ + .index = @enumToInt(Feature.reserve_x9), + .name = @tagName(Feature.reserve_x9), + .llvm_name = "reserve-x9", + .description = "Reserve X9, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x10)] = .{ + .index = @enumToInt(Feature.reserve_x10), + .name = @tagName(Feature.reserve_x10), + .llvm_name = "reserve-x10", + .description = "Reserve X10, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x11)] = .{ + .index = @enumToInt(Feature.reserve_x11), + .name = @tagName(Feature.reserve_x11), + .llvm_name = "reserve-x11", + .description = "Reserve X11, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x12)] = .{ + .index = @enumToInt(Feature.reserve_x12), + .name = @tagName(Feature.reserve_x12), + .llvm_name = "reserve-x12", + .description = "Reserve X12, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x13)] = .{ + .index = @enumToInt(Feature.reserve_x13), + .name = @tagName(Feature.reserve_x13), + .llvm_name = "reserve-x13", + .description = "Reserve X13, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x14)] = .{ + .index = @enumToInt(Feature.reserve_x14), + .name = @tagName(Feature.reserve_x14), + .llvm_name = "reserve-x14", + .description = "Reserve X14, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x15)] = .{ + .index = @enumToInt(Feature.reserve_x15), + .name = @tagName(Feature.reserve_x15), + .llvm_name = "reserve-x15", + .description = "Reserve X15, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x18)] = .{ + .index = @enumToInt(Feature.reserve_x18), + .name = @tagName(Feature.reserve_x18), + .llvm_name = "reserve-x18", + .description = "Reserve X18, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x20)] = .{ + .index = @enumToInt(Feature.reserve_x20), + .name = @tagName(Feature.reserve_x20), + .llvm_name = "reserve-x20", + .description = "Reserve X20, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x21)] = .{ + .index = @enumToInt(Feature.reserve_x21), + .name = @tagName(Feature.reserve_x21), + .llvm_name = "reserve-x21", + .description = "Reserve X21, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x22)] = .{ + .index = @enumToInt(Feature.reserve_x22), + .name = @tagName(Feature.reserve_x22), + .llvm_name = "reserve-x22", + .description = "Reserve X22, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x23)] = .{ + .index = @enumToInt(Feature.reserve_x23), + .name = @tagName(Feature.reserve_x23), + .llvm_name = "reserve-x23", + .description = "Reserve X23, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x24)] = .{ + .index = @enumToInt(Feature.reserve_x24), + .name = @tagName(Feature.reserve_x24), + .llvm_name = "reserve-x24", + .description = "Reserve X24, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x25)] = .{ + .index = @enumToInt(Feature.reserve_x25), + .name = @tagName(Feature.reserve_x25), + .llvm_name = "reserve-x25", + .description = "Reserve X25, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x26)] = .{ + .index = @enumToInt(Feature.reserve_x26), + .name = @tagName(Feature.reserve_x26), + .llvm_name = "reserve-x26", + .description = "Reserve X26, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x27)] = .{ + .index = @enumToInt(Feature.reserve_x27), + .name = @tagName(Feature.reserve_x27), + .llvm_name = "reserve-x27", + .description = "Reserve X27, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x28)] = .{ + .index = @enumToInt(Feature.reserve_x28), + .name = @tagName(Feature.reserve_x28), + .llvm_name = "reserve-x28", + .description = "Reserve X28, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.sb)] = .{ + .index = @enumToInt(Feature.sb), + .name = @tagName(Feature.sb), + .llvm_name = "sb", + .description = "Enable v8.5 Speculation Barrier", + .dependencies = 0, + }; + result[@enumToInt(Feature.sel2)] = .{ + .index = @enumToInt(Feature.sel2), + .name = @tagName(Feature.sel2), + .llvm_name = "sel2", + .description = "Enable v8.4-A Secure Exception Level 2 extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sha2)] = .{ + .index = @enumToInt(Feature.sha2), + .name = @tagName(Feature.sha2), + .llvm_name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.sha3)] = .{ + .index = @enumToInt(Feature.sha3), + .name = @tagName(Feature.sha3), + .llvm_name = "sha3", + .description = "Enable SHA512 and SHA3 support", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.sm4)] = .{ + .index = @enumToInt(Feature.sm4), + .name = @tagName(Feature.sm4), + .llvm_name = "sm4", + .description = "Enable SM3 and SM4 support", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + }), + }; + result[@enumToInt(Feature.spe)] = .{ + .index = @enumToInt(Feature.spe), + .name = @tagName(Feature.spe), + .llvm_name = "spe", + .description = "Enable Statistical Profiling extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.ssbs)] = .{ + .index = @enumToInt(Feature.ssbs), + .name = @tagName(Feature.ssbs), + .llvm_name = "ssbs", + .description = "Enable Speculative Store Bypass Safe bit", + .dependencies = 0, + }; + result[@enumToInt(Feature.sve)] = .{ + .index = @enumToInt(Feature.sve), + .name = @tagName(Feature.sve), + .llvm_name = "sve", + .description = "Enable Scalable Vector Extension (SVE) instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sve2)] = .{ + .index = @enumToInt(Feature.sve2), + .name = @tagName(Feature.sve2), + .llvm_name = "sve2", + .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", + .dependencies = featureSet(&[_]Feature{ + .sve, + }), + }; + result[@enumToInt(Feature.sve2_aes)] = .{ + .index = @enumToInt(Feature.sve2_aes), + .name = @tagName(Feature.sve2_aes), + .llvm_name = "sve2-aes", + .description = "Enable AES SVE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sve, + .fp_armv8, + }), + }; + result[@enumToInt(Feature.sve2_bitperm)] = .{ + .index = @enumToInt(Feature.sve2_bitperm), + .name = @tagName(Feature.sve2_bitperm), + .llvm_name = "sve2-bitperm", + .description = "Enable bit permutation SVE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sve, + }), + }; + result[@enumToInt(Feature.sve2_sha3)] = .{ + .index = @enumToInt(Feature.sve2_sha3), + .name = @tagName(Feature.sve2_sha3), + .llvm_name = "sve2-sha3", + .description = "Enable SHA3 SVE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sve, + .fp_armv8, + }), + }; + result[@enumToInt(Feature.sve2_sm4)] = .{ + .index = @enumToInt(Feature.sve2_sm4), + .name = @tagName(Feature.sve2_sm4), + .llvm_name = "sve2-sm4", + .description = "Enable SM4 SVE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sve, + .fp_armv8, + }), + }; + result[@enumToInt(Feature.slow_misaligned_128store)] = .{ + .index = @enumToInt(Feature.slow_misaligned_128store), + .name = @tagName(Feature.slow_misaligned_128store), + .llvm_name = "slow-misaligned-128store", + .description = "Misaligned 128 bit stores are slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_paired_128)] = .{ + .index = @enumToInt(Feature.slow_paired_128), + .name = @tagName(Feature.slow_paired_128), + .llvm_name = "slow-paired-128", + .description = "Paired 128 bit loads and stores are slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_strqro_store)] = .{ + .index = @enumToInt(Feature.slow_strqro_store), + .name = @tagName(Feature.slow_strqro_store), + .llvm_name = "slow-strqro-store", + .description = "STR of Q register with register offset is slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.specrestrict)] = .{ + .index = @enumToInt(Feature.specrestrict), + .name = @tagName(Feature.specrestrict), + .llvm_name = "specrestrict", + .description = "Enable architectural speculation restriction", + .dependencies = 0, + }; + result[@enumToInt(Feature.strict_align)] = .{ + .index = @enumToInt(Feature.strict_align), + .name = @tagName(Feature.strict_align), + .llvm_name = "strict-align", + .description = "Disallow all unaligned memory access", + .dependencies = 0, + }; + result[@enumToInt(Feature.tlb_rmi)] = .{ + .index = @enumToInt(Feature.tlb_rmi), + .name = @tagName(Feature.tlb_rmi), + .llvm_name = "tlb-rmi", + .description = "Enable v8.4-A TLB Range and Maintenance Instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.tracev84)] = .{ + .index = @enumToInt(Feature.tracev84), + .name = @tagName(Feature.tracev84), + .llvm_name = "tracev8.4", + .description = "Enable v8.4-A Trace extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_aa)] = .{ + .index = @enumToInt(Feature.use_aa), + .name = @tagName(Feature.use_aa), + .llvm_name = "use-aa", + .description = "Use alias analysis during codegen", + .dependencies = 0, + }; + result[@enumToInt(Feature.tpidr_el1)] = .{ + .index = @enumToInt(Feature.tpidr_el1), + .name = @tagName(Feature.tpidr_el1), + .llvm_name = "tpidr-el1", + .description = "Permit use of TPIDR_EL1 for the TLS base", + .dependencies = 0, + }; + result[@enumToInt(Feature.tpidr_el2)] = .{ + .index = @enumToInt(Feature.tpidr_el2), + .name = @tagName(Feature.tpidr_el2), + .llvm_name = "tpidr-el2", + .description = "Permit use of TPIDR_EL2 for the TLS base", + .dependencies = 0, + }; + result[@enumToInt(Feature.tpidr_el3)] = .{ + .index = @enumToInt(Feature.tpidr_el3), + .name = @tagName(Feature.tpidr_el3), + .llvm_name = "tpidr-el3", + .description = "Permit use of TPIDR_EL3 for the TLS base", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_reciprocal_square_root)] = .{ + .index = @enumToInt(Feature.use_reciprocal_square_root), + .name = @tagName(Feature.use_reciprocal_square_root), + .llvm_name = "use-reciprocal-square-root", + .description = "Use the reciprocal square root approximation", + .dependencies = 0, + }; + result[@enumToInt(Feature.vh)] = .{ + .index = @enumToInt(Feature.vh), + .name = @tagName(Feature.vh), + .llvm_name = "vh", + .description = "Enables ARM v8.1 Virtual Host extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.zcm)] = .{ + .index = @enumToInt(Feature.zcm), + .name = @tagName(Feature.zcm), + .llvm_name = "zcm", + .description = "Has zero-cycle register moves", + .dependencies = 0, + }; + result[@enumToInt(Feature.zcz)] = .{ + .index = @enumToInt(Feature.zcz), + .name = @tagName(Feature.zcz), + .llvm_name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .dependencies = featureSet(&[_]Feature{ + .zcz_fp, + .zcz_gp, + }), + }; + result[@enumToInt(Feature.zcz_fp)] = .{ + .index = @enumToInt(Feature.zcz_fp), + .name = @tagName(Feature.zcz_fp), + .llvm_name = "zcz-fp", + .description = "Has zero-cycle zeroing instructions for FP registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.zcz_fp_workaround)] = .{ + .index = @enumToInt(Feature.zcz_fp_workaround), + .name = @tagName(Feature.zcz_fp_workaround), + .llvm_name = "zcz-fp-workaround", + .description = "The zero-cycle floating-point zeroing instruction has a bug", + .dependencies = 0, + }; + result[@enumToInt(Feature.zcz_gp)] = .{ + .index = @enumToInt(Feature.zcz_gp), + .name = @tagName(Feature.zcz_gp), + .llvm_name = "zcz-gp", + .description = "Has zero-cycle zeroing instructions for generic registers", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const apple_latest = Cpu{ + .name = "apple_latest", + .llvm_name = "apple-latest", + .features = featureSet(&[_]Feature{ + .arith_cbz_fusion, + .zcz_fp_workaround, + .alternate_sextload_cvt_f32_pattern, + .fuse_crypto_eor, + .zcm, + .zcz_gp, + .perfmon, + .disable_latency_sched_heuristic, + .fp_armv8, + .zcz_fp, + .arith_bcc_fusion, + .fuse_aes, + }), + }; + + pub const cortex_a35 = Cpu{ + .name = "cortex_a35", + .llvm_name = "cortex-a35", + .features = featureSet(&[_]Feature{ + .perfmon, + .fp_armv8, + .crc, + }), + }; + + pub const cortex_a53 = Cpu{ + .name = "cortex_a53", + .llvm_name = "cortex-a53", + .features = featureSet(&[_]Feature{ + .custom_cheap_as_move, + .crc, + .perfmon, + .use_aa, + .fp_armv8, + .fuse_aes, + .balance_fp_ops, + .use_postra_scheduler, + }), + }; + + pub const cortex_a55 = Cpu{ + .name = "cortex_a55", + .llvm_name = "cortex-a55", + .features = featureSet(&[_]Feature{ + .ccpp, + .rcpc, + .uaops, + .rdm, + .ras, + .lse, + .crc, + .perfmon, + .fp_armv8, + .vh, + .fuse_aes, + .lor, + .dotprod, + .pan, + }), + }; + + pub const cortex_a57 = Cpu{ + .name = "cortex_a57", + .llvm_name = "cortex-a57", + .features = featureSet(&[_]Feature{ + .fuse_literals, + .predictable_select_expensive, + .custom_cheap_as_move, + .crc, + .perfmon, + .fp_armv8, + .fuse_aes, + .balance_fp_ops, + .use_postra_scheduler, + }), + }; + + pub const cortex_a72 = Cpu{ + .name = "cortex_a72", + .llvm_name = "cortex-a72", + .features = featureSet(&[_]Feature{ + .fuse_aes, + .fp_armv8, + .perfmon, + .crc, + }), + }; + + pub const cortex_a73 = Cpu{ + .name = "cortex_a73", + .llvm_name = "cortex-a73", + .features = featureSet(&[_]Feature{ + .fuse_aes, + .fp_armv8, + .perfmon, + .crc, + }), + }; + + pub const cortex_a75 = Cpu{ + .name = "cortex_a75", + .llvm_name = "cortex-a75", + .features = featureSet(&[_]Feature{ + .ccpp, + .rcpc, + .uaops, + .rdm, + .ras, + .lse, + .crc, + .perfmon, + .fp_armv8, + .vh, + .fuse_aes, + .lor, + .dotprod, + .pan, + }), + }; + + pub const cortex_a76 = Cpu{ + .name = "cortex_a76", + .llvm_name = "cortex-a76", + .features = featureSet(&[_]Feature{ + .ccpp, + .rcpc, + .uaops, + .rdm, + .ras, + .lse, + .crc, + .fp_armv8, + .vh, + .lor, + .ssbs, + .dotprod, + .pan, + }), + }; + + pub const cortex_a76ae = Cpu{ + .name = "cortex_a76ae", + .llvm_name = "cortex-a76ae", + .features = featureSet(&[_]Feature{ + .ccpp, + .rcpc, + .uaops, + .rdm, + .ras, + .lse, + .crc, + .fp_armv8, + .vh, + .lor, + .ssbs, + .dotprod, + .pan, + }), + }; + + pub const cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .features = featureSet(&[_]Feature{ + .arith_cbz_fusion, + .zcz_fp_workaround, + .alternate_sextload_cvt_f32_pattern, + .fuse_crypto_eor, + .zcm, + .zcz_gp, + .perfmon, + .disable_latency_sched_heuristic, + .fp_armv8, + .zcz_fp, + .arith_bcc_fusion, + .fuse_aes, + }), + }; + + pub const exynos_m1 = Cpu{ + .name = "exynos_m1", + .llvm_name = "exynos-m1", + .features = featureSet(&[_]Feature{ + .custom_cheap_as_move, + .crc, + .force_32bit_jump_tables, + .perfmon, + .slow_misaligned_128store, + .use_reciprocal_square_root, + .fp_armv8, + .zcz_fp, + .fuse_aes, + .slow_paired_128, + .use_postra_scheduler, + }), + }; + + pub const exynos_m2 = Cpu{ + .name = "exynos_m2", + .llvm_name = "exynos-m2", + .features = featureSet(&[_]Feature{ + .custom_cheap_as_move, + .crc, + .force_32bit_jump_tables, + .perfmon, + .slow_misaligned_128store, + .fp_armv8, + .zcz_fp, + .fuse_aes, + .slow_paired_128, + .use_postra_scheduler, + }), + }; + + pub const exynos_m3 = Cpu{ + .name = "exynos_m3", + .llvm_name = "exynos-m3", + .features = featureSet(&[_]Feature{ + .fuse_literals, + .predictable_select_expensive, + .custom_cheap_as_move, + .crc, + .force_32bit_jump_tables, + .fuse_address, + .fuse_csel, + .perfmon, + .fp_armv8, + .zcz_fp, + .fuse_aes, + .lsl_fast, + .use_postra_scheduler, + }), + }; + + pub const exynos_m4 = Cpu{ + .name = "exynos_m4", + .llvm_name = "exynos-m4", + .features = featureSet(&[_]Feature{ + .arith_cbz_fusion, + .custom_cheap_as_move, + .lse, + .zcz_fp, + .lsl_fast, + .lor, + .fuse_literals, + .ccpp, + .ras, + .fp_armv8, + .fuse_aes, + .pan, + .fuse_arith_logic, + .crc, + .force_32bit_jump_tables, + .fuse_address, + .fuse_csel, + .arith_bcc_fusion, + .uaops, + .rdm, + .zcz_gp, + .perfmon, + .vh, + .use_postra_scheduler, + .dotprod, + }), + }; + + pub const exynos_m5 = Cpu{ + .name = "exynos_m5", + .llvm_name = "exynos-m5", + .features = featureSet(&[_]Feature{ + .arith_cbz_fusion, + .custom_cheap_as_move, + .lse, + .zcz_fp, + .lsl_fast, + .lor, + .fuse_literals, + .ccpp, + .ras, + .fp_armv8, + .fuse_aes, + .pan, + .fuse_arith_logic, + .crc, + .force_32bit_jump_tables, + .fuse_address, + .fuse_csel, + .arith_bcc_fusion, + .uaops, + .rdm, + .zcz_gp, + .perfmon, + .vh, + .use_postra_scheduler, + .dotprod, + }), + }; + + pub const falkor = Cpu{ + .name = "falkor", + .llvm_name = "falkor", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .custom_cheap_as_move, + .rdm, + .slow_strqro_store, + .zcz_gp, + .crc, + .perfmon, + .fp_armv8, + .zcz_fp, + .lsl_fast, + .use_postra_scheduler, + }), + }; + + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + .use_postra_scheduler, + }), + }; + + pub const kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .custom_cheap_as_move, + .zcz_gp, + .crc, + .perfmon, + .fp_armv8, + .zcz_fp, + .lsl_fast, + .use_postra_scheduler, + }), + }; + + pub const saphira = Cpu{ + .name = "saphira", + .llvm_name = "saphira", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .custom_cheap_as_move, + .fmi, + .lse, + .zcz_fp, + .lsl_fast, + .lor, + .dit, + .pa, + .ccpp, + .sel2, + .ras, + .fp_armv8, + .ccidx, + .pan, + .rcpc, + .crc, + .tracev84, + .mpam, + .am, + .nv, + .tlb_rmi, + .uaops, + .rdm, + .zcz_gp, + .perfmon, + .vh, + .use_postra_scheduler, + .dotprod, + .spe, + }), + }; + + pub const thunderx = Cpu{ + .name = "thunderx", + .llvm_name = "thunderx", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .crc, + .perfmon, + .fp_armv8, + .use_postra_scheduler, + }), + }; + + pub const thunderx2t99 = Cpu{ + .name = "thunderx2t99", + .llvm_name = "thunderx2t99", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .aggressive_fma, + .rdm, + .lse, + .crc, + .fp_armv8, + .vh, + .arith_bcc_fusion, + .lor, + .use_postra_scheduler, + .pan, + }), + }; + + pub const thunderxt81 = Cpu{ + .name = "thunderxt81", + .llvm_name = "thunderxt81", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .crc, + .perfmon, + .fp_armv8, + .use_postra_scheduler, + }), + }; + + pub const thunderxt83 = Cpu{ + .name = "thunderxt83", + .llvm_name = "thunderxt83", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .crc, + .perfmon, + .fp_armv8, + .use_postra_scheduler, + }), + }; + + pub const thunderxt88 = Cpu{ + .name = "thunderxt88", + .llvm_name = "thunderxt88", + .features = featureSet(&[_]Feature{ + .predictable_select_expensive, + .crc, + .perfmon, + .fp_armv8, + .use_postra_scheduler, + }), + }; + + pub const tsv110 = Cpu{ + .name = "tsv110", + .llvm_name = "tsv110", + .features = featureSet(&[_]Feature{ + .ccpp, + .custom_cheap_as_move, + .uaops, + .rdm, + .ras, + .lse, + .crc, + .perfmon, + .fp_armv8, + .vh, + .fuse_aes, + .lor, + .use_postra_scheduler, + .dotprod, + .pan, + .spe, + }), + }; +}; + +/// All aarch64 CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.apple_latest, + &cpu.cortex_a35, + &cpu.cortex_a53, + &cpu.cortex_a55, + &cpu.cortex_a57, + &cpu.cortex_a72, + &cpu.cortex_a73, + &cpu.cortex_a75, + &cpu.cortex_a76, + &cpu.cortex_a76ae, + &cpu.cyclone, + &cpu.exynos_m1, + &cpu.exynos_m2, + &cpu.exynos_m3, + &cpu.exynos_m4, + &cpu.exynos_m5, + &cpu.falkor, + &cpu.generic, + &cpu.kryo, + &cpu.saphira, + &cpu.thunderx, + &cpu.thunderx2t99, + &cpu.thunderxt81, + &cpu.thunderxt83, + &cpu.thunderxt88, + &cpu.tsv110, }; diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 9b6ae2548b0fb9c56fa903e9c1e971eb1e637cc7..952c7525615f2c3e46abc486064173643b52985f 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -81,6 +81,9 @@ const Error = extern enum { OperationAborted, BrokenPipe, NoSpaceLeft, + NotLazy, + IsAsync, + ImportOutsidePkgPath, }; const FILE = std.c.FILE; @@ -150,7 +153,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void { const argc_usize = @intCast(usize, argc); var arg_i: usize = 0; while (arg_i < argc_usize) : (arg_i += 1) { - try args_list.append(std.mem.toSliceConst(u8, argv[arg_i])); + try args_list.append(mem.toSliceConst(u8, argv[arg_i])); } stdout = &std.io.getStdOut().outStream().stream; @@ -532,7 +535,7 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz // ABI warning export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { - std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + std.debug.warn("Failed to list features: {}\n", .{@errorName(err)}); }; } @@ -540,11 +543,11 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { - std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name}); return; }; - try stdout_stream.print("Available features for {}:\n", .{ @tagName(arch) }); + try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)}); const features = std.target.getFeaturesForArch(arch); @@ -556,18 +559,18 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { } for (features) |feature| { - try stdout_stream.print(" {}", .{ feature.name }); - + try stdout_stream.print(" {}", .{feature.name}); + var i: usize = 0; while (i < longest_len - feature.name.len) : (i += 1) { - try stdout_stream.write(" "); + try stdout_stream.write(" "); } - try stdout_stream.print(" - {}\n", .{ feature.description }); + try stdout_stream.print(" - {}\n", .{feature.description}); if (show_dependencies and feature.dependencies.len > 0) { for (feature.dependencies) |dependency| { - try stdout_stream.print(" {}\n", .{ dependency.name }); + try stdout_stream.print(" {}\n", .{dependency.name}); } } } @@ -576,7 +579,7 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { // ABI warning export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { - std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + std.debug.warn("Failed to list features: {}\n", .{@errorName(err)}); }; } @@ -584,13 +587,13 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; const arch = Target.parseArchTag(arch_name) catch { - std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name}); return; }; const cpus = std.target.getCpusForArch(arch); - try stdout_stream.print("Available cpus for {}:\n", .{ @tagName(arch) }); + try stdout_stream.print("Available cpus for {}:\n", .{@tagName(arch)}); var longest_len: usize = 0; for (cpus) |cpu| { @@ -600,78 +603,97 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { } for (cpus) |cpu| { - try stdout_stream.print(" {}", .{ cpu.name }); - + try stdout_stream.print(" {}", .{cpu.name}); + var i: usize = 0; while (i < longest_len - cpu.name.len) : (i += 1) { - try stdout_stream.write(" "); + try stdout_stream.write(" "); } try stdout_stream.write("\n"); if (show_dependencies and cpu.dependencies.len > 0) { for (cpu.dependencies) |dependency| { - try stdout_stream.print(" {}\n", .{ dependency.name }); + try stdout_stream.print(" {}\n", .{dependency.name}); } } } } -const null_terminated_empty_string = (&[_]u8 { 0 })[0..0 :0]; +const Stage2CpuFeatures = struct { + allocator: *mem.Allocator, + cpu_features: Target.CpuFeatures, -fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 { - var buffer = try std.Buffer.init(allocator, str); - - const len = buffer.len(); - - // Don't deinit since we steal all the buffer's memory here. - return buffer.list.toOwnedSlice()[0..len :0]; -} - -const Stage2TargetDetails = struct { - allocator: *std.mem.Allocator, - target_details: std.target.TargetDetails, - - llvm_cpu_str: [:0]const u8, - llvm_features_str: [:0]const u8, + llvm_cpu_name: ?[:0]const u8, + llvm_features_str: ?[:0]const u8, builtin_str: [:0]const u8, + cache_hash: [:0]const u8, const Self = @This(); - fn initCpu(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), cpu: *const std.target.Cpu) !Self { - var builtin_str_buffer = try std.Buffer.init( - allocator, - "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); + fn initBaseline(allocator: *mem.Allocator) !Self { + const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures.baseline;\n"); + errdefer allocator.free(builtin_str); + + const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n"); + errdefer allocator.free(cache_hash); + + return Self{ + .allocator = allocator, + .cpu_features = .{ .cpu = cpu }, + .llvm_cpu_name = null, + .llvm_features_str = null, + .builtin_str = builtin_str, + .cache_hash = cache_hash, + }; + } - try builtin_str_buffer.append(@tagName(arch)); - try builtin_str_buffer.append(".cpu_"); - try builtin_str_buffer.append(cpu.name); - try builtin_str_buffer.append("};"); + fn initCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !Self { + const builtin_str = try std.fmt.allocPrint0( + allocator, + "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n", + arch.genericName(), + cpu.name, + ); + errdefer allocator.free(builtin_str); - const cpu_string = cpu.llvm_name orelse ""; + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features); + errdefer allocator.free(cache_hash); return Self{ .allocator = allocator, - .target_details = .{ - .cpu = cpu, - }, - .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu_string), - .llvm_features_str = null_terminated_empty_string, - .builtin_str = builtin_str_buffer.toSliceConst(), + .cpu_features = .{ .cpu = cpu }, + .llvm_cpu_name = cpu.llvm_name, + .llvm_features_str = null, + .builtin_str = builtin_str, + .cache_hash = cache_hash, }; } - fn initFeatures(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), features: []*const std.target.Feature) !Self { - var builtin_str_buffer = try std.Buffer.init( - allocator, - "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); + fn initFeatures( + allocator: *mem.Allocator, + arch: Target.Arch, + features: Target.Cpu.Feature.Set, + ) !Self { + const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features); + errdefer allocator.free(cache_hash); + + const generic_arch_name = arch.genericName(); + var builtin_str_buffer = try std.Buffer.allocPrint( + allocator, + "CpuFeatures{{ .features = Arch.{}.featureSet(&[_]Arch.{}.Feature{{\n", + generic_arch_name, + generic_arch_name, + ); + defer builtin_str_buffer.deinit(); var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); // First, disable all features. // This way, we only get the ones the user requests. - for (std.target.getFeaturesForArch(arch)) |feature| { + for (arch.allFeatures()) |feature| { if (feature.llvm_name) |llvm_name| { try llvm_features_buffer.append("-"); try llvm_features_buffer.append(llvm_name); @@ -684,232 +706,117 @@ const Stage2TargetDetails = struct { try llvm_features_buffer.append("+"); try llvm_features_buffer.append(llvm_name); try llvm_features_buffer.append(","); - - try builtin_str_buffer.append("&@import(\"std\").target."); - try builtin_str_buffer.append(@tagName(arch)); - try builtin_str_buffer.append(".feature_"); - try builtin_str_buffer.append(feature.name); - try builtin_str_buffer.append(","); } + + try builtin_str_buffer.append(" ."); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append(",\n"); + } + + if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) { + llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); } - try builtin_str_buffer.append("}};"); + try builtin_str_buffer.append("})};\n"); return Self{ .allocator = allocator, - .target_details = std.target.TargetDetails{ - .features = features, - }, - .llvm_cpu_str = null_terminated_empty_string, - .llvm_features_str = llvm_features_buffer.toSliceConst(), - .builtin_str = builtin_str_buffer.toSliceConst(), + .cpu_features = .{ .features = features }, + .llvm_cpu_name = null, + .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + .builtin_str = builtin_str_buffer.toOwnedSlice(), + .cache_hash = cache_hash, }; } -}; - -// ABI warning -export fn stage2_target_details_parse_cpu(arch_str: ?[*:0]const u8, cpu_str: ?[*:0]const u8) ?*Stage2TargetDetails { - if (cpu_str == null) return null; - if (arch_str == null) return null; - const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch { - return null; - }; - return parseCpu(arch, std.mem.toSliceConst(u8, cpu_str.?)) catch |err| { - switch (err) { - error.OutOfMemory => @panic("out of memory"), - else => return null, - } - }; -} + fn deinit(self: *Self) void { + self.allocator.free(self.cache_hash); + self.allocator.free(self.builtin_str); + if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str); + self.* = undefined; + } +}; // ABI warning -export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, features_str: ?[*:0]const u8) ?*Stage2TargetDetails { - if (features_str == null) return null; - if (arch_str == null) return null; - - const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; - return parseFeatures(arch, std.mem.toSliceConst(u8, features_str.?)) catch |err| { - switch (err) { - error.OutOfMemory => @panic("out of memory"), - else => return null, - } +export fn stage2_cpu_features_parse_cpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) *Stage2CpuFeatures { + return parseCpu(arch_name, cpu_name) catch |err| switch (err) { + error.OutOfMemory => @panic("out of memory"), }; } -fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { - const allocator = std.heap.c_allocator; +fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures { + const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); + const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name)); - const cpus = std.target.getCpusForArch(arch); + const ptr = try allocator.create(Stage2CpuFeatures); + errdefer std.heap.c_allocator.destroy(ptr); - for (cpus) |cpu| { - if (std.mem.eql(u8, str, cpu.name)) { - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = try Stage2TargetDetails.initCpu(std.heap.c_allocator, arch, cpu); + ptr.* = try Stage2CpuFeatures.initCpu(std.heap.c_allocator, arch, cpu); + errdefer ptr.deinit(); - return ptr; - } - } - - return error.InvalidCpu; + return ptr; } -fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { - const allocator = std.heap.c_allocator; - - const known_features = std.target.getFeaturesForArch(arch); - - var features = std.ArrayList(*const std.target.Feature).init(allocator); - defer features.deinit(); - - var start: usize = 0; - while (start < str.len) { - const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start; - const feature_str = std.mem.trim(u8, str[start..start+next_comma_pos], " "); - - start += next_comma_pos + 1; - - if (feature_str.len == 0) continue; - - var feature: ?*const std.target.Feature = null; - for (known_features) |known_feature| { - if (std.mem.eql(u8, feature_str, known_feature.name)) { - feature = known_feature; - break; - } - } - - if (feature) |f| { - features.append(f) catch @panic("out of memory"); +// ABI warning +export fn stage2_cpu_features_parse_features( + arch_name: [*:0]const u8, + features_text: [*:0]const u8, +) *Stage2CpuFeatures { + return parseFeatures(arch_name, features_text) catch |err| switch (err) { + error.OutOfMemory => @panic("out of memory"), + }; +} - } else { - return error.InvalidFeature; - } - } +fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures { + const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); + const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)); - const features_slice = features.toOwnedSlice(); + const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures); + errdefer std.heap.c_allocator.destroy(ptr); - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features_slice); + ptr.* = try Stage2CpuFeatures.initFeatures(std.heap.c_allocator, arch, set); + errdefer ptr.deinit(); return ptr; } // ABI warning -export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { - if (target_details) |td| { - return @as([*:0]const u8, switch (td.target_details) { - .cpu => td.llvm_cpu_str, - .features => td.llvm_features_str, - }); - } - - return @as([*:0]const u8, null_terminated_empty_string); -} +export fn stage2_cpu_features_baseline() *Stage2CpuFeatures { + const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures); + errdefer std.heap.c_allocator.destroy(ptr); -// ABI warning -export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { - if (target_details) |td| { - return @as([*:0]const u8, td.llvm_cpu_str); - } + ptr.* = try Stage2CpuFeatures.initBaseline(std.heap.c_allocator); + errdefer ptr.deinit(); - return @as([*:0]const u8, null_terminated_empty_string); + return ptr; } // ABI warning -export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { - if (target_details) |td| { - return @as([*:0]const u8, td.llvm_features_str); - } - - return @as([*:0]const u8, null_terminated_empty_string); +export fn stage2_cpu_features_get_cache_hash( + cpu_features: *const Stage2CpuFeatures, + ptr: *[*:0]const u8, + len: *usize, +) void { + ptr.* = cpu_features.cache_hash.ptr; + len.* = cpu_features.cache_hash.len; } // ABI warning -export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { - if (target_details) |td| { - return @as([*:0]const u8, td.builtin_str); - } - - return @as([*:0]const u8, null_terminated_empty_string); +export fn stage2_cpu_features_get_builtin_str( + cpu_features: *const Stage2CpuFeatures, + ptr: *[*:0]const u8, + len: *usize, +) void { + ptr.* = cpu_features.builtin_str.ptr; + len.* = cpu_features.builtin_str.len; } -const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { - &std.target.riscv.feature_a, - &std.target.riscv.feature_c, - &std.target.riscv.feature_d, - &std.target.riscv.feature_f, - &std.target.riscv.feature_m, - &std.target.riscv.feature_relax, -}; - -const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { - &std.target.riscv.feature_bit64, - &std.target.riscv.feature_a, - &std.target.riscv.feature_c, - &std.target.riscv.feature_d, - &std.target.riscv.feature_f, - &std.target.riscv.feature_m, - &std.target.riscv.feature_relax, -}; - -const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { - &std.target.x86.feature_cmov, - &std.target.x86.feature_cx8, - &std.target.x86.feature_fxsr, - &std.target.x86.feature_mmx, - &std.target.x86.feature_nopl, - &std.target.x86.feature_sse, - &std.target.x86.feature_sse2, - &std.target.x86.feature_slowUnalignedMem16, - &std.target.x86.feature_x87, -}; - -// Same as above but without sse. -const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature { - &std.target.x86.feature_cmov, - &std.target.x86.feature_cx8, - &std.target.x86.feature_fxsr, - &std.target.x86.feature_mmx, - &std.target.x86.feature_nopl, - &std.target.x86.feature_slowUnalignedMem16, - &std.target.x86.feature_x87, -}; - // ABI warning -export fn stage2_target_details_get_default(arch_str: ?[*:0]const u8, os_str: ?[*:0]const u8) ?*Stage2TargetDetails { - if (arch_str == null) return null; - if (os_str == null) return null; - - const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; - const os = Target.parseOs(std.mem.toSliceConst(u8, os_str.?)) catch return null; - - return createDefaultTargetDetails(arch, os) catch return null; +export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 { + return cpu_features.llvm_cpu_name; } -fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os) !?*Stage2TargetDetails { - const allocator = std.heap.c_allocator; - - return switch (arch) { - .riscv32 => blk: { - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv32_default_features); - break :blk ptr; - }, - .riscv64 => blk: { - const ptr = try allocator.create(Stage2TargetDetails); - ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv64_default_features); - break :blk ptr; - }, - .i386 => blk: { - const ptr = try allocator.create(Stage2TargetDetails); - const features = switch (os) { - .freestanding => i386_default_features_freestanding, - else => i386_default_features, - }; - ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features); - break :blk ptr; - }, - else => null, - }; +// ABI warning +export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 { + return cpu_features.llvm_features_str; } diff --git a/src/all_types.hpp b/src/all_types.hpp index d81e401232e057cc5a2b5454ed61a0e74cd868df..df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2215,8 +2215,6 @@ struct CodeGen { const char **clang_argv; size_t clang_argv_len; - - Stage2TargetDetails *target_details; }; struct ZigVar { diff --git a/src/codegen.cpp b/src/codegen.cpp index b2cae32fa602accc3d89285df5bb257d809d7b66..9cbd5fc6ab223eda23a0cea1d48e34772ec3b5aa 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8573,6 +8573,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { buf_appendf(contents, "pub const os = Os.%s;\n", cur_os); buf_appendf(contents, "pub const arch = %s;\n", cur_arch); buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi); + { + buf_append_str(contents, "pub const cpu_features: CpuFeatures = "); + if (g->zig_target->cpu_features != nullptr) { + const char *ptr; + size_t len; + stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len); + buf_append_mem(contents, ptr, len); + } else { + buf_append_str(contents, ".baseline;\n"); + } + } if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) { buf_appendf(contents, "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n", @@ -8602,14 +8613,6 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { "pub var test_functions: []TestFn = undefined; // overwritten later\n" ); } - - buf_appendf(contents, "pub const target_details: ?@import(\"std\").target.TargetDetails = "); - if (g->target_details) { - buf_appendf(contents, "%s", stage2_target_details_get_builtin_str(g->target_details)); - } else { - buf_appendf(contents, "null;"); - } - buf_appendf(contents, "\n"); return contents; } @@ -8648,6 +8651,12 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_int(&cache_hash, g->zig_target->vendor); cache_int(&cache_hash, g->zig_target->os); cache_int(&cache_hash, g->zig_target->abi); + if (g->zig_target->cpu_features != nullptr) { + const char *ptr; + size_t len; + stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len); + cache_str(&cache_hash, ptr); + } if (g->zig_target->glibc_version != nullptr) { cache_int(&cache_hash, g->zig_target->glibc_version->major); cache_int(&cache_hash, g->zig_target->glibc_version->minor); @@ -8659,10 +8668,6 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_bool(&cache_hash, g->link_eh_frame_hdr); cache_int(&cache_hash, detect_subsystem(g)); - if (g->target_details) { - cache_str(&cache_hash, stage2_target_details_get_cache_str(g->target_details)); - } - Buf digest = BUF_INIT; buf_resize(&digest, 0); if ((err = cache_hit(&cache_hash, &digest))) { @@ -8793,9 +8798,9 @@ static void init(CodeGen *g) { } // Override CPU and features if defined by user. - if (g->target_details) { - target_specific_cpu_args = stage2_target_details_get_llvm_cpu(g->target_details); - target_specific_features = stage2_target_details_get_llvm_features(g->target_details); + if (g->zig_target->cpu_features != nullptr) { + target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); + target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); } g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), @@ -9123,15 +9128,19 @@ void add_cc_args(CodeGen *g, ZigList &args, const char *out_dep_pa args.append("-target"); args.append(buf_ptr(&g->llvm_triple_str)); - if (g->target_details) { + const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); + if (llvm_cpu != nullptr) { args.append("-Xclang"); args.append("-target-cpu"); args.append("-Xclang"); - args.append(stage2_target_details_get_llvm_cpu(g->target_details)); + args.append(llvm_cpu); + } + const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); + if (llvm_target_features != nullptr) { args.append("-Xclang"); args.append("-target-feature"); args.append("-Xclang"); - args.append(stage2_target_details_get_llvm_features(g->target_details)); + args.append(llvm_target_features); } } @@ -10328,6 +10337,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { cache_int(ch, g->zig_target->vendor); cache_int(ch, g->zig_target->os); cache_int(ch, g->zig_target->abi); + if (g->zig_target->cpu_features != nullptr) { + const char *ptr; + size_t len; + stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len); + cache_str(ch, ptr); + } if (g->zig_target->glibc_version != nullptr) { cache_int(ch, g->zig_target->glibc_version->major); cache_int(ch, g->zig_target->glibc_version->minor); @@ -10375,10 +10390,6 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { cache_buf_opt(ch, g->dynamic_linker_path); cache_buf_opt(ch, g->version_script_path); - if (g->target_details) { - cache_str(ch, stage2_target_details_get_cache_str(g->target_details)); - } - // gen_c_objects appends objects to g->link_objects which we want to include in the hash gen_c_objects(g); cache_list_of_file(ch, g->link_objects.items, g->link_objects.length); @@ -10661,7 +10672,6 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o CodeGen *child_gen = codegen_create(nullptr, root_src_path, parent_gen->zig_target, out_type, parent_gen->build_mode, parent_gen->zig_lib_dir, libc, get_global_cache_dir(), false, child_progress_node); - child_gen->target_details = parent_gen->target_details; child_gen->root_out_name = buf_create_from_str(name); child_gen->disable_gen_h = true; child_gen->want_stack_check = WantStackCheckDisabled; diff --git a/src/main.cpp b/src/main.cpp index 441bc2afb0e2e85e31204133a4afa9f7d90467df..42a3438def09a7d10986d911666bcd5f51850f3d 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -955,9 +955,9 @@ int main(int argc, char **argv) { targets_list_features_arch = argv[i]; } else if (strcmp(arg, "--list-cpus") == 0) { targets_list_cpus_arch = argv[i]; - } else if (strcmp(arg, "--cpu") == 0) { + } else if (strcmp(arg, "-target-cpu") == 0) { cpu = argv[i]; - } else if (strcmp(arg, "--features") == 0) { + } else if (strcmp(arg, "-target-feature") == 0) { features = argv[i]; }else { fprintf(stderr, "Invalid argument: %s\n", arg); @@ -1074,27 +1074,26 @@ int main(int argc, char **argv) { } } - Stage2TargetDetails *target_details = nullptr; if (cpu && features) { - fprintf(stderr, "--cpu and --features options not allowed together\n"); + fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n"); return main_exit(root_progress_node, EXIT_FAILURE); } else if (cpu) { - target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu); - if (!target_details) { - fprintf(stderr, "invalid --cpu value\n"); + target.cpu_features = stage2_cpu_features_parse_cpu(target_arch_name(target.arch), cpu); + if (!target.cpu_features) { + fprintf(stderr, "invalid -target-cpu value\n"); return main_exit(root_progress_node, EXIT_FAILURE); } } else if (features) { - target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features); - if (!target_details) { - fprintf(stderr, "invalid --features value\n"); + target.cpu_features = stage2_cpu_features_parse_features(target_arch_name(target.arch), features); + if (!target.cpu_features) { + fprintf(stderr, "invalid -target-feature value\n"); return main_exit(root_progress_node, EXIT_FAILURE); } } else { // If no details are specified and we are not native, load // cross-compilation default features. if (!target.is_native) { - target_details = stage2_target_details_get_default(target_arch_name(target.arch), target_os_name(target.os)); + target.cpu_features = stage2_cpu_features_baseline(); } } @@ -1148,7 +1147,6 @@ int main(int argc, char **argv) { g->want_stack_check = want_stack_check; g->want_sanitize_c = want_sanitize_c; g->want_single_threaded = want_single_threaded; - g->target_details = target_details; Buf *builtin_source = codegen_generate_builtin_source(g); if (fwrite(buf_ptr(builtin_source), 1, buf_len(builtin_source), stdout) != buf_len(builtin_source)) { fprintf(stderr, "unable to write to stdout: %s\n", strerror(ferror(stdout))); @@ -1303,8 +1301,6 @@ int main(int argc, char **argv) { codegen_add_rpath(g, rpath_list.at(i)); } - g->target_details = target_details; - codegen_set_rdynamic(g, rdynamic); if (mmacosx_version_min && mios_version_min) { fprintf(stderr, "-mmacosx-version-min and -mios-version-min options not allowed together\n"); diff --git a/src/target.hpp b/src/target.hpp index 50611bc853b8ed3675cc5cc808281898f7d327aa..3e984e1269cb867773ff9125e28ebe05675a3294 100644 --- a/src/target.hpp +++ b/src/target.hpp @@ -91,6 +91,7 @@ struct ZigTarget { Os os; ZigLLVM_EnvironmentType abi; ZigGLibCVersion *glibc_version; // null means default + Stage2CpuFeatures *cpu_features; bool is_native; }; diff --git a/src/userland.cpp b/src/userland.cpp index 0e173d7e76427ece75719341722d5acb2f892fa3..89ddecbedb1e12e7a81fadcc6da2d02d883e28cc 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -89,26 +89,44 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {} void stage2_progress_disable_tty(Stage2Progress *progress) {} void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){} -void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} -void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} -Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str) { - return nullptr; +void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) { + const char *msg = "stage0 called stage2_list_features_for_arch"; + stage2_panic(msg, strlen(msg)); } -Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str) { - return nullptr; + +void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) { + const char *msg = "stage0 called stage2_list_cpus_for_arch"; + stage2_panic(msg, strlen(msg)); } -const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details) { - return ""; +Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *str) { + const char *msg = "stage0 called stage2_cpu_features_parse_cpu"; + stage2_panic(msg, strlen(msg)); } -const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details) { - return ""; +Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *str) { + const char *msg = "stage0 called stage2_cpu_features_parse_features"; + stage2_panic(msg, strlen(msg)); } -const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) { - return ""; +Stage2CpuFeatures *stage2_cpu_features_baseline(void) { + const char *msg = "stage0 called stage2_cpu_features_baseline"; + stage2_panic(msg, strlen(msg)); } -const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) { - return ""; +void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, + const char **ptr, size_t *len) +{ + const char *msg = "stage0 called stage2_cpu_features_get_cache_hash"; + stage2_panic(msg, strlen(msg)); } -Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os) { - return nullptr; +const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) { + const char *msg = "stage0 called stage2_cpu_features_get_llvm_cpu"; + stage2_panic(msg, strlen(msg)); +} +const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) { + const char *msg = "stage0 called stage2_cpu_features_get_llvm_features"; + stage2_panic(msg, strlen(msg)); +} +void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, + const char **ptr, size_t *len) +{ + const char *msg = "stage0 called stage2_cpu_features_get_builtin_str"; + stage2_panic(msg, strlen(msg)); } diff --git a/src/userland.h b/src/userland.h index f954efd3fe0db8a4f72843ff6122bccbfb3b1589..9afa04829918df95b87b061075ba42aa4d8b1315 100644 --- a/src/userland.h +++ b/src/userland.h @@ -181,27 +181,29 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_ ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); // ABI warning -struct Stage2TargetDetails; +struct Stage2CpuFeatures; // ABI warning -ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str); +ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *cpu_name); // ABI warning -ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str); +ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *features); // ABI warning -ZIG_EXTERN_C const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details); +ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_baseline(void); // ABI warning -ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details); +ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features); // ABI warning -ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details); +ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features); // ABI warning -ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details); +ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, + const char **ptr, size_t *len); // ABI warning -ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os); +ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, + const char **ptr, size_t *len); #endif -- 2.54.0 From a313f153841df8caa3af8fc80966c8f61a856f51 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 19 Jan 2020 13:52:29 -0500 Subject: [PATCH 28/63] figure out zig0/stage1 and scanning for native CPU --- src-self-hosted/stage1.zig | 146 +++++++++++++++++++++++++++---------- src/main.cpp | 32 +++++--- src/userland.cpp | 46 ++++++++---- src/userland.h | 20 +++-- 4 files changed, 172 insertions(+), 72 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 952c7525615f2c3e46abc486064173643b52985f..f0593f8fce67a5a236b3af2a7ec22ed108791300 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -632,24 +632,77 @@ const Stage2CpuFeatures = struct { const Self = @This(); - fn initBaseline(allocator: *mem.Allocator) !Self { - const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures.baseline;\n"); + fn createBaseline(allocator: *mem.Allocator) !*Self { + const self = try allocator.create(Self); + errdefer allocator.destroy(self); + + const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n"); errdefer allocator.free(builtin_str); const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n"); errdefer allocator.free(cache_hash); - return Self{ + self.* = Self{ .allocator = allocator, - .cpu_features = .{ .cpu = cpu }, + .cpu_features = .baseline, .llvm_cpu_name = null, .llvm_features_str = null, .builtin_str = builtin_str, .cache_hash = cache_hash, }; + return self; } - fn initCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !Self { + fn createFromLLVM( + allocator: *mem.Allocator, + arch: [*:0]const u8, + llvm_cpu_name_z: [*:0]const u8, + llvm_cpu_features: [*:0]const u8, + ) !*Self { + const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); + const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z); + + for (arch.allCpus()) |cpu| { + const this_llvm_name = cpu.llvm_name orelse continue; + if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { + return createFromCpu(allocator, arch, cpu); + } + } + + var set = arch.baselineFeatures(); + var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); + while (it.next()) |decorated_llvm_feat| { + var op: enum { + add, + sub, + } = undefined; + var llvm_feat: []const u8 = undefined; + if (mem.startsWith(u8, decorated_llvm_feat, "+")) { + op = .add; + llvm_feat = decorated_llvm_feat[1..]; + } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) { + op = .sub; + llvm_feat = decorated_llvm_feat[1..]; + } else { + return error.InvalidLlvmCpuFeaturesFormat; + } + for (arch.allFeaturesList()) |feature, index| { + if (mem.eql(u8, feature_name, feature.name)) { + switch (op) { + .add => set |= 1 << index, + .sub => set &= ~@as(Target.Cpu.Feature.Set, 1 << index), + } + break; + } + } + } + return createFromCpuFeatures(allocator, arch, set); + } + + fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self { + const self = try allocator.create(Self); + errdefer allocator.destroy(self); + const builtin_str = try std.fmt.allocPrint0( allocator, "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n", @@ -661,7 +714,7 @@ const Stage2CpuFeatures = struct { const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features); errdefer allocator.free(cache_hash); - return Self{ + self.* = Self{ .allocator = allocator, .cpu_features = .{ .cpu = cpu }, .llvm_cpu_name = cpu.llvm_name, @@ -669,13 +722,17 @@ const Stage2CpuFeatures = struct { .builtin_str = builtin_str, .cache_hash = cache_hash, }; + return self; } - fn initFeatures( + fn createFromCpuFeatures( allocator: *mem.Allocator, arch: Target.Arch, features: Target.Cpu.Feature.Set, - ) !Self { + ) !*Self { + const self = try allocator.create(Self); + errdefer allocator.destroy(self); + const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features); errdefer allocator.free(cache_hash); @@ -719,7 +776,7 @@ const Stage2CpuFeatures = struct { try builtin_str_buffer.append("})};\n"); - return Self{ + self.* = Self{ .allocator = allocator, .cpu_features = .{ .features = features }, .llvm_cpu_name = null, @@ -727,68 +784,77 @@ const Stage2CpuFeatures = struct { .builtin_str = builtin_str_buffer.toOwnedSlice(), .cache_hash = cache_hash, }; + return self; } - fn deinit(self: *Self) void { + fn destroy(self: *Self) void { self.allocator.free(self.cache_hash); self.allocator.free(self.builtin_str); if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str); - self.* = undefined; + self.allocator.destroy(self); } }; // ABI warning -export fn stage2_cpu_features_parse_cpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) *Stage2CpuFeatures { - return parseCpu(arch_name, cpu_name) catch |err| switch (err) { - error.OutOfMemory => @panic("out of memory"), +export fn stage2_cpu_features_parse_cpu( + result: **Stage2CpuFeatures, + arch_name: [*:0]const u8, + cpu_name: [*:0]const u8, +) Error { + result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) { + error.OutOfMemory => return .OutOfMemory, }; + return .None; } fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures { const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name)); - - const ptr = try allocator.create(Stage2CpuFeatures); - errdefer std.heap.c_allocator.destroy(ptr); - - ptr.* = try Stage2CpuFeatures.initCpu(std.heap.c_allocator, arch, cpu); - errdefer ptr.deinit(); - - return ptr; + return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu); } // ABI warning export fn stage2_cpu_features_parse_features( + result: **Stage2CpuFeatures, arch_name: [*:0]const u8, features_text: [*:0]const u8, -) *Stage2CpuFeatures { - return parseFeatures(arch_name, features_text) catch |err| switch (err) { - error.OutOfMemory => @panic("out of memory"), +) Error { + result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) { + error.OutOfMemory => return .OutOfMemory, }; + return .None; } fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures { const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)); - - const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures); - errdefer std.heap.c_allocator.destroy(ptr); - - ptr.* = try Stage2CpuFeatures.initFeatures(std.heap.c_allocator, arch, set); - errdefer ptr.deinit(); - - return ptr; + return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set); } // ABI warning -export fn stage2_cpu_features_baseline() *Stage2CpuFeatures { - const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures); - errdefer std.heap.c_allocator.destroy(ptr); - - ptr.* = try Stage2CpuFeatures.initBaseline(std.heap.c_allocator); - errdefer ptr.deinit(); +export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error { + result.* = Stage2CpuFeatures.createBaseline(std.heap.c_allocator) catch |err| switch (err) { + error.OutOfMemory => return .OutOfMemory, + }; + return .None; +} - return ptr; +// ABI warning +export fn stage2_cpu_features_llvm( + result: **Stage2CpuFeatures, + arch_name: [*:0]const u8, + llvm_cpu_name: [*:0]const u8, + llvm_cpu_features: [*:0]const u8, +) Error { + result.* = Stage2CpuFeatures.createFromLLVM( + std.heap.c_allocator, + arch_name, + llvm_cpu_name, + llvm_cpu_features, + ) catch |err| switch (err) { + error.OutOfMemory => return .OutOfMemory, + }; + return .None; } // ABI warning diff --git a/src/main.cpp b/src/main.cpp index 42a3438def09a7d10986d911666bcd5f51850f3d..d5804e795c18578714698e6a9005cb301fe7cbbe 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -100,8 +100,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --override-lib-dir [arg] override path to Zig lib directory\n" " -ffunction-sections places each function in a separate section\n" " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n" - " --cpu [cpu] compile for [cpu] on the current target\n" - " --features [feature_str] compile with features in [feature_str] on the current target\n" + " -target-cpu [cpu] target one specific CPU by name\n" + " -target-feature [features] specify the set of CPU features to target\n" "\n" "Link Options:\n" " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n" @@ -1078,22 +1078,30 @@ int main(int argc, char **argv) { fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n"); return main_exit(root_progress_node, EXIT_FAILURE); } else if (cpu) { - target.cpu_features = stage2_cpu_features_parse_cpu(target_arch_name(target.arch), cpu); - if (!target.cpu_features) { - fprintf(stderr, "invalid -target-cpu value\n"); + if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, target_arch_name(target.arch), cpu))) { + fprintf(stderr, "-target-cpu error: %s\n", err_str(err)); return main_exit(root_progress_node, EXIT_FAILURE); } } else if (features) { - target.cpu_features = stage2_cpu_features_parse_features(target_arch_name(target.arch), features); - if (!target.cpu_features) { - fprintf(stderr, "invalid -target-feature value\n"); + if ((err = stage2_cpu_features_parse_features(&target.cpu_features, target_arch_name(target.arch), + features))) + { + fprintf(stderr, "-target-feature error: %s\n", err_str(err)); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } else if (target.is_native) { + const char *cpu_name = ZigLLVMGetHostCPUName(); + const char *cpu_features = ZigLLVMGetNativeFeatures(); + if ((err = stage2_cpu_features_llvm(&target.cpu_features, target_arch_name(target.arch), + cpu_name, cpu_features))) + { + fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err)); return main_exit(root_progress_node, EXIT_FAILURE); } } else { - // If no details are specified and we are not native, load - // cross-compilation default features. - if (!target.is_native) { - target.cpu_features = stage2_cpu_features_baseline(); + if ((err = stage2_cpu_features_baseline(&target.cpu_features))) { + fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err)); + return main_exit(root_progress_node, EXIT_FAILURE); } } diff --git a/src/userland.cpp b/src/userland.cpp index 89ddecbedb1e12e7a81fadcc6da2d02d883e28cc..93944f0089c5d7f9c4d440b9183827b6a3325b97 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -98,35 +98,55 @@ void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, const char *msg = "stage0 called stage2_list_cpus_for_arch"; stage2_panic(msg, strlen(msg)); } -Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *str) { + +struct Stage2CpuFeatures { + const char *llvm_cpu_name; + const char *llvm_cpu_features; + const char *builtin_str; + const char *cache_hash; +}; + +Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *arch, const char *str) { const char *msg = "stage0 called stage2_cpu_features_parse_cpu"; stage2_panic(msg, strlen(msg)); } -Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *str) { +Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *arch, const char *str) { const char *msg = "stage0 called stage2_cpu_features_parse_features"; stage2_panic(msg, strlen(msg)); } -Stage2CpuFeatures *stage2_cpu_features_baseline(void) { - const char *msg = "stage0 called stage2_cpu_features_baseline"; - stage2_panic(msg, strlen(msg)); +Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) { + Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); + result->builtin_str = ".baseline;\n"; + result->cache_hash = "\n\n"; + *out = result; + return ErrorNone; +} +Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *arch, + const char *llvm_cpu_name, const char *llvm_features) +{ + Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); + result->llvm_cpu_name = llvm_cpu_name; + result->llvm_cpu_features = llvm_features; + result->builtin_str = ".baseline;\n"; + result->cache_hash = "native\n\n"; + *out = result; + return ErrorNone; } void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len) { - const char *msg = "stage0 called stage2_cpu_features_get_cache_hash"; - stage2_panic(msg, strlen(msg)); + *ptr = cpu_features->cache_hash; + *len = strlen(cpu_features->cache_hash); } const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) { - const char *msg = "stage0 called stage2_cpu_features_get_llvm_cpu"; - stage2_panic(msg, strlen(msg)); + return cpu_features->llvm_cpu_name; } const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) { - const char *msg = "stage0 called stage2_cpu_features_get_llvm_features"; - stage2_panic(msg, strlen(msg)); + return cpu_features->llvm_cpu_features; } void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len) { - const char *msg = "stage0 called stage2_cpu_features_get_builtin_str"; - stage2_panic(msg, strlen(msg)); + *ptr = cpu_features->builtin_str; + *len = strlen(cpu_features->builtin_str); } diff --git a/src/userland.h b/src/userland.h index 9afa04829918df95b87b061075ba42aa4d8b1315..1fd40039a658a3c751c96e008c605ffa288095dc 100644 --- a/src/userland.h +++ b/src/userland.h @@ -184,26 +184,32 @@ ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t ar struct Stage2CpuFeatures; // ABI warning -ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *cpu_name); +ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result, + const char *arch, const char *cpu_name); // ABI warning -ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *features); +ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result, + const char *arch, const char *features); // ABI warning -ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_baseline(void); +ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result); // ABI warning -ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features); +ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result, + const char *arch, const char *llvm_cpu_name, const char *llvm_features); // ABI warning -ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features); +ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features); // ABI warning -ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, +ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features); + +// ABI warning +ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len); // ABI warning -ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, +ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len); #endif -- 2.54.0 From e3b5e9187811e23fbf1565a9c8a14996f1aad659 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 19 Jan 2020 20:22:31 -0500 Subject: [PATCH 29/63] do the x86 arch --- BRANCH_TODO | 15 - lib/std/target.zig | 81 +- lib/std/target/aarch64.zig | 14 +- lib/std/target/x86.zig | 6724 ++++++++++++++++++------------------ 4 files changed, 3438 insertions(+), 3396 deletions(-) diff --git a/BRANCH_TODO b/BRANCH_TODO index ad1ad76d21d198554c0ef6e8ac445050f43530c7..50efbe89f6a632b8a411e78e713ca07a7a6d44fd 100644 --- a/BRANCH_TODO +++ b/BRANCH_TODO @@ -1,8 +1,5 @@ Finish these thigns before merging teh branch - * need to populate builtin.zig cpu_features, undefined is incorrect. I guess for zig0 it will be always baseline - * need to populate std.Target.current.cpu_features even for native target - * finish refactoring target/arch/* * `zig builtin` integration * move target details to better location @@ -29,18 +26,6 @@ const riscv64_default_features: []*const std.target.Feature = &[_]*const std.tar &std.target.riscv.feature_relax, }; -const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ - &std.target.x86.feature_cmov, - &std.target.x86.feature_cx8, - &std.target.x86.feature_fxsr, - &std.target.x86.feature_mmx, - &std.target.x86.feature_nopl, - &std.target.x86.feature_sse, - &std.target.x86.feature_sse2, - &std.target.x86.feature_slowUnalignedMem16, - &std.target.x86.feature_x87, -}; - // Same as above but without sse. const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{ &std.target.x86.feature_cmov, diff --git a/lib/std/target.zig b/lib/std/target.zig index 263167d738c39e5eddd5a0df1af7db7243255ac4..350387bd8a6524f0cf25fce3794d2a96bb46cf3b 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -401,25 +401,25 @@ pub const Target = union(enum) { } /// All CPU features Zig is aware of, sorted lexicographically by name. - pub fn allFeaturesList(arch: Arch) []const *const Cpu.Feature { + pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.all_features, - .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_features, - .avr => avr.all_features, - .bpfel, .bpfeb => bpf.all_features, - .hexagon => hexagon.all_features, - .mips, .mipsel, .mips64, .mips64el => mips.all_features, - .msp430 => msp430.all_features, - .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, - .amdgcn => amdgpu.all_features, - .riscv32, .riscv64 => riscv.all_features, - .sparc, .sparcv9, .sparcel => sparc.all_features, - .s390x => systemz.all_features, - .i386, .x86_64 => x86.all_features, - .nvptx, .nvptx64 => nvptx.all_features, - .wasm32, .wasm64 => wasm.all_features, + // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_features, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, + // TODO .avr => avr.all_features, + // TODO .bpfel, .bpfeb => bpf.all_features, + // TODO .hexagon => hexagon.all_features, + // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_features, + // TODO .msp430 => msp430.all_features, + // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, + // TODO .amdgcn => amdgpu.all_features, + // TODO .riscv32, .riscv64 => riscv.all_features, + // TODO .sparc, .sparcv9, .sparcel => sparc.all_features, + // TODO .s390x => systemz.all_features, + .i386, .x86_64 => &x86.all_features, + // TODO .nvptx, .nvptx64 => nvptx.all_features, + // TODO .wasm32, .wasm64 => wasm.all_features, - else => &[0]*const Cpu.Feature{}, + else => &[0]Cpu.Feature{}, }; } @@ -427,23 +427,24 @@ pub const Target = union(enum) { /// of features that is expected to be supported on most available hardware. pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set { return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.baseline_features, + // TODO .arm, .armeb, .thumb, .thumbeb => arm.baseline_features, .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features, - .avr => avr.baseline_features, - .bpfel, .bpfeb => bpf.baseline_features, - .hexagon => hexagon.baseline_features, - .mips, .mipsel, .mips64, .mips64el => mips.baseline_features, - .msp430 => msp430.baseline_features, - .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features, - .amdgcn => amdgpu.baseline_features, - .riscv32, .riscv64 => riscv.baseline_features, - .sparc, .sparcv9, .sparcel => sparc.baseline_features, - .s390x => systemz.baseline_features, - .i386, .x86_64 => x86.baseline_features, - .nvptx, .nvptx64 => nvptx.baseline_features, - .wasm32, .wasm64 => wasm.baseline_features, + // TODO .avr => avr.baseline_features, + // TODO .bpfel, .bpfeb => bpf.baseline_features, + // TODO .hexagon => hexagon.baseline_features, + // TODO .mips, .mipsel, .mips64, .mips64el => mips.baseline_features, + // TODO .msp430 => msp430.baseline_features, + // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features, + // TODO .amdgcn => amdgpu.baseline_features, + // TODO .riscv32, .riscv64 => riscv.baseline_features, + // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features, + // TODO .s390x => systemz.baseline_features, + .i386 => x86.cpu.pentium4.features, + .x86_64 => x86.cpu.x8664.features, + // TODO .nvptx, .nvptx64 => nvptx.baseline_features, + // TODO .wasm32, .wasm64 => wasm.baseline_features, - else => &[0]*const Cpu.Feature{}, + else => 0, }; } @@ -515,6 +516,22 @@ pub const Target = union(enum) { pub fn isEnabled(set: Set, arch_feature_index: u7) bool { return (set & (@as(Set, 1) << arch_feature_index)) != 0; } + + pub fn feature_set_fns(comptime F: type) type { + return struct { + pub fn featureSet(features: []const F) Set { + var x: Set = 0; + for (features) |feature| { + x |= @as(Set, 1) << @enumToInt(feature); + } + return x; + } + + pub fn featureSetHas(set: Set, feature: F) bool { + return (set & (@as(Set, 1) << @enumToInt(feature))) != 0; + } + }; + } }; }; diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 77d8c986c9cea7a0c32fc83be2a1464af34b265b..f0238bf8f4a4eb6b87eedcc52176ac595e1114f6 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -123,21 +123,11 @@ pub const Feature = enum { zcz_gp, }; -pub fn featureSet(features: []const Feature) Cpu.Feature.Set { - var x: Cpu.Feature.Set = 0; - for (features) |feature| { - x |= 1 << @enumToInt(feature); - } - return x; -} - -pub fn featureSetHas(set: Feature.Set, feature: Feature) bool { - return (set & (1 << @enumToInt(feature))) != 0; -} +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Feature.Set).Int.bits); + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index e755d2cd88bde7e4ffdc9adaf383bf8119034076..021c940dbde4edac16b4d5bb8cda4117edc13ea2 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -1,3338 +1,3388 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_dnow3 = Feature{ - .name = "dnow3", - .llvm_name = "3dnow", - .description = "Enable 3DNow! instructions", - .dependencies = &[_]*const Feature { - &feature_mmx, - }, -}; - -pub const feature_dnowa3 = Feature{ - .name = "dnowa3", - .llvm_name = "3dnowa", - .description = "Enable 3DNow! Athlon instructions", - .dependencies = &[_]*const Feature { - &feature_mmx, - }, -}; - -pub const feature_bit64 = Feature{ - .name = "bit64", - .llvm_name = "64bit", - .description = "Support 64-bit instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_adx = Feature{ - .name = "adx", - .llvm_name = "adx", - .description = "Support ADX instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_aes = Feature{ - .name = "aes", - .llvm_name = "aes", - .description = "Enable AES instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx = Feature{ - .name = "avx", - .llvm_name = "avx", - .description = "Enable AVX instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx2 = Feature{ - .name = "avx2", - .llvm_name = "avx2", - .description = "Enable AVX2 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512f = Feature{ - .name = "avx512f", - .llvm_name = "avx512f", - .description = "Enable AVX-512 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512bf16 = Feature{ - .name = "avx512bf16", - .llvm_name = "avx512bf16", - .description = "Support bfloat16 floating point", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512bitalg = Feature{ - .name = "avx512bitalg", - .llvm_name = "avx512bitalg", - .description = "Enable AVX-512 Bit Algorithms", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_bmi = Feature{ - .name = "bmi", - .llvm_name = "bmi", - .description = "Support BMI instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bmi2 = Feature{ - .name = "bmi2", - .llvm_name = "bmi2", - .description = "Support BMI2 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avx512bw = Feature{ - .name = "avx512bw", - .llvm_name = "avx512bw", - .description = "Enable AVX-512 Byte and Word Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_branchfusion = Feature{ - .name = "branchfusion", - .llvm_name = "branchfusion", - .description = "CMP/TEST can be fused with conditional branches", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avx512cd = Feature{ - .name = "avx512cd", - .llvm_name = "avx512cd", - .description = "Enable AVX-512 Conflict Detection Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_cldemote = Feature{ - .name = "cldemote", - .llvm_name = "cldemote", - .description = "Enable Cache Demote", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_clflushopt = Feature{ - .name = "clflushopt", - .llvm_name = "clflushopt", - .description = "Flush A Cache Line Optimized", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_clwb = Feature{ - .name = "clwb", - .llvm_name = "clwb", - .description = "Cache Line Write Back", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_clzero = Feature{ - .name = "clzero", - .llvm_name = "clzero", - .description = "Enable Cache Line Zero", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cmov = Feature{ - .name = "cmov", - .llvm_name = "cmov", - .description = "Enable conditional move instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cx8 = Feature{ - .name = "cx8", - .llvm_name = "cx8", - .description = "Support CMPXCHG8B instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cx16 = Feature{ - .name = "cx16", - .llvm_name = "cx16", - .description = "64-bit with cmpxchg16b", - .dependencies = &[_]*const Feature { - &feature_cx8, - }, -}; - -pub const feature_avx512dq = Feature{ - .name = "avx512dq", - .llvm_name = "avx512dq", - .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_enqcmd = Feature{ - .name = "enqcmd", - .llvm_name = "enqcmd", - .description = "Has ENQCMD instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avx512er = Feature{ - .name = "avx512er", - .llvm_name = "avx512er", - .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_ermsb = Feature{ - .name = "ermsb", - .llvm_name = "ermsb", - .description = "REP MOVS/STOS are fast", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_f16c = Feature{ - .name = "f16c", - .llvm_name = "f16c", - .description = "Support 16-bit floating point conversion instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_fma = Feature{ - .name = "fma", - .llvm_name = "fma", - .description = "Enable three-operand fused multiple-add", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_fma4 = Feature{ - .name = "fma4", - .llvm_name = "fma4", - .description = "Enable four-operand fused multiple-add", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_fsgsbase = Feature{ - .name = "fsgsbase", - .llvm_name = "fsgsbase", - .description = "Support FS/GS Base instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fxsr = Feature{ - .name = "fxsr", - .llvm_name = "fxsr", - .description = "Support fxsave/fxrestore instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fast11bytenop = Feature{ - .name = "fast11bytenop", - .llvm_name = "fast-11bytenop", - .description = "Target can quickly decode up to 11 byte NOPs", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fast15bytenop = Feature{ - .name = "fast15bytenop", - .llvm_name = "fast-15bytenop", - .description = "Target can quickly decode up to 15 byte NOPs", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastBextr = Feature{ - .name = "fastBextr", - .llvm_name = "fast-bextr", - .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastHops = Feature{ - .name = "fastHops", - .llvm_name = "fast-hops", - .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_fastLzcnt = Feature{ - .name = "fastLzcnt", - .llvm_name = "fast-lzcnt", - .description = "LZCNT instructions are as fast as most simple integer ops", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastPartialYmmOrZmmWrite = Feature{ - .name = "fastPartialYmmOrZmmWrite", - .llvm_name = "fast-partial-ymm-or-zmm-write", - .description = "Partial writes to YMM/ZMM registers are fast", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastShldRotate = Feature{ - .name = "fastShldRotate", - .llvm_name = "fast-shld-rotate", - .description = "SHLD can be used as a faster rotate", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastScalarFsqrt = Feature{ - .name = "fastScalarFsqrt", - .llvm_name = "fast-scalar-fsqrt", - .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastScalarShiftMasks = Feature{ - .name = "fastScalarShiftMasks", - .llvm_name = "fast-scalar-shift-masks", - .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastVariableShuffle = Feature{ - .name = "fastVariableShuffle", - .llvm_name = "fast-variable-shuffle", - .description = "Shuffles with variable masks are fast", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastVectorFsqrt = Feature{ - .name = "fastVectorFsqrt", - .llvm_name = "fast-vector-fsqrt", - .description = "Vector SQRT is fast (disable Newton-Raphson)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastVectorShiftMasks = Feature{ - .name = "fastVectorShiftMasks", - .llvm_name = "fast-vector-shift-masks", - .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gfni = Feature{ - .name = "gfni", - .llvm_name = "gfni", - .description = "Enable Galois Field Arithmetic Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_fastGather = Feature{ - .name = "fastGather", - .llvm_name = "fast-gather", - .description = "Indicates if gather is reasonably fast", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avx512ifma = Feature{ - .name = "avx512ifma", - .llvm_name = "avx512ifma", - .description = "Enable AVX-512 Integer Fused Multiple-Add", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_invpcid = Feature{ - .name = "invpcid", - .llvm_name = "invpcid", - .description = "Invalidate Process-Context Identifier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sahf = Feature{ - .name = "sahf", - .llvm_name = "sahf", - .description = "Support LAHF and SAHF instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_leaSp = Feature{ - .name = "leaSp", - .llvm_name = "lea-sp", - .description = "Use LEA for adjusting the stack pointer", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_leaUsesAg = Feature{ - .name = "leaUsesAg", - .llvm_name = "lea-uses-ag", - .description = "LEA instruction needs inputs at AG stage", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lwp = Feature{ - .name = "lwp", - .llvm_name = "lwp", - .description = "Enable LWP instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lzcnt = Feature{ - .name = "lzcnt", - .llvm_name = "lzcnt", - .description = "Support LZCNT instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_falseDepsLzcntTzcnt = Feature{ - .name = "falseDepsLzcntTzcnt", - .llvm_name = "false-deps-lzcnt-tzcnt", - .description = "LZCNT/TZCNT have a false dependency on dest register", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mmx = Feature{ - .name = "mmx", - .llvm_name = "mmx", - .description = "Enable MMX instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_movbe = Feature{ - .name = "movbe", - .llvm_name = "movbe", - .description = "Support MOVBE instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_movdir64b = Feature{ - .name = "movdir64b", - .llvm_name = "movdir64b", - .description = "Support movdir64b instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_movdiri = Feature{ - .name = "movdiri", - .llvm_name = "movdiri", - .description = "Support movdiri instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mpx = Feature{ - .name = "mpx", - .llvm_name = "mpx", - .description = "Support MPX instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mwaitx = Feature{ - .name = "mwaitx", - .llvm_name = "mwaitx", - .description = "Enable MONITORX/MWAITX timer functionality", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_macrofusion = Feature{ - .name = "macrofusion", - .llvm_name = "macrofusion", - .description = "Various instructions can be fused with conditional branches", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mergeToThreewayBranch = Feature{ - .name = "mergeToThreewayBranch", - .llvm_name = "merge-to-threeway-branch", - .description = "Merge branches to a three-way conditional branch", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nopl = Feature{ - .name = "nopl", - .llvm_name = "nopl", - .description = "Enable NOPL instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_pclmul = Feature{ - .name = "pclmul", - .llvm_name = "pclmul", - .description = "Enable packed carry-less multiplication instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_pconfig = Feature{ - .name = "pconfig", - .llvm_name = "pconfig", - .description = "platform configuration instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avx512pf = Feature{ - .name = "avx512pf", - .llvm_name = "avx512pf", - .description = "Enable AVX-512 PreFetch Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_pku = Feature{ - .name = "pku", - .llvm_name = "pku", - .description = "Enable protection keys", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_popcnt = Feature{ - .name = "popcnt", - .llvm_name = "popcnt", - .description = "Support POPCNT instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_falseDepsPopcnt = Feature{ - .name = "falseDepsPopcnt", - .llvm_name = "false-deps-popcnt", - .description = "POPCNT has a false dependency on dest register", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_prefetchwt1 = Feature{ - .name = "prefetchwt1", - .llvm_name = "prefetchwt1", - .description = "Prefetch with Intent to Write and T1 Hint", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_prfchw = Feature{ - .name = "prfchw", - .llvm_name = "prfchw", - .description = "Support PRFCHW instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptwrite = Feature{ - .name = "ptwrite", - .llvm_name = "ptwrite", - .description = "Support ptwrite instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_padShortFunctions = Feature{ - .name = "padShortFunctions", - .llvm_name = "pad-short-functions", - .description = "Pad short functions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_prefer256Bit = Feature{ - .name = "prefer256Bit", - .llvm_name = "prefer-256-bit", - .description = "Prefer 256-bit AVX instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rdpid = Feature{ - .name = "rdpid", - .llvm_name = "rdpid", - .description = "Support RDPID instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rdrnd = Feature{ - .name = "rdrnd", - .llvm_name = "rdrnd", - .description = "Support RDRAND instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rdseed = Feature{ - .name = "rdseed", - .llvm_name = "rdseed", - .description = "Support RDSEED instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rtm = Feature{ - .name = "rtm", - .llvm_name = "rtm", - .description = "Support RTM instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_retpoline = Feature{ - .name = "retpoline", - .llvm_name = "retpoline", - .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", - .dependencies = &[_]*const Feature { - &feature_retpolineIndirectCalls, - &feature_retpolineIndirectBranches, - }, -}; - -pub const feature_retpolineExternalThunk = Feature{ - .name = "retpolineExternalThunk", - .llvm_name = "retpoline-external-thunk", - .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", - .dependencies = &[_]*const Feature { - &feature_retpolineIndirectCalls, - }, -}; - -pub const feature_retpolineIndirectBranches = Feature{ - .name = "retpolineIndirectBranches", - .llvm_name = "retpoline-indirect-branches", - .description = "Remove speculation of indirect branches from the generated code", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_retpolineIndirectCalls = Feature{ - .name = "retpolineIndirectCalls", - .llvm_name = "retpoline-indirect-calls", - .description = "Remove speculation of indirect calls from the generated code", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sgx = Feature{ - .name = "sgx", - .llvm_name = "sgx", - .description = "Enable Software Guard Extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sha = Feature{ - .name = "sha", - .llvm_name = "sha", - .description = "Enable SHA instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_shstk = Feature{ - .name = "shstk", - .llvm_name = "shstk", - .description = "Support CET Shadow-Stack instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sse = Feature{ - .name = "sse", - .llvm_name = "sse", - .description = "Enable SSE instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sse2 = Feature{ - .name = "sse2", - .llvm_name = "sse2", - .description = "Enable SSE2 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_sse3 = Feature{ - .name = "sse3", - .llvm_name = "sse3", - .description = "Enable SSE3 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_sse4a = Feature{ - .name = "sse4a", - .llvm_name = "sse4a", - .description = "Support SSE 4a instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_sse41 = Feature{ - .name = "sse41", - .llvm_name = "sse4.1", - .description = "Enable SSE 4.1 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_sse42 = Feature{ - .name = "sse42", - .llvm_name = "sse4.2", - .description = "Enable SSE 4.2 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_sseUnalignedMem = Feature{ - .name = "sseUnalignedMem", - .llvm_name = "sse-unaligned-mem", - .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ssse3 = Feature{ - .name = "ssse3", - .llvm_name = "ssse3", - .description = "Enable SSSE3 instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_slow3opsLea = Feature{ - .name = "slow3opsLea", - .llvm_name = "slow-3ops-lea", - .description = "LEA instruction with 3 ops or certain registers is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_idivlToDivb = Feature{ - .name = "idivlToDivb", - .llvm_name = "idivl-to-divb", - .description = "Use 8-bit divide for positive values less than 256", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_idivqToDivl = Feature{ - .name = "idivqToDivl", - .llvm_name = "idivq-to-divl", - .description = "Use 32-bit divide for positive values less than 2^32", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowIncdec = Feature{ - .name = "slowIncdec", - .llvm_name = "slow-incdec", - .description = "INC and DEC instructions are slower than ADD and SUB", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowLea = Feature{ - .name = "slowLea", - .llvm_name = "slow-lea", - .description = "LEA instruction with certain arguments is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowPmaddwd = Feature{ - .name = "slowPmaddwd", - .llvm_name = "slow-pmaddwd", - .description = "PMADDWD is slower than PMULLD", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowPmulld = Feature{ - .name = "slowPmulld", - .llvm_name = "slow-pmulld", - .description = "PMULLD instruction is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowShld = Feature{ - .name = "slowShld", - .llvm_name = "slow-shld", - .description = "SHLD instruction is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowTwoMemOps = Feature{ - .name = "slowTwoMemOps", - .llvm_name = "slow-two-mem-ops", - .description = "Two memory operand instructions are slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowUnalignedMem16 = Feature{ - .name = "slowUnalignedMem16", - .llvm_name = "slow-unaligned-mem-16", - .description = "Slow unaligned 16-byte memory access", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowUnalignedMem32 = Feature{ - .name = "slowUnalignedMem32", - .llvm_name = "slow-unaligned-mem-32", - .description = "Slow unaligned 32-byte memory access", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_softFloat = Feature{ - .name = "softFloat", - .llvm_name = "soft-float", - .description = "Use software floating point features", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tbm = Feature{ - .name = "tbm", - .llvm_name = "tbm", - .description = "Enable TBM instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vaes = Feature{ - .name = "vaes", - .llvm_name = "vaes", - .description = "Promote selected AES instructions to AVX512/AVX registers", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vbmi = Feature{ - .name = "avx512vbmi", - .llvm_name = "avx512vbmi", - .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vbmi2 = Feature{ - .name = "avx512vbmi2", - .llvm_name = "avx512vbmi2", - .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vl = Feature{ - .name = "avx512vl", - .llvm_name = "avx512vl", - .description = "Enable AVX-512 Vector Length eXtensions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vnni = Feature{ - .name = "avx512vnni", - .llvm_name = "avx512vnni", - .description = "Enable AVX-512 Vector Neural Network Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vp2intersect = Feature{ - .name = "avx512vp2intersect", - .llvm_name = "avx512vp2intersect", - .description = "Enable AVX-512 vp2intersect", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_vpclmulqdq = Feature{ - .name = "vpclmulqdq", - .llvm_name = "vpclmulqdq", - .description = "Enable vpclmulqdq instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_avx512vpopcntdq = Feature{ - .name = "avx512vpopcntdq", - .llvm_name = "avx512vpopcntdq", - .description = "Enable AVX-512 Population Count Instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_waitpkg = Feature{ - .name = "waitpkg", - .llvm_name = "waitpkg", - .description = "Wait and pause enhancements", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_wbnoinvd = Feature{ - .name = "wbnoinvd", - .llvm_name = "wbnoinvd", - .description = "Write Back No Invalidate", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_x87 = Feature{ - .name = "x87", - .llvm_name = "x87", - .description = "Enable X87 float instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_xop = Feature{ - .name = "xop", - .llvm_name = "xop", - .description = "Enable XOP instructions", - .dependencies = &[_]*const Feature { - &feature_sse, - }, -}; - -pub const feature_xsave = Feature{ - .name = "xsave", - .llvm_name = "xsave", - .description = "Support xsave instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_xsavec = Feature{ - .name = "xsavec", - .llvm_name = "xsavec", - .description = "Support xsavec instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_xsaveopt = Feature{ - .name = "xsaveopt", - .llvm_name = "xsaveopt", - .description = "Support xsaveopt instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_xsaves = Feature{ - .name = "xsaves", - .llvm_name = "xsaves", - .description = "Support xsaves instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bitMode16 = Feature{ - .name = "bitMode16", - .llvm_name = "16bit-mode", - .description = "16-bit mode (i8086)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bitMode32 = Feature{ - .name = "bitMode32", - .llvm_name = "32bit-mode", - .description = "32-bit mode (80386)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bitMode64 = Feature{ - .name = "bitMode64", - .llvm_name = "64bit-mode", - .description = "64-bit mode (x86_64)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_dnow3, - &feature_dnowa3, - &feature_bit64, - &feature_adx, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_avx512bf16, - &feature_avx512bitalg, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_branchfusion, - &feature_avx512cd, - &feature_cldemote, - &feature_clflushopt, - &feature_clwb, - &feature_clzero, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_enqcmd, - &feature_avx512er, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fma4, - &feature_fsgsbase, - &feature_fxsr, - &feature_fast11bytenop, - &feature_fast15bytenop, - &feature_fastBextr, - &feature_fastHops, - &feature_fastLzcnt, - &feature_fastPartialYmmOrZmmWrite, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastScalarShiftMasks, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastVectorShiftMasks, - &feature_gfni, - &feature_fastGather, - &feature_avx512ifma, - &feature_invpcid, - &feature_sahf, - &feature_leaSp, - &feature_leaUsesAg, - &feature_lwp, - &feature_lzcnt, - &feature_falseDepsLzcntTzcnt, - &feature_mmx, - &feature_movbe, - &feature_movdir64b, - &feature_movdiri, - &feature_mpx, - &feature_mwaitx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pconfig, - &feature_avx512pf, - &feature_pku, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prefetchwt1, - &feature_prfchw, - &feature_ptwrite, - &feature_padShortFunctions, - &feature_prefer256Bit, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_rtm, - &feature_retpoline, - &feature_retpolineExternalThunk, - &feature_retpolineIndirectBranches, - &feature_retpolineIndirectCalls, - &feature_sgx, - &feature_sha, - &feature_shstk, - &feature_sse, - &feature_sse2, - &feature_sse3, - &feature_sse4a, - &feature_sse41, - &feature_sse42, - &feature_sseUnalignedMem, - &feature_ssse3, - &feature_slow3opsLea, - &feature_idivlToDivb, - &feature_idivqToDivl, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowPmaddwd, - &feature_slowPmulld, - &feature_slowShld, - &feature_slowTwoMemOps, - &feature_slowUnalignedMem16, - &feature_slowUnalignedMem32, - &feature_softFloat, - &feature_tbm, - &feature_vaes, - &feature_avx512vbmi, - &feature_avx512vbmi2, - &feature_avx512vl, - &feature_avx512vnni, - &feature_avx512vp2intersect, - &feature_vpclmulqdq, - &feature_avx512vpopcntdq, - &feature_waitpkg, - &feature_wbnoinvd, - &feature_x87, - &feature_xop, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - &feature_bitMode16, - &feature_bitMode32, - &feature_bitMode64, -}; - -pub const cpu_amdfam10 = Cpu{ - .name = "amdfam10", - .llvm_name = "amdfam10", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_nopl, - &feature_popcnt, - &feature_sse, - &feature_sse4a, - &feature_slowShld, - &feature_x87, - }, -}; - -pub const cpu_athlon = Cpu{ - .name = "athlon", - .llvm_name = "athlon", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cmov, - &feature_cx8, - &feature_nopl, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlon4 = Cpu{ - .name = "athlon4", - .llvm_name = "athlon-4", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_nopl, - &feature_sse, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlonFx = Cpu{ - .name = "athlonFx", - .llvm_name = "athlon-fx", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlonMp = Cpu{ - .name = "athlonMp", - .llvm_name = "athlon-mp", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_nopl, - &feature_sse, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlonTbird = Cpu{ - .name = "athlonTbird", - .llvm_name = "athlon-tbird", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cmov, - &feature_cx8, - &feature_nopl, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlonXp = Cpu{ - .name = "athlonXp", - .llvm_name = "athlon-xp", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_nopl, - &feature_sse, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlon64 = Cpu{ - .name = "athlon64", - .llvm_name = "athlon64", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_athlon64Sse3 = Cpu{ - .name = "athlon64Sse3", - .llvm_name = "athlon64-sse3", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_atom = Cpu{ - .name = "atom", - .llvm_name = "atom", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_leaSp, - &feature_leaUsesAg, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_padShortFunctions, - &feature_sse, - &feature_ssse3, - &feature_idivlToDivb, - &feature_idivqToDivl, - &feature_slowTwoMemOps, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_barcelona = Cpu{ - .name = "barcelona", - .llvm_name = "barcelona", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_nopl, - &feature_popcnt, - &feature_sse, - &feature_sse4a, - &feature_slowShld, - &feature_x87, - }, -}; - -pub const cpu_bdver1 = Cpu{ - .name = "bdver1", - .llvm_name = "bdver1", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_branchfusion, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fast11bytenop, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lwp, - &feature_lzcnt, - &feature_mmx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_slowShld, - &feature_x87, - &feature_xop, - &feature_xsave, - }, -}; - -pub const cpu_bdver2 = Cpu{ - .name = "bdver2", - .llvm_name = "bdver2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_bmi, - &feature_branchfusion, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fma, - &feature_fxsr, - &feature_fast11bytenop, - &feature_fastBextr, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lwp, - &feature_lzcnt, - &feature_mmx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_slowShld, - &feature_tbm, - &feature_x87, - &feature_xop, - &feature_xsave, - }, -}; - -pub const cpu_bdver3 = Cpu{ - .name = "bdver3", - .llvm_name = "bdver3", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_bmi, - &feature_branchfusion, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fast11bytenop, - &feature_fastBextr, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lwp, - &feature_lzcnt, - &feature_mmx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_slowShld, - &feature_tbm, - &feature_x87, - &feature_xop, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_bdver4 = Cpu{ - .name = "bdver4", - .llvm_name = "bdver4", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_branchfusion, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fast11bytenop, - &feature_fastBextr, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lwp, - &feature_lzcnt, - &feature_mmx, - &feature_mwaitx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_slowShld, - &feature_tbm, - &feature_x87, - &feature_xop, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_bonnell = Cpu{ - .name = "bonnell", - .llvm_name = "bonnell", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_leaSp, - &feature_leaUsesAg, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_padShortFunctions, - &feature_sse, - &feature_ssse3, - &feature_idivlToDivb, - &feature_idivqToDivl, - &feature_slowTwoMemOps, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_broadwell = Cpu{ - .name = "broadwell", - .llvm_name = "broadwell", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_avx, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_falseDepsLzcntTzcnt, - &feature_mmx, - &feature_movbe, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_btver1 = Cpu{ - .name = "btver1", - .llvm_name = "btver1", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fast15bytenop, - &feature_fastScalarShiftMasks, - &feature_fastVectorShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_nopl, - &feature_popcnt, - &feature_prfchw, - &feature_sse, - &feature_sse4a, - &feature_ssse3, - &feature_slowShld, - &feature_x87, - }, -}; - -pub const cpu_btver2 = Cpu{ - .name = "btver2", - .llvm_name = "btver2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_bmi, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fxsr, - &feature_fast15bytenop, - &feature_fastBextr, - &feature_fastHops, - &feature_fastLzcnt, - &feature_fastPartialYmmOrZmmWrite, - &feature_fastScalarShiftMasks, - &feature_fastVectorShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_sse4a, - &feature_ssse3, - &feature_slowShld, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_c3 = Cpu{ - .name = "c3", - .llvm_name = "c3", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnow3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_c32 = Cpu{ - .name = "c32", - .llvm_name = "c3-2", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_sse, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_cannonlake = Cpu{ - .name = "cannonlake", - .llvm_name = "cannonlake", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_avx512ifma, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_avx512vbmi, - &feature_avx512vl, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_cascadelake = Cpu{ - .name = "cascadelake", - .llvm_name = "cascadelake", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_avx512vl, - &feature_avx512vnni, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_cooperlake = Cpu{ - .name = "cooperlake", - .llvm_name = "cooperlake", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_avx512bf16, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_avx512vl, - &feature_avx512vnni, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_coreAvxI = Cpu{ - .name = "coreAvxI", - .llvm_name = "core-avx-i", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_rdrnd, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowUnalignedMem32, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_coreAvx2 = Cpu{ - .name = "coreAvx2", - .llvm_name = "core-avx2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_falseDepsLzcntTzcnt, - &feature_mmx, - &feature_movbe, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_rdrnd, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_core2 = Cpu{ - .name = "core2", - .llvm_name = "core2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_sse, - &feature_ssse3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_corei7 = Cpu{ - .name = "corei7", - .llvm_name = "corei7", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_popcnt, - &feature_sse, - &feature_sse42, - &feature_x87, - }, -}; - -pub const cpu_corei7Avx = Cpu{ - .name = "corei7Avx", - .llvm_name = "corei7-avx", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowUnalignedMem32, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_geode = Cpu{ - .name = "geode", - .llvm_name = "geode", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_goldmont = Cpu{ - .name = "goldmont", - .llvm_name = "goldmont", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_clflushopt, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fsgsbase, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sha, - &feature_sse42, - &feature_ssse3, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowTwoMemOps, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_goldmontPlus = Cpu{ - .name = "goldmontPlus", - .llvm_name = "goldmont-plus", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_clflushopt, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fsgsbase, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_ptwrite, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_sse42, - &feature_ssse3, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowTwoMemOps, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_haswell = Cpu{ - .name = "haswell", - .llvm_name = "haswell", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_falseDepsLzcntTzcnt, - &feature_mmx, - &feature_movbe, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_rdrnd, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_i386 = Cpu{ - .name = "i386", - .llvm_name = "i386", - .dependencies = &[_]*const Feature { - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_i486 = Cpu{ - .name = "i486", - .llvm_name = "i486", - .dependencies = &[_]*const Feature { - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_i586 = Cpu{ - .name = "i586", - .llvm_name = "i586", - .dependencies = &[_]*const Feature { - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_i686 = Cpu{ - .name = "i686", - .llvm_name = "i686", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_icelakeClient = Cpu{ - .name = "icelakeClient", - .llvm_name = "icelake-client", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_avx512bitalg, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_gfni, - &feature_fastGather, - &feature_avx512ifma, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_prfchw, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_vaes, - &feature_avx512vbmi, - &feature_avx512vbmi2, - &feature_avx512vl, - &feature_avx512vnni, - &feature_vpclmulqdq, - &feature_avx512vpopcntdq, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_icelakeServer = Cpu{ - .name = "icelakeServer", - .llvm_name = "icelake-server", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_avx512bitalg, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_gfni, - &feature_fastGather, - &feature_avx512ifma, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pconfig, - &feature_pku, - &feature_popcnt, - &feature_prfchw, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_vaes, - &feature_avx512vbmi, - &feature_avx512vbmi2, - &feature_avx512vl, - &feature_avx512vnni, - &feature_vpclmulqdq, - &feature_avx512vpopcntdq, - &feature_wbnoinvd, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_ivybridge = Cpu{ - .name = "ivybridge", - .llvm_name = "ivybridge", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_rdrnd, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowUnalignedMem32, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_k6 = Cpu{ - .name = "k6", - .llvm_name = "k6", - .dependencies = &[_]*const Feature { - &feature_cx8, - &feature_mmx, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_k62 = Cpu{ - .name = "k62", - .llvm_name = "k6-2", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnow3, - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_k63 = Cpu{ - .name = "k63", - .llvm_name = "k6-3", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnow3, - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_k8 = Cpu{ - .name = "k8", - .llvm_name = "k8", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_k8Sse3 = Cpu{ - .name = "k8Sse3", - .llvm_name = "k8-sse3", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_knl = Cpu{ - .name = "knl", - .llvm_name = "knl", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512cd, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512er, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastPartialYmmOrZmmWrite, - &feature_fastGather, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_pclmul, - &feature_avx512pf, - &feature_popcnt, - &feature_prefetchwt1, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowIncdec, - &feature_slowPmaddwd, - &feature_slowTwoMemOps, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_knm = Cpu{ - .name = "knm", - .llvm_name = "knm", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512cd, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512er, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastPartialYmmOrZmmWrite, - &feature_fastGather, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_pclmul, - &feature_avx512pf, - &feature_popcnt, - &feature_prefetchwt1, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowIncdec, - &feature_slowPmaddwd, - &feature_slowTwoMemOps, - &feature_avx512vpopcntdq, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_lakemont = Cpu{ - .name = "lakemont", - .llvm_name = "lakemont", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_nehalem = Cpu{ - .name = "nehalem", - .llvm_name = "nehalem", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_popcnt, - &feature_sse, - &feature_sse42, - &feature_x87, - }, -}; - -pub const cpu_nocona = Cpu{ - .name = "nocona", - .llvm_name = "nocona", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_opteron = Cpu{ - .name = "opteron", - .llvm_name = "opteron", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_opteronSse3 = Cpu{ - .name = "opteronSse3", - .llvm_name = "opteron-sse3", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnowa3, - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastScalarShiftMasks, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowShld, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_penryn = Cpu{ - .name = "penryn", - .llvm_name = "penryn", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_sse, - &feature_sse41, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium = Cpu{ - .name = "pentium", - .llvm_name = "pentium", - .dependencies = &[_]*const Feature { - &feature_cx8, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentiumM = Cpu{ - .name = "pentiumM", - .llvm_name = "pentium-m", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentiumMmx = Cpu{ - .name = "pentiumMmx", - .llvm_name = "pentium-mmx", - .dependencies = &[_]*const Feature { - &feature_cx8, - &feature_mmx, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium2 = Cpu{ - .name = "pentium2", - .llvm_name = "pentium2", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium3 = Cpu{ - .name = "pentium3", - .llvm_name = "pentium3", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium3m = Cpu{ - .name = "pentium3m", - .llvm_name = "pentium3m", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium4 = Cpu{ - .name = "pentium4", - .llvm_name = "pentium4", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentium4m = Cpu{ - .name = "pentium4m", - .llvm_name = "pentium4m", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_pentiumpro = Cpu{ - .name = "pentiumpro", - .llvm_name = "pentiumpro", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_nopl, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_prescott = Cpu{ - .name = "prescott", - .llvm_name = "prescott", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_sandybridge = Cpu{ - .name = "sandybridge", - .llvm_name = "sandybridge", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_avx, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_slowUnalignedMem32, - &feature_x87, - &feature_xsave, - &feature_xsaveopt, - }, -}; - -pub const cpu_silvermont = Cpu{ - .name = "silvermont", - .llvm_name = "silvermont", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_sse, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_sse42, - &feature_ssse3, - &feature_idivqToDivl, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowPmulld, - &feature_slowTwoMemOps, - &feature_x87, - }, -}; - -pub const cpu_skx = Cpu{ - .name = "skx", - .llvm_name = "skx", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_avx512vl, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_skylake = Cpu{ - .name = "skylake", - .llvm_name = "skylake", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_clflushopt, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_skylakeAvx512 = Cpu{ - .name = "skylakeAvx512", - .llvm_name = "skylake-avx512", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx, - &feature_avx2, - &feature_avx512f, - &feature_bmi, - &feature_bmi2, - &feature_avx512bw, - &feature_avx512cd, - &feature_clflushopt, - &feature_clwb, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_avx512dq, - &feature_ermsb, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fastShldRotate, - &feature_fastScalarFsqrt, - &feature_fastVariableShuffle, - &feature_fastVectorFsqrt, - &feature_fastGather, - &feature_invpcid, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mpx, - &feature_macrofusion, - &feature_mergeToThreewayBranch, - &feature_nopl, - &feature_pclmul, - &feature_pku, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sse42, - &feature_slow3opsLea, - &feature_idivqToDivl, - &feature_avx512vl, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_slm = Cpu{ - .name = "slm", - .llvm_name = "slm", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_movbe, - &feature_nopl, - &feature_sse, - &feature_pclmul, - &feature_popcnt, - &feature_falseDepsPopcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_sse42, - &feature_ssse3, - &feature_idivqToDivl, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowPmulld, - &feature_slowTwoMemOps, - &feature_x87, - }, -}; - -pub const cpu_tremont = Cpu{ - .name = "tremont", - .llvm_name = "tremont", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_sse, - &feature_aes, - &feature_cldemote, - &feature_clflushopt, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fsgsbase, - &feature_fxsr, - &feature_gfni, - &feature_sahf, - &feature_mmx, - &feature_movbe, - &feature_movdir64b, - &feature_movdiri, - &feature_mpx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_ptwrite, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sgx, - &feature_sha, - &feature_sse42, - &feature_ssse3, - &feature_slowIncdec, - &feature_slowLea, - &feature_slowTwoMemOps, - &feature_waitpkg, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_westmere = Cpu{ - .name = "westmere", - .llvm_name = "westmere", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_fxsr, - &feature_sahf, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_sse, - &feature_pclmul, - &feature_popcnt, - &feature_sse42, - &feature_x87, - }, -}; - -pub const cpu_winchipC6 = Cpu{ - .name = "winchipC6", - .llvm_name = "winchip-c6", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_winchip2 = Cpu{ - .name = "winchip2", - .llvm_name = "winchip2", - .dependencies = &[_]*const Feature { - &feature_mmx, - &feature_dnow3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_x8664 = Cpu{ - .name = "x8664", - .llvm_name = "x86-64", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_macrofusion, - &feature_nopl, - &feature_sse, - &feature_sse2, - &feature_slow3opsLea, - &feature_slowIncdec, - &feature_x87, - }, -}; - -pub const cpu_yonah = Cpu{ - .name = "yonah", - .llvm_name = "yonah", - .dependencies = &[_]*const Feature { - &feature_cmov, - &feature_cx8, - &feature_fxsr, - &feature_mmx, - &feature_nopl, - &feature_sse, - &feature_sse3, - &feature_slowUnalignedMem16, - &feature_x87, - }, -}; - -pub const cpu_znver1 = Cpu{ - .name = "znver1", - .llvm_name = "znver1", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_branchfusion, - &feature_clflushopt, - &feature_clzero, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fast15bytenop, - &feature_fastBextr, - &feature_fastLzcnt, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mwaitx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_rdrnd, - &feature_rdseed, - &feature_sha, - &feature_sse4a, - &feature_slowShld, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpu_znver2 = Cpu{ - .name = "znver2", - .llvm_name = "znver2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_adx, - &feature_sse, - &feature_aes, - &feature_avx2, - &feature_bmi, - &feature_bmi2, - &feature_branchfusion, - &feature_clflushopt, - &feature_clwb, - &feature_clzero, - &feature_cmov, - &feature_cx8, - &feature_cx16, - &feature_f16c, - &feature_fma, - &feature_fsgsbase, - &feature_fxsr, - &feature_fast15bytenop, - &feature_fastBextr, - &feature_fastLzcnt, - &feature_fastScalarShiftMasks, - &feature_sahf, - &feature_lzcnt, - &feature_mmx, - &feature_movbe, - &feature_mwaitx, - &feature_nopl, - &feature_pclmul, - &feature_popcnt, - &feature_prfchw, - &feature_rdpid, - &feature_rdrnd, - &feature_rdseed, - &feature_sha, - &feature_sse4a, - &feature_slowShld, - &feature_wbnoinvd, - &feature_x87, - &feature_xsave, - &feature_xsavec, - &feature_xsaveopt, - &feature_xsaves, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_amdfam10, - &cpu_athlon, - &cpu_athlon4, - &cpu_athlonFx, - &cpu_athlonMp, - &cpu_athlonTbird, - &cpu_athlonXp, - &cpu_athlon64, - &cpu_athlon64Sse3, - &cpu_atom, - &cpu_barcelona, - &cpu_bdver1, - &cpu_bdver2, - &cpu_bdver3, - &cpu_bdver4, - &cpu_bonnell, - &cpu_broadwell, - &cpu_btver1, - &cpu_btver2, - &cpu_c3, - &cpu_c32, - &cpu_cannonlake, - &cpu_cascadelake, - &cpu_cooperlake, - &cpu_coreAvxI, - &cpu_coreAvx2, - &cpu_core2, - &cpu_corei7, - &cpu_corei7Avx, - &cpu_generic, - &cpu_geode, - &cpu_goldmont, - &cpu_goldmontPlus, - &cpu_haswell, - &cpu_i386, - &cpu_i486, - &cpu_i586, - &cpu_i686, - &cpu_icelakeClient, - &cpu_icelakeServer, - &cpu_ivybridge, - &cpu_k6, - &cpu_k62, - &cpu_k63, - &cpu_k8, - &cpu_k8Sse3, - &cpu_knl, - &cpu_knm, - &cpu_lakemont, - &cpu_nehalem, - &cpu_nocona, - &cpu_opteron, - &cpu_opteronSse3, - &cpu_penryn, - &cpu_pentium, - &cpu_pentiumM, - &cpu_pentiumMmx, - &cpu_pentium2, - &cpu_pentium3, - &cpu_pentium3m, - &cpu_pentium4, - &cpu_pentium4m, - &cpu_pentiumpro, - &cpu_prescott, - &cpu_sandybridge, - &cpu_silvermont, - &cpu_skx, - &cpu_skylake, - &cpu_skylakeAvx512, - &cpu_slm, - &cpu_tremont, - &cpu_westmere, - &cpu_winchipC6, - &cpu_winchip2, - &cpu_x8664, - &cpu_yonah, - &cpu_znver1, - &cpu_znver2, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + @"16bit_mode", + @"32bit_mode", + @"3dnow", + @"3dnowa", + @"64bit", + @"64bit_mode", + adx, + aes, + avx, + avx2, + avx512bf16, + avx512bitalg, + avx512bw, + avx512cd, + avx512dq, + avx512er, + avx512f, + avx512ifma, + avx512pf, + avx512vbmi, + avx512vbmi2, + avx512vl, + avx512vnni, + avx512vp2intersect, + avx512vpopcntdq, + bmi, + bmi2, + branchfusion, + cldemote, + clflushopt, + clwb, + clzero, + cmov, + cx16, + cx8, + enqcmd, + ermsb, + f16c, + false_deps_lzcnt_tzcnt, + false_deps_popcnt, + fast_11bytenop, + fast_15bytenop, + fast_bextr, + fast_gather, + fast_hops, + fast_lzcnt, + fast_partial_ymm_or_zmm_write, + fast_scalar_fsqrt, + fast_scalar_shift_masks, + fast_shld_rotate, + fast_variable_shuffle, + fast_vector_fsqrt, + fast_vector_shift_masks, + fma, + fma4, + fsgsbase, + fxsr, + gfni, + idivl_to_divb, + idivq_to_divl, + invpcid, + lea_sp, + lea_uses_ag, + lwp, + lzcnt, + macrofusion, + merge_to_threeway_branch, + mmx, + movbe, + movdir64b, + movdiri, + mpx, + mwaitx, + nopl, + pad_short_functions, + pclmul, + pconfig, + pku, + popcnt, + prefer_256_bit, + prefetchwt1, + prfchw, + ptwrite, + rdpid, + rdrnd, + rdseed, + retpoline, + retpoline_external_thunk, + retpoline_indirect_branches, + retpoline_indirect_calls, + rtm, + sahf, + sgx, + sha, + shstk, + slow_3ops_lea, + slow_incdec, + slow_lea, + slow_pmaddwd, + slow_pmulld, + slow_shld, + slow_two_mem_ops, + slow_unaligned_mem_16, + slow_unaligned_mem_32, + soft_float, + sse, + sse2, + sse3, + sse4_1, + sse4_2, + sse4a, + sse_unaligned_mem, + ssse3, + tbm, + vaes, + vpclmulqdq, + waitpkg, + wbnoinvd, + x87, + xop, + xsave, + xsavec, + xsaveopt, + xsaves, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + + result[@enumToInt(Feature.@"16bit_mode")] = .{ + .index = @enumToInt(Feature.@"16bit_mode"), + .name = @tagName(Feature.@"16bit_mode"), + .llvm_name = "16bit-mode", + .description = "16-bit mode (i8086)", + .dependencies = 0, + }; + + result[@enumToInt(Feature.@"32bit_mode")] = .{ + .index = @enumToInt(Feature.@"32bit_mode"), + .name = @tagName(Feature.@"32bit_mode"), + .llvm_name = "32bit-mode", + .description = "32-bit mode (80386)", + .dependencies = 0, + }; + + result[@enumToInt(Feature.@"3dnow")] = .{ + .index = @enumToInt(Feature.@"3dnow"), + .name = @tagName(Feature.@"3dnow"), + .llvm_name = "3dnow", + .description = "Enable 3DNow! instructions", + .dependencies = featureSet(&[_]Feature{ + .mmx, + }), + }; + + result[@enumToInt(Feature.@"3dnowa")] = .{ + .index = @enumToInt(Feature.@"3dnowa"), + .name = @tagName(Feature.@"3dnowa"), + .llvm_name = "3dnowa", + .description = "Enable 3DNow! Athlon instructions", + .dependencies = featureSet(&[_]Feature{ + .mmx, + }), + }; + + result[@enumToInt(Feature.@"64bit")] = .{ + .index = @enumToInt(Feature.@"64bit"), + .name = @tagName(Feature.@"64bit"), + .llvm_name = "64bit", + .description = "Support 64-bit instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.@"64bit_mode")] = .{ + .index = @enumToInt(Feature.@"64bit_mode"), + .name = @tagName(Feature.@"64bit_mode"), + .llvm_name = "64bit-mode", + .description = "64-bit mode (x86_64)", + .dependencies = 0, + }; + + result[@enumToInt(Feature.adx)] = .{ + .index = @enumToInt(Feature.adx), + .name = @tagName(Feature.adx), + .llvm_name = "adx", + .description = "Support ADX instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.aes)] = .{ + .index = @enumToInt(Feature.aes), + .name = @tagName(Feature.aes), + .llvm_name = "aes", + .description = "Enable AES instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx)] = .{ + .index = @enumToInt(Feature.avx), + .name = @tagName(Feature.avx), + .llvm_name = "avx", + .description = "Enable AVX instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx2)] = .{ + .index = @enumToInt(Feature.avx2), + .name = @tagName(Feature.avx2), + .llvm_name = "avx2", + .description = "Enable AVX2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512f)] = .{ + .index = @enumToInt(Feature.avx512f), + .name = @tagName(Feature.avx512f), + .llvm_name = "avx512f", + .description = "Enable AVX-512 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512bf16)] = .{ + .index = @enumToInt(Feature.avx512bf16), + .name = @tagName(Feature.avx512bf16), + .llvm_name = "avx512bf16", + .description = "Support bfloat16 floating point", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512bitalg)] = .{ + .index = @enumToInt(Feature.avx512bitalg), + .name = @tagName(Feature.avx512bitalg), + .llvm_name = "avx512bitalg", + .description = "Enable AVX-512 Bit Algorithms", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.bmi)] = .{ + .index = @enumToInt(Feature.bmi), + .name = @tagName(Feature.bmi), + .llvm_name = "bmi", + .description = "Support BMI instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.bmi2)] = .{ + .index = @enumToInt(Feature.bmi2), + .name = @tagName(Feature.bmi2), + .llvm_name = "bmi2", + .description = "Support BMI2 instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.avx512bw)] = .{ + .index = @enumToInt(Feature.avx512bw), + .name = @tagName(Feature.avx512bw), + .llvm_name = "avx512bw", + .description = "Enable AVX-512 Byte and Word Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.branchfusion)] = .{ + .index = @enumToInt(Feature.branchfusion), + .name = @tagName(Feature.branchfusion), + .llvm_name = "branchfusion", + .description = "CMP/TEST can be fused with conditional branches", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.avx512cd)] = .{ + .index = @enumToInt(Feature.avx512cd), + .name = @tagName(Feature.avx512cd), + .llvm_name = "avx512cd", + .description = "Enable AVX-512 Conflict Detection Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.cldemote)] = .{ + .index = @enumToInt(Feature.cldemote), + .name = @tagName(Feature.cldemote), + .llvm_name = "cldemote", + .description = "Enable Cache Demote", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.clflushopt)] = .{ + .index = @enumToInt(Feature.clflushopt), + .name = @tagName(Feature.clflushopt), + .llvm_name = "clflushopt", + .description = "Flush A Cache Line Optimized", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.clwb)] = .{ + .index = @enumToInt(Feature.clwb), + .name = @tagName(Feature.clwb), + .llvm_name = "clwb", + .description = "Cache Line Write Back", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.clzero)] = .{ + .index = @enumToInt(Feature.clzero), + .name = @tagName(Feature.clzero), + .llvm_name = "clzero", + .description = "Enable Cache Line Zero", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.cmov)] = .{ + .index = @enumToInt(Feature.cmov), + .name = @tagName(Feature.cmov), + .llvm_name = "cmov", + .description = "Enable conditional move instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.cx8)] = .{ + .index = @enumToInt(Feature.cx8), + .name = @tagName(Feature.cx8), + .llvm_name = "cx8", + .description = "Support CMPXCHG8B instructions", + .dependencies = featureSet(&[_]Feature{}), + }; + + result[@enumToInt(Feature.cx16)] = .{ + .index = @enumToInt(Feature.cx16), + .name = @tagName(Feature.cx16), + .llvm_name = "cx16", + .description = "64-bit with cmpxchg16b", + .dependencies = featureSet(&[_]Feature{ + .cx8, + }), + }; + + result[@enumToInt(Feature.avx512dq)] = .{ + .index = @enumToInt(Feature.avx512dq), + .name = @tagName(Feature.avx512dq), + .llvm_name = "avx512dq", + .description = "Enable AVX-512 Doubleword and Quadword Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.enqcmd)] = .{ + .index = @enumToInt(Feature.enqcmd), + .name = @tagName(Feature.enqcmd), + .llvm_name = "enqcmd", + .description = "Has ENQCMD instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.avx512er)] = .{ + .index = @enumToInt(Feature.avx512er), + .name = @tagName(Feature.avx512er), + .llvm_name = "avx512er", + .description = "Enable AVX-512 Exponential and Reciprocal Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.ermsb)] = .{ + .index = @enumToInt(Feature.ermsb), + .name = @tagName(Feature.ermsb), + .llvm_name = "ermsb", + .description = "REP MOVS/STOS are fast", + .dependencies = 0, + }; + + result[@enumToInt(Feature.f16c)] = .{ + .index = @enumToInt(Feature.f16c), + .name = @tagName(Feature.f16c), + .llvm_name = "f16c", + .description = "Support 16-bit floating point conversion instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.fma)] = .{ + .index = @enumToInt(Feature.fma), + .name = @tagName(Feature.fma), + .llvm_name = "fma", + .description = "Enable three-operand fused multiple-add", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.fma4)] = .{ + .index = @enumToInt(Feature.fma4), + .name = @tagName(Feature.fma4), + .llvm_name = "fma4", + .description = "Enable four-operand fused multiple-add", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.fsgsbase)] = .{ + .index = @enumToInt(Feature.fsgsbase), + .name = @tagName(Feature.fsgsbase), + .llvm_name = "fsgsbase", + .description = "Support FS/GS Base instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fxsr)] = .{ + .index = @enumToInt(Feature.fxsr), + .name = @tagName(Feature.fxsr), + .llvm_name = "fxsr", + .description = "Support fxsave/fxrestore instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_11bytenop)] = .{ + .index = @enumToInt(Feature.fast_11bytenop), + .name = @tagName(Feature.fast_11bytenop), + .llvm_name = "fast-11bytenop", + .description = "Target can quickly decode up to 11 byte NOPs", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_15bytenop)] = .{ + .index = @enumToInt(Feature.fast_15bytenop), + .name = @tagName(Feature.fast_15bytenop), + .llvm_name = "fast-15bytenop", + .description = "Target can quickly decode up to 15 byte NOPs", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_bextr)] = .{ + .index = @enumToInt(Feature.fast_bextr), + .name = @tagName(Feature.fast_bextr), + .llvm_name = "fast-bextr", + .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_hops)] = .{ + .index = @enumToInt(Feature.fast_hops), + .name = @tagName(Feature.fast_hops), + .llvm_name = "fast-hops", + .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.fast_lzcnt)] = .{ + .index = @enumToInt(Feature.fast_lzcnt), + .name = @tagName(Feature.fast_lzcnt), + .llvm_name = "fast-lzcnt", + .description = "LZCNT instructions are as fast as most simple integer ops", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{ + .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write), + .name = @tagName(Feature.fast_partial_ymm_or_zmm_write), + .llvm_name = "fast-partial-ymm-or-zmm-write", + .description = "Partial writes to YMM/ZMM registers are fast", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_shld_rotate)] = .{ + .index = @enumToInt(Feature.fast_shld_rotate), + .name = @tagName(Feature.fast_shld_rotate), + .llvm_name = "fast-shld-rotate", + .description = "SHLD can be used as a faster rotate", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{ + .index = @enumToInt(Feature.fast_scalar_fsqrt), + .name = @tagName(Feature.fast_scalar_fsqrt), + .llvm_name = "fast-scalar-fsqrt", + .description = "Scalar SQRT is fast (disable Newton-Raphson)", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{ + .index = @enumToInt(Feature.fast_scalar_shift_masks), + .name = @tagName(Feature.fast_scalar_shift_masks), + .llvm_name = "fast-scalar-shift-masks", + .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_variable_shuffle)] = .{ + .index = @enumToInt(Feature.fast_variable_shuffle), + .name = @tagName(Feature.fast_variable_shuffle), + .llvm_name = "fast-variable-shuffle", + .description = "Shuffles with variable masks are fast", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_vector_fsqrt)] = .{ + .index = @enumToInt(Feature.fast_vector_fsqrt), + .name = @tagName(Feature.fast_vector_fsqrt), + .llvm_name = "fast-vector-fsqrt", + .description = "Vector SQRT is fast (disable Newton-Raphson)", + .dependencies = 0, + }; + + result[@enumToInt(Feature.fast_vector_shift_masks)] = .{ + .index = @enumToInt(Feature.fast_vector_shift_masks), + .name = @tagName(Feature.fast_vector_shift_masks), + .llvm_name = "fast-vector-shift-masks", + .description = "Prefer a left/right vector logical shift pair over a shift+and pair", + .dependencies = 0, + }; + + result[@enumToInt(Feature.gfni)] = .{ + .index = @enumToInt(Feature.gfni), + .name = @tagName(Feature.gfni), + .llvm_name = "gfni", + .description = "Enable Galois Field Arithmetic Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.fast_gather)] = .{ + .index = @enumToInt(Feature.fast_gather), + .name = @tagName(Feature.fast_gather), + .llvm_name = "fast-gather", + .description = "Indicates if gather is reasonably fast", + .dependencies = 0, + }; + + result[@enumToInt(Feature.avx512ifma)] = .{ + .index = @enumToInt(Feature.avx512ifma), + .name = @tagName(Feature.avx512ifma), + .llvm_name = "avx512ifma", + .description = "Enable AVX-512 Integer Fused Multiple-Add", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.invpcid)] = .{ + .index = @enumToInt(Feature.invpcid), + .name = @tagName(Feature.invpcid), + .llvm_name = "invpcid", + .description = "Invalidate Process-Context Identifier", + .dependencies = 0, + }; + + result[@enumToInt(Feature.sahf)] = .{ + .index = @enumToInt(Feature.sahf), + .name = @tagName(Feature.sahf), + .llvm_name = "sahf", + .description = "Support LAHF and SAHF instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.lea_sp)] = .{ + .index = @enumToInt(Feature.lea_sp), + .name = @tagName(Feature.lea_sp), + .llvm_name = "lea-sp", + .description = "Use LEA for adjusting the stack pointer", + .dependencies = 0, + }; + + result[@enumToInt(Feature.lea_uses_ag)] = .{ + .index = @enumToInt(Feature.lea_uses_ag), + .name = @tagName(Feature.lea_uses_ag), + .llvm_name = "lea-uses-ag", + .description = "LEA instruction needs inputs at AG stage", + .dependencies = 0, + }; + + result[@enumToInt(Feature.lwp)] = .{ + .index = @enumToInt(Feature.lwp), + .name = @tagName(Feature.lwp), + .llvm_name = "lwp", + .description = "Enable LWP instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.lzcnt)] = .{ + .index = @enumToInt(Feature.lzcnt), + .name = @tagName(Feature.lzcnt), + .llvm_name = "lzcnt", + .description = "Support LZCNT instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ + .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt), + .name = @tagName(Feature.false_deps_lzcnt_tzcnt), + .llvm_name = "false-deps-lzcnt-tzcnt", + .description = "LZCNT/TZCNT have a false dependency on dest register", + .dependencies = 0, + }; + + result[@enumToInt(Feature.mmx)] = .{ + .index = @enumToInt(Feature.mmx), + .name = @tagName(Feature.mmx), + .llvm_name = "mmx", + .description = "Enable MMX instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.movbe)] = .{ + .index = @enumToInt(Feature.movbe), + .name = @tagName(Feature.movbe), + .llvm_name = "movbe", + .description = "Support MOVBE instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.movdir64b)] = .{ + .index = @enumToInt(Feature.movdir64b), + .name = @tagName(Feature.movdir64b), + .llvm_name = "movdir64b", + .description = "Support movdir64b instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.movdiri)] = .{ + .index = @enumToInt(Feature.movdiri), + .name = @tagName(Feature.movdiri), + .llvm_name = "movdiri", + .description = "Support movdiri instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.mpx)] = .{ + .index = @enumToInt(Feature.mpx), + .name = @tagName(Feature.mpx), + .llvm_name = "mpx", + .description = "Support MPX instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.mwaitx)] = .{ + .index = @enumToInt(Feature.mwaitx), + .name = @tagName(Feature.mwaitx), + .llvm_name = "mwaitx", + .description = "Enable MONITORX/MWAITX timer functionality", + .dependencies = 0, + }; + + result[@enumToInt(Feature.macrofusion)] = .{ + .index = @enumToInt(Feature.macrofusion), + .name = @tagName(Feature.macrofusion), + .llvm_name = "macrofusion", + .description = "Various instructions can be fused with conditional branches", + .dependencies = 0, + }; + + result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ + .index = @enumToInt(Feature.merge_to_threeway_branch), + .name = @tagName(Feature.merge_to_threeway_branch), + .llvm_name = "merge-to-threeway-branch", + .description = "Merge branches to a three-way conditional branch", + .dependencies = 0, + }; + + result[@enumToInt(Feature.nopl)] = .{ + .index = @enumToInt(Feature.nopl), + .name = @tagName(Feature.nopl), + .llvm_name = "nopl", + .description = "Enable NOPL instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.pclmul)] = .{ + .index = @enumToInt(Feature.pclmul), + .name = @tagName(Feature.pclmul), + .llvm_name = "pclmul", + .description = "Enable packed carry-less multiplication instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.pconfig)] = .{ + .index = @enumToInt(Feature.pconfig), + .name = @tagName(Feature.pconfig), + .llvm_name = "pconfig", + .description = "platform configuration instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.avx512pf)] = .{ + .index = @enumToInt(Feature.avx512pf), + .name = @tagName(Feature.avx512pf), + .llvm_name = "avx512pf", + .description = "Enable AVX-512 PreFetch Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.pku)] = .{ + .index = @enumToInt(Feature.pku), + .name = @tagName(Feature.pku), + .llvm_name = "pku", + .description = "Enable protection keys", + .dependencies = 0, + }; + + result[@enumToInt(Feature.popcnt)] = .{ + .index = @enumToInt(Feature.popcnt), + .name = @tagName(Feature.popcnt), + .llvm_name = "popcnt", + .description = "Support POPCNT instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.false_deps_popcnt)] = .{ + .index = @enumToInt(Feature.false_deps_popcnt), + .name = @tagName(Feature.false_deps_popcnt), + .llvm_name = "false-deps-popcnt", + .description = "POPCNT has a false dependency on dest register", + .dependencies = 0, + }; + + result[@enumToInt(Feature.prefetchwt1)] = .{ + .index = @enumToInt(Feature.prefetchwt1), + .name = @tagName(Feature.prefetchwt1), + .llvm_name = "prefetchwt1", + .description = "Prefetch with Intent to Write and T1 Hint", + .dependencies = 0, + }; + + result[@enumToInt(Feature.prfchw)] = .{ + .index = @enumToInt(Feature.prfchw), + .name = @tagName(Feature.prfchw), + .llvm_name = "prfchw", + .description = "Support PRFCHW instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.ptwrite)] = .{ + .index = @enumToInt(Feature.ptwrite), + .name = @tagName(Feature.ptwrite), + .llvm_name = "ptwrite", + .description = "Support ptwrite instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.pad_short_functions)] = .{ + .index = @enumToInt(Feature.pad_short_functions), + .name = @tagName(Feature.pad_short_functions), + .llvm_name = "pad-short-functions", + .description = "Pad short functions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.prefer_256_bit)] = .{ + .index = @enumToInt(Feature.prefer_256_bit), + .name = @tagName(Feature.prefer_256_bit), + .llvm_name = "prefer-256-bit", + .description = "Prefer 256-bit AVX instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.rdpid)] = .{ + .index = @enumToInt(Feature.rdpid), + .name = @tagName(Feature.rdpid), + .llvm_name = "rdpid", + .description = "Support RDPID instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.rdrnd)] = .{ + .index = @enumToInt(Feature.rdrnd), + .name = @tagName(Feature.rdrnd), + .llvm_name = "rdrnd", + .description = "Support RDRAND instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.rdseed)] = .{ + .index = @enumToInt(Feature.rdseed), + .name = @tagName(Feature.rdseed), + .llvm_name = "rdseed", + .description = "Support RDSEED instruction", + .dependencies = 0, + }; + + result[@enumToInt(Feature.rtm)] = .{ + .index = @enumToInt(Feature.rtm), + .name = @tagName(Feature.rtm), + .llvm_name = "rtm", + .description = "Support RTM instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.retpoline)] = .{ + .index = @enumToInt(Feature.retpoline), + .name = @tagName(Feature.retpoline), + .llvm_name = "retpoline", + .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", + .dependencies = featureSet(&[_]Feature{ + .retpoline_indirect_calls, + .retpoline_indirect_branches, + }), + }; + + result[@enumToInt(Feature.retpoline_external_thunk)] = .{ + .index = @enumToInt(Feature.retpoline_external_thunk), + .name = @tagName(Feature.retpoline_external_thunk), + .llvm_name = "retpoline-external-thunk", + .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", + .dependencies = featureSet(&[_]Feature{ + .retpoline_indirect_calls, + }), + }; + + result[@enumToInt(Feature.retpoline_indirect_branches)] = .{ + .index = @enumToInt(Feature.retpoline_indirect_branches), + .name = @tagName(Feature.retpoline_indirect_branches), + .llvm_name = "retpoline-indirect-branches", + .description = "Remove speculation of indirect branches from the generated code", + .dependencies = 0, + }; + + result[@enumToInt(Feature.retpoline_indirect_calls)] = .{ + .index = @enumToInt(Feature.retpoline_indirect_calls), + .name = @tagName(Feature.retpoline_indirect_calls), + .llvm_name = "retpoline-indirect-calls", + .description = "Remove speculation of indirect calls from the generated code", + .dependencies = 0, + }; + + result[@enumToInt(Feature.sgx)] = .{ + .index = @enumToInt(Feature.sgx), + .name = @tagName(Feature.sgx), + .llvm_name = "sgx", + .description = "Enable Software Guard Extensions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.sha)] = .{ + .index = @enumToInt(Feature.sha), + .name = @tagName(Feature.sha), + .llvm_name = "sha", + .description = "Enable SHA instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.shstk)] = .{ + .index = @enumToInt(Feature.shstk), + .name = @tagName(Feature.shstk), + .llvm_name = "shstk", + .description = "Support CET Shadow-Stack instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.sse)] = .{ + .index = @enumToInt(Feature.sse), + .name = @tagName(Feature.sse), + .llvm_name = "sse", + .description = "Enable SSE instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.sse2)] = .{ + .index = @enumToInt(Feature.sse2), + .name = @tagName(Feature.sse2), + .llvm_name = "sse2", + .description = "Enable SSE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.sse3)] = .{ + .index = @enumToInt(Feature.sse3), + .name = @tagName(Feature.sse3), + .llvm_name = "sse3", + .description = "Enable SSE3 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.sse4a)] = .{ + .index = @enumToInt(Feature.sse4a), + .name = @tagName(Feature.sse4a), + .llvm_name = "sse4a", + .description = "Support SSE 4a instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.sse4_1)] = .{ + .index = @enumToInt(Feature.sse4_1), + .name = @tagName(Feature.sse4_1), + .llvm_name = "sse4.1", + .description = "Enable SSE 4.1 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.sse4_2)] = .{ + .index = @enumToInt(Feature.sse4_2), + .name = @tagName(Feature.sse4_2), + .llvm_name = "sse4.2", + .description = "Enable SSE 4.2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.sse_unaligned_mem)] = .{ + .index = @enumToInt(Feature.sse_unaligned_mem), + .name = @tagName(Feature.sse_unaligned_mem), + .llvm_name = "sse-unaligned-mem", + .description = "Allow unaligned memory operands with SSE instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.ssse3)] = .{ + .index = @enumToInt(Feature.ssse3), + .name = @tagName(Feature.ssse3), + .llvm_name = "ssse3", + .description = "Enable SSSE3 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.slow_3ops_lea)] = .{ + .index = @enumToInt(Feature.slow_3ops_lea), + .name = @tagName(Feature.slow_3ops_lea), + .llvm_name = "slow-3ops-lea", + .description = "LEA instruction with 3 ops or certain registers is slow", + .dependencies = 0, + }; + + result[@enumToInt(Feature.idivl_to_divb)] = .{ + .index = @enumToInt(Feature.idivl_to_divb), + .name = @tagName(Feature.idivl_to_divb), + .llvm_name = "idivl-to-divb", + .description = "Use 8-bit divide for positive values less than 256", + .dependencies = 0, + }; + + result[@enumToInt(Feature.idivq_to_divl)] = .{ + .index = @enumToInt(Feature.idivq_to_divl), + .name = @tagName(Feature.idivq_to_divl), + .llvm_name = "idivq-to-divl", + .description = "Use 32-bit divide for positive values less than 2^32", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_incdec)] = .{ + .index = @enumToInt(Feature.slow_incdec), + .name = @tagName(Feature.slow_incdec), + .llvm_name = "slow-incdec", + .description = "INC and DEC instructions are slower than ADD and SUB", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_lea)] = .{ + .index = @enumToInt(Feature.slow_lea), + .name = @tagName(Feature.slow_lea), + .llvm_name = "slow-lea", + .description = "LEA instruction with certain arguments is slow", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_pmaddwd)] = .{ + .index = @enumToInt(Feature.slow_pmaddwd), + .name = @tagName(Feature.slow_pmaddwd), + .llvm_name = "slow-pmaddwd", + .description = "PMADDWD is slower than PMULLD", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_pmulld)] = .{ + .index = @enumToInt(Feature.slow_pmulld), + .name = @tagName(Feature.slow_pmulld), + .llvm_name = "slow-pmulld", + .description = "PMULLD instruction is slow", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_shld)] = .{ + .index = @enumToInt(Feature.slow_shld), + .name = @tagName(Feature.slow_shld), + .llvm_name = "slow-shld", + .description = "SHLD instruction is slow", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_two_mem_ops)] = .{ + .index = @enumToInt(Feature.slow_two_mem_ops), + .name = @tagName(Feature.slow_two_mem_ops), + .llvm_name = "slow-two-mem-ops", + .description = "Two memory operand instructions are slow", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{ + .index = @enumToInt(Feature.slow_unaligned_mem_16), + .name = @tagName(Feature.slow_unaligned_mem_16), + .llvm_name = "slow-unaligned-mem-16", + .description = "Slow unaligned 16-byte memory access", + .dependencies = 0, + }; + + result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{ + .index = @enumToInt(Feature.slow_unaligned_mem_32), + .name = @tagName(Feature.slow_unaligned_mem_32), + .llvm_name = "slow-unaligned-mem-32", + .description = "Slow unaligned 32-byte memory access", + .dependencies = 0, + }; + + result[@enumToInt(Feature.soft_float)] = .{ + .index = @enumToInt(Feature.soft_float), + .name = @tagName(Feature.soft_float), + .llvm_name = "soft-float", + .description = "Use software floating point features", + .dependencies = 0, + }; + + result[@enumToInt(Feature.tbm)] = .{ + .index = @enumToInt(Feature.tbm), + .name = @tagName(Feature.tbm), + .llvm_name = "tbm", + .description = "Enable TBM instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.vaes)] = .{ + .index = @enumToInt(Feature.vaes), + .name = @tagName(Feature.vaes), + .llvm_name = "vaes", + .description = "Promote selected AES instructions to AVX512/AVX registers", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vbmi)] = .{ + .index = @enumToInt(Feature.avx512vbmi), + .name = @tagName(Feature.avx512vbmi), + .llvm_name = "avx512vbmi", + .description = "Enable AVX-512 Vector Byte Manipulation Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vbmi2)] = .{ + .index = @enumToInt(Feature.avx512vbmi2), + .name = @tagName(Feature.avx512vbmi2), + .llvm_name = "avx512vbmi2", + .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vl)] = .{ + .index = @enumToInt(Feature.avx512vl), + .name = @tagName(Feature.avx512vl), + .llvm_name = "avx512vl", + .description = "Enable AVX-512 Vector Length eXtensions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vnni)] = .{ + .index = @enumToInt(Feature.avx512vnni), + .name = @tagName(Feature.avx512vnni), + .llvm_name = "avx512vnni", + .description = "Enable AVX-512 Vector Neural Network Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vp2intersect)] = .{ + .index = @enumToInt(Feature.avx512vp2intersect), + .name = @tagName(Feature.avx512vp2intersect), + .llvm_name = "avx512vp2intersect", + .description = "Enable AVX-512 vp2intersect", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.vpclmulqdq)] = .{ + .index = @enumToInt(Feature.vpclmulqdq), + .name = @tagName(Feature.vpclmulqdq), + .llvm_name = "vpclmulqdq", + .description = "Enable vpclmulqdq instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.avx512vpopcntdq)] = .{ + .index = @enumToInt(Feature.avx512vpopcntdq), + .name = @tagName(Feature.avx512vpopcntdq), + .llvm_name = "avx512vpopcntdq", + .description = "Enable AVX-512 Population Count Instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.waitpkg)] = .{ + .index = @enumToInt(Feature.waitpkg), + .name = @tagName(Feature.waitpkg), + .llvm_name = "waitpkg", + .description = "Wait and pause enhancements", + .dependencies = 0, + }; + + result[@enumToInt(Feature.wbnoinvd)] = .{ + .index = @enumToInt(Feature.wbnoinvd), + .name = @tagName(Feature.wbnoinvd), + .llvm_name = "wbnoinvd", + .description = "Write Back No Invalidate", + .dependencies = 0, + }; + + result[@enumToInt(Feature.x87)] = .{ + .index = @enumToInt(Feature.x87), + .name = @tagName(Feature.x87), + .llvm_name = "x87", + .description = "Enable X87 float instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.xop)] = .{ + .index = @enumToInt(Feature.xop), + .name = @tagName(Feature.xop), + .llvm_name = "xop", + .description = "Enable XOP instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + + result[@enumToInt(Feature.xsave)] = .{ + .index = @enumToInt(Feature.xsave), + .name = @tagName(Feature.xsave), + .llvm_name = "xsave", + .description = "Support xsave instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.xsavec)] = .{ + .index = @enumToInt(Feature.xsavec), + .name = @tagName(Feature.xsavec), + .llvm_name = "xsavec", + .description = "Support xsavec instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.xsaveopt)] = .{ + .index = @enumToInt(Feature.xsaveopt), + .name = @tagName(Feature.xsaveopt), + .llvm_name = "xsaveopt", + .description = "Support xsaveopt instructions", + .dependencies = 0, + }; + + result[@enumToInt(Feature.xsaves)] = .{ + .index = @enumToInt(Feature.xsaves), + .name = @tagName(Feature.xsaves), + .llvm_name = "xsaves", + .description = "Support xsaves instructions", + .dependencies = 0, + }; + + break :blk result; +}; + +pub const cpu = struct { + pub const amdfam10 = Cpu{ + .name = "amdfam10", + .llvm_name = "amdfam10", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_scalar_shift_masks, + .sahf, + .lzcnt, + .nopl, + .popcnt, + .sse, + .sse4a, + .slow_shld, + .x87, + }), + }; + + pub const athlon = Cpu{ + .name = "athlon", + .llvm_name = "athlon", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cmov, + .cx8, + .nopl, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon4 = Cpu{ + .name = "athlon_4", + .llvm_name = "athlon-4", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cmov, + .cx8, + .fxsr, + .nopl, + .sse, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon_fx = Cpu{ + .name = "athlon_fx", + .llvm_name = "athlon-fx", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse2, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon_mp = Cpu{ + .name = "athlon_mp", + .llvm_name = "athlon-mp", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cmov, + .cx8, + .fxsr, + .nopl, + .sse, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon_tbird = Cpu{ + .name = "athlon_tbird", + .llvm_name = "athlon-tbird", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cmov, + .cx8, + .nopl, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon_xp = Cpu{ + .name = "athlon_xp", + .llvm_name = "athlon-xp", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cmov, + .cx8, + .fxsr, + .nopl, + .sse, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon64 = Cpu{ + .name = "athlon64", + .llvm_name = "athlon64", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse2, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const athlon64_sse3 = Cpu{ + .name = "athlon64_sse3", + .llvm_name = "athlon64-sse3", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse3, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const atom = Cpu{ + .name = "atom", + .llvm_name = "atom", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .lea_sp, + .lea_uses_ag, + .mmx, + .movbe, + .nopl, + .pad_short_functions, + .sse, + .ssse3, + .idivl_to_divb, + .idivq_to_divl, + .slow_two_mem_ops, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const barcelona = Cpu{ + .name = "barcelona", + .llvm_name = "barcelona", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_scalar_shift_masks, + .sahf, + .lzcnt, + .nopl, + .popcnt, + .sse, + .sse4a, + .slow_shld, + .x87, + }), + }; + + pub const bdver1 = Cpu{ + .name = "bdver1", + .llvm_name = "bdver1", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .branchfusion, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast11bytenop, + .fast_scalar_shift_masks, + .sahf, + .lwp, + .lzcnt, + .mmx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .slow_shld, + .x87, + .xop, + .xsave, + }), + }; + + pub const bdver2 = Cpu{ + .name = "bdver2", + .llvm_name = "bdver2", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .bmi, + .branchfusion, + .cmov, + .cx8, + .cx16, + .f16c, + .fma, + .fxsr, + .fast11bytenop, + .fast_bextr, + .fast_scalar_shift_masks, + .sahf, + .lwp, + .lzcnt, + .mmx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .slow_shld, + .tbm, + .x87, + .xop, + .xsave, + }), + }; + + pub const bdver3 = Cpu{ + .name = "bdver3", + .llvm_name = "bdver3", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .bmi, + .branchfusion, + .cmov, + .cx8, + .cx16, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast11bytenop, + .fast_bextr, + .fast_scalar_shift_masks, + .sahf, + .lwp, + .lzcnt, + .mmx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .slow_shld, + .tbm, + .x87, + .xop, + .xsave, + .xsaveopt, + }), + }; + + pub const bdver4 = Cpu{ + .name = "bdver4", + .llvm_name = "bdver4", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .avx2, + .bmi, + .bmi2, + .branchfusion, + .cmov, + .cx8, + .cx16, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast11bytenop, + .fast_bextr, + .fast_scalar_shift_masks, + .sahf, + .lwp, + .lzcnt, + .mmx, + .mwaitx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .slow_shld, + .tbm, + .x87, + .xop, + .xsave, + .xsaveopt, + }), + }; + + pub const bonnell = Cpu{ + .name = "bonnell", + .llvm_name = "bonnell", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .lea_sp, + .lea_uses_ag, + .mmx, + .movbe, + .nopl, + .pad_short_functions, + .sse, + .ssse3, + .idivl_to_divb, + .idivq_to_divl, + .slow_two_mem_ops, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const broadwell = Cpu{ + .name = "broadwell", + .llvm_name = "broadwell", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .avx, + .avx2, + .bmi, + .bmi2, + .cmov, + .cx8, + .cx16, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .invpcid, + .sahf, + .lzcnt, + .false_deps_lzcnt_tzcnt, + .mmx, + .movbe, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const btver1 = Cpu{ + .name = "btver1", + .llvm_name = "btver1", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast15bytenop, + .fast_scalar_shift_masks, + .fast_vector_shift_masks, + .sahf, + .lzcnt, + .mmx, + .nopl, + .popcnt, + .prfchw, + .sse, + .sse4a, + .ssse3, + .slow_shld, + .x87, + }), + }; + + pub const btver2 = Cpu{ + .name = "btver2", + .llvm_name = "btver2", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .avx, + .bmi, + .cmov, + .cx8, + .cx16, + .f16c, + .fxsr, + .fast15bytenop, + .fast_bextr, + .fast_hops, + .fast_lzcnt, + .fast_partial_ymm_or_zmm_write, + .fast_scalar_shift_masks, + .fast_vector_shift_masks, + .sahf, + .lzcnt, + .mmx, + .movbe, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .sse4a, + .ssse3, + .slow_shld, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const c3 = Cpu{ + .name = "c3", + .llvm_name = "c3", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnow3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const c32 = Cpu{ + .name = "c3_2", + .llvm_name = "c3-2", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .sse, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const cannonlake = Cpu{ + .name = "cannonlake", + .llvm_name = "cannonlake", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .avx512ifma, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sgx, + .sha, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .avx512vbmi, + .avx512vl, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const cascadelake = Cpu{ + .name = "cascadelake", + .llvm_name = "cascadelake", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .avx512vl, + .avx512vnni, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const cooperlake = Cpu{ + .name = "cooperlake", + .llvm_name = "cooperlake", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .avx512bf16, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .avx512vl, + .avx512vnni, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const core_avx_i = Cpu{ + .name = "core_avx_i", + .llvm_name = "core-avx-i", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .cmov, + .cx8, + .cx16, + .f16c, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .sahf, + .mmx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .rdrnd, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .slow_unaligned_mem_32, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const core_avx2 = Cpu{ + .name = "core_avx2", + .llvm_name = "core-avx2", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .avx2, + .bmi, + .bmi2, + .cmov, + .cx8, + .cx16, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .invpcid, + .sahf, + .lzcnt, + .false_deps_lzcnt_tzcnt, + .mmx, + .movbe, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .rdrnd, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const core2 = Cpu{ + .name = "core2", + .llvm_name = "core2", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .macrofusion, + .nopl, + .sse, + .ssse3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const corei7 = Cpu{ + .name = "corei7", + .llvm_name = "corei7", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .macrofusion, + .nopl, + .popcnt, + .sse, + .sse42, + .x87, + }), + }; + + pub const corei7_avx = Cpu{ + .name = "corei7_avx", + .llvm_name = "corei7-avx", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .sahf, + .mmx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .slow_unaligned_mem_32, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = featureSet(&[_]Feature{ + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const geode = Cpu{ + .name = "geode", + .llvm_name = "geode", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const goldmont = Cpu{ + .name = "goldmont", + .llvm_name = "goldmont", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .clflushopt, + .cmov, + .cx8, + .cx16, + .fsgsbase, + .fxsr, + .sahf, + .mmx, + .movbe, + .mpx, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sha, + .sse42, + .ssse3, + .slow_incdec, + .slowLea, + .slow_two_mem_ops, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const goldmont_plus = Cpu{ + .name = "goldmont_plus", + .llvm_name = "goldmont-plus", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .clflushopt, + .cmov, + .cx8, + .cx16, + .fsgsbase, + .fxsr, + .sahf, + .mmx, + .movbe, + .mpx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .ptwrite, + .rdpid, + .rdrnd, + .rdseed, + .sgx, + .sha, + .sse42, + .ssse3, + .slow_incdec, + .slowLea, + .slow_two_mem_ops, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const haswell = Cpu{ + .name = "haswell", + .llvm_name = "haswell", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .avx2, + .bmi, + .bmi2, + .cmov, + .cx8, + .cx16, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .invpcid, + .sahf, + .lzcnt, + .false_deps_lzcnt_tzcnt, + .mmx, + .movbe, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .rdrnd, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const i386 = Cpu{ + .name = "i386", + .llvm_name = "i386", + .dependencies = featureSet(&[_]Feature{ + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const i486 = Cpu{ + .name = "i486", + .llvm_name = "i486", + .dependencies = featureSet(&[_]Feature{ + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const i586 = Cpu{ + .name = "i586", + .llvm_name = "i586", + .dependencies = featureSet(&[_]Feature{ + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const i686 = Cpu{ + .name = "i686", + .llvm_name = "i686", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const icelake_client = Cpu{ + .name = "icelake_client", + .llvm_name = "icelake-client", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .avx512bitalg, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .gfni, + .fast_gather, + .avx512ifma, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .prfchw, + .rdpid, + .rdrnd, + .rdseed, + .sgx, + .sha, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .vaes, + .avx512vbmi, + .avx512vbmi2, + .avx512vl, + .avx512vnni, + .vpclmulqdq, + .avx512vpopcntdq, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const icelake_server = Cpu{ + .name = "icelake_server", + .llvm_name = "icelake-server", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .avx512bitalg, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .gfni, + .fast_gather, + .avx512ifma, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pconfig, + .pku, + .popcnt, + .prfchw, + .rdpid, + .rdrnd, + .rdseed, + .sgx, + .sha, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .vaes, + .avx512vbmi, + .avx512vbmi2, + .avx512vl, + .avx512vnni, + .vpclmulqdq, + .avx512vpopcntdq, + .wbnoinvd, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const ivybridge = Cpu{ + .name = "ivybridge", + .llvm_name = "ivybridge", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .cmov, + .cx8, + .cx16, + .f16c, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .sahf, + .mmx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .rdrnd, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .slow_unaligned_mem_32, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const k6 = Cpu{ + .name = "k6", + .llvm_name = "k6", + .dependencies = featureSet(&[_]Feature{ + .cx8, + .mmx, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const k62 = Cpu{ + .name = "k6_2", + .llvm_name = "k6-2", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnow3, + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const k63 = Cpu{ + .name = "k6_3", + .llvm_name = "k6-3", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnow3, + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const k8 = Cpu{ + .name = "k8", + .llvm_name = "k8", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse2, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const k8_sse3 = Cpu{ + .name = "k8_sse3", + .llvm_name = "k8-sse3", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse3, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const knl = Cpu{ + .name = "knl", + .llvm_name = "knl", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx512f, + .bmi, + .bmi2, + .avx512cd, + .cmov, + .cx8, + .cx16, + .avx512er, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_partial_ymm_or_zmm_write, + .fast_gather, + .sahf, + .lzcnt, + .mmx, + .movbe, + .nopl, + .pclmul, + .avx512pf, + .popcnt, + .prefetchwt1, + .prfchw, + .rdrnd, + .rdseed, + .slow_3ops_lea, + .idivq_to_divl, + .slow_incdec, + .slow_pmaddwd, + .slow_two_mem_ops, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const knm = Cpu{ + .name = "knm", + .llvm_name = "knm", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx512f, + .bmi, + .bmi2, + .avx512cd, + .cmov, + .cx8, + .cx16, + .avx512er, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_partial_ymm_or_zmm_write, + .fast_gather, + .sahf, + .lzcnt, + .mmx, + .movbe, + .nopl, + .pclmul, + .avx512pf, + .popcnt, + .prefetchwt1, + .prfchw, + .rdrnd, + .rdseed, + .slow_3ops_lea, + .idivq_to_divl, + .slow_incdec, + .slow_pmaddwd, + .slow_two_mem_ops, + .avx512vpopcntdq, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const lakemont = Cpu{ + .name = "lakemont", + .llvm_name = "lakemont", + .dependencies = 0, + }; + + pub const nehalem = Cpu{ + .name = "nehalem", + .llvm_name = "nehalem", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .macrofusion, + .nopl, + .popcnt, + .sse, + .sse42, + .x87, + }), + }; + + pub const nocona = Cpu{ + .name = "nocona", + .llvm_name = "nocona", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .mmx, + .nopl, + .sse, + .sse3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const opteron = Cpu{ + .name = "opteron", + .llvm_name = "opteron", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse2, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const opteron_sse3 = Cpu{ + .name = "opteron_sse3", + .llvm_name = "opteron-sse3", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnowa3, + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_scalar_shift_masks, + .nopl, + .sse, + .sse3, + .slow_shld, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const penryn = Cpu{ + .name = "penryn", + .llvm_name = "penryn", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .macrofusion, + .nopl, + .sse, + .sse41, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium = Cpu{ + .name = "pentium", + .llvm_name = "pentium", + .dependencies = featureSet(&[_]Feature{ + .cx8, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium_m = Cpu{ + .name = "pentium_m", + .llvm_name = "pentium-m", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .sse2, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium_mmx = Cpu{ + .name = "pentium_mmx", + .llvm_name = "pentium-mmx", + .dependencies = featureSet(&[_]Feature{ + .cx8, + .mmx, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium2 = Cpu{ + .name = "pentium2", + .llvm_name = "pentium2", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium3 = Cpu{ + .name = "pentium3", + .llvm_name = "pentium3", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium3m = Cpu{ + .name = "pentium3m", + .llvm_name = "pentium3m", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium4 = Cpu{ + .name = "pentium4", + .llvm_name = "pentium4", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .sse2, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentium4m = Cpu{ + .name = "pentium4m", + .llvm_name = "pentium4m", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .sse2, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const pentiumpro = Cpu{ + .name = "pentiumpro", + .llvm_name = "pentiumpro", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .nopl, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const prescott = Cpu{ + .name = "prescott", + .llvm_name = "prescott", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .sse3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const sandybridge = Cpu{ + .name = "sandybridge", + .llvm_name = "sandybridge", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .avx, + .cmov, + .cx8, + .cx16, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .sahf, + .mmx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .slow_unaligned_mem_32, + .x87, + .xsave, + .xsaveopt, + }), + }; + + pub const silvermont = Cpu{ + .name = "silvermont", + .llvm_name = "silvermont", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .movbe, + .nopl, + .sse, + .pclmul, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .sse42, + .ssse3, + .idivq_to_divl, + .slow_incdec, + .slowLea, + .slowPmulld, + .slow_two_mem_ops, + .x87, + }), + }; + + pub const skx = Cpu{ + .name = "skx", + .llvm_name = "skx", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .avx512vl, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const skylake = Cpu{ + .name = "skylake", + .llvm_name = "skylake", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .bmi, + .bmi2, + .clflushopt, + .cmov, + .cx8, + .cx16, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sgx, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const skylake_avx512 = Cpu{ + .name = "skylake_avx512", + .llvm_name = "skylake-avx512", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx, + .avx2, + .avx512f, + .bmi, + .bmi2, + .avx512bw, + .avx512cd, + .clflushopt, + .clwb, + .cmov, + .cx8, + .cx16, + .avx512dq, + .ermsb, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast_shld_rotate, + .fast_scalar_fsqrt, + .fast_variable_shuffle, + .fast_vector_fsqrt, + .fast_gather, + .invpcid, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mpx, + .macrofusion, + .merge_to_threeway_branch, + .nopl, + .pclmul, + .pku, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sse42, + .slow_3ops_lea, + .idivq_to_divl, + .avx512vl, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const slm = Cpu{ + .name = "slm", + .llvm_name = "slm", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .movbe, + .nopl, + .sse, + .pclmul, + .popcnt, + .false_deps_popcnt, + .prfchw, + .rdrnd, + .sse42, + .ssse3, + .idivq_to_divl, + .slow_incdec, + .slowLea, + .slowPmulld, + .slow_two_mem_ops, + .x87, + }), + }; + + pub const tremont = Cpu{ + .name = "tremont", + .llvm_name = "tremont", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .sse, + .aes, + .cldemote, + .clflushopt, + .cmov, + .cx8, + .cx16, + .fsgsbase, + .fxsr, + .gfni, + .sahf, + .mmx, + .movbe, + .movdir64b, + .movdiri, + .mpx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .ptwrite, + .rdpid, + .rdrnd, + .rdseed, + .sgx, + .sha, + .sse42, + .ssse3, + .slow_incdec, + .slowLea, + .slow_two_mem_ops, + .waitpkg, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const westmere = Cpu{ + .name = "westmere", + .llvm_name = "westmere", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .cx16, + .fxsr, + .sahf, + .mmx, + .macrofusion, + .nopl, + .sse, + .pclmul, + .popcnt, + .sse42, + .x87, + }), + }; + + pub const winchip_c6 = Cpu{ + .name = "winchip_c6", + .llvm_name = "winchip-c6", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const winchip2 = Cpu{ + .name = "winchip2", + .llvm_name = "winchip2", + .dependencies = featureSet(&[_]Feature{ + .mmx, + .dnow3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const x86_64 = Cpu{ + .name = "x86_64", + .llvm_name = "x86-64", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .cmov, + .cx8, + .fxsr, + .mmx, + .macrofusion, + .nopl, + .sse, + .sse2, + .slow_3ops_lea, + .slow_incdec, + .x87, + }), + }; + + pub const yonah = Cpu{ + .name = "yonah", + .llvm_name = "yonah", + .dependencies = featureSet(&[_]Feature{ + .cmov, + .cx8, + .fxsr, + .mmx, + .nopl, + .sse, + .sse3, + .slow_unaligned_mem_16, + .x87, + }), + }; + + pub const znver1 = Cpu{ + .name = "znver1", + .llvm_name = "znver1", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx2, + .bmi, + .bmi2, + .branchfusion, + .clflushopt, + .clzero, + .cmov, + .cx8, + .cx16, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast15bytenop, + .fast_bextr, + .fast_lzcnt, + .fast_scalar_shift_masks, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mwaitx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .rdrnd, + .rdseed, + .sha, + .sse4a, + .slow_shld, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; + + pub const znver2 = Cpu{ + .name = "znver2", + .llvm_name = "znver2", + .dependencies = featureSet(&[_]Feature{ + .bit64, + .adx, + .sse, + .aes, + .avx2, + .bmi, + .bmi2, + .branchfusion, + .clflushopt, + .clwb, + .clzero, + .cmov, + .cx8, + .cx16, + .f16c, + .fma, + .fsgsbase, + .fxsr, + .fast15bytenop, + .fast_bextr, + .fast_lzcnt, + .fast_scalar_shift_masks, + .sahf, + .lzcnt, + .mmx, + .movbe, + .mwaitx, + .nopl, + .pclmul, + .popcnt, + .prfchw, + .rdpid, + .rdrnd, + .rdseed, + .sha, + .sse4a, + .slow_shld, + .wbnoinvd, + .x87, + .xsave, + .xsavec, + .xsaveopt, + .xsaves, + }), + }; +}; + +pub const all_cpus = &[_]*const Cpu{ + &cpu.amdfam10, + &cpu.athlon, + &cpu.athlon4, + &cpu.athlon_fx, + &cpu.athlon_mp, + &cpu.athlon_tbird, + &cpu.athlon_xp, + &cpu.athlon64, + &cpu.athlon64_sse3, + &cpu.atom, + &cpu.barcelona, + &cpu.bdver1, + &cpu.bdver2, + &cpu.bdver3, + &cpu.bdver4, + &cpu.bonnell, + &cpu.broadwell, + &cpu.btver1, + &cpu.btver2, + &cpu.c3, + &cpu.c32, + &cpu.cannonlake, + &cpu.cascadelake, + &cpu.cooperlake, + &cpu.core_avx_i, + &cpu.core_avx2, + &cpu.core2, + &cpu.corei7, + &cpu.corei7_avx, + &cpu.generic, + &cpu.geode, + &cpu.goldmont, + &cpu.goldmont_plus, + &cpu.haswell, + &cpu.i386, + &cpu.i486, + &cpu.i586, + &cpu.i686, + &cpu.icelake_client, + &cpu.icelake_server, + &cpu.ivybridge, + &cpu.k6, + &cpu.k62, + &cpu.k63, + &cpu.k8, + &cpu.k8_sse3, + &cpu.knl, + &cpu.knm, + &cpu.lakemont, + &cpu.nehalem, + &cpu.nocona, + &cpu.opteron, + &cpu.opteron_sse3, + &cpu.penryn, + &cpu.pentium, + &cpu.pentium_m, + &cpu.pentium_mmx, + &cpu.pentium2, + &cpu.pentium3, + &cpu.pentium3m, + &cpu.pentium4, + &cpu.pentium4m, + &cpu.pentiumpro, + &cpu.prescott, + &cpu.sandybridge, + &cpu.silvermont, + &cpu.skx, + &cpu.skylake, + &cpu.skylake_avx512, + &cpu.slm, + &cpu.tremont, + &cpu.westmere, + &cpu.winchip_c6, + &cpu.winchip2, + &cpu.x86_64, + &cpu.yonah, + &cpu.znver1, + &cpu.znver2, }; -- 2.54.0 From 20af858601e015ba76f23033d0af1d672db097ac Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 19 Jan 2020 21:06:41 -0500 Subject: [PATCH 30/63] some fixes --- lib/std/buffer.zig | 2 +- src-self-hosted/stage1.zig | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/std/buffer.zig b/lib/std/buffer.zig index 21f73112fa497f2d05e7651ac97739b806fe7297..42bf8e8142e8b0055efe057489e15fd6b2d1a41d 100644 --- a/lib/std/buffer.zig +++ b/lib/std/buffer.zig @@ -59,7 +59,7 @@ pub const Buffer = struct { /// is safe to `deinit`. pub fn toOwnedSlice(self: *Buffer) [:0]u8 { const allocator = self.list.allocator; - const result = allocator.shrink(self.list.items, self.len()); + const result = self.list.toOwnedSlice(); self.* = initNull(allocator); return result[0 .. result.len - 1 :0]; } diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index f0593f8fce67a5a236b3af2a7ec22ed108791300..85a69518276274fb6b4af560802c5a81b561a68a 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -542,14 +542,14 @@ export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_le fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { const stdout_stream = &std.io.getStdOut().outStream().stream; - const arch = Target.parseArchTag(arch_name) catch { + const arch = Target.parseArchSub(arch_name) catch { std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name}); return; }; try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)}); - const features = std.target.getFeaturesForArch(arch); + const features = arch.allFeaturesList(); var longest_len: usize = 0; for (features) |feature| { @@ -568,7 +568,7 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { try stdout_stream.print(" - {}\n", .{feature.description}); - if (show_dependencies and feature.dependencies.len > 0) { + if (show_dependencies and feature.dependencies != 0) { for (feature.dependencies) |dependency| { try stdout_stream.print(" {}\n", .{dependency.name}); } @@ -622,7 +622,7 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { const Stage2CpuFeatures = struct { allocator: *mem.Allocator, - cpu_features: Target.CpuFeatures, + cpu_features: Target.Cross.CpuFeatures, llvm_cpu_name: ?[:0]const u8, llvm_features_str: ?[:0]const u8, -- 2.54.0 From 8f29d1407350190e1e641ca55f870f00b53d0246 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 01:42:31 -0500 Subject: [PATCH 31/63] stage1 is building. `zig targets` now self-hosted --- BRANCH_TODO | 2 + lib/std/builtin.zig | 3 + lib/std/target.zig | 62 +++--- lib/std/target/x86.zig | 392 ++++++++++++++++++------------------- src-self-hosted/main.zig | 2 +- src-self-hosted/stage1.zig | 164 +++++----------- src/error.cpp | 5 + src/main.cpp | 113 +---------- src/userland.cpp | 15 +- src/userland.h | 15 +- 10 files changed, 307 insertions(+), 466 deletions(-) diff --git a/BRANCH_TODO b/BRANCH_TODO index 50efbe89f6a632b8a411e78e713ca07a7a6d44fd..4dfc95f7067d35777a95737576eea7191e168570 100644 --- a/BRANCH_TODO +++ b/BRANCH_TODO @@ -1,5 +1,7 @@ Finish these thigns before merging teh branch + * it gets the wrong answers with `-target-feature -sse,-avx` + * finish refactoring target/arch/* * `zig builtin` integration * move target details to better location diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index 712d98b25cac3adabb0aeaa55dac864144a5c608..b5c137c2e18579ddac51435202fab889df783707 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -1,5 +1,8 @@ pub usingnamespace @import("builtin"); +/// Deprecated: use `std.Target.Os`. +pub const Target = std.Target; + /// Deprecated: use `std.Target.Os`. pub const Os = std.Target.Os; diff --git a/lib/std/target.zig b/lib/std/target.zig index 350387bd8a6524f0cf25fce3794d2a96bb46cf3b..2f3e740c9016d6054f8abd8e8229696556a43587 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -49,6 +49,22 @@ pub const Target = union(enum) { other, }; + pub const aarch64 = @import("target/aarch64.zig"); + pub const amdgpu = @import("target/amdgpu.zig"); + pub const arm = @import("target/arm.zig"); + pub const avr = @import("target/avr.zig"); + pub const bpf = @import("target/bpf.zig"); + pub const hexagon = @import("target/hexagon.zig"); + pub const mips = @import("target/mips.zig"); + pub const msp430 = @import("target/msp430.zig"); + pub const nvptx = @import("target/nvptx.zig"); + pub const powerpc = @import("target/powerpc.zig"); + pub const riscv = @import("target/riscv.zig"); + pub const sparc = @import("target/sparc.zig"); + pub const systemz = @import("target/systemz.zig"); + pub const wasm = @import("target/wasm.zig"); + pub const x86 = @import("target/x86.zig"); + pub const Arch = union(enum) { arm: Arm32, armeb: Arm32, @@ -101,22 +117,6 @@ pub const Target = union(enum) { renderscript32, renderscript64, - pub const aarch64 = @import("target/aarch64.zig"); - pub const amdgpu = @import("target/amdgpu.zig"); - pub const arm = @import("target/arm.zig"); - pub const avr = @import("target/avr.zig"); - pub const bpf = @import("target/bpf.zig"); - pub const hexagon = @import("target/hexagon.zig"); - pub const mips = @import("target/mips.zig"); - pub const msp430 = @import("target/msp430.zig"); - pub const nvptx = @import("target/nvptx.zig"); - pub const powerpc = @import("target/powerpc.zig"); - pub const riscv = @import("target/riscv.zig"); - pub const sparc = @import("target/sparc.zig"); - pub const systemz = @import("target/systemz.zig"); - pub const wasm = @import("target/wasm.zig"); - pub const x86 = @import("target/x86.zig"); - pub const Arm32 = enum { v8_5a, v8_4a, @@ -251,7 +251,7 @@ pub const Target = union(enum) { }; for (arch.allFeaturesList()) |feature, index| { if (mem.eql(u8, feature_name, feature.name)) { - set |= @splat(2, 1 << index); + set |= @splat(2, @as(Cpu.Feature.Set, 1) << @intCast(u7, index)); break; } } else { @@ -440,7 +440,7 @@ pub const Target = union(enum) { // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features, // TODO .s390x => systemz.baseline_features, .i386 => x86.cpu.pentium4.features, - .x86_64 => x86.cpu.x8664.features, + .x86_64 => x86.cpu.x86_64.features, // TODO .nvptx, .nvptx64 => nvptx.baseline_features, // TODO .wasm32, .wasm64 => wasm.baseline_features, @@ -451,21 +451,21 @@ pub const Target = union(enum) { /// All CPUs Zig is aware of, sorted lexicographically by name. pub fn allCpus(arch: Arch) []const *const Cpu { return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, + // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus, - .avr => avr.all_cpus, - .bpfel, .bpfeb => bpf.all_cpus, - .hexagon => hexagon.all_cpus, - .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, - .msp430 => msp430.all_cpus, - .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, - .amdgcn => amdgpu.all_cpus, - .riscv32, .riscv64 => riscv.all_cpus, - .sparc, .sparcv9, .sparcel => sparc.all_cpus, - .s390x => systemz.all_cpus, + // TODO .avr => avr.all_cpus, + // TODO .bpfel, .bpfeb => bpf.all_cpus, + // TODO .hexagon => hexagon.all_cpus, + // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, + // TODO .msp430 => msp430.all_cpus, + // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, + // TODO .amdgcn => amdgpu.all_cpus, + // TODO .riscv32, .riscv64 => riscv.all_cpus, + // TODO .sparc, .sparcv9, .sparcel => sparc.all_cpus, + // TODO .s390x => systemz.all_cpus, .i386, .x86_64 => x86.all_cpus, - .nvptx, .nvptx64 => nvptx.all_cpus, - .wasm32, .wasm64 => wasm.all_cpus, + // TODO .nvptx, .nvptx64 => nvptx.all_cpus, + // TODO .wasm32, .wasm64 => wasm.all_cpus, else => &[0]*const Cpu{}, }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 021c940dbde4edac16b4d5bb8cda4117edc13ea2..50b332f5e1d2e9afde13a3f98ef3df0e96cc16b9 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -1213,10 +1213,10 @@ pub const cpu = struct { pub const amdfam10 = Cpu{ .name = "amdfam10", .llvm_name = "amdfam10", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .cx16, @@ -1236,9 +1236,9 @@ pub const cpu = struct { pub const athlon = Cpu{ .name = "athlon", .llvm_name = "athlon", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cmov, .cx8, .nopl, @@ -1251,9 +1251,9 @@ pub const cpu = struct { pub const athlon4 = Cpu{ .name = "athlon_4", .llvm_name = "athlon-4", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cmov, .cx8, .fxsr, @@ -1268,10 +1268,10 @@ pub const cpu = struct { pub const athlon_fx = Cpu{ .name = "athlon_fx", .llvm_name = "athlon-fx", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .fxsr, @@ -1288,9 +1288,9 @@ pub const cpu = struct { pub const athlon_mp = Cpu{ .name = "athlon_mp", .llvm_name = "athlon-mp", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cmov, .cx8, .fxsr, @@ -1305,9 +1305,9 @@ pub const cpu = struct { pub const athlon_tbird = Cpu{ .name = "athlon_tbird", .llvm_name = "athlon-tbird", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cmov, .cx8, .nopl, @@ -1320,9 +1320,9 @@ pub const cpu = struct { pub const athlon_xp = Cpu{ .name = "athlon_xp", .llvm_name = "athlon-xp", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cmov, .cx8, .fxsr, @@ -1337,10 +1337,10 @@ pub const cpu = struct { pub const athlon64 = Cpu{ .name = "athlon64", .llvm_name = "athlon64", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .fxsr, @@ -1357,10 +1357,10 @@ pub const cpu = struct { pub const athlon64_sse3 = Cpu{ .name = "athlon64_sse3", .llvm_name = "athlon64-sse3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .cx16, @@ -1378,8 +1378,8 @@ pub const cpu = struct { pub const atom = Cpu{ .name = "atom", .llvm_name = "atom", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -1404,10 +1404,10 @@ pub const cpu = struct { pub const barcelona = Cpu{ .name = "barcelona", .llvm_name = "barcelona", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .cx16, @@ -1427,8 +1427,8 @@ pub const cpu = struct { pub const bdver1 = Cpu{ .name = "bdver1", .llvm_name = "bdver1", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .branchfusion, @@ -1436,7 +1436,7 @@ pub const cpu = struct { .cx8, .cx16, .fxsr, - .fast11bytenop, + .fast_11bytenop, .fast_scalar_shift_masks, .sahf, .lwp, @@ -1456,8 +1456,8 @@ pub const cpu = struct { pub const bdver2 = Cpu{ .name = "bdver2", .llvm_name = "bdver2", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .bmi, @@ -1468,7 +1468,7 @@ pub const cpu = struct { .f16c, .fma, .fxsr, - .fast11bytenop, + .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, .sahf, @@ -1490,8 +1490,8 @@ pub const cpu = struct { pub const bdver3 = Cpu{ .name = "bdver3", .llvm_name = "bdver3", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .bmi, @@ -1503,7 +1503,7 @@ pub const cpu = struct { .fma, .fsgsbase, .fxsr, - .fast11bytenop, + .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, .sahf, @@ -1526,8 +1526,8 @@ pub const cpu = struct { pub const bdver4 = Cpu{ .name = "bdver4", .llvm_name = "bdver4", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .avx2, @@ -1541,7 +1541,7 @@ pub const cpu = struct { .fma, .fsgsbase, .fxsr, - .fast11bytenop, + .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, .sahf, @@ -1565,8 +1565,8 @@ pub const cpu = struct { pub const bonnell = Cpu{ .name = "bonnell", .llvm_name = "bonnell", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -1591,8 +1591,8 @@ pub const cpu = struct { pub const broadwell = Cpu{ .name = "broadwell", .llvm_name = "broadwell", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .avx, @@ -1625,7 +1625,7 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .x87, @@ -1637,13 +1637,13 @@ pub const cpu = struct { pub const btver1 = Cpu{ .name = "btver1", .llvm_name = "btver1", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, .fxsr, - .fast15bytenop, + .fast_15bytenop, .fast_scalar_shift_masks, .fast_vector_shift_masks, .sahf, @@ -1663,8 +1663,8 @@ pub const cpu = struct { pub const btver2 = Cpu{ .name = "btver2", .llvm_name = "btver2", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .avx, @@ -1674,7 +1674,7 @@ pub const cpu = struct { .cx16, .f16c, .fxsr, - .fast15bytenop, + .fast_15bytenop, .fast_bextr, .fast_hops, .fast_lzcnt, @@ -1701,9 +1701,9 @@ pub const cpu = struct { pub const c3 = Cpu{ .name = "c3", .llvm_name = "c3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnow3, + .@"3dnow", .slow_unaligned_mem_16, .x87, }), @@ -1712,7 +1712,7 @@ pub const cpu = struct { pub const c32 = Cpu{ .name = "c3_2", .llvm_name = "c3-2", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -1726,8 +1726,8 @@ pub const cpu = struct { pub const cannonlake = Cpu{ .name = "cannonlake", .llvm_name = "cannonlake", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -1771,7 +1771,7 @@ pub const cpu = struct { .rdseed, .sgx, .sha, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .avx512vbmi, @@ -1787,8 +1787,8 @@ pub const cpu = struct { pub const cascadelake = Cpu{ .name = "cascadelake", .llvm_name = "cascadelake", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -1831,7 +1831,7 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .avx512vl, @@ -1847,8 +1847,8 @@ pub const cpu = struct { pub const cooperlake = Cpu{ .name = "cooperlake", .llvm_name = "cooperlake", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -1892,7 +1892,7 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .avx512vl, @@ -1908,8 +1908,8 @@ pub const cpu = struct { pub const core_avx_i = Cpu{ .name = "core_avx_i", .llvm_name = "core-avx-i", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .cmov, @@ -1929,7 +1929,7 @@ pub const cpu = struct { .popcnt, .false_deps_popcnt, .rdrnd, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .slow_unaligned_mem_32, @@ -1942,8 +1942,8 @@ pub const cpu = struct { pub const core_avx2 = Cpu{ .name = "core_avx2", .llvm_name = "core-avx2", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .avx2, @@ -1973,7 +1973,7 @@ pub const cpu = struct { .popcnt, .false_deps_popcnt, .rdrnd, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .x87, @@ -1985,8 +1985,8 @@ pub const cpu = struct { pub const core2 = Cpu{ .name = "core2", .llvm_name = "core2", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2005,8 +2005,8 @@ pub const cpu = struct { pub const corei7 = Cpu{ .name = "corei7", .llvm_name = "corei7", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2017,7 +2017,7 @@ pub const cpu = struct { .nopl, .popcnt, .sse, - .sse42, + .sse4_2, .x87, }), }; @@ -2025,8 +2025,8 @@ pub const cpu = struct { pub const corei7_avx = Cpu{ .name = "corei7_avx", .llvm_name = "corei7-avx", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .cmov, @@ -2043,7 +2043,7 @@ pub const cpu = struct { .pclmul, .popcnt, .false_deps_popcnt, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .slow_unaligned_mem_32, @@ -2056,7 +2056,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -2066,9 +2066,9 @@ pub const cpu = struct { pub const geode = Cpu{ .name = "geode", .llvm_name = "geode", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, + .@"3dnowa", .cx8, .slow_unaligned_mem_16, .x87, @@ -2078,8 +2078,8 @@ pub const cpu = struct { pub const goldmont = Cpu{ .name = "goldmont", .llvm_name = "goldmont", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .clflushopt, @@ -2100,10 +2100,10 @@ pub const cpu = struct { .rdrnd, .rdseed, .sha, - .sse42, + .sse4_2, .ssse3, .slow_incdec, - .slowLea, + .slow_lea, .slow_two_mem_ops, .x87, .xsave, @@ -2116,8 +2116,8 @@ pub const cpu = struct { pub const goldmont_plus = Cpu{ .name = "goldmont_plus", .llvm_name = "goldmont-plus", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .clflushopt, @@ -2140,10 +2140,10 @@ pub const cpu = struct { .rdseed, .sgx, .sha, - .sse42, + .sse4_2, .ssse3, .slow_incdec, - .slowLea, + .slow_lea, .slow_two_mem_ops, .x87, .xsave, @@ -2156,8 +2156,8 @@ pub const cpu = struct { pub const haswell = Cpu{ .name = "haswell", .llvm_name = "haswell", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .avx2, @@ -2187,7 +2187,7 @@ pub const cpu = struct { .popcnt, .false_deps_popcnt, .rdrnd, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .x87, @@ -2196,38 +2196,38 @@ pub const cpu = struct { }), }; - pub const i386 = Cpu{ - .name = "i386", + pub const _i386 = Cpu{ + .name = "_i386", .llvm_name = "i386", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .slow_unaligned_mem_16, .x87, }), }; - pub const i486 = Cpu{ - .name = "i486", + pub const _i486 = Cpu{ + .name = "_i486", .llvm_name = "i486", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .slow_unaligned_mem_16, .x87, }), }; - pub const i586 = Cpu{ - .name = "i586", + pub const _i586 = Cpu{ + .name = "_i586", .llvm_name = "i586", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, }), }; - pub const i686 = Cpu{ - .name = "i686", + pub const _i686 = Cpu{ + .name = "_i686", .llvm_name = "i686", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .slow_unaligned_mem_16, @@ -2238,8 +2238,8 @@ pub const cpu = struct { pub const icelake_client = Cpu{ .name = "icelake_client", .llvm_name = "icelake-client", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2287,7 +2287,7 @@ pub const cpu = struct { .rdseed, .sgx, .sha, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .vaes, @@ -2308,8 +2308,8 @@ pub const cpu = struct { pub const icelake_server = Cpu{ .name = "icelake_server", .llvm_name = "icelake-server", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2358,7 +2358,7 @@ pub const cpu = struct { .rdseed, .sgx, .sha, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .vaes, @@ -2380,8 +2380,8 @@ pub const cpu = struct { pub const ivybridge = Cpu{ .name = "ivybridge", .llvm_name = "ivybridge", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .cmov, @@ -2401,7 +2401,7 @@ pub const cpu = struct { .popcnt, .false_deps_popcnt, .rdrnd, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .slow_unaligned_mem_32, @@ -2414,7 +2414,7 @@ pub const cpu = struct { pub const k6 = Cpu{ .name = "k6", .llvm_name = "k6", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -2425,9 +2425,9 @@ pub const cpu = struct { pub const k62 = Cpu{ .name = "k6_2", .llvm_name = "k6-2", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnow3, + .@"3dnow", .cx8, .slow_unaligned_mem_16, .x87, @@ -2437,9 +2437,9 @@ pub const cpu = struct { pub const k63 = Cpu{ .name = "k6_3", .llvm_name = "k6-3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnow3, + .@"3dnow", .cx8, .slow_unaligned_mem_16, .x87, @@ -2449,10 +2449,10 @@ pub const cpu = struct { pub const k8 = Cpu{ .name = "k8", .llvm_name = "k8", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .fxsr, @@ -2469,10 +2469,10 @@ pub const cpu = struct { pub const k8_sse3 = Cpu{ .name = "k8_sse3", .llvm_name = "k8-sse3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .cx16, @@ -2490,8 +2490,8 @@ pub const cpu = struct { pub const knl = Cpu{ .name = "knl", .llvm_name = "knl", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2535,8 +2535,8 @@ pub const cpu = struct { pub const knm = Cpu{ .name = "knm", .llvm_name = "knm", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2581,14 +2581,14 @@ pub const cpu = struct { pub const lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", - .dependencies = 0, + .features = 0, }; pub const nehalem = Cpu{ .name = "nehalem", .llvm_name = "nehalem", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2599,7 +2599,7 @@ pub const cpu = struct { .nopl, .popcnt, .sse, - .sse42, + .sse4_2, .x87, }), }; @@ -2607,8 +2607,8 @@ pub const cpu = struct { pub const nocona = Cpu{ .name = "nocona", .llvm_name = "nocona", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2625,10 +2625,10 @@ pub const cpu = struct { pub const opteron = Cpu{ .name = "opteron", .llvm_name = "opteron", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .fxsr, @@ -2645,10 +2645,10 @@ pub const cpu = struct { pub const opteron_sse3 = Cpu{ .name = "opteron_sse3", .llvm_name = "opteron-sse3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnowa3, - .bit64, + .@"3dnowa", + .@"64bit", .cmov, .cx8, .cx16, @@ -2666,8 +2666,8 @@ pub const cpu = struct { pub const penryn = Cpu{ .name = "penryn", .llvm_name = "penryn", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2677,7 +2677,7 @@ pub const cpu = struct { .macrofusion, .nopl, .sse, - .sse41, + .sse4_1, .slow_unaligned_mem_16, .x87, }), @@ -2686,7 +2686,7 @@ pub const cpu = struct { pub const pentium = Cpu{ .name = "pentium", .llvm_name = "pentium", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -2696,7 +2696,7 @@ pub const cpu = struct { pub const pentium_m = Cpu{ .name = "pentium_m", .llvm_name = "pentium-m", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2712,7 +2712,7 @@ pub const cpu = struct { pub const pentium_mmx = Cpu{ .name = "pentium_mmx", .llvm_name = "pentium-mmx", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -2723,7 +2723,7 @@ pub const cpu = struct { pub const pentium2 = Cpu{ .name = "pentium2", .llvm_name = "pentium2", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2737,7 +2737,7 @@ pub const cpu = struct { pub const pentium3 = Cpu{ .name = "pentium3", .llvm_name = "pentium3", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2752,7 +2752,7 @@ pub const cpu = struct { pub const pentium3m = Cpu{ .name = "pentium3m", .llvm_name = "pentium3m", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2767,7 +2767,7 @@ pub const cpu = struct { pub const pentium4 = Cpu{ .name = "pentium4", .llvm_name = "pentium4", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2783,7 +2783,7 @@ pub const cpu = struct { pub const pentium4m = Cpu{ .name = "pentium4m", .llvm_name = "pentium4m", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2799,7 +2799,7 @@ pub const cpu = struct { pub const pentiumpro = Cpu{ .name = "pentiumpro", .llvm_name = "pentiumpro", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .nopl, @@ -2811,7 +2811,7 @@ pub const cpu = struct { pub const prescott = Cpu{ .name = "prescott", .llvm_name = "prescott", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2827,8 +2827,8 @@ pub const cpu = struct { pub const sandybridge = Cpu{ .name = "sandybridge", .llvm_name = "sandybridge", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .avx, .cmov, @@ -2845,7 +2845,7 @@ pub const cpu = struct { .pclmul, .popcnt, .false_deps_popcnt, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .slow_unaligned_mem_32, @@ -2858,8 +2858,8 @@ pub const cpu = struct { pub const silvermont = Cpu{ .name = "silvermont", .llvm_name = "silvermont", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -2874,12 +2874,12 @@ pub const cpu = struct { .false_deps_popcnt, .prfchw, .rdrnd, - .sse42, + .sse4_2, .ssse3, .idivq_to_divl, .slow_incdec, - .slowLea, - .slowPmulld, + .slow_lea, + .slow_pmulld, .slow_two_mem_ops, .x87, }), @@ -2888,8 +2888,8 @@ pub const cpu = struct { pub const skx = Cpu{ .name = "skx", .llvm_name = "skx", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2932,7 +2932,7 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .avx512vl, @@ -2947,8 +2947,8 @@ pub const cpu = struct { pub const skylake = Cpu{ .name = "skylake", .llvm_name = "skylake", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -2986,7 +2986,7 @@ pub const cpu = struct { .rdrnd, .rdseed, .sgx, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .x87, @@ -3000,8 +3000,8 @@ pub const cpu = struct { pub const skylake_avx512 = Cpu{ .name = "skylake_avx512", .llvm_name = "skylake-avx512", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -3044,7 +3044,7 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, - .sse42, + .sse4_2, .slow_3ops_lea, .idivq_to_divl, .avx512vl, @@ -3059,8 +3059,8 @@ pub const cpu = struct { pub const slm = Cpu{ .name = "slm", .llvm_name = "slm", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -3075,12 +3075,12 @@ pub const cpu = struct { .false_deps_popcnt, .prfchw, .rdrnd, - .sse42, + .sse4_2, .ssse3, .idivq_to_divl, .slow_incdec, - .slowLea, - .slowPmulld, + .slow_lea, + .slow_pmulld, .slow_two_mem_ops, .x87, }), @@ -3089,8 +3089,8 @@ pub const cpu = struct { pub const tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .sse, .aes, .cldemote, @@ -3117,10 +3117,10 @@ pub const cpu = struct { .rdseed, .sgx, .sha, - .sse42, + .sse4_2, .ssse3, .slow_incdec, - .slowLea, + .slow_lea, .slow_two_mem_ops, .waitpkg, .x87, @@ -3134,8 +3134,8 @@ pub const cpu = struct { pub const westmere = Cpu{ .name = "westmere", .llvm_name = "westmere", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .cx16, @@ -3147,7 +3147,7 @@ pub const cpu = struct { .sse, .pclmul, .popcnt, - .sse42, + .sse4_2, .x87, }), }; @@ -3155,7 +3155,7 @@ pub const cpu = struct { pub const winchip_c6 = Cpu{ .name = "winchip_c6", .llvm_name = "winchip-c6", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, .slow_unaligned_mem_16, .x87, @@ -3165,9 +3165,9 @@ pub const cpu = struct { pub const winchip2 = Cpu{ .name = "winchip2", .llvm_name = "winchip2", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, - .dnow3, + .@"3dnow", .slow_unaligned_mem_16, .x87, }), @@ -3176,8 +3176,8 @@ pub const cpu = struct { pub const x86_64 = Cpu{ .name = "x86_64", .llvm_name = "x86-64", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .cmov, .cx8, .fxsr, @@ -3195,7 +3195,7 @@ pub const cpu = struct { pub const yonah = Cpu{ .name = "yonah", .llvm_name = "yonah", - .dependencies = featureSet(&[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -3211,8 +3211,8 @@ pub const cpu = struct { pub const znver1 = Cpu{ .name = "znver1", .llvm_name = "znver1", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -3229,7 +3229,7 @@ pub const cpu = struct { .fma, .fsgsbase, .fxsr, - .fast15bytenop, + .fast_15bytenop, .fast_bextr, .fast_lzcnt, .fast_scalar_shift_masks, @@ -3258,8 +3258,8 @@ pub const cpu = struct { pub const znver2 = Cpu{ .name = "znver2", .llvm_name = "znver2", - .dependencies = featureSet(&[_]Feature{ - .bit64, + .features = featureSet(&[_]Feature{ + .@"64bit", .adx, .sse, .aes, @@ -3277,7 +3277,7 @@ pub const cpu = struct { .fma, .fsgsbase, .fxsr, - .fast15bytenop, + .fast_15bytenop, .fast_bextr, .fast_lzcnt, .fast_scalar_shift_masks, @@ -3341,10 +3341,10 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.goldmont, &cpu.goldmont_plus, &cpu.haswell, - &cpu.i386, - &cpu.i486, - &cpu.i586, - &cpu.i686, + &cpu._i386, + &cpu._i486, + &cpu._i586, + &cpu._i686, &cpu.icelake_client, &cpu.icelake_server, &cpu.ivybridge, diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig index af3fd3a0158607a7aebe25929a936b8de1d010a9..e3faf853ea6f5cd0105c1f78b06afc3fa633e57b 100644 --- a/src-self-hosted/main.zig +++ b/src-self-hosted/main.zig @@ -791,7 +791,7 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro // cmd:targets ///////////////////////////////////////////////////////////////////////////////////// -fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void { +pub fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void { try stdout.write("Architectures:\n"); { comptime var i: usize = 0; diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 85a69518276274fb6b4af560802c5a81b561a68a..9ce4746950b25ebfb43367600372c37ed96b1f6b 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -84,6 +84,11 @@ const Error = extern enum { NotLazy, IsAsync, ImportOutsidePkgPath, + UnknownCpu, + UnknownSubArchitecture, + UnknownCpuFeature, + InvalidCpuFeatures, + InvalidLlvmCpuFeaturesFormat, }; const FILE = std.c.FILE; @@ -533,99 +538,20 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz } // ABI warning -export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { - printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { - std.debug.warn("Failed to list features: {}\n", .{@errorName(err)}); +export fn stage2_cmd_targets() c_int { + self_hosted_main.cmdTargets(std.heap.c_allocator, &[0][]u8{}) catch |err| { + std.debug.warn("unable to list targets: {}\n", .{@errorName(err)}); + return -1; }; -} - -fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { - const stdout_stream = &std.io.getStdOut().outStream().stream; - - const arch = Target.parseArchSub(arch_name) catch { - std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name}); - return; - }; - - try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)}); - - const features = arch.allFeaturesList(); - - var longest_len: usize = 0; - for (features) |feature| { - if (feature.name.len > longest_len) { - longest_len = feature.name.len; - } - } - - for (features) |feature| { - try stdout_stream.print(" {}", .{feature.name}); - - var i: usize = 0; - while (i < longest_len - feature.name.len) : (i += 1) { - try stdout_stream.write(" "); - } - - try stdout_stream.print(" - {}\n", .{feature.description}); - - if (show_dependencies and feature.dependencies != 0) { - for (feature.dependencies) |dependency| { - try stdout_stream.print(" {}\n", .{dependency.name}); - } - } - } -} - -// ABI warning -export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { - printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { - std.debug.warn("Failed to list features: {}\n", .{@errorName(err)}); - }; -} - -fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { - const stdout_stream = &std.io.getStdOut().outStream().stream; - - const arch = Target.parseArchTag(arch_name) catch { - std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name}); - return; - }; - - const cpus = std.target.getCpusForArch(arch); - - try stdout_stream.print("Available cpus for {}:\n", .{@tagName(arch)}); - - var longest_len: usize = 0; - for (cpus) |cpu| { - if (cpu.name.len > longest_len) { - longest_len = cpu.name.len; - } - } - - for (cpus) |cpu| { - try stdout_stream.print(" {}", .{cpu.name}); - - var i: usize = 0; - while (i < longest_len - cpu.name.len) : (i += 1) { - try stdout_stream.write(" "); - } - - try stdout_stream.write("\n"); - - if (show_dependencies and cpu.dependencies.len > 0) { - for (cpu.dependencies) |dependency| { - try stdout_stream.print(" {}\n", .{dependency.name}); - } - } - } + return 0; } const Stage2CpuFeatures = struct { allocator: *mem.Allocator, cpu_features: Target.Cross.CpuFeatures, - llvm_cpu_name: ?[:0]const u8, - llvm_features_str: ?[:0]const u8, + llvm_cpu_name: ?[*:0]const u8, + llvm_features_str: ?[*:0]const u8, builtin_str: [:0]const u8, cache_hash: [:0]const u8, @@ -636,10 +562,10 @@ const Stage2CpuFeatures = struct { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n"); + const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n", .{}); errdefer allocator.free(builtin_str); - const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n"); + const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n", .{}); errdefer allocator.free(cache_hash); self.* = Self{ @@ -655,7 +581,7 @@ const Stage2CpuFeatures = struct { fn createFromLLVM( allocator: *mem.Allocator, - arch: [*:0]const u8, + arch_name: [*:0]const u8, llvm_cpu_name_z: [*:0]const u8, llvm_cpu_features: [*:0]const u8, ) !*Self { @@ -687,10 +613,11 @@ const Stage2CpuFeatures = struct { return error.InvalidLlvmCpuFeaturesFormat; } for (arch.allFeaturesList()) |feature, index| { - if (mem.eql(u8, feature_name, feature.name)) { + const this_llvm_name = feature.llvm_name orelse continue; + if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { - .add => set |= 1 << index, - .sub => set &= ~@as(Target.Cpu.Feature.Set, 1 << index), + .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index), + .sub => set &= ~@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index), } break; } @@ -703,21 +630,19 @@ const Stage2CpuFeatures = struct { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const builtin_str = try std.fmt.allocPrint0( - allocator, - "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n", + const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures{{ .cpu = &Target.{}.cpu.{} }};\n", .{ arch.genericName(), cpu.name, - ); + }); errdefer allocator.free(builtin_str); - const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features); + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features }); errdefer allocator.free(cache_hash); self.* = Self{ .allocator = allocator, .cpu_features = .{ .cpu = cpu }, - .llvm_cpu_name = cpu.llvm_name, + .llvm_cpu_name = if (cpu.llvm_name) |n| n.ptr else null, .llvm_features_str = null, .builtin_str = builtin_str, .cache_hash = cache_hash, @@ -728,20 +653,22 @@ const Stage2CpuFeatures = struct { fn createFromCpuFeatures( allocator: *mem.Allocator, arch: Target.Arch, - features: Target.Cpu.Feature.Set, + feature_set: Target.Cpu.Feature.Set, ) !*Self { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features); + const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", .{feature_set}); errdefer allocator.free(cache_hash); const generic_arch_name = arch.genericName(); var builtin_str_buffer = try std.Buffer.allocPrint( allocator, - "CpuFeatures{{ .features = Arch.{}.featureSet(&[_]Arch.{}.Feature{{\n", - generic_arch_name, - generic_arch_name, + \\CpuFeatures{{ + \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{ + \\ + , + .{ generic_arch_name, generic_arch_name }, ); defer builtin_str_buffer.deinit(); @@ -750,7 +677,8 @@ const Stage2CpuFeatures = struct { // First, disable all features. // This way, we only get the ones the user requests. - for (arch.allFeatures()) |feature| { + const all_features = arch.allFeaturesList(); + for (all_features) |feature| { if (feature.llvm_name) |llvm_name| { try llvm_features_buffer.append("-"); try llvm_features_buffer.append(llvm_name); @@ -758,14 +686,16 @@ const Stage2CpuFeatures = struct { } } - for (features) |feature| { + for (all_features) |feature, index| { + if (!Target.Cpu.Feature.isEnabled(feature_set, @intCast(u7, index))) continue; + if (feature.llvm_name) |llvm_name| { try llvm_features_buffer.append("+"); try llvm_features_buffer.append(llvm_name); try llvm_features_buffer.append(","); } - try builtin_str_buffer.append(" ."); + try builtin_str_buffer.append(" ."); try builtin_str_buffer.append(feature.name); try builtin_str_buffer.append(",\n"); } @@ -774,13 +704,17 @@ const Stage2CpuFeatures = struct { llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); } - try builtin_str_buffer.append("})};\n"); + try builtin_str_buffer.append( + \\ }), + \\}; + \\ + ); self.* = Self{ .allocator = allocator, - .cpu_features = .{ .features = features }, + .cpu_features = .{ .features = feature_set }, .llvm_cpu_name = null, - .llvm_features_str = llvm_features_buffer.toOwnedSlice(), + .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr, .builtin_str = builtin_str_buffer.toOwnedSlice(), .cache_hash = cache_hash, }; @@ -790,7 +724,7 @@ const Stage2CpuFeatures = struct { fn destroy(self: *Self) void { self.allocator.free(self.cache_hash); self.allocator.free(self.builtin_str); - if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str); + // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str); self.allocator.destroy(self); } }; @@ -803,6 +737,9 @@ export fn stage2_cpu_features_parse_cpu( ) Error { result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, + error.UnknownCpu => return .UnknownCpu, + error.UnknownArchitecture => return .UnknownArchitecture, + error.UnknownSubArchitecture => return .UnknownSubArchitecture, }; return .None; } @@ -821,6 +758,10 @@ export fn stage2_cpu_features_parse_features( ) Error { result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, + error.UnknownCpuFeature => return .UnknownCpuFeature, + error.InvalidCpuFeatures => return .InvalidCpuFeatures, + error.UnknownArchitecture => return .UnknownArchitecture, + error.UnknownSubArchitecture => return .UnknownSubArchitecture, }; return .None; } @@ -853,6 +794,9 @@ export fn stage2_cpu_features_llvm( llvm_cpu_features, ) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, + error.UnknownArchitecture => return .UnknownArchitecture, + error.UnknownSubArchitecture => return .UnknownSubArchitecture, + error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat, }; return .None; } diff --git a/src/error.cpp b/src/error.cpp index 9fc0383b1b5334be37b7df974b9acbd8c5def38c..6c6abfcd22e42a5f7a1a02fd5c596161d07bf463 100644 --- a/src/error.cpp +++ b/src/error.cpp @@ -58,6 +58,11 @@ const char *err_str(Error err) { case ErrorNotLazy: return "not lazy"; case ErrorIsAsync: return "is async"; case ErrorImportOutsidePkgPath: return "import of file outside package path"; + case ErrorUnknownCpu: return "unknown CPU"; + case ErrorUnknownSubArchitecture: return "unknown sub-architecture"; + case ErrorUnknownCpuFeature: return "unknown CPU feature"; + case ErrorInvalidCpuFeatures: return "invalid CPU features"; + case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format"; } return "(invalid error)"; } diff --git a/src/main.cpp b/src/main.cpp index d5804e795c18578714698e6a9005cb301fe7cbbe..8e331461f8c5d01584b514fdfe53caebe8472e62 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -131,11 +131,6 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --test-name-prefix [text] add prefix to all tests\n" " --test-cmd [arg] specify test execution command one arg at a time\n" " --test-cmd-bin appends test binary path to test cmd args\n" - "\n" - "Targets Options:\n" - " --list-features [arch] list available features for the given architecture\n" - " --list-cpus [arch] list available cpus for the given architecture\n" - " --show-dependencies list feature dependencies for each entry from --list-{features,cpus}\n" , arg0); return return_code; } @@ -160,88 +155,6 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) { return return_code; } -static bool arch_available_in_llvm(ZigLLVM_ArchType arch) { - LLVMTargetRef target_ref; - char *err_msg = nullptr; - char triple_string[128]; - sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch)); - return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg); -} - -static int print_target_list(FILE *f) { - ZigTarget native; - get_native_target(&native); - - fprintf(f, "Architectures:\n"); - size_t arch_count = target_arch_count(); - for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) { - ZigLLVM_ArchType arch = target_arch_enum(arch_i); - if (!arch_available_in_llvm(arch)) - continue; - const char *arch_name = target_arch_name(arch); - SubArchList sub_arch_list = target_subarch_list(arch); - size_t sub_count = target_subarch_count(sub_arch_list); - const char *arch_native_str = (native.arch == arch) ? " (native)" : ""; - fprintf(f, " %s%s\n", arch_name, arch_native_str); - for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) { - ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i); - const char *sub_name = target_subarch_name(sub); - const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : ""; - fprintf(f, " %s%s\n", sub_name, sub_native_str); - } - } - - fprintf(f, "\nOperating Systems:\n"); - size_t os_count = target_os_count(); - for (size_t i = 0; i < os_count; i += 1) { - Os os_type = target_os_enum(i); - const char *native_str = (native.os == os_type) ? " (native)" : ""; - fprintf(f, " %s%s\n", target_os_name(os_type), native_str); - } - - fprintf(f, "\nC ABIs:\n"); - size_t abi_count = target_abi_count(); - for (size_t i = 0; i < abi_count; i += 1) { - ZigLLVM_EnvironmentType abi = target_abi_enum(i); - const char *native_str = (native.abi == abi) ? " (native)" : ""; - fprintf(f, " %s%s\n", target_abi_name(abi), native_str); - } - - fprintf(f, "\nAvailable libcs:\n"); - size_t libc_count = target_libc_count(); - for (size_t i = 0; i < libc_count; i += 1) { - ZigTarget libc_target; - target_libc_enum(i, &libc_target); - bool is_native = native.arch == libc_target.arch && - native.os == libc_target.os && - native.abi == libc_target.abi; - const char *native_str = is_native ? " (native)" : ""; - fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch), - target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str); - } - - fprintf(f, "\nAvailable glibc versions:\n"); - ZigGLibCAbi *glibc_abi; - Error err; - if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) { - return EXIT_FAILURE; - } - for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) { - ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i); - bool is_native = native.glibc_version != nullptr && - native.glibc_version->major == this_ver->major && - native.glibc_version->minor == this_ver->minor && - native.glibc_version->patch == this_ver->patch; - const char *native_str = is_native ? " (native)" : ""; - if (this_ver->patch == 0) { - fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str); - } else { - fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str); - } - } - return EXIT_SUCCESS; -} - enum Cmd { CmdNone, CmdBuild, @@ -538,10 +451,6 @@ int main(int argc, char **argv) { const char *cpu = nullptr; const char *features = nullptr; - const char *targets_list_features_arch = nullptr; - const char *targets_list_cpus_arch = nullptr; - bool targets_show_dependencies = false; - ZigList llvm_argv = {0}; llvm_argv.append("zig (LLVM option parsing)"); @@ -792,8 +701,6 @@ int main(int argc, char **argv) { cur_pkg = cur_pkg->parent; } else if (strcmp(arg, "-ffunction-sections") == 0) { function_sections = true; - } else if (strcmp(arg, "--show-dependencies") == 0) { - targets_show_dependencies = true; } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); @@ -951,10 +858,6 @@ int main(int argc, char **argv) { , argv[i]); return EXIT_FAILURE; } - } else if (strcmp(arg, "--list-features") == 0) { - targets_list_features_arch = argv[i]; - } else if (strcmp(arg, "--list-cpus") == 0) { - targets_list_cpus_arch = argv[i]; } else if (strcmp(arg, "-target-cpu") == 0) { cpu = argv[i]; } else if (strcmp(arg, "-target-feature") == 0) { @@ -1468,21 +1371,7 @@ int main(int argc, char **argv) { return main_exit(root_progress_node, EXIT_SUCCESS); } case CmdTargets: - if (targets_list_features_arch != nullptr) { - stage2_list_features_for_arch( - targets_list_features_arch, - strlen(targets_list_features_arch), - targets_show_dependencies); - return 0; - } else if (targets_list_cpus_arch != nullptr) { - stage2_list_cpus_for_arch( - targets_list_cpus_arch, - strlen(targets_list_cpus_arch), - targets_show_dependencies); - return 0; - } else { - return print_target_list(stdout); - } + return stage2_cmd_targets(); case CmdNone: return print_full_usage(arg0, stderr, EXIT_FAILURE); } diff --git a/src/userland.cpp b/src/userland.cpp index 93944f0089c5d7f9c4d440b9183827b6a3325b97..22d2daa8e43512c955e015f16cd8926601d23a68 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -89,16 +89,6 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {} void stage2_progress_disable_tty(Stage2Progress *progress) {} void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){} -void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) { - const char *msg = "stage0 called stage2_list_features_for_arch"; - stage2_panic(msg, strlen(msg)); -} - -void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) { - const char *msg = "stage0 called stage2_list_cpus_for_arch"; - stage2_panic(msg, strlen(msg)); -} - struct Stage2CpuFeatures { const char *llvm_cpu_name; const char *llvm_cpu_features; @@ -150,3 +140,8 @@ void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, *ptr = cpu_features->builtin_str; *len = strlen(cpu_features->builtin_str); } + +int stage2_cmd_targets(void) { + const char *msg = "stage0 called stage2_cmd_targets"; + stage2_panic(msg, strlen(msg)); +} diff --git a/src/userland.h b/src/userland.h index 1fd40039a658a3c751c96e008c605ffa288095dc..052321a718f8c9d8e8c8ffe669c7662551f34ba1 100644 --- a/src/userland.h +++ b/src/userland.h @@ -78,6 +78,11 @@ enum Error { ErrorNotLazy, ErrorIsAsync, ErrorImportOutsidePkgPath, + ErrorUnknownCpu, + ErrorUnknownSubArchitecture, + ErrorUnknownCpuFeature, + ErrorInvalidCpuFeatures, + ErrorInvalidLlvmCpuFeaturesFormat, }; // ABI warning @@ -174,12 +179,6 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node); ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items); -// ABI warning -ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); - -// ABI warning -ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); - // ABI warning struct Stage2CpuFeatures; @@ -212,4 +211,8 @@ ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeat ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len); +// ABI warning +ZIG_EXTERN_C int stage2_cmd_targets(void); + + #endif -- 2.54.0 From bf82929557f0b116979261c522c62cf6393a08f2 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 12:41:18 -0500 Subject: [PATCH 32/63] fix std.Target.Arch.parseCpuFeatureSet --- lib/std/target.zig | 62 +++++++++++++++++++++++++------------- src-self-hosted/stage1.zig | 2 +- 2 files changed, 42 insertions(+), 22 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 2f3e740c9016d6054f8abd8e8229696556a43587..8d809b1ce8c2a97e3418313a7d18bdf716018199 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -228,30 +228,40 @@ pub const Target = union(enum) { var it = mem.tokenize(features_text, ","); while (it.next()) |item_text| { - const feature_name = blk: { - if (mem.startsWith(u8, item_text, "+")) { - switch (mode) { - .unknown, .baseline => mode = .baseline, - .whitelist => return error.InvalidCpuFeatures, - } - break :blk item_text[1..]; - } else if (mem.startsWith(u8, item_text, "-")) { - switch (mode) { - .unknown, .baseline => mode = .baseline, - .whitelist => return error.InvalidCpuFeatures, - } - break :blk item_text[1..]; - } else { - switch (mode) { - .unknown, .whitelist => mode = .whitelist, - .baseline => return error.InvalidCpuFeatures, - } - break :blk item_text; + var feature_name: []const u8 = undefined; + var op: enum { + add, + sub, + } = undefined; + if (mem.startsWith(u8, item_text, "+")) { + switch (mode) { + .unknown, .baseline => mode = .baseline, + .whitelist => return error.InvalidCpuFeatures, } - }; + op = .add; + feature_name = item_text[1..]; + } else if (mem.startsWith(u8, item_text, "-")) { + switch (mode) { + .unknown, .baseline => mode = .baseline, + .whitelist => return error.InvalidCpuFeatures, + } + op = .sub; + feature_name = item_text[1..]; + } else { + switch (mode) { + .unknown, .whitelist => mode = .whitelist, + .baseline => return error.InvalidCpuFeatures, + } + op = .add; + feature_name = item_text; + } for (arch.allFeaturesList()) |feature, index| { if (mem.eql(u8, feature_name, feature.name)) { - set |= @splat(2, @as(Cpu.Feature.Set, 1) << @intCast(u7, index)); + const one_bit = @as(Cpu.Feature.Set, 1) << @intCast(u7, index); + switch (op) { + .add => set |= @splat(2, one_bit), + .sub => set &= @splat(2, ~one_bit), + } break; } } else { @@ -1050,3 +1060,13 @@ pub const Target = union(enum) { return .unavailable; } }; + +test "parseCpuFeatureSet" { + const set = try @as(Target.Arch, .x86_64).parseCpuFeatureSet("-sse,-avx,-cx8"); + std.testing.expect(!Target.x86.featureSetHas(set, .sse)); + std.testing.expect(!Target.x86.featureSetHas(set, .avx)); + std.testing.expect(!Target.x86.featureSetHas(set, .cx8)); + // These are expected because they are part of the baseline + std.testing.expect(Target.x86.featureSetHas(set, .cmov)); + std.testing.expect(Target.x86.featureSetHas(set, .fxsr)); +} diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 9ce4746950b25ebfb43367600372c37ed96b1f6b..a640bfb2deb6c6d3067a638ce5124a1ac53bfe1a 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -617,7 +617,7 @@ const Stage2CpuFeatures = struct { if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index), - .sub => set &= ~@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index), + .sub => set &= ~(@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index)), } break; } -- 2.54.0 From f3dd9bbdaca5ba3735feb405a890a4646905533a Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 13:40:25 -0500 Subject: [PATCH 33/63] improve `zig targets` --- BRANCH_TODO | 10 +-- lib/std/builtin.zig | 4 +- lib/std/target.zig | 29 +++++---- src-self-hosted/main.zig | 44 +------------ src-self-hosted/print_targets.zig | 101 ++++++++++++++++++++++++++++++ src-self-hosted/stage1.zig | 8 ++- src/ir.cpp | 6 +- 7 files changed, 135 insertions(+), 67 deletions(-) create mode 100644 src-self-hosted/print_targets.zig diff --git a/BRANCH_TODO b/BRANCH_TODO index 4dfc95f7067d35777a95737576eea7191e168570..2e92089e3a5df81634e89eef7b9a45175421d923 100644 --- a/BRANCH_TODO +++ b/BRANCH_TODO @@ -1,12 +1,8 @@ Finish these thigns before merging teh branch - * it gets the wrong answers with `-target-feature -sse,-avx` - + * zig targets + - use non-reflection based cpu detection? * finish refactoring target/arch/* - * `zig builtin` integration - * move target details to better location - * +foo,-bar vs foo,bar - * baseline features const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ @@ -38,5 +34,3 @@ const i386_default_features_freestanding: []*const std.target.Feature = &[_]*con &std.target.x86.feature_slowUnalignedMem16, &std.target.x86.feature_x87, }; - - diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig index b5c137c2e18579ddac51435202fab889df783707..17918f3f73fee7a12b9abee4ad4073cb563f2a2e 100644 --- a/lib/std/builtin.zig +++ b/lib/std/builtin.zig @@ -18,8 +18,8 @@ pub const ObjectFormat = std.Target.ObjectFormat; /// Deprecated: use `std.Target.SubSystem`. pub const SubSystem = std.Target.SubSystem; -/// Deprecated: use `std.Target.Cross.CpuFeatures`. -pub const CpuFeatures = std.Target.Cross.CpuFeatures; +/// Deprecated: use `std.Target.CpuFeatures`. +pub const CpuFeatures = std.Target.CpuFeatures; /// Deprecated: use `std.Target.Cpu`. pub const Cpu = std.Target.Cpu; diff --git a/lib/std/target.zig b/lib/std/target.zig index 8d809b1ce8c2a97e3418313a7d18bdf716018199..d49d395dda5186cd9f33264a96cd18182f603154 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -569,18 +569,18 @@ pub const Target = union(enum) { os: Os, abi: Abi, cpu_features: CpuFeatures = .baseline, + }; - pub const CpuFeatures = union(enum) { - /// The "default" set of CPU features for cross-compiling. A conservative set - /// of features that is expected to be supported on most available hardware. - baseline, + pub const CpuFeatures = union(enum) { + /// The "default" set of CPU features for cross-compiling. A conservative set + /// of features that is expected to be supported on most available hardware. + baseline, - /// Target one specific CPU. - cpu: *const Cpu, + /// Target one specific CPU. + cpu: *const Cpu, - /// Explicitly provide the entire CPU feature set. - features: Cpu.Feature.Set, - }; + /// Explicitly provide the entire CPU feature set. + features: Cpu.Feature.Set, }; pub const current = Target{ @@ -594,8 +594,15 @@ pub const Target = union(enum) { pub const stack_align = 16; - pub fn cpuFeatures(self: Target) []const *const Cpu.Feature { - return switch (self.cpu_features) { + pub fn getCpuFeatures(self: Target) CpuFeatures { + return switch (self) { + .Native => builtin.cpu_features, + .Cross => |cross| cross.cpu_features, + }; + } + + pub fn cpuFeaturesList(self: Target) []const *const Cpu.Feature { + return switch (self.getCpuFeatures()) { .baseline => self.arch.baselineFeatures(), .cpu => |cpu| cpu.features, .features => |features| features, diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig index e3faf853ea6f5cd0105c1f78b06afc3fa633e57b..5751b7983de020d3c83e04ab7345172f5f920fe6 100644 --- a/src-self-hosted/main.zig +++ b/src-self-hosted/main.zig @@ -79,7 +79,7 @@ pub fn main() !void { } else if (mem.eql(u8, cmd, "libc")) { return cmdLibC(allocator, cmd_args); } else if (mem.eql(u8, cmd, "targets")) { - return cmdTargets(allocator, cmd_args); + return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout); } else if (mem.eql(u8, cmd, "version")) { return cmdVersion(allocator, cmd_args); } else if (mem.eql(u8, cmd, "zen")) { @@ -789,48 +789,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro } } -// cmd:targets ///////////////////////////////////////////////////////////////////////////////////// - -pub fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void { - try stdout.write("Architectures:\n"); - { - comptime var i: usize = 0; - inline while (i < @memberCount(builtin.Arch)) : (i += 1) { - comptime const arch_tag = @memberName(builtin.Arch, i); - // NOTE: Cannot use empty string, see #918. - comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n"; - - try stdout.print(" {}{}", .{ arch_tag, native_str }); - } - } - try stdout.write("\n"); - - try stdout.write("Operating Systems:\n"); - { - comptime var i: usize = 0; - inline while (i < @memberCount(Target.Os)) : (i += 1) { - comptime const os_tag = @memberName(Target.Os, i); - // NOTE: Cannot use empty string, see #918. - comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n"; - - try stdout.print(" {}{}", .{ os_tag, native_str }); - } - } - try stdout.write("\n"); - - try stdout.write("C ABIs:\n"); - { - comptime var i: usize = 0; - inline while (i < @memberCount(Target.Abi)) : (i += 1) { - comptime const abi_tag = @memberName(Target.Abi, i); - // NOTE: Cannot use empty string, see #918. - comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n"; - - try stdout.print(" {}{}", .{ abi_tag, native_str }); - } - } -} - fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void { try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)}); } diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig new file mode 100644 index 0000000000000000000000000000000000000000..233b6c106d9a8b15b2ea810de93acaef2efb2f55 --- /dev/null +++ b/src-self-hosted/print_targets.zig @@ -0,0 +1,101 @@ +const std = @import("std"); +const fs = std.fs; +const io = std.io; +const mem = std.mem; +const Allocator = mem.Allocator; +const Target = std.Target; + +pub fn cmdTargets( + allocator: *Allocator, + args: []const []const u8, + stdout: *io.OutStream(fs.File.WriteError), +) !void { + const BOS = io.BufferedOutStream(fs.File.WriteError); + var bos = BOS.init(stdout); + var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream); + + try jws.beginObject(); + + try jws.objectField("arch"); + try jws.beginObject(); + { + inline for (@typeInfo(Target.Arch).Union.fields) |field| { + try jws.objectField(field.name); + if (field.field_type == void) { + try jws.emitNull(); + } else { + try jws.emitString(@typeName(field.field_type)); + } + } + } + try jws.endObject(); + + try jws.objectField("subArch"); + try jws.beginObject(); + const sub_arch_list = [_]type{ + Target.Arch.Arm32, + Target.Arch.Arm64, + Target.Arch.Kalimba, + Target.Arch.Mips, + }; + inline for (sub_arch_list) |SubArch| { + try jws.objectField(@typeName(SubArch)); + try jws.beginArray(); + inline for (@typeInfo(SubArch).Enum.fields) |field| { + try jws.arrayElem(); + try jws.emitString(field.name); + } + try jws.endArray(); + } + try jws.endObject(); + + try jws.objectField("os"); + try jws.beginArray(); + { + comptime var i: usize = 0; + inline while (i < @memberCount(Target.Os)) : (i += 1) { + const os_tag = @memberName(Target.Os, i); + try jws.arrayElem(); + try jws.emitString(os_tag); + } + } + try jws.endArray(); + + try jws.objectField("abi"); + try jws.beginArray(); + { + comptime var i: usize = 0; + inline while (i < @memberCount(Target.Abi)) : (i += 1) { + const abi_tag = @memberName(Target.Abi, i); + try jws.arrayElem(); + try jws.emitString(abi_tag); + } + } + try jws.endArray(); + + try jws.objectField("native"); + try jws.beginObject(); + { + const triple = try Target.current.zigTriple(allocator); + defer allocator.free(triple); + try jws.objectField("triple"); + try jws.emitString(triple); + } + try jws.objectField("arch"); + try jws.emitString(@tagName(Target.current.getArch())); + try jws.objectField("os"); + try jws.emitString(@tagName(Target.current.getOs())); + try jws.objectField("abi"); + try jws.emitString(@tagName(Target.current.getAbi())); + try jws.objectField("cpuName"); + switch (Target.current.getCpuFeatures()) { + .baseline, .features => try jws.emitNull(), + .cpu => |cpu| try jws.emitString(cpu.name), + } + try jws.endObject(); + + try jws.endObject(); + + try bos.stream.writeByte('\n'); + return bos.flush(); +} diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index a640bfb2deb6c6d3067a638ce5124a1ac53bfe1a..307e95332136d22201ab8c409133a091cfe90784 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -539,7 +539,11 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz // ABI warning export fn stage2_cmd_targets() c_int { - self_hosted_main.cmdTargets(std.heap.c_allocator, &[0][]u8{}) catch |err| { + @import("print_targets.zig").cmdTargets( + std.heap.c_allocator, + &[0][]u8{}, + &std.io.getStdOut().outStream().stream, + ) catch |err| { std.debug.warn("unable to list targets: {}\n", .{@errorName(err)}); return -1; }; @@ -548,7 +552,7 @@ export fn stage2_cmd_targets() c_int { const Stage2CpuFeatures = struct { allocator: *mem.Allocator, - cpu_features: Target.Cross.CpuFeatures, + cpu_features: Target.CpuFeatures, llvm_cpu_name: ?[*:0]const u8, llvm_features_str: ?[*:0]const u8, diff --git a/src/ir.cpp b/src/ir.cpp index db1faac37c7eefa266b46819e231a0280ecf98ce..f983ce4bae3f8dd005d31e1fdfbf66f054c71818 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -22349,7 +22349,11 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns return ira->codegen->invalid_instruction; } - assert(target->value->type->id == ZigTypeIdEnum); + if (target->value->type->id != ZigTypeIdEnum) { + ir_add_error(ira, target, + buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name))); + return ira->codegen->invalid_instruction; + } if (target->value->type->data.enumeration.src_field_count == 1 && !target->value->type->data.enumeration.non_exhaustive) { -- 2.54.0 From 6e88883edf8400b835f5d792b8aba54c8d4490f2 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 22:21:45 -0500 Subject: [PATCH 34/63] import data from llvm 9 --- lib/std/target/aarch64.zig | 1356 ++++--- lib/std/target/amdgpu.zig | 3654 ++++++++---------- lib/std/target/arm.zig | 4969 +++++++++++++------------ lib/std/target/avr.zig | 7230 ++++++++++++------------------------ lib/std/target/bpf.zig | 134 +- lib/std/target/hexagon.zig | 537 ++- lib/std/target/mips.zig | 1428 +++---- lib/std/target/msp430.zig | 126 +- lib/std/target/nvptx.zig | 731 ++-- lib/std/target/powerpc.zig | 2148 ++++++----- lib/std/target/riscv.zig | 183 +- lib/std/target/sparc.zig | 1015 ++--- lib/std/target/systemz.zig | 1183 +++--- lib/std/target/wasm.zig | 239 +- lib/std/target/x86.zig | 1636 ++++---- 15 files changed, 11895 insertions(+), 14674 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index f0238bf8f4a4eb6b87eedcc52176ac595e1114f6..4d547b74c11fdb03620454940ab431a4ec369455 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -2,21 +2,23 @@ const std = @import("../std.zig"); const Cpu = std.Target.Cpu; pub const Feature = enum { + a35, + a53, + a55, + a57, + a72, + a73, + a75, + a76, aes, - am, aggressive_fma, - altnzcv, alternate_sextload_cvt_f32_pattern, + altnzcv, + am, arith_bcc_fusion, arith_cbz_fusion, balance_fp_ops, bti, - ccidx, - ccpp, - crc, - ccdp, - call_saved_x8, - call_saved_x9, call_saved_x10, call_saved_x11, call_saved_x12, @@ -24,56 +26,60 @@ pub const Feature = enum { call_saved_x14, call_saved_x15, call_saved_x18, + call_saved_x8, + call_saved_x9, + ccdp, + ccidx, + ccpp, complxnum, + crc, crypto, custom_cheap_as_move, - dit, + cyclone, disable_latency_sched_heuristic, + dit, dotprod, exynos_cheap_as_move, + exynosm1, + exynosm2, + exynosm3, + exynosm4, + falkor, fmi, - fp16fml, + force_32bit_jump_tables, fp_armv8, + fp16fml, fptoint, - force_32bit_jump_tables, fullfp16, - fuse_aes, fuse_address, + fuse_aes, fuse_arith_logic, - fuse_csel, fuse_crypto_eor, + fuse_csel, fuse_literals, jsconv, + kryo, lor, lse, lsl_fast, mpam, mte, neon, - nv, no_neg_immediates, + nv, pa, pan, pan_rwv, perfmon, - use_postra_scheduler, - predres, predictable_select_expensive, - uaops, + predres, + rand, ras, rasv8_4, rcpc, rcpc_immo, rdm, - rand, reserve_x1, - reserve_x2, - reserve_x3, - reserve_x4, - reserve_x5, - reserve_x6, - reserve_x7, - reserve_x9, reserve_x10, reserve_x11, reserve_x12, @@ -81,6 +87,7 @@ pub const Feature = enum { reserve_x14, reserve_x15, reserve_x18, + reserve_x2, reserve_x20, reserve_x21, reserve_x22, @@ -90,31 +97,51 @@ pub const Feature = enum { reserve_x26, reserve_x27, reserve_x28, + reserve_x3, + reserve_x4, + reserve_x5, + reserve_x6, + reserve_x7, + reserve_x9, + saphira, sb, sel2, sha2, sha3, + slow_misaligned_128store, + slow_paired_128, + slow_strqro_store, sm4, spe, + specrestrict, ssbs, + strict_align, sve, sve2, sve2_aes, sve2_bitperm, sve2_sha3, sve2_sm4, - slow_misaligned_128store, - slow_paired_128, - slow_strqro_store, - specrestrict, - strict_align, + thunderx, + thunderx2t99, + thunderxt81, + thunderxt83, + thunderxt88, tlb_rmi, - tracev84, - use_aa, tpidr_el1, tpidr_el2, tpidr_el3, + tracev8_4, + tsv110, + uaops, + use_aa, + use_postra_scheduler, use_reciprocal_square_root, + v8_1a, + v8_2a, + v8_3a, + v8_4a, + v8_5a, vh, zcm, zcz, @@ -129,22 +156,143 @@ pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.a35)] = .{ + .index = @enumToInt(Feature.a35), + .name = @tagName(Feature.a35), + .llvm_name = "a35", + .description = "Cortex-A35 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a53)] = .{ + .index = @enumToInt(Feature.a53), + .name = @tagName(Feature.a53), + .llvm_name = "a53", + .description = "Cortex-A53 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + .use_aa, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.a55)] = .{ + .index = @enumToInt(Feature.a55), + .name = @tagName(Feature.a55), + .llvm_name = "a55", + .description = "Cortex-A55 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, + }), + }; + result[@enumToInt(Feature.a57)] = .{ + .index = @enumToInt(Feature.a57), + .name = @tagName(Feature.a57), + .llvm_name = "a57", + .description = "Cortex-A57 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .fuse_literals, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.a72)] = .{ + .index = @enumToInt(Feature.a72), + .name = @tagName(Feature.a72), + .llvm_name = "a72", + .description = "Cortex-A72 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a73)] = .{ + .index = @enumToInt(Feature.a73), + .name = @tagName(Feature.a73), + .llvm_name = "a73", + .description = "Cortex-A73 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a75)] = .{ + .index = @enumToInt(Feature.a75), + .name = @tagName(Feature.a75), + .llvm_name = "a75", + .description = "Cortex-A75 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, + }), + }; + result[@enumToInt(Feature.a76)] = .{ + .index = @enumToInt(Feature.a76), + .name = @tagName(Feature.a76), + .llvm_name = "a76", + .description = "Cortex-A76 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .neon, + .rcpc, + .ssbs, + .v8_2a, + }), + }; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), .name = @tagName(Feature.aes), .llvm_name = "aes", .description = "Enable AES support", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .neon, }), }; - result[@enumToInt(Feature.am)] = .{ - .index = @enumToInt(Feature.am), - .name = @tagName(Feature.am), - .llvm_name = "am", - .description = "Enable v8.4-A Activity Monitors extension", - .dependencies = 0, - }; result[@enumToInt(Feature.aggressive_fma)] = .{ .index = @enumToInt(Feature.aggressive_fma), .name = @tagName(Feature.aggressive_fma), @@ -152,13 +300,6 @@ pub const all_features = blk: { .description = "Enable Aggressive FMA for floating-point.", .dependencies = 0, }; - result[@enumToInt(Feature.altnzcv)] = .{ - .index = @enumToInt(Feature.altnzcv), - .name = @tagName(Feature.altnzcv), - .llvm_name = "altnzcv", - .description = "Enable alternative NZCV format for floating point comparisons", - .dependencies = 0, - }; result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{ .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern), .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern), @@ -166,6 +307,20 @@ pub const all_features = blk: { .description = "Use alternative pattern for sextload convert to f32", .dependencies = 0, }; + result[@enumToInt(Feature.altnzcv)] = .{ + .index = @enumToInt(Feature.altnzcv), + .name = @tagName(Feature.altnzcv), + .llvm_name = "altnzcv", + .description = "Enable alternative NZCV format for floating point comparisons", + .dependencies = 0, + }; + result[@enumToInt(Feature.am)] = .{ + .index = @enumToInt(Feature.am), + .name = @tagName(Feature.am), + .llvm_name = "am", + .description = "Enable v8.4-A Activity Monitors extension", + .dependencies = 0, + }; result[@enumToInt(Feature.arith_bcc_fusion)] = .{ .index = @enumToInt(Feature.arith_bcc_fusion), .name = @tagName(Feature.arith_bcc_fusion), @@ -194,48 +349,6 @@ pub const all_features = blk: { .description = "Enable Branch Target Identification", .dependencies = 0, }; - result[@enumToInt(Feature.ccidx)] = .{ - .index = @enumToInt(Feature.ccidx), - .name = @tagName(Feature.ccidx), - .llvm_name = "ccidx", - .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .dependencies = 0, - }; - result[@enumToInt(Feature.ccpp)] = .{ - .index = @enumToInt(Feature.ccpp), - .name = @tagName(Feature.ccpp), - .llvm_name = "ccpp", - .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .dependencies = 0, - }; - result[@enumToInt(Feature.crc)] = .{ - .index = @enumToInt(Feature.crc), - .name = @tagName(Feature.crc), - .llvm_name = "crc", - .description = "Enable ARMv8 CRC-32 checksum instructions", - .dependencies = 0, - }; - result[@enumToInt(Feature.ccdp)] = .{ - .index = @enumToInt(Feature.ccdp), - .name = @tagName(Feature.ccdp), - .llvm_name = "ccdp", - .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .dependencies = 0, - }; - result[@enumToInt(Feature.call_saved_x8)] = .{ - .index = @enumToInt(Feature.call_saved_x8), - .name = @tagName(Feature.call_saved_x8), - .llvm_name = "call-saved-x8", - .description = "Make X8 callee saved.", - .dependencies = 0, - }; - result[@enumToInt(Feature.call_saved_x9)] = .{ - .index = @enumToInt(Feature.call_saved_x9), - .name = @tagName(Feature.call_saved_x9), - .llvm_name = "call-saved-x9", - .description = "Make X9 callee saved.", - .dependencies = 0, - }; result[@enumToInt(Feature.call_saved_x10)] = .{ .index = @enumToInt(Feature.call_saved_x10), .name = @tagName(Feature.call_saved_x10), @@ -285,22 +398,66 @@ pub const all_features = blk: { .description = "Make X18 callee saved.", .dependencies = 0, }; + result[@enumToInt(Feature.call_saved_x8)] = .{ + .index = @enumToInt(Feature.call_saved_x8), + .name = @tagName(Feature.call_saved_x8), + .llvm_name = "call-saved-x8", + .description = "Make X8 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.call_saved_x9)] = .{ + .index = @enumToInt(Feature.call_saved_x9), + .name = @tagName(Feature.call_saved_x9), + .llvm_name = "call-saved-x9", + .description = "Make X9 callee saved.", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccdp)] = .{ + .index = @enumToInt(Feature.ccdp), + .name = @tagName(Feature.ccdp), + .llvm_name = "ccdp", + .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccidx)] = .{ + .index = @enumToInt(Feature.ccidx), + .name = @tagName(Feature.ccidx), + .llvm_name = "ccidx", + .description = "Enable v8.3-A Extend of the CCSIDR number of sets", + .dependencies = 0, + }; + result[@enumToInt(Feature.ccpp)] = .{ + .index = @enumToInt(Feature.ccpp), + .name = @tagName(Feature.ccpp), + .llvm_name = "ccpp", + .description = "Enable v8.2 data Cache Clean to Point of Persistence", + .dependencies = 0, + }; result[@enumToInt(Feature.complxnum)] = .{ .index = @enumToInt(Feature.complxnum), .name = @tagName(Feature.complxnum), .llvm_name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .neon, }), }; + result[@enumToInt(Feature.crc)] = .{ + .index = @enumToInt(Feature.crc), + .name = @tagName(Feature.crc), + .llvm_name = "crc", + .description = "Enable ARMv8 CRC-32 checksum instructions", + .dependencies = 0, + }; result[@enumToInt(Feature.crypto)] = .{ .index = @enumToInt(Feature.crypto), .name = @tagName(Feature.crypto), .llvm_name = "crypto", .description = "Enable cryptographic instructions", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .aes, + .neon, + .sha2, }), }; result[@enumToInt(Feature.custom_cheap_as_move)] = .{ @@ -310,12 +467,26 @@ pub const all_features = blk: { .description = "Use custom handling of cheap instructions", .dependencies = 0, }; - result[@enumToInt(Feature.dit)] = .{ - .index = @enumToInt(Feature.dit), - .name = @tagName(Feature.dit), - .llvm_name = "dit", - .description = "Enable v8.4-A Data Independent Timing instructions", - .dependencies = 0, + result[@enumToInt(Feature.cyclone)] = .{ + .index = @enumToInt(Feature.cyclone), + .name = @tagName(Feature.cyclone), + .llvm_name = "cyclone", + .description = "Cyclone", + .dependencies = featureSet(&[_]Feature{ + .alternate_sextload_cvt_f32_pattern, + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .disable_latency_sched_heuristic, + .fp_armv8, + .fuse_aes, + .fuse_crypto_eor, + .neon, + .perfmon, + .zcm, + .zcz, + .zcz_fp_workaround, + }), }; result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ .index = @enumToInt(Feature.disable_latency_sched_heuristic), @@ -324,6 +495,13 @@ pub const all_features = blk: { .description = "Disable latency scheduling heuristic", .dependencies = 0, }; + result[@enumToInt(Feature.dit)] = .{ + .index = @enumToInt(Feature.dit), + .name = @tagName(Feature.dit), + .llvm_name = "dit", + .description = "Enable v8.4-A Data Independent Timing instructions", + .dependencies = 0, + }; result[@enumToInt(Feature.dotprod)] = .{ .index = @enumToInt(Feature.dotprod), .name = @tagName(Feature.dotprod), @@ -340,6 +518,109 @@ pub const all_features = blk: { .custom_cheap_as_move, }), }; + result[@enumToInt(Feature.exynosm1)] = .{ + .index = @enumToInt(Feature.exynosm1), + .name = @tagName(Feature.exynosm1), + .llvm_name = "exynosm1", + .description = "Samsung Exynos-M1 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .use_reciprocal_square_root, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm2)] = .{ + .index = @enumToInt(Feature.exynosm2), + .name = @tagName(Feature.exynosm2), + .llvm_name = "exynosm2", + .description = "Samsung Exynos-M2 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm3)] = .{ + .index = @enumToInt(Feature.exynosm3), + .name = @tagName(Feature.exynosm3), + .llvm_name = "exynosm3", + .description = "Samsung Exynos-M3 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_address, + .fuse_aes, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm4)] = .{ + .index = @enumToInt(Feature.exynosm4), + .name = @tagName(Feature.exynosm4), + .llvm_name = "exynosm4", + .description = "Samsung Exynos-M4 processors", + .dependencies = featureSet(&[_]Feature{ + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .dotprod, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fullfp16, + .fuse_address, + .fuse_aes, + .fuse_arith_logic, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .use_postra_scheduler, + .v8_2a, + .zcz, + }), + }; + result[@enumToInt(Feature.falkor)] = .{ + .index = @enumToInt(Feature.falkor), + .name = @tagName(Feature.falkor), + .llvm_name = "falkor", + .description = "Qualcomm Falkor processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .rdm, + .slow_strqro_store, + .use_postra_scheduler, + .zcz, + }), + }; result[@enumToInt(Feature.fmi)] = .{ .index = @enumToInt(Feature.fmi), .name = @tagName(Feature.fmi), @@ -347,14 +628,12 @@ pub const all_features = blk: { .description = "Enable v8.4-A Flag Manipulation Instructions", .dependencies = 0, }; - result[@enumToInt(Feature.fp16fml)] = .{ - .index = @enumToInt(Feature.fp16fml), - .name = @tagName(Feature.fp16fml), - .llvm_name = "fp16fml", - .description = "Enable FP16 FML instructions", - .dependencies = featureSet(&[_]Feature{ - .fp_armv8, - }), + result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ + .index = @enumToInt(Feature.force_32bit_jump_tables), + .name = @tagName(Feature.force_32bit_jump_tables), + .llvm_name = "force-32bit-jump-tables", + .description = "Force jump table entries to be 32-bits wide except at MinSize", + .dependencies = 0, }; result[@enumToInt(Feature.fp_armv8)] = .{ .index = @enumToInt(Feature.fp_armv8), @@ -363,6 +642,15 @@ pub const all_features = blk: { .description = "Enable ARMv8 FP", .dependencies = 0, }; + result[@enumToInt(Feature.fp16fml)] = .{ + .index = @enumToInt(Feature.fp16fml), + .name = @tagName(Feature.fp16fml), + .llvm_name = "fp16fml", + .description = "Enable FP16 FML instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; result[@enumToInt(Feature.fptoint)] = .{ .index = @enumToInt(Feature.fptoint), .name = @tagName(Feature.fptoint), @@ -370,13 +658,6 @@ pub const all_features = blk: { .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", .dependencies = 0, }; - result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ - .index = @enumToInt(Feature.force_32bit_jump_tables), - .name = @tagName(Feature.force_32bit_jump_tables), - .llvm_name = "force-32bit-jump-tables", - .description = "Force jump table entries to be 32-bits wide except at MinSize", - .dependencies = 0, - }; result[@enumToInt(Feature.fullfp16)] = .{ .index = @enumToInt(Feature.fullfp16), .name = @tagName(Feature.fullfp16), @@ -386,13 +667,6 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.fuse_aes)] = .{ - .index = @enumToInt(Feature.fuse_aes), - .name = @tagName(Feature.fuse_aes), - .llvm_name = "fuse-aes", - .description = "CPU fuses AES crypto operations", - .dependencies = 0, - }; result[@enumToInt(Feature.fuse_address)] = .{ .index = @enumToInt(Feature.fuse_address), .name = @tagName(Feature.fuse_address), @@ -400,6 +674,13 @@ pub const all_features = blk: { .description = "CPU fuses address generation and memory operations", .dependencies = 0, }; + result[@enumToInt(Feature.fuse_aes)] = .{ + .index = @enumToInt(Feature.fuse_aes), + .name = @tagName(Feature.fuse_aes), + .llvm_name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .dependencies = 0, + }; result[@enumToInt(Feature.fuse_arith_logic)] = .{ .index = @enumToInt(Feature.fuse_arith_logic), .name = @tagName(Feature.fuse_arith_logic), @@ -407,13 +688,6 @@ pub const all_features = blk: { .description = "CPU fuses arithmetic and logic operations", .dependencies = 0, }; - result[@enumToInt(Feature.fuse_csel)] = .{ - .index = @enumToInt(Feature.fuse_csel), - .name = @tagName(Feature.fuse_csel), - .llvm_name = "fuse-csel", - .description = "CPU fuses conditional select operations", - .dependencies = 0, - }; result[@enumToInt(Feature.fuse_crypto_eor)] = .{ .index = @enumToInt(Feature.fuse_crypto_eor), .name = @tagName(Feature.fuse_crypto_eor), @@ -421,6 +695,13 @@ pub const all_features = blk: { .description = "CPU fuses AES/PMULL and EOR operations", .dependencies = 0, }; + result[@enumToInt(Feature.fuse_csel)] = .{ + .index = @enumToInt(Feature.fuse_csel), + .name = @tagName(Feature.fuse_csel), + .llvm_name = "fuse-csel", + .description = "CPU fuses conditional select operations", + .dependencies = 0, + }; result[@enumToInt(Feature.fuse_literals)] = .{ .index = @enumToInt(Feature.fuse_literals), .name = @tagName(Feature.fuse_literals), @@ -437,6 +718,24 @@ pub const all_features = blk: { .fp_armv8, }), }; + result[@enumToInt(Feature.kryo)] = .{ + .index = @enumToInt(Feature.kryo), + .name = @tagName(Feature.kryo), + .llvm_name = "kryo", + .description = "Qualcomm Kryo processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz, + }), + }; result[@enumToInt(Feature.lor)] = .{ .index = @enumToInt(Feature.lor), .name = @tagName(Feature.lor), @@ -481,13 +780,6 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.nv)] = .{ - .index = @enumToInt(Feature.nv), - .name = @tagName(Feature.nv), - .llvm_name = "nv", - .description = "Enable v8.4-A Nested Virtualization Enchancement", - .dependencies = 0, - }; result[@enumToInt(Feature.no_neg_immediates)] = .{ .index = @enumToInt(Feature.no_neg_immediates), .name = @tagName(Feature.no_neg_immediates), @@ -495,6 +787,13 @@ pub const all_features = blk: { .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", .dependencies = 0, }; + result[@enumToInt(Feature.nv)] = .{ + .index = @enumToInt(Feature.nv), + .name = @tagName(Feature.nv), + .llvm_name = "nv", + .description = "Enable v8.4-A Nested Virtualization Enchancement", + .dependencies = 0, + }; result[@enumToInt(Feature.pa)] = .{ .index = @enumToInt(Feature.pa), .name = @tagName(Feature.pa), @@ -525,20 +824,6 @@ pub const all_features = blk: { .description = "Enable ARMv8 PMUv3 Performance Monitors extension", .dependencies = 0, }; - result[@enumToInt(Feature.use_postra_scheduler)] = .{ - .index = @enumToInt(Feature.use_postra_scheduler), - .name = @tagName(Feature.use_postra_scheduler), - .llvm_name = "use-postra-scheduler", - .description = "Schedule again after register allocation", - .dependencies = 0, - }; - result[@enumToInt(Feature.predres)] = .{ - .index = @enumToInt(Feature.predres), - .name = @tagName(Feature.predres), - .llvm_name = "predres", - .description = "Enable v8.5a execution and data prediction invalidation instructions", - .dependencies = 0, - }; result[@enumToInt(Feature.predictable_select_expensive)] = .{ .index = @enumToInt(Feature.predictable_select_expensive), .name = @tagName(Feature.predictable_select_expensive), @@ -546,11 +831,18 @@ pub const all_features = blk: { .description = "Prefer likely predicted branches over selects", .dependencies = 0, }; - result[@enumToInt(Feature.uaops)] = .{ - .index = @enumToInt(Feature.uaops), - .name = @tagName(Feature.uaops), - .llvm_name = "uaops", - .description = "Enable v8.2 UAO PState", + result[@enumToInt(Feature.predres)] = .{ + .index = @enumToInt(Feature.predres), + .name = @tagName(Feature.predres), + .llvm_name = "predres", + .description = "Enable v8.5a execution and data prediction invalidation instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.rand)] = .{ + .index = @enumToInt(Feature.rand), + .name = @tagName(Feature.rand), + .llvm_name = "rand", + .description = "Enable Random Number generation instructions", .dependencies = 0, }; result[@enumToInt(Feature.ras)] = .{ @@ -592,13 +884,6 @@ pub const all_features = blk: { .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", .dependencies = 0, }; - result[@enumToInt(Feature.rand)] = .{ - .index = @enumToInt(Feature.rand), - .name = @tagName(Feature.rand), - .llvm_name = "rand", - .description = "Enable Random Number generation instructions", - .dependencies = 0, - }; result[@enumToInt(Feature.reserve_x1)] = .{ .index = @enumToInt(Feature.reserve_x1), .name = @tagName(Feature.reserve_x1), @@ -606,55 +891,6 @@ pub const all_features = blk: { .description = "Reserve X1, making it unavailable as a GPR", .dependencies = 0, }; - result[@enumToInt(Feature.reserve_x2)] = .{ - .index = @enumToInt(Feature.reserve_x2), - .name = @tagName(Feature.reserve_x2), - .llvm_name = "reserve-x2", - .description = "Reserve X2, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x3)] = .{ - .index = @enumToInt(Feature.reserve_x3), - .name = @tagName(Feature.reserve_x3), - .llvm_name = "reserve-x3", - .description = "Reserve X3, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x4)] = .{ - .index = @enumToInt(Feature.reserve_x4), - .name = @tagName(Feature.reserve_x4), - .llvm_name = "reserve-x4", - .description = "Reserve X4, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x5)] = .{ - .index = @enumToInt(Feature.reserve_x5), - .name = @tagName(Feature.reserve_x5), - .llvm_name = "reserve-x5", - .description = "Reserve X5, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x6)] = .{ - .index = @enumToInt(Feature.reserve_x6), - .name = @tagName(Feature.reserve_x6), - .llvm_name = "reserve-x6", - .description = "Reserve X6, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x7)] = .{ - .index = @enumToInt(Feature.reserve_x7), - .name = @tagName(Feature.reserve_x7), - .llvm_name = "reserve-x7", - .description = "Reserve X7, making it unavailable as a GPR", - .dependencies = 0, - }; - result[@enumToInt(Feature.reserve_x9)] = .{ - .index = @enumToInt(Feature.reserve_x9), - .name = @tagName(Feature.reserve_x9), - .llvm_name = "reserve-x9", - .description = "Reserve X9, making it unavailable as a GPR", - .dependencies = 0, - }; result[@enumToInt(Feature.reserve_x10)] = .{ .index = @enumToInt(Feature.reserve_x10), .name = @tagName(Feature.reserve_x10), @@ -704,6 +940,13 @@ pub const all_features = blk: { .description = "Reserve X18, making it unavailable as a GPR", .dependencies = 0, }; + result[@enumToInt(Feature.reserve_x2)] = .{ + .index = @enumToInt(Feature.reserve_x2), + .name = @tagName(Feature.reserve_x2), + .llvm_name = "reserve-x2", + .description = "Reserve X2, making it unavailable as a GPR", + .dependencies = 0, + }; result[@enumToInt(Feature.reserve_x20)] = .{ .index = @enumToInt(Feature.reserve_x20), .name = @tagName(Feature.reserve_x20), @@ -767,6 +1010,67 @@ pub const all_features = blk: { .description = "Reserve X28, making it unavailable as a GPR", .dependencies = 0, }; + result[@enumToInt(Feature.reserve_x3)] = .{ + .index = @enumToInt(Feature.reserve_x3), + .name = @tagName(Feature.reserve_x3), + .llvm_name = "reserve-x3", + .description = "Reserve X3, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x4)] = .{ + .index = @enumToInt(Feature.reserve_x4), + .name = @tagName(Feature.reserve_x4), + .llvm_name = "reserve-x4", + .description = "Reserve X4, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x5)] = .{ + .index = @enumToInt(Feature.reserve_x5), + .name = @tagName(Feature.reserve_x5), + .llvm_name = "reserve-x5", + .description = "Reserve X5, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x6)] = .{ + .index = @enumToInt(Feature.reserve_x6), + .name = @tagName(Feature.reserve_x6), + .llvm_name = "reserve-x6", + .description = "Reserve X6, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x7)] = .{ + .index = @enumToInt(Feature.reserve_x7), + .name = @tagName(Feature.reserve_x7), + .llvm_name = "reserve-x7", + .description = "Reserve X7, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_x9)] = .{ + .index = @enumToInt(Feature.reserve_x9), + .name = @tagName(Feature.reserve_x9), + .llvm_name = "reserve-x9", + .description = "Reserve X9, making it unavailable as a GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.saphira)] = .{ + .index = @enumToInt(Feature.saphira), + .name = @tagName(Feature.saphira), + .llvm_name = "saphira", + .description = "Qualcomm Saphira processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .spe, + .use_postra_scheduler, + .v8_4a, + .zcz, + }), + }; result[@enumToInt(Feature.sb)] = .{ .index = @enumToInt(Feature.sb), .name = @tagName(Feature.sb), @@ -787,7 +1091,7 @@ pub const all_features = blk: { .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .neon, }), }; result[@enumToInt(Feature.sha3)] = .{ @@ -796,16 +1100,38 @@ pub const all_features = blk: { .llvm_name = "sha3", .description = "Enable SHA512 and SHA3 support", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .neon, + .sha2, }), }; + result[@enumToInt(Feature.slow_misaligned_128store)] = .{ + .index = @enumToInt(Feature.slow_misaligned_128store), + .name = @tagName(Feature.slow_misaligned_128store), + .llvm_name = "slow-misaligned-128store", + .description = "Misaligned 128 bit stores are slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_paired_128)] = .{ + .index = @enumToInt(Feature.slow_paired_128), + .name = @tagName(Feature.slow_paired_128), + .llvm_name = "slow-paired-128", + .description = "Paired 128 bit loads and stores are slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_strqro_store)] = .{ + .index = @enumToInt(Feature.slow_strqro_store), + .name = @tagName(Feature.slow_strqro_store), + .llvm_name = "slow-strqro-store", + .description = "STR of Q register with register offset is slow", + .dependencies = 0, + }; result[@enumToInt(Feature.sm4)] = .{ .index = @enumToInt(Feature.sm4), .name = @tagName(Feature.sm4), .llvm_name = "sm4", .description = "Enable SM3 and SM4 support", .dependencies = featureSet(&[_]Feature{ - .fp_armv8, + .neon, }), }; result[@enumToInt(Feature.spe)] = .{ @@ -815,6 +1141,13 @@ pub const all_features = blk: { .description = "Enable Statistical Profiling extension", .dependencies = 0, }; + result[@enumToInt(Feature.specrestrict)] = .{ + .index = @enumToInt(Feature.specrestrict), + .name = @tagName(Feature.specrestrict), + .llvm_name = "specrestrict", + .description = "Enable architectural speculation restriction", + .dependencies = 0, + }; result[@enumToInt(Feature.ssbs)] = .{ .index = @enumToInt(Feature.ssbs), .name = @tagName(Feature.ssbs), @@ -822,6 +1155,13 @@ pub const all_features = blk: { .description = "Enable Speculative Store Bypass Safe bit", .dependencies = 0, }; + result[@enumToInt(Feature.strict_align)] = .{ + .index = @enumToInt(Feature.strict_align), + .name = @tagName(Feature.strict_align), + .llvm_name = "strict-align", + .description = "Disallow all unaligned memory access", + .dependencies = 0, + }; result[@enumToInt(Feature.sve)] = .{ .index = @enumToInt(Feature.sve), .name = @tagName(Feature.sve), @@ -844,8 +1184,8 @@ pub const all_features = blk: { .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", .dependencies = featureSet(&[_]Feature{ - .sve, - .fp_armv8, + .aes, + .sve2, }), }; result[@enumToInt(Feature.sve2_bitperm)] = .{ @@ -854,7 +1194,7 @@ pub const all_features = blk: { .llvm_name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", .dependencies = featureSet(&[_]Feature{ - .sve, + .sve2, }), }; result[@enumToInt(Feature.sve2_sha3)] = .{ @@ -863,8 +1203,8 @@ pub const all_features = blk: { .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", .dependencies = featureSet(&[_]Feature{ - .sve, - .fp_armv8, + .sha3, + .sve2, }), }; result[@enumToInt(Feature.sve2_sm4)] = .{ @@ -873,44 +1213,87 @@ pub const all_features = blk: { .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", .dependencies = featureSet(&[_]Feature{ - .sve, - .fp_armv8, + .sm4, + .sve2, }), }; - result[@enumToInt(Feature.slow_misaligned_128store)] = .{ - .index = @enumToInt(Feature.slow_misaligned_128store), - .name = @tagName(Feature.slow_misaligned_128store), - .llvm_name = "slow-misaligned-128store", - .description = "Misaligned 128 bit stores are slow", - .dependencies = 0, + result[@enumToInt(Feature.thunderx)] = .{ + .index = @enumToInt(Feature.thunderx), + .name = @tagName(Feature.thunderx), + .llvm_name = "thunderx", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), }; - result[@enumToInt(Feature.slow_paired_128)] = .{ - .index = @enumToInt(Feature.slow_paired_128), - .name = @tagName(Feature.slow_paired_128), - .llvm_name = "slow-paired-128", - .description = "Paired 128 bit loads and stores are slow", - .dependencies = 0, + result[@enumToInt(Feature.thunderx2t99)] = .{ + .index = @enumToInt(Feature.thunderx2t99), + .name = @tagName(Feature.thunderx2t99), + .llvm_name = "thunderx2t99", + .description = "Cavium ThunderX2 processors", + .dependencies = featureSet(&[_]Feature{ + .aggressive_fma, + .arith_bcc_fusion, + .crc, + .crypto, + .fp_armv8, + .lse, + .neon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8_1a, + }), }; - result[@enumToInt(Feature.slow_strqro_store)] = .{ - .index = @enumToInt(Feature.slow_strqro_store), - .name = @tagName(Feature.slow_strqro_store), - .llvm_name = "slow-strqro-store", - .description = "STR of Q register with register offset is slow", - .dependencies = 0, + result[@enumToInt(Feature.thunderxt81)] = .{ + .index = @enumToInt(Feature.thunderxt81), + .name = @tagName(Feature.thunderxt81), + .llvm_name = "thunderxt81", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), }; - result[@enumToInt(Feature.specrestrict)] = .{ - .index = @enumToInt(Feature.specrestrict), - .name = @tagName(Feature.specrestrict), - .llvm_name = "specrestrict", - .description = "Enable architectural speculation restriction", - .dependencies = 0, + result[@enumToInt(Feature.thunderxt83)] = .{ + .index = @enumToInt(Feature.thunderxt83), + .name = @tagName(Feature.thunderxt83), + .llvm_name = "thunderxt83", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), }; - result[@enumToInt(Feature.strict_align)] = .{ - .index = @enumToInt(Feature.strict_align), - .name = @tagName(Feature.strict_align), - .llvm_name = "strict-align", - .description = "Disallow all unaligned memory access", - .dependencies = 0, + result[@enumToInt(Feature.thunderxt88)] = .{ + .index = @enumToInt(Feature.thunderxt88), + .name = @tagName(Feature.thunderxt88), + .llvm_name = "thunderxt88", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), }; result[@enumToInt(Feature.tlb_rmi)] = .{ .index = @enumToInt(Feature.tlb_rmi), @@ -919,20 +1302,6 @@ pub const all_features = blk: { .description = "Enable v8.4-A TLB Range and Maintenance Instructions", .dependencies = 0, }; - result[@enumToInt(Feature.tracev84)] = .{ - .index = @enumToInt(Feature.tracev84), - .name = @tagName(Feature.tracev84), - .llvm_name = "tracev8.4", - .description = "Enable v8.4-A Trace extension", - .dependencies = 0, - }; - result[@enumToInt(Feature.use_aa)] = .{ - .index = @enumToInt(Feature.use_aa), - .name = @tagName(Feature.use_aa), - .llvm_name = "use-aa", - .description = "Use alias analysis during codegen", - .dependencies = 0, - }; result[@enumToInt(Feature.tpidr_el1)] = .{ .index = @enumToInt(Feature.tpidr_el1), .name = @tagName(Feature.tpidr_el1), @@ -954,6 +1323,54 @@ pub const all_features = blk: { .description = "Permit use of TPIDR_EL3 for the TLS base", .dependencies = 0, }; + result[@enumToInt(Feature.tracev8_4)] = .{ + .index = @enumToInt(Feature.tracev8_4), + .name = @tagName(Feature.tracev8_4), + .llvm_name = "tracev8.4", + .description = "Enable v8.4-A Trace extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.tsv110)] = .{ + .index = @enumToInt(Feature.tsv110), + .name = @tagName(Feature.tsv110), + .llvm_name = "tsv110", + .description = "HiSilicon TS-V110 processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .custom_cheap_as_move, + .dotprod, + .fp_armv8, + .fp16fml, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .spe, + .use_postra_scheduler, + .v8_2a, + }), + }; + result[@enumToInt(Feature.uaops)] = .{ + .index = @enumToInt(Feature.uaops), + .name = @tagName(Feature.uaops), + .llvm_name = "uaops", + .description = "Enable v8.2 UAO PState", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_aa)] = .{ + .index = @enumToInt(Feature.use_aa), + .name = @tagName(Feature.use_aa), + .llvm_name = "use-aa", + .description = "Use alias analysis during codegen", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_postra_scheduler)] = .{ + .index = @enumToInt(Feature.use_postra_scheduler), + .name = @tagName(Feature.use_postra_scheduler), + .llvm_name = "use-postra-scheduler", + .description = "Schedule again after register allocation", + .dependencies = 0, + }; result[@enumToInt(Feature.use_reciprocal_square_root)] = .{ .index = @enumToInt(Feature.use_reciprocal_square_root), .name = @tagName(Feature.use_reciprocal_square_root), @@ -961,6 +1378,84 @@ pub const all_features = blk: { .description = "Use the reciprocal square root approximation", .dependencies = 0, }; + result[@enumToInt(Feature.v8_1a)] = .{ + .index = @enumToInt(Feature.v8_1a), + .name = @tagName(Feature.v8_1a), + .llvm_name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .dependencies = featureSet(&[_]Feature{ + .crc, + .lor, + .lse, + .pan, + .rdm, + .vh, + }), + }; + result[@enumToInt(Feature.v8_2a)] = .{ + .index = @enumToInt(Feature.v8_2a), + .name = @tagName(Feature.v8_2a), + .llvm_name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .dependencies = featureSet(&[_]Feature{ + .ccpp, + .pan_rwv, + .ras, + .uaops, + .v8_1a, + }), + }; + result[@enumToInt(Feature.v8_3a)] = .{ + .index = @enumToInt(Feature.v8_3a), + .name = @tagName(Feature.v8_3a), + .llvm_name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .dependencies = featureSet(&[_]Feature{ + .ccidx, + .complxnum, + .jsconv, + .pa, + .rcpc, + .v8_2a, + }), + }; + result[@enumToInt(Feature.v8_4a)] = .{ + .index = @enumToInt(Feature.v8_4a), + .name = @tagName(Feature.v8_4a), + .llvm_name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .dependencies = featureSet(&[_]Feature{ + .am, + .dit, + .dotprod, + .fmi, + .mpam, + .nv, + .rasv8_4, + .rcpc_immo, + .sel2, + .tlb_rmi, + .tracev8_4, + .v8_3a, + }), + }; + result[@enumToInt(Feature.v8_5a)] = .{ + .index = @enumToInt(Feature.v8_5a), + .name = @tagName(Feature.v8_5a), + .llvm_name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .dependencies = featureSet(&[_]Feature{ + .altnzcv, + .bti, + .ccdp, + .fptoint, + .predres, + .sb, + .specrestrict, + .ssbs, + .v8_4a, + }), + }; result[@enumToInt(Feature.vh)] = .{ .index = @enumToInt(Feature.vh), .name = @tagName(Feature.vh), @@ -1014,322 +1509,121 @@ pub const cpu = struct { .name = "apple_latest", .llvm_name = "apple-latest", .features = featureSet(&[_]Feature{ - .arith_cbz_fusion, - .zcz_fp_workaround, - .alternate_sextload_cvt_f32_pattern, - .fuse_crypto_eor, - .zcm, - .zcz_gp, - .perfmon, - .disable_latency_sched_heuristic, - .fp_armv8, - .zcz_fp, - .arith_bcc_fusion, - .fuse_aes, + .cyclone, }), }; - pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .perfmon, - .fp_armv8, - .crc, + .a35, }), }; - pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .custom_cheap_as_move, - .crc, - .perfmon, - .use_aa, - .fp_armv8, - .fuse_aes, - .balance_fp_ops, - .use_postra_scheduler, + .a53, }), }; - pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .ccpp, - .rcpc, - .uaops, - .rdm, - .ras, - .lse, - .crc, - .perfmon, - .fp_armv8, - .vh, - .fuse_aes, - .lor, - .dotprod, - .pan, + .a55, }), }; - pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .fuse_literals, - .predictable_select_expensive, - .custom_cheap_as_move, - .crc, - .perfmon, - .fp_armv8, - .fuse_aes, - .balance_fp_ops, - .use_postra_scheduler, + .a57, }), }; - pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .fuse_aes, - .fp_armv8, - .perfmon, - .crc, + .a72, }), }; - pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .fuse_aes, - .fp_armv8, - .perfmon, - .crc, + .a73, }), }; - pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .ccpp, - .rcpc, - .uaops, - .rdm, - .ras, - .lse, - .crc, - .perfmon, - .fp_armv8, - .vh, - .fuse_aes, - .lor, - .dotprod, - .pan, + .a75, }), }; - pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ - .ccpp, - .rcpc, - .uaops, - .rdm, - .ras, - .lse, - .crc, - .fp_armv8, - .vh, - .lor, - .ssbs, - .dotprod, - .pan, + .a76, }), }; - pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ - .ccpp, - .rcpc, - .uaops, - .rdm, - .ras, - .lse, - .crc, - .fp_armv8, - .vh, - .lor, - .ssbs, - .dotprod, - .pan, + .a76, }), }; - pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .arith_cbz_fusion, - .zcz_fp_workaround, - .alternate_sextload_cvt_f32_pattern, - .fuse_crypto_eor, - .zcm, - .zcz_gp, - .perfmon, - .disable_latency_sched_heuristic, - .fp_armv8, - .zcz_fp, - .arith_bcc_fusion, - .fuse_aes, + .cyclone, }), }; - pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .custom_cheap_as_move, - .crc, - .force_32bit_jump_tables, - .perfmon, - .slow_misaligned_128store, - .use_reciprocal_square_root, - .fp_armv8, - .zcz_fp, - .fuse_aes, - .slow_paired_128, - .use_postra_scheduler, + .exynosm1, }), }; - pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .custom_cheap_as_move, - .crc, - .force_32bit_jump_tables, - .perfmon, - .slow_misaligned_128store, - .fp_armv8, - .zcz_fp, - .fuse_aes, - .slow_paired_128, - .use_postra_scheduler, + .exynosm2, }), }; - pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .fuse_literals, - .predictable_select_expensive, - .custom_cheap_as_move, - .crc, - .force_32bit_jump_tables, - .fuse_address, - .fuse_csel, - .perfmon, - .fp_armv8, - .zcz_fp, - .fuse_aes, - .lsl_fast, - .use_postra_scheduler, + .exynosm3, }), }; - pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .arith_cbz_fusion, - .custom_cheap_as_move, - .lse, - .zcz_fp, - .lsl_fast, - .lor, - .fuse_literals, - .ccpp, - .ras, - .fp_armv8, - .fuse_aes, - .pan, - .fuse_arith_logic, - .crc, - .force_32bit_jump_tables, - .fuse_address, - .fuse_csel, - .arith_bcc_fusion, - .uaops, - .rdm, - .zcz_gp, - .perfmon, - .vh, - .use_postra_scheduler, - .dotprod, + .exynosm4, }), }; - pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ - .arith_cbz_fusion, - .custom_cheap_as_move, - .lse, - .zcz_fp, - .lsl_fast, - .lor, - .fuse_literals, - .ccpp, - .ras, - .fp_armv8, - .fuse_aes, - .pan, - .fuse_arith_logic, - .crc, - .force_32bit_jump_tables, - .fuse_address, - .fuse_csel, - .arith_bcc_fusion, - .uaops, - .rdm, - .zcz_gp, - .perfmon, - .vh, - .use_postra_scheduler, - .dotprod, + .exynosm4, }), }; - pub const falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .custom_cheap_as_move, - .rdm, - .slow_strqro_store, - .zcz_gp, - .crc, - .perfmon, - .fp_armv8, - .zcz_fp, - .lsl_fast, - .use_postra_scheduler, + .falkor, }), }; - pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", @@ -1341,146 +1635,60 @@ pub const cpu = struct { .use_postra_scheduler, }), }; - pub const kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .custom_cheap_as_move, - .zcz_gp, - .crc, - .perfmon, - .fp_armv8, - .zcz_fp, - .lsl_fast, - .use_postra_scheduler, + .kryo, }), }; - pub const saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .custom_cheap_as_move, - .fmi, - .lse, - .zcz_fp, - .lsl_fast, - .lor, - .dit, - .pa, - .ccpp, - .sel2, - .ras, - .fp_armv8, - .ccidx, - .pan, - .rcpc, - .crc, - .tracev84, - .mpam, - .am, - .nv, - .tlb_rmi, - .uaops, - .rdm, - .zcz_gp, - .perfmon, - .vh, - .use_postra_scheduler, - .dotprod, - .spe, + .saphira, }), }; - pub const thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .crc, - .perfmon, - .fp_armv8, - .use_postra_scheduler, + .thunderx, }), }; - pub const thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .aggressive_fma, - .rdm, - .lse, - .crc, - .fp_armv8, - .vh, - .arith_bcc_fusion, - .lor, - .use_postra_scheduler, - .pan, + .thunderx2t99, }), }; - pub const thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .crc, - .perfmon, - .fp_armv8, - .use_postra_scheduler, + .thunderxt81, }), }; - pub const thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .crc, - .perfmon, - .fp_armv8, - .use_postra_scheduler, + .thunderxt83, }), }; - pub const thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .features = featureSet(&[_]Feature{ - .predictable_select_expensive, - .crc, - .perfmon, - .fp_armv8, - .use_postra_scheduler, + .thunderxt88, }), }; - pub const tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .features = featureSet(&[_]Feature{ - .ccpp, - .custom_cheap_as_move, - .uaops, - .rdm, - .ras, - .lse, - .crc, - .perfmon, - .fp_armv8, - .vh, - .fuse_aes, - .lor, - .use_postra_scheduler, - .dotprod, - .pan, - .spe, + .tsv110, }), }; }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 5efc6e177f5c29c084c113c1294e3129cfae9b09..6175456a17ea2b4f8ffa0e21b06c49402196c908 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -1,2132 +1,1524 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_BitInsts16 = Feature{ - .name = "BitInsts16", - .llvm_name = "16-bit-insts", - .description = "Has i16/f16 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_addNoCarryInsts = Feature{ - .name = "addNoCarryInsts", - .llvm_name = "add-no-carry-insts", - .description = "Have VALU add/sub instructions without carry out", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_apertureRegs = Feature{ - .name = "apertureRegs", - .llvm_name = "aperture-regs", - .description = "Has Memory Aperture Base and Size Registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_atomicFaddInsts = Feature{ - .name = "atomicFaddInsts", - .llvm_name = "atomic-fadd-insts", - .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_autoWaitcntBeforeBarrier = Feature{ - .name = "autoWaitcntBeforeBarrier", - .llvm_name = "auto-waitcnt-before-barrier", - .description = "Hardware automatically inserts waitcnt before barrier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ciInsts = Feature{ - .name = "ciInsts", - .llvm_name = "ci-insts", - .description = "Additional instructions for CI+", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_codeObjectV3 = Feature{ - .name = "codeObjectV3", - .llvm_name = "code-object-v3", - .description = "Generate code object version 3", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cumode = Feature{ - .name = "cumode", - .llvm_name = "cumode", - .description = "Enable CU wavefront execution mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dlInsts = Feature{ - .name = "dlInsts", - .llvm_name = "dl-insts", - .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dpp = Feature{ - .name = "dpp", - .llvm_name = "dpp", - .description = "Support DPP (Data Parallel Primitives) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dpp8 = Feature{ - .name = "dpp8", - .llvm_name = "dpp8", - .description = "Support DPP8 (Data Parallel Primitives) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noSramEccSupport = Feature{ - .name = "noSramEccSupport", - .llvm_name = "no-sram-ecc-support", - .description = "Hardware does not support SRAM ECC", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noXnackSupport = Feature{ - .name = "noXnackSupport", - .llvm_name = "no-xnack-support", - .description = "Hardware does not support XNACK", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot1Insts = Feature{ - .name = "dot1Insts", - .llvm_name = "dot1-insts", - .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot2Insts = Feature{ - .name = "dot2Insts", - .llvm_name = "dot2-insts", - .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot3Insts = Feature{ - .name = "dot3Insts", - .llvm_name = "dot3-insts", - .description = "Has v_dot8c_i32_i4 instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot4Insts = Feature{ - .name = "dot4Insts", - .llvm_name = "dot4-insts", - .description = "Has v_dot2c_i32_i16 instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot5Insts = Feature{ - .name = "dot5Insts", - .llvm_name = "dot5-insts", - .description = "Has v_dot2c_f32_f16 instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dot6Insts = Feature{ - .name = "dot6Insts", - .llvm_name = "dot6-insts", - .description = "Has v_dot4c_i32_i8 instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_DumpCode = Feature{ - .name = "DumpCode", - .llvm_name = "DumpCode", - .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dumpcode = Feature{ - .name = "dumpcode", - .llvm_name = "dumpcode", - .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_enableDs128 = Feature{ - .name = "enableDs128", - .llvm_name = "enable-ds128", - .description = "Use ds_{read|write}_b128", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loadStoreOpt = Feature{ - .name = "loadStoreOpt", - .llvm_name = "load-store-opt", - .description = "Enable SI load/store optimizer pass", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_enablePrtStrictNull = Feature{ - .name = "enablePrtStrictNull", - .llvm_name = "enable-prt-strict-null", - .description = "Enable zeroing of result registers for sparse texture fetches", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_siScheduler = Feature{ - .name = "siScheduler", - .llvm_name = "si-scheduler", - .description = "Enable SI Machine Scheduler", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_unsafeDsOffsetFolding = Feature{ - .name = "unsafeDsOffsetFolding", - .llvm_name = "unsafe-ds-offset-folding", - .description = "Force using DS instruction immediate offsets on SI", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fmaf = Feature{ - .name = "fmaf", - .llvm_name = "fmaf", - .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp16Denormals = Feature{ - .name = "fp16Denormals", - .llvm_name = "fp16-denormals", - .description = "Enable half precision denormal handling", - .dependencies = &[_]*const Feature { - &feature_fp64, - }, -}; - -pub const feature_fp32Denormals = Feature{ - .name = "fp32Denormals", - .llvm_name = "fp32-denormals", - .description = "Enable single precision denormal handling", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp64 = Feature{ - .name = "fp64", - .llvm_name = "fp64", - .description = "Enable double precision operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp64Denormals = Feature{ - .name = "fp64Denormals", - .llvm_name = "fp64-denormals", - .description = "Enable double and half precision denormal handling", - .dependencies = &[_]*const Feature { - &feature_fp64, - }, -}; - -pub const feature_fp64Fp16Denormals = Feature{ - .name = "fp64Fp16Denormals", - .llvm_name = "fp64-fp16-denormals", - .description = "Enable double and half precision denormal handling", - .dependencies = &[_]*const Feature { - &feature_fp64, - }, -}; - -pub const feature_fpExceptions = Feature{ - .name = "fpExceptions", - .llvm_name = "fp-exceptions", - .description = "Enable floating point exceptions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastFmaf = Feature{ - .name = "fastFmaf", - .llvm_name = "fast-fmaf", - .description = "Assuming f32 fma is at least as fast as mul + add", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatAddressSpace = Feature{ - .name = "flatAddressSpace", - .llvm_name = "flat-address-space", - .description = "Support flat address space", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatForGlobal = Feature{ - .name = "flatForGlobal", - .llvm_name = "flat-for-global", - .description = "Force to generate flat instruction for global", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatGlobalInsts = Feature{ - .name = "flatGlobalInsts", - .llvm_name = "flat-global-insts", - .description = "Have global_* flat memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatInstOffsets = Feature{ - .name = "flatInstOffsets", - .llvm_name = "flat-inst-offsets", - .description = "Flat instructions have immediate offset addressing mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatScratchInsts = Feature{ - .name = "flatScratchInsts", - .llvm_name = "flat-scratch-insts", - .description = "Have scratch_* flat memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_flatSegmentOffsetBug = Feature{ - .name = "flatSegmentOffsetBug", - .llvm_name = "flat-segment-offset-bug", - .description = "GFX10 bug, inst_offset ignored in flat segment", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fmaMixInsts = Feature{ - .name = "fmaMixInsts", - .llvm_name = "fma-mix-insts", - .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gcn3Encoding = Feature{ - .name = "gcn3Encoding", - .llvm_name = "gcn3-encoding", - .description = "Encoding format for VI", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gfx7Gfx8Gfx9Insts = Feature{ - .name = "gfx7Gfx8Gfx9Insts", - .llvm_name = "gfx7-gfx8-gfx9-insts", - .description = "Instructions shared in GFX7, GFX8, GFX9", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gfx8Insts = Feature{ - .name = "gfx8Insts", - .llvm_name = "gfx8-insts", - .description = "Additional instructions for GFX8+", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gfx9Insts = Feature{ - .name = "gfx9Insts", - .llvm_name = "gfx9-insts", - .description = "Additional instructions for GFX9+", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gfx10Insts = Feature{ - .name = "gfx10Insts", - .llvm_name = "gfx10-insts", - .description = "Additional instructions for GFX10+", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_instFwdPrefetchBug = Feature{ - .name = "instFwdPrefetchBug", - .llvm_name = "inst-fwd-prefetch-bug", - .description = "S_INST_PREFETCH instruction causes shader to hang", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_intClampInsts = Feature{ - .name = "intClampInsts", - .llvm_name = "int-clamp-insts", - .description = "Support clamp for integer destination", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_inv2piInlineImm = Feature{ - .name = "inv2piInlineImm", - .llvm_name = "inv-2pi-inline-imm", - .description = "Has 1 / (2 * pi) as inline immediate", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ldsbankcount16 = Feature{ - .name = "ldsbankcount16", - .llvm_name = "ldsbankcount16", - .description = "The number of LDS banks per compute unit.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ldsbankcount32 = Feature{ - .name = "ldsbankcount32", - .llvm_name = "ldsbankcount32", - .description = "The number of LDS banks per compute unit.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ldsBranchVmemWarHazard = Feature{ - .name = "ldsBranchVmemWarHazard", - .llvm_name = "lds-branch-vmem-war-hazard", - .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ldsMisalignedBug = Feature{ - .name = "ldsMisalignedBug", - .llvm_name = "lds-misaligned-bug", - .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_localmemorysize0 = Feature{ - .name = "localmemorysize0", - .llvm_name = "localmemorysize0", - .description = "The size of local memory in bytes", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_localmemorysize32768 = Feature{ - .name = "localmemorysize32768", - .llvm_name = "localmemorysize32768", - .description = "The size of local memory in bytes", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_localmemorysize65536 = Feature{ - .name = "localmemorysize65536", - .llvm_name = "localmemorysize65536", - .description = "The size of local memory in bytes", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_maiInsts = Feature{ - .name = "maiInsts", - .llvm_name = "mai-insts", - .description = "Has mAI instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mimgR128 = Feature{ - .name = "mimgR128", - .llvm_name = "mimg-r128", - .description = "Support 128-bit texture resources", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_madMixInsts = Feature{ - .name = "madMixInsts", - .llvm_name = "mad-mix-insts", - .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_maxPrivateElementSize4 = Feature{ - .name = "maxPrivateElementSize4", - .llvm_name = "max-private-element-size-4", - .description = "Maximum private access size may be 4", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_maxPrivateElementSize8 = Feature{ - .name = "maxPrivateElementSize8", - .llvm_name = "max-private-element-size-8", - .description = "Maximum private access size may be 8", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_maxPrivateElementSize16 = Feature{ - .name = "maxPrivateElementSize16", - .llvm_name = "max-private-element-size-16", - .description = "Maximum private access size may be 16", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_movrel = Feature{ - .name = "movrel", - .llvm_name = "movrel", - .description = "Has v_movrel*_b32 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nsaEncoding = Feature{ - .name = "nsaEncoding", - .llvm_name = "nsa-encoding", - .description = "Support NSA encoding for image instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nsaToVmemBug = Feature{ - .name = "nsaToVmemBug", - .llvm_name = "nsa-to-vmem-bug", - .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noDataDepHazard = Feature{ - .name = "noDataDepHazard", - .llvm_name = "no-data-dep-hazard", - .description = "Does not need SW waitstates", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noSdstCmpx = Feature{ - .name = "noSdstCmpx", - .llvm_name = "no-sdst-cmpx", - .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_offset3fBug = Feature{ - .name = "offset3fBug", - .llvm_name = "offset-3f-bug", - .description = "Branch offset of 3f hardware bug", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_pkFmacF16Inst = Feature{ - .name = "pkFmacF16Inst", - .llvm_name = "pk-fmac-f16-inst", - .description = "Has v_pk_fmac_f16 instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_promoteAlloca = Feature{ - .name = "promoteAlloca", - .llvm_name = "promote-alloca", - .description = "Enable promote alloca pass", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_r128A16 = Feature{ - .name = "r128A16", - .llvm_name = "r128-a16", - .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_registerBanking = Feature{ - .name = "registerBanking", - .llvm_name = "register-banking", - .description = "Has register banking", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwa = Feature{ - .name = "sdwa", - .llvm_name = "sdwa", - .description = "Support SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwaMav = Feature{ - .name = "sdwaMav", - .llvm_name = "sdwa-mav", - .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwaOmod = Feature{ - .name = "sdwaOmod", - .llvm_name = "sdwa-omod", - .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwaOutModsVopc = Feature{ - .name = "sdwaOutModsVopc", - .llvm_name = "sdwa-out-mods-vopc", - .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwaScalar = Feature{ - .name = "sdwaScalar", - .llvm_name = "sdwa-scalar", - .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sdwaSdst = Feature{ - .name = "sdwaSdst", - .llvm_name = "sdwa-sdst", - .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sgprInitBug = Feature{ - .name = "sgprInitBug", - .llvm_name = "sgpr-init-bug", - .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_smemToVectorWriteHazard = Feature{ - .name = "smemToVectorWriteHazard", - .llvm_name = "smem-to-vector-write-hazard", - .description = "s_load_dword followed by v_cmp page faults", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sMemrealtime = Feature{ - .name = "sMemrealtime", - .llvm_name = "s-memrealtime", - .description = "Has s_memrealtime instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sramEcc = Feature{ - .name = "sramEcc", - .llvm_name = "sram-ecc", - .description = "Enable SRAM ECC", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_scalarAtomics = Feature{ - .name = "scalarAtomics", - .llvm_name = "scalar-atomics", - .description = "Has atomic scalar memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_scalarFlatScratchInsts = Feature{ - .name = "scalarFlatScratchInsts", - .llvm_name = "scalar-flat-scratch-insts", - .description = "Have s_scratch_* flat memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_scalarStores = Feature{ - .name = "scalarStores", - .llvm_name = "scalar-stores", - .description = "Has store scalar memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_trapHandler = Feature{ - .name = "trapHandler", - .llvm_name = "trap-handler", - .description = "Trap handler support", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_trigReducedRange = Feature{ - .name = "trigReducedRange", - .llvm_name = "trig-reduced-range", - .description = "Requires use of fract on arguments to trig instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_unalignedBufferAccess = Feature{ - .name = "unalignedBufferAccess", - .llvm_name = "unaligned-buffer-access", - .description = "Support unaligned global loads and stores", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_unalignedScratchAccess = Feature{ - .name = "unalignedScratchAccess", - .llvm_name = "unaligned-scratch-access", - .description = "Support unaligned scratch loads and stores", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_unpackedD16Vmem = Feature{ - .name = "unpackedD16Vmem", - .llvm_name = "unpacked-d16-vmem", - .description = "Has unpacked d16 vmem instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vgprIndexMode = Feature{ - .name = "vgprIndexMode", - .llvm_name = "vgpr-index-mode", - .description = "Has VGPR mode register indexing", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vmemToScalarWriteHazard = Feature{ - .name = "vmemToScalarWriteHazard", - .llvm_name = "vmem-to-scalar-write-hazard", - .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vop3Literal = Feature{ - .name = "vop3Literal", - .llvm_name = "vop3-literal", - .description = "Can use one literal in VOP3", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vop3p = Feature{ - .name = "vop3p", - .llvm_name = "vop3p", - .description = "Has VOP3P packed instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vcmpxExecWarHazard = Feature{ - .name = "vcmpxExecWarHazard", - .llvm_name = "vcmpx-exec-war-hazard", - .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vcmpxPermlaneHazard = Feature{ - .name = "vcmpxPermlaneHazard", - .llvm_name = "vcmpx-permlane-hazard", - .description = "TODO: describe me", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vscnt = Feature{ - .name = "vscnt", - .llvm_name = "vscnt", - .description = "Has separate store vscnt counter", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_wavefrontsize16 = Feature{ - .name = "wavefrontsize16", - .llvm_name = "wavefrontsize16", - .description = "The number of threads per wavefront", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_wavefrontsize32 = Feature{ - .name = "wavefrontsize32", - .llvm_name = "wavefrontsize32", - .description = "The number of threads per wavefront", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_wavefrontsize64 = Feature{ - .name = "wavefrontsize64", - .llvm_name = "wavefrontsize64", - .description = "The number of threads per wavefront", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_xnack = Feature{ - .name = "xnack", - .llvm_name = "xnack", - .description = "Enable XNACK support", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_halfRate64Ops = Feature{ - .name = "halfRate64Ops", - .llvm_name = "half-rate-64-ops", - .description = "Most fp64 instructions are half rate instead of quarter", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_BitInsts16, - &feature_addNoCarryInsts, - &feature_apertureRegs, - &feature_atomicFaddInsts, - &feature_autoWaitcntBeforeBarrier, - &feature_ciInsts, - &feature_codeObjectV3, - &feature_cumode, - &feature_dlInsts, - &feature_dpp, - &feature_dpp8, - &feature_noSramEccSupport, - &feature_noXnackSupport, - &feature_dot1Insts, - &feature_dot2Insts, - &feature_dot3Insts, - &feature_dot4Insts, - &feature_dot5Insts, - &feature_dot6Insts, - &feature_DumpCode, - &feature_dumpcode, - &feature_enableDs128, - &feature_loadStoreOpt, - &feature_enablePrtStrictNull, - &feature_siScheduler, - &feature_unsafeDsOffsetFolding, - &feature_fmaf, - &feature_fp16Denormals, - &feature_fp32Denormals, - &feature_fp64, - &feature_fp64Denormals, - &feature_fp64Fp16Denormals, - &feature_fpExceptions, - &feature_fastFmaf, - &feature_flatAddressSpace, - &feature_flatForGlobal, - &feature_flatGlobalInsts, - &feature_flatInstOffsets, - &feature_flatScratchInsts, - &feature_flatSegmentOffsetBug, - &feature_fmaMixInsts, - &feature_gcn3Encoding, - &feature_gfx7Gfx8Gfx9Insts, - &feature_gfx8Insts, - &feature_gfx9Insts, - &feature_gfx10Insts, - &feature_instFwdPrefetchBug, - &feature_intClampInsts, - &feature_inv2piInlineImm, - &feature_ldsbankcount16, - &feature_ldsbankcount32, - &feature_ldsBranchVmemWarHazard, - &feature_ldsMisalignedBug, - &feature_localmemorysize0, - &feature_localmemorysize32768, - &feature_localmemorysize65536, - &feature_maiInsts, - &feature_mimgR128, - &feature_madMixInsts, - &feature_maxPrivateElementSize4, - &feature_maxPrivateElementSize8, - &feature_maxPrivateElementSize16, - &feature_movrel, - &feature_nsaEncoding, - &feature_nsaToVmemBug, - &feature_noDataDepHazard, - &feature_noSdstCmpx, - &feature_offset3fBug, - &feature_pkFmacF16Inst, - &feature_promoteAlloca, - &feature_r128A16, - &feature_registerBanking, - &feature_sdwa, - &feature_sdwaMav, - &feature_sdwaOmod, - &feature_sdwaOutModsVopc, - &feature_sdwaScalar, - &feature_sdwaSdst, - &feature_sgprInitBug, - &feature_smemToVectorWriteHazard, - &feature_sMemrealtime, - &feature_sramEcc, - &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_scalarStores, - &feature_trapHandler, - &feature_trigReducedRange, - &feature_unalignedBufferAccess, - &feature_unalignedScratchAccess, - &feature_unpackedD16Vmem, - &feature_vgprIndexMode, - &feature_vmemToScalarWriteHazard, - &feature_vop3Literal, - &feature_vop3p, - &feature_vcmpxExecWarHazard, - &feature_vcmpxPermlaneHazard, - &feature_vscnt, - &feature_wavefrontsize16, - &feature_wavefrontsize32, - &feature_wavefrontsize64, - &feature_xnack, - &feature_halfRate64Ops, -}; - -pub const cpu_bonaire = Cpu{ - .name = "bonaire", - .llvm_name = "bonaire", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_carrizo = Cpu{ - .name = "carrizo", - .llvm_name = "carrizo", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_xnack, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_fiji = Cpu{ - .name = "fiji", - .llvm_name = "fiji", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - &feature_wavefrontsize64, - }, -}; - -pub const cpu_genericHsa = Cpu{ - .name = "genericHsa", - .llvm_name = "generic-hsa", - .dependencies = &[_]*const Feature { - &feature_flatAddressSpace, - &feature_wavefrontsize64, - }, -}; - -pub const cpu_gfx1010 = Cpu{ - .name = "gfx1010", - .llvm_name = "gfx1010", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_dlInsts, - &feature_noXnackSupport, - &feature_flatSegmentOffsetBug, - &feature_fmaMixInsts, - &feature_movrel, - &feature_registerBanking, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_mimgR128, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_noSdstCmpx, - &feature_vop3p, - &feature_sdwa, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_noDataDepHazard, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_sMemrealtime, - &feature_pkFmacF16Inst, - &feature_dpp8, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_noSramEccSupport, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_vscnt, - &feature_instFwdPrefetchBug, - &feature_ldsbankcount32, - &feature_ldsBranchVmemWarHazard, - &feature_ldsMisalignedBug, - &feature_nsaEncoding, - &feature_nsaToVmemBug, - &feature_offset3fBug, - &feature_smemToVectorWriteHazard, - &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_scalarStores, - &feature_vmemToScalarWriteHazard, - &feature_vcmpxExecWarHazard, - &feature_vcmpxPermlaneHazard, - &feature_wavefrontsize32, - }, -}; - -pub const cpu_gfx1011 = Cpu{ - .name = "gfx1011", - .llvm_name = "gfx1011", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_dlInsts, - &feature_noXnackSupport, - &feature_dot1Insts, - &feature_dot2Insts, - &feature_dot5Insts, - &feature_dot6Insts, - &feature_flatSegmentOffsetBug, - &feature_fmaMixInsts, - &feature_movrel, - &feature_registerBanking, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_mimgR128, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_noSdstCmpx, - &feature_vop3p, - &feature_sdwa, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_noDataDepHazard, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_sMemrealtime, - &feature_pkFmacF16Inst, - &feature_dpp8, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_noSramEccSupport, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_vscnt, - &feature_instFwdPrefetchBug, - &feature_ldsbankcount32, - &feature_ldsBranchVmemWarHazard, - &feature_nsaEncoding, - &feature_nsaToVmemBug, - &feature_offset3fBug, - &feature_smemToVectorWriteHazard, - &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_scalarStores, - &feature_vmemToScalarWriteHazard, - &feature_vcmpxExecWarHazard, - &feature_vcmpxPermlaneHazard, - &feature_wavefrontsize32, - }, -}; - -pub const cpu_gfx1012 = Cpu{ - .name = "gfx1012", - .llvm_name = "gfx1012", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_dlInsts, - &feature_noXnackSupport, - &feature_dot1Insts, - &feature_dot2Insts, - &feature_dot5Insts, - &feature_dot6Insts, - &feature_flatSegmentOffsetBug, - &feature_fmaMixInsts, - &feature_movrel, - &feature_registerBanking, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_mimgR128, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_noSdstCmpx, - &feature_vop3p, - &feature_sdwa, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_noDataDepHazard, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_sMemrealtime, - &feature_pkFmacF16Inst, - &feature_dpp8, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_noSramEccSupport, - &feature_gfx10Insts, - &feature_localmemorysize65536, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_vop3Literal, - &feature_sdwaOmod, - &feature_vscnt, - &feature_instFwdPrefetchBug, - &feature_ldsbankcount32, - &feature_ldsBranchVmemWarHazard, - &feature_ldsMisalignedBug, - &feature_nsaEncoding, - &feature_nsaToVmemBug, - &feature_offset3fBug, - &feature_smemToVectorWriteHazard, - &feature_scalarAtomics, - &feature_scalarFlatScratchInsts, - &feature_scalarStores, - &feature_vmemToScalarWriteHazard, - &feature_vcmpxExecWarHazard, - &feature_vcmpxPermlaneHazard, - &feature_wavefrontsize32, - }, -}; - -pub const cpu_gfx600 = Cpu{ - .name = "gfx600", - .llvm_name = "gfx600", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_gfx601 = Cpu{ - .name = "gfx601", - .llvm_name = "gfx601", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - }, -}; - -pub const cpu_gfx700 = Cpu{ - .name = "gfx700", - .llvm_name = "gfx700", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_gfx701 = Cpu{ - .name = "gfx701", - .llvm_name = "gfx701", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_gfx702 = Cpu{ - .name = "gfx702", - .llvm_name = "gfx702", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_fastFmaf, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_gfx703 = Cpu{ - .name = "gfx703", - .llvm_name = "gfx703", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_gfx704 = Cpu{ - .name = "gfx704", - .llvm_name = "gfx704", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_gfx801 = Cpu{ - .name = "gfx801", - .llvm_name = "gfx801", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_xnack, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_gfx802 = Cpu{ - .name = "gfx802", - .llvm_name = "gfx802", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_sgprInitBug, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_gfx803 = Cpu{ - .name = "gfx803", - .llvm_name = "gfx803", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_gfx810 = Cpu{ - .name = "gfx810", - .llvm_name = "gfx810", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_xnack, - }, -}; - -pub const cpu_gfx900 = Cpu{ - .name = "gfx900", - .llvm_name = "gfx900", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noSramEccSupport, - &feature_noXnackSupport, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - &feature_madMixInsts, - }, -}; - -pub const cpu_gfx902 = Cpu{ - .name = "gfx902", - .llvm_name = "gfx902", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noSramEccSupport, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - &feature_madMixInsts, - &feature_xnack, - }, -}; - -pub const cpu_gfx904 = Cpu{ - .name = "gfx904", - .llvm_name = "gfx904", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noSramEccSupport, - &feature_noXnackSupport, - &feature_fmaMixInsts, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - }, -}; - -pub const cpu_gfx906 = Cpu{ - .name = "gfx906", - .llvm_name = "gfx906", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_dlInsts, - &feature_noXnackSupport, - &feature_dot1Insts, - &feature_dot2Insts, - &feature_fmaMixInsts, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_gfx908 = Cpu{ - .name = "gfx908", - .llvm_name = "gfx908", - .dependencies = &[_]*const Feature { - &feature_atomicFaddInsts, - &feature_codeObjectV3, - &feature_dlInsts, - &feature_dot1Insts, - &feature_dot2Insts, - &feature_dot3Insts, - &feature_dot4Insts, - &feature_dot5Insts, - &feature_dot6Insts, - &feature_fmaMixInsts, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - &feature_maiInsts, - &feature_pkFmacF16Inst, - &feature_sramEcc, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_gfx909 = Cpu{ - .name = "gfx909", - .llvm_name = "gfx909", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_vgprIndexMode, - &feature_addNoCarryInsts, - &feature_fp64, - &feature_gcn3Encoding, - &feature_sdwaScalar, - &feature_flatGlobalInsts, - &feature_scalarFlatScratchInsts, - &feature_flatInstOffsets, - &feature_apertureRegs, - &feature_vop3p, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_sdwaSdst, - &feature_flatScratchInsts, - &feature_ciInsts, - &feature_r128A16, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_scalarAtomics, - &feature_inv2piInlineImm, - &feature_fastFmaf, - &feature_wavefrontsize64, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx9Insts, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_sdwaOmod, - &feature_ldsbankcount32, - &feature_madMixInsts, - &feature_xnack, - }, -}; - -pub const cpu_hainan = Cpu{ - .name = "hainan", - .llvm_name = "hainan", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - }, -}; - -pub const cpu_hawaii = Cpu{ - .name = "hawaii", - .llvm_name = "hawaii", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_iceland = Cpu{ - .name = "iceland", - .llvm_name = "iceland", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_sgprInitBug, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_kabini = Cpu{ - .name = "kabini", - .llvm_name = "kabini", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_kaveri = Cpu{ - .name = "kaveri", - .llvm_name = "kaveri", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_mullins = Cpu{ - .name = "mullins", - .llvm_name = "mullins", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_gfx7Gfx8Gfx9Insts, - &feature_movrel, - &feature_flatAddressSpace, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_ciInsts, - &feature_localmemorysize65536, - }, -}; - -pub const cpu_oland = Cpu{ - .name = "oland", - .llvm_name = "oland", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - }, -}; - -pub const cpu_pitcairn = Cpu{ - .name = "pitcairn", - .llvm_name = "pitcairn", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - }, -}; - -pub const cpu_polaris10 = Cpu{ - .name = "polaris10", - .llvm_name = "polaris10", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_polaris11 = Cpu{ - .name = "polaris11", - .llvm_name = "polaris11", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_stoney = Cpu{ - .name = "stoney", - .llvm_name = "stoney", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_ldsbankcount16, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - &feature_xnack, - }, -}; - -pub const cpu_tahiti = Cpu{ - .name = "tahiti", - .llvm_name = "tahiti", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_fastFmaf, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - &feature_halfRate64Ops, - }, -}; - -pub const cpu_tonga = Cpu{ - .name = "tonga", - .llvm_name = "tonga", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_sgprInitBug, - &feature_unpackedD16Vmem, - &feature_trigReducedRange, - &feature_vgprIndexMode, - &feature_movrel, - &feature_fp64, - &feature_gcn3Encoding, - &feature_mimgR128, - &feature_sdwa, - &feature_gfx7Gfx8Gfx9Insts, - &feature_intClampInsts, - &feature_ciInsts, - &feature_sdwaOutModsVopc, - &feature_sMemrealtime, - &feature_flatAddressSpace, - &feature_inv2piInlineImm, - &feature_wavefrontsize64, - &feature_noSramEccSupport, - &feature_sdwaMav, - &feature_localmemorysize65536, - &feature_scalarStores, - &feature_gfx8Insts, - &feature_dpp, - &feature_BitInsts16, - }, -}; - -pub const cpu_verde = Cpu{ - .name = "verde", - .llvm_name = "verde", - .dependencies = &[_]*const Feature { - &feature_codeObjectV3, - &feature_noXnackSupport, - &feature_ldsbankcount32, - &feature_trigReducedRange, - &feature_movrel, - &feature_wavefrontsize64, - &feature_fp64, - &feature_mimgR128, - &feature_noSramEccSupport, - &feature_localmemorysize32768, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_bonaire, - &cpu_carrizo, - &cpu_fiji, - &cpu_generic, - &cpu_genericHsa, - &cpu_gfx1010, - &cpu_gfx1011, - &cpu_gfx1012, - &cpu_gfx600, - &cpu_gfx601, - &cpu_gfx700, - &cpu_gfx701, - &cpu_gfx702, - &cpu_gfx703, - &cpu_gfx704, - &cpu_gfx801, - &cpu_gfx802, - &cpu_gfx803, - &cpu_gfx810, - &cpu_gfx900, - &cpu_gfx902, - &cpu_gfx904, - &cpu_gfx906, - &cpu_gfx908, - &cpu_gfx909, - &cpu_hainan, - &cpu_hawaii, - &cpu_iceland, - &cpu_kabini, - &cpu_kaveri, - &cpu_mullins, - &cpu_oland, - &cpu_pitcairn, - &cpu_polaris10, - &cpu_polaris11, - &cpu_stoney, - &cpu_tahiti, - &cpu_tonga, - &cpu_verde, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + @"16_bit_insts", + DumpCode, + add_no_carry_insts, + aperture_regs, + atomic_fadd_insts, + auto_waitcnt_before_barrier, + ci_insts, + code_object_v3, + cumode, + dl_insts, + dot1_insts, + dot2_insts, + dot3_insts, + dot4_insts, + dot5_insts, + dot6_insts, + dpp, + dpp8, + dumpcode, + enable_ds128, + enable_prt_strict_null, + fast_fmaf, + flat_address_space, + flat_for_global, + flat_global_insts, + flat_inst_offsets, + flat_scratch_insts, + flat_segment_offset_bug, + fma_mix_insts, + fmaf, + fp_exceptions, + fp16_denormals, + fp32_denormals, + fp64, + fp64_denormals, + fp64_fp16_denormals, + gcn3_encoding, + gfx10, + gfx10_insts, + gfx7_gfx8_gfx9_insts, + gfx8_insts, + gfx9, + gfx9_insts, + half_rate_64_ops, + inst_fwd_prefetch_bug, + int_clamp_insts, + inv_2pi_inline_imm, + lds_branch_vmem_war_hazard, + lds_misaligned_bug, + ldsbankcount16, + ldsbankcount32, + load_store_opt, + localmemorysize0, + localmemorysize32768, + localmemorysize65536, + mad_mix_insts, + mai_insts, + max_private_element_size_16, + max_private_element_size_4, + max_private_element_size_8, + mimg_r128, + movrel, + no_data_dep_hazard, + no_sdst_cmpx, + no_sram_ecc_support, + no_xnack_support, + nsa_encoding, + nsa_to_vmem_bug, + offset_3f_bug, + pk_fmac_f16_inst, + promote_alloca, + r128_a16, + register_banking, + s_memrealtime, + scalar_atomics, + scalar_flat_scratch_insts, + scalar_stores, + sdwa, + sdwa_mav, + sdwa_omod, + sdwa_out_mods_vopc, + sdwa_scalar, + sdwa_sdst, + sea_islands, + sgpr_init_bug, + si_scheduler, + smem_to_vector_write_hazard, + southern_islands, + sram_ecc, + trap_handler, + trig_reduced_range, + unaligned_buffer_access, + unaligned_scratch_access, + unpacked_d16_vmem, + unsafe_ds_offset_folding, + vcmpx_exec_war_hazard, + vcmpx_permlane_hazard, + vgpr_index_mode, + vmem_to_scalar_write_hazard, + volcanic_islands, + vop3_literal, + vop3p, + vscnt, + wavefrontsize16, + wavefrontsize32, + wavefrontsize64, + xnack, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.@"16_bit_insts")] = .{ + .index = @enumToInt(Feature.@"16_bit_insts"), + .name = @tagName(Feature.@"16_bit_insts"), + .llvm_name = "16-bit-insts", + .description = "Has i16/f16 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.DumpCode)] = .{ + .index = @enumToInt(Feature.DumpCode), + .name = @tagName(Feature.DumpCode), + .llvm_name = "DumpCode", + .description = "Dump MachineInstrs in the CodeEmitter", + .dependencies = 0, + }; + result[@enumToInt(Feature.add_no_carry_insts)] = .{ + .index = @enumToInt(Feature.add_no_carry_insts), + .name = @tagName(Feature.add_no_carry_insts), + .llvm_name = "add-no-carry-insts", + .description = "Have VALU add/sub instructions without carry out", + .dependencies = 0, + }; + result[@enumToInt(Feature.aperture_regs)] = .{ + .index = @enumToInt(Feature.aperture_regs), + .name = @tagName(Feature.aperture_regs), + .llvm_name = "aperture-regs", + .description = "Has Memory Aperture Base and Size Registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.atomic_fadd_insts)] = .{ + .index = @enumToInt(Feature.atomic_fadd_insts), + .name = @tagName(Feature.atomic_fadd_insts), + .llvm_name = "atomic-fadd-insts", + .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{ + .index = @enumToInt(Feature.auto_waitcnt_before_barrier), + .name = @tagName(Feature.auto_waitcnt_before_barrier), + .llvm_name = "auto-waitcnt-before-barrier", + .description = "Hardware automatically inserts waitcnt before barrier", + .dependencies = 0, + }; + result[@enumToInt(Feature.ci_insts)] = .{ + .index = @enumToInt(Feature.ci_insts), + .name = @tagName(Feature.ci_insts), + .llvm_name = "ci-insts", + .description = "Additional instructions for CI+", + .dependencies = 0, + }; + result[@enumToInt(Feature.code_object_v3)] = .{ + .index = @enumToInt(Feature.code_object_v3), + .name = @tagName(Feature.code_object_v3), + .llvm_name = "code-object-v3", + .description = "Generate code object version 3", + .dependencies = 0, + }; + result[@enumToInt(Feature.cumode)] = .{ + .index = @enumToInt(Feature.cumode), + .name = @tagName(Feature.cumode), + .llvm_name = "cumode", + .description = "Enable CU wavefront execution mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.dl_insts)] = .{ + .index = @enumToInt(Feature.dl_insts), + .name = @tagName(Feature.dl_insts), + .llvm_name = "dl-insts", + .description = "Has v_fmac_f32 and v_xnor_b32 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot1_insts)] = .{ + .index = @enumToInt(Feature.dot1_insts), + .name = @tagName(Feature.dot1_insts), + .llvm_name = "dot1-insts", + .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot2_insts)] = .{ + .index = @enumToInt(Feature.dot2_insts), + .name = @tagName(Feature.dot2_insts), + .llvm_name = "dot2-insts", + .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot3_insts)] = .{ + .index = @enumToInt(Feature.dot3_insts), + .name = @tagName(Feature.dot3_insts), + .llvm_name = "dot3-insts", + .description = "Has v_dot8c_i32_i4 instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot4_insts)] = .{ + .index = @enumToInt(Feature.dot4_insts), + .name = @tagName(Feature.dot4_insts), + .llvm_name = "dot4-insts", + .description = "Has v_dot2c_i32_i16 instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot5_insts)] = .{ + .index = @enumToInt(Feature.dot5_insts), + .name = @tagName(Feature.dot5_insts), + .llvm_name = "dot5-insts", + .description = "Has v_dot2c_f32_f16 instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.dot6_insts)] = .{ + .index = @enumToInt(Feature.dot6_insts), + .name = @tagName(Feature.dot6_insts), + .llvm_name = "dot6-insts", + .description = "Has v_dot4c_i32_i8 instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.dpp)] = .{ + .index = @enumToInt(Feature.dpp), + .name = @tagName(Feature.dpp), + .llvm_name = "dpp", + .description = "Support DPP (Data Parallel Primitives) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.dpp8)] = .{ + .index = @enumToInt(Feature.dpp8), + .name = @tagName(Feature.dpp8), + .llvm_name = "dpp8", + .description = "Support DPP8 (Data Parallel Primitives) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.dumpcode)] = .{ + .index = @enumToInt(Feature.dumpcode), + .name = @tagName(Feature.dumpcode), + .llvm_name = "dumpcode", + .description = "Dump MachineInstrs in the CodeEmitter", + .dependencies = 0, + }; + result[@enumToInt(Feature.enable_ds128)] = .{ + .index = @enumToInt(Feature.enable_ds128), + .name = @tagName(Feature.enable_ds128), + .llvm_name = "enable-ds128", + .description = "Use ds_read|write_b128", + .dependencies = 0, + }; + result[@enumToInt(Feature.enable_prt_strict_null)] = .{ + .index = @enumToInt(Feature.enable_prt_strict_null), + .name = @tagName(Feature.enable_prt_strict_null), + .llvm_name = "enable-prt-strict-null", + .description = "Enable zeroing of result registers for sparse texture fetches", + .dependencies = 0, + }; + result[@enumToInt(Feature.fast_fmaf)] = .{ + .index = @enumToInt(Feature.fast_fmaf), + .name = @tagName(Feature.fast_fmaf), + .llvm_name = "fast-fmaf", + .description = "Assuming f32 fma is at least as fast as mul + add", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_address_space)] = .{ + .index = @enumToInt(Feature.flat_address_space), + .name = @tagName(Feature.flat_address_space), + .llvm_name = "flat-address-space", + .description = "Support flat address space", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_for_global)] = .{ + .index = @enumToInt(Feature.flat_for_global), + .name = @tagName(Feature.flat_for_global), + .llvm_name = "flat-for-global", + .description = "Force to generate flat instruction for global", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_global_insts)] = .{ + .index = @enumToInt(Feature.flat_global_insts), + .name = @tagName(Feature.flat_global_insts), + .llvm_name = "flat-global-insts", + .description = "Have global_* flat memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_inst_offsets)] = .{ + .index = @enumToInt(Feature.flat_inst_offsets), + .name = @tagName(Feature.flat_inst_offsets), + .llvm_name = "flat-inst-offsets", + .description = "Flat instructions have immediate offset addressing mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_scratch_insts)] = .{ + .index = @enumToInt(Feature.flat_scratch_insts), + .name = @tagName(Feature.flat_scratch_insts), + .llvm_name = "flat-scratch-insts", + .description = "Have scratch_* flat memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.flat_segment_offset_bug)] = .{ + .index = @enumToInt(Feature.flat_segment_offset_bug), + .name = @tagName(Feature.flat_segment_offset_bug), + .llvm_name = "flat-segment-offset-bug", + .description = "GFX10 bug, inst_offset ignored in flat segment", + .dependencies = 0, + }; + result[@enumToInt(Feature.fma_mix_insts)] = .{ + .index = @enumToInt(Feature.fma_mix_insts), + .name = @tagName(Feature.fma_mix_insts), + .llvm_name = "fma-mix-insts", + .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.fmaf)] = .{ + .index = @enumToInt(Feature.fmaf), + .name = @tagName(Feature.fmaf), + .llvm_name = "fmaf", + .description = "Enable single precision FMA (not as fast as mul+add, but fused)", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp_exceptions)] = .{ + .index = @enumToInt(Feature.fp_exceptions), + .name = @tagName(Feature.fp_exceptions), + .llvm_name = "fp-exceptions", + .description = "Enable floating point exceptions", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp16_denormals)] = .{ + .index = @enumToInt(Feature.fp16_denormals), + .name = @tagName(Feature.fp16_denormals), + .llvm_name = "fp16-denormals", + .description = "Enable half precision denormal handling", + .dependencies = featureSet(&[_]Feature{ + .fp64_fp16_denormals, + }), + }; + result[@enumToInt(Feature.fp32_denormals)] = .{ + .index = @enumToInt(Feature.fp32_denormals), + .name = @tagName(Feature.fp32_denormals), + .llvm_name = "fp32-denormals", + .description = "Enable single precision denormal handling", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp64)] = .{ + .index = @enumToInt(Feature.fp64), + .name = @tagName(Feature.fp64), + .llvm_name = "fp64", + .description = "Enable double precision operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp64_denormals)] = .{ + .index = @enumToInt(Feature.fp64_denormals), + .name = @tagName(Feature.fp64_denormals), + .llvm_name = "fp64-denormals", + .description = "Enable double and half precision denormal handling", + .dependencies = featureSet(&[_]Feature{ + .fp64, + .fp64_fp16_denormals, + }), + }; + result[@enumToInt(Feature.fp64_fp16_denormals)] = .{ + .index = @enumToInt(Feature.fp64_fp16_denormals), + .name = @tagName(Feature.fp64_fp16_denormals), + .llvm_name = "fp64-fp16-denormals", + .description = "Enable double and half precision denormal handling", + .dependencies = featureSet(&[_]Feature{ + .fp64, + }), + }; + result[@enumToInt(Feature.gcn3_encoding)] = .{ + .index = @enumToInt(Feature.gcn3_encoding), + .name = @tagName(Feature.gcn3_encoding), + .llvm_name = "gcn3-encoding", + .description = "Encoding format for VI", + .dependencies = 0, + }; + result[@enumToInt(Feature.gfx10)] = .{ + .index = @enumToInt(Feature.gfx10), + .name = @tagName(Feature.gfx10), + .llvm_name = "gfx10", + .description = "GFX10 GPU generation", + .dependencies = featureSet(&[_]Feature{ + .@"16_bit_insts", + .add_no_carry_insts, + .aperture_regs, + .ci_insts, + .dpp, + .dpp8, + .fast_fmaf, + .flat_address_space, + .flat_global_insts, + .flat_inst_offsets, + .flat_scratch_insts, + .fma_mix_insts, + .fp64, + .gfx10_insts, + .gfx8_insts, + .gfx9_insts, + .int_clamp_insts, + .inv_2pi_inline_imm, + .localmemorysize65536, + .mimg_r128, + .movrel, + .no_data_dep_hazard, + .no_sdst_cmpx, + .no_sram_ecc_support, + .pk_fmac_f16_inst, + .register_banking, + .s_memrealtime, + .sdwa, + .sdwa_omod, + .sdwa_scalar, + .sdwa_sdst, + .vop3_literal, + .vop3p, + .vscnt, + }), + }; + result[@enumToInt(Feature.gfx10_insts)] = .{ + .index = @enumToInt(Feature.gfx10_insts), + .name = @tagName(Feature.gfx10_insts), + .llvm_name = "gfx10-insts", + .description = "Additional instructions for GFX10+", + .dependencies = 0, + }; + result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ + .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts), + .name = @tagName(Feature.gfx7_gfx8_gfx9_insts), + .llvm_name = "gfx7-gfx8-gfx9-insts", + .description = "Instructions shared in GFX7, GFX8, GFX9", + .dependencies = 0, + }; + result[@enumToInt(Feature.gfx8_insts)] = .{ + .index = @enumToInt(Feature.gfx8_insts), + .name = @tagName(Feature.gfx8_insts), + .llvm_name = "gfx8-insts", + .description = "Additional instructions for GFX8+", + .dependencies = 0, + }; + result[@enumToInt(Feature.gfx9)] = .{ + .index = @enumToInt(Feature.gfx9), + .name = @tagName(Feature.gfx9), + .llvm_name = "gfx9", + .description = "GFX9 GPU generation", + .dependencies = featureSet(&[_]Feature{ + .@"16_bit_insts", + .add_no_carry_insts, + .aperture_regs, + .ci_insts, + .dpp, + .fast_fmaf, + .flat_address_space, + .flat_global_insts, + .flat_inst_offsets, + .flat_scratch_insts, + .fp64, + .gcn3_encoding, + .gfx7_gfx8_gfx9_insts, + .gfx8_insts, + .gfx9_insts, + .int_clamp_insts, + .inv_2pi_inline_imm, + .localmemorysize65536, + .r128_a16, + .s_memrealtime, + .scalar_atomics, + .scalar_flat_scratch_insts, + .scalar_stores, + .sdwa, + .sdwa_omod, + .sdwa_scalar, + .sdwa_sdst, + .vgpr_index_mode, + .vop3p, + .wavefrontsize64, + }), + }; + result[@enumToInt(Feature.gfx9_insts)] = .{ + .index = @enumToInt(Feature.gfx9_insts), + .name = @tagName(Feature.gfx9_insts), + .llvm_name = "gfx9-insts", + .description = "Additional instructions for GFX9+", + .dependencies = 0, + }; + result[@enumToInt(Feature.half_rate_64_ops)] = .{ + .index = @enumToInt(Feature.half_rate_64_ops), + .name = @tagName(Feature.half_rate_64_ops), + .llvm_name = "half-rate-64-ops", + .description = "Most fp64 instructions are half rate instead of quarter", + .dependencies = 0, + }; + result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ + .index = @enumToInt(Feature.inst_fwd_prefetch_bug), + .name = @tagName(Feature.inst_fwd_prefetch_bug), + .llvm_name = "inst-fwd-prefetch-bug", + .description = "S_INST_PREFETCH instruction causes shader to hang", + .dependencies = 0, + }; + result[@enumToInt(Feature.int_clamp_insts)] = .{ + .index = @enumToInt(Feature.int_clamp_insts), + .name = @tagName(Feature.int_clamp_insts), + .llvm_name = "int-clamp-insts", + .description = "Support clamp for integer destination", + .dependencies = 0, + }; + result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{ + .index = @enumToInt(Feature.inv_2pi_inline_imm), + .name = @tagName(Feature.inv_2pi_inline_imm), + .llvm_name = "inv-2pi-inline-imm", + .description = "Has 1 / (2 * pi) as inline immediate", + .dependencies = 0, + }; + result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{ + .index = @enumToInt(Feature.lds_branch_vmem_war_hazard), + .name = @tagName(Feature.lds_branch_vmem_war_hazard), + .llvm_name = "lds-branch-vmem-war-hazard", + .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", + .dependencies = 0, + }; + result[@enumToInt(Feature.lds_misaligned_bug)] = .{ + .index = @enumToInt(Feature.lds_misaligned_bug), + .name = @tagName(Feature.lds_misaligned_bug), + .llvm_name = "lds-misaligned-bug", + .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.ldsbankcount16)] = .{ + .index = @enumToInt(Feature.ldsbankcount16), + .name = @tagName(Feature.ldsbankcount16), + .llvm_name = "ldsbankcount16", + .description = "The number of LDS banks per compute unit.", + .dependencies = 0, + }; + result[@enumToInt(Feature.ldsbankcount32)] = .{ + .index = @enumToInt(Feature.ldsbankcount32), + .name = @tagName(Feature.ldsbankcount32), + .llvm_name = "ldsbankcount32", + .description = "The number of LDS banks per compute unit.", + .dependencies = 0, + }; + result[@enumToInt(Feature.load_store_opt)] = .{ + .index = @enumToInt(Feature.load_store_opt), + .name = @tagName(Feature.load_store_opt), + .llvm_name = "load-store-opt", + .description = "Enable SI load/store optimizer pass", + .dependencies = 0, + }; + result[@enumToInt(Feature.localmemorysize0)] = .{ + .index = @enumToInt(Feature.localmemorysize0), + .name = @tagName(Feature.localmemorysize0), + .llvm_name = "localmemorysize0", + .description = "The size of local memory in bytes", + .dependencies = 0, + }; + result[@enumToInt(Feature.localmemorysize32768)] = .{ + .index = @enumToInt(Feature.localmemorysize32768), + .name = @tagName(Feature.localmemorysize32768), + .llvm_name = "localmemorysize32768", + .description = "The size of local memory in bytes", + .dependencies = 0, + }; + result[@enumToInt(Feature.localmemorysize65536)] = .{ + .index = @enumToInt(Feature.localmemorysize65536), + .name = @tagName(Feature.localmemorysize65536), + .llvm_name = "localmemorysize65536", + .description = "The size of local memory in bytes", + .dependencies = 0, + }; + result[@enumToInt(Feature.mad_mix_insts)] = .{ + .index = @enumToInt(Feature.mad_mix_insts), + .name = @tagName(Feature.mad_mix_insts), + .llvm_name = "mad-mix-insts", + .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.mai_insts)] = .{ + .index = @enumToInt(Feature.mai_insts), + .name = @tagName(Feature.mai_insts), + .llvm_name = "mai-insts", + .description = "Has mAI instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.max_private_element_size_16)] = .{ + .index = @enumToInt(Feature.max_private_element_size_16), + .name = @tagName(Feature.max_private_element_size_16), + .llvm_name = "max-private-element-size-16", + .description = "Maximum private access size may be 16", + .dependencies = 0, + }; + result[@enumToInt(Feature.max_private_element_size_4)] = .{ + .index = @enumToInt(Feature.max_private_element_size_4), + .name = @tagName(Feature.max_private_element_size_4), + .llvm_name = "max-private-element-size-4", + .description = "Maximum private access size may be 4", + .dependencies = 0, + }; + result[@enumToInt(Feature.max_private_element_size_8)] = .{ + .index = @enumToInt(Feature.max_private_element_size_8), + .name = @tagName(Feature.max_private_element_size_8), + .llvm_name = "max-private-element-size-8", + .description = "Maximum private access size may be 8", + .dependencies = 0, + }; + result[@enumToInt(Feature.mimg_r128)] = .{ + .index = @enumToInt(Feature.mimg_r128), + .name = @tagName(Feature.mimg_r128), + .llvm_name = "mimg-r128", + .description = "Support 128-bit texture resources", + .dependencies = 0, + }; + result[@enumToInt(Feature.movrel)] = .{ + .index = @enumToInt(Feature.movrel), + .name = @tagName(Feature.movrel), + .llvm_name = "movrel", + .description = "Has v_movrel*_b32 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_data_dep_hazard)] = .{ + .index = @enumToInt(Feature.no_data_dep_hazard), + .name = @tagName(Feature.no_data_dep_hazard), + .llvm_name = "no-data-dep-hazard", + .description = "Does not need SW waitstates", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_sdst_cmpx)] = .{ + .index = @enumToInt(Feature.no_sdst_cmpx), + .name = @tagName(Feature.no_sdst_cmpx), + .llvm_name = "no-sdst-cmpx", + .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_sram_ecc_support)] = .{ + .index = @enumToInt(Feature.no_sram_ecc_support), + .name = @tagName(Feature.no_sram_ecc_support), + .llvm_name = "no-sram-ecc-support", + .description = "Hardware does not support SRAM ECC", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_xnack_support)] = .{ + .index = @enumToInt(Feature.no_xnack_support), + .name = @tagName(Feature.no_xnack_support), + .llvm_name = "no-xnack-support", + .description = "Hardware does not support XNACK", + .dependencies = 0, + }; + result[@enumToInt(Feature.nsa_encoding)] = .{ + .index = @enumToInt(Feature.nsa_encoding), + .name = @tagName(Feature.nsa_encoding), + .llvm_name = "nsa-encoding", + .description = "Support NSA encoding for image instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{ + .index = @enumToInt(Feature.nsa_to_vmem_bug), + .name = @tagName(Feature.nsa_to_vmem_bug), + .llvm_name = "nsa-to-vmem-bug", + .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", + .dependencies = 0, + }; + result[@enumToInt(Feature.offset_3f_bug)] = .{ + .index = @enumToInt(Feature.offset_3f_bug), + .name = @tagName(Feature.offset_3f_bug), + .llvm_name = "offset-3f-bug", + .description = "Branch offset of 3f hardware bug", + .dependencies = 0, + }; + result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{ + .index = @enumToInt(Feature.pk_fmac_f16_inst), + .name = @tagName(Feature.pk_fmac_f16_inst), + .llvm_name = "pk-fmac-f16-inst", + .description = "Has v_pk_fmac_f16 instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.promote_alloca)] = .{ + .index = @enumToInt(Feature.promote_alloca), + .name = @tagName(Feature.promote_alloca), + .llvm_name = "promote-alloca", + .description = "Enable promote alloca pass", + .dependencies = 0, + }; + result[@enumToInt(Feature.r128_a16)] = .{ + .index = @enumToInt(Feature.r128_a16), + .name = @tagName(Feature.r128_a16), + .llvm_name = "r128-a16", + .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", + .dependencies = 0, + }; + result[@enumToInt(Feature.register_banking)] = .{ + .index = @enumToInt(Feature.register_banking), + .name = @tagName(Feature.register_banking), + .llvm_name = "register-banking", + .description = "Has register banking", + .dependencies = 0, + }; + result[@enumToInt(Feature.s_memrealtime)] = .{ + .index = @enumToInt(Feature.s_memrealtime), + .name = @tagName(Feature.s_memrealtime), + .llvm_name = "s-memrealtime", + .description = "Has s_memrealtime instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.scalar_atomics)] = .{ + .index = @enumToInt(Feature.scalar_atomics), + .name = @tagName(Feature.scalar_atomics), + .llvm_name = "scalar-atomics", + .description = "Has atomic scalar memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{ + .index = @enumToInt(Feature.scalar_flat_scratch_insts), + .name = @tagName(Feature.scalar_flat_scratch_insts), + .llvm_name = "scalar-flat-scratch-insts", + .description = "Have s_scratch_* flat memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.scalar_stores)] = .{ + .index = @enumToInt(Feature.scalar_stores), + .name = @tagName(Feature.scalar_stores), + .llvm_name = "scalar-stores", + .description = "Has store scalar memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa)] = .{ + .index = @enumToInt(Feature.sdwa), + .name = @tagName(Feature.sdwa), + .llvm_name = "sdwa", + .description = "Support SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa_mav)] = .{ + .index = @enumToInt(Feature.sdwa_mav), + .name = @tagName(Feature.sdwa_mav), + .llvm_name = "sdwa-mav", + .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa_omod)] = .{ + .index = @enumToInt(Feature.sdwa_omod), + .name = @tagName(Feature.sdwa_omod), + .llvm_name = "sdwa-omod", + .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{ + .index = @enumToInt(Feature.sdwa_out_mods_vopc), + .name = @tagName(Feature.sdwa_out_mods_vopc), + .llvm_name = "sdwa-out-mods-vopc", + .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa_scalar)] = .{ + .index = @enumToInt(Feature.sdwa_scalar), + .name = @tagName(Feature.sdwa_scalar), + .llvm_name = "sdwa-scalar", + .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sdwa_sdst)] = .{ + .index = @enumToInt(Feature.sdwa_sdst), + .name = @tagName(Feature.sdwa_sdst), + .llvm_name = "sdwa-sdst", + .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.sea_islands)] = .{ + .index = @enumToInt(Feature.sea_islands), + .name = @tagName(Feature.sea_islands), + .llvm_name = "sea-islands", + .description = "SEA_ISLANDS GPU generation", + .dependencies = featureSet(&[_]Feature{ + .ci_insts, + .flat_address_space, + .fp64, + .gfx7_gfx8_gfx9_insts, + .localmemorysize65536, + .mimg_r128, + .movrel, + .no_sram_ecc_support, + .trig_reduced_range, + .wavefrontsize64, + }), + }; + result[@enumToInt(Feature.sgpr_init_bug)] = .{ + .index = @enumToInt(Feature.sgpr_init_bug), + .name = @tagName(Feature.sgpr_init_bug), + .llvm_name = "sgpr-init-bug", + .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", + .dependencies = 0, + }; + result[@enumToInt(Feature.si_scheduler)] = .{ + .index = @enumToInt(Feature.si_scheduler), + .name = @tagName(Feature.si_scheduler), + .llvm_name = "si-scheduler", + .description = "Enable SI Machine Scheduler", + .dependencies = 0, + }; + result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{ + .index = @enumToInt(Feature.smem_to_vector_write_hazard), + .name = @tagName(Feature.smem_to_vector_write_hazard), + .llvm_name = "smem-to-vector-write-hazard", + .description = "s_load_dword followed by v_cmp page faults", + .dependencies = 0, + }; + result[@enumToInt(Feature.southern_islands)] = .{ + .index = @enumToInt(Feature.southern_islands), + .name = @tagName(Feature.southern_islands), + .llvm_name = "southern-islands", + .description = "SOUTHERN_ISLANDS GPU generation", + .dependencies = featureSet(&[_]Feature{ + .fp64, + .ldsbankcount32, + .localmemorysize32768, + .mimg_r128, + .movrel, + .no_sram_ecc_support, + .no_xnack_support, + .trig_reduced_range, + .wavefrontsize64, + }), + }; + result[@enumToInt(Feature.sram_ecc)] = .{ + .index = @enumToInt(Feature.sram_ecc), + .name = @tagName(Feature.sram_ecc), + .llvm_name = "sram-ecc", + .description = "Enable SRAM ECC", + .dependencies = 0, + }; + result[@enumToInt(Feature.trap_handler)] = .{ + .index = @enumToInt(Feature.trap_handler), + .name = @tagName(Feature.trap_handler), + .llvm_name = "trap-handler", + .description = "Trap handler support", + .dependencies = 0, + }; + result[@enumToInt(Feature.trig_reduced_range)] = .{ + .index = @enumToInt(Feature.trig_reduced_range), + .name = @tagName(Feature.trig_reduced_range), + .llvm_name = "trig-reduced-range", + .description = "Requires use of fract on arguments to trig instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.unaligned_buffer_access)] = .{ + .index = @enumToInt(Feature.unaligned_buffer_access), + .name = @tagName(Feature.unaligned_buffer_access), + .llvm_name = "unaligned-buffer-access", + .description = "Support unaligned global loads and stores", + .dependencies = 0, + }; + result[@enumToInt(Feature.unaligned_scratch_access)] = .{ + .index = @enumToInt(Feature.unaligned_scratch_access), + .name = @tagName(Feature.unaligned_scratch_access), + .llvm_name = "unaligned-scratch-access", + .description = "Support unaligned scratch loads and stores", + .dependencies = 0, + }; + result[@enumToInt(Feature.unpacked_d16_vmem)] = .{ + .index = @enumToInt(Feature.unpacked_d16_vmem), + .name = @tagName(Feature.unpacked_d16_vmem), + .llvm_name = "unpacked-d16-vmem", + .description = "Has unpacked d16 vmem instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{ + .index = @enumToInt(Feature.unsafe_ds_offset_folding), + .name = @tagName(Feature.unsafe_ds_offset_folding), + .llvm_name = "unsafe-ds-offset-folding", + .description = "Force using DS instruction immediate offsets on SI", + .dependencies = 0, + }; + result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{ + .index = @enumToInt(Feature.vcmpx_exec_war_hazard), + .name = @tagName(Feature.vcmpx_exec_war_hazard), + .llvm_name = "vcmpx-exec-war-hazard", + .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", + .dependencies = 0, + }; + result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{ + .index = @enumToInt(Feature.vcmpx_permlane_hazard), + .name = @tagName(Feature.vcmpx_permlane_hazard), + .llvm_name = "vcmpx-permlane-hazard", + .description = "TODO: describe me", + .dependencies = 0, + }; + result[@enumToInt(Feature.vgpr_index_mode)] = .{ + .index = @enumToInt(Feature.vgpr_index_mode), + .name = @tagName(Feature.vgpr_index_mode), + .llvm_name = "vgpr-index-mode", + .description = "Has VGPR mode register indexing", + .dependencies = 0, + }; + result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{ + .index = @enumToInt(Feature.vmem_to_scalar_write_hazard), + .name = @tagName(Feature.vmem_to_scalar_write_hazard), + .llvm_name = "vmem-to-scalar-write-hazard", + .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", + .dependencies = 0, + }; + result[@enumToInt(Feature.volcanic_islands)] = .{ + .index = @enumToInt(Feature.volcanic_islands), + .name = @tagName(Feature.volcanic_islands), + .llvm_name = "volcanic-islands", + .description = "VOLCANIC_ISLANDS GPU generation", + .dependencies = featureSet(&[_]Feature{ + .@"16_bit_insts", + .ci_insts, + .dpp, + .flat_address_space, + .fp64, + .gcn3_encoding, + .gfx7_gfx8_gfx9_insts, + .gfx8_insts, + .int_clamp_insts, + .inv_2pi_inline_imm, + .localmemorysize65536, + .mimg_r128, + .movrel, + .no_sram_ecc_support, + .s_memrealtime, + .scalar_stores, + .sdwa, + .sdwa_mav, + .sdwa_out_mods_vopc, + .trig_reduced_range, + .vgpr_index_mode, + .wavefrontsize64, + }), + }; + result[@enumToInt(Feature.vop3_literal)] = .{ + .index = @enumToInt(Feature.vop3_literal), + .name = @tagName(Feature.vop3_literal), + .llvm_name = "vop3-literal", + .description = "Can use one literal in VOP3", + .dependencies = 0, + }; + result[@enumToInt(Feature.vop3p)] = .{ + .index = @enumToInt(Feature.vop3p), + .name = @tagName(Feature.vop3p), + .llvm_name = "vop3p", + .description = "Has VOP3P packed instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.vscnt)] = .{ + .index = @enumToInt(Feature.vscnt), + .name = @tagName(Feature.vscnt), + .llvm_name = "vscnt", + .description = "Has separate store vscnt counter", + .dependencies = 0, + }; + result[@enumToInt(Feature.wavefrontsize16)] = .{ + .index = @enumToInt(Feature.wavefrontsize16), + .name = @tagName(Feature.wavefrontsize16), + .llvm_name = "wavefrontsize16", + .description = "The number of threads per wavefront", + .dependencies = 0, + }; + result[@enumToInt(Feature.wavefrontsize32)] = .{ + .index = @enumToInt(Feature.wavefrontsize32), + .name = @tagName(Feature.wavefrontsize32), + .llvm_name = "wavefrontsize32", + .description = "The number of threads per wavefront", + .dependencies = 0, + }; + result[@enumToInt(Feature.wavefrontsize64)] = .{ + .index = @enumToInt(Feature.wavefrontsize64), + .name = @tagName(Feature.wavefrontsize64), + .llvm_name = "wavefrontsize64", + .description = "The number of threads per wavefront", + .dependencies = 0, + }; + result[@enumToInt(Feature.xnack)] = .{ + .index = @enumToInt(Feature.xnack), + .name = @tagName(Feature.xnack), + .llvm_name = "xnack", + .description = "Enable XNACK support", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const bonaire = Cpu{ + .name = "bonaire", + .llvm_name = "bonaire", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const carrizo = Cpu{ + .name = "carrizo", + .llvm_name = "carrizo", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .unpacked_d16_vmem, + .volcanic_islands, + .xnack, + }), + }; + pub const fiji = Cpu{ + .name = "fiji", + .llvm_name = "fiji", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .wavefrontsize64, + }), + }; + pub const generic_hsa = Cpu{ + .name = "generic_hsa", + .llvm_name = "generic-hsa", + .features = featureSet(&[_]Feature{ + .flat_address_space, + .wavefrontsize64, + }), + }; + pub const gfx1010 = Cpu{ + .name = "gfx1010", + .llvm_name = "gfx1010", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .dl_insts, + .flat_segment_offset_bug, + .gfx10, + .inst_fwd_prefetch_bug, + .lds_branch_vmem_war_hazard, + .lds_misaligned_bug, + .ldsbankcount32, + .no_xnack_support, + .nsa_encoding, + .nsa_to_vmem_bug, + .offset_3f_bug, + .scalar_atomics, + .scalar_flat_scratch_insts, + .scalar_stores, + .smem_to_vector_write_hazard, + .vcmpx_exec_war_hazard, + .vcmpx_permlane_hazard, + .vmem_to_scalar_write_hazard, + .wavefrontsize32, + }), + }; + pub const gfx1011 = Cpu{ + .name = "gfx1011", + .llvm_name = "gfx1011", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .dl_insts, + .dot1_insts, + .dot2_insts, + .dot5_insts, + .dot6_insts, + .flat_segment_offset_bug, + .gfx10, + .inst_fwd_prefetch_bug, + .lds_branch_vmem_war_hazard, + .ldsbankcount32, + .no_xnack_support, + .nsa_encoding, + .nsa_to_vmem_bug, + .offset_3f_bug, + .scalar_atomics, + .scalar_flat_scratch_insts, + .scalar_stores, + .smem_to_vector_write_hazard, + .vcmpx_exec_war_hazard, + .vcmpx_permlane_hazard, + .vmem_to_scalar_write_hazard, + .wavefrontsize32, + }), + }; + pub const gfx1012 = Cpu{ + .name = "gfx1012", + .llvm_name = "gfx1012", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .dl_insts, + .dot1_insts, + .dot2_insts, + .dot5_insts, + .dot6_insts, + .flat_segment_offset_bug, + .gfx10, + .inst_fwd_prefetch_bug, + .lds_branch_vmem_war_hazard, + .lds_misaligned_bug, + .ldsbankcount32, + .no_xnack_support, + .nsa_encoding, + .nsa_to_vmem_bug, + .offset_3f_bug, + .scalar_atomics, + .scalar_flat_scratch_insts, + .scalar_stores, + .smem_to_vector_write_hazard, + .vcmpx_exec_war_hazard, + .vcmpx_permlane_hazard, + .vmem_to_scalar_write_hazard, + .wavefrontsize32, + }), + }; + pub const gfx600 = Cpu{ + .name = "gfx600", + .llvm_name = "gfx600", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const gfx601 = Cpu{ + .name = "gfx601", + .llvm_name = "gfx601", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const gfx700 = Cpu{ + .name = "gfx700", + .llvm_name = "gfx700", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const gfx701 = Cpu{ + .name = "gfx701", + .llvm_name = "gfx701", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const gfx702 = Cpu{ + .name = "gfx702", + .llvm_name = "gfx702", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .ldsbankcount16, + .no_xnack_support, + .sea_islands, + }), + }; + pub const gfx703 = Cpu{ + .name = "gfx703", + .llvm_name = "gfx703", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount16, + .no_xnack_support, + .sea_islands, + }), + }; + pub const gfx704 = Cpu{ + .name = "gfx704", + .llvm_name = "gfx704", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const gfx801 = Cpu{ + .name = "gfx801", + .llvm_name = "gfx801", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .unpacked_d16_vmem, + .volcanic_islands, + .xnack, + }), + }; + pub const gfx802 = Cpu{ + .name = "gfx802", + .llvm_name = "gfx802", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sgpr_init_bug, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const gfx803 = Cpu{ + .name = "gfx803", + .llvm_name = "gfx803", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const gfx810 = Cpu{ + .name = "gfx810", + .llvm_name = "gfx810", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount16, + .volcanic_islands, + .xnack, + }), + }; + pub const gfx900 = Cpu{ + .name = "gfx900", + .llvm_name = "gfx900", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .gfx9, + .ldsbankcount32, + .mad_mix_insts, + .no_sram_ecc_support, + .no_xnack_support, + }), + }; + pub const gfx902 = Cpu{ + .name = "gfx902", + .llvm_name = "gfx902", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .gfx9, + .ldsbankcount32, + .mad_mix_insts, + .no_sram_ecc_support, + .xnack, + }), + }; + pub const gfx904 = Cpu{ + .name = "gfx904", + .llvm_name = "gfx904", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fma_mix_insts, + .gfx9, + .ldsbankcount32, + .no_sram_ecc_support, + .no_xnack_support, + }), + }; + pub const gfx906 = Cpu{ + .name = "gfx906", + .llvm_name = "gfx906", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .dl_insts, + .dot1_insts, + .dot2_insts, + .fma_mix_insts, + .gfx9, + .half_rate_64_ops, + .ldsbankcount32, + .no_xnack_support, + }), + }; + pub const gfx908 = Cpu{ + .name = "gfx908", + .llvm_name = "gfx908", + .features = featureSet(&[_]Feature{ + .atomic_fadd_insts, + .code_object_v3, + .dl_insts, + .dot1_insts, + .dot2_insts, + .dot3_insts, + .dot4_insts, + .dot5_insts, + .dot6_insts, + .fma_mix_insts, + .gfx9, + .half_rate_64_ops, + .ldsbankcount32, + .mai_insts, + .pk_fmac_f16_inst, + .sram_ecc, + }), + }; + pub const gfx909 = Cpu{ + .name = "gfx909", + .llvm_name = "gfx909", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .gfx9, + .ldsbankcount32, + .mad_mix_insts, + .xnack, + }), + }; + pub const hainan = Cpu{ + .name = "hainan", + .llvm_name = "hainan", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const hawaii = Cpu{ + .name = "hawaii", + .llvm_name = "hawaii", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const iceland = Cpu{ + .name = "iceland", + .llvm_name = "iceland", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sgpr_init_bug, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const kabini = Cpu{ + .name = "kabini", + .llvm_name = "kabini", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount16, + .no_xnack_support, + .sea_islands, + }), + }; + pub const kaveri = Cpu{ + .name = "kaveri", + .llvm_name = "kaveri", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sea_islands, + }), + }; + pub const mullins = Cpu{ + .name = "mullins", + .llvm_name = "mullins", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount16, + .no_xnack_support, + .sea_islands, + }), + }; + pub const oland = Cpu{ + .name = "oland", + .llvm_name = "oland", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const pitcairn = Cpu{ + .name = "pitcairn", + .llvm_name = "pitcairn", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const polaris10 = Cpu{ + .name = "polaris10", + .llvm_name = "polaris10", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const polaris11 = Cpu{ + .name = "polaris11", + .llvm_name = "polaris11", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const stoney = Cpu{ + .name = "stoney", + .llvm_name = "stoney", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount16, + .volcanic_islands, + .xnack, + }), + }; + pub const tahiti = Cpu{ + .name = "tahiti", + .llvm_name = "tahiti", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .fast_fmaf, + .half_rate_64_ops, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; + pub const tonga = Cpu{ + .name = "tonga", + .llvm_name = "tonga", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .sgpr_init_bug, + .unpacked_d16_vmem, + .volcanic_islands, + }), + }; + pub const verde = Cpu{ + .name = "verde", + .llvm_name = "verde", + .features = featureSet(&[_]Feature{ + .code_object_v3, + .ldsbankcount32, + .no_xnack_support, + .southern_islands, + }), + }; +}; + +/// All amdgpu CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.bonaire, + &cpu.carrizo, + &cpu.fiji, + &cpu.generic, + &cpu.generic_hsa, + &cpu.gfx1010, + &cpu.gfx1011, + &cpu.gfx1012, + &cpu.gfx600, + &cpu.gfx601, + &cpu.gfx700, + &cpu.gfx701, + &cpu.gfx702, + &cpu.gfx703, + &cpu.gfx704, + &cpu.gfx801, + &cpu.gfx802, + &cpu.gfx803, + &cpu.gfx810, + &cpu.gfx900, + &cpu.gfx902, + &cpu.gfx904, + &cpu.gfx906, + &cpu.gfx908, + &cpu.gfx909, + &cpu.hainan, + &cpu.hawaii, + &cpu.iceland, + &cpu.kabini, + &cpu.kaveri, + &cpu.mullins, + &cpu.oland, + &cpu.pitcairn, + &cpu.polaris10, + &cpu.polaris11, + &cpu.stoney, + &cpu.tahiti, + &cpu.tonga, + &cpu.verde, }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index d83be5cc48dbc0fa5e621ac65f2b086b72732685..de4bd0ed78de86953aff941b7c99425de8026e05 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -1,2296 +1,2675 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_msecext8 = Feature{ - .name = "msecext8", - .llvm_name = "8msecext", - .description = "Enable support for ARMv8-M Security Extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_aclass = Feature{ - .name = "aclass", - .llvm_name = "aclass", - .description = "Is application profile ('A' series)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_aes = Feature{ - .name = "aes", - .llvm_name = "aes", - .description = "Enable AES support", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_acquireRelease = Feature{ - .name = "acquireRelease", - .llvm_name = "acquire-release", - .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avoidMovsShop = Feature{ - .name = "avoidMovsShop", - .llvm_name = "avoid-movs-shop", - .description = "Avoid movs instructions with shifter operand", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_avoidPartialCpsr = Feature{ - .name = "avoidPartialCpsr", - .llvm_name = "avoid-partial-cpsr", - .description = "Avoid CPSR partial update for OOO execution", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_crc = Feature{ - .name = "crc", - .llvm_name = "crc", - .description = "Enable support for CRC instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cheapPredicableCpsr = Feature{ - .name = "cheapPredicableCpsr", - .llvm_name = "cheap-predicable-cpsr", - .description = "Disable +1 predication cost for instructions updating CPSR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vldnAlign = Feature{ - .name = "vldnAlign", - .llvm_name = "vldn-align", - .description = "Check for VLDn unaligned access", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_crypto = Feature{ - .name = "crypto", - .llvm_name = "crypto", - .description = "Enable support for Cryptography extensions", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_fpregs, - }, -}; - -pub const feature_d32 = Feature{ - .name = "d32", - .llvm_name = "d32", - .description = "Extend FP to 32 double registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_db = Feature{ - .name = "db", - .llvm_name = "db", - .description = "Has data barrier (dmb/dsb) instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dfb = Feature{ - .name = "dfb", - .llvm_name = "dfb", - .description = "Has full data barrier (dfb) instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dsp = Feature{ - .name = "dsp", - .llvm_name = "dsp", - .description = "Supports DSP instructions in ARM and/or Thumb2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dontWidenVmovs = Feature{ - .name = "dontWidenVmovs", - .llvm_name = "dont-widen-vmovs", - .description = "Don't widen VMOVS to VMOVD", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dotprod = Feature{ - .name = "dotprod", - .llvm_name = "dotprod", - .description = "Enable support for dot product instructions", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_executeOnly = Feature{ - .name = "executeOnly", - .llvm_name = "execute-only", - .description = "Enable the generation of execute only code.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_expandFpMlx = Feature{ - .name = "expandFpMlx", - .llvm_name = "expand-fp-mlx", - .description = "Expand VFP/NEON MLA/MLS instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp16 = Feature{ - .name = "fp16", - .llvm_name = "fp16", - .description = "Enable half-precision floating point", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp16fml = Feature{ - .name = "fp16fml", - .llvm_name = "fp16fml", - .description = "Enable full half-precision floating point fml instructions", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_fp64 = Feature{ - .name = "fp64", - .llvm_name = "fp64", - .description = "Floating point unit supports double precision", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_fpao = Feature{ - .name = "fpao", - .llvm_name = "fpao", - .description = "Enable fast computation of positive address offsets", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fpArmv8 = Feature{ - .name = "fpArmv8", - .llvm_name = "fp-armv8", - .description = "Enable ARMv8 FP", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_d32, - &feature_fpregs, - }, -}; - -pub const feature_fpArmv8d16 = Feature{ - .name = "fpArmv8d16", - .llvm_name = "fp-armv8d16", - .description = "Enable ARMv8 FP with only 16 d-registers", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_fpArmv8d16sp = Feature{ - .name = "fpArmv8d16sp", - .llvm_name = "fp-armv8d16sp", - .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_fpArmv8sp = Feature{ - .name = "fpArmv8sp", - .llvm_name = "fp-armv8sp", - .description = "Enable ARMv8 FP with no double precision", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_fpregs = Feature{ - .name = "fpregs", - .llvm_name = "fpregs", - .description = "Enable FP registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fpregs16 = Feature{ - .name = "fpregs16", - .llvm_name = "fpregs16", - .description = "Enable 16-bit FP registers", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_fpregs64 = Feature{ - .name = "fpregs64", - .llvm_name = "fpregs64", - .description = "Enable 64-bit FP registers", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_fullfp16 = Feature{ - .name = "fullfp16", - .llvm_name = "fullfp16", - .description = "Enable full half-precision floating point", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_fuseAes = Feature{ - .name = "fuseAes", - .llvm_name = "fuse-aes", - .description = "CPU fuses AES crypto operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fuseLiterals = Feature{ - .name = "fuseLiterals", - .llvm_name = "fuse-literals", - .description = "CPU fuses literal generation operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_hwdivArm = Feature{ - .name = "hwdivArm", - .llvm_name = "hwdiv-arm", - .description = "Enable divide instructions in ARM mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_hwdiv = Feature{ - .name = "hwdiv", - .llvm_name = "hwdiv", - .description = "Enable divide instructions in Thumb", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noBranchPredictor = Feature{ - .name = "noBranchPredictor", - .llvm_name = "no-branch-predictor", - .description = "Has no branch predictor", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_retAddrStack = Feature{ - .name = "retAddrStack", - .llvm_name = "ret-addr-stack", - .description = "Has return address stack", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowfpvmlx = Feature{ - .name = "slowfpvmlx", - .llvm_name = "slowfpvmlx", - .description = "Disable VFP / NEON MAC instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vmlxHazards = Feature{ - .name = "vmlxHazards", - .llvm_name = "vmlx-hazards", - .description = "Has VMLx hazards", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lob = Feature{ - .name = "lob", - .llvm_name = "lob", - .description = "Enable Low Overhead Branch extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_longCalls = Feature{ - .name = "longCalls", - .llvm_name = "long-calls", - .description = "Generate calls via indirect call instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mclass = Feature{ - .name = "mclass", - .llvm_name = "mclass", - .description = "Is microcontroller profile ('M' series)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mp = Feature{ - .name = "mp", - .llvm_name = "mp", - .description = "Supports Multiprocessing extension", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_muxedUnits = Feature{ - .name = "muxedUnits", - .llvm_name = "muxed-units", - .description = "Has muxed AGU and NEON/FPU", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_neon = Feature{ - .name = "neon", - .llvm_name = "neon", - .description = "Enable NEON instructions", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_fpregs, - }, -}; - -pub const feature_neonfp = Feature{ - .name = "neonfp", - .llvm_name = "neonfp", - .description = "Use NEON for single precision FP", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_neonFpmovs = Feature{ - .name = "neonFpmovs", - .llvm_name = "neon-fpmovs", - .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_naclTrap = Feature{ - .name = "naclTrap", - .llvm_name = "nacl-trap", - .description = "NaCl trap", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noarm = Feature{ - .name = "noarm", - .llvm_name = "noarm", - .description = "Does not support ARM mode execution", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noMovt = Feature{ - .name = "noMovt", - .llvm_name = "no-movt", - .description = "Don't use movt/movw pairs for 32-bit imms", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noNegImmediates = Feature{ - .name = "noNegImmediates", - .llvm_name = "no-neg-immediates", - .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_disablePostraScheduler = Feature{ - .name = "disablePostraScheduler", - .llvm_name = "disable-postra-scheduler", - .description = "Don't schedule again after register allocation", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nonpipelinedVfp = Feature{ - .name = "nonpipelinedVfp", - .llvm_name = "nonpipelined-vfp", - .description = "VFP instructions are not pipelined", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_perfmon = Feature{ - .name = "perfmon", - .llvm_name = "perfmon", - .description = "Enable support for Performance Monitor extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bit32 = Feature{ - .name = "bit32", - .llvm_name = "32bit", - .description = "Prefer 32-bit Thumb instrs", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_preferIshst = Feature{ - .name = "preferIshst", - .llvm_name = "prefer-ishst", - .description = "Prefer ISHST barriers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loopAlign = Feature{ - .name = "loopAlign", - .llvm_name = "loop-align", - .description = "Prefer 32-bit alignment for loops", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_preferVmovsr = Feature{ - .name = "preferVmovsr", - .llvm_name = "prefer-vmovsr", - .description = "Prefer VMOVSR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_profUnpr = Feature{ - .name = "profUnpr", - .llvm_name = "prof-unpr", - .description = "Is profitable to unpredicate", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ras = Feature{ - .name = "ras", - .llvm_name = "ras", - .description = "Enable Reliability, Availability and Serviceability extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rclass = Feature{ - .name = "rclass", - .llvm_name = "rclass", - .description = "Is realtime profile ('R' series)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_readTpHard = Feature{ - .name = "readTpHard", - .llvm_name = "read-tp-hard", - .description = "Reading thread pointer from register", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reserveR9 = Feature{ - .name = "reserveR9", - .llvm_name = "reserve-r9", - .description = "Reserve R9, making it unavailable as GPR", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sb = Feature{ - .name = "sb", - .llvm_name = "sb", - .description = "Enable v8.5a Speculation Barrier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sha2 = Feature{ - .name = "sha2", - .llvm_name = "sha2", - .description = "Enable SHA1 and SHA256 support", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_slowFpBrcc = Feature{ - .name = "slowFpBrcc", - .llvm_name = "slow-fp-brcc", - .description = "FP compare + branch is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowLoadDSubreg = Feature{ - .name = "slowLoadDSubreg", - .llvm_name = "slow-load-D-subreg", - .description = "Loading into D subregs is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowOddReg = Feature{ - .name = "slowOddReg", - .llvm_name = "slow-odd-reg", - .description = "VLDM/VSTM starting with an odd register is slow", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowVdup32 = Feature{ - .name = "slowVdup32", - .llvm_name = "slow-vdup32", - .description = "Has slow VDUP32 - prefer VMOV", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowVgetlni32 = Feature{ - .name = "slowVgetlni32", - .llvm_name = "slow-vgetlni32", - .description = "Has slow VGETLNi32 - prefer VMOV", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_splatVfpNeon = Feature{ - .name = "splatVfpNeon", - .llvm_name = "splat-vfp-neon", - .description = "Splat register from VFP to NEON", - .dependencies = &[_]*const Feature { - &feature_dontWidenVmovs, - }, -}; - -pub const feature_strictAlign = Feature{ - .name = "strictAlign", - .llvm_name = "strict-align", - .description = "Disallow all unaligned memory access", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_thumb2 = Feature{ - .name = "thumb2", - .llvm_name = "thumb2", - .description = "Enable Thumb2 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_trustzone = Feature{ - .name = "trustzone", - .llvm_name = "trustzone", - .description = "Enable support for TrustZone security extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useAa = Feature{ - .name = "useAa", - .llvm_name = "use-aa", - .description = "Use alias analysis during codegen", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useMisched = Feature{ - .name = "useMisched", - .llvm_name = "use-misched", - .description = "Use the MachineScheduler", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_wideStrideVfp = Feature{ - .name = "wideStrideVfp", - .llvm_name = "wide-stride-vfp", - .description = "Use a wide stride when allocating VFP registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_v7clrex = Feature{ - .name = "v7clrex", - .llvm_name = "v7clrex", - .description = "Has v7 clrex instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vfp2 = Feature{ - .name = "vfp2", - .llvm_name = "vfp2", - .description = "Enable VFP2 instructions", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_fpregs, - }, -}; - -pub const feature_vfp2d16 = Feature{ - .name = "vfp2d16", - .llvm_name = "vfp2d16", - .description = "Enable VFP2 instructions with only 16 d-registers", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_vfp2d16sp = Feature{ - .name = "vfp2d16sp", - .llvm_name = "vfp2d16sp", - .description = "Enable VFP2 instructions with only 16 d-registers and no double precision", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_vfp2sp = Feature{ - .name = "vfp2sp", - .llvm_name = "vfp2sp", - .description = "Enable VFP2 instructions with no double precision", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_vfp3 = Feature{ - .name = "vfp3", - .llvm_name = "vfp3", - .description = "Enable VFP3 instructions", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_vfp3d16 = Feature{ - .name = "vfp3d16", - .llvm_name = "vfp3d16", - .description = "Enable VFP3 instructions with only 16 d-registers", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_vfp3d16sp = Feature{ - .name = "vfp3d16sp", - .llvm_name = "vfp3d16sp", - .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", - .dependencies = &[_]*const Feature { - &feature_fpregs, - }, -}; - -pub const feature_vfp3sp = Feature{ - .name = "vfp3sp", - .llvm_name = "vfp3sp", - .description = "Enable VFP3 instructions with no double precision", - .dependencies = &[_]*const Feature { - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_vfp4 = Feature{ - .name = "vfp4", - .llvm_name = "vfp4", - .description = "Enable VFP4 instructions", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_d32, - &feature_fpregs, - }, -}; - -pub const feature_vfp4d16 = Feature{ - .name = "vfp4d16", - .llvm_name = "vfp4d16", - .description = "Enable VFP4 instructions with only 16 d-registers", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_vfp4d16sp = Feature{ - .name = "vfp4d16sp", - .llvm_name = "vfp4d16sp", - .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - }, -}; - -pub const feature_vfp4sp = Feature{ - .name = "vfp4sp", - .llvm_name = "vfp4sp", - .description = "Enable VFP4 instructions with no double precision", - .dependencies = &[_]*const Feature { - &feature_fp16, - &feature_fpregs, - &feature_d32, - }, -}; - -pub const feature_vmlxForwarding = Feature{ - .name = "vmlxForwarding", - .llvm_name = "vmlx-forwarding", - .description = "Has multiplier accumulator forwarding", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_virtualization = Feature{ - .name = "virtualization", - .llvm_name = "virtualization", - .description = "Supports Virtualization extension", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_hwdivArm, - }, -}; - -pub const feature_zcz = Feature{ - .name = "zcz", - .llvm_name = "zcz", - .description = "Has zero-cycle zeroing instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_msecext8, - &feature_aclass, - &feature_aes, - &feature_acquireRelease, - &feature_avoidMovsShop, - &feature_avoidPartialCpsr, - &feature_crc, - &feature_cheapPredicableCpsr, - &feature_vldnAlign, - &feature_crypto, - &feature_d32, - &feature_db, - &feature_dfb, - &feature_dsp, - &feature_dontWidenVmovs, - &feature_dotprod, - &feature_executeOnly, - &feature_expandFpMlx, - &feature_fp16, - &feature_fp16fml, - &feature_fp64, - &feature_fpao, - &feature_fpArmv8, - &feature_fpArmv8d16, - &feature_fpArmv8d16sp, - &feature_fpArmv8sp, - &feature_fpregs, - &feature_fpregs16, - &feature_fpregs64, - &feature_fullfp16, - &feature_fuseAes, - &feature_fuseLiterals, - &feature_hwdivArm, - &feature_hwdiv, - &feature_noBranchPredictor, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_vmlxHazards, - &feature_lob, - &feature_longCalls, - &feature_mclass, - &feature_mp, - &feature_muxedUnits, - &feature_neon, - &feature_neonfp, - &feature_neonFpmovs, - &feature_naclTrap, - &feature_noarm, - &feature_noMovt, - &feature_noNegImmediates, - &feature_disablePostraScheduler, - &feature_nonpipelinedVfp, - &feature_perfmon, - &feature_bit32, - &feature_preferIshst, - &feature_loopAlign, - &feature_preferVmovsr, - &feature_profUnpr, - &feature_ras, - &feature_rclass, - &feature_readTpHard, - &feature_reserveR9, - &feature_sb, - &feature_sha2, - &feature_slowFpBrcc, - &feature_slowLoadDSubreg, - &feature_slowOddReg, - &feature_slowVdup32, - &feature_slowVgetlni32, - &feature_splatVfpNeon, - &feature_strictAlign, - &feature_thumb2, - &feature_trustzone, - &feature_useAa, - &feature_useMisched, - &feature_wideStrideVfp, - &feature_v7clrex, - &feature_vfp2, - &feature_vfp2d16, - &feature_vfp2d16sp, - &feature_vfp2sp, - &feature_vfp3, - &feature_vfp3d16, - &feature_vfp3d16sp, - &feature_vfp3sp, - &feature_vfp4, - &feature_vfp4d16, - &feature_vfp4d16sp, - &feature_vfp4sp, - &feature_vmlxForwarding, - &feature_virtualization, - &feature_zcz, -}; - -pub const cpu_arm1020e = Cpu{ - .name = "arm1020e", - .llvm_name = "arm1020e", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm1020t = Cpu{ - .name = "arm1020t", - .llvm_name = "arm1020t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm1022e = Cpu{ - .name = "arm1022e", - .llvm_name = "arm1022e", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm10e = Cpu{ - .name = "arm10e", - .llvm_name = "arm10e", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm10tdmi = Cpu{ - .name = "arm10tdmi", - .llvm_name = "arm10tdmi", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm1136jS = Cpu{ - .name = "arm1136jS", - .llvm_name = "arm1136j-s", - .dependencies = &[_]*const Feature { - &feature_dsp, - }, -}; - -pub const cpu_arm1136jfS = Cpu{ - .name = "arm1136jfS", - .llvm_name = "arm1136jf-s", - .dependencies = &[_]*const Feature { - &feature_dsp, - &feature_slowfpvmlx, - &feature_d32, - &feature_fpregs, - &feature_vfp2, - }, -}; - -pub const cpu_arm1156t2S = Cpu{ - .name = "arm1156t2S", - .llvm_name = "arm1156t2-s", - .dependencies = &[_]*const Feature { - &feature_dsp, - &feature_thumb2, - }, -}; - -pub const cpu_arm1156t2fS = Cpu{ - .name = "arm1156t2fS", - .llvm_name = "arm1156t2f-s", - .dependencies = &[_]*const Feature { - &feature_dsp, - &feature_thumb2, - &feature_slowfpvmlx, - &feature_d32, - &feature_fpregs, - &feature_vfp2, - }, -}; - -pub const cpu_arm1176jS = Cpu{ - .name = "arm1176jS", - .llvm_name = "arm1176j-s", - .dependencies = &[_]*const Feature { - &feature_trustzone, - }, -}; - -pub const cpu_arm1176jzS = Cpu{ - .name = "arm1176jzS", - .llvm_name = "arm1176jz-s", - .dependencies = &[_]*const Feature { - &feature_trustzone, - }, -}; - -pub const cpu_arm1176jzfS = Cpu{ - .name = "arm1176jzfS", - .llvm_name = "arm1176jzf-s", - .dependencies = &[_]*const Feature { - &feature_trustzone, - &feature_slowfpvmlx, - &feature_d32, - &feature_fpregs, - &feature_vfp2, - }, -}; - -pub const cpu_arm710t = Cpu{ - .name = "arm710t", - .llvm_name = "arm710t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm720t = Cpu{ - .name = "arm720t", - .llvm_name = "arm720t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm7tdmi = Cpu{ - .name = "arm7tdmi", - .llvm_name = "arm7tdmi", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm7tdmiS = Cpu{ - .name = "arm7tdmiS", - .llvm_name = "arm7tdmi-s", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm8 = Cpu{ - .name = "arm8", - .llvm_name = "arm8", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm810 = Cpu{ - .name = "arm810", - .llvm_name = "arm810", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm9 = Cpu{ - .name = "arm9", - .llvm_name = "arm9", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm920 = Cpu{ - .name = "arm920", - .llvm_name = "arm920", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm920t = Cpu{ - .name = "arm920t", - .llvm_name = "arm920t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm922t = Cpu{ - .name = "arm922t", - .llvm_name = "arm922t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm926ejS = Cpu{ - .name = "arm926ejS", - .llvm_name = "arm926ej-s", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm940t = Cpu{ - .name = "arm940t", - .llvm_name = "arm940t", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm946eS = Cpu{ - .name = "arm946eS", - .llvm_name = "arm946e-s", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm966eS = Cpu{ - .name = "arm966eS", - .llvm_name = "arm966e-s", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm968eS = Cpu{ - .name = "arm968eS", - .llvm_name = "arm968e-s", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm9e = Cpu{ - .name = "arm9e", - .llvm_name = "arm9e", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arm9tdmi = Cpu{ - .name = "arm9tdmi", - .llvm_name = "arm9tdmi", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_cortexA12 = Cpu{ - .name = "cortexA12", - .llvm_name = "cortex-a12", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_retAddrStack, - &feature_mp, - &feature_trustzone, - &feature_fp16, - &feature_vfp4, - &feature_vmlxForwarding, - &feature_hwdiv, - &feature_hwdivArm, - &feature_virtualization, - }, -}; - -pub const cpu_cortexA15 = Cpu{ - .name = "cortexA15", - .llvm_name = "cortex-a15", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_vldnAlign, - &feature_dontWidenVmovs, - &feature_retAddrStack, - &feature_mp, - &feature_muxedUnits, - &feature_splatVfpNeon, - &feature_trustzone, - &feature_fp16, - &feature_vfp4, - &feature_hwdiv, - &feature_hwdivArm, - &feature_virtualization, - }, -}; - -pub const cpu_cortexA17 = Cpu{ - .name = "cortexA17", - .llvm_name = "cortex-a17", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_retAddrStack, - &feature_mp, - &feature_trustzone, - &feature_fp16, - &feature_vfp4, - &feature_vmlxForwarding, - &feature_hwdiv, - &feature_hwdivArm, - &feature_virtualization, - }, -}; - -pub const cpu_cortexA32 = Cpu{ - .name = "cortexA32", - .llvm_name = "cortex-a32", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - }, -}; - -pub const cpu_cortexA35 = Cpu{ - .name = "cortexA35", - .llvm_name = "cortex-a35", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - }, -}; - -pub const cpu_cortexA5 = Cpu{ - .name = "cortexA5", - .llvm_name = "cortex-a5", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_mp, - &feature_slowFpBrcc, - &feature_trustzone, - &feature_fp16, - &feature_vfp4, - &feature_vmlxForwarding, - }, -}; - -pub const cpu_cortexA53 = Cpu{ - .name = "cortexA53", - .llvm_name = "cortex-a53", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - &feature_fpao, - }, -}; - -pub const cpu_cortexA55 = Cpu{ - .name = "cortexA55", - .llvm_name = "cortex-a55", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_dotprod, - }, -}; - -pub const cpu_cortexA57 = Cpu{ - .name = "cortexA57", - .llvm_name = "cortex-a57", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_avoidPartialCpsr, - &feature_cheapPredicableCpsr, - &feature_crypto, - &feature_fpao, - }, -}; - -pub const cpu_cortexA7 = Cpu{ - .name = "cortexA7", - .llvm_name = "cortex-a7", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_vmlxHazards, - &feature_mp, - &feature_slowFpBrcc, - &feature_trustzone, - &feature_fp16, - &feature_vfp4, - &feature_vmlxForwarding, - &feature_hwdiv, - &feature_hwdivArm, - &feature_virtualization, - }, -}; - -pub const cpu_cortexA72 = Cpu{ - .name = "cortexA72", - .llvm_name = "cortex-a72", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - }, -}; - -pub const cpu_cortexA73 = Cpu{ - .name = "cortexA73", - .llvm_name = "cortex-a73", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - }, -}; - -pub const cpu_cortexA75 = Cpu{ - .name = "cortexA75", - .llvm_name = "cortex-a75", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_dotprod, - }, -}; - -pub const cpu_cortexA76 = Cpu{ - .name = "cortexA76", - .llvm_name = "cortex-a76", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_crypto, - &feature_dotprod, - &feature_fullfp16, - }, -}; - -pub const cpu_cortexA76ae = Cpu{ - .name = "cortexA76ae", - .llvm_name = "cortex-a76ae", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_crypto, - &feature_dotprod, - &feature_fullfp16, - }, -}; - -pub const cpu_cortexA8 = Cpu{ - .name = "cortexA8", - .llvm_name = "cortex-a8", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_vmlxHazards, - &feature_nonpipelinedVfp, - &feature_slowFpBrcc, - &feature_trustzone, - &feature_vmlxForwarding, - }, -}; - -pub const cpu_cortexA9 = Cpu{ - .name = "cortexA9", - .llvm_name = "cortex-a9", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_vldnAlign, - &feature_expandFpMlx, - &feature_fp16, - &feature_retAddrStack, - &feature_vmlxHazards, - &feature_mp, - &feature_muxedUnits, - &feature_neonFpmovs, - &feature_preferVmovsr, - &feature_trustzone, - &feature_vmlxForwarding, - }, -}; - -pub const cpu_cortexM0 = Cpu{ - .name = "cortexM0", - .llvm_name = "cortex-m0", - .dependencies = &[_]*const Feature { - &feature_mclass, - &feature_db, - &feature_noarm, - &feature_strictAlign, - }, -}; - -pub const cpu_cortexM0plus = Cpu{ - .name = "cortexM0plus", - .llvm_name = "cortex-m0plus", - .dependencies = &[_]*const Feature { - &feature_mclass, - &feature_db, - &feature_noarm, - &feature_strictAlign, - }, -}; - -pub const cpu_cortexM1 = Cpu{ - .name = "cortexM1", - .llvm_name = "cortex-m1", - .dependencies = &[_]*const Feature { - &feature_mclass, - &feature_db, - &feature_noarm, - &feature_strictAlign, - }, -}; - -pub const cpu_cortexM23 = Cpu{ - .name = "cortexM23", - .llvm_name = "cortex-m23", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mclass, - &feature_db, - &feature_acquireRelease, - &feature_v7clrex, - &feature_noarm, - &feature_msecext8, - &feature_strictAlign, - &feature_noMovt, - }, -}; - -pub const cpu_cortexM3 = Cpu{ - .name = "cortexM3", - .llvm_name = "cortex-m3", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_noBranchPredictor, - &feature_loopAlign, - &feature_useAa, - &feature_useMisched, - }, -}; - -pub const cpu_cortexM33 = Cpu{ - .name = "cortexM33", - .llvm_name = "cortex-m33", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_msecext8, - &feature_dsp, - &feature_fp16, - &feature_fpregs, - &feature_fpArmv8d16sp, - &feature_noBranchPredictor, - &feature_slowfpvmlx, - &feature_loopAlign, - &feature_useAa, - &feature_useMisched, - }, -}; - -pub const cpu_cortexM35p = Cpu{ - .name = "cortexM35p", - .llvm_name = "cortex-m35p", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_msecext8, - &feature_dsp, - &feature_fp16, - &feature_fpregs, - &feature_fpArmv8d16sp, - &feature_noBranchPredictor, - &feature_slowfpvmlx, - &feature_loopAlign, - &feature_useAa, - &feature_useMisched, - }, -}; - -pub const cpu_cortexM4 = Cpu{ - .name = "cortexM4", - .llvm_name = "cortex-m4", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_noBranchPredictor, - &feature_slowfpvmlx, - &feature_loopAlign, - &feature_useAa, - &feature_useMisched, - &feature_fp16, - &feature_fpregs, - &feature_vfp4d16sp, - }, -}; - -pub const cpu_cortexM7 = Cpu{ - .name = "cortexM7", - .llvm_name = "cortex-m7", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_fp16, - &feature_fpregs, - &feature_fpArmv8d16, - }, -}; - -pub const cpu_cortexR4 = Cpu{ - .name = "cortexR4", - .llvm_name = "cortex-r4", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_retAddrStack, - }, -}; - -pub const cpu_cortexR4f = Cpu{ - .name = "cortexR4f", - .llvm_name = "cortex-r4f", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_fpregs, - &feature_vfp3d16, - }, -}; - -pub const cpu_cortexR5 = Cpu{ - .name = "cortexR5", - .llvm_name = "cortex-r5", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_hwdivArm, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_slowFpBrcc, - &feature_fpregs, - &feature_vfp3d16, - }, -}; - -pub const cpu_cortexR52 = Cpu{ - .name = "cortexR52", - .llvm_name = "cortex-r52", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dfb, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_fpregs, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_fpao, - &feature_useAa, - &feature_useMisched, - }, -}; - -pub const cpu_cortexR7 = Cpu{ - .name = "cortexR7", - .llvm_name = "cortex-r7", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_fp16, - &feature_hwdivArm, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_mp, - &feature_slowFpBrcc, - &feature_fpregs, - &feature_vfp3d16, - }, -}; - -pub const cpu_cortexR8 = Cpu{ - .name = "cortexR8", - .llvm_name = "cortex-r8", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_dsp, - &feature_rclass, - &feature_thumb2, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_fp16, - &feature_hwdivArm, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_mp, - &feature_slowFpBrcc, - &feature_fpregs, - &feature_vfp3d16, - }, -}; - -pub const cpu_cyclone = Cpu{ - .name = "cyclone", - .llvm_name = "cyclone", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_avoidMovsShop, - &feature_avoidPartialCpsr, - &feature_crypto, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_neonfp, - &feature_disablePostraScheduler, - &feature_useMisched, - &feature_vfp4, - &feature_zcz, - }, -}; - -pub const cpu_ep9312 = Cpu{ - .name = "ep9312", - .llvm_name = "ep9312", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_exynosM1 = Cpu{ - .name = "exynosM1", - .llvm_name = "exynos-m1", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_fuseLiterals, - &feature_useAa, - &feature_wideStrideVfp, - &feature_slowVgetlni32, - &feature_slowVdup32, - &feature_profUnpr, - &feature_slowFpBrcc, - &feature_retAddrStack, - &feature_zcz, - &feature_slowfpvmlx, - &feature_expandFpMlx, - &feature_fuseAes, - &feature_dontWidenVmovs, - }, -}; - -pub const cpu_exynosM2 = Cpu{ - .name = "exynosM2", - .llvm_name = "exynos-m2", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_fuseLiterals, - &feature_useAa, - &feature_wideStrideVfp, - &feature_slowVgetlni32, - &feature_slowVdup32, - &feature_profUnpr, - &feature_slowFpBrcc, - &feature_retAddrStack, - &feature_zcz, - &feature_slowfpvmlx, - &feature_expandFpMlx, - &feature_fuseAes, - &feature_dontWidenVmovs, - }, -}; - -pub const cpu_exynosM3 = Cpu{ - .name = "exynosM3", - .llvm_name = "exynos-m3", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_fuseLiterals, - &feature_useAa, - &feature_wideStrideVfp, - &feature_slowVgetlni32, - &feature_slowVdup32, - &feature_profUnpr, - &feature_slowFpBrcc, - &feature_retAddrStack, - &feature_zcz, - &feature_slowfpvmlx, - &feature_expandFpMlx, - &feature_fuseAes, - &feature_dontWidenVmovs, - }, -}; - -pub const cpu_exynosM4 = Cpu{ - .name = "exynosM4", - .llvm_name = "exynos-m4", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_dotprod, - &feature_fullfp16, - &feature_fuseLiterals, - &feature_useAa, - &feature_wideStrideVfp, - &feature_slowVgetlni32, - &feature_slowVdup32, - &feature_profUnpr, - &feature_slowFpBrcc, - &feature_retAddrStack, - &feature_zcz, - &feature_slowfpvmlx, - &feature_expandFpMlx, - &feature_fuseAes, - &feature_dontWidenVmovs, - }, -}; - -pub const cpu_exynosM5 = Cpu{ - .name = "exynosM5", - .llvm_name = "exynos-m5", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_ras, - &feature_dotprod, - &feature_fullfp16, - &feature_fuseLiterals, - &feature_useAa, - &feature_wideStrideVfp, - &feature_slowVgetlni32, - &feature_slowVdup32, - &feature_profUnpr, - &feature_slowFpBrcc, - &feature_retAddrStack, - &feature_zcz, - &feature_slowfpvmlx, - &feature_expandFpMlx, - &feature_fuseAes, - &feature_dontWidenVmovs, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_iwmmxt = Cpu{ - .name = "iwmmxt", - .llvm_name = "iwmmxt", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_krait = Cpu{ - .name = "krait", - .llvm_name = "krait", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidPartialCpsr, - &feature_vldnAlign, - &feature_fp16, - &feature_hwdivArm, - &feature_hwdiv, - &feature_retAddrStack, - &feature_muxedUnits, - &feature_vfp4, - &feature_vmlxForwarding, - }, -}; - -pub const cpu_kryo = Cpu{ - .name = "kryo", - .llvm_name = "kryo", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_mp, - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_trustzone, - &feature_crc, - &feature_fp16, - &feature_acquireRelease, - &feature_v7clrex, - &feature_perfmon, - &feature_hwdivArm, - &feature_crypto, - }, -}; - -pub const cpu_mpcore = Cpu{ - .name = "mpcore", - .llvm_name = "mpcore", - .dependencies = &[_]*const Feature { - &feature_slowfpvmlx, - &feature_d32, - &feature_fpregs, - &feature_vfp2, - }, -}; - -pub const cpu_mpcorenovfp = Cpu{ - .name = "mpcorenovfp", - .llvm_name = "mpcorenovfp", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_sc000 = Cpu{ - .name = "sc000", - .llvm_name = "sc000", - .dependencies = &[_]*const Feature { - &feature_mclass, - &feature_db, - &feature_noarm, - &feature_strictAlign, - }, -}; - -pub const cpu_sc300 = Cpu{ - .name = "sc300", - .llvm_name = "sc300", - .dependencies = &[_]*const Feature { - &feature_hwdiv, - &feature_thumb2, - &feature_mclass, - &feature_db, - &feature_v7clrex, - &feature_perfmon, - &feature_noarm, - &feature_noBranchPredictor, - &feature_useAa, - &feature_useMisched, - }, -}; - -pub const cpu_strongarm = Cpu{ - .name = "strongarm", - .llvm_name = "strongarm", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_strongarm110 = Cpu{ - .name = "strongarm110", - .llvm_name = "strongarm110", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_strongarm1100 = Cpu{ - .name = "strongarm1100", - .llvm_name = "strongarm1100", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_strongarm1110 = Cpu{ - .name = "strongarm1110", - .llvm_name = "strongarm1110", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_swift = Cpu{ - .name = "swift", - .llvm_name = "swift", - .dependencies = &[_]*const Feature { - &feature_d32, - &feature_dsp, - &feature_thumb2, - &feature_db, - &feature_aclass, - &feature_fpregs, - &feature_v7clrex, - &feature_perfmon, - &feature_avoidMovsShop, - &feature_avoidPartialCpsr, - &feature_hwdivArm, - &feature_hwdiv, - &feature_retAddrStack, - &feature_slowfpvmlx, - &feature_vmlxHazards, - &feature_mp, - &feature_neonfp, - &feature_disablePostraScheduler, - &feature_preferIshst, - &feature_profUnpr, - &feature_slowLoadDSubreg, - &feature_slowOddReg, - &feature_slowVdup32, - &feature_slowVgetlni32, - &feature_useMisched, - &feature_wideStrideVfp, - &feature_fp16, - &feature_vfp4, - }, -}; - -pub const cpu_xscale = Cpu{ - .name = "xscale", - .llvm_name = "xscale", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_arm1020e, - &cpu_arm1020t, - &cpu_arm1022e, - &cpu_arm10e, - &cpu_arm10tdmi, - &cpu_arm1136jS, - &cpu_arm1136jfS, - &cpu_arm1156t2S, - &cpu_arm1156t2fS, - &cpu_arm1176jS, - &cpu_arm1176jzS, - &cpu_arm1176jzfS, - &cpu_arm710t, - &cpu_arm720t, - &cpu_arm7tdmi, - &cpu_arm7tdmiS, - &cpu_arm8, - &cpu_arm810, - &cpu_arm9, - &cpu_arm920, - &cpu_arm920t, - &cpu_arm922t, - &cpu_arm926ejS, - &cpu_arm940t, - &cpu_arm946eS, - &cpu_arm966eS, - &cpu_arm968eS, - &cpu_arm9e, - &cpu_arm9tdmi, - &cpu_cortexA12, - &cpu_cortexA15, - &cpu_cortexA17, - &cpu_cortexA32, - &cpu_cortexA35, - &cpu_cortexA5, - &cpu_cortexA53, - &cpu_cortexA55, - &cpu_cortexA57, - &cpu_cortexA7, - &cpu_cortexA72, - &cpu_cortexA73, - &cpu_cortexA75, - &cpu_cortexA76, - &cpu_cortexA76ae, - &cpu_cortexA8, - &cpu_cortexA9, - &cpu_cortexM0, - &cpu_cortexM0plus, - &cpu_cortexM1, - &cpu_cortexM23, - &cpu_cortexM3, - &cpu_cortexM33, - &cpu_cortexM35p, - &cpu_cortexM4, - &cpu_cortexM7, - &cpu_cortexR4, - &cpu_cortexR4f, - &cpu_cortexR5, - &cpu_cortexR52, - &cpu_cortexR7, - &cpu_cortexR8, - &cpu_cyclone, - &cpu_ep9312, - &cpu_exynosM1, - &cpu_exynosM2, - &cpu_exynosM3, - &cpu_exynosM4, - &cpu_exynosM5, - &cpu_generic, - &cpu_iwmmxt, - &cpu_krait, - &cpu_kryo, - &cpu_mpcore, - &cpu_mpcorenovfp, - &cpu_sc000, - &cpu_sc300, - &cpu_strongarm, - &cpu_strongarm110, - &cpu_strongarm1100, - &cpu_strongarm1110, - &cpu_swift, - &cpu_xscale, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + @"32bit", + @"8msecext", + a12, + a15, + a17, + a32, + a35, + a5, + a53, + a55, + a57, + a7, + a72, + a73, + a75, + a76, + a8, + a9, + aclass, + acquire_release, + aes, + armv2, + armv2a, + armv3, + armv3m, + armv4, + armv4t, + armv5t, + armv5te, + armv5tej, + armv6, + armv6_m, + armv6j, + armv6k, + armv6kz, + armv6s_m, + armv6t2, + armv7_a, + armv7_m, + armv7_r, + armv7e_m, + armv7k, + armv7s, + armv7ve, + armv8_a, + armv8_m_base, + armv8_m_main, + armv8_r, + armv8_1_a, + armv8_1_m_main, + armv8_2_a, + armv8_3_a, + armv8_4_a, + armv8_5_a, + avoid_movs_shop, + avoid_partial_cpsr, + cheap_predicable_cpsr, + crc, + crypto, + d32, + db, + dfb, + disable_postra_scheduler, + dont_widen_vmovs, + dotprod, + dsp, + execute_only, + expand_fp_mlx, + exynos, + fp_armv8, + fp_armv8d16, + fp_armv8d16sp, + fp_armv8sp, + fp16, + fp16fml, + fp64, + fpao, + fpregs, + fpregs16, + fpregs64, + fullfp16, + fuse_aes, + fuse_literals, + hwdiv, + hwdiv_arm, + iwmmxt, + iwmmxt2, + krait, + kryo, + lob, + long_calls, + loop_align, + m3, + mclass, + mp, + muxed_units, + mve, + mve_fp, + nacl_trap, + neon, + neon_fpmovs, + neonfp, + no_branch_predictor, + no_movt, + no_neg_immediates, + noarm, + nonpipelined_vfp, + perfmon, + prefer_ishst, + prefer_vmovsr, + prof_unpr, + r4, + r5, + r52, + r7, + ras, + rclass, + read_tp_hard, + reserve_r9, + ret_addr_stack, + sb, + sha2, + slow_fp_brcc, + slow_load_D_subreg, + slow_odd_reg, + slow_vdup32, + slow_vgetlni32, + slowfpvmlx, + soft_float, + splat_vfp_neon, + strict_align, + swift, + thumb_mode, + thumb2, + trustzone, + use_aa, + use_misched, + v4t, + v5t, + v5te, + v6, + v6k, + v6m, + v6t2, + v7, + v7clrex, + v8, + v8_1a, + v8_1m_main, + v8_2a, + v8_3a, + v8_4a, + v8_5a, + v8m, + v8m_main, + vfp2, + vfp2d16, + vfp2d16sp, + vfp2sp, + vfp3, + vfp3d16, + vfp3d16sp, + vfp3sp, + vfp4, + vfp4d16, + vfp4d16sp, + vfp4sp, + virtualization, + vldn_align, + vmlx_forwarding, + vmlx_hazards, + wide_stride_vfp, + xscale, + zcz, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.@"32bit")] = .{ + .index = @enumToInt(Feature.@"32bit"), + .name = @tagName(Feature.@"32bit"), + .llvm_name = "32bit", + .description = "Prefer 32-bit Thumb instrs", + .dependencies = 0, + }; + result[@enumToInt(Feature.@"8msecext")] = .{ + .index = @enumToInt(Feature.@"8msecext"), + .name = @tagName(Feature.@"8msecext"), + .llvm_name = "8msecext", + .description = "Enable support for ARMv8-M Security Extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.a12)] = .{ + .index = @enumToInt(Feature.a12), + .name = @tagName(Feature.a12), + .llvm_name = "a12", + .description = "Cortex-A12 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a15)] = .{ + .index = @enumToInt(Feature.a15), + .name = @tagName(Feature.a15), + .llvm_name = "a15", + .description = "Cortex-A15 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a17)] = .{ + .index = @enumToInt(Feature.a17), + .name = @tagName(Feature.a17), + .llvm_name = "a17", + .description = "Cortex-A17 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a32)] = .{ + .index = @enumToInt(Feature.a32), + .name = @tagName(Feature.a32), + .llvm_name = "a32", + .description = "Cortex-A32 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a35)] = .{ + .index = @enumToInt(Feature.a35), + .name = @tagName(Feature.a35), + .llvm_name = "a35", + .description = "Cortex-A35 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a5)] = .{ + .index = @enumToInt(Feature.a5), + .name = @tagName(Feature.a5), + .llvm_name = "a5", + .description = "Cortex-A5 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a53)] = .{ + .index = @enumToInt(Feature.a53), + .name = @tagName(Feature.a53), + .llvm_name = "a53", + .description = "Cortex-A53 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a55)] = .{ + .index = @enumToInt(Feature.a55), + .name = @tagName(Feature.a55), + .llvm_name = "a55", + .description = "Cortex-A55 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a57)] = .{ + .index = @enumToInt(Feature.a57), + .name = @tagName(Feature.a57), + .llvm_name = "a57", + .description = "Cortex-A57 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a7)] = .{ + .index = @enumToInt(Feature.a7), + .name = @tagName(Feature.a7), + .llvm_name = "a7", + .description = "Cortex-A7 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a72)] = .{ + .index = @enumToInt(Feature.a72), + .name = @tagName(Feature.a72), + .llvm_name = "a72", + .description = "Cortex-A72 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a73)] = .{ + .index = @enumToInt(Feature.a73), + .name = @tagName(Feature.a73), + .llvm_name = "a73", + .description = "Cortex-A73 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a75)] = .{ + .index = @enumToInt(Feature.a75), + .name = @tagName(Feature.a75), + .llvm_name = "a75", + .description = "Cortex-A75 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a76)] = .{ + .index = @enumToInt(Feature.a76), + .name = @tagName(Feature.a76), + .llvm_name = "a76", + .description = "Cortex-A76 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a8)] = .{ + .index = @enumToInt(Feature.a8), + .name = @tagName(Feature.a8), + .llvm_name = "a8", + .description = "Cortex-A8 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.a9)] = .{ + .index = @enumToInt(Feature.a9), + .name = @tagName(Feature.a9), + .llvm_name = "a9", + .description = "Cortex-A9 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.aclass)] = .{ + .index = @enumToInt(Feature.aclass), + .name = @tagName(Feature.aclass), + .llvm_name = "aclass", + .description = "Is application profile ('A' series)", + .dependencies = 0, + }; + result[@enumToInt(Feature.acquire_release)] = .{ + .index = @enumToInt(Feature.acquire_release), + .name = @tagName(Feature.acquire_release), + .llvm_name = "acquire-release", + .description = "Has v8 acquire/release (lda/ldaex etc) instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.aes)] = .{ + .index = @enumToInt(Feature.aes), + .name = @tagName(Feature.aes), + .llvm_name = "aes", + .description = "Enable AES support", + .dependencies = featureSet(&[_]Feature{ + .neon, + }), + }; + result[@enumToInt(Feature.armv2)] = .{ + .index = @enumToInt(Feature.armv2), + .name = @tagName(Feature.armv2), + .llvm_name = "armv2", + .description = "ARMv2 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.armv2a)] = .{ + .index = @enumToInt(Feature.armv2a), + .name = @tagName(Feature.armv2a), + .llvm_name = "armv2a", + .description = "ARMv2a architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.armv3)] = .{ + .index = @enumToInt(Feature.armv3), + .name = @tagName(Feature.armv3), + .llvm_name = "armv3", + .description = "ARMv3 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.armv3m)] = .{ + .index = @enumToInt(Feature.armv3m), + .name = @tagName(Feature.armv3m), + .llvm_name = "armv3m", + .description = "ARMv3m architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.armv4)] = .{ + .index = @enumToInt(Feature.armv4), + .name = @tagName(Feature.armv4), + .llvm_name = "armv4", + .description = "ARMv4 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.armv4t)] = .{ + .index = @enumToInt(Feature.armv4t), + .name = @tagName(Feature.armv4t), + .llvm_name = "armv4t", + .description = "ARMv4t architecture", + .dependencies = featureSet(&[_]Feature{ + .v4t, + }), + }; + result[@enumToInt(Feature.armv5t)] = .{ + .index = @enumToInt(Feature.armv5t), + .name = @tagName(Feature.armv5t), + .llvm_name = "armv5t", + .description = "ARMv5t architecture", + .dependencies = featureSet(&[_]Feature{ + .v5t, + }), + }; + result[@enumToInt(Feature.armv5te)] = .{ + .index = @enumToInt(Feature.armv5te), + .name = @tagName(Feature.armv5te), + .llvm_name = "armv5te", + .description = "ARMv5te architecture", + .dependencies = featureSet(&[_]Feature{ + .v5te, + }), + }; + result[@enumToInt(Feature.armv5tej)] = .{ + .index = @enumToInt(Feature.armv5tej), + .name = @tagName(Feature.armv5tej), + .llvm_name = "armv5tej", + .description = "ARMv5tej architecture", + .dependencies = featureSet(&[_]Feature{ + .v5te, + }), + }; + result[@enumToInt(Feature.armv6)] = .{ + .index = @enumToInt(Feature.armv6), + .name = @tagName(Feature.armv6), + .llvm_name = "armv6", + .description = "ARMv6 architecture", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .v6, + }), + }; + result[@enumToInt(Feature.armv6_m)] = .{ + .index = @enumToInt(Feature.armv6_m), + .name = @tagName(Feature.armv6_m), + .llvm_name = "armv6-m", + .description = "ARMv6m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6m, + }), + }; + result[@enumToInt(Feature.armv6j)] = .{ + .index = @enumToInt(Feature.armv6j), + .name = @tagName(Feature.armv6j), + .llvm_name = "armv6j", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv6, + }), + }; + result[@enumToInt(Feature.armv6k)] = .{ + .index = @enumToInt(Feature.armv6k), + .name = @tagName(Feature.armv6k), + .llvm_name = "armv6k", + .description = "ARMv6k architecture", + .dependencies = featureSet(&[_]Feature{ + .v6k, + }), + }; + result[@enumToInt(Feature.armv6kz)] = .{ + .index = @enumToInt(Feature.armv6kz), + .name = @tagName(Feature.armv6kz), + .llvm_name = "armv6kz", + .description = "ARMv6kz architecture", + .dependencies = featureSet(&[_]Feature{ + .trustzone, + .v6k, + }), + }; + result[@enumToInt(Feature.armv6s_m)] = .{ + .index = @enumToInt(Feature.armv6s_m), + .name = @tagName(Feature.armv6s_m), + .llvm_name = "armv6s-m", + .description = "ARMv6sm architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v6m, + }), + }; + result[@enumToInt(Feature.armv6t2)] = .{ + .index = @enumToInt(Feature.armv6t2), + .name = @tagName(Feature.armv6t2), + .llvm_name = "armv6t2", + .description = "ARMv6t2 architecture", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .v6t2, + }), + }; + result[@enumToInt(Feature.armv7_a)] = .{ + .index = @enumToInt(Feature.armv7_a), + .name = @tagName(Feature.armv7_a), + .llvm_name = "armv7-a", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .neon, + .v7, + }), + }; + result[@enumToInt(Feature.armv7_m)] = .{ + .index = @enumToInt(Feature.armv7_m), + .name = @tagName(Feature.armv7_m), + .llvm_name = "armv7-m", + .description = "ARMv7m architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .v7, + }), + }; + result[@enumToInt(Feature.armv7_r)] = .{ + .index = @enumToInt(Feature.armv7_r), + .name = @tagName(Feature.armv7_r), + .llvm_name = "armv7-r", + .description = "ARMv7r architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .rclass, + .v7, + }), + }; + result[@enumToInt(Feature.armv7e_m)] = .{ + .index = @enumToInt(Feature.armv7e_m), + .name = @tagName(Feature.armv7e_m), + .llvm_name = "armv7e-m", + .description = "ARMv7em architecture", + .dependencies = featureSet(&[_]Feature{ + .db, + .dsp, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .thumb2, + .v7, + }), + }; + result[@enumToInt(Feature.armv7k)] = .{ + .index = @enumToInt(Feature.armv7k), + .name = @tagName(Feature.armv7k), + .llvm_name = "armv7k", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv7_a, + }), + }; + result[@enumToInt(Feature.armv7s)] = .{ + .index = @enumToInt(Feature.armv7s), + .name = @tagName(Feature.armv7s), + .llvm_name = "armv7s", + .description = "ARMv7a architecture", + .dependencies = featureSet(&[_]Feature{ + .armv7_a, + }), + }; + result[@enumToInt(Feature.armv7ve)] = .{ + .index = @enumToInt(Feature.armv7ve), + .name = @tagName(Feature.armv7ve), + .llvm_name = "armv7ve", + .description = "ARMv7ve architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .db, + .dsp, + .mp, + .neon, + .trustzone, + .v7, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_a)] = .{ + .index = @enumToInt(Feature.armv8_a), + .name = @tagName(Feature.armv8_a), + .llvm_name = "armv8-a", + .description = "ARMv8a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .v8, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_m_base)] = .{ + .index = @enumToInt(Feature.armv8_m_base), + .name = @tagName(Feature.armv8_m_base), + .llvm_name = "armv8-m.base", + .description = "ARMv8mBaseline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .strict_align, + .thumb_mode, + .v7clrex, + .v8m, + }), + }; + result[@enumToInt(Feature.armv8_m_main)] = .{ + .index = @enumToInt(Feature.armv8_m_main), + .name = @tagName(Feature.armv8_m_main), + .llvm_name = "armv8-m.main", + .description = "ARMv8mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .mclass, + .noarm, + .thumb_mode, + .v8m_main, + }), + }; + result[@enumToInt(Feature.armv8_r)] = .{ + .index = @enumToInt(Feature.armv8_r), + .name = @tagName(Feature.armv8_r), + .llvm_name = "armv8-r", + .description = "ARMv8r architecture", + .dependencies = featureSet(&[_]Feature{ + .crc, + .db, + .dfb, + .dsp, + .fp_armv8, + .mp, + .neon, + .rclass, + .v8, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_1_a)] = .{ + .index = @enumToInt(Feature.armv8_1_a), + .name = @tagName(Feature.armv8_1_a), + .llvm_name = "armv8.1-a", + .description = "ARMv81a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .trustzone, + .v8_1a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_1_m_main)] = .{ + .index = @enumToInt(Feature.armv8_1_m_main), + .name = @tagName(Feature.armv8_1_m_main), + .llvm_name = "armv8.1-m.main", + .description = "ARMv81mMainline architecture", + .dependencies = featureSet(&[_]Feature{ + .@"8msecext", + .acquire_release, + .db, + .hwdiv, + .lob, + .mclass, + .noarm, + .ras, + .thumb_mode, + .v8_1m_main, + }), + }; + result[@enumToInt(Feature.armv8_2_a)] = .{ + .index = @enumToInt(Feature.armv8_2_a), + .name = @tagName(Feature.armv8_2_a), + .llvm_name = "armv8.2-a", + .description = "ARMv82a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_2a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_3_a)] = .{ + .index = @enumToInt(Feature.armv8_3_a), + .name = @tagName(Feature.armv8_3_a), + .llvm_name = "armv8.3-a", + .description = "ARMv83a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_3a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_4_a)] = .{ + .index = @enumToInt(Feature.armv8_4_a), + .name = @tagName(Feature.armv8_4_a), + .llvm_name = "armv8.4-a", + .description = "ARMv84a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_4a, + .virtualization, + }), + }; + result[@enumToInt(Feature.armv8_5_a)] = .{ + .index = @enumToInt(Feature.armv8_5_a), + .name = @tagName(Feature.armv8_5_a), + .llvm_name = "armv8.5-a", + .description = "ARMv85a architecture", + .dependencies = featureSet(&[_]Feature{ + .aclass, + .crc, + .crypto, + .db, + .dotprod, + .dsp, + .fp_armv8, + .mp, + .neon, + .ras, + .trustzone, + .v8_5a, + .virtualization, + }), + }; + result[@enumToInt(Feature.avoid_movs_shop)] = .{ + .index = @enumToInt(Feature.avoid_movs_shop), + .name = @tagName(Feature.avoid_movs_shop), + .llvm_name = "avoid-movs-shop", + .description = "Avoid movs instructions with shifter operand", + .dependencies = 0, + }; + result[@enumToInt(Feature.avoid_partial_cpsr)] = .{ + .index = @enumToInt(Feature.avoid_partial_cpsr), + .name = @tagName(Feature.avoid_partial_cpsr), + .llvm_name = "avoid-partial-cpsr", + .description = "Avoid CPSR partial update for OOO execution", + .dependencies = 0, + }; + result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{ + .index = @enumToInt(Feature.cheap_predicable_cpsr), + .name = @tagName(Feature.cheap_predicable_cpsr), + .llvm_name = "cheap-predicable-cpsr", + .description = "Disable +1 predication cost for instructions updating CPSR", + .dependencies = 0, + }; + result[@enumToInt(Feature.crc)] = .{ + .index = @enumToInt(Feature.crc), + .name = @tagName(Feature.crc), + .llvm_name = "crc", + .description = "Enable support for CRC instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.crypto)] = .{ + .index = @enumToInt(Feature.crypto), + .name = @tagName(Feature.crypto), + .llvm_name = "crypto", + .description = "Enable support for Cryptography extensions", + .dependencies = featureSet(&[_]Feature{ + .aes, + .neon, + .sha2, + }), + }; + result[@enumToInt(Feature.d32)] = .{ + .index = @enumToInt(Feature.d32), + .name = @tagName(Feature.d32), + .llvm_name = "d32", + .description = "Extend FP to 32 double registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.db)] = .{ + .index = @enumToInt(Feature.db), + .name = @tagName(Feature.db), + .llvm_name = "db", + .description = "Has data barrier (dmb/dsb) instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dfb)] = .{ + .index = @enumToInt(Feature.dfb), + .name = @tagName(Feature.dfb), + .llvm_name = "dfb", + .description = "Has full data barrier (dfb) instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.disable_postra_scheduler)] = .{ + .index = @enumToInt(Feature.disable_postra_scheduler), + .name = @tagName(Feature.disable_postra_scheduler), + .llvm_name = "disable-postra-scheduler", + .description = "Don't schedule again after register allocation", + .dependencies = 0, + }; + result[@enumToInt(Feature.dont_widen_vmovs)] = .{ + .index = @enumToInt(Feature.dont_widen_vmovs), + .name = @tagName(Feature.dont_widen_vmovs), + .llvm_name = "dont-widen-vmovs", + .description = "Don't widen VMOVS to VMOVD", + .dependencies = 0, + }; + result[@enumToInt(Feature.dotprod)] = .{ + .index = @enumToInt(Feature.dotprod), + .name = @tagName(Feature.dotprod), + .llvm_name = "dotprod", + .description = "Enable support for dot product instructions", + .dependencies = featureSet(&[_]Feature{ + .neon, + }), + }; + result[@enumToInt(Feature.dsp)] = .{ + .index = @enumToInt(Feature.dsp), + .name = @tagName(Feature.dsp), + .llvm_name = "dsp", + .description = "Supports DSP instructions in ARM and/or Thumb2", + .dependencies = 0, + }; + result[@enumToInt(Feature.execute_only)] = .{ + .index = @enumToInt(Feature.execute_only), + .name = @tagName(Feature.execute_only), + .llvm_name = "execute-only", + .description = "Enable the generation of execute only code.", + .dependencies = 0, + }; + result[@enumToInt(Feature.expand_fp_mlx)] = .{ + .index = @enumToInt(Feature.expand_fp_mlx), + .name = @tagName(Feature.expand_fp_mlx), + .llvm_name = "expand-fp-mlx", + .description = "Expand VFP/NEON MLA/MLS instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.exynos)] = .{ + .index = @enumToInt(Feature.exynos), + .name = @tagName(Feature.exynos), + .llvm_name = "exynos", + .description = "Samsung Exynos processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .expand_fp_mlx, + .fuse_aes, + .fuse_literals, + .hwdiv, + .hwdiv_arm, + .prof_unpr, + .ret_addr_stack, + .slow_fp_brcc, + .slow_vdup32, + .slow_vgetlni32, + .slowfpvmlx, + .splat_vfp_neon, + .use_aa, + .wide_stride_vfp, + .zcz, + }), + }; + result[@enumToInt(Feature.fp_armv8)] = .{ + .index = @enumToInt(Feature.fp_armv8), + .name = @tagName(Feature.fp_armv8), + .llvm_name = "fp-armv8", + .description = "Enable ARMv8 FP", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8d16, + .fp_armv8sp, + .vfp4, + }), + }; + result[@enumToInt(Feature.fp_armv8d16)] = .{ + .index = @enumToInt(Feature.fp_armv8d16), + .name = @tagName(Feature.fp_armv8d16), + .llvm_name = "fp-armv8d16", + .description = "Enable ARMv8 FP with only 16 d-registers", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8d16sp, + .fp64, + .vfp4d16, + }), + }; + result[@enumToInt(Feature.fp_armv8d16sp)] = .{ + .index = @enumToInt(Feature.fp_armv8d16sp), + .name = @tagName(Feature.fp_armv8d16sp), + .llvm_name = "fp-armv8d16sp", + .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", + .dependencies = featureSet(&[_]Feature{ + .vfp4d16sp, + }), + }; + result[@enumToInt(Feature.fp_armv8sp)] = .{ + .index = @enumToInt(Feature.fp_armv8sp), + .name = @tagName(Feature.fp_armv8sp), + .llvm_name = "fp-armv8sp", + .description = "Enable ARMv8 FP with no double precision", + .dependencies = featureSet(&[_]Feature{ + .d32, + .fp_armv8d16sp, + .vfp4sp, + }), + }; + result[@enumToInt(Feature.fp16)] = .{ + .index = @enumToInt(Feature.fp16), + .name = @tagName(Feature.fp16), + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp16fml)] = .{ + .index = @enumToInt(Feature.fp16fml), + .name = @tagName(Feature.fp16fml), + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = featureSet(&[_]Feature{ + .fullfp16, + }), + }; + result[@enumToInt(Feature.fp64)] = .{ + .index = @enumToInt(Feature.fp64), + .name = @tagName(Feature.fp64), + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs64, + }), + }; + result[@enumToInt(Feature.fpao)] = .{ + .index = @enumToInt(Feature.fpao), + .name = @tagName(Feature.fpao), + .llvm_name = "fpao", + .description = "Enable fast computation of positive address offsets", + .dependencies = 0, + }; + result[@enumToInt(Feature.fpregs)] = .{ + .index = @enumToInt(Feature.fpregs), + .name = @tagName(Feature.fpregs), + .llvm_name = "fpregs", + .description = "Enable FP registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.fpregs16)] = .{ + .index = @enumToInt(Feature.fpregs16), + .name = @tagName(Feature.fpregs16), + .llvm_name = "fpregs16", + .description = "Enable 16-bit FP registers", + .dependencies = featureSet(&[_]Feature{ + .fpregs, + }), + }; + result[@enumToInt(Feature.fpregs64)] = .{ + .index = @enumToInt(Feature.fpregs64), + .name = @tagName(Feature.fpregs64), + .llvm_name = "fpregs64", + .description = "Enable 64-bit FP registers", + .dependencies = featureSet(&[_]Feature{ + .fpregs, + }), + }; + result[@enumToInt(Feature.fullfp16)] = .{ + .index = @enumToInt(Feature.fullfp16), + .name = @tagName(Feature.fullfp16), + .llvm_name = "fullfp16", + .description = "Enable full half-precision floating point", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8d16sp, + .fpregs16, + }), + }; + result[@enumToInt(Feature.fuse_aes)] = .{ + .index = @enumToInt(Feature.fuse_aes), + .name = @tagName(Feature.fuse_aes), + .llvm_name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.fuse_literals)] = .{ + .index = @enumToInt(Feature.fuse_literals), + .name = @tagName(Feature.fuse_literals), + .llvm_name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.hwdiv)] = .{ + .index = @enumToInt(Feature.hwdiv), + .name = @tagName(Feature.hwdiv), + .llvm_name = "hwdiv", + .description = "Enable divide instructions in Thumb", + .dependencies = 0, + }; + result[@enumToInt(Feature.hwdiv_arm)] = .{ + .index = @enumToInt(Feature.hwdiv_arm), + .name = @tagName(Feature.hwdiv_arm), + .llvm_name = "hwdiv-arm", + .description = "Enable divide instructions in ARM mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.iwmmxt)] = .{ + .index = @enumToInt(Feature.iwmmxt), + .name = @tagName(Feature.iwmmxt), + .llvm_name = "iwmmxt", + .description = "ARMv5te architecture", + .dependencies = featureSet(&[_]Feature{ + .armv5te, + }), + }; + result[@enumToInt(Feature.iwmmxt2)] = .{ + .index = @enumToInt(Feature.iwmmxt2), + .name = @tagName(Feature.iwmmxt2), + .llvm_name = "iwmmxt2", + .description = "ARMv5te architecture", + .dependencies = featureSet(&[_]Feature{ + .armv5te, + }), + }; + result[@enumToInt(Feature.krait)] = .{ + .index = @enumToInt(Feature.krait), + .name = @tagName(Feature.krait), + .llvm_name = "krait", + .description = "Qualcomm Krait processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.kryo)] = .{ + .index = @enumToInt(Feature.kryo), + .name = @tagName(Feature.kryo), + .llvm_name = "kryo", + .description = "Qualcomm Kryo processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.lob)] = .{ + .index = @enumToInt(Feature.lob), + .name = @tagName(Feature.lob), + .llvm_name = "lob", + .description = "Enable Low Overhead Branch extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.long_calls)] = .{ + .index = @enumToInt(Feature.long_calls), + .name = @tagName(Feature.long_calls), + .llvm_name = "long-calls", + .description = "Generate calls via indirect call instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.loop_align)] = .{ + .index = @enumToInt(Feature.loop_align), + .name = @tagName(Feature.loop_align), + .llvm_name = "loop-align", + .description = "Prefer 32-bit alignment for loops", + .dependencies = 0, + }; + result[@enumToInt(Feature.m3)] = .{ + .index = @enumToInt(Feature.m3), + .name = @tagName(Feature.m3), + .llvm_name = "m3", + .description = "Cortex-M3 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.mclass)] = .{ + .index = @enumToInt(Feature.mclass), + .name = @tagName(Feature.mclass), + .llvm_name = "mclass", + .description = "Is microcontroller profile ('M' series)", + .dependencies = 0, + }; + result[@enumToInt(Feature.mp)] = .{ + .index = @enumToInt(Feature.mp), + .name = @tagName(Feature.mp), + .llvm_name = "mp", + .description = "Supports Multiprocessing extension", + .dependencies = 0, + }; + result[@enumToInt(Feature.muxed_units)] = .{ + .index = @enumToInt(Feature.muxed_units), + .name = @tagName(Feature.muxed_units), + .llvm_name = "muxed-units", + .description = "Has muxed AGU and NEON/FPU", + .dependencies = 0, + }; + result[@enumToInt(Feature.mve)] = .{ + .index = @enumToInt(Feature.mve), + .name = @tagName(Feature.mve), + .llvm_name = "mve", + .description = "Support M-Class Vector Extension with integer ops", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .fpregs16, + .fpregs64, + .v8_1m_main, + }), + }; + result[@enumToInt(Feature.mve_fp)] = .{ + .index = @enumToInt(Feature.mve_fp), + .name = @tagName(Feature.mve_fp), + .llvm_name = "mve.fp", + .description = "Support M-Class Vector Extension with integer and floating ops", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8d16sp, + .fullfp16, + .mve, + }), + }; + result[@enumToInt(Feature.nacl_trap)] = .{ + .index = @enumToInt(Feature.nacl_trap), + .name = @tagName(Feature.nacl_trap), + .llvm_name = "nacl-trap", + .description = "NaCl trap", + .dependencies = 0, + }; + result[@enumToInt(Feature.neon)] = .{ + .index = @enumToInt(Feature.neon), + .name = @tagName(Feature.neon), + .llvm_name = "neon", + .description = "Enable NEON instructions", + .dependencies = featureSet(&[_]Feature{ + .vfp3, + }), + }; + result[@enumToInt(Feature.neon_fpmovs)] = .{ + .index = @enumToInt(Feature.neon_fpmovs), + .name = @tagName(Feature.neon_fpmovs), + .llvm_name = "neon-fpmovs", + .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", + .dependencies = 0, + }; + result[@enumToInt(Feature.neonfp)] = .{ + .index = @enumToInt(Feature.neonfp), + .name = @tagName(Feature.neonfp), + .llvm_name = "neonfp", + .description = "Use NEON for single precision FP", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_branch_predictor)] = .{ + .index = @enumToInt(Feature.no_branch_predictor), + .name = @tagName(Feature.no_branch_predictor), + .llvm_name = "no-branch-predictor", + .description = "Has no branch predictor", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_movt)] = .{ + .index = @enumToInt(Feature.no_movt), + .name = @tagName(Feature.no_movt), + .llvm_name = "no-movt", + .description = "Don't use movt/movw pairs for 32-bit imms", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_neg_immediates)] = .{ + .index = @enumToInt(Feature.no_neg_immediates), + .name = @tagName(Feature.no_neg_immediates), + .llvm_name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .dependencies = 0, + }; + result[@enumToInt(Feature.noarm)] = .{ + .index = @enumToInt(Feature.noarm), + .name = @tagName(Feature.noarm), + .llvm_name = "noarm", + .description = "Does not support ARM mode execution", + .dependencies = 0, + }; + result[@enumToInt(Feature.nonpipelined_vfp)] = .{ + .index = @enumToInt(Feature.nonpipelined_vfp), + .name = @tagName(Feature.nonpipelined_vfp), + .llvm_name = "nonpipelined-vfp", + .description = "VFP instructions are not pipelined", + .dependencies = 0, + }; + result[@enumToInt(Feature.perfmon)] = .{ + .index = @enumToInt(Feature.perfmon), + .name = @tagName(Feature.perfmon), + .llvm_name = "perfmon", + .description = "Enable support for Performance Monitor extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.prefer_ishst)] = .{ + .index = @enumToInt(Feature.prefer_ishst), + .name = @tagName(Feature.prefer_ishst), + .llvm_name = "prefer-ishst", + .description = "Prefer ISHST barriers", + .dependencies = 0, + }; + result[@enumToInt(Feature.prefer_vmovsr)] = .{ + .index = @enumToInt(Feature.prefer_vmovsr), + .name = @tagName(Feature.prefer_vmovsr), + .llvm_name = "prefer-vmovsr", + .description = "Prefer VMOVSR", + .dependencies = 0, + }; + result[@enumToInt(Feature.prof_unpr)] = .{ + .index = @enumToInt(Feature.prof_unpr), + .name = @tagName(Feature.prof_unpr), + .llvm_name = "prof-unpr", + .description = "Is profitable to unpredicate", + .dependencies = 0, + }; + result[@enumToInt(Feature.r4)] = .{ + .index = @enumToInt(Feature.r4), + .name = @tagName(Feature.r4), + .llvm_name = "r4", + .description = "Cortex-R4 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.r5)] = .{ + .index = @enumToInt(Feature.r5), + .name = @tagName(Feature.r5), + .llvm_name = "r5", + .description = "Cortex-R5 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.r52)] = .{ + .index = @enumToInt(Feature.r52), + .name = @tagName(Feature.r52), + .llvm_name = "r52", + .description = "Cortex-R52 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.r7)] = .{ + .index = @enumToInt(Feature.r7), + .name = @tagName(Feature.r7), + .llvm_name = "r7", + .description = "Cortex-R7 ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.ras)] = .{ + .index = @enumToInt(Feature.ras), + .name = @tagName(Feature.ras), + .llvm_name = "ras", + .description = "Enable Reliability, Availability and Serviceability extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.rclass)] = .{ + .index = @enumToInt(Feature.rclass), + .name = @tagName(Feature.rclass), + .llvm_name = "rclass", + .description = "Is realtime profile ('R' series)", + .dependencies = 0, + }; + result[@enumToInt(Feature.read_tp_hard)] = .{ + .index = @enumToInt(Feature.read_tp_hard), + .name = @tagName(Feature.read_tp_hard), + .llvm_name = "read-tp-hard", + .description = "Reading thread pointer from register", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserve_r9)] = .{ + .index = @enumToInt(Feature.reserve_r9), + .name = @tagName(Feature.reserve_r9), + .llvm_name = "reserve-r9", + .description = "Reserve R9, making it unavailable as GPR", + .dependencies = 0, + }; + result[@enumToInt(Feature.ret_addr_stack)] = .{ + .index = @enumToInt(Feature.ret_addr_stack), + .name = @tagName(Feature.ret_addr_stack), + .llvm_name = "ret-addr-stack", + .description = "Has return address stack", + .dependencies = 0, + }; + result[@enumToInt(Feature.sb)] = .{ + .index = @enumToInt(Feature.sb), + .name = @tagName(Feature.sb), + .llvm_name = "sb", + .description = "Enable v8.5a Speculation Barrier", + .dependencies = 0, + }; + result[@enumToInt(Feature.sha2)] = .{ + .index = @enumToInt(Feature.sha2), + .name = @tagName(Feature.sha2), + .llvm_name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .dependencies = featureSet(&[_]Feature{ + .neon, + }), + }; + result[@enumToInt(Feature.slow_fp_brcc)] = .{ + .index = @enumToInt(Feature.slow_fp_brcc), + .name = @tagName(Feature.slow_fp_brcc), + .llvm_name = "slow-fp-brcc", + .description = "FP compare + branch is slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_load_D_subreg)] = .{ + .index = @enumToInt(Feature.slow_load_D_subreg), + .name = @tagName(Feature.slow_load_D_subreg), + .llvm_name = "slow-load-D-subreg", + .description = "Loading into D subregs is slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_odd_reg)] = .{ + .index = @enumToInt(Feature.slow_odd_reg), + .name = @tagName(Feature.slow_odd_reg), + .llvm_name = "slow-odd-reg", + .description = "VLDM/VSTM starting with an odd register is slow", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_vdup32)] = .{ + .index = @enumToInt(Feature.slow_vdup32), + .name = @tagName(Feature.slow_vdup32), + .llvm_name = "slow-vdup32", + .description = "Has slow VDUP32 - prefer VMOV", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_vgetlni32)] = .{ + .index = @enumToInt(Feature.slow_vgetlni32), + .name = @tagName(Feature.slow_vgetlni32), + .llvm_name = "slow-vgetlni32", + .description = "Has slow VGETLNi32 - prefer VMOV", + .dependencies = 0, + }; + result[@enumToInt(Feature.slowfpvmlx)] = .{ + .index = @enumToInt(Feature.slowfpvmlx), + .name = @tagName(Feature.slowfpvmlx), + .llvm_name = "slowfpvmlx", + .description = "Disable VFP / NEON MAC instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.soft_float)] = .{ + .index = @enumToInt(Feature.soft_float), + .name = @tagName(Feature.soft_float), + .llvm_name = "soft-float", + .description = "Use software floating point features.", + .dependencies = 0, + }; + result[@enumToInt(Feature.splat_vfp_neon)] = .{ + .index = @enumToInt(Feature.splat_vfp_neon), + .name = @tagName(Feature.splat_vfp_neon), + .llvm_name = "splat-vfp-neon", + .description = "Splat register from VFP to NEON", + .dependencies = featureSet(&[_]Feature{ + .dont_widen_vmovs, + }), + }; + result[@enumToInt(Feature.strict_align)] = .{ + .index = @enumToInt(Feature.strict_align), + .name = @tagName(Feature.strict_align), + .llvm_name = "strict-align", + .description = "Disallow all unaligned memory access", + .dependencies = 0, + }; + result[@enumToInt(Feature.swift)] = .{ + .index = @enumToInt(Feature.swift), + .name = @tagName(Feature.swift), + .llvm_name = "swift", + .description = "Swift ARM processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.thumb_mode)] = .{ + .index = @enumToInt(Feature.thumb_mode), + .name = @tagName(Feature.thumb_mode), + .llvm_name = "thumb-mode", + .description = "Thumb mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.thumb2)] = .{ + .index = @enumToInt(Feature.thumb2), + .name = @tagName(Feature.thumb2), + .llvm_name = "thumb2", + .description = "Enable Thumb2 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.trustzone)] = .{ + .index = @enumToInt(Feature.trustzone), + .name = @tagName(Feature.trustzone), + .llvm_name = "trustzone", + .description = "Enable support for TrustZone security extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_aa)] = .{ + .index = @enumToInt(Feature.use_aa), + .name = @tagName(Feature.use_aa), + .llvm_name = "use-aa", + .description = "Use alias analysis during codegen", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_misched)] = .{ + .index = @enumToInt(Feature.use_misched), + .name = @tagName(Feature.use_misched), + .llvm_name = "use-misched", + .description = "Use the MachineScheduler", + .dependencies = 0, + }; + result[@enumToInt(Feature.v4t)] = .{ + .index = @enumToInt(Feature.v4t), + .name = @tagName(Feature.v4t), + .llvm_name = "v4t", + .description = "Support ARM v4T instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.v5t)] = .{ + .index = @enumToInt(Feature.v5t), + .name = @tagName(Feature.v5t), + .llvm_name = "v5t", + .description = "Support ARM v5T instructions", + .dependencies = featureSet(&[_]Feature{ + .v4t, + }), + }; + result[@enumToInt(Feature.v5te)] = .{ + .index = @enumToInt(Feature.v5te), + .name = @tagName(Feature.v5te), + .llvm_name = "v5te", + .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", + .dependencies = featureSet(&[_]Feature{ + .v5t, + }), + }; + result[@enumToInt(Feature.v6)] = .{ + .index = @enumToInt(Feature.v6), + .name = @tagName(Feature.v6), + .llvm_name = "v6", + .description = "Support ARM v6 instructions", + .dependencies = featureSet(&[_]Feature{ + .v5te, + }), + }; + result[@enumToInt(Feature.v6k)] = .{ + .index = @enumToInt(Feature.v6k), + .name = @tagName(Feature.v6k), + .llvm_name = "v6k", + .description = "Support ARM v6k instructions", + .dependencies = featureSet(&[_]Feature{ + .v6, + }), + }; + result[@enumToInt(Feature.v6m)] = .{ + .index = @enumToInt(Feature.v6m), + .name = @tagName(Feature.v6m), + .llvm_name = "v6m", + .description = "Support ARM v6M instructions", + .dependencies = featureSet(&[_]Feature{ + .v6, + }), + }; + result[@enumToInt(Feature.v6t2)] = .{ + .index = @enumToInt(Feature.v6t2), + .name = @tagName(Feature.v6t2), + .llvm_name = "v6t2", + .description = "Support ARM v6t2 instructions", + .dependencies = featureSet(&[_]Feature{ + .thumb2, + .v6k, + .v8m, + }), + }; + result[@enumToInt(Feature.v7)] = .{ + .index = @enumToInt(Feature.v7), + .name = @tagName(Feature.v7), + .llvm_name = "v7", + .description = "Support ARM v7 instructions", + .dependencies = featureSet(&[_]Feature{ + .perfmon, + .v6t2, + .v7clrex, + }), + }; + result[@enumToInt(Feature.v7clrex)] = .{ + .index = @enumToInt(Feature.v7clrex), + .name = @tagName(Feature.v7clrex), + .llvm_name = "v7clrex", + .description = "Has v7 clrex instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.v8)] = .{ + .index = @enumToInt(Feature.v8), + .name = @tagName(Feature.v8), + .llvm_name = "v8", + .description = "Support ARM v8 instructions", + .dependencies = featureSet(&[_]Feature{ + .acquire_release, + .v7, + }), + }; + result[@enumToInt(Feature.v8_1a)] = .{ + .index = @enumToInt(Feature.v8_1a), + .name = @tagName(Feature.v8_1a), + .llvm_name = "v8.1a", + .description = "Support ARM v8.1a instructions", + .dependencies = featureSet(&[_]Feature{ + .v8, + }), + }; + result[@enumToInt(Feature.v8_1m_main)] = .{ + .index = @enumToInt(Feature.v8_1m_main), + .name = @tagName(Feature.v8_1m_main), + .llvm_name = "v8.1m.main", + .description = "Support ARM v8-1M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .v8m_main, + }), + }; + result[@enumToInt(Feature.v8_2a)] = .{ + .index = @enumToInt(Feature.v8_2a), + .name = @tagName(Feature.v8_2a), + .llvm_name = "v8.2a", + .description = "Support ARM v8.2a instructions", + .dependencies = featureSet(&[_]Feature{ + .v8_1a, + }), + }; + result[@enumToInt(Feature.v8_3a)] = .{ + .index = @enumToInt(Feature.v8_3a), + .name = @tagName(Feature.v8_3a), + .llvm_name = "v8.3a", + .description = "Support ARM v8.3a instructions", + .dependencies = featureSet(&[_]Feature{ + .v8_2a, + }), + }; + result[@enumToInt(Feature.v8_4a)] = .{ + .index = @enumToInt(Feature.v8_4a), + .name = @tagName(Feature.v8_4a), + .llvm_name = "v8.4a", + .description = "Support ARM v8.4a instructions", + .dependencies = featureSet(&[_]Feature{ + .dotprod, + .v8_3a, + }), + }; + result[@enumToInt(Feature.v8_5a)] = .{ + .index = @enumToInt(Feature.v8_5a), + .name = @tagName(Feature.v8_5a), + .llvm_name = "v8.5a", + .description = "Support ARM v8.5a instructions", + .dependencies = featureSet(&[_]Feature{ + .sb, + .v8_4a, + }), + }; + result[@enumToInt(Feature.v8m)] = .{ + .index = @enumToInt(Feature.v8m), + .name = @tagName(Feature.v8m), + .llvm_name = "v8m", + .description = "Support ARM v8M Baseline instructions", + .dependencies = featureSet(&[_]Feature{ + .v6m, + }), + }; + result[@enumToInt(Feature.v8m_main)] = .{ + .index = @enumToInt(Feature.v8m_main), + .name = @tagName(Feature.v8m_main), + .llvm_name = "v8m.main", + .description = "Support ARM v8M Mainline instructions", + .dependencies = featureSet(&[_]Feature{ + .v7, + }), + }; + result[@enumToInt(Feature.vfp2)] = .{ + .index = @enumToInt(Feature.vfp2), + .name = @tagName(Feature.vfp2), + .llvm_name = "vfp2", + .description = "Enable VFP2 instructions", + .dependencies = featureSet(&[_]Feature{ + .vfp2d16, + .vfp2sp, + }), + }; + result[@enumToInt(Feature.vfp2d16)] = .{ + .index = @enumToInt(Feature.vfp2d16), + .name = @tagName(Feature.vfp2d16), + .llvm_name = "vfp2d16", + .description = "Enable VFP2 instructions", + .dependencies = featureSet(&[_]Feature{ + .fp64, + .vfp2d16sp, + }), + }; + result[@enumToInt(Feature.vfp2d16sp)] = .{ + .index = @enumToInt(Feature.vfp2d16sp), + .name = @tagName(Feature.vfp2d16sp), + .llvm_name = "vfp2d16sp", + .description = "Enable VFP2 instructions with no double precision", + .dependencies = featureSet(&[_]Feature{ + .fpregs, + }), + }; + result[@enumToInt(Feature.vfp2sp)] = .{ + .index = @enumToInt(Feature.vfp2sp), + .name = @tagName(Feature.vfp2sp), + .llvm_name = "vfp2sp", + .description = "Enable VFP2 instructions with no double precision", + .dependencies = featureSet(&[_]Feature{ + .vfp2d16sp, + }), + }; + result[@enumToInt(Feature.vfp3)] = .{ + .index = @enumToInt(Feature.vfp3), + .name = @tagName(Feature.vfp3), + .llvm_name = "vfp3", + .description = "Enable VFP3 instructions", + .dependencies = featureSet(&[_]Feature{ + .vfp3d16, + .vfp3sp, + }), + }; + result[@enumToInt(Feature.vfp3d16)] = .{ + .index = @enumToInt(Feature.vfp3d16), + .name = @tagName(Feature.vfp3d16), + .llvm_name = "vfp3d16", + .description = "Enable VFP3 instructions with only 16 d-registers", + .dependencies = featureSet(&[_]Feature{ + .fp64, + .vfp2, + .vfp3d16sp, + }), + }; + result[@enumToInt(Feature.vfp3d16sp)] = .{ + .index = @enumToInt(Feature.vfp3d16sp), + .name = @tagName(Feature.vfp3d16sp), + .llvm_name = "vfp3d16sp", + .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", + .dependencies = featureSet(&[_]Feature{ + .vfp2sp, + }), + }; + result[@enumToInt(Feature.vfp3sp)] = .{ + .index = @enumToInt(Feature.vfp3sp), + .name = @tagName(Feature.vfp3sp), + .llvm_name = "vfp3sp", + .description = "Enable VFP3 instructions with no double precision", + .dependencies = featureSet(&[_]Feature{ + .d32, + .vfp3d16sp, + }), + }; + result[@enumToInt(Feature.vfp4)] = .{ + .index = @enumToInt(Feature.vfp4), + .name = @tagName(Feature.vfp4), + .llvm_name = "vfp4", + .description = "Enable VFP4 instructions", + .dependencies = featureSet(&[_]Feature{ + .fp16, + .vfp3, + .vfp4d16, + .vfp4sp, + }), + }; + result[@enumToInt(Feature.vfp4d16)] = .{ + .index = @enumToInt(Feature.vfp4d16), + .name = @tagName(Feature.vfp4d16), + .llvm_name = "vfp4d16", + .description = "Enable VFP4 instructions with only 16 d-registers", + .dependencies = featureSet(&[_]Feature{ + .fp16, + .fp64, + .vfp3d16, + .vfp4d16sp, + }), + }; + result[@enumToInt(Feature.vfp4d16sp)] = .{ + .index = @enumToInt(Feature.vfp4d16sp), + .name = @tagName(Feature.vfp4d16sp), + .llvm_name = "vfp4d16sp", + .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", + .dependencies = featureSet(&[_]Feature{ + .fp16, + .vfp3d16sp, + }), + }; + result[@enumToInt(Feature.vfp4sp)] = .{ + .index = @enumToInt(Feature.vfp4sp), + .name = @tagName(Feature.vfp4sp), + .llvm_name = "vfp4sp", + .description = "Enable VFP4 instructions with no double precision", + .dependencies = featureSet(&[_]Feature{ + .d32, + .fp16, + .vfp3sp, + .vfp4d16sp, + }), + }; + result[@enumToInt(Feature.virtualization)] = .{ + .index = @enumToInt(Feature.virtualization), + .name = @tagName(Feature.virtualization), + .llvm_name = "virtualization", + .description = "Supports Virtualization extension", + .dependencies = featureSet(&[_]Feature{ + .hwdiv, + .hwdiv_arm, + }), + }; + result[@enumToInt(Feature.vldn_align)] = .{ + .index = @enumToInt(Feature.vldn_align), + .name = @tagName(Feature.vldn_align), + .llvm_name = "vldn-align", + .description = "Check for VLDn unaligned access", + .dependencies = 0, + }; + result[@enumToInt(Feature.vmlx_forwarding)] = .{ + .index = @enumToInt(Feature.vmlx_forwarding), + .name = @tagName(Feature.vmlx_forwarding), + .llvm_name = "vmlx-forwarding", + .description = "Has multiplier accumulator forwarding", + .dependencies = 0, + }; + result[@enumToInt(Feature.vmlx_hazards)] = .{ + .index = @enumToInt(Feature.vmlx_hazards), + .name = @tagName(Feature.vmlx_hazards), + .llvm_name = "vmlx-hazards", + .description = "Has VMLx hazards", + .dependencies = 0, + }; + result[@enumToInt(Feature.wide_stride_vfp)] = .{ + .index = @enumToInt(Feature.wide_stride_vfp), + .name = @tagName(Feature.wide_stride_vfp), + .llvm_name = "wide-stride-vfp", + .description = "Use a wide stride when allocating VFP registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.xscale)] = .{ + .index = @enumToInt(Feature.xscale), + .name = @tagName(Feature.xscale), + .llvm_name = "xscale", + .description = "ARMv5te architecture", + .dependencies = featureSet(&[_]Feature{ + .armv5te, + }), + }; + result[@enumToInt(Feature.zcz)] = .{ + .index = @enumToInt(Feature.zcz), + .name = @tagName(Feature.zcz), + .llvm_name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const arm1020e = Cpu{ + .name = "arm1020e", + .llvm_name = "arm1020e", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm1020t = Cpu{ + .name = "arm1020t", + .llvm_name = "arm1020t", + .features = featureSet(&[_]Feature{ + .armv5t, + }), + }; + pub const arm1022e = Cpu{ + .name = "arm1022e", + .llvm_name = "arm1022e", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm10e = Cpu{ + .name = "arm10e", + .llvm_name = "arm10e", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm10tdmi = Cpu{ + .name = "arm10tdmi", + .llvm_name = "arm10tdmi", + .features = featureSet(&[_]Feature{ + .armv5t, + }), + }; + pub const arm1136j_s = Cpu{ + .name = "arm1136j_s", + .llvm_name = "arm1136j-s", + .features = featureSet(&[_]Feature{ + .armv6, + }), + }; + pub const arm1136jf_s = Cpu{ + .name = "arm1136jf_s", + .llvm_name = "arm1136jf-s", + .features = featureSet(&[_]Feature{ + .armv6, + .slowfpvmlx, + .vfp2, + }), + }; + pub const arm1156t2_s = Cpu{ + .name = "arm1156t2_s", + .llvm_name = "arm1156t2-s", + .features = featureSet(&[_]Feature{ + .armv6t2, + }), + }; + pub const arm1156t2f_s = Cpu{ + .name = "arm1156t2f_s", + .llvm_name = "arm1156t2f-s", + .features = featureSet(&[_]Feature{ + .armv6t2, + .slowfpvmlx, + .vfp2, + }), + }; + pub const arm1176j_s = Cpu{ + .name = "arm1176j_s", + .llvm_name = "arm1176j-s", + .features = featureSet(&[_]Feature{ + .armv6kz, + }), + }; + pub const arm1176jz_s = Cpu{ + .name = "arm1176jz_s", + .llvm_name = "arm1176jz-s", + .features = featureSet(&[_]Feature{ + .armv6kz, + }), + }; + pub const arm1176jzf_s = Cpu{ + .name = "arm1176jzf_s", + .llvm_name = "arm1176jzf-s", + .features = featureSet(&[_]Feature{ + .armv6kz, + .slowfpvmlx, + .vfp2, + }), + }; + pub const arm710t = Cpu{ + .name = "arm710t", + .llvm_name = "arm710t", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm720t = Cpu{ + .name = "arm720t", + .llvm_name = "arm720t", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm7tdmi = Cpu{ + .name = "arm7tdmi", + .llvm_name = "arm7tdmi", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm7tdmi_s = Cpu{ + .name = "arm7tdmi_s", + .llvm_name = "arm7tdmi-s", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm8 = Cpu{ + .name = "arm8", + .llvm_name = "arm8", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const arm810 = Cpu{ + .name = "arm810", + .llvm_name = "arm810", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const arm9 = Cpu{ + .name = "arm9", + .llvm_name = "arm9", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm920 = Cpu{ + .name = "arm920", + .llvm_name = "arm920", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm920t = Cpu{ + .name = "arm920t", + .llvm_name = "arm920t", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm922t = Cpu{ + .name = "arm922t", + .llvm_name = "arm922t", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm926ej_s = Cpu{ + .name = "arm926ej_s", + .llvm_name = "arm926ej-s", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm940t = Cpu{ + .name = "arm940t", + .llvm_name = "arm940t", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const arm946e_s = Cpu{ + .name = "arm946e_s", + .llvm_name = "arm946e-s", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm966e_s = Cpu{ + .name = "arm966e_s", + .llvm_name = "arm966e-s", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm968e_s = Cpu{ + .name = "arm968e_s", + .llvm_name = "arm968e-s", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm9e = Cpu{ + .name = "arm9e", + .llvm_name = "arm9e", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const arm9tdmi = Cpu{ + .name = "arm9tdmi", + .llvm_name = "arm9tdmi", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const cortex_a12 = Cpu{ + .name = "cortex_a12", + .llvm_name = "cortex-a12", + .features = featureSet(&[_]Feature{ + .a12, + .armv7_a, + .avoid_partial_cpsr, + .mp, + .ret_addr_stack, + .trustzone, + .vfp4, + .virtualization, + .vmlx_forwarding, + }), + }; + pub const cortex_a15 = Cpu{ + .name = "cortex_a15", + .llvm_name = "cortex-a15", + .features = featureSet(&[_]Feature{ + .a15, + .armv7_a, + .avoid_partial_cpsr, + .dont_widen_vmovs, + .mp, + .muxed_units, + .ret_addr_stack, + .splat_vfp_neon, + .trustzone, + .vfp4, + .virtualization, + .vldn_align, + }), + }; + pub const cortex_a17 = Cpu{ + .name = "cortex_a17", + .llvm_name = "cortex-a17", + .features = featureSet(&[_]Feature{ + .a17, + .armv7_a, + .avoid_partial_cpsr, + .mp, + .ret_addr_stack, + .trustzone, + .vfp4, + .virtualization, + .vmlx_forwarding, + }), + }; + pub const cortex_a32 = Cpu{ + .name = "cortex_a32", + .llvm_name = "cortex-a32", + .features = featureSet(&[_]Feature{ + .armv8_a, + .crc, + .crypto, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a35 = Cpu{ + .name = "cortex_a35", + .llvm_name = "cortex-a35", + .features = featureSet(&[_]Feature{ + .a35, + .armv8_a, + .crc, + .crypto, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a5 = Cpu{ + .name = "cortex_a5", + .llvm_name = "cortex-a5", + .features = featureSet(&[_]Feature{ + .a5, + .armv7_a, + .mp, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .trustzone, + .vfp4, + .vmlx_forwarding, + }), + }; + pub const cortex_a53 = Cpu{ + .name = "cortex_a53", + .llvm_name = "cortex-a53", + .features = featureSet(&[_]Feature{ + .a53, + .armv8_a, + .crc, + .crypto, + .fpao, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a55 = Cpu{ + .name = "cortex_a55", + .llvm_name = "cortex-a55", + .features = featureSet(&[_]Feature{ + .a55, + .armv8_2_a, + .dotprod, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a57 = Cpu{ + .name = "cortex_a57", + .llvm_name = "cortex-a57", + .features = featureSet(&[_]Feature{ + .a57, + .armv8_a, + .avoid_partial_cpsr, + .cheap_predicable_cpsr, + .crc, + .crypto, + .fpao, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a7 = Cpu{ + .name = "cortex_a7", + .llvm_name = "cortex-a7", + .features = featureSet(&[_]Feature{ + .a7, + .armv7_a, + .mp, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .trustzone, + .vfp4, + .virtualization, + .vmlx_forwarding, + .vmlx_hazards, + }), + }; + pub const cortex_a72 = Cpu{ + .name = "cortex_a72", + .llvm_name = "cortex-a72", + .features = featureSet(&[_]Feature{ + .a72, + .armv8_a, + .crc, + .crypto, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a73 = Cpu{ + .name = "cortex_a73", + .llvm_name = "cortex-a73", + .features = featureSet(&[_]Feature{ + .a73, + .armv8_a, + .crc, + .crypto, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a75 = Cpu{ + .name = "cortex_a75", + .llvm_name = "cortex-a75", + .features = featureSet(&[_]Feature{ + .a75, + .armv8_2_a, + .dotprod, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a76 = Cpu{ + .name = "cortex_a76", + .llvm_name = "cortex-a76", + .features = featureSet(&[_]Feature{ + .a76, + .armv8_2_a, + .crc, + .crypto, + .dotprod, + .fullfp16, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a76ae = Cpu{ + .name = "cortex_a76ae", + .llvm_name = "cortex-a76ae", + .features = featureSet(&[_]Feature{ + .a76, + .armv8_2_a, + .crc, + .crypto, + .dotprod, + .fullfp16, + .hwdiv, + .hwdiv_arm, + }), + }; + pub const cortex_a8 = Cpu{ + .name = "cortex_a8", + .llvm_name = "cortex-a8", + .features = featureSet(&[_]Feature{ + .a8, + .armv7_a, + .nonpipelined_vfp, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .trustzone, + .vmlx_forwarding, + .vmlx_hazards, + }), + }; + pub const cortex_a9 = Cpu{ + .name = "cortex_a9", + .llvm_name = "cortex-a9", + .features = featureSet(&[_]Feature{ + .a9, + .armv7_a, + .avoid_partial_cpsr, + .expand_fp_mlx, + .fp16, + .mp, + .muxed_units, + .neon_fpmovs, + .prefer_vmovsr, + .ret_addr_stack, + .trustzone, + .vldn_align, + .vmlx_forwarding, + .vmlx_hazards, + }), + }; + pub const cortex_m0 = Cpu{ + .name = "cortex_m0", + .llvm_name = "cortex-m0", + .features = featureSet(&[_]Feature{ + .armv6_m, + }), + }; + pub const cortex_m0plus = Cpu{ + .name = "cortex_m0plus", + .llvm_name = "cortex-m0plus", + .features = featureSet(&[_]Feature{ + .armv6_m, + }), + }; + pub const cortex_m1 = Cpu{ + .name = "cortex_m1", + .llvm_name = "cortex-m1", + .features = featureSet(&[_]Feature{ + .armv6_m, + }), + }; + pub const cortex_m23 = Cpu{ + .name = "cortex_m23", + .llvm_name = "cortex-m23", + .features = featureSet(&[_]Feature{ + .armv8_m_base, + .no_movt, + }), + }; + pub const cortex_m3 = Cpu{ + .name = "cortex_m3", + .llvm_name = "cortex-m3", + .features = featureSet(&[_]Feature{ + .armv7_m, + .loop_align, + .m3, + .no_branch_predictor, + .use_aa, + .use_misched, + }), + }; + pub const cortex_m33 = Cpu{ + .name = "cortex_m33", + .llvm_name = "cortex-m33", + .features = featureSet(&[_]Feature{ + .armv8_m_main, + .dsp, + .fp_armv8d16sp, + .loop_align, + .no_branch_predictor, + .slowfpvmlx, + .use_aa, + .use_misched, + }), + }; + pub const cortex_m35p = Cpu{ + .name = "cortex_m35p", + .llvm_name = "cortex-m35p", + .features = featureSet(&[_]Feature{ + .armv8_m_main, + .dsp, + .fp_armv8d16sp, + .loop_align, + .no_branch_predictor, + .slowfpvmlx, + .use_aa, + .use_misched, + }), + }; + pub const cortex_m4 = Cpu{ + .name = "cortex_m4", + .llvm_name = "cortex-m4", + .features = featureSet(&[_]Feature{ + .armv7e_m, + .loop_align, + .no_branch_predictor, + .slowfpvmlx, + .use_aa, + .use_misched, + .vfp4d16sp, + }), + }; + pub const cortex_m7 = Cpu{ + .name = "cortex_m7", + .llvm_name = "cortex-m7", + .features = featureSet(&[_]Feature{ + .armv7e_m, + .fp_armv8d16, + }), + }; + pub const cortex_r4 = Cpu{ + .name = "cortex_r4", + .llvm_name = "cortex-r4", + .features = featureSet(&[_]Feature{ + .armv7_r, + .avoid_partial_cpsr, + .r4, + .ret_addr_stack, + }), + }; + pub const cortex_r4f = Cpu{ + .name = "cortex_r4f", + .llvm_name = "cortex-r4f", + .features = featureSet(&[_]Feature{ + .armv7_r, + .avoid_partial_cpsr, + .r4, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .vfp3d16, + }), + }; + pub const cortex_r5 = Cpu{ + .name = "cortex_r5", + .llvm_name = "cortex-r5", + .features = featureSet(&[_]Feature{ + .armv7_r, + .avoid_partial_cpsr, + .hwdiv_arm, + .r5, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .vfp3d16, + }), + }; + pub const cortex_r52 = Cpu{ + .name = "cortex_r52", + .llvm_name = "cortex-r52", + .features = featureSet(&[_]Feature{ + .armv8_r, + .fpao, + .r52, + .use_aa, + .use_misched, + }), + }; + pub const cortex_r7 = Cpu{ + .name = "cortex_r7", + .llvm_name = "cortex-r7", + .features = featureSet(&[_]Feature{ + .armv7_r, + .avoid_partial_cpsr, + .fp16, + .hwdiv_arm, + .mp, + .r7, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .vfp3d16, + }), + }; + pub const cortex_r8 = Cpu{ + .name = "cortex_r8", + .llvm_name = "cortex-r8", + .features = featureSet(&[_]Feature{ + .armv7_r, + .avoid_partial_cpsr, + .fp16, + .hwdiv_arm, + .mp, + .ret_addr_stack, + .slow_fp_brcc, + .slowfpvmlx, + .vfp3d16, + }), + }; + pub const cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .features = featureSet(&[_]Feature{ + .armv8_a, + .avoid_movs_shop, + .avoid_partial_cpsr, + .crypto, + .disable_postra_scheduler, + .hwdiv, + .hwdiv_arm, + .mp, + .neonfp, + .ret_addr_stack, + .slowfpvmlx, + .swift, + .use_misched, + .vfp4, + .zcz, + }), + }; + pub const ep9312 = Cpu{ + .name = "ep9312", + .llvm_name = "ep9312", + .features = featureSet(&[_]Feature{ + .armv4t, + }), + }; + pub const exynos_m1 = Cpu{ + .name = "exynos_m1", + .llvm_name = "exynos-m1", + .features = featureSet(&[_]Feature{ + .armv8_a, + .exynos, + }), + }; + pub const exynos_m2 = Cpu{ + .name = "exynos_m2", + .llvm_name = "exynos-m2", + .features = featureSet(&[_]Feature{ + .armv8_a, + .exynos, + }), + }; + pub const exynos_m3 = Cpu{ + .name = "exynos_m3", + .llvm_name = "exynos-m3", + .features = featureSet(&[_]Feature{ + .armv8_a, + .exynos, + }), + }; + pub const exynos_m4 = Cpu{ + .name = "exynos_m4", + .llvm_name = "exynos-m4", + .features = featureSet(&[_]Feature{ + .armv8_2_a, + .dotprod, + .exynos, + .fullfp16, + }), + }; + pub const exynos_m5 = Cpu{ + .name = "exynos_m5", + .llvm_name = "exynos-m5", + .features = featureSet(&[_]Feature{ + .armv8_2_a, + .dotprod, + .exynos, + .fullfp16, + }), + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const iwmmxt = Cpu{ + .name = "iwmmxt", + .llvm_name = "iwmmxt", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; + pub const krait = Cpu{ + .name = "krait", + .llvm_name = "krait", + .features = featureSet(&[_]Feature{ + .armv7_a, + .avoid_partial_cpsr, + .fp16, + .hwdiv, + .hwdiv_arm, + .krait, + .muxed_units, + .ret_addr_stack, + .vfp4, + .vldn_align, + .vmlx_forwarding, + }), + }; + pub const kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .features = featureSet(&[_]Feature{ + .armv8_a, + .crc, + .crypto, + .hwdiv, + .hwdiv_arm, + .kryo, + }), + }; + pub const mpcore = Cpu{ + .name = "mpcore", + .llvm_name = "mpcore", + .features = featureSet(&[_]Feature{ + .armv6k, + .slowfpvmlx, + .vfp2, + }), + }; + pub const mpcorenovfp = Cpu{ + .name = "mpcorenovfp", + .llvm_name = "mpcorenovfp", + .features = featureSet(&[_]Feature{ + .armv6k, + }), + }; + pub const sc000 = Cpu{ + .name = "sc000", + .llvm_name = "sc000", + .features = featureSet(&[_]Feature{ + .armv6_m, + }), + }; + pub const sc300 = Cpu{ + .name = "sc300", + .llvm_name = "sc300", + .features = featureSet(&[_]Feature{ + .armv7_m, + .m3, + .no_branch_predictor, + .use_aa, + .use_misched, + }), + }; + pub const strongarm = Cpu{ + .name = "strongarm", + .llvm_name = "strongarm", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const strongarm110 = Cpu{ + .name = "strongarm110", + .llvm_name = "strongarm110", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const strongarm1100 = Cpu{ + .name = "strongarm1100", + .llvm_name = "strongarm1100", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const strongarm1110 = Cpu{ + .name = "strongarm1110", + .llvm_name = "strongarm1110", + .features = featureSet(&[_]Feature{ + .armv4, + }), + }; + pub const swift = Cpu{ + .name = "swift", + .llvm_name = "swift", + .features = featureSet(&[_]Feature{ + .armv7_a, + .avoid_movs_shop, + .avoid_partial_cpsr, + .disable_postra_scheduler, + .hwdiv, + .hwdiv_arm, + .mp, + .neonfp, + .prefer_ishst, + .prof_unpr, + .ret_addr_stack, + .slow_load_D_subreg, + .slow_odd_reg, + .slow_vdup32, + .slow_vgetlni32, + .slowfpvmlx, + .swift, + .use_misched, + .vfp4, + .vmlx_hazards, + .wide_stride_vfp, + }), + }; + pub const xscale = Cpu{ + .name = "xscale", + .llvm_name = "xscale", + .features = featureSet(&[_]Feature{ + .armv5te, + }), + }; +}; + +/// All arm CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.arm1020e, + &cpu.arm1020t, + &cpu.arm1022e, + &cpu.arm10e, + &cpu.arm10tdmi, + &cpu.arm1136j_s, + &cpu.arm1136jf_s, + &cpu.arm1156t2_s, + &cpu.arm1156t2f_s, + &cpu.arm1176j_s, + &cpu.arm1176jz_s, + &cpu.arm1176jzf_s, + &cpu.arm710t, + &cpu.arm720t, + &cpu.arm7tdmi, + &cpu.arm7tdmi_s, + &cpu.arm8, + &cpu.arm810, + &cpu.arm9, + &cpu.arm920, + &cpu.arm920t, + &cpu.arm922t, + &cpu.arm926ej_s, + &cpu.arm940t, + &cpu.arm946e_s, + &cpu.arm966e_s, + &cpu.arm968e_s, + &cpu.arm9e, + &cpu.arm9tdmi, + &cpu.cortex_a12, + &cpu.cortex_a15, + &cpu.cortex_a17, + &cpu.cortex_a32, + &cpu.cortex_a35, + &cpu.cortex_a5, + &cpu.cortex_a53, + &cpu.cortex_a55, + &cpu.cortex_a57, + &cpu.cortex_a7, + &cpu.cortex_a72, + &cpu.cortex_a73, + &cpu.cortex_a75, + &cpu.cortex_a76, + &cpu.cortex_a76ae, + &cpu.cortex_a8, + &cpu.cortex_a9, + &cpu.cortex_m0, + &cpu.cortex_m0plus, + &cpu.cortex_m1, + &cpu.cortex_m23, + &cpu.cortex_m3, + &cpu.cortex_m33, + &cpu.cortex_m35p, + &cpu.cortex_m4, + &cpu.cortex_m7, + &cpu.cortex_r4, + &cpu.cortex_r4f, + &cpu.cortex_r5, + &cpu.cortex_r52, + &cpu.cortex_r7, + &cpu.cortex_r8, + &cpu.cyclone, + &cpu.ep9312, + &cpu.exynos_m1, + &cpu.exynos_m2, + &cpu.exynos_m3, + &cpu.exynos_m4, + &cpu.exynos_m5, + &cpu.generic, + &cpu.iwmmxt, + &cpu.krait, + &cpu.kryo, + &cpu.mpcore, + &cpu.mpcorenovfp, + &cpu.sc000, + &cpu.sc300, + &cpu.strongarm, + &cpu.strongarm110, + &cpu.strongarm1100, + &cpu.strongarm1110, + &cpu.swift, + &cpu.xscale, }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 21b1591b7bdcb8876388bf284ca563bab4856909..fecb45b69ee7d71532a0643cfc2439f162e6bbee 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -1,4791 +1,2441 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_addsubiw = Feature{ - .name = "addsubiw", - .llvm_name = "addsubiw", - .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_break = Feature{ - .name = "break", - .llvm_name = "break", - .description = "The device supports the `BREAK` debugging instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_des = Feature{ - .name = "des", - .llvm_name = "des", - .description = "The device supports the `DES k` encryption instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_eijmpcall = Feature{ - .name = "eijmpcall", - .llvm_name = "eijmpcall", - .description = "The device supports the `EIJMP`/`EICALL` instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_elpm = Feature{ - .name = "elpm", - .llvm_name = "elpm", - .description = "The device supports the ELPM instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_elpmx = Feature{ - .name = "elpmx", - .llvm_name = "elpmx", - .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ijmpcall = Feature{ - .name = "ijmpcall", - .llvm_name = "ijmpcall", - .description = "The device supports `IJMP`/`ICALL`instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_jmpcall = Feature{ - .name = "jmpcall", - .llvm_name = "jmpcall", - .description = "The device supports the `JMP` and `CALL` instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lpm = Feature{ - .name = "lpm", - .llvm_name = "lpm", - .description = "The device supports the `LPM` instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lpmx = Feature{ - .name = "lpmx", - .llvm_name = "lpmx", - .description = "The device supports the `LPM Rd, Z[+]` instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_movw = Feature{ - .name = "movw", - .llvm_name = "movw", - .description = "The device supports the 16-bit MOVW instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mul = Feature{ - .name = "mul", - .llvm_name = "mul", - .description = "The device supports the multiplication instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_rmw = Feature{ - .name = "rmw", - .llvm_name = "rmw", - .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_spm = Feature{ - .name = "spm", - .llvm_name = "spm", - .description = "The device supports the `SPM` instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_spmx = Feature{ - .name = "spmx", - .llvm_name = "spmx", - .description = "The device supports the `SPM Z+` instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sram = Feature{ - .name = "sram", - .llvm_name = "sram", - .description = "The device has random access memory", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_smallstack = Feature{ - .name = "smallstack", - .llvm_name = "smallstack", - .description = "The device has an 8-bit stack pointer", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tinyencoding = Feature{ - .name = "tinyencoding", - .llvm_name = "tinyencoding", - .description = "The device has Tiny core specific instruction encodings", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_addsubiw, - &feature_break, - &feature_des, - &feature_eijmpcall, - &feature_elpm, - &feature_elpmx, - &feature_ijmpcall, - &feature_jmpcall, - &feature_lpm, - &feature_lpmx, - &feature_movw, - &feature_mul, - &feature_rmw, - &feature_spm, - &feature_spmx, - &feature_sram, - &feature_smallstack, - &feature_tinyencoding, -}; - -pub const cpu_at43usb320 = Cpu{ - .name = "at43usb320", - .llvm_name = "at43usb320", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at43usb355 = Cpu{ - .name = "at43usb355", - .llvm_name = "at43usb355", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at76c711 = Cpu{ - .name = "at76c711", - .llvm_name = "at76c711", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at86rf401 = Cpu{ - .name = "at86rf401", - .llvm_name = "at86rf401", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - }, -}; - -pub const cpu_at90c8534 = Cpu{ - .name = "at90c8534", - .llvm_name = "at90c8534", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90can128 = Cpu{ - .name = "at90can128", - .llvm_name = "at90can128", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90can32 = Cpu{ - .name = "at90can32", - .llvm_name = "at90can32", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90can64 = Cpu{ - .name = "at90can64", - .llvm_name = "at90can64", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm1 = Cpu{ - .name = "at90pwm1", - .llvm_name = "at90pwm1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm161 = Cpu{ - .name = "at90pwm161", - .llvm_name = "at90pwm161", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm2 = Cpu{ - .name = "at90pwm2", - .llvm_name = "at90pwm2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm216 = Cpu{ - .name = "at90pwm216", - .llvm_name = "at90pwm216", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm2b = Cpu{ - .name = "at90pwm2b", - .llvm_name = "at90pwm2b", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm3 = Cpu{ - .name = "at90pwm3", - .llvm_name = "at90pwm3", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm316 = Cpu{ - .name = "at90pwm316", - .llvm_name = "at90pwm316", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm3b = Cpu{ - .name = "at90pwm3b", - .llvm_name = "at90pwm3b", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90pwm81 = Cpu{ - .name = "at90pwm81", - .llvm_name = "at90pwm81", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90s1200 = Cpu{ - .name = "at90s1200", - .llvm_name = "at90s1200", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_at90s2313 = Cpu{ - .name = "at90s2313", - .llvm_name = "at90s2313", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s2323 = Cpu{ - .name = "at90s2323", - .llvm_name = "at90s2323", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s2333 = Cpu{ - .name = "at90s2333", - .llvm_name = "at90s2333", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s2343 = Cpu{ - .name = "at90s2343", - .llvm_name = "at90s2343", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s4414 = Cpu{ - .name = "at90s4414", - .llvm_name = "at90s4414", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s4433 = Cpu{ - .name = "at90s4433", - .llvm_name = "at90s4433", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s4434 = Cpu{ - .name = "at90s4434", - .llvm_name = "at90s4434", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s8515 = Cpu{ - .name = "at90s8515", - .llvm_name = "at90s8515", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90s8535 = Cpu{ - .name = "at90s8535", - .llvm_name = "at90s8535", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_at90scr100 = Cpu{ - .name = "at90scr100", - .llvm_name = "at90scr100", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90usb1286 = Cpu{ - .name = "at90usb1286", - .llvm_name = "at90usb1286", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90usb1287 = Cpu{ - .name = "at90usb1287", - .llvm_name = "at90usb1287", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90usb162 = Cpu{ - .name = "at90usb162", - .llvm_name = "at90usb162", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_at90usb646 = Cpu{ - .name = "at90usb646", - .llvm_name = "at90usb646", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90usb647 = Cpu{ - .name = "at90usb647", - .llvm_name = "at90usb647", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_at90usb82 = Cpu{ - .name = "at90usb82", - .llvm_name = "at90usb82", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_at94k = Cpu{ - .name = "at94k", - .llvm_name = "at94k", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - &feature_mul, - }, -}; - -pub const cpu_ata5272 = Cpu{ - .name = "ata5272", - .llvm_name = "ata5272", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_ata5505 = Cpu{ - .name = "ata5505", - .llvm_name = "ata5505", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_ata5790 = Cpu{ - .name = "ata5790", - .llvm_name = "ata5790", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_ata5795 = Cpu{ - .name = "ata5795", - .llvm_name = "ata5795", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_ata6285 = Cpu{ - .name = "ata6285", - .llvm_name = "ata6285", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_ata6286 = Cpu{ - .name = "ata6286", - .llvm_name = "ata6286", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_ata6289 = Cpu{ - .name = "ata6289", - .llvm_name = "ata6289", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega103 = Cpu{ - .name = "atmega103", - .llvm_name = "atmega103", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_atmega128 = Cpu{ - .name = "atmega128", - .llvm_name = "atmega128", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega1280 = Cpu{ - .name = "atmega1280", - .llvm_name = "atmega1280", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega1281 = Cpu{ - .name = "atmega1281", - .llvm_name = "atmega1281", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega1284 = Cpu{ - .name = "atmega1284", - .llvm_name = "atmega1284", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega1284p = Cpu{ - .name = "atmega1284p", - .llvm_name = "atmega1284p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega1284rfr2 = Cpu{ - .name = "atmega1284rfr2", - .llvm_name = "atmega1284rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega128a = Cpu{ - .name = "atmega128a", - .llvm_name = "atmega128a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega128rfa1 = Cpu{ - .name = "atmega128rfa1", - .llvm_name = "atmega128rfa1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega128rfr2 = Cpu{ - .name = "atmega128rfr2", - .llvm_name = "atmega128rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16 = Cpu{ - .name = "atmega16", - .llvm_name = "atmega16", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega161 = Cpu{ - .name = "atmega161", - .llvm_name = "atmega161", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - &feature_mul, - &feature_spm, - }, -}; - -pub const cpu_atmega162 = Cpu{ - .name = "atmega162", - .llvm_name = "atmega162", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega163 = Cpu{ - .name = "atmega163", - .llvm_name = "atmega163", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - &feature_mul, - &feature_spm, - }, -}; - -pub const cpu_atmega164a = Cpu{ - .name = "atmega164a", - .llvm_name = "atmega164a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega164p = Cpu{ - .name = "atmega164p", - .llvm_name = "atmega164p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega164pa = Cpu{ - .name = "atmega164pa", - .llvm_name = "atmega164pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega165 = Cpu{ - .name = "atmega165", - .llvm_name = "atmega165", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega165a = Cpu{ - .name = "atmega165a", - .llvm_name = "atmega165a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega165p = Cpu{ - .name = "atmega165p", - .llvm_name = "atmega165p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega165pa = Cpu{ - .name = "atmega165pa", - .llvm_name = "atmega165pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega168 = Cpu{ - .name = "atmega168", - .llvm_name = "atmega168", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega168a = Cpu{ - .name = "atmega168a", - .llvm_name = "atmega168a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega168p = Cpu{ - .name = "atmega168p", - .llvm_name = "atmega168p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega168pa = Cpu{ - .name = "atmega168pa", - .llvm_name = "atmega168pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega169 = Cpu{ - .name = "atmega169", - .llvm_name = "atmega169", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega169a = Cpu{ - .name = "atmega169a", - .llvm_name = "atmega169a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega169p = Cpu{ - .name = "atmega169p", - .llvm_name = "atmega169p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega169pa = Cpu{ - .name = "atmega169pa", - .llvm_name = "atmega169pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16a = Cpu{ - .name = "atmega16a", - .llvm_name = "atmega16a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16hva = Cpu{ - .name = "atmega16hva", - .llvm_name = "atmega16hva", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16hva2 = Cpu{ - .name = "atmega16hva2", - .llvm_name = "atmega16hva2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16hvb = Cpu{ - .name = "atmega16hvb", - .llvm_name = "atmega16hvb", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16hvbrevb = Cpu{ - .name = "atmega16hvbrevb", - .llvm_name = "atmega16hvbrevb", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16m1 = Cpu{ - .name = "atmega16m1", - .llvm_name = "atmega16m1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega16u2 = Cpu{ - .name = "atmega16u2", - .llvm_name = "atmega16u2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_atmega16u4 = Cpu{ - .name = "atmega16u4", - .llvm_name = "atmega16u4", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega2560 = Cpu{ - .name = "atmega2560", - .llvm_name = "atmega2560", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega2561 = Cpu{ - .name = "atmega2561", - .llvm_name = "atmega2561", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega2564rfr2 = Cpu{ - .name = "atmega2564rfr2", - .llvm_name = "atmega2564rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega256rfr2 = Cpu{ - .name = "atmega256rfr2", - .llvm_name = "atmega256rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32 = Cpu{ - .name = "atmega32", - .llvm_name = "atmega32", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega323 = Cpu{ - .name = "atmega323", - .llvm_name = "atmega323", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega324a = Cpu{ - .name = "atmega324a", - .llvm_name = "atmega324a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega324p = Cpu{ - .name = "atmega324p", - .llvm_name = "atmega324p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega324pa = Cpu{ - .name = "atmega324pa", - .llvm_name = "atmega324pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega325 = Cpu{ - .name = "atmega325", - .llvm_name = "atmega325", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3250 = Cpu{ - .name = "atmega3250", - .llvm_name = "atmega3250", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3250a = Cpu{ - .name = "atmega3250a", - .llvm_name = "atmega3250a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3250p = Cpu{ - .name = "atmega3250p", - .llvm_name = "atmega3250p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3250pa = Cpu{ - .name = "atmega3250pa", - .llvm_name = "atmega3250pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega325a = Cpu{ - .name = "atmega325a", - .llvm_name = "atmega325a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega325p = Cpu{ - .name = "atmega325p", - .llvm_name = "atmega325p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega325pa = Cpu{ - .name = "atmega325pa", - .llvm_name = "atmega325pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega328 = Cpu{ - .name = "atmega328", - .llvm_name = "atmega328", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega328p = Cpu{ - .name = "atmega328p", - .llvm_name = "atmega328p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega329 = Cpu{ - .name = "atmega329", - .llvm_name = "atmega329", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3290 = Cpu{ - .name = "atmega3290", - .llvm_name = "atmega3290", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3290a = Cpu{ - .name = "atmega3290a", - .llvm_name = "atmega3290a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3290p = Cpu{ - .name = "atmega3290p", - .llvm_name = "atmega3290p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega3290pa = Cpu{ - .name = "atmega3290pa", - .llvm_name = "atmega3290pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega329a = Cpu{ - .name = "atmega329a", - .llvm_name = "atmega329a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega329p = Cpu{ - .name = "atmega329p", - .llvm_name = "atmega329p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega329pa = Cpu{ - .name = "atmega329pa", - .llvm_name = "atmega329pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32a = Cpu{ - .name = "atmega32a", - .llvm_name = "atmega32a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32c1 = Cpu{ - .name = "atmega32c1", - .llvm_name = "atmega32c1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32hvb = Cpu{ - .name = "atmega32hvb", - .llvm_name = "atmega32hvb", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32hvbrevb = Cpu{ - .name = "atmega32hvbrevb", - .llvm_name = "atmega32hvbrevb", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32m1 = Cpu{ - .name = "atmega32m1", - .llvm_name = "atmega32m1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32u2 = Cpu{ - .name = "atmega32u2", - .llvm_name = "atmega32u2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_atmega32u4 = Cpu{ - .name = "atmega32u4", - .llvm_name = "atmega32u4", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega32u6 = Cpu{ - .name = "atmega32u6", - .llvm_name = "atmega32u6", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega406 = Cpu{ - .name = "atmega406", - .llvm_name = "atmega406", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega48 = Cpu{ - .name = "atmega48", - .llvm_name = "atmega48", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega48a = Cpu{ - .name = "atmega48a", - .llvm_name = "atmega48a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega48p = Cpu{ - .name = "atmega48p", - .llvm_name = "atmega48p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega48pa = Cpu{ - .name = "atmega48pa", - .llvm_name = "atmega48pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64 = Cpu{ - .name = "atmega64", - .llvm_name = "atmega64", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega640 = Cpu{ - .name = "atmega640", - .llvm_name = "atmega640", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega644 = Cpu{ - .name = "atmega644", - .llvm_name = "atmega644", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega644a = Cpu{ - .name = "atmega644a", - .llvm_name = "atmega644a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega644p = Cpu{ - .name = "atmega644p", - .llvm_name = "atmega644p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega644pa = Cpu{ - .name = "atmega644pa", - .llvm_name = "atmega644pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega644rfr2 = Cpu{ - .name = "atmega644rfr2", - .llvm_name = "atmega644rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega645 = Cpu{ - .name = "atmega645", - .llvm_name = "atmega645", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6450 = Cpu{ - .name = "atmega6450", - .llvm_name = "atmega6450", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6450a = Cpu{ - .name = "atmega6450a", - .llvm_name = "atmega6450a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6450p = Cpu{ - .name = "atmega6450p", - .llvm_name = "atmega6450p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega645a = Cpu{ - .name = "atmega645a", - .llvm_name = "atmega645a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega645p = Cpu{ - .name = "atmega645p", - .llvm_name = "atmega645p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega649 = Cpu{ - .name = "atmega649", - .llvm_name = "atmega649", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6490 = Cpu{ - .name = "atmega6490", - .llvm_name = "atmega6490", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6490a = Cpu{ - .name = "atmega6490a", - .llvm_name = "atmega6490a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega6490p = Cpu{ - .name = "atmega6490p", - .llvm_name = "atmega6490p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega649a = Cpu{ - .name = "atmega649a", - .llvm_name = "atmega649a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega649p = Cpu{ - .name = "atmega649p", - .llvm_name = "atmega649p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64a = Cpu{ - .name = "atmega64a", - .llvm_name = "atmega64a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64c1 = Cpu{ - .name = "atmega64c1", - .llvm_name = "atmega64c1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64hve = Cpu{ - .name = "atmega64hve", - .llvm_name = "atmega64hve", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64m1 = Cpu{ - .name = "atmega64m1", - .llvm_name = "atmega64m1", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega64rfr2 = Cpu{ - .name = "atmega64rfr2", - .llvm_name = "atmega64rfr2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega8 = Cpu{ - .name = "atmega8", - .llvm_name = "atmega8", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega8515 = Cpu{ - .name = "atmega8515", - .llvm_name = "atmega8515", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - &feature_mul, - &feature_spm, - }, -}; - -pub const cpu_atmega8535 = Cpu{ - .name = "atmega8535", - .llvm_name = "atmega8535", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - &feature_movw, - &feature_mul, - &feature_spm, - }, -}; - -pub const cpu_atmega88 = Cpu{ - .name = "atmega88", - .llvm_name = "atmega88", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega88a = Cpu{ - .name = "atmega88a", - .llvm_name = "atmega88a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega88p = Cpu{ - .name = "atmega88p", - .llvm_name = "atmega88p", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega88pa = Cpu{ - .name = "atmega88pa", - .llvm_name = "atmega88pa", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega8a = Cpu{ - .name = "atmega8a", - .llvm_name = "atmega8a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega8hva = Cpu{ - .name = "atmega8hva", - .llvm_name = "atmega8hva", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atmega8u2 = Cpu{ - .name = "atmega8u2", - .llvm_name = "atmega8u2", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny10 = Cpu{ - .name = "attiny10", - .llvm_name = "attiny10", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny102 = Cpu{ - .name = "attiny102", - .llvm_name = "attiny102", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny104 = Cpu{ - .name = "attiny104", - .llvm_name = "attiny104", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny11 = Cpu{ - .name = "attiny11", - .llvm_name = "attiny11", - .dependencies = &[_]*const Feature { - &feature_lpm, - }, -}; - -pub const cpu_attiny12 = Cpu{ - .name = "attiny12", - .llvm_name = "attiny12", - .dependencies = &[_]*const Feature { - &feature_lpm, - }, -}; - -pub const cpu_attiny13 = Cpu{ - .name = "attiny13", - .llvm_name = "attiny13", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny13a = Cpu{ - .name = "attiny13a", - .llvm_name = "attiny13a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny15 = Cpu{ - .name = "attiny15", - .llvm_name = "attiny15", - .dependencies = &[_]*const Feature { - &feature_lpm, - }, -}; - -pub const cpu_attiny1634 = Cpu{ - .name = "attiny1634", - .llvm_name = "attiny1634", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny167 = Cpu{ - .name = "attiny167", - .llvm_name = "attiny167", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny20 = Cpu{ - .name = "attiny20", - .llvm_name = "attiny20", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny22 = Cpu{ - .name = "attiny22", - .llvm_name = "attiny22", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_attiny2313 = Cpu{ - .name = "attiny2313", - .llvm_name = "attiny2313", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny2313a = Cpu{ - .name = "attiny2313a", - .llvm_name = "attiny2313a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny24 = Cpu{ - .name = "attiny24", - .llvm_name = "attiny24", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny24a = Cpu{ - .name = "attiny24a", - .llvm_name = "attiny24a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny25 = Cpu{ - .name = "attiny25", - .llvm_name = "attiny25", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny26 = Cpu{ - .name = "attiny26", - .llvm_name = "attiny26", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - &feature_lpmx, - }, -}; - -pub const cpu_attiny261 = Cpu{ - .name = "attiny261", - .llvm_name = "attiny261", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny261a = Cpu{ - .name = "attiny261a", - .llvm_name = "attiny261a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny28 = Cpu{ - .name = "attiny28", - .llvm_name = "attiny28", - .dependencies = &[_]*const Feature { - &feature_lpm, - }, -}; - -pub const cpu_attiny4 = Cpu{ - .name = "attiny4", - .llvm_name = "attiny4", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny40 = Cpu{ - .name = "attiny40", - .llvm_name = "attiny40", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny4313 = Cpu{ - .name = "attiny4313", - .llvm_name = "attiny4313", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny43u = Cpu{ - .name = "attiny43u", - .llvm_name = "attiny43u", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny44 = Cpu{ - .name = "attiny44", - .llvm_name = "attiny44", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny44a = Cpu{ - .name = "attiny44a", - .llvm_name = "attiny44a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny45 = Cpu{ - .name = "attiny45", - .llvm_name = "attiny45", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny461 = Cpu{ - .name = "attiny461", - .llvm_name = "attiny461", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny461a = Cpu{ - .name = "attiny461a", - .llvm_name = "attiny461a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny48 = Cpu{ - .name = "attiny48", - .llvm_name = "attiny48", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny5 = Cpu{ - .name = "attiny5", - .llvm_name = "attiny5", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_attiny828 = Cpu{ - .name = "attiny828", - .llvm_name = "attiny828", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny84 = Cpu{ - .name = "attiny84", - .llvm_name = "attiny84", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny84a = Cpu{ - .name = "attiny84a", - .llvm_name = "attiny84a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny85 = Cpu{ - .name = "attiny85", - .llvm_name = "attiny85", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny861 = Cpu{ - .name = "attiny861", - .llvm_name = "attiny861", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny861a = Cpu{ - .name = "attiny861a", - .llvm_name = "attiny861a", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny87 = Cpu{ - .name = "attiny87", - .llvm_name = "attiny87", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny88 = Cpu{ - .name = "attiny88", - .llvm_name = "attiny88", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_attiny9 = Cpu{ - .name = "attiny9", - .llvm_name = "attiny9", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_atxmega128a1 = Cpu{ - .name = "atxmega128a1", - .llvm_name = "atxmega128a1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128a1u = Cpu{ - .name = "atxmega128a1u", - .llvm_name = "atxmega128a1u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128a3 = Cpu{ - .name = "atxmega128a3", - .llvm_name = "atxmega128a3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128a3u = Cpu{ - .name = "atxmega128a3u", - .llvm_name = "atxmega128a3u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128a4u = Cpu{ - .name = "atxmega128a4u", - .llvm_name = "atxmega128a4u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128b1 = Cpu{ - .name = "atxmega128b1", - .llvm_name = "atxmega128b1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128b3 = Cpu{ - .name = "atxmega128b3", - .llvm_name = "atxmega128b3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128c3 = Cpu{ - .name = "atxmega128c3", - .llvm_name = "atxmega128c3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128d3 = Cpu{ - .name = "atxmega128d3", - .llvm_name = "atxmega128d3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega128d4 = Cpu{ - .name = "atxmega128d4", - .llvm_name = "atxmega128d4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega16a4 = Cpu{ - .name = "atxmega16a4", - .llvm_name = "atxmega16a4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega16a4u = Cpu{ - .name = "atxmega16a4u", - .llvm_name = "atxmega16a4u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega16c4 = Cpu{ - .name = "atxmega16c4", - .llvm_name = "atxmega16c4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega16d4 = Cpu{ - .name = "atxmega16d4", - .llvm_name = "atxmega16d4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega16e5 = Cpu{ - .name = "atxmega16e5", - .llvm_name = "atxmega16e5", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega192a3 = Cpu{ - .name = "atxmega192a3", - .llvm_name = "atxmega192a3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega192a3u = Cpu{ - .name = "atxmega192a3u", - .llvm_name = "atxmega192a3u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega192c3 = Cpu{ - .name = "atxmega192c3", - .llvm_name = "atxmega192c3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega192d3 = Cpu{ - .name = "atxmega192d3", - .llvm_name = "atxmega192d3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256a3 = Cpu{ - .name = "atxmega256a3", - .llvm_name = "atxmega256a3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256a3b = Cpu{ - .name = "atxmega256a3b", - .llvm_name = "atxmega256a3b", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256a3bu = Cpu{ - .name = "atxmega256a3bu", - .llvm_name = "atxmega256a3bu", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256a3u = Cpu{ - .name = "atxmega256a3u", - .llvm_name = "atxmega256a3u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256c3 = Cpu{ - .name = "atxmega256c3", - .llvm_name = "atxmega256c3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega256d3 = Cpu{ - .name = "atxmega256d3", - .llvm_name = "atxmega256d3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32a4 = Cpu{ - .name = "atxmega32a4", - .llvm_name = "atxmega32a4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32a4u = Cpu{ - .name = "atxmega32a4u", - .llvm_name = "atxmega32a4u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32c4 = Cpu{ - .name = "atxmega32c4", - .llvm_name = "atxmega32c4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32d4 = Cpu{ - .name = "atxmega32d4", - .llvm_name = "atxmega32d4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32e5 = Cpu{ - .name = "atxmega32e5", - .llvm_name = "atxmega32e5", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega32x1 = Cpu{ - .name = "atxmega32x1", - .llvm_name = "atxmega32x1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega384c3 = Cpu{ - .name = "atxmega384c3", - .llvm_name = "atxmega384c3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega384d3 = Cpu{ - .name = "atxmega384d3", - .llvm_name = "atxmega384d3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64a1 = Cpu{ - .name = "atxmega64a1", - .llvm_name = "atxmega64a1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64a1u = Cpu{ - .name = "atxmega64a1u", - .llvm_name = "atxmega64a1u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64a3 = Cpu{ - .name = "atxmega64a3", - .llvm_name = "atxmega64a3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64a3u = Cpu{ - .name = "atxmega64a3u", - .llvm_name = "atxmega64a3u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64a4u = Cpu{ - .name = "atxmega64a4u", - .llvm_name = "atxmega64a4u", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64b1 = Cpu{ - .name = "atxmega64b1", - .llvm_name = "atxmega64b1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64b3 = Cpu{ - .name = "atxmega64b3", - .llvm_name = "atxmega64b3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64c3 = Cpu{ - .name = "atxmega64c3", - .llvm_name = "atxmega64c3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_rmw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64d3 = Cpu{ - .name = "atxmega64d3", - .llvm_name = "atxmega64d3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega64d4 = Cpu{ - .name = "atxmega64d4", - .llvm_name = "atxmega64d4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_atxmega8e5 = Cpu{ - .name = "atxmega8e5", - .llvm_name = "atxmega8e5", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avr1 = Cpu{ - .name = "avr1", - .llvm_name = "avr1", - .dependencies = &[_]*const Feature { - &feature_lpm, - }, -}; - -pub const cpu_avr2 = Cpu{ - .name = "avr2", - .llvm_name = "avr2", - .dependencies = &[_]*const Feature { - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_avr25 = Cpu{ - .name = "avr25", - .llvm_name = "avr25", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_avr3 = Cpu{ - .name = "avr3", - .llvm_name = "avr3", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_avr31 = Cpu{ - .name = "avr31", - .llvm_name = "avr31", - .dependencies = &[_]*const Feature { - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_ijmpcall, - }, -}; - -pub const cpu_avr35 = Cpu{ - .name = "avr35", - .llvm_name = "avr35", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - }, -}; - -pub const cpu_avr4 = Cpu{ - .name = "avr4", - .llvm_name = "avr4", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avr5 = Cpu{ - .name = "avr5", - .llvm_name = "avr5", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avr51 = Cpu{ - .name = "avr51", - .llvm_name = "avr51", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avr6 = Cpu{ - .name = "avr6", - .llvm_name = "avr6", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrtiny = Cpu{ - .name = "avrtiny", - .llvm_name = "avrtiny", - .dependencies = &[_]*const Feature { - &feature_sram, - &feature_break, - &feature_tinyencoding, - }, -}; - -pub const cpu_avrxmega1 = Cpu{ - .name = "avrxmega1", - .llvm_name = "avrxmega1", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega2 = Cpu{ - .name = "avrxmega2", - .llvm_name = "avrxmega2", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega3 = Cpu{ - .name = "avrxmega3", - .llvm_name = "avrxmega3", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega4 = Cpu{ - .name = "avrxmega4", - .llvm_name = "avrxmega4", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega5 = Cpu{ - .name = "avrxmega5", - .llvm_name = "avrxmega5", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega6 = Cpu{ - .name = "avrxmega6", - .llvm_name = "avrxmega6", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_avrxmega7 = Cpu{ - .name = "avrxmega7", - .llvm_name = "avrxmega7", - .dependencies = &[_]*const Feature { - &feature_spmx, - &feature_des, - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_elpm, - &feature_sram, - &feature_addsubiw, - &feature_elpmx, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_eijmpcall, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpu_m3000 = Cpu{ - .name = "m3000", - .llvm_name = "m3000", - .dependencies = &[_]*const Feature { - &feature_lpmx, - &feature_jmpcall, - &feature_lpm, - &feature_sram, - &feature_addsubiw, - &feature_movw, - &feature_ijmpcall, - &feature_break, - &feature_spm, - &feature_mul, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_at43usb320, - &cpu_at43usb355, - &cpu_at76c711, - &cpu_at86rf401, - &cpu_at90c8534, - &cpu_at90can128, - &cpu_at90can32, - &cpu_at90can64, - &cpu_at90pwm1, - &cpu_at90pwm161, - &cpu_at90pwm2, - &cpu_at90pwm216, - &cpu_at90pwm2b, - &cpu_at90pwm3, - &cpu_at90pwm316, - &cpu_at90pwm3b, - &cpu_at90pwm81, - &cpu_at90s1200, - &cpu_at90s2313, - &cpu_at90s2323, - &cpu_at90s2333, - &cpu_at90s2343, - &cpu_at90s4414, - &cpu_at90s4433, - &cpu_at90s4434, - &cpu_at90s8515, - &cpu_at90s8535, - &cpu_at90scr100, - &cpu_at90usb1286, - &cpu_at90usb1287, - &cpu_at90usb162, - &cpu_at90usb646, - &cpu_at90usb647, - &cpu_at90usb82, - &cpu_at94k, - &cpu_ata5272, - &cpu_ata5505, - &cpu_ata5790, - &cpu_ata5795, - &cpu_ata6285, - &cpu_ata6286, - &cpu_ata6289, - &cpu_atmega103, - &cpu_atmega128, - &cpu_atmega1280, - &cpu_atmega1281, - &cpu_atmega1284, - &cpu_atmega1284p, - &cpu_atmega1284rfr2, - &cpu_atmega128a, - &cpu_atmega128rfa1, - &cpu_atmega128rfr2, - &cpu_atmega16, - &cpu_atmega161, - &cpu_atmega162, - &cpu_atmega163, - &cpu_atmega164a, - &cpu_atmega164p, - &cpu_atmega164pa, - &cpu_atmega165, - &cpu_atmega165a, - &cpu_atmega165p, - &cpu_atmega165pa, - &cpu_atmega168, - &cpu_atmega168a, - &cpu_atmega168p, - &cpu_atmega168pa, - &cpu_atmega169, - &cpu_atmega169a, - &cpu_atmega169p, - &cpu_atmega169pa, - &cpu_atmega16a, - &cpu_atmega16hva, - &cpu_atmega16hva2, - &cpu_atmega16hvb, - &cpu_atmega16hvbrevb, - &cpu_atmega16m1, - &cpu_atmega16u2, - &cpu_atmega16u4, - &cpu_atmega2560, - &cpu_atmega2561, - &cpu_atmega2564rfr2, - &cpu_atmega256rfr2, - &cpu_atmega32, - &cpu_atmega323, - &cpu_atmega324a, - &cpu_atmega324p, - &cpu_atmega324pa, - &cpu_atmega325, - &cpu_atmega3250, - &cpu_atmega3250a, - &cpu_atmega3250p, - &cpu_atmega3250pa, - &cpu_atmega325a, - &cpu_atmega325p, - &cpu_atmega325pa, - &cpu_atmega328, - &cpu_atmega328p, - &cpu_atmega329, - &cpu_atmega3290, - &cpu_atmega3290a, - &cpu_atmega3290p, - &cpu_atmega3290pa, - &cpu_atmega329a, - &cpu_atmega329p, - &cpu_atmega329pa, - &cpu_atmega32a, - &cpu_atmega32c1, - &cpu_atmega32hvb, - &cpu_atmega32hvbrevb, - &cpu_atmega32m1, - &cpu_atmega32u2, - &cpu_atmega32u4, - &cpu_atmega32u6, - &cpu_atmega406, - &cpu_atmega48, - &cpu_atmega48a, - &cpu_atmega48p, - &cpu_atmega48pa, - &cpu_atmega64, - &cpu_atmega640, - &cpu_atmega644, - &cpu_atmega644a, - &cpu_atmega644p, - &cpu_atmega644pa, - &cpu_atmega644rfr2, - &cpu_atmega645, - &cpu_atmega6450, - &cpu_atmega6450a, - &cpu_atmega6450p, - &cpu_atmega645a, - &cpu_atmega645p, - &cpu_atmega649, - &cpu_atmega6490, - &cpu_atmega6490a, - &cpu_atmega6490p, - &cpu_atmega649a, - &cpu_atmega649p, - &cpu_atmega64a, - &cpu_atmega64c1, - &cpu_atmega64hve, - &cpu_atmega64m1, - &cpu_atmega64rfr2, - &cpu_atmega8, - &cpu_atmega8515, - &cpu_atmega8535, - &cpu_atmega88, - &cpu_atmega88a, - &cpu_atmega88p, - &cpu_atmega88pa, - &cpu_atmega8a, - &cpu_atmega8hva, - &cpu_atmega8u2, - &cpu_attiny10, - &cpu_attiny102, - &cpu_attiny104, - &cpu_attiny11, - &cpu_attiny12, - &cpu_attiny13, - &cpu_attiny13a, - &cpu_attiny15, - &cpu_attiny1634, - &cpu_attiny167, - &cpu_attiny20, - &cpu_attiny22, - &cpu_attiny2313, - &cpu_attiny2313a, - &cpu_attiny24, - &cpu_attiny24a, - &cpu_attiny25, - &cpu_attiny26, - &cpu_attiny261, - &cpu_attiny261a, - &cpu_attiny28, - &cpu_attiny4, - &cpu_attiny40, - &cpu_attiny4313, - &cpu_attiny43u, - &cpu_attiny44, - &cpu_attiny44a, - &cpu_attiny45, - &cpu_attiny461, - &cpu_attiny461a, - &cpu_attiny48, - &cpu_attiny5, - &cpu_attiny828, - &cpu_attiny84, - &cpu_attiny84a, - &cpu_attiny85, - &cpu_attiny861, - &cpu_attiny861a, - &cpu_attiny87, - &cpu_attiny88, - &cpu_attiny9, - &cpu_atxmega128a1, - &cpu_atxmega128a1u, - &cpu_atxmega128a3, - &cpu_atxmega128a3u, - &cpu_atxmega128a4u, - &cpu_atxmega128b1, - &cpu_atxmega128b3, - &cpu_atxmega128c3, - &cpu_atxmega128d3, - &cpu_atxmega128d4, - &cpu_atxmega16a4, - &cpu_atxmega16a4u, - &cpu_atxmega16c4, - &cpu_atxmega16d4, - &cpu_atxmega16e5, - &cpu_atxmega192a3, - &cpu_atxmega192a3u, - &cpu_atxmega192c3, - &cpu_atxmega192d3, - &cpu_atxmega256a3, - &cpu_atxmega256a3b, - &cpu_atxmega256a3bu, - &cpu_atxmega256a3u, - &cpu_atxmega256c3, - &cpu_atxmega256d3, - &cpu_atxmega32a4, - &cpu_atxmega32a4u, - &cpu_atxmega32c4, - &cpu_atxmega32d4, - &cpu_atxmega32e5, - &cpu_atxmega32x1, - &cpu_atxmega384c3, - &cpu_atxmega384d3, - &cpu_atxmega64a1, - &cpu_atxmega64a1u, - &cpu_atxmega64a3, - &cpu_atxmega64a3u, - &cpu_atxmega64a4u, - &cpu_atxmega64b1, - &cpu_atxmega64b3, - &cpu_atxmega64c3, - &cpu_atxmega64d3, - &cpu_atxmega64d4, - &cpu_atxmega8e5, - &cpu_avr1, - &cpu_avr2, - &cpu_avr25, - &cpu_avr3, - &cpu_avr31, - &cpu_avr35, - &cpu_avr4, - &cpu_avr5, - &cpu_avr51, - &cpu_avr6, - &cpu_avrtiny, - &cpu_avrxmega1, - &cpu_avrxmega2, - &cpu_avrxmega3, - &cpu_avrxmega4, - &cpu_avrxmega5, - &cpu_avrxmega6, - &cpu_avrxmega7, - &cpu_m3000, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + addsubiw, + avr0, + avr1, + avr2, + avr25, + avr3, + avr31, + avr35, + avr4, + avr5, + avr51, + avr6, + avrtiny, + break, + des, + eijmpcall, + elpm, + elpmx, + ijmpcall, + jmpcall, + lpm, + lpmx, + movw, + mul, + rmw, + smallstack, + special, + spm, + spmx, + sram, + tinyencoding, + xmega, + xmegau, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.addsubiw)] = .{ + .index = @enumToInt(Feature.addsubiw), + .name = @tagName(Feature.addsubiw), + .llvm_name = "addsubiw", + .description = "Enable 16-bit register-immediate addition and subtraction instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.avr0)] = .{ + .index = @enumToInt(Feature.avr0), + .name = @tagName(Feature.avr0), + .llvm_name = "avr0", + .description = "The device is a part of the avr0 family", + .dependencies = 0, + }; + result[@enumToInt(Feature.avr1)] = .{ + .index = @enumToInt(Feature.avr1), + .name = @tagName(Feature.avr1), + .llvm_name = "avr1", + .description = "The device is a part of the avr1 family", + .dependencies = featureSet(&[_]Feature{ + .avr0, + .lpm, + }), + }; + result[@enumToInt(Feature.avr2)] = .{ + .index = @enumToInt(Feature.avr2), + .name = @tagName(Feature.avr2), + .llvm_name = "avr2", + .description = "The device is a part of the avr2 family", + .dependencies = featureSet(&[_]Feature{ + .addsubiw, + .avr1, + .ijmpcall, + .sram, + }), + }; + result[@enumToInt(Feature.avr25)] = .{ + .index = @enumToInt(Feature.avr25), + .name = @tagName(Feature.avr25), + .llvm_name = "avr25", + .description = "The device is a part of the avr25 family", + .dependencies = featureSet(&[_]Feature{ + .avr2, + .break, + .lpmx, + .movw, + .spm, + }), + }; + result[@enumToInt(Feature.avr3)] = .{ + .index = @enumToInt(Feature.avr3), + .name = @tagName(Feature.avr3), + .llvm_name = "avr3", + .description = "The device is a part of the avr3 family", + .dependencies = featureSet(&[_]Feature{ + .avr2, + .jmpcall, + }), + }; + result[@enumToInt(Feature.avr31)] = .{ + .index = @enumToInt(Feature.avr31), + .name = @tagName(Feature.avr31), + .llvm_name = "avr31", + .description = "The device is a part of the avr31 family", + .dependencies = featureSet(&[_]Feature{ + .avr3, + .elpm, + }), + }; + result[@enumToInt(Feature.avr35)] = .{ + .index = @enumToInt(Feature.avr35), + .name = @tagName(Feature.avr35), + .llvm_name = "avr35", + .description = "The device is a part of the avr35 family", + .dependencies = featureSet(&[_]Feature{ + .avr3, + .break, + .lpmx, + .movw, + .spm, + }), + }; + result[@enumToInt(Feature.avr4)] = .{ + .index = @enumToInt(Feature.avr4), + .name = @tagName(Feature.avr4), + .llvm_name = "avr4", + .description = "The device is a part of the avr4 family", + .dependencies = featureSet(&[_]Feature{ + .avr2, + .break, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + result[@enumToInt(Feature.avr5)] = .{ + .index = @enumToInt(Feature.avr5), + .name = @tagName(Feature.avr5), + .llvm_name = "avr5", + .description = "The device is a part of the avr5 family", + .dependencies = featureSet(&[_]Feature{ + .avr3, + .break, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + result[@enumToInt(Feature.avr51)] = .{ + .index = @enumToInt(Feature.avr51), + .name = @tagName(Feature.avr51), + .llvm_name = "avr51", + .description = "The device is a part of the avr51 family", + .dependencies = featureSet(&[_]Feature{ + .avr5, + .elpm, + .elpmx, + }), + }; + result[@enumToInt(Feature.avr6)] = .{ + .index = @enumToInt(Feature.avr6), + .name = @tagName(Feature.avr6), + .llvm_name = "avr6", + .description = "The device is a part of the avr6 family", + .dependencies = featureSet(&[_]Feature{ + .avr51, + }), + }; + result[@enumToInt(Feature.avrtiny)] = .{ + .index = @enumToInt(Feature.avrtiny), + .name = @tagName(Feature.avrtiny), + .llvm_name = "avrtiny", + .description = "The device is a part of the avrtiny family", + .dependencies = featureSet(&[_]Feature{ + .avr0, + .break, + .sram, + .tinyencoding, + }), + }; + result[@enumToInt(Feature.break)] = .{ + .index = @enumToInt(Feature.break), + .name = @tagName(Feature.break), + .llvm_name = "break", + .description = "The device supports the `BREAK` debugging instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.des)] = .{ + .index = @enumToInt(Feature.des), + .name = @tagName(Feature.des), + .llvm_name = "des", + .description = "The device supports the `DES k` encryption instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.eijmpcall)] = .{ + .index = @enumToInt(Feature.eijmpcall), + .name = @tagName(Feature.eijmpcall), + .llvm_name = "eijmpcall", + .description = "The device supports the `EIJMP`/`EICALL` instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.elpm)] = .{ + .index = @enumToInt(Feature.elpm), + .name = @tagName(Feature.elpm), + .llvm_name = "elpm", + .description = "The device supports the ELPM instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.elpmx)] = .{ + .index = @enumToInt(Feature.elpmx), + .name = @tagName(Feature.elpmx), + .llvm_name = "elpmx", + .description = "The device supports the `ELPM Rd, Z[+]` instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.ijmpcall)] = .{ + .index = @enumToInt(Feature.ijmpcall), + .name = @tagName(Feature.ijmpcall), + .llvm_name = "ijmpcall", + .description = "The device supports `IJMP`/`ICALL`instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.jmpcall)] = .{ + .index = @enumToInt(Feature.jmpcall), + .name = @tagName(Feature.jmpcall), + .llvm_name = "jmpcall", + .description = "The device supports the `JMP` and `CALL` instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.lpm)] = .{ + .index = @enumToInt(Feature.lpm), + .name = @tagName(Feature.lpm), + .llvm_name = "lpm", + .description = "The device supports the `LPM` instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.lpmx)] = .{ + .index = @enumToInt(Feature.lpmx), + .name = @tagName(Feature.lpmx), + .llvm_name = "lpmx", + .description = "The device supports the `LPM Rd, Z[+]` instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.movw)] = .{ + .index = @enumToInt(Feature.movw), + .name = @tagName(Feature.movw), + .llvm_name = "movw", + .description = "The device supports the 16-bit MOVW instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.mul)] = .{ + .index = @enumToInt(Feature.mul), + .name = @tagName(Feature.mul), + .llvm_name = "mul", + .description = "The device supports the multiplication instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.rmw)] = .{ + .index = @enumToInt(Feature.rmw), + .name = @tagName(Feature.rmw), + .llvm_name = "rmw", + .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", + .dependencies = 0, + }; + result[@enumToInt(Feature.smallstack)] = .{ + .index = @enumToInt(Feature.smallstack), + .name = @tagName(Feature.smallstack), + .llvm_name = "smallstack", + .description = "The device has an 8-bit stack pointer", + .dependencies = 0, + }; + result[@enumToInt(Feature.special)] = .{ + .index = @enumToInt(Feature.special), + .name = @tagName(Feature.special), + .llvm_name = "special", + .description = "Enable use of the entire instruction set - used for debugging", + .dependencies = featureSet(&[_]Feature{ + .addsubiw, + .break, + .des, + .eijmpcall, + .elpm, + .elpmx, + .ijmpcall, + .jmpcall, + .lpm, + .lpmx, + .movw, + .mul, + .rmw, + .spm, + .spmx, + .sram, + }), + }; + result[@enumToInt(Feature.spm)] = .{ + .index = @enumToInt(Feature.spm), + .name = @tagName(Feature.spm), + .llvm_name = "spm", + .description = "The device supports the `SPM` instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.spmx)] = .{ + .index = @enumToInt(Feature.spmx), + .name = @tagName(Feature.spmx), + .llvm_name = "spmx", + .description = "The device supports the `SPM Z+` instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.sram)] = .{ + .index = @enumToInt(Feature.sram), + .name = @tagName(Feature.sram), + .llvm_name = "sram", + .description = "The device has random access memory", + .dependencies = 0, + }; + result[@enumToInt(Feature.tinyencoding)] = .{ + .index = @enumToInt(Feature.tinyencoding), + .name = @tagName(Feature.tinyencoding), + .llvm_name = "tinyencoding", + .description = "The device has Tiny core specific instruction encodings", + .dependencies = 0, + }; + result[@enumToInt(Feature.xmega)] = .{ + .index = @enumToInt(Feature.xmega), + .name = @tagName(Feature.xmega), + .llvm_name = "xmega", + .description = "The device is a part of the xmega family", + .dependencies = featureSet(&[_]Feature{ + .avr51, + .des, + .eijmpcall, + .spmx, + }), + }; + result[@enumToInt(Feature.xmegau)] = .{ + .index = @enumToInt(Feature.xmegau), + .name = @tagName(Feature.xmegau), + .llvm_name = "xmegau", + .description = "The device is a part of the xmegau family", + .dependencies = featureSet(&[_]Feature{ + .rmw, + .xmega, + }), + }; + break :blk result; +}; + +pub const cpu = struct { + pub const at43usb320 = Cpu{ + .name = "at43usb320", + .llvm_name = "at43usb320", + .features = featureSet(&[_]Feature{ + .avr31, + }), + }; + pub const at43usb355 = Cpu{ + .name = "at43usb355", + .llvm_name = "at43usb355", + .features = featureSet(&[_]Feature{ + .avr3, + }), + }; + pub const at76c711 = Cpu{ + .name = "at76c711", + .llvm_name = "at76c711", + .features = featureSet(&[_]Feature{ + .avr3, + }), + }; + pub const at86rf401 = Cpu{ + .name = "at86rf401", + .llvm_name = "at86rf401", + .features = featureSet(&[_]Feature{ + .avr2, + .lpmx, + .movw, + }), + }; + pub const at90c8534 = Cpu{ + .name = "at90c8534", + .llvm_name = "at90c8534", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90can128 = Cpu{ + .name = "at90can128", + .llvm_name = "at90can128", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const at90can32 = Cpu{ + .name = "at90can32", + .llvm_name = "at90can32", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90can64 = Cpu{ + .name = "at90can64", + .llvm_name = "at90can64", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90pwm1 = Cpu{ + .name = "at90pwm1", + .llvm_name = "at90pwm1", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90pwm161 = Cpu{ + .name = "at90pwm161", + .llvm_name = "at90pwm161", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90pwm2 = Cpu{ + .name = "at90pwm2", + .llvm_name = "at90pwm2", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90pwm216 = Cpu{ + .name = "at90pwm216", + .llvm_name = "at90pwm216", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90pwm2b = Cpu{ + .name = "at90pwm2b", + .llvm_name = "at90pwm2b", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90pwm3 = Cpu{ + .name = "at90pwm3", + .llvm_name = "at90pwm3", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90pwm316 = Cpu{ + .name = "at90pwm316", + .llvm_name = "at90pwm316", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90pwm3b = Cpu{ + .name = "at90pwm3b", + .llvm_name = "at90pwm3b", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90pwm81 = Cpu{ + .name = "at90pwm81", + .llvm_name = "at90pwm81", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const at90s1200 = Cpu{ + .name = "at90s1200", + .llvm_name = "at90s1200", + .features = featureSet(&[_]Feature{ + .avr0, + }), + }; + pub const at90s2313 = Cpu{ + .name = "at90s2313", + .llvm_name = "at90s2313", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s2323 = Cpu{ + .name = "at90s2323", + .llvm_name = "at90s2323", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s2333 = Cpu{ + .name = "at90s2333", + .llvm_name = "at90s2333", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s2343 = Cpu{ + .name = "at90s2343", + .llvm_name = "at90s2343", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s4414 = Cpu{ + .name = "at90s4414", + .llvm_name = "at90s4414", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s4433 = Cpu{ + .name = "at90s4433", + .llvm_name = "at90s4433", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s4434 = Cpu{ + .name = "at90s4434", + .llvm_name = "at90s4434", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s8515 = Cpu{ + .name = "at90s8515", + .llvm_name = "at90s8515", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90s8535 = Cpu{ + .name = "at90s8535", + .llvm_name = "at90s8535", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const at90scr100 = Cpu{ + .name = "at90scr100", + .llvm_name = "at90scr100", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90usb1286 = Cpu{ + .name = "at90usb1286", + .llvm_name = "at90usb1286", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const at90usb1287 = Cpu{ + .name = "at90usb1287", + .llvm_name = "at90usb1287", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const at90usb162 = Cpu{ + .name = "at90usb162", + .llvm_name = "at90usb162", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const at90usb646 = Cpu{ + .name = "at90usb646", + .llvm_name = "at90usb646", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90usb647 = Cpu{ + .name = "at90usb647", + .llvm_name = "at90usb647", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const at90usb82 = Cpu{ + .name = "at90usb82", + .llvm_name = "at90usb82", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const at94k = Cpu{ + .name = "at94k", + .llvm_name = "at94k", + .features = featureSet(&[_]Feature{ + .avr3, + .lpmx, + .movw, + .mul, + }), + }; + pub const ata5272 = Cpu{ + .name = "ata5272", + .llvm_name = "ata5272", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const ata5505 = Cpu{ + .name = "ata5505", + .llvm_name = "ata5505", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const ata5790 = Cpu{ + .name = "ata5790", + .llvm_name = "ata5790", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const ata5795 = Cpu{ + .name = "ata5795", + .llvm_name = "ata5795", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const ata6285 = Cpu{ + .name = "ata6285", + .llvm_name = "ata6285", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const ata6286 = Cpu{ + .name = "ata6286", + .llvm_name = "ata6286", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const ata6289 = Cpu{ + .name = "ata6289", + .llvm_name = "ata6289", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega103 = Cpu{ + .name = "atmega103", + .llvm_name = "atmega103", + .features = featureSet(&[_]Feature{ + .avr31, + }), + }; + pub const atmega128 = Cpu{ + .name = "atmega128", + .llvm_name = "atmega128", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega1280 = Cpu{ + .name = "atmega1280", + .llvm_name = "atmega1280", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega1281 = Cpu{ + .name = "atmega1281", + .llvm_name = "atmega1281", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega1284 = Cpu{ + .name = "atmega1284", + .llvm_name = "atmega1284", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega1284p = Cpu{ + .name = "atmega1284p", + .llvm_name = "atmega1284p", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega1284rfr2 = Cpu{ + .name = "atmega1284rfr2", + .llvm_name = "atmega1284rfr2", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega128a = Cpu{ + .name = "atmega128a", + .llvm_name = "atmega128a", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega128rfa1 = Cpu{ + .name = "atmega128rfa1", + .llvm_name = "atmega128rfa1", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega128rfr2 = Cpu{ + .name = "atmega128rfr2", + .llvm_name = "atmega128rfr2", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const atmega16 = Cpu{ + .name = "atmega16", + .llvm_name = "atmega16", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega161 = Cpu{ + .name = "atmega161", + .llvm_name = "atmega161", + .features = featureSet(&[_]Feature{ + .avr3, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + pub const atmega162 = Cpu{ + .name = "atmega162", + .llvm_name = "atmega162", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega163 = Cpu{ + .name = "atmega163", + .llvm_name = "atmega163", + .features = featureSet(&[_]Feature{ + .avr3, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + pub const atmega164a = Cpu{ + .name = "atmega164a", + .llvm_name = "atmega164a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega164p = Cpu{ + .name = "atmega164p", + .llvm_name = "atmega164p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega164pa = Cpu{ + .name = "atmega164pa", + .llvm_name = "atmega164pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega165 = Cpu{ + .name = "atmega165", + .llvm_name = "atmega165", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega165a = Cpu{ + .name = "atmega165a", + .llvm_name = "atmega165a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega165p = Cpu{ + .name = "atmega165p", + .llvm_name = "atmega165p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega165pa = Cpu{ + .name = "atmega165pa", + .llvm_name = "atmega165pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega168 = Cpu{ + .name = "atmega168", + .llvm_name = "atmega168", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega168a = Cpu{ + .name = "atmega168a", + .llvm_name = "atmega168a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega168p = Cpu{ + .name = "atmega168p", + .llvm_name = "atmega168p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega168pa = Cpu{ + .name = "atmega168pa", + .llvm_name = "atmega168pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega169 = Cpu{ + .name = "atmega169", + .llvm_name = "atmega169", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega169a = Cpu{ + .name = "atmega169a", + .llvm_name = "atmega169a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega169p = Cpu{ + .name = "atmega169p", + .llvm_name = "atmega169p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega169pa = Cpu{ + .name = "atmega169pa", + .llvm_name = "atmega169pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16a = Cpu{ + .name = "atmega16a", + .llvm_name = "atmega16a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16hva = Cpu{ + .name = "atmega16hva", + .llvm_name = "atmega16hva", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16hva2 = Cpu{ + .name = "atmega16hva2", + .llvm_name = "atmega16hva2", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16hvb = Cpu{ + .name = "atmega16hvb", + .llvm_name = "atmega16hvb", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16hvbrevb = Cpu{ + .name = "atmega16hvbrevb", + .llvm_name = "atmega16hvbrevb", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16m1 = Cpu{ + .name = "atmega16m1", + .llvm_name = "atmega16m1", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega16u2 = Cpu{ + .name = "atmega16u2", + .llvm_name = "atmega16u2", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const atmega16u4 = Cpu{ + .name = "atmega16u4", + .llvm_name = "atmega16u4", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega2560 = Cpu{ + .name = "atmega2560", + .llvm_name = "atmega2560", + .features = featureSet(&[_]Feature{ + .avr6, + }), + }; + pub const atmega2561 = Cpu{ + .name = "atmega2561", + .llvm_name = "atmega2561", + .features = featureSet(&[_]Feature{ + .avr6, + }), + }; + pub const atmega2564rfr2 = Cpu{ + .name = "atmega2564rfr2", + .llvm_name = "atmega2564rfr2", + .features = featureSet(&[_]Feature{ + .avr6, + }), + }; + pub const atmega256rfr2 = Cpu{ + .name = "atmega256rfr2", + .llvm_name = "atmega256rfr2", + .features = featureSet(&[_]Feature{ + .avr6, + }), + }; + pub const atmega32 = Cpu{ + .name = "atmega32", + .llvm_name = "atmega32", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega323 = Cpu{ + .name = "atmega323", + .llvm_name = "atmega323", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega324a = Cpu{ + .name = "atmega324a", + .llvm_name = "atmega324a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega324p = Cpu{ + .name = "atmega324p", + .llvm_name = "atmega324p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega324pa = Cpu{ + .name = "atmega324pa", + .llvm_name = "atmega324pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega325 = Cpu{ + .name = "atmega325", + .llvm_name = "atmega325", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3250 = Cpu{ + .name = "atmega3250", + .llvm_name = "atmega3250", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3250a = Cpu{ + .name = "atmega3250a", + .llvm_name = "atmega3250a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3250p = Cpu{ + .name = "atmega3250p", + .llvm_name = "atmega3250p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3250pa = Cpu{ + .name = "atmega3250pa", + .llvm_name = "atmega3250pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega325a = Cpu{ + .name = "atmega325a", + .llvm_name = "atmega325a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega325p = Cpu{ + .name = "atmega325p", + .llvm_name = "atmega325p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega325pa = Cpu{ + .name = "atmega325pa", + .llvm_name = "atmega325pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega328 = Cpu{ + .name = "atmega328", + .llvm_name = "atmega328", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega328p = Cpu{ + .name = "atmega328p", + .llvm_name = "atmega328p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega329 = Cpu{ + .name = "atmega329", + .llvm_name = "atmega329", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3290 = Cpu{ + .name = "atmega3290", + .llvm_name = "atmega3290", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3290a = Cpu{ + .name = "atmega3290a", + .llvm_name = "atmega3290a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3290p = Cpu{ + .name = "atmega3290p", + .llvm_name = "atmega3290p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega3290pa = Cpu{ + .name = "atmega3290pa", + .llvm_name = "atmega3290pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega329a = Cpu{ + .name = "atmega329a", + .llvm_name = "atmega329a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega329p = Cpu{ + .name = "atmega329p", + .llvm_name = "atmega329p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega329pa = Cpu{ + .name = "atmega329pa", + .llvm_name = "atmega329pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32a = Cpu{ + .name = "atmega32a", + .llvm_name = "atmega32a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32c1 = Cpu{ + .name = "atmega32c1", + .llvm_name = "atmega32c1", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32hvb = Cpu{ + .name = "atmega32hvb", + .llvm_name = "atmega32hvb", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32hvbrevb = Cpu{ + .name = "atmega32hvbrevb", + .llvm_name = "atmega32hvbrevb", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32m1 = Cpu{ + .name = "atmega32m1", + .llvm_name = "atmega32m1", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32u2 = Cpu{ + .name = "atmega32u2", + .llvm_name = "atmega32u2", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const atmega32u4 = Cpu{ + .name = "atmega32u4", + .llvm_name = "atmega32u4", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega32u6 = Cpu{ + .name = "atmega32u6", + .llvm_name = "atmega32u6", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega406 = Cpu{ + .name = "atmega406", + .llvm_name = "atmega406", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega48 = Cpu{ + .name = "atmega48", + .llvm_name = "atmega48", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega48a = Cpu{ + .name = "atmega48a", + .llvm_name = "atmega48a", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega48p = Cpu{ + .name = "atmega48p", + .llvm_name = "atmega48p", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega48pa = Cpu{ + .name = "atmega48pa", + .llvm_name = "atmega48pa", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega64 = Cpu{ + .name = "atmega64", + .llvm_name = "atmega64", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega640 = Cpu{ + .name = "atmega640", + .llvm_name = "atmega640", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega644 = Cpu{ + .name = "atmega644", + .llvm_name = "atmega644", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega644a = Cpu{ + .name = "atmega644a", + .llvm_name = "atmega644a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega644p = Cpu{ + .name = "atmega644p", + .llvm_name = "atmega644p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega644pa = Cpu{ + .name = "atmega644pa", + .llvm_name = "atmega644pa", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega644rfr2 = Cpu{ + .name = "atmega644rfr2", + .llvm_name = "atmega644rfr2", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega645 = Cpu{ + .name = "atmega645", + .llvm_name = "atmega645", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6450 = Cpu{ + .name = "atmega6450", + .llvm_name = "atmega6450", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6450a = Cpu{ + .name = "atmega6450a", + .llvm_name = "atmega6450a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6450p = Cpu{ + .name = "atmega6450p", + .llvm_name = "atmega6450p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega645a = Cpu{ + .name = "atmega645a", + .llvm_name = "atmega645a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega645p = Cpu{ + .name = "atmega645p", + .llvm_name = "atmega645p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega649 = Cpu{ + .name = "atmega649", + .llvm_name = "atmega649", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6490 = Cpu{ + .name = "atmega6490", + .llvm_name = "atmega6490", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6490a = Cpu{ + .name = "atmega6490a", + .llvm_name = "atmega6490a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega6490p = Cpu{ + .name = "atmega6490p", + .llvm_name = "atmega6490p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega649a = Cpu{ + .name = "atmega649a", + .llvm_name = "atmega649a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega649p = Cpu{ + .name = "atmega649p", + .llvm_name = "atmega649p", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega64a = Cpu{ + .name = "atmega64a", + .llvm_name = "atmega64a", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega64c1 = Cpu{ + .name = "atmega64c1", + .llvm_name = "atmega64c1", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega64hve = Cpu{ + .name = "atmega64hve", + .llvm_name = "atmega64hve", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega64m1 = Cpu{ + .name = "atmega64m1", + .llvm_name = "atmega64m1", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega64rfr2 = Cpu{ + .name = "atmega64rfr2", + .llvm_name = "atmega64rfr2", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const atmega8 = Cpu{ + .name = "atmega8", + .llvm_name = "atmega8", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega8515 = Cpu{ + .name = "atmega8515", + .llvm_name = "atmega8515", + .features = featureSet(&[_]Feature{ + .avr2, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + pub const atmega8535 = Cpu{ + .name = "atmega8535", + .llvm_name = "atmega8535", + .features = featureSet(&[_]Feature{ + .avr2, + .lpmx, + .movw, + .mul, + .spm, + }), + }; + pub const atmega88 = Cpu{ + .name = "atmega88", + .llvm_name = "atmega88", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega88a = Cpu{ + .name = "atmega88a", + .llvm_name = "atmega88a", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega88p = Cpu{ + .name = "atmega88p", + .llvm_name = "atmega88p", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega88pa = Cpu{ + .name = "atmega88pa", + .llvm_name = "atmega88pa", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega8a = Cpu{ + .name = "atmega8a", + .llvm_name = "atmega8a", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega8hva = Cpu{ + .name = "atmega8hva", + .llvm_name = "atmega8hva", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const atmega8u2 = Cpu{ + .name = "atmega8u2", + .llvm_name = "atmega8u2", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const attiny10 = Cpu{ + .name = "attiny10", + .llvm_name = "attiny10", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny102 = Cpu{ + .name = "attiny102", + .llvm_name = "attiny102", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny104 = Cpu{ + .name = "attiny104", + .llvm_name = "attiny104", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny11 = Cpu{ + .name = "attiny11", + .llvm_name = "attiny11", + .features = featureSet(&[_]Feature{ + .avr1, + }), + }; + pub const attiny12 = Cpu{ + .name = "attiny12", + .llvm_name = "attiny12", + .features = featureSet(&[_]Feature{ + .avr1, + }), + }; + pub const attiny13 = Cpu{ + .name = "attiny13", + .llvm_name = "attiny13", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny13a = Cpu{ + .name = "attiny13a", + .llvm_name = "attiny13a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny15 = Cpu{ + .name = "attiny15", + .llvm_name = "attiny15", + .features = featureSet(&[_]Feature{ + .avr1, + }), + }; + pub const attiny1634 = Cpu{ + .name = "attiny1634", + .llvm_name = "attiny1634", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const attiny167 = Cpu{ + .name = "attiny167", + .llvm_name = "attiny167", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const attiny20 = Cpu{ + .name = "attiny20", + .llvm_name = "attiny20", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny22 = Cpu{ + .name = "attiny22", + .llvm_name = "attiny22", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const attiny2313 = Cpu{ + .name = "attiny2313", + .llvm_name = "attiny2313", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny2313a = Cpu{ + .name = "attiny2313a", + .llvm_name = "attiny2313a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny24 = Cpu{ + .name = "attiny24", + .llvm_name = "attiny24", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny24a = Cpu{ + .name = "attiny24a", + .llvm_name = "attiny24a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny25 = Cpu{ + .name = "attiny25", + .llvm_name = "attiny25", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny26 = Cpu{ + .name = "attiny26", + .llvm_name = "attiny26", + .features = featureSet(&[_]Feature{ + .avr2, + .lpmx, + }), + }; + pub const attiny261 = Cpu{ + .name = "attiny261", + .llvm_name = "attiny261", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny261a = Cpu{ + .name = "attiny261a", + .llvm_name = "attiny261a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny28 = Cpu{ + .name = "attiny28", + .llvm_name = "attiny28", + .features = featureSet(&[_]Feature{ + .avr1, + }), + }; + pub const attiny4 = Cpu{ + .name = "attiny4", + .llvm_name = "attiny4", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny40 = Cpu{ + .name = "attiny40", + .llvm_name = "attiny40", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny4313 = Cpu{ + .name = "attiny4313", + .llvm_name = "attiny4313", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny43u = Cpu{ + .name = "attiny43u", + .llvm_name = "attiny43u", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny44 = Cpu{ + .name = "attiny44", + .llvm_name = "attiny44", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny44a = Cpu{ + .name = "attiny44a", + .llvm_name = "attiny44a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny45 = Cpu{ + .name = "attiny45", + .llvm_name = "attiny45", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny461 = Cpu{ + .name = "attiny461", + .llvm_name = "attiny461", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny461a = Cpu{ + .name = "attiny461a", + .llvm_name = "attiny461a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny48 = Cpu{ + .name = "attiny48", + .llvm_name = "attiny48", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny5 = Cpu{ + .name = "attiny5", + .llvm_name = "attiny5", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const attiny828 = Cpu{ + .name = "attiny828", + .llvm_name = "attiny828", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny84 = Cpu{ + .name = "attiny84", + .llvm_name = "attiny84", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny84a = Cpu{ + .name = "attiny84a", + .llvm_name = "attiny84a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny85 = Cpu{ + .name = "attiny85", + .llvm_name = "attiny85", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny861 = Cpu{ + .name = "attiny861", + .llvm_name = "attiny861", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny861a = Cpu{ + .name = "attiny861a", + .llvm_name = "attiny861a", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny87 = Cpu{ + .name = "attiny87", + .llvm_name = "attiny87", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny88 = Cpu{ + .name = "attiny88", + .llvm_name = "attiny88", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const attiny9 = Cpu{ + .name = "attiny9", + .llvm_name = "attiny9", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const atxmega128a1 = Cpu{ + .name = "atxmega128a1", + .llvm_name = "atxmega128a1", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega128a1u = Cpu{ + .name = "atxmega128a1u", + .llvm_name = "atxmega128a1u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128a3 = Cpu{ + .name = "atxmega128a3", + .llvm_name = "atxmega128a3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega128a3u = Cpu{ + .name = "atxmega128a3u", + .llvm_name = "atxmega128a3u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128a4u = Cpu{ + .name = "atxmega128a4u", + .llvm_name = "atxmega128a4u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128b1 = Cpu{ + .name = "atxmega128b1", + .llvm_name = "atxmega128b1", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128b3 = Cpu{ + .name = "atxmega128b3", + .llvm_name = "atxmega128b3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128c3 = Cpu{ + .name = "atxmega128c3", + .llvm_name = "atxmega128c3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega128d3 = Cpu{ + .name = "atxmega128d3", + .llvm_name = "atxmega128d3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega128d4 = Cpu{ + .name = "atxmega128d4", + .llvm_name = "atxmega128d4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega16a4 = Cpu{ + .name = "atxmega16a4", + .llvm_name = "atxmega16a4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega16a4u = Cpu{ + .name = "atxmega16a4u", + .llvm_name = "atxmega16a4u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega16c4 = Cpu{ + .name = "atxmega16c4", + .llvm_name = "atxmega16c4", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega16d4 = Cpu{ + .name = "atxmega16d4", + .llvm_name = "atxmega16d4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega16e5 = Cpu{ + .name = "atxmega16e5", + .llvm_name = "atxmega16e5", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega192a3 = Cpu{ + .name = "atxmega192a3", + .llvm_name = "atxmega192a3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega192a3u = Cpu{ + .name = "atxmega192a3u", + .llvm_name = "atxmega192a3u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega192c3 = Cpu{ + .name = "atxmega192c3", + .llvm_name = "atxmega192c3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega192d3 = Cpu{ + .name = "atxmega192d3", + .llvm_name = "atxmega192d3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega256a3 = Cpu{ + .name = "atxmega256a3", + .llvm_name = "atxmega256a3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega256a3b = Cpu{ + .name = "atxmega256a3b", + .llvm_name = "atxmega256a3b", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega256a3bu = Cpu{ + .name = "atxmega256a3bu", + .llvm_name = "atxmega256a3bu", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega256a3u = Cpu{ + .name = "atxmega256a3u", + .llvm_name = "atxmega256a3u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega256c3 = Cpu{ + .name = "atxmega256c3", + .llvm_name = "atxmega256c3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega256d3 = Cpu{ + .name = "atxmega256d3", + .llvm_name = "atxmega256d3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega32a4 = Cpu{ + .name = "atxmega32a4", + .llvm_name = "atxmega32a4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega32a4u = Cpu{ + .name = "atxmega32a4u", + .llvm_name = "atxmega32a4u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega32c4 = Cpu{ + .name = "atxmega32c4", + .llvm_name = "atxmega32c4", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega32d4 = Cpu{ + .name = "atxmega32d4", + .llvm_name = "atxmega32d4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega32e5 = Cpu{ + .name = "atxmega32e5", + .llvm_name = "atxmega32e5", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega32x1 = Cpu{ + .name = "atxmega32x1", + .llvm_name = "atxmega32x1", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega384c3 = Cpu{ + .name = "atxmega384c3", + .llvm_name = "atxmega384c3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega384d3 = Cpu{ + .name = "atxmega384d3", + .llvm_name = "atxmega384d3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega64a1 = Cpu{ + .name = "atxmega64a1", + .llvm_name = "atxmega64a1", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega64a1u = Cpu{ + .name = "atxmega64a1u", + .llvm_name = "atxmega64a1u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64a3 = Cpu{ + .name = "atxmega64a3", + .llvm_name = "atxmega64a3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega64a3u = Cpu{ + .name = "atxmega64a3u", + .llvm_name = "atxmega64a3u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64a4u = Cpu{ + .name = "atxmega64a4u", + .llvm_name = "atxmega64a4u", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64b1 = Cpu{ + .name = "atxmega64b1", + .llvm_name = "atxmega64b1", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64b3 = Cpu{ + .name = "atxmega64b3", + .llvm_name = "atxmega64b3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64c3 = Cpu{ + .name = "atxmega64c3", + .llvm_name = "atxmega64c3", + .features = featureSet(&[_]Feature{ + .xmegau, + }), + }; + pub const atxmega64d3 = Cpu{ + .name = "atxmega64d3", + .llvm_name = "atxmega64d3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega64d4 = Cpu{ + .name = "atxmega64d4", + .llvm_name = "atxmega64d4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const atxmega8e5 = Cpu{ + .name = "atxmega8e5", + .llvm_name = "atxmega8e5", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avr1 = Cpu{ + .name = "avr1", + .llvm_name = "avr1", + .features = featureSet(&[_]Feature{ + .avr1, + }), + }; + pub const avr2 = Cpu{ + .name = "avr2", + .llvm_name = "avr2", + .features = featureSet(&[_]Feature{ + .avr2, + }), + }; + pub const avr25 = Cpu{ + .name = "avr25", + .llvm_name = "avr25", + .features = featureSet(&[_]Feature{ + .avr25, + }), + }; + pub const avr3 = Cpu{ + .name = "avr3", + .llvm_name = "avr3", + .features = featureSet(&[_]Feature{ + .avr3, + }), + }; + pub const avr31 = Cpu{ + .name = "avr31", + .llvm_name = "avr31", + .features = featureSet(&[_]Feature{ + .avr31, + }), + }; + pub const avr35 = Cpu{ + .name = "avr35", + .llvm_name = "avr35", + .features = featureSet(&[_]Feature{ + .avr35, + }), + }; + pub const avr4 = Cpu{ + .name = "avr4", + .llvm_name = "avr4", + .features = featureSet(&[_]Feature{ + .avr4, + }), + }; + pub const avr5 = Cpu{ + .name = "avr5", + .llvm_name = "avr5", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; + pub const avr51 = Cpu{ + .name = "avr51", + .llvm_name = "avr51", + .features = featureSet(&[_]Feature{ + .avr51, + }), + }; + pub const avr6 = Cpu{ + .name = "avr6", + .llvm_name = "avr6", + .features = featureSet(&[_]Feature{ + .avr6, + }), + }; + pub const avrtiny = Cpu{ + .name = "avrtiny", + .llvm_name = "avrtiny", + .features = featureSet(&[_]Feature{ + .avrtiny, + }), + }; + pub const avrxmega1 = Cpu{ + .name = "avrxmega1", + .llvm_name = "avrxmega1", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega2 = Cpu{ + .name = "avrxmega2", + .llvm_name = "avrxmega2", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega3 = Cpu{ + .name = "avrxmega3", + .llvm_name = "avrxmega3", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega4 = Cpu{ + .name = "avrxmega4", + .llvm_name = "avrxmega4", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega5 = Cpu{ + .name = "avrxmega5", + .llvm_name = "avrxmega5", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega6 = Cpu{ + .name = "avrxmega6", + .llvm_name = "avrxmega6", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const avrxmega7 = Cpu{ + .name = "avrxmega7", + .llvm_name = "avrxmega7", + .features = featureSet(&[_]Feature{ + .xmega, + }), + }; + pub const m3000 = Cpu{ + .name = "m3000", + .llvm_name = "m3000", + .features = featureSet(&[_]Feature{ + .avr5, + }), + }; +}; + +/// All avr CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.at43usb320, + &cpu.at43usb355, + &cpu.at76c711, + &cpu.at86rf401, + &cpu.at90c8534, + &cpu.at90can128, + &cpu.at90can32, + &cpu.at90can64, + &cpu.at90pwm1, + &cpu.at90pwm161, + &cpu.at90pwm2, + &cpu.at90pwm216, + &cpu.at90pwm2b, + &cpu.at90pwm3, + &cpu.at90pwm316, + &cpu.at90pwm3b, + &cpu.at90pwm81, + &cpu.at90s1200, + &cpu.at90s2313, + &cpu.at90s2323, + &cpu.at90s2333, + &cpu.at90s2343, + &cpu.at90s4414, + &cpu.at90s4433, + &cpu.at90s4434, + &cpu.at90s8515, + &cpu.at90s8535, + &cpu.at90scr100, + &cpu.at90usb1286, + &cpu.at90usb1287, + &cpu.at90usb162, + &cpu.at90usb646, + &cpu.at90usb647, + &cpu.at90usb82, + &cpu.at94k, + &cpu.ata5272, + &cpu.ata5505, + &cpu.ata5790, + &cpu.ata5795, + &cpu.ata6285, + &cpu.ata6286, + &cpu.ata6289, + &cpu.atmega103, + &cpu.atmega128, + &cpu.atmega1280, + &cpu.atmega1281, + &cpu.atmega1284, + &cpu.atmega1284p, + &cpu.atmega1284rfr2, + &cpu.atmega128a, + &cpu.atmega128rfa1, + &cpu.atmega128rfr2, + &cpu.atmega16, + &cpu.atmega161, + &cpu.atmega162, + &cpu.atmega163, + &cpu.atmega164a, + &cpu.atmega164p, + &cpu.atmega164pa, + &cpu.atmega165, + &cpu.atmega165a, + &cpu.atmega165p, + &cpu.atmega165pa, + &cpu.atmega168, + &cpu.atmega168a, + &cpu.atmega168p, + &cpu.atmega168pa, + &cpu.atmega169, + &cpu.atmega169a, + &cpu.atmega169p, + &cpu.atmega169pa, + &cpu.atmega16a, + &cpu.atmega16hva, + &cpu.atmega16hva2, + &cpu.atmega16hvb, + &cpu.atmega16hvbrevb, + &cpu.atmega16m1, + &cpu.atmega16u2, + &cpu.atmega16u4, + &cpu.atmega2560, + &cpu.atmega2561, + &cpu.atmega2564rfr2, + &cpu.atmega256rfr2, + &cpu.atmega32, + &cpu.atmega323, + &cpu.atmega324a, + &cpu.atmega324p, + &cpu.atmega324pa, + &cpu.atmega325, + &cpu.atmega3250, + &cpu.atmega3250a, + &cpu.atmega3250p, + &cpu.atmega3250pa, + &cpu.atmega325a, + &cpu.atmega325p, + &cpu.atmega325pa, + &cpu.atmega328, + &cpu.atmega328p, + &cpu.atmega329, + &cpu.atmega3290, + &cpu.atmega3290a, + &cpu.atmega3290p, + &cpu.atmega3290pa, + &cpu.atmega329a, + &cpu.atmega329p, + &cpu.atmega329pa, + &cpu.atmega32a, + &cpu.atmega32c1, + &cpu.atmega32hvb, + &cpu.atmega32hvbrevb, + &cpu.atmega32m1, + &cpu.atmega32u2, + &cpu.atmega32u4, + &cpu.atmega32u6, + &cpu.atmega406, + &cpu.atmega48, + &cpu.atmega48a, + &cpu.atmega48p, + &cpu.atmega48pa, + &cpu.atmega64, + &cpu.atmega640, + &cpu.atmega644, + &cpu.atmega644a, + &cpu.atmega644p, + &cpu.atmega644pa, + &cpu.atmega644rfr2, + &cpu.atmega645, + &cpu.atmega6450, + &cpu.atmega6450a, + &cpu.atmega6450p, + &cpu.atmega645a, + &cpu.atmega645p, + &cpu.atmega649, + &cpu.atmega6490, + &cpu.atmega6490a, + &cpu.atmega6490p, + &cpu.atmega649a, + &cpu.atmega649p, + &cpu.atmega64a, + &cpu.atmega64c1, + &cpu.atmega64hve, + &cpu.atmega64m1, + &cpu.atmega64rfr2, + &cpu.atmega8, + &cpu.atmega8515, + &cpu.atmega8535, + &cpu.atmega88, + &cpu.atmega88a, + &cpu.atmega88p, + &cpu.atmega88pa, + &cpu.atmega8a, + &cpu.atmega8hva, + &cpu.atmega8u2, + &cpu.attiny10, + &cpu.attiny102, + &cpu.attiny104, + &cpu.attiny11, + &cpu.attiny12, + &cpu.attiny13, + &cpu.attiny13a, + &cpu.attiny15, + &cpu.attiny1634, + &cpu.attiny167, + &cpu.attiny20, + &cpu.attiny22, + &cpu.attiny2313, + &cpu.attiny2313a, + &cpu.attiny24, + &cpu.attiny24a, + &cpu.attiny25, + &cpu.attiny26, + &cpu.attiny261, + &cpu.attiny261a, + &cpu.attiny28, + &cpu.attiny4, + &cpu.attiny40, + &cpu.attiny4313, + &cpu.attiny43u, + &cpu.attiny44, + &cpu.attiny44a, + &cpu.attiny45, + &cpu.attiny461, + &cpu.attiny461a, + &cpu.attiny48, + &cpu.attiny5, + &cpu.attiny828, + &cpu.attiny84, + &cpu.attiny84a, + &cpu.attiny85, + &cpu.attiny861, + &cpu.attiny861a, + &cpu.attiny87, + &cpu.attiny88, + &cpu.attiny9, + &cpu.atxmega128a1, + &cpu.atxmega128a1u, + &cpu.atxmega128a3, + &cpu.atxmega128a3u, + &cpu.atxmega128a4u, + &cpu.atxmega128b1, + &cpu.atxmega128b3, + &cpu.atxmega128c3, + &cpu.atxmega128d3, + &cpu.atxmega128d4, + &cpu.atxmega16a4, + &cpu.atxmega16a4u, + &cpu.atxmega16c4, + &cpu.atxmega16d4, + &cpu.atxmega16e5, + &cpu.atxmega192a3, + &cpu.atxmega192a3u, + &cpu.atxmega192c3, + &cpu.atxmega192d3, + &cpu.atxmega256a3, + &cpu.atxmega256a3b, + &cpu.atxmega256a3bu, + &cpu.atxmega256a3u, + &cpu.atxmega256c3, + &cpu.atxmega256d3, + &cpu.atxmega32a4, + &cpu.atxmega32a4u, + &cpu.atxmega32c4, + &cpu.atxmega32d4, + &cpu.atxmega32e5, + &cpu.atxmega32x1, + &cpu.atxmega384c3, + &cpu.atxmega384d3, + &cpu.atxmega64a1, + &cpu.atxmega64a1u, + &cpu.atxmega64a3, + &cpu.atxmega64a3u, + &cpu.atxmega64a4u, + &cpu.atxmega64b1, + &cpu.atxmega64b3, + &cpu.atxmega64c3, + &cpu.atxmega64d3, + &cpu.atxmega64d4, + &cpu.atxmega8e5, + &cpu.avr1, + &cpu.avr2, + &cpu.avr25, + &cpu.avr3, + &cpu.avr31, + &cpu.avr35, + &cpu.avr4, + &cpu.avr5, + &cpu.avr51, + &cpu.avr6, + &cpu.avrtiny, + &cpu.avrxmega1, + &cpu.avrxmega2, + &cpu.avrxmega3, + &cpu.avrxmega4, + &cpu.avrxmega5, + &cpu.avrxmega6, + &cpu.avrxmega7, + &cpu.m3000, }; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 62c69746f8e9a0171d75050e9efa3d102876cac0..bb10a84ff8d36d7c2773a9c6155e1f6c9bcbea76 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -1,75 +1,77 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; -pub const feature_alu32 = Feature{ - .name = "alu32", - .llvm_name = "alu32", - .description = "Enable ALU32 instructions", - .dependencies = &[_]*const Feature { - }, +pub const Feature = enum { + alu32, + dummy, + dwarfris, }; -pub const feature_dummy = Feature{ - .name = "dummy", - .llvm_name = "dummy", - .description = "unused feature", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dwarfris = Feature{ - .name = "dwarfris", - .llvm_name = "dwarfris", - .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_alu32, - &feature_dummy, - &feature_dwarfris, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_probe = Cpu{ - .name = "probe", - .llvm_name = "probe", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_v1 = Cpu{ - .name = "v1", - .llvm_name = "v1", - .dependencies = &[_]*const Feature { - }, -}; +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); -pub const cpu_v2 = Cpu{ - .name = "v2", - .llvm_name = "v2", - .dependencies = &[_]*const Feature { - }, +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.alu32)] = .{ + .index = @enumToInt(Feature.alu32), + .name = @tagName(Feature.alu32), + .llvm_name = "alu32", + .description = "Enable ALU32 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.dummy)] = .{ + .index = @enumToInt(Feature.dummy), + .name = @tagName(Feature.dummy), + .llvm_name = "dummy", + .description = "unused feature", + .dependencies = 0, + }; + result[@enumToInt(Feature.dwarfris)] = .{ + .index = @enumToInt(Feature.dwarfris), + .name = @tagName(Feature.dwarfris), + .llvm_name = "dwarfris", + .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", + .dependencies = 0, + }; + break :blk result; }; -pub const cpu_v3 = Cpu{ - .name = "v3", - .llvm_name = "v3", - .dependencies = &[_]*const Feature { - }, +pub const cpu = struct { + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const probe = Cpu{ + .name = "probe", + .llvm_name = "probe", + .features = 0, + }; + pub const v1 = Cpu{ + .name = "v1", + .llvm_name = "v1", + .features = 0, + }; + pub const v2 = Cpu{ + .name = "v2", + .llvm_name = "v2", + .features = 0, + }; + pub const v3 = Cpu{ + .name = "v3", + .llvm_name = "v3", + .features = 0, + }; }; -pub const cpus = &[_]*const Cpu { - &cpu_generic, - &cpu_probe, - &cpu_v1, - &cpu_v2, - &cpu_v3, +/// All bpf CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.generic, + &cpu.probe, + &cpu.v1, + &cpu.v2, + &cpu.v3, }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 54f59d651afd85dc633e507d461f43c63bbce46c..441abb9cbd1eb4ff26589c49fdcde83e5a0a91eb 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -1,200 +1,355 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; -pub const feature_duplex = Feature{ - .name = "duplex", - .llvm_name = "duplex", - .description = "Enable generation of duplex instruction", - .dependencies = &[_]*const Feature { - }, +pub const Feature = enum { + duplex, + hvx, + hvx_length128b, + hvx_length64b, + hvxv60, + hvxv62, + hvxv65, + hvxv66, + long_calls, + mem_noshuf, + memops, + noreturn_stack_elim, + nvj, + nvs, + packets, + reserved_r19, + small_data, + v5, + v55, + v60, + v62, + v65, + v66, + zreg, }; -pub const feature_longCalls = Feature{ - .name = "longCalls", - .llvm_name = "long-calls", - .description = "Use constant-extended calls", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mem_noshuf = Feature{ - .name = "mem_noshuf", - .llvm_name = "mem_noshuf", - .description = "Supports mem_noshuf feature", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_memops = Feature{ - .name = "memops", - .llvm_name = "memops", - .description = "Use memop instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nvj = Feature{ - .name = "nvj", - .llvm_name = "nvj", - .description = "Support for new-value jumps", - .dependencies = &[_]*const Feature { - &feature_packets, - }, -}; - -pub const feature_nvs = Feature{ - .name = "nvs", - .llvm_name = "nvs", - .description = "Support for new-value stores", - .dependencies = &[_]*const Feature { - &feature_packets, - }, -}; - -pub const feature_noreturnStackElim = Feature{ - .name = "noreturnStackElim", - .llvm_name = "noreturn-stack-elim", - .description = "Eliminate stack allocation in a noreturn function when possible", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_packets = Feature{ - .name = "packets", - .llvm_name = "packets", - .description = "Support for instruction packets", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_reservedR19 = Feature{ - .name = "reservedR19", - .llvm_name = "reserved-r19", - .description = "Reserve register R19", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_smallData = Feature{ - .name = "smallData", - .llvm_name = "small-data", - .description = "Allow GP-relative addressing of global variables", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_duplex, - &feature_longCalls, - &feature_mem_noshuf, - &feature_memops, - &feature_nvj, - &feature_nvs, - &feature_noreturnStackElim, - &feature_packets, - &feature_reservedR19, - &feature_smallData, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, -}; - -pub const cpu_hexagonv5 = Cpu{ - .name = "hexagonv5", - .llvm_name = "hexagonv5", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, -}; - -pub const cpu_hexagonv55 = Cpu{ - .name = "hexagonv55", - .llvm_name = "hexagonv55", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, -}; - -pub const cpu_hexagonv60 = Cpu{ - .name = "hexagonv60", - .llvm_name = "hexagonv60", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, -}; - -pub const cpu_hexagonv62 = Cpu{ - .name = "hexagonv62", - .llvm_name = "hexagonv62", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, -}; +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); -pub const cpu_hexagonv65 = Cpu{ - .name = "hexagonv65", - .llvm_name = "hexagonv65", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_mem_noshuf, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.duplex)] = .{ + .index = @enumToInt(Feature.duplex), + .name = @tagName(Feature.duplex), + .llvm_name = "duplex", + .description = "Enable generation of duplex instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.hvx)] = .{ + .index = @enumToInt(Feature.hvx), + .name = @tagName(Feature.hvx), + .llvm_name = "hvx", + .description = "Hexagon HVX instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.hvx_length128b)] = .{ + .index = @enumToInt(Feature.hvx_length128b), + .name = @tagName(Feature.hvx_length128b), + .llvm_name = "hvx-length128b", + .description = "Hexagon HVX 128B instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + }), + }; + result[@enumToInt(Feature.hvx_length64b)] = .{ + .index = @enumToInt(Feature.hvx_length64b), + .name = @tagName(Feature.hvx_length64b), + .llvm_name = "hvx-length64b", + .description = "Hexagon HVX 64B instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + }), + }; + result[@enumToInt(Feature.hvxv60)] = .{ + .index = @enumToInt(Feature.hvxv60), + .name = @tagName(Feature.hvxv60), + .llvm_name = "hvxv60", + .description = "Hexagon HVX instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + }), + }; + result[@enumToInt(Feature.hvxv62)] = .{ + .index = @enumToInt(Feature.hvxv62), + .name = @tagName(Feature.hvxv62), + .llvm_name = "hvxv62", + .description = "Hexagon HVX instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + .hvxv60, + }), + }; + result[@enumToInt(Feature.hvxv65)] = .{ + .index = @enumToInt(Feature.hvxv65), + .name = @tagName(Feature.hvxv65), + .llvm_name = "hvxv65", + .description = "Hexagon HVX instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + .hvxv60, + .hvxv62, + }), + }; + result[@enumToInt(Feature.hvxv66)] = .{ + .index = @enumToInt(Feature.hvxv66), + .name = @tagName(Feature.hvxv66), + .llvm_name = "hvxv66", + .description = "Hexagon HVX instructions", + .dependencies = featureSet(&[_]Feature{ + .hvx, + .hvxv60, + .hvxv62, + .hvxv65, + .zreg, + }), + }; + result[@enumToInt(Feature.long_calls)] = .{ + .index = @enumToInt(Feature.long_calls), + .name = @tagName(Feature.long_calls), + .llvm_name = "long-calls", + .description = "Use constant-extended calls", + .dependencies = 0, + }; + result[@enumToInt(Feature.mem_noshuf)] = .{ + .index = @enumToInt(Feature.mem_noshuf), + .name = @tagName(Feature.mem_noshuf), + .llvm_name = "mem_noshuf", + .description = "Supports mem_noshuf feature", + .dependencies = 0, + }; + result[@enumToInt(Feature.memops)] = .{ + .index = @enumToInt(Feature.memops), + .name = @tagName(Feature.memops), + .llvm_name = "memops", + .description = "Use memop instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.noreturn_stack_elim)] = .{ + .index = @enumToInt(Feature.noreturn_stack_elim), + .name = @tagName(Feature.noreturn_stack_elim), + .llvm_name = "noreturn-stack-elim", + .description = "Eliminate stack allocation in a noreturn function when possible", + .dependencies = 0, + }; + result[@enumToInt(Feature.nvj)] = .{ + .index = @enumToInt(Feature.nvj), + .name = @tagName(Feature.nvj), + .llvm_name = "nvj", + .description = "Support for new-value jumps", + .dependencies = featureSet(&[_]Feature{ + .packets, + }), + }; + result[@enumToInt(Feature.nvs)] = .{ + .index = @enumToInt(Feature.nvs), + .name = @tagName(Feature.nvs), + .llvm_name = "nvs", + .description = "Support for new-value stores", + .dependencies = featureSet(&[_]Feature{ + .packets, + }), + }; + result[@enumToInt(Feature.packets)] = .{ + .index = @enumToInt(Feature.packets), + .name = @tagName(Feature.packets), + .llvm_name = "packets", + .description = "Support for instruction packets", + .dependencies = 0, + }; + result[@enumToInt(Feature.reserved_r19)] = .{ + .index = @enumToInt(Feature.reserved_r19), + .name = @tagName(Feature.reserved_r19), + .llvm_name = "reserved-r19", + .description = "Reserve register R19", + .dependencies = 0, + }; + result[@enumToInt(Feature.small_data)] = .{ + .index = @enumToInt(Feature.small_data), + .name = @tagName(Feature.small_data), + .llvm_name = "small-data", + .description = "Allow GP-relative addressing of global variables", + .dependencies = 0, + }; + result[@enumToInt(Feature.v5)] = .{ + .index = @enumToInt(Feature.v5), + .name = @tagName(Feature.v5), + .llvm_name = "v5", + .description = "Enable Hexagon V5 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.v55)] = .{ + .index = @enumToInt(Feature.v55), + .name = @tagName(Feature.v55), + .llvm_name = "v55", + .description = "Enable Hexagon V55 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.v60)] = .{ + .index = @enumToInt(Feature.v60), + .name = @tagName(Feature.v60), + .llvm_name = "v60", + .description = "Enable Hexagon V60 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.v62)] = .{ + .index = @enumToInt(Feature.v62), + .name = @tagName(Feature.v62), + .llvm_name = "v62", + .description = "Enable Hexagon V62 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.v65)] = .{ + .index = @enumToInt(Feature.v65), + .name = @tagName(Feature.v65), + .llvm_name = "v65", + .description = "Enable Hexagon V65 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.v66)] = .{ + .index = @enumToInt(Feature.v66), + .name = @tagName(Feature.v66), + .llvm_name = "v66", + .description = "Enable Hexagon V66 architecture", + .dependencies = 0, + }; + result[@enumToInt(Feature.zreg)] = .{ + .index = @enumToInt(Feature.zreg), + .name = @tagName(Feature.zreg), + .llvm_name = "zreg", + .description = "Hexagon ZReg extension instructions", + .dependencies = 0, + }; + break :blk result; }; -pub const cpu_hexagonv66 = Cpu{ - .name = "hexagonv66", - .llvm_name = "hexagonv66", - .dependencies = &[_]*const Feature { - &feature_duplex, - &feature_mem_noshuf, - &feature_memops, - &feature_packets, - &feature_nvj, - &feature_nvs, - &feature_smallData, - }, +pub const cpu = struct { + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .duplex, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + .v60, + }), + }; + pub const hexagonv5 = Cpu{ + .name = "hexagonv5", + .llvm_name = "hexagonv5", + .features = featureSet(&[_]Feature{ + .duplex, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + }), + }; + pub const hexagonv55 = Cpu{ + .name = "hexagonv55", + .llvm_name = "hexagonv55", + .features = featureSet(&[_]Feature{ + .duplex, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + }), + }; + pub const hexagonv60 = Cpu{ + .name = "hexagonv60", + .llvm_name = "hexagonv60", + .features = featureSet(&[_]Feature{ + .duplex, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + .v60, + }), + }; + pub const hexagonv62 = Cpu{ + .name = "hexagonv62", + .llvm_name = "hexagonv62", + .features = featureSet(&[_]Feature{ + .duplex, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + .v60, + .v62, + }), + }; + pub const hexagonv65 = Cpu{ + .name = "hexagonv65", + .llvm_name = "hexagonv65", + .features = featureSet(&[_]Feature{ + .duplex, + .mem_noshuf, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + .v60, + .v62, + .v65, + }), + }; + pub const hexagonv66 = Cpu{ + .name = "hexagonv66", + .llvm_name = "hexagonv66", + .features = featureSet(&[_]Feature{ + .duplex, + .mem_noshuf, + .memops, + .nvj, + .nvs, + .packets, + .small_data, + .v5, + .v55, + .v60, + .v62, + .v65, + .v66, + }), + }; }; -pub const cpus = &[_]*const Cpu { - &cpu_generic, - &cpu_hexagonv5, - &cpu_hexagonv55, - &cpu_hexagonv60, - &cpu_hexagonv62, - &cpu_hexagonv65, - &cpu_hexagonv66, +/// All hexagon CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.generic, + &cpu.hexagonv5, + &cpu.hexagonv55, + &cpu.hexagonv60, + &cpu.hexagonv62, + &cpu.hexagonv65, + &cpu.hexagonv66, }; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 7c7bb3bfbe2df1f3e67ff395d943505b0d5eb4f5..d4f9df4fbbbad855eb2521839e89f61c4214346a 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -1,819 +1,611 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_abs2008 = Feature{ - .name = "abs2008", - .llvm_name = "abs2008", - .description = "Disable IEEE 754-2008 abs.fmt mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_crc = Feature{ - .name = "crc", - .llvm_name = "crc", - .description = "Mips R6 CRC ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_cnmips = Feature{ - .name = "cnmips", - .llvm_name = "cnmips", - .description = "Octeon cnMIPS Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_dsp = Feature{ - .name = "dsp", - .llvm_name = "dsp", - .description = "Mips DSP ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dspr2 = Feature{ - .name = "dspr2", - .llvm_name = "dspr2", - .description = "Mips DSP-R2 ASE", - .dependencies = &[_]*const Feature { - &feature_dsp, - }, -}; - -pub const feature_dspr3 = Feature{ - .name = "dspr3", - .llvm_name = "dspr3", - .description = "Mips DSP-R3 ASE", - .dependencies = &[_]*const Feature { - &feature_dsp, - }, -}; - -pub const feature_eva = Feature{ - .name = "eva", - .llvm_name = "eva", - .description = "Mips EVA ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fp64 = Feature{ - .name = "fp64", - .llvm_name = "fp64", - .description = "Support 64-bit FP registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fpxx = Feature{ - .name = "fpxx", - .llvm_name = "fpxx", - .description = "Support for FPXX", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ginv = Feature{ - .name = "ginv", - .llvm_name = "ginv", - .description = "Mips Global Invalidate ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_gp64 = Feature{ - .name = "gp64", - .llvm_name = "gp64", - .description = "General Purpose Registers are 64-bit wide", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_longCalls = Feature{ - .name = "longCalls", - .llvm_name = "long-calls", - .description = "Disable use of the jal instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_msa = Feature{ - .name = "msa", - .llvm_name = "msa", - .description = "Mips MSA ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mt = Feature{ - .name = "mt", - .llvm_name = "mt", - .description = "Mips MT ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nomadd4 = Feature{ - .name = "nomadd4", - .llvm_name = "nomadd4", - .description = "Disable 4-operand madd.fmt and related instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_micromips = Feature{ - .name = "micromips", - .llvm_name = "micromips", - .description = "microMips mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips1 = Feature{ - .name = "mips1", - .llvm_name = "mips1", - .description = "Mips I ISA Support [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips2 = Feature{ - .name = "mips2", - .llvm_name = "mips2", - .description = "Mips II ISA Support [highly experimental]", - .dependencies = &[_]*const Feature { - &feature_mips1, - }, -}; - -pub const feature_mips3 = Feature{ - .name = "mips3", - .llvm_name = "mips3", - .description = "MIPS III ISA Support [highly experimental]", - .dependencies = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips3_32 = Feature{ - .name = "mips3_32", - .llvm_name = "mips3_32", - .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips3_32r2 = Feature{ - .name = "mips3_32r2", - .llvm_name = "mips3_32r2", - .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips4 = Feature{ - .name = "mips4", - .llvm_name = "mips4", - .description = "MIPS IV ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips4_32 = Feature{ - .name = "mips4_32", - .llvm_name = "mips4_32", - .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips4_32r2 = Feature{ - .name = "mips4_32r2", - .llvm_name = "mips4_32r2", - .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips5 = Feature{ - .name = "mips5", - .llvm_name = "mips5", - .description = "MIPS V ISA Support [highly experimental]", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips5_32r2 = Feature{ - .name = "mips5_32r2", - .llvm_name = "mips5_32r2", - .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips16 = Feature{ - .name = "mips16", - .llvm_name = "mips16", - .description = "Mips16 mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mips32 = Feature{ - .name = "mips32", - .llvm_name = "mips32", - .description = "Mips32 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_mips4_32, - &feature_mips1, - }, -}; - -pub const feature_mips32r2 = Feature{ - .name = "mips32r2", - .llvm_name = "mips32r2", - .description = "Mips32r2 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - }, -}; - -pub const feature_mips32r3 = Feature{ - .name = "mips32r3", - .llvm_name = "mips32r3", - .description = "Mips32r3 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - }, -}; - -pub const feature_mips32r5 = Feature{ - .name = "mips32r5", - .llvm_name = "mips32r5", - .description = "Mips32r5 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - }, -}; - -pub const feature_mips32r6 = Feature{ - .name = "mips32r6", - .llvm_name = "mips32r6", - .description = "Mips32r6 ISA Support [experimental]", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_nan2008, - &feature_mips1, - &feature_fp64, - &feature_abs2008, - }, -}; - -pub const feature_mips64 = Feature{ - .name = "mips64", - .llvm_name = "mips64", - .description = "Mips64 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips64r2 = Feature{ - .name = "mips64r2", - .llvm_name = "mips64r2", - .description = "Mips64r2 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips64r3 = Feature{ - .name = "mips64r3", - .llvm_name = "mips64r3", - .description = "Mips64r3 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips64r5 = Feature{ - .name = "mips64r5", - .llvm_name = "mips64r5", - .description = "Mips64r5 ISA Support", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - }, -}; - -pub const feature_mips64r6 = Feature{ - .name = "mips64r6", - .llvm_name = "mips64r6", - .description = "Mips64r6 ISA Support [experimental]", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_nan2008, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_abs2008, - }, -}; - -pub const feature_nan2008 = Feature{ - .name = "nan2008", - .llvm_name = "nan2008", - .description = "IEEE 754-2008 NaN encoding", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noabicalls = Feature{ - .name = "noabicalls", - .llvm_name = "noabicalls", - .description = "Disable SVR4-style position-independent code", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nooddspreg = Feature{ - .name = "nooddspreg", - .llvm_name = "nooddspreg", - .description = "Disable odd numbered single-precision registers", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptr64 = Feature{ - .name = "ptr64", - .llvm_name = "ptr64", - .description = "Pointers are 64-bit wide", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_singleFloat = Feature{ - .name = "singleFloat", - .llvm_name = "single-float", - .description = "Only supports single precision float", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_softFloat = Feature{ - .name = "softFloat", - .llvm_name = "soft-float", - .description = "Does not support floating point instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sym32 = Feature{ - .name = "sym32", - .llvm_name = "sym32", - .description = "Symbols are 32 bit on Mips64", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useIndirectJumpHazard = Feature{ - .name = "useIndirectJumpHazard", - .llvm_name = "use-indirect-jump-hazard", - .description = "Use indirect jump guards to prevent certain speculation based attacks", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_useTccInDiv = Feature{ - .name = "useTccInDiv", - .llvm_name = "use-tcc-in-div", - .description = "Force the assembler to use trapping", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vfpu = Feature{ - .name = "vfpu", - .llvm_name = "vfpu", - .description = "Enable vector FPU instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_virt = Feature{ - .name = "virt", - .llvm_name = "virt", - .description = "Mips Virtualization ASE", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_p5600 = Feature{ - .name = "p5600", - .llvm_name = "p5600", - .description = "The P5600 Processor", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - }, -}; - -pub const features = &[_]*const Feature { - &feature_abs2008, - &feature_crc, - &feature_cnmips, - &feature_dsp, - &feature_dspr2, - &feature_dspr3, - &feature_eva, - &feature_fp64, - &feature_fpxx, - &feature_ginv, - &feature_gp64, - &feature_longCalls, - &feature_msa, - &feature_mt, - &feature_nomadd4, - &feature_micromips, - &feature_mips1, - &feature_mips2, - &feature_mips3, - &feature_mips3_32, - &feature_mips3_32r2, - &feature_mips4, - &feature_mips4_32, - &feature_mips4_32r2, - &feature_mips5, - &feature_mips5_32r2, - &feature_mips16, - &feature_mips32, - &feature_mips32r2, - &feature_mips32r3, - &feature_mips32r5, - &feature_mips32r6, - &feature_mips64, - &feature_mips64r2, - &feature_mips64r3, - &feature_mips64r5, - &feature_mips64r6, - &feature_nan2008, - &feature_noabicalls, - &feature_nooddspreg, - &feature_ptr64, - &feature_singleFloat, - &feature_softFloat, - &feature_sym32, - &feature_useIndirectJumpHazard, - &feature_useTccInDiv, - &feature_vfpu, - &feature_virt, - &feature_p5600, -}; - -pub const cpu_mips1 = Cpu{ - .name = "mips1", - .llvm_name = "mips1", - .dependencies = &[_]*const Feature { - &feature_mips1, - }, -}; - -pub const cpu_mips2 = Cpu{ - .name = "mips2", - .llvm_name = "mips2", - .dependencies = &[_]*const Feature { - &feature_mips1, - &feature_mips2, - }, -}; - -pub const cpu_mips3 = Cpu{ - .name = "mips3", - .llvm_name = "mips3", - .dependencies = &[_]*const Feature { - &feature_mips3_32r2, - &feature_mips3_32, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips3, - }, -}; - -pub const cpu_mips32 = Cpu{ - .name = "mips32", - .llvm_name = "mips32", - .dependencies = &[_]*const Feature { - &feature_mips3_32, - &feature_mips4_32, - &feature_mips1, - &feature_mips32, - }, -}; - -pub const cpu_mips32r2 = Cpu{ - .name = "mips32r2", - .llvm_name = "mips32r2", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - &feature_mips32r2, - }, -}; - -pub const cpu_mips32r3 = Cpu{ - .name = "mips32r3", - .llvm_name = "mips32r3", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - &feature_mips32r3, - }, -}; - -pub const cpu_mips32r5 = Cpu{ - .name = "mips32r5", - .llvm_name = "mips32r5", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - &feature_mips32r5, - }, -}; - -pub const cpu_mips32r6 = Cpu{ - .name = "mips32r6", - .llvm_name = "mips32r6", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_nan2008, - &feature_mips1, - &feature_fp64, - &feature_abs2008, - &feature_mips32r6, - }, -}; - -pub const cpu_mips4 = Cpu{ - .name = "mips4", - .llvm_name = "mips4", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips4, - }, -}; - -pub const cpu_mips5 = Cpu{ - .name = "mips5", - .llvm_name = "mips5", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips5, - }, -}; - -pub const cpu_mips64 = Cpu{ - .name = "mips64", - .llvm_name = "mips64", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips64, - }, -}; - -pub const cpu_mips64r2 = Cpu{ - .name = "mips64r2", - .llvm_name = "mips64r2", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips64r2, - }, -}; - -pub const cpu_mips64r3 = Cpu{ - .name = "mips64r3", - .llvm_name = "mips64r3", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips64r3, - }, -}; - -pub const cpu_mips64r5 = Cpu{ - .name = "mips64r5", - .llvm_name = "mips64r5", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_mips64r5, - }, -}; - -pub const cpu_mips64r6 = Cpu{ - .name = "mips64r6", - .llvm_name = "mips64r6", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_nan2008, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_abs2008, - &feature_mips64r6, - }, -}; - -pub const cpu_octeon = Cpu{ - .name = "octeon", - .llvm_name = "octeon", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_gp64, - &feature_mips1, - &feature_fp64, - &feature_cnmips, - &feature_mips64r2, - }, -}; - -pub const cpu_p5600 = Cpu{ - .name = "p5600", - .llvm_name = "p5600", - .dependencies = &[_]*const Feature { - &feature_mips4_32, - &feature_mips5_32r2, - &feature_mips3_32r2, - &feature_mips3_32, - &feature_mips4_32r2, - &feature_mips1, - &feature_p5600, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_mips1, - &cpu_mips2, - &cpu_mips3, - &cpu_mips32, - &cpu_mips32r2, - &cpu_mips32r3, - &cpu_mips32r5, - &cpu_mips32r6, - &cpu_mips4, - &cpu_mips5, - &cpu_mips64, - &cpu_mips64r2, - &cpu_mips64r3, - &cpu_mips64r5, - &cpu_mips64r6, - &cpu_octeon, - &cpu_p5600, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + abs2008, + cnmips, + crc, + dsp, + dspr2, + dspr3, + eva, + fp64, + fpxx, + ginv, + gp64, + long_calls, + micromips, + mips1, + mips16, + mips2, + mips3, + mips32, + mips32r2, + mips32r3, + mips32r5, + mips32r6, + mips3_32, + mips3_32r2, + mips4, + mips4_32, + mips4_32r2, + mips5, + mips5_32r2, + mips64, + mips64r2, + mips64r3, + mips64r5, + mips64r6, + msa, + mt, + nan2008, + noabicalls, + nomadd4, + nooddspreg, + p5600, + ptr64, + single_float, + soft_float, + sym32, + use_indirect_jump_hazard, + use_tcc_in_div, + vfpu, + virt, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.abs2008)] = .{ + .index = @enumToInt(Feature.abs2008), + .name = @tagName(Feature.abs2008), + .llvm_name = "abs2008", + .description = "Disable IEEE 754-2008 abs.fmt mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.cnmips)] = .{ + .index = @enumToInt(Feature.cnmips), + .name = @tagName(Feature.cnmips), + .llvm_name = "cnmips", + .description = "Octeon cnMIPS Support", + .dependencies = featureSet(&[_]Feature{ + .mips64r2, + }), + }; + result[@enumToInt(Feature.crc)] = .{ + .index = @enumToInt(Feature.crc), + .name = @tagName(Feature.crc), + .llvm_name = "crc", + .description = "Mips R6 CRC ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.dsp)] = .{ + .index = @enumToInt(Feature.dsp), + .name = @tagName(Feature.dsp), + .llvm_name = "dsp", + .description = "Mips DSP ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.dspr2)] = .{ + .index = @enumToInt(Feature.dspr2), + .name = @tagName(Feature.dspr2), + .llvm_name = "dspr2", + .description = "Mips DSP-R2 ASE", + .dependencies = featureSet(&[_]Feature{ + .dsp, + }), + }; + result[@enumToInt(Feature.dspr3)] = .{ + .index = @enumToInt(Feature.dspr3), + .name = @tagName(Feature.dspr3), + .llvm_name = "dspr3", + .description = "Mips DSP-R3 ASE", + .dependencies = featureSet(&[_]Feature{ + .dsp, + .dspr2, + }), + }; + result[@enumToInt(Feature.eva)] = .{ + .index = @enumToInt(Feature.eva), + .name = @tagName(Feature.eva), + .llvm_name = "eva", + .description = "Mips EVA ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp64)] = .{ + .index = @enumToInt(Feature.fp64), + .name = @tagName(Feature.fp64), + .llvm_name = "fp64", + .description = "Support 64-bit FP registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.fpxx)] = .{ + .index = @enumToInt(Feature.fpxx), + .name = @tagName(Feature.fpxx), + .llvm_name = "fpxx", + .description = "Support for FPXX", + .dependencies = 0, + }; + result[@enumToInt(Feature.ginv)] = .{ + .index = @enumToInt(Feature.ginv), + .name = @tagName(Feature.ginv), + .llvm_name = "ginv", + .description = "Mips Global Invalidate ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.gp64)] = .{ + .index = @enumToInt(Feature.gp64), + .name = @tagName(Feature.gp64), + .llvm_name = "gp64", + .description = "General Purpose Registers are 64-bit wide", + .dependencies = 0, + }; + result[@enumToInt(Feature.long_calls)] = .{ + .index = @enumToInt(Feature.long_calls), + .name = @tagName(Feature.long_calls), + .llvm_name = "long-calls", + .description = "Disable use of the jal instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.micromips)] = .{ + .index = @enumToInt(Feature.micromips), + .name = @tagName(Feature.micromips), + .llvm_name = "micromips", + .description = "microMips mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips1)] = .{ + .index = @enumToInt(Feature.mips1), + .name = @tagName(Feature.mips1), + .llvm_name = "mips1", + .description = "Mips I ISA Support [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips16)] = .{ + .index = @enumToInt(Feature.mips16), + .name = @tagName(Feature.mips16), + .llvm_name = "mips16", + .description = "Mips16 mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips2)] = .{ + .index = @enumToInt(Feature.mips2), + .name = @tagName(Feature.mips2), + .llvm_name = "mips2", + .description = "Mips II ISA Support [highly experimental]", + .dependencies = featureSet(&[_]Feature{ + .mips1, + }), + }; + result[@enumToInt(Feature.mips3)] = .{ + .index = @enumToInt(Feature.mips3), + .name = @tagName(Feature.mips3), + .llvm_name = "mips3", + .description = "MIPS III ISA Support [highly experimental]", + .dependencies = featureSet(&[_]Feature{ + .fp64, + .gp64, + .mips2, + .mips3_32, + .mips3_32r2, + }), + }; + result[@enumToInt(Feature.mips32)] = .{ + .index = @enumToInt(Feature.mips32), + .name = @tagName(Feature.mips32), + .llvm_name = "mips32", + .description = "Mips32 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips2, + .mips3_32, + .mips4_32, + }), + }; + result[@enumToInt(Feature.mips32r2)] = .{ + .index = @enumToInt(Feature.mips32r2), + .name = @tagName(Feature.mips32r2), + .llvm_name = "mips32r2", + .description = "Mips32r2 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32, + .mips3_32r2, + .mips4_32r2, + .mips5_32r2, + }), + }; + result[@enumToInt(Feature.mips32r3)] = .{ + .index = @enumToInt(Feature.mips32r3), + .name = @tagName(Feature.mips32r3), + .llvm_name = "mips32r3", + .description = "Mips32r3 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32r2, + }), + }; + result[@enumToInt(Feature.mips32r5)] = .{ + .index = @enumToInt(Feature.mips32r5), + .name = @tagName(Feature.mips32r5), + .llvm_name = "mips32r5", + .description = "Mips32r5 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32r3, + }), + }; + result[@enumToInt(Feature.mips32r6)] = .{ + .index = @enumToInt(Feature.mips32r6), + .name = @tagName(Feature.mips32r6), + .llvm_name = "mips32r6", + .description = "Mips32r6 ISA Support [experimental]", + .dependencies = featureSet(&[_]Feature{ + .abs2008, + .fp64, + .mips32r5, + .nan2008, + }), + }; + result[@enumToInt(Feature.mips3_32)] = .{ + .index = @enumToInt(Feature.mips3_32), + .name = @tagName(Feature.mips3_32), + .llvm_name = "mips3_32", + .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips3_32r2)] = .{ + .index = @enumToInt(Feature.mips3_32r2), + .name = @tagName(Feature.mips3_32r2), + .llvm_name = "mips3_32r2", + .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips4)] = .{ + .index = @enumToInt(Feature.mips4), + .name = @tagName(Feature.mips4), + .llvm_name = "mips4", + .description = "MIPS IV ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips3, + .mips4_32, + .mips4_32r2, + }), + }; + result[@enumToInt(Feature.mips4_32)] = .{ + .index = @enumToInt(Feature.mips4_32), + .name = @tagName(Feature.mips4_32), + .llvm_name = "mips4_32", + .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips4_32r2)] = .{ + .index = @enumToInt(Feature.mips4_32r2), + .name = @tagName(Feature.mips4_32r2), + .llvm_name = "mips4_32r2", + .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips5)] = .{ + .index = @enumToInt(Feature.mips5), + .name = @tagName(Feature.mips5), + .llvm_name = "mips5", + .description = "MIPS V ISA Support [highly experimental]", + .dependencies = featureSet(&[_]Feature{ + .mips4, + .mips5_32r2, + }), + }; + result[@enumToInt(Feature.mips5_32r2)] = .{ + .index = @enumToInt(Feature.mips5_32r2), + .name = @tagName(Feature.mips5_32r2), + .llvm_name = "mips5_32r2", + .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", + .dependencies = 0, + }; + result[@enumToInt(Feature.mips64)] = .{ + .index = @enumToInt(Feature.mips64), + .name = @tagName(Feature.mips64), + .llvm_name = "mips64", + .description = "Mips64 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32, + .mips5, + }), + }; + result[@enumToInt(Feature.mips64r2)] = .{ + .index = @enumToInt(Feature.mips64r2), + .name = @tagName(Feature.mips64r2), + .llvm_name = "mips64r2", + .description = "Mips64r2 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32r2, + .mips64, + }), + }; + result[@enumToInt(Feature.mips64r3)] = .{ + .index = @enumToInt(Feature.mips64r3), + .name = @tagName(Feature.mips64r3), + .llvm_name = "mips64r3", + .description = "Mips64r3 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32r3, + .mips64r2, + }), + }; + result[@enumToInt(Feature.mips64r5)] = .{ + .index = @enumToInt(Feature.mips64r5), + .name = @tagName(Feature.mips64r5), + .llvm_name = "mips64r5", + .description = "Mips64r5 ISA Support", + .dependencies = featureSet(&[_]Feature{ + .mips32r5, + .mips64r3, + }), + }; + result[@enumToInt(Feature.mips64r6)] = .{ + .index = @enumToInt(Feature.mips64r6), + .name = @tagName(Feature.mips64r6), + .llvm_name = "mips64r6", + .description = "Mips64r6 ISA Support [experimental]", + .dependencies = featureSet(&[_]Feature{ + .abs2008, + .mips32r6, + .mips64r5, + .nan2008, + }), + }; + result[@enumToInt(Feature.msa)] = .{ + .index = @enumToInt(Feature.msa), + .name = @tagName(Feature.msa), + .llvm_name = "msa", + .description = "Mips MSA ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.mt)] = .{ + .index = @enumToInt(Feature.mt), + .name = @tagName(Feature.mt), + .llvm_name = "mt", + .description = "Mips MT ASE", + .dependencies = 0, + }; + result[@enumToInt(Feature.nan2008)] = .{ + .index = @enumToInt(Feature.nan2008), + .name = @tagName(Feature.nan2008), + .llvm_name = "nan2008", + .description = "IEEE 754-2008 NaN encoding", + .dependencies = 0, + }; + result[@enumToInt(Feature.noabicalls)] = .{ + .index = @enumToInt(Feature.noabicalls), + .name = @tagName(Feature.noabicalls), + .llvm_name = "noabicalls", + .description = "Disable SVR4-style position-independent code", + .dependencies = 0, + }; + result[@enumToInt(Feature.nomadd4)] = .{ + .index = @enumToInt(Feature.nomadd4), + .name = @tagName(Feature.nomadd4), + .llvm_name = "nomadd4", + .description = "Disable 4-operand madd.fmt and related instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.nooddspreg)] = .{ + .index = @enumToInt(Feature.nooddspreg), + .name = @tagName(Feature.nooddspreg), + .llvm_name = "nooddspreg", + .description = "Disable odd numbered single-precision registers", + .dependencies = 0, + }; + result[@enumToInt(Feature.p5600)] = .{ + .index = @enumToInt(Feature.p5600), + .name = @tagName(Feature.p5600), + .llvm_name = "p5600", + .description = "The P5600 Processor", + .dependencies = featureSet(&[_]Feature{ + .mips32r5, + }), + }; + result[@enumToInt(Feature.ptr64)] = .{ + .index = @enumToInt(Feature.ptr64), + .name = @tagName(Feature.ptr64), + .llvm_name = "ptr64", + .description = "Pointers are 64-bit wide", + .dependencies = 0, + }; + result[@enumToInt(Feature.single_float)] = .{ + .index = @enumToInt(Feature.single_float), + .name = @tagName(Feature.single_float), + .llvm_name = "single-float", + .description = "Only supports single precision float", + .dependencies = 0, + }; + result[@enumToInt(Feature.soft_float)] = .{ + .index = @enumToInt(Feature.soft_float), + .name = @tagName(Feature.soft_float), + .llvm_name = "soft-float", + .description = "Does not support floating point instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sym32)] = .{ + .index = @enumToInt(Feature.sym32), + .name = @tagName(Feature.sym32), + .llvm_name = "sym32", + .description = "Symbols are 32 bit on Mips64", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{ + .index = @enumToInt(Feature.use_indirect_jump_hazard), + .name = @tagName(Feature.use_indirect_jump_hazard), + .llvm_name = "use-indirect-jump-hazard", + .description = "Use indirect jump guards to prevent certain speculation based attacks", + .dependencies = 0, + }; + result[@enumToInt(Feature.use_tcc_in_div)] = .{ + .index = @enumToInt(Feature.use_tcc_in_div), + .name = @tagName(Feature.use_tcc_in_div), + .llvm_name = "use-tcc-in-div", + .description = "Force the assembler to use trapping", + .dependencies = 0, + }; + result[@enumToInt(Feature.vfpu)] = .{ + .index = @enumToInt(Feature.vfpu), + .name = @tagName(Feature.vfpu), + .llvm_name = "vfpu", + .description = "Enable vector FPU instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.virt)] = .{ + .index = @enumToInt(Feature.virt), + .name = @tagName(Feature.virt), + .llvm_name = "virt", + .description = "Mips Virtualization ASE", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const mips1 = Cpu{ + .name = "mips1", + .llvm_name = "mips1", + .features = featureSet(&[_]Feature{ + .mips1, + }), + }; + pub const mips2 = Cpu{ + .name = "mips2", + .llvm_name = "mips2", + .features = featureSet(&[_]Feature{ + .mips2, + }), + }; + pub const mips3 = Cpu{ + .name = "mips3", + .llvm_name = "mips3", + .features = featureSet(&[_]Feature{ + .mips3, + }), + }; + pub const mips32 = Cpu{ + .name = "mips32", + .llvm_name = "mips32", + .features = featureSet(&[_]Feature{ + .mips32, + }), + }; + pub const mips32r2 = Cpu{ + .name = "mips32r2", + .llvm_name = "mips32r2", + .features = featureSet(&[_]Feature{ + .mips32r2, + }), + }; + pub const mips32r3 = Cpu{ + .name = "mips32r3", + .llvm_name = "mips32r3", + .features = featureSet(&[_]Feature{ + .mips32r3, + }), + }; + pub const mips32r5 = Cpu{ + .name = "mips32r5", + .llvm_name = "mips32r5", + .features = featureSet(&[_]Feature{ + .mips32r5, + }), + }; + pub const mips32r6 = Cpu{ + .name = "mips32r6", + .llvm_name = "mips32r6", + .features = featureSet(&[_]Feature{ + .mips32r6, + }), + }; + pub const mips4 = Cpu{ + .name = "mips4", + .llvm_name = "mips4", + .features = featureSet(&[_]Feature{ + .mips4, + }), + }; + pub const mips5 = Cpu{ + .name = "mips5", + .llvm_name = "mips5", + .features = featureSet(&[_]Feature{ + .mips5, + }), + }; + pub const mips64 = Cpu{ + .name = "mips64", + .llvm_name = "mips64", + .features = featureSet(&[_]Feature{ + .mips64, + }), + }; + pub const mips64r2 = Cpu{ + .name = "mips64r2", + .llvm_name = "mips64r2", + .features = featureSet(&[_]Feature{ + .mips64r2, + }), + }; + pub const mips64r3 = Cpu{ + .name = "mips64r3", + .llvm_name = "mips64r3", + .features = featureSet(&[_]Feature{ + .mips64r3, + }), + }; + pub const mips64r5 = Cpu{ + .name = "mips64r5", + .llvm_name = "mips64r5", + .features = featureSet(&[_]Feature{ + .mips64r5, + }), + }; + pub const mips64r6 = Cpu{ + .name = "mips64r6", + .llvm_name = "mips64r6", + .features = featureSet(&[_]Feature{ + .mips64r6, + }), + }; + pub const octeon = Cpu{ + .name = "octeon", + .llvm_name = "octeon", + .features = featureSet(&[_]Feature{ + .cnmips, + .mips64r2, + }), + }; + pub const p5600 = Cpu{ + .name = "p5600", + .llvm_name = "p5600", + .features = featureSet(&[_]Feature{ + .p5600, + }), + }; +}; + +/// All mips CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.mips1, + &cpu.mips2, + &cpu.mips3, + &cpu.mips32, + &cpu.mips32r2, + &cpu.mips32r3, + &cpu.mips32r5, + &cpu.mips32r6, + &cpu.mips4, + &cpu.mips5, + &cpu.mips64, + &cpu.mips64r2, + &cpu.mips64r3, + &cpu.mips64r5, + &cpu.mips64r6, + &cpu.octeon, + &cpu.p5600, }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 75e641f0dc3edc64760fea53ce59e1ded8fb2841..21d6a8211d0ac5051bb79c3725ed8e949b867069 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -1,69 +1,75 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; -pub const feature_hwmult16 = Feature{ - .name = "hwmult16", - .llvm_name = "hwmult16", - .description = "Enable 16-bit hardware multiplier", - .dependencies = &[_]*const Feature { - }, +pub const Feature = enum { + ext, + hwmult16, + hwmult32, + hwmultf5, }; -pub const feature_hwmult32 = Feature{ - .name = "hwmult32", - .llvm_name = "hwmult32", - .description = "Enable 32-bit hardware multiplier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_hwmultf5 = Feature{ - .name = "hwmultf5", - .llvm_name = "hwmultf5", - .description = "Enable F5 series hardware multiplier", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ext = Feature{ - .name = "ext", - .llvm_name = "ext", - .description = "Enable MSP430-X extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_hwmult16, - &feature_hwmult32, - &feature_hwmultf5, - &feature_ext, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, -}; +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); -pub const cpu_msp430 = Cpu{ - .name = "msp430", - .llvm_name = "msp430", - .dependencies = &[_]*const Feature { - }, +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.ext)] = .{ + .index = @enumToInt(Feature.ext), + .name = @tagName(Feature.ext), + .llvm_name = "ext", + .description = "Enable MSP430-X extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.hwmult16)] = .{ + .index = @enumToInt(Feature.hwmult16), + .name = @tagName(Feature.hwmult16), + .llvm_name = "hwmult16", + .description = "Enable 16-bit hardware multiplier", + .dependencies = 0, + }; + result[@enumToInt(Feature.hwmult32)] = .{ + .index = @enumToInt(Feature.hwmult32), + .name = @tagName(Feature.hwmult32), + .llvm_name = "hwmult32", + .description = "Enable 32-bit hardware multiplier", + .dependencies = 0, + }; + result[@enumToInt(Feature.hwmultf5)] = .{ + .index = @enumToInt(Feature.hwmultf5), + .name = @tagName(Feature.hwmultf5), + .llvm_name = "hwmultf5", + .description = "Enable F5 series hardware multiplier", + .dependencies = 0, + }; + break :blk result; }; -pub const cpu_msp430x = Cpu{ - .name = "msp430x", - .llvm_name = "msp430x", - .dependencies = &[_]*const Feature { - &feature_ext, - }, +pub const cpu = struct { + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const msp430 = Cpu{ + .name = "msp430", + .llvm_name = "msp430", + .features = 0, + }; + pub const msp430x = Cpu{ + .name = "msp430x", + .llvm_name = "msp430x", + .features = featureSet(&[_]Feature{ + .ext, + }), + }; }; -pub const cpus = &[_]*const Cpu { - &cpu_generic, - &cpu_msp430, - &cpu_msp430x, +/// All msp430 CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.generic, + &cpu.msp430, + &cpu.msp430x, }; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index cddd800f30f4333aa4e2d651266d61d8b400de03..d277785aff9f49930d146c6918a0a2e899973ad3 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -1,379 +1,354 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_ptx32 = Feature{ - .name = "ptx32", - .llvm_name = "ptx32", - .description = "Use PTX version 3.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx40 = Feature{ - .name = "ptx40", - .llvm_name = "ptx40", - .description = "Use PTX version 4.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx41 = Feature{ - .name = "ptx41", - .llvm_name = "ptx41", - .description = "Use PTX version 4.1", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx42 = Feature{ - .name = "ptx42", - .llvm_name = "ptx42", - .description = "Use PTX version 4.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx43 = Feature{ - .name = "ptx43", - .llvm_name = "ptx43", - .description = "Use PTX version 4.3", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx50 = Feature{ - .name = "ptx50", - .llvm_name = "ptx50", - .description = "Use PTX version 5.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx60 = Feature{ - .name = "ptx60", - .llvm_name = "ptx60", - .description = "Use PTX version 6.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx61 = Feature{ - .name = "ptx61", - .llvm_name = "ptx61", - .description = "Use PTX version 6.1", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx63 = Feature{ - .name = "ptx63", - .llvm_name = "ptx63", - .description = "Use PTX version 6.3", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ptx64 = Feature{ - .name = "ptx64", - .llvm_name = "ptx64", - .description = "Use PTX version 6.4", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_20 = Feature{ - .name = "sm_20", - .llvm_name = "sm_20", - .description = "Target SM 2.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_21 = Feature{ - .name = "sm_21", - .llvm_name = "sm_21", - .description = "Target SM 2.1", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_30 = Feature{ - .name = "sm_30", - .llvm_name = "sm_30", - .description = "Target SM 3.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_32 = Feature{ - .name = "sm_32", - .llvm_name = "sm_32", - .description = "Target SM 3.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_35 = Feature{ - .name = "sm_35", - .llvm_name = "sm_35", - .description = "Target SM 3.5", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_37 = Feature{ - .name = "sm_37", - .llvm_name = "sm_37", - .description = "Target SM 3.7", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_50 = Feature{ - .name = "sm_50", - .llvm_name = "sm_50", - .description = "Target SM 5.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_52 = Feature{ - .name = "sm_52", - .llvm_name = "sm_52", - .description = "Target SM 5.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_53 = Feature{ - .name = "sm_53", - .llvm_name = "sm_53", - .description = "Target SM 5.3", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_60 = Feature{ - .name = "sm_60", - .llvm_name = "sm_60", - .description = "Target SM 6.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_61 = Feature{ - .name = "sm_61", - .llvm_name = "sm_61", - .description = "Target SM 6.1", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_62 = Feature{ - .name = "sm_62", - .llvm_name = "sm_62", - .description = "Target SM 6.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_70 = Feature{ - .name = "sm_70", - .llvm_name = "sm_70", - .description = "Target SM 7.0", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_72 = Feature{ - .name = "sm_72", - .llvm_name = "sm_72", - .description = "Target SM 7.2", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_sm_75 = Feature{ - .name = "sm_75", - .llvm_name = "sm_75", - .description = "Target SM 7.5", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_ptx32, - &feature_ptx40, - &feature_ptx41, - &feature_ptx42, - &feature_ptx43, - &feature_ptx50, - &feature_ptx60, - &feature_ptx61, - &feature_ptx63, - &feature_ptx64, - &feature_sm_20, - &feature_sm_21, - &feature_sm_30, - &feature_sm_32, - &feature_sm_35, - &feature_sm_37, - &feature_sm_50, - &feature_sm_52, - &feature_sm_53, - &feature_sm_60, - &feature_sm_61, - &feature_sm_62, - &feature_sm_70, - &feature_sm_72, - &feature_sm_75, -}; - -pub const cpu_sm_20 = Cpu{ - .name = "sm_20", - .llvm_name = "sm_20", - .dependencies = &[_]*const Feature { - &feature_sm_20, - }, -}; - -pub const cpu_sm_21 = Cpu{ - .name = "sm_21", - .llvm_name = "sm_21", - .dependencies = &[_]*const Feature { - &feature_sm_21, - }, -}; - -pub const cpu_sm_30 = Cpu{ - .name = "sm_30", - .llvm_name = "sm_30", - .dependencies = &[_]*const Feature { - &feature_sm_30, - }, -}; - -pub const cpu_sm_32 = Cpu{ - .name = "sm_32", - .llvm_name = "sm_32", - .dependencies = &[_]*const Feature { - &feature_ptx40, - &feature_sm_32, - }, -}; - -pub const cpu_sm_35 = Cpu{ - .name = "sm_35", - .llvm_name = "sm_35", - .dependencies = &[_]*const Feature { - &feature_sm_35, - }, -}; - -pub const cpu_sm_37 = Cpu{ - .name = "sm_37", - .llvm_name = "sm_37", - .dependencies = &[_]*const Feature { - &feature_ptx41, - &feature_sm_37, - }, -}; - -pub const cpu_sm_50 = Cpu{ - .name = "sm_50", - .llvm_name = "sm_50", - .dependencies = &[_]*const Feature { - &feature_ptx40, - &feature_sm_50, - }, -}; - -pub const cpu_sm_52 = Cpu{ - .name = "sm_52", - .llvm_name = "sm_52", - .dependencies = &[_]*const Feature { - &feature_ptx41, - &feature_sm_52, - }, -}; - -pub const cpu_sm_53 = Cpu{ - .name = "sm_53", - .llvm_name = "sm_53", - .dependencies = &[_]*const Feature { - &feature_ptx42, - &feature_sm_53, - }, -}; - -pub const cpu_sm_60 = Cpu{ - .name = "sm_60", - .llvm_name = "sm_60", - .dependencies = &[_]*const Feature { - &feature_ptx50, - &feature_sm_60, - }, -}; - -pub const cpu_sm_61 = Cpu{ - .name = "sm_61", - .llvm_name = "sm_61", - .dependencies = &[_]*const Feature { - &feature_ptx50, - &feature_sm_61, - }, -}; - -pub const cpu_sm_62 = Cpu{ - .name = "sm_62", - .llvm_name = "sm_62", - .dependencies = &[_]*const Feature { - &feature_ptx50, - &feature_sm_62, - }, -}; - -pub const cpu_sm_70 = Cpu{ - .name = "sm_70", - .llvm_name = "sm_70", - .dependencies = &[_]*const Feature { - &feature_ptx60, - &feature_sm_70, - }, -}; - -pub const cpu_sm_72 = Cpu{ - .name = "sm_72", - .llvm_name = "sm_72", - .dependencies = &[_]*const Feature { - &feature_ptx61, - &feature_sm_72, - }, -}; - -pub const cpu_sm_75 = Cpu{ - .name = "sm_75", - .llvm_name = "sm_75", - .dependencies = &[_]*const Feature { - &feature_ptx63, - &feature_sm_75, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_sm_20, - &cpu_sm_21, - &cpu_sm_30, - &cpu_sm_32, - &cpu_sm_35, - &cpu_sm_37, - &cpu_sm_50, - &cpu_sm_52, - &cpu_sm_53, - &cpu_sm_60, - &cpu_sm_61, - &cpu_sm_62, - &cpu_sm_70, - &cpu_sm_72, - &cpu_sm_75, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + ptx32, + ptx40, + ptx41, + ptx42, + ptx43, + ptx50, + ptx60, + ptx61, + ptx63, + ptx64, + sm_20, + sm_21, + sm_30, + sm_32, + sm_35, + sm_37, + sm_50, + sm_52, + sm_53, + sm_60, + sm_61, + sm_62, + sm_70, + sm_72, + sm_75, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.ptx32)] = .{ + .index = @enumToInt(Feature.ptx32), + .name = @tagName(Feature.ptx32), + .llvm_name = "ptx32", + .description = "Use PTX version 3.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx40)] = .{ + .index = @enumToInt(Feature.ptx40), + .name = @tagName(Feature.ptx40), + .llvm_name = "ptx40", + .description = "Use PTX version 4.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx41)] = .{ + .index = @enumToInt(Feature.ptx41), + .name = @tagName(Feature.ptx41), + .llvm_name = "ptx41", + .description = "Use PTX version 4.1", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx42)] = .{ + .index = @enumToInt(Feature.ptx42), + .name = @tagName(Feature.ptx42), + .llvm_name = "ptx42", + .description = "Use PTX version 4.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx43)] = .{ + .index = @enumToInt(Feature.ptx43), + .name = @tagName(Feature.ptx43), + .llvm_name = "ptx43", + .description = "Use PTX version 4.3", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx50)] = .{ + .index = @enumToInt(Feature.ptx50), + .name = @tagName(Feature.ptx50), + .llvm_name = "ptx50", + .description = "Use PTX version 5.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx60)] = .{ + .index = @enumToInt(Feature.ptx60), + .name = @tagName(Feature.ptx60), + .llvm_name = "ptx60", + .description = "Use PTX version 6.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx61)] = .{ + .index = @enumToInt(Feature.ptx61), + .name = @tagName(Feature.ptx61), + .llvm_name = "ptx61", + .description = "Use PTX version 6.1", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx63)] = .{ + .index = @enumToInt(Feature.ptx63), + .name = @tagName(Feature.ptx63), + .llvm_name = "ptx63", + .description = "Use PTX version 6.3", + .dependencies = 0, + }; + result[@enumToInt(Feature.ptx64)] = .{ + .index = @enumToInt(Feature.ptx64), + .name = @tagName(Feature.ptx64), + .llvm_name = "ptx64", + .description = "Use PTX version 6.4", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_20)] = .{ + .index = @enumToInt(Feature.sm_20), + .name = @tagName(Feature.sm_20), + .llvm_name = "sm_20", + .description = "Target SM 2.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_21)] = .{ + .index = @enumToInt(Feature.sm_21), + .name = @tagName(Feature.sm_21), + .llvm_name = "sm_21", + .description = "Target SM 2.1", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_30)] = .{ + .index = @enumToInt(Feature.sm_30), + .name = @tagName(Feature.sm_30), + .llvm_name = "sm_30", + .description = "Target SM 3.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_32)] = .{ + .index = @enumToInt(Feature.sm_32), + .name = @tagName(Feature.sm_32), + .llvm_name = "sm_32", + .description = "Target SM 3.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_35)] = .{ + .index = @enumToInt(Feature.sm_35), + .name = @tagName(Feature.sm_35), + .llvm_name = "sm_35", + .description = "Target SM 3.5", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_37)] = .{ + .index = @enumToInt(Feature.sm_37), + .name = @tagName(Feature.sm_37), + .llvm_name = "sm_37", + .description = "Target SM 3.7", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_50)] = .{ + .index = @enumToInt(Feature.sm_50), + .name = @tagName(Feature.sm_50), + .llvm_name = "sm_50", + .description = "Target SM 5.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_52)] = .{ + .index = @enumToInt(Feature.sm_52), + .name = @tagName(Feature.sm_52), + .llvm_name = "sm_52", + .description = "Target SM 5.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_53)] = .{ + .index = @enumToInt(Feature.sm_53), + .name = @tagName(Feature.sm_53), + .llvm_name = "sm_53", + .description = "Target SM 5.3", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_60)] = .{ + .index = @enumToInt(Feature.sm_60), + .name = @tagName(Feature.sm_60), + .llvm_name = "sm_60", + .description = "Target SM 6.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_61)] = .{ + .index = @enumToInt(Feature.sm_61), + .name = @tagName(Feature.sm_61), + .llvm_name = "sm_61", + .description = "Target SM 6.1", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_62)] = .{ + .index = @enumToInt(Feature.sm_62), + .name = @tagName(Feature.sm_62), + .llvm_name = "sm_62", + .description = "Target SM 6.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_70)] = .{ + .index = @enumToInt(Feature.sm_70), + .name = @tagName(Feature.sm_70), + .llvm_name = "sm_70", + .description = "Target SM 7.0", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_72)] = .{ + .index = @enumToInt(Feature.sm_72), + .name = @tagName(Feature.sm_72), + .llvm_name = "sm_72", + .description = "Target SM 7.2", + .dependencies = 0, + }; + result[@enumToInt(Feature.sm_75)] = .{ + .index = @enumToInt(Feature.sm_75), + .name = @tagName(Feature.sm_75), + .llvm_name = "sm_75", + .description = "Target SM 7.5", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const sm_20 = Cpu{ + .name = "sm_20", + .llvm_name = "sm_20", + .features = featureSet(&[_]Feature{ + .sm_20, + }), + }; + pub const sm_21 = Cpu{ + .name = "sm_21", + .llvm_name = "sm_21", + .features = featureSet(&[_]Feature{ + .sm_21, + }), + }; + pub const sm_30 = Cpu{ + .name = "sm_30", + .llvm_name = "sm_30", + .features = featureSet(&[_]Feature{ + .sm_30, + }), + }; + pub const sm_32 = Cpu{ + .name = "sm_32", + .llvm_name = "sm_32", + .features = featureSet(&[_]Feature{ + .ptx40, + .sm_32, + }), + }; + pub const sm_35 = Cpu{ + .name = "sm_35", + .llvm_name = "sm_35", + .features = featureSet(&[_]Feature{ + .sm_35, + }), + }; + pub const sm_37 = Cpu{ + .name = "sm_37", + .llvm_name = "sm_37", + .features = featureSet(&[_]Feature{ + .ptx41, + .sm_37, + }), + }; + pub const sm_50 = Cpu{ + .name = "sm_50", + .llvm_name = "sm_50", + .features = featureSet(&[_]Feature{ + .ptx40, + .sm_50, + }), + }; + pub const sm_52 = Cpu{ + .name = "sm_52", + .llvm_name = "sm_52", + .features = featureSet(&[_]Feature{ + .ptx41, + .sm_52, + }), + }; + pub const sm_53 = Cpu{ + .name = "sm_53", + .llvm_name = "sm_53", + .features = featureSet(&[_]Feature{ + .ptx42, + .sm_53, + }), + }; + pub const sm_60 = Cpu{ + .name = "sm_60", + .llvm_name = "sm_60", + .features = featureSet(&[_]Feature{ + .ptx50, + .sm_60, + }), + }; + pub const sm_61 = Cpu{ + .name = "sm_61", + .llvm_name = "sm_61", + .features = featureSet(&[_]Feature{ + .ptx50, + .sm_61, + }), + }; + pub const sm_62 = Cpu{ + .name = "sm_62", + .llvm_name = "sm_62", + .features = featureSet(&[_]Feature{ + .ptx50, + .sm_62, + }), + }; + pub const sm_70 = Cpu{ + .name = "sm_70", + .llvm_name = "sm_70", + .features = featureSet(&[_]Feature{ + .ptx60, + .sm_70, + }), + }; + pub const sm_72 = Cpu{ + .name = "sm_72", + .llvm_name = "sm_72", + .features = featureSet(&[_]Feature{ + .ptx61, + .sm_72, + }), + }; + pub const sm_75 = Cpu{ + .name = "sm_75", + .llvm_name = "sm_75", + .features = featureSet(&[_]Feature{ + .ptx63, + .sm_75, + }), + }; +}; + +/// All nvptx CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.sm_20, + &cpu.sm_21, + &cpu.sm_30, + &cpu.sm_32, + &cpu.sm_35, + &cpu.sm_37, + &cpu.sm_50, + &cpu.sm_52, + &cpu.sm_53, + &cpu.sm_60, + &cpu.sm_61, + &cpu.sm_62, + &cpu.sm_70, + &cpu.sm_72, + &cpu.sm_75, }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index f0d475a6e5999ae61069f1197b5924e993c1094e..bac15f231af1a9fe8f6bb761566c380ad62e3d2a 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -1,1115 +1,1035 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_bit64 = Feature{ - .name = "bit64", - .llvm_name = "64bit", - .description = "Enable 64-bit instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_bitregs64 = Feature{ - .name = "bitregs64", - .llvm_name = "64bitregs", - .description = "Enable 64-bit registers usage for ppc32 [beta]", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_altivec = Feature{ - .name = "altivec", - .llvm_name = "altivec", - .description = "Enable Altivec instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_bpermd = Feature{ - .name = "bpermd", - .llvm_name = "bpermd", - .description = "Enable the bpermd instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_booke = Feature{ - .name = "booke", - .llvm_name = "booke", - .description = "Enable Book E instructions", - .dependencies = &[_]*const Feature { - &feature_icbt, - }, -}; - -pub const feature_cmpb = Feature{ - .name = "cmpb", - .llvm_name = "cmpb", - .description = "Enable the cmpb instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_crbits = Feature{ - .name = "crbits", - .llvm_name = "crbits", - .description = "Use condition-register bits individually", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_directMove = Feature{ - .name = "directMove", - .llvm_name = "direct-move", - .description = "Enable Power8 direct move instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_e500 = Feature{ - .name = "e500", - .llvm_name = "e500", - .description = "Enable E500/E500mc instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_extdiv = Feature{ - .name = "extdiv", - .llvm_name = "extdiv", - .description = "Enable extended divide instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fcpsgn = Feature{ - .name = "fcpsgn", - .llvm_name = "fcpsgn", - .description = "Enable the fcpsgn instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fpcvt = Feature{ - .name = "fpcvt", - .llvm_name = "fpcvt", - .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fprnd = Feature{ - .name = "fprnd", - .llvm_name = "fprnd", - .description = "Enable the fri[mnpz] instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fpu = Feature{ - .name = "fpu", - .llvm_name = "fpu", - .description = "Enable classic FPU instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fre = Feature{ - .name = "fre", - .llvm_name = "fre", - .description = "Enable the fre instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fres = Feature{ - .name = "fres", - .llvm_name = "fres", - .description = "Enable the fres instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_frsqrte = Feature{ - .name = "frsqrte", - .llvm_name = "frsqrte", - .description = "Enable the frsqrte instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_frsqrtes = Feature{ - .name = "frsqrtes", - .llvm_name = "frsqrtes", - .description = "Enable the frsqrtes instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_fsqrt = Feature{ - .name = "fsqrt", - .llvm_name = "fsqrt", - .description = "Enable the fsqrt instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_float128 = Feature{ - .name = "float128", - .llvm_name = "float128", - .description = "Enable the __float128 data type for IEEE-754R Binary128.", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_htm = Feature{ - .name = "htm", - .llvm_name = "htm", - .description = "Enable Hardware Transactional Memory instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_hardFloat = Feature{ - .name = "hardFloat", - .llvm_name = "hard-float", - .description = "Enable floating-point instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_icbt = Feature{ - .name = "icbt", - .llvm_name = "icbt", - .description = "Enable icbt instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_isaV30Instructions = Feature{ - .name = "isaV30Instructions", - .llvm_name = "isa-v30-instructions", - .description = "Enable instructions added in ISA 3.0.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_isel = Feature{ - .name = "isel", - .llvm_name = "isel", - .description = "Enable the isel instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_invariantFunctionDescriptors = Feature{ - .name = "invariantFunctionDescriptors", - .llvm_name = "invariant-function-descriptors", - .description = "Assume function descriptors are invariant", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ldbrx = Feature{ - .name = "ldbrx", - .llvm_name = "ldbrx", - .description = "Enable the ldbrx instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_lfiwax = Feature{ - .name = "lfiwax", - .llvm_name = "lfiwax", - .description = "Enable the lfiwax instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_longcall = Feature{ - .name = "longcall", - .llvm_name = "longcall", - .description = "Always use indirect calls", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mfocrf = Feature{ - .name = "mfocrf", - .llvm_name = "mfocrf", - .description = "Enable the MFOCRF instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_msync = Feature{ - .name = "msync", - .llvm_name = "msync", - .description = "Has only the msync instruction instead of sync", - .dependencies = &[_]*const Feature { - &feature_icbt, - }, -}; - -pub const feature_power8Altivec = Feature{ - .name = "power8Altivec", - .llvm_name = "power8-altivec", - .description = "Enable POWER8 Altivec instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_crypto = Feature{ - .name = "crypto", - .llvm_name = "crypto", - .description = "Enable POWER8 Crypto instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_power8Vector = Feature{ - .name = "power8Vector", - .llvm_name = "power8-vector", - .description = "Enable POWER8 vector instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_power9Altivec = Feature{ - .name = "power9Altivec", - .llvm_name = "power9-altivec", - .description = "Enable POWER9 Altivec instructions", - .dependencies = &[_]*const Feature { - &feature_isaV30Instructions, - &feature_hardFloat, - }, -}; - -pub const feature_power9Vector = Feature{ - .name = "power9Vector", - .llvm_name = "power9-vector", - .description = "Enable POWER9 vector instructions", - .dependencies = &[_]*const Feature { - &feature_isaV30Instructions, - &feature_hardFloat, - }, -}; - -pub const feature_popcntd = Feature{ - .name = "popcntd", - .llvm_name = "popcntd", - .description = "Enable the popcnt[dw] instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ppc4xx = Feature{ - .name = "ppc4xx", - .llvm_name = "ppc4xx", - .description = "Enable PPC 4xx instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ppc6xx = Feature{ - .name = "ppc6xx", - .llvm_name = "ppc6xx", - .description = "Enable PPC 6xx instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ppcPostraSched = Feature{ - .name = "ppcPostraSched", - .llvm_name = "ppc-postra-sched", - .description = "Use PowerPC post-RA scheduling strategy", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_ppcPreraSched = Feature{ - .name = "ppcPreraSched", - .llvm_name = "ppc-prera-sched", - .description = "Use PowerPC pre-RA scheduling strategy", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_partwordAtomics = Feature{ - .name = "partwordAtomics", - .llvm_name = "partword-atomics", - .description = "Enable l[bh]arx and st[bh]cx.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_qpx = Feature{ - .name = "qpx", - .llvm_name = "qpx", - .description = "Enable QPX instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_recipprec = Feature{ - .name = "recipprec", - .llvm_name = "recipprec", - .description = "Assume higher precision reciprocal estimates", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_spe = Feature{ - .name = "spe", - .llvm_name = "spe", - .description = "Enable SPE instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_stfiwx = Feature{ - .name = "stfiwx", - .llvm_name = "stfiwx", - .description = "Enable the stfiwx instruction", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_securePlt = Feature{ - .name = "securePlt", - .llvm_name = "secure-plt", - .description = "Enable secure plt mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_slowPopcntd = Feature{ - .name = "slowPopcntd", - .llvm_name = "slow-popcntd", - .description = "Has slow popcnt[dw] instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_twoConstNr = Feature{ - .name = "twoConstNr", - .llvm_name = "two-const-nr", - .description = "Requires two constant Newton-Raphson computation", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vsx = Feature{ - .name = "vsx", - .llvm_name = "vsx", - .description = "Enable VSX instructions", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const feature_vectorsUseTwoUnits = Feature{ - .name = "vectorsUseTwoUnits", - .llvm_name = "vectors-use-two-units", - .description = "Vectors use two units", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_bit64, - &feature_bitregs64, - &feature_altivec, - &feature_bpermd, - &feature_booke, - &feature_cmpb, - &feature_crbits, - &feature_directMove, - &feature_e500, - &feature_extdiv, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fpu, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_float128, - &feature_htm, - &feature_hardFloat, - &feature_icbt, - &feature_isaV30Instructions, - &feature_isel, - &feature_invariantFunctionDescriptors, - &feature_ldbrx, - &feature_lfiwax, - &feature_longcall, - &feature_mfocrf, - &feature_msync, - &feature_power8Altivec, - &feature_crypto, - &feature_power8Vector, - &feature_power9Altivec, - &feature_power9Vector, - &feature_popcntd, - &feature_ppc4xx, - &feature_ppc6xx, - &feature_ppcPostraSched, - &feature_ppcPreraSched, - &feature_partwordAtomics, - &feature_qpx, - &feature_recipprec, - &feature_spe, - &feature_stfiwx, - &feature_securePlt, - &feature_slowPopcntd, - &feature_twoConstNr, - &feature_vsx, - &feature_vectorsUseTwoUnits, -}; - -pub const cpu_440 = Cpu{ - .name = "440", - .llvm_name = "440", - .dependencies = &[_]*const Feature { - &feature_icbt, - &feature_booke, - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - &feature_isel, - &feature_msync, - }, -}; - -pub const cpu_450 = Cpu{ - .name = "450", - .llvm_name = "450", - .dependencies = &[_]*const Feature { - &feature_icbt, - &feature_booke, - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - &feature_isel, - &feature_msync, - }, -}; - -pub const cpu_601 = Cpu{ - .name = "601", - .llvm_name = "601", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fpu, - }, -}; - -pub const cpu_602 = Cpu{ - .name = "602", - .llvm_name = "602", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fpu, - }, -}; - -pub const cpu_603 = Cpu{ - .name = "603", - .llvm_name = "603", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_e603 = Cpu{ - .name = "e603", - .llvm_name = "603e", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_ev603 = Cpu{ - .name = "ev603", - .llvm_name = "603ev", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_604 = Cpu{ - .name = "604", - .llvm_name = "604", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_e604 = Cpu{ - .name = "e604", - .llvm_name = "604e", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_620 = Cpu{ - .name = "620", - .llvm_name = "620", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_7400 = Cpu{ - .name = "7400", - .llvm_name = "7400", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_7450 = Cpu{ - .name = "7450", - .llvm_name = "7450", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_750 = Cpu{ - .name = "750", - .llvm_name = "750", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_970 = Cpu{ - .name = "970", - .llvm_name = "970", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_a2 = Cpu{ - .name = "a2", - .llvm_name = "a2", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_icbt, - &feature_booke, - &feature_cmpb, - &feature_hardFloat, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_recipprec, - &feature_stfiwx, - &feature_slowPopcntd, - }, -}; - -pub const cpu_a2q = Cpu{ - .name = "a2q", - .llvm_name = "a2q", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_icbt, - &feature_booke, - &feature_cmpb, - &feature_hardFloat, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_qpx, - &feature_recipprec, - &feature_stfiwx, - &feature_slowPopcntd, - }, -}; - -pub const cpu_e500 = Cpu{ - .name = "e500", - .llvm_name = "e500", - .dependencies = &[_]*const Feature { - &feature_icbt, - &feature_booke, - &feature_isel, - }, -}; - -pub const cpu_e500mc = Cpu{ - .name = "e500mc", - .llvm_name = "e500mc", - .dependencies = &[_]*const Feature { - &feature_icbt, - &feature_booke, - &feature_isel, - &feature_hardFloat, - &feature_stfiwx, - }, -}; - -pub const cpu_e5500 = Cpu{ - .name = "e5500", - .llvm_name = "e5500", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_icbt, - &feature_booke, - &feature_isel, - &feature_mfocrf, - &feature_hardFloat, - &feature_stfiwx, - }, -}; - -pub const cpu_g3 = Cpu{ - .name = "g3", - .llvm_name = "g3", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_g4 = Cpu{ - .name = "g4", - .llvm_name = "g4", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_g4Plus = Cpu{ - .name = "g4Plus", - .llvm_name = "g4+", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - }, -}; - -pub const cpu_g5 = Cpu{ - .name = "g5", - .llvm_name = "g5", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const cpu_ppc = Cpu{ - .name = "ppc", - .llvm_name = "ppc", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const cpu_ppc32 = Cpu{ - .name = "ppc32", - .llvm_name = "ppc32", - .dependencies = &[_]*const Feature { - &feature_hardFloat, - }, -}; - -pub const cpu_ppc64 = Cpu{ - .name = "ppc64", - .llvm_name = "ppc64", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_ppc64le = Cpu{ - .name = "ppc64le", - .llvm_name = "ppc64le", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_bpermd, - &feature_cmpb, - &feature_directMove, - &feature_extdiv, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_htm, - &feature_icbt, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_power8Altivec, - &feature_crypto, - &feature_power8Vector, - &feature_popcntd, - &feature_partwordAtomics, - &feature_recipprec, - &feature_stfiwx, - &feature_twoConstNr, - &feature_vsx, - }, -}; - -pub const cpu_pwr3 = Cpu{ - .name = "pwr3", - .llvm_name = "pwr3", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr4 = Cpu{ - .name = "pwr4", - .llvm_name = "pwr4", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fres, - &feature_frsqrte, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr5 = Cpu{ - .name = "pwr5", - .llvm_name = "pwr5", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr5x = Cpu{ - .name = "pwr5x", - .llvm_name = "pwr5x", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_mfocrf, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr6 = Cpu{ - .name = "pwr6", - .llvm_name = "pwr6", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_cmpb, - &feature_fcpsgn, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_lfiwax, - &feature_mfocrf, - &feature_recipprec, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr6x = Cpu{ - .name = "pwr6x", - .llvm_name = "pwr6x", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_cmpb, - &feature_fcpsgn, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_lfiwax, - &feature_mfocrf, - &feature_recipprec, - &feature_stfiwx, - }, -}; - -pub const cpu_pwr7 = Cpu{ - .name = "pwr7", - .llvm_name = "pwr7", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_bpermd, - &feature_cmpb, - &feature_extdiv, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_popcntd, - &feature_recipprec, - &feature_stfiwx, - &feature_twoConstNr, - &feature_vsx, - }, -}; - -pub const cpu_pwr8 = Cpu{ - .name = "pwr8", - .llvm_name = "pwr8", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_bpermd, - &feature_cmpb, - &feature_directMove, - &feature_extdiv, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_htm, - &feature_icbt, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_power8Altivec, - &feature_crypto, - &feature_power8Vector, - &feature_popcntd, - &feature_partwordAtomics, - &feature_recipprec, - &feature_stfiwx, - &feature_twoConstNr, - &feature_vsx, - }, -}; - -pub const cpu_pwr9 = Cpu{ - .name = "pwr9", - .llvm_name = "pwr9", - .dependencies = &[_]*const Feature { - &feature_bit64, - &feature_hardFloat, - &feature_altivec, - &feature_bpermd, - &feature_cmpb, - &feature_directMove, - &feature_extdiv, - &feature_fcpsgn, - &feature_fpcvt, - &feature_fprnd, - &feature_fre, - &feature_fres, - &feature_frsqrte, - &feature_frsqrtes, - &feature_fsqrt, - &feature_htm, - &feature_icbt, - &feature_isaV30Instructions, - &feature_isel, - &feature_ldbrx, - &feature_lfiwax, - &feature_mfocrf, - &feature_power8Altivec, - &feature_crypto, - &feature_power8Vector, - &feature_power9Altivec, - &feature_power9Vector, - &feature_popcntd, - &feature_ppcPostraSched, - &feature_ppcPreraSched, - &feature_partwordAtomics, - &feature_recipprec, - &feature_stfiwx, - &feature_twoConstNr, - &feature_vsx, - &feature_vectorsUseTwoUnits, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_440, - &cpu_450, - &cpu_601, - &cpu_602, - &cpu_603, - &cpu_e603, - &cpu_ev603, - &cpu_604, - &cpu_e604, - &cpu_620, - &cpu_7400, - &cpu_7450, - &cpu_750, - &cpu_970, - &cpu_a2, - &cpu_a2q, - &cpu_e500, - &cpu_e500mc, - &cpu_e5500, - &cpu_g3, - &cpu_g4, - &cpu_g4Plus, - &cpu_g5, - &cpu_generic, - &cpu_ppc, - &cpu_ppc32, - &cpu_ppc64, - &cpu_ppc64le, - &cpu_pwr3, - &cpu_pwr4, - &cpu_pwr5, - &cpu_pwr5x, - &cpu_pwr6, - &cpu_pwr6x, - &cpu_pwr7, - &cpu_pwr8, - &cpu_pwr9, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + @"64bit", + @"64bitregs", + altivec, + booke, + bpermd, + cmpb, + crbits, + crypto, + direct_move, + e500, + extdiv, + fcpsgn, + float128, + fpcvt, + fprnd, + fpu, + fre, + fres, + frsqrte, + frsqrtes, + fsqrt, + hard_float, + htm, + icbt, + invariant_function_descriptors, + isa_v30_instructions, + isel, + ldbrx, + lfiwax, + longcall, + mfocrf, + msync, + partword_atomics, + popcntd, + power8_altivec, + power8_vector, + power9_altivec, + power9_vector, + ppc_postra_sched, + ppc_prera_sched, + ppc4xx, + ppc6xx, + qpx, + recipprec, + secure_plt, + slow_popcntd, + spe, + stfiwx, + two_const_nr, + vectors_use_two_units, + vsx, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.@"64bit")] = .{ + .index = @enumToInt(Feature.@"64bit"), + .name = @tagName(Feature.@"64bit"), + .llvm_name = "64bit", + .description = "Enable 64-bit instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.@"64bitregs")] = .{ + .index = @enumToInt(Feature.@"64bitregs"), + .name = @tagName(Feature.@"64bitregs"), + .llvm_name = "64bitregs", + .description = "Enable 64-bit registers usage for ppc32 [beta]", + .dependencies = 0, + }; + result[@enumToInt(Feature.altivec)] = .{ + .index = @enumToInt(Feature.altivec), + .name = @tagName(Feature.altivec), + .llvm_name = "altivec", + .description = "Enable Altivec instructions", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.booke)] = .{ + .index = @enumToInt(Feature.booke), + .name = @tagName(Feature.booke), + .llvm_name = "booke", + .description = "Enable Book E instructions", + .dependencies = featureSet(&[_]Feature{ + .icbt, + }), + }; + result[@enumToInt(Feature.bpermd)] = .{ + .index = @enumToInt(Feature.bpermd), + .name = @tagName(Feature.bpermd), + .llvm_name = "bpermd", + .description = "Enable the bpermd instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.cmpb)] = .{ + .index = @enumToInt(Feature.cmpb), + .name = @tagName(Feature.cmpb), + .llvm_name = "cmpb", + .description = "Enable the cmpb instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.crbits)] = .{ + .index = @enumToInt(Feature.crbits), + .name = @tagName(Feature.crbits), + .llvm_name = "crbits", + .description = "Use condition-register bits individually", + .dependencies = 0, + }; + result[@enumToInt(Feature.crypto)] = .{ + .index = @enumToInt(Feature.crypto), + .name = @tagName(Feature.crypto), + .llvm_name = "crypto", + .description = "Enable POWER8 Crypto instructions", + .dependencies = featureSet(&[_]Feature{ + .power8_altivec, + }), + }; + result[@enumToInt(Feature.direct_move)] = .{ + .index = @enumToInt(Feature.direct_move), + .name = @tagName(Feature.direct_move), + .llvm_name = "direct-move", + .description = "Enable Power8 direct move instructions", + .dependencies = featureSet(&[_]Feature{ + .vsx, + }), + }; + result[@enumToInt(Feature.e500)] = .{ + .index = @enumToInt(Feature.e500), + .name = @tagName(Feature.e500), + .llvm_name = "e500", + .description = "Enable E500/E500mc instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.extdiv)] = .{ + .index = @enumToInt(Feature.extdiv), + .name = @tagName(Feature.extdiv), + .llvm_name = "extdiv", + .description = "Enable extended divide instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.fcpsgn)] = .{ + .index = @enumToInt(Feature.fcpsgn), + .name = @tagName(Feature.fcpsgn), + .llvm_name = "fcpsgn", + .description = "Enable the fcpsgn instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.float128)] = .{ + .index = @enumToInt(Feature.float128), + .name = @tagName(Feature.float128), + .llvm_name = "float128", + .description = "Enable the __float128 data type for IEEE-754R Binary128.", + .dependencies = featureSet(&[_]Feature{ + .vsx, + }), + }; + result[@enumToInt(Feature.fpcvt)] = .{ + .index = @enumToInt(Feature.fpcvt), + .name = @tagName(Feature.fpcvt), + .llvm_name = "fpcvt", + .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.fprnd)] = .{ + .index = @enumToInt(Feature.fprnd), + .name = @tagName(Feature.fprnd), + .llvm_name = "fprnd", + .description = "Enable the fri[mnpz] instructions", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.fpu)] = .{ + .index = @enumToInt(Feature.fpu), + .name = @tagName(Feature.fpu), + .llvm_name = "fpu", + .description = "Enable classic FPU instructions", + .dependencies = featureSet(&[_]Feature{ + .hard_float, + }), + }; + result[@enumToInt(Feature.fre)] = .{ + .index = @enumToInt(Feature.fre), + .name = @tagName(Feature.fre), + .llvm_name = "fre", + .description = "Enable the fre instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.fres)] = .{ + .index = @enumToInt(Feature.fres), + .name = @tagName(Feature.fres), + .llvm_name = "fres", + .description = "Enable the fres instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.frsqrte)] = .{ + .index = @enumToInt(Feature.frsqrte), + .name = @tagName(Feature.frsqrte), + .llvm_name = "frsqrte", + .description = "Enable the frsqrte instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.frsqrtes)] = .{ + .index = @enumToInt(Feature.frsqrtes), + .name = @tagName(Feature.frsqrtes), + .llvm_name = "frsqrtes", + .description = "Enable the frsqrtes instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.fsqrt)] = .{ + .index = @enumToInt(Feature.fsqrt), + .name = @tagName(Feature.fsqrt), + .llvm_name = "fsqrt", + .description = "Enable the fsqrt instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.hard_float)] = .{ + .index = @enumToInt(Feature.hard_float), + .name = @tagName(Feature.hard_float), + .llvm_name = "hard-float", + .description = "Enable floating-point instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.htm)] = .{ + .index = @enumToInt(Feature.htm), + .name = @tagName(Feature.htm), + .llvm_name = "htm", + .description = "Enable Hardware Transactional Memory instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.icbt)] = .{ + .index = @enumToInt(Feature.icbt), + .name = @tagName(Feature.icbt), + .llvm_name = "icbt", + .description = "Enable icbt instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.invariant_function_descriptors)] = .{ + .index = @enumToInt(Feature.invariant_function_descriptors), + .name = @tagName(Feature.invariant_function_descriptors), + .llvm_name = "invariant-function-descriptors", + .description = "Assume function descriptors are invariant", + .dependencies = 0, + }; + result[@enumToInt(Feature.isa_v30_instructions)] = .{ + .index = @enumToInt(Feature.isa_v30_instructions), + .name = @tagName(Feature.isa_v30_instructions), + .llvm_name = "isa-v30-instructions", + .description = "Enable instructions added in ISA 3.0.", + .dependencies = 0, + }; + result[@enumToInt(Feature.isel)] = .{ + .index = @enumToInt(Feature.isel), + .name = @tagName(Feature.isel), + .llvm_name = "isel", + .description = "Enable the isel instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.ldbrx)] = .{ + .index = @enumToInt(Feature.ldbrx), + .name = @tagName(Feature.ldbrx), + .llvm_name = "ldbrx", + .description = "Enable the ldbrx instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.lfiwax)] = .{ + .index = @enumToInt(Feature.lfiwax), + .name = @tagName(Feature.lfiwax), + .llvm_name = "lfiwax", + .description = "Enable the lfiwax instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.longcall)] = .{ + .index = @enumToInt(Feature.longcall), + .name = @tagName(Feature.longcall), + .llvm_name = "longcall", + .description = "Always use indirect calls", + .dependencies = 0, + }; + result[@enumToInt(Feature.mfocrf)] = .{ + .index = @enumToInt(Feature.mfocrf), + .name = @tagName(Feature.mfocrf), + .llvm_name = "mfocrf", + .description = "Enable the MFOCRF instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.msync)] = .{ + .index = @enumToInt(Feature.msync), + .name = @tagName(Feature.msync), + .llvm_name = "msync", + .description = "Has only the msync instruction instead of sync", + .dependencies = featureSet(&[_]Feature{ + .booke, + }), + }; + result[@enumToInt(Feature.partword_atomics)] = .{ + .index = @enumToInt(Feature.partword_atomics), + .name = @tagName(Feature.partword_atomics), + .llvm_name = "partword-atomics", + .description = "Enable l[bh]arx and st[bh]cx.", + .dependencies = 0, + }; + result[@enumToInt(Feature.popcntd)] = .{ + .index = @enumToInt(Feature.popcntd), + .name = @tagName(Feature.popcntd), + .llvm_name = "popcntd", + .description = "Enable the popcnt[dw] instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.power8_altivec)] = .{ + .index = @enumToInt(Feature.power8_altivec), + .name = @tagName(Feature.power8_altivec), + .llvm_name = "power8-altivec", + .description = "Enable POWER8 Altivec instructions", + .dependencies = featureSet(&[_]Feature{ + .altivec, + }), + }; + result[@enumToInt(Feature.power8_vector)] = .{ + .index = @enumToInt(Feature.power8_vector), + .name = @tagName(Feature.power8_vector), + .llvm_name = "power8-vector", + .description = "Enable POWER8 vector instructions", + .dependencies = featureSet(&[_]Feature{ + .power8_altivec, + .vsx, + }), + }; + result[@enumToInt(Feature.power9_altivec)] = .{ + .index = @enumToInt(Feature.power9_altivec), + .name = @tagName(Feature.power9_altivec), + .llvm_name = "power9-altivec", + .description = "Enable POWER9 Altivec instructions", + .dependencies = featureSet(&[_]Feature{ + .isa_v30_instructions, + .power8_altivec, + }), + }; + result[@enumToInt(Feature.power9_vector)] = .{ + .index = @enumToInt(Feature.power9_vector), + .name = @tagName(Feature.power9_vector), + .llvm_name = "power9-vector", + .description = "Enable POWER9 vector instructions", + .dependencies = featureSet(&[_]Feature{ + .isa_v30_instructions, + .power8_vector, + .power9_altivec, + }), + }; + result[@enumToInt(Feature.ppc_postra_sched)] = .{ + .index = @enumToInt(Feature.ppc_postra_sched), + .name = @tagName(Feature.ppc_postra_sched), + .llvm_name = "ppc-postra-sched", + .description = "Use PowerPC post-RA scheduling strategy", + .dependencies = 0, + }; + result[@enumToInt(Feature.ppc_prera_sched)] = .{ + .index = @enumToInt(Feature.ppc_prera_sched), + .name = @tagName(Feature.ppc_prera_sched), + .llvm_name = "ppc-prera-sched", + .description = "Use PowerPC pre-RA scheduling strategy", + .dependencies = 0, + }; + result[@enumToInt(Feature.ppc4xx)] = .{ + .index = @enumToInt(Feature.ppc4xx), + .name = @tagName(Feature.ppc4xx), + .llvm_name = "ppc4xx", + .description = "Enable PPC 4xx instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.ppc6xx)] = .{ + .index = @enumToInt(Feature.ppc6xx), + .name = @tagName(Feature.ppc6xx), + .llvm_name = "ppc6xx", + .description = "Enable PPC 6xx instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.qpx)] = .{ + .index = @enumToInt(Feature.qpx), + .name = @tagName(Feature.qpx), + .llvm_name = "qpx", + .description = "Enable QPX instructions", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.recipprec)] = .{ + .index = @enumToInt(Feature.recipprec), + .name = @tagName(Feature.recipprec), + .llvm_name = "recipprec", + .description = "Assume higher precision reciprocal estimates", + .dependencies = 0, + }; + result[@enumToInt(Feature.secure_plt)] = .{ + .index = @enumToInt(Feature.secure_plt), + .name = @tagName(Feature.secure_plt), + .llvm_name = "secure-plt", + .description = "Enable secure plt mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.slow_popcntd)] = .{ + .index = @enumToInt(Feature.slow_popcntd), + .name = @tagName(Feature.slow_popcntd), + .llvm_name = "slow-popcntd", + .description = "Has slow popcnt[dw] instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.spe)] = .{ + .index = @enumToInt(Feature.spe), + .name = @tagName(Feature.spe), + .llvm_name = "spe", + .description = "Enable SPE instructions", + .dependencies = featureSet(&[_]Feature{ + .hard_float, + }), + }; + result[@enumToInt(Feature.stfiwx)] = .{ + .index = @enumToInt(Feature.stfiwx), + .name = @tagName(Feature.stfiwx), + .llvm_name = "stfiwx", + .description = "Enable the stfiwx instruction", + .dependencies = featureSet(&[_]Feature{ + .fpu, + }), + }; + result[@enumToInt(Feature.two_const_nr)] = .{ + .index = @enumToInt(Feature.two_const_nr), + .name = @tagName(Feature.two_const_nr), + .llvm_name = "two-const-nr", + .description = "Requires two constant Newton-Raphson computation", + .dependencies = 0, + }; + result[@enumToInt(Feature.vectors_use_two_units)] = .{ + .index = @enumToInt(Feature.vectors_use_two_units), + .name = @tagName(Feature.vectors_use_two_units), + .llvm_name = "vectors-use-two-units", + .description = "Vectors use two units", + .dependencies = 0, + }; + result[@enumToInt(Feature.vsx)] = .{ + .index = @enumToInt(Feature.vsx), + .name = @tagName(Feature.vsx), + .llvm_name = "vsx", + .description = "Enable VSX instructions", + .dependencies = featureSet(&[_]Feature{ + .altivec, + }), + }; + break :blk result; +}; + +pub const cpu = struct { + pub const @"440" = Cpu{ + .name = "@"440"", + .llvm_name = "440", + .features = featureSet(&[_]Feature{ + .booke, + .fres, + .frsqrte, + .icbt, + .isel, + .msync, + }), + }; + pub const @"450" = Cpu{ + .name = "@"450"", + .llvm_name = "450", + .features = featureSet(&[_]Feature{ + .booke, + .fres, + .frsqrte, + .icbt, + .isel, + .msync, + }), + }; + pub const @"601" = Cpu{ + .name = "@"601"", + .llvm_name = "601", + .features = featureSet(&[_]Feature{ + .fpu, + }), + }; + pub const @"602" = Cpu{ + .name = "@"602"", + .llvm_name = "602", + .features = featureSet(&[_]Feature{ + .fpu, + }), + }; + pub const @"603" = Cpu{ + .name = "@"603"", + .llvm_name = "603", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"603e" = Cpu{ + .name = "@"603e"", + .llvm_name = "603e", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"603ev" = Cpu{ + .name = "@"603ev"", + .llvm_name = "603ev", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"604" = Cpu{ + .name = "@"604"", + .llvm_name = "604", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"604e" = Cpu{ + .name = "@"604e"", + .llvm_name = "604e", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"620" = Cpu{ + .name = "@"620"", + .llvm_name = "620", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"7400" = Cpu{ + .name = "@"7400"", + .llvm_name = "7400", + .features = featureSet(&[_]Feature{ + .altivec, + .fres, + .frsqrte, + }), + }; + pub const @"7450" = Cpu{ + .name = "@"7450"", + .llvm_name = "7450", + .features = featureSet(&[_]Feature{ + .altivec, + .fres, + .frsqrte, + }), + }; + pub const @"750" = Cpu{ + .name = "@"750"", + .llvm_name = "750", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const @"970" = Cpu{ + .name = "@"970"", + .llvm_name = "970", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fres, + .frsqrte, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const a2 = Cpu{ + .name = "a2", + .llvm_name = "a2", + .features = featureSet(&[_]Feature{ + .@"64bit", + .booke, + .cmpb, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .icbt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .recipprec, + .slow_popcntd, + .stfiwx, + }), + }; + pub const a2q = Cpu{ + .name = "a2q", + .llvm_name = "a2q", + .features = featureSet(&[_]Feature{ + .@"64bit", + .booke, + .cmpb, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .icbt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .qpx, + .recipprec, + .slow_popcntd, + .stfiwx, + }), + }; + pub const e500 = Cpu{ + .name = "e500", + .llvm_name = "e500", + .features = featureSet(&[_]Feature{ + .booke, + .icbt, + .isel, + }), + }; + pub const e500mc = Cpu{ + .name = "e500mc", + .llvm_name = "e500mc", + .features = featureSet(&[_]Feature{ + .booke, + .icbt, + .isel, + .stfiwx, + }), + }; + pub const e5500 = Cpu{ + .name = "e5500", + .llvm_name = "e5500", + .features = featureSet(&[_]Feature{ + .@"64bit", + .booke, + .icbt, + .isel, + .mfocrf, + .stfiwx, + }), + }; + pub const g3 = Cpu{ + .name = "g3", + .llvm_name = "g3", + .features = featureSet(&[_]Feature{ + .fres, + .frsqrte, + }), + }; + pub const g4 = Cpu{ + .name = "g4", + .llvm_name = "g4", + .features = featureSet(&[_]Feature{ + .altivec, + .fres, + .frsqrte, + }), + }; + pub const g4+ = Cpu{ + .name = "g4+", + .llvm_name = "g4+", + .features = featureSet(&[_]Feature{ + .altivec, + .fres, + .frsqrte, + }), + }; + pub const g5 = Cpu{ + .name = "g5", + .llvm_name = "g5", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fres, + .frsqrte, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{ + .hard_float, + }), + }; + pub const ppc = Cpu{ + .name = "ppc", + .llvm_name = "ppc", + .features = featureSet(&[_]Feature{ + .hard_float, + }), + }; + pub const ppc32 = Cpu{ + .name = "ppc32", + .llvm_name = "ppc32", + .features = featureSet(&[_]Feature{ + .hard_float, + }), + }; + pub const ppc64 = Cpu{ + .name = "ppc64", + .llvm_name = "ppc64", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fres, + .frsqrte, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const ppc64le = Cpu{ + .name = "ppc64le", + .llvm_name = "ppc64le", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .bpermd, + .cmpb, + .crypto, + .direct_move, + .extdiv, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .htm, + .icbt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .partword_atomics, + .popcntd, + .power8_altivec, + .power8_vector, + .recipprec, + .stfiwx, + .two_const_nr, + .vsx, + }), + }; + pub const pwr3 = Cpu{ + .name = "pwr3", + .llvm_name = "pwr3", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fres, + .frsqrte, + .mfocrf, + .stfiwx, + }), + }; + pub const pwr4 = Cpu{ + .name = "pwr4", + .llvm_name = "pwr4", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fres, + .frsqrte, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const pwr5 = Cpu{ + .name = "pwr5", + .llvm_name = "pwr5", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const pwr5x = Cpu{ + .name = "pwr5x", + .llvm_name = "pwr5x", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .mfocrf, + .stfiwx, + }), + }; + pub const pwr6 = Cpu{ + .name = "pwr6", + .llvm_name = "pwr6", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .cmpb, + .fcpsgn, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .lfiwax, + .mfocrf, + .recipprec, + .stfiwx, + }), + }; + pub const pwr6x = Cpu{ + .name = "pwr6x", + .llvm_name = "pwr6x", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .cmpb, + .fcpsgn, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .lfiwax, + .mfocrf, + .recipprec, + .stfiwx, + }), + }; + pub const pwr7 = Cpu{ + .name = "pwr7", + .llvm_name = "pwr7", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .bpermd, + .cmpb, + .extdiv, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .popcntd, + .recipprec, + .stfiwx, + .two_const_nr, + .vsx, + }), + }; + pub const pwr8 = Cpu{ + .name = "pwr8", + .llvm_name = "pwr8", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .bpermd, + .cmpb, + .crypto, + .direct_move, + .extdiv, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .htm, + .icbt, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .partword_atomics, + .popcntd, + .power8_altivec, + .power8_vector, + .recipprec, + .stfiwx, + .two_const_nr, + .vsx, + }), + }; + pub const pwr9 = Cpu{ + .name = "pwr9", + .llvm_name = "pwr9", + .features = featureSet(&[_]Feature{ + .@"64bit", + .altivec, + .bpermd, + .cmpb, + .crypto, + .direct_move, + .extdiv, + .fcpsgn, + .fpcvt, + .fprnd, + .fre, + .fres, + .frsqrte, + .frsqrtes, + .fsqrt, + .htm, + .icbt, + .isa_v30_instructions, + .isel, + .ldbrx, + .lfiwax, + .mfocrf, + .partword_atomics, + .popcntd, + .power8_altivec, + .power8_vector, + .power9_altivec, + .power9_vector, + .ppc_postra_sched, + .ppc_prera_sched, + .recipprec, + .stfiwx, + .two_const_nr, + .vectors_use_two_units, + .vsx, + }), + }; +}; + +/// All powerpc CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.@"440", + &cpu.@"450", + &cpu.@"601", + &cpu.@"602", + &cpu.@"603", + &cpu.@"603e", + &cpu.@"603ev", + &cpu.@"604", + &cpu.@"604e", + &cpu.@"620", + &cpu.@"7400", + &cpu.@"7450", + &cpu.@"750", + &cpu.@"970", + &cpu.a2, + &cpu.a2q, + &cpu.e500, + &cpu.e500mc, + &cpu.e5500, + &cpu.g3, + &cpu.g4, + &cpu.g4+, + &cpu.g5, + &cpu.generic, + &cpu.ppc, + &cpu.ppc32, + &cpu.ppc64, + &cpu.ppc64le, + &cpu.pwr3, + &cpu.pwr4, + &cpu.pwr5, + &cpu.pwr5x, + &cpu.pwr6, + &cpu.pwr6x, + &cpu.pwr7, + &cpu.pwr8, + &cpu.pwr9, }; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index bf82cc9f822cbbb623d4bd91b26f9efab22e09d8..7181028cc27f80f6fa22e020abf74a7a284e34eb 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -1,98 +1,103 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; -pub const feature_bit64 = Feature{ - .name = "bit64", - .llvm_name = "64bit", - .description = "Implements RV64", - .dependencies = &[_]*const Feature { - }, +pub const Feature = enum { + @"64bit", + a, + c, + d, + e, + f, + m, + relax, }; -pub const feature_e = Feature{ - .name = "e", - .llvm_name = "e", - .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_relax = Feature{ - .name = "relax", - .llvm_name = "relax", - .description = "Enable Linker relaxation.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_a = Feature{ - .name = "a", - .llvm_name = "a", - .description = "'A' (Atomic Instructions)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_c = Feature{ - .name = "c", - .llvm_name = "c", - .description = "'C' (Compressed Instructions)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_d = Feature{ - .name = "d", - .llvm_name = "d", - .description = "'D' (Double-Precision Floating-Point)", - .dependencies = &[_]*const Feature { - &feature_f, - }, -}; - -pub const feature_f = Feature{ - .name = "f", - .llvm_name = "f", - .description = "'F' (Single-Precision Floating-Point)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_m = Feature{ - .name = "m", - .llvm_name = "m", - .description = "'M' (Integer Multiplication and Division)", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_bit64, - &feature_e, - &feature_relax, - &feature_a, - &feature_c, - &feature_d, - &feature_f, - &feature_m, -}; +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); -pub const cpu_genericRv32 = Cpu{ - .name = "genericRv32", - .llvm_name = "generic-rv32", - .dependencies = &[_]*const Feature { - }, +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.@"64bit")] = .{ + .index = @enumToInt(Feature.@"64bit"), + .name = @tagName(Feature.@"64bit"), + .llvm_name = "64bit", + .description = "Implements RV64", + .dependencies = 0, + }; + result[@enumToInt(Feature.a)] = .{ + .index = @enumToInt(Feature.a), + .name = @tagName(Feature.a), + .llvm_name = "a", + .description = "'A' (Atomic Instructions)", + .dependencies = 0, + }; + result[@enumToInt(Feature.c)] = .{ + .index = @enumToInt(Feature.c), + .name = @tagName(Feature.c), + .llvm_name = "c", + .description = "'C' (Compressed Instructions)", + .dependencies = 0, + }; + result[@enumToInt(Feature.d)] = .{ + .index = @enumToInt(Feature.d), + .name = @tagName(Feature.d), + .llvm_name = "d", + .description = "'D' (Double-Precision Floating-Point)", + .dependencies = featureSet(&[_]Feature{ + .f, + }), + }; + result[@enumToInt(Feature.e)] = .{ + .index = @enumToInt(Feature.e), + .name = @tagName(Feature.e), + .llvm_name = "e", + .description = "Implements RV32E (provides 16 rather than 32 GPRs)", + .dependencies = 0, + }; + result[@enumToInt(Feature.f)] = .{ + .index = @enumToInt(Feature.f), + .name = @tagName(Feature.f), + .llvm_name = "f", + .description = "'F' (Single-Precision Floating-Point)", + .dependencies = 0, + }; + result[@enumToInt(Feature.m)] = .{ + .index = @enumToInt(Feature.m), + .name = @tagName(Feature.m), + .llvm_name = "m", + .description = "'M' (Integer Multiplication and Division)", + .dependencies = 0, + }; + result[@enumToInt(Feature.relax)] = .{ + .index = @enumToInt(Feature.relax), + .name = @tagName(Feature.relax), + .llvm_name = "relax", + .description = "Enable Linker relaxation.", + .dependencies = 0, + }; + break :blk result; }; -pub const cpu_genericRv64 = Cpu{ - .name = "genericRv64", - .llvm_name = "generic-rv64", - .dependencies = &[_]*const Feature { - &feature_bit64, - }, +pub const cpu = struct { + pub const generic_rv32 = Cpu{ + .name = "generic_rv32", + .llvm_name = "generic-rv32", + .features = 0, + }; + pub const generic_rv64 = Cpu{ + .name = "generic_rv64", + .llvm_name = "generic-rv64", + .features = featureSet(&[_]Feature{ + .@"64bit", + }), + }; }; -pub const cpus = &[_]*const Cpu { - &cpu_genericRv32, - &cpu_genericRv64, +/// All riscv CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.generic_rv32, + &cpu.generic_rv64, }; diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 7dfaa47df77b4e1baeb00826b6ebfc3c80ee2df7..6b1787f31f8b2e82137e42d9f14a5f5183d070fc 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -1,489 +1,528 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_hardQuadFloat = Feature{ - .name = "hardQuadFloat", - .llvm_name = "hard-quad-float", - .description = "Enable quad-word floating point instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_leon = Feature{ - .name = "leon", - .llvm_name = "leon", - .description = "Enable LEON extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noFmuls = Feature{ - .name = "noFmuls", - .llvm_name = "no-fmuls", - .description = "Disable the fmuls instruction.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_noFsmuld = Feature{ - .name = "noFsmuld", - .llvm_name = "no-fsmuld", - .description = "Disable the fsmuld instruction.", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_leonpwrpsr = Feature{ - .name = "leonpwrpsr", - .llvm_name = "leonpwrpsr", - .description = "Enable the PWRPSR instruction", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_softFloat = Feature{ - .name = "softFloat", - .llvm_name = "soft-float", - .description = "Use software emulation for floating point", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_softMulDiv = Feature{ - .name = "softMulDiv", - .llvm_name = "soft-mul-div", - .description = "Use software emulation for integer multiply and divide", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_deprecatedV8 = Feature{ - .name = "deprecatedV8", - .llvm_name = "deprecated-v8", - .description = "Enable deprecated V8 instructions in V9 mode", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_v9 = Feature{ - .name = "v9", - .llvm_name = "v9", - .description = "Enable SPARC-V9 instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vis = Feature{ - .name = "vis", - .llvm_name = "vis", - .description = "Enable UltraSPARC Visual Instruction Set extensions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vis2 = Feature{ - .name = "vis2", - .llvm_name = "vis2", - .description = "Enable Visual Instruction Set extensions II", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vis3 = Feature{ - .name = "vis3", - .llvm_name = "vis3", - .description = "Enable Visual Instruction Set extensions III", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_hardQuadFloat, - &feature_leon, - &feature_noFmuls, - &feature_noFsmuld, - &feature_leonpwrpsr, - &feature_softFloat, - &feature_softMulDiv, - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - &feature_vis3, -}; - -pub const cpu_at697e = Cpu{ - .name = "at697e", - .llvm_name = "at697e", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_at697f = Cpu{ - .name = "at697f", - .llvm_name = "at697f", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_f934 = Cpu{ - .name = "f934", - .llvm_name = "f934", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_gr712rc = Cpu{ - .name = "gr712rc", - .llvm_name = "gr712rc", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_gr740 = Cpu{ - .name = "gr740", - .llvm_name = "gr740", - .dependencies = &[_]*const Feature { - &feature_leon, - &feature_leonpwrpsr, - }, -}; - -pub const cpu_hypersparc = Cpu{ - .name = "hypersparc", - .llvm_name = "hypersparc", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_leon2 = Cpu{ - .name = "leon2", - .llvm_name = "leon2", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_leon3 = Cpu{ - .name = "leon3", - .llvm_name = "leon3", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_leon4 = Cpu{ - .name = "leon4", - .llvm_name = "leon4", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2080 = Cpu{ - .name = "ma2080", - .llvm_name = "ma2080", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2085 = Cpu{ - .name = "ma2085", - .llvm_name = "ma2085", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2100 = Cpu{ - .name = "ma2100", - .llvm_name = "ma2100", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2150 = Cpu{ - .name = "ma2150", - .llvm_name = "ma2150", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2155 = Cpu{ - .name = "ma2155", - .llvm_name = "ma2155", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2450 = Cpu{ - .name = "ma2450", - .llvm_name = "ma2450", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2455 = Cpu{ - .name = "ma2455", - .llvm_name = "ma2455", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2480 = Cpu{ - .name = "ma2480", - .llvm_name = "ma2480", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2485 = Cpu{ - .name = "ma2485", - .llvm_name = "ma2485", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2x5x = Cpu{ - .name = "ma2x5x", - .llvm_name = "ma2x5x", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_ma2x8x = Cpu{ - .name = "ma2x8x", - .llvm_name = "ma2x8x", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_myriad2 = Cpu{ - .name = "myriad2", - .llvm_name = "myriad2", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_myriad21 = Cpu{ - .name = "myriad21", - .llvm_name = "myriad2.1", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_myriad22 = Cpu{ - .name = "myriad22", - .llvm_name = "myriad2.2", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_myriad23 = Cpu{ - .name = "myriad23", - .llvm_name = "myriad2.3", - .dependencies = &[_]*const Feature { - &feature_leon, - }, -}; - -pub const cpu_niagara = Cpu{ - .name = "niagara", - .llvm_name = "niagara", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - }, -}; - -pub const cpu_niagara2 = Cpu{ - .name = "niagara2", - .llvm_name = "niagara2", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - }, -}; - -pub const cpu_niagara3 = Cpu{ - .name = "niagara3", - .llvm_name = "niagara3", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - }, -}; - -pub const cpu_niagara4 = Cpu{ - .name = "niagara4", - .llvm_name = "niagara4", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - &feature_vis3, - }, -}; - -pub const cpu_sparclet = Cpu{ - .name = "sparclet", - .llvm_name = "sparclet", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_sparclite = Cpu{ - .name = "sparclite", - .llvm_name = "sparclite", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_sparclite86x = Cpu{ - .name = "sparclite86x", - .llvm_name = "sparclite86x", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_supersparc = Cpu{ - .name = "supersparc", - .llvm_name = "supersparc", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_tsc701 = Cpu{ - .name = "tsc701", - .llvm_name = "tsc701", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_ultrasparc = Cpu{ - .name = "ultrasparc", - .llvm_name = "ultrasparc", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - }, -}; - -pub const cpu_ultrasparc3 = Cpu{ - .name = "ultrasparc3", - .llvm_name = "ultrasparc3", - .dependencies = &[_]*const Feature { - &feature_deprecatedV8, - &feature_v9, - &feature_vis, - &feature_vis2, - }, -}; - -pub const cpu_ut699 = Cpu{ - .name = "ut699", - .llvm_name = "ut699", - .dependencies = &[_]*const Feature { - &feature_leon, - &feature_noFmuls, - &feature_noFsmuld, - }, -}; - -pub const cpu_v7 = Cpu{ - .name = "v7", - .llvm_name = "v7", - .dependencies = &[_]*const Feature { - &feature_noFsmuld, - &feature_softMulDiv, - }, -}; - -pub const cpu_v8 = Cpu{ - .name = "v8", - .llvm_name = "v8", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_v9 = Cpu{ - .name = "v9", - .llvm_name = "v9", - .dependencies = &[_]*const Feature { - &feature_v9, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_at697e, - &cpu_at697f, - &cpu_f934, - &cpu_generic, - &cpu_gr712rc, - &cpu_gr740, - &cpu_hypersparc, - &cpu_leon2, - &cpu_leon3, - &cpu_leon4, - &cpu_ma2080, - &cpu_ma2085, - &cpu_ma2100, - &cpu_ma2150, - &cpu_ma2155, - &cpu_ma2450, - &cpu_ma2455, - &cpu_ma2480, - &cpu_ma2485, - &cpu_ma2x5x, - &cpu_ma2x8x, - &cpu_myriad2, - &cpu_myriad21, - &cpu_myriad22, - &cpu_myriad23, - &cpu_niagara, - &cpu_niagara2, - &cpu_niagara3, - &cpu_niagara4, - &cpu_sparclet, - &cpu_sparclite, - &cpu_sparclite86x, - &cpu_supersparc, - &cpu_tsc701, - &cpu_ultrasparc, - &cpu_ultrasparc3, - &cpu_ut699, - &cpu_v7, - &cpu_v8, - &cpu_v9, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + deprecated_v8, + detectroundchange, + fixallfdivsqrt, + hard_quad_float, + hasleoncasa, + hasumacsmac, + insertnopload, + leon, + leoncyclecounter, + leonpwrpsr, + no_fmuls, + no_fsmuld, + popc, + soft_float, + soft_mul_div, + v9, + vis, + vis2, + vis3, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.deprecated_v8)] = .{ + .index = @enumToInt(Feature.deprecated_v8), + .name = @tagName(Feature.deprecated_v8), + .llvm_name = "deprecated-v8", + .description = "Enable deprecated V8 instructions in V9 mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.detectroundchange)] = .{ + .index = @enumToInt(Feature.detectroundchange), + .name = @tagName(Feature.detectroundchange), + .llvm_name = "detectroundchange", + .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", + .dependencies = 0, + }; + result[@enumToInt(Feature.fixallfdivsqrt)] = .{ + .index = @enumToInt(Feature.fixallfdivsqrt), + .name = @tagName(Feature.fixallfdivsqrt), + .llvm_name = "fixallfdivsqrt", + .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", + .dependencies = 0, + }; + result[@enumToInt(Feature.hard_quad_float)] = .{ + .index = @enumToInt(Feature.hard_quad_float), + .name = @tagName(Feature.hard_quad_float), + .llvm_name = "hard-quad-float", + .description = "Enable quad-word floating point instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.hasleoncasa)] = .{ + .index = @enumToInt(Feature.hasleoncasa), + .name = @tagName(Feature.hasleoncasa), + .llvm_name = "hasleoncasa", + .description = "Enable CASA instruction for LEON3 and LEON4 processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.hasumacsmac)] = .{ + .index = @enumToInt(Feature.hasumacsmac), + .name = @tagName(Feature.hasumacsmac), + .llvm_name = "hasumacsmac", + .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", + .dependencies = 0, + }; + result[@enumToInt(Feature.insertnopload)] = .{ + .index = @enumToInt(Feature.insertnopload), + .name = @tagName(Feature.insertnopload), + .llvm_name = "insertnopload", + .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.leon)] = .{ + .index = @enumToInt(Feature.leon), + .name = @tagName(Feature.leon), + .llvm_name = "leon", + .description = "Enable LEON extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.leoncyclecounter)] = .{ + .index = @enumToInt(Feature.leoncyclecounter), + .name = @tagName(Feature.leoncyclecounter), + .llvm_name = "leoncyclecounter", + .description = "Use the Leon cycle counter register", + .dependencies = 0, + }; + result[@enumToInt(Feature.leonpwrpsr)] = .{ + .index = @enumToInt(Feature.leonpwrpsr), + .name = @tagName(Feature.leonpwrpsr), + .llvm_name = "leonpwrpsr", + .description = "Enable the PWRPSR instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_fmuls)] = .{ + .index = @enumToInt(Feature.no_fmuls), + .name = @tagName(Feature.no_fmuls), + .llvm_name = "no-fmuls", + .description = "Disable the fmuls instruction.", + .dependencies = 0, + }; + result[@enumToInt(Feature.no_fsmuld)] = .{ + .index = @enumToInt(Feature.no_fsmuld), + .name = @tagName(Feature.no_fsmuld), + .llvm_name = "no-fsmuld", + .description = "Disable the fsmuld instruction.", + .dependencies = 0, + }; + result[@enumToInt(Feature.popc)] = .{ + .index = @enumToInt(Feature.popc), + .name = @tagName(Feature.popc), + .llvm_name = "popc", + .description = "Use the popc (population count) instruction", + .dependencies = 0, + }; + result[@enumToInt(Feature.soft_float)] = .{ + .index = @enumToInt(Feature.soft_float), + .name = @tagName(Feature.soft_float), + .llvm_name = "soft-float", + .description = "Use software emulation for floating point", + .dependencies = 0, + }; + result[@enumToInt(Feature.soft_mul_div)] = .{ + .index = @enumToInt(Feature.soft_mul_div), + .name = @tagName(Feature.soft_mul_div), + .llvm_name = "soft-mul-div", + .description = "Use software emulation for integer multiply and divide", + .dependencies = 0, + }; + result[@enumToInt(Feature.v9)] = .{ + .index = @enumToInt(Feature.v9), + .name = @tagName(Feature.v9), + .llvm_name = "v9", + .description = "Enable SPARC-V9 instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.vis)] = .{ + .index = @enumToInt(Feature.vis), + .name = @tagName(Feature.vis), + .llvm_name = "vis", + .description = "Enable UltraSPARC Visual Instruction Set extensions", + .dependencies = 0, + }; + result[@enumToInt(Feature.vis2)] = .{ + .index = @enumToInt(Feature.vis2), + .name = @tagName(Feature.vis2), + .llvm_name = "vis2", + .description = "Enable Visual Instruction Set extensions II", + .dependencies = 0, + }; + result[@enumToInt(Feature.vis3)] = .{ + .index = @enumToInt(Feature.vis3), + .name = @tagName(Feature.vis3), + .llvm_name = "vis3", + .description = "Enable Visual Instruction Set extensions III", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const at697e = Cpu{ + .name = "at697e", + .llvm_name = "at697e", + .features = featureSet(&[_]Feature{ + .insertnopload, + .leon, + }), + }; + pub const at697f = Cpu{ + .name = "at697f", + .llvm_name = "at697f", + .features = featureSet(&[_]Feature{ + .insertnopload, + .leon, + }), + }; + pub const f934 = Cpu{ + .name = "f934", + .llvm_name = "f934", + .features = 0, + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const gr712rc = Cpu{ + .name = "gr712rc", + .llvm_name = "gr712rc", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const gr740 = Cpu{ + .name = "gr740", + .llvm_name = "gr740", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .hasumacsmac, + .leon, + .leoncyclecounter, + .leonpwrpsr, + }), + }; + pub const hypersparc = Cpu{ + .name = "hypersparc", + .llvm_name = "hypersparc", + .features = 0, + }; + pub const leon2 = Cpu{ + .name = "leon2", + .llvm_name = "leon2", + .features = featureSet(&[_]Feature{ + .leon, + }), + }; + pub const leon3 = Cpu{ + .name = "leon3", + .llvm_name = "leon3", + .features = featureSet(&[_]Feature{ + .hasumacsmac, + .leon, + }), + }; + pub const leon4 = Cpu{ + .name = "leon4", + .llvm_name = "leon4", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .hasumacsmac, + .leon, + }), + }; + pub const ma2080 = Cpu{ + .name = "ma2080", + .llvm_name = "ma2080", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2085 = Cpu{ + .name = "ma2085", + .llvm_name = "ma2085", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2100 = Cpu{ + .name = "ma2100", + .llvm_name = "ma2100", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2150 = Cpu{ + .name = "ma2150", + .llvm_name = "ma2150", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2155 = Cpu{ + .name = "ma2155", + .llvm_name = "ma2155", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2450 = Cpu{ + .name = "ma2450", + .llvm_name = "ma2450", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2455 = Cpu{ + .name = "ma2455", + .llvm_name = "ma2455", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2480 = Cpu{ + .name = "ma2480", + .llvm_name = "ma2480", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2485 = Cpu{ + .name = "ma2485", + .llvm_name = "ma2485", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2x5x = Cpu{ + .name = "ma2x5x", + .llvm_name = "ma2x5x", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const ma2x8x = Cpu{ + .name = "ma2x8x", + .llvm_name = "ma2x8x", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const myriad2 = Cpu{ + .name = "myriad2", + .llvm_name = "myriad2", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const myriad2_1 = Cpu{ + .name = "myriad2_1", + .llvm_name = "myriad2.1", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const myriad2_2 = Cpu{ + .name = "myriad2_2", + .llvm_name = "myriad2.2", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const myriad2_3 = Cpu{ + .name = "myriad2_3", + .llvm_name = "myriad2.3", + .features = featureSet(&[_]Feature{ + .hasleoncasa, + .leon, + }), + }; + pub const niagara = Cpu{ + .name = "niagara", + .llvm_name = "niagara", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .v9, + .vis, + .vis2, + }), + }; + pub const niagara2 = Cpu{ + .name = "niagara2", + .llvm_name = "niagara2", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .popc, + .v9, + .vis, + .vis2, + }), + }; + pub const niagara3 = Cpu{ + .name = "niagara3", + .llvm_name = "niagara3", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .popc, + .v9, + .vis, + .vis2, + }), + }; + pub const niagara4 = Cpu{ + .name = "niagara4", + .llvm_name = "niagara4", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .popc, + .v9, + .vis, + .vis2, + .vis3, + }), + }; + pub const sparclet = Cpu{ + .name = "sparclet", + .llvm_name = "sparclet", + .features = 0, + }; + pub const sparclite = Cpu{ + .name = "sparclite", + .llvm_name = "sparclite", + .features = 0, + }; + pub const sparclite86x = Cpu{ + .name = "sparclite86x", + .llvm_name = "sparclite86x", + .features = 0, + }; + pub const supersparc = Cpu{ + .name = "supersparc", + .llvm_name = "supersparc", + .features = 0, + }; + pub const tsc701 = Cpu{ + .name = "tsc701", + .llvm_name = "tsc701", + .features = 0, + }; + pub const ultrasparc = Cpu{ + .name = "ultrasparc", + .llvm_name = "ultrasparc", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .v9, + .vis, + }), + }; + pub const ultrasparc3 = Cpu{ + .name = "ultrasparc3", + .llvm_name = "ultrasparc3", + .features = featureSet(&[_]Feature{ + .deprecated_v8, + .v9, + .vis, + .vis2, + }), + }; + pub const ut699 = Cpu{ + .name = "ut699", + .llvm_name = "ut699", + .features = featureSet(&[_]Feature{ + .fixallfdivsqrt, + .insertnopload, + .leon, + .no_fmuls, + .no_fsmuld, + }), + }; + pub const v7 = Cpu{ + .name = "v7", + .llvm_name = "v7", + .features = featureSet(&[_]Feature{ + .no_fsmuld, + .soft_mul_div, + }), + }; + pub const v8 = Cpu{ + .name = "v8", + .llvm_name = "v8", + .features = 0, + }; + pub const v9 = Cpu{ + .name = "v9", + .llvm_name = "v9", + .features = featureSet(&[_]Feature{ + .v9, + }), + }; +}; + +/// All sparc CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.at697e, + &cpu.at697f, + &cpu.f934, + &cpu.generic, + &cpu.gr712rc, + &cpu.gr740, + &cpu.hypersparc, + &cpu.leon2, + &cpu.leon3, + &cpu.leon4, + &cpu.ma2080, + &cpu.ma2085, + &cpu.ma2100, + &cpu.ma2150, + &cpu.ma2155, + &cpu.ma2450, + &cpu.ma2455, + &cpu.ma2480, + &cpu.ma2485, + &cpu.ma2x5x, + &cpu.ma2x8x, + &cpu.myriad2, + &cpu.myriad2_1, + &cpu.myriad2_2, + &cpu.myriad2_3, + &cpu.niagara, + &cpu.niagara2, + &cpu.niagara3, + &cpu.niagara4, + &cpu.sparclet, + &cpu.sparclite, + &cpu.sparclite86x, + &cpu.supersparc, + &cpu.tsc701, + &cpu.ultrasparc, + &cpu.ultrasparc3, + &cpu.ut699, + &cpu.v7, + &cpu.v8, + &cpu.v9, }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 1a3f8ec9705a77ce58606c2388e1e1938483a3d7..3479ebf7b4fa1fe1f0cc2e8343f67bfb1f9e7e82 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -1,610 +1,575 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; - -pub const feature_dfpPackedConversion = Feature{ - .name = "dfpPackedConversion", - .llvm_name = "dfp-packed-conversion", - .description = "Assume that the DFP packed-conversion facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_dfpZonedConversion = Feature{ - .name = "dfpZonedConversion", - .llvm_name = "dfp-zoned-conversion", - .description = "Assume that the DFP zoned-conversion facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_deflateConversion = Feature{ - .name = "deflateConversion", - .llvm_name = "deflate-conversion", - .description = "Assume that the deflate-conversion facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_distinctOps = Feature{ - .name = "distinctOps", - .llvm_name = "distinct-ops", - .description = "Assume that the distinct-operands facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_enhancedDat2 = Feature{ - .name = "enhancedDat2", - .llvm_name = "enhanced-dat-2", - .description = "Assume that the enhanced-DAT facility 2 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_enhancedSort = Feature{ - .name = "enhancedSort", - .llvm_name = "enhanced-sort", - .description = "Assume that the enhanced-sort facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_executionHint = Feature{ - .name = "executionHint", - .llvm_name = "execution-hint", - .description = "Assume that the execution-hint facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fpExtension = Feature{ - .name = "fpExtension", - .llvm_name = "fp-extension", - .description = "Assume that the floating-point extension facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_fastSerialization = Feature{ - .name = "fastSerialization", - .llvm_name = "fast-serialization", - .description = "Assume that the fast-serialization facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_guardedStorage = Feature{ - .name = "guardedStorage", - .llvm_name = "guarded-storage", - .description = "Assume that the guarded-storage facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_highWord = Feature{ - .name = "highWord", - .llvm_name = "high-word", - .description = "Assume that the high-word facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_insertReferenceBitsMultiple = Feature{ - .name = "insertReferenceBitsMultiple", - .llvm_name = "insert-reference-bits-multiple", - .description = "Assume that the insert-reference-bits-multiple facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_interlockedAccess1 = Feature{ - .name = "interlockedAccess1", - .llvm_name = "interlocked-access1", - .description = "Assume that interlocked-access facility 1 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loadAndTrap = Feature{ - .name = "loadAndTrap", - .llvm_name = "load-and-trap", - .description = "Assume that the load-and-trap facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loadAndZeroRightmostByte = Feature{ - .name = "loadAndZeroRightmostByte", - .llvm_name = "load-and-zero-rightmost-byte", - .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loadStoreOnCond = Feature{ - .name = "loadStoreOnCond", - .llvm_name = "load-store-on-cond", - .description = "Assume that the load/store-on-condition facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_loadStoreOnCond2 = Feature{ - .name = "loadStoreOnCond2", - .llvm_name = "load-store-on-cond-2", - .description = "Assume that the load/store-on-condition facility 2 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension3 = Feature{ - .name = "messageSecurityAssistExtension3", - .llvm_name = "message-security-assist-extension3", - .description = "Assume that the message-security-assist extension facility 3 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension4 = Feature{ - .name = "messageSecurityAssistExtension4", - .llvm_name = "message-security-assist-extension4", - .description = "Assume that the message-security-assist extension facility 4 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension5 = Feature{ - .name = "messageSecurityAssistExtension5", - .llvm_name = "message-security-assist-extension5", - .description = "Assume that the message-security-assist extension facility 5 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension7 = Feature{ - .name = "messageSecurityAssistExtension7", - .llvm_name = "message-security-assist-extension7", - .description = "Assume that the message-security-assist extension facility 7 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension8 = Feature{ - .name = "messageSecurityAssistExtension8", - .llvm_name = "message-security-assist-extension8", - .description = "Assume that the message-security-assist extension facility 8 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_messageSecurityAssistExtension9 = Feature{ - .name = "messageSecurityAssistExtension9", - .llvm_name = "message-security-assist-extension9", - .description = "Assume that the message-security-assist extension facility 9 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_miscellaneousExtensions = Feature{ - .name = "miscellaneousExtensions", - .llvm_name = "miscellaneous-extensions", - .description = "Assume that the miscellaneous-extensions facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_miscellaneousExtensions2 = Feature{ - .name = "miscellaneousExtensions2", - .llvm_name = "miscellaneous-extensions-2", - .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_miscellaneousExtensions3 = Feature{ - .name = "miscellaneousExtensions3", - .llvm_name = "miscellaneous-extensions-3", - .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_populationCount = Feature{ - .name = "populationCount", - .llvm_name = "population-count", - .description = "Assume that the population-count facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_processorAssist = Feature{ - .name = "processorAssist", - .llvm_name = "processor-assist", - .description = "Assume that the processor-assist facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_resetReferenceBitsMultiple = Feature{ - .name = "resetReferenceBitsMultiple", - .llvm_name = "reset-reference-bits-multiple", - .description = "Assume that the reset-reference-bits-multiple facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_transactionalExecution = Feature{ - .name = "transactionalExecution", - .llvm_name = "transactional-execution", - .description = "Assume that the transactional-execution facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vector = Feature{ - .name = "vector", - .llvm_name = "vector", - .description = "Assume that the vectory facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vectorEnhancements1 = Feature{ - .name = "vectorEnhancements1", - .llvm_name = "vector-enhancements-1", - .description = "Assume that the vector enhancements facility 1 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vectorEnhancements2 = Feature{ - .name = "vectorEnhancements2", - .llvm_name = "vector-enhancements-2", - .description = "Assume that the vector enhancements facility 2 is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vectorPackedDecimal = Feature{ - .name = "vectorPackedDecimal", - .llvm_name = "vector-packed-decimal", - .description = "Assume that the vector packed decimal facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_vectorPackedDecimalEnhancement = Feature{ - .name = "vectorPackedDecimalEnhancement", - .llvm_name = "vector-packed-decimal-enhancement", - .description = "Assume that the vector packed decimal enhancement facility is installed", - .dependencies = &[_]*const Feature { - }, -}; - -pub const features = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_deflateConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_enhancedSort, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_guardedStorage, - &feature_highWord, - &feature_insertReferenceBitsMultiple, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_messageSecurityAssistExtension7, - &feature_messageSecurityAssistExtension8, - &feature_messageSecurityAssistExtension9, - &feature_miscellaneousExtensions, - &feature_miscellaneousExtensions2, - &feature_miscellaneousExtensions3, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - &feature_vectorEnhancements1, - &feature_vectorEnhancements2, - &feature_vectorPackedDecimal, - &feature_vectorPackedDecimalEnhancement, -}; - -pub const cpu_arch10 = Cpu{ - .name = "arch10", - .llvm_name = "arch10", - .dependencies = &[_]*const Feature { - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadStoreOnCond, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_miscellaneousExtensions, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - }, -}; - -pub const cpu_arch11 = Cpu{ - .name = "arch11", - .llvm_name = "arch11", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_miscellaneousExtensions, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - }, -}; - -pub const cpu_arch12 = Cpu{ - .name = "arch12", - .llvm_name = "arch12", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_guardedStorage, - &feature_highWord, - &feature_insertReferenceBitsMultiple, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_messageSecurityAssistExtension7, - &feature_messageSecurityAssistExtension8, - &feature_miscellaneousExtensions, - &feature_miscellaneousExtensions2, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - &feature_vectorEnhancements1, - &feature_vectorPackedDecimal, - }, -}; - -pub const cpu_arch13 = Cpu{ - .name = "arch13", - .llvm_name = "arch13", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_deflateConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_enhancedSort, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_guardedStorage, - &feature_highWord, - &feature_insertReferenceBitsMultiple, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_messageSecurityAssistExtension7, - &feature_messageSecurityAssistExtension8, - &feature_messageSecurityAssistExtension9, - &feature_miscellaneousExtensions, - &feature_miscellaneousExtensions2, - &feature_miscellaneousExtensions3, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - &feature_vectorEnhancements1, - &feature_vectorEnhancements2, - &feature_vectorPackedDecimal, - &feature_vectorPackedDecimalEnhancement, - }, -}; - -pub const cpu_arch8 = Cpu{ - .name = "arch8", - .llvm_name = "arch8", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_arch9 = Cpu{ - .name = "arch9", - .llvm_name = "arch9", - .dependencies = &[_]*const Feature { - &feature_distinctOps, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadStoreOnCond, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_populationCount, - &feature_resetReferenceBitsMultiple, - }, -}; - -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_z10 = Cpu{ - .name = "z10", - .llvm_name = "z10", - .dependencies = &[_]*const Feature { - }, -}; - -pub const cpu_z13 = Cpu{ - .name = "z13", - .llvm_name = "z13", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_miscellaneousExtensions, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - }, -}; - -pub const cpu_z14 = Cpu{ - .name = "z14", - .llvm_name = "z14", - .dependencies = &[_]*const Feature { - &feature_dfpPackedConversion, - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_guardedStorage, - &feature_highWord, - &feature_insertReferenceBitsMultiple, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadAndZeroRightmostByte, - &feature_loadStoreOnCond, - &feature_loadStoreOnCond2, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_messageSecurityAssistExtension5, - &feature_messageSecurityAssistExtension7, - &feature_messageSecurityAssistExtension8, - &feature_miscellaneousExtensions, - &feature_miscellaneousExtensions2, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - &feature_vector, - &feature_vectorEnhancements1, - &feature_vectorPackedDecimal, - }, -}; - -pub const cpu_z196 = Cpu{ - .name = "z196", - .llvm_name = "z196", - .dependencies = &[_]*const Feature { - &feature_distinctOps, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadStoreOnCond, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_populationCount, - &feature_resetReferenceBitsMultiple, - }, -}; - -pub const cpu_zEC12 = Cpu{ - .name = "zEC12", - .llvm_name = "zEC12", - .dependencies = &[_]*const Feature { - &feature_dfpZonedConversion, - &feature_distinctOps, - &feature_enhancedDat2, - &feature_executionHint, - &feature_fpExtension, - &feature_fastSerialization, - &feature_highWord, - &feature_interlockedAccess1, - &feature_loadAndTrap, - &feature_loadStoreOnCond, - &feature_messageSecurityAssistExtension3, - &feature_messageSecurityAssistExtension4, - &feature_miscellaneousExtensions, - &feature_populationCount, - &feature_processorAssist, - &feature_resetReferenceBitsMultiple, - &feature_transactionalExecution, - }, -}; - -pub const cpus = &[_]*const Cpu { - &cpu_arch10, - &cpu_arch11, - &cpu_arch12, - &cpu_arch13, - &cpu_arch8, - &cpu_arch9, - &cpu_generic, - &cpu_z10, - &cpu_z13, - &cpu_z14, - &cpu_z196, - &cpu_zEC12, +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; + +pub const Feature = enum { + deflate_conversion, + dfp_packed_conversion, + dfp_zoned_conversion, + distinct_ops, + enhanced_dat_2, + enhanced_sort, + execution_hint, + fast_serialization, + fp_extension, + guarded_storage, + high_word, + insert_reference_bits_multiple, + interlocked_access1, + load_and_trap, + load_and_zero_rightmost_byte, + load_store_on_cond, + load_store_on_cond_2, + message_security_assist_extension3, + message_security_assist_extension4, + message_security_assist_extension5, + message_security_assist_extension7, + message_security_assist_extension8, + message_security_assist_extension9, + miscellaneous_extensions, + miscellaneous_extensions_2, + miscellaneous_extensions_3, + population_count, + processor_assist, + reset_reference_bits_multiple, + transactional_execution, + vector, + vector_enhancements_1, + vector_enhancements_2, + vector_packed_decimal, + vector_packed_decimal_enhancement, +}; + +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); + +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.deflate_conversion)] = .{ + .index = @enumToInt(Feature.deflate_conversion), + .name = @tagName(Feature.deflate_conversion), + .llvm_name = "deflate-conversion", + .description = "Assume that the deflate-conversion facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.dfp_packed_conversion)] = .{ + .index = @enumToInt(Feature.dfp_packed_conversion), + .name = @tagName(Feature.dfp_packed_conversion), + .llvm_name = "dfp-packed-conversion", + .description = "Assume that the DFP packed-conversion facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.dfp_zoned_conversion)] = .{ + .index = @enumToInt(Feature.dfp_zoned_conversion), + .name = @tagName(Feature.dfp_zoned_conversion), + .llvm_name = "dfp-zoned-conversion", + .description = "Assume that the DFP zoned-conversion facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.distinct_ops)] = .{ + .index = @enumToInt(Feature.distinct_ops), + .name = @tagName(Feature.distinct_ops), + .llvm_name = "distinct-ops", + .description = "Assume that the distinct-operands facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.enhanced_dat_2)] = .{ + .index = @enumToInt(Feature.enhanced_dat_2), + .name = @tagName(Feature.enhanced_dat_2), + .llvm_name = "enhanced-dat-2", + .description = "Assume that the enhanced-DAT facility 2 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.enhanced_sort)] = .{ + .index = @enumToInt(Feature.enhanced_sort), + .name = @tagName(Feature.enhanced_sort), + .llvm_name = "enhanced-sort", + .description = "Assume that the enhanced-sort facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.execution_hint)] = .{ + .index = @enumToInt(Feature.execution_hint), + .name = @tagName(Feature.execution_hint), + .llvm_name = "execution-hint", + .description = "Assume that the execution-hint facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.fast_serialization)] = .{ + .index = @enumToInt(Feature.fast_serialization), + .name = @tagName(Feature.fast_serialization), + .llvm_name = "fast-serialization", + .description = "Assume that the fast-serialization facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.fp_extension)] = .{ + .index = @enumToInt(Feature.fp_extension), + .name = @tagName(Feature.fp_extension), + .llvm_name = "fp-extension", + .description = "Assume that the floating-point extension facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.guarded_storage)] = .{ + .index = @enumToInt(Feature.guarded_storage), + .name = @tagName(Feature.guarded_storage), + .llvm_name = "guarded-storage", + .description = "Assume that the guarded-storage facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.high_word)] = .{ + .index = @enumToInt(Feature.high_word), + .name = @tagName(Feature.high_word), + .llvm_name = "high-word", + .description = "Assume that the high-word facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{ + .index = @enumToInt(Feature.insert_reference_bits_multiple), + .name = @tagName(Feature.insert_reference_bits_multiple), + .llvm_name = "insert-reference-bits-multiple", + .description = "Assume that the insert-reference-bits-multiple facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.interlocked_access1)] = .{ + .index = @enumToInt(Feature.interlocked_access1), + .name = @tagName(Feature.interlocked_access1), + .llvm_name = "interlocked-access1", + .description = "Assume that interlocked-access facility 1 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.load_and_trap)] = .{ + .index = @enumToInt(Feature.load_and_trap), + .name = @tagName(Feature.load_and_trap), + .llvm_name = "load-and-trap", + .description = "Assume that the load-and-trap facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{ + .index = @enumToInt(Feature.load_and_zero_rightmost_byte), + .name = @tagName(Feature.load_and_zero_rightmost_byte), + .llvm_name = "load-and-zero-rightmost-byte", + .description = "Assume that the load-and-zero-rightmost-byte facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.load_store_on_cond)] = .{ + .index = @enumToInt(Feature.load_store_on_cond), + .name = @tagName(Feature.load_store_on_cond), + .llvm_name = "load-store-on-cond", + .description = "Assume that the load/store-on-condition facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.load_store_on_cond_2)] = .{ + .index = @enumToInt(Feature.load_store_on_cond_2), + .name = @tagName(Feature.load_store_on_cond_2), + .llvm_name = "load-store-on-cond-2", + .description = "Assume that the load/store-on-condition facility 2 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension3)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension3), + .name = @tagName(Feature.message_security_assist_extension3), + .llvm_name = "message-security-assist-extension3", + .description = "Assume that the message-security-assist extension facility 3 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension4)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension4), + .name = @tagName(Feature.message_security_assist_extension4), + .llvm_name = "message-security-assist-extension4", + .description = "Assume that the message-security-assist extension facility 4 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension5)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension5), + .name = @tagName(Feature.message_security_assist_extension5), + .llvm_name = "message-security-assist-extension5", + .description = "Assume that the message-security-assist extension facility 5 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension7)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension7), + .name = @tagName(Feature.message_security_assist_extension7), + .llvm_name = "message-security-assist-extension7", + .description = "Assume that the message-security-assist extension facility 7 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension8)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension8), + .name = @tagName(Feature.message_security_assist_extension8), + .llvm_name = "message-security-assist-extension8", + .description = "Assume that the message-security-assist extension facility 8 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.message_security_assist_extension9)] = .{ + .index = @enumToInt(Feature.message_security_assist_extension9), + .name = @tagName(Feature.message_security_assist_extension9), + .llvm_name = "message-security-assist-extension9", + .description = "Assume that the message-security-assist extension facility 9 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.miscellaneous_extensions)] = .{ + .index = @enumToInt(Feature.miscellaneous_extensions), + .name = @tagName(Feature.miscellaneous_extensions), + .llvm_name = "miscellaneous-extensions", + .description = "Assume that the miscellaneous-extensions facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{ + .index = @enumToInt(Feature.miscellaneous_extensions_2), + .name = @tagName(Feature.miscellaneous_extensions_2), + .llvm_name = "miscellaneous-extensions-2", + .description = "Assume that the miscellaneous-extensions facility 2 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{ + .index = @enumToInt(Feature.miscellaneous_extensions_3), + .name = @tagName(Feature.miscellaneous_extensions_3), + .llvm_name = "miscellaneous-extensions-3", + .description = "Assume that the miscellaneous-extensions facility 3 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.population_count)] = .{ + .index = @enumToInt(Feature.population_count), + .name = @tagName(Feature.population_count), + .llvm_name = "population-count", + .description = "Assume that the population-count facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.processor_assist)] = .{ + .index = @enumToInt(Feature.processor_assist), + .name = @tagName(Feature.processor_assist), + .llvm_name = "processor-assist", + .description = "Assume that the processor-assist facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{ + .index = @enumToInt(Feature.reset_reference_bits_multiple), + .name = @tagName(Feature.reset_reference_bits_multiple), + .llvm_name = "reset-reference-bits-multiple", + .description = "Assume that the reset-reference-bits-multiple facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.transactional_execution)] = .{ + .index = @enumToInt(Feature.transactional_execution), + .name = @tagName(Feature.transactional_execution), + .llvm_name = "transactional-execution", + .description = "Assume that the transactional-execution facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.vector)] = .{ + .index = @enumToInt(Feature.vector), + .name = @tagName(Feature.vector), + .llvm_name = "vector", + .description = "Assume that the vectory facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.vector_enhancements_1)] = .{ + .index = @enumToInt(Feature.vector_enhancements_1), + .name = @tagName(Feature.vector_enhancements_1), + .llvm_name = "vector-enhancements-1", + .description = "Assume that the vector enhancements facility 1 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.vector_enhancements_2)] = .{ + .index = @enumToInt(Feature.vector_enhancements_2), + .name = @tagName(Feature.vector_enhancements_2), + .llvm_name = "vector-enhancements-2", + .description = "Assume that the vector enhancements facility 2 is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.vector_packed_decimal)] = .{ + .index = @enumToInt(Feature.vector_packed_decimal), + .name = @tagName(Feature.vector_packed_decimal), + .llvm_name = "vector-packed-decimal", + .description = "Assume that the vector packed decimal facility is installed", + .dependencies = 0, + }; + result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{ + .index = @enumToInt(Feature.vector_packed_decimal_enhancement), + .name = @tagName(Feature.vector_packed_decimal_enhancement), + .llvm_name = "vector-packed-decimal-enhancement", + .description = "Assume that the vector packed decimal enhancement facility is installed", + .dependencies = 0, + }; + break :blk result; +}; + +pub const cpu = struct { + pub const arch10 = Cpu{ + .name = "arch10", + .llvm_name = "arch10", + .features = featureSet(&[_]Feature{ + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_and_trap, + .load_store_on_cond, + .message_security_assist_extension3, + .message_security_assist_extension4, + .miscellaneous_extensions, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + }), + }; + pub const arch11 = Cpu{ + .name = "arch11", + .llvm_name = "arch11", + .features = featureSet(&[_]Feature{ + .dfp_packed_conversion, + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_and_trap, + .load_and_zero_rightmost_byte, + .load_store_on_cond, + .load_store_on_cond_2, + .message_security_assist_extension3, + .message_security_assist_extension4, + .message_security_assist_extension5, + .miscellaneous_extensions, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + .vector, + }), + }; + pub const arch12 = Cpu{ + .name = "arch12", + .llvm_name = "arch12", + .features = featureSet(&[_]Feature{ + .dfp_packed_conversion, + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .guarded_storage, + .high_word, + .insert_reference_bits_multiple, + .interlocked_access1, + .load_and_trap, + .load_and_zero_rightmost_byte, + .load_store_on_cond, + .load_store_on_cond_2, + .message_security_assist_extension3, + .message_security_assist_extension4, + .message_security_assist_extension5, + .message_security_assist_extension7, + .message_security_assist_extension8, + .miscellaneous_extensions, + .miscellaneous_extensions_2, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + .vector, + .vector_enhancements_1, + .vector_packed_decimal, + }), + }; + pub const arch13 = Cpu{ + .name = "arch13", + .llvm_name = "arch13", + .features = featureSet(&[_]Feature{ + .deflate_conversion, + .dfp_packed_conversion, + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .enhanced_sort, + .execution_hint, + .fast_serialization, + .fp_extension, + .guarded_storage, + .high_word, + .insert_reference_bits_multiple, + .interlocked_access1, + .load_and_trap, + .load_and_zero_rightmost_byte, + .load_store_on_cond, + .load_store_on_cond_2, + .message_security_assist_extension3, + .message_security_assist_extension4, + .message_security_assist_extension5, + .message_security_assist_extension7, + .message_security_assist_extension8, + .message_security_assist_extension9, + .miscellaneous_extensions, + .miscellaneous_extensions_2, + .miscellaneous_extensions_3, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + .vector, + .vector_enhancements_1, + .vector_enhancements_2, + .vector_packed_decimal, + .vector_packed_decimal_enhancement, + }), + }; + pub const arch8 = Cpu{ + .name = "arch8", + .llvm_name = "arch8", + .features = 0, + }; + pub const arch9 = Cpu{ + .name = "arch9", + .llvm_name = "arch9", + .features = featureSet(&[_]Feature{ + .distinct_ops, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_store_on_cond, + .message_security_assist_extension3, + .message_security_assist_extension4, + .population_count, + .reset_reference_bits_multiple, + }), + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const z10 = Cpu{ + .name = "z10", + .llvm_name = "z10", + .features = 0, + }; + pub const z13 = Cpu{ + .name = "z13", + .llvm_name = "z13", + .features = featureSet(&[_]Feature{ + .dfp_packed_conversion, + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_and_trap, + .load_and_zero_rightmost_byte, + .load_store_on_cond, + .load_store_on_cond_2, + .message_security_assist_extension3, + .message_security_assist_extension4, + .message_security_assist_extension5, + .miscellaneous_extensions, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + .vector, + }), + }; + pub const z14 = Cpu{ + .name = "z14", + .llvm_name = "z14", + .features = featureSet(&[_]Feature{ + .dfp_packed_conversion, + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .guarded_storage, + .high_word, + .insert_reference_bits_multiple, + .interlocked_access1, + .load_and_trap, + .load_and_zero_rightmost_byte, + .load_store_on_cond, + .load_store_on_cond_2, + .message_security_assist_extension3, + .message_security_assist_extension4, + .message_security_assist_extension5, + .message_security_assist_extension7, + .message_security_assist_extension8, + .miscellaneous_extensions, + .miscellaneous_extensions_2, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + .vector, + .vector_enhancements_1, + .vector_packed_decimal, + }), + }; + pub const z196 = Cpu{ + .name = "z196", + .llvm_name = "z196", + .features = featureSet(&[_]Feature{ + .distinct_ops, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_store_on_cond, + .message_security_assist_extension3, + .message_security_assist_extension4, + .population_count, + .reset_reference_bits_multiple, + }), + }; + pub const zEC12 = Cpu{ + .name = "zEC12", + .llvm_name = "zEC12", + .features = featureSet(&[_]Feature{ + .dfp_zoned_conversion, + .distinct_ops, + .enhanced_dat_2, + .execution_hint, + .fast_serialization, + .fp_extension, + .high_word, + .interlocked_access1, + .load_and_trap, + .load_store_on_cond, + .message_security_assist_extension3, + .message_security_assist_extension4, + .miscellaneous_extensions, + .population_count, + .processor_assist, + .reset_reference_bits_multiple, + .transactional_execution, + }), + }; +}; + +/// All systemz CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.arch10, + &cpu.arch11, + &cpu.arch12, + &cpu.arch13, + &cpu.arch8, + &cpu.arch9, + &cpu.generic, + &cpu.z10, + &cpu.z13, + &cpu.z14, + &cpu.z196, + &cpu.zEC12, }; diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 61df1820b5d55d4a0c099d996febf759b82ca75e..8546b067dd2dcd2adff538b18402fd20656e3b70 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -1,128 +1,129 @@ -const Feature = @import("std").target.Feature; -const Cpu = @import("std").target.Cpu; +const std = @import("../std.zig"); +const Cpu = std.Target.Cpu; -pub const feature_atomics = Feature{ - .name = "atomics", - .llvm_name = "atomics", - .description = "Enable Atomics", - .dependencies = &[_]*const Feature { - }, +pub const Feature = enum { + atomics, + bulk_memory, + exception_handling, + multivalue, + mutable_globals, + nontrapping_fptoint, + sign_ext, + simd128, + tail_call, + unimplemented_simd128, }; -pub const feature_bulkMemory = Feature{ - .name = "bulkMemory", - .llvm_name = "bulk-memory", - .description = "Enable bulk memory operations", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_exceptionHandling = Feature{ - .name = "exceptionHandling", - .llvm_name = "exception-handling", - .description = "Enable Wasm exception handling", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_multivalue = Feature{ - .name = "multivalue", - .llvm_name = "multivalue", - .description = "Enable multivalue blocks, instructions, and functions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_mutableGlobals = Feature{ - .name = "mutableGlobals", - .llvm_name = "mutable-globals", - .description = "Enable mutable globals", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_nontrappingFptoint = Feature{ - .name = "nontrappingFptoint", - .llvm_name = "nontrapping-fptoint", - .description = "Enable non-trapping float-to-int conversion operators", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_simd128 = Feature{ - .name = "simd128", - .llvm_name = "simd128", - .description = "Enable 128-bit SIMD", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_signExt = Feature{ - .name = "signExt", - .llvm_name = "sign-ext", - .description = "Enable sign extension operators", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_tailCall = Feature{ - .name = "tailCall", - .llvm_name = "tail-call", - .description = "Enable tail call instructions", - .dependencies = &[_]*const Feature { - }, -}; - -pub const feature_unimplementedSimd128 = Feature{ - .name = "unimplementedSimd128", - .llvm_name = "unimplemented-simd128", - .description = "Enable 128-bit SIMD not yet implemented in engines", - .dependencies = &[_]*const Feature { - &feature_simd128, - }, -}; - -pub const features = &[_]*const Feature { - &feature_atomics, - &feature_bulkMemory, - &feature_exceptionHandling, - &feature_multivalue, - &feature_mutableGlobals, - &feature_nontrappingFptoint, - &feature_simd128, - &feature_signExt, - &feature_tailCall, - &feature_unimplementedSimd128, -}; - -pub const cpu_bleedingEdge = Cpu{ - .name = "bleedingEdge", - .llvm_name = "bleeding-edge", - .dependencies = &[_]*const Feature { - &feature_atomics, - &feature_mutableGlobals, - &feature_nontrappingFptoint, - &feature_simd128, - &feature_signExt, - }, -}; +pub usingnamespace Cpu.Feature.feature_set_fns(Feature); -pub const cpu_generic = Cpu{ - .name = "generic", - .llvm_name = "generic", - .dependencies = &[_]*const Feature { - }, +pub const all_features = blk: { + const len = @typeInfo(Feature).Enum.fields.len; + std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.atomics)] = .{ + .index = @enumToInt(Feature.atomics), + .name = @tagName(Feature.atomics), + .llvm_name = "atomics", + .description = "Enable Atomics", + .dependencies = 0, + }; + result[@enumToInt(Feature.bulk_memory)] = .{ + .index = @enumToInt(Feature.bulk_memory), + .name = @tagName(Feature.bulk_memory), + .llvm_name = "bulk-memory", + .description = "Enable bulk memory operations", + .dependencies = 0, + }; + result[@enumToInt(Feature.exception_handling)] = .{ + .index = @enumToInt(Feature.exception_handling), + .name = @tagName(Feature.exception_handling), + .llvm_name = "exception-handling", + .description = "Enable Wasm exception handling", + .dependencies = 0, + }; + result[@enumToInt(Feature.multivalue)] = .{ + .index = @enumToInt(Feature.multivalue), + .name = @tagName(Feature.multivalue), + .llvm_name = "multivalue", + .description = "Enable multivalue blocks, instructions, and functions", + .dependencies = 0, + }; + result[@enumToInt(Feature.mutable_globals)] = .{ + .index = @enumToInt(Feature.mutable_globals), + .name = @tagName(Feature.mutable_globals), + .llvm_name = "mutable-globals", + .description = "Enable mutable globals", + .dependencies = 0, + }; + result[@enumToInt(Feature.nontrapping_fptoint)] = .{ + .index = @enumToInt(Feature.nontrapping_fptoint), + .name = @tagName(Feature.nontrapping_fptoint), + .llvm_name = "nontrapping-fptoint", + .description = "Enable non-trapping float-to-int conversion operators", + .dependencies = 0, + }; + result[@enumToInt(Feature.sign_ext)] = .{ + .index = @enumToInt(Feature.sign_ext), + .name = @tagName(Feature.sign_ext), + .llvm_name = "sign-ext", + .description = "Enable sign extension operators", + .dependencies = 0, + }; + result[@enumToInt(Feature.simd128)] = .{ + .index = @enumToInt(Feature.simd128), + .name = @tagName(Feature.simd128), + .llvm_name = "simd128", + .description = "Enable 128-bit SIMD", + .dependencies = 0, + }; + result[@enumToInt(Feature.tail_call)] = .{ + .index = @enumToInt(Feature.tail_call), + .name = @tagName(Feature.tail_call), + .llvm_name = "tail-call", + .description = "Enable tail call instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.unimplemented_simd128)] = .{ + .index = @enumToInt(Feature.unimplemented_simd128), + .name = @tagName(Feature.unimplemented_simd128), + .llvm_name = "unimplemented-simd128", + .description = "Enable 128-bit SIMD not yet implemented in engines", + .dependencies = featureSet(&[_]Feature{ + .simd128, + }), + }; + break :blk result; }; -pub const cpu_mvp = Cpu{ - .name = "mvp", - .llvm_name = "mvp", - .dependencies = &[_]*const Feature { - }, +pub const cpu = struct { + pub const bleeding_edge = Cpu{ + .name = "bleeding_edge", + .llvm_name = "bleeding-edge", + .features = featureSet(&[_]Feature{ + .atomics, + .mutable_globals, + .nontrapping_fptoint, + .sign_ext, + .simd128, + }), + }; + pub const generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .features = 0, + }; + pub const mvp = Cpu{ + .name = "mvp", + .llvm_name = "mvp", + .features = 0, + }; }; -pub const cpus = &[_]*const Cpu { - &cpu_bleedingEdge, - &cpu_generic, - &cpu_mvp, +/// All wasm CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. +pub const all_cpus = &[_]*const Cpu{ + &cpu.bleeding_edge, + &cpu.generic, + &cpu.mvp, }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 50b332f5e1d2e9afde13a3f98ef3df0e96cc16b9..9d3b57440125b4b76f0cb992363134f619805d51 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -108,12 +108,12 @@ pub const Feature = enum { slow_unaligned_mem_32, soft_float, sse, + sse_unaligned_mem, sse2, sse3, sse4_1, sse4_2, sse4a, - sse_unaligned_mem, ssse3, tbm, vaes, @@ -134,7 +134,6 @@ pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); var result: [len]Cpu.Feature = undefined; - result[@enumToInt(Feature.@"16bit_mode")] = .{ .index = @enumToInt(Feature.@"16bit_mode"), .name = @tagName(Feature.@"16bit_mode"), @@ -142,7 +141,6 @@ pub const all_features = blk: { .description = "16-bit mode (i8086)", .dependencies = 0, }; - result[@enumToInt(Feature.@"32bit_mode")] = .{ .index = @enumToInt(Feature.@"32bit_mode"), .name = @tagName(Feature.@"32bit_mode"), @@ -150,7 +148,6 @@ pub const all_features = blk: { .description = "32-bit mode (80386)", .dependencies = 0, }; - result[@enumToInt(Feature.@"3dnow")] = .{ .index = @enumToInt(Feature.@"3dnow"), .name = @tagName(Feature.@"3dnow"), @@ -160,17 +157,15 @@ pub const all_features = blk: { .mmx, }), }; - result[@enumToInt(Feature.@"3dnowa")] = .{ .index = @enumToInt(Feature.@"3dnowa"), .name = @tagName(Feature.@"3dnowa"), .llvm_name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", .dependencies = featureSet(&[_]Feature{ - .mmx, + .@"3dnow", }), }; - result[@enumToInt(Feature.@"64bit")] = .{ .index = @enumToInt(Feature.@"64bit"), .name = @tagName(Feature.@"64bit"), @@ -178,7 +173,6 @@ pub const all_features = blk: { .description = "Support 64-bit instructions", .dependencies = 0, }; - result[@enumToInt(Feature.@"64bit_mode")] = .{ .index = @enumToInt(Feature.@"64bit_mode"), .name = @tagName(Feature.@"64bit_mode"), @@ -186,167 +180,233 @@ pub const all_features = blk: { .description = "64-bit mode (x86_64)", .dependencies = 0, }; - result[@enumToInt(Feature.adx)] = .{ .index = @enumToInt(Feature.adx), .name = @tagName(Feature.adx), .llvm_name = "adx", .description = "Support ADX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), .name = @tagName(Feature.aes), .llvm_name = "aes", .description = "Enable AES instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse2, }), }; - result[@enumToInt(Feature.avx)] = .{ .index = @enumToInt(Feature.avx), .name = @tagName(Feature.avx), .llvm_name = "avx", .description = "Enable AVX instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse4_2, }), }; - result[@enumToInt(Feature.avx2)] = .{ .index = @enumToInt(Feature.avx2), .name = @tagName(Feature.avx2), .llvm_name = "avx2", .description = "Enable AVX2 instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .avx, }), }; - - result[@enumToInt(Feature.avx512f)] = .{ - .index = @enumToInt(Feature.avx512f), - .name = @tagName(Feature.avx512f), - .llvm_name = "avx512f", - .description = "Enable AVX-512 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.avx512bf16)] = .{ .index = @enumToInt(Feature.avx512bf16), .name = @tagName(Feature.avx512bf16), .llvm_name = "avx512bf16", .description = "Support bfloat16 floating point", .dependencies = featureSet(&[_]Feature{ - .sse, + .avx512bw, }), }; - result[@enumToInt(Feature.avx512bitalg)] = .{ .index = @enumToInt(Feature.avx512bitalg), .name = @tagName(Feature.avx512bitalg), .llvm_name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", .dependencies = featureSet(&[_]Feature{ - .sse, + .avx512bw, + }), + }; + result[@enumToInt(Feature.avx512bw)] = .{ + .index = @enumToInt(Feature.avx512bw), + .name = @tagName(Feature.avx512bw), + .llvm_name = "avx512bw", + .description = "Enable AVX-512 Byte and Word Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512cd)] = .{ + .index = @enumToInt(Feature.avx512cd), + .name = @tagName(Feature.avx512cd), + .llvm_name = "avx512cd", + .description = "Enable AVX-512 Conflict Detection Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512dq)] = .{ + .index = @enumToInt(Feature.avx512dq), + .name = @tagName(Feature.avx512dq), + .llvm_name = "avx512dq", + .description = "Enable AVX-512 Doubleword and Quadword Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512er)] = .{ + .index = @enumToInt(Feature.avx512er), + .name = @tagName(Feature.avx512er), + .llvm_name = "avx512er", + .description = "Enable AVX-512 Exponential and Reciprocal Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512f)] = .{ + .index = @enumToInt(Feature.avx512f), + .name = @tagName(Feature.avx512f), + .llvm_name = "avx512f", + .description = "Enable AVX-512 instructions", + .dependencies = featureSet(&[_]Feature{ + .avx2, + .f16c, + .fma, + }), + }; + result[@enumToInt(Feature.avx512ifma)] = .{ + .index = @enumToInt(Feature.avx512ifma), + .name = @tagName(Feature.avx512ifma), + .llvm_name = "avx512ifma", + .description = "Enable AVX-512 Integer Fused Multiple-Add", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512pf)] = .{ + .index = @enumToInt(Feature.avx512pf), + .name = @tagName(Feature.avx512pf), + .llvm_name = "avx512pf", + .description = "Enable AVX-512 PreFetch Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512vbmi)] = .{ + .index = @enumToInt(Feature.avx512vbmi), + .name = @tagName(Feature.avx512vbmi), + .llvm_name = "avx512vbmi", + .description = "Enable AVX-512 Vector Byte Manipulation Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512bw, + }), + }; + result[@enumToInt(Feature.avx512vbmi2)] = .{ + .index = @enumToInt(Feature.avx512vbmi2), + .name = @tagName(Feature.avx512vbmi2), + .llvm_name = "avx512vbmi2", + .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512bw, + }), + }; + result[@enumToInt(Feature.avx512vl)] = .{ + .index = @enumToInt(Feature.avx512vl), + .name = @tagName(Feature.avx512vl), + .llvm_name = "avx512vl", + .description = "Enable AVX-512 Vector Length eXtensions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512vnni)] = .{ + .index = @enumToInt(Feature.avx512vnni), + .name = @tagName(Feature.avx512vnni), + .llvm_name = "avx512vnni", + .description = "Enable AVX-512 Vector Neural Network Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512vp2intersect)] = .{ + .index = @enumToInt(Feature.avx512vp2intersect), + .name = @tagName(Feature.avx512vp2intersect), + .llvm_name = "avx512vp2intersect", + .description = "Enable AVX-512 vp2intersect", + .dependencies = featureSet(&[_]Feature{ + .avx512f, + }), + }; + result[@enumToInt(Feature.avx512vpopcntdq)] = .{ + .index = @enumToInt(Feature.avx512vpopcntdq), + .name = @tagName(Feature.avx512vpopcntdq), + .llvm_name = "avx512vpopcntdq", + .description = "Enable AVX-512 Population Count Instructions", + .dependencies = featureSet(&[_]Feature{ + .avx512f, }), }; - result[@enumToInt(Feature.bmi)] = .{ .index = @enumToInt(Feature.bmi), .name = @tagName(Feature.bmi), .llvm_name = "bmi", .description = "Support BMI instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.bmi2)] = .{ .index = @enumToInt(Feature.bmi2), .name = @tagName(Feature.bmi2), .llvm_name = "bmi2", .description = "Support BMI2 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - - result[@enumToInt(Feature.avx512bw)] = .{ - .index = @enumToInt(Feature.avx512bw), - .name = @tagName(Feature.avx512bw), - .llvm_name = "avx512bw", - .description = "Enable AVX-512 Byte and Word Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.branchfusion)] = .{ .index = @enumToInt(Feature.branchfusion), .name = @tagName(Feature.branchfusion), .llvm_name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - - result[@enumToInt(Feature.avx512cd)] = .{ - .index = @enumToInt(Feature.avx512cd), - .name = @tagName(Feature.avx512cd), - .llvm_name = "avx512cd", - .description = "Enable AVX-512 Conflict Detection Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.cldemote)] = .{ .index = @enumToInt(Feature.cldemote), .name = @tagName(Feature.cldemote), .llvm_name = "cldemote", .description = "Enable Cache Demote", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.clflushopt)] = .{ .index = @enumToInt(Feature.clflushopt), .name = @tagName(Feature.clflushopt), .llvm_name = "clflushopt", .description = "Flush A Cache Line Optimized", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.clwb)] = .{ .index = @enumToInt(Feature.clwb), .name = @tagName(Feature.clwb), .llvm_name = "clwb", .description = "Cache Line Write Back", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.clzero)] = .{ .index = @enumToInt(Feature.clzero), .name = @tagName(Feature.clzero), .llvm_name = "clzero", .description = "Enable Cache Line Zero", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - result[@enumToInt(Feature.cmov)] = .{ .index = @enumToInt(Feature.cmov), .name = @tagName(Feature.cmov), .llvm_name = "cmov", .description = "Enable conditional move instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = 0, }; - - result[@enumToInt(Feature.cx8)] = .{ - .index = @enumToInt(Feature.cx8), - .name = @tagName(Feature.cx8), - .llvm_name = "cx8", - .description = "Support CMPXCHG8B instructions", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.cx16)] = .{ .index = @enumToInt(Feature.cx16), .name = @tagName(Feature.cx16), @@ -356,17 +416,13 @@ pub const all_features = blk: { .cx8, }), }; - - result[@enumToInt(Feature.avx512dq)] = .{ - .index = @enumToInt(Feature.avx512dq), - .name = @tagName(Feature.avx512dq), - .llvm_name = "avx512dq", - .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), + result[@enumToInt(Feature.cx8)] = .{ + .index = @enumToInt(Feature.cx8), + .name = @tagName(Feature.cx8), + .llvm_name = "cx8", + .description = "Support CMPXCHG8B instructions", + .dependencies = 0, }; - result[@enumToInt(Feature.enqcmd)] = .{ .index = @enumToInt(Feature.enqcmd), .name = @tagName(Feature.enqcmd), @@ -374,17 +430,6 @@ pub const all_features = blk: { .description = "Has ENQCMD instructions", .dependencies = 0, }; - - result[@enumToInt(Feature.avx512er)] = .{ - .index = @enumToInt(Feature.avx512er), - .name = @tagName(Feature.avx512er), - .llvm_name = "avx512er", - .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.ermsb)] = .{ .index = @enumToInt(Feature.ermsb), .name = @tagName(Feature.ermsb), @@ -392,53 +437,29 @@ pub const all_features = blk: { .description = "REP MOVS/STOS are fast", .dependencies = 0, }; - result[@enumToInt(Feature.f16c)] = .{ .index = @enumToInt(Feature.f16c), .name = @tagName(Feature.f16c), .llvm_name = "f16c", .description = "Support 16-bit floating point conversion instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .avx, }), }; - - result[@enumToInt(Feature.fma)] = .{ - .index = @enumToInt(Feature.fma), - .name = @tagName(Feature.fma), - .llvm_name = "fma", - .description = "Enable three-operand fused multiple-add", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.fma4)] = .{ - .index = @enumToInt(Feature.fma4), - .name = @tagName(Feature.fma4), - .llvm_name = "fma4", - .description = "Enable four-operand fused multiple-add", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.fsgsbase)] = .{ - .index = @enumToInt(Feature.fsgsbase), - .name = @tagName(Feature.fsgsbase), - .llvm_name = "fsgsbase", - .description = "Support FS/GS Base instructions", + result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ + .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt), + .name = @tagName(Feature.false_deps_lzcnt_tzcnt), + .llvm_name = "false-deps-lzcnt-tzcnt", + .description = "LZCNT/TZCNT have a false dependency on dest register", .dependencies = 0, }; - - result[@enumToInt(Feature.fxsr)] = .{ - .index = @enumToInt(Feature.fxsr), - .name = @tagName(Feature.fxsr), - .llvm_name = "fxsr", - .description = "Support fxsave/fxrestore instructions", + result[@enumToInt(Feature.false_deps_popcnt)] = .{ + .index = @enumToInt(Feature.false_deps_popcnt), + .name = @tagName(Feature.false_deps_popcnt), + .llvm_name = "false-deps-popcnt", + .description = "POPCNT has a false dependency on dest register", .dependencies = 0, }; - result[@enumToInt(Feature.fast_11bytenop)] = .{ .index = @enumToInt(Feature.fast_11bytenop), .name = @tagName(Feature.fast_11bytenop), @@ -446,7 +467,6 @@ pub const all_features = blk: { .description = "Target can quickly decode up to 11 byte NOPs", .dependencies = 0, }; - result[@enumToInt(Feature.fast_15bytenop)] = .{ .index = @enumToInt(Feature.fast_15bytenop), .name = @tagName(Feature.fast_15bytenop), @@ -454,7 +474,6 @@ pub const all_features = blk: { .description = "Target can quickly decode up to 15 byte NOPs", .dependencies = 0, }; - result[@enumToInt(Feature.fast_bextr)] = .{ .index = @enumToInt(Feature.fast_bextr), .name = @tagName(Feature.fast_bextr), @@ -462,17 +481,22 @@ pub const all_features = blk: { .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", .dependencies = 0, }; - + result[@enumToInt(Feature.fast_gather)] = .{ + .index = @enumToInt(Feature.fast_gather), + .name = @tagName(Feature.fast_gather), + .llvm_name = "fast-gather", + .description = "Indicates if gather is reasonably fast", + .dependencies = 0, + }; result[@enumToInt(Feature.fast_hops)] = .{ .index = @enumToInt(Feature.fast_hops), .name = @tagName(Feature.fast_hops), .llvm_name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse3, }), }; - result[@enumToInt(Feature.fast_lzcnt)] = .{ .index = @enumToInt(Feature.fast_lzcnt), .name = @tagName(Feature.fast_lzcnt), @@ -480,7 +504,6 @@ pub const all_features = blk: { .description = "LZCNT instructions are as fast as most simple integer ops", .dependencies = 0, }; - result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{ .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write), .name = @tagName(Feature.fast_partial_ymm_or_zmm_write), @@ -488,15 +511,6 @@ pub const all_features = blk: { .description = "Partial writes to YMM/ZMM registers are fast", .dependencies = 0, }; - - result[@enumToInt(Feature.fast_shld_rotate)] = .{ - .index = @enumToInt(Feature.fast_shld_rotate), - .name = @tagName(Feature.fast_shld_rotate), - .llvm_name = "fast-shld-rotate", - .description = "SHLD can be used as a faster rotate", - .dependencies = 0, - }; - result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{ .index = @enumToInt(Feature.fast_scalar_fsqrt), .name = @tagName(Feature.fast_scalar_fsqrt), @@ -504,7 +518,6 @@ pub const all_features = blk: { .description = "Scalar SQRT is fast (disable Newton-Raphson)", .dependencies = 0, }; - result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{ .index = @enumToInt(Feature.fast_scalar_shift_masks), .name = @tagName(Feature.fast_scalar_shift_masks), @@ -512,7 +525,13 @@ pub const all_features = blk: { .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", .dependencies = 0, }; - + result[@enumToInt(Feature.fast_shld_rotate)] = .{ + .index = @enumToInt(Feature.fast_shld_rotate), + .name = @tagName(Feature.fast_shld_rotate), + .llvm_name = "fast-shld-rotate", + .description = "SHLD can be used as a faster rotate", + .dependencies = 0, + }; result[@enumToInt(Feature.fast_variable_shuffle)] = .{ .index = @enumToInt(Feature.fast_variable_shuffle), .name = @tagName(Feature.fast_variable_shuffle), @@ -520,7 +539,6 @@ pub const all_features = blk: { .description = "Shuffles with variable masks are fast", .dependencies = 0, }; - result[@enumToInt(Feature.fast_vector_fsqrt)] = .{ .index = @enumToInt(Feature.fast_vector_fsqrt), .name = @tagName(Feature.fast_vector_fsqrt), @@ -528,7 +546,6 @@ pub const all_features = blk: { .description = "Vector SQRT is fast (disable Newton-Raphson)", .dependencies = 0, }; - result[@enumToInt(Feature.fast_vector_shift_masks)] = .{ .index = @enumToInt(Feature.fast_vector_shift_masks), .name = @tagName(Feature.fast_vector_shift_masks), @@ -536,35 +553,62 @@ pub const all_features = blk: { .description = "Prefer a left/right vector logical shift pair over a shift+and pair", .dependencies = 0, }; - + result[@enumToInt(Feature.fma)] = .{ + .index = @enumToInt(Feature.fma), + .name = @tagName(Feature.fma), + .llvm_name = "fma", + .description = "Enable three-operand fused multiple-add", + .dependencies = featureSet(&[_]Feature{ + .avx, + }), + }; + result[@enumToInt(Feature.fma4)] = .{ + .index = @enumToInt(Feature.fma4), + .name = @tagName(Feature.fma4), + .llvm_name = "fma4", + .description = "Enable four-operand fused multiple-add", + .dependencies = featureSet(&[_]Feature{ + .avx, + .sse4a, + }), + }; + result[@enumToInt(Feature.fsgsbase)] = .{ + .index = @enumToInt(Feature.fsgsbase), + .name = @tagName(Feature.fsgsbase), + .llvm_name = "fsgsbase", + .description = "Support FS/GS Base instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.fxsr)] = .{ + .index = @enumToInt(Feature.fxsr), + .name = @tagName(Feature.fxsr), + .llvm_name = "fxsr", + .description = "Support fxsave/fxrestore instructions", + .dependencies = 0, + }; result[@enumToInt(Feature.gfni)] = .{ .index = @enumToInt(Feature.gfni), .name = @tagName(Feature.gfni), .llvm_name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse2, }), }; - - result[@enumToInt(Feature.fast_gather)] = .{ - .index = @enumToInt(Feature.fast_gather), - .name = @tagName(Feature.fast_gather), - .llvm_name = "fast-gather", - .description = "Indicates if gather is reasonably fast", + result[@enumToInt(Feature.idivl_to_divb)] = .{ + .index = @enumToInt(Feature.idivl_to_divb), + .name = @tagName(Feature.idivl_to_divb), + .llvm_name = "idivl-to-divb", + .description = "Use 8-bit divide for positive values less than 256", .dependencies = 0, }; - - result[@enumToInt(Feature.avx512ifma)] = .{ - .index = @enumToInt(Feature.avx512ifma), - .name = @tagName(Feature.avx512ifma), - .llvm_name = "avx512ifma", - .description = "Enable AVX-512 Integer Fused Multiple-Add", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), + result[@enumToInt(Feature.idivq_to_divl)] = .{ + .index = @enumToInt(Feature.idivq_to_divl), + .name = @tagName(Feature.idivq_to_divl), + .llvm_name = "idivq-to-divl", + .description = "Use 32-bit divide for positive values less than 2^32", + .dependencies = 0, }; - result[@enumToInt(Feature.invpcid)] = .{ .index = @enumToInt(Feature.invpcid), .name = @tagName(Feature.invpcid), @@ -572,15 +616,6 @@ pub const all_features = blk: { .description = "Invalidate Process-Context Identifier", .dependencies = 0, }; - - result[@enumToInt(Feature.sahf)] = .{ - .index = @enumToInt(Feature.sahf), - .name = @tagName(Feature.sahf), - .llvm_name = "sahf", - .description = "Support LAHF and SAHF instructions", - .dependencies = 0, - }; - result[@enumToInt(Feature.lea_sp)] = .{ .index = @enumToInt(Feature.lea_sp), .name = @tagName(Feature.lea_sp), @@ -588,7 +623,6 @@ pub const all_features = blk: { .description = "Use LEA for adjusting the stack pointer", .dependencies = 0, }; - result[@enumToInt(Feature.lea_uses_ag)] = .{ .index = @enumToInt(Feature.lea_uses_ag), .name = @tagName(Feature.lea_uses_ag), @@ -596,7 +630,6 @@ pub const all_features = blk: { .description = "LEA instruction needs inputs at AG stage", .dependencies = 0, }; - result[@enumToInt(Feature.lwp)] = .{ .index = @enumToInt(Feature.lwp), .name = @tagName(Feature.lwp), @@ -604,7 +637,6 @@ pub const all_features = blk: { .description = "Enable LWP instructions", .dependencies = 0, }; - result[@enumToInt(Feature.lzcnt)] = .{ .index = @enumToInt(Feature.lzcnt), .name = @tagName(Feature.lzcnt), @@ -612,15 +644,20 @@ pub const all_features = blk: { .description = "Support LZCNT instruction", .dependencies = 0, }; - - result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ - .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt), - .name = @tagName(Feature.false_deps_lzcnt_tzcnt), - .llvm_name = "false-deps-lzcnt-tzcnt", - .description = "LZCNT/TZCNT have a false dependency on dest register", + result[@enumToInt(Feature.macrofusion)] = .{ + .index = @enumToInt(Feature.macrofusion), + .name = @tagName(Feature.macrofusion), + .llvm_name = "macrofusion", + .description = "Various instructions can be fused with conditional branches", + .dependencies = 0, + }; + result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ + .index = @enumToInt(Feature.merge_to_threeway_branch), + .name = @tagName(Feature.merge_to_threeway_branch), + .llvm_name = "merge-to-threeway-branch", + .description = "Merge branches to a three-way conditional branch", .dependencies = 0, }; - result[@enumToInt(Feature.mmx)] = .{ .index = @enumToInt(Feature.mmx), .name = @tagName(Feature.mmx), @@ -628,7 +665,6 @@ pub const all_features = blk: { .description = "Enable MMX instructions", .dependencies = 0, }; - result[@enumToInt(Feature.movbe)] = .{ .index = @enumToInt(Feature.movbe), .name = @tagName(Feature.movbe), @@ -636,7 +672,6 @@ pub const all_features = blk: { .description = "Support MOVBE instruction", .dependencies = 0, }; - result[@enumToInt(Feature.movdir64b)] = .{ .index = @enumToInt(Feature.movdir64b), .name = @tagName(Feature.movdir64b), @@ -644,7 +679,6 @@ pub const all_features = blk: { .description = "Support movdir64b instruction", .dependencies = 0, }; - result[@enumToInt(Feature.movdiri)] = .{ .index = @enumToInt(Feature.movdiri), .name = @tagName(Feature.movdiri), @@ -652,7 +686,6 @@ pub const all_features = blk: { .description = "Support movdiri instruction", .dependencies = 0, }; - result[@enumToInt(Feature.mpx)] = .{ .index = @enumToInt(Feature.mpx), .name = @tagName(Feature.mpx), @@ -660,7 +693,6 @@ pub const all_features = blk: { .description = "Support MPX instructions", .dependencies = 0, }; - result[@enumToInt(Feature.mwaitx)] = .{ .index = @enumToInt(Feature.mwaitx), .name = @tagName(Feature.mwaitx), @@ -668,23 +700,6 @@ pub const all_features = blk: { .description = "Enable MONITORX/MWAITX timer functionality", .dependencies = 0, }; - - result[@enumToInt(Feature.macrofusion)] = .{ - .index = @enumToInt(Feature.macrofusion), - .name = @tagName(Feature.macrofusion), - .llvm_name = "macrofusion", - .description = "Various instructions can be fused with conditional branches", - .dependencies = 0, - }; - - result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ - .index = @enumToInt(Feature.merge_to_threeway_branch), - .name = @tagName(Feature.merge_to_threeway_branch), - .llvm_name = "merge-to-threeway-branch", - .description = "Merge branches to a three-way conditional branch", - .dependencies = 0, - }; - result[@enumToInt(Feature.nopl)] = .{ .index = @enumToInt(Feature.nopl), .name = @tagName(Feature.nopl), @@ -692,17 +707,22 @@ pub const all_features = blk: { .description = "Enable NOPL instruction", .dependencies = 0, }; - + result[@enumToInt(Feature.pad_short_functions)] = .{ + .index = @enumToInt(Feature.pad_short_functions), + .name = @tagName(Feature.pad_short_functions), + .llvm_name = "pad-short-functions", + .description = "Pad short functions", + .dependencies = 0, + }; result[@enumToInt(Feature.pclmul)] = .{ .index = @enumToInt(Feature.pclmul), .name = @tagName(Feature.pclmul), .llvm_name = "pclmul", .description = "Enable packed carry-less multiplication instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse2, }), }; - result[@enumToInt(Feature.pconfig)] = .{ .index = @enumToInt(Feature.pconfig), .name = @tagName(Feature.pconfig), @@ -710,17 +730,6 @@ pub const all_features = blk: { .description = "platform configuration instruction", .dependencies = 0, }; - - result[@enumToInt(Feature.avx512pf)] = .{ - .index = @enumToInt(Feature.avx512pf), - .name = @tagName(Feature.avx512pf), - .llvm_name = "avx512pf", - .description = "Enable AVX-512 PreFetch Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.pku)] = .{ .index = @enumToInt(Feature.pku), .name = @tagName(Feature.pku), @@ -728,7 +737,6 @@ pub const all_features = blk: { .description = "Enable protection keys", .dependencies = 0, }; - result[@enumToInt(Feature.popcnt)] = .{ .index = @enumToInt(Feature.popcnt), .name = @tagName(Feature.popcnt), @@ -736,15 +744,13 @@ pub const all_features = blk: { .description = "Support POPCNT instruction", .dependencies = 0, }; - - result[@enumToInt(Feature.false_deps_popcnt)] = .{ - .index = @enumToInt(Feature.false_deps_popcnt), - .name = @tagName(Feature.false_deps_popcnt), - .llvm_name = "false-deps-popcnt", - .description = "POPCNT has a false dependency on dest register", + result[@enumToInt(Feature.prefer_256_bit)] = .{ + .index = @enumToInt(Feature.prefer_256_bit), + .name = @tagName(Feature.prefer_256_bit), + .llvm_name = "prefer-256-bit", + .description = "Prefer 256-bit AVX instructions", .dependencies = 0, }; - result[@enumToInt(Feature.prefetchwt1)] = .{ .index = @enumToInt(Feature.prefetchwt1), .name = @tagName(Feature.prefetchwt1), @@ -752,7 +758,6 @@ pub const all_features = blk: { .description = "Prefetch with Intent to Write and T1 Hint", .dependencies = 0, }; - result[@enumToInt(Feature.prfchw)] = .{ .index = @enumToInt(Feature.prfchw), .name = @tagName(Feature.prfchw), @@ -760,7 +765,6 @@ pub const all_features = blk: { .description = "Support PRFCHW instructions", .dependencies = 0, }; - result[@enumToInt(Feature.ptwrite)] = .{ .index = @enumToInt(Feature.ptwrite), .name = @tagName(Feature.ptwrite), @@ -768,23 +772,6 @@ pub const all_features = blk: { .description = "Support ptwrite instruction", .dependencies = 0, }; - - result[@enumToInt(Feature.pad_short_functions)] = .{ - .index = @enumToInt(Feature.pad_short_functions), - .name = @tagName(Feature.pad_short_functions), - .llvm_name = "pad-short-functions", - .description = "Pad short functions", - .dependencies = 0, - }; - - result[@enumToInt(Feature.prefer_256_bit)] = .{ - .index = @enumToInt(Feature.prefer_256_bit), - .name = @tagName(Feature.prefer_256_bit), - .llvm_name = "prefer-256-bit", - .description = "Prefer 256-bit AVX instructions", - .dependencies = 0, - }; - result[@enumToInt(Feature.rdpid)] = .{ .index = @enumToInt(Feature.rdpid), .name = @tagName(Feature.rdpid), @@ -792,7 +779,6 @@ pub const all_features = blk: { .description = "Support RDPID instructions", .dependencies = 0, }; - result[@enumToInt(Feature.rdrnd)] = .{ .index = @enumToInt(Feature.rdrnd), .name = @tagName(Feature.rdrnd), @@ -800,7 +786,6 @@ pub const all_features = blk: { .description = "Support RDRAND instruction", .dependencies = 0, }; - result[@enumToInt(Feature.rdseed)] = .{ .index = @enumToInt(Feature.rdseed), .name = @tagName(Feature.rdseed), @@ -808,26 +793,16 @@ pub const all_features = blk: { .description = "Support RDSEED instruction", .dependencies = 0, }; - - result[@enumToInt(Feature.rtm)] = .{ - .index = @enumToInt(Feature.rtm), - .name = @tagName(Feature.rtm), - .llvm_name = "rtm", - .description = "Support RTM instructions", - .dependencies = 0, - }; - result[@enumToInt(Feature.retpoline)] = .{ .index = @enumToInt(Feature.retpoline), .name = @tagName(Feature.retpoline), .llvm_name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", .dependencies = featureSet(&[_]Feature{ - .retpoline_indirect_calls, .retpoline_indirect_branches, + .retpoline_indirect_calls, }), }; - result[@enumToInt(Feature.retpoline_external_thunk)] = .{ .index = @enumToInt(Feature.retpoline_external_thunk), .name = @tagName(Feature.retpoline_external_thunk), @@ -837,7 +812,6 @@ pub const all_features = blk: { .retpoline_indirect_calls, }), }; - result[@enumToInt(Feature.retpoline_indirect_branches)] = .{ .index = @enumToInt(Feature.retpoline_indirect_branches), .name = @tagName(Feature.retpoline_indirect_branches), @@ -845,7 +819,6 @@ pub const all_features = blk: { .description = "Remove speculation of indirect branches from the generated code", .dependencies = 0, }; - result[@enumToInt(Feature.retpoline_indirect_calls)] = .{ .index = @enumToInt(Feature.retpoline_indirect_calls), .name = @tagName(Feature.retpoline_indirect_calls), @@ -853,7 +826,20 @@ pub const all_features = blk: { .description = "Remove speculation of indirect calls from the generated code", .dependencies = 0, }; - + result[@enumToInt(Feature.rtm)] = .{ + .index = @enumToInt(Feature.rtm), + .name = @tagName(Feature.rtm), + .llvm_name = "rtm", + .description = "Support RTM instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sahf)] = .{ + .index = @enumToInt(Feature.sahf), + .name = @tagName(Feature.sahf), + .llvm_name = "sahf", + .description = "Support LAHF and SAHF instructions", + .dependencies = 0, + }; result[@enumToInt(Feature.sgx)] = .{ .index = @enumToInt(Feature.sgx), .name = @tagName(Feature.sgx), @@ -861,17 +847,15 @@ pub const all_features = blk: { .description = "Enable Software Guard Extensions", .dependencies = 0, }; - result[@enumToInt(Feature.sha)] = .{ .index = @enumToInt(Feature.sha), .name = @tagName(Feature.sha), .llvm_name = "sha", .description = "Enable SHA instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .sse2, }), }; - result[@enumToInt(Feature.shstk)] = .{ .index = @enumToInt(Feature.shstk), .name = @tagName(Feature.shstk), @@ -879,83 +863,6 @@ pub const all_features = blk: { .description = "Support CET Shadow-Stack instructions", .dependencies = 0, }; - - result[@enumToInt(Feature.sse)] = .{ - .index = @enumToInt(Feature.sse), - .name = @tagName(Feature.sse), - .llvm_name = "sse", - .description = "Enable SSE instructions", - .dependencies = 0, - }; - - result[@enumToInt(Feature.sse2)] = .{ - .index = @enumToInt(Feature.sse2), - .name = @tagName(Feature.sse2), - .llvm_name = "sse2", - .description = "Enable SSE2 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.sse3)] = .{ - .index = @enumToInt(Feature.sse3), - .name = @tagName(Feature.sse3), - .llvm_name = "sse3", - .description = "Enable SSE3 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.sse4a)] = .{ - .index = @enumToInt(Feature.sse4a), - .name = @tagName(Feature.sse4a), - .llvm_name = "sse4a", - .description = "Support SSE 4a instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.sse4_1)] = .{ - .index = @enumToInt(Feature.sse4_1), - .name = @tagName(Feature.sse4_1), - .llvm_name = "sse4.1", - .description = "Enable SSE 4.1 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.sse4_2)] = .{ - .index = @enumToInt(Feature.sse4_2), - .name = @tagName(Feature.sse4_2), - .llvm_name = "sse4.2", - .description = "Enable SSE 4.2 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.sse_unaligned_mem)] = .{ - .index = @enumToInt(Feature.sse_unaligned_mem), - .name = @tagName(Feature.sse_unaligned_mem), - .llvm_name = "sse-unaligned-mem", - .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = 0, - }; - - result[@enumToInt(Feature.ssse3)] = .{ - .index = @enumToInt(Feature.ssse3), - .name = @tagName(Feature.ssse3), - .llvm_name = "ssse3", - .description = "Enable SSSE3 instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.slow_3ops_lea)] = .{ .index = @enumToInt(Feature.slow_3ops_lea), .name = @tagName(Feature.slow_3ops_lea), @@ -963,23 +870,6 @@ pub const all_features = blk: { .description = "LEA instruction with 3 ops or certain registers is slow", .dependencies = 0, }; - - result[@enumToInt(Feature.idivl_to_divb)] = .{ - .index = @enumToInt(Feature.idivl_to_divb), - .name = @tagName(Feature.idivl_to_divb), - .llvm_name = "idivl-to-divb", - .description = "Use 8-bit divide for positive values less than 256", - .dependencies = 0, - }; - - result[@enumToInt(Feature.idivq_to_divl)] = .{ - .index = @enumToInt(Feature.idivq_to_divl), - .name = @tagName(Feature.idivq_to_divl), - .llvm_name = "idivq-to-divl", - .description = "Use 32-bit divide for positive values less than 2^32", - .dependencies = 0, - }; - result[@enumToInt(Feature.slow_incdec)] = .{ .index = @enumToInt(Feature.slow_incdec), .name = @tagName(Feature.slow_incdec), @@ -987,7 +877,6 @@ pub const all_features = blk: { .description = "INC and DEC instructions are slower than ADD and SUB", .dependencies = 0, }; - result[@enumToInt(Feature.slow_lea)] = .{ .index = @enumToInt(Feature.slow_lea), .name = @tagName(Feature.slow_lea), @@ -995,7 +884,6 @@ pub const all_features = blk: { .description = "LEA instruction with certain arguments is slow", .dependencies = 0, }; - result[@enumToInt(Feature.slow_pmaddwd)] = .{ .index = @enumToInt(Feature.slow_pmaddwd), .name = @tagName(Feature.slow_pmaddwd), @@ -1003,7 +891,6 @@ pub const all_features = blk: { .description = "PMADDWD is slower than PMULLD", .dependencies = 0, }; - result[@enumToInt(Feature.slow_pmulld)] = .{ .index = @enumToInt(Feature.slow_pmulld), .name = @tagName(Feature.slow_pmulld), @@ -1011,7 +898,6 @@ pub const all_features = blk: { .description = "PMULLD instruction is slow", .dependencies = 0, }; - result[@enumToInt(Feature.slow_shld)] = .{ .index = @enumToInt(Feature.slow_shld), .name = @tagName(Feature.slow_shld), @@ -1019,7 +905,6 @@ pub const all_features = blk: { .description = "SHLD instruction is slow", .dependencies = 0, }; - result[@enumToInt(Feature.slow_two_mem_ops)] = .{ .index = @enumToInt(Feature.slow_two_mem_ops), .name = @tagName(Feature.slow_two_mem_ops), @@ -1027,7 +912,6 @@ pub const all_features = blk: { .description = "Two memory operand instructions are slow", .dependencies = 0, }; - result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{ .index = @enumToInt(Feature.slow_unaligned_mem_16), .name = @tagName(Feature.slow_unaligned_mem_16), @@ -1035,7 +919,6 @@ pub const all_features = blk: { .description = "Slow unaligned 16-byte memory access", .dependencies = 0, }; - result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{ .index = @enumToInt(Feature.slow_unaligned_mem_32), .name = @tagName(Feature.slow_unaligned_mem_32), @@ -1043,7 +926,6 @@ pub const all_features = blk: { .description = "Slow unaligned 32-byte memory access", .dependencies = 0, }; - result[@enumToInt(Feature.soft_float)] = .{ .index = @enumToInt(Feature.soft_float), .name = @tagName(Feature.soft_float), @@ -1051,7 +933,74 @@ pub const all_features = blk: { .description = "Use software floating point features", .dependencies = 0, }; - + result[@enumToInt(Feature.sse)] = .{ + .index = @enumToInt(Feature.sse), + .name = @tagName(Feature.sse), + .llvm_name = "sse", + .description = "Enable SSE instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sse_unaligned_mem)] = .{ + .index = @enumToInt(Feature.sse_unaligned_mem), + .name = @tagName(Feature.sse_unaligned_mem), + .llvm_name = "sse-unaligned-mem", + .description = "Allow unaligned memory operands with SSE instructions", + .dependencies = 0, + }; + result[@enumToInt(Feature.sse2)] = .{ + .index = @enumToInt(Feature.sse2), + .name = @tagName(Feature.sse2), + .llvm_name = "sse2", + .description = "Enable SSE2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse, + }), + }; + result[@enumToInt(Feature.sse3)] = .{ + .index = @enumToInt(Feature.sse3), + .name = @tagName(Feature.sse3), + .llvm_name = "sse3", + .description = "Enable SSE3 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse2, + }), + }; + result[@enumToInt(Feature.sse4_1)] = .{ + .index = @enumToInt(Feature.sse4_1), + .name = @tagName(Feature.sse4_1), + .llvm_name = "sse4.1", + .description = "Enable SSE 4.1 instructions", + .dependencies = featureSet(&[_]Feature{ + .ssse3, + }), + }; + result[@enumToInt(Feature.sse4_2)] = .{ + .index = @enumToInt(Feature.sse4_2), + .name = @tagName(Feature.sse4_2), + .llvm_name = "sse4.2", + .description = "Enable SSE 4.2 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse4_1, + }), + }; + result[@enumToInt(Feature.sse4a)] = .{ + .index = @enumToInt(Feature.sse4a), + .name = @tagName(Feature.sse4a), + .llvm_name = "sse4a", + .description = "Support SSE 4a instructions", + .dependencies = featureSet(&[_]Feature{ + .sse3, + }), + }; + result[@enumToInt(Feature.ssse3)] = .{ + .index = @enumToInt(Feature.ssse3), + .name = @tagName(Feature.ssse3), + .llvm_name = "ssse3", + .description = "Enable SSSE3 instructions", + .dependencies = featureSet(&[_]Feature{ + .sse3, + }), + }; result[@enumToInt(Feature.tbm)] = .{ .index = @enumToInt(Feature.tbm), .name = @tagName(Feature.tbm), @@ -1059,87 +1008,26 @@ pub const all_features = blk: { .description = "Enable TBM instructions", .dependencies = 0, }; - result[@enumToInt(Feature.vaes)] = .{ .index = @enumToInt(Feature.vaes), .name = @tagName(Feature.vaes), .llvm_name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", .dependencies = featureSet(&[_]Feature{ - .sse, + .aes, + .avx, }), }; - - result[@enumToInt(Feature.avx512vbmi)] = .{ - .index = @enumToInt(Feature.avx512vbmi), - .name = @tagName(Feature.avx512vbmi), - .llvm_name = "avx512vbmi", - .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.avx512vbmi2)] = .{ - .index = @enumToInt(Feature.avx512vbmi2), - .name = @tagName(Feature.avx512vbmi2), - .llvm_name = "avx512vbmi2", - .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.avx512vl)] = .{ - .index = @enumToInt(Feature.avx512vl), - .name = @tagName(Feature.avx512vl), - .llvm_name = "avx512vl", - .description = "Enable AVX-512 Vector Length eXtensions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.avx512vnni)] = .{ - .index = @enumToInt(Feature.avx512vnni), - .name = @tagName(Feature.avx512vnni), - .llvm_name = "avx512vnni", - .description = "Enable AVX-512 Vector Neural Network Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - - result[@enumToInt(Feature.avx512vp2intersect)] = .{ - .index = @enumToInt(Feature.avx512vp2intersect), - .name = @tagName(Feature.avx512vp2intersect), - .llvm_name = "avx512vp2intersect", - .description = "Enable AVX-512 vp2intersect", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.vpclmulqdq)] = .{ .index = @enumToInt(Feature.vpclmulqdq), .name = @tagName(Feature.vpclmulqdq), .llvm_name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .avx, + .pclmul, }), }; - - result[@enumToInt(Feature.avx512vpopcntdq)] = .{ - .index = @enumToInt(Feature.avx512vpopcntdq), - .name = @tagName(Feature.avx512vpopcntdq), - .llvm_name = "avx512vpopcntdq", - .description = "Enable AVX-512 Population Count Instructions", - .dependencies = featureSet(&[_]Feature{ - .sse, - }), - }; - result[@enumToInt(Feature.waitpkg)] = .{ .index = @enumToInt(Feature.waitpkg), .name = @tagName(Feature.waitpkg), @@ -1147,7 +1035,6 @@ pub const all_features = blk: { .description = "Wait and pause enhancements", .dependencies = 0, }; - result[@enumToInt(Feature.wbnoinvd)] = .{ .index = @enumToInt(Feature.wbnoinvd), .name = @tagName(Feature.wbnoinvd), @@ -1155,7 +1042,6 @@ pub const all_features = blk: { .description = "Write Back No Invalidate", .dependencies = 0, }; - result[@enumToInt(Feature.x87)] = .{ .index = @enumToInt(Feature.x87), .name = @tagName(Feature.x87), @@ -1163,17 +1049,15 @@ pub const all_features = blk: { .description = "Enable X87 float instructions", .dependencies = 0, }; - result[@enumToInt(Feature.xop)] = .{ .index = @enumToInt(Feature.xop), .name = @tagName(Feature.xop), .llvm_name = "xop", .description = "Enable XOP instructions", .dependencies = featureSet(&[_]Feature{ - .sse, + .fma4, }), }; - result[@enumToInt(Feature.xsave)] = .{ .index = @enumToInt(Feature.xsave), .name = @tagName(Feature.xsave), @@ -1181,7 +1065,6 @@ pub const all_features = blk: { .description = "Support xsave instructions", .dependencies = 0, }; - result[@enumToInt(Feature.xsavec)] = .{ .index = @enumToInt(Feature.xsavec), .name = @tagName(Feature.xsavec), @@ -1189,7 +1072,6 @@ pub const all_features = blk: { .description = "Support xsavec instructions", .dependencies = 0, }; - result[@enumToInt(Feature.xsaveopt)] = .{ .index = @enumToInt(Feature.xsaveopt), .name = @tagName(Feature.xsaveopt), @@ -1197,7 +1079,6 @@ pub const all_features = blk: { .description = "Support xsaveopt instructions", .dependencies = 0, }; - result[@enumToInt(Feature.xsaves)] = .{ .index = @enumToInt(Feature.xsaves), .name = @tagName(Feature.xsaves), @@ -1205,7 +1086,6 @@ pub const all_features = blk: { .description = "Support xsaves instructions", .dependencies = 0, }; - break :blk result; }; @@ -1214,30 +1094,26 @@ pub const cpu = struct { .name = "amdfam10", .llvm_name = "amdfam10", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_scalar_shift_masks, - .sahf, + .fxsr, .lzcnt, .nopl, .popcnt, - .sse, - .sse4a, + .sahf, .slow_shld, + .sse4a, .x87, }), }; - pub const athlon = Cpu{ .name = "athlon", .llvm_name = "athlon", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cmov, .cx8, @@ -1247,66 +1123,57 @@ pub const cpu = struct { .x87, }), }; - - pub const athlon4 = Cpu{ + pub const athlon_4 = Cpu{ .name = "athlon_4", .llvm_name = "athlon-4", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cmov, .cx8, .fxsr, .nopl, - .sse, .slow_shld, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const athlon_fx = Cpu{ .name = "athlon_fx", .llvm_name = "athlon-fx", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, .cx8, - .fxsr, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse2, .slow_shld, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const athlon_mp = Cpu{ .name = "athlon_mp", .llvm_name = "athlon-mp", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cmov, .cx8, .fxsr, .nopl, - .sse, .slow_shld, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const athlon_tbird = Cpu{ .name = "athlon_tbird", .llvm_name = "athlon-tbird", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cmov, .cx8, @@ -1316,129 +1183,113 @@ pub const cpu = struct { .x87, }), }; - pub const athlon_xp = Cpu{ .name = "athlon_xp", .llvm_name = "athlon-xp", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cmov, .cx8, .fxsr, .nopl, - .sse, .slow_shld, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const athlon64 = Cpu{ .name = "athlon64", .llvm_name = "athlon64", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, .cx8, - .fxsr, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse2, .slow_shld, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const athlon64_sse3 = Cpu{ .name = "athlon64_sse3", .llvm_name = "athlon64-sse3", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse3, .slow_shld, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const atom = Cpu{ .name = "atom", .llvm_name = "atom", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, + .idivl_to_divb, + .idivq_to_divl, .lea_sp, .lea_uses_ag, .mmx, .movbe, .nopl, .pad_short_functions, - .sse, - .ssse3, - .idivl_to_divb, - .idivq_to_divl, + .sahf, .slow_two_mem_ops, .slow_unaligned_mem_16, + .ssse3, .x87, }), }; - pub const barcelona = Cpu{ .name = "barcelona", .llvm_name = "barcelona", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_scalar_shift_masks, - .sahf, + .fxsr, .lzcnt, .nopl, .popcnt, - .sse, - .sse4a, + .sahf, .slow_shld, + .sse4a, .x87, }), }; - pub const bdver1 = Cpu{ .name = "bdver1", .llvm_name = "bdver1", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .branchfusion, .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_11bytenop, .fast_scalar_shift_masks, - .sahf, + .fxsr, .lwp, .lzcnt, .mmx, @@ -1446,32 +1297,30 @@ pub const cpu = struct { .pclmul, .popcnt, .prfchw, + .sahf, .slow_shld, .x87, .xop, .xsave, }), }; - pub const bdver2 = Cpu{ .name = "bdver2", .llvm_name = "bdver2", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .bmi, .branchfusion, .cmov, - .cx8, .cx16, + .cx8, .f16c, - .fma, - .fxsr, .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, - .sahf, + .fma, + .fxsr, .lwp, .lzcnt, .mmx, @@ -1479,6 +1328,7 @@ pub const cpu = struct { .pclmul, .popcnt, .prfchw, + .sahf, .slow_shld, .tbm, .x87, @@ -1486,27 +1336,24 @@ pub const cpu = struct { .xsave, }), }; - pub const bdver3 = Cpu{ .name = "bdver3", .llvm_name = "bdver3", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .bmi, .branchfusion, .cmov, - .cx8, .cx16, + .cx8, .f16c, - .fma, - .fsgsbase, - .fxsr, .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, - .sahf, + .fma, + .fsgsbase, + .fxsr, .lwp, .lzcnt, .mmx, @@ -1514,6 +1361,7 @@ pub const cpu = struct { .pclmul, .popcnt, .prfchw, + .sahf, .slow_shld, .tbm, .x87, @@ -1522,29 +1370,26 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const bdver4 = Cpu{ .name = "bdver4", .llvm_name = "bdver4", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .avx2, .bmi, .bmi2, .branchfusion, .cmov, - .cx8, .cx16, + .cx8, .f16c, - .fma, - .fsgsbase, - .fxsr, .fast_11bytenop, .fast_bextr, .fast_scalar_shift_masks, - .sahf, + .fma, + .fsgsbase, + .fxsr, .lwp, .lzcnt, .mmx, @@ -1553,6 +1398,7 @@ pub const cpu = struct { .pclmul, .popcnt, .prfchw, + .sahf, .slow_shld, .tbm, .x87, @@ -1561,119 +1407,110 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const bonnell = Cpu{ .name = "bonnell", .llvm_name = "bonnell", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, + .idivl_to_divb, + .idivq_to_divl, .lea_sp, .lea_uses_ag, .mmx, .movbe, .nopl, .pad_short_functions, - .sse, - .ssse3, - .idivl_to_divb, - .idivq_to_divl, + .sahf, .slow_two_mem_ops, .slow_unaligned_mem_16, + .ssse3, .x87, }), }; - pub const broadwell = Cpu{ .name = "broadwell", .llvm_name = "broadwell", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .avx, .avx2, .bmi, .bmi2, .cmov, - .cx8, .cx16, + .cx8, .ermsb, .f16c, + .false_deps_lzcnt_tzcnt, + .false_deps_popcnt, + .fast_scalar_fsqrt, + .fast_shld_rotate, + .fast_variable_shuffle, .fma, .fsgsbase, .fxsr, - .fast_shld_rotate, - .fast_scalar_fsqrt, - .fast_variable_shuffle, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, - .false_deps_lzcnt_tzcnt, - .mmx, - .movbe, .macrofusion, .merge_to_threeway_branch, + .mmx, + .movbe, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const btver1 = Cpu{ .name = "btver1", .llvm_name = "btver1", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_15bytenop, .fast_scalar_shift_masks, .fast_vector_shift_masks, - .sahf, + .fxsr, .lzcnt, .mmx, .nopl, .popcnt, .prfchw, - .sse, + .sahf, + .slow_shld, .sse4a, .ssse3, - .slow_shld, .x87, }), }; - pub const btver2 = Cpu{ .name = "btver2", .llvm_name = "btver2", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .avx, .bmi, .cmov, - .cx8, .cx16, + .cx8, .f16c, - .fxsr, .fast_15bytenop, .fast_bextr, .fast_hops, @@ -1681,7 +1518,7 @@ pub const cpu = struct { .fast_partial_ymm_or_zmm_write, .fast_scalar_shift_masks, .fast_vector_shift_masks, - .sahf, + .fxsr, .lzcnt, .mmx, .movbe, @@ -1689,27 +1526,25 @@ pub const cpu = struct { .pclmul, .popcnt, .prfchw, + .sahf, + .slow_shld, .sse4a, .ssse3, - .slow_shld, .x87, .xsave, .xsaveopt, }), }; - pub const c3 = Cpu{ .name = "c3", .llvm_name = "c3", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnow", .slow_unaligned_mem_16, .x87, }), }; - - pub const c32 = Cpu{ + pub const c3_2 = Cpu{ .name = "c3_2", .llvm_name = "c3-2", .features = featureSet(&[_]Feature{ @@ -1717,51 +1552,51 @@ pub const cpu = struct { .cx8, .fxsr, .mmx, - .sse, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const cannonlake = Cpu{ .name = "cannonlake", .llvm_name = "cannonlake", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, + .avx512bw, + .avx512cd, + .avx512dq, .avx512f, + .avx512ifma, + .avx512vbmi, + .avx512vl, .bmi, .bmi2, - .avx512bw, - .avx512cd, .clflushopt, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, - .avx512ifma, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, @@ -1769,13 +1604,11 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, + .sahf, .sgx, .sha, - .sse4_2, .slow_3ops_lea, - .idivq_to_divl, - .avx512vbmi, - .avx512vl, + .sse4_2, .x87, .xsave, .xsavec, @@ -1783,59 +1616,57 @@ pub const cpu = struct { .xsaves, }), }; - pub const cascadelake = Cpu{ .name = "cascadelake", .llvm_name = "cascadelake", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, + .avx512bw, + .avx512cd, + .avx512dq, .avx512f, + .avx512vl, + .avx512vnni, .bmi, .bmi2, - .avx512bw, - .avx512cd, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .false_deps_popcnt, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, - .avx512vl, - .avx512vnni, + .sse4_2, .x87, .xsave, .xsavec, @@ -1843,60 +1674,58 @@ pub const cpu = struct { .xsaves, }), }; - pub const cooperlake = Cpu{ .name = "cooperlake", .llvm_name = "cooperlake", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, - .avx512f, .avx512bf16, - .bmi, - .bmi2, .avx512bw, .avx512cd, + .avx512dq, + .avx512f, + .avx512vl, + .avx512vnni, + .bmi, + .bmi2, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .false_deps_popcnt, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, - .avx512vl, - .avx512vnni, + .sse4_2, .x87, .xsave, .xsavec, @@ -1904,155 +1733,144 @@ pub const cpu = struct { .xsaves, }), }; - pub const core_avx_i = Cpu{ .name = "core_avx_i", .llvm_name = "core-avx-i", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .cmov, - .cx8, .cx16, + .cx8, .f16c, + .false_deps_popcnt, + .fast_scalar_fsqrt, + .fast_shld_rotate, .fsgsbase, .fxsr, - .fast_shld_rotate, - .fast_scalar_fsqrt, - .sahf, - .mmx, + .idivq_to_divl, .macrofusion, .merge_to_threeway_branch, + .mmx, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .rdrnd, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_unaligned_mem_32, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const core_avx2 = Cpu{ .name = "core_avx2", .llvm_name = "core-avx2", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .avx2, .bmi, .bmi2, .cmov, - .cx8, .cx16, + .cx8, .ermsb, .f16c, + .false_deps_lzcnt_tzcnt, + .false_deps_popcnt, + .fast_scalar_fsqrt, + .fast_shld_rotate, + .fast_variable_shuffle, .fma, .fsgsbase, .fxsr, - .fast_shld_rotate, - .fast_scalar_fsqrt, - .fast_variable_shuffle, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, - .false_deps_lzcnt_tzcnt, - .mmx, - .movbe, .macrofusion, .merge_to_threeway_branch, + .mmx, + .movbe, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .rdrnd, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const core2 = Cpu{ .name = "core2", .llvm_name = "core2", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, - .mmx, .macrofusion, + .mmx, .nopl, - .sse, - .ssse3, + .sahf, .slow_unaligned_mem_16, + .ssse3, .x87, }), }; - pub const corei7 = Cpu{ .name = "corei7", .llvm_name = "corei7", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, - .mmx, .macrofusion, + .mmx, .nopl, .popcnt, - .sse, + .sahf, .sse4_2, .x87, }), }; - pub const corei7_avx = Cpu{ .name = "corei7_avx", .llvm_name = "corei7-avx", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .cmov, - .cx8, .cx16, - .fxsr, - .fast_shld_rotate, + .cx8, + .false_deps_popcnt, .fast_scalar_fsqrt, - .sahf, - .mmx, + .fast_shld_rotate, + .fxsr, + .idivq_to_divl, .macrofusion, .merge_to_threeway_branch, + .mmx, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_unaligned_mem_32, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", @@ -2062,49 +1880,45 @@ pub const cpu = struct { .x87, }), }; - pub const geode = Cpu{ .name = "geode", .llvm_name = "geode", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .cx8, .slow_unaligned_mem_16, .x87, }), }; - pub const goldmont = Cpu{ .name = "goldmont", .llvm_name = "goldmont", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .clflushopt, .cmov, - .cx8, .cx16, + .cx8, + .false_deps_popcnt, .fsgsbase, .fxsr, - .sahf, .mmx, .movbe, .mpx, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, + .sahf, .sha, - .sse4_2, - .ssse3, .slow_incdec, .slow_lea, .slow_two_mem_ops, + .sse4_2, + .ssse3, .x87, .xsave, .xsavec, @@ -2112,21 +1926,18 @@ pub const cpu = struct { .xsaves, }), }; - pub const goldmont_plus = Cpu{ .name = "goldmont_plus", .llvm_name = "goldmont-plus", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .clflushopt, .cmov, - .cx8, .cx16, + .cx8, .fsgsbase, .fxsr, - .sahf, .mmx, .movbe, .mpx, @@ -2138,13 +1949,14 @@ pub const cpu = struct { .rdpid, .rdrnd, .rdseed, + .sahf, .sgx, .sha, - .sse4_2, - .ssse3, .slow_incdec, .slow_lea, .slow_two_mem_ops, + .sse4_2, + .ssse3, .x87, .xsave, .xsavec, @@ -2152,50 +1964,47 @@ pub const cpu = struct { .xsaves, }), }; - pub const haswell = Cpu{ .name = "haswell", .llvm_name = "haswell", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .avx2, .bmi, .bmi2, .cmov, - .cx8, .cx16, + .cx8, .ermsb, .f16c, + .false_deps_lzcnt_tzcnt, + .false_deps_popcnt, + .fast_scalar_fsqrt, + .fast_shld_rotate, + .fast_variable_shuffle, .fma, .fsgsbase, .fxsr, - .fast_shld_rotate, - .fast_scalar_fsqrt, - .fast_variable_shuffle, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, - .false_deps_lzcnt_tzcnt, - .mmx, - .movbe, .macrofusion, .merge_to_threeway_branch, + .mmx, + .movbe, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .rdrnd, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const _i386 = Cpu{ .name = "_i386", .llvm_name = "i386", @@ -2204,7 +2013,6 @@ pub const cpu = struct { .x87, }), }; - pub const _i486 = Cpu{ .name = "_i486", .llvm_name = "i486", @@ -2213,7 +2021,6 @@ pub const cpu = struct { .x87, }), }; - pub const _i586 = Cpu{ .name = "_i586", .llvm_name = "i586", @@ -2223,7 +2030,6 @@ pub const cpu = struct { .x87, }), }; - pub const _i686 = Cpu{ .name = "_i686", .llvm_name = "i686", @@ -2234,49 +2040,52 @@ pub const cpu = struct { .x87, }), }; - pub const icelake_client = Cpu{ .name = "icelake_client", .llvm_name = "icelake-client", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, - .avx512f, .avx512bitalg, - .bmi, - .bmi2, .avx512bw, .avx512cd, + .avx512dq, + .avx512f, + .avx512ifma, + .avx512vbmi, + .avx512vbmi2, + .avx512vl, + .avx512vnni, + .avx512vpopcntdq, + .bmi, + .bmi2, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, + .fma, + .fsgsbase, + .fxsr, .gfni, - .fast_gather, - .avx512ifma, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, @@ -2285,18 +2094,13 @@ pub const cpu = struct { .rdpid, .rdrnd, .rdseed, + .sahf, .sgx, .sha, - .sse4_2, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .vaes, - .avx512vbmi, - .avx512vbmi2, - .avx512vl, - .avx512vnni, .vpclmulqdq, - .avx512vpopcntdq, .x87, .xsave, .xsavec, @@ -2304,49 +2108,52 @@ pub const cpu = struct { .xsaves, }), }; - pub const icelake_server = Cpu{ .name = "icelake_server", .llvm_name = "icelake-server", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, - .avx512f, .avx512bitalg, - .bmi, - .bmi2, .avx512bw, .avx512cd, + .avx512dq, + .avx512f, + .avx512ifma, + .avx512vbmi, + .avx512vbmi2, + .avx512vl, + .avx512vnni, + .avx512vpopcntdq, + .bmi, + .bmi2, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, + .fma, + .fsgsbase, + .fxsr, .gfni, - .fast_gather, - .avx512ifma, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pconfig, @@ -2356,18 +2163,13 @@ pub const cpu = struct { .rdpid, .rdrnd, .rdseed, + .sahf, .sgx, .sha, - .sse4_2, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .vaes, - .avx512vbmi, - .avx512vbmi2, - .avx512vl, - .avx512vnni, .vpclmulqdq, - .avx512vpopcntdq, .wbnoinvd, .x87, .xsave, @@ -2376,41 +2178,38 @@ pub const cpu = struct { .xsaves, }), }; - pub const ivybridge = Cpu{ .name = "ivybridge", .llvm_name = "ivybridge", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .cmov, - .cx8, .cx16, + .cx8, .f16c, + .false_deps_popcnt, + .fast_scalar_fsqrt, + .fast_shld_rotate, .fsgsbase, .fxsr, - .fast_shld_rotate, - .fast_scalar_fsqrt, - .sahf, - .mmx, + .idivq_to_divl, .macrofusion, .merge_to_threeway_branch, + .mmx, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .rdrnd, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_unaligned_mem_32, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const k6 = Cpu{ .name = "k6", .llvm_name = "k6", @@ -2421,108 +2220,96 @@ pub const cpu = struct { .x87, }), }; - - pub const k62 = Cpu{ + pub const k6_2 = Cpu{ .name = "k6_2", .llvm_name = "k6-2", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnow", .cx8, .slow_unaligned_mem_16, .x87, }), }; - - pub const k63 = Cpu{ + pub const k6_3 = Cpu{ .name = "k6_3", .llvm_name = "k6-3", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnow", .cx8, .slow_unaligned_mem_16, .x87, }), }; - pub const k8 = Cpu{ .name = "k8", .llvm_name = "k8", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, .cx8, - .fxsr, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse2, .slow_shld, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const k8_sse3 = Cpu{ .name = "k8_sse3", .llvm_name = "k8-sse3", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse3, .slow_shld, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const knl = Cpu{ .name = "knl", .llvm_name = "knl", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, + .avx512cd, + .avx512er, .avx512f, + .avx512pf, .bmi, .bmi2, - .avx512cd, .cmov, - .cx8, .cx16, - .avx512er, + .cx8, .f16c, + .fast_gather, + .fast_partial_ymm_or_zmm_write, .fma, .fsgsbase, .fxsr, - .fast_partial_ymm_or_zmm_write, - .fast_gather, - .sahf, + .idivq_to_divl, .lzcnt, .mmx, .movbe, .nopl, .pclmul, - .avx512pf, .popcnt, .prefetchwt1, .prfchw, .rdrnd, .rdseed, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_incdec, .slow_pmaddwd, .slow_two_mem_ops, @@ -2531,158 +2318,142 @@ pub const cpu = struct { .xsaveopt, }), }; - pub const knm = Cpu{ .name = "knm", .llvm_name = "knm", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, + .avx512cd, + .avx512er, .avx512f, + .avx512pf, + .avx512vpopcntdq, .bmi, .bmi2, - .avx512cd, .cmov, - .cx8, .cx16, - .avx512er, + .cx8, .f16c, + .fast_gather, + .fast_partial_ymm_or_zmm_write, .fma, .fsgsbase, .fxsr, - .fast_partial_ymm_or_zmm_write, - .fast_gather, - .sahf, + .idivq_to_divl, .lzcnt, .mmx, .movbe, .nopl, .pclmul, - .avx512pf, .popcnt, .prefetchwt1, .prfchw, .rdrnd, .rdseed, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_incdec, .slow_pmaddwd, .slow_two_mem_ops, - .avx512vpopcntdq, .x87, .xsave, .xsaveopt, }), }; - pub const lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", .features = 0, }; - pub const nehalem = Cpu{ .name = "nehalem", .llvm_name = "nehalem", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, - .mmx, .macrofusion, + .mmx, .nopl, .popcnt, - .sse, + .sahf, .sse4_2, .x87, }), }; - pub const nocona = Cpu{ .name = "nocona", .llvm_name = "nocona", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, .mmx, .nopl, - .sse, - .sse3, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const opteron = Cpu{ .name = "opteron", .llvm_name = "opteron", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, .cx8, - .fxsr, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse2, .slow_shld, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const opteron_sse3 = Cpu{ .name = "opteron_sse3", .llvm_name = "opteron-sse3", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnowa", .@"64bit", .cmov, - .cx8, .cx16, - .fxsr, + .cx8, .fast_scalar_shift_masks, + .fxsr, .nopl, - .sse, - .sse3, .slow_shld, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const penryn = Cpu{ .name = "penryn", .llvm_name = "penryn", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, - .mmx, .macrofusion, + .mmx, .nopl, - .sse, - .sse4_1, + .sahf, .slow_unaligned_mem_16, + .sse4_1, .x87, }), }; - pub const pentium = Cpu{ .name = "pentium", .llvm_name = "pentium", @@ -2692,7 +2463,6 @@ pub const cpu = struct { .x87, }), }; - pub const pentium_m = Cpu{ .name = "pentium_m", .llvm_name = "pentium-m", @@ -2702,13 +2472,11 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, - .sse2, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const pentium_mmx = Cpu{ .name = "pentium_mmx", .llvm_name = "pentium-mmx", @@ -2719,7 +2487,6 @@ pub const cpu = struct { .x87, }), }; - pub const pentium2 = Cpu{ .name = "pentium2", .llvm_name = "pentium2", @@ -2733,7 +2500,6 @@ pub const cpu = struct { .x87, }), }; - pub const pentium3 = Cpu{ .name = "pentium3", .llvm_name = "pentium3", @@ -2743,12 +2509,11 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const pentium3m = Cpu{ .name = "pentium3m", .llvm_name = "pentium3m", @@ -2758,12 +2523,11 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, .slow_unaligned_mem_16, + .sse, .x87, }), }; - pub const pentium4 = Cpu{ .name = "pentium4", .llvm_name = "pentium4", @@ -2773,13 +2537,11 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, - .sse2, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const pentium4m = Cpu{ .name = "pentium4m", .llvm_name = "pentium4m", @@ -2789,13 +2551,11 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, - .sse2, .slow_unaligned_mem_16, + .sse2, .x87, }), }; - pub const pentiumpro = Cpu{ .name = "pentiumpro", .llvm_name = "pentiumpro", @@ -2807,7 +2567,6 @@ pub const cpu = struct { .x87, }), }; - pub const prescott = Cpu{ .name = "prescott", .llvm_name = "prescott", @@ -2817,125 +2576,118 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, - .sse3, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const sandybridge = Cpu{ .name = "sandybridge", .llvm_name = "sandybridge", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .avx, .cmov, - .cx8, .cx16, - .fxsr, - .fast_shld_rotate, + .cx8, + .false_deps_popcnt, .fast_scalar_fsqrt, - .sahf, - .mmx, + .fast_shld_rotate, + .fxsr, + .idivq_to_divl, .macrofusion, .merge_to_threeway_branch, + .mmx, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, .slow_unaligned_mem_32, + .sse4_2, .x87, .xsave, .xsaveopt, }), }; - pub const silvermont = Cpu{ .name = "silvermont", .llvm_name = "silvermont", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, + .false_deps_popcnt, .fxsr, - .sahf, + .idivq_to_divl, .mmx, .movbe, .nopl, - .sse, .pclmul, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, - .sse4_2, - .ssse3, - .idivq_to_divl, + .sahf, .slow_incdec, .slow_lea, .slow_pmulld, .slow_two_mem_ops, + .sse4_2, + .ssse3, .x87, }), }; - pub const skx = Cpu{ .name = "skx", .llvm_name = "skx", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, + .avx512bw, + .avx512cd, + .avx512dq, .avx512f, + .avx512vl, .bmi, .bmi2, - .avx512bw, - .avx512cd, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .false_deps_popcnt, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, - .avx512vl, + .sse4_2, .x87, .xsave, .xsavec, @@ -2943,14 +2695,12 @@ pub const cpu = struct { .xsaves, }), }; - pub const skylake = Cpu{ .name = "skylake", .llvm_name = "skylake", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, @@ -2958,37 +2708,37 @@ pub const cpu = struct { .bmi2, .clflushopt, .cmov, - .cx8, .cx16, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .false_deps_popcnt, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, + .sahf, .sgx, - .sse4_2, .slow_3ops_lea, - .idivq_to_divl, + .sse4_2, .x87, .xsave, .xsavec, @@ -2996,58 +2746,56 @@ pub const cpu = struct { .xsaves, }), }; - pub const skylake_avx512 = Cpu{ .name = "skylake_avx512", .llvm_name = "skylake-avx512", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx, .avx2, + .avx512bw, + .avx512cd, + .avx512dq, .avx512f, + .avx512vl, .bmi, .bmi2, - .avx512bw, - .avx512cd, .clflushopt, .clwb, .cmov, - .cx8, .cx16, - .avx512dq, + .cx8, .ermsb, .f16c, - .fma, - .fsgsbase, - .fxsr, - .fast_shld_rotate, + .false_deps_popcnt, + .fast_gather, .fast_scalar_fsqrt, + .fast_shld_rotate, .fast_variable_shuffle, .fast_vector_fsqrt, - .fast_gather, + .fma, + .fsgsbase, + .fxsr, + .idivq_to_divl, .invpcid, - .sahf, .lzcnt, + .macrofusion, + .merge_to_threeway_branch, .mmx, .movbe, .mpx, - .macrofusion, - .merge_to_threeway_branch, .nopl, .pclmul, .pku, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, .rdseed, - .sse4_2, + .sahf, .slow_3ops_lea, - .idivq_to_divl, - .avx512vl, + .sse4_2, .x87, .xsave, .xsavec, @@ -3055,53 +2803,48 @@ pub const cpu = struct { .xsaves, }), }; - pub const slm = Cpu{ .name = "slm", .llvm_name = "slm", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, + .false_deps_popcnt, .fxsr, - .sahf, + .idivq_to_divl, .mmx, .movbe, .nopl, - .sse, .pclmul, .popcnt, - .false_deps_popcnt, .prfchw, .rdrnd, - .sse4_2, - .ssse3, - .idivq_to_divl, + .sahf, .slow_incdec, .slow_lea, .slow_pmulld, .slow_two_mem_ops, + .sse4_2, + .ssse3, .x87, }), }; - pub const tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", .features = featureSet(&[_]Feature{ .@"64bit", - .sse, .aes, .cldemote, .clflushopt, .cmov, - .cx8, .cx16, + .cx8, .fsgsbase, .fxsr, .gfni, - .sahf, .mmx, .movbe, .movdir64b, @@ -3115,13 +2858,14 @@ pub const cpu = struct { .rdpid, .rdrnd, .rdseed, + .sahf, .sgx, .sha, - .sse4_2, - .ssse3, .slow_incdec, .slow_lea, .slow_two_mem_ops, + .sse4_2, + .ssse3, .waitpkg, .x87, .xsave, @@ -3130,28 +2874,25 @@ pub const cpu = struct { .xsaves, }), }; - pub const westmere = Cpu{ .name = "westmere", .llvm_name = "westmere", .features = featureSet(&[_]Feature{ .@"64bit", .cmov, - .cx8, .cx16, + .cx8, .fxsr, - .sahf, - .mmx, .macrofusion, + .mmx, .nopl, - .sse, .pclmul, .popcnt, + .sahf, .sse4_2, .x87, }), }; - pub const winchip_c6 = Cpu{ .name = "winchip_c6", .llvm_name = "winchip-c6", @@ -3161,18 +2902,15 @@ pub const cpu = struct { .x87, }), }; - pub const winchip2 = Cpu{ .name = "winchip2", .llvm_name = "winchip2", .features = featureSet(&[_]Feature{ - .mmx, .@"3dnow", .slow_unaligned_mem_16, .x87, }), }; - pub const x86_64 = Cpu{ .name = "x86_64", .llvm_name = "x86-64", @@ -3181,17 +2919,15 @@ pub const cpu = struct { .cmov, .cx8, .fxsr, - .mmx, .macrofusion, + .mmx, .nopl, - .sse, - .sse2, .slow_3ops_lea, .slow_incdec, + .sse2, .x87, }), }; - pub const yonah = Cpu{ .name = "yonah", .llvm_name = "yonah", @@ -3201,20 +2937,17 @@ pub const cpu = struct { .fxsr, .mmx, .nopl, - .sse, - .sse3, .slow_unaligned_mem_16, + .sse3, .x87, }), }; - pub const znver1 = Cpu{ .name = "znver1", .llvm_name = "znver1", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx2, .bmi, @@ -3223,17 +2956,15 @@ pub const cpu = struct { .clflushopt, .clzero, .cmov, - .cx8, .cx16, .f16c, - .fma, - .fsgsbase, - .fxsr, .fast_15bytenop, .fast_bextr, .fast_lzcnt, .fast_scalar_shift_masks, - .sahf, + .fma, + .fsgsbase, + .fxsr, .lzcnt, .mmx, .movbe, @@ -3244,9 +2975,10 @@ pub const cpu = struct { .prfchw, .rdrnd, .rdseed, + .sahf, .sha, - .sse4a, .slow_shld, + .sse4a, .x87, .xsave, .xsavec, @@ -3254,14 +2986,12 @@ pub const cpu = struct { .xsaves, }), }; - pub const znver2 = Cpu{ .name = "znver2", .llvm_name = "znver2", .features = featureSet(&[_]Feature{ .@"64bit", .adx, - .sse, .aes, .avx2, .bmi, @@ -3271,17 +3001,15 @@ pub const cpu = struct { .clwb, .clzero, .cmov, - .cx8, .cx16, .f16c, - .fma, - .fsgsbase, - .fxsr, .fast_15bytenop, .fast_bextr, .fast_lzcnt, .fast_scalar_shift_masks, - .sahf, + .fma, + .fsgsbase, + .fxsr, .lzcnt, .mmx, .movbe, @@ -3293,9 +3021,10 @@ pub const cpu = struct { .rdpid, .rdrnd, .rdseed, + .sahf, .sha, - .sse4a, .slow_shld, + .sse4a, .wbnoinvd, .x87, .xsave, @@ -3306,10 +3035,13 @@ pub const cpu = struct { }; }; +/// All x86 CPUs, sorted alphabetically by name. +/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 +/// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ &cpu.amdfam10, &cpu.athlon, - &cpu.athlon4, + &cpu.athlon_4, &cpu.athlon_fx, &cpu.athlon_mp, &cpu.athlon_tbird, @@ -3327,7 +3059,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.btver1, &cpu.btver2, &cpu.c3, - &cpu.c32, + &cpu.c3_2, &cpu.cannonlake, &cpu.cascadelake, &cpu.cooperlake, @@ -3349,8 +3081,8 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.icelake_server, &cpu.ivybridge, &cpu.k6, - &cpu.k62, - &cpu.k63, + &cpu.k6_2, + &cpu.k6_3, &cpu.k8, &cpu.k8_sse3, &cpu.knl, -- 2.54.0 From 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 22:49:26 -0500 Subject: [PATCH 35/63] aarch64: remove CPU features that are actually just CPUs --- lib/std/target/aarch64.zig | 678 +++++++++++++------------------------ 1 file changed, 236 insertions(+), 442 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4d547b74c11fdb03620454940ab431a4ec369455..df062ffaa2cee1e55676d8b0533f56932bc1ca25 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -2,14 +2,6 @@ const std = @import("../std.zig"); const Cpu = std.Target.Cpu; pub const Feature = enum { - a35, - a53, - a55, - a57, - a72, - a73, - a75, - a76, aes, aggressive_fma, alternate_sextload_cvt_f32_pattern, @@ -35,16 +27,10 @@ pub const Feature = enum { crc, crypto, custom_cheap_as_move, - cyclone, disable_latency_sched_heuristic, dit, dotprod, exynos_cheap_as_move, - exynosm1, - exynosm2, - exynosm3, - exynosm4, - falkor, fmi, force_32bit_jump_tables, fp_armv8, @@ -58,7 +44,6 @@ pub const Feature = enum { fuse_csel, fuse_literals, jsconv, - kryo, lor, lse, lsl_fast, @@ -103,7 +88,6 @@ pub const Feature = enum { reserve_x6, reserve_x7, reserve_x9, - saphira, sb, sel2, sha2, @@ -122,17 +106,11 @@ pub const Feature = enum { sve2_bitperm, sve2_sha3, sve2_sm4, - thunderx, - thunderx2t99, - thunderxt81, - thunderxt83, - thunderxt88, tlb_rmi, tpidr_el1, tpidr_el2, tpidr_el3, tracev8_4, - tsv110, uaops, use_aa, use_postra_scheduler, @@ -156,134 +134,6 @@ pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); var result: [len]Cpu.Feature = undefined; - result[@enumToInt(Feature.a35)] = .{ - .index = @enumToInt(Feature.a35), - .name = @tagName(Feature.a35), - .llvm_name = "a35", - .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a53)] = .{ - .index = @enumToInt(Feature.a53), - .name = @tagName(Feature.a53), - .llvm_name = "a53", - .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - .use_aa, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a55)] = .{ - .index = @enumToInt(Feature.a55), - .name = @tagName(Feature.a55), - .llvm_name = "a55", - .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; - result[@enumToInt(Feature.a57)] = .{ - .index = @enumToInt(Feature.a57), - .name = @tagName(Feature.a57), - .llvm_name = "a57", - .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .fuse_literals, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.a72)] = .{ - .index = @enumToInt(Feature.a72), - .name = @tagName(Feature.a72), - .llvm_name = "a72", - .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a73)] = .{ - .index = @enumToInt(Feature.a73), - .name = @tagName(Feature.a73), - .llvm_name = "a73", - .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - }), - }; - result[@enumToInt(Feature.a75)] = .{ - .index = @enumToInt(Feature.a75), - .name = @tagName(Feature.a75), - .llvm_name = "a75", - .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, - }), - }; - result[@enumToInt(Feature.a76)] = .{ - .index = @enumToInt(Feature.a76), - .name = @tagName(Feature.a76), - .llvm_name = "a76", - .description = "Cortex-A76 ARM processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .neon, - .rcpc, - .ssbs, - .v8_2a, - }), - }; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), .name = @tagName(Feature.aes), @@ -467,27 +317,6 @@ pub const all_features = blk: { .description = "Use custom handling of cheap instructions", .dependencies = 0, }; - result[@enumToInt(Feature.cyclone)] = .{ - .index = @enumToInt(Feature.cyclone), - .name = @tagName(Feature.cyclone), - .llvm_name = "cyclone", - .description = "Cyclone", - .dependencies = featureSet(&[_]Feature{ - .alternate_sextload_cvt_f32_pattern, - .arith_bcc_fusion, - .arith_cbz_fusion, - .crypto, - .disable_latency_sched_heuristic, - .fp_armv8, - .fuse_aes, - .fuse_crypto_eor, - .neon, - .perfmon, - .zcm, - .zcz, - .zcz_fp_workaround, - }), - }; result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ .index = @enumToInt(Feature.disable_latency_sched_heuristic), .name = @tagName(Feature.disable_latency_sched_heuristic), @@ -518,109 +347,6 @@ pub const all_features = blk: { .custom_cheap_as_move, }), }; - result[@enumToInt(Feature.exynosm1)] = .{ - .index = @enumToInt(Feature.exynosm1), - .name = @tagName(Feature.exynosm1), - .llvm_name = "exynosm1", - .description = "Samsung Exynos-M1 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .use_reciprocal_square_root, - .zcz_fp, - }), - }; - result[@enumToInt(Feature.exynosm2)] = .{ - .index = @enumToInt(Feature.exynosm2), - .name = @tagName(Feature.exynosm2), - .llvm_name = "exynosm2", - .description = "Samsung Exynos-M2 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .zcz_fp, - }), - }; - result[@enumToInt(Feature.exynosm3)] = .{ - .index = @enumToInt(Feature.exynosm3), - .name = @tagName(Feature.exynosm3), - .llvm_name = "exynosm3", - .description = "Samsung Exynos-M3 processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_address, - .fuse_aes, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz_fp, - }), - }; - result[@enumToInt(Feature.exynosm4)] = .{ - .index = @enumToInt(Feature.exynosm4), - .name = @tagName(Feature.exynosm4), - .llvm_name = "exynosm4", - .description = "Samsung Exynos-M4 processors", - .dependencies = featureSet(&[_]Feature{ - .arith_bcc_fusion, - .arith_cbz_fusion, - .crypto, - .dotprod, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fullfp16, - .fuse_address, - .fuse_aes, - .fuse_arith_logic, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .use_postra_scheduler, - .v8_2a, - .zcz, - }), - }; - result[@enumToInt(Feature.falkor)] = .{ - .index = @enumToInt(Feature.falkor), - .name = @tagName(Feature.falkor), - .llvm_name = "falkor", - .description = "Qualcomm Falkor processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .rdm, - .slow_strqro_store, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.fmi)] = .{ .index = @enumToInt(Feature.fmi), .name = @tagName(Feature.fmi), @@ -718,24 +444,6 @@ pub const all_features = blk: { .fp_armv8, }), }; - result[@enumToInt(Feature.kryo)] = .{ - .index = @enumToInt(Feature.kryo), - .name = @tagName(Feature.kryo), - .llvm_name = "kryo", - .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz, - }), - }; result[@enumToInt(Feature.lor)] = .{ .index = @enumToInt(Feature.lor), .name = @tagName(Feature.lor), @@ -1052,25 +760,6 @@ pub const all_features = blk: { .description = "Reserve X9, making it unavailable as a GPR", .dependencies = 0, }; - result[@enumToInt(Feature.saphira)] = .{ - .index = @enumToInt(Feature.saphira), - .name = @tagName(Feature.saphira), - .llvm_name = "saphira", - .description = "Qualcomm Saphira processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .spe, - .use_postra_scheduler, - .v8_4a, - .zcz, - }), - }; result[@enumToInt(Feature.sb)] = .{ .index = @enumToInt(Feature.sb), .name = @tagName(Feature.sb), @@ -1217,84 +906,6 @@ pub const all_features = blk: { .sve2, }), }; - result[@enumToInt(Feature.thunderx)] = .{ - .index = @enumToInt(Feature.thunderx), - .name = @tagName(Feature.thunderx), - .llvm_name = "thunderx", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderx2t99)] = .{ - .index = @enumToInt(Feature.thunderx2t99), - .name = @tagName(Feature.thunderx2t99), - .llvm_name = "thunderx2t99", - .description = "Cavium ThunderX2 processors", - .dependencies = featureSet(&[_]Feature{ - .aggressive_fma, - .arith_bcc_fusion, - .crc, - .crypto, - .fp_armv8, - .lse, - .neon, - .predictable_select_expensive, - .use_postra_scheduler, - .v8_1a, - }), - }; - result[@enumToInt(Feature.thunderxt81)] = .{ - .index = @enumToInt(Feature.thunderxt81), - .name = @tagName(Feature.thunderxt81), - .llvm_name = "thunderxt81", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt83)] = .{ - .index = @enumToInt(Feature.thunderxt83), - .name = @tagName(Feature.thunderxt83), - .llvm_name = "thunderxt83", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; - result[@enumToInt(Feature.thunderxt88)] = .{ - .index = @enumToInt(Feature.thunderxt88), - .name = @tagName(Feature.thunderxt88), - .llvm_name = "thunderxt88", - .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - }), - }; result[@enumToInt(Feature.tlb_rmi)] = .{ .index = @enumToInt(Feature.tlb_rmi), .name = @tagName(Feature.tlb_rmi), @@ -1330,26 +941,6 @@ pub const all_features = blk: { .description = "Enable v8.4-A Trace extension", .dependencies = 0, }; - result[@enumToInt(Feature.tsv110)] = .{ - .index = @enumToInt(Feature.tsv110), - .name = @tagName(Feature.tsv110), - .llvm_name = "tsv110", - .description = "HiSilicon TS-V110 processors", - .dependencies = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .dotprod, - .fp_armv8, - .fp16fml, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .spe, - .use_postra_scheduler, - .v8_2a, - }), - }; result[@enumToInt(Feature.uaops)] = .{ .index = @enumToInt(Feature.uaops), .name = @tagName(Feature.uaops), @@ -1505,123 +1096,265 @@ pub const all_features = blk: { }; pub const cpu = struct { - pub const apple_latest = Cpu{ - .name = "apple_latest", - .llvm_name = "apple-latest", - .features = featureSet(&[_]Feature{ - .cyclone, - }), - }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .a35, + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, }), }; pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .a53, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + .use_aa, + .use_postra_scheduler, }), }; pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .a55, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, }), }; pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .a57, + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .fuse_literals, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, }), }; pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .a72, + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, }), }; pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .a73, + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, }), }; pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .a75, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, }), }; pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ - .a76, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .neon, + .rcpc, + .ssbs, + .v8_2a, }), }; pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ - .a76, + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .neon, + .rcpc, + .ssbs, + .v8_2a, }), }; pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .cyclone, + .alternate_sextload_cvt_f32_pattern, + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .disable_latency_sched_heuristic, + .fp_armv8, + .fuse_aes, + .fuse_crypto_eor, + .neon, + .perfmon, + .zcm, + .zcz, + .zcz_fp_workaround, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .exynosm1, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .use_reciprocal_square_root, + .zcz_fp, }), }; pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .exynosm2, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .zcz_fp, }), }; pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .exynosm3, + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_address, + .fuse_aes, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz_fp, }), }; pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .exynosm4, + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .dotprod, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fullfp16, + .fuse_address, + .fuse_aes, + .fuse_arith_logic, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .use_postra_scheduler, + .v8_2a, + .zcz, }), }; pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ - .exynosm4, + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .dotprod, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fullfp16, + .fuse_address, + .fuse_aes, + .fuse_arith_logic, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .use_postra_scheduler, + .v8_2a, + .zcz, }), }; pub const falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .features = featureSet(&[_]Feature{ - .falkor, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .rdm, + .slow_strqro_store, + .use_postra_scheduler, + .zcz, }), }; pub const generic = Cpu{ @@ -1639,56 +1372,119 @@ pub const cpu = struct { .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .kryo, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz, }), }; pub const saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .features = featureSet(&[_]Feature{ - .saphira, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .spe, + .use_postra_scheduler, + .v8_4a, + .zcz, }), }; pub const thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .features = featureSet(&[_]Feature{ - .thunderx, + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, }), }; pub const thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .features = featureSet(&[_]Feature{ - .thunderx2t99, + .aggressive_fma, + .arith_bcc_fusion, + .crc, + .crypto, + .fp_armv8, + .lse, + .neon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8_1a, }), }; pub const thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .features = featureSet(&[_]Feature{ - .thunderxt81, + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, }), }; pub const thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .features = featureSet(&[_]Feature{ - .thunderxt83, + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, }), }; pub const thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .features = featureSet(&[_]Feature{ - .thunderxt88, + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, }), }; pub const tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .features = featureSet(&[_]Feature{ - .tsv110, + .crypto, + .custom_cheap_as_move, + .dotprod, + .fp_armv8, + .fp16fml, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .spe, + .use_postra_scheduler, + .v8_2a, }), }; }; @@ -1697,7 +1493,6 @@ pub const cpu = struct { /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ - &cpu.apple_latest, &cpu.cortex_a35, &cpu.cortex_a53, &cpu.cortex_a55, @@ -1718,7 +1513,6 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.kryo, &cpu.saphira, &cpu.thunderx, - &cpu.thunderx2t99, &cpu.thunderxt81, &cpu.thunderxt83, &cpu.thunderxt88, -- 2.54.0 From 89e107ee4ecdc888007958bd353e293856f0766f Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 23:14:35 -0500 Subject: [PATCH 36/63] uncomment all the archs in target.zig --- BRANCH_TODO | 31 ---------------- lib/std/target.zig | 79 ++++++++++++++++++++-------------------- lib/std/target/riscv.zig | 19 ++++++++++ 3 files changed, 59 insertions(+), 70 deletions(-) diff --git a/BRANCH_TODO b/BRANCH_TODO index 2e92089e3a5df81634e89eef7b9a45175421d923..5b5cf506f4e0809be5568c7e646e7c73b7fa77aa 100644 --- a/BRANCH_TODO +++ b/BRANCH_TODO @@ -2,35 +2,4 @@ Finish these thigns before merging teh branch * zig targets - use non-reflection based cpu detection? - * finish refactoring target/arch/* - -const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ - &std.target.riscv.feature_a, - &std.target.riscv.feature_c, - &std.target.riscv.feature_d, - &std.target.riscv.feature_f, - &std.target.riscv.feature_m, - &std.target.riscv.feature_relax, -}; - -const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{ - &std.target.riscv.feature_bit64, - &std.target.riscv.feature_a, - &std.target.riscv.feature_c, - &std.target.riscv.feature_d, - &std.target.riscv.feature_f, - &std.target.riscv.feature_m, - &std.target.riscv.feature_relax, -}; - -// Same as above but without sse. -const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{ - &std.target.x86.feature_cmov, - &std.target.x86.feature_cx8, - &std.target.x86.feature_fxsr, - &std.target.x86.feature_mmx, - &std.target.x86.feature_nopl, - &std.target.x86.feature_slowUnalignedMem16, - &std.target.x86.feature_x87, -}; diff --git a/lib/std/target.zig b/lib/std/target.zig index d49d395dda5186cd9f33264a96cd18182f603154..9b83384723e6b0be404d4e405cf65028a8fd81e8 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -413,21 +413,21 @@ pub const Target = union(enum) { /// All CPU features Zig is aware of, sorted lexicographically by name. pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { return switch (arch) { - // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_features, + .arm, .armeb, .thumb, .thumbeb => arm.all_features, .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, - // TODO .avr => avr.all_features, - // TODO .bpfel, .bpfeb => bpf.all_features, - // TODO .hexagon => hexagon.all_features, - // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_features, - // TODO .msp430 => msp430.all_features, - // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, - // TODO .amdgcn => amdgpu.all_features, - // TODO .riscv32, .riscv64 => riscv.all_features, - // TODO .sparc, .sparcv9, .sparcel => sparc.all_features, - // TODO .s390x => systemz.all_features, + .avr => avr.all_features, + .bpfel, .bpfeb => bpf.all_features, + .hexagon => hexagon.all_features, + .mips, .mipsel, .mips64, .mips64el => mips.all_features, + .msp430 => msp430.all_features, + .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, + .amdgcn => amdgpu.all_features, + .riscv32, .riscv64 => riscv.all_features, + .sparc, .sparcv9, .sparcel => sparc.all_features, + .s390x => systemz.all_features, .i386, .x86_64 => &x86.all_features, - // TODO .nvptx, .nvptx64 => nvptx.all_features, - // TODO .wasm32, .wasm64 => wasm.all_features, + .nvptx, .nvptx64 => nvptx.all_features, + .wasm32, .wasm64 => wasm.all_features, else => &[0]Cpu.Feature{}, }; @@ -437,22 +437,23 @@ pub const Target = union(enum) { /// of features that is expected to be supported on most available hardware. pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set { return switch (arch) { - // TODO .arm, .armeb, .thumb, .thumbeb => arm.baseline_features, + .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features, .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features, - // TODO .avr => avr.baseline_features, - // TODO .bpfel, .bpfeb => bpf.baseline_features, - // TODO .hexagon => hexagon.baseline_features, - // TODO .mips, .mipsel, .mips64, .mips64el => mips.baseline_features, - // TODO .msp430 => msp430.baseline_features, - // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features, - // TODO .amdgcn => amdgpu.baseline_features, - // TODO .riscv32, .riscv64 => riscv.baseline_features, - // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features, - // TODO .s390x => systemz.baseline_features, + .avr => avr.cpu.generic.features, + .bpfel, .bpfeb => bpf.cpu.generic.features, + .hexagon => hexagon.cpu.generic.features, + .mips, .mipsel, .mips64, .mips64el => mips.cpu.generic.features, + .msp430 => msp430.cpu.generic.features, + .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features, + .amdgcn => amdgpu.cpu.generic.features, + .riscv32 => riscv.baseline_32_features, + .riscv64 => riscv.baseline_64_features, + .sparc, .sparcv9, .sparcel => sparc.cpu.generic.features, + .s390x => systemz.cpu.generic.features, .i386 => x86.cpu.pentium4.features, .x86_64 => x86.cpu.x86_64.features, - // TODO .nvptx, .nvptx64 => nvptx.baseline_features, - // TODO .wasm32, .wasm64 => wasm.baseline_features, + .nvptx, .nvptx64 => nvptx.cpu.generic.features, + .wasm32, .wasm64 => wasm.cpu.generic.features, else => 0, }; @@ -461,21 +462,21 @@ pub const Target = union(enum) { /// All CPUs Zig is aware of, sorted lexicographically by name. pub fn allCpus(arch: Arch) []const *const Cpu { return switch (arch) { - // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, + .arm, .armeb, .thumb, .thumbeb => arm.all_cpus, .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus, - // TODO .avr => avr.all_cpus, - // TODO .bpfel, .bpfeb => bpf.all_cpus, - // TODO .hexagon => hexagon.all_cpus, - // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, - // TODO .msp430 => msp430.all_cpus, - // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, - // TODO .amdgcn => amdgpu.all_cpus, - // TODO .riscv32, .riscv64 => riscv.all_cpus, - // TODO .sparc, .sparcv9, .sparcel => sparc.all_cpus, - // TODO .s390x => systemz.all_cpus, + .avr => avr.all_cpus, + .bpfel, .bpfeb => bpf.all_cpus, + .hexagon => hexagon.all_cpus, + .mips, .mipsel, .mips64, .mips64el => mips.all_cpus, + .msp430 => msp430.all_cpus, + .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus, + .amdgcn => amdgpu.all_cpus, + .riscv32, .riscv64 => riscv.all_cpus, + .sparc, .sparcv9, .sparcel => sparc.all_cpus, + .s390x => systemz.all_cpus, .i386, .x86_64 => x86.all_cpus, - // TODO .nvptx, .nvptx64 => nvptx.all_cpus, - // TODO .wasm32, .wasm64 => wasm.all_cpus, + .nvptx, .nvptx64 => nvptx.all_cpus, + .wasm32, .wasm64 => wasm.all_cpus, else => &[0]*const Cpu{}, }; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index 7181028cc27f80f6fa22e020abf74a7a284e34eb..dbe36e0fa1d53a060e7195b5fd1eb4d138c428e9 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -101,3 +101,22 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.generic_rv32, &cpu.generic_rv64, }; + +pub const baseline_32_features = featureSet(&[_]Feature{ + .a, + .c, + .d, + .f, + .m, + .relax, +}); + +pub const baseline_64_features = featureSet(&[_]Feature{ + .@"64bit", + .a, + .c, + .d, + .f, + .m, + .relax, +}); -- 2.54.0 From 6118b11afa1bbceab6ab4681f1f79e68aa131b65 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 20 Jan 2020 23:15:07 -0500 Subject: [PATCH 37/63] Revert "aarch64: remove CPU features that are actually just CPUs" This reverts commit 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9. This strategy won't work for arm 32-bit; instead need to try to figure out how to get more bits into the bit set. --- lib/std/target/aarch64.zig | 678 ++++++++++++++++++++++++------------- 1 file changed, 442 insertions(+), 236 deletions(-) diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index df062ffaa2cee1e55676d8b0533f56932bc1ca25..4d547b74c11fdb03620454940ab431a4ec369455 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -2,6 +2,14 @@ const std = @import("../std.zig"); const Cpu = std.Target.Cpu; pub const Feature = enum { + a35, + a53, + a55, + a57, + a72, + a73, + a75, + a76, aes, aggressive_fma, alternate_sextload_cvt_f32_pattern, @@ -27,10 +35,16 @@ pub const Feature = enum { crc, crypto, custom_cheap_as_move, + cyclone, disable_latency_sched_heuristic, dit, dotprod, exynos_cheap_as_move, + exynosm1, + exynosm2, + exynosm3, + exynosm4, + falkor, fmi, force_32bit_jump_tables, fp_armv8, @@ -44,6 +58,7 @@ pub const Feature = enum { fuse_csel, fuse_literals, jsconv, + kryo, lor, lse, lsl_fast, @@ -88,6 +103,7 @@ pub const Feature = enum { reserve_x6, reserve_x7, reserve_x9, + saphira, sb, sel2, sha2, @@ -106,11 +122,17 @@ pub const Feature = enum { sve2_bitperm, sve2_sha3, sve2_sm4, + thunderx, + thunderx2t99, + thunderxt81, + thunderxt83, + thunderxt88, tlb_rmi, tpidr_el1, tpidr_el2, tpidr_el3, tracev8_4, + tsv110, uaops, use_aa, use_postra_scheduler, @@ -134,6 +156,134 @@ pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); var result: [len]Cpu.Feature = undefined; + result[@enumToInt(Feature.a35)] = .{ + .index = @enumToInt(Feature.a35), + .name = @tagName(Feature.a35), + .llvm_name = "a35", + .description = "Cortex-A35 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a53)] = .{ + .index = @enumToInt(Feature.a53), + .name = @tagName(Feature.a53), + .llvm_name = "a53", + .description = "Cortex-A53 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + .use_aa, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.a55)] = .{ + .index = @enumToInt(Feature.a55), + .name = @tagName(Feature.a55), + .llvm_name = "a55", + .description = "Cortex-A55 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, + }), + }; + result[@enumToInt(Feature.a57)] = .{ + .index = @enumToInt(Feature.a57), + .name = @tagName(Feature.a57), + .llvm_name = "a57", + .description = "Cortex-A57 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .balance_fp_ops, + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .fuse_aes, + .fuse_literals, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.a72)] = .{ + .index = @enumToInt(Feature.a72), + .name = @tagName(Feature.a72), + .llvm_name = "a72", + .description = "Cortex-A72 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a73)] = .{ + .index = @enumToInt(Feature.a73), + .name = @tagName(Feature.a73), + .llvm_name = "a73", + .description = "Cortex-A73 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .fuse_aes, + .neon, + .perfmon, + }), + }; + result[@enumToInt(Feature.a75)] = .{ + .index = @enumToInt(Feature.a75), + .name = @tagName(Feature.a75), + .llvm_name = "a75", + .description = "Cortex-A75 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .rcpc, + .v8_2a, + }), + }; + result[@enumToInt(Feature.a76)] = .{ + .index = @enumToInt(Feature.a76), + .name = @tagName(Feature.a76), + .llvm_name = "a76", + .description = "Cortex-A76 ARM processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .dotprod, + .fp_armv8, + .fullfp16, + .neon, + .rcpc, + .ssbs, + .v8_2a, + }), + }; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), .name = @tagName(Feature.aes), @@ -317,6 +467,27 @@ pub const all_features = blk: { .description = "Use custom handling of cheap instructions", .dependencies = 0, }; + result[@enumToInt(Feature.cyclone)] = .{ + .index = @enumToInt(Feature.cyclone), + .name = @tagName(Feature.cyclone), + .llvm_name = "cyclone", + .description = "Cyclone", + .dependencies = featureSet(&[_]Feature{ + .alternate_sextload_cvt_f32_pattern, + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .disable_latency_sched_heuristic, + .fp_armv8, + .fuse_aes, + .fuse_crypto_eor, + .neon, + .perfmon, + .zcm, + .zcz, + .zcz_fp_workaround, + }), + }; result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ .index = @enumToInt(Feature.disable_latency_sched_heuristic), .name = @tagName(Feature.disable_latency_sched_heuristic), @@ -347,6 +518,109 @@ pub const all_features = blk: { .custom_cheap_as_move, }), }; + result[@enumToInt(Feature.exynosm1)] = .{ + .index = @enumToInt(Feature.exynosm1), + .name = @tagName(Feature.exynosm1), + .llvm_name = "exynosm1", + .description = "Samsung Exynos-M1 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .use_reciprocal_square_root, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm2)] = .{ + .index = @enumToInt(Feature.exynosm2), + .name = @tagName(Feature.exynosm2), + .llvm_name = "exynosm2", + .description = "Samsung Exynos-M2 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_aes, + .perfmon, + .slow_misaligned_128store, + .slow_paired_128, + .use_postra_scheduler, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm3)] = .{ + .index = @enumToInt(Feature.exynosm3), + .name = @tagName(Feature.exynosm3), + .llvm_name = "exynosm3", + .description = "Samsung Exynos-M3 processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fuse_address, + .fuse_aes, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz_fp, + }), + }; + result[@enumToInt(Feature.exynosm4)] = .{ + .index = @enumToInt(Feature.exynosm4), + .name = @tagName(Feature.exynosm4), + .llvm_name = "exynosm4", + .description = "Samsung Exynos-M4 processors", + .dependencies = featureSet(&[_]Feature{ + .arith_bcc_fusion, + .arith_cbz_fusion, + .crypto, + .dotprod, + .exynos_cheap_as_move, + .force_32bit_jump_tables, + .fullfp16, + .fuse_address, + .fuse_aes, + .fuse_arith_logic, + .fuse_csel, + .fuse_literals, + .lsl_fast, + .perfmon, + .use_postra_scheduler, + .v8_2a, + .zcz, + }), + }; + result[@enumToInt(Feature.falkor)] = .{ + .index = @enumToInt(Feature.falkor), + .name = @tagName(Feature.falkor), + .llvm_name = "falkor", + .description = "Qualcomm Falkor processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .rdm, + .slow_strqro_store, + .use_postra_scheduler, + .zcz, + }), + }; result[@enumToInt(Feature.fmi)] = .{ .index = @enumToInt(Feature.fmi), .name = @tagName(Feature.fmi), @@ -444,6 +718,24 @@ pub const all_features = blk: { .fp_armv8, }), }; + result[@enumToInt(Feature.kryo)] = .{ + .index = @enumToInt(Feature.kryo), + .name = @tagName(Feature.kryo), + .llvm_name = "kryo", + .description = "Qualcomm Kryo processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + .zcz, + }), + }; result[@enumToInt(Feature.lor)] = .{ .index = @enumToInt(Feature.lor), .name = @tagName(Feature.lor), @@ -760,6 +1052,25 @@ pub const all_features = blk: { .description = "Reserve X9, making it unavailable as a GPR", .dependencies = 0, }; + result[@enumToInt(Feature.saphira)] = .{ + .index = @enumToInt(Feature.saphira), + .name = @tagName(Feature.saphira), + .llvm_name = "saphira", + .description = "Qualcomm Saphira processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .custom_cheap_as_move, + .fp_armv8, + .lsl_fast, + .neon, + .perfmon, + .predictable_select_expensive, + .spe, + .use_postra_scheduler, + .v8_4a, + .zcz, + }), + }; result[@enumToInt(Feature.sb)] = .{ .index = @enumToInt(Feature.sb), .name = @tagName(Feature.sb), @@ -906,6 +1217,84 @@ pub const all_features = blk: { .sve2, }), }; + result[@enumToInt(Feature.thunderx)] = .{ + .index = @enumToInt(Feature.thunderx), + .name = @tagName(Feature.thunderx), + .llvm_name = "thunderx", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.thunderx2t99)] = .{ + .index = @enumToInt(Feature.thunderx2t99), + .name = @tagName(Feature.thunderx2t99), + .llvm_name = "thunderx2t99", + .description = "Cavium ThunderX2 processors", + .dependencies = featureSet(&[_]Feature{ + .aggressive_fma, + .arith_bcc_fusion, + .crc, + .crypto, + .fp_armv8, + .lse, + .neon, + .predictable_select_expensive, + .use_postra_scheduler, + .v8_1a, + }), + }; + result[@enumToInt(Feature.thunderxt81)] = .{ + .index = @enumToInt(Feature.thunderxt81), + .name = @tagName(Feature.thunderxt81), + .llvm_name = "thunderxt81", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.thunderxt83)] = .{ + .index = @enumToInt(Feature.thunderxt83), + .name = @tagName(Feature.thunderxt83), + .llvm_name = "thunderxt83", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; + result[@enumToInt(Feature.thunderxt88)] = .{ + .index = @enumToInt(Feature.thunderxt88), + .name = @tagName(Feature.thunderxt88), + .llvm_name = "thunderxt88", + .description = "Cavium ThunderX processors", + .dependencies = featureSet(&[_]Feature{ + .crc, + .crypto, + .fp_armv8, + .neon, + .perfmon, + .predictable_select_expensive, + .use_postra_scheduler, + }), + }; result[@enumToInt(Feature.tlb_rmi)] = .{ .index = @enumToInt(Feature.tlb_rmi), .name = @tagName(Feature.tlb_rmi), @@ -941,6 +1330,26 @@ pub const all_features = blk: { .description = "Enable v8.4-A Trace extension", .dependencies = 0, }; + result[@enumToInt(Feature.tsv110)] = .{ + .index = @enumToInt(Feature.tsv110), + .name = @tagName(Feature.tsv110), + .llvm_name = "tsv110", + .description = "HiSilicon TS-V110 processors", + .dependencies = featureSet(&[_]Feature{ + .crypto, + .custom_cheap_as_move, + .dotprod, + .fp_armv8, + .fp16fml, + .fullfp16, + .fuse_aes, + .neon, + .perfmon, + .spe, + .use_postra_scheduler, + .v8_2a, + }), + }; result[@enumToInt(Feature.uaops)] = .{ .index = @enumToInt(Feature.uaops), .name = @tagName(Feature.uaops), @@ -1096,265 +1505,123 @@ pub const all_features = blk: { }; pub const cpu = struct { + pub const apple_latest = Cpu{ + .name = "apple_latest", + .llvm_name = "apple-latest", + .features = featureSet(&[_]Feature{ + .cyclone, + }), + }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, + .a35, }), }; pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", .features = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, - .use_aa, - .use_postra_scheduler, + .a53, }), }; pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", .features = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, + .a55, }), }; pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", .features = featureSet(&[_]Feature{ - .balance_fp_ops, - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .fuse_aes, - .fuse_literals, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, + .a57, }), }; pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, + .a72, }), }; pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .fuse_aes, - .neon, - .perfmon, + .a73, }), }; pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", .features = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .rcpc, - .v8_2a, + .a75, }), }; pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", .features = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .neon, - .rcpc, - .ssbs, - .v8_2a, + .a76, }), }; pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", .features = featureSet(&[_]Feature{ - .crypto, - .dotprod, - .fp_armv8, - .fullfp16, - .neon, - .rcpc, - .ssbs, - .v8_2a, + .a76, }), }; pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", .features = featureSet(&[_]Feature{ - .alternate_sextload_cvt_f32_pattern, - .arith_bcc_fusion, - .arith_cbz_fusion, - .crypto, - .disable_latency_sched_heuristic, - .fp_armv8, - .fuse_aes, - .fuse_crypto_eor, - .neon, - .perfmon, - .zcm, - .zcz, - .zcz_fp_workaround, + .cyclone, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .use_reciprocal_square_root, - .zcz_fp, + .exynosm1, }), }; pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_aes, - .perfmon, - .slow_misaligned_128store, - .slow_paired_128, - .use_postra_scheduler, - .zcz_fp, + .exynosm2, }), }; pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fuse_address, - .fuse_aes, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz_fp, + .exynosm3, }), }; pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", .features = featureSet(&[_]Feature{ - .arith_bcc_fusion, - .arith_cbz_fusion, - .crypto, - .dotprod, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fullfp16, - .fuse_address, - .fuse_aes, - .fuse_arith_logic, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .use_postra_scheduler, - .v8_2a, - .zcz, + .exynosm4, }), }; pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", .features = featureSet(&[_]Feature{ - .arith_bcc_fusion, - .arith_cbz_fusion, - .crypto, - .dotprod, - .exynos_cheap_as_move, - .force_32bit_jump_tables, - .fullfp16, - .fuse_address, - .fuse_aes, - .fuse_arith_logic, - .fuse_csel, - .fuse_literals, - .lsl_fast, - .perfmon, - .use_postra_scheduler, - .v8_2a, - .zcz, + .exynosm4, }), }; pub const falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .rdm, - .slow_strqro_store, - .use_postra_scheduler, - .zcz, + .falkor, }), }; pub const generic = Cpu{ @@ -1372,119 +1639,56 @@ pub const cpu = struct { .name = "kryo", .llvm_name = "kryo", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, - .zcz, + .kryo, }), }; pub const saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", .features = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .fp_armv8, - .lsl_fast, - .neon, - .perfmon, - .predictable_select_expensive, - .spe, - .use_postra_scheduler, - .v8_4a, - .zcz, + .saphira, }), }; pub const thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, + .thunderx, }), }; pub const thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", .features = featureSet(&[_]Feature{ - .aggressive_fma, - .arith_bcc_fusion, - .crc, - .crypto, - .fp_armv8, - .lse, - .neon, - .predictable_select_expensive, - .use_postra_scheduler, - .v8_1a, + .thunderx2t99, }), }; pub const thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, + .thunderxt81, }), }; pub const thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, + .thunderxt83, }), }; pub const thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", .features = featureSet(&[_]Feature{ - .crc, - .crypto, - .fp_armv8, - .neon, - .perfmon, - .predictable_select_expensive, - .use_postra_scheduler, + .thunderxt88, }), }; pub const tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", .features = featureSet(&[_]Feature{ - .crypto, - .custom_cheap_as_move, - .dotprod, - .fp_armv8, - .fp16fml, - .fullfp16, - .fuse_aes, - .neon, - .perfmon, - .spe, - .use_postra_scheduler, - .v8_2a, + .tsv110, }), }; }; @@ -1493,6 +1697,7 @@ pub const cpu = struct { /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ + &cpu.apple_latest, &cpu.cortex_a35, &cpu.cortex_a53, &cpu.cortex_a55, @@ -1513,6 +1718,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.kryo, &cpu.saphira, &cpu.thunderx, + &cpu.thunderx2t99, &cpu.thunderxt81, &cpu.thunderxt83, &cpu.thunderxt88, -- 2.54.0 From e640d015351c3d3bf7c41020ff2a87f38f853140 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 00:34:54 -0500 Subject: [PATCH 38/63] fixups to arch data, support any number of cpu features --- lib/std/build.zig | 2 +- lib/std/target.zig | 91 +++++++++++------ lib/std/target/aarch64.zig | 200 ++++++++++++++++++------------------- lib/std/target/amdgpu.zig | 200 ++++++++++++++++++------------------- lib/std/target/arm.zig | 196 ++++++++++++++++++------------------ lib/std/target/avr.zig | 64 ++++++------ lib/std/target/bpf.zig | 18 ++-- lib/std/target/hexagon.zig | 34 +++---- lib/std/target/mips.zig | 64 ++++++------ lib/std/target/msp430.zig | 14 +-- lib/std/target/nvptx.zig | 52 +++++----- lib/std/target/powerpc.zig | 88 ++++++++-------- lib/std/target/riscv.zig | 18 ++-- lib/std/target/sparc.zig | 58 +++++------ lib/std/target/systemz.zig | 78 +++++++-------- lib/std/target/wasm.zig | 24 ++--- lib/std/target/x86.zig | 174 ++++++++++++++++---------------- src-self-hosted/stage1.zig | 77 ++++++++++---- src/error.cpp | 1 + src/main.cpp | 13 +-- src/userland.cpp | 6 +- src/userland.h | 7 +- 22 files changed, 777 insertions(+), 702 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index 1eabfb1559aaf9b6e63b9d0014328313d2e9d413..32a9e549ded7e82a8afad46874c0228321e2eb7b 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1983,7 +1983,7 @@ pub const LibExeObjStep = struct { var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); for (self.target.getArch().allFeaturesList()) |feature, i| { - if (Target.Cpu.Feature.isEnabled(features, @intCast(u7, i))) { + if (features.isEnabled(@intCast(u8, i))) { try feature_str_buffer.append(feature.name); try feature_str_buffer.append(","); } diff --git a/lib/std/target.zig b/lib/std/target.zig index 9b83384723e6b0be404d4e405cf65028a8fd81e8..716be8905c86b4be9e1551ad3db847cc11042a9d 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -219,7 +219,8 @@ pub const Target = union(enum) { pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set { // Here we compute both and choose the correct result at the end, based // on whether or not we saw + and - signs. - var set: @Vector(2, Cpu.Feature.Set) = [2]Cpu.Feature.Set{ 0, arch.baselineFeatures() }; + var whitelist_set = Cpu.Feature.Set.empty(); + var baseline_set = arch.baselineFeatures(); var mode: enum { unknown, baseline, @@ -257,10 +258,15 @@ pub const Target = union(enum) { } for (arch.allFeaturesList()) |feature, index| { if (mem.eql(u8, feature_name, feature.name)) { - const one_bit = @as(Cpu.Feature.Set, 1) << @intCast(u7, index); switch (op) { - .add => set |= @splat(2, one_bit), - .sub => set &= @splat(2, ~one_bit), + .add => { + baseline_set.addFeature(@intCast(u8, index)); + whitelist_set.addFeature(@intCast(u8, index)); + }, + .sub => { + baseline_set.removeFeature(@intCast(u8, index)); + whitelist_set.removeFeature(@intCast(u8, index)); + }, } break; } @@ -270,8 +276,8 @@ pub const Target = union(enum) { } return switch (mode) { - .unknown, .whitelist => set[0], - .baseline => set[1], + .unknown, .whitelist => whitelist_set, + .baseline => baseline_set, }; } @@ -413,21 +419,21 @@ pub const Target = union(enum) { /// All CPU features Zig is aware of, sorted lexicographically by name. pub fn allFeaturesList(arch: Arch) []const Cpu.Feature { return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.all_features, + .arm, .armeb, .thumb, .thumbeb => &arm.all_features, .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features, - .avr => avr.all_features, - .bpfel, .bpfeb => bpf.all_features, - .hexagon => hexagon.all_features, - .mips, .mipsel, .mips64, .mips64el => mips.all_features, - .msp430 => msp430.all_features, - .powerpc, .powerpc64, .powerpc64le => powerpc.all_features, - .amdgcn => amdgpu.all_features, - .riscv32, .riscv64 => riscv.all_features, - .sparc, .sparcv9, .sparcel => sparc.all_features, - .s390x => systemz.all_features, + .avr => &avr.all_features, + .bpfel, .bpfeb => &bpf.all_features, + .hexagon => &hexagon.all_features, + .mips, .mipsel, .mips64, .mips64el => &mips.all_features, + .msp430 => &msp430.all_features, + .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features, + .amdgcn => &amdgpu.all_features, + .riscv32, .riscv64 => &riscv.all_features, + .sparc, .sparcv9, .sparcel => &sparc.all_features, + .s390x => &systemz.all_features, .i386, .x86_64 => &x86.all_features, - .nvptx, .nvptx64 => nvptx.all_features, - .wasm32, .wasm64 => wasm.all_features, + .nvptx, .nvptx64 => &nvptx.all_features, + .wasm32, .wasm64 => &wasm.all_features, else => &[0]Cpu.Feature{}, }; @@ -439,10 +445,11 @@ pub const Target = union(enum) { return switch (arch) { .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features, .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features, - .avr => avr.cpu.generic.features, + .avr => avr.baseline_features, .bpfel, .bpfeb => bpf.cpu.generic.features, .hexagon => hexagon.cpu.generic.features, - .mips, .mipsel, .mips64, .mips64el => mips.cpu.generic.features, + .mips, .mipsel => mips.cpu.mips32.features, + .mips64, .mips64el => mips.cpu.mips64.features, .msp430 => msp430.cpu.generic.features, .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features, .amdgcn => amdgpu.cpu.generic.features, @@ -452,10 +459,10 @@ pub const Target = union(enum) { .s390x => systemz.cpu.generic.features, .i386 => x86.cpu.pentium4.features, .x86_64 => x86.cpu.x86_64.features, - .nvptx, .nvptx64 => nvptx.cpu.generic.features, + .nvptx, .nvptx64 => nvptx.cpu.sm_20.features, .wasm32, .wasm64 => wasm.cpu.generic.features, - else => 0, + else => Cpu.Feature.Set.empty(), }; } @@ -522,24 +529,46 @@ pub const Target = union(enum) { dependencies: Set, /// A bit set of all the features. - pub const Set = u128; + pub const Set = struct { + bytes: [bit_count / 8]u8, - pub fn isEnabled(set: Set, arch_feature_index: u7) bool { - return (set & (@as(Set, 1) << arch_feature_index)) != 0; - } + pub const bit_count = 22 * 8; + + pub fn empty() Set { + return .{ .bytes = [1]u8{0} ** 22 }; + } + + pub fn isEnabled(set: Set, arch_feature_index: u8) bool { + const byte_index = arch_feature_index / 8; + const bit_index = @intCast(u3, arch_feature_index % 8); + return (set.bytes[byte_index] & (@as(u8, 1) << bit_index)) != 0; + } + + pub fn addFeature(set: *Set, arch_feature_index: u8) void { + const byte_index = arch_feature_index / 8; + const bit_index = @intCast(u3, arch_feature_index % 8); + set.bytes[byte_index] |= @as(u8, 1) << bit_index; + } + + pub fn removeFeature(set: *Set, arch_feature_index: u8) void { + const byte_index = arch_feature_index / 8; + const bit_index = @intCast(u3, arch_feature_index % 8); + set.bytes[byte_index] &= ~(@as(u8, 1) << bit_index); + } + }; pub fn feature_set_fns(comptime F: type) type { return struct { pub fn featureSet(features: []const F) Set { - var x: Set = 0; + var x = Set.empty(); for (features) |feature| { - x |= @as(Set, 1) << @enumToInt(feature); + x.addFeature(@enumToInt(feature)); } return x; } pub fn featureSetHas(set: Set, feature: F) bool { - return (set & (@as(Set, 1) << @enumToInt(feature))) != 0; + return set.isEnabled(@enumToInt(feature)); } }; } @@ -748,7 +777,7 @@ pub const Target = union(enum) { pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch { const info = @typeInfo(Arch); inline for (info.Union.fields) |field| { - if (mem.eql(u8, text, field.name)) { + if (mem.startsWith(u8, text, field.name)) { if (field.field_type == void) { return @as(Arch, @field(Arch, field.name)); } else { diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4d547b74c11fdb03620454940ab431a4ec369455..980465bb20831596ff72d24913194ba257e3abb2 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -154,7 +154,7 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.a35)] = .{ .index = @enumToInt(Feature.a35), @@ -298,140 +298,140 @@ pub const all_features = blk: { .name = @tagName(Feature.aggressive_fma), .llvm_name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{ .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern), .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern), .llvm_name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altnzcv)] = .{ .index = @enumToInt(Feature.altnzcv), .name = @tagName(Feature.altnzcv), .llvm_name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.am)] = .{ .index = @enumToInt(Feature.am), .name = @tagName(Feature.am), .llvm_name = "am", .description = "Enable v8.4-A Activity Monitors extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_bcc_fusion)] = .{ .index = @enumToInt(Feature.arith_bcc_fusion), .name = @tagName(Feature.arith_bcc_fusion), .llvm_name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_cbz_fusion)] = .{ .index = @enumToInt(Feature.arith_cbz_fusion), .name = @tagName(Feature.arith_cbz_fusion), .llvm_name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.balance_fp_ops)] = .{ .index = @enumToInt(Feature.balance_fp_ops), .name = @tagName(Feature.balance_fp_ops), .llvm_name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bti)] = .{ .index = @enumToInt(Feature.bti), .name = @tagName(Feature.bti), .llvm_name = "bti", .description = "Enable Branch Target Identification", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x10)] = .{ .index = @enumToInt(Feature.call_saved_x10), .name = @tagName(Feature.call_saved_x10), .llvm_name = "call-saved-x10", .description = "Make X10 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x11)] = .{ .index = @enumToInt(Feature.call_saved_x11), .name = @tagName(Feature.call_saved_x11), .llvm_name = "call-saved-x11", .description = "Make X11 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x12)] = .{ .index = @enumToInt(Feature.call_saved_x12), .name = @tagName(Feature.call_saved_x12), .llvm_name = "call-saved-x12", .description = "Make X12 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x13)] = .{ .index = @enumToInt(Feature.call_saved_x13), .name = @tagName(Feature.call_saved_x13), .llvm_name = "call-saved-x13", .description = "Make X13 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x14)] = .{ .index = @enumToInt(Feature.call_saved_x14), .name = @tagName(Feature.call_saved_x14), .llvm_name = "call-saved-x14", .description = "Make X14 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x15)] = .{ .index = @enumToInt(Feature.call_saved_x15), .name = @tagName(Feature.call_saved_x15), .llvm_name = "call-saved-x15", .description = "Make X15 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x18)] = .{ .index = @enumToInt(Feature.call_saved_x18), .name = @tagName(Feature.call_saved_x18), .llvm_name = "call-saved-x18", .description = "Make X18 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x8)] = .{ .index = @enumToInt(Feature.call_saved_x8), .name = @tagName(Feature.call_saved_x8), .llvm_name = "call-saved-x8", .description = "Make X8 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x9)] = .{ .index = @enumToInt(Feature.call_saved_x9), .name = @tagName(Feature.call_saved_x9), .llvm_name = "call-saved-x9", .description = "Make X9 callee saved.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccdp)] = .{ .index = @enumToInt(Feature.ccdp), .name = @tagName(Feature.ccdp), .llvm_name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccidx)] = .{ .index = @enumToInt(Feature.ccidx), .name = @tagName(Feature.ccidx), .llvm_name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccpp)] = .{ .index = @enumToInt(Feature.ccpp), .name = @tagName(Feature.ccpp), .llvm_name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.complxnum)] = .{ .index = @enumToInt(Feature.complxnum), @@ -447,7 +447,7 @@ pub const all_features = blk: { .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .index = @enumToInt(Feature.crypto), @@ -465,7 +465,7 @@ pub const all_features = blk: { .name = @tagName(Feature.custom_cheap_as_move), .llvm_name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cyclone)] = .{ .index = @enumToInt(Feature.cyclone), @@ -493,21 +493,21 @@ pub const all_features = blk: { .name = @tagName(Feature.disable_latency_sched_heuristic), .llvm_name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dit)] = .{ .index = @enumToInt(Feature.dit), .name = @tagName(Feature.dit), .llvm_name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ .index = @enumToInt(Feature.dotprod), .name = @tagName(Feature.dotprod), .llvm_name = "dotprod", .description = "Enable dot product support", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos_cheap_as_move)] = .{ .index = @enumToInt(Feature.exynos_cheap_as_move), @@ -626,21 +626,21 @@ pub const all_features = blk: { .name = @tagName(Feature.fmi), .llvm_name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ .index = @enumToInt(Feature.force_32bit_jump_tables), .name = @tagName(Feature.force_32bit_jump_tables), .llvm_name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_armv8)] = .{ .index = @enumToInt(Feature.fp_armv8), .name = @tagName(Feature.fp_armv8), .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ .index = @enumToInt(Feature.fp16fml), @@ -656,7 +656,7 @@ pub const all_features = blk: { .name = @tagName(Feature.fptoint), .llvm_name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fullfp16)] = .{ .index = @enumToInt(Feature.fullfp16), @@ -672,42 +672,42 @@ pub const all_features = blk: { .name = @tagName(Feature.fuse_address), .llvm_name = "fuse-address", .description = "CPU fuses address generation and memory operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_aes)] = .{ .index = @enumToInt(Feature.fuse_aes), .name = @tagName(Feature.fuse_aes), .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_arith_logic)] = .{ .index = @enumToInt(Feature.fuse_arith_logic), .name = @tagName(Feature.fuse_arith_logic), .llvm_name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_crypto_eor)] = .{ .index = @enumToInt(Feature.fuse_crypto_eor), .name = @tagName(Feature.fuse_crypto_eor), .llvm_name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_csel)] = .{ .index = @enumToInt(Feature.fuse_csel), .name = @tagName(Feature.fuse_csel), .llvm_name = "fuse-csel", .description = "CPU fuses conditional select operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ .index = @enumToInt(Feature.fuse_literals), .name = @tagName(Feature.fuse_literals), .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jsconv)] = .{ .index = @enumToInt(Feature.jsconv), @@ -741,35 +741,35 @@ pub const all_features = blk: { .name = @tagName(Feature.lor), .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lse)] = .{ .index = @enumToInt(Feature.lse), .name = @tagName(Feature.lse), .llvm_name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lsl_fast)] = .{ .index = @enumToInt(Feature.lsl_fast), .name = @tagName(Feature.lsl_fast), .llvm_name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpam)] = .{ .index = @enumToInt(Feature.mpam), .name = @tagName(Feature.mpam), .llvm_name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mte)] = .{ .index = @enumToInt(Feature.mte), .name = @tagName(Feature.mte), .llvm_name = "mte", .description = "Enable Memory Tagging Extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ .index = @enumToInt(Feature.neon), @@ -785,28 +785,28 @@ pub const all_features = blk: { .name = @tagName(Feature.no_neg_immediates), .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nv)] = .{ .index = @enumToInt(Feature.nv), .name = @tagName(Feature.nv), .llvm_name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pa)] = .{ .index = @enumToInt(Feature.pa), .name = @tagName(Feature.pa), .llvm_name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan)] = .{ .index = @enumToInt(Feature.pan), .name = @tagName(Feature.pan), .llvm_name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan_rwv)] = .{ .index = @enumToInt(Feature.pan_rwv), @@ -822,35 +822,35 @@ pub const all_features = blk: { .name = @tagName(Feature.perfmon), .llvm_name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predictable_select_expensive)] = .{ .index = @enumToInt(Feature.predictable_select_expensive), .name = @tagName(Feature.predictable_select_expensive), .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predres)] = .{ .index = @enumToInt(Feature.predres), .name = @tagName(Feature.predres), .llvm_name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rand)] = .{ .index = @enumToInt(Feature.rand), .name = @tagName(Feature.rand), .llvm_name = "rand", .description = "Enable Random Number generation instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ .index = @enumToInt(Feature.ras), .name = @tagName(Feature.ras), .llvm_name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rasv8_4)] = .{ .index = @enumToInt(Feature.rasv8_4), @@ -866,7 +866,7 @@ pub const all_features = blk: { .name = @tagName(Feature.rcpc), .llvm_name = "rcpc", .description = "Enable support for RCPC extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rcpc_immo)] = .{ .index = @enumToInt(Feature.rcpc_immo), @@ -882,175 +882,175 @@ pub const all_features = blk: { .name = @tagName(Feature.rdm), .llvm_name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x1)] = .{ .index = @enumToInt(Feature.reserve_x1), .name = @tagName(Feature.reserve_x1), .llvm_name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x10)] = .{ .index = @enumToInt(Feature.reserve_x10), .name = @tagName(Feature.reserve_x10), .llvm_name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x11)] = .{ .index = @enumToInt(Feature.reserve_x11), .name = @tagName(Feature.reserve_x11), .llvm_name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x12)] = .{ .index = @enumToInt(Feature.reserve_x12), .name = @tagName(Feature.reserve_x12), .llvm_name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x13)] = .{ .index = @enumToInt(Feature.reserve_x13), .name = @tagName(Feature.reserve_x13), .llvm_name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x14)] = .{ .index = @enumToInt(Feature.reserve_x14), .name = @tagName(Feature.reserve_x14), .llvm_name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x15)] = .{ .index = @enumToInt(Feature.reserve_x15), .name = @tagName(Feature.reserve_x15), .llvm_name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x18)] = .{ .index = @enumToInt(Feature.reserve_x18), .name = @tagName(Feature.reserve_x18), .llvm_name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x2)] = .{ .index = @enumToInt(Feature.reserve_x2), .name = @tagName(Feature.reserve_x2), .llvm_name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x20)] = .{ .index = @enumToInt(Feature.reserve_x20), .name = @tagName(Feature.reserve_x20), .llvm_name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x21)] = .{ .index = @enumToInt(Feature.reserve_x21), .name = @tagName(Feature.reserve_x21), .llvm_name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x22)] = .{ .index = @enumToInt(Feature.reserve_x22), .name = @tagName(Feature.reserve_x22), .llvm_name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x23)] = .{ .index = @enumToInt(Feature.reserve_x23), .name = @tagName(Feature.reserve_x23), .llvm_name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x24)] = .{ .index = @enumToInt(Feature.reserve_x24), .name = @tagName(Feature.reserve_x24), .llvm_name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x25)] = .{ .index = @enumToInt(Feature.reserve_x25), .name = @tagName(Feature.reserve_x25), .llvm_name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x26)] = .{ .index = @enumToInt(Feature.reserve_x26), .name = @tagName(Feature.reserve_x26), .llvm_name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x27)] = .{ .index = @enumToInt(Feature.reserve_x27), .name = @tagName(Feature.reserve_x27), .llvm_name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x28)] = .{ .index = @enumToInt(Feature.reserve_x28), .name = @tagName(Feature.reserve_x28), .llvm_name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x3)] = .{ .index = @enumToInt(Feature.reserve_x3), .name = @tagName(Feature.reserve_x3), .llvm_name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x4)] = .{ .index = @enumToInt(Feature.reserve_x4), .name = @tagName(Feature.reserve_x4), .llvm_name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x5)] = .{ .index = @enumToInt(Feature.reserve_x5), .name = @tagName(Feature.reserve_x5), .llvm_name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x6)] = .{ .index = @enumToInt(Feature.reserve_x6), .name = @tagName(Feature.reserve_x6), .llvm_name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x7)] = .{ .index = @enumToInt(Feature.reserve_x7), .name = @tagName(Feature.reserve_x7), .llvm_name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x9)] = .{ .index = @enumToInt(Feature.reserve_x9), .name = @tagName(Feature.reserve_x9), .llvm_name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.saphira)] = .{ .index = @enumToInt(Feature.saphira), @@ -1076,14 +1076,14 @@ pub const all_features = blk: { .name = @tagName(Feature.sb), .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sel2)] = .{ .index = @enumToInt(Feature.sel2), .name = @tagName(Feature.sel2), .llvm_name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ .index = @enumToInt(Feature.sha2), @@ -1109,21 +1109,21 @@ pub const all_features = blk: { .name = @tagName(Feature.slow_misaligned_128store), .llvm_name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_paired_128)] = .{ .index = @enumToInt(Feature.slow_paired_128), .name = @tagName(Feature.slow_paired_128), .llvm_name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_strqro_store)] = .{ .index = @enumToInt(Feature.slow_strqro_store), .name = @tagName(Feature.slow_strqro_store), .llvm_name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm4)] = .{ .index = @enumToInt(Feature.sm4), @@ -1139,35 +1139,35 @@ pub const all_features = blk: { .name = @tagName(Feature.spe), .llvm_name = "spe", .description = "Enable Statistical Profiling extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.specrestrict)] = .{ .index = @enumToInt(Feature.specrestrict), .name = @tagName(Feature.specrestrict), .llvm_name = "specrestrict", .description = "Enable architectural speculation restriction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ssbs)] = .{ .index = @enumToInt(Feature.ssbs), .name = @tagName(Feature.ssbs), .llvm_name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.strict_align)] = .{ .index = @enumToInt(Feature.strict_align), .name = @tagName(Feature.strict_align), .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve)] = .{ .index = @enumToInt(Feature.sve), .name = @tagName(Feature.sve), .llvm_name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve2)] = .{ .index = @enumToInt(Feature.sve2), @@ -1300,35 +1300,35 @@ pub const all_features = blk: { .name = @tagName(Feature.tlb_rmi), .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el1)] = .{ .index = @enumToInt(Feature.tpidr_el1), .name = @tagName(Feature.tpidr_el1), .llvm_name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el2)] = .{ .index = @enumToInt(Feature.tpidr_el2), .name = @tagName(Feature.tpidr_el2), .llvm_name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el3)] = .{ .index = @enumToInt(Feature.tpidr_el3), .name = @tagName(Feature.tpidr_el3), .llvm_name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tracev8_4)] = .{ .index = @enumToInt(Feature.tracev8_4), .name = @tagName(Feature.tracev8_4), .llvm_name = "tracev8.4", .description = "Enable v8.4-A Trace extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tsv110)] = .{ .index = @enumToInt(Feature.tsv110), @@ -1355,28 +1355,28 @@ pub const all_features = blk: { .name = @tagName(Feature.uaops), .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ .index = @enumToInt(Feature.use_aa), .name = @tagName(Feature.use_aa), .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_postra_scheduler)] = .{ .index = @enumToInt(Feature.use_postra_scheduler), .name = @tagName(Feature.use_postra_scheduler), .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_reciprocal_square_root)] = .{ .index = @enumToInt(Feature.use_reciprocal_square_root), .name = @tagName(Feature.use_reciprocal_square_root), .llvm_name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8_1a)] = .{ .index = @enumToInt(Feature.v8_1a), @@ -1461,14 +1461,14 @@ pub const all_features = blk: { .name = @tagName(Feature.vh), .llvm_name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcm)] = .{ .index = @enumToInt(Feature.zcm), .name = @tagName(Feature.zcm), .llvm_name = "zcm", .description = "Has zero-cycle register moves", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz)] = .{ .index = @enumToInt(Feature.zcz), @@ -1485,21 +1485,21 @@ pub const all_features = blk: { .name = @tagName(Feature.zcz_fp), .llvm_name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_fp_workaround)] = .{ .index = @enumToInt(Feature.zcz_fp_workaround), .name = @tagName(Feature.zcz_fp_workaround), .llvm_name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_gp)] = .{ .index = @enumToInt(Feature.zcz_gp), .name = @tagName(Feature.zcz_gp), .llvm_name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 6175456a17ea2b4f8ffa0e21b06c49402196c908..b1953ca83e5fdc7bcff570f0b152bfed3e3993ea 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -115,224 +115,224 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"16_bit_insts")] = .{ .index = @enumToInt(Feature.@"16_bit_insts"), .name = @tagName(Feature.@"16_bit_insts"), .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.DumpCode)] = .{ .index = @enumToInt(Feature.DumpCode), .name = @tagName(Feature.DumpCode), .llvm_name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.add_no_carry_insts)] = .{ .index = @enumToInt(Feature.add_no_carry_insts), .name = @tagName(Feature.add_no_carry_insts), .llvm_name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aperture_regs)] = .{ .index = @enumToInt(Feature.aperture_regs), .name = @tagName(Feature.aperture_regs), .llvm_name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.atomic_fadd_insts)] = .{ .index = @enumToInt(Feature.atomic_fadd_insts), .name = @tagName(Feature.atomic_fadd_insts), .llvm_name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{ .index = @enumToInt(Feature.auto_waitcnt_before_barrier), .name = @tagName(Feature.auto_waitcnt_before_barrier), .llvm_name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ci_insts)] = .{ .index = @enumToInt(Feature.ci_insts), .name = @tagName(Feature.ci_insts), .llvm_name = "ci-insts", .description = "Additional instructions for CI+", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.code_object_v3)] = .{ .index = @enumToInt(Feature.code_object_v3), .name = @tagName(Feature.code_object_v3), .llvm_name = "code-object-v3", .description = "Generate code object version 3", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cumode)] = .{ .index = @enumToInt(Feature.cumode), .name = @tagName(Feature.cumode), .llvm_name = "cumode", .description = "Enable CU wavefront execution mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dl_insts)] = .{ .index = @enumToInt(Feature.dl_insts), .name = @tagName(Feature.dl_insts), .llvm_name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot1_insts)] = .{ .index = @enumToInt(Feature.dot1_insts), .name = @tagName(Feature.dot1_insts), .llvm_name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot2_insts)] = .{ .index = @enumToInt(Feature.dot2_insts), .name = @tagName(Feature.dot2_insts), .llvm_name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot3_insts)] = .{ .index = @enumToInt(Feature.dot3_insts), .name = @tagName(Feature.dot3_insts), .llvm_name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot4_insts)] = .{ .index = @enumToInt(Feature.dot4_insts), .name = @tagName(Feature.dot4_insts), .llvm_name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot5_insts)] = .{ .index = @enumToInt(Feature.dot5_insts), .name = @tagName(Feature.dot5_insts), .llvm_name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot6_insts)] = .{ .index = @enumToInt(Feature.dot6_insts), .name = @tagName(Feature.dot6_insts), .llvm_name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp)] = .{ .index = @enumToInt(Feature.dpp), .name = @tagName(Feature.dpp), .llvm_name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp8)] = .{ .index = @enumToInt(Feature.dpp8), .name = @tagName(Feature.dpp8), .llvm_name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dumpcode)] = .{ .index = @enumToInt(Feature.dumpcode), .name = @tagName(Feature.dumpcode), .llvm_name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_ds128)] = .{ .index = @enumToInt(Feature.enable_ds128), .name = @tagName(Feature.enable_ds128), .llvm_name = "enable-ds128", .description = "Use ds_read|write_b128", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_prt_strict_null)] = .{ .index = @enumToInt(Feature.enable_prt_strict_null), .name = @tagName(Feature.enable_prt_strict_null), .llvm_name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_fmaf)] = .{ .index = @enumToInt(Feature.fast_fmaf), .name = @tagName(Feature.fast_fmaf), .llvm_name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_address_space)] = .{ .index = @enumToInt(Feature.flat_address_space), .name = @tagName(Feature.flat_address_space), .llvm_name = "flat-address-space", .description = "Support flat address space", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_for_global)] = .{ .index = @enumToInt(Feature.flat_for_global), .name = @tagName(Feature.flat_for_global), .llvm_name = "flat-for-global", .description = "Force to generate flat instruction for global", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_global_insts)] = .{ .index = @enumToInt(Feature.flat_global_insts), .name = @tagName(Feature.flat_global_insts), .llvm_name = "flat-global-insts", .description = "Have global_* flat memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_inst_offsets)] = .{ .index = @enumToInt(Feature.flat_inst_offsets), .name = @tagName(Feature.flat_inst_offsets), .llvm_name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_scratch_insts)] = .{ .index = @enumToInt(Feature.flat_scratch_insts), .name = @tagName(Feature.flat_scratch_insts), .llvm_name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_segment_offset_bug)] = .{ .index = @enumToInt(Feature.flat_segment_offset_bug), .name = @tagName(Feature.flat_segment_offset_bug), .llvm_name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma_mix_insts)] = .{ .index = @enumToInt(Feature.fma_mix_insts), .name = @tagName(Feature.fma_mix_insts), .llvm_name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fmaf)] = .{ .index = @enumToInt(Feature.fmaf), .name = @tagName(Feature.fmaf), .llvm_name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_exceptions)] = .{ .index = @enumToInt(Feature.fp_exceptions), .name = @tagName(Feature.fp_exceptions), .llvm_name = "fp-exceptions", .description = "Enable floating point exceptions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16_denormals)] = .{ .index = @enumToInt(Feature.fp16_denormals), @@ -348,14 +348,14 @@ pub const all_features = blk: { .name = @tagName(Feature.fp32_denormals), .llvm_name = "fp32-denormals", .description = "Enable single precision denormal handling", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ .index = @enumToInt(Feature.fp64), .name = @tagName(Feature.fp64), .llvm_name = "fp64", .description = "Enable double precision operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64_denormals)] = .{ .index = @enumToInt(Feature.fp64_denormals), @@ -381,7 +381,7 @@ pub const all_features = blk: { .name = @tagName(Feature.gcn3_encoding), .llvm_name = "gcn3-encoding", .description = "Encoding format for VI", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx10)] = .{ .index = @enumToInt(Feature.gfx10), @@ -430,21 +430,21 @@ pub const all_features = blk: { .name = @tagName(Feature.gfx10_insts), .llvm_name = "gfx10-insts", .description = "Additional instructions for GFX10+", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts), .name = @tagName(Feature.gfx7_gfx8_gfx9_insts), .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx8_insts)] = .{ .index = @enumToInt(Feature.gfx8_insts), .name = @tagName(Feature.gfx8_insts), .llvm_name = "gfx8-insts", .description = "Additional instructions for GFX8+", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx9)] = .{ .index = @enumToInt(Feature.gfx9), @@ -489,287 +489,287 @@ pub const all_features = blk: { .name = @tagName(Feature.gfx9_insts), .llvm_name = "gfx9-insts", .description = "Additional instructions for GFX9+", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.half_rate_64_ops)] = .{ .index = @enumToInt(Feature.half_rate_64_ops), .name = @tagName(Feature.half_rate_64_ops), .llvm_name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ .index = @enumToInt(Feature.inst_fwd_prefetch_bug), .name = @tagName(Feature.inst_fwd_prefetch_bug), .llvm_name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.int_clamp_insts)] = .{ .index = @enumToInt(Feature.int_clamp_insts), .name = @tagName(Feature.int_clamp_insts), .llvm_name = "int-clamp-insts", .description = "Support clamp for integer destination", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{ .index = @enumToInt(Feature.inv_2pi_inline_imm), .name = @tagName(Feature.inv_2pi_inline_imm), .llvm_name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{ .index = @enumToInt(Feature.lds_branch_vmem_war_hazard), .name = @tagName(Feature.lds_branch_vmem_war_hazard), .llvm_name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_misaligned_bug)] = .{ .index = @enumToInt(Feature.lds_misaligned_bug), .name = @tagName(Feature.lds_misaligned_bug), .llvm_name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount16)] = .{ .index = @enumToInt(Feature.ldsbankcount16), .name = @tagName(Feature.ldsbankcount16), .llvm_name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount32)] = .{ .index = @enumToInt(Feature.ldsbankcount32), .name = @tagName(Feature.ldsbankcount32), .llvm_name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_opt)] = .{ .index = @enumToInt(Feature.load_store_opt), .name = @tagName(Feature.load_store_opt), .llvm_name = "load-store-opt", .description = "Enable SI load/store optimizer pass", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize0)] = .{ .index = @enumToInt(Feature.localmemorysize0), .name = @tagName(Feature.localmemorysize0), .llvm_name = "localmemorysize0", .description = "The size of local memory in bytes", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize32768)] = .{ .index = @enumToInt(Feature.localmemorysize32768), .name = @tagName(Feature.localmemorysize32768), .llvm_name = "localmemorysize32768", .description = "The size of local memory in bytes", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize65536)] = .{ .index = @enumToInt(Feature.localmemorysize65536), .name = @tagName(Feature.localmemorysize65536), .llvm_name = "localmemorysize65536", .description = "The size of local memory in bytes", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mad_mix_insts)] = .{ .index = @enumToInt(Feature.mad_mix_insts), .name = @tagName(Feature.mad_mix_insts), .llvm_name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mai_insts)] = .{ .index = @enumToInt(Feature.mai_insts), .name = @tagName(Feature.mai_insts), .llvm_name = "mai-insts", .description = "Has mAI instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_16)] = .{ .index = @enumToInt(Feature.max_private_element_size_16), .name = @tagName(Feature.max_private_element_size_16), .llvm_name = "max-private-element-size-16", .description = "Maximum private access size may be 16", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_4)] = .{ .index = @enumToInt(Feature.max_private_element_size_4), .name = @tagName(Feature.max_private_element_size_4), .llvm_name = "max-private-element-size-4", .description = "Maximum private access size may be 4", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_8)] = .{ .index = @enumToInt(Feature.max_private_element_size_8), .name = @tagName(Feature.max_private_element_size_8), .llvm_name = "max-private-element-size-8", .description = "Maximum private access size may be 8", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mimg_r128)] = .{ .index = @enumToInt(Feature.mimg_r128), .name = @tagName(Feature.mimg_r128), .llvm_name = "mimg-r128", .description = "Support 128-bit texture resources", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movrel)] = .{ .index = @enumToInt(Feature.movrel), .name = @tagName(Feature.movrel), .llvm_name = "movrel", .description = "Has v_movrel*_b32 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_data_dep_hazard)] = .{ .index = @enumToInt(Feature.no_data_dep_hazard), .name = @tagName(Feature.no_data_dep_hazard), .llvm_name = "no-data-dep-hazard", .description = "Does not need SW waitstates", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sdst_cmpx)] = .{ .index = @enumToInt(Feature.no_sdst_cmpx), .name = @tagName(Feature.no_sdst_cmpx), .llvm_name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sram_ecc_support)] = .{ .index = @enumToInt(Feature.no_sram_ecc_support), .name = @tagName(Feature.no_sram_ecc_support), .llvm_name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_xnack_support)] = .{ .index = @enumToInt(Feature.no_xnack_support), .name = @tagName(Feature.no_xnack_support), .llvm_name = "no-xnack-support", .description = "Hardware does not support XNACK", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_encoding)] = .{ .index = @enumToInt(Feature.nsa_encoding), .name = @tagName(Feature.nsa_encoding), .llvm_name = "nsa-encoding", .description = "Support NSA encoding for image instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{ .index = @enumToInt(Feature.nsa_to_vmem_bug), .name = @tagName(Feature.nsa_to_vmem_bug), .llvm_name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.offset_3f_bug)] = .{ .index = @enumToInt(Feature.offset_3f_bug), .name = @tagName(Feature.offset_3f_bug), .llvm_name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{ .index = @enumToInt(Feature.pk_fmac_f16_inst), .name = @tagName(Feature.pk_fmac_f16_inst), .llvm_name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.promote_alloca)] = .{ .index = @enumToInt(Feature.promote_alloca), .name = @tagName(Feature.promote_alloca), .llvm_name = "promote-alloca", .description = "Enable promote alloca pass", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r128_a16)] = .{ .index = @enumToInt(Feature.r128_a16), .name = @tagName(Feature.r128_a16), .llvm_name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.register_banking)] = .{ .index = @enumToInt(Feature.register_banking), .name = @tagName(Feature.register_banking), .llvm_name = "register-banking", .description = "Has register banking", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.s_memrealtime)] = .{ .index = @enumToInt(Feature.s_memrealtime), .name = @tagName(Feature.s_memrealtime), .llvm_name = "s-memrealtime", .description = "Has s_memrealtime instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_atomics)] = .{ .index = @enumToInt(Feature.scalar_atomics), .name = @tagName(Feature.scalar_atomics), .llvm_name = "scalar-atomics", .description = "Has atomic scalar memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{ .index = @enumToInt(Feature.scalar_flat_scratch_insts), .name = @tagName(Feature.scalar_flat_scratch_insts), .llvm_name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_stores)] = .{ .index = @enumToInt(Feature.scalar_stores), .name = @tagName(Feature.scalar_stores), .llvm_name = "scalar-stores", .description = "Has store scalar memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa)] = .{ .index = @enumToInt(Feature.sdwa), .name = @tagName(Feature.sdwa), .llvm_name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_mav)] = .{ .index = @enumToInt(Feature.sdwa_mav), .name = @tagName(Feature.sdwa_mav), .llvm_name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_omod)] = .{ .index = @enumToInt(Feature.sdwa_omod), .name = @tagName(Feature.sdwa_omod), .llvm_name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{ .index = @enumToInt(Feature.sdwa_out_mods_vopc), .name = @tagName(Feature.sdwa_out_mods_vopc), .llvm_name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_scalar)] = .{ .index = @enumToInt(Feature.sdwa_scalar), .name = @tagName(Feature.sdwa_scalar), .llvm_name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_sdst)] = .{ .index = @enumToInt(Feature.sdwa_sdst), .name = @tagName(Feature.sdwa_sdst), .llvm_name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sea_islands)] = .{ .index = @enumToInt(Feature.sea_islands), @@ -794,21 +794,21 @@ pub const all_features = blk: { .name = @tagName(Feature.sgpr_init_bug), .llvm_name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.si_scheduler)] = .{ .index = @enumToInt(Feature.si_scheduler), .name = @tagName(Feature.si_scheduler), .llvm_name = "si-scheduler", .description = "Enable SI Machine Scheduler", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{ .index = @enumToInt(Feature.smem_to_vector_write_hazard), .name = @tagName(Feature.smem_to_vector_write_hazard), .llvm_name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.southern_islands)] = .{ .index = @enumToInt(Feature.southern_islands), @@ -832,77 +832,77 @@ pub const all_features = blk: { .name = @tagName(Feature.sram_ecc), .llvm_name = "sram-ecc", .description = "Enable SRAM ECC", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trap_handler)] = .{ .index = @enumToInt(Feature.trap_handler), .name = @tagName(Feature.trap_handler), .llvm_name = "trap-handler", .description = "Trap handler support", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trig_reduced_range)] = .{ .index = @enumToInt(Feature.trig_reduced_range), .name = @tagName(Feature.trig_reduced_range), .llvm_name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_buffer_access)] = .{ .index = @enumToInt(Feature.unaligned_buffer_access), .name = @tagName(Feature.unaligned_buffer_access), .llvm_name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_scratch_access)] = .{ .index = @enumToInt(Feature.unaligned_scratch_access), .name = @tagName(Feature.unaligned_scratch_access), .llvm_name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unpacked_d16_vmem)] = .{ .index = @enumToInt(Feature.unpacked_d16_vmem), .name = @tagName(Feature.unpacked_d16_vmem), .llvm_name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{ .index = @enumToInt(Feature.unsafe_ds_offset_folding), .name = @tagName(Feature.unsafe_ds_offset_folding), .llvm_name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{ .index = @enumToInt(Feature.vcmpx_exec_war_hazard), .name = @tagName(Feature.vcmpx_exec_war_hazard), .llvm_name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{ .index = @enumToInt(Feature.vcmpx_permlane_hazard), .name = @tagName(Feature.vcmpx_permlane_hazard), .llvm_name = "vcmpx-permlane-hazard", .description = "TODO: describe me", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vgpr_index_mode)] = .{ .index = @enumToInt(Feature.vgpr_index_mode), .name = @tagName(Feature.vgpr_index_mode), .llvm_name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{ .index = @enumToInt(Feature.vmem_to_scalar_write_hazard), .name = @tagName(Feature.vmem_to_scalar_write_hazard), .llvm_name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.volcanic_islands)] = .{ .index = @enumToInt(Feature.volcanic_islands), @@ -939,49 +939,49 @@ pub const all_features = blk: { .name = @tagName(Feature.vop3_literal), .llvm_name = "vop3-literal", .description = "Can use one literal in VOP3", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vop3p)] = .{ .index = @enumToInt(Feature.vop3p), .name = @tagName(Feature.vop3p), .llvm_name = "vop3p", .description = "Has VOP3P packed instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vscnt)] = .{ .index = @enumToInt(Feature.vscnt), .name = @tagName(Feature.vscnt), .llvm_name = "vscnt", .description = "Has separate store vscnt counter", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize16)] = .{ .index = @enumToInt(Feature.wavefrontsize16), .name = @tagName(Feature.wavefrontsize16), .llvm_name = "wavefrontsize16", .description = "The number of threads per wavefront", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize32)] = .{ .index = @enumToInt(Feature.wavefrontsize32), .name = @tagName(Feature.wavefrontsize32), .llvm_name = "wavefrontsize32", .description = "The number of threads per wavefront", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize64)] = .{ .index = @enumToInt(Feature.wavefrontsize64), .name = @tagName(Feature.wavefrontsize64), .llvm_name = "wavefrontsize64", .description = "The number of threads per wavefront", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xnack)] = .{ .index = @enumToInt(Feature.xnack), .name = @tagName(Feature.xnack), .llvm_name = "xnack", .description = "Enable XNACK support", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index de4bd0ed78de86953aff941b7c99425de8026e05..744d418d03ed705601aac988abc8ade1d61dc644 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -182,147 +182,147 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"32bit")] = .{ .index = @enumToInt(Feature.@"32bit"), .name = @tagName(Feature.@"32bit"), .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"8msecext")] = .{ .index = @enumToInt(Feature.@"8msecext"), .name = @tagName(Feature.@"8msecext"), .llvm_name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a12)] = .{ .index = @enumToInt(Feature.a12), .name = @tagName(Feature.a12), .llvm_name = "a12", .description = "Cortex-A12 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a15)] = .{ .index = @enumToInt(Feature.a15), .name = @tagName(Feature.a15), .llvm_name = "a15", .description = "Cortex-A15 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a17)] = .{ .index = @enumToInt(Feature.a17), .name = @tagName(Feature.a17), .llvm_name = "a17", .description = "Cortex-A17 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a32)] = .{ .index = @enumToInt(Feature.a32), .name = @tagName(Feature.a32), .llvm_name = "a32", .description = "Cortex-A32 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a35)] = .{ .index = @enumToInt(Feature.a35), .name = @tagName(Feature.a35), .llvm_name = "a35", .description = "Cortex-A35 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a5)] = .{ .index = @enumToInt(Feature.a5), .name = @tagName(Feature.a5), .llvm_name = "a5", .description = "Cortex-A5 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a53)] = .{ .index = @enumToInt(Feature.a53), .name = @tagName(Feature.a53), .llvm_name = "a53", .description = "Cortex-A53 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a55)] = .{ .index = @enumToInt(Feature.a55), .name = @tagName(Feature.a55), .llvm_name = "a55", .description = "Cortex-A55 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a57)] = .{ .index = @enumToInt(Feature.a57), .name = @tagName(Feature.a57), .llvm_name = "a57", .description = "Cortex-A57 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a7)] = .{ .index = @enumToInt(Feature.a7), .name = @tagName(Feature.a7), .llvm_name = "a7", .description = "Cortex-A7 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a72)] = .{ .index = @enumToInt(Feature.a72), .name = @tagName(Feature.a72), .llvm_name = "a72", .description = "Cortex-A72 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a73)] = .{ .index = @enumToInt(Feature.a73), .name = @tagName(Feature.a73), .llvm_name = "a73", .description = "Cortex-A73 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a75)] = .{ .index = @enumToInt(Feature.a75), .name = @tagName(Feature.a75), .llvm_name = "a75", .description = "Cortex-A75 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a76)] = .{ .index = @enumToInt(Feature.a76), .name = @tagName(Feature.a76), .llvm_name = "a76", .description = "Cortex-A76 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a8)] = .{ .index = @enumToInt(Feature.a8), .name = @tagName(Feature.a8), .llvm_name = "a8", .description = "Cortex-A8 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a9)] = .{ .index = @enumToInt(Feature.a9), .name = @tagName(Feature.a9), .llvm_name = "a9", .description = "Cortex-A9 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aclass)] = .{ .index = @enumToInt(Feature.aclass), .name = @tagName(Feature.aclass), .llvm_name = "aclass", .description = "Is application profile ('A' series)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.acquire_release)] = .{ .index = @enumToInt(Feature.acquire_release), .name = @tagName(Feature.acquire_release), .llvm_name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), @@ -338,35 +338,35 @@ pub const all_features = blk: { .name = @tagName(Feature.armv2), .llvm_name = "armv2", .description = "ARMv2 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv2a)] = .{ .index = @enumToInt(Feature.armv2a), .name = @tagName(Feature.armv2a), .llvm_name = "armv2a", .description = "ARMv2a architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3)] = .{ .index = @enumToInt(Feature.armv3), .name = @tagName(Feature.armv3), .llvm_name = "armv3", .description = "ARMv3 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3m)] = .{ .index = @enumToInt(Feature.armv3m), .name = @tagName(Feature.armv3m), .llvm_name = "armv3m", .description = "ARMv3m architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4)] = .{ .index = @enumToInt(Feature.armv4), .name = @tagName(Feature.armv4), .llvm_name = "armv4", .description = "ARMv4 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4t)] = .{ .index = @enumToInt(Feature.armv4t), @@ -766,28 +766,28 @@ pub const all_features = blk: { .name = @tagName(Feature.avoid_movs_shop), .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avoid_partial_cpsr)] = .{ .index = @enumToInt(Feature.avoid_partial_cpsr), .name = @tagName(Feature.avoid_partial_cpsr), .llvm_name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{ .index = @enumToInt(Feature.cheap_predicable_cpsr), .name = @tagName(Feature.cheap_predicable_cpsr), .llvm_name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crc)] = .{ .index = @enumToInt(Feature.crc), .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Enable support for CRC instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .index = @enumToInt(Feature.crypto), @@ -805,35 +805,35 @@ pub const all_features = blk: { .name = @tagName(Feature.d32), .llvm_name = "d32", .description = "Extend FP to 32 double registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.db)] = .{ .index = @enumToInt(Feature.db), .name = @tagName(Feature.db), .llvm_name = "db", .description = "Has data barrier (dmb/dsb) instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfb)] = .{ .index = @enumToInt(Feature.dfb), .name = @tagName(Feature.dfb), .llvm_name = "dfb", .description = "Has full data barrier (dfb) instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.disable_postra_scheduler)] = .{ .index = @enumToInt(Feature.disable_postra_scheduler), .name = @tagName(Feature.disable_postra_scheduler), .llvm_name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dont_widen_vmovs)] = .{ .index = @enumToInt(Feature.dont_widen_vmovs), .name = @tagName(Feature.dont_widen_vmovs), .llvm_name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ .index = @enumToInt(Feature.dotprod), @@ -849,21 +849,21 @@ pub const all_features = blk: { .name = @tagName(Feature.dsp), .llvm_name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execute_only)] = .{ .index = @enumToInt(Feature.execute_only), .name = @tagName(Feature.execute_only), .llvm_name = "execute-only", .description = "Enable the generation of execute only code.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.expand_fp_mlx)] = .{ .index = @enumToInt(Feature.expand_fp_mlx), .name = @tagName(Feature.expand_fp_mlx), .llvm_name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos)] = .{ .index = @enumToInt(Feature.exynos), @@ -937,7 +937,7 @@ pub const all_features = blk: { .name = @tagName(Feature.fp16), .llvm_name = "fp16", .description = "Enable half-precision floating point", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ .index = @enumToInt(Feature.fp16fml), @@ -962,14 +962,14 @@ pub const all_features = blk: { .name = @tagName(Feature.fpao), .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs)] = .{ .index = @enumToInt(Feature.fpregs), .name = @tagName(Feature.fpregs), .llvm_name = "fpregs", .description = "Enable FP registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs16)] = .{ .index = @enumToInt(Feature.fpregs16), @@ -1004,28 +1004,28 @@ pub const all_features = blk: { .name = @tagName(Feature.fuse_aes), .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ .index = @enumToInt(Feature.fuse_literals), .name = @tagName(Feature.fuse_literals), .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv)] = .{ .index = @enumToInt(Feature.hwdiv), .name = @tagName(Feature.hwdiv), .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv_arm)] = .{ .index = @enumToInt(Feature.hwdiv_arm), .name = @tagName(Feature.hwdiv_arm), .llvm_name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.iwmmxt)] = .{ .index = @enumToInt(Feature.iwmmxt), @@ -1050,63 +1050,63 @@ pub const all_features = blk: { .name = @tagName(Feature.krait), .llvm_name = "krait", .description = "Qualcomm Krait processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.kryo)] = .{ .index = @enumToInt(Feature.kryo), .name = @tagName(Feature.kryo), .llvm_name = "kryo", .description = "Qualcomm Kryo processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lob)] = .{ .index = @enumToInt(Feature.lob), .name = @tagName(Feature.lob), .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ .index = @enumToInt(Feature.long_calls), .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Generate calls via indirect call instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.loop_align)] = .{ .index = @enumToInt(Feature.loop_align), .name = @tagName(Feature.loop_align), .llvm_name = "loop-align", .description = "Prefer 32-bit alignment for loops", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m3)] = .{ .index = @enumToInt(Feature.m3), .name = @tagName(Feature.m3), .llvm_name = "m3", .description = "Cortex-M3 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mclass)] = .{ .index = @enumToInt(Feature.mclass), .name = @tagName(Feature.mclass), .llvm_name = "mclass", .description = "Is microcontroller profile ('M' series)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mp)] = .{ .index = @enumToInt(Feature.mp), .name = @tagName(Feature.mp), .llvm_name = "mp", .description = "Supports Multiprocessing extension", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.muxed_units)] = .{ .index = @enumToInt(Feature.muxed_units), .name = @tagName(Feature.muxed_units), .llvm_name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mve)] = .{ .index = @enumToInt(Feature.mve), @@ -1136,7 +1136,7 @@ pub const all_features = blk: { .name = @tagName(Feature.nacl_trap), .llvm_name = "nacl-trap", .description = "NaCl trap", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ .index = @enumToInt(Feature.neon), @@ -1152,147 +1152,147 @@ pub const all_features = blk: { .name = @tagName(Feature.neon_fpmovs), .llvm_name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neonfp)] = .{ .index = @enumToInt(Feature.neonfp), .name = @tagName(Feature.neonfp), .llvm_name = "neonfp", .description = "Use NEON for single precision FP", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_branch_predictor)] = .{ .index = @enumToInt(Feature.no_branch_predictor), .name = @tagName(Feature.no_branch_predictor), .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_movt)] = .{ .index = @enumToInt(Feature.no_movt), .name = @tagName(Feature.no_movt), .llvm_name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_neg_immediates)] = .{ .index = @enumToInt(Feature.no_neg_immediates), .name = @tagName(Feature.no_neg_immediates), .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noarm)] = .{ .index = @enumToInt(Feature.noarm), .name = @tagName(Feature.noarm), .llvm_name = "noarm", .description = "Does not support ARM mode execution", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nonpipelined_vfp)] = .{ .index = @enumToInt(Feature.nonpipelined_vfp), .name = @tagName(Feature.nonpipelined_vfp), .llvm_name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.perfmon)] = .{ .index = @enumToInt(Feature.perfmon), .name = @tagName(Feature.perfmon), .llvm_name = "perfmon", .description = "Enable support for Performance Monitor extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_ishst)] = .{ .index = @enumToInt(Feature.prefer_ishst), .name = @tagName(Feature.prefer_ishst), .llvm_name = "prefer-ishst", .description = "Prefer ISHST barriers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_vmovsr)] = .{ .index = @enumToInt(Feature.prefer_vmovsr), .name = @tagName(Feature.prefer_vmovsr), .llvm_name = "prefer-vmovsr", .description = "Prefer VMOVSR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prof_unpr)] = .{ .index = @enumToInt(Feature.prof_unpr), .name = @tagName(Feature.prof_unpr), .llvm_name = "prof-unpr", .description = "Is profitable to unpredicate", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r4)] = .{ .index = @enumToInt(Feature.r4), .name = @tagName(Feature.r4), .llvm_name = "r4", .description = "Cortex-R4 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r5)] = .{ .index = @enumToInt(Feature.r5), .name = @tagName(Feature.r5), .llvm_name = "r5", .description = "Cortex-R5 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r52)] = .{ .index = @enumToInt(Feature.r52), .name = @tagName(Feature.r52), .llvm_name = "r52", .description = "Cortex-R52 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r7)] = .{ .index = @enumToInt(Feature.r7), .name = @tagName(Feature.r7), .llvm_name = "r7", .description = "Cortex-R7 ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ .index = @enumToInt(Feature.ras), .name = @tagName(Feature.ras), .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rclass)] = .{ .index = @enumToInt(Feature.rclass), .name = @tagName(Feature.rclass), .llvm_name = "rclass", .description = "Is realtime profile ('R' series)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.read_tp_hard)] = .{ .index = @enumToInt(Feature.read_tp_hard), .name = @tagName(Feature.read_tp_hard), .llvm_name = "read-tp-hard", .description = "Reading thread pointer from register", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_r9)] = .{ .index = @enumToInt(Feature.reserve_r9), .name = @tagName(Feature.reserve_r9), .llvm_name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ret_addr_stack)] = .{ .index = @enumToInt(Feature.ret_addr_stack), .name = @tagName(Feature.ret_addr_stack), .llvm_name = "ret-addr-stack", .description = "Has return address stack", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sb)] = .{ .index = @enumToInt(Feature.sb), .name = @tagName(Feature.sb), .llvm_name = "sb", .description = "Enable v8.5a Speculation Barrier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ .index = @enumToInt(Feature.sha2), @@ -1308,49 +1308,49 @@ pub const all_features = blk: { .name = @tagName(Feature.slow_fp_brcc), .llvm_name = "slow-fp-brcc", .description = "FP compare + branch is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_load_D_subreg)] = .{ .index = @enumToInt(Feature.slow_load_D_subreg), .name = @tagName(Feature.slow_load_D_subreg), .llvm_name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_odd_reg)] = .{ .index = @enumToInt(Feature.slow_odd_reg), .name = @tagName(Feature.slow_odd_reg), .llvm_name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vdup32)] = .{ .index = @enumToInt(Feature.slow_vdup32), .name = @tagName(Feature.slow_vdup32), .llvm_name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vgetlni32)] = .{ .index = @enumToInt(Feature.slow_vgetlni32), .name = @tagName(Feature.slow_vgetlni32), .llvm_name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slowfpvmlx)] = .{ .index = @enumToInt(Feature.slowfpvmlx), .name = @tagName(Feature.slowfpvmlx), .llvm_name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .index = @enumToInt(Feature.soft_float), .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software floating point features.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.splat_vfp_neon)] = .{ .index = @enumToInt(Feature.splat_vfp_neon), @@ -1366,56 +1366,56 @@ pub const all_features = blk: { .name = @tagName(Feature.strict_align), .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.swift)] = .{ .index = @enumToInt(Feature.swift), .name = @tagName(Feature.swift), .llvm_name = "swift", .description = "Swift ARM processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb_mode)] = .{ .index = @enumToInt(Feature.thumb_mode), .name = @tagName(Feature.thumb_mode), .llvm_name = "thumb-mode", .description = "Thumb mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb2)] = .{ .index = @enumToInt(Feature.thumb2), .name = @tagName(Feature.thumb2), .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trustzone)] = .{ .index = @enumToInt(Feature.trustzone), .name = @tagName(Feature.trustzone), .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ .index = @enumToInt(Feature.use_aa), .name = @tagName(Feature.use_aa), .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_misched)] = .{ .index = @enumToInt(Feature.use_misched), .name = @tagName(Feature.use_misched), .llvm_name = "use-misched", .description = "Use the MachineScheduler", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v4t)] = .{ .index = @enumToInt(Feature.v4t), .name = @tagName(Feature.v4t), .llvm_name = "v4t", .description = "Support ARM v4T instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5t)] = .{ .index = @enumToInt(Feature.v5t), @@ -1489,7 +1489,7 @@ pub const all_features = blk: { .name = @tagName(Feature.v7clrex), .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8)] = .{ .index = @enumToInt(Feature.v8), @@ -1714,28 +1714,28 @@ pub const all_features = blk: { .name = @tagName(Feature.vldn_align), .llvm_name = "vldn-align", .description = "Check for VLDn unaligned access", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_forwarding)] = .{ .index = @enumToInt(Feature.vmlx_forwarding), .name = @tagName(Feature.vmlx_forwarding), .llvm_name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_hazards)] = .{ .index = @enumToInt(Feature.vmlx_hazards), .name = @tagName(Feature.vmlx_hazards), .llvm_name = "vmlx-hazards", .description = "Has VMLx hazards", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wide_stride_vfp)] = .{ .index = @enumToInt(Feature.wide_stride_vfp), .name = @tagName(Feature.wide_stride_vfp), .llvm_name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xscale)] = .{ .index = @enumToInt(Feature.xscale), @@ -1751,7 +1751,7 @@ pub const all_features = blk: { .name = @tagName(Feature.zcz), .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -2450,7 +2450,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const iwmmxt = Cpu{ .name = "iwmmxt", diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index fecb45b69ee7d71532a0643cfc2439f162e6bbee..ac739edc081d1d6c05d34b9bac5b5982829f20b2 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -15,7 +15,7 @@ pub const Feature = enum { avr51, avr6, avrtiny, - break, + @"break", des, eijmpcall, elpm, @@ -41,21 +41,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.addsubiw)] = .{ .index = @enumToInt(Feature.addsubiw), .name = @tagName(Feature.addsubiw), .llvm_name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr0)] = .{ .index = @enumToInt(Feature.avr0), .name = @tagName(Feature.avr0), .llvm_name = "avr0", .description = "The device is a part of the avr0 family", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr1)] = .{ .index = @enumToInt(Feature.avr1), @@ -86,7 +86,7 @@ pub const all_features = blk: { .description = "The device is a part of the avr25 family", .dependencies = featureSet(&[_]Feature{ .avr2, - .break, + .@"break", .lpmx, .movw, .spm, @@ -119,7 +119,7 @@ pub const all_features = blk: { .description = "The device is a part of the avr35 family", .dependencies = featureSet(&[_]Feature{ .avr3, - .break, + .@"break", .lpmx, .movw, .spm, @@ -132,7 +132,7 @@ pub const all_features = blk: { .description = "The device is a part of the avr4 family", .dependencies = featureSet(&[_]Feature{ .avr2, - .break, + .@"break", .lpmx, .movw, .mul, @@ -146,7 +146,7 @@ pub const all_features = blk: { .description = "The device is a part of the avr5 family", .dependencies = featureSet(&[_]Feature{ .avr3, - .break, + .@"break", .lpmx, .movw, .mul, @@ -180,101 +180,101 @@ pub const all_features = blk: { .description = "The device is a part of the avrtiny family", .dependencies = featureSet(&[_]Feature{ .avr0, - .break, + .@"break", .sram, .tinyencoding, }), }; - result[@enumToInt(Feature.break)] = .{ - .index = @enumToInt(Feature.break), - .name = @tagName(Feature.break), + result[@enumToInt(Feature.@"break")] = .{ + .index = @enumToInt(Feature.@"break"), + .name = @tagName(Feature.@"break"), .llvm_name = "break", .description = "The device supports the `BREAK` debugging instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.des)] = .{ .index = @enumToInt(Feature.des), .name = @tagName(Feature.des), .llvm_name = "des", .description = "The device supports the `DES k` encryption instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.eijmpcall)] = .{ .index = @enumToInt(Feature.eijmpcall), .name = @tagName(Feature.eijmpcall), .llvm_name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpm)] = .{ .index = @enumToInt(Feature.elpm), .name = @tagName(Feature.elpm), .llvm_name = "elpm", .description = "The device supports the ELPM instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpmx)] = .{ .index = @enumToInt(Feature.elpmx), .name = @tagName(Feature.elpmx), .llvm_name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ijmpcall)] = .{ .index = @enumToInt(Feature.ijmpcall), .name = @tagName(Feature.ijmpcall), .llvm_name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jmpcall)] = .{ .index = @enumToInt(Feature.jmpcall), .name = @tagName(Feature.jmpcall), .llvm_name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpm)] = .{ .index = @enumToInt(Feature.lpm), .name = @tagName(Feature.lpm), .llvm_name = "lpm", .description = "The device supports the `LPM` instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpmx)] = .{ .index = @enumToInt(Feature.lpmx), .name = @tagName(Feature.lpmx), .llvm_name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movw)] = .{ .index = @enumToInt(Feature.movw), .name = @tagName(Feature.movw), .llvm_name = "movw", .description = "The device supports the 16-bit MOVW instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mul)] = .{ .index = @enumToInt(Feature.mul), .name = @tagName(Feature.mul), .llvm_name = "mul", .description = "The device supports the multiplication instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rmw)] = .{ .index = @enumToInt(Feature.rmw), .name = @tagName(Feature.rmw), .llvm_name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smallstack)] = .{ .index = @enumToInt(Feature.smallstack), .name = @tagName(Feature.smallstack), .llvm_name = "smallstack", .description = "The device has an 8-bit stack pointer", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.special)] = .{ .index = @enumToInt(Feature.special), @@ -283,7 +283,7 @@ pub const all_features = blk: { .description = "Enable use of the entire instruction set - used for debugging", .dependencies = featureSet(&[_]Feature{ .addsubiw, - .break, + .@"break", .des, .eijmpcall, .elpm, @@ -305,28 +305,28 @@ pub const all_features = blk: { .name = @tagName(Feature.spm), .llvm_name = "spm", .description = "The device supports the `SPM` instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spmx)] = .{ .index = @enumToInt(Feature.spmx), .name = @tagName(Feature.spmx), .llvm_name = "spmx", .description = "The device supports the `SPM Z+` instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sram)] = .{ .index = @enumToInt(Feature.sram), .name = @tagName(Feature.sram), .llvm_name = "sram", .description = "The device has random access memory", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tinyencoding)] = .{ .index = @enumToInt(Feature.tinyencoding), .name = @tagName(Feature.tinyencoding), .llvm_name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xmega)] = .{ .index = @enumToInt(Feature.xmega), @@ -2439,3 +2439,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.avrxmega7, &cpu.m3000, }; + +pub const baseline_features = featureSet(&[_]Feature{ + .avr0, +}); diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index bb10a84ff8d36d7c2773a9c6155e1f6c9bcbea76..73ed463bc5d82ffd656f318e33258ab87a8513b2 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -11,28 +11,28 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.alu32)] = .{ .index = @enumToInt(Feature.alu32), .name = @tagName(Feature.alu32), .llvm_name = "alu32", .description = "Enable ALU32 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dummy)] = .{ .index = @enumToInt(Feature.dummy), .name = @tagName(Feature.dummy), .llvm_name = "dummy", .description = "unused feature", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dwarfris)] = .{ .index = @enumToInt(Feature.dwarfris), .name = @tagName(Feature.dwarfris), .llvm_name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -41,27 +41,27 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const probe = Cpu{ .name = "probe", .llvm_name = "probe", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const v1 = Cpu{ .name = "v1", .llvm_name = "v1", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const v2 = Cpu{ .name = "v2", .llvm_name = "v2", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const v3 = Cpu{ .name = "v3", .llvm_name = "v3", - .features = 0, + .features = featureSet(&[_]Feature{}), }; }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index 441abb9cbd1eb4ff26589c49fdcde83e5a0a91eb..bea73eb7941010e1ad34836ab70a6e2c713dd673 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -32,21 +32,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.duplex)] = .{ .index = @enumToInt(Feature.duplex), .name = @tagName(Feature.duplex), .llvm_name = "duplex", .description = "Enable generation of duplex instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx)] = .{ .index = @enumToInt(Feature.hvx), .name = @tagName(Feature.hvx), .llvm_name = "hvx", .description = "Hexagon HVX instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx_length128b)] = .{ .index = @enumToInt(Feature.hvx_length128b), @@ -114,28 +114,28 @@ pub const all_features = blk: { .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Use constant-extended calls", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mem_noshuf)] = .{ .index = @enumToInt(Feature.mem_noshuf), .name = @tagName(Feature.mem_noshuf), .llvm_name = "mem_noshuf", .description = "Supports mem_noshuf feature", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.memops)] = .{ .index = @enumToInt(Feature.memops), .name = @tagName(Feature.memops), .llvm_name = "memops", .description = "Use memop instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noreturn_stack_elim)] = .{ .index = @enumToInt(Feature.noreturn_stack_elim), .name = @tagName(Feature.noreturn_stack_elim), .llvm_name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nvj)] = .{ .index = @enumToInt(Feature.nvj), @@ -160,70 +160,70 @@ pub const all_features = blk: { .name = @tagName(Feature.packets), .llvm_name = "packets", .description = "Support for instruction packets", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserved_r19)] = .{ .index = @enumToInt(Feature.reserved_r19), .name = @tagName(Feature.reserved_r19), .llvm_name = "reserved-r19", .description = "Reserve register R19", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.small_data)] = .{ .index = @enumToInt(Feature.small_data), .name = @tagName(Feature.small_data), .llvm_name = "small-data", .description = "Allow GP-relative addressing of global variables", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5)] = .{ .index = @enumToInt(Feature.v5), .name = @tagName(Feature.v5), .llvm_name = "v5", .description = "Enable Hexagon V5 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v55)] = .{ .index = @enumToInt(Feature.v55), .name = @tagName(Feature.v55), .llvm_name = "v55", .description = "Enable Hexagon V55 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v60)] = .{ .index = @enumToInt(Feature.v60), .name = @tagName(Feature.v60), .llvm_name = "v60", .description = "Enable Hexagon V60 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v62)] = .{ .index = @enumToInt(Feature.v62), .name = @tagName(Feature.v62), .llvm_name = "v62", .description = "Enable Hexagon V62 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v65)] = .{ .index = @enumToInt(Feature.v65), .name = @tagName(Feature.v65), .llvm_name = "v65", .description = "Enable Hexagon V65 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v66)] = .{ .index = @enumToInt(Feature.v66), .name = @tagName(Feature.v66), .llvm_name = "v66", .description = "Enable Hexagon V66 architecture", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zreg)] = .{ .index = @enumToInt(Feature.zreg), .name = @tagName(Feature.zreg), .llvm_name = "zreg", .description = "Hexagon ZReg extension instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index d4f9df4fbbbad855eb2521839e89f61c4214346a..19ea4d70091fa6c6f809abc362f2cf2f25a57a47 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -57,14 +57,14 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.abs2008)] = .{ .index = @enumToInt(Feature.abs2008), .name = @tagName(Feature.abs2008), .llvm_name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cnmips)] = .{ .index = @enumToInt(Feature.cnmips), @@ -80,14 +80,14 @@ pub const all_features = blk: { .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Mips R6 CRC ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dsp)] = .{ .index = @enumToInt(Feature.dsp), .name = @tagName(Feature.dsp), .llvm_name = "dsp", .description = "Mips DSP ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dspr2)] = .{ .index = @enumToInt(Feature.dspr2), @@ -113,63 +113,63 @@ pub const all_features = blk: { .name = @tagName(Feature.eva), .llvm_name = "eva", .description = "Mips EVA ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ .index = @enumToInt(Feature.fp64), .name = @tagName(Feature.fp64), .llvm_name = "fp64", .description = "Support 64-bit FP registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpxx)] = .{ .index = @enumToInt(Feature.fpxx), .name = @tagName(Feature.fpxx), .llvm_name = "fpxx", .description = "Support for FPXX", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ginv)] = .{ .index = @enumToInt(Feature.ginv), .name = @tagName(Feature.ginv), .llvm_name = "ginv", .description = "Mips Global Invalidate ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gp64)] = .{ .index = @enumToInt(Feature.gp64), .name = @tagName(Feature.gp64), .llvm_name = "gp64", .description = "General Purpose Registers are 64-bit wide", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ .index = @enumToInt(Feature.long_calls), .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Disable use of the jal instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.micromips)] = .{ .index = @enumToInt(Feature.micromips), .name = @tagName(Feature.micromips), .llvm_name = "micromips", .description = "microMips mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips1)] = .{ .index = @enumToInt(Feature.mips1), .name = @tagName(Feature.mips1), .llvm_name = "mips1", .description = "Mips I ISA Support [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips16)] = .{ .index = @enumToInt(Feature.mips16), .name = @tagName(Feature.mips16), .llvm_name = "mips16", .description = "Mips16 mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips2)] = .{ .index = @enumToInt(Feature.mips2), @@ -251,14 +251,14 @@ pub const all_features = blk: { .name = @tagName(Feature.mips3_32), .llvm_name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips3_32r2)] = .{ .index = @enumToInt(Feature.mips3_32r2), .name = @tagName(Feature.mips3_32r2), .llvm_name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4)] = .{ .index = @enumToInt(Feature.mips4), @@ -276,14 +276,14 @@ pub const all_features = blk: { .name = @tagName(Feature.mips4_32), .llvm_name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4_32r2)] = .{ .index = @enumToInt(Feature.mips4_32r2), .name = @tagName(Feature.mips4_32r2), .llvm_name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips5)] = .{ .index = @enumToInt(Feature.mips5), @@ -300,7 +300,7 @@ pub const all_features = blk: { .name = @tagName(Feature.mips5_32r2), .llvm_name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips64)] = .{ .index = @enumToInt(Feature.mips64), @@ -359,42 +359,42 @@ pub const all_features = blk: { .name = @tagName(Feature.msa), .llvm_name = "msa", .description = "Mips MSA ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mt)] = .{ .index = @enumToInt(Feature.mt), .name = @tagName(Feature.mt), .llvm_name = "mt", .description = "Mips MT ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nan2008)] = .{ .index = @enumToInt(Feature.nan2008), .name = @tagName(Feature.nan2008), .llvm_name = "nan2008", .description = "IEEE 754-2008 NaN encoding", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noabicalls)] = .{ .index = @enumToInt(Feature.noabicalls), .name = @tagName(Feature.noabicalls), .llvm_name = "noabicalls", .description = "Disable SVR4-style position-independent code", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nomadd4)] = .{ .index = @enumToInt(Feature.nomadd4), .name = @tagName(Feature.nomadd4), .llvm_name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nooddspreg)] = .{ .index = @enumToInt(Feature.nooddspreg), .name = @tagName(Feature.nooddspreg), .llvm_name = "nooddspreg", .description = "Disable odd numbered single-precision registers", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.p5600)] = .{ .index = @enumToInt(Feature.p5600), @@ -410,56 +410,56 @@ pub const all_features = blk: { .name = @tagName(Feature.ptr64), .llvm_name = "ptr64", .description = "Pointers are 64-bit wide", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.single_float)] = .{ .index = @enumToInt(Feature.single_float), .name = @tagName(Feature.single_float), .llvm_name = "single-float", .description = "Only supports single precision float", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .index = @enumToInt(Feature.soft_float), .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Does not support floating point instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sym32)] = .{ .index = @enumToInt(Feature.sym32), .name = @tagName(Feature.sym32), .llvm_name = "sym32", .description = "Symbols are 32 bit on Mips64", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{ .index = @enumToInt(Feature.use_indirect_jump_hazard), .name = @tagName(Feature.use_indirect_jump_hazard), .llvm_name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_tcc_in_div)] = .{ .index = @enumToInt(Feature.use_tcc_in_div), .name = @tagName(Feature.use_tcc_in_div), .llvm_name = "use-tcc-in-div", .description = "Force the assembler to use trapping", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vfpu)] = .{ .index = @enumToInt(Feature.vfpu), .name = @tagName(Feature.vfpu), .llvm_name = "vfpu", .description = "Enable vector FPU instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.virt)] = .{ .index = @enumToInt(Feature.virt), .name = @tagName(Feature.virt), .llvm_name = "virt", .description = "Mips Virtualization ASE", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 21d6a8211d0ac5051bb79c3725ed8e949b867069..9bc184d4da59c7237f624e8afc0a4b9edab87b3d 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -12,35 +12,35 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.ext)] = .{ .index = @enumToInt(Feature.ext), .name = @tagName(Feature.ext), .llvm_name = "ext", .description = "Enable MSP430-X extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult16)] = .{ .index = @enumToInt(Feature.hwmult16), .name = @tagName(Feature.hwmult16), .llvm_name = "hwmult16", .description = "Enable 16-bit hardware multiplier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult32)] = .{ .index = @enumToInt(Feature.hwmult32), .name = @tagName(Feature.hwmult32), .llvm_name = "hwmult32", .description = "Enable 32-bit hardware multiplier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmultf5)] = .{ .index = @enumToInt(Feature.hwmultf5), .name = @tagName(Feature.hwmultf5), .llvm_name = "hwmultf5", .description = "Enable F5 series hardware multiplier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -49,12 +49,12 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const msp430 = Cpu{ .name = "msp430", .llvm_name = "msp430", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const msp430x = Cpu{ .name = "msp430x", diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index d277785aff9f49930d146c6918a0a2e899973ad3..3cc4f18a14ec823db6beda228ae04ac97c649d7c 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -33,182 +33,182 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.ptx32)] = .{ .index = @enumToInt(Feature.ptx32), .name = @tagName(Feature.ptx32), .llvm_name = "ptx32", .description = "Use PTX version 3.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx40)] = .{ .index = @enumToInt(Feature.ptx40), .name = @tagName(Feature.ptx40), .llvm_name = "ptx40", .description = "Use PTX version 4.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx41)] = .{ .index = @enumToInt(Feature.ptx41), .name = @tagName(Feature.ptx41), .llvm_name = "ptx41", .description = "Use PTX version 4.1", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx42)] = .{ .index = @enumToInt(Feature.ptx42), .name = @tagName(Feature.ptx42), .llvm_name = "ptx42", .description = "Use PTX version 4.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx43)] = .{ .index = @enumToInt(Feature.ptx43), .name = @tagName(Feature.ptx43), .llvm_name = "ptx43", .description = "Use PTX version 4.3", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx50)] = .{ .index = @enumToInt(Feature.ptx50), .name = @tagName(Feature.ptx50), .llvm_name = "ptx50", .description = "Use PTX version 5.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx60)] = .{ .index = @enumToInt(Feature.ptx60), .name = @tagName(Feature.ptx60), .llvm_name = "ptx60", .description = "Use PTX version 6.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx61)] = .{ .index = @enumToInt(Feature.ptx61), .name = @tagName(Feature.ptx61), .llvm_name = "ptx61", .description = "Use PTX version 6.1", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx63)] = .{ .index = @enumToInt(Feature.ptx63), .name = @tagName(Feature.ptx63), .llvm_name = "ptx63", .description = "Use PTX version 6.3", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx64)] = .{ .index = @enumToInt(Feature.ptx64), .name = @tagName(Feature.ptx64), .llvm_name = "ptx64", .description = "Use PTX version 6.4", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_20)] = .{ .index = @enumToInt(Feature.sm_20), .name = @tagName(Feature.sm_20), .llvm_name = "sm_20", .description = "Target SM 2.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_21)] = .{ .index = @enumToInt(Feature.sm_21), .name = @tagName(Feature.sm_21), .llvm_name = "sm_21", .description = "Target SM 2.1", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_30)] = .{ .index = @enumToInt(Feature.sm_30), .name = @tagName(Feature.sm_30), .llvm_name = "sm_30", .description = "Target SM 3.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_32)] = .{ .index = @enumToInt(Feature.sm_32), .name = @tagName(Feature.sm_32), .llvm_name = "sm_32", .description = "Target SM 3.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_35)] = .{ .index = @enumToInt(Feature.sm_35), .name = @tagName(Feature.sm_35), .llvm_name = "sm_35", .description = "Target SM 3.5", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_37)] = .{ .index = @enumToInt(Feature.sm_37), .name = @tagName(Feature.sm_37), .llvm_name = "sm_37", .description = "Target SM 3.7", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_50)] = .{ .index = @enumToInt(Feature.sm_50), .name = @tagName(Feature.sm_50), .llvm_name = "sm_50", .description = "Target SM 5.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_52)] = .{ .index = @enumToInt(Feature.sm_52), .name = @tagName(Feature.sm_52), .llvm_name = "sm_52", .description = "Target SM 5.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_53)] = .{ .index = @enumToInt(Feature.sm_53), .name = @tagName(Feature.sm_53), .llvm_name = "sm_53", .description = "Target SM 5.3", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_60)] = .{ .index = @enumToInt(Feature.sm_60), .name = @tagName(Feature.sm_60), .llvm_name = "sm_60", .description = "Target SM 6.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_61)] = .{ .index = @enumToInt(Feature.sm_61), .name = @tagName(Feature.sm_61), .llvm_name = "sm_61", .description = "Target SM 6.1", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_62)] = .{ .index = @enumToInt(Feature.sm_62), .name = @tagName(Feature.sm_62), .llvm_name = "sm_62", .description = "Target SM 6.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_70)] = .{ .index = @enumToInt(Feature.sm_70), .name = @tagName(Feature.sm_70), .llvm_name = "sm_70", .description = "Target SM 7.0", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_72)] = .{ .index = @enumToInt(Feature.sm_72), .name = @tagName(Feature.sm_72), .llvm_name = "sm_72", .description = "Target SM 7.2", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_75)] = .{ .index = @enumToInt(Feature.sm_75), .name = @tagName(Feature.sm_75), .llvm_name = "sm_75", .description = "Target SM 7.5", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index bac15f231af1a9fe8f6bb761566c380ad62e3d2a..3dfc2d7beabab54681eba11d24e09434d655ce45 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -59,21 +59,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ .index = @enumToInt(Feature.@"64bit"), .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Enable 64-bit instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"64bitregs")] = .{ .index = @enumToInt(Feature.@"64bitregs"), .name = @tagName(Feature.@"64bitregs"), .llvm_name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altivec)] = .{ .index = @enumToInt(Feature.altivec), @@ -98,21 +98,21 @@ pub const all_features = blk: { .name = @tagName(Feature.bpermd), .llvm_name = "bpermd", .description = "Enable the bpermd instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmpb)] = .{ .index = @enumToInt(Feature.cmpb), .name = @tagName(Feature.cmpb), .llvm_name = "cmpb", .description = "Enable the cmpb instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crbits)] = .{ .index = @enumToInt(Feature.crbits), .name = @tagName(Feature.crbits), .llvm_name = "crbits", .description = "Use condition-register bits individually", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .index = @enumToInt(Feature.crypto), @@ -137,14 +137,14 @@ pub const all_features = blk: { .name = @tagName(Feature.e500), .llvm_name = "e500", .description = "Enable E500/E500mc instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.extdiv)] = .{ .index = @enumToInt(Feature.extdiv), .name = @tagName(Feature.extdiv), .llvm_name = "extdiv", .description = "Enable extended divide instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fcpsgn)] = .{ .index = @enumToInt(Feature.fcpsgn), @@ -241,49 +241,49 @@ pub const all_features = blk: { .name = @tagName(Feature.hard_float), .llvm_name = "hard-float", .description = "Enable floating-point instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.htm)] = .{ .index = @enumToInt(Feature.htm), .name = @tagName(Feature.htm), .llvm_name = "htm", .description = "Enable Hardware Transactional Memory instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.icbt)] = .{ .index = @enumToInt(Feature.icbt), .name = @tagName(Feature.icbt), .llvm_name = "icbt", .description = "Enable icbt instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invariant_function_descriptors)] = .{ .index = @enumToInt(Feature.invariant_function_descriptors), .name = @tagName(Feature.invariant_function_descriptors), .llvm_name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isa_v30_instructions)] = .{ .index = @enumToInt(Feature.isa_v30_instructions), .name = @tagName(Feature.isa_v30_instructions), .llvm_name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isel)] = .{ .index = @enumToInt(Feature.isel), .name = @tagName(Feature.isel), .llvm_name = "isel", .description = "Enable the isel instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldbrx)] = .{ .index = @enumToInt(Feature.ldbrx), .name = @tagName(Feature.ldbrx), .llvm_name = "ldbrx", .description = "Enable the ldbrx instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lfiwax)] = .{ .index = @enumToInt(Feature.lfiwax), @@ -299,14 +299,14 @@ pub const all_features = blk: { .name = @tagName(Feature.longcall), .llvm_name = "longcall", .description = "Always use indirect calls", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mfocrf)] = .{ .index = @enumToInt(Feature.mfocrf), .name = @tagName(Feature.mfocrf), .llvm_name = "mfocrf", .description = "Enable the MFOCRF instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.msync)] = .{ .index = @enumToInt(Feature.msync), @@ -322,14 +322,14 @@ pub const all_features = blk: { .name = @tagName(Feature.partword_atomics), .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcntd)] = .{ .index = @enumToInt(Feature.popcntd), .name = @tagName(Feature.popcntd), .llvm_name = "popcntd", .description = "Enable the popcnt[dw] instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.power8_altivec)] = .{ .index = @enumToInt(Feature.power8_altivec), @@ -376,28 +376,28 @@ pub const all_features = blk: { .name = @tagName(Feature.ppc_postra_sched), .llvm_name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc_prera_sched)] = .{ .index = @enumToInt(Feature.ppc_prera_sched), .name = @tagName(Feature.ppc_prera_sched), .llvm_name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc4xx)] = .{ .index = @enumToInt(Feature.ppc4xx), .name = @tagName(Feature.ppc4xx), .llvm_name = "ppc4xx", .description = "Enable PPC 4xx instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc6xx)] = .{ .index = @enumToInt(Feature.ppc6xx), .name = @tagName(Feature.ppc6xx), .llvm_name = "ppc6xx", .description = "Enable PPC 6xx instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.qpx)] = .{ .index = @enumToInt(Feature.qpx), @@ -413,21 +413,21 @@ pub const all_features = blk: { .name = @tagName(Feature.recipprec), .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.secure_plt)] = .{ .index = @enumToInt(Feature.secure_plt), .name = @tagName(Feature.secure_plt), .llvm_name = "secure-plt", .description = "Enable secure plt mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_popcntd)] = .{ .index = @enumToInt(Feature.slow_popcntd), .name = @tagName(Feature.slow_popcntd), .llvm_name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spe)] = .{ .index = @enumToInt(Feature.spe), @@ -452,14 +452,14 @@ pub const all_features = blk: { .name = @tagName(Feature.two_const_nr), .llvm_name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vectors_use_two_units)] = .{ .index = @enumToInt(Feature.vectors_use_two_units), .name = @tagName(Feature.vectors_use_two_units), .llvm_name = "vectors-use-two-units", .description = "Vectors use two units", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vsx)] = .{ .index = @enumToInt(Feature.vsx), @@ -475,7 +475,7 @@ pub const all_features = blk: { pub const cpu = struct { pub const @"440" = Cpu{ - .name = "@"440"", + .name = "440", .llvm_name = "440", .features = featureSet(&[_]Feature{ .booke, @@ -487,7 +487,7 @@ pub const cpu = struct { }), }; pub const @"450" = Cpu{ - .name = "@"450"", + .name = "450", .llvm_name = "450", .features = featureSet(&[_]Feature{ .booke, @@ -499,21 +499,21 @@ pub const cpu = struct { }), }; pub const @"601" = Cpu{ - .name = "@"601"", + .name = "601", .llvm_name = "601", .features = featureSet(&[_]Feature{ .fpu, }), }; pub const @"602" = Cpu{ - .name = "@"602"", + .name = "602", .llvm_name = "602", .features = featureSet(&[_]Feature{ .fpu, }), }; pub const @"603" = Cpu{ - .name = "@"603"", + .name = "603", .llvm_name = "603", .features = featureSet(&[_]Feature{ .fres, @@ -521,7 +521,7 @@ pub const cpu = struct { }), }; pub const @"603e" = Cpu{ - .name = "@"603e"", + .name = "603e", .llvm_name = "603e", .features = featureSet(&[_]Feature{ .fres, @@ -529,7 +529,7 @@ pub const cpu = struct { }), }; pub const @"603ev" = Cpu{ - .name = "@"603ev"", + .name = "603ev", .llvm_name = "603ev", .features = featureSet(&[_]Feature{ .fres, @@ -537,7 +537,7 @@ pub const cpu = struct { }), }; pub const @"604" = Cpu{ - .name = "@"604"", + .name = "604", .llvm_name = "604", .features = featureSet(&[_]Feature{ .fres, @@ -545,7 +545,7 @@ pub const cpu = struct { }), }; pub const @"604e" = Cpu{ - .name = "@"604e"", + .name = "604e", .llvm_name = "604e", .features = featureSet(&[_]Feature{ .fres, @@ -553,7 +553,7 @@ pub const cpu = struct { }), }; pub const @"620" = Cpu{ - .name = "@"620"", + .name = "620", .llvm_name = "620", .features = featureSet(&[_]Feature{ .fres, @@ -561,7 +561,7 @@ pub const cpu = struct { }), }; pub const @"7400" = Cpu{ - .name = "@"7400"", + .name = "7400", .llvm_name = "7400", .features = featureSet(&[_]Feature{ .altivec, @@ -570,7 +570,7 @@ pub const cpu = struct { }), }; pub const @"7450" = Cpu{ - .name = "@"7450"", + .name = "7450", .llvm_name = "7450", .features = featureSet(&[_]Feature{ .altivec, @@ -579,7 +579,7 @@ pub const cpu = struct { }), }; pub const @"750" = Cpu{ - .name = "@"750"", + .name = "750", .llvm_name = "750", .features = featureSet(&[_]Feature{ .fres, @@ -587,7 +587,7 @@ pub const cpu = struct { }), }; pub const @"970" = Cpu{ - .name = "@"970"", + .name = "970", .llvm_name = "970", .features = featureSet(&[_]Feature{ .@"64bit", @@ -698,7 +698,7 @@ pub const cpu = struct { .frsqrte, }), }; - pub const g4+ = Cpu{ + pub const @"g4+" = Cpu{ .name = "g4+", .llvm_name = "g4+", .features = featureSet(&[_]Feature{ @@ -1016,7 +1016,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.e5500, &cpu.g3, &cpu.g4, - &cpu.g4+, + &cpu.@"g4+", &cpu.g5, &cpu.generic, &cpu.ppc, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index dbe36e0fa1d53a060e7195b5fd1eb4d138c428e9..ee0d6509df370baf3a10dfcb11c0519a92eceb21 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -16,28 +16,28 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ .index = @enumToInt(Feature.@"64bit"), .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Implements RV64", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a)] = .{ .index = @enumToInt(Feature.a), .name = @tagName(Feature.a), .llvm_name = "a", .description = "'A' (Atomic Instructions)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.c)] = .{ .index = @enumToInt(Feature.c), .name = @tagName(Feature.c), .llvm_name = "c", .description = "'C' (Compressed Instructions)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.d)] = .{ .index = @enumToInt(Feature.d), @@ -53,28 +53,28 @@ pub const all_features = blk: { .name = @tagName(Feature.e), .llvm_name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f)] = .{ .index = @enumToInt(Feature.f), .name = @tagName(Feature.f), .llvm_name = "f", .description = "'F' (Single-Precision Floating-Point)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m)] = .{ .index = @enumToInt(Feature.m), .name = @tagName(Feature.m), .llvm_name = "m", .description = "'M' (Integer Multiplication and Division)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.relax)] = .{ .index = @enumToInt(Feature.relax), .name = @tagName(Feature.relax), .llvm_name = "relax", .description = "Enable Linker relaxation.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -83,7 +83,7 @@ pub const cpu = struct { pub const generic_rv32 = Cpu{ .name = "generic_rv32", .llvm_name = "generic-rv32", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const generic_rv64 = Cpu{ .name = "generic_rv64", diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index 6b1787f31f8b2e82137e42d9f14a5f5183d070fc..da7649e8316bd6458d342b4f9a6631affc7ab62b 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -27,140 +27,140 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.deprecated_v8)] = .{ .index = @enumToInt(Feature.deprecated_v8), .name = @tagName(Feature.deprecated_v8), .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.detectroundchange)] = .{ .index = @enumToInt(Feature.detectroundchange), .name = @tagName(Feature.detectroundchange), .llvm_name = "detectroundchange", .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fixallfdivsqrt)] = .{ .index = @enumToInt(Feature.fixallfdivsqrt), .name = @tagName(Feature.fixallfdivsqrt), .llvm_name = "fixallfdivsqrt", .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hard_quad_float)] = .{ .index = @enumToInt(Feature.hard_quad_float), .name = @tagName(Feature.hard_quad_float), .llvm_name = "hard-quad-float", .description = "Enable quad-word floating point instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasleoncasa)] = .{ .index = @enumToInt(Feature.hasleoncasa), .name = @tagName(Feature.hasleoncasa), .llvm_name = "hasleoncasa", .description = "Enable CASA instruction for LEON3 and LEON4 processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasumacsmac)] = .{ .index = @enumToInt(Feature.hasumacsmac), .name = @tagName(Feature.hasumacsmac), .llvm_name = "hasumacsmac", .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insertnopload)] = .{ .index = @enumToInt(Feature.insertnopload), .name = @tagName(Feature.insertnopload), .llvm_name = "insertnopload", .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leon)] = .{ .index = @enumToInt(Feature.leon), .name = @tagName(Feature.leon), .llvm_name = "leon", .description = "Enable LEON extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leoncyclecounter)] = .{ .index = @enumToInt(Feature.leoncyclecounter), .name = @tagName(Feature.leoncyclecounter), .llvm_name = "leoncyclecounter", .description = "Use the Leon cycle counter register", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leonpwrpsr)] = .{ .index = @enumToInt(Feature.leonpwrpsr), .name = @tagName(Feature.leonpwrpsr), .llvm_name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fmuls)] = .{ .index = @enumToInt(Feature.no_fmuls), .name = @tagName(Feature.no_fmuls), .llvm_name = "no-fmuls", .description = "Disable the fmuls instruction.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fsmuld)] = .{ .index = @enumToInt(Feature.no_fsmuld), .name = @tagName(Feature.no_fsmuld), .llvm_name = "no-fsmuld", .description = "Disable the fsmuld instruction.", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popc)] = .{ .index = @enumToInt(Feature.popc), .name = @tagName(Feature.popc), .llvm_name = "popc", .description = "Use the popc (population count) instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .index = @enumToInt(Feature.soft_float), .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software emulation for floating point", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_mul_div)] = .{ .index = @enumToInt(Feature.soft_mul_div), .name = @tagName(Feature.soft_mul_div), .llvm_name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v9)] = .{ .index = @enumToInt(Feature.v9), .name = @tagName(Feature.v9), .llvm_name = "v9", .description = "Enable SPARC-V9 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis)] = .{ .index = @enumToInt(Feature.vis), .name = @tagName(Feature.vis), .llvm_name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis2)] = .{ .index = @enumToInt(Feature.vis2), .name = @tagName(Feature.vis2), .llvm_name = "vis2", .description = "Enable Visual Instruction Set extensions II", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis3)] = .{ .index = @enumToInt(Feature.vis3), .name = @tagName(Feature.vis3), .llvm_name = "vis3", .description = "Enable Visual Instruction Set extensions III", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -185,12 +185,12 @@ pub const cpu = struct { pub const f934 = Cpu{ .name = "f934", .llvm_name = "f934", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const gr712rc = Cpu{ .name = "gr712rc", @@ -214,7 +214,7 @@ pub const cpu = struct { pub const hypersparc = Cpu{ .name = "hypersparc", .llvm_name = "hypersparc", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const leon2 = Cpu{ .name = "leon2", @@ -407,27 +407,27 @@ pub const cpu = struct { pub const sparclet = Cpu{ .name = "sparclet", .llvm_name = "sparclet", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const sparclite = Cpu{ .name = "sparclite", .llvm_name = "sparclite", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const sparclite86x = Cpu{ .name = "sparclite86x", .llvm_name = "sparclite86x", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const supersparc = Cpu{ .name = "supersparc", .llvm_name = "supersparc", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const tsc701 = Cpu{ .name = "tsc701", .llvm_name = "tsc701", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const ultrasparc = Cpu{ .name = "ultrasparc", @@ -470,7 +470,7 @@ pub const cpu = struct { pub const v8 = Cpu{ .name = "v8", .llvm_name = "v8", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const v9 = Cpu{ .name = "v9", diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 3479ebf7b4fa1fe1f0cc2e8343f67bfb1f9e7e82..aaee832c28a8b7db4be08b822970f081e0e9cad1 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -43,252 +43,252 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.deflate_conversion)] = .{ .index = @enumToInt(Feature.deflate_conversion), .name = @tagName(Feature.deflate_conversion), .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_packed_conversion)] = .{ .index = @enumToInt(Feature.dfp_packed_conversion), .name = @tagName(Feature.dfp_packed_conversion), .llvm_name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_zoned_conversion)] = .{ .index = @enumToInt(Feature.dfp_zoned_conversion), .name = @tagName(Feature.dfp_zoned_conversion), .llvm_name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.distinct_ops)] = .{ .index = @enumToInt(Feature.distinct_ops), .name = @tagName(Feature.distinct_ops), .llvm_name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_dat_2)] = .{ .index = @enumToInt(Feature.enhanced_dat_2), .name = @tagName(Feature.enhanced_dat_2), .llvm_name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_sort)] = .{ .index = @enumToInt(Feature.enhanced_sort), .name = @tagName(Feature.enhanced_sort), .llvm_name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execution_hint)] = .{ .index = @enumToInt(Feature.execution_hint), .name = @tagName(Feature.execution_hint), .llvm_name = "execution-hint", .description = "Assume that the execution-hint facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_serialization)] = .{ .index = @enumToInt(Feature.fast_serialization), .name = @tagName(Feature.fast_serialization), .llvm_name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_extension)] = .{ .index = @enumToInt(Feature.fp_extension), .name = @tagName(Feature.fp_extension), .llvm_name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.guarded_storage)] = .{ .index = @enumToInt(Feature.guarded_storage), .name = @tagName(Feature.guarded_storage), .llvm_name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.high_word)] = .{ .index = @enumToInt(Feature.high_word), .name = @tagName(Feature.high_word), .llvm_name = "high-word", .description = "Assume that the high-word facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{ .index = @enumToInt(Feature.insert_reference_bits_multiple), .name = @tagName(Feature.insert_reference_bits_multiple), .llvm_name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.interlocked_access1)] = .{ .index = @enumToInt(Feature.interlocked_access1), .name = @tagName(Feature.interlocked_access1), .llvm_name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_trap)] = .{ .index = @enumToInt(Feature.load_and_trap), .name = @tagName(Feature.load_and_trap), .llvm_name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{ .index = @enumToInt(Feature.load_and_zero_rightmost_byte), .name = @tagName(Feature.load_and_zero_rightmost_byte), .llvm_name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond)] = .{ .index = @enumToInt(Feature.load_store_on_cond), .name = @tagName(Feature.load_store_on_cond), .llvm_name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond_2)] = .{ .index = @enumToInt(Feature.load_store_on_cond_2), .name = @tagName(Feature.load_store_on_cond_2), .llvm_name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension3)] = .{ .index = @enumToInt(Feature.message_security_assist_extension3), .name = @tagName(Feature.message_security_assist_extension3), .llvm_name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension4)] = .{ .index = @enumToInt(Feature.message_security_assist_extension4), .name = @tagName(Feature.message_security_assist_extension4), .llvm_name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension5)] = .{ .index = @enumToInt(Feature.message_security_assist_extension5), .name = @tagName(Feature.message_security_assist_extension5), .llvm_name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension7)] = .{ .index = @enumToInt(Feature.message_security_assist_extension7), .name = @tagName(Feature.message_security_assist_extension7), .llvm_name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension8)] = .{ .index = @enumToInt(Feature.message_security_assist_extension8), .name = @tagName(Feature.message_security_assist_extension8), .llvm_name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension9)] = .{ .index = @enumToInt(Feature.message_security_assist_extension9), .name = @tagName(Feature.message_security_assist_extension9), .llvm_name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions)] = .{ .index = @enumToInt(Feature.miscellaneous_extensions), .name = @tagName(Feature.miscellaneous_extensions), .llvm_name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{ .index = @enumToInt(Feature.miscellaneous_extensions_2), .name = @tagName(Feature.miscellaneous_extensions_2), .llvm_name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{ .index = @enumToInt(Feature.miscellaneous_extensions_3), .name = @tagName(Feature.miscellaneous_extensions_3), .llvm_name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.population_count)] = .{ .index = @enumToInt(Feature.population_count), .name = @tagName(Feature.population_count), .llvm_name = "population-count", .description = "Assume that the population-count facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.processor_assist)] = .{ .index = @enumToInt(Feature.processor_assist), .name = @tagName(Feature.processor_assist), .llvm_name = "processor-assist", .description = "Assume that the processor-assist facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{ .index = @enumToInt(Feature.reset_reference_bits_multiple), .name = @tagName(Feature.reset_reference_bits_multiple), .llvm_name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.transactional_execution)] = .{ .index = @enumToInt(Feature.transactional_execution), .name = @tagName(Feature.transactional_execution), .llvm_name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector)] = .{ .index = @enumToInt(Feature.vector), .name = @tagName(Feature.vector), .llvm_name = "vector", .description = "Assume that the vectory facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_1)] = .{ .index = @enumToInt(Feature.vector_enhancements_1), .name = @tagName(Feature.vector_enhancements_1), .llvm_name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_2)] = .{ .index = @enumToInt(Feature.vector_enhancements_2), .name = @tagName(Feature.vector_enhancements_2), .llvm_name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal)] = .{ .index = @enumToInt(Feature.vector_packed_decimal), .name = @tagName(Feature.vector_packed_decimal), .llvm_name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{ .index = @enumToInt(Feature.vector_packed_decimal_enhancement), .name = @tagName(Feature.vector_packed_decimal_enhancement), .llvm_name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -424,7 +424,7 @@ pub const cpu = struct { pub const arch8 = Cpu{ .name = "arch8", .llvm_name = "arch8", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const arch9 = Cpu{ .name = "arch9", @@ -445,12 +445,12 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const z10 = Cpu{ .name = "z10", .llvm_name = "z10", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const z13 = Cpu{ .name = "z13", diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 8546b067dd2dcd2adff538b18402fd20656e3b70..3df17d503b4a38d896f29a0d49baade17fd9bad2 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -18,70 +18,70 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.atomics)] = .{ .index = @enumToInt(Feature.atomics), .name = @tagName(Feature.atomics), .llvm_name = "atomics", .description = "Enable Atomics", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bulk_memory)] = .{ .index = @enumToInt(Feature.bulk_memory), .name = @tagName(Feature.bulk_memory), .llvm_name = "bulk-memory", .description = "Enable bulk memory operations", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exception_handling)] = .{ .index = @enumToInt(Feature.exception_handling), .name = @tagName(Feature.exception_handling), .llvm_name = "exception-handling", .description = "Enable Wasm exception handling", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.multivalue)] = .{ .index = @enumToInt(Feature.multivalue), .name = @tagName(Feature.multivalue), .llvm_name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mutable_globals)] = .{ .index = @enumToInt(Feature.mutable_globals), .name = @tagName(Feature.mutable_globals), .llvm_name = "mutable-globals", .description = "Enable mutable globals", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nontrapping_fptoint)] = .{ .index = @enumToInt(Feature.nontrapping_fptoint), .name = @tagName(Feature.nontrapping_fptoint), .llvm_name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sign_ext)] = .{ .index = @enumToInt(Feature.sign_ext), .name = @tagName(Feature.sign_ext), .llvm_name = "sign-ext", .description = "Enable sign extension operators", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.simd128)] = .{ .index = @enumToInt(Feature.simd128), .name = @tagName(Feature.simd128), .llvm_name = "simd128", .description = "Enable 128-bit SIMD", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tail_call)] = .{ .index = @enumToInt(Feature.tail_call), .name = @tagName(Feature.tail_call), .llvm_name = "tail-call", .description = "Enable tail call instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unimplemented_simd128)] = .{ .index = @enumToInt(Feature.unimplemented_simd128), @@ -110,12 +110,12 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const mvp = Cpu{ .name = "mvp", .llvm_name = "mvp", - .features = 0, + .features = featureSet(&[_]Feature{}), }; }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 9d3b57440125b4b76f0cb992363134f619805d51..7f1ec42dab0e5581243687cfce5e75751d1243b5 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -132,21 +132,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits); + std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"16bit_mode")] = .{ .index = @enumToInt(Feature.@"16bit_mode"), .name = @tagName(Feature.@"16bit_mode"), .llvm_name = "16bit-mode", .description = "16-bit mode (i8086)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"32bit_mode")] = .{ .index = @enumToInt(Feature.@"32bit_mode"), .name = @tagName(Feature.@"32bit_mode"), .llvm_name = "32bit-mode", .description = "32-bit mode (80386)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"3dnow")] = .{ .index = @enumToInt(Feature.@"3dnow"), @@ -171,21 +171,21 @@ pub const all_features = blk: { .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Support 64-bit instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"64bit_mode")] = .{ .index = @enumToInt(Feature.@"64bit_mode"), .name = @tagName(Feature.@"64bit_mode"), .llvm_name = "64bit-mode", .description = "64-bit mode (x86_64)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.adx)] = .{ .index = @enumToInt(Feature.adx), .name = @tagName(Feature.adx), .llvm_name = "adx", .description = "Support ADX instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ .index = @enumToInt(Feature.aes), @@ -356,56 +356,56 @@ pub const all_features = blk: { .name = @tagName(Feature.bmi), .llvm_name = "bmi", .description = "Support BMI instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bmi2)] = .{ .index = @enumToInt(Feature.bmi2), .name = @tagName(Feature.bmi2), .llvm_name = "bmi2", .description = "Support BMI2 instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.branchfusion)] = .{ .index = @enumToInt(Feature.branchfusion), .name = @tagName(Feature.branchfusion), .llvm_name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cldemote)] = .{ .index = @enumToInt(Feature.cldemote), .name = @tagName(Feature.cldemote), .llvm_name = "cldemote", .description = "Enable Cache Demote", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clflushopt)] = .{ .index = @enumToInt(Feature.clflushopt), .name = @tagName(Feature.clflushopt), .llvm_name = "clflushopt", .description = "Flush A Cache Line Optimized", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clwb)] = .{ .index = @enumToInt(Feature.clwb), .name = @tagName(Feature.clwb), .llvm_name = "clwb", .description = "Cache Line Write Back", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clzero)] = .{ .index = @enumToInt(Feature.clzero), .name = @tagName(Feature.clzero), .llvm_name = "clzero", .description = "Enable Cache Line Zero", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmov)] = .{ .index = @enumToInt(Feature.cmov), .name = @tagName(Feature.cmov), .llvm_name = "cmov", .description = "Enable conditional move instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cx16)] = .{ .index = @enumToInt(Feature.cx16), @@ -421,21 +421,21 @@ pub const all_features = blk: { .name = @tagName(Feature.cx8), .llvm_name = "cx8", .description = "Support CMPXCHG8B instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enqcmd)] = .{ .index = @enumToInt(Feature.enqcmd), .name = @tagName(Feature.enqcmd), .llvm_name = "enqcmd", .description = "Has ENQCMD instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ermsb)] = .{ .index = @enumToInt(Feature.ermsb), .name = @tagName(Feature.ermsb), .llvm_name = "ermsb", .description = "REP MOVS/STOS are fast", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f16c)] = .{ .index = @enumToInt(Feature.f16c), @@ -451,42 +451,42 @@ pub const all_features = blk: { .name = @tagName(Feature.false_deps_lzcnt_tzcnt), .llvm_name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.false_deps_popcnt)] = .{ .index = @enumToInt(Feature.false_deps_popcnt), .name = @tagName(Feature.false_deps_popcnt), .llvm_name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_11bytenop)] = .{ .index = @enumToInt(Feature.fast_11bytenop), .name = @tagName(Feature.fast_11bytenop), .llvm_name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_15bytenop)] = .{ .index = @enumToInt(Feature.fast_15bytenop), .name = @tagName(Feature.fast_15bytenop), .llvm_name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_bextr)] = .{ .index = @enumToInt(Feature.fast_bextr), .name = @tagName(Feature.fast_bextr), .llvm_name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_gather)] = .{ .index = @enumToInt(Feature.fast_gather), .name = @tagName(Feature.fast_gather), .llvm_name = "fast-gather", .description = "Indicates if gather is reasonably fast", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_hops)] = .{ .index = @enumToInt(Feature.fast_hops), @@ -502,56 +502,56 @@ pub const all_features = blk: { .name = @tagName(Feature.fast_lzcnt), .llvm_name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{ .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write), .name = @tagName(Feature.fast_partial_ymm_or_zmm_write), .llvm_name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{ .index = @enumToInt(Feature.fast_scalar_fsqrt), .name = @tagName(Feature.fast_scalar_fsqrt), .llvm_name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{ .index = @enumToInt(Feature.fast_scalar_shift_masks), .name = @tagName(Feature.fast_scalar_shift_masks), .llvm_name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_shld_rotate)] = .{ .index = @enumToInt(Feature.fast_shld_rotate), .name = @tagName(Feature.fast_shld_rotate), .llvm_name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_variable_shuffle)] = .{ .index = @enumToInt(Feature.fast_variable_shuffle), .name = @tagName(Feature.fast_variable_shuffle), .llvm_name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_fsqrt)] = .{ .index = @enumToInt(Feature.fast_vector_fsqrt), .name = @tagName(Feature.fast_vector_fsqrt), .llvm_name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_shift_masks)] = .{ .index = @enumToInt(Feature.fast_vector_shift_masks), .name = @tagName(Feature.fast_vector_shift_masks), .llvm_name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma)] = .{ .index = @enumToInt(Feature.fma), @@ -577,14 +577,14 @@ pub const all_features = blk: { .name = @tagName(Feature.fsgsbase), .llvm_name = "fsgsbase", .description = "Support FS/GS Base instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fxsr)] = .{ .index = @enumToInt(Feature.fxsr), .name = @tagName(Feature.fxsr), .llvm_name = "fxsr", .description = "Support fxsave/fxrestore instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfni)] = .{ .index = @enumToInt(Feature.gfni), @@ -600,119 +600,119 @@ pub const all_features = blk: { .name = @tagName(Feature.idivl_to_divb), .llvm_name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.idivq_to_divl)] = .{ .index = @enumToInt(Feature.idivq_to_divl), .name = @tagName(Feature.idivq_to_divl), .llvm_name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invpcid)] = .{ .index = @enumToInt(Feature.invpcid), .name = @tagName(Feature.invpcid), .llvm_name = "invpcid", .description = "Invalidate Process-Context Identifier", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_sp)] = .{ .index = @enumToInt(Feature.lea_sp), .name = @tagName(Feature.lea_sp), .llvm_name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_uses_ag)] = .{ .index = @enumToInt(Feature.lea_uses_ag), .name = @tagName(Feature.lea_uses_ag), .llvm_name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lwp)] = .{ .index = @enumToInt(Feature.lwp), .name = @tagName(Feature.lwp), .llvm_name = "lwp", .description = "Enable LWP instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lzcnt)] = .{ .index = @enumToInt(Feature.lzcnt), .name = @tagName(Feature.lzcnt), .llvm_name = "lzcnt", .description = "Support LZCNT instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.macrofusion)] = .{ .index = @enumToInt(Feature.macrofusion), .name = @tagName(Feature.macrofusion), .llvm_name = "macrofusion", .description = "Various instructions can be fused with conditional branches", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ .index = @enumToInt(Feature.merge_to_threeway_branch), .name = @tagName(Feature.merge_to_threeway_branch), .llvm_name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mmx)] = .{ .index = @enumToInt(Feature.mmx), .name = @tagName(Feature.mmx), .llvm_name = "mmx", .description = "Enable MMX instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movbe)] = .{ .index = @enumToInt(Feature.movbe), .name = @tagName(Feature.movbe), .llvm_name = "movbe", .description = "Support MOVBE instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdir64b)] = .{ .index = @enumToInt(Feature.movdir64b), .name = @tagName(Feature.movdir64b), .llvm_name = "movdir64b", .description = "Support movdir64b instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdiri)] = .{ .index = @enumToInt(Feature.movdiri), .name = @tagName(Feature.movdiri), .llvm_name = "movdiri", .description = "Support movdiri instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpx)] = .{ .index = @enumToInt(Feature.mpx), .name = @tagName(Feature.mpx), .llvm_name = "mpx", .description = "Support MPX instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mwaitx)] = .{ .index = @enumToInt(Feature.mwaitx), .name = @tagName(Feature.mwaitx), .llvm_name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nopl)] = .{ .index = @enumToInt(Feature.nopl), .name = @tagName(Feature.nopl), .llvm_name = "nopl", .description = "Enable NOPL instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pad_short_functions)] = .{ .index = @enumToInt(Feature.pad_short_functions), .name = @tagName(Feature.pad_short_functions), .llvm_name = "pad-short-functions", .description = "Pad short functions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pclmul)] = .{ .index = @enumToInt(Feature.pclmul), @@ -728,70 +728,70 @@ pub const all_features = blk: { .name = @tagName(Feature.pconfig), .llvm_name = "pconfig", .description = "platform configuration instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pku)] = .{ .index = @enumToInt(Feature.pku), .name = @tagName(Feature.pku), .llvm_name = "pku", .description = "Enable protection keys", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcnt)] = .{ .index = @enumToInt(Feature.popcnt), .name = @tagName(Feature.popcnt), .llvm_name = "popcnt", .description = "Support POPCNT instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_256_bit)] = .{ .index = @enumToInt(Feature.prefer_256_bit), .name = @tagName(Feature.prefer_256_bit), .llvm_name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefetchwt1)] = .{ .index = @enumToInt(Feature.prefetchwt1), .name = @tagName(Feature.prefetchwt1), .llvm_name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prfchw)] = .{ .index = @enumToInt(Feature.prfchw), .name = @tagName(Feature.prfchw), .llvm_name = "prfchw", .description = "Support PRFCHW instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptwrite)] = .{ .index = @enumToInt(Feature.ptwrite), .name = @tagName(Feature.ptwrite), .llvm_name = "ptwrite", .description = "Support ptwrite instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdpid)] = .{ .index = @enumToInt(Feature.rdpid), .name = @tagName(Feature.rdpid), .llvm_name = "rdpid", .description = "Support RDPID instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdrnd)] = .{ .index = @enumToInt(Feature.rdrnd), .name = @tagName(Feature.rdrnd), .llvm_name = "rdrnd", .description = "Support RDRAND instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdseed)] = .{ .index = @enumToInt(Feature.rdseed), .name = @tagName(Feature.rdseed), .llvm_name = "rdseed", .description = "Support RDSEED instruction", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline)] = .{ .index = @enumToInt(Feature.retpoline), @@ -817,35 +817,35 @@ pub const all_features = blk: { .name = @tagName(Feature.retpoline_indirect_branches), .llvm_name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline_indirect_calls)] = .{ .index = @enumToInt(Feature.retpoline_indirect_calls), .name = @tagName(Feature.retpoline_indirect_calls), .llvm_name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rtm)] = .{ .index = @enumToInt(Feature.rtm), .name = @tagName(Feature.rtm), .llvm_name = "rtm", .description = "Support RTM instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sahf)] = .{ .index = @enumToInt(Feature.sahf), .name = @tagName(Feature.sahf), .llvm_name = "sahf", .description = "Support LAHF and SAHF instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sgx)] = .{ .index = @enumToInt(Feature.sgx), .name = @tagName(Feature.sgx), .llvm_name = "sgx", .description = "Enable Software Guard Extensions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha)] = .{ .index = @enumToInt(Feature.sha), @@ -861,91 +861,91 @@ pub const all_features = blk: { .name = @tagName(Feature.shstk), .llvm_name = "shstk", .description = "Support CET Shadow-Stack instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_3ops_lea)] = .{ .index = @enumToInt(Feature.slow_3ops_lea), .name = @tagName(Feature.slow_3ops_lea), .llvm_name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_incdec)] = .{ .index = @enumToInt(Feature.slow_incdec), .name = @tagName(Feature.slow_incdec), .llvm_name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_lea)] = .{ .index = @enumToInt(Feature.slow_lea), .name = @tagName(Feature.slow_lea), .llvm_name = "slow-lea", .description = "LEA instruction with certain arguments is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmaddwd)] = .{ .index = @enumToInt(Feature.slow_pmaddwd), .name = @tagName(Feature.slow_pmaddwd), .llvm_name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmulld)] = .{ .index = @enumToInt(Feature.slow_pmulld), .name = @tagName(Feature.slow_pmulld), .llvm_name = "slow-pmulld", .description = "PMULLD instruction is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_shld)] = .{ .index = @enumToInt(Feature.slow_shld), .name = @tagName(Feature.slow_shld), .llvm_name = "slow-shld", .description = "SHLD instruction is slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_two_mem_ops)] = .{ .index = @enumToInt(Feature.slow_two_mem_ops), .name = @tagName(Feature.slow_two_mem_ops), .llvm_name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{ .index = @enumToInt(Feature.slow_unaligned_mem_16), .name = @tagName(Feature.slow_unaligned_mem_16), .llvm_name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{ .index = @enumToInt(Feature.slow_unaligned_mem_32), .name = @tagName(Feature.slow_unaligned_mem_32), .llvm_name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .index = @enumToInt(Feature.soft_float), .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software floating point features", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse)] = .{ .index = @enumToInt(Feature.sse), .name = @tagName(Feature.sse), .llvm_name = "sse", .description = "Enable SSE instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse_unaligned_mem)] = .{ .index = @enumToInt(Feature.sse_unaligned_mem), .name = @tagName(Feature.sse_unaligned_mem), .llvm_name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse2)] = .{ .index = @enumToInt(Feature.sse2), @@ -1006,7 +1006,7 @@ pub const all_features = blk: { .name = @tagName(Feature.tbm), .llvm_name = "tbm", .description = "Enable TBM instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vaes)] = .{ .index = @enumToInt(Feature.vaes), @@ -1033,21 +1033,21 @@ pub const all_features = blk: { .name = @tagName(Feature.waitpkg), .llvm_name = "waitpkg", .description = "Wait and pause enhancements", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wbnoinvd)] = .{ .index = @enumToInt(Feature.wbnoinvd), .name = @tagName(Feature.wbnoinvd), .llvm_name = "wbnoinvd", .description = "Write Back No Invalidate", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.x87)] = .{ .index = @enumToInt(Feature.x87), .name = @tagName(Feature.x87), .llvm_name = "x87", .description = "Enable X87 float instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xop)] = .{ .index = @enumToInt(Feature.xop), @@ -1063,28 +1063,28 @@ pub const all_features = blk: { .name = @tagName(Feature.xsave), .llvm_name = "xsave", .description = "Support xsave instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsavec)] = .{ .index = @enumToInt(Feature.xsavec), .name = @tagName(Feature.xsavec), .llvm_name = "xsavec", .description = "Support xsavec instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaveopt)] = .{ .index = @enumToInt(Feature.xsaveopt), .name = @tagName(Feature.xsaveopt), .llvm_name = "xsaveopt", .description = "Support xsaveopt instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaves)] = .{ .index = @enumToInt(Feature.xsaves), .name = @tagName(Feature.xsaves), .llvm_name = "xsaves", .description = "Support xsaves instructions", - .dependencies = 0, + .dependencies = featureSet(&[_]Feature{}), }; break :blk result; }; @@ -2365,7 +2365,7 @@ pub const cpu = struct { pub const lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", - .features = 0, + .features = featureSet(&[_]Feature{}), }; pub const nehalem = Cpu{ .name = "nehalem", diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 307e95332136d22201ab8c409133a091cfe90784..f533d9b34e0c11d56cd6ec8911aafa2078639779 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -64,6 +64,7 @@ const Error = extern enum { CacheUnavailable, PathTooLong, CCompilerCannotFindFile, + NoCCompilerInstalled, ReadingDepFile, InvalidDepFile, MissingArchitecture, @@ -89,6 +90,7 @@ const Error = extern enum { UnknownCpuFeature, InvalidCpuFeatures, InvalidLlvmCpuFeaturesFormat, + UnknownApplicationBinaryInterface, }; const FILE = std.c.FILE; @@ -585,11 +587,12 @@ const Stage2CpuFeatures = struct { fn createFromLLVM( allocator: *mem.Allocator, - arch_name: [*:0]const u8, + zig_triple: [*:0]const u8, llvm_cpu_name_z: [*:0]const u8, llvm_cpu_features: [*:0]const u8, ) !*Self { - const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); + const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); + const arch = target.Cross.arch; const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z); for (arch.allCpus()) |cpu| { @@ -620,8 +623,8 @@ const Stage2CpuFeatures = struct { const this_llvm_name = feature.llvm_name orelse continue; if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { - .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index), - .sub => set &= ~(@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index)), + .add => set.addFeature(@intCast(u8, index)), + .sub => set.removeFeature(@intCast(u8, index)), } break; } @@ -691,7 +694,7 @@ const Stage2CpuFeatures = struct { } for (all_features) |feature, index| { - if (!Target.Cpu.Feature.isEnabled(feature_set, @intCast(u7, index))) continue; + if (!feature_set.isEnabled(@intCast(u8, index))) continue; if (feature.llvm_name) |llvm_name| { try llvm_features_buffer.append("+"); @@ -736,43 +739,75 @@ const Stage2CpuFeatures = struct { // ABI warning export fn stage2_cpu_features_parse_cpu( result: **Stage2CpuFeatures, - arch_name: [*:0]const u8, + zig_triple: [*:0]const u8, cpu_name: [*:0]const u8, ) Error { - result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) { + result.* = parseCpu(zig_triple, cpu_name) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, - error.UnknownCpu => return .UnknownCpu, error.UnknownArchitecture => return .UnknownArchitecture, error.UnknownSubArchitecture => return .UnknownSubArchitecture, + error.UnknownOperatingSystem => return .UnknownOperatingSystem, + error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, + error.MissingOperatingSystem => return .MissingOperatingSystem, + error.MissingArchitecture => return .MissingArchitecture, }; return .None; } -fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures { - const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); - const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name)); +fn parseCpu(zig_triple: [*:0]const u8, cpu_name_z: [*:0]const u8) !*Stage2CpuFeatures { + const cpu_name = mem.toSliceConst(u8, cpu_name_z); + const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); + const arch = target.Cross.arch; + const cpu = arch.parseCpu(cpu_name) catch |err| switch (err) { + error.UnknownCpu => { + std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ + cpu_name, + @tagName(arch), + }); + for (arch.allCpus()) |cpu| { + std.debug.warn(" {}\n", .{cpu.name}); + } + process.exit(1); + }, + else => |e| return e, + }; return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu); } // ABI warning export fn stage2_cpu_features_parse_features( result: **Stage2CpuFeatures, - arch_name: [*:0]const u8, + zig_triple: [*:0]const u8, features_text: [*:0]const u8, ) Error { - result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) { + result.* = parseFeatures(zig_triple, features_text) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, - error.UnknownCpuFeature => return .UnknownCpuFeature, error.InvalidCpuFeatures => return .InvalidCpuFeatures, error.UnknownArchitecture => return .UnknownArchitecture, error.UnknownSubArchitecture => return .UnknownSubArchitecture, + error.UnknownOperatingSystem => return .UnknownOperatingSystem, + error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, + error.MissingOperatingSystem => return .MissingOperatingSystem, + error.MissingArchitecture => return .MissingArchitecture, }; return .None; } -fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures { - const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name)); - const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)); +fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures { + const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); + const arch = target.Cross.arch; + const set = arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)) catch |err| switch (err) { + error.UnknownCpuFeature => { + std.debug.warn("Unknown CPU features specified.\nAvailable CPU features for architecture '{}':\n", .{ + @tagName(arch), + }); + for (arch.allFeaturesList()) |feature| { + std.debug.warn(" {}\n", .{feature.name}); + } + process.exit(1); + }, + else => |e| return e, + }; return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set); } @@ -787,13 +822,13 @@ export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error { // ABI warning export fn stage2_cpu_features_llvm( result: **Stage2CpuFeatures, - arch_name: [*:0]const u8, + zig_triple: [*:0]const u8, llvm_cpu_name: [*:0]const u8, llvm_cpu_features: [*:0]const u8, ) Error { result.* = Stage2CpuFeatures.createFromLLVM( std.heap.c_allocator, - arch_name, + zig_triple, llvm_cpu_name, llvm_cpu_features, ) catch |err| switch (err) { @@ -801,6 +836,10 @@ export fn stage2_cpu_features_llvm( error.UnknownArchitecture => return .UnknownArchitecture, error.UnknownSubArchitecture => return .UnknownSubArchitecture, error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat, + error.UnknownOperatingSystem => return .UnknownOperatingSystem, + error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, + error.MissingOperatingSystem => return .MissingOperatingSystem, + error.MissingArchitecture => return .MissingArchitecture, }; return .None; } diff --git a/src/error.cpp b/src/error.cpp index 6c6abfcd22e42a5f7a1a02fd5c596161d07bf463..5bf1667db9c99b0a5e73cbcc9c7f25dad115a30e 100644 --- a/src/error.cpp +++ b/src/error.cpp @@ -63,6 +63,7 @@ const char *err_str(Error err) { case ErrorUnknownCpuFeature: return "unknown CPU feature"; case ErrorInvalidCpuFeatures: return "invalid CPU features"; case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format"; + case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface"; } return "(invalid error)"; } diff --git a/src/main.cpp b/src/main.cpp index 8e331461f8c5d01584b514fdfe53caebe8472e62..878c15e17c4830a86853fc622a68c314a7a23a82 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -977,16 +977,19 @@ int main(int argc, char **argv) { } } + Buf zig_triple_buf = BUF_INIT; + target_triple_zig(&zig_triple_buf, &target); + if (cpu && features) { fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n"); return main_exit(root_progress_node, EXIT_FAILURE); } else if (cpu) { - if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, target_arch_name(target.arch), cpu))) { + if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, buf_ptr(&zig_triple_buf), cpu))) { fprintf(stderr, "-target-cpu error: %s\n", err_str(err)); return main_exit(root_progress_node, EXIT_FAILURE); } } else if (features) { - if ((err = stage2_cpu_features_parse_features(&target.cpu_features, target_arch_name(target.arch), + if ((err = stage2_cpu_features_parse_features(&target.cpu_features, buf_ptr(&zig_triple_buf), features))) { fprintf(stderr, "-target-feature error: %s\n", err_str(err)); @@ -995,7 +998,7 @@ int main(int argc, char **argv) { } else if (target.is_native) { const char *cpu_name = ZigLLVMGetHostCPUName(); const char *cpu_features = ZigLLVMGetNativeFeatures(); - if ((err = stage2_cpu_features_llvm(&target.cpu_features, target_arch_name(target.arch), + if ((err = stage2_cpu_features_llvm(&target.cpu_features, buf_ptr(&zig_triple_buf), cpu_name, cpu_features))) { fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err)); @@ -1014,9 +1017,7 @@ int main(int argc, char **argv) { } if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) { - Buf triple_buf = BUF_INIT; - target_triple_zig(&triple_buf, &target); - fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf)); + fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf)); return print_error_usage(arg0); } diff --git a/src/userland.cpp b/src/userland.cpp index 22d2daa8e43512c955e015f16cd8926601d23a68..4a658d76c528a38dfeb3616dbf6e389e1824158a 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -96,11 +96,11 @@ struct Stage2CpuFeatures { const char *cache_hash; }; -Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *arch, const char *str) { +Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *zig_triple, const char *str) { const char *msg = "stage0 called stage2_cpu_features_parse_cpu"; stage2_panic(msg, strlen(msg)); } -Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *arch, const char *str) { +Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zig_triple, const char *str) { const char *msg = "stage0 called stage2_cpu_features_parse_features"; stage2_panic(msg, strlen(msg)); } @@ -111,7 +111,7 @@ Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) { *out = result; return ErrorNone; } -Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *arch, +Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *zig_triple, const char *llvm_cpu_name, const char *llvm_features) { Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); diff --git a/src/userland.h b/src/userland.h index 052321a718f8c9d8e8c8ffe669c7662551f34ba1..e84b62aecb75b053cb8798df61384ad0f88dd593 100644 --- a/src/userland.h +++ b/src/userland.h @@ -83,6 +83,7 @@ enum Error { ErrorUnknownCpuFeature, ErrorInvalidCpuFeatures, ErrorInvalidLlvmCpuFeaturesFormat, + ErrorUnknownApplicationBinaryInterface, }; // ABI warning @@ -184,18 +185,18 @@ struct Stage2CpuFeatures; // ABI warning ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result, - const char *arch, const char *cpu_name); + const char *zig_triple, const char *cpu_name); // ABI warning ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result, - const char *arch, const char *features); + const char *zig_triple, const char *features); // ABI warning ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result); // ABI warning ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result, - const char *arch, const char *llvm_cpu_name, const char *llvm_features); + const char *zig_triple, const char *llvm_cpu_name, const char *llvm_features); // ABI warning ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features); -- 2.54.0 From 39759b90fce2fa114f59793958390778275c0477 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 01:22:37 -0500 Subject: [PATCH 39/63] make zig targets show native cpu name and features --- lib/std/target.zig | 4 +- src-self-hosted/print_targets.zig | 23 ++++-- src-self-hosted/stage1.zig | 125 +++++++++++++++++++----------- src/main.cpp | 2 +- src/userland.cpp | 2 +- src/userland.h | 2 +- 6 files changed, 101 insertions(+), 57 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 716be8905c86b4be9e1551ad3db847cc11042a9d..2566a9be372c6099dad62ede9d0eb6fcc2c5cf1d 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -631,9 +631,9 @@ pub const Target = union(enum) { }; } - pub fn cpuFeaturesList(self: Target) []const *const Cpu.Feature { + pub fn cpuFeatureSet(self: Target) Cpu.Feature.Set { return switch (self.getCpuFeatures()) { - .baseline => self.arch.baselineFeatures(), + .baseline => self.getArch().baselineFeatures(), .cpu => |cpu| cpu.features, .features => |features| features, }; diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig index 233b6c106d9a8b15b2ea810de93acaef2efb2f55..f2bab3568530f88ff982e463f1820647e84a4314 100644 --- a/src-self-hosted/print_targets.zig +++ b/src-self-hosted/print_targets.zig @@ -9,6 +9,7 @@ pub fn cmdTargets( allocator: *Allocator, args: []const []const u8, stdout: *io.OutStream(fs.File.WriteError), + native_target: Target, ) !void { const BOS = io.BufferedOutStream(fs.File.WriteError); var bos = BOS.init(stdout); @@ -76,22 +77,34 @@ pub fn cmdTargets( try jws.objectField("native"); try jws.beginObject(); { - const triple = try Target.current.zigTriple(allocator); + const triple = try native_target.zigTriple(allocator); defer allocator.free(triple); try jws.objectField("triple"); try jws.emitString(triple); } try jws.objectField("arch"); - try jws.emitString(@tagName(Target.current.getArch())); + try jws.emitString(@tagName(native_target.getArch())); try jws.objectField("os"); - try jws.emitString(@tagName(Target.current.getOs())); + try jws.emitString(@tagName(native_target.getOs())); try jws.objectField("abi"); - try jws.emitString(@tagName(Target.current.getAbi())); + try jws.emitString(@tagName(native_target.getAbi())); try jws.objectField("cpuName"); - switch (Target.current.getCpuFeatures()) { + switch (native_target.getCpuFeatures()) { .baseline, .features => try jws.emitNull(), .cpu => |cpu| try jws.emitString(cpu.name), } + { + try jws.objectField("cpuFeatures"); + try jws.beginArray(); + const feature_set = native_target.cpuFeatureSet(); + for (native_target.getArch().allFeaturesList()) |feature, i| { + if (feature_set.isEnabled(@intCast(u8, i))) { + try jws.arrayElem(); + try jws.emitString(feature.name); + } + } + try jws.endArray(); + } try jws.endObject(); try jws.endObject(); diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index f533d9b34e0c11d56cd6ec8911aafa2078639779..eed5804c0d449331c917102d860a6101d4fa7751 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -539,19 +539,82 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.context.maybeRefresh(); } +fn cpuFeaturesFromLLVM( + arch: Target.Arch, + llvm_cpu_name_z: ?[*:0]const u8, + llvm_cpu_features_opt: ?[*:0]const u8, +) !Target.CpuFeatures { + if (llvm_cpu_name_z) |cpu_name_z| { + const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z); + + for (arch.allCpus()) |cpu| { + const this_llvm_name = cpu.llvm_name orelse continue; + if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { + return Target.CpuFeatures{ .cpu = cpu }; + } + } + } + + var set = arch.baselineFeatures(); + const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{ + .features = set, + }; + + var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); + while (it.next()) |decorated_llvm_feat| { + var op: enum { + add, + sub, + } = undefined; + var llvm_feat: []const u8 = undefined; + if (mem.startsWith(u8, decorated_llvm_feat, "+")) { + op = .add; + llvm_feat = decorated_llvm_feat[1..]; + } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) { + op = .sub; + llvm_feat = decorated_llvm_feat[1..]; + } else { + return error.InvalidLlvmCpuFeaturesFormat; + } + for (arch.allFeaturesList()) |feature, index| { + const this_llvm_name = feature.llvm_name orelse continue; + if (mem.eql(u8, llvm_feat, this_llvm_name)) { + switch (op) { + .add => set.addFeature(@intCast(u8, index)), + .sub => set.removeFeature(@intCast(u8, index)), + } + break; + } + } + } + return Target.CpuFeatures{ .features = set }; +} + // ABI warning -export fn stage2_cmd_targets() c_int { - @import("print_targets.zig").cmdTargets( - std.heap.c_allocator, - &[0][]u8{}, - &std.io.getStdOut().outStream().stream, - ) catch |err| { +export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int { + cmdTargets(zig_triple) catch |err| { std.debug.warn("unable to list targets: {}\n", .{@errorName(err)}); return -1; }; return 0; } +fn cmdTargets(zig_triple: [*:0]const u8) !void { + var target = try Target.parse(mem.toSliceConst(u8, zig_triple)); + target.Cross.cpu_features = blk: { + const llvm = @import("llvm.zig"); + const llvm_cpu_name = llvm.GetHostCPUName(); + const llvm_cpu_features = llvm.GetNativeFeatures(); + break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features); + }; + return @import("print_targets.zig").cmdTargets( + std.heap.c_allocator, + &[0][]u8{}, + &std.io.getStdOut().outStream().stream, + target, + ); +} + const Stage2CpuFeatures = struct { allocator: *mem.Allocator, cpu_features: Target.CpuFeatures, @@ -588,49 +651,17 @@ const Stage2CpuFeatures = struct { fn createFromLLVM( allocator: *mem.Allocator, zig_triple: [*:0]const u8, - llvm_cpu_name_z: [*:0]const u8, - llvm_cpu_features: [*:0]const u8, + llvm_cpu_name_z: ?[*:0]const u8, + llvm_cpu_features: ?[*:0]const u8, ) !*Self { const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); const arch = target.Cross.arch; - const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z); - - for (arch.allCpus()) |cpu| { - const this_llvm_name = cpu.llvm_name orelse continue; - if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { - return createFromCpu(allocator, arch, cpu); - } + const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features); + switch (cpu_features) { + .baseline => return createBaseline(allocator), + .cpu => |cpu| return createFromCpu(allocator, arch, cpu), + .features => |features| return createFromCpuFeatures(allocator, arch, features), } - - var set = arch.baselineFeatures(); - var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); - while (it.next()) |decorated_llvm_feat| { - var op: enum { - add, - sub, - } = undefined; - var llvm_feat: []const u8 = undefined; - if (mem.startsWith(u8, decorated_llvm_feat, "+")) { - op = .add; - llvm_feat = decorated_llvm_feat[1..]; - } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) { - op = .sub; - llvm_feat = decorated_llvm_feat[1..]; - } else { - return error.InvalidLlvmCpuFeaturesFormat; - } - for (arch.allFeaturesList()) |feature, index| { - const this_llvm_name = feature.llvm_name orelse continue; - if (mem.eql(u8, llvm_feat, this_llvm_name)) { - switch (op) { - .add => set.addFeature(@intCast(u8, index)), - .sub => set.removeFeature(@intCast(u8, index)), - } - break; - } - } - } - return createFromCpuFeatures(allocator, arch, set); } fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self { @@ -823,8 +854,8 @@ export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error { export fn stage2_cpu_features_llvm( result: **Stage2CpuFeatures, zig_triple: [*:0]const u8, - llvm_cpu_name: [*:0]const u8, - llvm_cpu_features: [*:0]const u8, + llvm_cpu_name: ?[*:0]const u8, + llvm_cpu_features: ?[*:0]const u8, ) Error { result.* = Stage2CpuFeatures.createFromLLVM( std.heap.c_allocator, diff --git a/src/main.cpp b/src/main.cpp index 878c15e17c4830a86853fc622a68c314a7a23a82..813eada2611ed0c1c638869894b99e39c4b2c27f 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1372,7 +1372,7 @@ int main(int argc, char **argv) { return main_exit(root_progress_node, EXIT_SUCCESS); } case CmdTargets: - return stage2_cmd_targets(); + return stage2_cmd_targets(buf_ptr(&zig_triple_buf)); case CmdNone: return print_full_usage(arg0, stderr, EXIT_FAILURE); } diff --git a/src/userland.cpp b/src/userland.cpp index 4a658d76c528a38dfeb3616dbf6e389e1824158a..9a923e1b8634488f1be87f9f67ce5836da6b0142 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -141,7 +141,7 @@ void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, *len = strlen(cpu_features->builtin_str); } -int stage2_cmd_targets(void) { +int stage2_cmd_targets(const char *zig_triple) { const char *msg = "stage0 called stage2_cmd_targets"; stage2_panic(msg, strlen(msg)); } diff --git a/src/userland.h b/src/userland.h index e84b62aecb75b053cb8798df61384ad0f88dd593..1a07b605e52ed99022a1c2362667b8687167552a 100644 --- a/src/userland.h +++ b/src/userland.h @@ -213,7 +213,7 @@ ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatu const char **ptr, size_t *len); // ABI warning -ZIG_EXTERN_C int stage2_cmd_targets(void); +ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple); #endif -- 2.54.0 From 0c2dde2fda29e84be25296d0b65bcb92dc9d4946 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 01:31:27 -0500 Subject: [PATCH 40/63] add libc and glibcs to self-hosted zig targets --- src-self-hosted/print_targets.zig | 132 ++++++++++++++++++++++++++---- 1 file changed, 118 insertions(+), 14 deletions(-) diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig index f2bab3568530f88ff982e463f1820647e84a4314..0e0844d7c487c5d9ef02474972b9dbb127927df9 100644 --- a/src-self-hosted/print_targets.zig +++ b/src-self-hosted/print_targets.zig @@ -5,6 +5,101 @@ const mem = std.mem; const Allocator = mem.Allocator; const Target = std.Target; +// TODO this is hard-coded until self-hosted gains this information canonically +const available_libcs = [_][]const u8{ + "aarch64_be-linux-gnu", + "aarch64_be-linux-musl", + "aarch64_be-windows-gnu", + "aarch64-linux-gnu", + "aarch64-linux-musl", + "aarch64-windows-gnu", + "armeb-linux-gnueabi", + "armeb-linux-gnueabihf", + "armeb-linux-musleabi", + "armeb-linux-musleabihf", + "armeb-windows-gnu", + "arm-linux-gnueabi", + "arm-linux-gnueabihf", + "arm-linux-musleabi", + "arm-linux-musleabihf", + "arm-windows-gnu", + "i386-linux-gnu", + "i386-linux-musl", + "i386-windows-gnu", + "mips64el-linux-gnuabi64", + "mips64el-linux-gnuabin32", + "mips64el-linux-musl", + "mips64-linux-gnuabi64", + "mips64-linux-gnuabin32", + "mips64-linux-musl", + "mipsel-linux-gnu", + "mipsel-linux-musl", + "mips-linux-gnu", + "mips-linux-musl", + "powerpc64le-linux-gnu", + "powerpc64le-linux-musl", + "powerpc64-linux-gnu", + "powerpc64-linux-musl", + "powerpc-linux-gnu", + "powerpc-linux-musl", + "riscv64-linux-gnu", + "riscv64-linux-musl", + "s390x-linux-gnu", + "s390x-linux-musl", + "sparc-linux-gnu", + "sparcv9-linux-gnu", + "wasm32-freestanding-musl", + "x86_64-linux-gnu (native)", + "x86_64-linux-gnux32", + "x86_64-linux-musl", + "x86_64-windows-gnu", +}; + +// TODO this is hard-coded until self-hosted gains this information canonically +const available_glibcs = [_][]const u8{ + "2.0", + "2.1", + "2.1.1", + "2.1.2", + "2.1.3", + "2.2", + "2.2.1", + "2.2.2", + "2.2.3", + "2.2.4", + "2.2.5", + "2.2.6", + "2.3", + "2.3.2", + "2.3.3", + "2.3.4", + "2.4", + "2.5", + "2.6", + "2.7", + "2.8", + "2.9", + "2.10", + "2.11", + "2.12", + "2.13", + "2.14", + "2.15", + "2.16", + "2.17", + "2.18", + "2.19", + "2.22", + "2.23", + "2.24", + "2.25", + "2.26", + "2.27", + "2.28", + "2.29", + "2.30", +}; + pub fn cmdTargets( allocator: *Allocator, args: []const []const u8, @@ -52,25 +147,33 @@ pub fn cmdTargets( try jws.objectField("os"); try jws.beginArray(); - { - comptime var i: usize = 0; - inline while (i < @memberCount(Target.Os)) : (i += 1) { - const os_tag = @memberName(Target.Os, i); - try jws.arrayElem(); - try jws.emitString(os_tag); - } + inline for (@typeInfo(Target.Os).Enum.fields) |field| { + try jws.arrayElem(); + try jws.emitString(field.name); } try jws.endArray(); try jws.objectField("abi"); try jws.beginArray(); - { - comptime var i: usize = 0; - inline while (i < @memberCount(Target.Abi)) : (i += 1) { - const abi_tag = @memberName(Target.Abi, i); - try jws.arrayElem(); - try jws.emitString(abi_tag); - } + inline for (@typeInfo(Target.Abi).Enum.fields) |field| { + try jws.arrayElem(); + try jws.emitString(field.name); + } + try jws.endArray(); + + try jws.objectField("libc"); + try jws.beginArray(); + for (available_libcs) |libc| { + try jws.arrayElem(); + try jws.emitString(libc); + } + try jws.endArray(); + + try jws.objectField("glibc"); + try jws.beginArray(); + for (available_glibcs) |glibc| { + try jws.arrayElem(); + try jws.emitString(glibc); } try jws.endArray(); @@ -105,6 +208,7 @@ pub fn cmdTargets( } try jws.endArray(); } + // TODO implement native glibc version detection in self-hosted try jws.endObject(); try jws.endObject(); -- 2.54.0 From 5974f95cb75921d973caa38e049deaebc7a7b628 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 01:48:25 -0500 Subject: [PATCH 41/63] add cpus and cpu features to zig targets --- BRANCH_TODO | 5 ----- src-self-hosted/print_targets.zig | 35 +++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 5 deletions(-) delete mode 100644 BRANCH_TODO diff --git a/BRANCH_TODO b/BRANCH_TODO deleted file mode 100644 index 5b5cf506f4e0809be5568c7e646e7c73b7fa77aa..0000000000000000000000000000000000000000 --- a/BRANCH_TODO +++ /dev/null @@ -1,5 +0,0 @@ -Finish these thigns before merging teh branch - - * zig targets - - use non-reflection based cpu detection? - diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig index 0e0844d7c487c5d9ef02474972b9dbb127927df9..a7013e8cd9e91463cdc03aa611e07e4acfb10032 100644 --- a/src-self-hosted/print_targets.zig +++ b/src-self-hosted/print_targets.zig @@ -177,6 +177,41 @@ pub fn cmdTargets( } try jws.endArray(); + try jws.objectField("cpus"); + try jws.beginObject(); + inline for (@typeInfo(Target.Arch).Union.fields) |field| { + try jws.objectField(field.name); + try jws.beginObject(); + const arch = @unionInit(Target.Arch, field.name, undefined); + for (arch.allCpus()) |cpu| { + try jws.objectField(cpu.name); + try jws.beginArray(); + for (arch.allFeaturesList()) |feature, i| { + if (cpu.features.isEnabled(@intCast(u8, i))) { + try jws.arrayElem(); + try jws.emitString(feature.name); + } + } + try jws.endArray(); + } + try jws.endObject(); + } + try jws.endObject(); + + try jws.objectField("cpuFeatures"); + try jws.beginObject(); + inline for (@typeInfo(Target.Arch).Union.fields) |field| { + try jws.objectField(field.name); + try jws.beginArray(); + const arch = @unionInit(Target.Arch, field.name, undefined); + for (arch.allFeaturesList()) |feature| { + try jws.arrayElem(); + try jws.emitString(feature.name); + } + try jws.endArray(); + } + try jws.endObject(); + try jws.objectField("native"); try jws.beginObject(); { -- 2.54.0 From 0abaee79af462f4264717f88af052fb00eefde7c Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 01:50:44 -0500 Subject: [PATCH 42/63] fix self-hosted compiler regression --- src-self-hosted/main.zig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig index 5751b7983de020d3c83e04ab7345172f5f920fe6..fc0825f3dbcc24368ccde7676638bc7c00935659 100644 --- a/src-self-hosted/main.zig +++ b/src-self-hosted/main.zig @@ -79,7 +79,9 @@ pub fn main() !void { } else if (mem.eql(u8, cmd, "libc")) { return cmdLibC(allocator, cmd_args); } else if (mem.eql(u8, cmd, "targets")) { - return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout); + // TODO figure out the current target rather than using the target that was specified when + // compiling the compiler + return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current); } else if (mem.eql(u8, cmd, "version")) { return cmdVersion(allocator, cmd_args); } else if (mem.eql(u8, cmd, "zen")) { -- 2.54.0 From 1f7babbc80211e12c9a38ff2196d6ff8c5a19302 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 03:01:20 -0500 Subject: [PATCH 43/63] properly forward baseline target cpu features to llvm --- src-self-hosted/stage1.zig | 84 ++++++++++++++++++++++++-------------- src/codegen.cpp | 2 + src/main.cpp | 2 +- src/userland.cpp | 2 +- src/userland.h | 3 +- 5 files changed, 59 insertions(+), 34 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index eed5804c0d449331c917102d860a6101d4fa7751..9cbbf75d84715061d36787f2cd653db99fbae37d 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -627,7 +627,7 @@ const Stage2CpuFeatures = struct { const Self = @This(); - fn createBaseline(allocator: *mem.Allocator) !*Self { + fn createBaseline(allocator: *mem.Allocator, arch: Target.Arch) !*Self { const self = try allocator.create(Self); errdefer allocator.destroy(self); @@ -641,10 +641,11 @@ const Stage2CpuFeatures = struct { .allocator = allocator, .cpu_features = .baseline, .llvm_cpu_name = null, - .llvm_features_str = null, + .llvm_features_str = try initLLVMFeatures(allocator, arch, arch.baselineFeatures()), .builtin_str = builtin_str, .cache_hash = cache_hash, }; + return self; } @@ -658,7 +659,7 @@ const Stage2CpuFeatures = struct { const arch = target.Cross.arch; const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features); switch (cpu_features) { - .baseline => return createBaseline(allocator), + .baseline => return createBaseline(allocator, arch), .cpu => |cpu| return createFromCpu(allocator, arch, cpu), .features => |features| return createFromCpuFeatures(allocator, arch, features), } @@ -688,6 +689,39 @@ const Stage2CpuFeatures = struct { return self; } + fn initLLVMFeatures( + allocator: *mem.Allocator, + arch: Target.Arch, + feature_set: Target.Cpu.Feature.Set, + ) ![*:0]const u8 { + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); + // First, disable all features. + // This way, we only get the ones the user requests. + const all_features = arch.allFeaturesList(); + for (all_features) |feature| { + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("-"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } + } + for (all_features) |feature, index| { + if (!feature_set.isEnabled(@intCast(u8, index))) continue; + + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("+"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } + } + + if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) { + llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); + } + return llvm_features_buffer.toOwnedSlice().ptr; + } + fn createFromCpuFeatures( allocator: *mem.Allocator, arch: Target.Arch, @@ -710,38 +744,14 @@ const Stage2CpuFeatures = struct { ); defer builtin_str_buffer.deinit(); - var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); - defer llvm_features_buffer.deinit(); - - // First, disable all features. - // This way, we only get the ones the user requests. - const all_features = arch.allFeaturesList(); - for (all_features) |feature| { - if (feature.llvm_name) |llvm_name| { - try llvm_features_buffer.append("-"); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } - } - - for (all_features) |feature, index| { + for (arch.allFeaturesList()) |feature, index| { if (!feature_set.isEnabled(@intCast(u8, index))) continue; - if (feature.llvm_name) |llvm_name| { - try llvm_features_buffer.append("+"); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } - try builtin_str_buffer.append(" ."); try builtin_str_buffer.append(feature.name); try builtin_str_buffer.append(",\n"); } - if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) { - llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); - } - try builtin_str_buffer.append( \\ }), \\}; @@ -752,7 +762,7 @@ const Stage2CpuFeatures = struct { .allocator = allocator, .cpu_features = .{ .features = feature_set }, .llvm_cpu_name = null, - .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr, + .llvm_features_str = try initLLVMFeatures(allocator, arch, feature_set), .builtin_str = builtin_str_buffer.toOwnedSlice(), .cache_hash = cache_hash, }; @@ -843,13 +853,25 @@ fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stag } // ABI warning -export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error { - result.* = Stage2CpuFeatures.createBaseline(std.heap.c_allocator) catch |err| switch (err) { +export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures, zig_triple: [*:0]const u8) Error { + result.* = cpuFeaturesBaseline(zig_triple) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, + error.UnknownArchitecture => return .UnknownArchitecture, + error.UnknownSubArchitecture => return .UnknownSubArchitecture, + error.UnknownOperatingSystem => return .UnknownOperatingSystem, + error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, + error.MissingOperatingSystem => return .MissingOperatingSystem, + error.MissingArchitecture => return .MissingArchitecture, }; return .None; } +fn cpuFeaturesBaseline(zig_triple: [*:0]const u8) !*Stage2CpuFeatures { + const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); + const arch = target.Cross.arch; + return Stage2CpuFeatures.createBaseline(std.heap.c_allocator, arch); +} + // ABI warning export fn stage2_cpu_features_llvm( result: **Stage2CpuFeatures, diff --git a/src/codegen.cpp b/src/codegen.cpp index 9cbd5fc6ab223eda23a0cea1d48e34772ec3b5aa..ffdf0e5bb07d1f5d460257057e6d50d1110369d3 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8802,6 +8802,8 @@ static void init(CodeGen *g) { target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); } + //fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args); + //fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features); g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, diff --git a/src/main.cpp b/src/main.cpp index 813eada2611ed0c1c638869894b99e39c4b2c27f..d12ae850fa48cf18482c013d0f5650d7ed0f1a4e 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1005,7 +1005,7 @@ int main(int argc, char **argv) { return main_exit(root_progress_node, EXIT_FAILURE); } } else { - if ((err = stage2_cpu_features_baseline(&target.cpu_features))) { + if ((err = stage2_cpu_features_baseline(&target.cpu_features, buf_ptr(&zig_triple_buf)))) { fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err)); return main_exit(root_progress_node, EXIT_FAILURE); } diff --git a/src/userland.cpp b/src/userland.cpp index 9a923e1b8634488f1be87f9f67ce5836da6b0142..64849b65ed99af8db60d565101554bc3334b4991 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -104,7 +104,7 @@ Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zi const char *msg = "stage0 called stage2_cpu_features_parse_features"; stage2_panic(msg, strlen(msg)); } -Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) { +Error stage2_cpu_features_baseline(Stage2CpuFeatures **out, const char *zig_triple) { Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); result->builtin_str = ".baseline;\n"; result->cache_hash = "\n\n"; diff --git a/src/userland.h b/src/userland.h index 1a07b605e52ed99022a1c2362667b8687167552a..01faf0b532f32fb1987b07db9fe1e2e091e58aa5 100644 --- a/src/userland.h +++ b/src/userland.h @@ -192,7 +192,8 @@ ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures * const char *zig_triple, const char *features); // ABI warning -ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result); +ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result, + const char *zig_triple); // ABI warning ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result, -- 2.54.0 From 327ad0ae89c168a5e035f92f86617a29697bf6d8 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 03:05:56 -0500 Subject: [PATCH 44/63] target_triple_llvm: emit none instead of unknown --- src/target.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/target.cpp b/src/target.cpp index 82d5467e267a7ae0157e133d28b43b3e7a43b833..e0b29ef1b1c040661cdba6788dd4914114903235 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -831,11 +831,14 @@ void init_all_targets(void) { void target_triple_zig(Buf *triple, const ZigTarget *target) { buf_resize(triple, 0); + const char *abi_name = target->abi == ZigLLVM_UnknownEnvironment ? + "none" : ZigLLVMGetEnvironmentTypeName(target->abi); + buf_appendf(triple, "%s%s-%s-%s", ZigLLVMGetArchTypeName(target->arch), ZigLLVMGetSubArchTypeName(target->sub_arch), ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)), - ZigLLVMGetEnvironmentTypeName(target->abi)); + abi_name); } void target_triple_llvm(Buf *triple, const ZigTarget *target) { -- 2.54.0 From 6793af8d8b370cefc0a1fccbcf1c9fd1a24c7378 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 12:14:36 -0500 Subject: [PATCH 45/63] these are not real cpu features --- lib/std/target/x86.zig | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index 7f1ec42dab0e5581243687cfce5e75751d1243b5..ce9830f1fa94ab568ca08786c07fab1f31aa539e 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -2,12 +2,9 @@ const std = @import("../std.zig"); const Cpu = std.Target.Cpu; pub const Feature = enum { - @"16bit_mode", - @"32bit_mode", @"3dnow", @"3dnowa", @"64bit", - @"64bit_mode", adx, aes, avx, @@ -134,20 +131,6 @@ pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= Cpu.Feature.Set.bit_count); var result: [len]Cpu.Feature = undefined; - result[@enumToInt(Feature.@"16bit_mode")] = .{ - .index = @enumToInt(Feature.@"16bit_mode"), - .name = @tagName(Feature.@"16bit_mode"), - .llvm_name = "16bit-mode", - .description = "16-bit mode (i8086)", - .dependencies = featureSet(&[_]Feature{}), - }; - result[@enumToInt(Feature.@"32bit_mode")] = .{ - .index = @enumToInt(Feature.@"32bit_mode"), - .name = @tagName(Feature.@"32bit_mode"), - .llvm_name = "32bit-mode", - .description = "32-bit mode (80386)", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.@"3dnow")] = .{ .index = @enumToInt(Feature.@"3dnow"), .name = @tagName(Feature.@"3dnow"), @@ -173,13 +156,6 @@ pub const all_features = blk: { .description = "Support 64-bit instructions", .dependencies = featureSet(&[_]Feature{}), }; - result[@enumToInt(Feature.@"64bit_mode")] = .{ - .index = @enumToInt(Feature.@"64bit_mode"), - .name = @tagName(Feature.@"64bit_mode"), - .llvm_name = "64bit-mode", - .description = "64-bit mode (x86_64)", - .dependencies = featureSet(&[_]Feature{}), - }; result[@enumToInt(Feature.adx)] = .{ .index = @enumToInt(Feature.adx), .name = @tagName(Feature.adx), -- 2.54.0 From 91ecce3bc05abb6677b389cbc7af403584d9cc7d Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 12:14:43 -0500 Subject: [PATCH 46/63] fix cache of cpu features --- src-self-hosted/stage1.zig | 31 +++++++++++-------------------- 1 file changed, 11 insertions(+), 20 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index 9cbbf75d84715061d36787f2cd653db99fbae37d..a11d3aae88946c4f35db073183bb31e5e51c2efc 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -13,6 +13,7 @@ const Target = std.Target; const self_hosted_main = @import("main.zig"); const errmsg = @import("errmsg.zig"); const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer; +const assert = std.debug.assert; var stderr_file: fs.File = undefined; var stderr: *io.OutStream(fs.File.WriteError) = undefined; @@ -675,7 +676,7 @@ const Stage2CpuFeatures = struct { }); errdefer allocator.free(builtin_str); - const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features }); + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features.bytes }); errdefer allocator.free(cache_hash); self.* = Self{ @@ -696,29 +697,19 @@ const Stage2CpuFeatures = struct { ) ![*:0]const u8 { var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); defer llvm_features_buffer.deinit(); - // First, disable all features. - // This way, we only get the ones the user requests. + const all_features = arch.allFeaturesList(); - for (all_features) |feature| { - if (feature.llvm_name) |llvm_name| { - try llvm_features_buffer.append("-"); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } - } for (all_features) |feature, index| { - if (!feature_set.isEnabled(@intCast(u8, index))) continue; + const llvm_name = feature.llvm_name orelse continue; - if (feature.llvm_name) |llvm_name| { - try llvm_features_buffer.append("+"); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } + const plus_or_minus = "-+"[@boolToInt(feature_set.isEnabled(@intCast(u8, index)))]; + try llvm_features_buffer.appendByte(plus_or_minus); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); } + assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")); + llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); - if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) { - llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); - } return llvm_features_buffer.toOwnedSlice().ptr; } @@ -730,7 +721,7 @@ const Stage2CpuFeatures = struct { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", .{feature_set}); + const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.bytes}); errdefer allocator.free(cache_hash); const generic_arch_name = arch.genericName(); -- 2.54.0 From 15d5cab569a5ffc6495d606f460264429043aabf Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 12:25:22 -0500 Subject: [PATCH 47/63] fix target_triple_zig to emit zig-compatible triples --- src/target.cpp | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/src/target.cpp b/src/target.cpp index e0b29ef1b1c040661cdba6788dd4914114903235..7542ff7c95752b3f8cd453360cd8150a5b0b51fc 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -831,14 +831,11 @@ void init_all_targets(void) { void target_triple_zig(Buf *triple, const ZigTarget *target) { buf_resize(triple, 0); - const char *abi_name = target->abi == ZigLLVM_UnknownEnvironment ? - "none" : ZigLLVMGetEnvironmentTypeName(target->abi); - buf_appendf(triple, "%s%s-%s-%s", - ZigLLVMGetArchTypeName(target->arch), - ZigLLVMGetSubArchTypeName(target->sub_arch), - ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)), - abi_name); + target_arch_name(target->arch), + target_subarch_name(target->sub_arch), + target_os_name(target->os), + target_abi_name(target->abi)); } void target_triple_llvm(Buf *triple, const ZigTarget *target) { -- 2.54.0 From 92559cd02cbf6497b99eb5193c9094e6d92c214e Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 19:40:44 -0500 Subject: [PATCH 48/63] hit a comptime limitation with computing dense sets --- lib/std/build.zig | 2 +- lib/std/target.zig | 186 ++++++-- lib/std/target/aarch64.zig | 645 ++++++++------------------- lib/std/target/amdgpu.zig | 515 +++++++--------------- lib/std/target/arm.zig | 869 +++++++++++-------------------------- lib/std/target/avr.zig | 656 +++++++++++++--------------- lib/std/target/bpf.zig | 30 +- lib/std/target/hexagon.zig | 118 ++--- lib/std/target/mips.zig | 238 ++++------ lib/std/target/msp430.zig | 30 +- lib/std/target/nvptx.zig | 138 ++---- lib/std/target/powerpc.zig | 286 ++++-------- lib/std/target/riscv.zig | 48 +- lib/std/target/sparc.zig | 164 +++---- lib/std/target/systemz.zig | 172 +++----- lib/std/target/wasm.zig | 54 +-- lib/std/target/x86.zig | 649 +++++++++------------------ src-self-hosted/stage1.zig | 15 +- src/all_types.hpp | 1 + src/codegen.cpp | 6 +- src/main.cpp | 5 + 21 files changed, 1720 insertions(+), 3107 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index 32a9e549ded7e82a8afad46874c0228321e2eb7b..a36818fb2908cca2f81fcf74f3b881d5d6584e65 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1983,7 +1983,7 @@ pub const LibExeObjStep = struct { var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); for (self.target.getArch().allFeaturesList()) |feature, i| { - if (features.isEnabled(@intCast(u8, i))) { + if (features.isEnabled(@intCast(Target.Cpu.Feature.Set.Index, i))) { try feature_str_buffer.append(feature.name); try feature_str_buffer.append(","); } diff --git a/lib/std/target.zig b/lib/std/target.zig index 2566a9be372c6099dad62ede9d0eb6fcc2c5cf1d..f5ef5802d653eecc3d35861b4c6099ddee24bd0d 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -172,6 +172,48 @@ pub const Target = union(enum) { r6, }; + pub fn subArchFeature(arch: Arch) ?u8 { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) { + .v8_5a => @enumToInt(arm.Feature.armv8_5_a), + .v8_4a => @enumToInt(arm.Feature.armv8_4_a), + .v8_3a => @enumToInt(arm.Feature.armv8_3_a), + .v8_2a => @enumToInt(arm.Feature.armv8_2_a), + .v8_1a => @enumToInt(arm.Feature.armv8_1_a), + .v8 => @enumToInt(arm.Feature.armv8_a), + .v8r => @enumToInt(arm.Feature.armv8_r), + .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base), + .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main), + .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main), + .v7 => @enumToInt(arm.Feature.armv7_a), + .v7em => @enumToInt(arm.Feature.armv7e_m), + .v7m => @enumToInt(arm.Feature.armv7_m), + .v7s => @enumToInt(arm.Feature.armv7s), + .v7k => @enumToInt(arm.Feature.armv7k), + .v7ve => @enumToInt(arm.Feature.armv7ve), + .v6 => @enumToInt(arm.Feature.armv6), + .v6m => @enumToInt(arm.Feature.armv6_m), + .v6k => @enumToInt(arm.Feature.armv6k), + .v6t2 => @enumToInt(arm.Feature.armv6t2), + .v5 => @enumToInt(arm.Feature.armv5t), + .v5te => @enumToInt(arm.Feature.armv5te), + .v4t => @enumToInt(arm.Feature.armv4t), + }, + .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) { + .v8_5a => @enumToInt(aarch64.Feature.v8_5a), + .v8_4a => @enumToInt(aarch64.Feature.v8_4a), + .v8_3a => @enumToInt(aarch64.Feature.v8_3a), + .v8_2a => @enumToInt(aarch64.Feature.v8_2a), + .v8_1a => @enumToInt(aarch64.Feature.v8_1a), + .v8 => @enumToInt(aarch64.Feature.v8_1a), + .v8r => @enumToInt(aarch64.Feature.v8_1a), + .v8m_baseline => @enumToInt(aarch64.Feature.v8_1a), + .v8m_mainline => @enumToInt(aarch64.Feature.v8_1a), + }, + else => return null, + }; + } + pub fn isARM(arch: Arch) bool { return switch (arch) { .arm, .armeb => true, @@ -219,7 +261,7 @@ pub const Target = union(enum) { pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set { // Here we compute both and choose the correct result at the end, based // on whether or not we saw + and - signs. - var whitelist_set = Cpu.Feature.Set.empty(); + var whitelist_set = Cpu.Feature.Set.empty; var baseline_set = arch.baselineFeatures(); var mode: enum { unknown, @@ -256,16 +298,18 @@ pub const Target = union(enum) { op = .add; feature_name = item_text; } - for (arch.allFeaturesList()) |feature, index| { + const all_features = arch.allFeaturesList(); + for (all_features) |feature, index_usize| { + const index = @intCast(Cpu.Feature.Set.Index, index_usize); if (mem.eql(u8, feature_name, feature.name)) { switch (op) { .add => { - baseline_set.addFeature(@intCast(u8, index)); - whitelist_set.addFeature(@intCast(u8, index)); + baseline_set.addFeature(index, all_features); + whitelist_set.addFeature(index, all_features); }, .sub => { - baseline_set.removeFeature(@intCast(u8, index)); - whitelist_set.removeFeature(@intCast(u8, index)); + baseline_set.removeFeature(index, all_features); + whitelist_set.removeFeature(index, all_features); }, } break; @@ -462,7 +506,7 @@ pub const Target = union(enum) { .nvptx, .nvptx64 => nvptx.cpu.sm_20.features, .wasm32, .wasm64 => wasm.cpu.generic.features, - else => Cpu.Feature.Set.empty(), + else => Cpu.Feature.Set.empty, }; } @@ -521,48 +565,130 @@ pub const Target = union(enum) { features: Feature.Set, pub const Feature = struct { - /// The bit index into `Set`. - index: u8, - name: []const u8, + /// The bit index into `Set`. Has a default value of `undefined` because the canonical + /// structures are populated via comptime logic. + index: Set.Index = undefined, + + /// Has a default value of `undefined` because the canonical + /// structures are populated via comptime logic. + name: []const u8 = undefined, + + /// If this corresponds to an LLVM-recognized feature, this will be populated; + /// otherwise null. llvm_name: ?[:0]const u8, + + /// Human-friendly UTF-8 text. description: []const u8, - dependencies: Set, + + /// `Set` of all features this depends on, and this feature itself. + /// Can be "or"ed with another set to remove this feature and all + /// its dependencies. + /// Has a default value of `undefined` because the canonical + /// structures are populated via comptime logic. + dependencies: Set = undefined, /// A bit set of all the features. pub const Set = struct { - bytes: [bit_count / 8]u8, + ints: [usize_count]usize, - pub const bit_count = 22 * 8; + pub const needed_bit_count = 174; + pub const byte_count = (needed_bit_count + 7) / 8; + pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize); + pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize))); + pub const ShiftInt = std.math.Log2Int(usize); - pub fn empty() Set { - return .{ .bytes = [1]u8{0} ** 22 }; + pub const empty = Set{ .ints = [1]usize{0} ** usize_count }; + + pub fn isEnabled(set: Set, arch_feature_index: Index) bool { + const usize_index = arch_feature_index / @bitSizeOf(usize); + const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize)); + return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0; + } + + /// Adds the specified feature and all its dependencies to the set. O(1). + pub fn addFeature( + set: *Set, + arch_feature_index: Index, + all_features_list: []const Cpu.Feature, + ) void { + set.ints = @as(@Vector(usize_count, usize), set.ints) | + @as(@Vector(usize_count, usize), all_features_list[arch_feature_index].dependencies.ints); + } + + /// Removes the specified feature (TODO and all its dependents) from the set. O(1). + /// TODO improve this function to actually handle dependants rather than just calling + /// `removeSparseFeature`. + pub fn removeFeature( + set: *Set, + arch_feature_index: Index, + all_features_list: []const Cpu.Feature, + ) void { + set.removeSparseFeature(arch_feature_index); + } + + /// Adds the specified feature but not its dependencies. + pub fn addSparseFeature(set: *Set, arch_feature_index: Index) void { + const usize_index = arch_feature_index / @bitSizeOf(usize); + const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize)); + set.ints[usize_index] |= @as(usize, 1) << bit_index; } - pub fn isEnabled(set: Set, arch_feature_index: u8) bool { - const byte_index = arch_feature_index / 8; - const bit_index = @intCast(u3, arch_feature_index % 8); - return (set.bytes[byte_index] & (@as(u8, 1) << bit_index)) != 0; + /// Removes the specified feature but not its dependents. + pub fn removeSparseFeature(set: *Set, arch_feature_index: Index) void { + const usize_index = arch_feature_index / @bitSizeOf(usize); + const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize)); + set.ints[usize_index] &= ~(@as(usize, 1) << bit_index); } - pub fn addFeature(set: *Set, arch_feature_index: u8) void { - const byte_index = arch_feature_index / 8; - const bit_index = @intCast(u3, arch_feature_index % 8); - set.bytes[byte_index] |= @as(u8, 1) << bit_index; + pub fn initAsDependencies( + set: *Set, + arch_feature_index: Index, + all_features_list: []const Cpu.Feature, + ) void { + // fast-case to help reduce how much comptime code must execute + const no_deps = for (set.ints) |elem| { + if (elem != 0) break false; + } else true; + // add itself to its own dependencies for easy "or"ing later + set.addSparseFeature(arch_feature_index); + if (no_deps) return; + + var old = set.ints; + while (true) { + for (all_features_list) |feature, index| { + const casted_index = @intCast(Index, index); + if (set.isEnabled(casted_index)) { + set.addFeature(casted_index, all_features_list); + } + } + const nothing_changed = mem.eql(usize, &old, &set.ints); + if (nothing_changed) return; + old = set.ints; + } } - pub fn removeFeature(set: *Set, arch_feature_index: u8) void { - const byte_index = arch_feature_index / 8; - const bit_index = @intCast(u3, arch_feature_index % 8); - set.bytes[byte_index] &= ~(@as(u8, 1) << bit_index); + pub fn asBytes(set: *const Set) *const [byte_count]u8 { + return @ptrCast(*const [byte_count]u8, &set.ints); } }; pub fn feature_set_fns(comptime F: type) type { return struct { - pub fn featureSet(features: []const F) Set { - var x = Set.empty(); + /// Populates a set with the list of features and all their dependencies included. + pub fn featureSet(all_features_list: []const Feature, features: []const F) Set { + var x: Set = Set.empty; for (features) |feature| { - x.addFeature(@enumToInt(feature)); + x.addFeature(@enumToInt(feature), all_features_list); + } + @compileLog(Set.empty); + return x; + } + + /// Populates only the feature bits specified. + pub fn sparseFeatureSet(features: []const F) Set { + var x = Set.empty; + for (features) |feature| { + x.addSparseFeature(@enumToInt(feature)); } return x; } diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 980465bb20831596ff72d24913194ba257e3abb2..3ddec8229855af6b0b0dc3a6f9a5ba3ceb2bf9e3 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -153,15 +153,14 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.a35)] = .{ - .index = @enumToInt(Feature.a35), - .name = @tagName(Feature.a35), .llvm_name = "a35", .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -170,11 +169,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a53)] = .{ - .index = @enumToInt(Feature.a53), - .name = @tagName(Feature.a53), .llvm_name = "a53", .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .balance_fp_ops, .crc, .crypto, @@ -188,11 +185,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a55)] = .{ - .index = @enumToInt(Feature.a55), - .name = @tagName(Feature.a55), .llvm_name = "a55", .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -205,11 +200,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a57)] = .{ - .index = @enumToInt(Feature.a57), - .name = @tagName(Feature.a57), .llvm_name = "a57", .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .balance_fp_ops, .crc, .crypto, @@ -224,11 +217,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a72)] = .{ - .index = @enumToInt(Feature.a72), - .name = @tagName(Feature.a72), .llvm_name = "a72", .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -238,11 +229,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a73)] = .{ - .index = @enumToInt(Feature.a73), - .name = @tagName(Feature.a73), .llvm_name = "a73", .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -252,11 +241,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a75)] = .{ - .index = @enumToInt(Feature.a75), - .name = @tagName(Feature.a75), .llvm_name = "a75", .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -269,11 +256,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.a76)] = .{ - .index = @enumToInt(Feature.a76), - .name = @tagName(Feature.a76), .llvm_name = "a76", .description = "Cortex-A76 ARM processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -285,194 +270,142 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.aes)] = .{ - .index = @enumToInt(Feature.aes), - .name = @tagName(Feature.aes), .llvm_name = "aes", .description = "Enable AES support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.aggressive_fma)] = .{ - .index = @enumToInt(Feature.aggressive_fma), - .name = @tagName(Feature.aggressive_fma), .llvm_name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{ - .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern), - .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern), .llvm_name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altnzcv)] = .{ - .index = @enumToInt(Feature.altnzcv), - .name = @tagName(Feature.altnzcv), .llvm_name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.am)] = .{ - .index = @enumToInt(Feature.am), - .name = @tagName(Feature.am), .llvm_name = "am", .description = "Enable v8.4-A Activity Monitors extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_bcc_fusion)] = .{ - .index = @enumToInt(Feature.arith_bcc_fusion), - .name = @tagName(Feature.arith_bcc_fusion), .llvm_name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_cbz_fusion)] = .{ - .index = @enumToInt(Feature.arith_cbz_fusion), - .name = @tagName(Feature.arith_cbz_fusion), .llvm_name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.balance_fp_ops)] = .{ - .index = @enumToInt(Feature.balance_fp_ops), - .name = @tagName(Feature.balance_fp_ops), .llvm_name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bti)] = .{ - .index = @enumToInt(Feature.bti), - .name = @tagName(Feature.bti), .llvm_name = "bti", .description = "Enable Branch Target Identification", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x10)] = .{ - .index = @enumToInt(Feature.call_saved_x10), - .name = @tagName(Feature.call_saved_x10), .llvm_name = "call-saved-x10", .description = "Make X10 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x11)] = .{ - .index = @enumToInt(Feature.call_saved_x11), - .name = @tagName(Feature.call_saved_x11), .llvm_name = "call-saved-x11", .description = "Make X11 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x12)] = .{ - .index = @enumToInt(Feature.call_saved_x12), - .name = @tagName(Feature.call_saved_x12), .llvm_name = "call-saved-x12", .description = "Make X12 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x13)] = .{ - .index = @enumToInt(Feature.call_saved_x13), - .name = @tagName(Feature.call_saved_x13), .llvm_name = "call-saved-x13", .description = "Make X13 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x14)] = .{ - .index = @enumToInt(Feature.call_saved_x14), - .name = @tagName(Feature.call_saved_x14), .llvm_name = "call-saved-x14", .description = "Make X14 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x15)] = .{ - .index = @enumToInt(Feature.call_saved_x15), - .name = @tagName(Feature.call_saved_x15), .llvm_name = "call-saved-x15", .description = "Make X15 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x18)] = .{ - .index = @enumToInt(Feature.call_saved_x18), - .name = @tagName(Feature.call_saved_x18), .llvm_name = "call-saved-x18", .description = "Make X18 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x8)] = .{ - .index = @enumToInt(Feature.call_saved_x8), - .name = @tagName(Feature.call_saved_x8), .llvm_name = "call-saved-x8", .description = "Make X8 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x9)] = .{ - .index = @enumToInt(Feature.call_saved_x9), - .name = @tagName(Feature.call_saved_x9), .llvm_name = "call-saved-x9", .description = "Make X9 callee saved.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccdp)] = .{ - .index = @enumToInt(Feature.ccdp), - .name = @tagName(Feature.ccdp), .llvm_name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccidx)] = .{ - .index = @enumToInt(Feature.ccidx), - .name = @tagName(Feature.ccidx), .llvm_name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccpp)] = .{ - .index = @enumToInt(Feature.ccpp), - .name = @tagName(Feature.ccpp), .llvm_name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.complxnum)] = .{ - .index = @enumToInt(Feature.complxnum), - .name = @tagName(Feature.complxnum), .llvm_name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.crc)] = .{ - .index = @enumToInt(Feature.crc), - .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ - .index = @enumToInt(Feature.crypto), - .name = @tagName(Feature.crypto), .llvm_name = "crypto", .description = "Enable cryptographic instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aes, .neon, .sha2, }), }; result[@enumToInt(Feature.custom_cheap_as_move)] = .{ - .index = @enumToInt(Feature.custom_cheap_as_move), - .name = @tagName(Feature.custom_cheap_as_move), .llvm_name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cyclone)] = .{ - .index = @enumToInt(Feature.cyclone), - .name = @tagName(Feature.cyclone), .llvm_name = "cyclone", .description = "Cyclone", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .alternate_sextload_cvt_f32_pattern, .arith_bcc_fusion, .arith_cbz_fusion, @@ -489,41 +422,31 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ - .index = @enumToInt(Feature.disable_latency_sched_heuristic), - .name = @tagName(Feature.disable_latency_sched_heuristic), .llvm_name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dit)] = .{ - .index = @enumToInt(Feature.dit), - .name = @tagName(Feature.dit), .llvm_name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ - .index = @enumToInt(Feature.dotprod), - .name = @tagName(Feature.dotprod), .llvm_name = "dotprod", .description = "Enable dot product support", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos_cheap_as_move)] = .{ - .index = @enumToInt(Feature.exynos_cheap_as_move), - .name = @tagName(Feature.exynos_cheap_as_move), .llvm_name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .custom_cheap_as_move, }), }; result[@enumToInt(Feature.exynosm1)] = .{ - .index = @enumToInt(Feature.exynosm1), - .name = @tagName(Feature.exynosm1), .llvm_name = "exynosm1", .description = "Samsung Exynos-M1 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -538,11 +461,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.exynosm2)] = .{ - .index = @enumToInt(Feature.exynosm2), - .name = @tagName(Feature.exynosm2), .llvm_name = "exynosm2", .description = "Samsung Exynos-M2 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -556,11 +477,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.exynosm3)] = .{ - .index = @enumToInt(Feature.exynosm3), - .name = @tagName(Feature.exynosm3), .llvm_name = "exynosm3", .description = "Samsung Exynos-M3 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -577,11 +496,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.exynosm4)] = .{ - .index = @enumToInt(Feature.exynosm4), - .name = @tagName(Feature.exynosm4), .llvm_name = "exynosm4", .description = "Samsung Exynos-M4 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .arith_bcc_fusion, .arith_cbz_fusion, .crypto, @@ -602,11 +519,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.falkor)] = .{ - .index = @enumToInt(Feature.falkor), - .name = @tagName(Feature.falkor), .llvm_name = "falkor", .description = "Qualcomm Falkor processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .custom_cheap_as_move, @@ -622,108 +537,80 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.fmi)] = .{ - .index = @enumToInt(Feature.fmi), - .name = @tagName(Feature.fmi), .llvm_name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ - .index = @enumToInt(Feature.force_32bit_jump_tables), - .name = @tagName(Feature.force_32bit_jump_tables), .llvm_name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_armv8)] = .{ - .index = @enumToInt(Feature.fp_armv8), - .name = @tagName(Feature.fp_armv8), .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ - .index = @enumToInt(Feature.fp16fml), - .name = @tagName(Feature.fp16fml), .llvm_name = "fp16fml", .description = "Enable FP16 FML instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fullfp16, }), }; result[@enumToInt(Feature.fptoint)] = .{ - .index = @enumToInt(Feature.fptoint), - .name = @tagName(Feature.fptoint), .llvm_name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fullfp16)] = .{ - .index = @enumToInt(Feature.fullfp16), - .name = @tagName(Feature.fullfp16), .llvm_name = "fullfp16", .description = "Full FP16", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.fuse_address)] = .{ - .index = @enumToInt(Feature.fuse_address), - .name = @tagName(Feature.fuse_address), .llvm_name = "fuse-address", .description = "CPU fuses address generation and memory operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_aes)] = .{ - .index = @enumToInt(Feature.fuse_aes), - .name = @tagName(Feature.fuse_aes), .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_arith_logic)] = .{ - .index = @enumToInt(Feature.fuse_arith_logic), - .name = @tagName(Feature.fuse_arith_logic), .llvm_name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_crypto_eor)] = .{ - .index = @enumToInt(Feature.fuse_crypto_eor), - .name = @tagName(Feature.fuse_crypto_eor), .llvm_name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_csel)] = .{ - .index = @enumToInt(Feature.fuse_csel), - .name = @tagName(Feature.fuse_csel), .llvm_name = "fuse-csel", .description = "CPU fuses conditional select operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ - .index = @enumToInt(Feature.fuse_literals), - .name = @tagName(Feature.fuse_literals), .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jsconv)] = .{ - .index = @enumToInt(Feature.jsconv), - .name = @tagName(Feature.jsconv), .llvm_name = "jsconv", .description = "Enable v8.3-A JavaScript FP conversion enchancement", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.kryo)] = .{ - .index = @enumToInt(Feature.kryo), - .name = @tagName(Feature.kryo), .llvm_name = "kryo", .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .custom_cheap_as_move, @@ -737,327 +624,237 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.lor)] = .{ - .index = @enumToInt(Feature.lor), - .name = @tagName(Feature.lor), .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lse)] = .{ - .index = @enumToInt(Feature.lse), - .name = @tagName(Feature.lse), .llvm_name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lsl_fast)] = .{ - .index = @enumToInt(Feature.lsl_fast), - .name = @tagName(Feature.lsl_fast), .llvm_name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpam)] = .{ - .index = @enumToInt(Feature.mpam), - .name = @tagName(Feature.mpam), .llvm_name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mte)] = .{ - .index = @enumToInt(Feature.mte), - .name = @tagName(Feature.mte), .llvm_name = "mte", .description = "Enable Memory Tagging Extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ - .index = @enumToInt(Feature.neon), - .name = @tagName(Feature.neon), .llvm_name = "neon", .description = "Enable Advanced SIMD instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.no_neg_immediates)] = .{ - .index = @enumToInt(Feature.no_neg_immediates), - .name = @tagName(Feature.no_neg_immediates), .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nv)] = .{ - .index = @enumToInt(Feature.nv), - .name = @tagName(Feature.nv), .llvm_name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pa)] = .{ - .index = @enumToInt(Feature.pa), - .name = @tagName(Feature.pa), .llvm_name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan)] = .{ - .index = @enumToInt(Feature.pan), - .name = @tagName(Feature.pan), .llvm_name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan_rwv)] = .{ - .index = @enumToInt(Feature.pan_rwv), - .name = @tagName(Feature.pan_rwv), .llvm_name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .pan, }), }; result[@enumToInt(Feature.perfmon)] = .{ - .index = @enumToInt(Feature.perfmon), - .name = @tagName(Feature.perfmon), .llvm_name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predictable_select_expensive)] = .{ - .index = @enumToInt(Feature.predictable_select_expensive), - .name = @tagName(Feature.predictable_select_expensive), .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predres)] = .{ - .index = @enumToInt(Feature.predres), - .name = @tagName(Feature.predres), .llvm_name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rand)] = .{ - .index = @enumToInt(Feature.rand), - .name = @tagName(Feature.rand), .llvm_name = "rand", .description = "Enable Random Number generation instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ - .index = @enumToInt(Feature.ras), - .name = @tagName(Feature.ras), .llvm_name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rasv8_4)] = .{ - .index = @enumToInt(Feature.rasv8_4), - .name = @tagName(Feature.rasv8_4), .llvm_name = "rasv8_4", .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .ras, }), }; result[@enumToInt(Feature.rcpc)] = .{ - .index = @enumToInt(Feature.rcpc), - .name = @tagName(Feature.rcpc), .llvm_name = "rcpc", .description = "Enable support for RCPC extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rcpc_immo)] = .{ - .index = @enumToInt(Feature.rcpc_immo), - .name = @tagName(Feature.rcpc_immo), .llvm_name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .rcpc, }), }; result[@enumToInt(Feature.rdm)] = .{ - .index = @enumToInt(Feature.rdm), - .name = @tagName(Feature.rdm), .llvm_name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x1)] = .{ - .index = @enumToInt(Feature.reserve_x1), - .name = @tagName(Feature.reserve_x1), .llvm_name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x10)] = .{ - .index = @enumToInt(Feature.reserve_x10), - .name = @tagName(Feature.reserve_x10), .llvm_name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x11)] = .{ - .index = @enumToInt(Feature.reserve_x11), - .name = @tagName(Feature.reserve_x11), .llvm_name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x12)] = .{ - .index = @enumToInt(Feature.reserve_x12), - .name = @tagName(Feature.reserve_x12), .llvm_name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x13)] = .{ - .index = @enumToInt(Feature.reserve_x13), - .name = @tagName(Feature.reserve_x13), .llvm_name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x14)] = .{ - .index = @enumToInt(Feature.reserve_x14), - .name = @tagName(Feature.reserve_x14), .llvm_name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x15)] = .{ - .index = @enumToInt(Feature.reserve_x15), - .name = @tagName(Feature.reserve_x15), .llvm_name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x18)] = .{ - .index = @enumToInt(Feature.reserve_x18), - .name = @tagName(Feature.reserve_x18), .llvm_name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x2)] = .{ - .index = @enumToInt(Feature.reserve_x2), - .name = @tagName(Feature.reserve_x2), .llvm_name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x20)] = .{ - .index = @enumToInt(Feature.reserve_x20), - .name = @tagName(Feature.reserve_x20), .llvm_name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x21)] = .{ - .index = @enumToInt(Feature.reserve_x21), - .name = @tagName(Feature.reserve_x21), .llvm_name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x22)] = .{ - .index = @enumToInt(Feature.reserve_x22), - .name = @tagName(Feature.reserve_x22), .llvm_name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x23)] = .{ - .index = @enumToInt(Feature.reserve_x23), - .name = @tagName(Feature.reserve_x23), .llvm_name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x24)] = .{ - .index = @enumToInt(Feature.reserve_x24), - .name = @tagName(Feature.reserve_x24), .llvm_name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x25)] = .{ - .index = @enumToInt(Feature.reserve_x25), - .name = @tagName(Feature.reserve_x25), .llvm_name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x26)] = .{ - .index = @enumToInt(Feature.reserve_x26), - .name = @tagName(Feature.reserve_x26), .llvm_name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x27)] = .{ - .index = @enumToInt(Feature.reserve_x27), - .name = @tagName(Feature.reserve_x27), .llvm_name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x28)] = .{ - .index = @enumToInt(Feature.reserve_x28), - .name = @tagName(Feature.reserve_x28), .llvm_name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x3)] = .{ - .index = @enumToInt(Feature.reserve_x3), - .name = @tagName(Feature.reserve_x3), .llvm_name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x4)] = .{ - .index = @enumToInt(Feature.reserve_x4), - .name = @tagName(Feature.reserve_x4), .llvm_name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x5)] = .{ - .index = @enumToInt(Feature.reserve_x5), - .name = @tagName(Feature.reserve_x5), .llvm_name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x6)] = .{ - .index = @enumToInt(Feature.reserve_x6), - .name = @tagName(Feature.reserve_x6), .llvm_name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x7)] = .{ - .index = @enumToInt(Feature.reserve_x7), - .name = @tagName(Feature.reserve_x7), .llvm_name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x9)] = .{ - .index = @enumToInt(Feature.reserve_x9), - .name = @tagName(Feature.reserve_x9), .llvm_name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.saphira)] = .{ - .index = @enumToInt(Feature.saphira), - .name = @tagName(Feature.saphira), .llvm_name = "saphira", .description = "Qualcomm Saphira processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crypto, .custom_cheap_as_move, .fp_armv8, @@ -1072,157 +869,119 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.sb)] = .{ - .index = @enumToInt(Feature.sb), - .name = @tagName(Feature.sb), .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sel2)] = .{ - .index = @enumToInt(Feature.sel2), - .name = @tagName(Feature.sel2), .llvm_name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ - .index = @enumToInt(Feature.sha2), - .name = @tagName(Feature.sha2), .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.sha3)] = .{ - .index = @enumToInt(Feature.sha3), - .name = @tagName(Feature.sha3), .llvm_name = "sha3", .description = "Enable SHA512 and SHA3 support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, .sha2, }), }; result[@enumToInt(Feature.slow_misaligned_128store)] = .{ - .index = @enumToInt(Feature.slow_misaligned_128store), - .name = @tagName(Feature.slow_misaligned_128store), .llvm_name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_paired_128)] = .{ - .index = @enumToInt(Feature.slow_paired_128), - .name = @tagName(Feature.slow_paired_128), .llvm_name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_strqro_store)] = .{ - .index = @enumToInt(Feature.slow_strqro_store), - .name = @tagName(Feature.slow_strqro_store), .llvm_name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm4)] = .{ - .index = @enumToInt(Feature.sm4), - .name = @tagName(Feature.sm4), .llvm_name = "sm4", .description = "Enable SM3 and SM4 support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.spe)] = .{ - .index = @enumToInt(Feature.spe), - .name = @tagName(Feature.spe), .llvm_name = "spe", .description = "Enable Statistical Profiling extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.specrestrict)] = .{ - .index = @enumToInt(Feature.specrestrict), - .name = @tagName(Feature.specrestrict), .llvm_name = "specrestrict", .description = "Enable architectural speculation restriction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ssbs)] = .{ - .index = @enumToInt(Feature.ssbs), - .name = @tagName(Feature.ssbs), .llvm_name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.strict_align)] = .{ - .index = @enumToInt(Feature.strict_align), - .name = @tagName(Feature.strict_align), .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve)] = .{ - .index = @enumToInt(Feature.sve), - .name = @tagName(Feature.sve), .llvm_name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve2)] = .{ - .index = @enumToInt(Feature.sve2), - .name = @tagName(Feature.sve2), .llvm_name = "sve2", .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sve, }), }; result[@enumToInt(Feature.sve2_aes)] = .{ - .index = @enumToInt(Feature.sve2_aes), - .name = @tagName(Feature.sve2_aes), .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aes, .sve2, }), }; result[@enumToInt(Feature.sve2_bitperm)] = .{ - .index = @enumToInt(Feature.sve2_bitperm), - .name = @tagName(Feature.sve2_bitperm), .llvm_name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sve2, }), }; result[@enumToInt(Feature.sve2_sha3)] = .{ - .index = @enumToInt(Feature.sve2_sha3), - .name = @tagName(Feature.sve2_sha3), .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sha3, .sve2, }), }; result[@enumToInt(Feature.sve2_sm4)] = .{ - .index = @enumToInt(Feature.sve2_sm4), - .name = @tagName(Feature.sve2_sm4), .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sm4, .sve2, }), }; result[@enumToInt(Feature.thunderx)] = .{ - .index = @enumToInt(Feature.thunderx), - .name = @tagName(Feature.thunderx), .llvm_name = "thunderx", .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1233,11 +992,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.thunderx2t99)] = .{ - .index = @enumToInt(Feature.thunderx2t99), - .name = @tagName(Feature.thunderx2t99), .llvm_name = "thunderx2t99", .description = "Cavium ThunderX2 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aggressive_fma, .arith_bcc_fusion, .crc, @@ -1251,11 +1008,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.thunderxt81)] = .{ - .index = @enumToInt(Feature.thunderxt81), - .name = @tagName(Feature.thunderxt81), .llvm_name = "thunderxt81", .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1266,11 +1021,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.thunderxt83)] = .{ - .index = @enumToInt(Feature.thunderxt83), - .name = @tagName(Feature.thunderxt83), .llvm_name = "thunderxt83", .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1281,11 +1034,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.thunderxt88)] = .{ - .index = @enumToInt(Feature.thunderxt88), - .name = @tagName(Feature.thunderxt88), .llvm_name = "thunderxt88", .description = "Cavium ThunderX processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1296,46 +1047,34 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.tlb_rmi)] = .{ - .index = @enumToInt(Feature.tlb_rmi), - .name = @tagName(Feature.tlb_rmi), .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el1)] = .{ - .index = @enumToInt(Feature.tpidr_el1), - .name = @tagName(Feature.tpidr_el1), .llvm_name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el2)] = .{ - .index = @enumToInt(Feature.tpidr_el2), - .name = @tagName(Feature.tpidr_el2), .llvm_name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el3)] = .{ - .index = @enumToInt(Feature.tpidr_el3), - .name = @tagName(Feature.tpidr_el3), .llvm_name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tracev8_4)] = .{ - .index = @enumToInt(Feature.tracev8_4), - .name = @tagName(Feature.tracev8_4), .llvm_name = "tracev8.4", .description = "Enable v8.4-A Trace extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tsv110)] = .{ - .index = @enumToInt(Feature.tsv110), - .name = @tagName(Feature.tsv110), .llvm_name = "tsv110", .description = "HiSilicon TS-V110 processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crypto, .custom_cheap_as_move, .dotprod, @@ -1351,39 +1090,29 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.uaops)] = .{ - .index = @enumToInt(Feature.uaops), - .name = @tagName(Feature.uaops), .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ - .index = @enumToInt(Feature.use_aa), - .name = @tagName(Feature.use_aa), .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_postra_scheduler)] = .{ - .index = @enumToInt(Feature.use_postra_scheduler), - .name = @tagName(Feature.use_postra_scheduler), .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_reciprocal_square_root)] = .{ - .index = @enumToInt(Feature.use_reciprocal_square_root), - .name = @tagName(Feature.use_reciprocal_square_root), .llvm_name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8_1a)] = .{ - .index = @enumToInt(Feature.v8_1a), - .name = @tagName(Feature.v8_1a), .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .lor, .lse, @@ -1393,11 +1122,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.v8_2a)] = .{ - .index = @enumToInt(Feature.v8_2a), - .name = @tagName(Feature.v8_2a), .llvm_name = "v8.2a", .description = "Support ARM v8.2a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .ccpp, .pan_rwv, .ras, @@ -1406,11 +1133,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.v8_3a)] = .{ - .index = @enumToInt(Feature.v8_3a), - .name = @tagName(Feature.v8_3a), .llvm_name = "v8.3a", .description = "Support ARM v8.3a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .ccidx, .complxnum, .jsconv, @@ -1420,11 +1145,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.v8_4a)] = .{ - .index = @enumToInt(Feature.v8_4a), - .name = @tagName(Feature.v8_4a), .llvm_name = "v8.4a", .description = "Support ARM v8.4a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .am, .dit, .dotprod, @@ -1440,11 +1163,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.v8_5a)] = .{ - .index = @enumToInt(Feature.v8_5a), - .name = @tagName(Feature.v8_5a), .llvm_name = "v8.5a", .description = "Support ARM v8.5a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .altnzcv, .bti, .ccdp, @@ -1457,50 +1178,44 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.vh)] = .{ - .index = @enumToInt(Feature.vh), - .name = @tagName(Feature.vh), .llvm_name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcm)] = .{ - .index = @enumToInt(Feature.zcm), - .name = @tagName(Feature.zcm), .llvm_name = "zcm", .description = "Has zero-cycle register moves", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz)] = .{ - .index = @enumToInt(Feature.zcz), - .name = @tagName(Feature.zcz), .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .zcz_fp, .zcz_gp, }), }; result[@enumToInt(Feature.zcz_fp)] = .{ - .index = @enumToInt(Feature.zcz_fp), - .name = @tagName(Feature.zcz_fp), .llvm_name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_fp_workaround)] = .{ - .index = @enumToInt(Feature.zcz_fp_workaround), - .name = @tagName(Feature.zcz_fp_workaround), .llvm_name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_gp)] = .{ - .index = @enumToInt(Feature.zcz_gp), - .name = @tagName(Feature.zcz_gp), .llvm_name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -1508,126 +1223,126 @@ pub const cpu = struct { pub const apple_latest = Cpu{ .name = "apple_latest", .llvm_name = "apple-latest", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cyclone, }), }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a35, }), }; pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a53, }), }; pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a55, }), }; pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a57, }), }; pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a72, }), }; pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a73, }), }; pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a75, }), }; pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a76, }), }; pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a76, }), }; pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cyclone, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .exynosm1, }), }; pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .exynosm2, }), }; pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .exynosm3, }), }; pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .exynosm4, }), }; pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .exynosm4, }), }; pub const falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .falkor, }), }; pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fp_armv8, .fuse_aes, .neon, @@ -1638,56 +1353,56 @@ pub const cpu = struct { pub const kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .kryo, }), }; pub const saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .saphira, }), }; pub const thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .thunderx, }), }; pub const thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .thunderx2t99, }), }; pub const thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .thunderxt81, }), }; pub const thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .thunderxt83, }), }; pub const thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .thunderxt88, }), }; pub const tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .tsv110, }), }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index b1953ca83e5fdc7bcff570f0b152bfed3e3993ea..54bd073c2c0a4551596f259371b58d03f5423a52 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -114,281 +114,206 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"16_bit_insts")] = .{ - .index = @enumToInt(Feature.@"16_bit_insts"), - .name = @tagName(Feature.@"16_bit_insts"), .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.DumpCode)] = .{ - .index = @enumToInt(Feature.DumpCode), - .name = @tagName(Feature.DumpCode), .llvm_name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.add_no_carry_insts)] = .{ - .index = @enumToInt(Feature.add_no_carry_insts), - .name = @tagName(Feature.add_no_carry_insts), .llvm_name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aperture_regs)] = .{ - .index = @enumToInt(Feature.aperture_regs), - .name = @tagName(Feature.aperture_regs), .llvm_name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.atomic_fadd_insts)] = .{ - .index = @enumToInt(Feature.atomic_fadd_insts), - .name = @tagName(Feature.atomic_fadd_insts), .llvm_name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{ - .index = @enumToInt(Feature.auto_waitcnt_before_barrier), - .name = @tagName(Feature.auto_waitcnt_before_barrier), .llvm_name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ci_insts)] = .{ - .index = @enumToInt(Feature.ci_insts), - .name = @tagName(Feature.ci_insts), .llvm_name = "ci-insts", .description = "Additional instructions for CI+", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.code_object_v3)] = .{ - .index = @enumToInt(Feature.code_object_v3), - .name = @tagName(Feature.code_object_v3), .llvm_name = "code-object-v3", .description = "Generate code object version 3", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cumode)] = .{ - .index = @enumToInt(Feature.cumode), - .name = @tagName(Feature.cumode), .llvm_name = "cumode", .description = "Enable CU wavefront execution mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dl_insts)] = .{ - .index = @enumToInt(Feature.dl_insts), - .name = @tagName(Feature.dl_insts), .llvm_name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot1_insts)] = .{ - .index = @enumToInt(Feature.dot1_insts), - .name = @tagName(Feature.dot1_insts), .llvm_name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot2_insts)] = .{ - .index = @enumToInt(Feature.dot2_insts), - .name = @tagName(Feature.dot2_insts), .llvm_name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot3_insts)] = .{ - .index = @enumToInt(Feature.dot3_insts), - .name = @tagName(Feature.dot3_insts), .llvm_name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot4_insts)] = .{ - .index = @enumToInt(Feature.dot4_insts), - .name = @tagName(Feature.dot4_insts), .llvm_name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot5_insts)] = .{ - .index = @enumToInt(Feature.dot5_insts), - .name = @tagName(Feature.dot5_insts), .llvm_name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot6_insts)] = .{ - .index = @enumToInt(Feature.dot6_insts), - .name = @tagName(Feature.dot6_insts), .llvm_name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp)] = .{ - .index = @enumToInt(Feature.dpp), - .name = @tagName(Feature.dpp), .llvm_name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp8)] = .{ - .index = @enumToInt(Feature.dpp8), - .name = @tagName(Feature.dpp8), .llvm_name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dumpcode)] = .{ - .index = @enumToInt(Feature.dumpcode), - .name = @tagName(Feature.dumpcode), .llvm_name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_ds128)] = .{ - .index = @enumToInt(Feature.enable_ds128), - .name = @tagName(Feature.enable_ds128), .llvm_name = "enable-ds128", .description = "Use ds_read|write_b128", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_prt_strict_null)] = .{ - .index = @enumToInt(Feature.enable_prt_strict_null), - .name = @tagName(Feature.enable_prt_strict_null), .llvm_name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_fmaf)] = .{ - .index = @enumToInt(Feature.fast_fmaf), - .name = @tagName(Feature.fast_fmaf), .llvm_name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_address_space)] = .{ - .index = @enumToInt(Feature.flat_address_space), - .name = @tagName(Feature.flat_address_space), .llvm_name = "flat-address-space", .description = "Support flat address space", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_for_global)] = .{ - .index = @enumToInt(Feature.flat_for_global), - .name = @tagName(Feature.flat_for_global), .llvm_name = "flat-for-global", .description = "Force to generate flat instruction for global", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_global_insts)] = .{ - .index = @enumToInt(Feature.flat_global_insts), - .name = @tagName(Feature.flat_global_insts), .llvm_name = "flat-global-insts", .description = "Have global_* flat memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_inst_offsets)] = .{ - .index = @enumToInt(Feature.flat_inst_offsets), - .name = @tagName(Feature.flat_inst_offsets), .llvm_name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_scratch_insts)] = .{ - .index = @enumToInt(Feature.flat_scratch_insts), - .name = @tagName(Feature.flat_scratch_insts), .llvm_name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_segment_offset_bug)] = .{ - .index = @enumToInt(Feature.flat_segment_offset_bug), - .name = @tagName(Feature.flat_segment_offset_bug), .llvm_name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma_mix_insts)] = .{ - .index = @enumToInt(Feature.fma_mix_insts), - .name = @tagName(Feature.fma_mix_insts), .llvm_name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fmaf)] = .{ - .index = @enumToInt(Feature.fmaf), - .name = @tagName(Feature.fmaf), .llvm_name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_exceptions)] = .{ - .index = @enumToInt(Feature.fp_exceptions), - .name = @tagName(Feature.fp_exceptions), .llvm_name = "fp-exceptions", .description = "Enable floating point exceptions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16_denormals)] = .{ - .index = @enumToInt(Feature.fp16_denormals), - .name = @tagName(Feature.fp16_denormals), .llvm_name = "fp16-denormals", .description = "Enable half precision denormal handling", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64_fp16_denormals, }), }; result[@enumToInt(Feature.fp32_denormals)] = .{ - .index = @enumToInt(Feature.fp32_denormals), - .name = @tagName(Feature.fp32_denormals), .llvm_name = "fp32-denormals", .description = "Enable single precision denormal handling", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ - .index = @enumToInt(Feature.fp64), - .name = @tagName(Feature.fp64), .llvm_name = "fp64", .description = "Enable double precision operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64_denormals)] = .{ - .index = @enumToInt(Feature.fp64_denormals), - .name = @tagName(Feature.fp64_denormals), .llvm_name = "fp64-denormals", .description = "Enable double and half precision denormal handling", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, .fp64_fp16_denormals, }), }; result[@enumToInt(Feature.fp64_fp16_denormals)] = .{ - .index = @enumToInt(Feature.fp64_fp16_denormals), - .name = @tagName(Feature.fp64_fp16_denormals), .llvm_name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, }), }; result[@enumToInt(Feature.gcn3_encoding)] = .{ - .index = @enumToInt(Feature.gcn3_encoding), - .name = @tagName(Feature.gcn3_encoding), .llvm_name = "gcn3-encoding", .description = "Encoding format for VI", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx10)] = .{ - .index = @enumToInt(Feature.gfx10), - .name = @tagName(Feature.gfx10), .llvm_name = "gfx10", .description = "GFX10 GPU generation", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"16_bit_insts", .add_no_carry_insts, .aperture_regs, @@ -426,32 +351,24 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.gfx10_insts)] = .{ - .index = @enumToInt(Feature.gfx10_insts), - .name = @tagName(Feature.gfx10_insts), .llvm_name = "gfx10-insts", .description = "Additional instructions for GFX10+", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ - .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts), - .name = @tagName(Feature.gfx7_gfx8_gfx9_insts), .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx8_insts)] = .{ - .index = @enumToInt(Feature.gfx8_insts), - .name = @tagName(Feature.gfx8_insts), .llvm_name = "gfx8-insts", .description = "Additional instructions for GFX8+", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx9)] = .{ - .index = @enumToInt(Feature.gfx9), - .name = @tagName(Feature.gfx9), .llvm_name = "gfx9", .description = "GFX9 GPU generation", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"16_bit_insts", .add_no_carry_insts, .aperture_regs, @@ -485,298 +402,214 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.gfx9_insts)] = .{ - .index = @enumToInt(Feature.gfx9_insts), - .name = @tagName(Feature.gfx9_insts), .llvm_name = "gfx9-insts", .description = "Additional instructions for GFX9+", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.half_rate_64_ops)] = .{ - .index = @enumToInt(Feature.half_rate_64_ops), - .name = @tagName(Feature.half_rate_64_ops), .llvm_name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ - .index = @enumToInt(Feature.inst_fwd_prefetch_bug), - .name = @tagName(Feature.inst_fwd_prefetch_bug), .llvm_name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.int_clamp_insts)] = .{ - .index = @enumToInt(Feature.int_clamp_insts), - .name = @tagName(Feature.int_clamp_insts), .llvm_name = "int-clamp-insts", .description = "Support clamp for integer destination", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{ - .index = @enumToInt(Feature.inv_2pi_inline_imm), - .name = @tagName(Feature.inv_2pi_inline_imm), .llvm_name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{ - .index = @enumToInt(Feature.lds_branch_vmem_war_hazard), - .name = @tagName(Feature.lds_branch_vmem_war_hazard), .llvm_name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_misaligned_bug)] = .{ - .index = @enumToInt(Feature.lds_misaligned_bug), - .name = @tagName(Feature.lds_misaligned_bug), .llvm_name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount16)] = .{ - .index = @enumToInt(Feature.ldsbankcount16), - .name = @tagName(Feature.ldsbankcount16), .llvm_name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount32)] = .{ - .index = @enumToInt(Feature.ldsbankcount32), - .name = @tagName(Feature.ldsbankcount32), .llvm_name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_opt)] = .{ - .index = @enumToInt(Feature.load_store_opt), - .name = @tagName(Feature.load_store_opt), .llvm_name = "load-store-opt", .description = "Enable SI load/store optimizer pass", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize0)] = .{ - .index = @enumToInt(Feature.localmemorysize0), - .name = @tagName(Feature.localmemorysize0), .llvm_name = "localmemorysize0", .description = "The size of local memory in bytes", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize32768)] = .{ - .index = @enumToInt(Feature.localmemorysize32768), - .name = @tagName(Feature.localmemorysize32768), .llvm_name = "localmemorysize32768", .description = "The size of local memory in bytes", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize65536)] = .{ - .index = @enumToInt(Feature.localmemorysize65536), - .name = @tagName(Feature.localmemorysize65536), .llvm_name = "localmemorysize65536", .description = "The size of local memory in bytes", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mad_mix_insts)] = .{ - .index = @enumToInt(Feature.mad_mix_insts), - .name = @tagName(Feature.mad_mix_insts), .llvm_name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mai_insts)] = .{ - .index = @enumToInt(Feature.mai_insts), - .name = @tagName(Feature.mai_insts), .llvm_name = "mai-insts", .description = "Has mAI instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_16)] = .{ - .index = @enumToInt(Feature.max_private_element_size_16), - .name = @tagName(Feature.max_private_element_size_16), .llvm_name = "max-private-element-size-16", .description = "Maximum private access size may be 16", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_4)] = .{ - .index = @enumToInt(Feature.max_private_element_size_4), - .name = @tagName(Feature.max_private_element_size_4), .llvm_name = "max-private-element-size-4", .description = "Maximum private access size may be 4", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_8)] = .{ - .index = @enumToInt(Feature.max_private_element_size_8), - .name = @tagName(Feature.max_private_element_size_8), .llvm_name = "max-private-element-size-8", .description = "Maximum private access size may be 8", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mimg_r128)] = .{ - .index = @enumToInt(Feature.mimg_r128), - .name = @tagName(Feature.mimg_r128), .llvm_name = "mimg-r128", .description = "Support 128-bit texture resources", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movrel)] = .{ - .index = @enumToInt(Feature.movrel), - .name = @tagName(Feature.movrel), .llvm_name = "movrel", .description = "Has v_movrel*_b32 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_data_dep_hazard)] = .{ - .index = @enumToInt(Feature.no_data_dep_hazard), - .name = @tagName(Feature.no_data_dep_hazard), .llvm_name = "no-data-dep-hazard", .description = "Does not need SW waitstates", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sdst_cmpx)] = .{ - .index = @enumToInt(Feature.no_sdst_cmpx), - .name = @tagName(Feature.no_sdst_cmpx), .llvm_name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sram_ecc_support)] = .{ - .index = @enumToInt(Feature.no_sram_ecc_support), - .name = @tagName(Feature.no_sram_ecc_support), .llvm_name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_xnack_support)] = .{ - .index = @enumToInt(Feature.no_xnack_support), - .name = @tagName(Feature.no_xnack_support), .llvm_name = "no-xnack-support", .description = "Hardware does not support XNACK", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_encoding)] = .{ - .index = @enumToInt(Feature.nsa_encoding), - .name = @tagName(Feature.nsa_encoding), .llvm_name = "nsa-encoding", .description = "Support NSA encoding for image instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{ - .index = @enumToInt(Feature.nsa_to_vmem_bug), - .name = @tagName(Feature.nsa_to_vmem_bug), .llvm_name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.offset_3f_bug)] = .{ - .index = @enumToInt(Feature.offset_3f_bug), - .name = @tagName(Feature.offset_3f_bug), .llvm_name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{ - .index = @enumToInt(Feature.pk_fmac_f16_inst), - .name = @tagName(Feature.pk_fmac_f16_inst), .llvm_name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.promote_alloca)] = .{ - .index = @enumToInt(Feature.promote_alloca), - .name = @tagName(Feature.promote_alloca), .llvm_name = "promote-alloca", .description = "Enable promote alloca pass", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r128_a16)] = .{ - .index = @enumToInt(Feature.r128_a16), - .name = @tagName(Feature.r128_a16), .llvm_name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.register_banking)] = .{ - .index = @enumToInt(Feature.register_banking), - .name = @tagName(Feature.register_banking), .llvm_name = "register-banking", .description = "Has register banking", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.s_memrealtime)] = .{ - .index = @enumToInt(Feature.s_memrealtime), - .name = @tagName(Feature.s_memrealtime), .llvm_name = "s-memrealtime", .description = "Has s_memrealtime instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_atomics)] = .{ - .index = @enumToInt(Feature.scalar_atomics), - .name = @tagName(Feature.scalar_atomics), .llvm_name = "scalar-atomics", .description = "Has atomic scalar memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{ - .index = @enumToInt(Feature.scalar_flat_scratch_insts), - .name = @tagName(Feature.scalar_flat_scratch_insts), .llvm_name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_stores)] = .{ - .index = @enumToInt(Feature.scalar_stores), - .name = @tagName(Feature.scalar_stores), .llvm_name = "scalar-stores", .description = "Has store scalar memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa)] = .{ - .index = @enumToInt(Feature.sdwa), - .name = @tagName(Feature.sdwa), .llvm_name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_mav)] = .{ - .index = @enumToInt(Feature.sdwa_mav), - .name = @tagName(Feature.sdwa_mav), .llvm_name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_omod)] = .{ - .index = @enumToInt(Feature.sdwa_omod), - .name = @tagName(Feature.sdwa_omod), .llvm_name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{ - .index = @enumToInt(Feature.sdwa_out_mods_vopc), - .name = @tagName(Feature.sdwa_out_mods_vopc), .llvm_name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_scalar)] = .{ - .index = @enumToInt(Feature.sdwa_scalar), - .name = @tagName(Feature.sdwa_scalar), .llvm_name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_sdst)] = .{ - .index = @enumToInt(Feature.sdwa_sdst), - .name = @tagName(Feature.sdwa_sdst), .llvm_name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sea_islands)] = .{ - .index = @enumToInt(Feature.sea_islands), - .name = @tagName(Feature.sea_islands), .llvm_name = "sea-islands", .description = "SEA_ISLANDS GPU generation", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .ci_insts, .flat_address_space, .fp64, @@ -790,32 +623,24 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.sgpr_init_bug)] = .{ - .index = @enumToInt(Feature.sgpr_init_bug), - .name = @tagName(Feature.sgpr_init_bug), .llvm_name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.si_scheduler)] = .{ - .index = @enumToInt(Feature.si_scheduler), - .name = @tagName(Feature.si_scheduler), .llvm_name = "si-scheduler", .description = "Enable SI Machine Scheduler", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{ - .index = @enumToInt(Feature.smem_to_vector_write_hazard), - .name = @tagName(Feature.smem_to_vector_write_hazard), .llvm_name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.southern_islands)] = .{ - .index = @enumToInt(Feature.southern_islands), - .name = @tagName(Feature.southern_islands), .llvm_name = "southern-islands", .description = "SOUTHERN_ISLANDS GPU generation", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, .ldsbankcount32, .localmemorysize32768, @@ -828,88 +653,64 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.sram_ecc)] = .{ - .index = @enumToInt(Feature.sram_ecc), - .name = @tagName(Feature.sram_ecc), .llvm_name = "sram-ecc", .description = "Enable SRAM ECC", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trap_handler)] = .{ - .index = @enumToInt(Feature.trap_handler), - .name = @tagName(Feature.trap_handler), .llvm_name = "trap-handler", .description = "Trap handler support", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trig_reduced_range)] = .{ - .index = @enumToInt(Feature.trig_reduced_range), - .name = @tagName(Feature.trig_reduced_range), .llvm_name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_buffer_access)] = .{ - .index = @enumToInt(Feature.unaligned_buffer_access), - .name = @tagName(Feature.unaligned_buffer_access), .llvm_name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_scratch_access)] = .{ - .index = @enumToInt(Feature.unaligned_scratch_access), - .name = @tagName(Feature.unaligned_scratch_access), .llvm_name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unpacked_d16_vmem)] = .{ - .index = @enumToInt(Feature.unpacked_d16_vmem), - .name = @tagName(Feature.unpacked_d16_vmem), .llvm_name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{ - .index = @enumToInt(Feature.unsafe_ds_offset_folding), - .name = @tagName(Feature.unsafe_ds_offset_folding), .llvm_name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{ - .index = @enumToInt(Feature.vcmpx_exec_war_hazard), - .name = @tagName(Feature.vcmpx_exec_war_hazard), .llvm_name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{ - .index = @enumToInt(Feature.vcmpx_permlane_hazard), - .name = @tagName(Feature.vcmpx_permlane_hazard), .llvm_name = "vcmpx-permlane-hazard", .description = "TODO: describe me", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vgpr_index_mode)] = .{ - .index = @enumToInt(Feature.vgpr_index_mode), - .name = @tagName(Feature.vgpr_index_mode), .llvm_name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{ - .index = @enumToInt(Feature.vmem_to_scalar_write_hazard), - .name = @tagName(Feature.vmem_to_scalar_write_hazard), .llvm_name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.volcanic_islands)] = .{ - .index = @enumToInt(Feature.volcanic_islands), - .name = @tagName(Feature.volcanic_islands), .llvm_name = "volcanic-islands", .description = "VOLCANIC_ISLANDS GPU generation", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"16_bit_insts", .ci_insts, .dpp, @@ -935,54 +736,46 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.vop3_literal)] = .{ - .index = @enumToInt(Feature.vop3_literal), - .name = @tagName(Feature.vop3_literal), .llvm_name = "vop3-literal", .description = "Can use one literal in VOP3", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vop3p)] = .{ - .index = @enumToInt(Feature.vop3p), - .name = @tagName(Feature.vop3p), .llvm_name = "vop3p", .description = "Has VOP3P packed instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vscnt)] = .{ - .index = @enumToInt(Feature.vscnt), - .name = @tagName(Feature.vscnt), .llvm_name = "vscnt", .description = "Has separate store vscnt counter", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize16)] = .{ - .index = @enumToInt(Feature.wavefrontsize16), - .name = @tagName(Feature.wavefrontsize16), .llvm_name = "wavefrontsize16", .description = "The number of threads per wavefront", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize32)] = .{ - .index = @enumToInt(Feature.wavefrontsize32), - .name = @tagName(Feature.wavefrontsize32), .llvm_name = "wavefrontsize32", .description = "The number of threads per wavefront", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize64)] = .{ - .index = @enumToInt(Feature.wavefrontsize64), - .name = @tagName(Feature.wavefrontsize64), .llvm_name = "wavefrontsize64", .description = "The number of threads per wavefront", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xnack)] = .{ - .index = @enumToInt(Feature.xnack), - .name = @tagName(Feature.xnack), .llvm_name = "xnack", .description = "Enable XNACK support", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -990,7 +783,7 @@ pub const cpu = struct { pub const bonaire = Cpu{ .name = "bonaire", .llvm_name = "bonaire", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1000,7 +793,7 @@ pub const cpu = struct { pub const carrizo = Cpu{ .name = "carrizo", .llvm_name = "carrizo", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1013,7 +806,7 @@ pub const cpu = struct { pub const fiji = Cpu{ .name = "fiji", .llvm_name = "fiji", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1024,14 +817,14 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .wavefrontsize64, }), }; pub const generic_hsa = Cpu{ .name = "generic_hsa", .llvm_name = "generic-hsa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .flat_address_space, .wavefrontsize64, }), @@ -1039,7 +832,7 @@ pub const cpu = struct { pub const gfx1010 = Cpu{ .name = "gfx1010", .llvm_name = "gfx1010", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .dl_insts, .flat_segment_offset_bug, @@ -1065,7 +858,7 @@ pub const cpu = struct { pub const gfx1011 = Cpu{ .name = "gfx1011", .llvm_name = "gfx1011", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -1094,7 +887,7 @@ pub const cpu = struct { pub const gfx1012 = Cpu{ .name = "gfx1012", .llvm_name = "gfx1012", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -1124,7 +917,7 @@ pub const cpu = struct { pub const gfx600 = Cpu{ .name = "gfx600", .llvm_name = "gfx600", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1136,7 +929,7 @@ pub const cpu = struct { pub const gfx601 = Cpu{ .name = "gfx601", .llvm_name = "gfx601", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1146,7 +939,7 @@ pub const cpu = struct { pub const gfx700 = Cpu{ .name = "gfx700", .llvm_name = "gfx700", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1156,7 +949,7 @@ pub const cpu = struct { pub const gfx701 = Cpu{ .name = "gfx701", .llvm_name = "gfx701", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1168,7 +961,7 @@ pub const cpu = struct { pub const gfx702 = Cpu{ .name = "gfx702", .llvm_name = "gfx702", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .ldsbankcount16, @@ -1179,7 +972,7 @@ pub const cpu = struct { pub const gfx703 = Cpu{ .name = "gfx703", .llvm_name = "gfx703", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -1189,7 +982,7 @@ pub const cpu = struct { pub const gfx704 = Cpu{ .name = "gfx704", .llvm_name = "gfx704", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1199,7 +992,7 @@ pub const cpu = struct { pub const gfx801 = Cpu{ .name = "gfx801", .llvm_name = "gfx801", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1212,7 +1005,7 @@ pub const cpu = struct { pub const gfx802 = Cpu{ .name = "gfx802", .llvm_name = "gfx802", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1224,7 +1017,7 @@ pub const cpu = struct { pub const gfx803 = Cpu{ .name = "gfx803", .llvm_name = "gfx803", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1235,7 +1028,7 @@ pub const cpu = struct { pub const gfx810 = Cpu{ .name = "gfx810", .llvm_name = "gfx810", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount16, .volcanic_islands, @@ -1245,7 +1038,7 @@ pub const cpu = struct { pub const gfx900 = Cpu{ .name = "gfx900", .llvm_name = "gfx900", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1257,7 +1050,7 @@ pub const cpu = struct { pub const gfx902 = Cpu{ .name = "gfx902", .llvm_name = "gfx902", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1269,7 +1062,7 @@ pub const cpu = struct { pub const gfx904 = Cpu{ .name = "gfx904", .llvm_name = "gfx904", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fma_mix_insts, .gfx9, @@ -1281,7 +1074,7 @@ pub const cpu = struct { pub const gfx906 = Cpu{ .name = "gfx906", .llvm_name = "gfx906", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -1296,7 +1089,7 @@ pub const cpu = struct { pub const gfx908 = Cpu{ .name = "gfx908", .llvm_name = "gfx908", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .atomic_fadd_insts, .code_object_v3, .dl_insts, @@ -1318,7 +1111,7 @@ pub const cpu = struct { pub const gfx909 = Cpu{ .name = "gfx909", .llvm_name = "gfx909", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1329,7 +1122,7 @@ pub const cpu = struct { pub const hainan = Cpu{ .name = "hainan", .llvm_name = "hainan", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1339,7 +1132,7 @@ pub const cpu = struct { pub const hawaii = Cpu{ .name = "hawaii", .llvm_name = "hawaii", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1351,7 +1144,7 @@ pub const cpu = struct { pub const iceland = Cpu{ .name = "iceland", .llvm_name = "iceland", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1363,7 +1156,7 @@ pub const cpu = struct { pub const kabini = Cpu{ .name = "kabini", .llvm_name = "kabini", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -1373,7 +1166,7 @@ pub const cpu = struct { pub const kaveri = Cpu{ .name = "kaveri", .llvm_name = "kaveri", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1383,7 +1176,7 @@ pub const cpu = struct { pub const mullins = Cpu{ .name = "mullins", .llvm_name = "mullins", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -1393,7 +1186,7 @@ pub const cpu = struct { pub const oland = Cpu{ .name = "oland", .llvm_name = "oland", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1403,7 +1196,7 @@ pub const cpu = struct { pub const pitcairn = Cpu{ .name = "pitcairn", .llvm_name = "pitcairn", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1413,7 +1206,7 @@ pub const cpu = struct { pub const polaris10 = Cpu{ .name = "polaris10", .llvm_name = "polaris10", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1424,7 +1217,7 @@ pub const cpu = struct { pub const polaris11 = Cpu{ .name = "polaris11", .llvm_name = "polaris11", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1435,7 +1228,7 @@ pub const cpu = struct { pub const stoney = Cpu{ .name = "stoney", .llvm_name = "stoney", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount16, .volcanic_islands, @@ -1445,7 +1238,7 @@ pub const cpu = struct { pub const tahiti = Cpu{ .name = "tahiti", .llvm_name = "tahiti", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1457,7 +1250,7 @@ pub const cpu = struct { pub const tonga = Cpu{ .name = "tonga", .llvm_name = "tonga", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1469,7 +1262,7 @@ pub const cpu = struct { pub const verde = Cpu{ .name = "verde", .llvm_name = "verde", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index 744d418d03ed705601aac988abc8ade1d61dc644..bcc04ae88427810492e2cc99f4691ae37cab3b24 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -181,245 +181,182 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"32bit")] = .{ - .index = @enumToInt(Feature.@"32bit"), - .name = @tagName(Feature.@"32bit"), .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"8msecext")] = .{ - .index = @enumToInt(Feature.@"8msecext"), - .name = @tagName(Feature.@"8msecext"), .llvm_name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a12)] = .{ - .index = @enumToInt(Feature.a12), - .name = @tagName(Feature.a12), .llvm_name = "a12", .description = "Cortex-A12 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a15)] = .{ - .index = @enumToInt(Feature.a15), - .name = @tagName(Feature.a15), .llvm_name = "a15", .description = "Cortex-A15 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a17)] = .{ - .index = @enumToInt(Feature.a17), - .name = @tagName(Feature.a17), .llvm_name = "a17", .description = "Cortex-A17 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a32)] = .{ - .index = @enumToInt(Feature.a32), - .name = @tagName(Feature.a32), .llvm_name = "a32", .description = "Cortex-A32 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a35)] = .{ - .index = @enumToInt(Feature.a35), - .name = @tagName(Feature.a35), .llvm_name = "a35", .description = "Cortex-A35 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a5)] = .{ - .index = @enumToInt(Feature.a5), - .name = @tagName(Feature.a5), .llvm_name = "a5", .description = "Cortex-A5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a53)] = .{ - .index = @enumToInt(Feature.a53), - .name = @tagName(Feature.a53), .llvm_name = "a53", .description = "Cortex-A53 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a55)] = .{ - .index = @enumToInt(Feature.a55), - .name = @tagName(Feature.a55), .llvm_name = "a55", .description = "Cortex-A55 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a57)] = .{ - .index = @enumToInt(Feature.a57), - .name = @tagName(Feature.a57), .llvm_name = "a57", .description = "Cortex-A57 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a7)] = .{ - .index = @enumToInt(Feature.a7), - .name = @tagName(Feature.a7), .llvm_name = "a7", .description = "Cortex-A7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a72)] = .{ - .index = @enumToInt(Feature.a72), - .name = @tagName(Feature.a72), .llvm_name = "a72", .description = "Cortex-A72 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a73)] = .{ - .index = @enumToInt(Feature.a73), - .name = @tagName(Feature.a73), .llvm_name = "a73", .description = "Cortex-A73 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a75)] = .{ - .index = @enumToInt(Feature.a75), - .name = @tagName(Feature.a75), .llvm_name = "a75", .description = "Cortex-A75 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a76)] = .{ - .index = @enumToInt(Feature.a76), - .name = @tagName(Feature.a76), .llvm_name = "a76", .description = "Cortex-A76 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a8)] = .{ - .index = @enumToInt(Feature.a8), - .name = @tagName(Feature.a8), .llvm_name = "a8", .description = "Cortex-A8 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a9)] = .{ - .index = @enumToInt(Feature.a9), - .name = @tagName(Feature.a9), .llvm_name = "a9", .description = "Cortex-A9 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aclass)] = .{ - .index = @enumToInt(Feature.aclass), - .name = @tagName(Feature.aclass), .llvm_name = "aclass", .description = "Is application profile ('A' series)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.acquire_release)] = .{ - .index = @enumToInt(Feature.acquire_release), - .name = @tagName(Feature.acquire_release), .llvm_name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ - .index = @enumToInt(Feature.aes), - .name = @tagName(Feature.aes), .llvm_name = "aes", .description = "Enable AES support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.armv2)] = .{ - .index = @enumToInt(Feature.armv2), - .name = @tagName(Feature.armv2), .llvm_name = "armv2", .description = "ARMv2 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv2a)] = .{ - .index = @enumToInt(Feature.armv2a), - .name = @tagName(Feature.armv2a), .llvm_name = "armv2a", .description = "ARMv2a architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3)] = .{ - .index = @enumToInt(Feature.armv3), - .name = @tagName(Feature.armv3), .llvm_name = "armv3", .description = "ARMv3 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3m)] = .{ - .index = @enumToInt(Feature.armv3m), - .name = @tagName(Feature.armv3m), .llvm_name = "armv3m", .description = "ARMv3m architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4)] = .{ - .index = @enumToInt(Feature.armv4), - .name = @tagName(Feature.armv4), .llvm_name = "armv4", .description = "ARMv4 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4t)] = .{ - .index = @enumToInt(Feature.armv4t), - .name = @tagName(Feature.armv4t), .llvm_name = "armv4t", .description = "ARMv4t architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.armv5t)] = .{ - .index = @enumToInt(Feature.armv5t), - .name = @tagName(Feature.armv5t), .llvm_name = "armv5t", .description = "ARMv5t architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v5t, }), }; result[@enumToInt(Feature.armv5te)] = .{ - .index = @enumToInt(Feature.armv5te), - .name = @tagName(Feature.armv5te), .llvm_name = "armv5te", .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.armv5tej)] = .{ - .index = @enumToInt(Feature.armv5tej), - .name = @tagName(Feature.armv5tej), .llvm_name = "armv5tej", .description = "ARMv5tej architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.armv6)] = .{ - .index = @enumToInt(Feature.armv6), - .name = @tagName(Feature.armv6), .llvm_name = "armv6", .description = "ARMv6 architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dsp, .v6, }), }; result[@enumToInt(Feature.armv6_m)] = .{ - .index = @enumToInt(Feature.armv6_m), - .name = @tagName(Feature.armv6_m), .llvm_name = "armv6-m", .description = "ARMv6m architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .db, .mclass, .noarm, @@ -429,39 +366,31 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv6j)] = .{ - .index = @enumToInt(Feature.armv6j), - .name = @tagName(Feature.armv6j), .llvm_name = "armv6j", .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv6, }), }; result[@enumToInt(Feature.armv6k)] = .{ - .index = @enumToInt(Feature.armv6k), - .name = @tagName(Feature.armv6k), .llvm_name = "armv6k", .description = "ARMv6k architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v6k, }), }; result[@enumToInt(Feature.armv6kz)] = .{ - .index = @enumToInt(Feature.armv6kz), - .name = @tagName(Feature.armv6kz), .llvm_name = "armv6kz", .description = "ARMv6kz architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .trustzone, .v6k, }), }; result[@enumToInt(Feature.armv6s_m)] = .{ - .index = @enumToInt(Feature.armv6s_m), - .name = @tagName(Feature.armv6s_m), .llvm_name = "armv6s-m", .description = "ARMv6sm architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .db, .mclass, .noarm, @@ -471,21 +400,17 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv6t2)] = .{ - .index = @enumToInt(Feature.armv6t2), - .name = @tagName(Feature.armv6t2), .llvm_name = "armv6t2", .description = "ARMv6t2 architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dsp, .v6t2, }), }; result[@enumToInt(Feature.armv7_a)] = .{ - .index = @enumToInt(Feature.armv7_a), - .name = @tagName(Feature.armv7_a), .llvm_name = "armv7-a", .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .db, .dsp, @@ -494,11 +419,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv7_m)] = .{ - .index = @enumToInt(Feature.armv7_m), - .name = @tagName(Feature.armv7_m), .llvm_name = "armv7-m", .description = "ARMv7m architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .db, .hwdiv, .mclass, @@ -509,11 +432,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv7_r)] = .{ - .index = @enumToInt(Feature.armv7_r), - .name = @tagName(Feature.armv7_r), .llvm_name = "armv7-r", .description = "ARMv7r architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .db, .dsp, .hwdiv, @@ -522,11 +443,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv7e_m)] = .{ - .index = @enumToInt(Feature.armv7e_m), - .name = @tagName(Feature.armv7e_m), .llvm_name = "armv7e-m", .description = "ARMv7em architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .db, .dsp, .hwdiv, @@ -538,29 +457,23 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv7k)] = .{ - .index = @enumToInt(Feature.armv7k), - .name = @tagName(Feature.armv7k), .llvm_name = "armv7k", .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv7_a, }), }; result[@enumToInt(Feature.armv7s)] = .{ - .index = @enumToInt(Feature.armv7s), - .name = @tagName(Feature.armv7s), .llvm_name = "armv7s", .description = "ARMv7a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv7_a, }), }; result[@enumToInt(Feature.armv7ve)] = .{ - .index = @enumToInt(Feature.armv7ve), - .name = @tagName(Feature.armv7ve), .llvm_name = "armv7ve", .description = "ARMv7ve architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .db, .dsp, @@ -572,11 +485,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_a)] = .{ - .index = @enumToInt(Feature.armv8_a), - .name = @tagName(Feature.armv8_a), .llvm_name = "armv8-a", .description = "ARMv8a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -591,11 +502,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_m_base)] = .{ - .index = @enumToInt(Feature.armv8_m_base), - .name = @tagName(Feature.armv8_m_base), .llvm_name = "armv8-m.base", .description = "ARMv8mBaseline architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -609,11 +518,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_m_main)] = .{ - .index = @enumToInt(Feature.armv8_m_main), - .name = @tagName(Feature.armv8_m_main), .llvm_name = "armv8-m.main", .description = "ARMv8mMainline architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -625,11 +532,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_r)] = .{ - .index = @enumToInt(Feature.armv8_r), - .name = @tagName(Feature.armv8_r), .llvm_name = "armv8-r", .description = "ARMv8r architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .db, .dfb, @@ -643,11 +548,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_1_a)] = .{ - .index = @enumToInt(Feature.armv8_1_a), - .name = @tagName(Feature.armv8_1_a), .llvm_name = "armv8.1-a", .description = "ARMv81a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -662,11 +565,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_1_m_main)] = .{ - .index = @enumToInt(Feature.armv8_1_m_main), - .name = @tagName(Feature.armv8_1_m_main), .llvm_name = "armv8.1-m.main", .description = "ARMv81mMainline architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -680,11 +581,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_2_a)] = .{ - .index = @enumToInt(Feature.armv8_2_a), - .name = @tagName(Feature.armv8_2_a), .llvm_name = "armv8.2-a", .description = "ARMv82a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -700,11 +599,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_3_a)] = .{ - .index = @enumToInt(Feature.armv8_3_a), - .name = @tagName(Feature.armv8_3_a), .llvm_name = "armv8.3-a", .description = "ARMv83a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -720,11 +617,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_4_a)] = .{ - .index = @enumToInt(Feature.armv8_4_a), - .name = @tagName(Feature.armv8_4_a), .llvm_name = "armv8.4-a", .description = "ARMv84a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -741,11 +636,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.armv8_5_a)] = .{ - .index = @enumToInt(Feature.armv8_5_a), - .name = @tagName(Feature.armv8_5_a), .llvm_name = "armv8.5-a", .description = "ARMv85a architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -762,115 +655,85 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avoid_movs_shop)] = .{ - .index = @enumToInt(Feature.avoid_movs_shop), - .name = @tagName(Feature.avoid_movs_shop), .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avoid_partial_cpsr)] = .{ - .index = @enumToInt(Feature.avoid_partial_cpsr), - .name = @tagName(Feature.avoid_partial_cpsr), .llvm_name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{ - .index = @enumToInt(Feature.cheap_predicable_cpsr), - .name = @tagName(Feature.cheap_predicable_cpsr), .llvm_name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crc)] = .{ - .index = @enumToInt(Feature.crc), - .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Enable support for CRC instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ - .index = @enumToInt(Feature.crypto), - .name = @tagName(Feature.crypto), .llvm_name = "crypto", .description = "Enable support for Cryptography extensions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aes, .neon, .sha2, }), }; result[@enumToInt(Feature.d32)] = .{ - .index = @enumToInt(Feature.d32), - .name = @tagName(Feature.d32), .llvm_name = "d32", .description = "Extend FP to 32 double registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.db)] = .{ - .index = @enumToInt(Feature.db), - .name = @tagName(Feature.db), .llvm_name = "db", .description = "Has data barrier (dmb/dsb) instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfb)] = .{ - .index = @enumToInt(Feature.dfb), - .name = @tagName(Feature.dfb), .llvm_name = "dfb", .description = "Has full data barrier (dfb) instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.disable_postra_scheduler)] = .{ - .index = @enumToInt(Feature.disable_postra_scheduler), - .name = @tagName(Feature.disable_postra_scheduler), .llvm_name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dont_widen_vmovs)] = .{ - .index = @enumToInt(Feature.dont_widen_vmovs), - .name = @tagName(Feature.dont_widen_vmovs), .llvm_name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ - .index = @enumToInt(Feature.dotprod), - .name = @tagName(Feature.dotprod), .llvm_name = "dotprod", .description = "Enable support for dot product instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.dsp)] = .{ - .index = @enumToInt(Feature.dsp), - .name = @tagName(Feature.dsp), .llvm_name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execute_only)] = .{ - .index = @enumToInt(Feature.execute_only), - .name = @tagName(Feature.execute_only), .llvm_name = "execute-only", .description = "Enable the generation of execute only code.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.expand_fp_mlx)] = .{ - .index = @enumToInt(Feature.expand_fp_mlx), - .name = @tagName(Feature.expand_fp_mlx), .llvm_name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos)] = .{ - .index = @enumToInt(Feature.exynos), - .name = @tagName(Feature.exynos), .llvm_name = "exynos", .description = "Samsung Exynos processors", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .crc, .crypto, .expand_fp_mlx, @@ -891,229 +754,173 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.fp_armv8)] = .{ - .index = @enumToInt(Feature.fp_armv8), - .name = @tagName(Feature.fp_armv8), .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8d16, .fp_armv8sp, .vfp4, }), }; result[@enumToInt(Feature.fp_armv8d16)] = .{ - .index = @enumToInt(Feature.fp_armv8d16), - .name = @tagName(Feature.fp_armv8d16), .llvm_name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8d16sp, .fp64, .vfp4d16, }), }; result[@enumToInt(Feature.fp_armv8d16sp)] = .{ - .index = @enumToInt(Feature.fp_armv8d16sp), - .name = @tagName(Feature.fp_armv8d16sp), .llvm_name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp4d16sp, }), }; result[@enumToInt(Feature.fp_armv8sp)] = .{ - .index = @enumToInt(Feature.fp_armv8sp), - .name = @tagName(Feature.fp_armv8sp), .llvm_name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .d32, .fp_armv8d16sp, .vfp4sp, }), }; result[@enumToInt(Feature.fp16)] = .{ - .index = @enumToInt(Feature.fp16), - .name = @tagName(Feature.fp16), .llvm_name = "fp16", .description = "Enable half-precision floating point", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ - .index = @enumToInt(Feature.fp16fml), - .name = @tagName(Feature.fp16fml), .llvm_name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fullfp16, }), }; result[@enumToInt(Feature.fp64)] = .{ - .index = @enumToInt(Feature.fp64), - .name = @tagName(Feature.fp64), .llvm_name = "fp64", .description = "Floating point unit supports double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpregs64, }), }; result[@enumToInt(Feature.fpao)] = .{ - .index = @enumToInt(Feature.fpao), - .name = @tagName(Feature.fpao), .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs)] = .{ - .index = @enumToInt(Feature.fpregs), - .name = @tagName(Feature.fpregs), .llvm_name = "fpregs", .description = "Enable FP registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs16)] = .{ - .index = @enumToInt(Feature.fpregs16), - .name = @tagName(Feature.fpregs16), .llvm_name = "fpregs16", .description = "Enable 16-bit FP registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.fpregs64)] = .{ - .index = @enumToInt(Feature.fpregs64), - .name = @tagName(Feature.fpregs64), .llvm_name = "fpregs64", .description = "Enable 64-bit FP registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.fullfp16)] = .{ - .index = @enumToInt(Feature.fullfp16), - .name = @tagName(Feature.fullfp16), .llvm_name = "fullfp16", .description = "Enable full half-precision floating point", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8d16sp, .fpregs16, }), }; result[@enumToInt(Feature.fuse_aes)] = .{ - .index = @enumToInt(Feature.fuse_aes), - .name = @tagName(Feature.fuse_aes), .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ - .index = @enumToInt(Feature.fuse_literals), - .name = @tagName(Feature.fuse_literals), .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv)] = .{ - .index = @enumToInt(Feature.hwdiv), - .name = @tagName(Feature.hwdiv), .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv_arm)] = .{ - .index = @enumToInt(Feature.hwdiv_arm), - .name = @tagName(Feature.hwdiv_arm), .llvm_name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.iwmmxt)] = .{ - .index = @enumToInt(Feature.iwmmxt), - .name = @tagName(Feature.iwmmxt), .llvm_name = "iwmmxt", .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.iwmmxt2)] = .{ - .index = @enumToInt(Feature.iwmmxt2), - .name = @tagName(Feature.iwmmxt2), .llvm_name = "iwmmxt2", .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.krait)] = .{ - .index = @enumToInt(Feature.krait), - .name = @tagName(Feature.krait), .llvm_name = "krait", .description = "Qualcomm Krait processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.kryo)] = .{ - .index = @enumToInt(Feature.kryo), - .name = @tagName(Feature.kryo), .llvm_name = "kryo", .description = "Qualcomm Kryo processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lob)] = .{ - .index = @enumToInt(Feature.lob), - .name = @tagName(Feature.lob), .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ - .index = @enumToInt(Feature.long_calls), - .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Generate calls via indirect call instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.loop_align)] = .{ - .index = @enumToInt(Feature.loop_align), - .name = @tagName(Feature.loop_align), .llvm_name = "loop-align", .description = "Prefer 32-bit alignment for loops", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m3)] = .{ - .index = @enumToInt(Feature.m3), - .name = @tagName(Feature.m3), .llvm_name = "m3", .description = "Cortex-M3 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mclass)] = .{ - .index = @enumToInt(Feature.mclass), - .name = @tagName(Feature.mclass), .llvm_name = "mclass", .description = "Is microcontroller profile ('M' series)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mp)] = .{ - .index = @enumToInt(Feature.mp), - .name = @tagName(Feature.mp), .llvm_name = "mp", .description = "Supports Multiprocessing extension", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.muxed_units)] = .{ - .index = @enumToInt(Feature.muxed_units), - .name = @tagName(Feature.muxed_units), .llvm_name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mve)] = .{ - .index = @enumToInt(Feature.mve), - .name = @tagName(Feature.mve), .llvm_name = "mve", .description = "Support M-Class Vector Extension with integer ops", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dsp, .fpregs16, .fpregs64, @@ -1121,544 +928,410 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.mve_fp)] = .{ - .index = @enumToInt(Feature.mve_fp), - .name = @tagName(Feature.mve_fp), .llvm_name = "mve.fp", .description = "Support M-Class Vector Extension with integer and floating ops", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp_armv8d16sp, .fullfp16, .mve, }), }; result[@enumToInt(Feature.nacl_trap)] = .{ - .index = @enumToInt(Feature.nacl_trap), - .name = @tagName(Feature.nacl_trap), .llvm_name = "nacl-trap", .description = "NaCl trap", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ - .index = @enumToInt(Feature.neon), - .name = @tagName(Feature.neon), .llvm_name = "neon", .description = "Enable NEON instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp3, }), }; result[@enumToInt(Feature.neon_fpmovs)] = .{ - .index = @enumToInt(Feature.neon_fpmovs), - .name = @tagName(Feature.neon_fpmovs), .llvm_name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neonfp)] = .{ - .index = @enumToInt(Feature.neonfp), - .name = @tagName(Feature.neonfp), .llvm_name = "neonfp", .description = "Use NEON for single precision FP", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_branch_predictor)] = .{ - .index = @enumToInt(Feature.no_branch_predictor), - .name = @tagName(Feature.no_branch_predictor), .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_movt)] = .{ - .index = @enumToInt(Feature.no_movt), - .name = @tagName(Feature.no_movt), .llvm_name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_neg_immediates)] = .{ - .index = @enumToInt(Feature.no_neg_immediates), - .name = @tagName(Feature.no_neg_immediates), .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noarm)] = .{ - .index = @enumToInt(Feature.noarm), - .name = @tagName(Feature.noarm), .llvm_name = "noarm", .description = "Does not support ARM mode execution", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nonpipelined_vfp)] = .{ - .index = @enumToInt(Feature.nonpipelined_vfp), - .name = @tagName(Feature.nonpipelined_vfp), .llvm_name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.perfmon)] = .{ - .index = @enumToInt(Feature.perfmon), - .name = @tagName(Feature.perfmon), .llvm_name = "perfmon", .description = "Enable support for Performance Monitor extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_ishst)] = .{ - .index = @enumToInt(Feature.prefer_ishst), - .name = @tagName(Feature.prefer_ishst), .llvm_name = "prefer-ishst", .description = "Prefer ISHST barriers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_vmovsr)] = .{ - .index = @enumToInt(Feature.prefer_vmovsr), - .name = @tagName(Feature.prefer_vmovsr), .llvm_name = "prefer-vmovsr", .description = "Prefer VMOVSR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prof_unpr)] = .{ - .index = @enumToInt(Feature.prof_unpr), - .name = @tagName(Feature.prof_unpr), .llvm_name = "prof-unpr", .description = "Is profitable to unpredicate", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r4)] = .{ - .index = @enumToInt(Feature.r4), - .name = @tagName(Feature.r4), .llvm_name = "r4", .description = "Cortex-R4 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r5)] = .{ - .index = @enumToInt(Feature.r5), - .name = @tagName(Feature.r5), .llvm_name = "r5", .description = "Cortex-R5 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r52)] = .{ - .index = @enumToInt(Feature.r52), - .name = @tagName(Feature.r52), .llvm_name = "r52", .description = "Cortex-R52 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r7)] = .{ - .index = @enumToInt(Feature.r7), - .name = @tagName(Feature.r7), .llvm_name = "r7", .description = "Cortex-R7 ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ - .index = @enumToInt(Feature.ras), - .name = @tagName(Feature.ras), .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rclass)] = .{ - .index = @enumToInt(Feature.rclass), - .name = @tagName(Feature.rclass), .llvm_name = "rclass", .description = "Is realtime profile ('R' series)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.read_tp_hard)] = .{ - .index = @enumToInt(Feature.read_tp_hard), - .name = @tagName(Feature.read_tp_hard), .llvm_name = "read-tp-hard", .description = "Reading thread pointer from register", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_r9)] = .{ - .index = @enumToInt(Feature.reserve_r9), - .name = @tagName(Feature.reserve_r9), .llvm_name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ret_addr_stack)] = .{ - .index = @enumToInt(Feature.ret_addr_stack), - .name = @tagName(Feature.ret_addr_stack), .llvm_name = "ret-addr-stack", .description = "Has return address stack", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sb)] = .{ - .index = @enumToInt(Feature.sb), - .name = @tagName(Feature.sb), .llvm_name = "sb", .description = "Enable v8.5a Speculation Barrier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ - .index = @enumToInt(Feature.sha2), - .name = @tagName(Feature.sha2), .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.slow_fp_brcc)] = .{ - .index = @enumToInt(Feature.slow_fp_brcc), - .name = @tagName(Feature.slow_fp_brcc), .llvm_name = "slow-fp-brcc", .description = "FP compare + branch is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_load_D_subreg)] = .{ - .index = @enumToInt(Feature.slow_load_D_subreg), - .name = @tagName(Feature.slow_load_D_subreg), .llvm_name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_odd_reg)] = .{ - .index = @enumToInt(Feature.slow_odd_reg), - .name = @tagName(Feature.slow_odd_reg), .llvm_name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vdup32)] = .{ - .index = @enumToInt(Feature.slow_vdup32), - .name = @tagName(Feature.slow_vdup32), .llvm_name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vgetlni32)] = .{ - .index = @enumToInt(Feature.slow_vgetlni32), - .name = @tagName(Feature.slow_vgetlni32), .llvm_name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slowfpvmlx)] = .{ - .index = @enumToInt(Feature.slowfpvmlx), - .name = @tagName(Feature.slowfpvmlx), .llvm_name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ - .index = @enumToInt(Feature.soft_float), - .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software floating point features.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.splat_vfp_neon)] = .{ - .index = @enumToInt(Feature.splat_vfp_neon), - .name = @tagName(Feature.splat_vfp_neon), .llvm_name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dont_widen_vmovs, }), }; result[@enumToInt(Feature.strict_align)] = .{ - .index = @enumToInt(Feature.strict_align), - .name = @tagName(Feature.strict_align), .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.swift)] = .{ - .index = @enumToInt(Feature.swift), - .name = @tagName(Feature.swift), .llvm_name = "swift", .description = "Swift ARM processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb_mode)] = .{ - .index = @enumToInt(Feature.thumb_mode), - .name = @tagName(Feature.thumb_mode), .llvm_name = "thumb-mode", .description = "Thumb mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb2)] = .{ - .index = @enumToInt(Feature.thumb2), - .name = @tagName(Feature.thumb2), .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trustzone)] = .{ - .index = @enumToInt(Feature.trustzone), - .name = @tagName(Feature.trustzone), .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ - .index = @enumToInt(Feature.use_aa), - .name = @tagName(Feature.use_aa), .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_misched)] = .{ - .index = @enumToInt(Feature.use_misched), - .name = @tagName(Feature.use_misched), .llvm_name = "use-misched", .description = "Use the MachineScheduler", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v4t)] = .{ - .index = @enumToInt(Feature.v4t), - .name = @tagName(Feature.v4t), .llvm_name = "v4t", .description = "Support ARM v4T instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5t)] = .{ - .index = @enumToInt(Feature.v5t), - .name = @tagName(Feature.v5t), .llvm_name = "v5t", .description = "Support ARM v5T instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.v5te)] = .{ - .index = @enumToInt(Feature.v5te), - .name = @tagName(Feature.v5te), .llvm_name = "v5te", .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v5t, }), }; result[@enumToInt(Feature.v6)] = .{ - .index = @enumToInt(Feature.v6), - .name = @tagName(Feature.v6), .llvm_name = "v6", .description = "Support ARM v6 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.v6k)] = .{ - .index = @enumToInt(Feature.v6k), - .name = @tagName(Feature.v6k), .llvm_name = "v6k", .description = "Support ARM v6k instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v6, }), }; result[@enumToInt(Feature.v6m)] = .{ - .index = @enumToInt(Feature.v6m), - .name = @tagName(Feature.v6m), .llvm_name = "v6m", .description = "Support ARM v6M instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v6, }), }; result[@enumToInt(Feature.v6t2)] = .{ - .index = @enumToInt(Feature.v6t2), - .name = @tagName(Feature.v6t2), .llvm_name = "v6t2", .description = "Support ARM v6t2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .thumb2, .v6k, .v8m, }), }; result[@enumToInt(Feature.v7)] = .{ - .index = @enumToInt(Feature.v7), - .name = @tagName(Feature.v7), .llvm_name = "v7", .description = "Support ARM v7 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .perfmon, .v6t2, .v7clrex, }), }; result[@enumToInt(Feature.v7clrex)] = .{ - .index = @enumToInt(Feature.v7clrex), - .name = @tagName(Feature.v7clrex), .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8)] = .{ - .index = @enumToInt(Feature.v8), - .name = @tagName(Feature.v8), .llvm_name = "v8", .description = "Support ARM v8 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .acquire_release, .v7, }), }; result[@enumToInt(Feature.v8_1a)] = .{ - .index = @enumToInt(Feature.v8_1a), - .name = @tagName(Feature.v8_1a), .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v8, }), }; result[@enumToInt(Feature.v8_1m_main)] = .{ - .index = @enumToInt(Feature.v8_1m_main), - .name = @tagName(Feature.v8_1m_main), .llvm_name = "v8.1m.main", .description = "Support ARM v8-1M Mainline instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v8m_main, }), }; result[@enumToInt(Feature.v8_2a)] = .{ - .index = @enumToInt(Feature.v8_2a), - .name = @tagName(Feature.v8_2a), .llvm_name = "v8.2a", .description = "Support ARM v8.2a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v8_1a, }), }; result[@enumToInt(Feature.v8_3a)] = .{ - .index = @enumToInt(Feature.v8_3a), - .name = @tagName(Feature.v8_3a), .llvm_name = "v8.3a", .description = "Support ARM v8.3a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v8_2a, }), }; result[@enumToInt(Feature.v8_4a)] = .{ - .index = @enumToInt(Feature.v8_4a), - .name = @tagName(Feature.v8_4a), .llvm_name = "v8.4a", .description = "Support ARM v8.4a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dotprod, .v8_3a, }), }; result[@enumToInt(Feature.v8_5a)] = .{ - .index = @enumToInt(Feature.v8_5a), - .name = @tagName(Feature.v8_5a), .llvm_name = "v8.5a", .description = "Support ARM v8.5a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sb, .v8_4a, }), }; result[@enumToInt(Feature.v8m)] = .{ - .index = @enumToInt(Feature.v8m), - .name = @tagName(Feature.v8m), .llvm_name = "v8m", .description = "Support ARM v8M Baseline instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v6m, }), }; result[@enumToInt(Feature.v8m_main)] = .{ - .index = @enumToInt(Feature.v8m_main), - .name = @tagName(Feature.v8m_main), .llvm_name = "v8m.main", .description = "Support ARM v8M Mainline instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .v7, }), }; result[@enumToInt(Feature.vfp2)] = .{ - .index = @enumToInt(Feature.vfp2), - .name = @tagName(Feature.vfp2), .llvm_name = "vfp2", .description = "Enable VFP2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp2d16, .vfp2sp, }), }; result[@enumToInt(Feature.vfp2d16)] = .{ - .index = @enumToInt(Feature.vfp2d16), - .name = @tagName(Feature.vfp2d16), .llvm_name = "vfp2d16", .description = "Enable VFP2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, .vfp2d16sp, }), }; result[@enumToInt(Feature.vfp2d16sp)] = .{ - .index = @enumToInt(Feature.vfp2d16sp), - .name = @tagName(Feature.vfp2d16sp), .llvm_name = "vfp2d16sp", .description = "Enable VFP2 instructions with no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.vfp2sp)] = .{ - .index = @enumToInt(Feature.vfp2sp), - .name = @tagName(Feature.vfp2sp), .llvm_name = "vfp2sp", .description = "Enable VFP2 instructions with no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp2d16sp, }), }; result[@enumToInt(Feature.vfp3)] = .{ - .index = @enumToInt(Feature.vfp3), - .name = @tagName(Feature.vfp3), .llvm_name = "vfp3", .description = "Enable VFP3 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp3d16, .vfp3sp, }), }; result[@enumToInt(Feature.vfp3d16)] = .{ - .index = @enumToInt(Feature.vfp3d16), - .name = @tagName(Feature.vfp3d16), .llvm_name = "vfp3d16", .description = "Enable VFP3 instructions with only 16 d-registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, .vfp2, .vfp3d16sp, }), }; result[@enumToInt(Feature.vfp3d16sp)] = .{ - .index = @enumToInt(Feature.vfp3d16sp), - .name = @tagName(Feature.vfp3d16sp), .llvm_name = "vfp3d16sp", .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vfp2sp, }), }; result[@enumToInt(Feature.vfp3sp)] = .{ - .index = @enumToInt(Feature.vfp3sp), - .name = @tagName(Feature.vfp3sp), .llvm_name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .d32, .vfp3d16sp, }), }; result[@enumToInt(Feature.vfp4)] = .{ - .index = @enumToInt(Feature.vfp4), - .name = @tagName(Feature.vfp4), .llvm_name = "vfp4", .description = "Enable VFP4 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp16, .vfp3, .vfp4d16, @@ -1666,11 +1339,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.vfp4d16)] = .{ - .index = @enumToInt(Feature.vfp4d16), - .name = @tagName(Feature.vfp4d16), .llvm_name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp16, .fp64, .vfp3d16, @@ -1678,21 +1349,17 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.vfp4d16sp)] = .{ - .index = @enumToInt(Feature.vfp4d16sp), - .name = @tagName(Feature.vfp4d16sp), .llvm_name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp16, .vfp3d16sp, }), }; result[@enumToInt(Feature.vfp4sp)] = .{ - .index = @enumToInt(Feature.vfp4sp), - .name = @tagName(Feature.vfp4sp), .llvm_name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .d32, .fp16, .vfp3sp, @@ -1700,59 +1367,51 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.virtualization)] = .{ - .index = @enumToInt(Feature.virtualization), - .name = @tagName(Feature.virtualization), .llvm_name = "virtualization", .description = "Supports Virtualization extension", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hwdiv, .hwdiv_arm, }), }; result[@enumToInt(Feature.vldn_align)] = .{ - .index = @enumToInt(Feature.vldn_align), - .name = @tagName(Feature.vldn_align), .llvm_name = "vldn-align", .description = "Check for VLDn unaligned access", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_forwarding)] = .{ - .index = @enumToInt(Feature.vmlx_forwarding), - .name = @tagName(Feature.vmlx_forwarding), .llvm_name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_hazards)] = .{ - .index = @enumToInt(Feature.vmlx_hazards), - .name = @tagName(Feature.vmlx_hazards), .llvm_name = "vmlx-hazards", .description = "Has VMLx hazards", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wide_stride_vfp)] = .{ - .index = @enumToInt(Feature.wide_stride_vfp), - .name = @tagName(Feature.wide_stride_vfp), .llvm_name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xscale)] = .{ - .index = @enumToInt(Feature.xscale), - .name = @tagName(Feature.xscale), .llvm_name = "xscale", .description = "ARMv5te architecture", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.zcz)] = .{ - .index = @enumToInt(Feature.zcz), - .name = @tagName(Feature.zcz), .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -1760,49 +1419,49 @@ pub const cpu = struct { pub const arm1020e = Cpu{ .name = "arm1020e", .llvm_name = "arm1020e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm1020t = Cpu{ .name = "arm1020t", .llvm_name = "arm1020t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5t, }), }; pub const arm1022e = Cpu{ .name = "arm1022e", .llvm_name = "arm1022e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm10e = Cpu{ .name = "arm10e", .llvm_name = "arm10e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm10tdmi = Cpu{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5t, }), }; pub const arm1136j_s = Cpu{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6, }), }; pub const arm1136jf_s = Cpu{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6, .slowfpvmlx, .vfp2, @@ -1811,14 +1470,14 @@ pub const cpu = struct { pub const arm1156t2_s = Cpu{ .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6t2, }), }; pub const arm1156t2f_s = Cpu{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6t2, .slowfpvmlx, .vfp2, @@ -1827,21 +1486,21 @@ pub const cpu = struct { pub const arm1176j_s = Cpu{ .name = "arm1176j_s", .llvm_name = "arm1176j-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6kz, }), }; pub const arm1176jz_s = Cpu{ .name = "arm1176jz_s", .llvm_name = "arm1176jz-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6kz, }), }; pub const arm1176jzf_s = Cpu{ .name = "arm1176jzf_s", .llvm_name = "arm1176jzf-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6kz, .slowfpvmlx, .vfp2, @@ -1850,126 +1509,126 @@ pub const cpu = struct { pub const arm710t = Cpu{ .name = "arm710t", .llvm_name = "arm710t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm720t = Cpu{ .name = "arm720t", .llvm_name = "arm720t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm7tdmi = Cpu{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm7tdmi_s = Cpu{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm8 = Cpu{ .name = "arm8", .llvm_name = "arm8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const arm810 = Cpu{ .name = "arm810", .llvm_name = "arm810", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const arm9 = Cpu{ .name = "arm9", .llvm_name = "arm9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm920 = Cpu{ .name = "arm920", .llvm_name = "arm920", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm920t = Cpu{ .name = "arm920t", .llvm_name = "arm920t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm922t = Cpu{ .name = "arm922t", .llvm_name = "arm922t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm926ej_s = Cpu{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm940t = Cpu{ .name = "arm940t", .llvm_name = "arm940t", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const arm946e_s = Cpu{ .name = "arm946e_s", .llvm_name = "arm946e-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm966e_s = Cpu{ .name = "arm966e_s", .llvm_name = "arm966e-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm968e_s = Cpu{ .name = "arm968e_s", .llvm_name = "arm968e-s", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm9e = Cpu{ .name = "arm9e", .llvm_name = "arm9e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const arm9tdmi = Cpu{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const cortex_a12 = Cpu{ .name = "cortex_a12", .llvm_name = "cortex-a12", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a12, .armv7_a, .avoid_partial_cpsr, @@ -1984,7 +1643,7 @@ pub const cpu = struct { pub const cortex_a15 = Cpu{ .name = "cortex_a15", .llvm_name = "cortex-a15", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a15, .armv7_a, .avoid_partial_cpsr, @@ -2002,7 +1661,7 @@ pub const cpu = struct { pub const cortex_a17 = Cpu{ .name = "cortex_a17", .llvm_name = "cortex-a17", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a17, .armv7_a, .avoid_partial_cpsr, @@ -2017,7 +1676,7 @@ pub const cpu = struct { pub const cortex_a32 = Cpu{ .name = "cortex_a32", .llvm_name = "cortex-a32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .crc, .crypto, @@ -2028,7 +1687,7 @@ pub const cpu = struct { pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a35, .armv8_a, .crc, @@ -2040,7 +1699,7 @@ pub const cpu = struct { pub const cortex_a5 = Cpu{ .name = "cortex_a5", .llvm_name = "cortex-a5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a5, .armv7_a, .mp, @@ -2055,7 +1714,7 @@ pub const cpu = struct { pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a53, .armv8_a, .crc, @@ -2068,7 +1727,7 @@ pub const cpu = struct { pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a55, .armv8_2_a, .dotprod, @@ -2079,7 +1738,7 @@ pub const cpu = struct { pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a57, .armv8_a, .avoid_partial_cpsr, @@ -2094,7 +1753,7 @@ pub const cpu = struct { pub const cortex_a7 = Cpu{ .name = "cortex_a7", .llvm_name = "cortex-a7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a7, .armv7_a, .mp, @@ -2111,7 +1770,7 @@ pub const cpu = struct { pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a72, .armv8_a, .crc, @@ -2123,7 +1782,7 @@ pub const cpu = struct { pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a73, .armv8_a, .crc, @@ -2135,7 +1794,7 @@ pub const cpu = struct { pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a75, .armv8_2_a, .dotprod, @@ -2146,7 +1805,7 @@ pub const cpu = struct { pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a76, .armv8_2_a, .crc, @@ -2160,7 +1819,7 @@ pub const cpu = struct { pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a76, .armv8_2_a, .crc, @@ -2174,7 +1833,7 @@ pub const cpu = struct { pub const cortex_a8 = Cpu{ .name = "cortex_a8", .llvm_name = "cortex-a8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a8, .armv7_a, .nonpipelined_vfp, @@ -2189,7 +1848,7 @@ pub const cpu = struct { pub const cortex_a9 = Cpu{ .name = "cortex_a9", .llvm_name = "cortex-a9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .a9, .armv7_a, .avoid_partial_cpsr, @@ -2209,28 +1868,28 @@ pub const cpu = struct { pub const cortex_m0 = Cpu{ .name = "cortex_m0", .llvm_name = "cortex-m0", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6_m, }), }; pub const cortex_m0plus = Cpu{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6_m, }), }; pub const cortex_m1 = Cpu{ .name = "cortex_m1", .llvm_name = "cortex-m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6_m, }), }; pub const cortex_m23 = Cpu{ .name = "cortex_m23", .llvm_name = "cortex-m23", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_m_base, .no_movt, }), @@ -2238,7 +1897,7 @@ pub const cpu = struct { pub const cortex_m3 = Cpu{ .name = "cortex_m3", .llvm_name = "cortex-m3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_m, .loop_align, .m3, @@ -2250,7 +1909,7 @@ pub const cpu = struct { pub const cortex_m33 = Cpu{ .name = "cortex_m33", .llvm_name = "cortex-m33", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_m_main, .dsp, .fp_armv8d16sp, @@ -2264,7 +1923,7 @@ pub const cpu = struct { pub const cortex_m35p = Cpu{ .name = "cortex_m35p", .llvm_name = "cortex-m35p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_m_main, .dsp, .fp_armv8d16sp, @@ -2278,7 +1937,7 @@ pub const cpu = struct { pub const cortex_m4 = Cpu{ .name = "cortex_m4", .llvm_name = "cortex-m4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7e_m, .loop_align, .no_branch_predictor, @@ -2291,7 +1950,7 @@ pub const cpu = struct { pub const cortex_m7 = Cpu{ .name = "cortex_m7", .llvm_name = "cortex-m7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7e_m, .fp_armv8d16, }), @@ -2299,7 +1958,7 @@ pub const cpu = struct { pub const cortex_r4 = Cpu{ .name = "cortex_r4", .llvm_name = "cortex-r4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_r, .avoid_partial_cpsr, .r4, @@ -2309,7 +1968,7 @@ pub const cpu = struct { pub const cortex_r4f = Cpu{ .name = "cortex_r4f", .llvm_name = "cortex-r4f", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_r, .avoid_partial_cpsr, .r4, @@ -2322,7 +1981,7 @@ pub const cpu = struct { pub const cortex_r5 = Cpu{ .name = "cortex_r5", .llvm_name = "cortex-r5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_r, .avoid_partial_cpsr, .hwdiv_arm, @@ -2336,7 +1995,7 @@ pub const cpu = struct { pub const cortex_r52 = Cpu{ .name = "cortex_r52", .llvm_name = "cortex-r52", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_r, .fpao, .r52, @@ -2347,7 +2006,7 @@ pub const cpu = struct { pub const cortex_r7 = Cpu{ .name = "cortex_r7", .llvm_name = "cortex-r7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_r, .avoid_partial_cpsr, .fp16, @@ -2363,7 +2022,7 @@ pub const cpu = struct { pub const cortex_r8 = Cpu{ .name = "cortex_r8", .llvm_name = "cortex-r8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_r, .avoid_partial_cpsr, .fp16, @@ -2378,7 +2037,7 @@ pub const cpu = struct { pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .avoid_movs_shop, .avoid_partial_cpsr, @@ -2399,14 +2058,14 @@ pub const cpu = struct { pub const ep9312 = Cpu{ .name = "ep9312", .llvm_name = "ep9312", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4t, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .exynos, }), @@ -2414,7 +2073,7 @@ pub const cpu = struct { pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .exynos, }), @@ -2422,7 +2081,7 @@ pub const cpu = struct { pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .exynos, }), @@ -2430,7 +2089,7 @@ pub const cpu = struct { pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_2_a, .dotprod, .exynos, @@ -2440,7 +2099,7 @@ pub const cpu = struct { pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_2_a, .dotprod, .exynos, @@ -2450,19 +2109,19 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const iwmmxt = Cpu{ .name = "iwmmxt", .llvm_name = "iwmmxt", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; pub const krait = Cpu{ .name = "krait", .llvm_name = "krait", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_a, .avoid_partial_cpsr, .fp16, @@ -2479,7 +2138,7 @@ pub const cpu = struct { pub const kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv8_a, .crc, .crypto, @@ -2491,7 +2150,7 @@ pub const cpu = struct { pub const mpcore = Cpu{ .name = "mpcore", .llvm_name = "mpcore", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6k, .slowfpvmlx, .vfp2, @@ -2500,21 +2159,21 @@ pub const cpu = struct { pub const mpcorenovfp = Cpu{ .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6k, }), }; pub const sc000 = Cpu{ .name = "sc000", .llvm_name = "sc000", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv6_m, }), }; pub const sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_m, .m3, .no_branch_predictor, @@ -2525,35 +2184,35 @@ pub const cpu = struct { pub const strongarm = Cpu{ .name = "strongarm", .llvm_name = "strongarm", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const strongarm110 = Cpu{ .name = "strongarm110", .llvm_name = "strongarm110", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const strongarm1100 = Cpu{ .name = "strongarm1100", .llvm_name = "strongarm1100", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const strongarm1110 = Cpu{ .name = "strongarm1110", .llvm_name = "strongarm1110", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv4, }), }; pub const swift = Cpu{ .name = "swift", .llvm_name = "swift", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv7_a, .avoid_movs_shop, .avoid_partial_cpsr, @@ -2580,7 +2239,7 @@ pub const cpu = struct { pub const xscale = Cpu{ .name = "xscale", .llvm_name = "xscale", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .armv5te, }), }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index ac739edc081d1d6c05d34b9bac5b5982829f20b2..687a8122fee8fe26abeb5476406506b8bd60d475 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -41,38 +41,30 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.addsubiw)] = .{ - .index = @enumToInt(Feature.addsubiw), - .name = @tagName(Feature.addsubiw), .llvm_name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr0)] = .{ - .index = @enumToInt(Feature.avr0), - .name = @tagName(Feature.avr0), .llvm_name = "avr0", .description = "The device is a part of the avr0 family", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr1)] = .{ - .index = @enumToInt(Feature.avr1), - .name = @tagName(Feature.avr1), .llvm_name = "avr1", .description = "The device is a part of the avr1 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr0, .lpm, }), }; result[@enumToInt(Feature.avr2)] = .{ - .index = @enumToInt(Feature.avr2), - .name = @tagName(Feature.avr2), .llvm_name = "avr2", .description = "The device is a part of the avr2 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .addsubiw, .avr1, .ijmpcall, @@ -80,11 +72,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avr25)] = .{ - .index = @enumToInt(Feature.avr25), - .name = @tagName(Feature.avr25), .llvm_name = "avr25", .description = "The device is a part of the avr25 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr2, .@"break", .lpmx, @@ -93,31 +83,25 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avr3)] = .{ - .index = @enumToInt(Feature.avr3), - .name = @tagName(Feature.avr3), .llvm_name = "avr3", .description = "The device is a part of the avr3 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr2, .jmpcall, }), }; result[@enumToInt(Feature.avr31)] = .{ - .index = @enumToInt(Feature.avr31), - .name = @tagName(Feature.avr31), .llvm_name = "avr31", .description = "The device is a part of the avr31 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr3, .elpm, }), }; result[@enumToInt(Feature.avr35)] = .{ - .index = @enumToInt(Feature.avr35), - .name = @tagName(Feature.avr35), .llvm_name = "avr35", .description = "The device is a part of the avr35 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr3, .@"break", .lpmx, @@ -126,11 +110,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avr4)] = .{ - .index = @enumToInt(Feature.avr4), - .name = @tagName(Feature.avr4), .llvm_name = "avr4", .description = "The device is a part of the avr4 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr2, .@"break", .lpmx, @@ -140,11 +122,9 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avr5)] = .{ - .index = @enumToInt(Feature.avr5), - .name = @tagName(Feature.avr5), .llvm_name = "avr5", .description = "The device is a part of the avr5 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr3, .@"break", .lpmx, @@ -154,31 +134,25 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.avr51)] = .{ - .index = @enumToInt(Feature.avr51), - .name = @tagName(Feature.avr51), .llvm_name = "avr51", .description = "The device is a part of the avr51 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr5, .elpm, .elpmx, }), }; result[@enumToInt(Feature.avr6)] = .{ - .index = @enumToInt(Feature.avr6), - .name = @tagName(Feature.avr6), .llvm_name = "avr6", .description = "The device is a part of the avr6 family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr51, }), }; result[@enumToInt(Feature.avrtiny)] = .{ - .index = @enumToInt(Feature.avrtiny), - .name = @tagName(Feature.avrtiny), .llvm_name = "avrtiny", .description = "The device is a part of the avrtiny family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr0, .@"break", .sram, @@ -186,102 +160,74 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.@"break")] = .{ - .index = @enumToInt(Feature.@"break"), - .name = @tagName(Feature.@"break"), .llvm_name = "break", .description = "The device supports the `BREAK` debugging instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.des)] = .{ - .index = @enumToInt(Feature.des), - .name = @tagName(Feature.des), .llvm_name = "des", .description = "The device supports the `DES k` encryption instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.eijmpcall)] = .{ - .index = @enumToInt(Feature.eijmpcall), - .name = @tagName(Feature.eijmpcall), .llvm_name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpm)] = .{ - .index = @enumToInt(Feature.elpm), - .name = @tagName(Feature.elpm), .llvm_name = "elpm", .description = "The device supports the ELPM instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpmx)] = .{ - .index = @enumToInt(Feature.elpmx), - .name = @tagName(Feature.elpmx), .llvm_name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ijmpcall)] = .{ - .index = @enumToInt(Feature.ijmpcall), - .name = @tagName(Feature.ijmpcall), .llvm_name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jmpcall)] = .{ - .index = @enumToInt(Feature.jmpcall), - .name = @tagName(Feature.jmpcall), .llvm_name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpm)] = .{ - .index = @enumToInt(Feature.lpm), - .name = @tagName(Feature.lpm), .llvm_name = "lpm", .description = "The device supports the `LPM` instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpmx)] = .{ - .index = @enumToInt(Feature.lpmx), - .name = @tagName(Feature.lpmx), .llvm_name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movw)] = .{ - .index = @enumToInt(Feature.movw), - .name = @tagName(Feature.movw), .llvm_name = "movw", .description = "The device supports the 16-bit MOVW instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mul)] = .{ - .index = @enumToInt(Feature.mul), - .name = @tagName(Feature.mul), .llvm_name = "mul", .description = "The device supports the multiplication instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rmw)] = .{ - .index = @enumToInt(Feature.rmw), - .name = @tagName(Feature.rmw), .llvm_name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smallstack)] = .{ - .index = @enumToInt(Feature.smallstack), - .name = @tagName(Feature.smallstack), .llvm_name = "smallstack", .description = "The device has an 8-bit stack pointer", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.special)] = .{ - .index = @enumToInt(Feature.special), - .name = @tagName(Feature.special), .llvm_name = "special", .description = "Enable use of the entire instruction set - used for debugging", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .addsubiw, .@"break", .des, @@ -301,39 +247,29 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.spm)] = .{ - .index = @enumToInt(Feature.spm), - .name = @tagName(Feature.spm), .llvm_name = "spm", .description = "The device supports the `SPM` instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spmx)] = .{ - .index = @enumToInt(Feature.spmx), - .name = @tagName(Feature.spmx), .llvm_name = "spmx", .description = "The device supports the `SPM Z+` instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sram)] = .{ - .index = @enumToInt(Feature.sram), - .name = @tagName(Feature.sram), .llvm_name = "sram", .description = "The device has random access memory", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tinyencoding)] = .{ - .index = @enumToInt(Feature.tinyencoding), - .name = @tagName(Feature.tinyencoding), .llvm_name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xmega)] = .{ - .index = @enumToInt(Feature.xmega), - .name = @tagName(Feature.xmega), .llvm_name = "xmega", .description = "The device is a part of the xmega family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avr51, .des, .eijmpcall, @@ -341,15 +277,19 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.xmegau)] = .{ - .index = @enumToInt(Feature.xmegau), - .name = @tagName(Feature.xmegau), .llvm_name = "xmegau", .description = "The device is a part of the xmegau family", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .rmw, .xmega, }), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -357,28 +297,28 @@ pub const cpu = struct { pub const at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr31, }), }; pub const at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, }), }; pub const at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, }), }; pub const at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, .lpmx, .movw, @@ -387,217 +327,217 @@ pub const cpu = struct { pub const at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const at90s1200 = Cpu{ .name = "at90s1200", .llvm_name = "at90s1200", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr0, }), }; pub const at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, .lpmx, .movw, @@ -607,133 +547,133 @@ pub const cpu = struct { pub const ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr31, }), }; pub const atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, .lpmx, .movw, @@ -744,14 +684,14 @@ pub const cpu = struct { pub const atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, .lpmx, .movw, @@ -762,623 +702,623 @@ pub const cpu = struct { pub const atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr6, }), }; pub const atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr6, }), }; pub const atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr6, }), }; pub const atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr6, }), }; pub const atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, .lpmx, .movw, @@ -1389,7 +1329,7 @@ pub const cpu = struct { pub const atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, .lpmx, .movw, @@ -1400,175 +1340,175 @@ pub const cpu = struct { pub const atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny11 = Cpu{ .name = "attiny11", .llvm_name = "attiny11", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr1, }), }; pub const attiny12 = Cpu{ .name = "attiny12", .llvm_name = "attiny12", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr1, }), }; pub const attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny15 = Cpu{ .name = "attiny15", .llvm_name = "attiny15", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr1, }), }; pub const attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, .lpmx, }), @@ -1576,602 +1516,602 @@ pub const cpu = struct { pub const attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny28 = Cpu{ .name = "attiny28", .llvm_name = "attiny28", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr1, }), }; pub const attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmegau, }), }; pub const atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avr1 = Cpu{ .name = "avr1", .llvm_name = "avr1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr1, }), }; pub const avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr2, }), }; pub const avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr25, }), }; pub const avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr3, }), }; pub const avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr31, }), }; pub const avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr35, }), }; pub const avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr4, }), }; pub const avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; pub const avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr51, }), }; pub const avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr6, }), }; pub const avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avrtiny, }), }; pub const avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .xmega, }), }; pub const m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .avr5, }), }; @@ -2440,6 +2380,6 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.m3000, }; -pub const baseline_features = featureSet(&[_]Feature{ +pub const baseline_features = featureSet(&all_features, &[_]Feature{ .avr0, }); diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 73ed463bc5d82ffd656f318e33258ab87a8513b2..350d434a6c5da066057dc8984dec96927531adea 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -11,29 +11,29 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.alu32)] = .{ - .index = @enumToInt(Feature.alu32), - .name = @tagName(Feature.alu32), .llvm_name = "alu32", .description = "Enable ALU32 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dummy)] = .{ - .index = @enumToInt(Feature.dummy), - .name = @tagName(Feature.dummy), .llvm_name = "dummy", .description = "unused feature", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dwarfris)] = .{ - .index = @enumToInt(Feature.dwarfris), - .name = @tagName(Feature.dwarfris), .llvm_name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -41,27 +41,27 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const probe = Cpu{ .name = "probe", .llvm_name = "probe", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const v1 = Cpu{ .name = "v1", .llvm_name = "v1", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const v2 = Cpu{ .name = "v2", .llvm_name = "v2", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const v3 = Cpu{ .name = "v3", .llvm_name = "v3", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index bea73eb7941010e1ad34836ab70a6e2c713dd673..cdb44ec889800119207477350a28b4c2d4940926 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -32,76 +32,60 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.duplex)] = .{ - .index = @enumToInt(Feature.duplex), - .name = @tagName(Feature.duplex), .llvm_name = "duplex", .description = "Enable generation of duplex instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx)] = .{ - .index = @enumToInt(Feature.hvx), - .name = @tagName(Feature.hvx), .llvm_name = "hvx", .description = "Hexagon HVX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx_length128b)] = .{ - .index = @enumToInt(Feature.hvx_length128b), - .name = @tagName(Feature.hvx_length128b), .llvm_name = "hvx-length128b", .description = "Hexagon HVX 128B instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvx_length64b)] = .{ - .index = @enumToInt(Feature.hvx_length64b), - .name = @tagName(Feature.hvx_length64b), .llvm_name = "hvx-length64b", .description = "Hexagon HVX 64B instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvxv60)] = .{ - .index = @enumToInt(Feature.hvxv60), - .name = @tagName(Feature.hvxv60), .llvm_name = "hvxv60", .description = "Hexagon HVX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvxv62)] = .{ - .index = @enumToInt(Feature.hvxv62), - .name = @tagName(Feature.hvxv62), .llvm_name = "hvxv62", .description = "Hexagon HVX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, .hvxv60, }), }; result[@enumToInt(Feature.hvxv65)] = .{ - .index = @enumToInt(Feature.hvxv65), - .name = @tagName(Feature.hvxv65), .llvm_name = "hvxv65", .description = "Hexagon HVX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, .hvxv60, .hvxv62, }), }; result[@enumToInt(Feature.hvxv66)] = .{ - .index = @enumToInt(Feature.hvxv66), - .name = @tagName(Feature.hvxv66), .llvm_name = "hvxv66", .description = "Hexagon HVX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hvx, .hvxv60, .hvxv62, @@ -110,121 +94,95 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.long_calls)] = .{ - .index = @enumToInt(Feature.long_calls), - .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Use constant-extended calls", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mem_noshuf)] = .{ - .index = @enumToInt(Feature.mem_noshuf), - .name = @tagName(Feature.mem_noshuf), .llvm_name = "mem_noshuf", .description = "Supports mem_noshuf feature", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.memops)] = .{ - .index = @enumToInt(Feature.memops), - .name = @tagName(Feature.memops), .llvm_name = "memops", .description = "Use memop instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noreturn_stack_elim)] = .{ - .index = @enumToInt(Feature.noreturn_stack_elim), - .name = @tagName(Feature.noreturn_stack_elim), .llvm_name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nvj)] = .{ - .index = @enumToInt(Feature.nvj), - .name = @tagName(Feature.nvj), .llvm_name = "nvj", .description = "Support for new-value jumps", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .packets, }), }; result[@enumToInt(Feature.nvs)] = .{ - .index = @enumToInt(Feature.nvs), - .name = @tagName(Feature.nvs), .llvm_name = "nvs", .description = "Support for new-value stores", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .packets, }), }; result[@enumToInt(Feature.packets)] = .{ - .index = @enumToInt(Feature.packets), - .name = @tagName(Feature.packets), .llvm_name = "packets", .description = "Support for instruction packets", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserved_r19)] = .{ - .index = @enumToInt(Feature.reserved_r19), - .name = @tagName(Feature.reserved_r19), .llvm_name = "reserved-r19", .description = "Reserve register R19", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.small_data)] = .{ - .index = @enumToInt(Feature.small_data), - .name = @tagName(Feature.small_data), .llvm_name = "small-data", .description = "Allow GP-relative addressing of global variables", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5)] = .{ - .index = @enumToInt(Feature.v5), - .name = @tagName(Feature.v5), .llvm_name = "v5", .description = "Enable Hexagon V5 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v55)] = .{ - .index = @enumToInt(Feature.v55), - .name = @tagName(Feature.v55), .llvm_name = "v55", .description = "Enable Hexagon V55 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v60)] = .{ - .index = @enumToInt(Feature.v60), - .name = @tagName(Feature.v60), .llvm_name = "v60", .description = "Enable Hexagon V60 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v62)] = .{ - .index = @enumToInt(Feature.v62), - .name = @tagName(Feature.v62), .llvm_name = "v62", .description = "Enable Hexagon V62 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v65)] = .{ - .index = @enumToInt(Feature.v65), - .name = @tagName(Feature.v65), .llvm_name = "v65", .description = "Enable Hexagon V65 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v66)] = .{ - .index = @enumToInt(Feature.v66), - .name = @tagName(Feature.v66), .llvm_name = "v66", .description = "Enable Hexagon V66 architecture", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zreg)] = .{ - .index = @enumToInt(Feature.zreg), - .name = @tagName(Feature.zreg), .llvm_name = "zreg", .description = "Hexagon ZReg extension instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -232,7 +190,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .memops, .nvj, @@ -247,7 +205,7 @@ pub const cpu = struct { pub const hexagonv5 = Cpu{ .name = "hexagonv5", .llvm_name = "hexagonv5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .memops, .nvj, @@ -260,7 +218,7 @@ pub const cpu = struct { pub const hexagonv55 = Cpu{ .name = "hexagonv55", .llvm_name = "hexagonv55", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .memops, .nvj, @@ -274,7 +232,7 @@ pub const cpu = struct { pub const hexagonv60 = Cpu{ .name = "hexagonv60", .llvm_name = "hexagonv60", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .memops, .nvj, @@ -289,7 +247,7 @@ pub const cpu = struct { pub const hexagonv62 = Cpu{ .name = "hexagonv62", .llvm_name = "hexagonv62", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .memops, .nvj, @@ -305,7 +263,7 @@ pub const cpu = struct { pub const hexagonv65 = Cpu{ .name = "hexagonv65", .llvm_name = "hexagonv65", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .mem_noshuf, .memops, @@ -323,7 +281,7 @@ pub const cpu = struct { pub const hexagonv66 = Cpu{ .name = "hexagonv66", .llvm_name = "hexagonv66", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .duplex, .mem_noshuf, .memops, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 19ea4d70091fa6c6f809abc362f2cf2f25a57a47..51835f29808e2bb32f4b65426bb0e33266d92ae4 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -57,135 +57,101 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.abs2008)] = .{ - .index = @enumToInt(Feature.abs2008), - .name = @tagName(Feature.abs2008), .llvm_name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cnmips)] = .{ - .index = @enumToInt(Feature.cnmips), - .name = @tagName(Feature.cnmips), .llvm_name = "cnmips", .description = "Octeon cnMIPS Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips64r2, }), }; result[@enumToInt(Feature.crc)] = .{ - .index = @enumToInt(Feature.crc), - .name = @tagName(Feature.crc), .llvm_name = "crc", .description = "Mips R6 CRC ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dsp)] = .{ - .index = @enumToInt(Feature.dsp), - .name = @tagName(Feature.dsp), .llvm_name = "dsp", .description = "Mips DSP ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dspr2)] = .{ - .index = @enumToInt(Feature.dspr2), - .name = @tagName(Feature.dspr2), .llvm_name = "dspr2", .description = "Mips DSP-R2 ASE", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dsp, }), }; result[@enumToInt(Feature.dspr3)] = .{ - .index = @enumToInt(Feature.dspr3), - .name = @tagName(Feature.dspr3), .llvm_name = "dspr3", .description = "Mips DSP-R3 ASE", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .dsp, .dspr2, }), }; result[@enumToInt(Feature.eva)] = .{ - .index = @enumToInt(Feature.eva), - .name = @tagName(Feature.eva), .llvm_name = "eva", .description = "Mips EVA ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ - .index = @enumToInt(Feature.fp64), - .name = @tagName(Feature.fp64), .llvm_name = "fp64", .description = "Support 64-bit FP registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpxx)] = .{ - .index = @enumToInt(Feature.fpxx), - .name = @tagName(Feature.fpxx), .llvm_name = "fpxx", .description = "Support for FPXX", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ginv)] = .{ - .index = @enumToInt(Feature.ginv), - .name = @tagName(Feature.ginv), .llvm_name = "ginv", .description = "Mips Global Invalidate ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gp64)] = .{ - .index = @enumToInt(Feature.gp64), - .name = @tagName(Feature.gp64), .llvm_name = "gp64", .description = "General Purpose Registers are 64-bit wide", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ - .index = @enumToInt(Feature.long_calls), - .name = @tagName(Feature.long_calls), .llvm_name = "long-calls", .description = "Disable use of the jal instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.micromips)] = .{ - .index = @enumToInt(Feature.micromips), - .name = @tagName(Feature.micromips), .llvm_name = "micromips", .description = "microMips mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips1)] = .{ - .index = @enumToInt(Feature.mips1), - .name = @tagName(Feature.mips1), .llvm_name = "mips1", .description = "Mips I ISA Support [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips16)] = .{ - .index = @enumToInt(Feature.mips16), - .name = @tagName(Feature.mips16), .llvm_name = "mips16", .description = "Mips16 mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips2)] = .{ - .index = @enumToInt(Feature.mips2), - .name = @tagName(Feature.mips2), .llvm_name = "mips2", .description = "Mips II ISA Support [highly experimental]", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips1, }), }; result[@enumToInt(Feature.mips3)] = .{ - .index = @enumToInt(Feature.mips3), - .name = @tagName(Feature.mips3), .llvm_name = "mips3", .description = "MIPS III ISA Support [highly experimental]", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fp64, .gp64, .mips2, @@ -194,22 +160,18 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.mips32)] = .{ - .index = @enumToInt(Feature.mips32), - .name = @tagName(Feature.mips32), .llvm_name = "mips32", .description = "Mips32 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips2, .mips3_32, .mips4_32, }), }; result[@enumToInt(Feature.mips32r2)] = .{ - .index = @enumToInt(Feature.mips32r2), - .name = @tagName(Feature.mips32r2), .llvm_name = "mips32r2", .description = "Mips32r2 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32, .mips3_32r2, .mips4_32r2, @@ -217,29 +179,23 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.mips32r3)] = .{ - .index = @enumToInt(Feature.mips32r3), - .name = @tagName(Feature.mips32r3), .llvm_name = "mips32r3", .description = "Mips32r3 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r2, }), }; result[@enumToInt(Feature.mips32r5)] = .{ - .index = @enumToInt(Feature.mips32r5), - .name = @tagName(Feature.mips32r5), .llvm_name = "mips32r5", .description = "Mips32r5 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r3, }), }; result[@enumToInt(Feature.mips32r6)] = .{ - .index = @enumToInt(Feature.mips32r6), - .name = @tagName(Feature.mips32r6), .llvm_name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .abs2008, .fp64, .mips32r5, @@ -247,107 +203,83 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.mips3_32)] = .{ - .index = @enumToInt(Feature.mips3_32), - .name = @tagName(Feature.mips3_32), .llvm_name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips3_32r2)] = .{ - .index = @enumToInt(Feature.mips3_32r2), - .name = @tagName(Feature.mips3_32r2), .llvm_name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4)] = .{ - .index = @enumToInt(Feature.mips4), - .name = @tagName(Feature.mips4), .llvm_name = "mips4", .description = "MIPS IV ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips3, .mips4_32, .mips4_32r2, }), }; result[@enumToInt(Feature.mips4_32)] = .{ - .index = @enumToInt(Feature.mips4_32), - .name = @tagName(Feature.mips4_32), .llvm_name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4_32r2)] = .{ - .index = @enumToInt(Feature.mips4_32r2), - .name = @tagName(Feature.mips4_32r2), .llvm_name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips5)] = .{ - .index = @enumToInt(Feature.mips5), - .name = @tagName(Feature.mips5), .llvm_name = "mips5", .description = "MIPS V ISA Support [highly experimental]", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips4, .mips5_32r2, }), }; result[@enumToInt(Feature.mips5_32r2)] = .{ - .index = @enumToInt(Feature.mips5_32r2), - .name = @tagName(Feature.mips5_32r2), .llvm_name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips64)] = .{ - .index = @enumToInt(Feature.mips64), - .name = @tagName(Feature.mips64), .llvm_name = "mips64", .description = "Mips64 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32, .mips5, }), }; result[@enumToInt(Feature.mips64r2)] = .{ - .index = @enumToInt(Feature.mips64r2), - .name = @tagName(Feature.mips64r2), .llvm_name = "mips64r2", .description = "Mips64r2 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r2, .mips64, }), }; result[@enumToInt(Feature.mips64r3)] = .{ - .index = @enumToInt(Feature.mips64r3), - .name = @tagName(Feature.mips64r3), .llvm_name = "mips64r3", .description = "Mips64r3 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r3, .mips64r2, }), }; result[@enumToInt(Feature.mips64r5)] = .{ - .index = @enumToInt(Feature.mips64r5), - .name = @tagName(Feature.mips64r5), .llvm_name = "mips64r5", .description = "Mips64r5 ISA Support", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r5, .mips64r3, }), }; result[@enumToInt(Feature.mips64r6)] = .{ - .index = @enumToInt(Feature.mips64r6), - .name = @tagName(Feature.mips64r6), .llvm_name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .abs2008, .mips32r6, .mips64r5, @@ -355,112 +287,88 @@ pub const all_features = blk: { }), }; result[@enumToInt(Feature.msa)] = .{ - .index = @enumToInt(Feature.msa), - .name = @tagName(Feature.msa), .llvm_name = "msa", .description = "Mips MSA ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mt)] = .{ - .index = @enumToInt(Feature.mt), - .name = @tagName(Feature.mt), .llvm_name = "mt", .description = "Mips MT ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nan2008)] = .{ - .index = @enumToInt(Feature.nan2008), - .name = @tagName(Feature.nan2008), .llvm_name = "nan2008", .description = "IEEE 754-2008 NaN encoding", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noabicalls)] = .{ - .index = @enumToInt(Feature.noabicalls), - .name = @tagName(Feature.noabicalls), .llvm_name = "noabicalls", .description = "Disable SVR4-style position-independent code", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nomadd4)] = .{ - .index = @enumToInt(Feature.nomadd4), - .name = @tagName(Feature.nomadd4), .llvm_name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nooddspreg)] = .{ - .index = @enumToInt(Feature.nooddspreg), - .name = @tagName(Feature.nooddspreg), .llvm_name = "nooddspreg", .description = "Disable odd numbered single-precision registers", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.p5600)] = .{ - .index = @enumToInt(Feature.p5600), - .name = @tagName(Feature.p5600), .llvm_name = "p5600", .description = "The P5600 Processor", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mips32r5, }), }; result[@enumToInt(Feature.ptr64)] = .{ - .index = @enumToInt(Feature.ptr64), - .name = @tagName(Feature.ptr64), .llvm_name = "ptr64", .description = "Pointers are 64-bit wide", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.single_float)] = .{ - .index = @enumToInt(Feature.single_float), - .name = @tagName(Feature.single_float), .llvm_name = "single-float", .description = "Only supports single precision float", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ - .index = @enumToInt(Feature.soft_float), - .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Does not support floating point instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sym32)] = .{ - .index = @enumToInt(Feature.sym32), - .name = @tagName(Feature.sym32), .llvm_name = "sym32", .description = "Symbols are 32 bit on Mips64", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{ - .index = @enumToInt(Feature.use_indirect_jump_hazard), - .name = @tagName(Feature.use_indirect_jump_hazard), .llvm_name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_tcc_in_div)] = .{ - .index = @enumToInt(Feature.use_tcc_in_div), - .name = @tagName(Feature.use_tcc_in_div), .llvm_name = "use-tcc-in-div", .description = "Force the assembler to use trapping", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vfpu)] = .{ - .index = @enumToInt(Feature.vfpu), - .name = @tagName(Feature.vfpu), .llvm_name = "vfpu", .description = "Enable vector FPU instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.virt)] = .{ - .index = @enumToInt(Feature.virt), - .name = @tagName(Feature.virt), .llvm_name = "virt", .description = "Mips Virtualization ASE", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -468,112 +376,112 @@ pub const cpu = struct { pub const mips1 = Cpu{ .name = "mips1", .llvm_name = "mips1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips1, }), }; pub const mips2 = Cpu{ .name = "mips2", .llvm_name = "mips2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips2, }), }; pub const mips3 = Cpu{ .name = "mips3", .llvm_name = "mips3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips3, }), }; pub const mips32 = Cpu{ .name = "mips32", .llvm_name = "mips32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips32, }), }; pub const mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips32r2, }), }; pub const mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips32r3, }), }; pub const mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips32r5, }), }; pub const mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips32r6, }), }; pub const mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips4, }), }; pub const mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips5, }), }; pub const mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips64, }), }; pub const mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips64r2, }), }; pub const mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips64r3, }), }; pub const mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips64r5, }), }; pub const mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mips64r6, }), }; pub const octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cnmips, .mips64r2, }), @@ -581,7 +489,7 @@ pub const cpu = struct { pub const p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .p5600, }), }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index 9bc184d4da59c7237f624e8afc0a4b9edab87b3d..ecbc362b1afd4f9142ae19f37faa89cb2fd5998d 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -12,36 +12,34 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.ext)] = .{ - .index = @enumToInt(Feature.ext), - .name = @tagName(Feature.ext), .llvm_name = "ext", .description = "Enable MSP430-X extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult16)] = .{ - .index = @enumToInt(Feature.hwmult16), - .name = @tagName(Feature.hwmult16), .llvm_name = "hwmult16", .description = "Enable 16-bit hardware multiplier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult32)] = .{ - .index = @enumToInt(Feature.hwmult32), - .name = @tagName(Feature.hwmult32), .llvm_name = "hwmult32", .description = "Enable 32-bit hardware multiplier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmultf5)] = .{ - .index = @enumToInt(Feature.hwmultf5), - .name = @tagName(Feature.hwmultf5), .llvm_name = "hwmultf5", .description = "Enable F5 series hardware multiplier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -49,17 +47,17 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const msp430 = Cpu{ .name = "msp430", .llvm_name = "msp430", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const msp430x = Cpu{ .name = "msp430x", .llvm_name = "msp430x", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ext, }), }; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index 3cc4f18a14ec823db6beda228ae04ac97c649d7c..58babffd86d7ae6eb8240837ee5f500c99ebae94 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -33,183 +33,139 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.ptx32)] = .{ - .index = @enumToInt(Feature.ptx32), - .name = @tagName(Feature.ptx32), .llvm_name = "ptx32", .description = "Use PTX version 3.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx40)] = .{ - .index = @enumToInt(Feature.ptx40), - .name = @tagName(Feature.ptx40), .llvm_name = "ptx40", .description = "Use PTX version 4.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx41)] = .{ - .index = @enumToInt(Feature.ptx41), - .name = @tagName(Feature.ptx41), .llvm_name = "ptx41", .description = "Use PTX version 4.1", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx42)] = .{ - .index = @enumToInt(Feature.ptx42), - .name = @tagName(Feature.ptx42), .llvm_name = "ptx42", .description = "Use PTX version 4.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx43)] = .{ - .index = @enumToInt(Feature.ptx43), - .name = @tagName(Feature.ptx43), .llvm_name = "ptx43", .description = "Use PTX version 4.3", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx50)] = .{ - .index = @enumToInt(Feature.ptx50), - .name = @tagName(Feature.ptx50), .llvm_name = "ptx50", .description = "Use PTX version 5.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx60)] = .{ - .index = @enumToInt(Feature.ptx60), - .name = @tagName(Feature.ptx60), .llvm_name = "ptx60", .description = "Use PTX version 6.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx61)] = .{ - .index = @enumToInt(Feature.ptx61), - .name = @tagName(Feature.ptx61), .llvm_name = "ptx61", .description = "Use PTX version 6.1", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx63)] = .{ - .index = @enumToInt(Feature.ptx63), - .name = @tagName(Feature.ptx63), .llvm_name = "ptx63", .description = "Use PTX version 6.3", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx64)] = .{ - .index = @enumToInt(Feature.ptx64), - .name = @tagName(Feature.ptx64), .llvm_name = "ptx64", .description = "Use PTX version 6.4", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_20)] = .{ - .index = @enumToInt(Feature.sm_20), - .name = @tagName(Feature.sm_20), .llvm_name = "sm_20", .description = "Target SM 2.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_21)] = .{ - .index = @enumToInt(Feature.sm_21), - .name = @tagName(Feature.sm_21), .llvm_name = "sm_21", .description = "Target SM 2.1", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_30)] = .{ - .index = @enumToInt(Feature.sm_30), - .name = @tagName(Feature.sm_30), .llvm_name = "sm_30", .description = "Target SM 3.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_32)] = .{ - .index = @enumToInt(Feature.sm_32), - .name = @tagName(Feature.sm_32), .llvm_name = "sm_32", .description = "Target SM 3.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_35)] = .{ - .index = @enumToInt(Feature.sm_35), - .name = @tagName(Feature.sm_35), .llvm_name = "sm_35", .description = "Target SM 3.5", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_37)] = .{ - .index = @enumToInt(Feature.sm_37), - .name = @tagName(Feature.sm_37), .llvm_name = "sm_37", .description = "Target SM 3.7", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_50)] = .{ - .index = @enumToInt(Feature.sm_50), - .name = @tagName(Feature.sm_50), .llvm_name = "sm_50", .description = "Target SM 5.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_52)] = .{ - .index = @enumToInt(Feature.sm_52), - .name = @tagName(Feature.sm_52), .llvm_name = "sm_52", .description = "Target SM 5.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_53)] = .{ - .index = @enumToInt(Feature.sm_53), - .name = @tagName(Feature.sm_53), .llvm_name = "sm_53", .description = "Target SM 5.3", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_60)] = .{ - .index = @enumToInt(Feature.sm_60), - .name = @tagName(Feature.sm_60), .llvm_name = "sm_60", .description = "Target SM 6.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_61)] = .{ - .index = @enumToInt(Feature.sm_61), - .name = @tagName(Feature.sm_61), .llvm_name = "sm_61", .description = "Target SM 6.1", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_62)] = .{ - .index = @enumToInt(Feature.sm_62), - .name = @tagName(Feature.sm_62), .llvm_name = "sm_62", .description = "Target SM 6.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_70)] = .{ - .index = @enumToInt(Feature.sm_70), - .name = @tagName(Feature.sm_70), .llvm_name = "sm_70", .description = "Target SM 7.0", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_72)] = .{ - .index = @enumToInt(Feature.sm_72), - .name = @tagName(Feature.sm_72), .llvm_name = "sm_72", .description = "Target SM 7.2", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_75)] = .{ - .index = @enumToInt(Feature.sm_75), - .name = @tagName(Feature.sm_75), .llvm_name = "sm_75", .description = "Target SM 7.5", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -217,28 +173,28 @@ pub const cpu = struct { pub const sm_20 = Cpu{ .name = "sm_20", .llvm_name = "sm_20", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .sm_20, }), }; pub const sm_21 = Cpu{ .name = "sm_21", .llvm_name = "sm_21", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .sm_21, }), }; pub const sm_30 = Cpu{ .name = "sm_30", .llvm_name = "sm_30", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .sm_30, }), }; pub const sm_32 = Cpu{ .name = "sm_32", .llvm_name = "sm_32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx40, .sm_32, }), @@ -246,14 +202,14 @@ pub const cpu = struct { pub const sm_35 = Cpu{ .name = "sm_35", .llvm_name = "sm_35", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .sm_35, }), }; pub const sm_37 = Cpu{ .name = "sm_37", .llvm_name = "sm_37", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx41, .sm_37, }), @@ -261,7 +217,7 @@ pub const cpu = struct { pub const sm_50 = Cpu{ .name = "sm_50", .llvm_name = "sm_50", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx40, .sm_50, }), @@ -269,7 +225,7 @@ pub const cpu = struct { pub const sm_52 = Cpu{ .name = "sm_52", .llvm_name = "sm_52", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx41, .sm_52, }), @@ -277,7 +233,7 @@ pub const cpu = struct { pub const sm_53 = Cpu{ .name = "sm_53", .llvm_name = "sm_53", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx42, .sm_53, }), @@ -285,7 +241,7 @@ pub const cpu = struct { pub const sm_60 = Cpu{ .name = "sm_60", .llvm_name = "sm_60", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx50, .sm_60, }), @@ -293,7 +249,7 @@ pub const cpu = struct { pub const sm_61 = Cpu{ .name = "sm_61", .llvm_name = "sm_61", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx50, .sm_61, }), @@ -301,7 +257,7 @@ pub const cpu = struct { pub const sm_62 = Cpu{ .name = "sm_62", .llvm_name = "sm_62", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx50, .sm_62, }), @@ -309,7 +265,7 @@ pub const cpu = struct { pub const sm_70 = Cpu{ .name = "sm_70", .llvm_name = "sm_70", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx60, .sm_70, }), @@ -317,7 +273,7 @@ pub const cpu = struct { pub const sm_72 = Cpu{ .name = "sm_72", .llvm_name = "sm_72", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx61, .sm_72, }), @@ -325,7 +281,7 @@ pub const cpu = struct { pub const sm_75 = Cpu{ .name = "sm_75", .llvm_name = "sm_75", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .ptx63, .sm_75, }), diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 3dfc2d7beabab54681eba11d24e09434d655ce45..981c595c93eedba66c7804523a961d1d397e348e 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -59,417 +59,321 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ - .index = @enumToInt(Feature.@"64bit"), - .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Enable 64-bit instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"64bitregs")] = .{ - .index = @enumToInt(Feature.@"64bitregs"), - .name = @tagName(Feature.@"64bitregs"), .llvm_name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altivec)] = .{ - .index = @enumToInt(Feature.altivec), - .name = @tagName(Feature.altivec), .llvm_name = "altivec", .description = "Enable Altivec instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.booke)] = .{ - .index = @enumToInt(Feature.booke), - .name = @tagName(Feature.booke), .llvm_name = "booke", .description = "Enable Book E instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .icbt, }), }; result[@enumToInt(Feature.bpermd)] = .{ - .index = @enumToInt(Feature.bpermd), - .name = @tagName(Feature.bpermd), .llvm_name = "bpermd", .description = "Enable the bpermd instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmpb)] = .{ - .index = @enumToInt(Feature.cmpb), - .name = @tagName(Feature.cmpb), .llvm_name = "cmpb", .description = "Enable the cmpb instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crbits)] = .{ - .index = @enumToInt(Feature.crbits), - .name = @tagName(Feature.crbits), .llvm_name = "crbits", .description = "Use condition-register bits individually", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ - .index = @enumToInt(Feature.crypto), - .name = @tagName(Feature.crypto), .llvm_name = "crypto", .description = "Enable POWER8 Crypto instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .power8_altivec, }), }; result[@enumToInt(Feature.direct_move)] = .{ - .index = @enumToInt(Feature.direct_move), - .name = @tagName(Feature.direct_move), .llvm_name = "direct-move", .description = "Enable Power8 direct move instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vsx, }), }; result[@enumToInt(Feature.e500)] = .{ - .index = @enumToInt(Feature.e500), - .name = @tagName(Feature.e500), .llvm_name = "e500", .description = "Enable E500/E500mc instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.extdiv)] = .{ - .index = @enumToInt(Feature.extdiv), - .name = @tagName(Feature.extdiv), .llvm_name = "extdiv", .description = "Enable extended divide instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fcpsgn)] = .{ - .index = @enumToInt(Feature.fcpsgn), - .name = @tagName(Feature.fcpsgn), .llvm_name = "fcpsgn", .description = "Enable the fcpsgn instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.float128)] = .{ - .index = @enumToInt(Feature.float128), - .name = @tagName(Feature.float128), .llvm_name = "float128", .description = "Enable the __float128 data type for IEEE-754R Binary128.", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .vsx, }), }; result[@enumToInt(Feature.fpcvt)] = .{ - .index = @enumToInt(Feature.fpcvt), - .name = @tagName(Feature.fpcvt), .llvm_name = "fpcvt", .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fprnd)] = .{ - .index = @enumToInt(Feature.fprnd), - .name = @tagName(Feature.fprnd), .llvm_name = "fprnd", .description = "Enable the fri[mnpz] instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fpu)] = .{ - .index = @enumToInt(Feature.fpu), - .name = @tagName(Feature.fpu), .llvm_name = "fpu", .description = "Enable classic FPU instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hard_float, }), }; result[@enumToInt(Feature.fre)] = .{ - .index = @enumToInt(Feature.fre), - .name = @tagName(Feature.fre), .llvm_name = "fre", .description = "Enable the fre instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fres)] = .{ - .index = @enumToInt(Feature.fres), - .name = @tagName(Feature.fres), .llvm_name = "fres", .description = "Enable the fres instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.frsqrte)] = .{ - .index = @enumToInt(Feature.frsqrte), - .name = @tagName(Feature.frsqrte), .llvm_name = "frsqrte", .description = "Enable the frsqrte instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.frsqrtes)] = .{ - .index = @enumToInt(Feature.frsqrtes), - .name = @tagName(Feature.frsqrtes), .llvm_name = "frsqrtes", .description = "Enable the frsqrtes instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fsqrt)] = .{ - .index = @enumToInt(Feature.fsqrt), - .name = @tagName(Feature.fsqrt), .llvm_name = "fsqrt", .description = "Enable the fsqrt instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.hard_float)] = .{ - .index = @enumToInt(Feature.hard_float), - .name = @tagName(Feature.hard_float), .llvm_name = "hard-float", .description = "Enable floating-point instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.htm)] = .{ - .index = @enumToInt(Feature.htm), - .name = @tagName(Feature.htm), .llvm_name = "htm", .description = "Enable Hardware Transactional Memory instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.icbt)] = .{ - .index = @enumToInt(Feature.icbt), - .name = @tagName(Feature.icbt), .llvm_name = "icbt", .description = "Enable icbt instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invariant_function_descriptors)] = .{ - .index = @enumToInt(Feature.invariant_function_descriptors), - .name = @tagName(Feature.invariant_function_descriptors), .llvm_name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isa_v30_instructions)] = .{ - .index = @enumToInt(Feature.isa_v30_instructions), - .name = @tagName(Feature.isa_v30_instructions), .llvm_name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isel)] = .{ - .index = @enumToInt(Feature.isel), - .name = @tagName(Feature.isel), .llvm_name = "isel", .description = "Enable the isel instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldbrx)] = .{ - .index = @enumToInt(Feature.ldbrx), - .name = @tagName(Feature.ldbrx), .llvm_name = "ldbrx", .description = "Enable the ldbrx instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lfiwax)] = .{ - .index = @enumToInt(Feature.lfiwax), - .name = @tagName(Feature.lfiwax), .llvm_name = "lfiwax", .description = "Enable the lfiwax instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.longcall)] = .{ - .index = @enumToInt(Feature.longcall), - .name = @tagName(Feature.longcall), .llvm_name = "longcall", .description = "Always use indirect calls", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mfocrf)] = .{ - .index = @enumToInt(Feature.mfocrf), - .name = @tagName(Feature.mfocrf), .llvm_name = "mfocrf", .description = "Enable the MFOCRF instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.msync)] = .{ - .index = @enumToInt(Feature.msync), - .name = @tagName(Feature.msync), .llvm_name = "msync", .description = "Has only the msync instruction instead of sync", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .booke, }), }; result[@enumToInt(Feature.partword_atomics)] = .{ - .index = @enumToInt(Feature.partword_atomics), - .name = @tagName(Feature.partword_atomics), .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcntd)] = .{ - .index = @enumToInt(Feature.popcntd), - .name = @tagName(Feature.popcntd), .llvm_name = "popcntd", .description = "Enable the popcnt[dw] instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.power8_altivec)] = .{ - .index = @enumToInt(Feature.power8_altivec), - .name = @tagName(Feature.power8_altivec), .llvm_name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .altivec, }), }; result[@enumToInt(Feature.power8_vector)] = .{ - .index = @enumToInt(Feature.power8_vector), - .name = @tagName(Feature.power8_vector), .llvm_name = "power8-vector", .description = "Enable POWER8 vector instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .power8_altivec, .vsx, }), }; result[@enumToInt(Feature.power9_altivec)] = .{ - .index = @enumToInt(Feature.power9_altivec), - .name = @tagName(Feature.power9_altivec), .llvm_name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .isa_v30_instructions, .power8_altivec, }), }; result[@enumToInt(Feature.power9_vector)] = .{ - .index = @enumToInt(Feature.power9_vector), - .name = @tagName(Feature.power9_vector), .llvm_name = "power9-vector", .description = "Enable POWER9 vector instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .isa_v30_instructions, .power8_vector, .power9_altivec, }), }; result[@enumToInt(Feature.ppc_postra_sched)] = .{ - .index = @enumToInt(Feature.ppc_postra_sched), - .name = @tagName(Feature.ppc_postra_sched), .llvm_name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc_prera_sched)] = .{ - .index = @enumToInt(Feature.ppc_prera_sched), - .name = @tagName(Feature.ppc_prera_sched), .llvm_name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc4xx)] = .{ - .index = @enumToInt(Feature.ppc4xx), - .name = @tagName(Feature.ppc4xx), .llvm_name = "ppc4xx", .description = "Enable PPC 4xx instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc6xx)] = .{ - .index = @enumToInt(Feature.ppc6xx), - .name = @tagName(Feature.ppc6xx), .llvm_name = "ppc6xx", .description = "Enable PPC 6xx instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.qpx)] = .{ - .index = @enumToInt(Feature.qpx), - .name = @tagName(Feature.qpx), .llvm_name = "qpx", .description = "Enable QPX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.recipprec)] = .{ - .index = @enumToInt(Feature.recipprec), - .name = @tagName(Feature.recipprec), .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.secure_plt)] = .{ - .index = @enumToInt(Feature.secure_plt), - .name = @tagName(Feature.secure_plt), .llvm_name = "secure-plt", .description = "Enable secure plt mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_popcntd)] = .{ - .index = @enumToInt(Feature.slow_popcntd), - .name = @tagName(Feature.slow_popcntd), .llvm_name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spe)] = .{ - .index = @enumToInt(Feature.spe), - .name = @tagName(Feature.spe), .llvm_name = "spe", .description = "Enable SPE instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .hard_float, }), }; result[@enumToInt(Feature.stfiwx)] = .{ - .index = @enumToInt(Feature.stfiwx), - .name = @tagName(Feature.stfiwx), .llvm_name = "stfiwx", .description = "Enable the stfiwx instruction", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.two_const_nr)] = .{ - .index = @enumToInt(Feature.two_const_nr), - .name = @tagName(Feature.two_const_nr), .llvm_name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vectors_use_two_units)] = .{ - .index = @enumToInt(Feature.vectors_use_two_units), - .name = @tagName(Feature.vectors_use_two_units), .llvm_name = "vectors-use-two-units", .description = "Vectors use two units", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vsx)] = .{ - .index = @enumToInt(Feature.vsx), - .name = @tagName(Feature.vsx), .llvm_name = "vsx", .description = "Enable VSX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .altivec, }), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -477,7 +381,7 @@ pub const cpu = struct { pub const @"440" = Cpu{ .name = "440", .llvm_name = "440", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .booke, .fres, .frsqrte, @@ -489,7 +393,7 @@ pub const cpu = struct { pub const @"450" = Cpu{ .name = "450", .llvm_name = "450", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .booke, .fres, .frsqrte, @@ -501,21 +405,21 @@ pub const cpu = struct { pub const @"601" = Cpu{ .name = "601", .llvm_name = "601", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fpu, }), }; pub const @"602" = Cpu{ .name = "602", .llvm_name = "602", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fpu, }), }; pub const @"603" = Cpu{ .name = "603", .llvm_name = "603", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -523,7 +427,7 @@ pub const cpu = struct { pub const @"603e" = Cpu{ .name = "603e", .llvm_name = "603e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -531,7 +435,7 @@ pub const cpu = struct { pub const @"603ev" = Cpu{ .name = "603ev", .llvm_name = "603ev", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -539,7 +443,7 @@ pub const cpu = struct { pub const @"604" = Cpu{ .name = "604", .llvm_name = "604", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -547,7 +451,7 @@ pub const cpu = struct { pub const @"604e" = Cpu{ .name = "604e", .llvm_name = "604e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -555,7 +459,7 @@ pub const cpu = struct { pub const @"620" = Cpu{ .name = "620", .llvm_name = "620", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -563,7 +467,7 @@ pub const cpu = struct { pub const @"7400" = Cpu{ .name = "7400", .llvm_name = "7400", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .altivec, .fres, .frsqrte, @@ -572,7 +476,7 @@ pub const cpu = struct { pub const @"7450" = Cpu{ .name = "7450", .llvm_name = "7450", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .altivec, .fres, .frsqrte, @@ -581,7 +485,7 @@ pub const cpu = struct { pub const @"750" = Cpu{ .name = "750", .llvm_name = "750", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -589,7 +493,7 @@ pub const cpu = struct { pub const @"970" = Cpu{ .name = "970", .llvm_name = "970", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fres, @@ -602,7 +506,7 @@ pub const cpu = struct { pub const a2 = Cpu{ .name = "a2", .llvm_name = "a2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .booke, .cmpb, @@ -627,7 +531,7 @@ pub const cpu = struct { pub const a2q = Cpu{ .name = "a2q", .llvm_name = "a2q", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .booke, .cmpb, @@ -653,7 +557,7 @@ pub const cpu = struct { pub const e500 = Cpu{ .name = "e500", .llvm_name = "e500", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .booke, .icbt, .isel, @@ -662,7 +566,7 @@ pub const cpu = struct { pub const e500mc = Cpu{ .name = "e500mc", .llvm_name = "e500mc", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .booke, .icbt, .isel, @@ -672,7 +576,7 @@ pub const cpu = struct { pub const e5500 = Cpu{ .name = "e5500", .llvm_name = "e5500", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .booke, .icbt, @@ -684,7 +588,7 @@ pub const cpu = struct { pub const g3 = Cpu{ .name = "g3", .llvm_name = "g3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fres, .frsqrte, }), @@ -692,7 +596,7 @@ pub const cpu = struct { pub const g4 = Cpu{ .name = "g4", .llvm_name = "g4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .altivec, .fres, .frsqrte, @@ -701,7 +605,7 @@ pub const cpu = struct { pub const @"g4+" = Cpu{ .name = "g4+", .llvm_name = "g4+", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .altivec, .fres, .frsqrte, @@ -710,7 +614,7 @@ pub const cpu = struct { pub const g5 = Cpu{ .name = "g5", .llvm_name = "g5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fres, @@ -723,28 +627,28 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hard_float, }), }; pub const ppc = Cpu{ .name = "ppc", .llvm_name = "ppc", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hard_float, }), }; pub const ppc32 = Cpu{ .name = "ppc32", .llvm_name = "ppc32", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hard_float, }), }; pub const ppc64 = Cpu{ .name = "ppc64", .llvm_name = "ppc64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fres, @@ -757,7 +661,7 @@ pub const cpu = struct { pub const ppc64le = Cpu{ .name = "ppc64le", .llvm_name = "ppc64le", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -792,7 +696,7 @@ pub const cpu = struct { pub const pwr3 = Cpu{ .name = "pwr3", .llvm_name = "pwr3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fres, @@ -804,7 +708,7 @@ pub const cpu = struct { pub const pwr4 = Cpu{ .name = "pwr4", .llvm_name = "pwr4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fres, @@ -817,7 +721,7 @@ pub const cpu = struct { pub const pwr5 = Cpu{ .name = "pwr5", .llvm_name = "pwr5", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fre, @@ -832,7 +736,7 @@ pub const cpu = struct { pub const pwr5x = Cpu{ .name = "pwr5x", .llvm_name = "pwr5x", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .fprnd, @@ -848,7 +752,7 @@ pub const cpu = struct { pub const pwr6 = Cpu{ .name = "pwr6", .llvm_name = "pwr6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .cmpb, @@ -868,7 +772,7 @@ pub const cpu = struct { pub const pwr6x = Cpu{ .name = "pwr6x", .llvm_name = "pwr6x", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .cmpb, @@ -888,7 +792,7 @@ pub const cpu = struct { pub const pwr7 = Cpu{ .name = "pwr7", .llvm_name = "pwr7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -916,7 +820,7 @@ pub const cpu = struct { pub const pwr8 = Cpu{ .name = "pwr8", .llvm_name = "pwr8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -951,7 +855,7 @@ pub const cpu = struct { pub const pwr9 = Cpu{ .name = "pwr9", .llvm_name = "pwr9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .altivec, .bpermd, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index ee0d6509df370baf3a10dfcb11c0519a92eceb21..f4ba975d085edc5b7ea261c4b8f4974498635281 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -16,66 +16,56 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"64bit")] = .{ - .index = @enumToInt(Feature.@"64bit"), - .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Implements RV64", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a)] = .{ - .index = @enumToInt(Feature.a), - .name = @tagName(Feature.a), .llvm_name = "a", .description = "'A' (Atomic Instructions)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.c)] = .{ - .index = @enumToInt(Feature.c), - .name = @tagName(Feature.c), .llvm_name = "c", .description = "'C' (Compressed Instructions)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.d)] = .{ - .index = @enumToInt(Feature.d), - .name = @tagName(Feature.d), .llvm_name = "d", .description = "'D' (Double-Precision Floating-Point)", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .f, }), }; result[@enumToInt(Feature.e)] = .{ - .index = @enumToInt(Feature.e), - .name = @tagName(Feature.e), .llvm_name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f)] = .{ - .index = @enumToInt(Feature.f), - .name = @tagName(Feature.f), .llvm_name = "f", .description = "'F' (Single-Precision Floating-Point)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m)] = .{ - .index = @enumToInt(Feature.m), - .name = @tagName(Feature.m), .llvm_name = "m", .description = "'M' (Integer Multiplication and Division)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.relax)] = .{ - .index = @enumToInt(Feature.relax), - .name = @tagName(Feature.relax), .llvm_name = "relax", .description = "Enable Linker relaxation.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -83,12 +73,12 @@ pub const cpu = struct { pub const generic_rv32 = Cpu{ .name = "generic_rv32", .llvm_name = "generic-rv32", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const generic_rv64 = Cpu{ .name = "generic_rv64", .llvm_name = "generic-rv64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", }), }; @@ -102,7 +92,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.generic_rv64, }; -pub const baseline_32_features = featureSet(&[_]Feature{ +pub const baseline_32_features = featureSet(&all_features, &[_]Feature{ .a, .c, .d, @@ -111,7 +101,7 @@ pub const baseline_32_features = featureSet(&[_]Feature{ .relax, }); -pub const baseline_64_features = featureSet(&[_]Feature{ +pub const baseline_64_features = featureSet(&all_features, &[_]Feature{ .@"64bit", .a, .c, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index da7649e8316bd6458d342b4f9a6631affc7ab62b..a9d75f5191363aed4b5a49aa5bb10e0b86fa5edd 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -27,141 +27,109 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.deprecated_v8)] = .{ - .index = @enumToInt(Feature.deprecated_v8), - .name = @tagName(Feature.deprecated_v8), .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.detectroundchange)] = .{ - .index = @enumToInt(Feature.detectroundchange), - .name = @tagName(Feature.detectroundchange), .llvm_name = "detectroundchange", .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fixallfdivsqrt)] = .{ - .index = @enumToInt(Feature.fixallfdivsqrt), - .name = @tagName(Feature.fixallfdivsqrt), .llvm_name = "fixallfdivsqrt", .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hard_quad_float)] = .{ - .index = @enumToInt(Feature.hard_quad_float), - .name = @tagName(Feature.hard_quad_float), .llvm_name = "hard-quad-float", .description = "Enable quad-word floating point instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasleoncasa)] = .{ - .index = @enumToInt(Feature.hasleoncasa), - .name = @tagName(Feature.hasleoncasa), .llvm_name = "hasleoncasa", .description = "Enable CASA instruction for LEON3 and LEON4 processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasumacsmac)] = .{ - .index = @enumToInt(Feature.hasumacsmac), - .name = @tagName(Feature.hasumacsmac), .llvm_name = "hasumacsmac", .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insertnopload)] = .{ - .index = @enumToInt(Feature.insertnopload), - .name = @tagName(Feature.insertnopload), .llvm_name = "insertnopload", .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leon)] = .{ - .index = @enumToInt(Feature.leon), - .name = @tagName(Feature.leon), .llvm_name = "leon", .description = "Enable LEON extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leoncyclecounter)] = .{ - .index = @enumToInt(Feature.leoncyclecounter), - .name = @tagName(Feature.leoncyclecounter), .llvm_name = "leoncyclecounter", .description = "Use the Leon cycle counter register", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leonpwrpsr)] = .{ - .index = @enumToInt(Feature.leonpwrpsr), - .name = @tagName(Feature.leonpwrpsr), .llvm_name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fmuls)] = .{ - .index = @enumToInt(Feature.no_fmuls), - .name = @tagName(Feature.no_fmuls), .llvm_name = "no-fmuls", .description = "Disable the fmuls instruction.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fsmuld)] = .{ - .index = @enumToInt(Feature.no_fsmuld), - .name = @tagName(Feature.no_fsmuld), .llvm_name = "no-fsmuld", .description = "Disable the fsmuld instruction.", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popc)] = .{ - .index = @enumToInt(Feature.popc), - .name = @tagName(Feature.popc), .llvm_name = "popc", .description = "Use the popc (population count) instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ - .index = @enumToInt(Feature.soft_float), - .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software emulation for floating point", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_mul_div)] = .{ - .index = @enumToInt(Feature.soft_mul_div), - .name = @tagName(Feature.soft_mul_div), .llvm_name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v9)] = .{ - .index = @enumToInt(Feature.v9), - .name = @tagName(Feature.v9), .llvm_name = "v9", .description = "Enable SPARC-V9 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis)] = .{ - .index = @enumToInt(Feature.vis), - .name = @tagName(Feature.vis), .llvm_name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis2)] = .{ - .index = @enumToInt(Feature.vis2), - .name = @tagName(Feature.vis2), .llvm_name = "vis2", .description = "Enable Visual Instruction Set extensions II", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis3)] = .{ - .index = @enumToInt(Feature.vis3), - .name = @tagName(Feature.vis3), .llvm_name = "vis3", .description = "Enable Visual Instruction Set extensions III", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -169,7 +137,7 @@ pub const cpu = struct { pub const at697e = Cpu{ .name = "at697e", .llvm_name = "at697e", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .insertnopload, .leon, }), @@ -177,7 +145,7 @@ pub const cpu = struct { pub const at697f = Cpu{ .name = "at697f", .llvm_name = "at697f", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .insertnopload, .leon, }), @@ -185,17 +153,17 @@ pub const cpu = struct { pub const f934 = Cpu{ .name = "f934", .llvm_name = "f934", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const gr712rc = Cpu{ .name = "gr712rc", .llvm_name = "gr712rc", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -203,7 +171,7 @@ pub const cpu = struct { pub const gr740 = Cpu{ .name = "gr740", .llvm_name = "gr740", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .hasumacsmac, .leon, @@ -214,19 +182,19 @@ pub const cpu = struct { pub const hypersparc = Cpu{ .name = "hypersparc", .llvm_name = "hypersparc", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const leon2 = Cpu{ .name = "leon2", .llvm_name = "leon2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .leon, }), }; pub const leon3 = Cpu{ .name = "leon3", .llvm_name = "leon3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasumacsmac, .leon, }), @@ -234,7 +202,7 @@ pub const cpu = struct { pub const leon4 = Cpu{ .name = "leon4", .llvm_name = "leon4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .hasumacsmac, .leon, @@ -243,7 +211,7 @@ pub const cpu = struct { pub const ma2080 = Cpu{ .name = "ma2080", .llvm_name = "ma2080", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -251,7 +219,7 @@ pub const cpu = struct { pub const ma2085 = Cpu{ .name = "ma2085", .llvm_name = "ma2085", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -259,7 +227,7 @@ pub const cpu = struct { pub const ma2100 = Cpu{ .name = "ma2100", .llvm_name = "ma2100", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -267,7 +235,7 @@ pub const cpu = struct { pub const ma2150 = Cpu{ .name = "ma2150", .llvm_name = "ma2150", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -275,7 +243,7 @@ pub const cpu = struct { pub const ma2155 = Cpu{ .name = "ma2155", .llvm_name = "ma2155", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -283,7 +251,7 @@ pub const cpu = struct { pub const ma2450 = Cpu{ .name = "ma2450", .llvm_name = "ma2450", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -291,7 +259,7 @@ pub const cpu = struct { pub const ma2455 = Cpu{ .name = "ma2455", .llvm_name = "ma2455", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -299,7 +267,7 @@ pub const cpu = struct { pub const ma2480 = Cpu{ .name = "ma2480", .llvm_name = "ma2480", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -307,7 +275,7 @@ pub const cpu = struct { pub const ma2485 = Cpu{ .name = "ma2485", .llvm_name = "ma2485", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -315,7 +283,7 @@ pub const cpu = struct { pub const ma2x5x = Cpu{ .name = "ma2x5x", .llvm_name = "ma2x5x", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -323,7 +291,7 @@ pub const cpu = struct { pub const ma2x8x = Cpu{ .name = "ma2x8x", .llvm_name = "ma2x8x", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -331,7 +299,7 @@ pub const cpu = struct { pub const myriad2 = Cpu{ .name = "myriad2", .llvm_name = "myriad2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -339,7 +307,7 @@ pub const cpu = struct { pub const myriad2_1 = Cpu{ .name = "myriad2_1", .llvm_name = "myriad2.1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -347,7 +315,7 @@ pub const cpu = struct { pub const myriad2_2 = Cpu{ .name = "myriad2_2", .llvm_name = "myriad2.2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -355,7 +323,7 @@ pub const cpu = struct { pub const myriad2_3 = Cpu{ .name = "myriad2_3", .llvm_name = "myriad2.3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .hasleoncasa, .leon, }), @@ -363,7 +331,7 @@ pub const cpu = struct { pub const niagara = Cpu{ .name = "niagara", .llvm_name = "niagara", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .v9, .vis, @@ -373,7 +341,7 @@ pub const cpu = struct { pub const niagara2 = Cpu{ .name = "niagara2", .llvm_name = "niagara2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .popc, .v9, @@ -384,7 +352,7 @@ pub const cpu = struct { pub const niagara3 = Cpu{ .name = "niagara3", .llvm_name = "niagara3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .popc, .v9, @@ -395,7 +363,7 @@ pub const cpu = struct { pub const niagara4 = Cpu{ .name = "niagara4", .llvm_name = "niagara4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .popc, .v9, @@ -407,32 +375,32 @@ pub const cpu = struct { pub const sparclet = Cpu{ .name = "sparclet", .llvm_name = "sparclet", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const sparclite = Cpu{ .name = "sparclite", .llvm_name = "sparclite", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const sparclite86x = Cpu{ .name = "sparclite86x", .llvm_name = "sparclite86x", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const supersparc = Cpu{ .name = "supersparc", .llvm_name = "supersparc", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const tsc701 = Cpu{ .name = "tsc701", .llvm_name = "tsc701", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const ultrasparc = Cpu{ .name = "ultrasparc", .llvm_name = "ultrasparc", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .v9, .vis, @@ -441,7 +409,7 @@ pub const cpu = struct { pub const ultrasparc3 = Cpu{ .name = "ultrasparc3", .llvm_name = "ultrasparc3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deprecated_v8, .v9, .vis, @@ -451,7 +419,7 @@ pub const cpu = struct { pub const ut699 = Cpu{ .name = "ut699", .llvm_name = "ut699", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .fixallfdivsqrt, .insertnopload, .leon, @@ -462,7 +430,7 @@ pub const cpu = struct { pub const v7 = Cpu{ .name = "v7", .llvm_name = "v7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .no_fsmuld, .soft_mul_div, }), @@ -470,12 +438,12 @@ pub const cpu = struct { pub const v8 = Cpu{ .name = "v8", .llvm_name = "v8", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const v9 = Cpu{ .name = "v9", .llvm_name = "v9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .v9, }), }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index aaee832c28a8b7db4be08b822970f081e0e9cad1..1326ad23ed54acbeec2e0cde6bb574d6bb17ee60 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -43,253 +43,189 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.deflate_conversion)] = .{ - .index = @enumToInt(Feature.deflate_conversion), - .name = @tagName(Feature.deflate_conversion), .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_packed_conversion)] = .{ - .index = @enumToInt(Feature.dfp_packed_conversion), - .name = @tagName(Feature.dfp_packed_conversion), .llvm_name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_zoned_conversion)] = .{ - .index = @enumToInt(Feature.dfp_zoned_conversion), - .name = @tagName(Feature.dfp_zoned_conversion), .llvm_name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.distinct_ops)] = .{ - .index = @enumToInt(Feature.distinct_ops), - .name = @tagName(Feature.distinct_ops), .llvm_name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_dat_2)] = .{ - .index = @enumToInt(Feature.enhanced_dat_2), - .name = @tagName(Feature.enhanced_dat_2), .llvm_name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_sort)] = .{ - .index = @enumToInt(Feature.enhanced_sort), - .name = @tagName(Feature.enhanced_sort), .llvm_name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execution_hint)] = .{ - .index = @enumToInt(Feature.execution_hint), - .name = @tagName(Feature.execution_hint), .llvm_name = "execution-hint", .description = "Assume that the execution-hint facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_serialization)] = .{ - .index = @enumToInt(Feature.fast_serialization), - .name = @tagName(Feature.fast_serialization), .llvm_name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_extension)] = .{ - .index = @enumToInt(Feature.fp_extension), - .name = @tagName(Feature.fp_extension), .llvm_name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.guarded_storage)] = .{ - .index = @enumToInt(Feature.guarded_storage), - .name = @tagName(Feature.guarded_storage), .llvm_name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.high_word)] = .{ - .index = @enumToInt(Feature.high_word), - .name = @tagName(Feature.high_word), .llvm_name = "high-word", .description = "Assume that the high-word facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{ - .index = @enumToInt(Feature.insert_reference_bits_multiple), - .name = @tagName(Feature.insert_reference_bits_multiple), .llvm_name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.interlocked_access1)] = .{ - .index = @enumToInt(Feature.interlocked_access1), - .name = @tagName(Feature.interlocked_access1), .llvm_name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_trap)] = .{ - .index = @enumToInt(Feature.load_and_trap), - .name = @tagName(Feature.load_and_trap), .llvm_name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{ - .index = @enumToInt(Feature.load_and_zero_rightmost_byte), - .name = @tagName(Feature.load_and_zero_rightmost_byte), .llvm_name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond)] = .{ - .index = @enumToInt(Feature.load_store_on_cond), - .name = @tagName(Feature.load_store_on_cond), .llvm_name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond_2)] = .{ - .index = @enumToInt(Feature.load_store_on_cond_2), - .name = @tagName(Feature.load_store_on_cond_2), .llvm_name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension3)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension3), - .name = @tagName(Feature.message_security_assist_extension3), .llvm_name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension4)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension4), - .name = @tagName(Feature.message_security_assist_extension4), .llvm_name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension5)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension5), - .name = @tagName(Feature.message_security_assist_extension5), .llvm_name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension7)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension7), - .name = @tagName(Feature.message_security_assist_extension7), .llvm_name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension8)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension8), - .name = @tagName(Feature.message_security_assist_extension8), .llvm_name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension9)] = .{ - .index = @enumToInt(Feature.message_security_assist_extension9), - .name = @tagName(Feature.message_security_assist_extension9), .llvm_name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions)] = .{ - .index = @enumToInt(Feature.miscellaneous_extensions), - .name = @tagName(Feature.miscellaneous_extensions), .llvm_name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{ - .index = @enumToInt(Feature.miscellaneous_extensions_2), - .name = @tagName(Feature.miscellaneous_extensions_2), .llvm_name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{ - .index = @enumToInt(Feature.miscellaneous_extensions_3), - .name = @tagName(Feature.miscellaneous_extensions_3), .llvm_name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.population_count)] = .{ - .index = @enumToInt(Feature.population_count), - .name = @tagName(Feature.population_count), .llvm_name = "population-count", .description = "Assume that the population-count facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.processor_assist)] = .{ - .index = @enumToInt(Feature.processor_assist), - .name = @tagName(Feature.processor_assist), .llvm_name = "processor-assist", .description = "Assume that the processor-assist facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{ - .index = @enumToInt(Feature.reset_reference_bits_multiple), - .name = @tagName(Feature.reset_reference_bits_multiple), .llvm_name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.transactional_execution)] = .{ - .index = @enumToInt(Feature.transactional_execution), - .name = @tagName(Feature.transactional_execution), .llvm_name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector)] = .{ - .index = @enumToInt(Feature.vector), - .name = @tagName(Feature.vector), .llvm_name = "vector", .description = "Assume that the vectory facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_1)] = .{ - .index = @enumToInt(Feature.vector_enhancements_1), - .name = @tagName(Feature.vector_enhancements_1), .llvm_name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_2)] = .{ - .index = @enumToInt(Feature.vector_enhancements_2), - .name = @tagName(Feature.vector_enhancements_2), .llvm_name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal)] = .{ - .index = @enumToInt(Feature.vector_packed_decimal), - .name = @tagName(Feature.vector_packed_decimal), .llvm_name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{ - .index = @enumToInt(Feature.vector_packed_decimal_enhancement), - .name = @tagName(Feature.vector_packed_decimal_enhancement), .llvm_name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -297,7 +233,7 @@ pub const cpu = struct { pub const arch10 = Cpu{ .name = "arch10", .llvm_name = "arch10", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_zoned_conversion, .distinct_ops, .enhanced_dat_2, @@ -320,7 +256,7 @@ pub const cpu = struct { pub const arch11 = Cpu{ .name = "arch11", .llvm_name = "arch11", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -348,7 +284,7 @@ pub const cpu = struct { pub const arch12 = Cpu{ .name = "arch12", .llvm_name = "arch12", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -383,7 +319,7 @@ pub const cpu = struct { pub const arch13 = Cpu{ .name = "arch13", .llvm_name = "arch13", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .deflate_conversion, .dfp_packed_conversion, .dfp_zoned_conversion, @@ -424,12 +360,12 @@ pub const cpu = struct { pub const arch8 = Cpu{ .name = "arch8", .llvm_name = "arch8", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const arch9 = Cpu{ .name = "arch9", .llvm_name = "arch9", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .distinct_ops, .fast_serialization, .fp_extension, @@ -445,17 +381,17 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const z10 = Cpu{ .name = "z10", .llvm_name = "z10", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const z13 = Cpu{ .name = "z13", .llvm_name = "z13", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -483,7 +419,7 @@ pub const cpu = struct { pub const z14 = Cpu{ .name = "z14", .llvm_name = "z14", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -518,7 +454,7 @@ pub const cpu = struct { pub const z196 = Cpu{ .name = "z196", .llvm_name = "z196", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .distinct_ops, .fast_serialization, .fp_extension, @@ -534,7 +470,7 @@ pub const cpu = struct { pub const zEC12 = Cpu{ .name = "zEC12", .llvm_name = "zEC12", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .dfp_zoned_conversion, .distinct_ops, .enhanced_dat_2, diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index 3df17d503b4a38d896f29a0d49baade17fd9bad2..bd6ae8cc8f15ed30d5f6c946adc414cdd3c3b270 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -18,80 +18,66 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.atomics)] = .{ - .index = @enumToInt(Feature.atomics), - .name = @tagName(Feature.atomics), .llvm_name = "atomics", .description = "Enable Atomics", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bulk_memory)] = .{ - .index = @enumToInt(Feature.bulk_memory), - .name = @tagName(Feature.bulk_memory), .llvm_name = "bulk-memory", .description = "Enable bulk memory operations", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exception_handling)] = .{ - .index = @enumToInt(Feature.exception_handling), - .name = @tagName(Feature.exception_handling), .llvm_name = "exception-handling", .description = "Enable Wasm exception handling", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.multivalue)] = .{ - .index = @enumToInt(Feature.multivalue), - .name = @tagName(Feature.multivalue), .llvm_name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mutable_globals)] = .{ - .index = @enumToInt(Feature.mutable_globals), - .name = @tagName(Feature.mutable_globals), .llvm_name = "mutable-globals", .description = "Enable mutable globals", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nontrapping_fptoint)] = .{ - .index = @enumToInt(Feature.nontrapping_fptoint), - .name = @tagName(Feature.nontrapping_fptoint), .llvm_name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sign_ext)] = .{ - .index = @enumToInt(Feature.sign_ext), - .name = @tagName(Feature.sign_ext), .llvm_name = "sign-ext", .description = "Enable sign extension operators", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.simd128)] = .{ - .index = @enumToInt(Feature.simd128), - .name = @tagName(Feature.simd128), .llvm_name = "simd128", .description = "Enable 128-bit SIMD", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tail_call)] = .{ - .index = @enumToInt(Feature.tail_call), - .name = @tagName(Feature.tail_call), .llvm_name = "tail-call", .description = "Enable tail call instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unimplemented_simd128)] = .{ - .index = @enumToInt(Feature.unimplemented_simd128), - .name = @tagName(Feature.unimplemented_simd128), .llvm_name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .simd128, }), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -99,7 +85,7 @@ pub const cpu = struct { pub const bleeding_edge = Cpu{ .name = "bleeding_edge", .llvm_name = "bleeding-edge", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .atomics, .mutable_globals, .nontrapping_fptoint, @@ -110,12 +96,12 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const mvp = Cpu{ .name = "mvp", .llvm_name = "mvp", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index ce9830f1fa94ab568ca08786c07fab1f31aa539e..a576bf408256c046d4c648bdea375c4fa90eb37d 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -128,940 +128,705 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; - std.debug.assert(len <= Cpu.Feature.Set.bit_count); + std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"3dnow")] = .{ - .index = @enumToInt(Feature.@"3dnow"), - .name = @tagName(Feature.@"3dnow"), .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .mmx, }), }; result[@enumToInt(Feature.@"3dnowa")] = .{ - .index = @enumToInt(Feature.@"3dnowa"), - .name = @tagName(Feature.@"3dnowa"), .llvm_name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .@"3dnow", }), }; result[@enumToInt(Feature.@"64bit")] = .{ - .index = @enumToInt(Feature.@"64bit"), - .name = @tagName(Feature.@"64bit"), .llvm_name = "64bit", .description = "Support 64-bit instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.adx)] = .{ - .index = @enumToInt(Feature.adx), - .name = @tagName(Feature.adx), .llvm_name = "adx", .description = "Support ADX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ - .index = @enumToInt(Feature.aes), - .name = @tagName(Feature.aes), .llvm_name = "aes", .description = "Enable AES instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.avx)] = .{ - .index = @enumToInt(Feature.avx), - .name = @tagName(Feature.avx), .llvm_name = "avx", .description = "Enable AVX instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse4_2, }), }; result[@enumToInt(Feature.avx2)] = .{ - .index = @enumToInt(Feature.avx2), - .name = @tagName(Feature.avx2), .llvm_name = "avx2", .description = "Enable AVX2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.avx512bf16)] = .{ - .index = @enumToInt(Feature.avx512bf16), - .name = @tagName(Feature.avx512bf16), .llvm_name = "avx512bf16", .description = "Support bfloat16 floating point", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512bitalg)] = .{ - .index = @enumToInt(Feature.avx512bitalg), - .name = @tagName(Feature.avx512bitalg), .llvm_name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512bw)] = .{ - .index = @enumToInt(Feature.avx512bw), - .name = @tagName(Feature.avx512bw), .llvm_name = "avx512bw", .description = "Enable AVX-512 Byte and Word Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512cd)] = .{ - .index = @enumToInt(Feature.avx512cd), - .name = @tagName(Feature.avx512cd), .llvm_name = "avx512cd", .description = "Enable AVX-512 Conflict Detection Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512dq)] = .{ - .index = @enumToInt(Feature.avx512dq), - .name = @tagName(Feature.avx512dq), .llvm_name = "avx512dq", .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512er)] = .{ - .index = @enumToInt(Feature.avx512er), - .name = @tagName(Feature.avx512er), .llvm_name = "avx512er", .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512f)] = .{ - .index = @enumToInt(Feature.avx512f), - .name = @tagName(Feature.avx512f), .llvm_name = "avx512f", .description = "Enable AVX-512 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx2, .f16c, .fma, }), }; result[@enumToInt(Feature.avx512ifma)] = .{ - .index = @enumToInt(Feature.avx512ifma), - .name = @tagName(Feature.avx512ifma), .llvm_name = "avx512ifma", .description = "Enable AVX-512 Integer Fused Multiple-Add", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512pf)] = .{ - .index = @enumToInt(Feature.avx512pf), - .name = @tagName(Feature.avx512pf), .llvm_name = "avx512pf", .description = "Enable AVX-512 PreFetch Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vbmi)] = .{ - .index = @enumToInt(Feature.avx512vbmi), - .name = @tagName(Feature.avx512vbmi), .llvm_name = "avx512vbmi", .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512vbmi2)] = .{ - .index = @enumToInt(Feature.avx512vbmi2), - .name = @tagName(Feature.avx512vbmi2), .llvm_name = "avx512vbmi2", .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512vl)] = .{ - .index = @enumToInt(Feature.avx512vl), - .name = @tagName(Feature.avx512vl), .llvm_name = "avx512vl", .description = "Enable AVX-512 Vector Length eXtensions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vnni)] = .{ - .index = @enumToInt(Feature.avx512vnni), - .name = @tagName(Feature.avx512vnni), .llvm_name = "avx512vnni", .description = "Enable AVX-512 Vector Neural Network Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vp2intersect)] = .{ - .index = @enumToInt(Feature.avx512vp2intersect), - .name = @tagName(Feature.avx512vp2intersect), .llvm_name = "avx512vp2intersect", .description = "Enable AVX-512 vp2intersect", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vpopcntdq)] = .{ - .index = @enumToInt(Feature.avx512vpopcntdq), - .name = @tagName(Feature.avx512vpopcntdq), .llvm_name = "avx512vpopcntdq", .description = "Enable AVX-512 Population Count Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.bmi)] = .{ - .index = @enumToInt(Feature.bmi), - .name = @tagName(Feature.bmi), .llvm_name = "bmi", .description = "Support BMI instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bmi2)] = .{ - .index = @enumToInt(Feature.bmi2), - .name = @tagName(Feature.bmi2), .llvm_name = "bmi2", .description = "Support BMI2 instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.branchfusion)] = .{ - .index = @enumToInt(Feature.branchfusion), - .name = @tagName(Feature.branchfusion), .llvm_name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cldemote)] = .{ - .index = @enumToInt(Feature.cldemote), - .name = @tagName(Feature.cldemote), .llvm_name = "cldemote", .description = "Enable Cache Demote", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clflushopt)] = .{ - .index = @enumToInt(Feature.clflushopt), - .name = @tagName(Feature.clflushopt), .llvm_name = "clflushopt", .description = "Flush A Cache Line Optimized", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clwb)] = .{ - .index = @enumToInt(Feature.clwb), - .name = @tagName(Feature.clwb), .llvm_name = "clwb", .description = "Cache Line Write Back", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clzero)] = .{ - .index = @enumToInt(Feature.clzero), - .name = @tagName(Feature.clzero), .llvm_name = "clzero", .description = "Enable Cache Line Zero", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmov)] = .{ - .index = @enumToInt(Feature.cmov), - .name = @tagName(Feature.cmov), .llvm_name = "cmov", .description = "Enable conditional move instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cx16)] = .{ - .index = @enumToInt(Feature.cx16), - .name = @tagName(Feature.cx16), .llvm_name = "cx16", .description = "64-bit with cmpxchg16b", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .cx8, }), }; result[@enumToInt(Feature.cx8)] = .{ - .index = @enumToInt(Feature.cx8), - .name = @tagName(Feature.cx8), .llvm_name = "cx8", .description = "Support CMPXCHG8B instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enqcmd)] = .{ - .index = @enumToInt(Feature.enqcmd), - .name = @tagName(Feature.enqcmd), .llvm_name = "enqcmd", .description = "Has ENQCMD instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ermsb)] = .{ - .index = @enumToInt(Feature.ermsb), - .name = @tagName(Feature.ermsb), .llvm_name = "ermsb", .description = "REP MOVS/STOS are fast", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f16c)] = .{ - .index = @enumToInt(Feature.f16c), - .name = @tagName(Feature.f16c), .llvm_name = "f16c", .description = "Support 16-bit floating point conversion instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ - .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt), - .name = @tagName(Feature.false_deps_lzcnt_tzcnt), .llvm_name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.false_deps_popcnt)] = .{ - .index = @enumToInt(Feature.false_deps_popcnt), - .name = @tagName(Feature.false_deps_popcnt), .llvm_name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_11bytenop)] = .{ - .index = @enumToInt(Feature.fast_11bytenop), - .name = @tagName(Feature.fast_11bytenop), .llvm_name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_15bytenop)] = .{ - .index = @enumToInt(Feature.fast_15bytenop), - .name = @tagName(Feature.fast_15bytenop), .llvm_name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_bextr)] = .{ - .index = @enumToInt(Feature.fast_bextr), - .name = @tagName(Feature.fast_bextr), .llvm_name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_gather)] = .{ - .index = @enumToInt(Feature.fast_gather), - .name = @tagName(Feature.fast_gather), .llvm_name = "fast-gather", .description = "Indicates if gather is reasonably fast", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_hops)] = .{ - .index = @enumToInt(Feature.fast_hops), - .name = @tagName(Feature.fast_hops), .llvm_name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.fast_lzcnt)] = .{ - .index = @enumToInt(Feature.fast_lzcnt), - .name = @tagName(Feature.fast_lzcnt), .llvm_name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{ - .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write), - .name = @tagName(Feature.fast_partial_ymm_or_zmm_write), .llvm_name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{ - .index = @enumToInt(Feature.fast_scalar_fsqrt), - .name = @tagName(Feature.fast_scalar_fsqrt), .llvm_name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{ - .index = @enumToInt(Feature.fast_scalar_shift_masks), - .name = @tagName(Feature.fast_scalar_shift_masks), .llvm_name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_shld_rotate)] = .{ - .index = @enumToInt(Feature.fast_shld_rotate), - .name = @tagName(Feature.fast_shld_rotate), .llvm_name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_variable_shuffle)] = .{ - .index = @enumToInt(Feature.fast_variable_shuffle), - .name = @tagName(Feature.fast_variable_shuffle), .llvm_name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_fsqrt)] = .{ - .index = @enumToInt(Feature.fast_vector_fsqrt), - .name = @tagName(Feature.fast_vector_fsqrt), .llvm_name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_shift_masks)] = .{ - .index = @enumToInt(Feature.fast_vector_shift_masks), - .name = @tagName(Feature.fast_vector_shift_masks), .llvm_name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma)] = .{ - .index = @enumToInt(Feature.fma), - .name = @tagName(Feature.fma), .llvm_name = "fma", .description = "Enable three-operand fused multiple-add", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.fma4)] = .{ - .index = @enumToInt(Feature.fma4), - .name = @tagName(Feature.fma4), .llvm_name = "fma4", .description = "Enable four-operand fused multiple-add", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx, .sse4a, }), }; result[@enumToInt(Feature.fsgsbase)] = .{ - .index = @enumToInt(Feature.fsgsbase), - .name = @tagName(Feature.fsgsbase), .llvm_name = "fsgsbase", .description = "Support FS/GS Base instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fxsr)] = .{ - .index = @enumToInt(Feature.fxsr), - .name = @tagName(Feature.fxsr), .llvm_name = "fxsr", .description = "Support fxsave/fxrestore instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfni)] = .{ - .index = @enumToInt(Feature.gfni), - .name = @tagName(Feature.gfni), .llvm_name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.idivl_to_divb)] = .{ - .index = @enumToInt(Feature.idivl_to_divb), - .name = @tagName(Feature.idivl_to_divb), .llvm_name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.idivq_to_divl)] = .{ - .index = @enumToInt(Feature.idivq_to_divl), - .name = @tagName(Feature.idivq_to_divl), .llvm_name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invpcid)] = .{ - .index = @enumToInt(Feature.invpcid), - .name = @tagName(Feature.invpcid), .llvm_name = "invpcid", .description = "Invalidate Process-Context Identifier", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_sp)] = .{ - .index = @enumToInt(Feature.lea_sp), - .name = @tagName(Feature.lea_sp), .llvm_name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_uses_ag)] = .{ - .index = @enumToInt(Feature.lea_uses_ag), - .name = @tagName(Feature.lea_uses_ag), .llvm_name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lwp)] = .{ - .index = @enumToInt(Feature.lwp), - .name = @tagName(Feature.lwp), .llvm_name = "lwp", .description = "Enable LWP instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lzcnt)] = .{ - .index = @enumToInt(Feature.lzcnt), - .name = @tagName(Feature.lzcnt), .llvm_name = "lzcnt", .description = "Support LZCNT instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.macrofusion)] = .{ - .index = @enumToInt(Feature.macrofusion), - .name = @tagName(Feature.macrofusion), .llvm_name = "macrofusion", .description = "Various instructions can be fused with conditional branches", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ - .index = @enumToInt(Feature.merge_to_threeway_branch), - .name = @tagName(Feature.merge_to_threeway_branch), .llvm_name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mmx)] = .{ - .index = @enumToInt(Feature.mmx), - .name = @tagName(Feature.mmx), .llvm_name = "mmx", .description = "Enable MMX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movbe)] = .{ - .index = @enumToInt(Feature.movbe), - .name = @tagName(Feature.movbe), .llvm_name = "movbe", .description = "Support MOVBE instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdir64b)] = .{ - .index = @enumToInt(Feature.movdir64b), - .name = @tagName(Feature.movdir64b), .llvm_name = "movdir64b", .description = "Support movdir64b instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdiri)] = .{ - .index = @enumToInt(Feature.movdiri), - .name = @tagName(Feature.movdiri), .llvm_name = "movdiri", .description = "Support movdiri instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpx)] = .{ - .index = @enumToInt(Feature.mpx), - .name = @tagName(Feature.mpx), .llvm_name = "mpx", .description = "Support MPX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mwaitx)] = .{ - .index = @enumToInt(Feature.mwaitx), - .name = @tagName(Feature.mwaitx), .llvm_name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nopl)] = .{ - .index = @enumToInt(Feature.nopl), - .name = @tagName(Feature.nopl), .llvm_name = "nopl", .description = "Enable NOPL instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pad_short_functions)] = .{ - .index = @enumToInt(Feature.pad_short_functions), - .name = @tagName(Feature.pad_short_functions), .llvm_name = "pad-short-functions", .description = "Pad short functions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pclmul)] = .{ - .index = @enumToInt(Feature.pclmul), - .name = @tagName(Feature.pclmul), .llvm_name = "pclmul", .description = "Enable packed carry-less multiplication instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.pconfig)] = .{ - .index = @enumToInt(Feature.pconfig), - .name = @tagName(Feature.pconfig), .llvm_name = "pconfig", .description = "platform configuration instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pku)] = .{ - .index = @enumToInt(Feature.pku), - .name = @tagName(Feature.pku), .llvm_name = "pku", .description = "Enable protection keys", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcnt)] = .{ - .index = @enumToInt(Feature.popcnt), - .name = @tagName(Feature.popcnt), .llvm_name = "popcnt", .description = "Support POPCNT instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_256_bit)] = .{ - .index = @enumToInt(Feature.prefer_256_bit), - .name = @tagName(Feature.prefer_256_bit), .llvm_name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefetchwt1)] = .{ - .index = @enumToInt(Feature.prefetchwt1), - .name = @tagName(Feature.prefetchwt1), .llvm_name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prfchw)] = .{ - .index = @enumToInt(Feature.prfchw), - .name = @tagName(Feature.prfchw), .llvm_name = "prfchw", .description = "Support PRFCHW instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptwrite)] = .{ - .index = @enumToInt(Feature.ptwrite), - .name = @tagName(Feature.ptwrite), .llvm_name = "ptwrite", .description = "Support ptwrite instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdpid)] = .{ - .index = @enumToInt(Feature.rdpid), - .name = @tagName(Feature.rdpid), .llvm_name = "rdpid", .description = "Support RDPID instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdrnd)] = .{ - .index = @enumToInt(Feature.rdrnd), - .name = @tagName(Feature.rdrnd), .llvm_name = "rdrnd", .description = "Support RDRAND instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdseed)] = .{ - .index = @enumToInt(Feature.rdseed), - .name = @tagName(Feature.rdseed), .llvm_name = "rdseed", .description = "Support RDSEED instruction", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline)] = .{ - .index = @enumToInt(Feature.retpoline), - .name = @tagName(Feature.retpoline), .llvm_name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .retpoline_indirect_branches, .retpoline_indirect_calls, }), }; result[@enumToInt(Feature.retpoline_external_thunk)] = .{ - .index = @enumToInt(Feature.retpoline_external_thunk), - .name = @tagName(Feature.retpoline_external_thunk), .llvm_name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .retpoline_indirect_calls, }), }; result[@enumToInt(Feature.retpoline_indirect_branches)] = .{ - .index = @enumToInt(Feature.retpoline_indirect_branches), - .name = @tagName(Feature.retpoline_indirect_branches), .llvm_name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline_indirect_calls)] = .{ - .index = @enumToInt(Feature.retpoline_indirect_calls), - .name = @tagName(Feature.retpoline_indirect_calls), .llvm_name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rtm)] = .{ - .index = @enumToInt(Feature.rtm), - .name = @tagName(Feature.rtm), .llvm_name = "rtm", .description = "Support RTM instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sahf)] = .{ - .index = @enumToInt(Feature.sahf), - .name = @tagName(Feature.sahf), .llvm_name = "sahf", .description = "Support LAHF and SAHF instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sgx)] = .{ - .index = @enumToInt(Feature.sgx), - .name = @tagName(Feature.sgx), .llvm_name = "sgx", .description = "Enable Software Guard Extensions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha)] = .{ - .index = @enumToInt(Feature.sha), - .name = @tagName(Feature.sha), .llvm_name = "sha", .description = "Enable SHA instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.shstk)] = .{ - .index = @enumToInt(Feature.shstk), - .name = @tagName(Feature.shstk), .llvm_name = "shstk", .description = "Support CET Shadow-Stack instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_3ops_lea)] = .{ - .index = @enumToInt(Feature.slow_3ops_lea), - .name = @tagName(Feature.slow_3ops_lea), .llvm_name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_incdec)] = .{ - .index = @enumToInt(Feature.slow_incdec), - .name = @tagName(Feature.slow_incdec), .llvm_name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_lea)] = .{ - .index = @enumToInt(Feature.slow_lea), - .name = @tagName(Feature.slow_lea), .llvm_name = "slow-lea", .description = "LEA instruction with certain arguments is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmaddwd)] = .{ - .index = @enumToInt(Feature.slow_pmaddwd), - .name = @tagName(Feature.slow_pmaddwd), .llvm_name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmulld)] = .{ - .index = @enumToInt(Feature.slow_pmulld), - .name = @tagName(Feature.slow_pmulld), .llvm_name = "slow-pmulld", .description = "PMULLD instruction is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_shld)] = .{ - .index = @enumToInt(Feature.slow_shld), - .name = @tagName(Feature.slow_shld), .llvm_name = "slow-shld", .description = "SHLD instruction is slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_two_mem_ops)] = .{ - .index = @enumToInt(Feature.slow_two_mem_ops), - .name = @tagName(Feature.slow_two_mem_ops), .llvm_name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{ - .index = @enumToInt(Feature.slow_unaligned_mem_16), - .name = @tagName(Feature.slow_unaligned_mem_16), .llvm_name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{ - .index = @enumToInt(Feature.slow_unaligned_mem_32), - .name = @tagName(Feature.slow_unaligned_mem_32), .llvm_name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ - .index = @enumToInt(Feature.soft_float), - .name = @tagName(Feature.soft_float), .llvm_name = "soft-float", .description = "Use software floating point features", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse)] = .{ - .index = @enumToInt(Feature.sse), - .name = @tagName(Feature.sse), .llvm_name = "sse", .description = "Enable SSE instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse_unaligned_mem)] = .{ - .index = @enumToInt(Feature.sse_unaligned_mem), - .name = @tagName(Feature.sse_unaligned_mem), .llvm_name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse2)] = .{ - .index = @enumToInt(Feature.sse2), - .name = @tagName(Feature.sse2), .llvm_name = "sse2", .description = "Enable SSE2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse, }), }; result[@enumToInt(Feature.sse3)] = .{ - .index = @enumToInt(Feature.sse3), - .name = @tagName(Feature.sse3), .llvm_name = "sse3", .description = "Enable SSE3 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.sse4_1)] = .{ - .index = @enumToInt(Feature.sse4_1), - .name = @tagName(Feature.sse4_1), .llvm_name = "sse4.1", .description = "Enable SSE 4.1 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .ssse3, }), }; result[@enumToInt(Feature.sse4_2)] = .{ - .index = @enumToInt(Feature.sse4_2), - .name = @tagName(Feature.sse4_2), .llvm_name = "sse4.2", .description = "Enable SSE 4.2 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse4_1, }), }; result[@enumToInt(Feature.sse4a)] = .{ - .index = @enumToInt(Feature.sse4a), - .name = @tagName(Feature.sse4a), .llvm_name = "sse4a", .description = "Support SSE 4a instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.ssse3)] = .{ - .index = @enumToInt(Feature.ssse3), - .name = @tagName(Feature.ssse3), .llvm_name = "ssse3", .description = "Enable SSSE3 instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.tbm)] = .{ - .index = @enumToInt(Feature.tbm), - .name = @tagName(Feature.tbm), .llvm_name = "tbm", .description = "Enable TBM instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vaes)] = .{ - .index = @enumToInt(Feature.vaes), - .name = @tagName(Feature.vaes), .llvm_name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .aes, .avx, }), }; result[@enumToInt(Feature.vpclmulqdq)] = .{ - .index = @enumToInt(Feature.vpclmulqdq), - .name = @tagName(Feature.vpclmulqdq), .llvm_name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .avx, .pclmul, }), }; result[@enumToInt(Feature.waitpkg)] = .{ - .index = @enumToInt(Feature.waitpkg), - .name = @tagName(Feature.waitpkg), .llvm_name = "waitpkg", .description = "Wait and pause enhancements", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wbnoinvd)] = .{ - .index = @enumToInt(Feature.wbnoinvd), - .name = @tagName(Feature.wbnoinvd), .llvm_name = "wbnoinvd", .description = "Write Back No Invalidate", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.x87)] = .{ - .index = @enumToInt(Feature.x87), - .name = @tagName(Feature.x87), .llvm_name = "x87", .description = "Enable X87 float instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xop)] = .{ - .index = @enumToInt(Feature.xop), - .name = @tagName(Feature.xop), .llvm_name = "xop", .description = "Enable XOP instructions", - .dependencies = featureSet(&[_]Feature{ + .dependencies = sparseFeatureSet(&[_]Feature{ .fma4, }), }; result[@enumToInt(Feature.xsave)] = .{ - .index = @enumToInt(Feature.xsave), - .name = @tagName(Feature.xsave), .llvm_name = "xsave", .description = "Support xsave instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsavec)] = .{ - .index = @enumToInt(Feature.xsavec), - .name = @tagName(Feature.xsavec), .llvm_name = "xsavec", .description = "Support xsavec instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaveopt)] = .{ - .index = @enumToInt(Feature.xsaveopt), - .name = @tagName(Feature.xsaveopt), .llvm_name = "xsaveopt", .description = "Support xsaveopt instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaves)] = .{ - .index = @enumToInt(Feature.xsaves), - .name = @tagName(Feature.xsaves), .llvm_name = "xsaves", .description = "Support xsaves instructions", - .dependencies = featureSet(&[_]Feature{}), + .dependencies = sparseFeatureSet(&[_]Feature{}), }; + const ti = @typeInfo(Feature); + for (result) |*elem, i| { + elem.index = i; + elem.name = ti.Enum.fields[i].name; + elem.dependencies.initAsDependencies(i, &result); + } break :blk result; }; @@ -1069,7 +834,7 @@ pub const cpu = struct { pub const amdfam10 = Cpu{ .name = "amdfam10", .llvm_name = "amdfam10", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1089,7 +854,7 @@ pub const cpu = struct { pub const athlon = Cpu{ .name = "athlon", .llvm_name = "athlon", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -1102,7 +867,7 @@ pub const cpu = struct { pub const athlon_4 = Cpu{ .name = "athlon_4", .llvm_name = "athlon-4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -1117,7 +882,7 @@ pub const cpu = struct { pub const athlon_fx = Cpu{ .name = "athlon_fx", .llvm_name = "athlon-fx", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1134,7 +899,7 @@ pub const cpu = struct { pub const athlon_mp = Cpu{ .name = "athlon_mp", .llvm_name = "athlon-mp", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -1149,7 +914,7 @@ pub const cpu = struct { pub const athlon_tbird = Cpu{ .name = "athlon_tbird", .llvm_name = "athlon-tbird", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -1162,7 +927,7 @@ pub const cpu = struct { pub const athlon_xp = Cpu{ .name = "athlon_xp", .llvm_name = "athlon-xp", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -1177,7 +942,7 @@ pub const cpu = struct { pub const athlon64 = Cpu{ .name = "athlon64", .llvm_name = "athlon64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1194,7 +959,7 @@ pub const cpu = struct { pub const athlon64_sse3 = Cpu{ .name = "athlon64_sse3", .llvm_name = "athlon64-sse3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1212,7 +977,7 @@ pub const cpu = struct { pub const atom = Cpu{ .name = "atom", .llvm_name = "atom", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1236,7 +1001,7 @@ pub const cpu = struct { pub const barcelona = Cpu{ .name = "barcelona", .llvm_name = "barcelona", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1256,7 +1021,7 @@ pub const cpu = struct { pub const bdver1 = Cpu{ .name = "bdver1", .llvm_name = "bdver1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .branchfusion, @@ -1283,7 +1048,7 @@ pub const cpu = struct { pub const bdver2 = Cpu{ .name = "bdver2", .llvm_name = "bdver2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .bmi, @@ -1315,7 +1080,7 @@ pub const cpu = struct { pub const bdver3 = Cpu{ .name = "bdver3", .llvm_name = "bdver3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .bmi, @@ -1349,7 +1114,7 @@ pub const cpu = struct { pub const bdver4 = Cpu{ .name = "bdver4", .llvm_name = "bdver4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .avx2, @@ -1386,7 +1151,7 @@ pub const cpu = struct { pub const bonnell = Cpu{ .name = "bonnell", .llvm_name = "bonnell", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1410,7 +1175,7 @@ pub const cpu = struct { pub const broadwell = Cpu{ .name = "broadwell", .llvm_name = "broadwell", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .avx, @@ -1454,7 +1219,7 @@ pub const cpu = struct { pub const btver1 = Cpu{ .name = "btver1", .llvm_name = "btver1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1478,7 +1243,7 @@ pub const cpu = struct { pub const btver2 = Cpu{ .name = "btver2", .llvm_name = "btver2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .avx, @@ -1514,7 +1279,7 @@ pub const cpu = struct { pub const c3 = Cpu{ .name = "c3", .llvm_name = "c3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnow", .slow_unaligned_mem_16, .x87, @@ -1523,7 +1288,7 @@ pub const cpu = struct { pub const c3_2 = Cpu{ .name = "c3_2", .llvm_name = "c3-2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -1536,7 +1301,7 @@ pub const cpu = struct { pub const cannonlake = Cpu{ .name = "cannonlake", .llvm_name = "cannonlake", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -1595,7 +1360,7 @@ pub const cpu = struct { pub const cascadelake = Cpu{ .name = "cascadelake", .llvm_name = "cascadelake", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -1653,7 +1418,7 @@ pub const cpu = struct { pub const cooperlake = Cpu{ .name = "cooperlake", .llvm_name = "cooperlake", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -1712,7 +1477,7 @@ pub const cpu = struct { pub const core_avx_i = Cpu{ .name = "core_avx_i", .llvm_name = "core-avx-i", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .cmov, @@ -1744,7 +1509,7 @@ pub const cpu = struct { pub const core_avx2 = Cpu{ .name = "core_avx2", .llvm_name = "core-avx2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .avx2, @@ -1785,7 +1550,7 @@ pub const cpu = struct { pub const core2 = Cpu{ .name = "core2", .llvm_name = "core2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1803,7 +1568,7 @@ pub const cpu = struct { pub const corei7 = Cpu{ .name = "corei7", .llvm_name = "corei7", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1821,7 +1586,7 @@ pub const cpu = struct { pub const corei7_avx = Cpu{ .name = "corei7_avx", .llvm_name = "corei7-avx", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .cmov, @@ -1850,7 +1615,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -1859,7 +1624,7 @@ pub const cpu = struct { pub const geode = Cpu{ .name = "geode", .llvm_name = "geode", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .cx8, .slow_unaligned_mem_16, @@ -1869,7 +1634,7 @@ pub const cpu = struct { pub const goldmont = Cpu{ .name = "goldmont", .llvm_name = "goldmont", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .clflushopt, @@ -1905,7 +1670,7 @@ pub const cpu = struct { pub const goldmont_plus = Cpu{ .name = "goldmont_plus", .llvm_name = "goldmont-plus", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .clflushopt, @@ -1943,7 +1708,7 @@ pub const cpu = struct { pub const haswell = Cpu{ .name = "haswell", .llvm_name = "haswell", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .avx2, @@ -1984,7 +1749,7 @@ pub const cpu = struct { pub const _i386 = Cpu{ .name = "_i386", .llvm_name = "i386", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .slow_unaligned_mem_16, .x87, }), @@ -1992,7 +1757,7 @@ pub const cpu = struct { pub const _i486 = Cpu{ .name = "_i486", .llvm_name = "i486", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .slow_unaligned_mem_16, .x87, }), @@ -2000,7 +1765,7 @@ pub const cpu = struct { pub const _i586 = Cpu{ .name = "_i586", .llvm_name = "i586", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -2009,7 +1774,7 @@ pub const cpu = struct { pub const _i686 = Cpu{ .name = "_i686", .llvm_name = "i686", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .slow_unaligned_mem_16, @@ -2019,7 +1784,7 @@ pub const cpu = struct { pub const icelake_client = Cpu{ .name = "icelake_client", .llvm_name = "icelake-client", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2087,7 +1852,7 @@ pub const cpu = struct { pub const icelake_server = Cpu{ .name = "icelake_server", .llvm_name = "icelake-server", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2157,7 +1922,7 @@ pub const cpu = struct { pub const ivybridge = Cpu{ .name = "ivybridge", .llvm_name = "ivybridge", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .cmov, @@ -2189,7 +1954,7 @@ pub const cpu = struct { pub const k6 = Cpu{ .name = "k6", .llvm_name = "k6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -2199,7 +1964,7 @@ pub const cpu = struct { pub const k6_2 = Cpu{ .name = "k6_2", .llvm_name = "k6-2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnow", .cx8, .slow_unaligned_mem_16, @@ -2209,7 +1974,7 @@ pub const cpu = struct { pub const k6_3 = Cpu{ .name = "k6_3", .llvm_name = "k6-3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnow", .cx8, .slow_unaligned_mem_16, @@ -2219,7 +1984,7 @@ pub const cpu = struct { pub const k8 = Cpu{ .name = "k8", .llvm_name = "k8", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2236,7 +2001,7 @@ pub const cpu = struct { pub const k8_sse3 = Cpu{ .name = "k8_sse3", .llvm_name = "k8-sse3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2254,7 +2019,7 @@ pub const cpu = struct { pub const knl = Cpu{ .name = "knl", .llvm_name = "knl", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2297,7 +2062,7 @@ pub const cpu = struct { pub const knm = Cpu{ .name = "knm", .llvm_name = "knm", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2341,12 +2106,12 @@ pub const cpu = struct { pub const lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", - .features = featureSet(&[_]Feature{}), + .features = featureSet(&all_features, &[_]Feature{}), }; pub const nehalem = Cpu{ .name = "nehalem", .llvm_name = "nehalem", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2364,7 +2129,7 @@ pub const cpu = struct { pub const nocona = Cpu{ .name = "nocona", .llvm_name = "nocona", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2380,7 +2145,7 @@ pub const cpu = struct { pub const opteron = Cpu{ .name = "opteron", .llvm_name = "opteron", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2397,7 +2162,7 @@ pub const cpu = struct { pub const opteron_sse3 = Cpu{ .name = "opteron_sse3", .llvm_name = "opteron-sse3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2415,7 +2180,7 @@ pub const cpu = struct { pub const penryn = Cpu{ .name = "penryn", .llvm_name = "penryn", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2433,7 +2198,7 @@ pub const cpu = struct { pub const pentium = Cpu{ .name = "pentium", .llvm_name = "pentium", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -2442,7 +2207,7 @@ pub const cpu = struct { pub const pentium_m = Cpu{ .name = "pentium_m", .llvm_name = "pentium-m", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2456,7 +2221,7 @@ pub const cpu = struct { pub const pentium_mmx = Cpu{ .name = "pentium_mmx", .llvm_name = "pentium-mmx", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -2466,7 +2231,7 @@ pub const cpu = struct { pub const pentium2 = Cpu{ .name = "pentium2", .llvm_name = "pentium2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2479,7 +2244,7 @@ pub const cpu = struct { pub const pentium3 = Cpu{ .name = "pentium3", .llvm_name = "pentium3", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2493,7 +2258,7 @@ pub const cpu = struct { pub const pentium3m = Cpu{ .name = "pentium3m", .llvm_name = "pentium3m", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2507,7 +2272,7 @@ pub const cpu = struct { pub const pentium4 = Cpu{ .name = "pentium4", .llvm_name = "pentium4", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2521,7 +2286,7 @@ pub const cpu = struct { pub const pentium4m = Cpu{ .name = "pentium4m", .llvm_name = "pentium4m", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2535,7 +2300,7 @@ pub const cpu = struct { pub const pentiumpro = Cpu{ .name = "pentiumpro", .llvm_name = "pentiumpro", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .nopl, @@ -2546,7 +2311,7 @@ pub const cpu = struct { pub const prescott = Cpu{ .name = "prescott", .llvm_name = "prescott", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2560,7 +2325,7 @@ pub const cpu = struct { pub const sandybridge = Cpu{ .name = "sandybridge", .llvm_name = "sandybridge", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .avx, .cmov, @@ -2589,7 +2354,7 @@ pub const cpu = struct { pub const silvermont = Cpu{ .name = "silvermont", .llvm_name = "silvermont", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2617,7 +2382,7 @@ pub const cpu = struct { pub const skx = Cpu{ .name = "skx", .llvm_name = "skx", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2674,7 +2439,7 @@ pub const cpu = struct { pub const skylake = Cpu{ .name = "skylake", .llvm_name = "skylake", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2725,7 +2490,7 @@ pub const cpu = struct { pub const skylake_avx512 = Cpu{ .name = "skylake_avx512", .llvm_name = "skylake-avx512", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2782,7 +2547,7 @@ pub const cpu = struct { pub const slm = Cpu{ .name = "slm", .llvm_name = "slm", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2810,7 +2575,7 @@ pub const cpu = struct { pub const tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .aes, .cldemote, @@ -2853,7 +2618,7 @@ pub const cpu = struct { pub const westmere = Cpu{ .name = "westmere", .llvm_name = "westmere", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2872,7 +2637,7 @@ pub const cpu = struct { pub const winchip_c6 = Cpu{ .name = "winchip_c6", .llvm_name = "winchip-c6", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .mmx, .slow_unaligned_mem_16, .x87, @@ -2881,7 +2646,7 @@ pub const cpu = struct { pub const winchip2 = Cpu{ .name = "winchip2", .llvm_name = "winchip2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"3dnow", .slow_unaligned_mem_16, .x87, @@ -2890,7 +2655,7 @@ pub const cpu = struct { pub const x86_64 = Cpu{ .name = "x86_64", .llvm_name = "x86-64", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .cmov, .cx8, @@ -2907,7 +2672,7 @@ pub const cpu = struct { pub const yonah = Cpu{ .name = "yonah", .llvm_name = "yonah", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .cmov, .cx8, .fxsr, @@ -2921,7 +2686,7 @@ pub const cpu = struct { pub const znver1 = Cpu{ .name = "znver1", .llvm_name = "znver1", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, @@ -2965,7 +2730,7 @@ pub const cpu = struct { pub const znver2 = Cpu{ .name = "znver2", .llvm_name = "znver2", - .features = featureSet(&[_]Feature{ + .features = featureSet(&all_features, &[_]Feature{ .@"64bit", .adx, .aes, diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index a11d3aae88946c4f35db073183bb31e5e51c2efc..e6aa97f32c69915da3c7aadb40a21514976181a7 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -581,8 +581,8 @@ fn cpuFeaturesFromLLVM( const this_llvm_name = feature.llvm_name orelse continue; if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { - .add => set.addFeature(@intCast(u8, index)), - .sub => set.removeFeature(@intCast(u8, index)), + .add => set.addSparseFeature(@intCast(u8, index)), + .sub => set.removeSparseFeature(@intCast(u8, index)), } break; } @@ -676,7 +676,7 @@ const Stage2CpuFeatures = struct { }); errdefer allocator.free(builtin_str); - const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features.bytes }); + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ cpu.name, cpu.features.asBytes() }); errdefer allocator.free(cache_hash); self.* = Self{ @@ -699,10 +699,13 @@ const Stage2CpuFeatures = struct { defer llvm_features_buffer.deinit(); const all_features = arch.allFeaturesList(); + var populated_feature_set = feature_set; + if (arch.subArchFeature()) |sub_arch_index| { + populated_feature_set.addFeature(sub_arch_index, all_features); + } for (all_features) |feature, index| { const llvm_name = feature.llvm_name orelse continue; - - const plus_or_minus = "-+"[@boolToInt(feature_set.isEnabled(@intCast(u8, index)))]; + const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))]; try llvm_features_buffer.appendByte(plus_or_minus); try llvm_features_buffer.append(llvm_name); try llvm_features_buffer.append(","); @@ -721,7 +724,7 @@ const Stage2CpuFeatures = struct { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.bytes}); + const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.asBytes()}); errdefer allocator.free(cache_hash); const generic_arch_name = arch.genericName(); diff --git a/src/all_types.hpp b/src/all_types.hpp index df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f..fae7dae07709263c473f27ffd08828c9c7873933 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2144,6 +2144,7 @@ struct CodeGen { bool verbose_llvm_ir; bool verbose_cimport; bool verbose_cc; + bool verbose_llvm_cpu_features; bool error_during_imports; bool generate_error_name_table; bool enable_cache; // mutually exclusive with output_dir diff --git a/src/codegen.cpp b/src/codegen.cpp index ffdf0e5bb07d1f5d460257057e6d50d1110369d3..f7cfc95b3aa58b66579a5ae2ce4da4456b9a4224 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8802,8 +8802,10 @@ static void init(CodeGen *g) { target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features); target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); } - //fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args); - //fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features); + if (g->verbose_llvm_cpu_features) { + fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args); + fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features); + } g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, diff --git a/src/main.cpp b/src/main.cpp index d12ae850fa48cf18482c013d0f5650d7ed0f1a4e..bc181f3d5d9f11b9c1856c110937c4bf09205ce3 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --verbose-llvm-ir enable compiler debug output for LLVM IR\n" " --verbose-cimport enable compiler debug output for C imports\n" " --verbose-cc enable compiler debug output for C compilation\n" + " --verbose-llvm-cpu-features enable compiler debug output for LLVM CPU features\n" " -dirafter [dir] add directory to AFTER include search path\n" " -isystem [dir] add directory to SYSTEM include search path\n" " -I[dir] add directory to include search path\n" @@ -398,6 +399,7 @@ int main(int argc, char **argv) { bool verbose_llvm_ir = false; bool verbose_cimport = false; bool verbose_cc = false; + bool verbose_llvm_cpu_features = false; bool link_eh_frame_hdr = false; ErrColor color = ErrColorAuto; CacheOpt enable_cache = CacheOptAuto; @@ -614,6 +616,8 @@ int main(int argc, char **argv) { verbose_cimport = true; } else if (strcmp(arg, "--verbose-cc") == 0) { verbose_cc = true; + } else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) { + verbose_llvm_cpu_features = true; } else if (strcmp(arg, "-rdynamic") == 0) { rdynamic = true; } else if (strcmp(arg, "--each-lib-rpath") == 0) { @@ -1184,6 +1188,7 @@ int main(int argc, char **argv) { g->verbose_llvm_ir = verbose_llvm_ir; g->verbose_cimport = verbose_cimport; g->verbose_cc = verbose_cc; + g->verbose_llvm_cpu_features = verbose_llvm_cpu_features; g->output_dir = output_dir; g->disable_gen_h = disable_gen_h; g->bundle_compiler_rt = bundle_compiler_rt; -- 2.54.0 From 68b6867e7689617b3dcef72a88414deaf3ede43b Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 20:11:36 -0500 Subject: [PATCH 49/63] lazily compute the full cpu features dependencies --- lib/std/target.zig | 83 ++---- lib/std/target/aarch64.zig | 346 +++++++++++----------- lib/std/target/amdgpu.zig | 294 ++++++++++--------- lib/std/target/arm.zig | 513 ++++++++++++++++---------------- lib/std/target/avr.zig | 583 ++++++++++++++++++------------------- lib/std/target/bpf.zig | 17 +- lib/std/target/hexagon.zig | 63 ++-- lib/std/target/mips.zig | 133 +++++---- lib/std/target/msp430.zig | 15 +- lib/std/target/nvptx.zig | 81 +++--- lib/std/target/powerpc.zig | 177 ++++++----- lib/std/target/riscv.zig | 25 +- lib/std/target/sparc.zig | 119 ++++---- lib/std/target/systemz.zig | 95 +++--- lib/std/target/wasm.zig | 27 +- lib/std/target/x86.zig | 400 +++++++++++++------------ src-self-hosted/stage1.zig | 7 +- 17 files changed, 1459 insertions(+), 1519 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index f5ef5802d653eecc3d35861b4c6099ddee24bd0d..49913de2ee0f6876e334a27a863cdca1e71258d2 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -304,12 +304,12 @@ pub const Target = union(enum) { if (mem.eql(u8, feature_name, feature.name)) { switch (op) { .add => { - baseline_set.addFeature(index, all_features); - whitelist_set.addFeature(index, all_features); + baseline_set.addFeature(index); + whitelist_set.addFeature(index); }, .sub => { - baseline_set.removeFeature(index, all_features); - whitelist_set.removeFeature(index, all_features); + baseline_set.removeFeature(index); + whitelist_set.removeFeature(index); }, } break; @@ -580,12 +580,8 @@ pub const Target = union(enum) { /// Human-friendly UTF-8 text. description: []const u8, - /// `Set` of all features this depends on, and this feature itself. - /// Can be "or"ed with another set to remove this feature and all - /// its dependencies. - /// Has a default value of `undefined` because the canonical - /// structures are populated via comptime logic. - dependencies: Set = undefined, + /// Sparse `Set` of features this depends on. + dependencies: Set, /// A bit set of all the features. pub const Set = struct { @@ -598,6 +594,9 @@ pub const Target = union(enum) { pub const ShiftInt = std.math.Log2Int(usize); pub const empty = Set{ .ints = [1]usize{0} ** usize_count }; + pub fn empty_workaround() Set { + return Set{ .ints = [1]usize{0} ** usize_count }; + } pub fn isEnabled(set: Set, arch_feature_index: Index) bool { const usize_index = arch_feature_index / @bitSizeOf(usize); @@ -605,60 +604,28 @@ pub const Target = union(enum) { return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0; } - /// Adds the specified feature and all its dependencies to the set. O(1). - pub fn addFeature( - set: *Set, - arch_feature_index: Index, - all_features_list: []const Cpu.Feature, - ) void { - set.ints = @as(@Vector(usize_count, usize), set.ints) | - @as(@Vector(usize_count, usize), all_features_list[arch_feature_index].dependencies.ints); - } - - /// Removes the specified feature (TODO and all its dependents) from the set. O(1). - /// TODO improve this function to actually handle dependants rather than just calling - /// `removeSparseFeature`. - pub fn removeFeature( - set: *Set, - arch_feature_index: Index, - all_features_list: []const Cpu.Feature, - ) void { - set.removeSparseFeature(arch_feature_index); - } - /// Adds the specified feature but not its dependencies. - pub fn addSparseFeature(set: *Set, arch_feature_index: Index) void { + pub fn addFeature(set: *Set, arch_feature_index: Index) void { const usize_index = arch_feature_index / @bitSizeOf(usize); const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize)); set.ints[usize_index] |= @as(usize, 1) << bit_index; } /// Removes the specified feature but not its dependents. - pub fn removeSparseFeature(set: *Set, arch_feature_index: Index) void { + pub fn removeFeature(set: *Set, arch_feature_index: Index) void { const usize_index = arch_feature_index / @bitSizeOf(usize); const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize)); set.ints[usize_index] &= ~(@as(usize, 1) << bit_index); } - pub fn initAsDependencies( - set: *Set, - arch_feature_index: Index, - all_features_list: []const Cpu.Feature, - ) void { - // fast-case to help reduce how much comptime code must execute - const no_deps = for (set.ints) |elem| { - if (elem != 0) break false; - } else true; - // add itself to its own dependencies for easy "or"ing later - set.addSparseFeature(arch_feature_index); - if (no_deps) return; - + pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void { var old = set.ints; while (true) { - for (all_features_list) |feature, index| { - const casted_index = @intCast(Index, index); - if (set.isEnabled(casted_index)) { - set.addFeature(casted_index, all_features_list); + for (all_features_list) |feature, index_usize| { + const index = @intCast(Index, index_usize); + if (set.isEnabled(index)) { + set.ints = @as(@Vector(usize_count, usize), set.ints) | + @as(@Vector(usize_count, usize), feature.dependencies.ints); } } const nothing_changed = mem.eql(usize, &old, &set.ints); @@ -674,21 +641,11 @@ pub const Target = union(enum) { pub fn feature_set_fns(comptime F: type) type { return struct { - /// Populates a set with the list of features and all their dependencies included. - pub fn featureSet(all_features_list: []const Feature, features: []const F) Set { - var x: Set = Set.empty; - for (features) |feature| { - x.addFeature(@enumToInt(feature), all_features_list); - } - @compileLog(Set.empty); - return x; - } - /// Populates only the feature bits specified. - pub fn sparseFeatureSet(features: []const F) Set { - var x = Set.empty; + pub fn featureSet(features: []const F) Set { + var x = Set.empty_workaround(); // TODO remove empty_workaround for (features) |feature| { - x.addSparseFeature(@enumToInt(feature)); + x.addFeature(@enumToInt(feature)); } return x; } diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 3ddec8229855af6b0b0dc3a6f9a5ba3ceb2bf9e3..4639fe6dcc4eb04ede4b884c749373964a927d76 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -153,14 +153,13 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.a35)] = .{ .llvm_name = "a35", .description = "Cortex-A35 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -171,7 +170,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a53)] = .{ .llvm_name = "a53", .description = "Cortex-A53 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .balance_fp_ops, .crc, .crypto, @@ -187,7 +186,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a55)] = .{ .llvm_name = "a55", .description = "Cortex-A55 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -202,7 +201,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a57)] = .{ .llvm_name = "a57", .description = "Cortex-A57 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .balance_fp_ops, .crc, .crypto, @@ -219,7 +218,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a72)] = .{ .llvm_name = "a72", .description = "Cortex-A72 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -231,7 +230,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a73)] = .{ .llvm_name = "a73", .description = "Cortex-A73 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -243,7 +242,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a75)] = .{ .llvm_name = "a75", .description = "Cortex-A75 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -258,7 +257,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crypto, .dotprod, .fp_armv8, @@ -272,126 +271,126 @@ pub const all_features = blk: { result[@enumToInt(Feature.aes)] = .{ .llvm_name = "aes", .description = "Enable AES support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.aggressive_fma)] = .{ .llvm_name = "aggressive-fma", .description = "Enable Aggressive FMA for floating-point.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{ .llvm_name = "alternate-sextload-cvt-f32-pattern", .description = "Use alternative pattern for sextload convert to f32", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altnzcv)] = .{ .llvm_name = "altnzcv", .description = "Enable alternative NZCV format for floating point comparisons", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.am)] = .{ .llvm_name = "am", .description = "Enable v8.4-A Activity Monitors extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_bcc_fusion)] = .{ .llvm_name = "arith-bcc-fusion", .description = "CPU fuses arithmetic+bcc operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.arith_cbz_fusion)] = .{ .llvm_name = "arith-cbz-fusion", .description = "CPU fuses arithmetic + cbz/cbnz operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.balance_fp_ops)] = .{ .llvm_name = "balance-fp-ops", .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bti)] = .{ .llvm_name = "bti", .description = "Enable Branch Target Identification", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x10)] = .{ .llvm_name = "call-saved-x10", .description = "Make X10 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x11)] = .{ .llvm_name = "call-saved-x11", .description = "Make X11 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x12)] = .{ .llvm_name = "call-saved-x12", .description = "Make X12 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x13)] = .{ .llvm_name = "call-saved-x13", .description = "Make X13 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x14)] = .{ .llvm_name = "call-saved-x14", .description = "Make X14 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x15)] = .{ .llvm_name = "call-saved-x15", .description = "Make X15 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x18)] = .{ .llvm_name = "call-saved-x18", .description = "Make X18 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x8)] = .{ .llvm_name = "call-saved-x8", .description = "Make X8 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.call_saved_x9)] = .{ .llvm_name = "call-saved-x9", .description = "Make X9 callee saved.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccdp)] = .{ .llvm_name = "ccdp", .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccidx)] = .{ .llvm_name = "ccidx", .description = "Enable v8.3-A Extend of the CCSIDR number of sets", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ccpp)] = .{ .llvm_name = "ccpp", .description = "Enable v8.2 data Cache Clean to Point of Persistence", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.complxnum)] = .{ .llvm_name = "complxnum", .description = "Enable v8.3-A Floating-point complex number support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.crc)] = .{ .llvm_name = "crc", .description = "Enable ARMv8 CRC-32 checksum instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .llvm_name = "crypto", .description = "Enable cryptographic instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aes, .neon, .sha2, @@ -400,12 +399,12 @@ pub const all_features = blk: { result[@enumToInt(Feature.custom_cheap_as_move)] = .{ .llvm_name = "custom-cheap-as-move", .description = "Use custom handling of cheap instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cyclone)] = .{ .llvm_name = "cyclone", .description = "Cyclone", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .alternate_sextload_cvt_f32_pattern, .arith_bcc_fusion, .arith_cbz_fusion, @@ -424,29 +423,29 @@ pub const all_features = blk: { result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{ .llvm_name = "disable-latency-sched-heuristic", .description = "Disable latency scheduling heuristic", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dit)] = .{ .llvm_name = "dit", .description = "Enable v8.4-A Data Independent Timing instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ .llvm_name = "dotprod", .description = "Enable dot product support", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos_cheap_as_move)] = .{ .llvm_name = "exynos-cheap-as-move", .description = "Use Exynos specific handling of cheap instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .custom_cheap_as_move, }), }; result[@enumToInt(Feature.exynosm1)] = .{ .llvm_name = "exynosm1", .description = "Samsung Exynos-M1 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -463,7 +462,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.exynosm2)] = .{ .llvm_name = "exynosm2", .description = "Samsung Exynos-M2 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -479,7 +478,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.exynosm3)] = .{ .llvm_name = "exynosm3", .description = "Samsung Exynos-M3 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .exynos_cheap_as_move, @@ -498,7 +497,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.exynosm4)] = .{ .llvm_name = "exynosm4", .description = "Samsung Exynos-M4 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .arith_bcc_fusion, .arith_cbz_fusion, .crypto, @@ -521,7 +520,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.falkor)] = .{ .llvm_name = "falkor", .description = "Qualcomm Falkor processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .custom_cheap_as_move, @@ -539,78 +538,78 @@ pub const all_features = blk: { result[@enumToInt(Feature.fmi)] = .{ .llvm_name = "fmi", .description = "Enable v8.4-A Flag Manipulation Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.force_32bit_jump_tables)] = .{ .llvm_name = "force-32bit-jump-tables", .description = "Force jump table entries to be 32-bits wide except at MinSize", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ .llvm_name = "fp16fml", .description = "Enable FP16 FML instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fullfp16, }), }; result[@enumToInt(Feature.fptoint)] = .{ .llvm_name = "fptoint", .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fullfp16)] = .{ .llvm_name = "fullfp16", .description = "Full FP16", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.fuse_address)] = .{ .llvm_name = "fuse-address", .description = "CPU fuses address generation and memory operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_aes)] = .{ .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_arith_logic)] = .{ .llvm_name = "fuse-arith-logic", .description = "CPU fuses arithmetic and logic operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_crypto_eor)] = .{ .llvm_name = "fuse-crypto-eor", .description = "CPU fuses AES/PMULL and EOR operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_csel)] = .{ .llvm_name = "fuse-csel", .description = "CPU fuses conditional select operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jsconv)] = .{ .llvm_name = "jsconv", .description = "Enable v8.3-A JavaScript FP conversion enchancement", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.kryo)] = .{ .llvm_name = "kryo", .description = "Qualcomm Kryo processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .custom_cheap_as_move, @@ -626,235 +625,235 @@ pub const all_features = blk: { result[@enumToInt(Feature.lor)] = .{ .llvm_name = "lor", .description = "Enables ARM v8.1 Limited Ordering Regions extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lse)] = .{ .llvm_name = "lse", .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lsl_fast)] = .{ .llvm_name = "lsl-fast", .description = "CPU has a fastpath logical shift of up to 3 places", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpam)] = .{ .llvm_name = "mpam", .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mte)] = .{ .llvm_name = "mte", .description = "Enable Memory Tagging Extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ .llvm_name = "neon", .description = "Enable Advanced SIMD instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8, }), }; result[@enumToInt(Feature.no_neg_immediates)] = .{ .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nv)] = .{ .llvm_name = "nv", .description = "Enable v8.4-A Nested Virtualization Enchancement", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pa)] = .{ .llvm_name = "pa", .description = "Enable v8.3-A Pointer Authentication enchancement", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan)] = .{ .llvm_name = "pan", .description = "Enables ARM v8.1 Privileged Access-Never extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pan_rwv)] = .{ .llvm_name = "pan-rwv", .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .pan, }), }; result[@enumToInt(Feature.perfmon)] = .{ .llvm_name = "perfmon", .description = "Enable ARMv8 PMUv3 Performance Monitors extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predictable_select_expensive)] = .{ .llvm_name = "predictable-select-expensive", .description = "Prefer likely predicted branches over selects", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.predres)] = .{ .llvm_name = "predres", .description = "Enable v8.5a execution and data prediction invalidation instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rand)] = .{ .llvm_name = "rand", .description = "Enable Random Number generation instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ .llvm_name = "ras", .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rasv8_4)] = .{ .llvm_name = "rasv8_4", .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .ras, }), }; result[@enumToInt(Feature.rcpc)] = .{ .llvm_name = "rcpc", .description = "Enable support for RCPC extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rcpc_immo)] = .{ .llvm_name = "rcpc-immo", .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .rcpc, }), }; result[@enumToInt(Feature.rdm)] = .{ .llvm_name = "rdm", .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x1)] = .{ .llvm_name = "reserve-x1", .description = "Reserve X1, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x10)] = .{ .llvm_name = "reserve-x10", .description = "Reserve X10, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x11)] = .{ .llvm_name = "reserve-x11", .description = "Reserve X11, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x12)] = .{ .llvm_name = "reserve-x12", .description = "Reserve X12, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x13)] = .{ .llvm_name = "reserve-x13", .description = "Reserve X13, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x14)] = .{ .llvm_name = "reserve-x14", .description = "Reserve X14, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x15)] = .{ .llvm_name = "reserve-x15", .description = "Reserve X15, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x18)] = .{ .llvm_name = "reserve-x18", .description = "Reserve X18, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x2)] = .{ .llvm_name = "reserve-x2", .description = "Reserve X2, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x20)] = .{ .llvm_name = "reserve-x20", .description = "Reserve X20, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x21)] = .{ .llvm_name = "reserve-x21", .description = "Reserve X21, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x22)] = .{ .llvm_name = "reserve-x22", .description = "Reserve X22, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x23)] = .{ .llvm_name = "reserve-x23", .description = "Reserve X23, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x24)] = .{ .llvm_name = "reserve-x24", .description = "Reserve X24, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x25)] = .{ .llvm_name = "reserve-x25", .description = "Reserve X25, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x26)] = .{ .llvm_name = "reserve-x26", .description = "Reserve X26, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x27)] = .{ .llvm_name = "reserve-x27", .description = "Reserve X27, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x28)] = .{ .llvm_name = "reserve-x28", .description = "Reserve X28, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x3)] = .{ .llvm_name = "reserve-x3", .description = "Reserve X3, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x4)] = .{ .llvm_name = "reserve-x4", .description = "Reserve X4, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x5)] = .{ .llvm_name = "reserve-x5", .description = "Reserve X5, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x6)] = .{ .llvm_name = "reserve-x6", .description = "Reserve X6, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x7)] = .{ .llvm_name = "reserve-x7", .description = "Reserve X7, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_x9)] = .{ .llvm_name = "reserve-x9", .description = "Reserve X9, making it unavailable as a GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.saphira)] = .{ .llvm_name = "saphira", .description = "Qualcomm Saphira processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crypto, .custom_cheap_as_move, .fp_armv8, @@ -871,24 +870,24 @@ pub const all_features = blk: { result[@enumToInt(Feature.sb)] = .{ .llvm_name = "sb", .description = "Enable v8.5 Speculation Barrier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sel2)] = .{ .llvm_name = "sel2", .description = "Enable v8.4-A Secure Exception Level 2 extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.sha3)] = .{ .llvm_name = "sha3", .description = "Enable SHA512 and SHA3 support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, .sha2, }), @@ -896,61 +895,61 @@ pub const all_features = blk: { result[@enumToInt(Feature.slow_misaligned_128store)] = .{ .llvm_name = "slow-misaligned-128store", .description = "Misaligned 128 bit stores are slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_paired_128)] = .{ .llvm_name = "slow-paired-128", .description = "Paired 128 bit loads and stores are slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_strqro_store)] = .{ .llvm_name = "slow-strqro-store", .description = "STR of Q register with register offset is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm4)] = .{ .llvm_name = "sm4", .description = "Enable SM3 and SM4 support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.spe)] = .{ .llvm_name = "spe", .description = "Enable Statistical Profiling extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.specrestrict)] = .{ .llvm_name = "specrestrict", .description = "Enable architectural speculation restriction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ssbs)] = .{ .llvm_name = "ssbs", .description = "Enable Speculative Store Bypass Safe bit", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.strict_align)] = .{ .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve)] = .{ .llvm_name = "sve", .description = "Enable Scalable Vector Extension (SVE) instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sve2)] = .{ .llvm_name = "sve2", .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sve, }), }; result[@enumToInt(Feature.sve2_aes)] = .{ .llvm_name = "sve2-aes", .description = "Enable AES SVE2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aes, .sve2, }), @@ -958,14 +957,14 @@ pub const all_features = blk: { result[@enumToInt(Feature.sve2_bitperm)] = .{ .llvm_name = "sve2-bitperm", .description = "Enable bit permutation SVE2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sve2, }), }; result[@enumToInt(Feature.sve2_sha3)] = .{ .llvm_name = "sve2-sha3", .description = "Enable SHA3 SVE2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sha3, .sve2, }), @@ -973,7 +972,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.sve2_sm4)] = .{ .llvm_name = "sve2-sm4", .description = "Enable SM4 SVE2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sm4, .sve2, }), @@ -981,7 +980,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.thunderx)] = .{ .llvm_name = "thunderx", .description = "Cavium ThunderX processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -994,7 +993,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.thunderx2t99)] = .{ .llvm_name = "thunderx2t99", .description = "Cavium ThunderX2 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aggressive_fma, .arith_bcc_fusion, .crc, @@ -1010,7 +1009,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.thunderxt81)] = .{ .llvm_name = "thunderxt81", .description = "Cavium ThunderX processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1023,7 +1022,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.thunderxt83)] = .{ .llvm_name = "thunderxt83", .description = "Cavium ThunderX processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1036,7 +1035,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.thunderxt88)] = .{ .llvm_name = "thunderxt88", .description = "Cavium ThunderX processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .fp_armv8, @@ -1049,32 +1048,32 @@ pub const all_features = blk: { result[@enumToInt(Feature.tlb_rmi)] = .{ .llvm_name = "tlb-rmi", .description = "Enable v8.4-A TLB Range and Maintenance Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el1)] = .{ .llvm_name = "tpidr-el1", .description = "Permit use of TPIDR_EL1 for the TLS base", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el2)] = .{ .llvm_name = "tpidr-el2", .description = "Permit use of TPIDR_EL2 for the TLS base", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tpidr_el3)] = .{ .llvm_name = "tpidr-el3", .description = "Permit use of TPIDR_EL3 for the TLS base", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tracev8_4)] = .{ .llvm_name = "tracev8.4", .description = "Enable v8.4-A Trace extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tsv110)] = .{ .llvm_name = "tsv110", .description = "HiSilicon TS-V110 processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crypto, .custom_cheap_as_move, .dotprod, @@ -1092,27 +1091,27 @@ pub const all_features = blk: { result[@enumToInt(Feature.uaops)] = .{ .llvm_name = "uaops", .description = "Enable v8.2 UAO PState", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_postra_scheduler)] = .{ .llvm_name = "use-postra-scheduler", .description = "Schedule again after register allocation", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_reciprocal_square_root)] = .{ .llvm_name = "use-reciprocal-square-root", .description = "Use the reciprocal square root approximation", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8_1a)] = .{ .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .lor, .lse, @@ -1124,7 +1123,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_2a)] = .{ .llvm_name = "v8.2a", .description = "Support ARM v8.2a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .ccpp, .pan_rwv, .ras, @@ -1135,7 +1134,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_3a)] = .{ .llvm_name = "v8.3a", .description = "Support ARM v8.3a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .ccidx, .complxnum, .jsconv, @@ -1147,7 +1146,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_4a)] = .{ .llvm_name = "v8.4a", .description = "Support ARM v8.4a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .am, .dit, .dotprod, @@ -1165,7 +1164,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_5a)] = .{ .llvm_name = "v8.5a", .description = "Support ARM v8.5a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .altnzcv, .bti, .ccdp, @@ -1180,17 +1179,17 @@ pub const all_features = blk: { result[@enumToInt(Feature.vh)] = .{ .llvm_name = "vh", .description = "Enables ARM v8.1 Virtual Host extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcm)] = .{ .llvm_name = "zcm", .description = "Has zero-cycle register moves", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz)] = .{ .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .zcz_fp, .zcz_gp, }), @@ -1198,23 +1197,22 @@ pub const all_features = blk: { result[@enumToInt(Feature.zcz_fp)] = .{ .llvm_name = "zcz-fp", .description = "Has zero-cycle zeroing instructions for FP registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_fp_workaround)] = .{ .llvm_name = "zcz-fp-workaround", .description = "The zero-cycle floating-point zeroing instruction has a bug", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zcz_gp)] = .{ .llvm_name = "zcz-gp", .description = "Has zero-cycle zeroing instructions for generic registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -1223,126 +1221,126 @@ pub const cpu = struct { pub const apple_latest = Cpu{ .name = "apple_latest", .llvm_name = "apple-latest", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cyclone, }), }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a35, }), }; pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a53, }), }; pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a55, }), }; pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a57, }), }; pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a72, }), }; pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a73, }), }; pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a75, }), }; pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a76, }), }; pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a76, }), }; pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cyclone, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .exynosm1, }), }; pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .exynosm2, }), }; pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .exynosm3, }), }; pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .exynosm4, }), }; pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .exynosm4, }), }; pub const falkor = Cpu{ .name = "falkor", .llvm_name = "falkor", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .falkor, }), }; pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fp_armv8, .fuse_aes, .neon, @@ -1353,56 +1351,56 @@ pub const cpu = struct { pub const kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .kryo, }), }; pub const saphira = Cpu{ .name = "saphira", .llvm_name = "saphira", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .saphira, }), }; pub const thunderx = Cpu{ .name = "thunderx", .llvm_name = "thunderx", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .thunderx, }), }; pub const thunderx2t99 = Cpu{ .name = "thunderx2t99", .llvm_name = "thunderx2t99", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .thunderx2t99, }), }; pub const thunderxt81 = Cpu{ .name = "thunderxt81", .llvm_name = "thunderxt81", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .thunderxt81, }), }; pub const thunderxt83 = Cpu{ .name = "thunderxt83", .llvm_name = "thunderxt83", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .thunderxt83, }), }; pub const thunderxt88 = Cpu{ .name = "thunderxt88", .llvm_name = "thunderxt88", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .thunderxt88, }), }; pub const tsv110 = Cpu{ .name = "tsv110", .llvm_name = "tsv110", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .tsv110, }), }; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig index 54bd073c2c0a4551596f259371b58d03f5423a52..182b9fa45375f6e04459d7ac1cb8228e6974471c 100644 --- a/lib/std/target/amdgpu.zig +++ b/lib/std/target/amdgpu.zig @@ -114,186 +114,185 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"16_bit_insts")] = .{ .llvm_name = "16-bit-insts", .description = "Has i16/f16 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.DumpCode)] = .{ .llvm_name = "DumpCode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.add_no_carry_insts)] = .{ .llvm_name = "add-no-carry-insts", .description = "Have VALU add/sub instructions without carry out", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aperture_regs)] = .{ .llvm_name = "aperture-regs", .description = "Has Memory Aperture Base and Size Registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.atomic_fadd_insts)] = .{ .llvm_name = "atomic-fadd-insts", .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{ .llvm_name = "auto-waitcnt-before-barrier", .description = "Hardware automatically inserts waitcnt before barrier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ci_insts)] = .{ .llvm_name = "ci-insts", .description = "Additional instructions for CI+", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.code_object_v3)] = .{ .llvm_name = "code-object-v3", .description = "Generate code object version 3", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cumode)] = .{ .llvm_name = "cumode", .description = "Enable CU wavefront execution mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dl_insts)] = .{ .llvm_name = "dl-insts", .description = "Has v_fmac_f32 and v_xnor_b32 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot1_insts)] = .{ .llvm_name = "dot1-insts", .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot2_insts)] = .{ .llvm_name = "dot2-insts", .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot3_insts)] = .{ .llvm_name = "dot3-insts", .description = "Has v_dot8c_i32_i4 instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot4_insts)] = .{ .llvm_name = "dot4-insts", .description = "Has v_dot2c_i32_i16 instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot5_insts)] = .{ .llvm_name = "dot5-insts", .description = "Has v_dot2c_f32_f16 instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dot6_insts)] = .{ .llvm_name = "dot6-insts", .description = "Has v_dot4c_i32_i8 instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp)] = .{ .llvm_name = "dpp", .description = "Support DPP (Data Parallel Primitives) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dpp8)] = .{ .llvm_name = "dpp8", .description = "Support DPP8 (Data Parallel Primitives) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dumpcode)] = .{ .llvm_name = "dumpcode", .description = "Dump MachineInstrs in the CodeEmitter", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_ds128)] = .{ .llvm_name = "enable-ds128", .description = "Use ds_read|write_b128", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enable_prt_strict_null)] = .{ .llvm_name = "enable-prt-strict-null", .description = "Enable zeroing of result registers for sparse texture fetches", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_fmaf)] = .{ .llvm_name = "fast-fmaf", .description = "Assuming f32 fma is at least as fast as mul + add", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_address_space)] = .{ .llvm_name = "flat-address-space", .description = "Support flat address space", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_for_global)] = .{ .llvm_name = "flat-for-global", .description = "Force to generate flat instruction for global", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_global_insts)] = .{ .llvm_name = "flat-global-insts", .description = "Have global_* flat memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_inst_offsets)] = .{ .llvm_name = "flat-inst-offsets", .description = "Flat instructions have immediate offset addressing mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_scratch_insts)] = .{ .llvm_name = "flat-scratch-insts", .description = "Have scratch_* flat memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.flat_segment_offset_bug)] = .{ .llvm_name = "flat-segment-offset-bug", .description = "GFX10 bug, inst_offset ignored in flat segment", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma_mix_insts)] = .{ .llvm_name = "fma-mix-insts", .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fmaf)] = .{ .llvm_name = "fmaf", .description = "Enable single precision FMA (not as fast as mul+add, but fused)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_exceptions)] = .{ .llvm_name = "fp-exceptions", .description = "Enable floating point exceptions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16_denormals)] = .{ .llvm_name = "fp16-denormals", .description = "Enable half precision denormal handling", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64_fp16_denormals, }), }; result[@enumToInt(Feature.fp32_denormals)] = .{ .llvm_name = "fp32-denormals", .description = "Enable single precision denormal handling", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ .llvm_name = "fp64", .description = "Enable double precision operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64_denormals)] = .{ .llvm_name = "fp64-denormals", .description = "Enable double and half precision denormal handling", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, .fp64_fp16_denormals, }), @@ -301,19 +300,19 @@ pub const all_features = blk: { result[@enumToInt(Feature.fp64_fp16_denormals)] = .{ .llvm_name = "fp64-fp16-denormals", .description = "Enable double and half precision denormal handling", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, }), }; result[@enumToInt(Feature.gcn3_encoding)] = .{ .llvm_name = "gcn3-encoding", .description = "Encoding format for VI", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx10)] = .{ .llvm_name = "gfx10", .description = "GFX10 GPU generation", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"16_bit_insts", .add_no_carry_insts, .aperture_regs, @@ -353,22 +352,22 @@ pub const all_features = blk: { result[@enumToInt(Feature.gfx10_insts)] = .{ .llvm_name = "gfx10-insts", .description = "Additional instructions for GFX10+", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{ .llvm_name = "gfx7-gfx8-gfx9-insts", .description = "Instructions shared in GFX7, GFX8, GFX9", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx8_insts)] = .{ .llvm_name = "gfx8-insts", .description = "Additional instructions for GFX8+", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfx9)] = .{ .llvm_name = "gfx9", .description = "GFX9 GPU generation", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"16_bit_insts", .add_no_carry_insts, .aperture_regs, @@ -404,212 +403,212 @@ pub const all_features = blk: { result[@enumToInt(Feature.gfx9_insts)] = .{ .llvm_name = "gfx9-insts", .description = "Additional instructions for GFX9+", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.half_rate_64_ops)] = .{ .llvm_name = "half-rate-64-ops", .description = "Most fp64 instructions are half rate instead of quarter", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{ .llvm_name = "inst-fwd-prefetch-bug", .description = "S_INST_PREFETCH instruction causes shader to hang", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.int_clamp_insts)] = .{ .llvm_name = "int-clamp-insts", .description = "Support clamp for integer destination", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{ .llvm_name = "inv-2pi-inline-imm", .description = "Has 1 / (2 * pi) as inline immediate", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{ .llvm_name = "lds-branch-vmem-war-hazard", .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lds_misaligned_bug)] = .{ .llvm_name = "lds-misaligned-bug", .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount16)] = .{ .llvm_name = "ldsbankcount16", .description = "The number of LDS banks per compute unit.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldsbankcount32)] = .{ .llvm_name = "ldsbankcount32", .description = "The number of LDS banks per compute unit.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_opt)] = .{ .llvm_name = "load-store-opt", .description = "Enable SI load/store optimizer pass", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize0)] = .{ .llvm_name = "localmemorysize0", .description = "The size of local memory in bytes", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize32768)] = .{ .llvm_name = "localmemorysize32768", .description = "The size of local memory in bytes", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.localmemorysize65536)] = .{ .llvm_name = "localmemorysize65536", .description = "The size of local memory in bytes", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mad_mix_insts)] = .{ .llvm_name = "mad-mix-insts", .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mai_insts)] = .{ .llvm_name = "mai-insts", .description = "Has mAI instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_16)] = .{ .llvm_name = "max-private-element-size-16", .description = "Maximum private access size may be 16", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_4)] = .{ .llvm_name = "max-private-element-size-4", .description = "Maximum private access size may be 4", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.max_private_element_size_8)] = .{ .llvm_name = "max-private-element-size-8", .description = "Maximum private access size may be 8", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mimg_r128)] = .{ .llvm_name = "mimg-r128", .description = "Support 128-bit texture resources", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movrel)] = .{ .llvm_name = "movrel", .description = "Has v_movrel*_b32 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_data_dep_hazard)] = .{ .llvm_name = "no-data-dep-hazard", .description = "Does not need SW waitstates", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sdst_cmpx)] = .{ .llvm_name = "no-sdst-cmpx", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_sram_ecc_support)] = .{ .llvm_name = "no-sram-ecc-support", .description = "Hardware does not support SRAM ECC", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_xnack_support)] = .{ .llvm_name = "no-xnack-support", .description = "Hardware does not support XNACK", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_encoding)] = .{ .llvm_name = "nsa-encoding", .description = "Support NSA encoding for image instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{ .llvm_name = "nsa-to-vmem-bug", .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.offset_3f_bug)] = .{ .llvm_name = "offset-3f-bug", .description = "Branch offset of 3f hardware bug", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{ .llvm_name = "pk-fmac-f16-inst", .description = "Has v_pk_fmac_f16 instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.promote_alloca)] = .{ .llvm_name = "promote-alloca", .description = "Enable promote alloca pass", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r128_a16)] = .{ .llvm_name = "r128-a16", .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.register_banking)] = .{ .llvm_name = "register-banking", .description = "Has register banking", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.s_memrealtime)] = .{ .llvm_name = "s-memrealtime", .description = "Has s_memrealtime instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_atomics)] = .{ .llvm_name = "scalar-atomics", .description = "Has atomic scalar memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{ .llvm_name = "scalar-flat-scratch-insts", .description = "Have s_scratch_* flat memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.scalar_stores)] = .{ .llvm_name = "scalar-stores", .description = "Has store scalar memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa)] = .{ .llvm_name = "sdwa", .description = "Support SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_mav)] = .{ .llvm_name = "sdwa-mav", .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_omod)] = .{ .llvm_name = "sdwa-omod", .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{ .llvm_name = "sdwa-out-mods-vopc", .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_scalar)] = .{ .llvm_name = "sdwa-scalar", .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sdwa_sdst)] = .{ .llvm_name = "sdwa-sdst", .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sea_islands)] = .{ .llvm_name = "sea-islands", .description = "SEA_ISLANDS GPU generation", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .ci_insts, .flat_address_space, .fp64, @@ -625,22 +624,22 @@ pub const all_features = blk: { result[@enumToInt(Feature.sgpr_init_bug)] = .{ .llvm_name = "sgpr-init-bug", .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.si_scheduler)] = .{ .llvm_name = "si-scheduler", .description = "Enable SI Machine Scheduler", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{ .llvm_name = "smem-to-vector-write-hazard", .description = "s_load_dword followed by v_cmp page faults", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.southern_islands)] = .{ .llvm_name = "southern-islands", .description = "SOUTHERN_ISLANDS GPU generation", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, .ldsbankcount32, .localmemorysize32768, @@ -655,62 +654,62 @@ pub const all_features = blk: { result[@enumToInt(Feature.sram_ecc)] = .{ .llvm_name = "sram-ecc", .description = "Enable SRAM ECC", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trap_handler)] = .{ .llvm_name = "trap-handler", .description = "Trap handler support", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trig_reduced_range)] = .{ .llvm_name = "trig-reduced-range", .description = "Requires use of fract on arguments to trig instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_buffer_access)] = .{ .llvm_name = "unaligned-buffer-access", .description = "Support unaligned global loads and stores", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unaligned_scratch_access)] = .{ .llvm_name = "unaligned-scratch-access", .description = "Support unaligned scratch loads and stores", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unpacked_d16_vmem)] = .{ .llvm_name = "unpacked-d16-vmem", .description = "Has unpacked d16 vmem instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{ .llvm_name = "unsafe-ds-offset-folding", .description = "Force using DS instruction immediate offsets on SI", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{ .llvm_name = "vcmpx-exec-war-hazard", .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{ .llvm_name = "vcmpx-permlane-hazard", .description = "TODO: describe me", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vgpr_index_mode)] = .{ .llvm_name = "vgpr-index-mode", .description = "Has VGPR mode register indexing", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{ .llvm_name = "vmem-to-scalar-write-hazard", .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.volcanic_islands)] = .{ .llvm_name = "volcanic-islands", .description = "VOLCANIC_ISLANDS GPU generation", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"16_bit_insts", .ci_insts, .dpp, @@ -738,43 +737,42 @@ pub const all_features = blk: { result[@enumToInt(Feature.vop3_literal)] = .{ .llvm_name = "vop3-literal", .description = "Can use one literal in VOP3", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vop3p)] = .{ .llvm_name = "vop3p", .description = "Has VOP3P packed instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vscnt)] = .{ .llvm_name = "vscnt", .description = "Has separate store vscnt counter", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize16)] = .{ .llvm_name = "wavefrontsize16", .description = "The number of threads per wavefront", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize32)] = .{ .llvm_name = "wavefrontsize32", .description = "The number of threads per wavefront", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wavefrontsize64)] = .{ .llvm_name = "wavefrontsize64", .description = "The number of threads per wavefront", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xnack)] = .{ .llvm_name = "xnack", .description = "Enable XNACK support", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -783,7 +781,7 @@ pub const cpu = struct { pub const bonaire = Cpu{ .name = "bonaire", .llvm_name = "bonaire", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -793,7 +791,7 @@ pub const cpu = struct { pub const carrizo = Cpu{ .name = "carrizo", .llvm_name = "carrizo", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -806,7 +804,7 @@ pub const cpu = struct { pub const fiji = Cpu{ .name = "fiji", .llvm_name = "fiji", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -817,14 +815,14 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .wavefrontsize64, }), }; pub const generic_hsa = Cpu{ .name = "generic_hsa", .llvm_name = "generic-hsa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .flat_address_space, .wavefrontsize64, }), @@ -832,7 +830,7 @@ pub const cpu = struct { pub const gfx1010 = Cpu{ .name = "gfx1010", .llvm_name = "gfx1010", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .dl_insts, .flat_segment_offset_bug, @@ -858,7 +856,7 @@ pub const cpu = struct { pub const gfx1011 = Cpu{ .name = "gfx1011", .llvm_name = "gfx1011", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -887,7 +885,7 @@ pub const cpu = struct { pub const gfx1012 = Cpu{ .name = "gfx1012", .llvm_name = "gfx1012", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -917,7 +915,7 @@ pub const cpu = struct { pub const gfx600 = Cpu{ .name = "gfx600", .llvm_name = "gfx600", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -929,7 +927,7 @@ pub const cpu = struct { pub const gfx601 = Cpu{ .name = "gfx601", .llvm_name = "gfx601", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -939,7 +937,7 @@ pub const cpu = struct { pub const gfx700 = Cpu{ .name = "gfx700", .llvm_name = "gfx700", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -949,7 +947,7 @@ pub const cpu = struct { pub const gfx701 = Cpu{ .name = "gfx701", .llvm_name = "gfx701", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -961,7 +959,7 @@ pub const cpu = struct { pub const gfx702 = Cpu{ .name = "gfx702", .llvm_name = "gfx702", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .ldsbankcount16, @@ -972,7 +970,7 @@ pub const cpu = struct { pub const gfx703 = Cpu{ .name = "gfx703", .llvm_name = "gfx703", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -982,7 +980,7 @@ pub const cpu = struct { pub const gfx704 = Cpu{ .name = "gfx704", .llvm_name = "gfx704", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -992,7 +990,7 @@ pub const cpu = struct { pub const gfx801 = Cpu{ .name = "gfx801", .llvm_name = "gfx801", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1005,7 +1003,7 @@ pub const cpu = struct { pub const gfx802 = Cpu{ .name = "gfx802", .llvm_name = "gfx802", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1017,7 +1015,7 @@ pub const cpu = struct { pub const gfx803 = Cpu{ .name = "gfx803", .llvm_name = "gfx803", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1028,7 +1026,7 @@ pub const cpu = struct { pub const gfx810 = Cpu{ .name = "gfx810", .llvm_name = "gfx810", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount16, .volcanic_islands, @@ -1038,7 +1036,7 @@ pub const cpu = struct { pub const gfx900 = Cpu{ .name = "gfx900", .llvm_name = "gfx900", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1050,7 +1048,7 @@ pub const cpu = struct { pub const gfx902 = Cpu{ .name = "gfx902", .llvm_name = "gfx902", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1062,7 +1060,7 @@ pub const cpu = struct { pub const gfx904 = Cpu{ .name = "gfx904", .llvm_name = "gfx904", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fma_mix_insts, .gfx9, @@ -1074,7 +1072,7 @@ pub const cpu = struct { pub const gfx906 = Cpu{ .name = "gfx906", .llvm_name = "gfx906", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .dl_insts, .dot1_insts, @@ -1089,7 +1087,7 @@ pub const cpu = struct { pub const gfx908 = Cpu{ .name = "gfx908", .llvm_name = "gfx908", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .atomic_fadd_insts, .code_object_v3, .dl_insts, @@ -1111,7 +1109,7 @@ pub const cpu = struct { pub const gfx909 = Cpu{ .name = "gfx909", .llvm_name = "gfx909", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .gfx9, .ldsbankcount32, @@ -1122,7 +1120,7 @@ pub const cpu = struct { pub const hainan = Cpu{ .name = "hainan", .llvm_name = "hainan", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1132,7 +1130,7 @@ pub const cpu = struct { pub const hawaii = Cpu{ .name = "hawaii", .llvm_name = "hawaii", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1144,7 +1142,7 @@ pub const cpu = struct { pub const iceland = Cpu{ .name = "iceland", .llvm_name = "iceland", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1156,7 +1154,7 @@ pub const cpu = struct { pub const kabini = Cpu{ .name = "kabini", .llvm_name = "kabini", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -1166,7 +1164,7 @@ pub const cpu = struct { pub const kaveri = Cpu{ .name = "kaveri", .llvm_name = "kaveri", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1176,7 +1174,7 @@ pub const cpu = struct { pub const mullins = Cpu{ .name = "mullins", .llvm_name = "mullins", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount16, .no_xnack_support, @@ -1186,7 +1184,7 @@ pub const cpu = struct { pub const oland = Cpu{ .name = "oland", .llvm_name = "oland", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1196,7 +1194,7 @@ pub const cpu = struct { pub const pitcairn = Cpu{ .name = "pitcairn", .llvm_name = "pitcairn", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1206,7 +1204,7 @@ pub const cpu = struct { pub const polaris10 = Cpu{ .name = "polaris10", .llvm_name = "polaris10", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1217,7 +1215,7 @@ pub const cpu = struct { pub const polaris11 = Cpu{ .name = "polaris11", .llvm_name = "polaris11", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1228,7 +1226,7 @@ pub const cpu = struct { pub const stoney = Cpu{ .name = "stoney", .llvm_name = "stoney", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount16, .volcanic_islands, @@ -1238,7 +1236,7 @@ pub const cpu = struct { pub const tahiti = Cpu{ .name = "tahiti", .llvm_name = "tahiti", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .fast_fmaf, .half_rate_64_ops, @@ -1250,7 +1248,7 @@ pub const cpu = struct { pub const tonga = Cpu{ .name = "tonga", .llvm_name = "tonga", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, @@ -1262,7 +1260,7 @@ pub const cpu = struct { pub const verde = Cpu{ .name = "verde", .llvm_name = "verde", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .code_object_v3, .ldsbankcount32, .no_xnack_support, diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig index bcc04ae88427810492e2cc99f4691ae37cab3b24..62a4e1e83511ff112676502b2dc44e9715f74189 100644 --- a/lib/std/target/arm.zig +++ b/lib/std/target/arm.zig @@ -188,167 +188,167 @@ pub const all_features = blk: { result[@enumToInt(Feature.@"32bit")] = .{ .llvm_name = "32bit", .description = "Prefer 32-bit Thumb instrs", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"8msecext")] = .{ .llvm_name = "8msecext", .description = "Enable support for ARMv8-M Security Extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a12)] = .{ .llvm_name = "a12", .description = "Cortex-A12 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a15)] = .{ .llvm_name = "a15", .description = "Cortex-A15 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a17)] = .{ .llvm_name = "a17", .description = "Cortex-A17 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a32)] = .{ .llvm_name = "a32", .description = "Cortex-A32 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a35)] = .{ .llvm_name = "a35", .description = "Cortex-A35 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a5)] = .{ .llvm_name = "a5", .description = "Cortex-A5 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a53)] = .{ .llvm_name = "a53", .description = "Cortex-A53 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a55)] = .{ .llvm_name = "a55", .description = "Cortex-A55 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a57)] = .{ .llvm_name = "a57", .description = "Cortex-A57 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a7)] = .{ .llvm_name = "a7", .description = "Cortex-A7 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a72)] = .{ .llvm_name = "a72", .description = "Cortex-A72 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a73)] = .{ .llvm_name = "a73", .description = "Cortex-A73 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a75)] = .{ .llvm_name = "a75", .description = "Cortex-A75 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a76)] = .{ .llvm_name = "a76", .description = "Cortex-A76 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a8)] = .{ .llvm_name = "a8", .description = "Cortex-A8 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a9)] = .{ .llvm_name = "a9", .description = "Cortex-A9 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aclass)] = .{ .llvm_name = "aclass", .description = "Is application profile ('A' series)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.acquire_release)] = .{ .llvm_name = "acquire-release", .description = "Has v8 acquire/release (lda/ldaex etc) instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ .llvm_name = "aes", .description = "Enable AES support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.armv2)] = .{ .llvm_name = "armv2", .description = "ARMv2 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv2a)] = .{ .llvm_name = "armv2a", .description = "ARMv2a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3)] = .{ .llvm_name = "armv3", .description = "ARMv3 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv3m)] = .{ .llvm_name = "armv3m", .description = "ARMv3m architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4)] = .{ .llvm_name = "armv4", .description = "ARMv4 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.armv4t)] = .{ .llvm_name = "armv4t", .description = "ARMv4t architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.armv5t)] = .{ .llvm_name = "armv5t", .description = "ARMv5t architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v5t, }), }; result[@enumToInt(Feature.armv5te)] = .{ .llvm_name = "armv5te", .description = "ARMv5te architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.armv5tej)] = .{ .llvm_name = "armv5tej", .description = "ARMv5tej architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.armv6)] = .{ .llvm_name = "armv6", .description = "ARMv6 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dsp, .v6, }), @@ -356,7 +356,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv6_m)] = .{ .llvm_name = "armv6-m", .description = "ARMv6m architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .db, .mclass, .noarm, @@ -368,21 +368,21 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv6j)] = .{ .llvm_name = "armv6j", .description = "ARMv7a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv6, }), }; result[@enumToInt(Feature.armv6k)] = .{ .llvm_name = "armv6k", .description = "ARMv6k architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v6k, }), }; result[@enumToInt(Feature.armv6kz)] = .{ .llvm_name = "armv6kz", .description = "ARMv6kz architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .trustzone, .v6k, }), @@ -390,7 +390,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv6s_m)] = .{ .llvm_name = "armv6s-m", .description = "ARMv6sm architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .db, .mclass, .noarm, @@ -402,7 +402,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv6t2)] = .{ .llvm_name = "armv6t2", .description = "ARMv6t2 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dsp, .v6t2, }), @@ -410,7 +410,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv7_a)] = .{ .llvm_name = "armv7-a", .description = "ARMv7a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .db, .dsp, @@ -421,7 +421,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv7_m)] = .{ .llvm_name = "armv7-m", .description = "ARMv7m architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .db, .hwdiv, .mclass, @@ -434,7 +434,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv7_r)] = .{ .llvm_name = "armv7-r", .description = "ARMv7r architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .db, .dsp, .hwdiv, @@ -445,7 +445,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv7e_m)] = .{ .llvm_name = "armv7e-m", .description = "ARMv7em architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .db, .dsp, .hwdiv, @@ -459,21 +459,21 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv7k)] = .{ .llvm_name = "armv7k", .description = "ARMv7a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv7_a, }), }; result[@enumToInt(Feature.armv7s)] = .{ .llvm_name = "armv7s", .description = "ARMv7a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv7_a, }), }; result[@enumToInt(Feature.armv7ve)] = .{ .llvm_name = "armv7ve", .description = "ARMv7ve architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .db, .dsp, @@ -487,7 +487,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_a)] = .{ .llvm_name = "armv8-a", .description = "ARMv8a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -504,7 +504,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_m_base)] = .{ .llvm_name = "armv8-m.base", .description = "ARMv8mBaseline architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -520,7 +520,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_m_main)] = .{ .llvm_name = "armv8-m.main", .description = "ARMv8mMainline architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -534,7 +534,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_r)] = .{ .llvm_name = "armv8-r", .description = "ARMv8r architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .db, .dfb, @@ -550,7 +550,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_1_a)] = .{ .llvm_name = "armv8.1-a", .description = "ARMv81a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -567,7 +567,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_1_m_main)] = .{ .llvm_name = "armv8.1-m.main", .description = "ARMv81mMainline architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"8msecext", .acquire_release, .db, @@ -583,7 +583,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_2_a)] = .{ .llvm_name = "armv8.2-a", .description = "ARMv82a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -601,7 +601,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_3_a)] = .{ .llvm_name = "armv8.3-a", .description = "ARMv83a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -619,7 +619,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_4_a)] = .{ .llvm_name = "armv8.4-a", .description = "ARMv84a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -638,7 +638,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.armv8_5_a)] = .{ .llvm_name = "armv8.5-a", .description = "ARMv85a architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aclass, .crc, .crypto, @@ -657,27 +657,27 @@ pub const all_features = blk: { result[@enumToInt(Feature.avoid_movs_shop)] = .{ .llvm_name = "avoid-movs-shop", .description = "Avoid movs instructions with shifter operand", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avoid_partial_cpsr)] = .{ .llvm_name = "avoid-partial-cpsr", .description = "Avoid CPSR partial update for OOO execution", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{ .llvm_name = "cheap-predicable-cpsr", .description = "Disable +1 predication cost for instructions updating CPSR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crc)] = .{ .llvm_name = "crc", .description = "Enable support for CRC instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .llvm_name = "crypto", .description = "Enable support for Cryptography extensions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aes, .neon, .sha2, @@ -686,54 +686,54 @@ pub const all_features = blk: { result[@enumToInt(Feature.d32)] = .{ .llvm_name = "d32", .description = "Extend FP to 32 double registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.db)] = .{ .llvm_name = "db", .description = "Has data barrier (dmb/dsb) instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfb)] = .{ .llvm_name = "dfb", .description = "Has full data barrier (dfb) instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.disable_postra_scheduler)] = .{ .llvm_name = "disable-postra-scheduler", .description = "Don't schedule again after register allocation", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dont_widen_vmovs)] = .{ .llvm_name = "dont-widen-vmovs", .description = "Don't widen VMOVS to VMOVD", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dotprod)] = .{ .llvm_name = "dotprod", .description = "Enable support for dot product instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.dsp)] = .{ .llvm_name = "dsp", .description = "Supports DSP instructions in ARM and/or Thumb2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execute_only)] = .{ .llvm_name = "execute-only", .description = "Enable the generation of execute only code.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.expand_fp_mlx)] = .{ .llvm_name = "expand-fp-mlx", .description = "Expand VFP/NEON MLA/MLS instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exynos)] = .{ .llvm_name = "exynos", .description = "Samsung Exynos processors", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .crc, .crypto, .expand_fp_mlx, @@ -756,7 +756,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.fp_armv8)] = .{ .llvm_name = "fp-armv8", .description = "Enable ARMv8 FP", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8d16, .fp_armv8sp, .vfp4, @@ -765,7 +765,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.fp_armv8d16)] = .{ .llvm_name = "fp-armv8d16", .description = "Enable ARMv8 FP with only 16 d-registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8d16sp, .fp64, .vfp4d16, @@ -774,14 +774,14 @@ pub const all_features = blk: { result[@enumToInt(Feature.fp_armv8d16sp)] = .{ .llvm_name = "fp-armv8d16sp", .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp4d16sp, }), }; result[@enumToInt(Feature.fp_armv8sp)] = .{ .llvm_name = "fp-armv8sp", .description = "Enable ARMv8 FP with no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .d32, .fp_armv8d16sp, .vfp4sp, @@ -790,50 +790,50 @@ pub const all_features = blk: { result[@enumToInt(Feature.fp16)] = .{ .llvm_name = "fp16", .description = "Enable half-precision floating point", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp16fml)] = .{ .llvm_name = "fp16fml", .description = "Enable full half-precision floating point fml instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fullfp16, }), }; result[@enumToInt(Feature.fp64)] = .{ .llvm_name = "fp64", .description = "Floating point unit supports double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpregs64, }), }; result[@enumToInt(Feature.fpao)] = .{ .llvm_name = "fpao", .description = "Enable fast computation of positive address offsets", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs)] = .{ .llvm_name = "fpregs", .description = "Enable FP registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpregs16)] = .{ .llvm_name = "fpregs16", .description = "Enable 16-bit FP registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.fpregs64)] = .{ .llvm_name = "fpregs64", .description = "Enable 64-bit FP registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.fullfp16)] = .{ .llvm_name = "fullfp16", .description = "Enable full half-precision floating point", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8d16sp, .fpregs16, }), @@ -841,86 +841,86 @@ pub const all_features = blk: { result[@enumToInt(Feature.fuse_aes)] = .{ .llvm_name = "fuse-aes", .description = "CPU fuses AES crypto operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fuse_literals)] = .{ .llvm_name = "fuse-literals", .description = "CPU fuses literal generation operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv)] = .{ .llvm_name = "hwdiv", .description = "Enable divide instructions in Thumb", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwdiv_arm)] = .{ .llvm_name = "hwdiv-arm", .description = "Enable divide instructions in ARM mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.iwmmxt)] = .{ .llvm_name = "iwmmxt", .description = "ARMv5te architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.iwmmxt2)] = .{ .llvm_name = "iwmmxt2", .description = "ARMv5te architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.krait)] = .{ .llvm_name = "krait", .description = "Qualcomm Krait processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.kryo)] = .{ .llvm_name = "kryo", .description = "Qualcomm Kryo processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lob)] = .{ .llvm_name = "lob", .description = "Enable Low Overhead Branch extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ .llvm_name = "long-calls", .description = "Generate calls via indirect call instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.loop_align)] = .{ .llvm_name = "loop-align", .description = "Prefer 32-bit alignment for loops", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m3)] = .{ .llvm_name = "m3", .description = "Cortex-M3 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mclass)] = .{ .llvm_name = "mclass", .description = "Is microcontroller profile ('M' series)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mp)] = .{ .llvm_name = "mp", .description = "Supports Multiprocessing extension", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.muxed_units)] = .{ .llvm_name = "muxed-units", .description = "Has muxed AGU and NEON/FPU", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mve)] = .{ .llvm_name = "mve", .description = "Support M-Class Vector Extension with integer ops", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dsp, .fpregs16, .fpregs64, @@ -930,7 +930,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mve_fp)] = .{ .llvm_name = "mve.fp", .description = "Support M-Class Vector Extension with integer and floating ops", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp_armv8d16sp, .fullfp16, .mve, @@ -939,248 +939,248 @@ pub const all_features = blk: { result[@enumToInt(Feature.nacl_trap)] = .{ .llvm_name = "nacl-trap", .description = "NaCl trap", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neon)] = .{ .llvm_name = "neon", .description = "Enable NEON instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp3, }), }; result[@enumToInt(Feature.neon_fpmovs)] = .{ .llvm_name = "neon-fpmovs", .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.neonfp)] = .{ .llvm_name = "neonfp", .description = "Use NEON for single precision FP", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_branch_predictor)] = .{ .llvm_name = "no-branch-predictor", .description = "Has no branch predictor", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_movt)] = .{ .llvm_name = "no-movt", .description = "Don't use movt/movw pairs for 32-bit imms", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_neg_immediates)] = .{ .llvm_name = "no-neg-immediates", .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noarm)] = .{ .llvm_name = "noarm", .description = "Does not support ARM mode execution", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nonpipelined_vfp)] = .{ .llvm_name = "nonpipelined-vfp", .description = "VFP instructions are not pipelined", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.perfmon)] = .{ .llvm_name = "perfmon", .description = "Enable support for Performance Monitor extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_ishst)] = .{ .llvm_name = "prefer-ishst", .description = "Prefer ISHST barriers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_vmovsr)] = .{ .llvm_name = "prefer-vmovsr", .description = "Prefer VMOVSR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prof_unpr)] = .{ .llvm_name = "prof-unpr", .description = "Is profitable to unpredicate", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r4)] = .{ .llvm_name = "r4", .description = "Cortex-R4 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r5)] = .{ .llvm_name = "r5", .description = "Cortex-R5 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r52)] = .{ .llvm_name = "r52", .description = "Cortex-R52 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.r7)] = .{ .llvm_name = "r7", .description = "Cortex-R7 ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ras)] = .{ .llvm_name = "ras", .description = "Enable Reliability, Availability and Serviceability extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rclass)] = .{ .llvm_name = "rclass", .description = "Is realtime profile ('R' series)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.read_tp_hard)] = .{ .llvm_name = "read-tp-hard", .description = "Reading thread pointer from register", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserve_r9)] = .{ .llvm_name = "reserve-r9", .description = "Reserve R9, making it unavailable as GPR", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ret_addr_stack)] = .{ .llvm_name = "ret-addr-stack", .description = "Has return address stack", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sb)] = .{ .llvm_name = "sb", .description = "Enable v8.5a Speculation Barrier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha2)] = .{ .llvm_name = "sha2", .description = "Enable SHA1 and SHA256 support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .neon, }), }; result[@enumToInt(Feature.slow_fp_brcc)] = .{ .llvm_name = "slow-fp-brcc", .description = "FP compare + branch is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_load_D_subreg)] = .{ .llvm_name = "slow-load-D-subreg", .description = "Loading into D subregs is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_odd_reg)] = .{ .llvm_name = "slow-odd-reg", .description = "VLDM/VSTM starting with an odd register is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vdup32)] = .{ .llvm_name = "slow-vdup32", .description = "Has slow VDUP32 - prefer VMOV", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_vgetlni32)] = .{ .llvm_name = "slow-vgetlni32", .description = "Has slow VGETLNi32 - prefer VMOV", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slowfpvmlx)] = .{ .llvm_name = "slowfpvmlx", .description = "Disable VFP / NEON MAC instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .llvm_name = "soft-float", .description = "Use software floating point features.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.splat_vfp_neon)] = .{ .llvm_name = "splat-vfp-neon", .description = "Splat register from VFP to NEON", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dont_widen_vmovs, }), }; result[@enumToInt(Feature.strict_align)] = .{ .llvm_name = "strict-align", .description = "Disallow all unaligned memory access", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.swift)] = .{ .llvm_name = "swift", .description = "Swift ARM processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb_mode)] = .{ .llvm_name = "thumb-mode", .description = "Thumb mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.thumb2)] = .{ .llvm_name = "thumb2", .description = "Enable Thumb2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.trustzone)] = .{ .llvm_name = "trustzone", .description = "Enable support for TrustZone security extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_aa)] = .{ .llvm_name = "use-aa", .description = "Use alias analysis during codegen", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_misched)] = .{ .llvm_name = "use-misched", .description = "Use the MachineScheduler", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v4t)] = .{ .llvm_name = "v4t", .description = "Support ARM v4T instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5t)] = .{ .llvm_name = "v5t", .description = "Support ARM v5T instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v4t, }), }; result[@enumToInt(Feature.v5te)] = .{ .llvm_name = "v5te", .description = "Support ARM v5TE, v5TEj, and v5TExp instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v5t, }), }; result[@enumToInt(Feature.v6)] = .{ .llvm_name = "v6", .description = "Support ARM v6 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v5te, }), }; result[@enumToInt(Feature.v6k)] = .{ .llvm_name = "v6k", .description = "Support ARM v6k instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v6, }), }; result[@enumToInt(Feature.v6m)] = .{ .llvm_name = "v6m", .description = "Support ARM v6M instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v6, }), }; result[@enumToInt(Feature.v6t2)] = .{ .llvm_name = "v6t2", .description = "Support ARM v6t2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .thumb2, .v6k, .v8m, @@ -1189,7 +1189,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v7)] = .{ .llvm_name = "v7", .description = "Support ARM v7 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .perfmon, .v6t2, .v7clrex, @@ -1198,12 +1198,12 @@ pub const all_features = blk: { result[@enumToInt(Feature.v7clrex)] = .{ .llvm_name = "v7clrex", .description = "Has v7 clrex instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v8)] = .{ .llvm_name = "v8", .description = "Support ARM v8 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .acquire_release, .v7, }), @@ -1211,35 +1211,35 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_1a)] = .{ .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v8, }), }; result[@enumToInt(Feature.v8_1m_main)] = .{ .llvm_name = "v8.1m.main", .description = "Support ARM v8-1M Mainline instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v8m_main, }), }; result[@enumToInt(Feature.v8_2a)] = .{ .llvm_name = "v8.2a", .description = "Support ARM v8.2a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v8_1a, }), }; result[@enumToInt(Feature.v8_3a)] = .{ .llvm_name = "v8.3a", .description = "Support ARM v8.3a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v8_2a, }), }; result[@enumToInt(Feature.v8_4a)] = .{ .llvm_name = "v8.4a", .description = "Support ARM v8.4a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dotprod, .v8_3a, }), @@ -1247,7 +1247,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8_5a)] = .{ .llvm_name = "v8.5a", .description = "Support ARM v8.5a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sb, .v8_4a, }), @@ -1255,21 +1255,21 @@ pub const all_features = blk: { result[@enumToInt(Feature.v8m)] = .{ .llvm_name = "v8m", .description = "Support ARM v8M Baseline instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v6m, }), }; result[@enumToInt(Feature.v8m_main)] = .{ .llvm_name = "v8m.main", .description = "Support ARM v8M Mainline instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .v7, }), }; result[@enumToInt(Feature.vfp2)] = .{ .llvm_name = "vfp2", .description = "Enable VFP2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp2d16, .vfp2sp, }), @@ -1277,7 +1277,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp2d16)] = .{ .llvm_name = "vfp2d16", .description = "Enable VFP2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, .vfp2d16sp, }), @@ -1285,21 +1285,21 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp2d16sp)] = .{ .llvm_name = "vfp2d16sp", .description = "Enable VFP2 instructions with no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpregs, }), }; result[@enumToInt(Feature.vfp2sp)] = .{ .llvm_name = "vfp2sp", .description = "Enable VFP2 instructions with no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp2d16sp, }), }; result[@enumToInt(Feature.vfp3)] = .{ .llvm_name = "vfp3", .description = "Enable VFP3 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp3d16, .vfp3sp, }), @@ -1307,7 +1307,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp3d16)] = .{ .llvm_name = "vfp3d16", .description = "Enable VFP3 instructions with only 16 d-registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, .vfp2, .vfp3d16sp, @@ -1316,14 +1316,14 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp3d16sp)] = .{ .llvm_name = "vfp3d16sp", .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vfp2sp, }), }; result[@enumToInt(Feature.vfp3sp)] = .{ .llvm_name = "vfp3sp", .description = "Enable VFP3 instructions with no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .d32, .vfp3d16sp, }), @@ -1331,7 +1331,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp4)] = .{ .llvm_name = "vfp4", .description = "Enable VFP4 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp16, .vfp3, .vfp4d16, @@ -1341,7 +1341,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp4d16)] = .{ .llvm_name = "vfp4d16", .description = "Enable VFP4 instructions with only 16 d-registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp16, .fp64, .vfp3d16, @@ -1351,7 +1351,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp4d16sp)] = .{ .llvm_name = "vfp4d16sp", .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp16, .vfp3d16sp, }), @@ -1359,7 +1359,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vfp4sp)] = .{ .llvm_name = "vfp4sp", .description = "Enable VFP4 instructions with no double precision", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .d32, .fp16, .vfp3sp, @@ -1369,7 +1369,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.virtualization)] = .{ .llvm_name = "virtualization", .description = "Supports Virtualization extension", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hwdiv, .hwdiv_arm, }), @@ -1377,40 +1377,39 @@ pub const all_features = blk: { result[@enumToInt(Feature.vldn_align)] = .{ .llvm_name = "vldn-align", .description = "Check for VLDn unaligned access", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_forwarding)] = .{ .llvm_name = "vmlx-forwarding", .description = "Has multiplier accumulator forwarding", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vmlx_hazards)] = .{ .llvm_name = "vmlx-hazards", .description = "Has VMLx hazards", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wide_stride_vfp)] = .{ .llvm_name = "wide-stride-vfp", .description = "Use a wide stride when allocating VFP registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xscale)] = .{ .llvm_name = "xscale", .description = "ARMv5te architecture", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .armv5te, }), }; result[@enumToInt(Feature.zcz)] = .{ .llvm_name = "zcz", .description = "Has zero-cycle zeroing instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -1419,49 +1418,49 @@ pub const cpu = struct { pub const arm1020e = Cpu{ .name = "arm1020e", .llvm_name = "arm1020e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm1020t = Cpu{ .name = "arm1020t", .llvm_name = "arm1020t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5t, }), }; pub const arm1022e = Cpu{ .name = "arm1022e", .llvm_name = "arm1022e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm10e = Cpu{ .name = "arm10e", .llvm_name = "arm10e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm10tdmi = Cpu{ .name = "arm10tdmi", .llvm_name = "arm10tdmi", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5t, }), }; pub const arm1136j_s = Cpu{ .name = "arm1136j_s", .llvm_name = "arm1136j-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6, }), }; pub const arm1136jf_s = Cpu{ .name = "arm1136jf_s", .llvm_name = "arm1136jf-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6, .slowfpvmlx, .vfp2, @@ -1470,14 +1469,14 @@ pub const cpu = struct { pub const arm1156t2_s = Cpu{ .name = "arm1156t2_s", .llvm_name = "arm1156t2-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6t2, }), }; pub const arm1156t2f_s = Cpu{ .name = "arm1156t2f_s", .llvm_name = "arm1156t2f-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6t2, .slowfpvmlx, .vfp2, @@ -1486,21 +1485,21 @@ pub const cpu = struct { pub const arm1176j_s = Cpu{ .name = "arm1176j_s", .llvm_name = "arm1176j-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6kz, }), }; pub const arm1176jz_s = Cpu{ .name = "arm1176jz_s", .llvm_name = "arm1176jz-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6kz, }), }; pub const arm1176jzf_s = Cpu{ .name = "arm1176jzf_s", .llvm_name = "arm1176jzf-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6kz, .slowfpvmlx, .vfp2, @@ -1509,126 +1508,126 @@ pub const cpu = struct { pub const arm710t = Cpu{ .name = "arm710t", .llvm_name = "arm710t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm720t = Cpu{ .name = "arm720t", .llvm_name = "arm720t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm7tdmi = Cpu{ .name = "arm7tdmi", .llvm_name = "arm7tdmi", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm7tdmi_s = Cpu{ .name = "arm7tdmi_s", .llvm_name = "arm7tdmi-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm8 = Cpu{ .name = "arm8", .llvm_name = "arm8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const arm810 = Cpu{ .name = "arm810", .llvm_name = "arm810", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const arm9 = Cpu{ .name = "arm9", .llvm_name = "arm9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm920 = Cpu{ .name = "arm920", .llvm_name = "arm920", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm920t = Cpu{ .name = "arm920t", .llvm_name = "arm920t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm922t = Cpu{ .name = "arm922t", .llvm_name = "arm922t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm926ej_s = Cpu{ .name = "arm926ej_s", .llvm_name = "arm926ej-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm940t = Cpu{ .name = "arm940t", .llvm_name = "arm940t", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const arm946e_s = Cpu{ .name = "arm946e_s", .llvm_name = "arm946e-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm966e_s = Cpu{ .name = "arm966e_s", .llvm_name = "arm966e-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm968e_s = Cpu{ .name = "arm968e_s", .llvm_name = "arm968e-s", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm9e = Cpu{ .name = "arm9e", .llvm_name = "arm9e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const arm9tdmi = Cpu{ .name = "arm9tdmi", .llvm_name = "arm9tdmi", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const cortex_a12 = Cpu{ .name = "cortex_a12", .llvm_name = "cortex-a12", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a12, .armv7_a, .avoid_partial_cpsr, @@ -1643,7 +1642,7 @@ pub const cpu = struct { pub const cortex_a15 = Cpu{ .name = "cortex_a15", .llvm_name = "cortex-a15", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a15, .armv7_a, .avoid_partial_cpsr, @@ -1661,7 +1660,7 @@ pub const cpu = struct { pub const cortex_a17 = Cpu{ .name = "cortex_a17", .llvm_name = "cortex-a17", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a17, .armv7_a, .avoid_partial_cpsr, @@ -1676,7 +1675,7 @@ pub const cpu = struct { pub const cortex_a32 = Cpu{ .name = "cortex_a32", .llvm_name = "cortex-a32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .crc, .crypto, @@ -1687,7 +1686,7 @@ pub const cpu = struct { pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a35, .armv8_a, .crc, @@ -1699,7 +1698,7 @@ pub const cpu = struct { pub const cortex_a5 = Cpu{ .name = "cortex_a5", .llvm_name = "cortex-a5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a5, .armv7_a, .mp, @@ -1714,7 +1713,7 @@ pub const cpu = struct { pub const cortex_a53 = Cpu{ .name = "cortex_a53", .llvm_name = "cortex-a53", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a53, .armv8_a, .crc, @@ -1727,7 +1726,7 @@ pub const cpu = struct { pub const cortex_a55 = Cpu{ .name = "cortex_a55", .llvm_name = "cortex-a55", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a55, .armv8_2_a, .dotprod, @@ -1738,7 +1737,7 @@ pub const cpu = struct { pub const cortex_a57 = Cpu{ .name = "cortex_a57", .llvm_name = "cortex-a57", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a57, .armv8_a, .avoid_partial_cpsr, @@ -1753,7 +1752,7 @@ pub const cpu = struct { pub const cortex_a7 = Cpu{ .name = "cortex_a7", .llvm_name = "cortex-a7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a7, .armv7_a, .mp, @@ -1770,7 +1769,7 @@ pub const cpu = struct { pub const cortex_a72 = Cpu{ .name = "cortex_a72", .llvm_name = "cortex-a72", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a72, .armv8_a, .crc, @@ -1782,7 +1781,7 @@ pub const cpu = struct { pub const cortex_a73 = Cpu{ .name = "cortex_a73", .llvm_name = "cortex-a73", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a73, .armv8_a, .crc, @@ -1794,7 +1793,7 @@ pub const cpu = struct { pub const cortex_a75 = Cpu{ .name = "cortex_a75", .llvm_name = "cortex-a75", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a75, .armv8_2_a, .dotprod, @@ -1805,7 +1804,7 @@ pub const cpu = struct { pub const cortex_a76 = Cpu{ .name = "cortex_a76", .llvm_name = "cortex-a76", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a76, .armv8_2_a, .crc, @@ -1819,7 +1818,7 @@ pub const cpu = struct { pub const cortex_a76ae = Cpu{ .name = "cortex_a76ae", .llvm_name = "cortex-a76ae", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a76, .armv8_2_a, .crc, @@ -1833,7 +1832,7 @@ pub const cpu = struct { pub const cortex_a8 = Cpu{ .name = "cortex_a8", .llvm_name = "cortex-a8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a8, .armv7_a, .nonpipelined_vfp, @@ -1848,7 +1847,7 @@ pub const cpu = struct { pub const cortex_a9 = Cpu{ .name = "cortex_a9", .llvm_name = "cortex-a9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .a9, .armv7_a, .avoid_partial_cpsr, @@ -1868,28 +1867,28 @@ pub const cpu = struct { pub const cortex_m0 = Cpu{ .name = "cortex_m0", .llvm_name = "cortex-m0", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6_m, }), }; pub const cortex_m0plus = Cpu{ .name = "cortex_m0plus", .llvm_name = "cortex-m0plus", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6_m, }), }; pub const cortex_m1 = Cpu{ .name = "cortex_m1", .llvm_name = "cortex-m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6_m, }), }; pub const cortex_m23 = Cpu{ .name = "cortex_m23", .llvm_name = "cortex-m23", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_m_base, .no_movt, }), @@ -1897,7 +1896,7 @@ pub const cpu = struct { pub const cortex_m3 = Cpu{ .name = "cortex_m3", .llvm_name = "cortex-m3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_m, .loop_align, .m3, @@ -1909,7 +1908,7 @@ pub const cpu = struct { pub const cortex_m33 = Cpu{ .name = "cortex_m33", .llvm_name = "cortex-m33", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_m_main, .dsp, .fp_armv8d16sp, @@ -1923,7 +1922,7 @@ pub const cpu = struct { pub const cortex_m35p = Cpu{ .name = "cortex_m35p", .llvm_name = "cortex-m35p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_m_main, .dsp, .fp_armv8d16sp, @@ -1937,7 +1936,7 @@ pub const cpu = struct { pub const cortex_m4 = Cpu{ .name = "cortex_m4", .llvm_name = "cortex-m4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7e_m, .loop_align, .no_branch_predictor, @@ -1950,7 +1949,7 @@ pub const cpu = struct { pub const cortex_m7 = Cpu{ .name = "cortex_m7", .llvm_name = "cortex-m7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7e_m, .fp_armv8d16, }), @@ -1958,7 +1957,7 @@ pub const cpu = struct { pub const cortex_r4 = Cpu{ .name = "cortex_r4", .llvm_name = "cortex-r4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .r4, @@ -1968,7 +1967,7 @@ pub const cpu = struct { pub const cortex_r4f = Cpu{ .name = "cortex_r4f", .llvm_name = "cortex-r4f", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .r4, @@ -1981,7 +1980,7 @@ pub const cpu = struct { pub const cortex_r5 = Cpu{ .name = "cortex_r5", .llvm_name = "cortex-r5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .hwdiv_arm, @@ -1995,7 +1994,7 @@ pub const cpu = struct { pub const cortex_r52 = Cpu{ .name = "cortex_r52", .llvm_name = "cortex-r52", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_r, .fpao, .r52, @@ -2006,7 +2005,7 @@ pub const cpu = struct { pub const cortex_r7 = Cpu{ .name = "cortex_r7", .llvm_name = "cortex-r7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .fp16, @@ -2022,7 +2021,7 @@ pub const cpu = struct { pub const cortex_r8 = Cpu{ .name = "cortex_r8", .llvm_name = "cortex-r8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_r, .avoid_partial_cpsr, .fp16, @@ -2037,7 +2036,7 @@ pub const cpu = struct { pub const cyclone = Cpu{ .name = "cyclone", .llvm_name = "cyclone", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .avoid_movs_shop, .avoid_partial_cpsr, @@ -2058,14 +2057,14 @@ pub const cpu = struct { pub const ep9312 = Cpu{ .name = "ep9312", .llvm_name = "ep9312", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4t, }), }; pub const exynos_m1 = Cpu{ .name = "exynos_m1", .llvm_name = "exynos-m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .exynos, }), @@ -2073,7 +2072,7 @@ pub const cpu = struct { pub const exynos_m2 = Cpu{ .name = "exynos_m2", .llvm_name = "exynos-m2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .exynos, }), @@ -2081,7 +2080,7 @@ pub const cpu = struct { pub const exynos_m3 = Cpu{ .name = "exynos_m3", .llvm_name = "exynos-m3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .exynos, }), @@ -2089,7 +2088,7 @@ pub const cpu = struct { pub const exynos_m4 = Cpu{ .name = "exynos_m4", .llvm_name = "exynos-m4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_2_a, .dotprod, .exynos, @@ -2099,7 +2098,7 @@ pub const cpu = struct { pub const exynos_m5 = Cpu{ .name = "exynos_m5", .llvm_name = "exynos-m5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_2_a, .dotprod, .exynos, @@ -2109,19 +2108,19 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const iwmmxt = Cpu{ .name = "iwmmxt", .llvm_name = "iwmmxt", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; pub const krait = Cpu{ .name = "krait", .llvm_name = "krait", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_a, .avoid_partial_cpsr, .fp16, @@ -2138,7 +2137,7 @@ pub const cpu = struct { pub const kryo = Cpu{ .name = "kryo", .llvm_name = "kryo", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv8_a, .crc, .crypto, @@ -2150,7 +2149,7 @@ pub const cpu = struct { pub const mpcore = Cpu{ .name = "mpcore", .llvm_name = "mpcore", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6k, .slowfpvmlx, .vfp2, @@ -2159,21 +2158,21 @@ pub const cpu = struct { pub const mpcorenovfp = Cpu{ .name = "mpcorenovfp", .llvm_name = "mpcorenovfp", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6k, }), }; pub const sc000 = Cpu{ .name = "sc000", .llvm_name = "sc000", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv6_m, }), }; pub const sc300 = Cpu{ .name = "sc300", .llvm_name = "sc300", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_m, .m3, .no_branch_predictor, @@ -2184,35 +2183,35 @@ pub const cpu = struct { pub const strongarm = Cpu{ .name = "strongarm", .llvm_name = "strongarm", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const strongarm110 = Cpu{ .name = "strongarm110", .llvm_name = "strongarm110", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const strongarm1100 = Cpu{ .name = "strongarm1100", .llvm_name = "strongarm1100", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const strongarm1110 = Cpu{ .name = "strongarm1110", .llvm_name = "strongarm1110", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv4, }), }; pub const swift = Cpu{ .name = "swift", .llvm_name = "swift", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv7_a, .avoid_movs_shop, .avoid_partial_cpsr, @@ -2239,7 +2238,7 @@ pub const cpu = struct { pub const xscale = Cpu{ .name = "xscale", .llvm_name = "xscale", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .armv5te, }), }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 687a8122fee8fe26abeb5476406506b8bd60d475..8eb6df98f301e7e93d74037500113adf8bc56c67 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -46,17 +46,17 @@ pub const all_features = blk: { result[@enumToInt(Feature.addsubiw)] = .{ .llvm_name = "addsubiw", .description = "Enable 16-bit register-immediate addition and subtraction instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr0)] = .{ .llvm_name = "avr0", .description = "The device is a part of the avr0 family", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.avr1)] = .{ .llvm_name = "avr1", .description = "The device is a part of the avr1 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr0, .lpm, }), @@ -64,7 +64,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr2)] = .{ .llvm_name = "avr2", .description = "The device is a part of the avr2 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .addsubiw, .avr1, .ijmpcall, @@ -74,7 +74,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr25)] = .{ .llvm_name = "avr25", .description = "The device is a part of the avr25 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr2, .@"break", .lpmx, @@ -85,7 +85,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr3)] = .{ .llvm_name = "avr3", .description = "The device is a part of the avr3 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr2, .jmpcall, }), @@ -93,7 +93,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr31)] = .{ .llvm_name = "avr31", .description = "The device is a part of the avr31 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr3, .elpm, }), @@ -101,7 +101,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr35)] = .{ .llvm_name = "avr35", .description = "The device is a part of the avr35 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr3, .@"break", .lpmx, @@ -112,7 +112,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr4)] = .{ .llvm_name = "avr4", .description = "The device is a part of the avr4 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr2, .@"break", .lpmx, @@ -124,7 +124,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr5)] = .{ .llvm_name = "avr5", .description = "The device is a part of the avr5 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr3, .@"break", .lpmx, @@ -136,7 +136,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr51)] = .{ .llvm_name = "avr51", .description = "The device is a part of the avr51 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr5, .elpm, .elpmx, @@ -145,14 +145,14 @@ pub const all_features = blk: { result[@enumToInt(Feature.avr6)] = .{ .llvm_name = "avr6", .description = "The device is a part of the avr6 family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr51, }), }; result[@enumToInt(Feature.avrtiny)] = .{ .llvm_name = "avrtiny", .description = "The device is a part of the avrtiny family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr0, .@"break", .sram, @@ -162,72 +162,72 @@ pub const all_features = blk: { result[@enumToInt(Feature.@"break")] = .{ .llvm_name = "break", .description = "The device supports the `BREAK` debugging instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.des)] = .{ .llvm_name = "des", .description = "The device supports the `DES k` encryption instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.eijmpcall)] = .{ .llvm_name = "eijmpcall", .description = "The device supports the `EIJMP`/`EICALL` instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpm)] = .{ .llvm_name = "elpm", .description = "The device supports the ELPM instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.elpmx)] = .{ .llvm_name = "elpmx", .description = "The device supports the `ELPM Rd, Z[+]` instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ijmpcall)] = .{ .llvm_name = "ijmpcall", .description = "The device supports `IJMP`/`ICALL`instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.jmpcall)] = .{ .llvm_name = "jmpcall", .description = "The device supports the `JMP` and `CALL` instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpm)] = .{ .llvm_name = "lpm", .description = "The device supports the `LPM` instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lpmx)] = .{ .llvm_name = "lpmx", .description = "The device supports the `LPM Rd, Z[+]` instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movw)] = .{ .llvm_name = "movw", .description = "The device supports the 16-bit MOVW instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mul)] = .{ .llvm_name = "mul", .description = "The device supports the multiplication instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rmw)] = .{ .llvm_name = "rmw", .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.smallstack)] = .{ .llvm_name = "smallstack", .description = "The device has an 8-bit stack pointer", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.special)] = .{ .llvm_name = "special", .description = "Enable use of the entire instruction set - used for debugging", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .addsubiw, .@"break", .des, @@ -249,27 +249,27 @@ pub const all_features = blk: { result[@enumToInt(Feature.spm)] = .{ .llvm_name = "spm", .description = "The device supports the `SPM` instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spmx)] = .{ .llvm_name = "spmx", .description = "The device supports the `SPM Z+` instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sram)] = .{ .llvm_name = "sram", .description = "The device has random access memory", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tinyencoding)] = .{ .llvm_name = "tinyencoding", .description = "The device has Tiny core specific instruction encodings", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xmega)] = .{ .llvm_name = "xmega", .description = "The device is a part of the xmega family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avr51, .des, .eijmpcall, @@ -279,7 +279,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.xmegau)] = .{ .llvm_name = "xmegau", .description = "The device is a part of the xmegau family", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .rmw, .xmega, }), @@ -288,7 +288,6 @@ pub const all_features = blk: { for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -297,28 +296,28 @@ pub const cpu = struct { pub const at43usb320 = Cpu{ .name = "at43usb320", .llvm_name = "at43usb320", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr31, }), }; pub const at43usb355 = Cpu{ .name = "at43usb355", .llvm_name = "at43usb355", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, }), }; pub const at76c711 = Cpu{ .name = "at76c711", .llvm_name = "at76c711", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, }), }; pub const at86rf401 = Cpu{ .name = "at86rf401", .llvm_name = "at86rf401", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, .lpmx, .movw, @@ -327,217 +326,217 @@ pub const cpu = struct { pub const at90c8534 = Cpu{ .name = "at90c8534", .llvm_name = "at90c8534", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90can128 = Cpu{ .name = "at90can128", .llvm_name = "at90can128", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const at90can32 = Cpu{ .name = "at90can32", .llvm_name = "at90can32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90can64 = Cpu{ .name = "at90can64", .llvm_name = "at90can64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90pwm1 = Cpu{ .name = "at90pwm1", .llvm_name = "at90pwm1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90pwm161 = Cpu{ .name = "at90pwm161", .llvm_name = "at90pwm161", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90pwm2 = Cpu{ .name = "at90pwm2", .llvm_name = "at90pwm2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90pwm216 = Cpu{ .name = "at90pwm216", .llvm_name = "at90pwm216", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90pwm2b = Cpu{ .name = "at90pwm2b", .llvm_name = "at90pwm2b", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90pwm3 = Cpu{ .name = "at90pwm3", .llvm_name = "at90pwm3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90pwm316 = Cpu{ .name = "at90pwm316", .llvm_name = "at90pwm316", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90pwm3b = Cpu{ .name = "at90pwm3b", .llvm_name = "at90pwm3b", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90pwm81 = Cpu{ .name = "at90pwm81", .llvm_name = "at90pwm81", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const at90s1200 = Cpu{ .name = "at90s1200", .llvm_name = "at90s1200", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr0, }), }; pub const at90s2313 = Cpu{ .name = "at90s2313", .llvm_name = "at90s2313", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s2323 = Cpu{ .name = "at90s2323", .llvm_name = "at90s2323", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s2333 = Cpu{ .name = "at90s2333", .llvm_name = "at90s2333", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s2343 = Cpu{ .name = "at90s2343", .llvm_name = "at90s2343", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s4414 = Cpu{ .name = "at90s4414", .llvm_name = "at90s4414", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s4433 = Cpu{ .name = "at90s4433", .llvm_name = "at90s4433", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s4434 = Cpu{ .name = "at90s4434", .llvm_name = "at90s4434", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s8515 = Cpu{ .name = "at90s8515", .llvm_name = "at90s8515", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90s8535 = Cpu{ .name = "at90s8535", .llvm_name = "at90s8535", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const at90scr100 = Cpu{ .name = "at90scr100", .llvm_name = "at90scr100", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90usb1286 = Cpu{ .name = "at90usb1286", .llvm_name = "at90usb1286", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const at90usb1287 = Cpu{ .name = "at90usb1287", .llvm_name = "at90usb1287", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const at90usb162 = Cpu{ .name = "at90usb162", .llvm_name = "at90usb162", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const at90usb646 = Cpu{ .name = "at90usb646", .llvm_name = "at90usb646", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90usb647 = Cpu{ .name = "at90usb647", .llvm_name = "at90usb647", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const at90usb82 = Cpu{ .name = "at90usb82", .llvm_name = "at90usb82", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const at94k = Cpu{ .name = "at94k", .llvm_name = "at94k", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, .lpmx, .movw, @@ -547,133 +546,133 @@ pub const cpu = struct { pub const ata5272 = Cpu{ .name = "ata5272", .llvm_name = "ata5272", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const ata5505 = Cpu{ .name = "ata5505", .llvm_name = "ata5505", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const ata5790 = Cpu{ .name = "ata5790", .llvm_name = "ata5790", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const ata5795 = Cpu{ .name = "ata5795", .llvm_name = "ata5795", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const ata6285 = Cpu{ .name = "ata6285", .llvm_name = "ata6285", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const ata6286 = Cpu{ .name = "ata6286", .llvm_name = "ata6286", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const ata6289 = Cpu{ .name = "ata6289", .llvm_name = "ata6289", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega103 = Cpu{ .name = "atmega103", .llvm_name = "atmega103", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr31, }), }; pub const atmega128 = Cpu{ .name = "atmega128", .llvm_name = "atmega128", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega1280 = Cpu{ .name = "atmega1280", .llvm_name = "atmega1280", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega1281 = Cpu{ .name = "atmega1281", .llvm_name = "atmega1281", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega1284 = Cpu{ .name = "atmega1284", .llvm_name = "atmega1284", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega1284p = Cpu{ .name = "atmega1284p", .llvm_name = "atmega1284p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega1284rfr2 = Cpu{ .name = "atmega1284rfr2", .llvm_name = "atmega1284rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega128a = Cpu{ .name = "atmega128a", .llvm_name = "atmega128a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega128rfa1 = Cpu{ .name = "atmega128rfa1", .llvm_name = "atmega128rfa1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega128rfr2 = Cpu{ .name = "atmega128rfr2", .llvm_name = "atmega128rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const atmega16 = Cpu{ .name = "atmega16", .llvm_name = "atmega16", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega161 = Cpu{ .name = "atmega161", .llvm_name = "atmega161", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, .lpmx, .movw, @@ -684,14 +683,14 @@ pub const cpu = struct { pub const atmega162 = Cpu{ .name = "atmega162", .llvm_name = "atmega162", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega163 = Cpu{ .name = "atmega163", .llvm_name = "atmega163", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, .lpmx, .movw, @@ -702,623 +701,623 @@ pub const cpu = struct { pub const atmega164a = Cpu{ .name = "atmega164a", .llvm_name = "atmega164a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega164p = Cpu{ .name = "atmega164p", .llvm_name = "atmega164p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega164pa = Cpu{ .name = "atmega164pa", .llvm_name = "atmega164pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega165 = Cpu{ .name = "atmega165", .llvm_name = "atmega165", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega165a = Cpu{ .name = "atmega165a", .llvm_name = "atmega165a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega165p = Cpu{ .name = "atmega165p", .llvm_name = "atmega165p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega165pa = Cpu{ .name = "atmega165pa", .llvm_name = "atmega165pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega168 = Cpu{ .name = "atmega168", .llvm_name = "atmega168", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega168a = Cpu{ .name = "atmega168a", .llvm_name = "atmega168a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega168p = Cpu{ .name = "atmega168p", .llvm_name = "atmega168p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega168pa = Cpu{ .name = "atmega168pa", .llvm_name = "atmega168pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega169 = Cpu{ .name = "atmega169", .llvm_name = "atmega169", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega169a = Cpu{ .name = "atmega169a", .llvm_name = "atmega169a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega169p = Cpu{ .name = "atmega169p", .llvm_name = "atmega169p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega169pa = Cpu{ .name = "atmega169pa", .llvm_name = "atmega169pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16a = Cpu{ .name = "atmega16a", .llvm_name = "atmega16a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16hva = Cpu{ .name = "atmega16hva", .llvm_name = "atmega16hva", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16hva2 = Cpu{ .name = "atmega16hva2", .llvm_name = "atmega16hva2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16hvb = Cpu{ .name = "atmega16hvb", .llvm_name = "atmega16hvb", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16hvbrevb = Cpu{ .name = "atmega16hvbrevb", .llvm_name = "atmega16hvbrevb", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16m1 = Cpu{ .name = "atmega16m1", .llvm_name = "atmega16m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega16u2 = Cpu{ .name = "atmega16u2", .llvm_name = "atmega16u2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const atmega16u4 = Cpu{ .name = "atmega16u4", .llvm_name = "atmega16u4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega2560 = Cpu{ .name = "atmega2560", .llvm_name = "atmega2560", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr6, }), }; pub const atmega2561 = Cpu{ .name = "atmega2561", .llvm_name = "atmega2561", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr6, }), }; pub const atmega2564rfr2 = Cpu{ .name = "atmega2564rfr2", .llvm_name = "atmega2564rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr6, }), }; pub const atmega256rfr2 = Cpu{ .name = "atmega256rfr2", .llvm_name = "atmega256rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr6, }), }; pub const atmega32 = Cpu{ .name = "atmega32", .llvm_name = "atmega32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega323 = Cpu{ .name = "atmega323", .llvm_name = "atmega323", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega324a = Cpu{ .name = "atmega324a", .llvm_name = "atmega324a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega324p = Cpu{ .name = "atmega324p", .llvm_name = "atmega324p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega324pa = Cpu{ .name = "atmega324pa", .llvm_name = "atmega324pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega325 = Cpu{ .name = "atmega325", .llvm_name = "atmega325", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3250 = Cpu{ .name = "atmega3250", .llvm_name = "atmega3250", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3250a = Cpu{ .name = "atmega3250a", .llvm_name = "atmega3250a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3250p = Cpu{ .name = "atmega3250p", .llvm_name = "atmega3250p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3250pa = Cpu{ .name = "atmega3250pa", .llvm_name = "atmega3250pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega325a = Cpu{ .name = "atmega325a", .llvm_name = "atmega325a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega325p = Cpu{ .name = "atmega325p", .llvm_name = "atmega325p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega325pa = Cpu{ .name = "atmega325pa", .llvm_name = "atmega325pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega328 = Cpu{ .name = "atmega328", .llvm_name = "atmega328", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega328p = Cpu{ .name = "atmega328p", .llvm_name = "atmega328p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega329 = Cpu{ .name = "atmega329", .llvm_name = "atmega329", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3290 = Cpu{ .name = "atmega3290", .llvm_name = "atmega3290", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3290a = Cpu{ .name = "atmega3290a", .llvm_name = "atmega3290a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3290p = Cpu{ .name = "atmega3290p", .llvm_name = "atmega3290p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega3290pa = Cpu{ .name = "atmega3290pa", .llvm_name = "atmega3290pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega329a = Cpu{ .name = "atmega329a", .llvm_name = "atmega329a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega329p = Cpu{ .name = "atmega329p", .llvm_name = "atmega329p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega329pa = Cpu{ .name = "atmega329pa", .llvm_name = "atmega329pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32a = Cpu{ .name = "atmega32a", .llvm_name = "atmega32a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32c1 = Cpu{ .name = "atmega32c1", .llvm_name = "atmega32c1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32hvb = Cpu{ .name = "atmega32hvb", .llvm_name = "atmega32hvb", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32hvbrevb = Cpu{ .name = "atmega32hvbrevb", .llvm_name = "atmega32hvbrevb", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32m1 = Cpu{ .name = "atmega32m1", .llvm_name = "atmega32m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32u2 = Cpu{ .name = "atmega32u2", .llvm_name = "atmega32u2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const atmega32u4 = Cpu{ .name = "atmega32u4", .llvm_name = "atmega32u4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega32u6 = Cpu{ .name = "atmega32u6", .llvm_name = "atmega32u6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega406 = Cpu{ .name = "atmega406", .llvm_name = "atmega406", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega48 = Cpu{ .name = "atmega48", .llvm_name = "atmega48", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega48a = Cpu{ .name = "atmega48a", .llvm_name = "atmega48a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega48p = Cpu{ .name = "atmega48p", .llvm_name = "atmega48p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega48pa = Cpu{ .name = "atmega48pa", .llvm_name = "atmega48pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega64 = Cpu{ .name = "atmega64", .llvm_name = "atmega64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega640 = Cpu{ .name = "atmega640", .llvm_name = "atmega640", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega644 = Cpu{ .name = "atmega644", .llvm_name = "atmega644", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega644a = Cpu{ .name = "atmega644a", .llvm_name = "atmega644a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega644p = Cpu{ .name = "atmega644p", .llvm_name = "atmega644p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega644pa = Cpu{ .name = "atmega644pa", .llvm_name = "atmega644pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega644rfr2 = Cpu{ .name = "atmega644rfr2", .llvm_name = "atmega644rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega645 = Cpu{ .name = "atmega645", .llvm_name = "atmega645", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6450 = Cpu{ .name = "atmega6450", .llvm_name = "atmega6450", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6450a = Cpu{ .name = "atmega6450a", .llvm_name = "atmega6450a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6450p = Cpu{ .name = "atmega6450p", .llvm_name = "atmega6450p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega645a = Cpu{ .name = "atmega645a", .llvm_name = "atmega645a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega645p = Cpu{ .name = "atmega645p", .llvm_name = "atmega645p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega649 = Cpu{ .name = "atmega649", .llvm_name = "atmega649", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6490 = Cpu{ .name = "atmega6490", .llvm_name = "atmega6490", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6490a = Cpu{ .name = "atmega6490a", .llvm_name = "atmega6490a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega6490p = Cpu{ .name = "atmega6490p", .llvm_name = "atmega6490p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega649a = Cpu{ .name = "atmega649a", .llvm_name = "atmega649a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega649p = Cpu{ .name = "atmega649p", .llvm_name = "atmega649p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega64a = Cpu{ .name = "atmega64a", .llvm_name = "atmega64a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega64c1 = Cpu{ .name = "atmega64c1", .llvm_name = "atmega64c1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega64hve = Cpu{ .name = "atmega64hve", .llvm_name = "atmega64hve", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega64m1 = Cpu{ .name = "atmega64m1", .llvm_name = "atmega64m1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega64rfr2 = Cpu{ .name = "atmega64rfr2", .llvm_name = "atmega64rfr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const atmega8 = Cpu{ .name = "atmega8", .llvm_name = "atmega8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega8515 = Cpu{ .name = "atmega8515", .llvm_name = "atmega8515", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, .lpmx, .movw, @@ -1329,7 +1328,7 @@ pub const cpu = struct { pub const atmega8535 = Cpu{ .name = "atmega8535", .llvm_name = "atmega8535", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, .lpmx, .movw, @@ -1340,175 +1339,175 @@ pub const cpu = struct { pub const atmega88 = Cpu{ .name = "atmega88", .llvm_name = "atmega88", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega88a = Cpu{ .name = "atmega88a", .llvm_name = "atmega88a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega88p = Cpu{ .name = "atmega88p", .llvm_name = "atmega88p", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega88pa = Cpu{ .name = "atmega88pa", .llvm_name = "atmega88pa", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega8a = Cpu{ .name = "atmega8a", .llvm_name = "atmega8a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega8hva = Cpu{ .name = "atmega8hva", .llvm_name = "atmega8hva", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const atmega8u2 = Cpu{ .name = "atmega8u2", .llvm_name = "atmega8u2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const attiny10 = Cpu{ .name = "attiny10", .llvm_name = "attiny10", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny102 = Cpu{ .name = "attiny102", .llvm_name = "attiny102", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny104 = Cpu{ .name = "attiny104", .llvm_name = "attiny104", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny11 = Cpu{ .name = "attiny11", .llvm_name = "attiny11", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr1, }), }; pub const attiny12 = Cpu{ .name = "attiny12", .llvm_name = "attiny12", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr1, }), }; pub const attiny13 = Cpu{ .name = "attiny13", .llvm_name = "attiny13", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny13a = Cpu{ .name = "attiny13a", .llvm_name = "attiny13a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny15 = Cpu{ .name = "attiny15", .llvm_name = "attiny15", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr1, }), }; pub const attiny1634 = Cpu{ .name = "attiny1634", .llvm_name = "attiny1634", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const attiny167 = Cpu{ .name = "attiny167", .llvm_name = "attiny167", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const attiny20 = Cpu{ .name = "attiny20", .llvm_name = "attiny20", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny22 = Cpu{ .name = "attiny22", .llvm_name = "attiny22", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const attiny2313 = Cpu{ .name = "attiny2313", .llvm_name = "attiny2313", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny2313a = Cpu{ .name = "attiny2313a", .llvm_name = "attiny2313a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny24 = Cpu{ .name = "attiny24", .llvm_name = "attiny24", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny24a = Cpu{ .name = "attiny24a", .llvm_name = "attiny24a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny25 = Cpu{ .name = "attiny25", .llvm_name = "attiny25", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny26 = Cpu{ .name = "attiny26", .llvm_name = "attiny26", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, .lpmx, }), @@ -1516,602 +1515,602 @@ pub const cpu = struct { pub const attiny261 = Cpu{ .name = "attiny261", .llvm_name = "attiny261", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny261a = Cpu{ .name = "attiny261a", .llvm_name = "attiny261a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny28 = Cpu{ .name = "attiny28", .llvm_name = "attiny28", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr1, }), }; pub const attiny4 = Cpu{ .name = "attiny4", .llvm_name = "attiny4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny40 = Cpu{ .name = "attiny40", .llvm_name = "attiny40", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny4313 = Cpu{ .name = "attiny4313", .llvm_name = "attiny4313", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny43u = Cpu{ .name = "attiny43u", .llvm_name = "attiny43u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny44 = Cpu{ .name = "attiny44", .llvm_name = "attiny44", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny44a = Cpu{ .name = "attiny44a", .llvm_name = "attiny44a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny45 = Cpu{ .name = "attiny45", .llvm_name = "attiny45", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny461 = Cpu{ .name = "attiny461", .llvm_name = "attiny461", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny461a = Cpu{ .name = "attiny461a", .llvm_name = "attiny461a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny48 = Cpu{ .name = "attiny48", .llvm_name = "attiny48", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny5 = Cpu{ .name = "attiny5", .llvm_name = "attiny5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const attiny828 = Cpu{ .name = "attiny828", .llvm_name = "attiny828", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny84 = Cpu{ .name = "attiny84", .llvm_name = "attiny84", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny84a = Cpu{ .name = "attiny84a", .llvm_name = "attiny84a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny85 = Cpu{ .name = "attiny85", .llvm_name = "attiny85", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny861 = Cpu{ .name = "attiny861", .llvm_name = "attiny861", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny861a = Cpu{ .name = "attiny861a", .llvm_name = "attiny861a", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny87 = Cpu{ .name = "attiny87", .llvm_name = "attiny87", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny88 = Cpu{ .name = "attiny88", .llvm_name = "attiny88", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const attiny9 = Cpu{ .name = "attiny9", .llvm_name = "attiny9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const atxmega128a1 = Cpu{ .name = "atxmega128a1", .llvm_name = "atxmega128a1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega128a1u = Cpu{ .name = "atxmega128a1u", .llvm_name = "atxmega128a1u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128a3 = Cpu{ .name = "atxmega128a3", .llvm_name = "atxmega128a3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega128a3u = Cpu{ .name = "atxmega128a3u", .llvm_name = "atxmega128a3u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128a4u = Cpu{ .name = "atxmega128a4u", .llvm_name = "atxmega128a4u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128b1 = Cpu{ .name = "atxmega128b1", .llvm_name = "atxmega128b1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128b3 = Cpu{ .name = "atxmega128b3", .llvm_name = "atxmega128b3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128c3 = Cpu{ .name = "atxmega128c3", .llvm_name = "atxmega128c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega128d3 = Cpu{ .name = "atxmega128d3", .llvm_name = "atxmega128d3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega128d4 = Cpu{ .name = "atxmega128d4", .llvm_name = "atxmega128d4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega16a4 = Cpu{ .name = "atxmega16a4", .llvm_name = "atxmega16a4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega16a4u = Cpu{ .name = "atxmega16a4u", .llvm_name = "atxmega16a4u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega16c4 = Cpu{ .name = "atxmega16c4", .llvm_name = "atxmega16c4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega16d4 = Cpu{ .name = "atxmega16d4", .llvm_name = "atxmega16d4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega16e5 = Cpu{ .name = "atxmega16e5", .llvm_name = "atxmega16e5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega192a3 = Cpu{ .name = "atxmega192a3", .llvm_name = "atxmega192a3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega192a3u = Cpu{ .name = "atxmega192a3u", .llvm_name = "atxmega192a3u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega192c3 = Cpu{ .name = "atxmega192c3", .llvm_name = "atxmega192c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega192d3 = Cpu{ .name = "atxmega192d3", .llvm_name = "atxmega192d3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega256a3 = Cpu{ .name = "atxmega256a3", .llvm_name = "atxmega256a3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega256a3b = Cpu{ .name = "atxmega256a3b", .llvm_name = "atxmega256a3b", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega256a3bu = Cpu{ .name = "atxmega256a3bu", .llvm_name = "atxmega256a3bu", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega256a3u = Cpu{ .name = "atxmega256a3u", .llvm_name = "atxmega256a3u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega256c3 = Cpu{ .name = "atxmega256c3", .llvm_name = "atxmega256c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega256d3 = Cpu{ .name = "atxmega256d3", .llvm_name = "atxmega256d3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega32a4 = Cpu{ .name = "atxmega32a4", .llvm_name = "atxmega32a4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega32a4u = Cpu{ .name = "atxmega32a4u", .llvm_name = "atxmega32a4u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega32c4 = Cpu{ .name = "atxmega32c4", .llvm_name = "atxmega32c4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega32d4 = Cpu{ .name = "atxmega32d4", .llvm_name = "atxmega32d4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega32e5 = Cpu{ .name = "atxmega32e5", .llvm_name = "atxmega32e5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega32x1 = Cpu{ .name = "atxmega32x1", .llvm_name = "atxmega32x1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega384c3 = Cpu{ .name = "atxmega384c3", .llvm_name = "atxmega384c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega384d3 = Cpu{ .name = "atxmega384d3", .llvm_name = "atxmega384d3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega64a1 = Cpu{ .name = "atxmega64a1", .llvm_name = "atxmega64a1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega64a1u = Cpu{ .name = "atxmega64a1u", .llvm_name = "atxmega64a1u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64a3 = Cpu{ .name = "atxmega64a3", .llvm_name = "atxmega64a3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega64a3u = Cpu{ .name = "atxmega64a3u", .llvm_name = "atxmega64a3u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64a4u = Cpu{ .name = "atxmega64a4u", .llvm_name = "atxmega64a4u", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64b1 = Cpu{ .name = "atxmega64b1", .llvm_name = "atxmega64b1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64b3 = Cpu{ .name = "atxmega64b3", .llvm_name = "atxmega64b3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64c3 = Cpu{ .name = "atxmega64c3", .llvm_name = "atxmega64c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmegau, }), }; pub const atxmega64d3 = Cpu{ .name = "atxmega64d3", .llvm_name = "atxmega64d3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega64d4 = Cpu{ .name = "atxmega64d4", .llvm_name = "atxmega64d4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const atxmega8e5 = Cpu{ .name = "atxmega8e5", .llvm_name = "atxmega8e5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avr1 = Cpu{ .name = "avr1", .llvm_name = "avr1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr1, }), }; pub const avr2 = Cpu{ .name = "avr2", .llvm_name = "avr2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr2, }), }; pub const avr25 = Cpu{ .name = "avr25", .llvm_name = "avr25", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr25, }), }; pub const avr3 = Cpu{ .name = "avr3", .llvm_name = "avr3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr3, }), }; pub const avr31 = Cpu{ .name = "avr31", .llvm_name = "avr31", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr31, }), }; pub const avr35 = Cpu{ .name = "avr35", .llvm_name = "avr35", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr35, }), }; pub const avr4 = Cpu{ .name = "avr4", .llvm_name = "avr4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr4, }), }; pub const avr5 = Cpu{ .name = "avr5", .llvm_name = "avr5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; pub const avr51 = Cpu{ .name = "avr51", .llvm_name = "avr51", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr51, }), }; pub const avr6 = Cpu{ .name = "avr6", .llvm_name = "avr6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr6, }), }; pub const avrtiny = Cpu{ .name = "avrtiny", .llvm_name = "avrtiny", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avrtiny, }), }; pub const avrxmega1 = Cpu{ .name = "avrxmega1", .llvm_name = "avrxmega1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega2 = Cpu{ .name = "avrxmega2", .llvm_name = "avrxmega2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega3 = Cpu{ .name = "avrxmega3", .llvm_name = "avrxmega3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega4 = Cpu{ .name = "avrxmega4", .llvm_name = "avrxmega4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega5 = Cpu{ .name = "avrxmega5", .llvm_name = "avrxmega5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega6 = Cpu{ .name = "avrxmega6", .llvm_name = "avrxmega6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const avrxmega7 = Cpu{ .name = "avrxmega7", .llvm_name = "avrxmega7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .xmega, }), }; pub const m3000 = Cpu{ .name = "m3000", .llvm_name = "m3000", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .avr5, }), }; @@ -2380,6 +2379,6 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.m3000, }; -pub const baseline_features = featureSet(&all_features, &[_]Feature{ +pub const baseline_features = featureSet(&[_]Feature{ .avr0, }); diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig index 350d434a6c5da066057dc8984dec96927531adea..b6179075cc2e4cdbd590a9ffb781bdb3af14244b 100644 --- a/lib/std/target/bpf.zig +++ b/lib/std/target/bpf.zig @@ -16,23 +16,22 @@ pub const all_features = blk: { result[@enumToInt(Feature.alu32)] = .{ .llvm_name = "alu32", .description = "Enable ALU32 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dummy)] = .{ .llvm_name = "dummy", .description = "unused feature", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dwarfris)] = .{ .llvm_name = "dwarfris", .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -41,27 +40,27 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const probe = Cpu{ .name = "probe", .llvm_name = "probe", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const v1 = Cpu{ .name = "v1", .llvm_name = "v1", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const v2 = Cpu{ .name = "v2", .llvm_name = "v2", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const v3 = Cpu{ .name = "v3", .llvm_name = "v3", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; }; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig index cdb44ec889800119207477350a28b4c2d4940926..f873237493f419a7f53a3b86220649520b6f04c3 100644 --- a/lib/std/target/hexagon.zig +++ b/lib/std/target/hexagon.zig @@ -37,38 +37,38 @@ pub const all_features = blk: { result[@enumToInt(Feature.duplex)] = .{ .llvm_name = "duplex", .description = "Enable generation of duplex instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx)] = .{ .llvm_name = "hvx", .description = "Hexagon HVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hvx_length128b)] = .{ .llvm_name = "hvx-length128b", .description = "Hexagon HVX 128B instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvx_length64b)] = .{ .llvm_name = "hvx-length64b", .description = "Hexagon HVX 64B instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvxv60)] = .{ .llvm_name = "hvxv60", .description = "Hexagon HVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, }), }; result[@enumToInt(Feature.hvxv62)] = .{ .llvm_name = "hvxv62", .description = "Hexagon HVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, .hvxv60, }), @@ -76,7 +76,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.hvxv65)] = .{ .llvm_name = "hvxv65", .description = "Hexagon HVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, .hvxv60, .hvxv62, @@ -85,7 +85,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.hvxv66)] = .{ .llvm_name = "hvxv66", .description = "Hexagon HVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hvx, .hvxv60, .hvxv62, @@ -96,92 +96,91 @@ pub const all_features = blk: { result[@enumToInt(Feature.long_calls)] = .{ .llvm_name = "long-calls", .description = "Use constant-extended calls", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mem_noshuf)] = .{ .llvm_name = "mem_noshuf", .description = "Supports mem_noshuf feature", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.memops)] = .{ .llvm_name = "memops", .description = "Use memop instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noreturn_stack_elim)] = .{ .llvm_name = "noreturn-stack-elim", .description = "Eliminate stack allocation in a noreturn function when possible", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nvj)] = .{ .llvm_name = "nvj", .description = "Support for new-value jumps", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .packets, }), }; result[@enumToInt(Feature.nvs)] = .{ .llvm_name = "nvs", .description = "Support for new-value stores", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .packets, }), }; result[@enumToInt(Feature.packets)] = .{ .llvm_name = "packets", .description = "Support for instruction packets", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reserved_r19)] = .{ .llvm_name = "reserved-r19", .description = "Reserve register R19", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.small_data)] = .{ .llvm_name = "small-data", .description = "Allow GP-relative addressing of global variables", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v5)] = .{ .llvm_name = "v5", .description = "Enable Hexagon V5 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v55)] = .{ .llvm_name = "v55", .description = "Enable Hexagon V55 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v60)] = .{ .llvm_name = "v60", .description = "Enable Hexagon V60 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v62)] = .{ .llvm_name = "v62", .description = "Enable Hexagon V62 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v65)] = .{ .llvm_name = "v65", .description = "Enable Hexagon V65 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v66)] = .{ .llvm_name = "v66", .description = "Enable Hexagon V66 architecture", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.zreg)] = .{ .llvm_name = "zreg", .description = "Hexagon ZReg extension instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -190,7 +189,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .memops, .nvj, @@ -205,7 +204,7 @@ pub const cpu = struct { pub const hexagonv5 = Cpu{ .name = "hexagonv5", .llvm_name = "hexagonv5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .memops, .nvj, @@ -218,7 +217,7 @@ pub const cpu = struct { pub const hexagonv55 = Cpu{ .name = "hexagonv55", .llvm_name = "hexagonv55", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .memops, .nvj, @@ -232,7 +231,7 @@ pub const cpu = struct { pub const hexagonv60 = Cpu{ .name = "hexagonv60", .llvm_name = "hexagonv60", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .memops, .nvj, @@ -247,7 +246,7 @@ pub const cpu = struct { pub const hexagonv62 = Cpu{ .name = "hexagonv62", .llvm_name = "hexagonv62", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .memops, .nvj, @@ -263,7 +262,7 @@ pub const cpu = struct { pub const hexagonv65 = Cpu{ .name = "hexagonv65", .llvm_name = "hexagonv65", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .mem_noshuf, .memops, @@ -281,7 +280,7 @@ pub const cpu = struct { pub const hexagonv66 = Cpu{ .name = "hexagonv66", .llvm_name = "hexagonv66", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .duplex, .mem_noshuf, .memops, diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig index 51835f29808e2bb32f4b65426bb0e33266d92ae4..fce7c9ce36c5446af3ff23f4a86a8a625e9c7341 100644 --- a/lib/std/target/mips.zig +++ b/lib/std/target/mips.zig @@ -62,36 +62,36 @@ pub const all_features = blk: { result[@enumToInt(Feature.abs2008)] = .{ .llvm_name = "abs2008", .description = "Disable IEEE 754-2008 abs.fmt mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cnmips)] = .{ .llvm_name = "cnmips", .description = "Octeon cnMIPS Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips64r2, }), }; result[@enumToInt(Feature.crc)] = .{ .llvm_name = "crc", .description = "Mips R6 CRC ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dsp)] = .{ .llvm_name = "dsp", .description = "Mips DSP ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dspr2)] = .{ .llvm_name = "dspr2", .description = "Mips DSP-R2 ASE", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dsp, }), }; result[@enumToInt(Feature.dspr3)] = .{ .llvm_name = "dspr3", .description = "Mips DSP-R3 ASE", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .dsp, .dspr2, }), @@ -99,59 +99,59 @@ pub const all_features = blk: { result[@enumToInt(Feature.eva)] = .{ .llvm_name = "eva", .description = "Mips EVA ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp64)] = .{ .llvm_name = "fp64", .description = "Support 64-bit FP registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fpxx)] = .{ .llvm_name = "fpxx", .description = "Support for FPXX", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ginv)] = .{ .llvm_name = "ginv", .description = "Mips Global Invalidate ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gp64)] = .{ .llvm_name = "gp64", .description = "General Purpose Registers are 64-bit wide", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.long_calls)] = .{ .llvm_name = "long-calls", .description = "Disable use of the jal instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.micromips)] = .{ .llvm_name = "micromips", .description = "microMips mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips1)] = .{ .llvm_name = "mips1", .description = "Mips I ISA Support [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips16)] = .{ .llvm_name = "mips16", .description = "Mips16 mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips2)] = .{ .llvm_name = "mips2", .description = "Mips II ISA Support [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips1, }), }; result[@enumToInt(Feature.mips3)] = .{ .llvm_name = "mips3", .description = "MIPS III ISA Support [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fp64, .gp64, .mips2, @@ -162,7 +162,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips32)] = .{ .llvm_name = "mips32", .description = "Mips32 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips2, .mips3_32, .mips4_32, @@ -171,7 +171,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips32r2)] = .{ .llvm_name = "mips32r2", .description = "Mips32r2 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32, .mips3_32r2, .mips4_32r2, @@ -181,21 +181,21 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips32r3)] = .{ .llvm_name = "mips32r3", .description = "Mips32r3 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r2, }), }; result[@enumToInt(Feature.mips32r5)] = .{ .llvm_name = "mips32r5", .description = "Mips32r5 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r3, }), }; result[@enumToInt(Feature.mips32r6)] = .{ .llvm_name = "mips32r6", .description = "Mips32r6 ISA Support [experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .abs2008, .fp64, .mips32r5, @@ -205,17 +205,17 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips3_32)] = .{ .llvm_name = "mips3_32", .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips3_32r2)] = .{ .llvm_name = "mips3_32r2", .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4)] = .{ .llvm_name = "mips4", .description = "MIPS IV ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips3, .mips4_32, .mips4_32r2, @@ -224,17 +224,17 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips4_32)] = .{ .llvm_name = "mips4_32", .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips4_32r2)] = .{ .llvm_name = "mips4_32r2", .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips5)] = .{ .llvm_name = "mips5", .description = "MIPS V ISA Support [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips4, .mips5_32r2, }), @@ -242,12 +242,12 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips5_32r2)] = .{ .llvm_name = "mips5_32r2", .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mips64)] = .{ .llvm_name = "mips64", .description = "Mips64 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32, .mips5, }), @@ -255,7 +255,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips64r2)] = .{ .llvm_name = "mips64r2", .description = "Mips64r2 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r2, .mips64, }), @@ -263,7 +263,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips64r3)] = .{ .llvm_name = "mips64r3", .description = "Mips64r3 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r3, .mips64r2, }), @@ -271,7 +271,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips64r5)] = .{ .llvm_name = "mips64r5", .description = "Mips64r5 ISA Support", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r5, .mips64r3, }), @@ -279,7 +279,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.mips64r6)] = .{ .llvm_name = "mips64r6", .description = "Mips64r6 ISA Support [experimental]", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .abs2008, .mips32r6, .mips64r5, @@ -289,85 +289,84 @@ pub const all_features = blk: { result[@enumToInt(Feature.msa)] = .{ .llvm_name = "msa", .description = "Mips MSA ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mt)] = .{ .llvm_name = "mt", .description = "Mips MT ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nan2008)] = .{ .llvm_name = "nan2008", .description = "IEEE 754-2008 NaN encoding", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.noabicalls)] = .{ .llvm_name = "noabicalls", .description = "Disable SVR4-style position-independent code", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nomadd4)] = .{ .llvm_name = "nomadd4", .description = "Disable 4-operand madd.fmt and related instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nooddspreg)] = .{ .llvm_name = "nooddspreg", .description = "Disable odd numbered single-precision registers", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.p5600)] = .{ .llvm_name = "p5600", .description = "The P5600 Processor", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mips32r5, }), }; result[@enumToInt(Feature.ptr64)] = .{ .llvm_name = "ptr64", .description = "Pointers are 64-bit wide", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.single_float)] = .{ .llvm_name = "single-float", .description = "Only supports single precision float", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .llvm_name = "soft-float", .description = "Does not support floating point instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sym32)] = .{ .llvm_name = "sym32", .description = "Symbols are 32 bit on Mips64", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{ .llvm_name = "use-indirect-jump-hazard", .description = "Use indirect jump guards to prevent certain speculation based attacks", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.use_tcc_in_div)] = .{ .llvm_name = "use-tcc-in-div", .description = "Force the assembler to use trapping", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vfpu)] = .{ .llvm_name = "vfpu", .description = "Enable vector FPU instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.virt)] = .{ .llvm_name = "virt", .description = "Mips Virtualization ASE", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -376,112 +375,112 @@ pub const cpu = struct { pub const mips1 = Cpu{ .name = "mips1", .llvm_name = "mips1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips1, }), }; pub const mips2 = Cpu{ .name = "mips2", .llvm_name = "mips2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips2, }), }; pub const mips3 = Cpu{ .name = "mips3", .llvm_name = "mips3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips3, }), }; pub const mips32 = Cpu{ .name = "mips32", .llvm_name = "mips32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips32, }), }; pub const mips32r2 = Cpu{ .name = "mips32r2", .llvm_name = "mips32r2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips32r2, }), }; pub const mips32r3 = Cpu{ .name = "mips32r3", .llvm_name = "mips32r3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips32r3, }), }; pub const mips32r5 = Cpu{ .name = "mips32r5", .llvm_name = "mips32r5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips32r5, }), }; pub const mips32r6 = Cpu{ .name = "mips32r6", .llvm_name = "mips32r6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips32r6, }), }; pub const mips4 = Cpu{ .name = "mips4", .llvm_name = "mips4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips4, }), }; pub const mips5 = Cpu{ .name = "mips5", .llvm_name = "mips5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips5, }), }; pub const mips64 = Cpu{ .name = "mips64", .llvm_name = "mips64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips64, }), }; pub const mips64r2 = Cpu{ .name = "mips64r2", .llvm_name = "mips64r2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips64r2, }), }; pub const mips64r3 = Cpu{ .name = "mips64r3", .llvm_name = "mips64r3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips64r3, }), }; pub const mips64r5 = Cpu{ .name = "mips64r5", .llvm_name = "mips64r5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips64r5, }), }; pub const mips64r6 = Cpu{ .name = "mips64r6", .llvm_name = "mips64r6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mips64r6, }), }; pub const octeon = Cpu{ .name = "octeon", .llvm_name = "octeon", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cnmips, .mips64r2, }), @@ -489,7 +488,7 @@ pub const cpu = struct { pub const p5600 = Cpu{ .name = "p5600", .llvm_name = "p5600", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .p5600, }), }; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig index ecbc362b1afd4f9142ae19f37faa89cb2fd5998d..bc932f22956db69ca09abb81d3c8a59f4f522ad0 100644 --- a/lib/std/target/msp430.zig +++ b/lib/std/target/msp430.zig @@ -17,28 +17,27 @@ pub const all_features = blk: { result[@enumToInt(Feature.ext)] = .{ .llvm_name = "ext", .description = "Enable MSP430-X extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult16)] = .{ .llvm_name = "hwmult16", .description = "Enable 16-bit hardware multiplier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmult32)] = .{ .llvm_name = "hwmult32", .description = "Enable 32-bit hardware multiplier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hwmultf5)] = .{ .llvm_name = "hwmultf5", .description = "Enable F5 series hardware multiplier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -47,17 +46,17 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const msp430 = Cpu{ .name = "msp430", .llvm_name = "msp430", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const msp430x = Cpu{ .name = "msp430x", .llvm_name = "msp430x", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ext, }), }; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig index 58babffd86d7ae6eb8240837ee5f500c99ebae94..1800e320b4af7d9ba9cdf91dd889b6d62f950e07 100644 --- a/lib/std/target/nvptx.zig +++ b/lib/std/target/nvptx.zig @@ -38,133 +38,132 @@ pub const all_features = blk: { result[@enumToInt(Feature.ptx32)] = .{ .llvm_name = "ptx32", .description = "Use PTX version 3.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx40)] = .{ .llvm_name = "ptx40", .description = "Use PTX version 4.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx41)] = .{ .llvm_name = "ptx41", .description = "Use PTX version 4.1", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx42)] = .{ .llvm_name = "ptx42", .description = "Use PTX version 4.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx43)] = .{ .llvm_name = "ptx43", .description = "Use PTX version 4.3", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx50)] = .{ .llvm_name = "ptx50", .description = "Use PTX version 5.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx60)] = .{ .llvm_name = "ptx60", .description = "Use PTX version 6.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx61)] = .{ .llvm_name = "ptx61", .description = "Use PTX version 6.1", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx63)] = .{ .llvm_name = "ptx63", .description = "Use PTX version 6.3", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptx64)] = .{ .llvm_name = "ptx64", .description = "Use PTX version 6.4", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_20)] = .{ .llvm_name = "sm_20", .description = "Target SM 2.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_21)] = .{ .llvm_name = "sm_21", .description = "Target SM 2.1", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_30)] = .{ .llvm_name = "sm_30", .description = "Target SM 3.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_32)] = .{ .llvm_name = "sm_32", .description = "Target SM 3.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_35)] = .{ .llvm_name = "sm_35", .description = "Target SM 3.5", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_37)] = .{ .llvm_name = "sm_37", .description = "Target SM 3.7", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_50)] = .{ .llvm_name = "sm_50", .description = "Target SM 5.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_52)] = .{ .llvm_name = "sm_52", .description = "Target SM 5.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_53)] = .{ .llvm_name = "sm_53", .description = "Target SM 5.3", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_60)] = .{ .llvm_name = "sm_60", .description = "Target SM 6.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_61)] = .{ .llvm_name = "sm_61", .description = "Target SM 6.1", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_62)] = .{ .llvm_name = "sm_62", .description = "Target SM 6.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_70)] = .{ .llvm_name = "sm_70", .description = "Target SM 7.0", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_72)] = .{ .llvm_name = "sm_72", .description = "Target SM 7.2", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sm_75)] = .{ .llvm_name = "sm_75", .description = "Target SM 7.5", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -173,28 +172,28 @@ pub const cpu = struct { pub const sm_20 = Cpu{ .name = "sm_20", .llvm_name = "sm_20", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .sm_20, }), }; pub const sm_21 = Cpu{ .name = "sm_21", .llvm_name = "sm_21", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .sm_21, }), }; pub const sm_30 = Cpu{ .name = "sm_30", .llvm_name = "sm_30", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .sm_30, }), }; pub const sm_32 = Cpu{ .name = "sm_32", .llvm_name = "sm_32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx40, .sm_32, }), @@ -202,14 +201,14 @@ pub const cpu = struct { pub const sm_35 = Cpu{ .name = "sm_35", .llvm_name = "sm_35", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .sm_35, }), }; pub const sm_37 = Cpu{ .name = "sm_37", .llvm_name = "sm_37", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx41, .sm_37, }), @@ -217,7 +216,7 @@ pub const cpu = struct { pub const sm_50 = Cpu{ .name = "sm_50", .llvm_name = "sm_50", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx40, .sm_50, }), @@ -225,7 +224,7 @@ pub const cpu = struct { pub const sm_52 = Cpu{ .name = "sm_52", .llvm_name = "sm_52", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx41, .sm_52, }), @@ -233,7 +232,7 @@ pub const cpu = struct { pub const sm_53 = Cpu{ .name = "sm_53", .llvm_name = "sm_53", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx42, .sm_53, }), @@ -241,7 +240,7 @@ pub const cpu = struct { pub const sm_60 = Cpu{ .name = "sm_60", .llvm_name = "sm_60", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx50, .sm_60, }), @@ -249,7 +248,7 @@ pub const cpu = struct { pub const sm_61 = Cpu{ .name = "sm_61", .llvm_name = "sm_61", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx50, .sm_61, }), @@ -257,7 +256,7 @@ pub const cpu = struct { pub const sm_62 = Cpu{ .name = "sm_62", .llvm_name = "sm_62", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx50, .sm_62, }), @@ -265,7 +264,7 @@ pub const cpu = struct { pub const sm_70 = Cpu{ .name = "sm_70", .llvm_name = "sm_70", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx60, .sm_70, }), @@ -273,7 +272,7 @@ pub const cpu = struct { pub const sm_72 = Cpu{ .name = "sm_72", .llvm_name = "sm_72", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx61, .sm_72, }), @@ -281,7 +280,7 @@ pub const cpu = struct { pub const sm_75 = Cpu{ .name = "sm_75", .llvm_name = "sm_75", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .ptx63, .sm_75, }), diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig index 981c595c93eedba66c7804523a961d1d397e348e..41321f7b04097da960515e03557c4c8f8a3bbc7e 100644 --- a/lib/std/target/powerpc.zig +++ b/lib/std/target/powerpc.zig @@ -64,216 +64,216 @@ pub const all_features = blk: { result[@enumToInt(Feature.@"64bit")] = .{ .llvm_name = "64bit", .description = "Enable 64-bit instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.@"64bitregs")] = .{ .llvm_name = "64bitregs", .description = "Enable 64-bit registers usage for ppc32 [beta]", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.altivec)] = .{ .llvm_name = "altivec", .description = "Enable Altivec instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.booke)] = .{ .llvm_name = "booke", .description = "Enable Book E instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .icbt, }), }; result[@enumToInt(Feature.bpermd)] = .{ .llvm_name = "bpermd", .description = "Enable the bpermd instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmpb)] = .{ .llvm_name = "cmpb", .description = "Enable the cmpb instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crbits)] = .{ .llvm_name = "crbits", .description = "Use condition-register bits individually", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.crypto)] = .{ .llvm_name = "crypto", .description = "Enable POWER8 Crypto instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .power8_altivec, }), }; result[@enumToInt(Feature.direct_move)] = .{ .llvm_name = "direct-move", .description = "Enable Power8 direct move instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vsx, }), }; result[@enumToInt(Feature.e500)] = .{ .llvm_name = "e500", .description = "Enable E500/E500mc instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.extdiv)] = .{ .llvm_name = "extdiv", .description = "Enable extended divide instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fcpsgn)] = .{ .llvm_name = "fcpsgn", .description = "Enable the fcpsgn instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.float128)] = .{ .llvm_name = "float128", .description = "Enable the __float128 data type for IEEE-754R Binary128.", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .vsx, }), }; result[@enumToInt(Feature.fpcvt)] = .{ .llvm_name = "fpcvt", .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fprnd)] = .{ .llvm_name = "fprnd", .description = "Enable the fri[mnpz] instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fpu)] = .{ .llvm_name = "fpu", .description = "Enable classic FPU instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hard_float, }), }; result[@enumToInt(Feature.fre)] = .{ .llvm_name = "fre", .description = "Enable the fre instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fres)] = .{ .llvm_name = "fres", .description = "Enable the fres instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.frsqrte)] = .{ .llvm_name = "frsqrte", .description = "Enable the frsqrte instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.frsqrtes)] = .{ .llvm_name = "frsqrtes", .description = "Enable the frsqrtes instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.fsqrt)] = .{ .llvm_name = "fsqrt", .description = "Enable the fsqrt instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.hard_float)] = .{ .llvm_name = "hard-float", .description = "Enable floating-point instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.htm)] = .{ .llvm_name = "htm", .description = "Enable Hardware Transactional Memory instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.icbt)] = .{ .llvm_name = "icbt", .description = "Enable icbt instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invariant_function_descriptors)] = .{ .llvm_name = "invariant-function-descriptors", .description = "Assume function descriptors are invariant", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isa_v30_instructions)] = .{ .llvm_name = "isa-v30-instructions", .description = "Enable instructions added in ISA 3.0.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.isel)] = .{ .llvm_name = "isel", .description = "Enable the isel instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ldbrx)] = .{ .llvm_name = "ldbrx", .description = "Enable the ldbrx instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lfiwax)] = .{ .llvm_name = "lfiwax", .description = "Enable the lfiwax instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.longcall)] = .{ .llvm_name = "longcall", .description = "Always use indirect calls", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mfocrf)] = .{ .llvm_name = "mfocrf", .description = "Enable the MFOCRF instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.msync)] = .{ .llvm_name = "msync", .description = "Has only the msync instruction instead of sync", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .booke, }), }; result[@enumToInt(Feature.partword_atomics)] = .{ .llvm_name = "partword-atomics", .description = "Enable l[bh]arx and st[bh]cx.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcntd)] = .{ .llvm_name = "popcntd", .description = "Enable the popcnt[dw] instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.power8_altivec)] = .{ .llvm_name = "power8-altivec", .description = "Enable POWER8 Altivec instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .altivec, }), }; result[@enumToInt(Feature.power8_vector)] = .{ .llvm_name = "power8-vector", .description = "Enable POWER8 vector instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .power8_altivec, .vsx, }), @@ -281,7 +281,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.power9_altivec)] = .{ .llvm_name = "power9-altivec", .description = "Enable POWER9 Altivec instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .isa_v30_instructions, .power8_altivec, }), @@ -289,7 +289,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.power9_vector)] = .{ .llvm_name = "power9-vector", .description = "Enable POWER9 vector instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .isa_v30_instructions, .power8_vector, .power9_altivec, @@ -298,73 +298,73 @@ pub const all_features = blk: { result[@enumToInt(Feature.ppc_postra_sched)] = .{ .llvm_name = "ppc-postra-sched", .description = "Use PowerPC post-RA scheduling strategy", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc_prera_sched)] = .{ .llvm_name = "ppc-prera-sched", .description = "Use PowerPC pre-RA scheduling strategy", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc4xx)] = .{ .llvm_name = "ppc4xx", .description = "Enable PPC 4xx instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ppc6xx)] = .{ .llvm_name = "ppc6xx", .description = "Enable PPC 6xx instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.qpx)] = .{ .llvm_name = "qpx", .description = "Enable QPX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.recipprec)] = .{ .llvm_name = "recipprec", .description = "Assume higher precision reciprocal estimates", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.secure_plt)] = .{ .llvm_name = "secure-plt", .description = "Enable secure plt mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_popcntd)] = .{ .llvm_name = "slow-popcntd", .description = "Has slow popcnt[dw] instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.spe)] = .{ .llvm_name = "spe", .description = "Enable SPE instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .hard_float, }), }; result[@enumToInt(Feature.stfiwx)] = .{ .llvm_name = "stfiwx", .description = "Enable the stfiwx instruction", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fpu, }), }; result[@enumToInt(Feature.two_const_nr)] = .{ .llvm_name = "two-const-nr", .description = "Requires two constant Newton-Raphson computation", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vectors_use_two_units)] = .{ .llvm_name = "vectors-use-two-units", .description = "Vectors use two units", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vsx)] = .{ .llvm_name = "vsx", .description = "Enable VSX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .altivec, }), }; @@ -372,7 +372,6 @@ pub const all_features = blk: { for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -381,7 +380,7 @@ pub const cpu = struct { pub const @"440" = Cpu{ .name = "440", .llvm_name = "440", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .booke, .fres, .frsqrte, @@ -393,7 +392,7 @@ pub const cpu = struct { pub const @"450" = Cpu{ .name = "450", .llvm_name = "450", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .booke, .fres, .frsqrte, @@ -405,21 +404,21 @@ pub const cpu = struct { pub const @"601" = Cpu{ .name = "601", .llvm_name = "601", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fpu, }), }; pub const @"602" = Cpu{ .name = "602", .llvm_name = "602", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fpu, }), }; pub const @"603" = Cpu{ .name = "603", .llvm_name = "603", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -427,7 +426,7 @@ pub const cpu = struct { pub const @"603e" = Cpu{ .name = "603e", .llvm_name = "603e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -435,7 +434,7 @@ pub const cpu = struct { pub const @"603ev" = Cpu{ .name = "603ev", .llvm_name = "603ev", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -443,7 +442,7 @@ pub const cpu = struct { pub const @"604" = Cpu{ .name = "604", .llvm_name = "604", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -451,7 +450,7 @@ pub const cpu = struct { pub const @"604e" = Cpu{ .name = "604e", .llvm_name = "604e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -459,7 +458,7 @@ pub const cpu = struct { pub const @"620" = Cpu{ .name = "620", .llvm_name = "620", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -467,7 +466,7 @@ pub const cpu = struct { pub const @"7400" = Cpu{ .name = "7400", .llvm_name = "7400", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .altivec, .fres, .frsqrte, @@ -476,7 +475,7 @@ pub const cpu = struct { pub const @"7450" = Cpu{ .name = "7450", .llvm_name = "7450", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .altivec, .fres, .frsqrte, @@ -485,7 +484,7 @@ pub const cpu = struct { pub const @"750" = Cpu{ .name = "750", .llvm_name = "750", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -493,7 +492,7 @@ pub const cpu = struct { pub const @"970" = Cpu{ .name = "970", .llvm_name = "970", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fres, @@ -506,7 +505,7 @@ pub const cpu = struct { pub const a2 = Cpu{ .name = "a2", .llvm_name = "a2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .booke, .cmpb, @@ -531,7 +530,7 @@ pub const cpu = struct { pub const a2q = Cpu{ .name = "a2q", .llvm_name = "a2q", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .booke, .cmpb, @@ -557,7 +556,7 @@ pub const cpu = struct { pub const e500 = Cpu{ .name = "e500", .llvm_name = "e500", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .booke, .icbt, .isel, @@ -566,7 +565,7 @@ pub const cpu = struct { pub const e500mc = Cpu{ .name = "e500mc", .llvm_name = "e500mc", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .booke, .icbt, .isel, @@ -576,7 +575,7 @@ pub const cpu = struct { pub const e5500 = Cpu{ .name = "e5500", .llvm_name = "e5500", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .booke, .icbt, @@ -588,7 +587,7 @@ pub const cpu = struct { pub const g3 = Cpu{ .name = "g3", .llvm_name = "g3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fres, .frsqrte, }), @@ -596,7 +595,7 @@ pub const cpu = struct { pub const g4 = Cpu{ .name = "g4", .llvm_name = "g4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .altivec, .fres, .frsqrte, @@ -605,7 +604,7 @@ pub const cpu = struct { pub const @"g4+" = Cpu{ .name = "g4+", .llvm_name = "g4+", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .altivec, .fres, .frsqrte, @@ -614,7 +613,7 @@ pub const cpu = struct { pub const g5 = Cpu{ .name = "g5", .llvm_name = "g5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fres, @@ -627,28 +626,28 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hard_float, }), }; pub const ppc = Cpu{ .name = "ppc", .llvm_name = "ppc", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hard_float, }), }; pub const ppc32 = Cpu{ .name = "ppc32", .llvm_name = "ppc32", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hard_float, }), }; pub const ppc64 = Cpu{ .name = "ppc64", .llvm_name = "ppc64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fres, @@ -661,7 +660,7 @@ pub const cpu = struct { pub const ppc64le = Cpu{ .name = "ppc64le", .llvm_name = "ppc64le", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -696,7 +695,7 @@ pub const cpu = struct { pub const pwr3 = Cpu{ .name = "pwr3", .llvm_name = "pwr3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fres, @@ -708,7 +707,7 @@ pub const cpu = struct { pub const pwr4 = Cpu{ .name = "pwr4", .llvm_name = "pwr4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fres, @@ -721,7 +720,7 @@ pub const cpu = struct { pub const pwr5 = Cpu{ .name = "pwr5", .llvm_name = "pwr5", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fre, @@ -736,7 +735,7 @@ pub const cpu = struct { pub const pwr5x = Cpu{ .name = "pwr5x", .llvm_name = "pwr5x", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .fprnd, @@ -752,7 +751,7 @@ pub const cpu = struct { pub const pwr6 = Cpu{ .name = "pwr6", .llvm_name = "pwr6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .cmpb, @@ -772,7 +771,7 @@ pub const cpu = struct { pub const pwr6x = Cpu{ .name = "pwr6x", .llvm_name = "pwr6x", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .cmpb, @@ -792,7 +791,7 @@ pub const cpu = struct { pub const pwr7 = Cpu{ .name = "pwr7", .llvm_name = "pwr7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -820,7 +819,7 @@ pub const cpu = struct { pub const pwr8 = Cpu{ .name = "pwr8", .llvm_name = "pwr8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .bpermd, @@ -855,7 +854,7 @@ pub const cpu = struct { pub const pwr9 = Cpu{ .name = "pwr9", .llvm_name = "pwr9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .altivec, .bpermd, diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index f4ba975d085edc5b7ea261c4b8f4974498635281..e0671ad91b66033a3f85c3a4d9b1894fcec5fe12 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -21,50 +21,49 @@ pub const all_features = blk: { result[@enumToInt(Feature.@"64bit")] = .{ .llvm_name = "64bit", .description = "Implements RV64", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.a)] = .{ .llvm_name = "a", .description = "'A' (Atomic Instructions)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.c)] = .{ .llvm_name = "c", .description = "'C' (Compressed Instructions)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.d)] = .{ .llvm_name = "d", .description = "'D' (Double-Precision Floating-Point)", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .f, }), }; result[@enumToInt(Feature.e)] = .{ .llvm_name = "e", .description = "Implements RV32E (provides 16 rather than 32 GPRs)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f)] = .{ .llvm_name = "f", .description = "'F' (Single-Precision Floating-Point)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.m)] = .{ .llvm_name = "m", .description = "'M' (Integer Multiplication and Division)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.relax)] = .{ .llvm_name = "relax", .description = "Enable Linker relaxation.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -73,12 +72,12 @@ pub const cpu = struct { pub const generic_rv32 = Cpu{ .name = "generic_rv32", .llvm_name = "generic-rv32", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const generic_rv64 = Cpu{ .name = "generic_rv64", .llvm_name = "generic-rv64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", }), }; @@ -92,7 +91,7 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.generic_rv64, }; -pub const baseline_32_features = featureSet(&all_features, &[_]Feature{ +pub const baseline_32_features = featureSet(&[_]Feature{ .a, .c, .d, @@ -101,7 +100,7 @@ pub const baseline_32_features = featureSet(&all_features, &[_]Feature{ .relax, }); -pub const baseline_64_features = featureSet(&all_features, &[_]Feature{ +pub const baseline_64_features = featureSet(&[_]Feature{ .@"64bit", .a, .c, diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig index a9d75f5191363aed4b5a49aa5bb10e0b86fa5edd..923cc0732c054bccdc60996a879204c24c0dd9d0 100644 --- a/lib/std/target/sparc.zig +++ b/lib/std/target/sparc.zig @@ -32,103 +32,102 @@ pub const all_features = blk: { result[@enumToInt(Feature.deprecated_v8)] = .{ .llvm_name = "deprecated-v8", .description = "Enable deprecated V8 instructions in V9 mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.detectroundchange)] = .{ .llvm_name = "detectroundchange", .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fixallfdivsqrt)] = .{ .llvm_name = "fixallfdivsqrt", .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hard_quad_float)] = .{ .llvm_name = "hard-quad-float", .description = "Enable quad-word floating point instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasleoncasa)] = .{ .llvm_name = "hasleoncasa", .description = "Enable CASA instruction for LEON3 and LEON4 processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.hasumacsmac)] = .{ .llvm_name = "hasumacsmac", .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insertnopload)] = .{ .llvm_name = "insertnopload", .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leon)] = .{ .llvm_name = "leon", .description = "Enable LEON extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leoncyclecounter)] = .{ .llvm_name = "leoncyclecounter", .description = "Use the Leon cycle counter register", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.leonpwrpsr)] = .{ .llvm_name = "leonpwrpsr", .description = "Enable the PWRPSR instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fmuls)] = .{ .llvm_name = "no-fmuls", .description = "Disable the fmuls instruction.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.no_fsmuld)] = .{ .llvm_name = "no-fsmuld", .description = "Disable the fsmuld instruction.", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popc)] = .{ .llvm_name = "popc", .description = "Use the popc (population count) instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .llvm_name = "soft-float", .description = "Use software emulation for floating point", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_mul_div)] = .{ .llvm_name = "soft-mul-div", .description = "Use software emulation for integer multiply and divide", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.v9)] = .{ .llvm_name = "v9", .description = "Enable SPARC-V9 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis)] = .{ .llvm_name = "vis", .description = "Enable UltraSPARC Visual Instruction Set extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis2)] = .{ .llvm_name = "vis2", .description = "Enable Visual Instruction Set extensions II", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vis3)] = .{ .llvm_name = "vis3", .description = "Enable Visual Instruction Set extensions III", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -137,7 +136,7 @@ pub const cpu = struct { pub const at697e = Cpu{ .name = "at697e", .llvm_name = "at697e", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .insertnopload, .leon, }), @@ -145,7 +144,7 @@ pub const cpu = struct { pub const at697f = Cpu{ .name = "at697f", .llvm_name = "at697f", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .insertnopload, .leon, }), @@ -153,17 +152,17 @@ pub const cpu = struct { pub const f934 = Cpu{ .name = "f934", .llvm_name = "f934", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const gr712rc = Cpu{ .name = "gr712rc", .llvm_name = "gr712rc", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -171,7 +170,7 @@ pub const cpu = struct { pub const gr740 = Cpu{ .name = "gr740", .llvm_name = "gr740", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .hasumacsmac, .leon, @@ -182,19 +181,19 @@ pub const cpu = struct { pub const hypersparc = Cpu{ .name = "hypersparc", .llvm_name = "hypersparc", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const leon2 = Cpu{ .name = "leon2", .llvm_name = "leon2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .leon, }), }; pub const leon3 = Cpu{ .name = "leon3", .llvm_name = "leon3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasumacsmac, .leon, }), @@ -202,7 +201,7 @@ pub const cpu = struct { pub const leon4 = Cpu{ .name = "leon4", .llvm_name = "leon4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .hasumacsmac, .leon, @@ -211,7 +210,7 @@ pub const cpu = struct { pub const ma2080 = Cpu{ .name = "ma2080", .llvm_name = "ma2080", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -219,7 +218,7 @@ pub const cpu = struct { pub const ma2085 = Cpu{ .name = "ma2085", .llvm_name = "ma2085", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -227,7 +226,7 @@ pub const cpu = struct { pub const ma2100 = Cpu{ .name = "ma2100", .llvm_name = "ma2100", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -235,7 +234,7 @@ pub const cpu = struct { pub const ma2150 = Cpu{ .name = "ma2150", .llvm_name = "ma2150", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -243,7 +242,7 @@ pub const cpu = struct { pub const ma2155 = Cpu{ .name = "ma2155", .llvm_name = "ma2155", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -251,7 +250,7 @@ pub const cpu = struct { pub const ma2450 = Cpu{ .name = "ma2450", .llvm_name = "ma2450", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -259,7 +258,7 @@ pub const cpu = struct { pub const ma2455 = Cpu{ .name = "ma2455", .llvm_name = "ma2455", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -267,7 +266,7 @@ pub const cpu = struct { pub const ma2480 = Cpu{ .name = "ma2480", .llvm_name = "ma2480", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -275,7 +274,7 @@ pub const cpu = struct { pub const ma2485 = Cpu{ .name = "ma2485", .llvm_name = "ma2485", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -283,7 +282,7 @@ pub const cpu = struct { pub const ma2x5x = Cpu{ .name = "ma2x5x", .llvm_name = "ma2x5x", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -291,7 +290,7 @@ pub const cpu = struct { pub const ma2x8x = Cpu{ .name = "ma2x8x", .llvm_name = "ma2x8x", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -299,7 +298,7 @@ pub const cpu = struct { pub const myriad2 = Cpu{ .name = "myriad2", .llvm_name = "myriad2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -307,7 +306,7 @@ pub const cpu = struct { pub const myriad2_1 = Cpu{ .name = "myriad2_1", .llvm_name = "myriad2.1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -315,7 +314,7 @@ pub const cpu = struct { pub const myriad2_2 = Cpu{ .name = "myriad2_2", .llvm_name = "myriad2.2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -323,7 +322,7 @@ pub const cpu = struct { pub const myriad2_3 = Cpu{ .name = "myriad2_3", .llvm_name = "myriad2.3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .hasleoncasa, .leon, }), @@ -331,7 +330,7 @@ pub const cpu = struct { pub const niagara = Cpu{ .name = "niagara", .llvm_name = "niagara", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .v9, .vis, @@ -341,7 +340,7 @@ pub const cpu = struct { pub const niagara2 = Cpu{ .name = "niagara2", .llvm_name = "niagara2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .popc, .v9, @@ -352,7 +351,7 @@ pub const cpu = struct { pub const niagara3 = Cpu{ .name = "niagara3", .llvm_name = "niagara3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .popc, .v9, @@ -363,7 +362,7 @@ pub const cpu = struct { pub const niagara4 = Cpu{ .name = "niagara4", .llvm_name = "niagara4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .popc, .v9, @@ -375,32 +374,32 @@ pub const cpu = struct { pub const sparclet = Cpu{ .name = "sparclet", .llvm_name = "sparclet", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const sparclite = Cpu{ .name = "sparclite", .llvm_name = "sparclite", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const sparclite86x = Cpu{ .name = "sparclite86x", .llvm_name = "sparclite86x", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const supersparc = Cpu{ .name = "supersparc", .llvm_name = "supersparc", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const tsc701 = Cpu{ .name = "tsc701", .llvm_name = "tsc701", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const ultrasparc = Cpu{ .name = "ultrasparc", .llvm_name = "ultrasparc", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .v9, .vis, @@ -409,7 +408,7 @@ pub const cpu = struct { pub const ultrasparc3 = Cpu{ .name = "ultrasparc3", .llvm_name = "ultrasparc3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deprecated_v8, .v9, .vis, @@ -419,7 +418,7 @@ pub const cpu = struct { pub const ut699 = Cpu{ .name = "ut699", .llvm_name = "ut699", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .fixallfdivsqrt, .insertnopload, .leon, @@ -430,7 +429,7 @@ pub const cpu = struct { pub const v7 = Cpu{ .name = "v7", .llvm_name = "v7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .no_fsmuld, .soft_mul_div, }), @@ -438,12 +437,12 @@ pub const cpu = struct { pub const v8 = Cpu{ .name = "v8", .llvm_name = "v8", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const v9 = Cpu{ .name = "v9", .llvm_name = "v9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .v9, }), }; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig index 1326ad23ed54acbeec2e0cde6bb574d6bb17ee60..c924af6e7068a1972922b6628c78e098107312c8 100644 --- a/lib/std/target/systemz.zig +++ b/lib/std/target/systemz.zig @@ -48,183 +48,182 @@ pub const all_features = blk: { result[@enumToInt(Feature.deflate_conversion)] = .{ .llvm_name = "deflate-conversion", .description = "Assume that the deflate-conversion facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_packed_conversion)] = .{ .llvm_name = "dfp-packed-conversion", .description = "Assume that the DFP packed-conversion facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.dfp_zoned_conversion)] = .{ .llvm_name = "dfp-zoned-conversion", .description = "Assume that the DFP zoned-conversion facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.distinct_ops)] = .{ .llvm_name = "distinct-ops", .description = "Assume that the distinct-operands facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_dat_2)] = .{ .llvm_name = "enhanced-dat-2", .description = "Assume that the enhanced-DAT facility 2 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enhanced_sort)] = .{ .llvm_name = "enhanced-sort", .description = "Assume that the enhanced-sort facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.execution_hint)] = .{ .llvm_name = "execution-hint", .description = "Assume that the execution-hint facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_serialization)] = .{ .llvm_name = "fast-serialization", .description = "Assume that the fast-serialization facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fp_extension)] = .{ .llvm_name = "fp-extension", .description = "Assume that the floating-point extension facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.guarded_storage)] = .{ .llvm_name = "guarded-storage", .description = "Assume that the guarded-storage facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.high_word)] = .{ .llvm_name = "high-word", .description = "Assume that the high-word facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{ .llvm_name = "insert-reference-bits-multiple", .description = "Assume that the insert-reference-bits-multiple facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.interlocked_access1)] = .{ .llvm_name = "interlocked-access1", .description = "Assume that interlocked-access facility 1 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_trap)] = .{ .llvm_name = "load-and-trap", .description = "Assume that the load-and-trap facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{ .llvm_name = "load-and-zero-rightmost-byte", .description = "Assume that the load-and-zero-rightmost-byte facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond)] = .{ .llvm_name = "load-store-on-cond", .description = "Assume that the load/store-on-condition facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.load_store_on_cond_2)] = .{ .llvm_name = "load-store-on-cond-2", .description = "Assume that the load/store-on-condition facility 2 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension3)] = .{ .llvm_name = "message-security-assist-extension3", .description = "Assume that the message-security-assist extension facility 3 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension4)] = .{ .llvm_name = "message-security-assist-extension4", .description = "Assume that the message-security-assist extension facility 4 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension5)] = .{ .llvm_name = "message-security-assist-extension5", .description = "Assume that the message-security-assist extension facility 5 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension7)] = .{ .llvm_name = "message-security-assist-extension7", .description = "Assume that the message-security-assist extension facility 7 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension8)] = .{ .llvm_name = "message-security-assist-extension8", .description = "Assume that the message-security-assist extension facility 8 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.message_security_assist_extension9)] = .{ .llvm_name = "message-security-assist-extension9", .description = "Assume that the message-security-assist extension facility 9 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions)] = .{ .llvm_name = "miscellaneous-extensions", .description = "Assume that the miscellaneous-extensions facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{ .llvm_name = "miscellaneous-extensions-2", .description = "Assume that the miscellaneous-extensions facility 2 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{ .llvm_name = "miscellaneous-extensions-3", .description = "Assume that the miscellaneous-extensions facility 3 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.population_count)] = .{ .llvm_name = "population-count", .description = "Assume that the population-count facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.processor_assist)] = .{ .llvm_name = "processor-assist", .description = "Assume that the processor-assist facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{ .llvm_name = "reset-reference-bits-multiple", .description = "Assume that the reset-reference-bits-multiple facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.transactional_execution)] = .{ .llvm_name = "transactional-execution", .description = "Assume that the transactional-execution facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector)] = .{ .llvm_name = "vector", .description = "Assume that the vectory facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_1)] = .{ .llvm_name = "vector-enhancements-1", .description = "Assume that the vector enhancements facility 1 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_enhancements_2)] = .{ .llvm_name = "vector-enhancements-2", .description = "Assume that the vector enhancements facility 2 is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal)] = .{ .llvm_name = "vector-packed-decimal", .description = "Assume that the vector packed decimal facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{ .llvm_name = "vector-packed-decimal-enhancement", .description = "Assume that the vector packed decimal enhancement facility is installed", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -233,7 +232,7 @@ pub const cpu = struct { pub const arch10 = Cpu{ .name = "arch10", .llvm_name = "arch10", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_zoned_conversion, .distinct_ops, .enhanced_dat_2, @@ -256,7 +255,7 @@ pub const cpu = struct { pub const arch11 = Cpu{ .name = "arch11", .llvm_name = "arch11", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -284,7 +283,7 @@ pub const cpu = struct { pub const arch12 = Cpu{ .name = "arch12", .llvm_name = "arch12", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -319,7 +318,7 @@ pub const cpu = struct { pub const arch13 = Cpu{ .name = "arch13", .llvm_name = "arch13", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .deflate_conversion, .dfp_packed_conversion, .dfp_zoned_conversion, @@ -360,12 +359,12 @@ pub const cpu = struct { pub const arch8 = Cpu{ .name = "arch8", .llvm_name = "arch8", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const arch9 = Cpu{ .name = "arch9", .llvm_name = "arch9", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .distinct_ops, .fast_serialization, .fp_extension, @@ -381,17 +380,17 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const z10 = Cpu{ .name = "z10", .llvm_name = "z10", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const z13 = Cpu{ .name = "z13", .llvm_name = "z13", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -419,7 +418,7 @@ pub const cpu = struct { pub const z14 = Cpu{ .name = "z14", .llvm_name = "z14", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_packed_conversion, .dfp_zoned_conversion, .distinct_ops, @@ -454,7 +453,7 @@ pub const cpu = struct { pub const z196 = Cpu{ .name = "z196", .llvm_name = "z196", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .distinct_ops, .fast_serialization, .fp_extension, @@ -470,7 +469,7 @@ pub const cpu = struct { pub const zEC12 = Cpu{ .name = "zEC12", .llvm_name = "zEC12", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .dfp_zoned_conversion, .distinct_ops, .enhanced_dat_2, diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig index bd6ae8cc8f15ed30d5f6c946adc414cdd3c3b270..6d79bbb2820e8040a6ab8268e605b6cc7df35e4e 100644 --- a/lib/std/target/wasm.zig +++ b/lib/std/target/wasm.zig @@ -23,52 +23,52 @@ pub const all_features = blk: { result[@enumToInt(Feature.atomics)] = .{ .llvm_name = "atomics", .description = "Enable Atomics", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bulk_memory)] = .{ .llvm_name = "bulk-memory", .description = "Enable bulk memory operations", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.exception_handling)] = .{ .llvm_name = "exception-handling", .description = "Enable Wasm exception handling", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.multivalue)] = .{ .llvm_name = "multivalue", .description = "Enable multivalue blocks, instructions, and functions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mutable_globals)] = .{ .llvm_name = "mutable-globals", .description = "Enable mutable globals", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nontrapping_fptoint)] = .{ .llvm_name = "nontrapping-fptoint", .description = "Enable non-trapping float-to-int conversion operators", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sign_ext)] = .{ .llvm_name = "sign-ext", .description = "Enable sign extension operators", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.simd128)] = .{ .llvm_name = "simd128", .description = "Enable 128-bit SIMD", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.tail_call)] = .{ .llvm_name = "tail-call", .description = "Enable tail call instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.unimplemented_simd128)] = .{ .llvm_name = "unimplemented-simd128", .description = "Enable 128-bit SIMD not yet implemented in engines", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .simd128, }), }; @@ -76,7 +76,6 @@ pub const all_features = blk: { for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -85,7 +84,7 @@ pub const cpu = struct { pub const bleeding_edge = Cpu{ .name = "bleeding_edge", .llvm_name = "bleeding-edge", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .atomics, .mutable_globals, .nontrapping_fptoint, @@ -96,12 +95,12 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const mvp = Cpu{ .name = "mvp", .llvm_name = "mvp", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; }; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig index a576bf408256c046d4c648bdea375c4fa90eb37d..3c2e306e799738a2290fd69a5f11a2ff04884973 100644 --- a/lib/std/target/x86.zig +++ b/lib/std/target/x86.zig @@ -128,101 +128,100 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { - @setEvalBranchQuota(10000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; result[@enumToInt(Feature.@"3dnow")] = .{ .llvm_name = "3dnow", .description = "Enable 3DNow! instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .mmx, }), }; result[@enumToInt(Feature.@"3dnowa")] = .{ .llvm_name = "3dnowa", .description = "Enable 3DNow! Athlon instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .@"3dnow", }), }; result[@enumToInt(Feature.@"64bit")] = .{ .llvm_name = "64bit", .description = "Support 64-bit instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.adx)] = .{ .llvm_name = "adx", .description = "Support ADX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.aes)] = .{ .llvm_name = "aes", .description = "Enable AES instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.avx)] = .{ .llvm_name = "avx", .description = "Enable AVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse4_2, }), }; result[@enumToInt(Feature.avx2)] = .{ .llvm_name = "avx2", .description = "Enable AVX2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.avx512bf16)] = .{ .llvm_name = "avx512bf16", .description = "Support bfloat16 floating point", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512bitalg)] = .{ .llvm_name = "avx512bitalg", .description = "Enable AVX-512 Bit Algorithms", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512bw)] = .{ .llvm_name = "avx512bw", .description = "Enable AVX-512 Byte and Word Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512cd)] = .{ .llvm_name = "avx512cd", .description = "Enable AVX-512 Conflict Detection Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512dq)] = .{ .llvm_name = "avx512dq", .description = "Enable AVX-512 Doubleword and Quadword Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512er)] = .{ .llvm_name = "avx512er", .description = "Enable AVX-512 Exponential and Reciprocal Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512f)] = .{ .llvm_name = "avx512f", .description = "Enable AVX-512 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx2, .f16c, .fma, @@ -231,216 +230,216 @@ pub const all_features = blk: { result[@enumToInt(Feature.avx512ifma)] = .{ .llvm_name = "avx512ifma", .description = "Enable AVX-512 Integer Fused Multiple-Add", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512pf)] = .{ .llvm_name = "avx512pf", .description = "Enable AVX-512 PreFetch Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vbmi)] = .{ .llvm_name = "avx512vbmi", .description = "Enable AVX-512 Vector Byte Manipulation Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512vbmi2)] = .{ .llvm_name = "avx512vbmi2", .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512bw, }), }; result[@enumToInt(Feature.avx512vl)] = .{ .llvm_name = "avx512vl", .description = "Enable AVX-512 Vector Length eXtensions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vnni)] = .{ .llvm_name = "avx512vnni", .description = "Enable AVX-512 Vector Neural Network Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vp2intersect)] = .{ .llvm_name = "avx512vp2intersect", .description = "Enable AVX-512 vp2intersect", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.avx512vpopcntdq)] = .{ .llvm_name = "avx512vpopcntdq", .description = "Enable AVX-512 Population Count Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx512f, }), }; result[@enumToInt(Feature.bmi)] = .{ .llvm_name = "bmi", .description = "Support BMI instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.bmi2)] = .{ .llvm_name = "bmi2", .description = "Support BMI2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.branchfusion)] = .{ .llvm_name = "branchfusion", .description = "CMP/TEST can be fused with conditional branches", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cldemote)] = .{ .llvm_name = "cldemote", .description = "Enable Cache Demote", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clflushopt)] = .{ .llvm_name = "clflushopt", .description = "Flush A Cache Line Optimized", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clwb)] = .{ .llvm_name = "clwb", .description = "Cache Line Write Back", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.clzero)] = .{ .llvm_name = "clzero", .description = "Enable Cache Line Zero", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cmov)] = .{ .llvm_name = "cmov", .description = "Enable conditional move instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.cx16)] = .{ .llvm_name = "cx16", .description = "64-bit with cmpxchg16b", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .cx8, }), }; result[@enumToInt(Feature.cx8)] = .{ .llvm_name = "cx8", .description = "Support CMPXCHG8B instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.enqcmd)] = .{ .llvm_name = "enqcmd", .description = "Has ENQCMD instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ermsb)] = .{ .llvm_name = "ermsb", .description = "REP MOVS/STOS are fast", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.f16c)] = .{ .llvm_name = "f16c", .description = "Support 16-bit floating point conversion instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{ .llvm_name = "false-deps-lzcnt-tzcnt", .description = "LZCNT/TZCNT have a false dependency on dest register", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.false_deps_popcnt)] = .{ .llvm_name = "false-deps-popcnt", .description = "POPCNT has a false dependency on dest register", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_11bytenop)] = .{ .llvm_name = "fast-11bytenop", .description = "Target can quickly decode up to 11 byte NOPs", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_15bytenop)] = .{ .llvm_name = "fast-15bytenop", .description = "Target can quickly decode up to 15 byte NOPs", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_bextr)] = .{ .llvm_name = "fast-bextr", .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_gather)] = .{ .llvm_name = "fast-gather", .description = "Indicates if gather is reasonably fast", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_hops)] = .{ .llvm_name = "fast-hops", .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.fast_lzcnt)] = .{ .llvm_name = "fast-lzcnt", .description = "LZCNT instructions are as fast as most simple integer ops", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{ .llvm_name = "fast-partial-ymm-or-zmm-write", .description = "Partial writes to YMM/ZMM registers are fast", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{ .llvm_name = "fast-scalar-fsqrt", .description = "Scalar SQRT is fast (disable Newton-Raphson)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{ .llvm_name = "fast-scalar-shift-masks", .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_shld_rotate)] = .{ .llvm_name = "fast-shld-rotate", .description = "SHLD can be used as a faster rotate", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_variable_shuffle)] = .{ .llvm_name = "fast-variable-shuffle", .description = "Shuffles with variable masks are fast", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_fsqrt)] = .{ .llvm_name = "fast-vector-fsqrt", .description = "Vector SQRT is fast (disable Newton-Raphson)", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fast_vector_shift_masks)] = .{ .llvm_name = "fast-vector-shift-masks", .description = "Prefer a left/right vector logical shift pair over a shift+and pair", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fma)] = .{ .llvm_name = "fma", .description = "Enable three-operand fused multiple-add", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx, }), }; result[@enumToInt(Feature.fma4)] = .{ .llvm_name = "fma4", .description = "Enable four-operand fused multiple-add", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx, .sse4a, }), @@ -448,166 +447,166 @@ pub const all_features = blk: { result[@enumToInt(Feature.fsgsbase)] = .{ .llvm_name = "fsgsbase", .description = "Support FS/GS Base instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.fxsr)] = .{ .llvm_name = "fxsr", .description = "Support fxsave/fxrestore instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.gfni)] = .{ .llvm_name = "gfni", .description = "Enable Galois Field Arithmetic Instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.idivl_to_divb)] = .{ .llvm_name = "idivl-to-divb", .description = "Use 8-bit divide for positive values less than 256", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.idivq_to_divl)] = .{ .llvm_name = "idivq-to-divl", .description = "Use 32-bit divide for positive values less than 2^32", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.invpcid)] = .{ .llvm_name = "invpcid", .description = "Invalidate Process-Context Identifier", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_sp)] = .{ .llvm_name = "lea-sp", .description = "Use LEA for adjusting the stack pointer", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lea_uses_ag)] = .{ .llvm_name = "lea-uses-ag", .description = "LEA instruction needs inputs at AG stage", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lwp)] = .{ .llvm_name = "lwp", .description = "Enable LWP instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.lzcnt)] = .{ .llvm_name = "lzcnt", .description = "Support LZCNT instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.macrofusion)] = .{ .llvm_name = "macrofusion", .description = "Various instructions can be fused with conditional branches", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.merge_to_threeway_branch)] = .{ .llvm_name = "merge-to-threeway-branch", .description = "Merge branches to a three-way conditional branch", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mmx)] = .{ .llvm_name = "mmx", .description = "Enable MMX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movbe)] = .{ .llvm_name = "movbe", .description = "Support MOVBE instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdir64b)] = .{ .llvm_name = "movdir64b", .description = "Support movdir64b instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.movdiri)] = .{ .llvm_name = "movdiri", .description = "Support movdiri instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mpx)] = .{ .llvm_name = "mpx", .description = "Support MPX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.mwaitx)] = .{ .llvm_name = "mwaitx", .description = "Enable MONITORX/MWAITX timer functionality", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.nopl)] = .{ .llvm_name = "nopl", .description = "Enable NOPL instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pad_short_functions)] = .{ .llvm_name = "pad-short-functions", .description = "Pad short functions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pclmul)] = .{ .llvm_name = "pclmul", .description = "Enable packed carry-less multiplication instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.pconfig)] = .{ .llvm_name = "pconfig", .description = "platform configuration instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.pku)] = .{ .llvm_name = "pku", .description = "Enable protection keys", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.popcnt)] = .{ .llvm_name = "popcnt", .description = "Support POPCNT instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefer_256_bit)] = .{ .llvm_name = "prefer-256-bit", .description = "Prefer 256-bit AVX instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prefetchwt1)] = .{ .llvm_name = "prefetchwt1", .description = "Prefetch with Intent to Write and T1 Hint", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.prfchw)] = .{ .llvm_name = "prfchw", .description = "Support PRFCHW instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.ptwrite)] = .{ .llvm_name = "ptwrite", .description = "Support ptwrite instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdpid)] = .{ .llvm_name = "rdpid", .description = "Support RDPID instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdrnd)] = .{ .llvm_name = "rdrnd", .description = "Support RDRAND instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rdseed)] = .{ .llvm_name = "rdseed", .description = "Support RDSEED instruction", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline)] = .{ .llvm_name = "retpoline", .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .retpoline_indirect_branches, .retpoline_indirect_calls, }), @@ -615,158 +614,158 @@ pub const all_features = blk: { result[@enumToInt(Feature.retpoline_external_thunk)] = .{ .llvm_name = "retpoline-external-thunk", .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .retpoline_indirect_calls, }), }; result[@enumToInt(Feature.retpoline_indirect_branches)] = .{ .llvm_name = "retpoline-indirect-branches", .description = "Remove speculation of indirect branches from the generated code", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.retpoline_indirect_calls)] = .{ .llvm_name = "retpoline-indirect-calls", .description = "Remove speculation of indirect calls from the generated code", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.rtm)] = .{ .llvm_name = "rtm", .description = "Support RTM instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sahf)] = .{ .llvm_name = "sahf", .description = "Support LAHF and SAHF instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sgx)] = .{ .llvm_name = "sgx", .description = "Enable Software Guard Extensions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sha)] = .{ .llvm_name = "sha", .description = "Enable SHA instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.shstk)] = .{ .llvm_name = "shstk", .description = "Support CET Shadow-Stack instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_3ops_lea)] = .{ .llvm_name = "slow-3ops-lea", .description = "LEA instruction with 3 ops or certain registers is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_incdec)] = .{ .llvm_name = "slow-incdec", .description = "INC and DEC instructions are slower than ADD and SUB", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_lea)] = .{ .llvm_name = "slow-lea", .description = "LEA instruction with certain arguments is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmaddwd)] = .{ .llvm_name = "slow-pmaddwd", .description = "PMADDWD is slower than PMULLD", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_pmulld)] = .{ .llvm_name = "slow-pmulld", .description = "PMULLD instruction is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_shld)] = .{ .llvm_name = "slow-shld", .description = "SHLD instruction is slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_two_mem_ops)] = .{ .llvm_name = "slow-two-mem-ops", .description = "Two memory operand instructions are slow", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{ .llvm_name = "slow-unaligned-mem-16", .description = "Slow unaligned 16-byte memory access", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{ .llvm_name = "slow-unaligned-mem-32", .description = "Slow unaligned 32-byte memory access", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.soft_float)] = .{ .llvm_name = "soft-float", .description = "Use software floating point features", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse)] = .{ .llvm_name = "sse", .description = "Enable SSE instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse_unaligned_mem)] = .{ .llvm_name = "sse-unaligned-mem", .description = "Allow unaligned memory operands with SSE instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.sse2)] = .{ .llvm_name = "sse2", .description = "Enable SSE2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse, }), }; result[@enumToInt(Feature.sse3)] = .{ .llvm_name = "sse3", .description = "Enable SSE3 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse2, }), }; result[@enumToInt(Feature.sse4_1)] = .{ .llvm_name = "sse4.1", .description = "Enable SSE 4.1 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .ssse3, }), }; result[@enumToInt(Feature.sse4_2)] = .{ .llvm_name = "sse4.2", .description = "Enable SSE 4.2 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse4_1, }), }; result[@enumToInt(Feature.sse4a)] = .{ .llvm_name = "sse4a", .description = "Support SSE 4a instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.ssse3)] = .{ .llvm_name = "ssse3", .description = "Enable SSSE3 instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .sse3, }), }; result[@enumToInt(Feature.tbm)] = .{ .llvm_name = "tbm", .description = "Enable TBM instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.vaes)] = .{ .llvm_name = "vaes", .description = "Promote selected AES instructions to AVX512/AVX registers", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .aes, .avx, }), @@ -774,7 +773,7 @@ pub const all_features = blk: { result[@enumToInt(Feature.vpclmulqdq)] = .{ .llvm_name = "vpclmulqdq", .description = "Enable vpclmulqdq instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .avx, .pclmul, }), @@ -782,50 +781,49 @@ pub const all_features = blk: { result[@enumToInt(Feature.waitpkg)] = .{ .llvm_name = "waitpkg", .description = "Wait and pause enhancements", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.wbnoinvd)] = .{ .llvm_name = "wbnoinvd", .description = "Write Back No Invalidate", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.x87)] = .{ .llvm_name = "x87", .description = "Enable X87 float instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xop)] = .{ .llvm_name = "xop", .description = "Enable XOP instructions", - .dependencies = sparseFeatureSet(&[_]Feature{ + .dependencies = featureSet(&[_]Feature{ .fma4, }), }; result[@enumToInt(Feature.xsave)] = .{ .llvm_name = "xsave", .description = "Support xsave instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsavec)] = .{ .llvm_name = "xsavec", .description = "Support xsavec instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaveopt)] = .{ .llvm_name = "xsaveopt", .description = "Support xsaveopt instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; result[@enumToInt(Feature.xsaves)] = .{ .llvm_name = "xsaves", .description = "Support xsaves instructions", - .dependencies = sparseFeatureSet(&[_]Feature{}), + .dependencies = featureSet(&[_]Feature{}), }; const ti = @typeInfo(Feature); for (result) |*elem, i| { elem.index = i; elem.name = ti.Enum.fields[i].name; - elem.dependencies.initAsDependencies(i, &result); } break :blk result; }; @@ -834,7 +832,7 @@ pub const cpu = struct { pub const amdfam10 = Cpu{ .name = "amdfam10", .llvm_name = "amdfam10", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -854,7 +852,7 @@ pub const cpu = struct { pub const athlon = Cpu{ .name = "athlon", .llvm_name = "athlon", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -867,7 +865,7 @@ pub const cpu = struct { pub const athlon_4 = Cpu{ .name = "athlon_4", .llvm_name = "athlon-4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -882,7 +880,7 @@ pub const cpu = struct { pub const athlon_fx = Cpu{ .name = "athlon_fx", .llvm_name = "athlon-fx", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -899,7 +897,7 @@ pub const cpu = struct { pub const athlon_mp = Cpu{ .name = "athlon_mp", .llvm_name = "athlon-mp", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -914,7 +912,7 @@ pub const cpu = struct { pub const athlon_tbird = Cpu{ .name = "athlon_tbird", .llvm_name = "athlon-tbird", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -927,7 +925,7 @@ pub const cpu = struct { pub const athlon_xp = Cpu{ .name = "athlon_xp", .llvm_name = "athlon-xp", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cmov, .cx8, @@ -942,7 +940,7 @@ pub const cpu = struct { pub const athlon64 = Cpu{ .name = "athlon64", .llvm_name = "athlon64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -959,7 +957,7 @@ pub const cpu = struct { pub const athlon64_sse3 = Cpu{ .name = "athlon64_sse3", .llvm_name = "athlon64-sse3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -977,7 +975,7 @@ pub const cpu = struct { pub const atom = Cpu{ .name = "atom", .llvm_name = "atom", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1001,7 +999,7 @@ pub const cpu = struct { pub const barcelona = Cpu{ .name = "barcelona", .llvm_name = "barcelona", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -1021,7 +1019,7 @@ pub const cpu = struct { pub const bdver1 = Cpu{ .name = "bdver1", .llvm_name = "bdver1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .branchfusion, @@ -1048,7 +1046,7 @@ pub const cpu = struct { pub const bdver2 = Cpu{ .name = "bdver2", .llvm_name = "bdver2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .bmi, @@ -1080,7 +1078,7 @@ pub const cpu = struct { pub const bdver3 = Cpu{ .name = "bdver3", .llvm_name = "bdver3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .bmi, @@ -1114,7 +1112,7 @@ pub const cpu = struct { pub const bdver4 = Cpu{ .name = "bdver4", .llvm_name = "bdver4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .avx2, @@ -1151,7 +1149,7 @@ pub const cpu = struct { pub const bonnell = Cpu{ .name = "bonnell", .llvm_name = "bonnell", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1175,7 +1173,7 @@ pub const cpu = struct { pub const broadwell = Cpu{ .name = "broadwell", .llvm_name = "broadwell", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .avx, @@ -1219,7 +1217,7 @@ pub const cpu = struct { pub const btver1 = Cpu{ .name = "btver1", .llvm_name = "btver1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1243,7 +1241,7 @@ pub const cpu = struct { pub const btver2 = Cpu{ .name = "btver2", .llvm_name = "btver2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .avx, @@ -1279,7 +1277,7 @@ pub const cpu = struct { pub const c3 = Cpu{ .name = "c3", .llvm_name = "c3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnow", .slow_unaligned_mem_16, .x87, @@ -1288,7 +1286,7 @@ pub const cpu = struct { pub const c3_2 = Cpu{ .name = "c3_2", .llvm_name = "c3-2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -1301,7 +1299,7 @@ pub const cpu = struct { pub const cannonlake = Cpu{ .name = "cannonlake", .llvm_name = "cannonlake", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -1360,7 +1358,7 @@ pub const cpu = struct { pub const cascadelake = Cpu{ .name = "cascadelake", .llvm_name = "cascadelake", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -1418,7 +1416,7 @@ pub const cpu = struct { pub const cooperlake = Cpu{ .name = "cooperlake", .llvm_name = "cooperlake", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -1477,7 +1475,7 @@ pub const cpu = struct { pub const core_avx_i = Cpu{ .name = "core_avx_i", .llvm_name = "core-avx-i", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .cmov, @@ -1509,7 +1507,7 @@ pub const cpu = struct { pub const core_avx2 = Cpu{ .name = "core_avx2", .llvm_name = "core-avx2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .avx2, @@ -1550,7 +1548,7 @@ pub const cpu = struct { pub const core2 = Cpu{ .name = "core2", .llvm_name = "core2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1568,7 +1566,7 @@ pub const cpu = struct { pub const corei7 = Cpu{ .name = "corei7", .llvm_name = "corei7", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -1586,7 +1584,7 @@ pub const cpu = struct { pub const corei7_avx = Cpu{ .name = "corei7_avx", .llvm_name = "corei7-avx", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .cmov, @@ -1615,7 +1613,7 @@ pub const cpu = struct { pub const generic = Cpu{ .name = "generic", .llvm_name = "generic", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -1624,7 +1622,7 @@ pub const cpu = struct { pub const geode = Cpu{ .name = "geode", .llvm_name = "geode", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .cx8, .slow_unaligned_mem_16, @@ -1634,7 +1632,7 @@ pub const cpu = struct { pub const goldmont = Cpu{ .name = "goldmont", .llvm_name = "goldmont", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .clflushopt, @@ -1670,7 +1668,7 @@ pub const cpu = struct { pub const goldmont_plus = Cpu{ .name = "goldmont_plus", .llvm_name = "goldmont-plus", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .clflushopt, @@ -1708,7 +1706,7 @@ pub const cpu = struct { pub const haswell = Cpu{ .name = "haswell", .llvm_name = "haswell", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .avx2, @@ -1749,7 +1747,7 @@ pub const cpu = struct { pub const _i386 = Cpu{ .name = "_i386", .llvm_name = "i386", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .slow_unaligned_mem_16, .x87, }), @@ -1757,7 +1755,7 @@ pub const cpu = struct { pub const _i486 = Cpu{ .name = "_i486", .llvm_name = "i486", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .slow_unaligned_mem_16, .x87, }), @@ -1765,7 +1763,7 @@ pub const cpu = struct { pub const _i586 = Cpu{ .name = "_i586", .llvm_name = "i586", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -1774,7 +1772,7 @@ pub const cpu = struct { pub const _i686 = Cpu{ .name = "_i686", .llvm_name = "i686", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .slow_unaligned_mem_16, @@ -1784,7 +1782,7 @@ pub const cpu = struct { pub const icelake_client = Cpu{ .name = "icelake_client", .llvm_name = "icelake-client", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -1852,7 +1850,7 @@ pub const cpu = struct { pub const icelake_server = Cpu{ .name = "icelake_server", .llvm_name = "icelake-server", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -1922,7 +1920,7 @@ pub const cpu = struct { pub const ivybridge = Cpu{ .name = "ivybridge", .llvm_name = "ivybridge", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .cmov, @@ -1954,7 +1952,7 @@ pub const cpu = struct { pub const k6 = Cpu{ .name = "k6", .llvm_name = "k6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -1964,7 +1962,7 @@ pub const cpu = struct { pub const k6_2 = Cpu{ .name = "k6_2", .llvm_name = "k6-2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnow", .cx8, .slow_unaligned_mem_16, @@ -1974,7 +1972,7 @@ pub const cpu = struct { pub const k6_3 = Cpu{ .name = "k6_3", .llvm_name = "k6-3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnow", .cx8, .slow_unaligned_mem_16, @@ -1984,7 +1982,7 @@ pub const cpu = struct { pub const k8 = Cpu{ .name = "k8", .llvm_name = "k8", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2001,7 +1999,7 @@ pub const cpu = struct { pub const k8_sse3 = Cpu{ .name = "k8_sse3", .llvm_name = "k8-sse3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2019,7 +2017,7 @@ pub const cpu = struct { pub const knl = Cpu{ .name = "knl", .llvm_name = "knl", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2062,7 +2060,7 @@ pub const cpu = struct { pub const knm = Cpu{ .name = "knm", .llvm_name = "knm", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2106,12 +2104,12 @@ pub const cpu = struct { pub const lakemont = Cpu{ .name = "lakemont", .llvm_name = "lakemont", - .features = featureSet(&all_features, &[_]Feature{}), + .features = featureSet(&[_]Feature{}), }; pub const nehalem = Cpu{ .name = "nehalem", .llvm_name = "nehalem", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2129,7 +2127,7 @@ pub const cpu = struct { pub const nocona = Cpu{ .name = "nocona", .llvm_name = "nocona", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2145,7 +2143,7 @@ pub const cpu = struct { pub const opteron = Cpu{ .name = "opteron", .llvm_name = "opteron", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2162,7 +2160,7 @@ pub const cpu = struct { pub const opteron_sse3 = Cpu{ .name = "opteron_sse3", .llvm_name = "opteron-sse3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnowa", .@"64bit", .cmov, @@ -2180,7 +2178,7 @@ pub const cpu = struct { pub const penryn = Cpu{ .name = "penryn", .llvm_name = "penryn", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2198,7 +2196,7 @@ pub const cpu = struct { pub const pentium = Cpu{ .name = "pentium", .llvm_name = "pentium", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .slow_unaligned_mem_16, .x87, @@ -2207,7 +2205,7 @@ pub const cpu = struct { pub const pentium_m = Cpu{ .name = "pentium_m", .llvm_name = "pentium-m", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2221,7 +2219,7 @@ pub const cpu = struct { pub const pentium_mmx = Cpu{ .name = "pentium_mmx", .llvm_name = "pentium-mmx", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cx8, .mmx, .slow_unaligned_mem_16, @@ -2231,7 +2229,7 @@ pub const cpu = struct { pub const pentium2 = Cpu{ .name = "pentium2", .llvm_name = "pentium2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2244,7 +2242,7 @@ pub const cpu = struct { pub const pentium3 = Cpu{ .name = "pentium3", .llvm_name = "pentium3", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2258,7 +2256,7 @@ pub const cpu = struct { pub const pentium3m = Cpu{ .name = "pentium3m", .llvm_name = "pentium3m", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2272,7 +2270,7 @@ pub const cpu = struct { pub const pentium4 = Cpu{ .name = "pentium4", .llvm_name = "pentium4", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2286,7 +2284,7 @@ pub const cpu = struct { pub const pentium4m = Cpu{ .name = "pentium4m", .llvm_name = "pentium4m", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2300,7 +2298,7 @@ pub const cpu = struct { pub const pentiumpro = Cpu{ .name = "pentiumpro", .llvm_name = "pentiumpro", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .nopl, @@ -2311,7 +2309,7 @@ pub const cpu = struct { pub const prescott = Cpu{ .name = "prescott", .llvm_name = "prescott", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2325,7 +2323,7 @@ pub const cpu = struct { pub const sandybridge = Cpu{ .name = "sandybridge", .llvm_name = "sandybridge", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .avx, .cmov, @@ -2354,7 +2352,7 @@ pub const cpu = struct { pub const silvermont = Cpu{ .name = "silvermont", .llvm_name = "silvermont", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2382,7 +2380,7 @@ pub const cpu = struct { pub const skx = Cpu{ .name = "skx", .llvm_name = "skx", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2439,7 +2437,7 @@ pub const cpu = struct { pub const skylake = Cpu{ .name = "skylake", .llvm_name = "skylake", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2490,7 +2488,7 @@ pub const cpu = struct { pub const skylake_avx512 = Cpu{ .name = "skylake_avx512", .llvm_name = "skylake-avx512", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2547,7 +2545,7 @@ pub const cpu = struct { pub const slm = Cpu{ .name = "slm", .llvm_name = "slm", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2575,7 +2573,7 @@ pub const cpu = struct { pub const tremont = Cpu{ .name = "tremont", .llvm_name = "tremont", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .aes, .cldemote, @@ -2618,7 +2616,7 @@ pub const cpu = struct { pub const westmere = Cpu{ .name = "westmere", .llvm_name = "westmere", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx16, @@ -2637,7 +2635,7 @@ pub const cpu = struct { pub const winchip_c6 = Cpu{ .name = "winchip_c6", .llvm_name = "winchip-c6", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .mmx, .slow_unaligned_mem_16, .x87, @@ -2646,7 +2644,7 @@ pub const cpu = struct { pub const winchip2 = Cpu{ .name = "winchip2", .llvm_name = "winchip2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"3dnow", .slow_unaligned_mem_16, .x87, @@ -2655,7 +2653,7 @@ pub const cpu = struct { pub const x86_64 = Cpu{ .name = "x86_64", .llvm_name = "x86-64", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .cmov, .cx8, @@ -2672,7 +2670,7 @@ pub const cpu = struct { pub const yonah = Cpu{ .name = "yonah", .llvm_name = "yonah", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .cmov, .cx8, .fxsr, @@ -2686,7 +2684,7 @@ pub const cpu = struct { pub const znver1 = Cpu{ .name = "znver1", .llvm_name = "znver1", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, @@ -2730,7 +2728,7 @@ pub const cpu = struct { pub const znver2 = Cpu{ .name = "znver2", .llvm_name = "znver2", - .features = featureSet(&all_features, &[_]Feature{ + .features = featureSet(&[_]Feature{ .@"64bit", .adx, .aes, diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index e6aa97f32c69915da3c7aadb40a21514976181a7..e6756a34583bd76c0d6054b6b207c5884a61822a 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -581,8 +581,8 @@ fn cpuFeaturesFromLLVM( const this_llvm_name = feature.llvm_name orelse continue; if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { - .add => set.addSparseFeature(@intCast(u8, index)), - .sub => set.removeSparseFeature(@intCast(u8, index)), + .add => set.addFeature(@intCast(u8, index)), + .sub => set.removeFeature(@intCast(u8, index)), } break; } @@ -701,8 +701,9 @@ const Stage2CpuFeatures = struct { const all_features = arch.allFeaturesList(); var populated_feature_set = feature_set; if (arch.subArchFeature()) |sub_arch_index| { - populated_feature_set.addFeature(sub_arch_index, all_features); + populated_feature_set.addFeature(sub_arch_index); } + populated_feature_set.populateDependencies(all_features); for (all_features) |feature, index| { const llvm_name = feature.llvm_name orelse continue; const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))]; -- 2.54.0 From 6e6ec3d71d1b5ecff8ad6bff5e159417abfa5382 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 21:01:36 -0500 Subject: [PATCH 50/63] put hack back in to disable windows native cpu features See #508. This can be removed when we upgrade to LLVM 10. --- src-self-hosted/stage1.zig | 23 +++++++++++++++++------ src/codegen.cpp | 6 +++--- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index e6756a34583bd76c0d6054b6b207c5884a61822a..c1c48753a102d55a8d47426587f4af2d385e19ad 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -659,11 +659,20 @@ const Stage2CpuFeatures = struct { const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); const arch = target.Cross.arch; const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features); - switch (cpu_features) { - .baseline => return createBaseline(allocator, arch), - .cpu => |cpu| return createFromCpu(allocator, arch, cpu), - .features => |features| return createFromCpuFeatures(allocator, arch, features), + const result = switch (cpu_features) { + .baseline => try createBaseline(allocator, arch), + .cpu => |cpu| try createFromCpu(allocator, arch, cpu), + .features => |features| try createFromCpuFeatures(allocator, arch, features), + }; + // LLVM creates invalid binaries on Windows sometimes. + // See https://github.com/ziglang/zig/issues/508 + // As a workaround we do not use target native features on Windows. + // This logic is repeated in codegen.cpp + if (target.isWindows() or target.isUefi()) { + result.llvm_cpu_name = ""; + result.llvm_features_str = ""; } + return result; } fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self { @@ -742,9 +751,11 @@ const Stage2CpuFeatures = struct { for (arch.allFeaturesList()) |feature, index| { if (!feature_set.isEnabled(@intCast(u8, index))) continue; - try builtin_str_buffer.append(" ."); + // TODO some kind of "zig identifier escape" function rather than + // unconditionally using @"" syntax + try builtin_str_buffer.append(" .@\""); try builtin_str_buffer.append(feature.name); - try builtin_str_buffer.append(",\n"); + try builtin_str_buffer.append("\",\n"); } try builtin_str_buffer.append( diff --git a/src/codegen.cpp b/src/codegen.cpp index f7cfc95b3aa58b66579a5ae2ce4da4456b9a4224..c2dcdb38b8e6bef3740d7d0721cd88a935bd1f14 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8785,15 +8785,15 @@ static void init(CodeGen *g) { const char *target_specific_features = ""; if (g->zig_target->is_native) { + target_specific_cpu_args = ZigLLVMGetHostCPUName(); + target_specific_features = ZigLLVMGetNativeFeatures(); // LLVM creates invalid binaries on Windows sometimes. // See https://github.com/ziglang/zig/issues/508 // As a workaround we do not use target native features on Windows. + // This logic is repeated in stage1.zig if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) { target_specific_cpu_args = ""; target_specific_features = ""; - } else { - target_specific_cpu_args = ZigLLVMGetHostCPUName(); - target_specific_features = ZigLLVMGetNativeFeatures(); } } -- 2.54.0 From 4640ef589e8fddcab7aeab2c6044bc031cf33515 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 21:02:33 -0500 Subject: [PATCH 51/63] tests: use an older aarch64 sub-arch to avoid an illegal instruction error with the older qemu version that is available on the CI server. --- test/tests.zig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/test/tests.zig b/test/tests.zig index 7c97e46e0280d7494807eb6bafe1592372552920..fb30f064cce3e1872f8c39195019ae999a784f43 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -101,7 +101,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, .abi = .none, }, }, @@ -110,7 +110,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, .abi = .musl, }, }, @@ -120,7 +120,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, .abi = .gnu, }, }, -- 2.54.0 From 830e0ba2d27b55f999a891d007b24131b790e8c9 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 21:46:06 -0500 Subject: [PATCH 52/63] enable native CPU feature for windows; disable failing tests See #508. These can be re-enabled when we upgrade to LLVM 10. --- lib/std/fmt/parse_float.zig | 4 ++++ lib/std/io/test.zig | 4 ++++ lib/std/math/fabs.zig | 4 ++++ lib/std/math/isinf.zig | 12 ++++++++++++ lib/std/math/isnan.zig | 4 ++++ src-self-hosted/stage1.zig | 17 ++++------------- src/codegen.cpp | 8 -------- test/stage1/behavior/math.zig | 8 ++++++++ 8 files changed, 40 insertions(+), 21 deletions(-) diff --git a/lib/std/fmt/parse_float.zig b/lib/std/fmt/parse_float.zig index 2c480852ac5d79f369f61a7bc85000856b20c887..1456dd8e57c318891cdcbb82799d7d07c1c5769b 100644 --- a/lib/std/fmt/parse_float.zig +++ b/lib/std/fmt/parse_float.zig @@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T { } test "fmt.parseFloat" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } const testing = std.testing; const expect = testing.expect; const expectEqual = testing.expectEqual; diff --git a/lib/std/io/test.zig b/lib/std/io/test.zig index 92259fd6e923df2c615c1fed09f257c09fa373bb..21ebd723c46ef915a67176b05c35786ac399d76e 100644 --- a/lib/std/io/test.zig +++ b/lib/std/io/test.zig @@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing: } test "Serializer/Deserializer generic" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } try testSerializerDeserializer(builtin.Endian.Big, .Byte); try testSerializerDeserializer(builtin.Endian.Little, .Byte); try testSerializerDeserializer(builtin.Endian.Big, .Bit); diff --git a/lib/std/math/fabs.zig b/lib/std/math/fabs.zig index a659e35ca21e8ab661ef063302ef2d44048d7acd..61692283e633b8b44651a21891e12be95c331e39 100644 --- a/lib/std/math/fabs.zig +++ b/lib/std/math/fabs.zig @@ -95,6 +95,10 @@ test "math.fabs64.special" { } test "math.fabs128.special" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } expect(math.isPositiveInf(fabs(math.inf(f128)))); expect(math.isPositiveInf(fabs(-math.inf(f128)))); expect(math.isNan(fabs(math.nan(f128)))); diff --git a/lib/std/math/isinf.zig b/lib/std/math/isinf.zig index 6eacab52adfcdf898d628f453d02bf5b13941480..eeac61915cd325e903e871b4b3f80bc32c026bbe 100644 --- a/lib/std/math/isinf.zig +++ b/lib/std/math/isinf.zig @@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool { } test "math.isInf" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } expect(!isInf(@as(f16, 0.0))); expect(!isInf(@as(f16, -0.0))); expect(!isInf(@as(f32, 0.0))); @@ -93,6 +97,10 @@ test "math.isInf" { } test "math.isPositiveInf" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } expect(!isPositiveInf(@as(f16, 0.0))); expect(!isPositiveInf(@as(f16, -0.0))); expect(!isPositiveInf(@as(f32, 0.0))); @@ -112,6 +120,10 @@ test "math.isPositiveInf" { } test "math.isNegativeInf" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } expect(!isNegativeInf(@as(f16, 0.0))); expect(!isNegativeInf(@as(f16, -0.0))); expect(!isNegativeInf(@as(f32, 0.0))); diff --git a/lib/std/math/isnan.zig b/lib/std/math/isnan.zig index ac865f0d0c60ba7a8430bb93de3c6729f3701560..4b7e69490a3a31880a829d1fc9024f1f41368600 100644 --- a/lib/std/math/isnan.zig +++ b/lib/std/math/isnan.zig @@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool { } test "math.isNan" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } expect(isNan(math.nan(f16))); expect(isNan(math.nan(f32))); expect(isNan(math.nan(f64))); diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index c1c48753a102d55a8d47426587f4af2d385e19ad..e47103399c68eac25d00a108c34cb34c6122a1ad 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -659,20 +659,11 @@ const Stage2CpuFeatures = struct { const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); const arch = target.Cross.arch; const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features); - const result = switch (cpu_features) { - .baseline => try createBaseline(allocator, arch), - .cpu => |cpu| try createFromCpu(allocator, arch, cpu), - .features => |features| try createFromCpuFeatures(allocator, arch, features), - }; - // LLVM creates invalid binaries on Windows sometimes. - // See https://github.com/ziglang/zig/issues/508 - // As a workaround we do not use target native features on Windows. - // This logic is repeated in codegen.cpp - if (target.isWindows() or target.isUefi()) { - result.llvm_cpu_name = ""; - result.llvm_features_str = ""; + switch (cpu_features) { + .baseline => return createBaseline(allocator, arch), + .cpu => |cpu| return createFromCpu(allocator, arch, cpu), + .features => |features| return createFromCpuFeatures(allocator, arch, features), } - return result; } fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self { diff --git a/src/codegen.cpp b/src/codegen.cpp index c2dcdb38b8e6bef3740d7d0721cd88a935bd1f14..bb14d39a91808b9babd1d4f0df0e273fde09143e 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8787,14 +8787,6 @@ static void init(CodeGen *g) { if (g->zig_target->is_native) { target_specific_cpu_args = ZigLLVMGetHostCPUName(); target_specific_features = ZigLLVMGetNativeFeatures(); - // LLVM creates invalid binaries on Windows sometimes. - // See https://github.com/ziglang/zig/issues/508 - // As a workaround we do not use target native features on Windows. - // This logic is repeated in stage1.zig - if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) { - target_specific_cpu_args = ""; - target_specific_features = ""; - } } // Override CPU and features if defined by user. diff --git a/test/stage1/behavior/math.zig b/test/stage1/behavior/math.zig index e00b1a83faca921da8a56f81dc0813eab8d33174..228311878785347cf60b6dbdd823abb338843124 100644 --- a/test/stage1/behavior/math.zig +++ b/test/stage1/behavior/math.zig @@ -529,6 +529,10 @@ test "comptime_int xor" { } test "f128" { + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test_f128(); comptime test_f128(); } @@ -627,6 +631,10 @@ test "NaN comparison" { // TODO: https://github.com/ziglang/zig/issues/3338 return error.SkipZigTest; } + if (std.Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } testNanEqNan(f16); testNanEqNan(f32); testNanEqNan(f64); -- 2.54.0 From cbe9a51518db6f4e77a4f8c72e8cd9cd02fa7f49 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 22:01:24 -0500 Subject: [PATCH 53/63] don't trust llvm's GetHostCPUName comment from this commit reproduced here: I have observed the CPU name reported by LLVM being incorrect. On the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp", which is a 32-bit CPU, even though the system is 64-bit and the reported CPU features include, among other things, +64bit. So the strategy taken here is that we observe both reported CPU, and the reported CPU features. The features are trusted more; but if the features match exactly the features of the reported CPU, then we trust the reported CPU. --- lib/std/target.zig | 4 ++++ src-self-hosted/stage1.zig | 43 +++++++++++++++++++++++++++----------- 2 files changed, 35 insertions(+), 12 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 49913de2ee0f6876e334a27a863cdca1e71258d2..e72a1a8452230a4cbd0f611c5b28b6eb3a6ed197 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -637,6 +637,10 @@ pub const Target = union(enum) { pub fn asBytes(set: *const Set) *const [byte_count]u8 { return @ptrCast(*const [byte_count]u8, &set.ints); } + + pub fn eql(set: Set, other: Set) bool { + return mem.eql(usize, &set.ints, &other.ints); + } }; pub fn feature_set_fns(comptime F: type) type { diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index e47103399c68eac25d00a108c34cb34c6122a1ad..e80b6ba1232059c88d4fa0a506924efd68ec5226 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -540,27 +540,25 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.context.maybeRefresh(); } +/// I have observed the CPU name reported by LLVM being incorrect. On +/// the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp", +/// which is a 32-bit CPU, even though the system is 64-bit and the reported +/// CPU features include, among other things, +64bit. +/// So the strategy taken here is that we observe both reported CPU, and the +/// reported CPU features. The features are trusted more; but if the features +/// match exactly the features of the reported CPU, then we trust the reported CPU. fn cpuFeaturesFromLLVM( arch: Target.Arch, llvm_cpu_name_z: ?[*:0]const u8, llvm_cpu_features_opt: ?[*:0]const u8, ) !Target.CpuFeatures { - if (llvm_cpu_name_z) |cpu_name_z| { - const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z); - - for (arch.allCpus()) |cpu| { - const this_llvm_name = cpu.llvm_name orelse continue; - if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { - return Target.CpuFeatures{ .cpu = cpu }; - } - } - } - var set = arch.baselineFeatures(); const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{ .features = set, }; + const all_features = arch.allFeaturesList(); + var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); while (it.next()) |decorated_llvm_feat| { var op: enum { @@ -577,7 +575,7 @@ fn cpuFeaturesFromLLVM( } else { return error.InvalidLlvmCpuFeaturesFormat; } - for (arch.allFeaturesList()) |feature, index| { + for (all_features) |feature, index| { const this_llvm_name = feature.llvm_name orelse continue; if (mem.eql(u8, llvm_feat, this_llvm_name)) { switch (op) { @@ -588,6 +586,27 @@ fn cpuFeaturesFromLLVM( } } } + + if (llvm_cpu_name_z) |cpu_name_z| { + const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z); + + for (arch.allCpus()) |cpu| { + const this_llvm_name = cpu.llvm_name orelse continue; + if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { + // Only trust the CPU if the reported features exactly match. + var populated_reported_features = set; + populated_reported_features.populateDependencies(all_features); + var populated_cpu_features = cpu.features; + populated_cpu_features.populateDependencies(all_features); + if (populated_reported_features.eql(populated_cpu_features)) { + return Target.CpuFeatures{ .cpu = cpu }; + } else { + return Target.CpuFeatures{ .features = set }; + } + } + } + } + return Target.CpuFeatures{ .features = set }; } -- 2.54.0 From c6bfece1d54c54024397d7aff9f25087cc4dbfda Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Tue, 21 Jan 2020 22:24:40 -0500 Subject: [PATCH 54/63] Revert "tests: use an older aarch64 sub-arch" This reverts commit 4640ef589e8fddcab7aeab2c6044bc031cf33515. This attempted workaround did not have the desired effect. --- test/tests.zig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/test/tests.zig b/test/tests.zig index fb30f064cce3e1872f8c39195019ae999a784f43..7c97e46e0280d7494807eb6bafe1592372552920 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -101,7 +101,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, .abi = .none, }, }, @@ -110,7 +110,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, .abi = .musl, }, }, @@ -120,7 +120,7 @@ const test_targets = [_]TestTarget{ .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a }, + .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, .abi = .gnu, }, }, -- 2.54.0 From 48c7e6c48b81e6e0423b3e4aea238402189eecb7 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 22 Jan 2020 17:13:31 -0500 Subject: [PATCH 55/63] std.Target.CpuFeatures is now a struct with both CPU and feature set Previously it was a tagged union which was one of: * baseline * a specific CPU * a set of features Now, it's possible to have a CPU but also modify the CPU's feature set on top of that. This is closer to what LLVM does. This is more correct because Zig's notion of CPUs (and LLVM's) is not exact CPU models. For example "skylake" is not one very specific model; there are several different pieces of hardware that match "skylake" that have different feature sets enabled. --- lib/std/build.zig | 50 ++-- lib/std/target.zig | 150 +++++----- lib/std/target/avr.zig | 4 - lib/std/target/riscv.zig | 49 ++-- src-self-hosted/print_targets.zig | 12 +- src-self-hosted/stage1.zig | 408 ++++++++++------------------ src/codegen.cpp | 2 +- src/main.cpp | 33 +-- src/userland.cpp | 49 ++-- src/userland.h | 16 +- test/compile_errors.zig | 11 +- test/tests.zig | 436 ++++++++++++++++-------------- test/translate_c.zig | 22 +- 13 files changed, 571 insertions(+), 671 deletions(-) diff --git a/lib/std/build.zig b/lib/std/build.zig index a36818fb2908cca2f81fcf74f3b881d5d6584e65..ac6ca3049484471ab9c0176b0ba3f0052eab915a 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -484,6 +484,7 @@ pub const Builder = struct { .arch = builtin.arch, .os = builtin.os, .abi = builtin.abi, + .cpu_features = builtin.cpu_features, }, }).linuxTriple(self.allocator); @@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct { .arch = target_arch, .os = target_os, .abi = target_abi, + .cpu_features = target_arch.getBaselineCpuFeatures(), }, }); } @@ -1972,25 +1974,41 @@ pub const LibExeObjStep = struct { try zig_args.append("-target"); try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable); - switch (cross.cpu_features) { - .baseline => {}, - .cpu => |cpu| { + const all_features = self.target.getArch().allFeaturesList(); + var populated_cpu_features = cross.cpu_features.cpu.features; + populated_cpu_features.populateDependencies(all_features); + + if (populated_cpu_features.eql(cross.cpu_features.features)) { + // The CPU name alone is sufficient. + // If it is the baseline CPU, no command line args are required. + if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) { try zig_args.append("-target-cpu"); - try zig_args.append(cpu.name); - }, - .features => |features| { - try zig_args.append("-target-cpu-features"); + try zig_args.append(cross.cpu_features.cpu.name); + } + } else { + try zig_args.append("-target-cpu"); + try zig_args.append(cross.cpu_features.cpu.name); - var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); - for (self.target.getArch().allFeaturesList()) |feature, i| { - if (features.isEnabled(@intCast(Target.Cpu.Feature.Set.Index, i))) { - try feature_str_buffer.append(feature.name); - try feature_str_buffer.append(","); - } + try zig_args.append("-target-feature"); + var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); + for (all_features) |feature, i_usize| { + const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize); + const in_cpu_set = populated_cpu_features.isEnabled(i); + const in_actual_set = cross.cpu_features.features.isEnabled(i); + if (in_cpu_set and !in_actual_set) { + try feature_str_buffer.appendByte('-'); + try feature_str_buffer.append(feature.name); + try feature_str_buffer.appendByte(','); + } else if (!in_cpu_set and in_actual_set) { + try feature_str_buffer.appendByte('+'); + try feature_str_buffer.append(feature.name); + try feature_str_buffer.appendByte(','); } - - try zig_args.append(feature_str_buffer.toSlice()); - }, + } + if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) { + feature_str_buffer.shrink(feature_str_buffer.len() - 1); + } + try zig_args.append(feature_str_buffer.toSliceConst()); } }, } diff --git a/lib/std/target.zig b/lib/std/target.zig index e72a1a8452230a4cbd0f611c5b28b6eb3a6ed197..f23fc78df27460a3301774f6b747e95c1b9685de 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -172,6 +172,15 @@ pub const Target = union(enum) { r6, }; + pub fn subArchName(arch: Arch) ?[]const u8 { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32), + .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64), + .kalimba => |kalimba| @tagName(kalimba), + else => return null, + }; + } + pub fn subArchFeature(arch: Arch) ?u8 { return switch (arch) { .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) { @@ -251,24 +260,12 @@ pub const Target = union(enum) { return error.UnknownCpu; } - /// This parsing function supports 2 syntaxes. - /// * Comma-separated list of features, with + or - in front of each feature. This - /// form represents a deviation from baseline. - /// * Comma-separated list of features, with no + or - in front of each feature. This - /// form represents an exclusive list of enabled features; no other features besides - /// the ones listed, and their dependencies, will be enabled. + /// Comma-separated list of features, with + or - in front of each feature. This + /// form represents a deviation from baseline CPU, which is provided as a parameter. /// Extra commas are ignored. - pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set { - // Here we compute both and choose the correct result at the end, based - // on whether or not we saw + and - signs. - var whitelist_set = Cpu.Feature.Set.empty; - var baseline_set = arch.baselineFeatures(); - var mode: enum { - unknown, - baseline, - whitelist, - } = .unknown; - + pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set { + const all_features = arch.allFeaturesList(); + var set = cpu.features; var it = mem.tokenize(features_text, ","); while (it.next()) |item_text| { var feature_name: []const u8 = undefined; @@ -277,40 +274,20 @@ pub const Target = union(enum) { sub, } = undefined; if (mem.startsWith(u8, item_text, "+")) { - switch (mode) { - .unknown, .baseline => mode = .baseline, - .whitelist => return error.InvalidCpuFeatures, - } op = .add; feature_name = item_text[1..]; } else if (mem.startsWith(u8, item_text, "-")) { - switch (mode) { - .unknown, .baseline => mode = .baseline, - .whitelist => return error.InvalidCpuFeatures, - } op = .sub; feature_name = item_text[1..]; } else { - switch (mode) { - .unknown, .whitelist => mode = .whitelist, - .baseline => return error.InvalidCpuFeatures, - } - op = .add; - feature_name = item_text; + return error.InvalidCpuFeatures; } - const all_features = arch.allFeaturesList(); for (all_features) |feature, index_usize| { const index = @intCast(Cpu.Feature.Set.Index, index_usize); if (mem.eql(u8, feature_name, feature.name)) { switch (op) { - .add => { - baseline_set.addFeature(index); - whitelist_set.addFeature(index); - }, - .sub => { - baseline_set.removeFeature(index); - whitelist_set.removeFeature(index); - }, + .add => set.addFeature(index), + .sub => set.removeFeature(index), } break; } @@ -319,10 +296,8 @@ pub const Target = union(enum) { } } - return switch (mode) { - .unknown, .whitelist => whitelist_set, - .baseline => baseline_set, - }; + set.populateDependencies(all_features); + return set; } pub fn toElfMachine(arch: Arch) std.elf.EM { @@ -485,29 +460,37 @@ pub const Target = union(enum) { /// The "default" set of CPU features for cross-compiling. A conservative set /// of features that is expected to be supported on most available hardware. - pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set { - return switch (arch) { - .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features, - .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features, - .avr => avr.baseline_features, - .bpfel, .bpfeb => bpf.cpu.generic.features, - .hexagon => hexagon.cpu.generic.features, - .mips, .mipsel => mips.cpu.mips32.features, - .mips64, .mips64el => mips.cpu.mips64.features, - .msp430 => msp430.cpu.generic.features, - .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features, - .amdgcn => amdgpu.cpu.generic.features, - .riscv32 => riscv.baseline_32_features, - .riscv64 => riscv.baseline_64_features, - .sparc, .sparcv9, .sparcel => sparc.cpu.generic.features, - .s390x => systemz.cpu.generic.features, - .i386 => x86.cpu.pentium4.features, - .x86_64 => x86.cpu.x86_64.features, - .nvptx, .nvptx64 => nvptx.cpu.sm_20.features, - .wasm32, .wasm64 => wasm.cpu.generic.features, + pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures { + const S = struct { + const generic_cpu = Cpu{ + .name = "generic", + .llvm_name = null, + .features = Cpu.Feature.Set.empty, + }; + }; + const cpu = switch (arch) { + .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, + .avr => &avr.cpu.avr1, + .bpfel, .bpfeb => &bpf.cpu.generic, + .hexagon => &hexagon.cpu.generic, + .mips, .mipsel => &mips.cpu.mips32, + .mips64, .mips64el => &mips.cpu.mips64, + .msp430 => &msp430.cpu.generic, + .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic, + .amdgcn => &amdgpu.cpu.generic, + .riscv32 => &riscv.cpu.baseline_rv32, + .riscv64 => &riscv.cpu.baseline_rv64, + .sparc, .sparcv9, .sparcel => &sparc.cpu.generic, + .s390x => &systemz.cpu.generic, + .i386 => &x86.cpu.pentium4, + .x86_64 => &x86.cpu.x86_64, + .nvptx, .nvptx64 => &nvptx.cpu.sm_20, + .wasm32, .wasm64 => &wasm.cpu.generic, - else => Cpu.Feature.Set.empty, + else => &S.generic_cpu, }; + return CpuFeatures.initFromCpu(arch, cpu); } /// All CPUs Zig is aware of, sorted lexicographically by name. @@ -685,19 +668,28 @@ pub const Target = union(enum) { arch: Arch, os: Os, abi: Abi, - cpu_features: CpuFeatures = .baseline, + cpu_features: CpuFeatures, }; - pub const CpuFeatures = union(enum) { - /// The "default" set of CPU features for cross-compiling. A conservative set - /// of features that is expected to be supported on most available hardware. - baseline, - - /// Target one specific CPU. + pub const CpuFeatures = struct { + /// The CPU to target. It has a set of features + /// which are overridden with the `features` field. cpu: *const Cpu, /// Explicitly provide the entire CPU feature set. features: Cpu.Feature.Set, + + pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures { + var features = cpu.features; + if (arch.subArchFeature()) |sub_arch_index| { + features.addFeature(sub_arch_index); + } + features.populateDependencies(arch.allFeaturesList()); + return CpuFeatures{ + .cpu = cpu, + .features = features, + }; + } }; pub const current = Target{ @@ -718,14 +710,6 @@ pub const Target = union(enum) { }; } - pub fn cpuFeatureSet(self: Target) Cpu.Feature.Set { - return switch (self.getCpuFeatures()) { - .baseline => self.getArch().baselineFeatures(), - .cpu => |cpu| cpu.features, - .features => |features| features, - }; - } - pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 { return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{ @tagName(self.getArch()), @@ -791,14 +775,18 @@ pub const Target = union(enum) { }); } + /// TODO: Support CPU features here? + /// https://github.com/ziglang/zig/issues/4261 pub fn parse(text: []const u8) !Target { var it = mem.separate(text, "-"); const arch_name = it.next() orelse return error.MissingArchitecture; const os_name = it.next() orelse return error.MissingOperatingSystem; const abi_name = it.next(); + const arch = try parseArchSub(arch_name); var cross = Cross{ - .arch = try parseArchSub(arch_name), + .arch = arch, + .cpu_features = arch.getBaselineCpuFeatures(), .os = try parseOs(os_name), .abi = undefined, }; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig index 8eb6df98f301e7e93d74037500113adf8bc56c67..3902a3860f502a795ebc95d9f16d8717a8801b28 100644 --- a/lib/std/target/avr.zig +++ b/lib/std/target/avr.zig @@ -2378,7 +2378,3 @@ pub const all_cpus = &[_]*const Cpu{ &cpu.avrxmega7, &cpu.m3000, }; - -pub const baseline_features = featureSet(&[_]Feature{ - .avr0, -}); diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig index e0671ad91b66033a3f85c3a4d9b1894fcec5fe12..315329306e7626b74a4331cfd4ede6b1e1f17f23 100644 --- a/lib/std/target/riscv.zig +++ b/lib/std/target/riscv.zig @@ -69,11 +69,39 @@ pub const all_features = blk: { }; pub const cpu = struct { + pub const baseline_rv32 = Cpu{ + .name = "baseline_rv32", + .llvm_name = "generic-rv32", + .features = featureSet(&[_]Feature{ + .a, + .c, + .d, + .f, + .m, + .relax, + }), + }; + + pub const baseline_rv64 = Cpu{ + .name = "baseline_rv64", + .llvm_name = "generic-rv64", + .features = featureSet(&[_]Feature{ + .@"64bit", + .a, + .c, + .d, + .f, + .m, + .relax, + }), + }; + pub const generic_rv32 = Cpu{ .name = "generic_rv32", .llvm_name = "generic-rv32", .features = featureSet(&[_]Feature{}), }; + pub const generic_rv64 = Cpu{ .name = "generic_rv64", .llvm_name = "generic-rv64", @@ -87,25 +115,8 @@ pub const cpu = struct { /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1 /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ + &cpu.baseline_rv32, + &cpu.baseline_rv64, &cpu.generic_rv32, &cpu.generic_rv64, }; - -pub const baseline_32_features = featureSet(&[_]Feature{ - .a, - .c, - .d, - .f, - .m, - .relax, -}); - -pub const baseline_64_features = featureSet(&[_]Feature{ - .@"64bit", - .a, - .c, - .d, - .f, - .m, - .relax, -}); diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig index a7013e8cd9e91463cdc03aa611e07e4acfb10032..79041da4312d02a9f11e702b3714f7b5ebb52cab 100644 --- a/src-self-hosted/print_targets.zig +++ b/src-self-hosted/print_targets.zig @@ -227,16 +227,14 @@ pub fn cmdTargets( try jws.objectField("abi"); try jws.emitString(@tagName(native_target.getAbi())); try jws.objectField("cpuName"); - switch (native_target.getCpuFeatures()) { - .baseline, .features => try jws.emitNull(), - .cpu => |cpu| try jws.emitString(cpu.name), - } + const cpu_features = native_target.getCpuFeatures(); + try jws.emitString(cpu_features.cpu.name); { try jws.objectField("cpuFeatures"); try jws.beginArray(); - const feature_set = native_target.cpuFeatureSet(); - for (native_target.getArch().allFeaturesList()) |feature, i| { - if (feature_set.isEnabled(@intCast(u8, i))) { + for (native_target.getArch().allFeaturesList()) |feature, i_usize| { + const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize); + if (cpu_features.features.isEnabled(index)) { try jws.arrayElem(); try jws.emitString(feature.name); } diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index e80b6ba1232059c88d4fa0a506924efd68ec5226..a6a3bc013c59ad55c9852872138454f247732bb0 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -540,52 +540,12 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.context.maybeRefresh(); } -/// I have observed the CPU name reported by LLVM being incorrect. On -/// the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp", -/// which is a 32-bit CPU, even though the system is 64-bit and the reported -/// CPU features include, among other things, +64bit. -/// So the strategy taken here is that we observe both reported CPU, and the -/// reported CPU features. The features are trusted more; but if the features -/// match exactly the features of the reported CPU, then we trust the reported CPU. fn cpuFeaturesFromLLVM( arch: Target.Arch, llvm_cpu_name_z: ?[*:0]const u8, llvm_cpu_features_opt: ?[*:0]const u8, ) !Target.CpuFeatures { - var set = arch.baselineFeatures(); - const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{ - .features = set, - }; - - const all_features = arch.allFeaturesList(); - - var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); - while (it.next()) |decorated_llvm_feat| { - var op: enum { - add, - sub, - } = undefined; - var llvm_feat: []const u8 = undefined; - if (mem.startsWith(u8, decorated_llvm_feat, "+")) { - op = .add; - llvm_feat = decorated_llvm_feat[1..]; - } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) { - op = .sub; - llvm_feat = decorated_llvm_feat[1..]; - } else { - return error.InvalidLlvmCpuFeaturesFormat; - } - for (all_features) |feature, index| { - const this_llvm_name = feature.llvm_name orelse continue; - if (mem.eql(u8, llvm_feat, this_llvm_name)) { - switch (op) { - .add => set.addFeature(@intCast(u8, index)), - .sub => set.removeFeature(@intCast(u8, index)), - } - break; - } - } - } + var result = arch.getBaselineCpuFeatures(); if (llvm_cpu_name_z) |cpu_name_z| { const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z); @@ -593,21 +553,53 @@ fn cpuFeaturesFromLLVM( for (arch.allCpus()) |cpu| { const this_llvm_name = cpu.llvm_name orelse continue; if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) { - // Only trust the CPU if the reported features exactly match. - var populated_reported_features = set; - populated_reported_features.populateDependencies(all_features); - var populated_cpu_features = cpu.features; - populated_cpu_features.populateDependencies(all_features); - if (populated_reported_features.eql(populated_cpu_features)) { - return Target.CpuFeatures{ .cpu = cpu }; - } else { - return Target.CpuFeatures{ .features = set }; + // Here we use the non-dependencies-populated set, + // so that subtracting features later in this function + // affect the prepopulated set. + result = Target.CpuFeatures{ + .cpu = cpu, + .features = cpu.features, + }; + break; + } + } + } + + const all_features = arch.allFeaturesList(); + + if (llvm_cpu_features_opt) |llvm_cpu_features| { + var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ","); + while (it.next()) |decorated_llvm_feat| { + var op: enum { + add, + sub, + } = undefined; + var llvm_feat: []const u8 = undefined; + if (mem.startsWith(u8, decorated_llvm_feat, "+")) { + op = .add; + llvm_feat = decorated_llvm_feat[1..]; + } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) { + op = .sub; + llvm_feat = decorated_llvm_feat[1..]; + } else { + return error.InvalidLlvmCpuFeaturesFormat; + } + for (all_features) |feature, index_usize| { + const this_llvm_name = feature.llvm_name orelse continue; + if (mem.eql(u8, llvm_feat, this_llvm_name)) { + const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize); + switch (op) { + .add => result.features.addFeature(index), + .sub => result.features.removeFeature(index), + } + break; } } } } - return Target.CpuFeatures{ .features = set }; + result.features.populateDependencies(all_features); + return result; } // ABI warning @@ -639,7 +631,6 @@ const Stage2CpuFeatures = struct { allocator: *mem.Allocator, cpu_features: Target.CpuFeatures, - llvm_cpu_name: ?[*:0]const u8, llvm_features_str: ?[*:0]const u8, builtin_str: [:0]const u8, @@ -647,125 +638,64 @@ const Stage2CpuFeatures = struct { const Self = @This(); - fn createBaseline(allocator: *mem.Allocator, arch: Target.Arch) !*Self { - const self = try allocator.create(Self); - errdefer allocator.destroy(self); - - const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n", .{}); - errdefer allocator.free(builtin_str); - - const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n", .{}); - errdefer allocator.free(cache_hash); - - self.* = Self{ - .allocator = allocator, - .cpu_features = .baseline, - .llvm_cpu_name = null, - .llvm_features_str = try initLLVMFeatures(allocator, arch, arch.baselineFeatures()), - .builtin_str = builtin_str, - .cache_hash = cache_hash, - }; - - return self; - } - - fn createFromLLVM( - allocator: *mem.Allocator, - zig_triple: [*:0]const u8, - llvm_cpu_name_z: ?[*:0]const u8, - llvm_cpu_features: ?[*:0]const u8, - ) !*Self { - const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); - const arch = target.Cross.arch; - const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features); - switch (cpu_features) { - .baseline => return createBaseline(allocator, arch), - .cpu => |cpu| return createFromCpu(allocator, arch, cpu), - .features => |features| return createFromCpuFeatures(allocator, arch, features), - } - } - - fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self { - const self = try allocator.create(Self); - errdefer allocator.destroy(self); - - const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures{{ .cpu = &Target.{}.cpu.{} }};\n", .{ - arch.genericName(), - cpu.name, - }); - errdefer allocator.free(builtin_str); - - const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ cpu.name, cpu.features.asBytes() }); - errdefer allocator.free(cache_hash); - - self.* = Self{ - .allocator = allocator, - .cpu_features = .{ .cpu = cpu }, - .llvm_cpu_name = if (cpu.llvm_name) |n| n.ptr else null, - .llvm_features_str = null, - .builtin_str = builtin_str, - .cache_hash = cache_hash, - }; - return self; - } - - fn initLLVMFeatures( - allocator: *mem.Allocator, - arch: Target.Arch, - feature_set: Target.Cpu.Feature.Set, - ) ![*:0]const u8 { - var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); - defer llvm_features_buffer.deinit(); - - const all_features = arch.allFeaturesList(); - var populated_feature_set = feature_set; - if (arch.subArchFeature()) |sub_arch_index| { - populated_feature_set.addFeature(sub_arch_index); - } - populated_feature_set.populateDependencies(all_features); - for (all_features) |feature, index| { - const llvm_name = feature.llvm_name orelse continue; - const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))]; - try llvm_features_buffer.appendByte(plus_or_minus); - try llvm_features_buffer.append(llvm_name); - try llvm_features_buffer.append(","); - } - assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")); - llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); - - return llvm_features_buffer.toOwnedSlice().ptr; + fn createFromNative(allocator: *mem.Allocator) !*Self { + const arch = Target.current.getArch(); + const llvm = @import("llvm.zig"); + const llvm_cpu_name = llvm.GetHostCPUName(); + const llvm_cpu_features = llvm.GetNativeFeatures(); + const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features); + return createFromCpuFeatures(allocator, arch, cpu_features); } fn createFromCpuFeatures( allocator: *mem.Allocator, arch: Target.Arch, - feature_set: Target.Cpu.Feature.Set, + cpu_features: Target.CpuFeatures, ) !*Self { const self = try allocator.create(Self); errdefer allocator.destroy(self); - const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.asBytes()}); + const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ + cpu_features.cpu.name, + cpu_features.features.asBytes(), + }); errdefer allocator.free(cache_hash); const generic_arch_name = arch.genericName(); - var builtin_str_buffer = try std.Buffer.allocPrint( - allocator, + var builtin_str_buffer = try std.Buffer.allocPrint(allocator, \\CpuFeatures{{ + \\ .cpu = &Target.{}.cpu.{}, \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{ \\ - , - .{ generic_arch_name, generic_arch_name }, - ); + , .{ + generic_arch_name, + cpu_features.cpu.name, + generic_arch_name, + generic_arch_name, + }); defer builtin_str_buffer.deinit(); - for (arch.allFeaturesList()) |feature, index| { - if (!feature_set.isEnabled(@intCast(u8, index))) continue; + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + defer llvm_features_buffer.deinit(); - // TODO some kind of "zig identifier escape" function rather than - // unconditionally using @"" syntax - try builtin_str_buffer.append(" .@\""); - try builtin_str_buffer.append(feature.name); - try builtin_str_buffer.append("\",\n"); + for (arch.allFeaturesList()) |feature, index_usize| { + const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize); + const is_enabled = cpu_features.features.isEnabled(index); + + if (feature.llvm_name) |llvm_name| { + const plus_or_minus = "-+"[@boolToInt(is_enabled)]; + try llvm_features_buffer.appendByte(plus_or_minus); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } + + if (is_enabled) { + // TODO some kind of "zig identifier escape" function rather than + // unconditionally using @"" syntax + try builtin_str_buffer.append(" .@\""); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append("\",\n"); + } } try builtin_str_buffer.append( @@ -774,11 +704,13 @@ const Stage2CpuFeatures = struct { \\ ); + assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")); + llvm_features_buffer.shrink(llvm_features_buffer.len() - 1); + self.* = Self{ .allocator = allocator, - .cpu_features = .{ .features = feature_set }, - .llvm_cpu_name = null, - .llvm_features_str = try initLLVMFeatures(allocator, arch, feature_set), + .cpu_features = cpu_features, + .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr, .builtin_str = builtin_str_buffer.toOwnedSlice(), .cache_hash = cache_hash, }; @@ -794,12 +726,13 @@ const Stage2CpuFeatures = struct { }; // ABI warning -export fn stage2_cpu_features_parse_cpu( +export fn stage2_cpu_features_parse( result: **Stage2CpuFeatures, - zig_triple: [*:0]const u8, - cpu_name: [*:0]const u8, + zig_triple: ?[*:0]const u8, + cpu_name: ?[*:0]const u8, + cpu_features: ?[*:0]const u8, ) Error { - result.* = parseCpu(zig_triple, cpu_name) catch |err| switch (err) { + result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) { error.OutOfMemory => return .OutOfMemory, error.UnknownArchitecture => return .UnknownArchitecture, error.UnknownSubArchitecture => return .UnknownSubArchitecture, @@ -807,112 +740,63 @@ export fn stage2_cpu_features_parse_cpu( error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, error.MissingOperatingSystem => return .MissingOperatingSystem, error.MissingArchitecture => return .MissingArchitecture, - }; - return .None; -} - -fn parseCpu(zig_triple: [*:0]const u8, cpu_name_z: [*:0]const u8) !*Stage2CpuFeatures { - const cpu_name = mem.toSliceConst(u8, cpu_name_z); - const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); - const arch = target.Cross.arch; - const cpu = arch.parseCpu(cpu_name) catch |err| switch (err) { - error.UnknownCpu => { - std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ - cpu_name, - @tagName(arch), - }); - for (arch.allCpus()) |cpu| { - std.debug.warn(" {}\n", .{cpu.name}); - } - process.exit(1); - }, - else => |e| return e, - }; - return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu); -} - -// ABI warning -export fn stage2_cpu_features_parse_features( - result: **Stage2CpuFeatures, - zig_triple: [*:0]const u8, - features_text: [*:0]const u8, -) Error { - result.* = parseFeatures(zig_triple, features_text) catch |err| switch (err) { - error.OutOfMemory => return .OutOfMemory, - error.InvalidCpuFeatures => return .InvalidCpuFeatures, - error.UnknownArchitecture => return .UnknownArchitecture, - error.UnknownSubArchitecture => return .UnknownSubArchitecture, - error.UnknownOperatingSystem => return .UnknownOperatingSystem, - error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, - error.MissingOperatingSystem => return .MissingOperatingSystem, - error.MissingArchitecture => return .MissingArchitecture, - }; - return .None; -} - -fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures { - const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); - const arch = target.Cross.arch; - const set = arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)) catch |err| switch (err) { - error.UnknownCpuFeature => { - std.debug.warn("Unknown CPU features specified.\nAvailable CPU features for architecture '{}':\n", .{ - @tagName(arch), - }); - for (arch.allFeaturesList()) |feature| { - std.debug.warn(" {}\n", .{feature.name}); - } - process.exit(1); - }, - else => |e| return e, - }; - return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set); -} - -// ABI warning -export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures, zig_triple: [*:0]const u8) Error { - result.* = cpuFeaturesBaseline(zig_triple) catch |err| switch (err) { - error.OutOfMemory => return .OutOfMemory, - error.UnknownArchitecture => return .UnknownArchitecture, - error.UnknownSubArchitecture => return .UnknownSubArchitecture, - error.UnknownOperatingSystem => return .UnknownOperatingSystem, - error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, - error.MissingOperatingSystem => return .MissingOperatingSystem, - error.MissingArchitecture => return .MissingArchitecture, - }; - return .None; -} - -fn cpuFeaturesBaseline(zig_triple: [*:0]const u8) !*Stage2CpuFeatures { - const target = try Target.parse(mem.toSliceConst(u8, zig_triple)); - const arch = target.Cross.arch; - return Stage2CpuFeatures.createBaseline(std.heap.c_allocator, arch); -} - -// ABI warning -export fn stage2_cpu_features_llvm( - result: **Stage2CpuFeatures, - zig_triple: [*:0]const u8, - llvm_cpu_name: ?[*:0]const u8, - llvm_cpu_features: ?[*:0]const u8, -) Error { - result.* = Stage2CpuFeatures.createFromLLVM( - std.heap.c_allocator, - zig_triple, - llvm_cpu_name, - llvm_cpu_features, - ) catch |err| switch (err) { - error.OutOfMemory => return .OutOfMemory, - error.UnknownArchitecture => return .UnknownArchitecture, - error.UnknownSubArchitecture => return .UnknownSubArchitecture, error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat, - error.UnknownOperatingSystem => return .UnknownOperatingSystem, - error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface, - error.MissingOperatingSystem => return .MissingOperatingSystem, - error.MissingArchitecture => return .MissingArchitecture, + error.InvalidCpuFeatures => return .InvalidCpuFeatures, }; return .None; } +fn stage2ParseCpuFeatures( + zig_triple_oz: ?[*:0]const u8, + cpu_name_oz: ?[*:0]const u8, + cpu_features_oz: ?[*:0]const u8, +) !*Stage2CpuFeatures { + const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator); + const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z)); + const arch = target.Cross.arch; + + const cpu = if (cpu_name_oz) |cpu_name_z| blk: { + const cpu_name = mem.toSliceConst(u8, cpu_name_z); + break :blk arch.parseCpu(cpu_name) catch |err| switch (err) { + error.UnknownCpu => { + std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{ + cpu_name, + @tagName(arch), + }); + for (arch.allCpus()) |cpu| { + std.debug.warn(" {}\n", .{cpu.name}); + } + process.exit(1); + }, + else => |e| return e, + }; + } else target.Cross.cpu_features.cpu; + + var set = if (cpu_features_oz) |cpu_features_z| blk: { + const cpu_features = mem.toSliceConst(u8, cpu_features_z); + break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) { + error.UnknownCpuFeature => { + std.debug.warn( + \\Unknown CPU features specified. + \\Available CPU features for architecture '{}': + \\ + , .{@tagName(arch)}); + for (arch.allFeaturesList()) |feature| { + std.debug.warn(" {}\n", .{feature.name}); + } + process.exit(1); + }, + else => |e| return e, + }; + } else cpu.features; + + set.populateDependencies(arch.allFeaturesList()); + return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{ + .cpu = cpu, + .features = set, + }); +} + // ABI warning export fn stage2_cpu_features_get_cache_hash( cpu_features: *const Stage2CpuFeatures, @@ -935,7 +819,7 @@ export fn stage2_cpu_features_get_builtin_str( // ABI warning export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 { - return cpu_features.llvm_cpu_name; + return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null; } // ABI warning diff --git a/src/codegen.cpp b/src/codegen.cpp index bb14d39a91808b9babd1d4f0df0e273fde09143e..6fffcc6fdf618b34a0285710348ca314c37e5fd2 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8581,7 +8581,7 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len); buf_append_mem(contents, ptr, len); } else { - buf_append_str(contents, ".baseline;\n"); + buf_append_str(contents, "arch.getBaselineCpuFeatures();\n"); } } if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) { diff --git a/src/main.cpp b/src/main.cpp index bc181f3d5d9f11b9c1856c110937c4bf09205ce3..512b7a9b0c5165af7856087db207e4c530905fa2 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -866,7 +866,7 @@ int main(int argc, char **argv) { cpu = argv[i]; } else if (strcmp(arg, "-target-feature") == 0) { features = argv[i]; - }else { + } else { fprintf(stderr, "Invalid argument: %s\n", arg); return print_error_usage(arg0); } @@ -984,35 +984,10 @@ int main(int argc, char **argv) { Buf zig_triple_buf = BUF_INIT; target_triple_zig(&zig_triple_buf, &target); - if (cpu && features) { - fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n"); + const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf); + if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) { + fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err)); return main_exit(root_progress_node, EXIT_FAILURE); - } else if (cpu) { - if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, buf_ptr(&zig_triple_buf), cpu))) { - fprintf(stderr, "-target-cpu error: %s\n", err_str(err)); - return main_exit(root_progress_node, EXIT_FAILURE); - } - } else if (features) { - if ((err = stage2_cpu_features_parse_features(&target.cpu_features, buf_ptr(&zig_triple_buf), - features))) - { - fprintf(stderr, "-target-feature error: %s\n", err_str(err)); - return main_exit(root_progress_node, EXIT_FAILURE); - } - } else if (target.is_native) { - const char *cpu_name = ZigLLVMGetHostCPUName(); - const char *cpu_features = ZigLLVMGetNativeFeatures(); - if ((err = stage2_cpu_features_llvm(&target.cpu_features, buf_ptr(&zig_triple_buf), - cpu_name, cpu_features))) - { - fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err)); - return main_exit(root_progress_node, EXIT_FAILURE); - } - } else { - if ((err = stage2_cpu_features_baseline(&target.cpu_features, buf_ptr(&zig_triple_buf)))) { - fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err)); - return main_exit(root_progress_node, EXIT_FAILURE); - } } if (output_dir != nullptr && enable_cache == CacheOptOn) { diff --git a/src/userland.cpp b/src/userland.cpp index 64849b65ed99af8db60d565101554bc3334b4991..8524be5739d2fca5b88530f2f797b9158b11afbe 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -2,7 +2,8 @@ // src-self-hosted/stage1.zig #include "userland.h" -#include "ast_render.hpp" +#include "util.hpp" +#include "zig_llvm.h" #include #include #include @@ -96,32 +97,30 @@ struct Stage2CpuFeatures { const char *cache_hash; }; -Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *zig_triple, const char *str) { - const char *msg = "stage0 called stage2_cpu_features_parse_cpu"; - stage2_panic(msg, strlen(msg)); -} -Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zig_triple, const char *str) { - const char *msg = "stage0 called stage2_cpu_features_parse_features"; - stage2_panic(msg, strlen(msg)); -} -Error stage2_cpu_features_baseline(Stage2CpuFeatures **out, const char *zig_triple) { - Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); - result->builtin_str = ".baseline;\n"; - result->cache_hash = "\n\n"; - *out = result; - return ErrorNone; -} -Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *zig_triple, - const char *llvm_cpu_name, const char *llvm_features) +Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple, + const char *cpu_name, const char *cpu_features) { - Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); - result->llvm_cpu_name = llvm_cpu_name; - result->llvm_cpu_features = llvm_features; - result->builtin_str = ".baseline;\n"; - result->cache_hash = "native\n\n"; - *out = result; - return ErrorNone; + if (zig_triple == nullptr) { + Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); + result->llvm_cpu_name = ZigLLVMGetHostCPUName(); + result->llvm_cpu_features = ZigLLVMGetNativeFeatures(); + result->builtin_str = "arch.getBaselineCpuFeatures();\n"; + result->cache_hash = "native\n\n"; + *out = result; + return ErrorNone; + } + if (cpu_name == nullptr && cpu_features == nullptr) { + Stage2CpuFeatures *result = allocate(1, "Stage2CpuFeatures"); + result->builtin_str = "arch.getBaselineCpuFeatures();\n"; + result->cache_hash = "\n\n"; + *out = result; + return ErrorNone; + } + + const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features"; + stage2_panic(msg, strlen(msg)); } + void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features, const char **ptr, size_t *len) { diff --git a/src/userland.h b/src/userland.h index 01faf0b532f32fb1987b07db9fe1e2e091e58aa5..6b16d2338efb1796ca967e0aabce8ce4b7754a86 100644 --- a/src/userland.h +++ b/src/userland.h @@ -184,20 +184,8 @@ ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node, struct Stage2CpuFeatures; // ABI warning -ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result, - const char *zig_triple, const char *cpu_name); - -// ABI warning -ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result, - const char *zig_triple, const char *features); - -// ABI warning -ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result, - const char *zig_triple); - -// ABI warning -ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result, - const char *zig_triple, const char *llvm_cpu_name, const char *llvm_features); +ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result, + const char *zig_triple, const char *cpu_name, const char *cpu_features); // ABI warning ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features); diff --git a/test/compile_errors.zig b/test/compile_errors.zig index be2a40d74dc55ea5c1a9222eff8e34814ec335d6..a4ed8549a78f7fffc99994bfc756e21c3e13ce33 100644 --- a/test/compile_errors.zig +++ b/test/compile_errors.zig @@ -1,5 +1,6 @@ const tests = @import("tests.zig"); const builtin = @import("builtin"); +const Target = @import("std").Target; pub fn addCases(cases: *tests.CompileErrorContext) void { cases.addTest("non-exhaustive enums", @@ -272,9 +273,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { , &[_][]const u8{ "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack", }); - tc.target = tests.Target{ - .Cross = tests.CrossTarget{ + tc.target = Target{ + .Cross = .{ .arch = .wasm32, + .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(), .os = .wasi, .abi = .none, }, @@ -673,9 +675,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void { , &[_][]const u8{ "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs", }); - tc.target = tests.Target{ - .Cross = tests.CrossTarget{ + tc.target = Target{ + .Cross = .{ .arch = .x86_64, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), .os = .linux, .abi = .gnu, }, diff --git a/test/tests.zig b/test/tests.zig index 7c97e46e0280d7494807eb6bafe1592372552920..1ec25d11ecdca1ab8c9d2acf859f8a0e1c224e86 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -38,236 +38,260 @@ const TestTarget = struct { disable_native: bool = false, }; -const test_targets = [_]TestTarget{ - TestTarget{}, - TestTarget{ - .link_libc = true, - }, - TestTarget{ - .single_threaded = true, - }, - - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .x86_64, - .abi = .none, - }, - }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .x86_64, - .abi = .gnu, - }, - }, - .link_libc = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .x86_64, - .abi = .musl, - }, - }, - .link_libc = true, - }, +const test_targets = blk: { + // getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm + // (where N is roughly 160, which technically makes it O(1), but it adds up to a + // lot of branches) + @setEvalBranchQuota(50000); + break :blk [_]TestTarget{ + TestTarget{}, + TestTarget{ + .link_libc = true, + }, + TestTarget{ + .single_threaded = true, + }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .i386, - .abi = .none, - }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .x86_64, + .abi = .none, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + }, + }, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .x86_64, + .abi = .gnu, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + }, + }, + .link_libc = true, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .x86_64, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .abi = .musl, + }, + }, + .link_libc = true, }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .i386, - .abi = .musl, - }, + + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .i386, + .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), + .abi = .none, + }, + }, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .i386, + .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), + .abi = .musl, + }, + }, + .link_libc = true, }, - .link_libc = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, - .abi = .none, - }, - }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, - .abi = .musl, - }, - }, - .link_libc = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a }, - .abi = .gnu, - }, - }, - .link_libc = true, - }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = Target.Arch{ .aarch64 = .v8_5a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .abi = .none, + }, + }, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = Target.Arch{ .aarch64 = .v8_5a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .abi = .musl, + }, + }, + .link_libc = true, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = Target.Arch{ .aarch64 = .v8_5a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .abi = .gnu, + }, + }, + .link_libc = true, + }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a }, - .abi = .none, - }, - }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a }, - .abi = .musleabihf, - }, - }, - .link_libc = true, - }, - // TODO https://github.com/ziglang/zig/issues/3287 - //TestTarget{ - // .target = Target{ - // .Cross = CrossTarget{ - // .os = .linux, - // .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a }, - // .abi = .gnueabihf, - // }, - // }, - // .link_libc = true, - //}, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = Target.Arch{ .arm = .v8_5a }, + .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + .abi = .none, + }, + }, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = Target.Arch{ .arm = .v8_5a }, + .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + .abi = .musleabihf, + }, + }, + .link_libc = true, + }, + // TODO https://github.com/ziglang/zig/issues/3287 + //TestTarget{ + // .target = Target{ + // .Cross = CrossTarget{ + // .os = .linux, + // .arch = Target.Arch{ .arm = .v8_5a }, + // .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + // .abi = .gnueabihf, + // }, + // }, + // .link_libc = true, + //}, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .mipsel, - .abi = .none, - }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .mipsel, + .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(), + .abi = .none, + }, + }, + }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .linux, + .arch = .mipsel, + .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(), + .abi = .musl, + }, + }, + .link_libc = true, }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .linux, - .arch = .mipsel, - .abi = .musl, - }, - }, - .link_libc = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .macosx, - .arch = .x86_64, - .abi = .gnu, - }, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .macosx, + .arch = .x86_64, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .abi = .gnu, + }, + }, + // TODO https://github.com/ziglang/zig/issues/3295 + .disable_native = true, }, - // TODO https://github.com/ziglang/zig/issues/3295 - .disable_native = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .windows, - .arch = .i386, - .abi = .msvc, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .windows, + .arch = .i386, + .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), + .abi = .msvc, + }, }, }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .windows, - .arch = .x86_64, - .abi = .msvc, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .windows, + .arch = .x86_64, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .abi = .msvc, + }, }, }, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .windows, - .arch = .i386, - .abi = .gnu, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .windows, + .arch = .i386, + .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), + .abi = .gnu, + }, }, + .link_libc = true, }, - .link_libc = true, - }, - TestTarget{ - .target = Target{ - .Cross = CrossTarget{ - .os = .windows, - .arch = .x86_64, - .abi = .gnu, + TestTarget{ + .target = Target{ + .Cross = CrossTarget{ + .os = .windows, + .arch = .x86_64, + .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(), + .abi = .gnu, + }, }, + .link_libc = true, }, - .link_libc = true, - }, - // Do the release tests last because they take a long time - TestTarget{ - .mode = .ReleaseFast, - }, - TestTarget{ - .link_libc = true, - .mode = .ReleaseFast, - }, - TestTarget{ - .mode = .ReleaseFast, - .single_threaded = true, - }, + // Do the release tests last because they take a long time + TestTarget{ + .mode = .ReleaseFast, + }, + TestTarget{ + .link_libc = true, + .mode = .ReleaseFast, + }, + TestTarget{ + .mode = .ReleaseFast, + .single_threaded = true, + }, - TestTarget{ - .mode = .ReleaseSafe, - }, - TestTarget{ - .link_libc = true, - .mode = .ReleaseSafe, - }, - TestTarget{ - .mode = .ReleaseSafe, - .single_threaded = true, - }, + TestTarget{ + .mode = .ReleaseSafe, + }, + TestTarget{ + .link_libc = true, + .mode = .ReleaseSafe, + }, + TestTarget{ + .mode = .ReleaseSafe, + .single_threaded = true, + }, - TestTarget{ - .mode = .ReleaseSmall, - }, - TestTarget{ - .link_libc = true, - .mode = .ReleaseSmall, - }, - TestTarget{ - .mode = .ReleaseSmall, - .single_threaded = true, - }, + TestTarget{ + .mode = .ReleaseSmall, + }, + TestTarget{ + .link_libc = true, + .mode = .ReleaseSmall, + }, + TestTarget{ + .mode = .ReleaseSmall, + .single_threaded = true, + }, + }; }; const max_stdout_size = 1 * 1024 * 1024; // 1 MB diff --git a/test/translate_c.zig b/test/translate_c.zig index df33d9b145f14fb9baab40bea31bbf70d51708de..0870d5bebe84782b8d205e9c70a2674693a31f0b 100644 --- a/test/translate_c.zig +++ b/test/translate_c.zig @@ -1,5 +1,6 @@ const tests = @import("tests.zig"); const builtin = @import("builtin"); +const Target = @import("std").Target; pub fn addCases(cases: *tests.TranslateCContext) void { cases.add("empty declaration", @@ -1005,7 +1006,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void { }); cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ .os = .linux, .arch = .i386, .abi = .none }, + .Cross = .{ + .os = .linux, + .arch = .i386, + .abi = .none, + .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(), + }, }, \\void __attribute__((fastcall)) foo1(float *a); \\void __attribute__((stdcall)) foo2(float *a); @@ -1021,7 +1027,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void { }); cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none }, + .Cross = .{ + .os = .linux, + .arch = .{ .arm = .v8_5a }, + .abi = .none, + .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + }, }, \\void __attribute__((pcs("aapcs"))) foo1(float *a); \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a); @@ -1031,7 +1042,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void { }); cases.addWithTarget("Calling convention", tests.Target{ - .Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none }, + .Cross = .{ + .os = .linux, + .arch = .{ .aarch64 = .v8_5a }, + .abi = .none, + .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + }, }, \\void __attribute__((aarch64_vector_pcs)) foo1(float *a); , &[_][]const u8{ -- 2.54.0 From 3227aec848bfe13d7a592eb887824e23e018aba9 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 22 Jan 2020 17:35:57 -0500 Subject: [PATCH 56/63] fix not respecting sub-arch feature --- lib/std/target.zig | 4 +--- src-self-hosted/stage1.zig | 4 ++++ src/codegen.cpp | 1 + 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index f23fc78df27460a3301774f6b747e95c1b9685de..1292626f242c99279d19bd8b26bb52b9bd4571f8 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -181,7 +181,7 @@ pub const Target = union(enum) { }; } - pub fn subArchFeature(arch: Arch) ?u8 { + pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index { return switch (arch) { .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) { .v8_5a => @enumToInt(arm.Feature.armv8_5_a), @@ -295,8 +295,6 @@ pub const Target = union(enum) { return error.UnknownCpuFeature; } } - - set.populateDependencies(all_features); return set; } diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index a6a3bc013c59ad55c9852872138454f247732bb0..961b95d481177461079ee163dcd1f406167948d8 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -790,7 +790,11 @@ fn stage2ParseCpuFeatures( }; } else cpu.features; + if (arch.subArchFeature()) |index| { + set.addFeature(index); + } set.populateDependencies(arch.allFeaturesList()); + return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{ .cpu = cpu, .features = set, diff --git a/src/codegen.cpp b/src/codegen.cpp index 6fffcc6fdf618b34a0285710348ca314c37e5fd2..7ad19fdfcba2377b6ee7f05e81dd60edb1399777 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -10679,6 +10679,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir; child_gen->verbose_cimport = parent_gen->verbose_cimport; child_gen->verbose_cc = parent_gen->verbose_cc; + child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features; child_gen->llvm_argv = parent_gen->llvm_argv; child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path; -- 2.54.0 From 0c477f3c793d483c3917f08971b867e19c8c88a9 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 22 Jan 2020 17:47:18 -0500 Subject: [PATCH 57/63] fix std.Target.Arch.parseCpuFeatureSet unit test --- lib/std/target.zig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 1292626f242c99279d19bd8b26bb52b9bd4571f8..5dcbb962be2484481d6afacd6b4647932acc38ec 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -1172,7 +1172,9 @@ pub const Target = union(enum) { }; test "parseCpuFeatureSet" { - const set = try @as(Target.Arch, .x86_64).parseCpuFeatureSet("-sse,-avx,-cx8"); + const arch: Target.Arch = .x86_64; + const baseline = arch.getBaselineCpuFeatures(); + const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8"); std.testing.expect(!Target.x86.featureSetHas(set, .sse)); std.testing.expect(!Target.x86.featureSetHas(set, .avx)); std.testing.expect(!Target.x86.featureSetHas(set, .cx8)); -- 2.54.0 From 9845264a0bcb1347216a00dad0fd67fe79555485 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Wed, 22 Jan 2020 18:40:34 -0500 Subject: [PATCH 58/63] aarch64: less feature-full baseline CPU --- lib/std/target.zig | 2 +- lib/std/target/aarch64.zig | 6 ++++++ src/codegen.cpp | 1 + 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 5dcbb962be2484481d6afacd6b4647932acc38ec..6457216676014eb51dbeb1f4daf008b415138ac1 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -468,7 +468,7 @@ pub const Target = union(enum) { }; const cpu = switch (arch) { .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, - .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline, .avr => &avr.cpu.avr1, .bpfel, .bpfeb => &bpf.cpu.generic, .hexagon => &hexagon.cpu.generic, diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4639fe6dcc4eb04ede4b884c749373964a927d76..4d05a94290af1c972d75c27bad2df2afa17d6b7d 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -1225,6 +1225,11 @@ pub const cpu = struct { .cyclone, }), }; + pub const baseline = Cpu{ + .name = "baseline", + .llvm_name = null, + .features = featureSet(&[_]Feature{}), + }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", @@ -1411,6 +1416,7 @@ pub const cpu = struct { /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ &cpu.apple_latest, + &cpu.baseline, &cpu.cortex_a35, &cpu.cortex_a53, &cpu.cortex_a55, diff --git a/src/codegen.cpp b/src/codegen.cpp index 7ad19fdfcba2377b6ee7f05e81dd60edb1399777..123115ba2ff3bd3adce066b5ca0502d4fb543c5d 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -8795,6 +8795,7 @@ static void init(CodeGen *g) { target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features); } if (g->verbose_llvm_cpu_features) { + fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str)); fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args); fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features); } -- 2.54.0 From ead7d15772587cecff69d8b8fac3b5122ff2b98c Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 23 Jan 2020 00:41:34 -0500 Subject: [PATCH 59/63] use an older arm64 sub-arch for test suite hopefully this avoids the older qemu version crashing --- lib/std/target.zig | 2 +- lib/std/target/aarch64.zig | 6 ------ test/tests.zig | 24 ++++++++++++------------ 3 files changed, 13 insertions(+), 19 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 6457216676014eb51dbeb1f4daf008b415138ac1..5dcbb962be2484481d6afacd6b4647932acc38ec 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -468,7 +468,7 @@ pub const Target = union(enum) { }; const cpu = switch (arch) { .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic, - .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline, + .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic, .avr => &avr.cpu.avr1, .bpfel, .bpfeb => &bpf.cpu.generic, .hexagon => &hexagon.cpu.generic, diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4d05a94290af1c972d75c27bad2df2afa17d6b7d..4639fe6dcc4eb04ede4b884c749373964a927d76 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -1225,11 +1225,6 @@ pub const cpu = struct { .cyclone, }), }; - pub const baseline = Cpu{ - .name = "baseline", - .llvm_name = null, - .features = featureSet(&[_]Feature{}), - }; pub const cortex_a35 = Cpu{ .name = "cortex_a35", .llvm_name = "cortex-a35", @@ -1416,7 +1411,6 @@ pub const cpu = struct { /// compiler has inefficient memory and CPU usage, affecting build times. pub const all_cpus = &[_]*const Cpu{ &cpu.apple_latest, - &cpu.baseline, &cpu.cortex_a35, &cpu.cortex_a53, &cpu.cortex_a55, diff --git a/test/tests.zig b/test/tests.zig index 1ec25d11ecdca1ab8c9d2acf859f8a0e1c224e86..13cd2c3198177d17a436c3383ed40eae794b0feb 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -111,8 +111,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_5a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8_1a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), .abi = .none, }, }, @@ -121,8 +121,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_5a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8_1a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -132,8 +132,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_5a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8_1a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), .abi = .gnu, }, }, @@ -144,8 +144,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .arm = .v8_5a }, - .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .arm = .v8_1a }, + .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), .abi = .none, }, }, @@ -154,8 +154,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .arm = .v8_5a }, - .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .arm = .v8_1a }, + .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), .abi = .musleabihf, }, }, @@ -166,8 +166,8 @@ const test_targets = blk: { // .target = Target{ // .Cross = CrossTarget{ // .os = .linux, - // .arch = Target.Arch{ .arm = .v8_5a }, - // .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(), + // .arch = Target.Arch{ .arm = .v8_1a }, + // .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), // .abi = .gnueabihf, // }, // }, -- 2.54.0 From c86589a738e5053a26b2be7d156bcfee1565f00b Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 23 Jan 2020 02:05:24 -0500 Subject: [PATCH 60/63] disable f128 compiler_rt tests failing on windows These were never working with native CPU features. In this branch, we fix native CPU features not being enabled on Windows, and regress f128 language features. In the llvm10 branch, all this is fixed, and the tests are re-enabled. --- lib/std/special/compiler_rt/addXf3_test.zig | 8 ++++++++ lib/std/special/compiler_rt/fixtfdi_test.zig | 4 ++++ lib/std/special/compiler_rt/fixtfsi_test.zig | 4 ++++ lib/std/special/compiler_rt/fixtfti_test.zig | 4 ++++ lib/std/special/compiler_rt/fixunstfdi_test.zig | 4 ++++ lib/std/special/compiler_rt/fixunstfsi_test.zig | 4 ++++ lib/std/special/compiler_rt/fixunstfti_test.zig | 4 ++++ lib/std/special/compiler_rt/floattitf_test.zig | 4 ++++ lib/std/special/compiler_rt/floatuntitf_test.zig | 4 ++++ lib/std/special/compiler_rt/mulXf3_test.zig | 4 ++++ lib/std/special/compiler_rt/truncXfYf2_test.zig | 8 ++++++++ 11 files changed, 52 insertions(+) diff --git a/lib/std/special/compiler_rt/addXf3_test.zig b/lib/std/special/compiler_rt/addXf3_test.zig index af991b37e923cfbc4b363dc0654ed4e6297ba756..402bb5a43c4c815ab23b7004321187da3f210f25 100644 --- a/lib/std/special/compiler_rt/addXf3_test.zig +++ b/lib/std/special/compiler_rt/addXf3_test.zig @@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void { } test "addtf3" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0); // NaN + any = NaN @@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void { } test "subtf3" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } // qNaN - any = qNaN test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0); diff --git a/lib/std/special/compiler_rt/fixtfdi_test.zig b/lib/std/special/compiler_rt/fixtfdi_test.zig index 6baa9011c3ea49ca0f854dd78c9cf7976a744f00..4c43c90550ed76c354bf75d7eb91e444b8e0d353 100644 --- a/lib/std/special/compiler_rt/fixtfdi_test.zig +++ b/lib/std/special/compiler_rt/fixtfdi_test.zig @@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void { } test "fixtfdi" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } //warn("\n", .{}); test__fixtfdi(-math.f128_max, math.minInt(i64)); diff --git a/lib/std/special/compiler_rt/fixtfsi_test.zig b/lib/std/special/compiler_rt/fixtfsi_test.zig index c7294fe250146af0346957d38c6fba8e07a5c408..4eabd0c59466e23088014db3bf8d65fbac672535 100644 --- a/lib/std/special/compiler_rt/fixtfsi_test.zig +++ b/lib/std/special/compiler_rt/fixtfsi_test.zig @@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void { } test "fixtfsi" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } //warn("\n", .{}); test__fixtfsi(-math.f128_max, math.minInt(i32)); diff --git a/lib/std/special/compiler_rt/fixtfti_test.zig b/lib/std/special/compiler_rt/fixtfti_test.zig index 6b8218e2f61a9f1ea1958c4ae8694bd8cb082bc8..acda2f162bd976a822bdebf02fe449e3ac70748b 100644 --- a/lib/std/special/compiler_rt/fixtfti_test.zig +++ b/lib/std/special/compiler_rt/fixtfti_test.zig @@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void { } test "fixtfti" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } //warn("\n", .{}); test__fixtfti(-math.f128_max, math.minInt(i128)); diff --git a/lib/std/special/compiler_rt/fixunstfdi_test.zig b/lib/std/special/compiler_rt/fixunstfdi_test.zig index 0d47641c092af8fbfd0b8931da7df0b8faed3be5..154fffe18a3cf27fad0d52e16b09e9591bc90891 100644 --- a/lib/std/special/compiler_rt/fixunstfdi_test.zig +++ b/lib/std/special/compiler_rt/fixunstfdi_test.zig @@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void { } test "fixunstfdi" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__fixunstfdi(0.0, 0); test__fixunstfdi(0.5, 0); diff --git a/lib/std/special/compiler_rt/fixunstfsi_test.zig b/lib/std/special/compiler_rt/fixunstfsi_test.zig index 286567629a3f7afe45fb746b4ee95915ab672344..af312ddc464419a26fb9420a0bc5f96c523f23bc 100644 --- a/lib/std/special/compiler_rt/fixunstfsi_test.zig +++ b/lib/std/special/compiler_rt/fixunstfsi_test.zig @@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void { const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000)); test "fixunstfsi" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__fixunstfsi(inf128, 0xffffffff); test__fixunstfsi(0, 0x0); test__fixunstfsi(0x1.23456789abcdefp+5, 0x24); diff --git a/lib/std/special/compiler_rt/fixunstfti_test.zig b/lib/std/special/compiler_rt/fixunstfti_test.zig index 62a9bbfecfb8c4a5832f34083cbd11ef11309fbc..84dbf991e2cafaa9ddd2356f57e43e36998acc49 100644 --- a/lib/std/special/compiler_rt/fixunstfti_test.zig +++ b/lib/std/special/compiler_rt/fixunstfti_test.zig @@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void { const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000)); test "fixunstfti" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff); test__fixunstfti(0.0, 0); diff --git a/lib/std/special/compiler_rt/floattitf_test.zig b/lib/std/special/compiler_rt/floattitf_test.zig index 53e3e48bdb6a8cd96aec7ecfb5a4dc098bdd37e1..0b2b5b958a60f7dedac07279e222078985093261 100644 --- a/lib/std/special/compiler_rt/floattitf_test.zig +++ b/lib/std/special/compiler_rt/floattitf_test.zig @@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void { } test "floattitf" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__floattitf(0, 0.0); test__floattitf(1, 1.0); diff --git a/lib/std/special/compiler_rt/floatuntitf_test.zig b/lib/std/special/compiler_rt/floatuntitf_test.zig index 09f3eabb3e60a79f7de5d115b270a7ca39584cd8..8b99bbef5dc42767d23b9bf5e18eac68bda579e9 100644 --- a/lib/std/special/compiler_rt/floatuntitf_test.zig +++ b/lib/std/special/compiler_rt/floatuntitf_test.zig @@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void { } test "floatuntitf" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } test__floatuntitf(0, 0.0); test__floatuntitf(1, 1.0); diff --git a/lib/std/special/compiler_rt/mulXf3_test.zig b/lib/std/special/compiler_rt/mulXf3_test.zig index 57dc38532174095c9fda6f4cc028bf5bbc3766d0..00db984a89e723587118022abf39d26c7bea1fa9 100644 --- a/lib/std/special/compiler_rt/mulXf3_test.zig +++ b/lib/std/special/compiler_rt/mulXf3_test.zig @@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 { return float_result; } test "multf3" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } // qNaN * any = qNaN test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0); diff --git a/lib/std/special/compiler_rt/truncXfYf2_test.zig b/lib/std/special/compiler_rt/truncXfYf2_test.zig index baec2a445061f8a6b5eae624bb2a0dd6b79ab1a9..f14dbe6b4371d239a64911ee342eef6acaba0905 100644 --- a/lib/std/special/compiler_rt/truncXfYf2_test.zig +++ b/lib/std/special/compiler_rt/truncXfYf2_test.zig @@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void { } test "trunctfsf2" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } // qnan test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000); // nan @@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void { } test "trunctfdf2" { + if (@import("std").Target.current.isWindows()) { + // TODO https://github.com/ziglang/zig/issues/508 + return error.SkipZigTest; + } // qnan test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000); // nan -- 2.54.0 From fbfda7f00edbbf4eb623898d53c3faf43ab874ce Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Thu, 23 Jan 2020 13:02:45 -0500 Subject: [PATCH 61/63] fix incorrect list of sub-arches for aarch64 tests use older sub-arch that works in the older qemu --- lib/std/target.zig | 22 ++++++++-------------- lib/std/target/aarch64.zig | 11 +++++++++++ src/target.cpp | 7 ++----- src/zig_llvm.cpp | 4 ++-- test/tests.zig | 24 ++++++++++++------------ 5 files changed, 35 insertions(+), 33 deletions(-) diff --git a/lib/std/target.zig b/lib/std/target.zig index 5dcbb962be2484481d6afacd6b4647932acc38ec..0b09ebf8384cd0d729f990f73037cbb846de1b0b 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -123,12 +123,12 @@ pub const Target = union(enum) { v8_3a, v8_2a, v8_1a, - v8, + v8a, v8r, v8m_baseline, v8m_mainline, v8_1m_mainline, - v7, + v7a, v7em, v7m, v7s, @@ -144,8 +144,8 @@ pub const Target = union(enum) { pub fn version(version: Arm32) comptime_int { return switch (version) { - .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8, - .v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7, + .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8, + .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7, .v6, .v6m, .v6k, .v6t2 => 6, .v5, .v5te => 5, .v4t => 4, @@ -158,10 +158,7 @@ pub const Target = union(enum) { v8_3a, v8_2a, v8_1a, - v8, - v8r, - v8m_baseline, - v8m_mainline, + v8a, }; pub const Kalimba = enum { v5, @@ -189,12 +186,12 @@ pub const Target = union(enum) { .v8_3a => @enumToInt(arm.Feature.armv8_3_a), .v8_2a => @enumToInt(arm.Feature.armv8_2_a), .v8_1a => @enumToInt(arm.Feature.armv8_1_a), - .v8 => @enumToInt(arm.Feature.armv8_a), + .v8a => @enumToInt(arm.Feature.armv8_a), .v8r => @enumToInt(arm.Feature.armv8_r), .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base), .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main), .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main), - .v7 => @enumToInt(arm.Feature.armv7_a), + .v7a => @enumToInt(arm.Feature.armv7_a), .v7em => @enumToInt(arm.Feature.armv7e_m), .v7m => @enumToInt(arm.Feature.armv7_m), .v7s => @enumToInt(arm.Feature.armv7s), @@ -214,10 +211,7 @@ pub const Target = union(enum) { .v8_3a => @enumToInt(aarch64.Feature.v8_3a), .v8_2a => @enumToInt(aarch64.Feature.v8_2a), .v8_1a => @enumToInt(aarch64.Feature.v8_1a), - .v8 => @enumToInt(aarch64.Feature.v8_1a), - .v8r => @enumToInt(aarch64.Feature.v8_1a), - .v8m_baseline => @enumToInt(aarch64.Feature.v8_1a), - .v8m_mainline => @enumToInt(aarch64.Feature.v8_1a), + .v8a => @enumToInt(aarch64.Feature.v8a), }, else => return null, }; diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig index 4639fe6dcc4eb04ede4b884c749373964a927d76..d2878e24239bd12320a7877190c662f7f034a364 100644 --- a/lib/std/target/aarch64.zig +++ b/lib/std/target/aarch64.zig @@ -137,6 +137,7 @@ pub const Feature = enum { use_aa, use_postra_scheduler, use_reciprocal_square_root, + v8a, v8_1a, v8_2a, v8_3a, @@ -153,6 +154,7 @@ pub const Feature = enum { pub usingnamespace Cpu.Feature.feature_set_fns(Feature); pub const all_features = blk: { + @setEvalBranchQuota(2000); const len = @typeInfo(Feature).Enum.fields.len; std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count); var result: [len]Cpu.Feature = undefined; @@ -1108,6 +1110,14 @@ pub const all_features = blk: { .description = "Use the reciprocal square root approximation", .dependencies = featureSet(&[_]Feature{}), }; + result[@enumToInt(Feature.v8a)] = .{ + .llvm_name = null, + .description = "Support ARM v8a instructions", + .dependencies = featureSet(&[_]Feature{ + .fp_armv8, + .neon, + }), + }; result[@enumToInt(Feature.v8_1a)] = .{ .llvm_name = "v8.1a", .description = "Support ARM v8.1a instructions", @@ -1118,6 +1128,7 @@ pub const all_features = blk: { .pan, .rdm, .vh, + .v8a, }), }; result[@enumToInt(Feature.v8_2a)] = .{ diff --git a/src/target.cpp b/src/target.cpp index 7542ff7c95752b3f8cd453360cd8150a5b0b51fc..53d2e598bec874b09e0071702611c6b6374e65b4 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = { ZigLLVM_ARMSubArch_v8_2a, ZigLLVM_ARMSubArch_v8_1a, ZigLLVM_ARMSubArch_v8, - ZigLLVM_ARMSubArch_v8r, - ZigLLVM_ARMSubArch_v8m_baseline, - ZigLLVM_ARMSubArch_v8m_mainline, }; static const ZigLLVM_SubArchType subarch_list_kalimba[] = { @@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) { case ZigLLVM_ARMSubArch_v8_1a: return "v8_1a"; case ZigLLVM_ARMSubArch_v8: - return "v8"; + return "v8a"; case ZigLLVM_ARMSubArch_v8r: return "v8r"; case ZigLLVM_ARMSubArch_v8m_baseline: @@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) { case ZigLLVM_ARMSubArch_v8_1m_mainline: return "v8_1m_mainline"; case ZigLLVM_ARMSubArch_v7: - return "v7"; + return "v7a"; case ZigLLVM_ARMSubArch_v7em: return "v7em"; case ZigLLVM_ARMSubArch_v7m: diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index b5c43b632b83cc74535056feed2bb1220abd1762..614d31dc5a31bd4a7aa86cf0b5c853fa1941b775 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) { case ZigLLVM_ARMSubArch_v8_1a: return "v8.1a"; case ZigLLVM_ARMSubArch_v8: - return "v8"; + return "v8a"; case ZigLLVM_ARMSubArch_v8r: return "v8r"; case ZigLLVM_ARMSubArch_v8m_baseline: @@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) { case ZigLLVM_ARMSubArch_v8_1m_mainline: return "v8.1m.main"; case ZigLLVM_ARMSubArch_v7: - return "v7"; + return "v7a"; case ZigLLVM_ARMSubArch_v7em: return "v7em"; case ZigLLVM_ARMSubArch_v7m: diff --git a/test/tests.zig b/test/tests.zig index 13cd2c3198177d17a436c3383ed40eae794b0feb..4d1f15fe294ea06737d39fa78926440f0125fc45 100644 --- a/test/tests.zig +++ b/test/tests.zig @@ -111,8 +111,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_1a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .none, }, }, @@ -121,8 +121,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_1a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .musl, }, }, @@ -132,8 +132,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .aarch64 = .v8_1a }, - .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .aarch64 = .v8a }, + .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(), .abi = .gnu, }, }, @@ -144,8 +144,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .arm = .v8_1a }, - .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .arm = .v8a }, + .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), .abi = .none, }, }, @@ -154,8 +154,8 @@ const test_targets = blk: { .target = Target{ .Cross = CrossTarget{ .os = .linux, - .arch = Target.Arch{ .arm = .v8_1a }, - .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), + .arch = Target.Arch{ .arm = .v8a }, + .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), .abi = .musleabihf, }, }, @@ -166,8 +166,8 @@ const test_targets = blk: { // .target = Target{ // .Cross = CrossTarget{ // .os = .linux, - // .arch = Target.Arch{ .arm = .v8_1a }, - // .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(), + // .arch = Target.Arch{ .arm = .v8a }, + // .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(), // .abi = .gnueabihf, // }, // }, -- 2.54.0 From d9fb6c20540300013dc67ec144b555b8ab649646 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 26 Jan 2020 00:55:04 -0500 Subject: [PATCH 62/63] fix compilation error --- src/ir.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/ir.cpp b/src/ir.cpp index 7e73b3107dc19e2d92aa885a7fe05ac229a7ee9c..b24cf3828e7d508f63adf1337ebdafcf3eb7cd2e 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -23263,9 +23263,9 @@ static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrc } if (target->value->type->id != ZigTypeIdEnum) { - ir_add_error(ira, target, + ir_add_error(ira, &target->base, buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name))); - return ira->codegen->invalid_instruction; + return ira->codegen->invalid_inst_gen; } if (target->value->type->data.enumeration.src_field_count == 1 && -- 2.54.0 From 3839ea89785856bbed0624a6a18eb6e5acfb46c3 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 26 Jan 2020 09:55:04 -0500 Subject: [PATCH 63/63] fix debug info code not being freestanding compatible in stack tracing code, the idea was to detect the tty settings at the top of the stack and pass the information down. somewhere along the way this got changed so that setTtyColor was assuming the global stderr_file was related to the output stream the stack trace was being printed to. now, tty_color is changed to tty_config, and it is an enum rather than a bool, telling how tty colors are expected to be handled. windows is still incorrectly looking at stderr_file. --- lib/std/debug.zig | 234 +++++++++++++++++++++++++--------------------- 1 file changed, 125 insertions(+), 109 deletions(-) diff --git a/lib/std/debug.zig b/lib/std/debug.zig index 33b062db2385ff7a254c3f03845ec72e2ebf14d6..75d2afb8e939f8b6b87a676b9e3ff4586da1f7b0 100644 --- a/lib/std/debug.zig +++ b/lib/std/debug.zig @@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo { } } -fn wantTtyColor() bool { +fn detectTTYConfig() TTY.Config { var bytes: [128]u8 = undefined; const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator; - return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| true else |_| stderr_file.isTty(); + if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| { + return .escape_codes; + } else |_| { + if (stderr_file.supportsAnsiEscapeCodes()) { + return .escape_codes; + } else if (builtin.os == .windows) { + return .windows_api; + } else { + return .no_color; + } + } } /// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned. @@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void { stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return; return; }; - writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch |err| { + writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch |err| { stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return; return; }; @@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void { stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return; return; }; - const tty_color = wantTtyColor(); - printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return; + const tty_config = detectTTYConfig(); + printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return; const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*; - printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return; + printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return; var it = StackIterator{ .first_addr = null, .fp = bp, }; while (it.next()) |return_address| { - printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return; + printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return; } } @@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void { stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return; return; }; - writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch |err| { + writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch |err| { stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return; return; }; @@ -264,7 +274,7 @@ pub fn writeStackTrace( out_stream: var, allocator: *mem.Allocator, debug_info: *DebugInfo, - tty_color: bool, + tty_config: TTY.Config, ) !void { if (builtin.strip_debug_info) return error.MissingDebugInfo; var frame_index: usize = 0; @@ -275,7 +285,7 @@ pub fn writeStackTrace( frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len; }) { const return_address = stack_trace.instruction_addresses[frame_index]; - try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color); + try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config); } } @@ -319,20 +329,25 @@ pub const StackIterator = struct { } }; -pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void { +pub fn writeCurrentStackTrace( + out_stream: var, + debug_info: *DebugInfo, + tty_config: TTY.Config, + start_addr: ?usize, +) !void { if (builtin.os == .windows) { - return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr); + return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr); } var it = StackIterator.init(start_addr); while (it.next()) |return_address| { - try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color); + try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config); } } pub fn writeCurrentStackTraceWindows( out_stream: var, debug_info: *DebugInfo, - tty_color: bool, + tty_config: TTY.Config, start_addr: ?usize, ) !void { var addr_buf: [1024]usize = undefined; @@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows( return; } else 0; for (addrs[start_i..]) |addr| { - try printSourceAtAddress(debug_info, out_stream, addr, tty_color); + try printSourceAtAddress(debug_info, out_stream, addr, tty_config); } } /// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented, /// make this `noasync fn` and remove the individual noasync calls. -pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void { +pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void { if (builtin.os == .windows) { - return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color); + return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config); } if (comptime std.Target.current.isDarwin()) { - return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color); + return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config); } - return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color); + return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config); } -fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void { +fn printSourceAtAddressWindows( + di: *DebugInfo, + out_stream: var, + relocated_address: usize, + tty_config: TTY.Config, +) !void { const allocator = getDebugInfoAllocator(); const base_address = process.getBaseAddress(); const relative_address = relocated_address - base_address; @@ -379,7 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres } } else { // we have no information to add to the address - return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_color, printLineFromFileAnyOs); + return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs); }; const mod = &di.modules[mod_index]; @@ -507,85 +527,81 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres relocated_address, symbol_name, obj_basename, - tty_color, + tty_config, printLineFromFileAnyOs, ); } -const TtyColor = enum { - Red, - Green, - Cyan, - White, - Dim, - Bold, - Reset, +pub const TTY = struct { + pub const Color = enum { + Red, + Green, + Cyan, + White, + Dim, + Bold, + Reset, + }; + + pub const Config = enum { + no_color, + escape_codes, + // TODO give this a payload of file handle + windows_api, + + fn setColor(conf: Config, out_stream: var, color: Color) void { + switch (conf) { + .no_color => return, + .escape_codes => switch (color) { + .Red => out_stream.write(RED) catch return, + .Green => out_stream.write(GREEN) catch return, + .Cyan => out_stream.write(CYAN) catch return, + .White, .Bold => out_stream.write(WHITE) catch return, + .Dim => out_stream.write(DIM) catch return, + .Reset => out_stream.write(RESET) catch return, + }, + .windows_api => if (builtin.os == .windows) { + const S = struct { + var attrs: windows.WORD = undefined; + var init_attrs = false; + }; + if (!S.init_attrs) { + S.init_attrs = true; + var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined; + // TODO handle error + _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info); + S.attrs = info.wAttributes; + } + + // TODO handle errors + switch (color) { + .Red => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {}; + }, + .Green => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {}; + }, + .Cyan => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {}; + }, + .White, .Bold => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {}; + }, + .Dim => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {}; + }, + .Reset => { + _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {}; + }, + } + } else { + unreachable; + }, + } + } + }; }; -/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt -fn setTtyColor(tty_color: TtyColor) void { - if (stderr_file.supportsAnsiEscapeCodes()) { - switch (tty_color) { - TtyColor.Red => { - stderr_file.write(RED) catch return; - }, - TtyColor.Green => { - stderr_file.write(GREEN) catch return; - }, - TtyColor.Cyan => { - stderr_file.write(CYAN) catch return; - }, - TtyColor.White, TtyColor.Bold => { - stderr_file.write(WHITE) catch return; - }, - TtyColor.Dim => { - stderr_file.write(DIM) catch return; - }, - TtyColor.Reset => { - stderr_file.write(RESET) catch return; - }, - } - - return; - } - - if (builtin.os == .windows) { - const S = struct { - var attrs: windows.WORD = undefined; - var init_attrs = false; - }; - if (!S.init_attrs) { - S.init_attrs = true; - var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined; - // TODO handle error - _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info); - S.attrs = info.wAttributes; - } - - // TODO handle errors - switch (tty_color) { - TtyColor.Red => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {}; - }, - TtyColor.Green => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {}; - }, - TtyColor.Cyan => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {}; - }, - TtyColor.White, TtyColor.Bold => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {}; - }, - TtyColor.Dim => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {}; - }, - TtyColor.Reset => { - _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {}; - }, - } - } -} - fn populateModule(di: *DebugInfo, mod: *Module) !void { if (mod.populated) return; @@ -650,12 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach return null; } -fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void { +fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void { const base_addr = process.getBaseAddress(); const adjusted_addr = 0x100000000 + (address - base_addr); const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse { - return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFileAnyOs); + return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs); }; const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx)); @@ -676,13 +692,13 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt address, symbol_name, compile_unit_name, - tty_color, + tty_config, printLineFromFileAnyOs, ); } -pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void { - return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs); +pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void { + return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs); } fn printLineInfo( @@ -691,10 +707,10 @@ fn printLineInfo( address: usize, symbol_name: []const u8, compile_unit_name: []const u8, - tty_color: bool, + tty_config: TTY.Config, comptime printLineFromFile: var, ) !void { - if (tty_color) setTtyColor(.White); + tty_config.setColor(out_stream, .White); if (line_info) |*li| { try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column }); @@ -702,11 +718,11 @@ fn printLineInfo( try out_stream.print("???:?:?", .{}); } - if (tty_color) setTtyColor(.Reset); + tty_config.setColor(out_stream, .Reset); try out_stream.write(": "); - if (tty_color) setTtyColor(.Dim); + tty_config.setColor(out_stream, .Dim); try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name }); - if (tty_color) setTtyColor(.Reset); + tty_config.setColor(out_stream, .Reset); try out_stream.write("\n"); // Show the matching source code line if possible @@ -717,9 +733,9 @@ fn printLineInfo( const space_needed = @intCast(usize, li.column - 1); try out_stream.writeByteNTimes(' ', space_needed); - if (tty_color) setTtyColor(.Green); + tty_config.setColor(out_stream, .Green); try out_stream.write("^"); - if (tty_color) setTtyColor(.Reset); + tty_config.setColor(out_stream, .Reset); } try out_stream.write("\n"); } else |err| switch (err) { @@ -1167,11 +1183,11 @@ pub const DwarfInfo = struct { self: *DwarfInfo, out_stream: var, address: usize, - tty_color: bool, + tty_config: TTY.Config, comptime printLineFromFile: var, ) !void { const compile_unit = self.findCompileUnit(address) catch { - return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFile); + return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile); }; const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name); @@ -1188,7 +1204,7 @@ pub const DwarfInfo = struct { address, symbol_name, compile_unit_name, - tty_color, + tty_config, printLineFromFile, ); } -- 2.54.0