authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-07 19:18:46+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-07 19:18:46+02:00
loga54906b46e01f708fb521cb01445808382ef9954
tree80b411e62bb7d0d3ca8a46a99be16ecfe2c1e17c
parente4f0c62b5d7edd56100c738de5317d457c002f3b
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.debug.cpu_context: make arch-specific implementations private

1 files changed, 10 insertions(+), 10 deletions(-)

lib/std/debug/cpu_context.zig+10-10
......@@ -297,7 +297,7 @@ pub fn fromWindowsContext(ctx: *const std.os.windows.CONTEXT) Native {
297297 };
298298}
299299
300pub const X86 = struct {
300const X86 = struct {
301301 /// The first 8 registers here intentionally match the order of registers in the x86 instruction
302302 /// encoding. This order is inherited by the PUSHA instruction and the DWARF register mappings,
303303 /// among other things.
......@@ -356,7 +356,7 @@ pub const X86 = struct {
356356 }
357357};
358358
359pub const X86_64 = struct {
359const X86_64 = struct {
360360 /// The order here intentionally matches the order of the DWARF register mappings. It's unclear
361361 /// where those mappings actually originated from---the ordering of the first 4 registers seems
362362 /// quite unusual---but it is currently convenient for us to match DWARF.
......@@ -426,7 +426,7 @@ pub const X86_64 = struct {
426426 }
427427};
428428
429pub const Arm = struct {
429const Arm = struct {
430430 /// The numbered general-purpose registers R0 - R15.
431431 r: [16]u32,
432432
......@@ -480,7 +480,7 @@ pub const Arm = struct {
480480};
481481
482482/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
483pub const Aarch64 = extern struct {
483const Aarch64 = extern struct {
484484 /// The numbered general-purpose registers X0 - X30.
485485 x: [31]u64,
486486 sp: u64,
......@@ -542,7 +542,7 @@ pub const Aarch64 = extern struct {
542542};
543543
544544/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
545pub const Hexagon = extern struct {
545const Hexagon = extern struct {
546546 /// The numbered general-purpose registers r0 - r31.
547547 r: [32]u32,
548548 pc: u32,
......@@ -610,7 +610,7 @@ pub const Hexagon = extern struct {
610610};
611611
612612/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
613pub const LoongArch = extern struct {
613const LoongArch = extern struct {
614614 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
615615 r: [32]Gpr,
616616 pc: Gpr,
......@@ -712,7 +712,7 @@ pub const LoongArch = extern struct {
712712};
713713
714714/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
715pub const Mips = extern struct {
715const Mips = extern struct {
716716 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
717717 r: [32]Gpr,
718718 pc: Gpr,
......@@ -834,7 +834,7 @@ pub const Mips = extern struct {
834834};
835835
836836/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
837pub const Powerpc = extern struct {
837const Powerpc = extern struct {
838838 /// The numbered general-purpose registers r0 - r31.
839839 r: [32]Gpr,
840840 pc: Gpr,
......@@ -990,7 +990,7 @@ pub const Powerpc = extern struct {
990990};
991991
992992/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
993pub const Riscv = extern struct {
993const Riscv = extern struct {
994994 /// The numbered general-purpose registers r0 - r31. r0 must be zero.
995995 r: [32]Gpr,
996996 pc: Gpr,
......@@ -1096,7 +1096,7 @@ pub const Riscv = extern struct {
10961096};
10971097
10981098/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
1099pub const S390x = extern struct {
1099const S390x = extern struct {
11001100 /// The numbered general-purpose registers r0 - r15.
11011101 r: [16]u64,
11021102 /// The program counter.