From ab2f9ca50341ce6115f2839281a6e3c640271583 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Wed, 15 Apr 2026 22:48:17 +0200
Subject: [PATCH] std.os.linux: csky and xtensa also use aligned register pairs

---
 lib/std/os/linux.zig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig
index bc9fce1506b2ddb691cb36d7b3f58806182cac94..6dbbc83288e6af532d815749bd6f70d64d1fbade 100644
--- a/lib/std/os/linux.zig
+++ b/lib/std/os/linux.zig
@@ -566,9 +566,11 @@ fn getauxvalImpl(index: usize) callconv(.c) usize {
 // in a even-aligned register pair.
 const require_aligned_register_pair =
     builtin.cpu.arch.isArm() or
+    builtin.cpu.arch == .csky or
     builtin.cpu.arch == .hexagon or
     builtin.cpu.arch.isMIPS32() or
-    builtin.cpu.arch.isPowerPC32();
+    builtin.cpu.arch.isPowerPC32() or
+    builtin.cpu.arch.isXtensa();
 
 // Split a 64bit value into a {LSB,MSB} pair.
 // The LE/BE variants specify the endianness to assume.
-- 
2.54.0