authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-08-07 01:08:44-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-08-07 01:08:44-07:00
logb071b10ce83609199577ff077fb117ed62c98fe7
treee7ab9b6278e96a518e9a668783715d7d23b204b5
parent8268d7be52fdcff9dde3020f65aeb48b76f4397e
parent7d88bd0b9c4ca12235769a04c45842dab3b54827
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20894 from alexrp/target-cleanup-4

`std.Target`: Minor rework to some `isArch()` functions, fix some related issues throughout `std`

12 files changed, 94 insertions(+), 98 deletions(-)

lib/compiler/aro/aro/Toolchain.zig+1-1
......@@ -89,7 +89,7 @@ pub fn discover(tc: *Toolchain) !void {
8989 .{ .unknown = {} } // TODO
9090 else if (target.cpu.arch.isMIPS())
9191 .{ .unknown = {} } // TODO
92 else if (target.cpu.arch.isPPC())
92 else if (target.cpu.arch.isPowerPC())
9393 .{ .unknown = {} } // TODO
9494 else if (target.cpu.arch == .ve)
9595 .{ .unknown = {} } // TODO
lib/compiler/aro/aro/target.zig+1-1
......@@ -264,7 +264,7 @@ pub fn systemCompiler(target: std.Target) LangOpts.Compiler {
264264pub fn hasFloat128(target: std.Target) bool {
265265 if (target.cpu.arch.isWasm()) return true;
266266 if (target.isDarwin()) return false;
267 if (target.cpu.arch.isPPC() or target.cpu.arch.isPPC64()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
267 if (target.cpu.arch.isPowerPC()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
268268 return switch (target.os.tag) {
269269 .dragonfly,
270270 .haiku,
lib/compiler_rt/common.zig+1-1
......@@ -22,7 +22,7 @@ pub const want_aeabi = switch (builtin.abi) {
2222 },
2323 else => false,
2424};
25pub const want_ppc_abi = builtin.cpu.arch.isPPC() or builtin.cpu.arch.isPPC64();
25pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();
2626
2727pub const want_float_exceptions = !builtin.cpu.arch.isWasm();
2828
lib/std/Target.zig+25-3
......@@ -1084,6 +1084,13 @@ pub const Cpu = struct {
10841084 };
10851085 }
10861086
1087 pub inline fn isLoongArch(arch: Arch) bool {
1088 return switch (arch) {
1089 .loongarch32, .loongarch64 => true,
1090 else => false,
1091 };
1092 }
1093
10871094 pub inline fn isRISCV(arch: Arch) bool {
10881095 return switch (arch) {
10891096 .riscv32, .riscv64 => true,
......@@ -1092,20 +1099,35 @@ pub const Cpu = struct {
10921099 }
10931100
10941101 pub inline fn isMIPS(arch: Arch) bool {
1102 return arch.isMIPS32() or arch.isMIPS64();
1103 }
1104
1105 pub inline fn isMIPS32(arch: Arch) bool {
10951106 return switch (arch) {
1096 .mips, .mipsel, .mips64, .mips64el => true,
1107 .mips, .mipsel => true,
10971108 else => false,
10981109 };
10991110 }
11001111
1101 pub inline fn isPPC(arch: Arch) bool {
1112 pub inline fn isMIPS64(arch: Arch) bool {
1113 return switch (arch) {
1114 .mips64, .mips64el => true,
1115 else => false,
1116 };
1117 }
1118
1119 pub inline fn isPowerPC(arch: Arch) bool {
1120 return arch.isPowerPC32() or arch.isPowerPC64();
1121 }
1122
1123 pub inline fn isPowerPC32(arch: Arch) bool {
11021124 return switch (arch) {
11031125 .powerpc, .powerpcle => true,
11041126 else => false,
11051127 };
11061128 }
11071129
1108 pub inline fn isPPC64(arch: Arch) bool {
1130 pub inline fn isPowerPC64(arch: Arch) bool {
11091131 return switch (arch) {
11101132 .powerpc64, .powerpc64le => true,
11111133 else => false,
lib/std/os/linux.zig+8-10
......@@ -16,8 +16,7 @@ const native_arch = builtin.cpu.arch;
1616const native_abi = builtin.abi;
1717const native_endian = native_arch.endian();
1818const is_mips = native_arch.isMIPS();
19const is_ppc = native_arch.isPPC();
20const is_ppc64 = native_arch.isPPC64();
19const is_ppc = native_arch.isPowerPC();
2120const is_sparc = native_arch.isSPARC();
2221const iovec = std.posix.iovec;
2322const iovec_const = std.posix.iovec_const;
......@@ -434,10 +433,9 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {
434433// Some architectures (and some syscalls) require 64bit parameters to be passed
435434// in a even-aligned register pair.
436435const require_aligned_register_pair =
437 builtin.cpu.arch.isPPC() or
438 builtin.cpu.arch.isMIPS() or
439 builtin.cpu.arch.isARM() or
440 builtin.cpu.arch.isThumb();
436 builtin.cpu.arch.isPowerPC32() or
437 builtin.cpu.arch.isMIPS32() or
438 builtin.cpu.arch.isArmOrThumb();
441439
442440// Split a 64bit value into a {LSB,MSB} pair.
443441// The LE/BE variants specify the endianness to assume.
......@@ -2228,7 +2226,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
22282226}
22292227
22302228pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
2231 if (comptime native_arch.isARM() or native_arch.isPPC()) {
2229 if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) {
22322230 // These architectures reorder the arguments so that a register is not skipped to align the
22332231 // register number that `offset` is passed in.
22342232
......@@ -3575,7 +3573,7 @@ pub const SO = if (is_mips) struct {
35753573 pub const RCVTIMEO_NEW = 66;
35763574 pub const SNDTIMEO_NEW = 67;
35773575 pub const DETACH_REUSEPORT_BPF = 68;
3578} else if (is_ppc or is_ppc64) struct {
3576} else if (is_ppc) struct {
35793577 pub const DEBUG = 1;
35803578 pub const REUSEADDR = 2;
35813579 pub const TYPE = 3;
......@@ -4023,8 +4021,8 @@ pub const T = struct {
40234021 pub const IOCSPGRP = if (is_mips) 0x741d else 0x5410;
40244022 pub const IOCOUTQ = if (is_mips) 0x7472 else 0x5411;
40254023 pub const IOCSTI = if (is_mips) 0x5472 else 0x5412;
4026 pub const IOCGWINSZ = if (is_mips or is_ppc64) 0x40087468 else 0x5413;
4027 pub const IOCSWINSZ = if (is_mips or is_ppc64) 0x80087467 else 0x5414;
4024 pub const IOCGWINSZ = if (is_mips or is_ppc) 0x40087468 else 0x5413;
4025 pub const IOCSWINSZ = if (is_mips or is_ppc) 0x80087467 else 0x5414;
40284026 pub const IOCMGET = if (is_mips) 0x741d else 0x5415;
40294027 pub const IOCMBIS = if (is_mips) 0x741b else 0x5416;
40304028 pub const IOCMBIC = if (is_mips) 0x741c else 0x5417;
lib/std/simd.zig+2-2
......@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
1818 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
1919 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
2020 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
21 } else if (cpu.arch.isARM()) {
21 } else if (cpu.arch.isArmOrThumb()) {
2222 if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;
2323 } else if (cpu.arch.isAARCH64()) {
2424 // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit
......@@ -26,7 +26,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
2626 // TODO: Check on this return when bigger values are more common
2727 if (std.Target.aarch64.featureSetHas(cpu.features, .sve)) break :blk 128;
2828 if (std.Target.aarch64.featureSetHas(cpu.features, .neon)) break :blk 128;
29 } else if (cpu.arch.isPPC() or cpu.arch.isPPC64()) {
29 } else if (cpu.arch.isPowerPC()) {
3030 if (std.Target.powerpc.featureSetHas(cpu.features, .altivec)) break :blk 128;
3131 } else if (cpu.arch.isMIPS()) {
3232 if (std.Target.mips.featureSetHas(cpu.features, .msa)) break :blk 128;
lib/std/start.zig+1-1
......@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {
495495 // ARMv6 targets (and earlier) have no support for TLS in hardware.
496496 // FIXME: Elide the check for targets >= ARMv7 when the target feature API
497497 // becomes less verbose (and more usable).
498 if (comptime native_arch.isARM()) {
498 if (comptime native_arch.isArmOrThumb()) {
499499 if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {
500500 // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls
501501 // For the time being use a simple trap instead of a @panic call to
src/codegen/llvm.zig+2-2
......@@ -399,7 +399,7 @@ const DataLayoutBuilder = struct {
399399 else if (self.target.cpu.arch == .powerpc64 and
400400 self.target.os.tag != .freebsd and self.target.abi != .musl)
401401 try writer.writeAll("-Fi64")
402 else if (self.target.cpu.arch.isPPC() or self.target.cpu.arch.isPPC64())
402 else if (self.target.cpu.arch.isPowerPC())
403403 try writer.writeAll("-Fn32");
404404 if (self.target.cpu.arch != .hexagon) {
405405 if (self.target.cpu.arch == .arc or self.target.cpu.arch == .s390x)
......@@ -659,7 +659,7 @@ const DataLayoutBuilder = struct {
659659 128 => abi = 64,
660660 else => {},
661661 }
662 } else if ((self.target.cpu.arch.isPPC64() and self.target.os.tag == .linux and
662 } else if ((self.target.cpu.arch.isPowerPC64() and self.target.os.tag == .linux and
663663 (size == 256 or size == 512)) or
664664 (self.target.cpu.arch.isNvptx() and (size == 16 or size == 32)))
665665 {
src/glibc.zig+9-9
......@@ -392,9 +392,9 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile, prog_node: std.Progre
392392
393393fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![]const u8 {
394394 const arch = comp.getTarget().cpu.arch;
395 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
396 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
397 const is_sparc = arch == .sparc or arch == .sparc64;
395 const is_ppc = arch.isPowerPC();
396 const is_aarch64 = arch.isAARCH64();
397 const is_sparc = arch.isSPARC();
398398 const is_64 = comp.getTarget().ptrBitWidth() == 64;
399399
400400 const s = path.sep_str;
......@@ -412,7 +412,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
412412 try result.appendSlice("sparc" ++ s ++ "sparc32");
413413 }
414414 }
415 } else if (arch.isARM()) {
415 } else if (arch.isArmOrThumb()) {
416416 try result.appendSlice("arm");
417417 } else if (arch.isMIPS()) {
418418 if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {
......@@ -529,10 +529,10 @@ fn add_include_dirs_arch(
529529 dir: []const u8,
530530) error{OutOfMemory}!void {
531531 const arch = target.cpu.arch;
532 const is_x86 = arch == .x86 or arch == .x86_64;
533 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
534 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
535 const is_sparc = arch == .sparc or arch == .sparc64;
532 const is_x86 = arch.isX86();
533 const is_aarch64 = arch.isAARCH64();
534 const is_ppc = arch.isPowerPC();
535 const is_sparc = arch.isSPARC();
536536 const is_64 = target.ptrBitWidth() == 64;
537537
538538 const s = path.sep_str;
......@@ -562,7 +562,7 @@ fn add_include_dirs_arch(
562562 try args.append("-I");
563563 try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));
564564 }
565 } else if (arch.isARM()) {
565 } else if (arch.isArmOrThumb()) {
566566 if (opt_nptl) |nptl| {
567567 try args.append("-I");
568568 try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));
src/libunwind.zig+1-1
......@@ -131,7 +131,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
131131 if (!comp.config.any_non_single_threaded) {
132132 try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
133133 }
134 if (target.cpu.arch.isARM() and target.abi.floatAbi() == .hard) {
134 if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) {
135135 try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
136136 }
137137 try cflags.append("-Wno-bitwise-conditional-parentheses");
test/behavior/union.zig+1-1
......@@ -1903,7 +1903,7 @@ test "reinterpret packed union" {
19031903 try comptime S.doTheTest();
19041904
19051905 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
1906 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest; // TODO
1906 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest; // TODO
19071907 if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; // TODO
19081908 try S.doTheTest();
19091909}
test/c_abi/main.zig+42-66
......@@ -11,7 +11,7 @@ const print = std.debug.print;
1111const expect = std.testing.expect;
1212const expectEqual = std.testing.expectEqual;
1313const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and
14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPPC();
14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();
1515
1616const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();
1717const have_f80 = builtin.cpu.arch.isX86();
......@@ -123,8 +123,7 @@ test "C ABI floats" {
123123}
124124
125125test "C ABI long double" {
126 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
127 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
126 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
128127
129128 c_long_double(12.34);
130129}
......@@ -182,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
182181extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
183182
184183const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
185 !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC() and !builtin.cpu.arch.isRISCV();
184 !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
186185
187186test "C ABI complex float" {
188187 if (!complex_abi_compatible) return error.SkipZigTest;
......@@ -324,7 +323,7 @@ extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, us
324323
325324test "C ABI struct u64 u64" {
326325 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
327 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
326 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
328327
329328 const s = c_ret_struct_u64_u64();
330329 try expect(s.a == 21);
......@@ -361,7 +360,7 @@ extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
361360
362361test "C ABI struct {f32,f32} f32" {
363362 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
364 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
363 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
365364
366365 const s = c_ret_struct_f32f32_f32();
367366 try expect(s.a.b == 1.0);
......@@ -391,7 +390,7 @@ extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
391390
392391test "C ABI struct f32 {f32,f32}" {
393392 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
394 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
393 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
395394
396395 const s = c_ret_struct_f32_f32f32();
397396 try expect(s.a == 1.0);
......@@ -426,8 +425,7 @@ extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
426425
427426test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {
428427 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
429 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
430 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
428 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
431429
432430 const s = c_ret_struct_u32_union_u32_u32u32();
433431 try expect(s.a == 1);
......@@ -447,7 +445,7 @@ extern fn c_big_struct(BigStruct) void;
447445
448446test "C ABI big struct" {
449447 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
450 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
448 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
451449
452450 const s = BigStruct{
453451 .a = 1,
......@@ -473,7 +471,7 @@ const BigUnion = extern union {
473471extern fn c_big_union(BigUnion) void;
474472
475473test "C ABI big union" {
476 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
474 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
477475
478476 const x = BigUnion{
479477 .a = BigStruct{
......@@ -506,8 +504,7 @@ extern fn c_ret_med_struct_mixed() MedStructMixed;
506504
507505test "C ABI medium struct of ints and floats" {
508506 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
509 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
510 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
507 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
511508
512509 const s = MedStructMixed{
513510 .a = 1234,
......@@ -539,8 +536,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;
539536test "C ABI small struct of ints" {
540537 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
541538 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
542 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
543 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
539 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
544540
545541 const s = SmallStructInts{
546542 .a = 1,
......@@ -573,8 +569,7 @@ extern fn c_ret_med_struct_ints() MedStructInts;
573569
574570test "C ABI medium struct of ints" {
575571 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
576 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
577 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
572 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
578573
579574 const s = MedStructInts{
580575 .x = 1,
......@@ -652,8 +647,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;
652647test "C ABI split struct of ints" {
653648 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
654649 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
655 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
656 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
650 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
657651
658652 const s = SplitStructInt{
659653 .a = 1234,
......@@ -680,8 +674,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;
680674test "C ABI split struct of ints and floats" {
681675 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
682676 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
683 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
684 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
677 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
685678
686679 const s = SplitStructMixed{
687680 .a = 1234,
......@@ -708,7 +701,7 @@ extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;
708701
709702test "C ABI sret and byval together" {
710703 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
711 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
704 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
712705
713706 const s = BigStruct{
714707 .a = 1,
......@@ -760,8 +753,7 @@ extern fn c_big_struct_floats(Vector5) void;
760753
761754test "C ABI structs of floats as parameter" {
762755 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
763 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
764 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
756 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
765757
766758 const v3 = Vector3{
767759 .x = 3.0,
......@@ -800,8 +792,7 @@ export fn zig_multiple_struct_ints(x: Rect, y: Rect) void {
800792}
801793
802794test "C ABI structs of ints as multiple parameters" {
803 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
804 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
795 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
805796
806797 const r1 = Rect{
807798 .left = 1,
......@@ -838,7 +829,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {
838829
839830test "C ABI structs of floats as multiple parameters" {
840831 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
841 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
832 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
842833
843834 const r1 = FloatRect{
844835 .left = 1,
......@@ -951,8 +942,7 @@ extern fn c_ret_struct_with_array() StructWithArray;
951942test "Struct with array as padding." {
952943 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
953944 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
954 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
955 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
945 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
956946
957947 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
958948
......@@ -977,7 +967,7 @@ extern fn c_ret_float_array_struct() FloatArrayStruct;
977967
978968test "Float array like struct" {
979969 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
980 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
970 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
981971
982972 c_float_array_struct(.{
983973 .origin = .{
......@@ -1004,7 +994,7 @@ extern fn c_ret_small_vec() SmallVec;
1004994
1005995test "small simd vector" {
1006996 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1007 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
997 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1008998
1009999 c_small_vec(.{ 1, 2 });
10101000
......@@ -1022,7 +1012,7 @@ test "medium simd vector" {
10221012 if (builtin.zig_backend == .stage2_x86_64 and
10231013 !comptime std.Target.x86.featureSetHas(builtin.cpu.features, .avx)) return error.SkipZigTest;
10241014
1025 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
1015 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10261016
10271017 c_medium_vec(.{ 1, 2, 3, 4 });
10281018
......@@ -1042,7 +1032,7 @@ test "big simd vector" {
10421032 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
10431033
10441034 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
1045 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
1035 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10461036 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;
10471037
10481038 c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });
......@@ -5352,7 +5342,7 @@ extern fn c_ret_ptr_size_float_struct() Vector2;
53525342test "C ABI pointer sized float struct" {
53535343 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
53545344 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5355 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5345 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
53565346
53575347 c_ptr_size_float_struct(.{ .x = 1, .y = 2 });
53585348
......@@ -5374,29 +5364,25 @@ const DC = extern struct { v1: f64, v2: u8 };
53745364test "DC: Zig passes to C" {
53755365 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
53765366 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5377 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5378 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5367 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
53795368 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));
53805369}
53815370test "DC: Zig returns to C" {
53825371 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
53835372 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5384 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5385 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5373 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
53865374 try expectOk(c_assert_ret_DC());
53875375}
53885376test "DC: C passes to Zig" {
53895377 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
53905378 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5391 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5392 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5379 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
53935380 try expectOk(c_send_DC());
53945381}
53955382test "DC: C returns to Zig" {
53965383 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
53975384 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5398 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5399 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5385 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54005386 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());
54015387}
54025388
......@@ -5421,14 +5407,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };
54215407test "CFF: Zig passes to C" {
54225408 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;
54235409 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5424 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5425 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5410 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54265411 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));
54275412}
54285413test "CFF: Zig returns to C" {
54295414 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5430 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5431 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5415 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54325416 try expectOk(c_assert_ret_CFF());
54335417}
54345418test "CFF: C passes to Zig" {
......@@ -5436,8 +5420,7 @@ test "CFF: C passes to Zig" {
54365420 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
54375421 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
54385422 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5439 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5440 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5423 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54415424
54425425 try expectOk(c_send_CFF());
54435426}
......@@ -5445,8 +5428,7 @@ test "CFF: C returns to Zig" {
54455428 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
54465429 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
54475430 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5448 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5449 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5431 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54505432 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());
54515433}
54525434pub extern fn c_assert_CFF(lv: CFF) c_int;
......@@ -5470,26 +5452,22 @@ const PD = extern struct { v1: ?*anyopaque, v2: f64 };
54705452
54715453test "PD: Zig passes to C" {
54725454 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5473 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5474 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5455 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54755456 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));
54765457}
54775458test "PD: Zig returns to C" {
54785459 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5479 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5480 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5460 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54815461 try expectOk(c_assert_ret_PD());
54825462}
54835463test "PD: C passes to Zig" {
54845464 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5485 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5486 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5465 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54875466 try expectOk(c_send_PD());
54885467}
54895468test "PD: C returns to Zig" {
54905469 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5491 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5492 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5470 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
54935471 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());
54945472}
54955473pub extern fn c_assert_PD(lv: PD) c_int;
......@@ -5521,7 +5499,7 @@ const ByRef = extern struct {
55215499extern fn c_modify_by_ref_param(ByRef) ByRef;
55225500
55235501test "C function modifies by ref param" {
5524 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5502 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55255503
55265504 const res = c_modify_by_ref_param(.{ .val = 1, .arr = undefined });
55275505 try expect(res.val == 42);
......@@ -5543,7 +5521,7 @@ const ByVal = extern struct {
55435521extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;
55445522test "C function that takes byval struct called via function pointer" {
55455523 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5546 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5524 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55475525
55485526 var fn_ptr = &c_func_ptr_byval;
55495527 _ = &fn_ptr;
......@@ -5574,8 +5552,7 @@ const f16_struct = extern struct {
55745552extern fn c_f16_struct(f16_struct) f16_struct;
55755553test "f16 struct" {
55765554 if (builtin.target.cpu.arch.isMIPS()) return error.SkipZigTest;
5577 if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;
5578 if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;
5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55795556 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;
55805557
55815558 const a = c_f16_struct(.{ .a = 12 });
......@@ -5690,8 +5667,7 @@ const Coord2 = extern struct {
56905667extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;
56915668test "Stdcall ABI structs" {
56925669 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5693 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5694 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5670 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
56955671
56965672 const res = stdcall_coord2(
56975673 .{ .x = 0x1111, .y = 0x2222 },
......@@ -5704,7 +5680,7 @@ test "Stdcall ABI structs" {
57045680
57055681extern fn stdcall_big_union(BigUnion) callconv(stdcall_callconv) void;
57065682test "Stdcall ABI big union" {
5707 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5683 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
57085684
57095685 const x = BigUnion{
57105686 .a = BigStruct{
......@@ -5776,7 +5752,7 @@ const byval_tail_callsite_attr = struct {
57765752
57775753test "byval tail callsite attribute" {
57785754 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5779 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
5755 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
57805756
57815757 // Originally reported at https://github.com/ziglang/zig/issues/16290
57825758 // the bug was that the extern function had the byval attribute, but