diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 8c71fe09116b18d19beb33b7ec0ea593a764592a..64691a4e6434dafcaafa39d195e2cb72d8be189d 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -799,6 +799,7 @@ pub const Abi = enum { simulator, ohos, ohoseabi, + call0, // LLVM tags deliberately omitted: // - amplification diff --git a/lib/std/zig/LibCDirs.zig b/lib/std/zig/LibCDirs.zig index 72983823958a611c91567649ba4f749b2aec16e6..7ae4061b0d2acd299259acd5bb833a68128860a9 100644 --- a/lib/std/zig/LibCDirs.zig +++ b/lib/std/zig/LibCDirs.zig @@ -288,6 +288,7 @@ fn libCGenericName(target: *const std.Target) [:0]const u8 { .msvc, .itanium, .simulator, + .call0, => unreachable, } } diff --git a/lib/std/zig/system.zig b/lib/std/zig/system.zig index de407b31be4524140aeaf904e9d9b92b20ab9a38..ff4692db91f77e80257b81d85d986d5de69099c8 100644 --- a/lib/std/zig/system.zig +++ b/lib/std/zig/system.zig @@ -460,6 +460,10 @@ pub fn resolveTargetQuery(io: Io, query: Target.Query) DetectError!Target { if (result.cpu.arch.isArm() and result.abi.float() == .soft) { result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2)); } + + if (result.cpu.arch.isXtensa() and result.abi == .call0) { + result.cpu.features.removeFeature(@intFromEnum(Target.xtensa.Feature.windowed)); + } } // It's possible that we detect the native ABI, but fail to detect the OS version or were told diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index dc715cf16631a92f6270ce6cd63d0cc6e3b0124c..afc5c9d38236e8c7330de21bcee18e8c1cc6d63c 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -306,6 +306,7 @@ pub fn targetTriple(allocator: Allocator, target: *const std.Target) ![]const u8 .itanium => "itanium", .simulator => "simulator", .ohos, .ohoseabi => "ohos", + .call0 => "unknown", }; try llvm_triple.appendSlice(llvm_abi); diff --git a/test/llvm_targets.zig b/test/llvm_targets.zig index edff9ff57f72c8bc85931311797e0c43853fe00c..5cdbd7be754202e5453e8f9df8ed24ffc375947e 100644 --- a/test/llvm_targets.zig +++ b/test/llvm_targets.zig @@ -344,7 +344,9 @@ const targets = [_]std.Target.Query{ .{ .cpu_arch = .xcore, .os_tag = .freestanding, .abi = .none }, + .{ .cpu_arch = .xtensa, .os_tag = .freestanding, .abi = .call0 }, .{ .cpu_arch = .xtensa, .os_tag = .freestanding, .abi = .none }, + .{ .cpu_arch = .xtensa, .os_tag = .linux, .abi = .call0 }, .{ .cpu_arch = .xtensa, .os_tag = .linux, .abi = .none }, };