authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2026-06-21 19:53:01+02:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2026-06-21 19:53:01+02:00
logb9153f3f1d5f29a3a90779c2a5026fb52c719ac0
treebe1c299fd43ed24ecec840d9e488fbe00a0bfe48
parent5ef49b681e4eed34dc090ee7408d5c3d0b2b4b77
parent8ecc942ce890768f556e870bea1d66fe7bad8936

Merge pull request 'x86_64: implement win64 abi for more vector types' (#35865) from jacobly/x86_64-win64-vec-abi into master

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/35865 Reviewed-by: Andrew Kelley <andrew@ziglang.org>

15 files changed, 33361 insertions(+), 9819 deletions(-)

lib/zig.h+17-9
......@@ -4557,9 +4557,12 @@ static inline void zig_msvc_atomic_store_i128(zig_i128 volatile* obj, zig_i128 a
45574557#include <intrin.h>
45584558#endif
45594559
4560static inline void* zig_e_zig_windows_teb(void) zig_mangled(zig_e_zig_windows_teb, "zig_windows_teb");
4561static inline void* zig_e_zig_windows_peb(void) zig_mangled(zig_e_zig_windows_peb, "zig_windows_peb");
4562
45604563#if defined(zig_thumb)
45614564
4562static inline void* zig_windows_teb(void) {
4565static inline void* zig_e_zig_windows_teb(void) {
45634566 void* teb = 0;
45644567#if defined(zig_msvc)
45654568 teb = (void*)_MoveFromCoprocessor(15, 0, 13, 0, 2);
......@@ -4571,7 +4574,7 @@ static inline void* zig_windows_teb(void) {
45714574
45724575#elif defined(zig_aarch64)
45734576
4574static inline void* zig_windows_teb(void) {
4577static inline void* zig_e_zig_windows_teb(void) {
45754578 void* teb = 0;
45764579#if defined(zig_msvc)
45774580 teb = (void*)__readx18qword(0x0);
......@@ -4583,7 +4586,7 @@ static inline void* zig_windows_teb(void) {
45834586
45844587#elif defined(zig_x86_32)
45854588
4586static inline void* zig_windows_teb(void) {
4589static inline void* zig_e_zig_windows_teb(void) {
45874590 void* teb = 0;
45884591#if defined(zig_msvc)
45894592 teb = (void*)__readfsdword(0x18);
......@@ -4593,7 +4596,7 @@ static inline void* zig_windows_teb(void) {
45934596 return teb;
45944597}
45954598
4596static inline void* zig_windows_peb(void) {
4599static inline void* zig_e_zig_windows_peb(void) {
45974600 void* peb = 0;
45984601#if defined(zig_msvc)
45994602 peb = (void*)__readfsdword(0x30);
......@@ -4605,7 +4608,7 @@ static inline void* zig_windows_peb(void) {
46054608
46064609#elif defined(zig_x86_64)
46074610
4608static inline void* zig_windows_teb(void) {
4611static inline void* zig_e_zig_windows_teb(void) {
46094612 void* teb = 0;
46104613#if defined(zig_msvc)
46114614 teb = (void*)__readgsqword(0x30);
......@@ -4615,7 +4618,7 @@ static inline void* zig_windows_teb(void) {
46154618 return teb;
46164619}
46174620
4618static inline void* zig_windows_peb(void) {
4621static inline void* zig_e_zig_windows_peb(void) {
46194622 void* peb = 0;
46204623#if defined(zig_msvc)
46214624 peb = (void*)__readgsqword(0x60);
......@@ -4629,7 +4632,9 @@ static inline void* zig_windows_peb(void) {
46294632
46304633#if defined(zig_loongarch)
46314634
4632static inline void zig_loongarch_cpucfg(uint32_t word, uint32_t* result) {
4635static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) zig_mangled(zig_e_zig_loongarch_cpucfg, "zig_loongarch_cpucfg");
4636
4637static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) {
46334638#if defined(zig_gnuc_asm)
46344639 __asm__("cpucfg %[result], %[word]" : [result] "=r" (result) : [word] "r" (word));
46354640#else
......@@ -4639,7 +4644,10 @@ static inline void zig_loongarch_cpucfg(uint32_t word, uint32_t* result) {
46394644
46404645#elif defined(zig_x86) && !defined(zig_x86_16)
46414646
4642static inline void zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax, uint32_t* ebx, uint32_t* ecx, uint32_t* edx) {
4647static inline void zig_e_zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax, uint32_t* ebx, uint32_t* ecx, uint32_t* edx) zig_mangled(zig_e_zig_x86_cpuid, "zig_x86_cpuid");
4648static inline uint32_t zig_e_zig_x86_get_xcr0(void) zig_mangled(zig_e_zig_x86_get_xcr0, "zig_x86_get_xcr0");
4649
4650static inline void zig_e_zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax, uint32_t* ebx, uint32_t* ecx, uint32_t* edx) {
46434651#if defined(zig_msvc)
46444652 int cpu_info[4];
46454653 __cpuidex(cpu_info, leaf_id, subid);
......@@ -4657,7 +4665,7 @@ static inline void zig_x86_cpuid(uint32_t leaf_id, uint32_t subid, uint32_t* eax
46574665#endif
46584666}
46594667
4660static inline uint32_t zig_x86_get_xcr0(void) {
4668static inline uint32_t zig_e_zig_x86_get_xcr0(void) {
46614669#if defined(zig_msvc)
46624670 return (uint32_t)_xgetbv(0);
46634671#elif defined(zig_gnuc_asm)
src/Compilation.zig+60-49
......@@ -103,16 +103,12 @@ native_system_include_paths: []const []const u8,
103103/// Corresponds to `-u <symbol>` for ELF/MachO and `/include:<symbol>` for COFF/PE.
104104force_undefined_symbols: std.array_hash_map.String(void),
105105
106c_object_table: std.array_hash_map.Auto(*CObject, void) = .empty,
107win32_resource_table: if (dev.env.supports(.win32_resource)) std.array_hash_map.Auto(*Win32Resource, void) else struct {
108 pub fn keys(_: @This()) [0]void {
109 return .{};
110 }
111 pub fn count(_: @This()) u0 {
112 return 0;
113 }
106c_objects: std.ArrayList(*CObject) = .empty,
107win32_resources: if (dev.env.supports(.win32_resource)) std.ArrayList(*Win32Resource) else struct {
108 items: [0]*struct {},
109 pub const empty: @This() = .{ .items = .{} };
114110 pub fn deinit(_: @This(), _: Allocator) void {}
115} = .{},
111} = .empty,
116112
117113link_diags: link.Diags,
118114link_queue: link.Queue = .empty,
......@@ -915,21 +911,6 @@ pub const CrtFile = struct {
915911 }
916912};
917913
918/// Supported languages for "zig clang -x <lang>".
919/// Loosely based on llvm-project/clang/include/clang/Driver/Types.def
920pub const LangToExt = std.StaticStringMap(FileExt).initComptime(.{
921 .{ "c", .c },
922 .{ "c-header", .h },
923 .{ "c++", .cpp },
924 .{ "c++-header", .hpp },
925 .{ "objective-c", .m },
926 .{ "objective-c-header", .hm },
927 .{ "objective-c++", .mm },
928 .{ "objective-c++-header", .hmm },
929 .{ "assembler", .assembly },
930 .{ "assembler-with-cpp", .assembly_with_cpp },
931});
932
933914/// For passing to a C compiler.
934915pub const CSourceFile = struct {
935916 /// Many C compiler flags are determined by settings contained in the owning Module.
......@@ -2486,8 +2467,10 @@ pub fn create(gpa: Allocator, arena: Allocator, io: Io, diag: *CreateDiagnostic,
24862467 };
24872468 errdefer comp.destroy();
24882469
2470 if (target.ofmt == .c) return comp;
2471
24892472 // Add a `CObject` for each `c_source_files`.
2490 try comp.c_object_table.ensureTotalCapacity(gpa, options.c_source_files.len);
2473 try comp.c_objects.ensureTotalCapacity(gpa, options.c_source_files.len);
24912474 for (options.c_source_files) |c_source_file| {
24922475 const c_object = try gpa.create(CObject);
24932476 errdefer gpa.destroy(c_object);
......@@ -2496,7 +2479,7 @@ pub fn create(gpa: Allocator, arena: Allocator, io: Io, diag: *CreateDiagnostic,
24962479 .status = .{ .new = {} },
24972480 .src = c_source_file,
24982481 };
2499 comp.c_object_table.putAssumeCapacityNoClobber(c_object, {});
2482 comp.c_objects.appendAssumeCapacity(c_object);
25002483 }
25012484
25022485 // Add a `Win32Resource` for each `rc_source_files` and one for `manifest_file`.
......@@ -2504,7 +2487,7 @@ pub fn create(gpa: Allocator, arena: Allocator, io: Io, diag: *CreateDiagnostic,
25042487 options.rc_source_files.len + @intFromBool(options.manifest_file != null);
25052488 if (win32_resource_count > 0) {
25062489 dev.check(.win32_resource);
2507 try comp.win32_resource_table.ensureTotalCapacity(gpa, win32_resource_count);
2490 try comp.win32_resources.ensureTotalCapacity(gpa, win32_resource_count);
25082491 for (options.rc_source_files) |rc_source_file| {
25092492 const win32_resource = try gpa.create(Win32Resource);
25102493 errdefer gpa.destroy(win32_resource);
......@@ -2513,7 +2496,7 @@ pub fn create(gpa: Allocator, arena: Allocator, io: Io, diag: *CreateDiagnostic,
25132496 .status = .{ .new = {} },
25142497 .src = .{ .rc = rc_source_file },
25152498 };
2516 comp.win32_resource_table.putAssumeCapacityNoClobber(win32_resource, {});
2499 comp.win32_resources.appendAssumeCapacity(win32_resource);
25172500 }
25182501
25192502 if (options.manifest_file) |manifest_path| {
......@@ -2524,11 +2507,11 @@ pub fn create(gpa: Allocator, arena: Allocator, io: Io, diag: *CreateDiagnostic,
25242507 .status = .{ .new = {} },
25252508 .src = .{ .manifest = manifest_path },
25262509 };
2527 comp.win32_resource_table.putAssumeCapacityNoClobber(win32_resource, {});
2510 comp.win32_resources.appendAssumeCapacity(win32_resource);
25282511 }
25292512 }
25302513
2531 if (comp.emit_bin != null and target.ofmt != .c) {
2514 if (comp.emit_bin != null) {
25322515 if (!comp.skip_linker_dependencies) {
25332516 // If we need to build libc for the target, add work items for it.
25342517 // We go through the work queue so that building can be done in parallel.
......@@ -2749,20 +2732,20 @@ pub fn destroy(comp: *Compilation) void {
27492732 openbsd_file.deinit(gpa, io);
27502733 }
27512734
2752 for (comp.c_object_table.keys()) |key| {
2753 key.destroy(gpa, io);
2735 for (comp.c_objects.items) |c_object| {
2736 c_object.destroy(gpa, io);
27542737 }
2755 comp.c_object_table.deinit(gpa);
2738 comp.c_objects.deinit(gpa);
27562739
27572740 for (comp.failed_c_objects.values()) |bundle| {
27582741 bundle.destroy(gpa);
27592742 }
27602743 comp.failed_c_objects.deinit(gpa);
27612744
2762 for (comp.win32_resource_table.keys()) |key| {
2763 key.destroy(gpa, io);
2745 for (comp.win32_resources.items) |win32_resource| {
2746 win32_resource.destroy(gpa, io);
27642747 }
2765 comp.win32_resource_table.deinit(gpa);
2748 comp.win32_resources.deinit(gpa);
27662749
27672750 for (comp.failed_win32_resources.values()) |*value| {
27682751 value.deinit(gpa);
......@@ -3016,8 +2999,8 @@ pub fn update(comp: *Compilation, main_progress_node: std.Progress.Node) UpdateE
30162999 // changes. For now, to avoid crashing the linker in this case, don't kick off C object
30173000 // updates if we've done prelink already. https://codeberg.org/ziglang/zig/issues/32081
30183001 } else {
3019 try comp.c_object_work_queue.ensureUnusedCapacity(gpa, comp.c_object_table.count());
3020 for (comp.c_object_table.keys()) |c_object| {
3002 try comp.c_object_work_queue.ensureUnusedCapacity(gpa, comp.c_objects.items.len);
3003 for (comp.c_objects.items) |c_object| {
30213004 comp.c_object_work_queue.pushBackAssumeCapacity(c_object);
30223005 try comp.appendFileSystemInput(try .fromUnresolved(arena, comp.dirs, &.{c_object.src.src_path}));
30233006 }
......@@ -3032,8 +3015,8 @@ pub fn update(comp: *Compilation, main_progress_node: std.Progress.Node) UpdateE
30323015
30333016 // For compiling Win32 resources, we rely on the cache hash system to avoid duplicating work.
30343017 // Add a Job for each Win32 resource file.
3035 try comp.win32_resource_work_queue.ensureUnusedCapacity(gpa, comp.win32_resource_table.count());
3036 for (comp.win32_resource_table.keys()) |win32_resource| {
3018 try comp.win32_resource_work_queue.ensureUnusedCapacity(gpa, comp.win32_resources.items.len);
3019 for (comp.win32_resources.items) |win32_resource| {
30373020 comp.win32_resource_work_queue.pushBackAssumeCapacity(win32_resource);
30383021 switch (win32_resource.src) {
30393022 .rc => |f| {
......@@ -3140,9 +3123,9 @@ pub fn update(comp: *Compilation, main_progress_node: std.Progress.Node) UpdateE
31403123 return;
31413124 }
31423125
3143 if (comp.zcu == null and comp.config.output_mode == .Obj and comp.c_object_table.count() == 1) {
3126 if (comp.zcu == null and comp.config.output_mode == .Obj and comp.c_objects.items.len == 1) {
31443127 // This is `zig build-obj foo.c`. We can emit asm and LLVM IR/bitcode.
3145 const c_obj_path = comp.c_object_table.keys()[0].status.success.object_path;
3128 const c_obj_path = comp.c_objects.items[0].status.success.object_path;
31463129 if (comp.emit_asm) |path| try comp.emitFromCObject(arena, c_obj_path, ".s", path);
31473130 if (comp.emit_llvm_ir) |path| try comp.emitFromCObject(arena, c_obj_path, ".ll", path);
31483131 if (comp.emit_llvm_bc) |path| try comp.emitFromCObject(arena, c_obj_path, ".bc", path);
......@@ -3482,14 +3465,14 @@ fn addNonIncrementalStuffToCacheManifest(
34823465
34833466 try link.hashInputs(man, comp.link_inputs);
34843467
3485 for (comp.c_object_table.keys()) |key| {
3486 _ = try man.addFile(key.src.src_path, null);
3487 man.hash.addOptional(key.src.ext);
3488 man.hash.addListOfBytes(key.src.extra_flags);
3468 for (comp.c_objects.items) |c_object| {
3469 _ = try man.addFile(c_object.src.src_path, null);
3470 man.hash.addOptional(c_object.src.ext);
3471 man.hash.addListOfBytes(c_object.src.extra_flags);
34893472 }
34903473
3491 for (comp.win32_resource_table.keys()) |key| {
3492 switch (key.src) {
3474 for (comp.win32_resources.items) |win32_resource| {
3475 switch (win32_resource.src) {
34933476 .rc => |rc_src| {
34943477 _ = try man.addFile(rc_src.src_path, null);
34953478 man.hash.addListOfBytes(rc_src.extra_flags);
......@@ -5592,9 +5575,10 @@ fn updateCObject(comp: *Compilation, c_object: *CObject, c_obj_prog_node: std.Pr
55925575 c_source_basename[0 .. c_source_basename.len - fs.path.extension(c_source_basename).len];
55935576
55945577 const target = comp.getTarget();
5578 assert(target.ofmt != .c);
55955579 const o_ext = target.ofmt.fileExt(target.cpu.arch);
55965580 const digest = if (!comp.disable_c_depfile and try man.hit()) man.final() else blk: {
5597 var argv = std.array_list.Managed([]const u8).init(gpa);
5581 var argv: std.array_list.Managed([]const u8) = .init(gpa);
55985582 defer argv.deinit();
55995583
56005584 // In case we are doing passthrough mode, we need to detect -S and -emit-llvm.
......@@ -7057,6 +7041,33 @@ pub const FileExt = enum {
70577041 .unknown => "",
70587042 };
70597043 }
7044
7045 /// The value accepted by "zig clang -x <lang>" and passed to "clang -x <lang>".
7046 pub fn toLang(ext: FileExt) ?[]const u8 {
7047 return switch (ext) {
7048 else => null,
7049 .c => "c",
7050 .h => "c-header",
7051 .cpp => "c++",
7052 .hpp => "c++-header",
7053 .m => "objective-c",
7054 .hm => "objective-c-header",
7055 .mm => "objective-c++",
7056 .hmm => "objective-c++-header",
7057 .assembly => "assembler",
7058 .assembly_with_cpp => "assembler-with-cpp",
7059 };
7060 }
7061
7062 /// Supported languages for "zig clang -x <lang>".
7063 /// Loosely based on llvm-project/clang/include/clang/Driver/Types.def
7064 pub const from_lang = std.StaticStringMap(FileExt).initComptime(init: {
7065 var init: []const struct { []const u8, FileExt } = &.{};
7066 for (std.enums.values(FileExt)) |file_ext| if (file_ext.toLang()) |lang| {
7067 init = init ++ .{.{ lang, file_ext }};
7068 };
7069 break :init init;
7070 });
70607071};
70617072
70627073pub fn hasObjectExt(filename: []const u8) bool {
src/codegen/c.zig+4-1
......@@ -328,6 +328,9 @@ fn isReservedIdent(ident: []const u8) bool {
328328 return true;
329329 }
330330
331 // zig.h
332 if (mem.startsWith(u8, ident, "zig_")) return true;
333
331334 return reserved_idents.has(ident);
332335}
333336
......@@ -3755,7 +3758,7 @@ fn airCmpLteErrorsLen(f: *Function, inst: Air.Inst.Index) !CValue {
37553758 try f.writeCValue(w, local, .other);
37563759 try w.writeAll(" = ");
37573760 try f.writeCValue(w, operand, .other);
3758 try w.print(" < sizeof({f}) / sizeof(*{0f});", .{fmtIdentSolo("zig_errorName")});
3761 try w.writeAll(" < sizeof(zig_errorName) / sizeof(*zig_errorName);");
37593762 try f.newline();
37603763 return local;
37613764}
src/codegen/llvm/FuncGen.zig+48-12
......@@ -6789,22 +6789,30 @@ const ParamTypeIterator = struct {
67896789 return .abi_sized_int;
67906790 }
67916791 },
6792 .win_i128 => {
6792 .sse,
6793 .bool_vector_mask,
6794 .integer_per_element,
6795 .sse_per_element,
6796 .sse_sse_x87_per_qword,
6797 .sse_per_xword,
6798 .sse_per_yword,
6799 .sse_per_zword,
6800 => {
67936801 it.zig_index += 1;
67946802 it.llvm_index += 1;
6795 return .byref;
6803 return .byval;
67966804 },
6805 .sseup, .x87, .x87up, .none, .float, .float_combine => unreachable,
67976806 .memory => {
67986807 it.zig_index += 1;
67996808 it.llvm_index += 1;
68006809 return .byref_mut;
68016810 },
6802 .sse => {
6811 .win_i128 => {
68036812 it.zig_index += 1;
68046813 it.llvm_index += 1;
6805 return .byval;
6814 return .byref;
68066815 },
6807 else => unreachable,
68086816 }
68096817 }
68106818
......@@ -6867,9 +6875,14 @@ const ParamTypeIterator = struct {
68676875 .none => break,
68686876 .memory => unreachable, // handled above
68696877 .win_i128 => unreachable, // windows only
6870 .integer_per_element => {
6871 @panic("TODO");
6872 },
6878 .bool_vector_mask,
6879 .integer_per_element,
6880 .sse_per_element,
6881 .sse_sse_x87_per_qword,
6882 .sse_per_xword,
6883 .sse_per_yword,
6884 .sse_per_zword,
6885 => unreachable, // vectors already handled by `isScalar` above
68736886 }
68746887 offset += 8;
68756888 }
......@@ -6912,7 +6925,7 @@ pub fn iterateParamTypes(object: *Object, fn_info: InternPool.Key.FuncType) Para
69126925 .fn_info = fn_info,
69136926 .zig_index = 0,
69146927 .llvm_index = 0,
6915 .types_len = 0,
6928 .types_len = undefined,
69166929 .types_buffer = undefined,
69176930 .offsets_buffer = undefined,
69186931 .byval_attr = false,
......@@ -6979,6 +6992,7 @@ fn firstParamSRetX86Fastcall(zcu: *Zcu, ty: Type) bool {
69796992}
69806993
69816994fn firstParamSRetSystemV(ty: Type, zcu: *Zcu, target: *const std.Target) bool {
6995 if (isScalar(zcu, ty)) return false;
69826996 const class = x86_64_abi.classifySystemV(ty, zcu, target, .ret);
69836997 if (class[0] == .memory) return true;
69846998 if (class[0] == .x87 and class[2] != .none) return true;
......@@ -7078,10 +7092,24 @@ fn lowerWin64FnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Err
70787092 return o.builder.intType(@intCast(return_type.abiSize(zcu) * 8));
70797093 }
70807094 },
7095 .sse,
7096 .bool_vector_mask,
7097 .integer_per_element,
7098 .sse_per_element,
7099 .sse_sse_x87_per_qword,
7100 .sse_per_xword,
7101 .sse_per_yword,
7102 .sse_per_zword,
7103 => return o.lowerType(return_type),
7104 .sseup,
7105 .x87,
7106 .x87up,
7107 .none,
7108 .float,
7109 .float_combine,
7110 => unreachable,
70817111 .win_i128 => return o.builder.vectorType(.normal, 2, .i64),
70827112 .memory => return .void,
7083 .sse => return o.lowerType(return_type),
7084 else => unreachable,
70857113 }
70867114}
70877115
......@@ -7129,8 +7157,16 @@ fn lowerSystemVFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.E
71297157 },
71307158 .x87up => continue,
71317159 .none => break,
7132 .memory, .integer_per_element => return .void,
7160 .memory => return .void,
71337161 .win_i128 => unreachable, // windows only
7162 .bool_vector_mask,
7163 .integer_per_element,
7164 .sse_per_element,
7165 .sse_sse_x87_per_qword,
7166 .sse_per_xword,
7167 .sse_per_yword,
7168 .sse_per_zword,
7169 => unreachable, // vectors already handled by `isScalar` above
71347170 }
71357171 }
71367172 const first_non_integer = std.mem.indexOfNone(x86_64_abi.Class, &classes, &.{.integer});
src/codegen/x86_64/CodeGen.zig+3299-1107
......@@ -164,11 +164,16 @@ next_temp_index: Temp.Index = @enumFromInt(0),
164164temp_type: [Temp.Index.max]Type = undefined,
165165
166166const MaskInfo = packed struct {
167 kind: enum(u1) { sign, all },
167 kind: enum(u2) { lsb, msb, zero_extend, sign_extend },
168168 inverted: bool = false,
169169 scalar: Memory.Size,
170170};
171171
172const ArgsInfo = struct {
173 info: packed struct { reg_index: u3, frame_off: i29 },
174 frame_index: FrameIndex,
175};
176
172177pub const MCValue = union(enum) {
173178 /// No runtime bits. `void` types, empty structs, u0, enums with 1 tag, etc.
174179 /// TODO Look into deleting this tag and using `dead` instead, since every use
......@@ -199,17 +204,19 @@ pub const MCValue = union(enum) {
199204 /// The value is a tuple { wrapped, overflow } where wrapped value is stored in the GP register.
200205 register_overflow: struct { reg: Register, eflags: Condition },
201206 /// The value is a bool vector stored in a vector register with a different scalar type.
202 register_mask: struct { reg: Register, info: MaskInfo },
207 register_mask: Mask,
203208 /// The value is in memory at a hard-coded address.
204209 /// If the type is a pointer, it means the pointer address is stored at this memory location.
205210 memory: u64,
206211 /// The value is in memory at a constant offset from the address in a register.
207212 indirect: bits.RegisterOffset,
208213 indirect_load_frame: bits.FrameAddr,
209 /// The value stored at an offset from a frame index
214 /// The value is a bool vector stored in memory with a different scalar type at the address in a register.
215 indirect_mask: Mask,
216 /// The value stored at an offset from a frame index.
210217 /// Payload is a frame address.
211218 load_frame: bits.FrameAddr,
212 /// The address of an offset from a frame index
219 /// The address of an offset from a frame index.
213220 /// Payload is a frame address.
214221 lea_frame: bits.FrameAddr,
215222 load_nav: InternPool.Nav.Index,
......@@ -220,14 +227,26 @@ pub const MCValue = union(enum) {
220227 lea_lazy_sym: link.File.LazySymbol,
221228 load_extern_func: Mir.NullTerminatedString,
222229 lea_extern_func: Mir.NullTerminatedString,
223 /// Supports integer_per_element abi
224 elementwise_args: packed struct { regs: u3, frame_off: i29, frame_index: FrameIndex },
230 /// The value is duplicated in two different registers.
231 register_tee: [4]Register,
232 /// Supports `integer_per_element` abi.
233 elementwise_gpr: ArgsInfo,
234 /// Supports `sse_per_element` abi.
235 elementwise_sse: ArgsInfo,
236 /// Supports `sse_per_xword` abi.
237 xwordwise_sse: ArgsInfo,
238 /// Supports `sse_per_yword` abi.
239 ywordwise_sse: ArgsInfo,
240 /// Supports `sse_per_zword` abi.
241 zwordwise_sse: ArgsInfo,
225242 /// This indicates that we have already allocated a frame index for this instruction,
226243 /// but it has not been spilled there yet in the current control flow.
227244 /// Payload is a frame index.
228245 reserved_frame: FrameIndex,
229246 air_ref: Air.Inst.Ref,
230247
248 const Mask = struct { reg: Register, info: MaskInfo };
249
231250 fn isModifiable(mcv: MCValue) bool {
232251 return switch (mcv) {
233252 .none,
......@@ -248,7 +267,12 @@ pub const MCValue = union(enum) {
248267 .lea_lazy_sym,
249268 .lea_extern_func,
250269 .load_extern_func,
251 .elementwise_args,
270 .register_tee,
271 .elementwise_gpr,
272 .elementwise_sse,
273 .xwordwise_sse,
274 .ywordwise_sse,
275 .zwordwise_sse,
252276 .reserved_frame,
253277 .air_ref,
254278 => false,
......@@ -258,6 +282,7 @@ pub const MCValue = union(enum) {
258282 .register_quadruple,
259283 .memory,
260284 .indirect,
285 .indirect_mask,
261286 .load_nav,
262287 => true,
263288 .load_frame => |frame_addr| !frame_addr.index.isNamed(),
......@@ -326,9 +351,10 @@ pub const MCValue = union(enum) {
326351 .register_quadruple,
327352 => |*regs| regs,
328353 inline .register_offset,
329 .indirect,
330354 .register_overflow,
331355 .register_mask,
356 .indirect,
357 .indirect_mask,
332358 => |*pl| (&pl.reg)[0..1],
333359 else => &.{},
334360 };
......@@ -364,12 +390,18 @@ pub const MCValue = union(enum) {
364390 .register_offset,
365391 .register_overflow,
366392 .register_mask,
393 .indirect_mask,
367394 .lea_frame,
368395 .lea_nav,
369396 .lea_uav,
370397 .lea_lazy_sym,
371398 .lea_extern_func,
372 .elementwise_args,
399 .register_tee,
400 .elementwise_gpr,
401 .elementwise_sse,
402 .xwordwise_sse,
403 .ywordwise_sse,
404 .zwordwise_sse,
373405 .reserved_frame,
374406 .air_ref,
375407 => unreachable, // not in memory
......@@ -402,11 +434,17 @@ pub const MCValue = union(enum) {
402434 .memory,
403435 .indirect,
404436 .indirect_load_frame,
437 .indirect_mask,
405438 .load_nav,
406439 .load_uav,
407440 .load_lazy_sym,
408441 .load_extern_func,
409 .elementwise_args,
442 .register_tee,
443 .elementwise_gpr,
444 .elementwise_sse,
445 .xwordwise_sse,
446 .ywordwise_sse,
447 .zwordwise_sse,
410448 .reserved_frame,
411449 .air_ref,
412450 => unreachable, // not dereferenceable
......@@ -428,7 +466,12 @@ pub const MCValue = union(enum) {
428466 .unreach,
429467 .dead,
430468 .undef,
431 .elementwise_args,
469 .register_tee,
470 .elementwise_gpr,
471 .elementwise_sse,
472 .xwordwise_sse,
473 .ywordwise_sse,
474 .zwordwise_sse,
432475 .reserved_frame,
433476 .air_ref,
434477 => unreachable, // not valid
......@@ -441,6 +484,7 @@ pub const MCValue = union(enum) {
441484 .memory,
442485 .indirect,
443486 .indirect_load_frame,
487 .indirect_mask,
444488 .load_frame,
445489 .load_nav,
446490 .lea_nav,
......@@ -482,7 +526,12 @@ pub const MCValue = union(enum) {
482526 .register_mask,
483527 .indirect_load_frame,
484528 .lea_frame,
485 .elementwise_args,
529 .register_tee,
530 .elementwise_gpr,
531 .elementwise_sse,
532 .xwordwise_sse,
533 .ywordwise_sse,
534 .zwordwise_sse,
486535 .reserved_frame,
487536 .lea_nav,
488537 .lea_uav,
......@@ -507,6 +556,10 @@ pub const MCValue = union(enum) {
507556 .disp = reg_off.off + mod_rm.disp,
508557 } },
509558 },
559 .indirect_mask => |reg_mask| .{
560 .base = .{ .reg = reg_mask.reg.toSize(.ptr, function.target) },
561 .mod = .{ .rm = mod_rm },
562 },
510563 .load_frame => |frame_addr| .{
511564 .base = .{ .frame = frame_addr.index },
512565 .mod = .{ .rm = .{
......@@ -528,7 +581,6 @@ pub const MCValue = union(enum) {
528581 switch (mcv) {
529582 .none, .unreach, .dead, .undef => try w.print("({s})", .{@tagName(mcv)}),
530583 .immediate => |pl| try w.print("0x{x}", .{pl}),
531 .memory => |pl| try w.print("[ds:0x{x}]", .{pl}),
532584 inline .eflags, .register => |pl| try w.print("{s}", .{@tagName(pl)}),
533585 .register_pair => |pl| try w.print("{s}:{s}", .{ @tagName(pl[1]), @tagName(pl[0]) }),
534586 .register_triple => |pl| try w.print("{s}:{s}:{s}", .{
......@@ -542,14 +594,21 @@ pub const MCValue = union(enum) {
542594 @tagName(pl.eflags),
543595 @tagName(pl.reg),
544596 }),
545 .register_mask => |pl| try w.print("mask({s},{f}):{c}{s}", .{
597 .register_mask => |pl| try w.print("mask({s},{f}):{s}{s}", .{
546598 @tagName(pl.info.kind),
547599 pl.info.scalar,
548 @as(u8, if (pl.info.inverted) '!' else ' '),
600 if (pl.info.inverted) "!" else "",
549601 @tagName(pl.reg),
550602 }),
603 .memory => |pl| try w.print("[ds:0x{x}]", .{pl}),
551604 .indirect => |pl| try w.print("[{s} + 0x{x}]", .{ @tagName(pl.reg), pl.off }),
552605 .indirect_load_frame => |pl| try w.print("[[{f} + 0x{x}]]", .{ pl.index, pl.off }),
606 .indirect_mask => |pl| try w.print("[mask({s},{f}):{s}{s}]", .{
607 @tagName(pl.info.kind),
608 pl.info.scalar,
609 if (pl.info.inverted) "!" else "",
610 @tagName(pl.reg),
611 }),
553612 .load_frame => |pl| try w.print("[{f} + 0x{x}]", .{ pl.index, pl.off }),
554613 .lea_frame => |pl| try w.print("{f} + 0x{x}", .{ pl.index, pl.off }),
555614 .load_nav => |pl| try w.print("[nav:{d}]", .{@intFromEnum(pl)}),
......@@ -560,8 +619,21 @@ pub const MCValue = union(enum) {
560619 .lea_lazy_sym => |pl| try w.print("lazy:{s}:{d}", .{ @tagName(pl.kind), @intFromEnum(pl.ty) }),
561620 .load_extern_func => |pl| try w.print("[extern:{d}]", .{@intFromEnum(pl)}),
562621 .lea_extern_func => |pl| try w.print("extern:{d}", .{@intFromEnum(pl)}),
563 .elementwise_args => |pl| try w.print("elementwise:{d}:[{f} + 0x{x}]", .{
564 pl.regs, pl.frame_index, pl.frame_off,
622 .register_tee => |pl| try w.print("tee:{s}:{s}", .{ @tagName(pl[1]), @tagName(pl[0]) }),
623 .elementwise_gpr => |pl| try w.print("elementwise:gpr{d}:[{f} + 0x{x}]", .{
624 pl.info.reg_index, pl.frame_index, pl.info.frame_off,
625 }),
626 .elementwise_sse => |pl| try w.print("elementwise:sse{d}:[{f} + 0x{x}]", .{
627 pl.info.reg_index, pl.frame_index, pl.info.frame_off,
628 }),
629 .xwordwise_sse => |pl| try w.print("xwordwise:sse{d}:[{f} + 0x{x}]", .{
630 pl.info.reg_index, pl.frame_index, pl.info.frame_off,
631 }),
632 .ywordwise_sse => |pl| try w.print("ywordwise:sse{d}:[{f} + 0x{x}]", .{
633 pl.info.reg_index, pl.frame_index, pl.info.frame_off,
634 }),
635 .zwordwise_sse => |pl| try w.print("zwordwise:sse{d}:[{f} + 0x{x}]", .{
636 pl.info.reg_index, pl.frame_index, pl.info.frame_off,
565637 }),
566638 .reserved_frame => |pl| try w.print("(dead:{f})", .{pl}),
567639 .air_ref => |pl| try w.print("(air:0x{x})", .{@intFromEnum(pl)}),
......@@ -595,7 +667,12 @@ const InstTracking = struct {
595667 .lea_extern_func,
596668 => result,
597669 .dead,
598 .elementwise_args,
670 .register_tee,
671 .elementwise_gpr,
672 .elementwise_sse,
673 .xwordwise_sse,
674 .ywordwise_sse,
675 .zwordwise_sse,
599676 .reserved_frame,
600677 .air_ref,
601678 => unreachable,
......@@ -608,6 +685,7 @@ const InstTracking = struct {
608685 .register_overflow,
609686 .register_mask,
610687 .indirect,
688 .indirect_mask,
611689 => .none,
612690 }, .short = result };
613691 }
......@@ -707,7 +785,13 @@ const InstTracking = struct {
707785 .register_overflow,
708786 .register_mask,
709787 .indirect,
710 .elementwise_args,
788 .indirect_mask,
789 .register_tee,
790 .elementwise_gpr,
791 .elementwise_sse,
792 .xwordwise_sse,
793 .ywordwise_sse,
794 .zwordwise_sse,
711795 .air_ref,
712796 => unreachable,
713797 }
......@@ -789,19 +873,24 @@ const InstTracking = struct {
789873
790874 // Disable death.
791875 var found_reg = false;
792 var remaining_reg: Register = .none;
876 var remaining_regs: [4]Register = undefined;
877 var remaining_regs_len: usize = 0;
793878 for (tracking.getRegs()) |tracked_reg| if (tracked_reg.id() == reg.id()) {
794879 assert(!found_reg);
795880 found_reg = true;
796881 } else {
797 assert(remaining_reg == .none);
798 remaining_reg = tracked_reg;
882 remaining_regs[remaining_regs_len] = tracked_reg;
883 remaining_regs_len += 1;
799884 };
800885 assert(found_reg);
801886 if (tracking.long == .none) tracking.long = tracking.short;
802 tracking.short = switch (remaining_reg) {
803 .none => .{ .dead = function.scope_generation },
804 else => .{ .register = remaining_reg },
887 tracking.short = switch (remaining_regs_len) {
888 0 => .{ .dead = function.scope_generation },
889 1 => .{ .register = remaining_regs[0] },
890 2 => .{ .register_pair = remaining_regs[0..2].* },
891 3 => .{ .register_triple = remaining_regs[0..3].* },
892 4 => .{ .register_quadruple = remaining_regs[0..4].* },
893 else => unreachable,
805894 };
806895
807896 // Perform side-effects of freeValue manually.
......@@ -72449,7 +72538,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7244972538 .{ .src = .{ .to_sse, .none, .none } },
7245072539 },
7245172540 .extra_temps = .{
72452 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72541 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7245372542 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7245472543 .unused,
7245572544 .unused,
......@@ -72473,7 +72562,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7247372562 .{ .src = .{ .to_mut_sse, .none, .none } },
7247472563 },
7247572564 .extra_temps = .{
72476 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72565 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7247772566 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7247872567 .unused,
7247972568 .unused,
......@@ -72497,7 +72586,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7249772586 .{ .src = .{ .to_sse, .none, .none } },
7249872587 },
7249972588 .extra_temps = .{
72500 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72589 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7250172590 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7250272591 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7250372592 .unused,
......@@ -72525,7 +72614,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7252572614 .{ .src = .{ .to_sse, .none, .none } },
7252672615 },
7252772616 .extra_temps = .{
72528 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72617 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7252972618 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7253072619 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7253172620 .unused,
......@@ -72554,7 +72643,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7255472643 .{ .src = .{ .to_mut_sse, .none, .none } },
7255572644 },
7255672645 .extra_temps = .{
72557 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72646 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7255872647 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7255972648 .unused,
7256072649 .unused,
......@@ -72583,7 +72672,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7258372672 .{ .src = .{ .to_mut_sse, .none, .none } },
7258472673 },
7258572674 .extra_temps = .{
72586 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72675 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7258772676 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7258872677 .unused,
7258972678 .unused,
......@@ -72650,7 +72739,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7265072739 .{ .src = .{ .to_sse, .none, .none } },
7265172740 },
7265272741 .extra_temps = .{
72653 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72742 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7265472743 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7265572744 .unused,
7265672745 .unused,
......@@ -72676,7 +72765,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7267672765 .{ .src = .{ .to_mut_sse, .none, .none } },
7267772766 },
7267872767 .extra_temps = .{
72679 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72768 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7268072769 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7268172770 .unused,
7268272771 .unused,
......@@ -72702,7 +72791,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7270272791 .{ .src = .{ .to_sse, .none, .none } },
7270372792 },
7270472793 .extra_temps = .{
72705 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72794 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7270672795 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7270772796 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7270872797 .unused,
......@@ -72732,7 +72821,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7273272821 .{ .src = .{ .to_sse, .none, .none } },
7273372822 },
7273472823 .extra_temps = .{
72735 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72824 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7273672825 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7273772826 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7273872827 .unused,
......@@ -72763,7 +72852,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7276372852 .{ .src = .{ .to_mut_sse, .none, .none } },
7276472853 },
7276572854 .extra_temps = .{
72766 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72855 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7276772856 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7276872857 .unused,
7276972858 .unused,
......@@ -72794,7 +72883,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7279472883 .{ .src = .{ .to_mut_sse, .none, .none } },
7279572884 },
7279672885 .extra_temps = .{
72797 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
72886 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7279872887 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7279972888 .unused,
7280072889 .unused,
......@@ -72864,7 +72953,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7286472953 .{ .src = .{ .to_sse, .none, .none } },
7286572954 },
7286672955 .extra_temps = .{
72867 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72956 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7286872957 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7286972958 .unused,
7287072959 .unused,
......@@ -72890,7 +72979,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7289072979 .{ .src = .{ .to_mut_sse, .none, .none } },
7289172980 },
7289272981 .extra_temps = .{
72893 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
72982 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7289472983 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7289572984 .unused,
7289672985 .unused,
......@@ -72916,7 +73005,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7291673005 .{ .src = .{ .to_sse, .none, .none } },
7291773006 },
7291873007 .extra_temps = .{
72919 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73008 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7292073009 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7292173010 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7292273011 .unused,
......@@ -72946,7 +73035,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7294673035 .{ .src = .{ .to_sse, .none, .none } },
7294773036 },
7294873037 .extra_temps = .{
72949 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73038 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7295073039 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7295173040 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7295273041 .unused,
......@@ -72977,7 +73066,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7297773066 .{ .src = .{ .to_mut_sse, .none, .none } },
7297873067 },
7297973068 .extra_temps = .{
72980 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73069 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7298173070 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7298273071 .unused,
7298373072 .unused,
......@@ -73008,7 +73097,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7300873097 .{ .src = .{ .to_mut_sse, .none, .none } },
7300973098 },
7301073099 .extra_temps = .{
73011 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73100 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7301273101 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7301373102 .unused,
7301473103 .unused,
......@@ -73078,8 +73167,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7307873167 .{ .src = .{ .to_sse, .none, .none } },
7307973168 },
7308073169 .extra_temps = .{
73081 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73082 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73170 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73171 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7308373172 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7308473173 .unused,
7308573174 .unused,
......@@ -73104,8 +73193,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7310473193 .{ .src = .{ .to_mut_sse, .none, .none } },
7310573194 },
7310673195 .extra_temps = .{
73107 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73108 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73196 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73197 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7310973198 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7311073199 .unused,
7311173200 .unused,
......@@ -73130,7 +73219,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7313073219 .{ .src = .{ .to_mut_sse, .none, .none } },
7313173220 },
7313273221 .extra_temps = .{
73133 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73222 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7313473223 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7313573224 .unused,
7313673225 .unused,
......@@ -73156,8 +73245,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7315673245 .{ .src = .{ .to_sse, .none, .none } },
7315773246 },
7315873247 .extra_temps = .{
73159 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73160 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73248 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73249 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7316173250 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7316273251 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7316373252 .unused,
......@@ -73185,8 +73274,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7318573274 .{ .src = .{ .to_mut_sse, .none, .none } },
7318673275 },
7318773276 .extra_temps = .{
73188 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73189 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73277 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73278 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7319073279 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7319173280 .unused,
7319273281 .unused,
......@@ -73255,8 +73344,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7325573344 .{ .src = .{ .to_sse, .none, .none } },
7325673345 },
7325773346 .extra_temps = .{
73258 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73259 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73347 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73348 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7326073349 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7326173350 .unused,
7326273351 .unused,
......@@ -73282,8 +73371,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7328273371 .{ .src = .{ .to_mut_sse, .none, .none } },
7328373372 },
7328473373 .extra_temps = .{
73285 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73286 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73374 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73375 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7328773376 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7328873377 .unused,
7328973378 .unused,
......@@ -73309,7 +73398,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7330973398 .{ .src = .{ .to_mut_sse, .none, .none } },
7331073399 },
7331173400 .extra_temps = .{
73312 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73401 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7331373402 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7331473403 .unused,
7331573404 .unused,
......@@ -73336,8 +73425,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7333673425 .{ .src = .{ .to_sse, .none, .none } },
7333773426 },
7333873427 .extra_temps = .{
73339 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73340 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73428 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73429 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7334173430 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7334273431 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7334373432 .unused,
......@@ -73367,8 +73456,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7336773456 .{ .src = .{ .to_mut_sse, .none, .none } },
7336873457 },
7336973458 .extra_temps = .{
73370 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73371 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73459 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73460 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7337273461 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7337373462 .unused,
7337473463 .unused,
......@@ -73440,8 +73529,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7344073529 .{ .src = .{ .to_sse, .none, .none } },
7344173530 },
7344273531 .extra_temps = .{
73443 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73444 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73532 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73533 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7344573534 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7344673535 .unused,
7344773536 .unused,
......@@ -73467,8 +73556,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7346773556 .{ .src = .{ .to_mut_sse, .none, .none } },
7346873557 },
7346973558 .extra_temps = .{
73470 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73471 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word } } },
73559 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73560 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word } } },
7347273561 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7347373562 .unused,
7347473563 .unused,
......@@ -73494,7 +73583,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7349473583 .{ .src = .{ .to_mut_sse, .none, .none } },
7349573584 },
7349673585 .extra_temps = .{
73497 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73586 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7349873587 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7349973588 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7350073589 .unused,
......@@ -73522,8 +73611,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7352273611 .{ .src = .{ .to_sse, .none, .none } },
7352373612 },
7352473613 .extra_temps = .{
73525 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73526 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73614 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73615 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7352773616 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7352873617 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7352973618 .unused,
......@@ -73553,8 +73642,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7355373642 .{ .src = .{ .to_mut_sse, .none, .none } },
7355473643 },
7355573644 .extra_temps = .{
73556 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .word, .smear = 8 } } },
73557 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .reverse } },
73645 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .word, .smear = 8 } } },
73646 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7355873647 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7355973648 .unused,
7356073649 .unused,
......@@ -73626,8 +73715,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7362673715 .{ .src = .{ .to_sse, .none, .none } },
7362773716 },
7362873717 .extra_temps = .{
73629 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73630 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
73718 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73719 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7363173720 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7363273721 .unused,
7363373722 .unused,
......@@ -73652,8 +73741,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7365273741 .{ .src = .{ .to_mut_sse, .none, .none } },
7365373742 },
7365473743 .extra_temps = .{
73655 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73656 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
73744 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73745 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7365773746 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7365873747 .unused,
7365973748 .unused,
......@@ -73678,7 +73767,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7367873767 .{ .src = .{ .to_mut_sse, .none, .none } },
7367973768 },
7368073769 .extra_temps = .{
73681 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73770 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7368273771 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7368373772 .unused,
7368473773 .unused,
......@@ -73705,8 +73794,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7370573794 .{ .src = .{ .to_sse, .none, .none } },
7370673795 },
7370773796 .extra_temps = .{
73708 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword, .smear = 8 } } },
73709 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .reverse } },
73797 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword, .smear = 8 } } },
73798 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7371073799 .{ .type = .vector_32_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7371173800 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
7371273801 .unused,
......@@ -73776,8 +73865,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7377673865 .{ .src = .{ .to_sse, .none, .none } },
7377773866 },
7377873867 .extra_temps = .{
73779 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73780 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
73868 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73869 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7378173870 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7378273871 .unused,
7378373872 .unused,
......@@ -73803,8 +73892,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7380373892 .{ .src = .{ .to_mut_sse, .none, .none } },
7380473893 },
7380573894 .extra_temps = .{
73806 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73807 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
73895 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
73896 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7380873897 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7380973898 .unused,
7381073899 .unused,
......@@ -73830,7 +73919,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7383073919 .{ .src = .{ .to_mut_sse, .none, .none } },
7383173920 },
7383273921 .extra_temps = .{
73833 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73922 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7383473923 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7383573924 .unused,
7383673925 .unused,
......@@ -73858,8 +73947,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7385873947 .{ .src = .{ .to_sse, .none, .none } },
7385973948 },
7386073949 .extra_temps = .{
73861 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword, .smear = 8 } } },
73862 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .reverse } },
73950 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword, .smear = 8 } } },
73951 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7386373952 .{ .type = .vector_32_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7386473953 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
7386573954 .unused,
......@@ -73932,8 +74021,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7393274021 .{ .src = .{ .to_sse, .none, .none } },
7393374022 },
7393474023 .extra_temps = .{
73935 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73936 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
74024 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74025 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7393774026 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7393874027 .unused,
7393974028 .unused,
......@@ -73959,8 +74048,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7395974048 .{ .src = .{ .to_mut_sse, .none, .none } },
7396074049 },
7396174050 .extra_temps = .{
73962 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
73963 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword } } },
74051 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74052 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword } } },
7396474053 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7396574054 .unused,
7396674055 .unused,
......@@ -73986,7 +74075,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7398674075 .{ .src = .{ .to_mut_sse, .none, .none } },
7398774076 },
7398874077 .extra_temps = .{
73989 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74078 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7399074079 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7399174080 .unused,
7399274081 .unused,
......@@ -74014,8 +74103,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7401474103 .{ .src = .{ .to_sse, .none, .none } },
7401574104 },
7401674105 .extra_temps = .{
74017 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .dword, .smear = 8 } } },
74018 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .reverse } },
74106 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .dword, .smear = 8 } } },
74107 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .reverse } } },
7401974108 .{ .type = .vector_32_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7402074109 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
7402174110 .unused,
......@@ -74088,8 +74177,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7408874177 .{ .src = .{ .to_sse, .none, .none } },
7408974178 },
7409074179 .extra_temps = .{
74091 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74092 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .qword } } },
74180 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74181 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .qword } } },
7409374182 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7409474183 .unused,
7409574184 .unused,
......@@ -74114,8 +74203,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7411474203 .{ .src = .{ .to_mut_sse, .none, .none } },
7411574204 },
7411674205 .extra_temps = .{
74117 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74118 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .qword } } },
74206 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74207 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .qword } } },
7411974208 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7412074209 .unused,
7412174210 .unused,
......@@ -74140,7 +74229,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7414074229 .{ .src = .{ .to_mut_sse, .none, .none } },
7414174230 },
7414274231 .extra_temps = .{
74143 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74232 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7414474233 .unused,
7414574234 .unused,
7414674235 .unused,
......@@ -74211,7 +74300,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7421174300 .{ .src = .{ .to_sse, .none, .none } },
7421274301 },
7421374302 .extra_temps = .{
74214 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74303 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7421574304 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7421674305 .unused,
7421774306 .unused,
......@@ -74239,7 +74328,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7423974328 .{ .src = .{ .to_mut_sse, .none, .none } },
7424074329 },
7424174330 .extra_temps = .{
74242 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74331 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7424374332 .unused,
7424474333 .unused,
7424574334 .unused,
......@@ -74313,8 +74402,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7431374402 .{ .src = .{ .to_sse, .none, .none } },
7431474403 },
7431574404 .extra_temps = .{
74316 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74317 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .qword } } },
74405 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74406 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .qword } } },
7431874407 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7431974408 .unused,
7432074409 .unused,
......@@ -74340,8 +74429,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7434074429 .{ .src = .{ .to_mut_sse, .none, .none } },
7434174430 },
7434274431 .extra_temps = .{
74343 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74344 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .qword } } },
74432 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74433 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .qword } } },
7434574434 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7434674435 .unused,
7434774436 .unused,
......@@ -74367,7 +74456,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7436774456 .{ .src = .{ .to_mut_sse, .none, .none } },
7436874457 },
7436974458 .extra_temps = .{
74370 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74459 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
7437174460 .unused,
7437274461 .unused,
7437374462 .unused,
......@@ -74441,8 +74530,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7444174530 .{ .src = .{ .to_sse, .none, .none } },
7444274531 },
7444374532 .extra_temps = .{
74444 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74445 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74533 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74534 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7444674535 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7444774536 .unused,
7444874537 .unused,
......@@ -74467,8 +74556,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7446774556 .{ .src = .{ .to_mut_sse, .none, .none } },
7446874557 },
7446974558 .extra_temps = .{
74470 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74471 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74559 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74560 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7447274561 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7447374562 .unused,
7447474563 .unused,
......@@ -74493,8 +74582,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7449374582 .{ .src = .{ .to_sse, .none, .none } },
7449474583 },
7449574584 .extra_temps = .{
74496 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74497 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74585 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74586 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7449874587 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7449974588 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7450074589 .{ .type = .u64, .kind = .{ .rc = .general_purpose } },
......@@ -74526,8 +74615,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7452674615 .{ .src = .{ .to_mut_sse, .none, .none } },
7452774616 },
7452874617 .extra_temps = .{
74529 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74530 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74618 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74619 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7453174620 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7453274621 .{ .type = .u64, .kind = .{ .rc = .general_purpose } },
7453374622 .unused,
......@@ -74559,8 +74648,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7455974648 .{ .src = .{ .to_sse, .none, .none } },
7456074649 },
7456174650 .extra_temps = .{
74562 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74563 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74651 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74652 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7456474653 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7456574654 .{ .type = .vector_16_u8, .kind = .{ .mut_rc = .{ .ref = .src0, .rc = .sse } } },
7456674655 .{ .type = .u64, .kind = .{ .rc = .general_purpose } },
......@@ -74592,8 +74681,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7459274681 .{ .src = .{ .to_mut_sse, .none, .none } },
7459374682 },
7459474683 .extra_temps = .{
74595 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74596 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74684 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74685 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7459774686 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7459874687 .{ .type = .u64, .kind = .{ .rc = .general_purpose } },
7459974688 .unused,
......@@ -74625,8 +74714,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7462574714 .{ .src = .{ .to_sse, .none, .none } },
7462674715 },
7462774716 .extra_temps = .{
74628 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .forward } },
74629 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bswap_mem = .{ .repeat = 2, .size = .xword } } },
74717 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74718 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .repeat = 2, .size = .xword } } },
7463074719 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7463174720 .unused,
7463274721 .unused,
......@@ -74652,8 +74741,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7465274741 .{ .src = .{ .to_sse, .none, .none } },
7465374742 },
7465474743 .extra_temps = .{
74655 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .forward } },
74656 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74744 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74745 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7465774746 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7465874747 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7465974748 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -74684,8 +74773,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7468474773 .extra_temps = .{
7468574774 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7468674775 .{ .type = .isize, .kind = .{ .rc = .general_purpose } },
74687 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .forward } },
74688 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bswap_mem = .{ .repeat = 2, .size = .xword } } },
74776 .{ .type = .vector_32_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74777 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .repeat = 2, .size = .xword } } },
7468974778 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
7469074779 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
7469174780 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
......@@ -74720,8 +74809,8 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
7472074809 .extra_temps = .{
7472174810 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
7472274811 .{ .type = .isize, .kind = .{ .rc = .general_purpose } },
74723 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .forward } },
74724 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bswap_mem = .{ .size = .xword } } },
74812 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
74813 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .reverse, .size = .xword } } },
7472574814 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7472674815 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
7472774816 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -81999,7 +82088,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8199982088 .dst_temps = .{ .{ .mut_rc_mask = .{
8200082089 .ref = .src0,
8200182090 .rc = .sse,
82002 .info = .{ .kind = .all, .scalar = .dword },
82091 .info = .{ .kind = .sign_extend, .scalar = .dword },
8200382092 } }, .unused },
8200482093 .each = .{ .once = &.{
8200582094 .{ ._, .v_ps, .cvtph2, .dst0x, .src0q, ._, ._ },
......@@ -82039,7 +82128,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8203982128 .dst_temps = .{ .{ .mut_rc_mask = .{
8204082129 .ref = .src0,
8204182130 .rc = .sse,
82042 .info = .{ .kind = .all, .scalar = .dword },
82131 .info = .{ .kind = .sign_extend, .scalar = .dword },
8204382132 } }, .unused },
8204482133 .each = .{ .once = &.{
8204582134 .{ ._, .v_ps, .cvtph2, .dst0x, .src0q, ._, ._ },
......@@ -82079,7 +82168,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8207982168 .dst_temps = .{ .{ .mut_rc_mask = .{
8208082169 .ref = .src0,
8208182170 .rc = .sse,
82082 .info = .{ .kind = .all, .scalar = .dword },
82171 .info = .{ .kind = .sign_extend, .scalar = .dword },
8208382172 } }, .unused },
8208482173 .each = .{ .once = &.{
8208582174 .{ ._, .v_ps, .cvtph2, .dst0y, .src0x, ._, ._ },
......@@ -82103,7 +82192,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8210382192 .dst_temps = .{ .{ .mut_rc_mask = .{
8210482193 .ref = .src0,
8210582194 .rc = .sse,
82106 .info = .{ .kind = .all, .scalar = .dword },
82195 .info = .{ .kind = .sign_extend, .scalar = .dword },
8210782196 } }, .unused },
8210882197 .each = .{ .once = &.{
8210982198 .{ ._, .v_ss, .cmp, .dst0x, .src0x, .src1d, .vp(switch (cc) {
......@@ -82126,7 +82215,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8212682215 .dst_temps = .{ .{ .mut_rc_mask = .{
8212782216 .ref = .src0,
8212882217 .rc = .sse,
82129 .info = .{ .kind = .all, .scalar = .dword },
82218 .info = .{ .kind = .sign_extend, .scalar = .dword },
8213082219 } }, .unused },
8213182220 .each = .{ .once = &.{
8213282221 .{ ._, .v_ss, .cmp, .dst0x, .src0x, .src1d, .vp(switch (cc) {
......@@ -82148,7 +82237,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8214882237 },
8214982238 .dst_temps = .{ .{ .ref_mask = .{
8215082239 .ref = .src0,
82151 .info = .{ .kind = .all, .scalar = .dword },
82240 .info = .{ .kind = .sign_extend, .scalar = .dword },
8215282241 } }, .unused },
8215382242 .each = .{ .once = &.{
8215482243 .{ ._, ._ss, .cmp, .dst0x, .src1d, .sp(switch (cc) {
......@@ -82170,7 +82259,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8217082259 .dst_temps = .{ .{ .mut_rc_mask = .{
8217182260 .ref = .src0,
8217282261 .rc = .sse,
82173 .info = .{ .kind = .all, .scalar = .dword },
82262 .info = .{ .kind = .sign_extend, .scalar = .dword },
8217482263 } }, .unused },
8217582264 .each = .{ .once = &.{
8217682265 .{ ._, .v_ps, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -82193,7 +82282,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8219382282 .dst_temps = .{ .{ .mut_rc_mask = .{
8219482283 .ref = .src0,
8219582284 .rc = .sse,
82196 .info = .{ .kind = .all, .scalar = .dword },
82285 .info = .{ .kind = .sign_extend, .scalar = .dword },
8219782286 } }, .unused },
8219882287 .each = .{ .once = &.{
8219982288 .{ ._, .v_ps, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -82215,7 +82304,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8221582304 },
8221682305 .dst_temps = .{ .{ .ref_mask = .{
8221782306 .ref = .src0,
82218 .info = .{ .kind = .all, .scalar = .dword },
82307 .info = .{ .kind = .sign_extend, .scalar = .dword },
8221982308 } }, .unused },
8222082309 .each = .{ .once = &.{
8222182310 .{ ._, ._ps, .cmp, .dst0x, .src1x, .sp(switch (cc) {
......@@ -82237,7 +82326,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8223782326 .dst_temps = .{ .{ .mut_rc_mask = .{
8223882327 .ref = .src0,
8223982328 .rc = .sse,
82240 .info = .{ .kind = .all, .scalar = .dword },
82329 .info = .{ .kind = .sign_extend, .scalar = .dword },
8224182330 } }, .unused },
8224282331 .each = .{ .once = &.{
8224382332 .{ ._, .v_ps, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -82260,7 +82349,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8226082349 .dst_temps = .{ .{ .mut_rc_mask = .{
8226182350 .ref = .src0,
8226282351 .rc = .sse,
82263 .info = .{ .kind = .all, .scalar = .dword },
82352 .info = .{ .kind = .sign_extend, .scalar = .dword },
8226482353 } }, .unused },
8226582354 .each = .{ .once = &.{
8226682355 .{ ._, .v_ps, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -82282,7 +82371,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8228282371 .dst_temps = .{ .{ .mut_rc_mask = .{
8228382372 .ref = .src0,
8228482373 .rc = .sse,
82285 .info = .{ .kind = .all, .scalar = .qword },
82374 .info = .{ .kind = .sign_extend, .scalar = .qword },
8228682375 } }, .unused },
8228782376 .each = .{ .once = &.{
8228882377 .{ ._, .v_sd, .cmp, .dst0x, .src0x, .src1q, .vp(switch (cc) {
......@@ -82305,7 +82394,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8230582394 .dst_temps = .{ .{ .mut_rc_mask = .{
8230682395 .ref = .src0,
8230782396 .rc = .sse,
82308 .info = .{ .kind = .all, .scalar = .qword },
82397 .info = .{ .kind = .sign_extend, .scalar = .qword },
8230982398 } }, .unused },
8231082399 .each = .{ .once = &.{
8231182400 .{ ._, .v_sd, .cmp, .dst0x, .src0x, .src1q, .vp(switch (cc) {
......@@ -82327,7 +82416,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8232782416 },
8232882417 .dst_temps = .{ .{ .ref_mask = .{
8232982418 .ref = .src0,
82330 .info = .{ .kind = .all, .scalar = .qword },
82419 .info = .{ .kind = .sign_extend, .scalar = .qword },
8233182420 } }, .unused },
8233282421 .each = .{ .once = &.{
8233382422 .{ ._, ._sd, .cmp, .dst0x, .src1q, .sp(switch (cc) {
......@@ -82349,7 +82438,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8234982438 .dst_temps = .{ .{ .mut_rc_mask = .{
8235082439 .ref = .src0,
8235182440 .rc = .sse,
82352 .info = .{ .kind = .all, .scalar = .qword },
82441 .info = .{ .kind = .sign_extend, .scalar = .qword },
8235382442 } }, .unused },
8235482443 .each = .{ .once = &.{
8235582444 .{ ._, .v_pd, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -82372,7 +82461,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8237282461 .dst_temps = .{ .{ .mut_rc_mask = .{
8237382462 .ref = .src0,
8237482463 .rc = .sse,
82375 .info = .{ .kind = .all, .scalar = .qword },
82464 .info = .{ .kind = .sign_extend, .scalar = .qword },
8237682465 } }, .unused },
8237782466 .each = .{ .once = &.{
8237882467 .{ ._, .v_pd, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -82394,7 +82483,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8239482483 },
8239582484 .dst_temps = .{ .{ .ref_mask = .{
8239682485 .ref = .src0,
82397 .info = .{ .kind = .all, .scalar = .qword },
82486 .info = .{ .kind = .sign_extend, .scalar = .qword },
8239882487 } }, .unused },
8239982488 .each = .{ .once = &.{
8240082489 .{ ._, ._pd, .cmp, .dst0x, .src1x, .sp(switch (cc) {
......@@ -82416,7 +82505,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8241682505 .dst_temps = .{ .{ .mut_rc_mask = .{
8241782506 .ref = .src0,
8241882507 .rc = .sse,
82419 .info = .{ .kind = .all, .scalar = .qword },
82508 .info = .{ .kind = .sign_extend, .scalar = .qword },
8242082509 } }, .unused },
8242182510 .each = .{ .once = &.{
8242282511 .{ ._, .v_pd, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -82439,7 +82528,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8243982528 .dst_temps = .{ .{ .mut_rc_mask = .{
8244082529 .ref = .src0,
8244182530 .rc = .sse,
82442 .info = .{ .kind = .all, .scalar = .qword },
82531 .info = .{ .kind = .sign_extend, .scalar = .qword },
8244382532 } }, .unused },
8244482533 .each = .{ .once = &.{
8244582534 .{ ._, .v_pd, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -84643,7 +84732,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8464384732 .{ .src = .{ .to_sse, .to_sse, .none } },
8464484733 },
8464584734 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84646 .kind = .all,
84735 .kind = .sign_extend,
8464784736 .inverted = switch (cc) {
8464884737 else => unreachable,
8464984738 .e => false,
......@@ -84667,7 +84756,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8466784756 .{ .src = .{ .to_sse, .to_sse, .none } },
8466884757 },
8466984758 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84670 .kind = .all,
84759 .kind = .sign_extend,
8467184760 .inverted = switch (cc) {
8467284761 else => unreachable,
8467384762 .e => false,
......@@ -84691,7 +84780,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8469184780 .{ .src = .{ .to_sse, .to_sse, .none } },
8469284781 },
8469384782 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84694 .kind = .all,
84783 .kind = .sign_extend,
8469584784 .inverted = switch (cc) {
8469684785 else => unreachable,
8469784786 .e => false,
......@@ -84715,7 +84804,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8471584804 .{ .src = .{ .to_sse, .to_sse, .none } },
8471684805 },
8471784806 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84718 .kind = .all,
84807 .kind = .sign_extend,
8471984808 .inverted = switch (cc) {
8472084809 else => unreachable,
8472184810 .e => false,
......@@ -84739,7 +84828,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8473984828 .{ .src = .{ .to_mut_sse, .to_sse, .none } },
8474084829 },
8474184830 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84742 .kind = .all,
84831 .kind = .sign_extend,
8474384832 .inverted = switch (cc) {
8474484833 else => unreachable,
8474584834 .e => false,
......@@ -84763,7 +84852,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8476384852 .{ .src = .{ .to_mut_sse, .to_sse, .none } },
8476484853 },
8476584854 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84766 .kind = .all,
84855 .kind = .sign_extend,
8476784856 .inverted = switch (cc) {
8476884857 else => unreachable,
8476984858 .e => false,
......@@ -84787,7 +84876,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8478784876 .{ .src = .{ .to_mut_sse, .to_sse, .none } },
8478884877 },
8478984878 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84790 .kind = .all,
84879 .kind = .sign_extend,
8479184880 .inverted = switch (cc) {
8479284881 else => unreachable,
8479384882 .e => false,
......@@ -84811,7 +84900,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8481184900 .{ .src = .{ .to_mut_sse, .to_sse, .none } },
8481284901 },
8481384902 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84814 .kind = .all,
84903 .kind = .sign_extend,
8481584904 .inverted = switch (cc) {
8481684905 else => unreachable,
8481784906 .e => false,
......@@ -84835,7 +84924,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8483584924 .{ .src = .{ .to_mut_mmx, .to_mmx, .none } },
8483684925 },
8483784926 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84838 .kind = .all,
84927 .kind = .sign_extend,
8483984928 .inverted = switch (cc) {
8484084929 else => unreachable,
8484184930 .e => false,
......@@ -84859,7 +84948,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8485984948 .{ .src = .{ .to_mut_mmx, .to_mmx, .none } },
8486084949 },
8486184950 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84862 .kind = .all,
84951 .kind = .sign_extend,
8486384952 .inverted = switch (cc) {
8486484953 else => unreachable,
8486584954 .e => false,
......@@ -84883,7 +84972,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8488384972 .{ .src = .{ .to_mut_mmx, .to_mmx, .none } },
8488484973 },
8488584974 .dst_temps = .{ .{ .ref_mask = .{ .ref = .src0, .info = .{
84886 .kind = .all,
84975 .kind = .sign_extend,
8488784976 .inverted = switch (cc) {
8488884977 else => unreachable,
8488984978 .e => false,
......@@ -84907,7 +84996,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8490784996 .{ .src = .{ .to_sse, .to_sse, .none } },
8490884997 },
8490984998 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84910 .kind = .all,
84999 .kind = .sign_extend,
8491185000 .inverted = switch (cc) {
8491285001 else => unreachable,
8491385002 .e => false,
......@@ -84931,7 +85020,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8493185020 .{ .src = .{ .to_sse, .to_sse, .none } },
8493285021 },
8493385022 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84934 .kind = .all,
85023 .kind = .sign_extend,
8493585024 .inverted = switch (cc) {
8493685025 else => unreachable,
8493785026 .e => false,
......@@ -84955,7 +85044,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8495585044 .{ .src = .{ .to_sse, .to_sse, .none } },
8495685045 },
8495785046 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84958 .kind = .all,
85047 .kind = .sign_extend,
8495985048 .inverted = switch (cc) {
8496085049 else => unreachable,
8496185050 .e => false,
......@@ -84979,7 +85068,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8497985068 .{ .src = .{ .to_sse, .to_sse, .none } },
8498085069 },
8498185070 .dst_temps = .{ .{ .mut_rc_mask = .{ .ref = .src0, .rc = .sse, .info = .{
84982 .kind = .all,
85071 .kind = .sign_extend,
8498385072 .inverted = switch (cc) {
8498485073 else => unreachable,
8498585074 .e => false,
......@@ -86631,7 +86720,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8663186720 .dst_temps = .{ .{ .mut_rc_mask = .{
8663286721 .ref = .src0,
8663386722 .rc = .sse,
86634 .info = .{ .kind = .all, .scalar = .dword },
86723 .info = .{ .kind = .sign_extend, .scalar = .dword },
8663586724 } }, .unused },
8663686725 .each = .{ .once = &.{
8663786726 .{ ._, .v_ps, .cvtph2, .dst0x, .src0q, ._, ._ },
......@@ -86671,7 +86760,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8667186760 .dst_temps = .{ .{ .mut_rc_mask = .{
8667286761 .ref = .src0,
8667386762 .rc = .sse,
86674 .info = .{ .kind = .all, .scalar = .dword },
86763 .info = .{ .kind = .sign_extend, .scalar = .dword },
8667586764 } }, .unused },
8667686765 .each = .{ .once = &.{
8667786766 .{ ._, .v_ps, .cvtph2, .dst0x, .src0q, ._, ._ },
......@@ -86711,7 +86800,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8671186800 .dst_temps = .{ .{ .mut_rc_mask = .{
8671286801 .ref = .src0,
8671386802 .rc = .sse,
86714 .info = .{ .kind = .all, .scalar = .dword },
86803 .info = .{ .kind = .sign_extend, .scalar = .dword },
8671586804 } }, .unused },
8671686805 .each = .{ .once = &.{
8671786806 .{ ._, .v_ps, .cvtph2, .dst0y, .src0x, ._, ._ },
......@@ -86737,7 +86826,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8673786826 .dst_temps = .{ .{ .mut_rc_mask = .{
8673886827 .ref = .src0,
8673986828 .rc = .sse,
86740 .info = .{ .kind = .all, .scalar = .dword },
86829 .info = .{ .kind = .sign_extend, .scalar = .dword },
8674186830 } }, .unused },
8674286831 .each = .{ .once = &.{
8674386832 .{ ._, .v_ss, .cmp, .dst0x, .src0x, .src1d, .vp(switch (cc) {
......@@ -86760,7 +86849,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8676086849 },
8676186850 .dst_temps = .{ .{ .ref_mask = .{
8676286851 .ref = .src0,
86763 .info = .{ .kind = .all, .scalar = .dword },
86852 .info = .{ .kind = .sign_extend, .scalar = .dword },
8676486853 } }, .unused },
8676586854 .each = .{ .once = &.{
8676686855 .{ ._, ._ss, .cmp, .dst0x, .src1d, .sp(switch (cc) {
......@@ -86784,7 +86873,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8678486873 .dst_temps = .{ .{ .mut_rc_mask = .{
8678586874 .ref = .src0,
8678686875 .rc = .sse,
86787 .info = .{ .kind = .all, .scalar = .dword },
86876 .info = .{ .kind = .sign_extend, .scalar = .dword },
8678886877 } }, .unused },
8678986878 .each = .{ .once = &.{
8679086879 .{ ._, .v_ps, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -86807,7 +86896,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8680786896 },
8680886897 .dst_temps = .{ .{ .ref_mask = .{
8680986898 .ref = .src0,
86810 .info = .{ .kind = .all, .scalar = .dword },
86899 .info = .{ .kind = .sign_extend, .scalar = .dword },
8681186900 } }, .unused },
8681286901 .each = .{ .once = &.{
8681386902 .{ ._, ._ps, .cmp, .dst0x, .src1x, .sp(switch (cc) {
......@@ -86831,7 +86920,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8683186920 .dst_temps = .{ .{ .mut_rc_mask = .{
8683286921 .ref = .src0,
8683386922 .rc = .sse,
86834 .info = .{ .kind = .all, .scalar = .dword },
86923 .info = .{ .kind = .sign_extend, .scalar = .dword },
8683586924 } }, .unused },
8683686925 .each = .{ .once = &.{
8683786926 .{ ._, .v_ps, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -86855,7 +86944,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8685586944 .dst_temps = .{ .{ .mut_rc_mask = .{
8685686945 .ref = .src0,
8685786946 .rc = .sse,
86858 .info = .{ .kind = .all, .scalar = .qword },
86947 .info = .{ .kind = .sign_extend, .scalar = .qword },
8685986948 } }, .unused },
8686086949 .each = .{ .once = &.{
8686186950 .{ ._, .v_sd, .cmp, .dst0x, .src0x, .src1q, .vp(switch (cc) {
......@@ -86878,7 +86967,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8687886967 },
8687986968 .dst_temps = .{ .{ .ref_mask = .{
8688086969 .ref = .src0,
86881 .info = .{ .kind = .all, .scalar = .qword },
86970 .info = .{ .kind = .sign_extend, .scalar = .qword },
8688286971 } }, .unused },
8688386972 .each = .{ .once = &.{
8688486973 .{ ._, ._sd, .cmp, .dst0x, .src1q, .sp(switch (cc) {
......@@ -86902,7 +86991,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8690286991 .dst_temps = .{ .{ .mut_rc_mask = .{
8690386992 .ref = .src0,
8690486993 .rc = .sse,
86905 .info = .{ .kind = .all, .scalar = .qword },
86994 .info = .{ .kind = .sign_extend, .scalar = .qword },
8690686995 } }, .unused },
8690786996 .each = .{ .once = &.{
8690886997 .{ ._, .v_pd, .cmp, .dst0x, .src0x, .src1x, .vp(switch (cc) {
......@@ -86925,7 +87014,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8692587014 },
8692687015 .dst_temps = .{ .{ .ref_mask = .{
8692787016 .ref = .src0,
86928 .info = .{ .kind = .all, .scalar = .qword },
87017 .info = .{ .kind = .sign_extend, .scalar = .qword },
8692987018 } }, .unused },
8693087019 .each = .{ .once = &.{
8693187020 .{ ._, ._pd, .cmp, .dst0x, .src1x, .sp(switch (cc) {
......@@ -86949,7 +87038,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8694987038 .dst_temps = .{ .{ .mut_rc_mask = .{
8695087039 .ref = .src0,
8695187040 .rc = .sse,
86952 .info = .{ .kind = .all, .scalar = .qword },
87041 .info = .{ .kind = .sign_extend, .scalar = .qword },
8695387042 } }, .unused },
8695487043 .each = .{ .once = &.{
8695587044 .{ ._, .v_pd, .cmp, .dst0y, .src0y, .src1y, .vp(switch (cc) {
......@@ -89204,7 +89293,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8920489293 var ops = try cg.tempsFromOperands(inst, .{un_op});
8920589294 while (try ops[0].toBase(false, cg)) {}
8920689295 try cg.asmMemoryImmediate(.{ ._, .cmp }, try ops[0].tracking(cg).short.mem(cg, .{
89207 .size = cg.memSize(eu_err_ty),
89296 .size = cg.memSize(eu_err_ty, .general_purpose),
8920889297 .disp = eu_err_off,
8920989298 }), .u(0));
8921089299 const is_err = try cg.tempInit(.bool, .{ .eflags = .ne });
......@@ -89220,7 +89309,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8922089309 var ops = try cg.tempsFromOperands(inst, .{un_op});
8922189310 while (try ops[0].toBase(false, cg)) {}
8922289311 try cg.asmMemoryImmediate(.{ ._, .cmp }, try ops[0].tracking(cg).short.mem(cg, .{
89223 .size = cg.memSize(eu_err_ty),
89312 .size = cg.memSize(eu_err_ty, .general_purpose),
8922489313 .disp = eu_err_off,
8922589314 }), .u(0));
8922689315 const is_non_err = try cg.tempInit(.bool, .{ .eflags = .e });
......@@ -89236,11 +89325,9 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8923689325 var ops = try cg.tempsFromOperands(inst, .{un_op});
8923789326 try ops[0].toOffset(eu_err_off, cg);
8923889327 while (try ops[0].toLea(cg)) {}
89239 try cg.asmMemoryImmediate(
89240 .{ ._, .cmp },
89241 try ops[0].tracking(cg).short.deref().mem(cg, .{ .size = cg.memSize(eu_err_ty) }),
89242 .u(0),
89243 );
89328 try cg.asmMemoryImmediate(.{ ._, .cmp }, try ops[0].tracking(cg).short.deref().mem(cg, .{
89329 .size = cg.memSize(eu_err_ty, .general_purpose),
89330 }), .u(0));
8924489331 const is_err = try cg.tempInit(.bool, .{ .eflags = .ne });
8924589332 try is_err.finish(inst, &.{un_op}, &ops, cg);
8924689333 },
......@@ -89254,11 +89341,9 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8925489341 var ops = try cg.tempsFromOperands(inst, .{un_op});
8925589342 try ops[0].toOffset(eu_err_off, cg);
8925689343 while (try ops[0].toLea(cg)) {}
89257 try cg.asmMemoryImmediate(
89258 .{ ._, .cmp },
89259 try ops[0].tracking(cg).short.deref().mem(cg, .{ .size = cg.memSize(eu_err_ty) }),
89260 .u(0),
89261 );
89344 try cg.asmMemoryImmediate(.{ ._, .cmp }, try ops[0].tracking(cg).short.deref().mem(cg, .{
89345 .size = cg.memSize(eu_err_ty, .general_purpose),
89346 }), .u(0));
8926289347 const is_non_err = try cg.tempInit(.bool, .{ .eflags = .e });
8926389348 try is_non_err.finish(inst, &.{un_op}, &ops, cg);
8926489349 },
......@@ -89328,6 +89413,25 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
8932889413 .store, .store_safe => |air_tag| {
8932989414 const bin_op = air_datas[@intFromEnum(inst)].bin_op;
8933089415 var ops = try cg.tempsFromOperands(inst, .{ bin_op.lhs, bin_op.rhs });
89416 switch (ops[1].tracking(cg).short) {
89417 else => {},
89418 .register_mask => |src_reg_mask| {
89419 const ty = ops[1].typeOf(cg);
89420 const new_op1 = try cg.tempAllocReg(ty, abi.RegisterClass.gp);
89421 try cg.genSetReg(
89422 new_op1.tracking(cg).short.register,
89423 ty,
89424 .{ .register_mask = src_reg_mask },
89425 .{ .safety = switch (air_tag) {
89426 else => unreachable,
89427 .store => false,
89428 .store_safe => true,
89429 } },
89430 );
89431 try ops[1].die(cg);
89432 ops[1] = new_op1;
89433 },
89434 }
8933189435 cg.select(&.{}, &.{}, &ops, comptime &.{ .{
8933289436 .src_constraints = .{ .{ .ptr_bool_vec_elem = .byte }, .bool, .any },
8933389437 .patterns = &.{
......@@ -127103,7 +127207,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127103127207 .dst_constraints = .{ .bool, .any },
127104127208 .src_constraints = .{ .any_bool_vec, .any, .any },
127105127209 .patterns = &.{
127106 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword, .is = .inverted } }, .none, .none } },
127210 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend, .is = .inverted } }, .none, .none } },
127107127211 },
127108127212 .dst_temps = .{ .{ .cc = .z }, .unused },
127109127213 .clobbers = .{ .eflags = true },
......@@ -127115,7 +127219,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127115127219 .dst_constraints = .{ .bool, .any },
127116127220 .src_constraints = .{ .any_bool_vec, .any, .any },
127117127221 .patterns = &.{
127118 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword, .is = .inverted } }, .none, .none } },
127222 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend, .is = .inverted } }, .none, .none } },
127119127223 },
127120127224 .dst_temps = .{ .{ .cc = .z }, .unused },
127121127225 .clobbers = .{ .eflags = true },
......@@ -127127,7 +127231,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127127127231 .dst_constraints = .{ .bool, .any },
127128127232 .src_constraints = .{ .any_bool_vec, .any, .any },
127129127233 .patterns = &.{
127130 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword } }, .none, .none } },
127234 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend } }, .none, .none } },
127131127235 },
127132127236 .extra_temps = .{
127133127237 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -127153,7 +127257,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127153127257 .dst_constraints = .{ .bool, .any },
127154127258 .src_constraints = .{ .any_bool_vec, .any, .any },
127155127259 .patterns = &.{
127156 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword } }, .none, .none } },
127260 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend } }, .none, .none } },
127157127261 },
127158127262 .extra_temps = .{
127159127263 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -127179,7 +127283,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127179127283 .dst_constraints = .{ .bool, .any },
127180127284 .src_constraints = .{ .any_bool_vec, .any, .any },
127181127285 .patterns = &.{
127182 .{ .src = .{ .{ .reg_mask = .{ .size = .xword } }, .none, .none } },
127286 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .msb } }, .none, .none } },
127183127287 },
127184127288 .extra_temps = .{
127185127289 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -127205,7 +127309,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127205127309 .dst_constraints = .{ .bool, .any },
127206127310 .src_constraints = .{ .any_bool_vec, .any, .any },
127207127311 .patterns = &.{
127208 .{ .src = .{ .{ .reg_mask = .{ .size = .xword } }, .none, .none } },
127312 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .msb } }, .none, .none } },
127209127313 },
127210127314 .extra_temps = .{
127211127315 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -127231,7 +127335,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127231127335 .dst_constraints = .{ .bool, .any },
127232127336 .src_constraints = .{ .any_bool_vec, .any, .any },
127233127337 .patterns = &.{
127234 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword, .is = .inverted } }, .none, .none } },
127338 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend, .is = .inverted } }, .none, .none } },
127235127339 },
127236127340 .dst_temps = .{ .{ .cc = .z }, .unused },
127237127341 .clobbers = .{ .eflags = true },
......@@ -127243,7 +127347,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127243127347 .dst_constraints = .{ .bool, .any },
127244127348 .src_constraints = .{ .any_bool_vec, .any, .any },
127245127349 .patterns = &.{
127246 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword, .is = .inverted } }, .none, .none } },
127350 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend, .is = .inverted } }, .none, .none } },
127247127351 },
127248127352 .dst_temps = .{ .{ .cc = .z }, .unused },
127249127353 .clobbers = .{ .eflags = true },
......@@ -127255,7 +127359,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127255127359 .dst_constraints = .{ .bool, .any },
127256127360 .src_constraints = .{ .any_bool_vec, .any, .any },
127257127361 .patterns = &.{
127258 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword } }, .none, .none } },
127362 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend } }, .none, .none } },
127259127363 },
127260127364 .extra_temps = .{
127261127365 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
......@@ -127281,7 +127385,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127281127385 .dst_constraints = .{ .bool, .any },
127282127386 .src_constraints = .{ .any_bool_vec, .any, .any },
127283127387 .patterns = &.{
127284 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword } }, .none, .none } },
127388 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend } }, .none, .none } },
127285127389 },
127286127390 .extra_temps = .{
127287127391 .{ .type = .vector_8_f32, .kind = .{ .rc = .sse } },
......@@ -127307,7 +127411,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127307127411 .dst_constraints = .{ .bool, .any },
127308127412 .src_constraints = .{ .any_bool_vec, .any, .any },
127309127413 .patterns = &.{
127310 .{ .src = .{ .{ .reg_mask = .{ .size = .yword } }, .none, .none } },
127414 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .msb } }, .none, .none } },
127311127415 },
127312127416 .extra_temps = .{
127313127417 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -127508,7 +127612,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127508127612 .dst_constraints = .{ .bool, .any },
127509127613 .src_constraints = .{ .any_bool_vec, .any, .any },
127510127614 .patterns = &.{
127511 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword, .is = .uninverted } }, .none, .none } },
127615 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend, .is = .uninverted } }, .none, .none } },
127512127616 },
127513127617 .dst_temps = .{ .{ .cc = .nz }, .unused },
127514127618 .clobbers = .{ .eflags = true },
......@@ -127520,7 +127624,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127520127624 .dst_constraints = .{ .bool, .any },
127521127625 .src_constraints = .{ .any_bool_vec, .any, .any },
127522127626 .patterns = &.{
127523 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword, .is = .uninverted } }, .none, .none } },
127627 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend, .is = .uninverted } }, .none, .none } },
127524127628 },
127525127629 .dst_temps = .{ .{ .cc = .nz }, .unused },
127526127630 .clobbers = .{ .eflags = true },
......@@ -127532,7 +127636,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127532127636 .dst_constraints = .{ .bool, .any },
127533127637 .src_constraints = .{ .any_bool_vec, .any, .any },
127534127638 .patterns = &.{
127535 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword } }, .none, .none } },
127639 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend } }, .none, .none } },
127536127640 },
127537127641 .extra_temps = .{
127538127642 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -127558,7 +127662,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127558127662 .dst_constraints = .{ .bool, .any },
127559127663 .src_constraints = .{ .any_bool_vec, .any, .any },
127560127664 .patterns = &.{
127561 .{ .src = .{ .{ .all_reg_mask = .{ .size = .xword } }, .none, .none } },
127665 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .sign_extend } }, .none, .none } },
127562127666 },
127563127667 .extra_temps = .{
127564127668 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
......@@ -127584,7 +127688,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127584127688 .dst_constraints = .{ .bool, .any },
127585127689 .src_constraints = .{ .any_bool_vec, .any, .any },
127586127690 .patterns = &.{
127587 .{ .src = .{ .{ .reg_mask = .{ .size = .xword } }, .none, .none } },
127691 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .msb } }, .none, .none } },
127588127692 },
127589127693 .extra_temps = .{
127590127694 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -127610,7 +127714,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127610127714 .dst_constraints = .{ .bool, .any },
127611127715 .src_constraints = .{ .any_bool_vec, .any, .any },
127612127716 .patterns = &.{
127613 .{ .src = .{ .{ .reg_mask = .{ .size = .xword } }, .none, .none } },
127717 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .msb } }, .none, .none } },
127614127718 },
127615127719 .extra_temps = .{
127616127720 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -127636,7 +127740,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127636127740 .dst_constraints = .{ .bool, .any },
127637127741 .src_constraints = .{ .any_bool_vec, .any, .any },
127638127742 .patterns = &.{
127639 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword, .is = .uninverted } }, .none, .none } },
127743 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend, .is = .uninverted } }, .none, .none } },
127640127744 },
127641127745 .dst_temps = .{ .{ .cc = .nz }, .unused },
127642127746 .clobbers = .{ .eflags = true },
......@@ -127648,7 +127752,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127648127752 .dst_constraints = .{ .bool, .any },
127649127753 .src_constraints = .{ .any_bool_vec, .any, .any },
127650127754 .patterns = &.{
127651 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword, .is = .uninverted } }, .none, .none } },
127755 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend, .is = .uninverted } }, .none, .none } },
127652127756 },
127653127757 .dst_temps = .{ .{ .cc = .nz }, .unused },
127654127758 .clobbers = .{ .eflags = true },
......@@ -127660,7 +127764,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127660127764 .dst_constraints = .{ .bool, .any },
127661127765 .src_constraints = .{ .any_bool_vec, .any, .any },
127662127766 .patterns = &.{
127663 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword } }, .none, .none } },
127767 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend } }, .none, .none } },
127664127768 },
127665127769 .extra_temps = .{
127666127770 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
......@@ -127686,7 +127790,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127686127790 .dst_constraints = .{ .bool, .any },
127687127791 .src_constraints = .{ .any_bool_vec, .any, .any },
127688127792 .patterns = &.{
127689 .{ .src = .{ .{ .all_reg_mask = .{ .size = .yword } }, .none, .none } },
127793 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .sign_extend } }, .none, .none } },
127690127794 },
127691127795 .extra_temps = .{
127692127796 .{ .type = .vector_8_f32, .kind = .{ .rc = .sse } },
......@@ -127712,7 +127816,7 @@ fn genBody(cg: *CodeGen, body: []const Air.Inst.Index) InnerError!void {
127712127816 .dst_constraints = .{ .bool, .any },
127713127817 .src_constraints = .{ .any_bool_vec, .any, .any },
127714127818 .patterns = &.{
127715 .{ .src = .{ .{ .reg_mask = .{ .size = .yword } }, .none, .none } },
127819 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .msb } }, .none, .none } },
127716127820 },
127717127821 .extra_temps = .{
127718127822 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
......@@ -174212,15 +174316,16 @@ fn restoreState(self: *CodeGen, state: State, deaths: []const Air.Inst.Index, co
174212174316 const ExpectedContents = [@typeInfo(RegisterManager.TrackedRegisters).array.len]RegisterLock;
174213174317 const bfa_buf_len = if (opts.update_tracking) 0 else 1;
174214174318 var bfa_buf: [bfa_buf_len]ExpectedContents = undefined;
174215 var stack = if (opts.update_tracking) {} else std.heap.BufferFirstAllocator.init(@ptrCast(&bfa_buf), self.gpa);
174319 var stack = if (!opts.update_tracking) std.heap.BufferFirstAllocator.init(@ptrCast(&bfa_buf), self.gpa);
174320 const allocator = if (!opts.update_tracking) stack.allocator();
174216174321
174217 var reg_locks = if (opts.update_tracking) {} else try std.array_list.Managed(RegisterLock).initCapacity(
174218 stack.allocator(),
174322 var reg_locks = if (!opts.update_tracking) try std.ArrayList(RegisterLock).initCapacity(
174323 allocator,
174219174324 @typeInfo(ExpectedContents).array.len,
174220174325 );
174221174326 defer if (!opts.update_tracking) {
174222174327 for (reg_locks.items) |lock| self.register_manager.unlockReg(lock);
174223 reg_locks.deinit();
174328 reg_locks.deinit(allocator);
174224174329 };
174225174330
174226174331 for (
......@@ -174250,7 +174355,7 @@ fn restoreState(self: *CodeGen, state: State, deaths: []const Air.Inst.Index, co
174250174355 self.inst_tracking.getPtr(target_inst).?.trackMaterialize(target_inst, reg_tracking);
174251174356 }
174252174357 } else if (target_maybe_inst) |_|
174253 try reg_locks.append(self.register_manager.lockRegIndexAssumeUnused(reg_index));
174358 try reg_locks.append(allocator, self.register_manager.lockRegIndexAssumeUnused(reg_index));
174254174359 }
174255174360 if (opts.emit_instructions) if (self.eflags_inst) |inst|
174256174361 try self.inst_tracking.getPtr(inst).?.spill(self, inst);
......@@ -174463,7 +174568,13 @@ fn load(self: *CodeGen, dst_mcv: MCValue, ptr_ty: Type, ptr_mcv: MCValue) InnerE
174463174568 .register_overflow,
174464174569 .register_mask,
174465174570 .indirect_load_frame,
174466 .elementwise_args,
174571 .indirect_mask,
174572 .register_tee,
174573 .elementwise_gpr,
174574 .elementwise_sse,
174575 .xwordwise_sse,
174576 .ywordwise_sse,
174577 .zwordwise_sse,
174467174578 .reserved_frame,
174468174579 => unreachable, // not a valid pointer
174469174580 .immediate,
......@@ -174516,7 +174627,13 @@ fn store(
174516174627 .register_overflow,
174517174628 .register_mask,
174518174629 .indirect_load_frame,
174519 .elementwise_args,
174630 .indirect_mask,
174631 .register_tee,
174632 .elementwise_gpr,
174633 .elementwise_sse,
174634 .xwordwise_sse,
174635 .ywordwise_sse,
174636 .zwordwise_sse,
174520174637 .reserved_frame,
174521174638 => unreachable, // not a valid pointer
174522174639 .immediate,
......@@ -174561,12 +174678,18 @@ fn genUnOpMir(self: *CodeGen, mir_tag: Mir.Inst.FixedTag, dst_ty: Type, dst_mcv:
174561174678 .register_overflow,
174562174679 .register_mask,
174563174680 .indirect_load_frame,
174681 .indirect_mask,
174564174682 .lea_frame,
174565174683 .lea_nav,
174566174684 .lea_uav,
174567174685 .lea_lazy_sym,
174568174686 .lea_extern_func,
174569 .elementwise_args,
174687 .register_tee,
174688 .elementwise_gpr,
174689 .elementwise_sse,
174690 .xwordwise_sse,
174691 .ywordwise_sse,
174692 .zwordwise_sse,
174570174693 .reserved_frame,
174571174694 .air_ref,
174572174695 => unreachable, // unmodifiable destination
......@@ -175256,7 +175379,13 @@ fn genBinOpMir(
175256175379 .lea_lazy_sym,
175257175380 .lea_extern_func,
175258175381 .indirect_load_frame,
175259 .elementwise_args,
175382 .indirect_mask,
175383 .register_tee,
175384 .elementwise_gpr,
175385 .elementwise_sse,
175386 .xwordwise_sse,
175387 .ywordwise_sse,
175388 .zwordwise_sse,
175260175389 .reserved_frame,
175261175390 .air_ref,
175262175391 => unreachable, // unmodifiable destination
......@@ -175293,7 +175422,13 @@ fn genBinOpMir(
175293175422 .register_overflow,
175294175423 .register_mask,
175295175424 .indirect_load_frame,
175296 .elementwise_args,
175425 .indirect_mask,
175426 .register_tee,
175427 .elementwise_gpr,
175428 .elementwise_sse,
175429 .xwordwise_sse,
175430 .ywordwise_sse,
175431 .zwordwise_sse,
175297175432 .reserved_frame,
175298175433 => unreachable,
175299175434 .register,
......@@ -175465,7 +175600,13 @@ fn genBinOpMir(
175465175600 .register_overflow,
175466175601 .register_mask,
175467175602 .indirect_load_frame,
175468 .elementwise_args,
175603 .indirect_mask,
175604 .register_tee,
175605 .elementwise_gpr,
175606 .elementwise_sse,
175607 .xwordwise_sse,
175608 .ywordwise_sse,
175609 .zwordwise_sse,
175469175610 .reserved_frame,
175470175611 .air_ref,
175471175612 => unreachable,
......@@ -175569,7 +175710,13 @@ fn genBinOpMir(
175569175710 .register_overflow,
175570175711 .register_mask,
175571175712 .indirect_load_frame,
175572 .elementwise_args,
175713 .indirect_mask,
175714 .register_tee,
175715 .elementwise_gpr,
175716 .elementwise_sse,
175717 .xwordwise_sse,
175718 .ywordwise_sse,
175719 .zwordwise_sse,
175573175720 .reserved_frame,
175574175721 .air_ref,
175575175722 => unreachable,
......@@ -175683,120 +175830,255 @@ fn genBinOpMir(
175683175830 }
175684175831}
175685175832
175686fn airArg(self: *CodeGen, inst: Air.Inst.Index) !void {
175687 const zcu = self.pt.zcu;
175688 const arg_index = for (self.args, 0..) |arg, arg_index| {
175833fn airArg(cg: *CodeGen, inst: Air.Inst.Index) !void {
175834 const zcu = cg.pt.zcu;
175835 const arg_index = for (cg.args, 0..) |arg, arg_index| {
175689175836 if (arg != .none) break arg_index;
175690175837 } else unreachable;
175691 const src_mcv = self.args[arg_index];
175692 self.args = self.args[arg_index + 1 ..];
175693 const result: MCValue = if (self.mod.strip and self.liveness.isUnused(inst)) .unreach else result: {
175694 const arg_ty = self.typeOfIndex(inst);
175838 const src_mcv = cg.args[arg_index];
175839 cg.args = cg.args[arg_index + 1 ..];
175840 const result: MCValue = if (cg.mod.strip and cg.liveness.isUnused(inst)) .unreach else result: {
175841 const arg_ty = cg.typeOfIndex(inst);
175695175842 switch (src_mcv) {
175696 .register, .register_pair, .load_frame => {
175697 for (src_mcv.getRegs()) |reg| self.register_manager.getRegAssumeFree(reg, inst);
175843 .register,
175844 .register_pair,
175845 .register_triple,
175846 .register_quadruple,
175847 .register_mask,
175848 .load_frame,
175849 => {
175850 for (src_mcv.getRegs()) |reg| cg.register_manager.getRegAssumeFree(reg, inst);
175698175851 break :result src_mcv;
175699175852 },
175700175853 .indirect => |reg_off| {
175701 self.register_manager.getRegAssumeFree(reg_off.reg, null);
175702 const dst_mcv = try self.allocRegOrMem(inst, false);
175703 try self.genCopy(arg_ty, dst_mcv, src_mcv, .{});
175854 cg.register_manager.getRegAssumeFree(reg_off.reg, null);
175855 const dst_mcv = try cg.allocRegOrMem(inst, false);
175856 try cg.genCopy(arg_ty, dst_mcv, src_mcv, .{});
175704175857 break :result dst_mcv;
175705175858 },
175859 .indirect_mask => |reg_mask| {
175860 cg.register_manager.getRegAssumeFree(reg_mask.reg, null);
175861 const dst_reg = try cg.register_manager.allocReg(inst, abi.RegisterClass.sse);
175862 const mask_size: u32 = @intCast(
175863 @divExact(reg_mask.info.scalar.bitSize(cg.target), 8) * arg_ty.vectorLen(zcu),
175864 );
175865 try cg.asmRegisterMemory(
175866 .{ if (cg.hasFeature(.avx)) .v_dqa else ._dqa, .mov },
175867 registerAlias(dst_reg, mask_size),
175868 .{
175869 .base = .{ .reg = reg_mask.reg },
175870 .mod = .{ .rm = .{ .size = .fromSize(mask_size) } },
175871 },
175872 );
175873 break :result .{ .register_mask = .{ .reg = dst_reg, .info = reg_mask.info } };
175874 },
175706175875 .indirect_load_frame => |frame_addr| {
175707 const dst_mcv = try self.allocRegOrMem(inst, false);
175708 const ptr_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
175709 const ptr_lock = self.register_manager.lockRegAssumeUnused(ptr_reg);
175710 defer self.register_manager.unlockReg(ptr_lock);
175711 try self.genSetReg(ptr_reg, .usize, .{ .load_frame = frame_addr }, .{});
175712 try self.genCopy(arg_ty, dst_mcv, .{ .indirect = .{ .reg = ptr_reg } }, .{});
175876 const dst_mcv = try cg.allocRegOrMem(inst, false);
175877 const ptr_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gp);
175878 const ptr_lock = cg.register_manager.lockRegAssumeUnused(ptr_reg);
175879 defer cg.register_manager.unlockReg(ptr_lock);
175880 try cg.genSetReg(ptr_reg, .usize, .{ .load_frame = frame_addr }, .{});
175881 try cg.genCopy(arg_ty, dst_mcv, .{ .indirect = .{ .reg = ptr_reg } }, .{});
175713175882 break :result dst_mcv;
175714175883 },
175715 .elementwise_args => |regs_frame_addr| {
175716 try self.spillEflagsIfOccupied();
175884 .elementwise_gpr, .elementwise_sse => |regs_frame_addr| {
175885 const fn_info = zcu.typeToFunc(cg.fn_type).?;
175886 const elem_ty = arg_ty.childType(zcu);
175887 const elem_rc: Register.Class, const param_regs = switch (src_mcv) {
175888 else => unreachable,
175889 .elementwise_gpr => .{ .general_purpose, abi.getCAbiIntParamRegs(fn_info.cc) },
175890 .elementwise_sse => .{ .sse, abi.getCAbiSseParamRegs(fn_info.cc, cg.target) },
175891 };
175892 const len = arg_ty.vectorLen(zcu);
175893 const param_reg_len: u31 =
175894 @intCast(@min(param_regs.len - regs_frame_addr.info.reg_index, len));
175717175895
175718 const fn_info = zcu.typeToFunc(self.fn_type).?;
175719 const param_int_regs = abi.getCAbiIntParamRegs(fn_info.cc);
175720 var prev_reg: Register = undefined;
175721 for (
175722 param_int_regs[param_int_regs.len - regs_frame_addr.regs ..],
175723 0..,
175724 ) |dst_reg, elem_index| {
175725 assert(self.register_manager.isRegFree(dst_reg));
175726 if (elem_index > 0) {
175727 try self.asmRegisterImmediate(.{ ._l, .sh }, dst_reg.to8(), .u(elem_index));
175728 try self.asmRegisterRegister(
175729 .{ ._, .@"or" },
175730 dst_reg.to8(),
175731 prev_reg.to8(),
175896 const elem_size = cg.memSize(elem_ty, .general_purpose);
175897 const elem_abi_size = @divExact(elem_size.bitSize(cg.target), 8);
175898 const strat = if (elem_ty.toIntern() == .bool_type) strat: {
175899 try cg.spillEflagsIfOccupied();
175900 break :strat undefined;
175901 } else try cg.moveStrategy(elem_ty, elem_rc, true);
175902
175903 const dst_mcv = try cg.allocRegOrMem(inst, false);
175904 {
175905 var prev_reg: Register = undefined;
175906 for (
175907 param_regs[regs_frame_addr.info.reg_index..][0..param_reg_len],
175908 0..,
175909 ) |src_reg, elem_index| {
175910 assert(cg.register_manager.isRegFree(src_reg));
175911 if (elem_ty.toIntern() == .bool_type) {
175912 if (elem_index > 0) {
175913 try cg.asmRegisterImmediate(
175914 .{ ._l, .sh },
175915 src_reg.to8(),
175916 .u(elem_index),
175917 );
175918 try cg.asmRegisterRegister(
175919 .{ ._, .@"or" },
175920 src_reg.to8(),
175921 prev_reg.to8(),
175922 );
175923 }
175924 prev_reg = src_reg;
175925 } else try strat.write(cg, try dst_mcv.mem(cg, .{
175926 .size = elem_size,
175927 .disp = @intCast(elem_abi_size * elem_index),
175928 }), src_reg.toSize(elem_size, cg.target));
175929 }
175930 if (elem_ty.toIntern() == .bool_type) {
175931 if (param_reg_len > 0) {
175932 const prev_lock = cg.register_manager.lockRegAssumeUnused(prev_reg);
175933 defer cg.register_manager.unlockReg(prev_lock);
175934 try cg.asmMemoryRegister(
175935 .{ ._, .mov },
175936 try dst_mcv.mem(cg, .{ .size = .byte }),
175937 prev_reg.to8(),
175938 );
175939 }
175940 const clear_len = arg_ty.abiSize(zcu) - @intFromBool(param_reg_len > 0);
175941 if (clear_len > 0) try cg.genInlineMemset(
175942 dst_mcv.address().offset(@intFromBool(param_reg_len > 0)),
175943 .{ .immediate = 0 },
175944 .{ .immediate = clear_len },
175945 .{},
175732175946 );
175733175947 }
175734 prev_reg = dst_reg;
175735175948 }
175949 if (len - param_reg_len > 0) {
175950 const index_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gp);
175951 const index_lock = cg.register_manager.lockRegAssumeUnused(index_reg);
175952 defer cg.register_manager.unlockReg(index_lock);
175953 try cg.asmRegisterImmediate(.{ ._, .mov }, index_reg.to32(), .u(param_reg_len));
175954
175955 const loop: Mir.Inst.Index = @intCast(cg.mir_instructions.len);
175956 if (elem_ty.toIntern() == .bool_type) {
175957 try cg.asmMemoryImmediate(.{ ._, .cmp }, .{
175958 .base = .{ .frame = regs_frame_addr.frame_index },
175959 .mod = .{ .rm = .{
175960 .size = .byte,
175961 .index = index_reg.to64(),
175962 .scale = .@"8",
175963 .disp = @as(i32, regs_frame_addr.info.frame_off) - 8 * param_reg_len,
175964 } },
175965 }, Immediate.u(0));
175966 const unset = try cg.asmJccReloc(.e, undefined);
175967 try cg.asmMemoryRegister(
175968 .{ ._s, .bt },
175969 try dst_mcv.mem(cg, .{ .size = .dword }),
175970 index_reg.to32(),
175971 );
175972 cg.performReloc(unset);
175973 } else {
175974 const elem_reg =
175975 try cg.register_manager.allocReg(null, regSetForRegClass(elem_rc));
175976 const elem_lock = cg.register_manager.lockRegAssumeUnused(elem_reg);
175977 defer cg.register_manager.unlockReg(elem_lock);
175736175978
175737 const prev_lock = if (regs_frame_addr.regs > 0)
175738 self.register_manager.lockRegAssumeUnused(prev_reg)
175739 else
175740 null;
175741 defer if (prev_lock) |lock| self.register_manager.unlockReg(lock);
175979 try strat.read(cg, elem_reg.toSize(elem_size, cg.target), .{
175980 .base = .{ .frame = regs_frame_addr.frame_index },
175981 .mod = .{ .rm = .{
175982 .size = elem_size,
175983 .index = index_reg.to64(),
175984 .scale = .@"8",
175985 .disp = @as(i32, regs_frame_addr.info.frame_off) - 8 * param_reg_len,
175986 } },
175987 });
175988 try strat.write(cg, try dst_mcv.mem(cg, .{
175989 .size = elem_size,
175990 .index = index_reg.to64(),
175991 .scale = .fromFactor(@intCast(elem_abi_size)),
175992 }), elem_reg.toSize(elem_size, cg.target));
175993 }
175994 if (cg.hasFeature(.slow_incdec)) {
175995 try cg.asmRegisterImmediate(.{ ._, .add }, index_reg.to32(), .u(1));
175996 } else {
175997 try cg.asmRegister(.{ ._c, .in }, index_reg.to32());
175998 }
175999 try cg.asmRegisterImmediate(.{ ._, .cmp }, index_reg.to32(), .u(len));
176000 _ = try cg.asmJccReloc(.b, loop);
176001 }
175742176002
175743 const dst_mcv = try self.allocRegOrMem(inst, false);
175744 if (regs_frame_addr.regs > 0) try self.asmMemoryRegister(
175745 .{ ._, .mov },
175746 try dst_mcv.mem(self, .{ .size = .byte }),
175747 prev_reg.to8(),
175748 );
175749 try self.genInlineMemset(
175750 dst_mcv.address().offset(@intFromBool(regs_frame_addr.regs > 0)),
175751 .{ .immediate = 0 },
175752 .{ .immediate = arg_ty.abiSize(zcu) - @intFromBool(regs_frame_addr.regs > 0) },
175753 .{},
175754 );
176003 break :result dst_mcv;
176004 },
176005 .xwordwise_sse, .ywordwise_sse, .zwordwise_sse => |regs_frame_addr| {
176006 const fn_info = zcu.typeToFunc(cg.fn_type).?;
176007 const elem_size: Memory.Size, const elem_ty: Type = switch (src_mcv) {
176008 else => unreachable,
176009 .xwordwise_sse => .{ .xword, .vector_16_u8 },
176010 .ywordwise_sse => .{ .yword, .vector_32_u8 },
176011 .zwordwise_sse => .{ .zword, .vector_64_u8 },
176012 };
176013 const elem_abi_size: u31 = @intCast(@divExact(elem_size.bitSize(cg.target), 8));
176014 const strat = try cg.moveStrategy(elem_ty, .sse, true);
175755176015
175756 const index_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
175757 const index_lock = self.register_manager.lockRegAssumeUnused(index_reg);
175758 defer self.register_manager.unlockReg(index_lock);
176016 const param_gpr_regs = abi.getCAbiIntParamRegs(fn_info.cc);
176017 const len = @divExact(arg_ty.abiSize(zcu), elem_abi_size);
176018 const param_gpr_len: u31 =
176019 @intCast(@min(param_gpr_regs.len - regs_frame_addr.info.reg_index, len));
175759176020
175760 try self.asmRegisterImmediate(
175761 .{ ._, .mov },
175762 index_reg.to32(),
175763 .u(regs_frame_addr.regs),
175764 );
175765 const loop: Mir.Inst.Index = @intCast(self.mir_instructions.len);
175766 try self.asmMemoryImmediate(.{ ._, .cmp }, .{
175767 .base = .{ .frame = regs_frame_addr.frame_index },
175768 .mod = .{ .rm = .{
175769 .size = .byte,
175770 .index = index_reg.to64(),
175771 .scale = .@"8",
175772 .disp = regs_frame_addr.frame_off - @as(u6, regs_frame_addr.regs) * 8,
175773 } },
175774 }, Immediate.u(0));
175775 const unset = try self.asmJccReloc(.e, undefined);
175776 try self.asmMemoryRegister(
175777 .{ ._s, .bt },
175778 try dst_mcv.mem(self, .{ .size = .dword }),
175779 index_reg.to32(),
175780 );
175781 self.performReloc(unset);
175782 if (self.hasFeature(.slow_incdec)) {
175783 try self.asmRegisterImmediate(.{ ._, .add }, index_reg.to32(), .u(1));
175784 } else {
175785 try self.asmRegister(.{ ._c, .in }, index_reg.to32());
176021 const part_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.sse);
176022 const part_lock = cg.register_manager.lockRegAssumeUnused(part_reg);
176023 defer cg.register_manager.unlockReg(part_lock);
176024 const part_alias = part_reg.toSize(elem_size, cg.target);
176025
176026 const dst_mcv = try cg.allocRegOrMem(inst, false);
176027
176028 var arg_offset: u31 = 0;
176029 for (param_gpr_regs[regs_frame_addr.info.reg_index..][0..param_gpr_len]) |src_reg| {
176030 try strat.read(cg, part_alias, .{
176031 .base = .{ .reg = src_reg },
176032 .mod = .{ .rm = .{ .size = elem_size } },
176033 });
176034 try strat.write(cg, try dst_mcv.mem(cg, .{
176035 .size = elem_size,
176036 .disp = arg_offset,
176037 }), part_alias);
176038 arg_offset += elem_abi_size;
176039 }
176040
176041 if (len - param_gpr_len > 0) {
176042 const index_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gp);
176043 const index_lock = cg.register_manager.lockRegAssumeUnused(index_reg);
176044 defer cg.register_manager.unlockReg(index_lock);
176045 try cg.asmRegisterImmediate(.{ ._, .mov }, index_reg.to32(), .u(8 * param_gpr_len));
176046
176047 const loop: Mir.Inst.Index = @intCast(cg.mir_instructions.len);
176048 {
176049 const ptr_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gp);
176050 const ptr_lock = cg.register_manager.lockRegAssumeUnused(ptr_reg);
176051 defer cg.register_manager.unlockReg(ptr_lock);
176052
176053 try cg.asmRegisterMemory(.{ ._, .mov }, ptr_reg.to64(), .{
176054 .base = .{ .frame = regs_frame_addr.frame_index },
176055 .mod = .{ .rm = .{
176056 .size = .ptr,
176057 .index = index_reg.to64(),
176058 .disp = @as(i32, regs_frame_addr.info.frame_off) - 8 * param_gpr_len,
176059 } },
176060 });
176061 try strat.read(cg, part_alias, .{
176062 .base = .{ .reg = ptr_reg },
176063 .mod = .{ .rm = .{ .size = elem_size } },
176064 });
176065 try strat.write(cg, try dst_mcv.mem(cg, .{
176066 .size = elem_size,
176067 .index = index_reg.to64(),
176068 .scale = .fromFactor(@intCast(@divExact(elem_abi_size, 8))),
176069 }), part_alias);
176070 }
176071 try cg.asmRegisterImmediate(.{ ._, .add }, index_reg.to32(), .u(8));
176072 try cg.asmRegisterImmediate(.{ ._, .cmp }, index_reg.to32(), .u(8 * len));
176073 _ = try cg.asmJccReloc(.b, loop);
175786176074 }
175787 try self.asmRegisterImmediate(
175788 .{ ._, .cmp },
175789 index_reg.to32(),
175790 .u(arg_ty.vectorLen(zcu)),
175791 );
175792 _ = try self.asmJccReloc(.b, loop);
175793176075
175794176076 break :result dst_mcv;
175795176077 },
175796 else => return self.fail("TODO implement arg for {f}", .{src_mcv}),
176078 else => return cg.fail("TODO implement arg for {f}", .{src_mcv}),
175797176079 }
175798176080 };
175799 return self.finishAir(inst, result, .{ .none, .none, .none });
176081 return cg.finishAir(inst, result, .{ .none, .none, .none });
175800176082}
175801176083
175802176084fn genLocalDebugInfo(cg: *CodeGen, air_tag: Air.Inst.Tag, ty: Type, mcv: MCValue) !void {
......@@ -175804,7 +176086,18 @@ fn genLocalDebugInfo(cg: *CodeGen, air_tag: Air.Inst.Tag, ty: Type, mcv: MCValue
175804176086 _ = switch (air_tag) {
175805176087 else => unreachable,
175806176088 .arg, .dbg_var_val, .dbg_arg_inline => switch (mcv) {
175807 .none, .unreach, .dead, .elementwise_args, .reserved_frame, .air_ref => unreachable,
176089 .none,
176090 .unreach,
176091 .dead,
176092 .register_tee,
176093 .elementwise_gpr,
176094 .elementwise_sse,
176095 .xwordwise_sse,
176096 .ywordwise_sse,
176097 .zwordwise_sse,
176098 .reserved_frame,
176099 .air_ref,
176100 => unreachable,
175808176101 .immediate => |imm| if (std.math.cast(u32, imm)) |small| try cg.addInst(.{
175809176102 .tag = .pseudo,
175810176103 .ops = switch (air_tag) {
......@@ -175852,7 +176145,18 @@ fn genLocalDebugInfo(cg: *CodeGen, air_tag: Air.Inst.Tag, ty: Type, mcv: MCValue
175852176145 },
175853176146 .dbg_var_ptr => switch (mcv) {
175854176147 else => unreachable,
175855 .none, .unreach, .dead, .elementwise_args, .reserved_frame, .air_ref => unreachable,
176148 .none,
176149 .unreach,
176150 .dead,
176151 .register_tee,
176152 .elementwise_gpr,
176153 .elementwise_sse,
176154 .xwordwise_sse,
176155 .ywordwise_sse,
176156 .zwordwise_sse,
176157 .reserved_frame,
176158 .air_ref,
176159 => unreachable,
175856176160 .lea_frame => |frame_addr| try cg.addInst(.{
175857176161 .tag = .pseudo,
175858176162 .ops = .pseudo_dbg_var_m,
......@@ -175910,10 +176214,10 @@ fn genLocalDebugInfo(cg: *CodeGen, air_tag: Air.Inst.Tag, ty: Type, mcv: MCValue
175910176214 };
175911176215}
175912176216
175913fn airCall(self: *CodeGen, inst: Air.Inst.Index, modifier: std.lang.CallModifier, opts: CopyOptions) !void {
175914 if (modifier == .always_tail) return self.fail("TODO implement tail calls for x86_64", .{});
176217fn airCall(cg: *CodeGen, inst: Air.Inst.Index, modifier: std.lang.CallModifier, opts: CopyOptions) !void {
176218 if (modifier == .always_tail) return cg.fail("TODO implement tail calls for x86_64", .{});
175915176219
175916 const call = self.air.unwrapCall(inst);
176220 const call = cg.air.unwrapCall(inst);
175917176221 const arg_refs = call.args;
175918176222
175919176223 const ExpectedContents = extern struct {
......@@ -175921,28 +176225,28 @@ fn airCall(self: *CodeGen, inst: Air.Inst.Index, modifier: std.lang.CallModifier
175921176225 vals: [32][@sizeOf(MCValue)]u8 align(@alignOf(MCValue)),
175922176226 };
175923176227 var bfa_buf: [1]ExpectedContents = undefined;
175924 var bfa: std.heap.BufferFirstAllocator = .init(@ptrCast(&bfa_buf), self.gpa);
176228 var bfa: std.heap.BufferFirstAllocator = .init(@ptrCast(&bfa_buf), cg.gpa);
175925176229 const allocator = bfa.allocator();
175926176230
175927176231 const arg_tys = try allocator.alloc(Type, arg_refs.len);
175928176232 defer allocator.free(arg_tys);
175929 for (arg_tys, arg_refs) |*arg_ty, arg_ref| arg_ty.* = self.typeOf(arg_ref);
176233 for (arg_tys, arg_refs) |*arg_ty, arg_ref| arg_ty.* = cg.typeOf(arg_ref);
175930176234
175931176235 const arg_vals = try allocator.alloc(MCValue, arg_refs.len);
175932176236 defer allocator.free(arg_vals);
175933176237 for (arg_vals, arg_refs) |*arg_val, arg_ref| arg_val.* = .{ .air_ref = arg_ref };
175934176238
175935 const ret = try self.genCall(.{ .air = call.callee }, arg_tys, arg_vals, opts);
176239 const ret = try cg.genCall(.{ .air = call.callee }, arg_tys, arg_vals, opts);
175936176240
175937 var bt = self.liveness.iterateBigTomb(inst);
175938 try self.feed(&bt, call.callee);
175939 for (arg_refs) |arg_ref| try self.feed(&bt, arg_ref);
176241 var bt = cg.liveness.iterateBigTomb(inst);
176242 try cg.feed(&bt, call.callee);
176243 for (arg_refs) |arg_ref| try cg.feed(&bt, arg_ref);
175940176244
175941 const result = if (self.liveness.isUnused(inst)) .unreach else ret;
175942 return self.finishAirResult(inst, result);
176245 const result = if (cg.liveness.isUnused(inst)) .unreach else ret;
176246 return cg.finishAirResult(inst, result);
175943176247}
175944176248
175945fn genCall(self: *CodeGen, info: union(enum) {
176249fn genCall(cg: *CodeGen, info: union(enum) {
175946176250 air: Air.Inst.Ref,
175947176251 extern_func: struct {
175948176252 return_type: InternPool.Index,
......@@ -175950,13 +176254,13 @@ fn genCall(self: *CodeGen, info: union(enum) {
175950176254 sym: []const u8,
175951176255 },
175952176256}, arg_types: []const Type, args: []const MCValue, opts: CopyOptions) !MCValue {
175953 const pt = self.pt;
176257 const pt = cg.pt;
175954176258 const zcu = pt.zcu;
175955176259 const ip = &zcu.intern_pool;
175956176260
175957176261 const fn_ty = switch (info) {
175958176262 .air => |callee| fn_info: {
175959 const callee_ty = self.typeOf(callee);
176263 const callee_ty = cg.typeOf(callee);
175960176264 break :fn_info switch (callee_ty.zigTypeTag(zcu)) {
175961176265 .@"fn" => callee_ty,
175962176266 .pointer => callee_ty.childType(zcu),
......@@ -175966,7 +176270,7 @@ fn genCall(self: *CodeGen, info: union(enum) {
175966176270 .extern_func => |extern_func| try pt.funcType(.{
175967176271 .param_types = extern_func.param_types,
175968176272 .return_type = extern_func.return_type,
175969 .cc = self.target.cCallingConvention().?,
176273 .cc = cg.target.cCallingConvention().?,
175970176274 }),
175971176275 };
175972176276 const fn_info = zcu.typeToFunc(fn_ty).?;
......@@ -175977,23 +176281,23 @@ fn genCall(self: *CodeGen, info: union(enum) {
175977176281 reg_locks: [32][@sizeOf(?RegisterLock)]u8 align(@alignOf(?RegisterLock)),
175978176282 };
175979176283 var bfa_buf: ExpectedContents = undefined;
175980 var bfa: std.heap.BufferFirstAllocator = .init(@ptrCast(&bfa_buf), self.gpa);
176284 var bfa: std.heap.BufferFirstAllocator = .init(@ptrCast(&bfa_buf), cg.gpa);
175981176285 const allocator = bfa.allocator();
175982176286
175983176287 const var_args = try allocator.alloc(Type, args.len - fn_info.param_types.len);
175984176288 defer allocator.free(var_args);
175985 for (var_args, arg_types[fn_info.param_types.len..]) |*var_arg, arg_ty| var_arg.* = arg_ty;
176289 @memcpy(var_args, arg_types[fn_info.param_types.len..]);
175986176290
175987176291 const frame_indices = try allocator.alloc(FrameIndex, args.len);
175988176292 defer allocator.free(frame_indices);
175989176293
175990 var reg_locks: std.array_list.Managed(?RegisterLock) = .init(allocator);
175991 defer reg_locks.deinit();
175992 try reg_locks.ensureTotalCapacity(16);
175993 defer for (reg_locks.items) |reg_lock| if (reg_lock) |lock| self.register_manager.unlockReg(lock);
176294 var reg_locks: std.ArrayList(?RegisterLock) = .empty;
176295 defer reg_locks.deinit(allocator);
176296 try reg_locks.ensureTotalCapacity(allocator, 16);
176297 defer for (reg_locks.items) |reg_lock| if (reg_lock) |lock| cg.register_manager.unlockReg(lock);
175994176298
175995 var call_info = try self.resolveCallingConventionValues(fn_info, var_args, .call_frame);
175996 defer call_info.deinit(self);
176299 var call_info = try cg.resolveCallingConventionValues(fn_info, var_args, .call_frame);
176300 defer call_info.deinit(cg);
175997176301
175998176302 // We need a properly aligned and sized call frame to be able to call this function.
175999176303 {
......@@ -176001,7 +176305,7 @@ fn genCall(self: *CodeGen, info: union(enum) {
176001176305 .size = call_info.stack_byte_count,
176002176306 .alignment = call_info.stack_align,
176003176307 });
176004 const frame_allocs_slice = self.frame_allocs.slice();
176308 const frame_allocs_slice = cg.frame_allocs.slice();
176005176309 const stack_frame_size =
176006176310 &frame_allocs_slice.items(.abi_size)[@intFromEnum(FrameIndex.call_frame)];
176007176311 stack_frame_size.* = @max(stack_frame_size.*, needed_call_frame.abi_size);
......@@ -176010,112 +176314,228 @@ fn genCall(self: *CodeGen, info: union(enum) {
176010176314 stack_frame_align.* = stack_frame_align.max(needed_call_frame.abi_align);
176011176315 }
176012176316
176013 try self.spillEflagsIfOccupied();
176014 try self.spillCallerPreservedRegs(fn_info.cc, call_info.err_ret_trace_reg);
176317 try cg.spillEflagsIfOccupied();
176318 try cg.spillCallerPreservedRegs(fn_info.cc, call_info.err_ret_trace_reg);
176015176319
176016176320 // set stack arguments first because this can clobber registers
176017176321 // also clobber spill arguments as we go
176018176322 switch (call_info.return_value.long) {
176019176323 .none, .unreach => {},
176020 .indirect => |reg_off| try self.register_manager.getReg(reg_off.reg, null),
176324 .indirect => |reg_off| try cg.register_manager.getReg(reg_off.reg, null),
176021176325 else => unreachable,
176022176326 }
176023 for (call_info.args, arg_types, args, frame_indices, 0..) |dst_arg, arg_ty, src_arg, *frame_index, arg_i|
176024 switch (dst_arg) {
176025 .none => {},
176026 .register => |reg| {
176027 try self.register_manager.getReg(reg, null);
176028 try reg_locks.append(self.register_manager.lockReg(reg));
176029
176030 if (fn_info.is_var_args and
176031 fn_info.cc == .x86_64_win and
176032 reg.class() == .sse and
176033 arg_i < abi.Win64.c_abi_int_param_regs.len)
176034 {
176035 // Floating point arguments must be duplicated into the equivalent integer registers on this ABI
176036 const int_reg = abi.Win64.c_abi_int_param_regs[arg_i];
176037 try reg_locks.append(self.register_manager.lockReg(int_reg));
176038 }
176039 },
176040 .register_pair => |regs| {
176041 for (regs) |reg| try self.register_manager.getReg(reg, null);
176042 try reg_locks.appendSlice(&self.register_manager.lockRegs(2, regs));
176043 },
176044 .indirect => |reg_off| {
176045 frame_index.* = try self.allocFrameIndex(.initType(arg_ty, zcu));
176046 try self.genSetMem(.{ .frame = frame_index.* }, 0, arg_ty, src_arg, opts);
176047 try self.register_manager.getReg(reg_off.reg, null);
176048 try reg_locks.append(self.register_manager.lockReg(reg_off.reg));
176049 },
176050 .load_frame => {
176051 try self.genCopy(arg_ty, dst_arg, src_arg, opts);
176052 try self.freeValue(src_arg, .{});
176053 },
176054 .elementwise_args => |regs_frame_addr| {
176055 const index_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gp);
176056 const index_lock = self.register_manager.lockRegAssumeUnused(index_reg);
176057 defer self.register_manager.unlockReg(index_lock);
176327 for (call_info.args, arg_types, args, frame_indices) |dst_arg, arg_ty, src_arg, *frame_index| switch (dst_arg) {
176328 .none => {},
176329 .register => |reg| {
176330 try cg.register_manager.getReg(reg, null);
176331 try reg_locks.append(allocator, cg.register_manager.lockReg(reg));
176332 },
176333 inline .register_pair, .register_triple, .register_quadruple => |regs| {
176334 for (regs) |reg| try cg.register_manager.getReg(reg, null);
176335 try reg_locks.appendSlice(allocator, &cg.register_manager.lockRegs(regs.len, regs));
176336 },
176337 .register_mask => |reg_mask| {
176338 try cg.register_manager.getReg(reg_mask.reg, null);
176339 try reg_locks.append(allocator, cg.register_manager.lockReg(reg_mask.reg));
176340 },
176341 .indirect => |reg_off| {
176342 frame_index.* = try cg.allocFrameIndex(.initType(arg_ty, zcu));
176343 try cg.genSetMem(.{ .frame = frame_index.* }, 0, arg_ty, src_arg, opts);
176344 try cg.register_manager.getReg(reg_off.reg, null);
176345 try reg_locks.append(allocator, cg.register_manager.lockReg(reg_off.reg));
176346 },
176347 .indirect_load_frame => |frame_addr| {
176348 frame_index.* = try cg.allocFrameIndex(.initType(arg_ty, zcu));
176349 try cg.genSetMem(.{ .frame = frame_index.* }, 0, arg_ty, src_arg, opts);
176350 try cg.genSetMem(
176351 .{ .frame = frame_addr.index },
176352 frame_addr.off,
176353 .usize,
176354 .{ .lea_frame = .{ .index = frame_index.* } },
176355 opts,
176356 );
176357 },
176358 .indirect_mask => |reg_mask| {
176359 var src = switch (src_arg) {
176360 else => try cg.tempInit(arg_ty, src_arg),
176361 .air_ref => |src_ref| try cg.tempFromOperand(src_ref, false),
176362 };
176363 var dst = try cg.tempInit(arg_ty, .{ .register_mask = .{
176364 .reg = try cg.register_manager.allocReg(null, abi.RegisterClass.sse),
176365 .info = reg_mask.info,
176366 } });
176367 dst.copyToMask(&src, cg) catch |err| switch (err) {
176368 error.SelectFailed => return cg.fail("failed to select arg {f} {f} {f}", .{
176369 arg_ty.fmt(pt),
176370 dst.tracking(cg),
176371 src.tracking(cg),
176372 }),
176373 else => |e| return e,
176374 };
176375 try src.die(cg);
176376 const mask_size: u32 = @intCast(
176377 @divExact(reg_mask.info.scalar.bitSize(cg.target), 8) * arg_ty.vectorLen(zcu),
176378 );
176379 frame_index.* = try cg.allocFrameIndex(.init(.{
176380 .size = mask_size,
176381 .alignment = .fromByteUnits(std.math.ceilPowerOfTwoAssert(u32, mask_size)),
176382 }));
176383 try cg.asmMemoryRegister(
176384 .{ if (cg.hasFeature(.avx)) .v_dqa else ._dqa, .mov },
176385 .{
176386 .base = .{ .frame = frame_index.* },
176387 .mod = .{ .rm = .{ .size = .fromSize(mask_size) } },
176388 },
176389 registerAlias(dst.tracking(cg).short.register_mask.reg, mask_size),
176390 );
176391 try dst.die(cg);
176058176392
176059 const src_mem: Memory = if (src_arg.isBase()) try src_arg.mem(self, .{ .size = .dword }) else .{
176060 .base = .{ .reg = try self.copyToTmpRegister(.usize, switch (src_arg) {
176061 else => src_arg,
176062 .air_ref => |src_ref| try self.resolveInst(src_ref),
176063 }.address()) },
176064 .mod = .{ .rm = .{ .size = .dword } },
176065 };
176066 const src_lock = switch (src_mem.base) {
176067 .reg => |src_reg| self.register_manager.lockReg(src_reg),
176068 else => null,
176069 };
176070 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
176393 try cg.register_manager.getReg(reg_mask.reg, null);
176394 try reg_locks.append(allocator, cg.register_manager.lockReg(reg_mask.reg));
176395 },
176396 .load_frame => {
176397 try cg.genCopy(arg_ty, dst_arg, src_arg, opts);
176398 try cg.freeValue(src_arg, .{});
176399 },
176400 .register_tee => |regs| {
176401 try reg_locks.ensureUnusedCapacity(allocator, regs.len);
176402 for (regs) |reg| if (reg != .none) {
176403 try cg.register_manager.getReg(reg, null);
176404 reg_locks.appendAssumeCapacity(cg.register_manager.lockReg(reg));
176405 };
176406 },
176407 .elementwise_gpr, .elementwise_sse => |regs_frame_addr| {
176408 const src_mem: Memory = if (src_arg.isBase()) try src_arg.mem(cg, .{ .size = .dword }) else .{
176409 .base = .{ .reg = try cg.copyToTmpRegister(.usize, switch (src_arg) {
176410 else => src_arg,
176411 .air_ref => |src_ref| try cg.resolveInst(src_ref),
176412 }.address()) },
176413 .mod = .{ .rm = .{ .size = .dword } },
176414 };
176415 const src_lock = switch (src_mem.base) {
176416 .reg => |src_reg| cg.register_manager.lockReg(src_reg),
176417 else => null,
176418 };
176419 defer if (src_lock) |lock| cg.register_manager.unlockReg(lock);
176071176420
176072 try self.asmRegisterImmediate(
176073 .{ ._, .mov },
176074 index_reg.to32(),
176075 .u(regs_frame_addr.regs),
176076 );
176077 const loop: Mir.Inst.Index = @intCast(self.mir_instructions.len);
176078 try self.asmMemoryRegister(.{ ._, .bt }, src_mem, index_reg.to32());
176079 try self.asmSetccMemory(.c, .{
176080 .base = .{ .frame = regs_frame_addr.frame_index },
176081 .mod = .{ .rm = .{
176082 .size = .byte,
176083 .index = index_reg.to64(),
176084 .scale = .@"8",
176085 .disp = regs_frame_addr.frame_off - @as(u6, regs_frame_addr.regs) * 8,
176086 } },
176087 });
176088 if (self.hasFeature(.slow_incdec)) {
176089 try self.asmRegisterImmediate(.{ ._, .add }, index_reg.to32(), .u(1));
176421 const elem_rc: Register.Class, const param_regs = switch (dst_arg) {
176422 else => unreachable,
176423 .elementwise_gpr => .{ .general_purpose, abi.getCAbiIntParamRegs(fn_info.cc) },
176424 .elementwise_sse => .{ .sse, abi.getCAbiSseParamRegs(fn_info.cc, cg.target) },
176425 };
176426 const len = arg_ty.vectorLen(zcu);
176427 const param_reg_len: u31 =
176428 @intCast(@min(param_regs.len - regs_frame_addr.info.reg_index, len));
176429
176430 if (len - param_reg_len > 0) {
176431 const index_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gp);
176432 const index_lock = cg.register_manager.lockRegAssumeUnused(index_reg);
176433 defer cg.register_manager.unlockReg(index_lock);
176434 try cg.asmRegisterImmediate(.{ ._, .mov }, index_reg.to32(), .u(param_reg_len));
176435
176436 const loop: Mir.Inst.Index = @intCast(cg.mir_instructions.len);
176437 const elem_ty = arg_ty.childType(zcu);
176438 if (elem_ty.toIntern() == .bool_type) {
176439 try cg.asmMemoryRegister(.{ ._, .bt }, src_mem, index_reg.to32());
176440 try cg.asmSetccMemory(.c, .{
176441 .base = .{ .frame = regs_frame_addr.frame_index },
176442 .mod = .{ .rm = .{
176443 .size = .byte,
176444 .index = index_reg.to64(),
176445 .scale = .@"8",
176446 .disp = @as(i32, regs_frame_addr.info.frame_off) - 8 * param_reg_len,
176447 } },
176448 });
176090176449 } else {
176091 try self.asmRegister(.{ ._c, .in }, index_reg.to32());
176450 const elem_reg =
176451 try cg.register_manager.allocReg(null, regSetForRegClass(elem_rc));
176452 const elem_lock = cg.register_manager.lockRegAssumeUnused(elem_reg);
176453 defer cg.register_manager.unlockReg(elem_lock);
176454 const elem_size = cg.memSize(elem_ty, .general_purpose);
176455 const elem_alias = elem_reg.toSize(elem_size, cg.target);
176456
176457 const strat = try cg.moveStrategy(elem_ty, elem_rc, true);
176458 assert(src_mem.mod.rm.index == .none and src_mem.mod.rm.scale == .@"1");
176459 try strat.read(cg, elem_alias, .{
176460 .base = src_mem.base,
176461 .mod = .{ .rm = .{
176462 .size = elem_size,
176463 .index = index_reg.to64(),
176464 .scale = .fromFactor(@intCast(@divExact(elem_size.bitSize(cg.target), 8))),
176465 .disp = src_mem.mod.rm.disp,
176466 } },
176467 });
176468 try strat.write(cg, .{
176469 .base = .{ .frame = regs_frame_addr.frame_index },
176470 .mod = .{ .rm = .{
176471 .size = elem_size,
176472 .index = index_reg.to64(),
176473 .scale = .@"8",
176474 .disp = @as(i32, regs_frame_addr.info.frame_off) - 8 * param_reg_len,
176475 } },
176476 }, elem_alias);
176092176477 }
176093 try self.asmRegisterImmediate(
176094 .{ ._, .cmp },
176095 index_reg.to32(),
176096 .u(arg_ty.vectorLen(zcu)),
176097 );
176098 _ = try self.asmJccReloc(.b, loop);
176099
176100 const param_int_regs = abi.getCAbiIntParamRegs(fn_info.cc);
176101 for (param_int_regs[param_int_regs.len - regs_frame_addr.regs ..]) |dst_reg| {
176102 try self.register_manager.getReg(dst_reg, null);
176103 try reg_locks.append(self.register_manager.lockReg(dst_reg));
176478 if (cg.hasFeature(.slow_incdec)) {
176479 try cg.asmRegisterImmediate(.{ ._, .add }, index_reg.to32(), .u(1));
176480 } else {
176481 try cg.asmRegister(.{ ._c, .in }, index_reg.to32());
176104176482 }
176105 },
176106 else => unreachable,
176107 };
176483 try cg.asmRegisterImmediate(.{ ._, .cmp }, index_reg.to32(), .u(len));
176484 _ = try cg.asmJccReloc(.b, loop);
176485 }
176486
176487 for (param_regs[regs_frame_addr.info.reg_index..][0..param_reg_len]) |dst_reg| {
176488 try cg.register_manager.getReg(dst_reg, null);
176489 try reg_locks.append(allocator, cg.register_manager.lockReg(dst_reg));
176490 }
176491 },
176492 .xwordwise_sse, .ywordwise_sse, .zwordwise_sse => |regs_frame_addr| {
176493 const elem_size: u31 = switch (dst_arg) {
176494 else => unreachable,
176495 .xwordwise_sse => 16,
176496 .ywordwise_sse => 32,
176497 .zwordwise_sse => 64,
176498 };
176499 const param_gpr_regs = abi.getCAbiIntParamRegs(fn_info.cc);
176500 const arg_size: u31 = @intCast(arg_ty.abiSize(zcu));
176501 const len = @divExact(arg_size, elem_size);
176502 const param_gpr_len: u31 =
176503 @intCast(@min(param_gpr_regs.len - regs_frame_addr.info.reg_index, len));
176504
176505 frame_index.* = try cg.allocFrameIndex(.initType(arg_ty, zcu));
176506 try cg.genSetMem(.{ .frame = frame_index.* }, 0, arg_ty, src_arg, opts);
176507
176508 var frame_offset: i32 = regs_frame_addr.info.frame_off;
176509 var arg_offset = elem_size * param_gpr_len;
176510 while (arg_size - arg_offset > 0) : ({
176511 frame_offset += 8;
176512 arg_offset += elem_size;
176513 }) try cg.genSetMem(
176514 .{ .frame = regs_frame_addr.frame_index },
176515 frame_offset,
176516 .usize,
176517 .{ .lea_frame = .{ .index = frame_index.*, .off = arg_offset } },
176518 opts,
176519 );
176520
176521 for (param_gpr_regs[regs_frame_addr.info.reg_index..][0..param_gpr_len]) |dst_reg| {
176522 try cg.register_manager.getReg(dst_reg, null);
176523 try reg_locks.append(allocator, cg.register_manager.lockReg(dst_reg));
176524 }
176525 },
176526 else => unreachable,
176527 };
176108176528
176109176529 if (call_info.err_ret_trace_reg != .none) {
176110 if (self.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176530 if (cg.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176111176531 if (switch (err_ret_trace.short) {
176112176532 .register => |reg| call_info.err_ret_trace_reg != reg,
176113176533 else => true,
176114176534 }) {
176115 try self.register_manager.getReg(call_info.err_ret_trace_reg, err_ret_trace_index);
176116 try reg_locks.append(self.register_manager.lockReg(call_info.err_ret_trace_reg));
176535 try cg.register_manager.getReg(call_info.err_ret_trace_reg, err_ret_trace_index);
176536 try reg_locks.append(allocator, cg.register_manager.lockReg(call_info.err_ret_trace_reg));
176117176537
176118 try self.genSetReg(call_info.err_ret_trace_reg, .usize, err_ret_trace.short, .{});
176538 try cg.genSetReg(call_info.err_ret_trace_reg, .usize, err_ret_trace.short, opts);
176119176539 err_ret_trace.trackMaterialize(err_ret_trace_index, .{
176120176540 .long = err_ret_trace.long,
176121176541 .short = .{ .register = call_info.err_ret_trace_reg },
......@@ -176129,79 +176549,130 @@ fn genCall(self: *CodeGen, info: union(enum) {
176129176549 .none, .unreach => {},
176130176550 .indirect => |reg_off| {
176131176551 const ret_ty: Type = .fromInterned(fn_info.return_type);
176132 const frame_index = try self.allocFrameIndex(.initSpill(ret_ty, zcu));
176133 try self.genSetReg(reg_off.reg, .usize, .{
176552 const frame_index = try cg.allocFrameIndex(.initSpill(ret_ty, zcu));
176553 try cg.genSetReg(reg_off.reg, .usize, .{
176134176554 .lea_frame = .{ .index = frame_index, .off = -reg_off.off },
176135 }, .{});
176555 }, opts);
176136176556 call_info.return_value.short = .{ .load_frame = .{ .index = frame_index } };
176137 try reg_locks.append(self.register_manager.lockReg(reg_off.reg));
176557 try reg_locks.append(allocator, cg.register_manager.lockReg(reg_off.reg));
176138176558 },
176139176559 else => unreachable,
176140176560 }
176141176561
176142 for (call_info.args, arg_types, args, frame_indices, 0..) |dst_arg, arg_ty, src_arg, frame_index, arg_i|
176143 switch (dst_arg) {
176144 .none, .load_frame => {},
176145 .register => |dst_reg| switch (fn_info.cc) {
176146 else => try self.genSetReg(registerAlias(
176562 for (call_info.args, arg_types, args, frame_indices) |dst_arg, arg_ty, src_arg, frame_index| switch (dst_arg) {
176563 .none, .load_frame, .indirect_load_frame => {},
176564 .register => |dst_reg| try cg.genSetReg(registerAlias(
176565 dst_reg,
176566 @intCast(cg.unalignedSize(arg_ty)),
176567 ), arg_ty, src_arg, opts),
176568 .register_pair,
176569 .register_triple,
176570 .register_quadruple,
176571 => try cg.genCopy(arg_ty, dst_arg, src_arg, opts),
176572 .register_mask => {
176573 var src = switch (src_arg) {
176574 else => try cg.tempInit(arg_ty, src_arg),
176575 .air_ref => |src_ref| try cg.tempFromOperand(src_ref, false),
176576 };
176577 var dst = try cg.tempInit(arg_ty, dst_arg);
176578 dst.copyToMask(&src, cg) catch |err| switch (err) {
176579 error.SelectFailed => return cg.fail("failed to select arg {f} {f} {f}", .{
176580 arg_ty.fmt(pt),
176581 dst.tracking(cg),
176582 src.tracking(cg),
176583 }),
176584 else => |e| return e,
176585 };
176586 try src.die(cg);
176587 try dst.die(cg);
176588 },
176589 .indirect => |dst_reg_off| try cg.genSetReg(dst_reg_off.reg, .usize, .{
176590 .lea_frame = .{ .index = frame_index, .off = -dst_reg_off.off },
176591 }, opts),
176592 .indirect_mask => |dst_reg_mask| try cg.genSetReg(dst_reg_mask.reg, .usize, .{
176593 .lea_frame = .{ .index = frame_index },
176594 }, opts),
176595 .register_tee => |dst_regs| {
176596 try cg.genSetReg(dst_regs[0], arg_ty, src_arg, opts);
176597 for (dst_regs[1..]) |dst_reg| if (dst_reg != .none) try cg.genSetReg(dst_reg, arg_ty, .{
176598 .register = dst_regs[0],
176599 }, opts);
176600 },
176601 .elementwise_gpr, .elementwise_sse => |regs_frame_addr| {
176602 const src_mem: Memory = if (src_arg.isBase()) try src_arg.mem(cg, .{ .size = .dword }) else .{
176603 .base = .{ .reg = try cg.copyToTmpRegister(
176604 .usize,
176605 switch (src_arg) {
176606 else => src_arg,
176607 .air_ref => |src_ref| try cg.resolveInst(src_ref),
176608 }.address(),
176609 ) },
176610 .mod = .{ .rm = .{ .size = .dword } },
176611 };
176612 const src_lock = switch (src_mem.base) {
176613 .reg => |src_reg| cg.register_manager.lockReg(src_reg),
176614 else => null,
176615 };
176616 defer if (src_lock) |lock| cg.register_manager.unlockReg(lock);
176617
176618 const elem_rc: Register.Class, const param_regs = switch (dst_arg) {
176619 else => unreachable,
176620 .elementwise_gpr => .{ .general_purpose, abi.getCAbiIntParamRegs(fn_info.cc) },
176621 .elementwise_sse => .{ .sse, abi.getCAbiSseParamRegs(fn_info.cc, cg.target) },
176622 };
176623 const len = arg_ty.vectorLen(zcu);
176624 const elem_ty = arg_ty.childType(zcu);
176625 const elem_size = cg.memSize(elem_ty, .general_purpose);
176626 const elem_abi_size = @divExact(elem_size.bitSize(cg.target), 8);
176627 const param_reg_len: u31 =
176628 @intCast(@min(param_regs.len - regs_frame_addr.info.reg_index, len));
176629 const strat = if (elem_ty.toIntern() == .bool_type) strat: {
176630 try cg.spillEflagsIfOccupied();
176631 break :strat undefined;
176632 } else try cg.moveStrategy(elem_ty, elem_rc, true);
176633 for (
176634 param_regs[regs_frame_addr.info.reg_index..][0..param_reg_len],
176635 0..,
176636 ) |dst_reg, elem_index| if (elem_ty.toIntern() == .bool_type) {
176637 try cg.asmRegisterRegister(.{ ._, .xor }, dst_reg.to32(), dst_reg.to32());
176638 try cg.asmMemoryImmediate(.{ ._, .bt }, src_mem, .u(elem_index));
176639 try cg.asmSetccRegister(.c, dst_reg.to8());
176640 } else try strat.read(cg, dst_reg.toSize(elem_size, cg.target), .{
176641 .base = src_mem.base,
176642 .mod = .{ .rm = .{
176643 .size = elem_size,
176644 .disp = src_mem.mod.rm.disp + @as(u31, @intCast(elem_abi_size * elem_index)),
176645 } },
176646 });
176647 },
176648 .xwordwise_sse, .ywordwise_sse, .zwordwise_sse => |regs_frame_addr| {
176649 const elem_size: u31 = switch (dst_arg) {
176650 else => unreachable,
176651 .xwordwise_sse => 16,
176652 .ywordwise_sse => 32,
176653 .zwordwise_sse => 64,
176654 };
176655 const param_gpr_regs = abi.getCAbiIntParamRegs(fn_info.cc);
176656 const len = @divExact(arg_ty.abiSize(zcu), elem_size);
176657 const param_gpr_len: u31 =
176658 @intCast(@min(param_gpr_regs.len - regs_frame_addr.info.reg_index, len));
176659
176660 var arg_offset: u31 = 0;
176661 for (param_gpr_regs[regs_frame_addr.info.reg_index..][0..param_gpr_len]) |dst_reg| {
176662 try cg.genSetReg(
176147176663 dst_reg,
176148 @intCast(arg_ty.abiSize(zcu)),
176149 ), arg_ty, src_arg, opts),
176150 .x86_64_sysv, .x86_64_win => {
176151 const promoted_ty = self.promoteInt(arg_ty);
176152 const promoted_abi_size: u32 = @intCast(promoted_ty.abiSize(zcu));
176153 const dst_alias = registerAlias(dst_reg, promoted_abi_size);
176154 try self.genSetReg(dst_alias, promoted_ty, src_arg, opts);
176155 if (promoted_ty.toIntern() != arg_ty.toIntern())
176156 try self.truncateRegister(arg_ty, dst_alias);
176157
176158 if (fn_info.is_var_args and
176159 fn_info.cc == .x86_64_win and
176160 dst_reg.class() == .sse and
176161 arg_i < abi.Win64.c_abi_int_param_regs.len)
176162 {
176163 const int_dst_reg = abi.Win64.c_abi_int_param_regs[arg_i];
176164 const int_dst_alias = registerAlias(int_dst_reg, promoted_abi_size);
176165 try self.genSetReg(int_dst_alias, promoted_ty, .{ .register = dst_alias }, opts);
176166 }
176167 },
176168 },
176169 .register_pair => try self.genCopy(arg_ty, dst_arg, src_arg, opts),
176170 .indirect => |reg_off| try self.genSetReg(reg_off.reg, .usize, .{
176171 .lea_frame = .{ .index = frame_index, .off = -reg_off.off },
176172 }, .{}),
176173 .elementwise_args => |regs_frame_addr| {
176174 const src_mem: Memory = if (src_arg.isBase()) try src_arg.mem(self, .{ .size = .dword }) else .{
176175 .base = .{ .reg = try self.copyToTmpRegister(
176176 .usize,
176177 switch (src_arg) {
176178 else => src_arg,
176179 .air_ref => |src_ref| try self.resolveInst(src_ref),
176180 }.address(),
176181 ) },
176182 .mod = .{ .rm = .{ .size = .dword } },
176183 };
176184 const src_lock = switch (src_mem.base) {
176185 .reg => |src_reg| self.register_manager.lockReg(src_reg),
176186 else => null,
176187 };
176188 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
176189
176190 const param_int_regs = abi.getCAbiIntParamRegs(fn_info.cc);
176191 for (
176192 param_int_regs[param_int_regs.len - regs_frame_addr.regs ..],
176193 0..,
176194 ) |dst_reg, elem_index| {
176195 try self.asmRegisterRegister(.{ ._, .xor }, dst_reg.to32(), dst_reg.to32());
176196 try self.asmMemoryImmediate(.{ ._, .bt }, src_mem, .u(elem_index));
176197 try self.asmSetccRegister(.c, dst_reg.to8());
176198 }
176199 },
176200 else => unreachable,
176201 };
176664 .usize,
176665 .{ .lea_frame = .{ .index = frame_index, .off = arg_offset } },
176666 opts,
176667 );
176668 arg_offset += elem_size;
176669 }
176670 },
176671 else => unreachable,
176672 };
176202176673
176203176674 if (fn_info.is_var_args and fn_info.cc == .x86_64_sysv)
176204 try self.asmRegisterImmediate(.{ ._, .mov }, .al, .u(call_info.fp_count));
176675 try cg.asmRegisterImmediate(.{ ._, .mov }, .al, .u(call_info.fp_count));
176205176676
176206176677 // Due to incremental compilation, how function calls are generated depends
176207176678 // on linking.
......@@ -176216,45 +176687,57 @@ fn genCall(self: *CodeGen, info: union(enum) {
176216176687 } else func_key,
176217176688 }) {
176218176689 else => unreachable,
176219 .func => |func| try self.asmImmediate(.{ ._, .call }, .{ .nav = .{ .index = func.owner_nav } }),
176220 .@"extern" => |@"extern"| try self.asmImmediate(.{ ._, .call }, .{ .nav = .{ .index = @"extern".owner_nav } }),
176690 .func => |func| try cg.asmImmediate(.{ ._, .call }, .{ .nav = .{ .index = func.owner_nav } }),
176691 .@"extern" => |@"extern"| try cg.asmImmediate(.{ ._, .call }, .{ .nav = .{ .index = @"extern".owner_nav } }),
176221176692 }
176222176693 } else {
176223 assert(self.typeOf(callee).zigTypeTag(zcu) == .pointer);
176694 assert(cg.typeOf(callee).zigTypeTag(zcu) == .pointer);
176224176695 const scratch_reg = abi.getCAbiLinkerScratchReg(fn_info.cc);
176225 try self.genSetReg(scratch_reg, .usize, .{ .air_ref = callee }, .{});
176226 try self.asmRegister(.{ ._, .call }, scratch_reg);
176696 try cg.genSetReg(scratch_reg, .usize, .{ .air_ref = callee }, opts);
176697 try cg.asmRegister(.{ ._, .call }, scratch_reg);
176227176698 },
176228 .extern_func => |extern_func| try self.asmImmediate(.{ ._, .call }, .{ .extern_func = try self.addString(extern_func.sym) }),
176699 .extern_func => |extern_func| try cg.asmImmediate(.{ ._, .call }, .{ .extern_func = try cg.addString(extern_func.sym) }),
176229176700 }
176230176701 return call_info.return_value.short;
176231176702}
176232176703
176233fn airRet(self: *CodeGen, inst: Air.Inst.Index, safety: bool) !void {
176234 const pt = self.pt;
176235 const zcu = pt.zcu;
176236 const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op;
176704fn airRet(cg: *CodeGen, inst: Air.Inst.Index, safety: bool) !void {
176705 const un_op = cg.air.instructions.items(.data)[@intFromEnum(inst)].un_op;
176237176706
176238 const ret_ty = self.fn_type.fnReturnType(zcu);
176239 switch (self.ret_mcv.short) {
176707 const ret_ty = cg.fn_type.fnReturnType(cg.pt.zcu);
176708 switch (cg.ret_mcv.short) {
176240176709 .none => {},
176241176710 .register => |reg| {
176242 const reg_lock = self.register_manager.lockRegAssumeUnused(reg);
176243 defer self.register_manager.unlockReg(reg_lock);
176244 try self.genCopy(ret_ty, self.ret_mcv.short, .{ .air_ref = un_op }, .{ .safety = safety });
176711 const reg_lock = cg.register_manager.lockRegAssumeUnused(reg);
176712 defer cg.register_manager.unlockReg(reg_lock);
176713 try cg.genCopy(ret_ty, cg.ret_mcv.short, .{ .air_ref = un_op }, .{ .safety = safety });
176245176714 },
176246176715 inline .register_pair, .register_triple, .register_quadruple => |regs| {
176247 const reg_locks = self.register_manager.lockRegsAssumeUnused(regs.len, regs);
176248 defer for (reg_locks) |reg_lock| self.register_manager.unlockReg(reg_lock);
176249 try self.genCopy(ret_ty, self.ret_mcv.short, .{ .air_ref = un_op }, .{ .safety = safety });
176716 const reg_locks = cg.register_manager.lockRegsAssumeUnused(regs.len, regs);
176717 defer for (reg_locks) |reg_lock| cg.register_manager.unlockReg(reg_lock);
176718 try cg.genCopy(ret_ty, cg.ret_mcv.short, .{ .air_ref = un_op }, .{ .safety = safety });
176719 },
176720 .register_mask => {
176721 var src = try cg.tempFromOperand(un_op, true);
176722 var dst = try cg.tempInit(ret_ty, cg.ret_mcv.short);
176723 dst.copyToMask(&src, cg) catch |err| switch (err) {
176724 error.SelectFailed => return cg.fail("failed to select ret {f} {f} {f}", .{
176725 ret_ty.fmt(cg.pt),
176726 dst.tracking(cg),
176727 src.tracking(cg),
176728 }),
176729 else => |e| return e,
176730 };
176731 try src.die(cg);
176732 try dst.die(cg);
176250176733 },
176251176734 .indirect => |reg_off| {
176252 try self.register_manager.getReg(reg_off.reg, null);
176253 const lock = self.register_manager.lockRegAssumeUnused(reg_off.reg);
176254 defer self.register_manager.unlockReg(lock);
176735 try cg.register_manager.getReg(reg_off.reg, null);
176736 const lock = cg.register_manager.lockRegAssumeUnused(reg_off.reg);
176737 defer cg.register_manager.unlockReg(lock);
176255176738
176256 try self.genSetReg(reg_off.reg, .usize, self.ret_mcv.long, .{});
176257 try self.genSetMem(
176739 try cg.genSetReg(reg_off.reg, .usize, cg.ret_mcv.long, .{});
176740 try cg.genSetMem(
176258176741 .{ .reg = reg_off.reg },
176259176742 reg_off.off,
176260176743 ret_ty,
......@@ -176264,55 +176747,78 @@ fn airRet(self: *CodeGen, inst: Air.Inst.Index, safety: bool) !void {
176264176747 },
176265176748 else => unreachable,
176266176749 }
176267 self.ret_mcv.liveOut(self, inst);
176750 cg.ret_mcv.liveOut(cg, inst);
176268176751
176269 if (self.err_ret_trace_reg != .none) {
176270 if (self.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176752 if (cg.err_ret_trace_reg != .none) {
176753 if (cg.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176271176754 if (switch (err_ret_trace.short) {
176272 .register => |reg| self.err_ret_trace_reg != reg,
176755 .register => |reg| cg.err_ret_trace_reg != reg,
176273176756 else => true,
176274 }) try self.genSetReg(self.err_ret_trace_reg, .usize, err_ret_trace.short, .{});
176275 err_ret_trace.liveOut(self, err_ret_trace_index);
176757 }) try cg.genSetReg(cg.err_ret_trace_reg, .usize, err_ret_trace.short, .{});
176758 err_ret_trace.liveOut(cg, err_ret_trace_index);
176276176759 }
176277176760 }
176278176761
176279 try self.finishAir(inst, .unreach, .{ un_op, .none, .none });
176762 try cg.finishAir(inst, .unreach, .{ un_op, .none, .none });
176280176763
176281176764 // TODO optimization opportunity: figure out when we can emit this as a 2 byte instruction
176282176765 // which is available if the jump is 127 bytes or less forward.
176283 const jmp_reloc = try self.asmJmpReloc(undefined);
176284 try self.epilogue_relocs.append(self.gpa, jmp_reloc);
176766 const jmp_reloc = try cg.asmJmpReloc(undefined);
176767 try cg.epilogue_relocs.append(cg.gpa, jmp_reloc);
176285176768}
176286176769
176287fn airRetLoad(self: *CodeGen, inst: Air.Inst.Index) !void {
176288 const un_op = self.air.instructions.items(.data)[@intFromEnum(inst)].un_op;
176289 const ptr = try self.resolveInst(un_op);
176290
176291 const ptr_ty = self.typeOf(un_op);
176292 switch (self.ret_mcv.short) {
176770fn airRetLoad(cg: *CodeGen, inst: Air.Inst.Index) !void {
176771 const un_op = cg.air.instructions.items(.data)[@intFromEnum(inst)].un_op;
176772 switch (cg.ret_mcv.short) {
176293176773 .none => {},
176294 .register, .register_pair => try self.load(self.ret_mcv.short, ptr_ty, ptr),
176295 .indirect => |reg_off| try self.genSetReg(reg_off.reg, ptr_ty, ptr, .{}),
176774 .register,
176775 .register_pair,
176776 .register_triple,
176777 .register_quadruple,
176778 => try cg.load(cg.ret_mcv.short, cg.typeOf(un_op), try cg.resolveInst(un_op)),
176779 .register_mask => {
176780 var ptr = try cg.tempFromOperand(un_op, true);
176781 const ret_ty = ptr.typeOf(cg).childType(cg.pt.zcu);
176782 var src = try ptr.load(ret_ty, .{}, cg);
176783 try ptr.die(cg);
176784 var dst = try cg.tempInit(ret_ty, cg.ret_mcv.short);
176785 dst.copyToMask(&src, cg) catch |err| switch (err) {
176786 error.SelectFailed => return cg.fail("failed to select ret_load {f} {f} {f}", .{
176787 ret_ty.fmt(cg.pt),
176788 dst.tracking(cg),
176789 src.tracking(cg),
176790 }),
176791 else => |e| return e,
176792 };
176793 try src.die(cg);
176794 try dst.die(cg);
176795 },
176796 .indirect => |dst_reg_off| try cg.genSetReg(
176797 dst_reg_off.reg,
176798 cg.typeOf(un_op),
176799 try cg.resolveInst(un_op),
176800 .{},
176801 ),
176296176802 else => unreachable,
176297176803 }
176298 self.ret_mcv.liveOut(self, inst);
176804 cg.ret_mcv.liveOut(cg, inst);
176299176805
176300 if (self.err_ret_trace_reg != .none) {
176301 if (self.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176806 if (cg.err_ret_trace_reg != .none) {
176807 if (cg.inst_tracking.getPtr(err_ret_trace_index)) |err_ret_trace| {
176302176808 if (switch (err_ret_trace.short) {
176303 .register => |reg| self.err_ret_trace_reg != reg,
176809 .register => |reg| cg.err_ret_trace_reg != reg,
176304176810 else => true,
176305 }) try self.genSetReg(self.err_ret_trace_reg, .usize, err_ret_trace.short, .{});
176306 err_ret_trace.liveOut(self, err_ret_trace_index);
176811 }) try cg.genSetReg(cg.err_ret_trace_reg, .usize, err_ret_trace.short, .{});
176812 err_ret_trace.liveOut(cg, err_ret_trace_index);
176307176813 }
176308176814 }
176309176815
176310 try self.finishAir(inst, .unreach, .{ un_op, .none, .none });
176816 try cg.finishAir(inst, .unreach, .{ un_op, .none, .none });
176311176817
176312176818 // TODO optimization opportunity: figure out when we can emit this as a 2 byte instruction
176313176819 // which is available if the jump is 127 bytes or less forward.
176314 const jmp_reloc = try self.asmJmpReloc(undefined);
176315 try self.epilogue_relocs.append(self.gpa, jmp_reloc);
176820 const jmp_reloc = try cg.asmJmpReloc(undefined);
176821 try cg.epilogue_relocs.append(cg.gpa, jmp_reloc);
176316176822}
176317176823
176318176824fn airTry(self: *CodeGen, inst: Air.Inst.Index) !void {
......@@ -176504,17 +177010,13 @@ fn isErrPtr(self: *CodeGen, maybe_inst: ?Air.Inst.Index, ptr_ty: Type, ptr_mcv:
176504177010 defer if (ptr_lock) |lock| self.register_manager.unlockReg(lock);
176505177011
176506177012 const err_off: u31 = @intCast(codegen.errUnionErrorOffset(eu_ty.errorUnionPayload(zcu), zcu));
176507 try self.asmMemoryImmediate(
176508 .{ ._, .cmp },
176509 .{
176510 .base = .{ .reg = ptr_reg },
176511 .mod = .{ .rm = .{
176512 .size = self.memSize(.anyerror),
176513 .disp = err_off,
176514 } },
176515 },
176516 .u(0),
176517 );
177013 try self.asmMemoryImmediate(.{ ._, .cmp }, .{
177014 .base = .{ .reg = ptr_reg },
177015 .mod = .{ .rm = .{
177016 .size = self.memSize(.anyerror, .general_purpose),
177017 .disp = err_off,
177018 } },
177019 }, .u(0));
176518177020
176519177021 if (maybe_inst) |inst| self.eflags_inst = inst;
176520177022 return MCValue{ .eflags = .a };
......@@ -177138,13 +177640,13 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177138177640 const inputs = unwrapped_asm.inputs;
177139177641
177140177642 var result: MCValue = .none;
177141 var args: std.array_list.Managed(MCValue) = .init(self.gpa);
177142 try args.ensureTotalCapacity(outputs.len + inputs.len);
177643 var args = try self.gpa.alloc(MCValue, outputs.len + inputs.len);
177644 var args_len: usize = 0;
177143177645 defer {
177144 for (args.items) |arg| if (arg.getReg()) |reg| self.register_manager.unlockReg(.{
177646 for (args[0..args_len]) |arg| if (arg.getReg()) |reg| self.register_manager.unlockReg(.{
177145177647 .tracked_index = RegisterManager.indexOfRegIntoTracked(reg) orelse continue,
177146177648 });
177147 args.deinit();
177649 self.gpa.free(args);
177148177650 }
177149177651 var arg_map: std.StringHashMap(u8) = .init(self.gpa);
177150177652 try arg_map.ensureTotalCapacity(@intCast(outputs.len + inputs.len));
......@@ -177203,10 +177705,10 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177203177705 return self.fail("invalid register constraint: '{s}'", .{out.constraint})
177204177706 else if (rest.len == 1 and std.ascii.isDigit(rest[0])) {
177205177707 const index = std.fmt.charToDigit(rest[0], 10) catch unreachable;
177206 if (index >= args.items.len) return self.fail("constraint out of bounds: '{s}'", .{
177708 if (index >= args_len) return self.fail("constraint out of bounds: '{s}'", .{
177207177709 out.constraint,
177208177710 });
177209 break :arg_mcv args.items[index];
177711 break :arg_mcv args[index];
177210177712 } else return self.fail("invalid constraint: '{s}'", .{out.constraint});
177211177713 break :arg_mcv if (arg_maybe_reg) |reg| .{ .register = reg } else arg: {
177212177714 const ptr_mcv = try self.resolveInst(out.operand);
......@@ -177224,8 +177726,9 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177224177726 _ = self.register_manager.lockRegIndexAssumeUnused(tracked_index);
177225177727 };
177226177728 if (!std.mem.eql(u8, out.name, "_"))
177227 arg_map.putAssumeCapacityNoClobber(out.name, @intCast(args.items.len));
177228 args.appendAssumeCapacity(arg_mcv);
177729 arg_map.putAssumeCapacityNoClobber(out.name, @intCast(args_len));
177730 args[args_len] = arg_mcv;
177731 args_len += 1;
177229177732 if (out.operand == .none) result = arg_mcv;
177230177733 if (is_read) try self.load(arg_mcv, self.typeOf(out.operand), .{ .air_ref = out.operand });
177231177734 }
......@@ -177308,17 +177811,19 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177308177811 break :arg .{ .register = reg };
177309177812 } else if (in.constraint.len == 1 and std.ascii.isDigit(in.constraint[0])) arg: {
177310177813 const index = std.fmt.charToDigit(in.constraint[0], 10) catch unreachable;
177311 if (index >= args.items.len) return self.fail("constraint out of bounds: '{s}'", .{in.constraint});
177312 try self.genCopy(ty, args.items[index], input_mcv, .{});
177313 break :arg args.items[index];
177814 if (index >= args_len) return self.fail("constraint out of bounds: '{s}'", .{in.constraint});
177815 try self.genCopy(ty, args[index], input_mcv, .{});
177816 break :arg args[index];
177314177817 } else return self.fail("invalid constraint: '{s}'", .{in.constraint});
177315177818 if (arg_mcv.getReg()) |reg| if (RegisterManager.indexOfRegIntoTracked(reg)) |_| {
177316177819 _ = self.register_manager.lockReg(reg);
177317177820 };
177318177821 if (!std.mem.eql(u8, in.name, "_"))
177319 arg_map.putAssumeCapacityNoClobber(in.name, @intCast(args.items.len));
177320 args.appendAssumeCapacity(arg_mcv);
177822 arg_map.putAssumeCapacityNoClobber(in.name, @intCast(args_len));
177823 args[args_len] = arg_mcv;
177824 args_len += 1;
177321177825 }
177826 assert(args_len == args.len);
177322177827
177323177828 const ip = &zcu.intern_pool;
177324177829 const clobbers_val: Value = .fromInterned(unwrapped_asm.clobbers);
......@@ -177551,7 +178056,7 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177551178056 op_str[colon_pos + ":".len .. op_str.len - "]".len]
177552178057 else
177553178058 "";
177554 op.* = switch (args.items[
178059 op.* = switch (args[
177555178060 arg_map.get(op_str["%[".len .. colon orelse op_str.len - "]".len]) orelse
177556178061 return self.fail("no matching constraint: '{s}'", .{op_str})
177557178062 ]) {
......@@ -177695,7 +178200,7 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177695178200 op_str[colon_pos + ":".len .. open - "]".len]
177696178201 else
177697178202 "";
177698 break :disp switch (args.items[
178203 break :disp switch (args[
177699178204 arg_map.get(op_str["%[".len .. colon orelse open - "]".len]) orelse
177700178205 return self.fail("no matching constraint: '{s}'", .{op_str})
177701178206 ]) {
......@@ -177855,7 +178360,7 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void {
177855178360
177856178361 it = unwrapped_asm.iterateOutputs();
177857178362 while (it.next()) |out| {
177858 const arg_mcv = args.items[it.current - 1];
178363 const arg_mcv = args[it.current - 1];
177859178364 if (out.operand == .none) continue;
177860178365 if (arg_mcv != .register) continue;
177861178366 if (out.constraint.len == 2 and std.ascii.isDigit(out.constraint[1])) continue;
......@@ -178297,12 +178802,18 @@ fn genCopy(self: *CodeGen, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: C
178297178802 .register_overflow,
178298178803 .register_mask,
178299178804 .indirect_load_frame,
178805 .indirect_mask,
178300178806 .lea_frame,
178301178807 .lea_nav,
178302178808 .lea_uav,
178303178809 .lea_lazy_sym,
178304178810 .lea_extern_func,
178305 .elementwise_args,
178811 .register_tee,
178812 .elementwise_gpr,
178813 .elementwise_sse,
178814 .xwordwise_sse,
178815 .ywordwise_sse,
178816 .zwordwise_sse,
178306178817 .reserved_frame,
178307178818 .air_ref,
178308178819 => unreachable, // unmodifiable destination
......@@ -178313,7 +178824,12 @@ fn genCopy(self: *CodeGen, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: C
178313178824 .dead,
178314178825 .undef,
178315178826 .register_overflow,
178316 .elementwise_args,
178827 .register_tee,
178828 .elementwise_gpr,
178829 .elementwise_sse,
178830 .xwordwise_sse,
178831 .ywordwise_sse,
178832 .zwordwise_sse,
178317178833 .reserved_frame,
178318178834 => unreachable,
178319178835 .immediate,
......@@ -178414,9 +178930,9 @@ fn genCopy(self: *CodeGen, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: C
178414178930
178415178931 for ([_]bool{ false, true }) |emit_hazard| {
178416178932 var hazard_count: u3 = 0;
178417 var part_disp: i32 = 0;
178933 var part_disp: u31 = 0;
178418178934 for (dst_regs, try self.splitType(dst_regs.len, ty), 0..) |dst_reg, dst_ty, part_i| {
178419 defer part_disp += @intCast(dst_ty.abiSize(pt.zcu));
178935 defer part_disp += @intCast(self.unalignedSize(dst_ty));
178420178936 const is_hazard = if (src_mcv.getReg()) |src_reg|
178421178937 dst_reg.id() == src_reg.id()
178422178938 else if (src_info) |info|
......@@ -178483,36 +178999,42 @@ fn genCopy(self: *CodeGen, ty: Type, dst_mcv: MCValue, src_mcv: MCValue, opts: C
178483178999}
178484179000
178485179001fn genSetReg(
178486 self: *CodeGen,
179002 cg: *CodeGen,
178487179003 dst_reg: Register,
178488179004 ty: Type,
178489179005 src_mcv: MCValue,
178490179006 opts: CopyOptions,
178491179007) InnerError!void {
178492 const pt = self.pt;
179008 const pt = cg.pt;
178493179009 const zcu = pt.zcu;
178494179010 const abi_size: u32 = @intCast(ty.abiSize(zcu));
178495 const dst_alias = registerAlias(dst_reg, abi_size);
178496 if (ty.bitSize(zcu) > dst_alias.size().bitSize(self.target))
178497 return self.fail("genSetReg called with a value larger than dst_reg", .{});
179011 const dst_alias = registerAlias(dst_reg, @intCast(cg.unalignedSize(ty)));
179012 if (ty.bitSize(zcu) > dst_alias.size().bitSize(cg.target))
179013 return cg.fail("genSetReg called with a value larger than dst_reg", .{});
178498179014 switch (src_mcv) {
178499179015 .none,
178500179016 .unreach,
178501179017 .dead,
178502179018 .indirect_load_frame,
178503 .elementwise_args,
179019 .indirect_mask,
179020 .register_tee,
179021 .elementwise_gpr,
179022 .elementwise_sse,
179023 .xwordwise_sse,
179024 .ywordwise_sse,
179025 .zwordwise_sse,
178504179026 .reserved_frame,
178505179027 => unreachable,
178506179028 .undef => if (opts.safety) switch (dst_reg.class()) {
178507179029 .general_purpose, .gphi => switch (abi_size) {
178508 1 => try self.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to8(), .u(0xaa)),
178509 2 => try self.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to16(), .u(0xaaaa)),
178510 3...4 => try self.asmRegisterImmediate(
179030 1 => try cg.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to8(), .u(0xaa)),
179031 2 => try cg.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to16(), .u(0xaaaa)),
179032 3...4 => try cg.asmRegisterImmediate(
178511179033 .{ ._, .mov },
178512179034 dst_reg.to32(),
178513179035 .s(@as(i32, @bitCast(@as(u32, 0xaaaaaaaa)))),
178514179036 ),
178515 5...8 => try self.asmRegisterImmediate(
179037 5...8 => try cg.asmRegisterImmediate(
178516179038 .{ ._, .mov },
178517179039 dst_reg.to64(),
178518179040 .u(0xaaaaaaaaaaaaaaaa),
......@@ -178521,36 +179043,36 @@ fn genSetReg(
178521179043 },
178522179044 .segment, .mmx, .sse => {
178523179045 const full_ty = try pt.vectorType(.{
178524 .len = self.vectorSize(.float),
179046 .len = cg.vectorSize(.float),
178525179047 .child = .u8_type,
178526179048 });
178527 try self.genSetReg(dst_reg, full_ty, try self.lowerValue(
179049 try cg.genSetReg(dst_reg, full_ty, try cg.lowerValue(
178528179050 try pt.aggregateSplatValue(full_ty, try pt.intValue(.u8, 0xaa)),
178529179051 ), opts);
178530179052 },
178531 .x87 => try self.genSetReg(dst_reg, .f80, try self.lowerValue(
179053 .x87 => try cg.genSetReg(dst_reg, .f80, try cg.lowerValue(
178532179054 try pt.floatValue(.f80, @as(f80, @bitCast(@as(u80, 0xaaaaaaaaaaaaaaaaaaaa)))),
178533179055 ), opts),
178534179056 .ip, .cr, .dr => unreachable,
178535179057 },
178536 .eflags => |cc| try self.asmSetccRegister(cc, dst_reg.to8()),
179058 .eflags => |cc| try cg.asmSetccRegister(cc, dst_reg.to8()),
178537179059 .immediate => |imm| {
178538179060 if (imm == 0) {
178539179061 // 32-bit moves zero-extend to 64-bit, so xoring the 32-bit
178540179062 // register is the fastest way to zero a register.
178541 try self.spillEflagsIfOccupied();
178542 try self.asmRegisterRegister(.{ ._, .xor }, dst_reg.to32(), dst_reg.to32());
179063 try cg.spillEflagsIfOccupied();
179064 try cg.asmRegisterRegister(.{ ._, .xor }, dst_reg.to32(), dst_reg.to32());
178543179065 } else if (abi_size > 4 and std.math.cast(u32, imm) != null) {
178544179066 // 32-bit moves zero-extend to 64-bit.
178545 try self.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to32(), .u(imm));
179067 try cg.asmRegisterImmediate(.{ ._, .mov }, dst_reg.to32(), .u(imm));
178546179068 } else if (abi_size <= 4 and @as(i64, @bitCast(imm)) < 0) {
178547 try self.asmRegisterImmediate(
179069 try cg.asmRegisterImmediate(
178548179070 .{ ._, .mov },
178549179071 dst_alias,
178550179072 .s(@intCast(@as(i64, @bitCast(imm)))),
178551179073 );
178552179074 } else {
178553 try self.asmRegisterImmediate(
179075 try cg.asmRegisterImmediate(
178554179076 .{ ._, .mov },
178555179077 dst_alias,
178556179078 .u(imm),
......@@ -178559,44 +179081,44 @@ fn genSetReg(
178559179081 },
178560179082 .register => |src_reg| if (dst_reg.id() != src_reg.id()) switch (dst_reg.class()) {
178561179083 .general_purpose => switch (src_reg.class()) {
178562 .general_purpose => try self.asmRegisterRegister(
179084 .general_purpose => try cg.asmRegisterRegister(
178563179085 .{ ._, .mov },
178564179086 dst_alias,
178565 registerAlias(src_reg, abi_size),
179087 registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178566179088 ),
178567 .gphi => if (dst_reg.isClass(.gphi)) try self.asmRegisterRegister(
179089 .gphi => if (dst_reg.isClass(.gphi)) try cg.asmRegisterRegister(
178568179090 .{ ._, .mov },
178569179091 dst_alias,
178570 registerAlias(src_reg, abi_size),
179092 registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178571179093 ) else {
178572 const src_lock = self.register_manager.lockReg(src_reg);
178573 defer if (src_lock) |lock| self.register_manager.unlockReg(lock);
178574 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gphi);
179094 const src_lock = cg.register_manager.lockReg(src_reg);
179095 defer if (src_lock) |lock| cg.register_manager.unlockReg(lock);
179096 const tmp_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gphi);
178575179097
178576 try self.asmRegisterRegister(.{ ._, .mov }, tmp_reg.to8(), src_reg);
178577 try self.asmRegisterRegister(.{ ._, .mov }, dst_alias, tmp_reg.to8());
179098 try cg.asmRegisterRegister(.{ ._, .mov }, tmp_reg.to8(), src_reg);
179099 try cg.asmRegisterRegister(.{ ._, .mov }, dst_alias, tmp_reg.to8());
178578179100 },
178579 .segment => try self.asmRegisterRegister(
179101 .segment => try cg.asmRegisterRegister(
178580179102 .{ ._, .mov },
178581179103 dst_alias,
178582179104 src_reg,
178583179105 ),
178584179106 .x87, .mmx, .ip, .cr, .dr => unreachable,
178585 .sse => if (self.hasFeature(.sse2)) try self.asmRegisterRegister(
179107 .sse => if (cg.hasFeature(.sse2)) try cg.asmRegisterRegister(
178586179108 switch (abi_size) {
178587 1...4 => if (self.hasFeature(.avx)) .{ .v_d, .mov } else .{ ._d, .mov },
178588 5...8 => if (self.hasFeature(.avx)) .{ .v_q, .mov } else .{ ._q, .mov },
179109 1...4 => if (cg.hasFeature(.avx)) .{ .v_d, .mov } else .{ ._d, .mov },
179110 5...8 => if (cg.hasFeature(.avx)) .{ .v_q, .mov } else .{ ._q, .mov },
178589179111 else => unreachable,
178590179112 },
178591 registerAlias(dst_reg, @max(abi_size, 4)),
179113 registerAlias(dst_reg, @intCast(@max(cg.unalignedSize(ty), 4))),
178592179114 src_reg.to128(),
178593179115 ) else {
178594179116 const frame_size = std.math.ceilPowerOfTwoAssert(u32, @max(abi_size, 4));
178595 const frame_index = try self.allocFrameIndex(.init(.{
179117 const frame_index = try cg.allocFrameIndex(.init(.{
178596179118 .size = frame_size,
178597179119 .alignment = .fromNonzeroByteUnits(frame_size),
178598179120 }));
178599 try self.asmMemoryRegister(switch (frame_size) {
179121 try cg.asmMemoryRegister(switch (frame_size) {
178600179122 4 => .{ ._ss, .mov },
178601179123 8 => .{ ._ps, .movl },
178602179124 16 => .{ ._ps, .mov },
......@@ -178605,82 +179127,85 @@ fn genSetReg(
178605179127 .base = .{ .frame = frame_index },
178606179128 .mod = .{ .rm = .{ .size = .fromSize(frame_size) } },
178607179129 }, src_reg.to128());
178608 try self.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179130 try cg.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
178609179131 .base = .{ .frame = frame_index },
178610179132 .mod = .{ .rm = .{ .size = .fromSize(abi_size) } },
178611179133 });
178612179134 },
178613179135 },
178614179136 .gphi => switch (src_reg.class()) {
178615 .general_purpose => if (src_reg.isClass(.gphi)) try self.asmRegisterRegister(
179137 .general_purpose => if (src_reg.isClass(.gphi)) try cg.asmRegisterRegister(
178616179138 .{ ._, .mov },
178617179139 dst_alias,
178618 registerAlias(src_reg, abi_size),
179140 registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178619179141 ) else {
178620 const dst_lock = self.register_manager.lockReg(dst_reg);
178621 defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
178622 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.gphi);
179142 const dst_lock = cg.register_manager.lockReg(dst_reg);
179143 defer if (dst_lock) |lock| cg.register_manager.unlockReg(lock);
179144 const tmp_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.gphi);
178623179145
178624 try self.asmRegisterRegister(.{ ._, .mov }, tmp_reg.to8(), src_reg.to8());
178625 try self.asmRegisterRegister(.{ ._, .mov }, dst_reg, tmp_reg.to8());
179146 try cg.asmRegisterRegister(.{ ._, .mov }, tmp_reg.to8(), src_reg.to8());
179147 try cg.asmRegisterRegister(.{ ._, .mov }, dst_reg, tmp_reg.to8());
178626179148 },
178627 .gphi => try self.asmRegisterRegister(
179149 .gphi => try cg.asmRegisterRegister(
178628179150 .{ ._, .mov },
178629179151 dst_alias,
178630 registerAlias(src_reg, abi_size),
179152 registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178631179153 ),
178632179154 .segment, .x87, .mmx, .ip, .cr, .dr, .sse => unreachable,
178633179155 },
178634 .segment => try self.asmRegisterRegister(
179156 .segment => try cg.asmRegisterRegister(
178635179157 .{ ._, .mov },
178636179158 dst_reg,
178637179159 switch (src_reg.class()) {
178638 .general_purpose, .gphi, .segment => registerAlias(src_reg, abi_size),
179160 .general_purpose,
179161 .gphi,
179162 .segment,
179163 => registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178639179164 .x87, .mmx, .ip, .cr, .dr => unreachable,
178640 .sse => try self.copyToTmpRegister(ty, src_mcv),
179165 .sse => try cg.copyToTmpRegister(ty, src_mcv),
178641179166 },
178642179167 ),
178643179168 .x87 => switch (src_reg.class()) {
178644179169 .general_purpose, .gphi, .segment, .mmx, .ip, .cr, .dr => unreachable,
178645179170 .x87 => switch (src_reg) {
178646 .st0 => try self.asmRegister(.{ .f_, .st }, dst_reg),
179171 .st0 => try cg.asmRegister(.{ .f_, .st }, dst_reg),
178647179172 .st1, .st2, .st3, .st4, .st5, .st6 => switch (dst_reg) {
178648179173 .st0 => {
178649 try self.asmRegister(.{ .f_p, .st }, .st0);
178650 try self.asmRegister(.{ .f_, .ld }, @enumFromInt(@intFromEnum(src_reg) - 1));
179174 try cg.asmRegister(.{ .f_p, .st }, .st0);
179175 try cg.asmRegister(.{ .f_, .ld }, @enumFromInt(@intFromEnum(src_reg) - 1));
178651179176 },
178652 .st2, .st3, .st4, .st5, .st6 => if (self.register_manager.isKnownRegFree(.st7)) {
178653 try self.asmRegister(.{ .f_, .ld }, src_reg);
178654 try self.asmRegister(.{ .f_p, .st }, @enumFromInt(@intFromEnum(dst_reg) + 1));
179177 .st2, .st3, .st4, .st5, .st6 => if (cg.register_manager.isKnownRegFree(.st7)) {
179178 try cg.asmRegister(.{ .f_, .ld }, src_reg);
179179 try cg.asmRegister(.{ .f_p, .st }, @enumFromInt(@intFromEnum(dst_reg) + 1));
178655179180 } else {
178656 try self.asmRegister(.{ .f_, .xch }, src_reg);
178657 try self.asmRegister(.{ .f_, .xch }, dst_reg);
178658 try self.asmRegister(.{ .f_, .xch }, src_reg);
179181 try cg.asmRegister(.{ .f_, .xch }, src_reg);
179182 try cg.asmRegister(.{ .f_, .xch }, dst_reg);
179183 try cg.asmRegister(.{ .f_, .xch }, src_reg);
178659179184 },
178660179185 .st7 => {
178661 if (!self.register_manager.isKnownRegFree(.st7)) try self.asmRegister(.{ .f_, .free }, dst_reg);
178662 try self.asmRegister(.{ .f_, .ld }, src_reg);
178663 try self.asmOpOnly(.{ .f_cstp, .in });
179186 if (!cg.register_manager.isKnownRegFree(.st7)) try cg.asmRegister(.{ .f_, .free }, dst_reg);
179187 try cg.asmRegister(.{ .f_, .ld }, src_reg);
179188 try cg.asmOpOnly(.{ .f_cstp, .in });
178664179189 },
178665179190 else => unreachable,
178666179191 },
178667179192 else => unreachable,
178668179193 },
178669179194 .sse => if (abi_size <= 16) {
178670 const frame_index = try self.allocFrameIndex(.init(.{
179195 const frame_index = try cg.allocFrameIndex(.init(.{
178671179196 .size = 16,
178672179197 .alignment = .@"16",
178673179198 }));
178674 try self.asmMemoryRegister(if (self.hasFeature(.avx))
179199 try cg.asmMemoryRegister(if (cg.hasFeature(.avx))
178675179200 .{ .v_dqa, .mov }
178676 else if (self.hasFeature(.sse2))
179201 else if (cg.hasFeature(.sse2))
178677179202 .{ ._dqa, .mov }
178678179203 else
178679179204 .{ ._ps, .mova }, .{
178680179205 .base = .{ .frame = frame_index },
178681179206 .mod = .{ .rm = .{ .size = .xword } },
178682179207 }, src_reg.to128());
178683 try MoveStrategy.read(.load_store_x87, self, dst_reg, .{
179208 try MoveStrategy.read(.load_store_x87, cg, dst_reg, .{
178684179209 .base = .{ .frame = frame_index },
178685179210 .mod = .{ .rm = .{ .size = .tbyte } },
178686179211 });
......@@ -178688,29 +179213,29 @@ fn genSetReg(
178688179213 },
178689179214 .mmx => unreachable,
178690179215 .sse => switch (src_reg.class()) {
178691 .general_purpose, .gphi => if (self.hasFeature(.sse2)) try self.asmRegisterRegister(
179216 .general_purpose, .gphi => if (cg.hasFeature(.sse2)) try cg.asmRegisterRegister(
178692179217 switch (abi_size) {
178693 1...4 => if (self.hasFeature(.avx)) .{ .v_d, .mov } else .{ ._d, .mov },
178694 5...8 => if (self.hasFeature(.avx)) .{ .v_q, .mov } else .{ ._q, .mov },
179218 1...4 => if (cg.hasFeature(.avx)) .{ .v_d, .mov } else .{ ._d, .mov },
179219 5...8 => if (cg.hasFeature(.avx)) .{ .v_q, .mov } else .{ ._q, .mov },
178695179220 else => unreachable,
178696179221 },
178697179222 dst_reg.to128(),
178698 registerAlias(src_reg, @max(abi_size, 4)),
179223 registerAlias(src_reg, @intCast(@max(cg.unalignedSize(ty), 4))),
178699179224 ) else {
178700179225 const frame_size = std.math.ceilPowerOfTwoAssert(u32, @max(abi_size, 4));
178701 const frame_index = try self.allocFrameIndex(.init(.{
179226 const frame_index = try cg.allocFrameIndex(.init(.{
178702179227 .size = frame_size,
178703179228 .alignment = .fromNonzeroByteUnits(frame_size),
178704179229 }));
178705 try self.asmMemoryRegister(.{ ._, .mov }, .{
179230 try cg.asmMemoryRegister(.{ ._, .mov }, .{
178706179231 .base = .{ .frame = frame_index },
178707179232 .mod = .{ .rm = .{ .size = .fromSize(abi_size) } },
178708 }, registerAlias(src_reg, abi_size));
179233 }, registerAlias(src_reg, @intCast(cg.unalignedSize(ty))));
178709179234 switch (frame_size) {
178710179235 else => {},
178711 8 => try self.asmRegisterRegister(.{ ._ps, .xor }, dst_reg.to128(), dst_reg.to128()),
179236 8 => try cg.asmRegisterRegister(.{ ._ps, .xor }, dst_reg.to128(), dst_reg.to128()),
178712179237 }
178713 try self.asmRegisterMemory(switch (frame_size) {
179238 try cg.asmRegisterMemory(switch (frame_size) {
178714179239 4 => .{ ._ss, .mov },
178715179240 8 => .{ ._ps, .movl },
178716179241 16 => .{ ._ps, .mova },
......@@ -178720,24 +179245,24 @@ fn genSetReg(
178720179245 .mod = .{ .rm = .{ .size = .fromSize(frame_size) } },
178721179246 });
178722179247 },
178723 .segment => try self.genSetReg(
179248 .segment => try cg.genSetReg(
178724179249 dst_reg,
178725179250 ty,
178726 .{ .register = try self.copyToTmpRegister(ty, src_mcv) },
179251 .{ .register = try cg.copyToTmpRegister(ty, src_mcv) },
178727179252 opts,
178728179253 ),
178729179254 .x87 => if (abi_size <= 16) {
178730 const frame_index = try self.allocFrameIndex(.init(.{
179255 const frame_index = try cg.allocFrameIndex(.init(.{
178731179256 .size = 16,
178732179257 .alignment = .@"16",
178733179258 }));
178734 try MoveStrategy.write(.load_store_x87, self, .{
179259 try MoveStrategy.write(.load_store_x87, cg, .{
178735179260 .base = .{ .frame = frame_index },
178736179261 .mod = .{ .rm = .{ .size = .tbyte } },
178737179262 }, src_reg);
178738 try self.asmRegisterMemory(if (self.hasFeature(.avx))
179263 try cg.asmRegisterMemory(if (cg.hasFeature(.avx))
178739179264 .{ .v_dqa, .mov }
178740 else if (self.hasFeature(.sse2))
179265 else if (cg.hasFeature(.sse2))
178741179266 .{ ._dqa, .mov }
178742179267 else
178743179268 .{ ._ps, .mova }, dst_reg.to128(), .{
......@@ -178746,46 +179271,46 @@ fn genSetReg(
178746179271 });
178747179272 } else unreachable,
178748179273 .mmx, .ip, .cr, .dr => unreachable,
178749 .sse => try self.asmRegisterRegister(
179274 .sse => try cg.asmRegisterRegister(
178750179275 @as(?Mir.Inst.FixedTag, switch (ty.scalarType(zcu).zigTypeTag(zcu)) {
178751179276 else => switch (abi_size) {
178752 1...16 => if (self.hasFeature(.avx))
179277 1...16 => if (cg.hasFeature(.avx))
178753179278 .{ .v_dqa, .mov }
178754 else if (self.hasFeature(.sse2))
179279 else if (cg.hasFeature(.sse2))
178755179280 .{ ._dqa, .mov }
178756179281 else
178757179282 .{ ._ps, .mova },
178758 17...32 => if (self.hasFeature(.avx)) .{ .v_dqa, .mov } else null,
179283 17...32 => if (cg.hasFeature(.avx)) .{ .v_dqa, .mov } else null,
178759179284 else => null,
178760179285 },
178761 .float => switch (ty.scalarType(zcu).floatBits(self.target)) {
179286 .float => switch (ty.scalarType(zcu).floatBits(cg.target)) {
178762179287 16, 128 => switch (abi_size) {
178763 2...16 => if (self.hasFeature(.avx))
179288 2...16 => if (cg.hasFeature(.avx))
178764179289 .{ .v_dqa, .mov }
178765 else if (self.hasFeature(.sse2))
179290 else if (cg.hasFeature(.sse2))
178766179291 .{ ._dqa, .mov }
178767179292 else
178768179293 .{ ._ps, .mova },
178769 17...32 => if (self.hasFeature(.avx)) .{ .v_dqa, .mov } else null,
179294 17...32 => if (cg.hasFeature(.avx)) .{ .v_dqa, .mov } else null,
178770179295 else => null,
178771179296 },
178772 32 => if (self.hasFeature(.avx)) .{ .v_ps, .mova } else .{ ._ps, .mova },
178773 64 => if (self.hasFeature(.avx))
179297 32 => if (cg.hasFeature(.avx)) .{ .v_ps, .mova } else .{ ._ps, .mova },
179298 64 => if (cg.hasFeature(.avx))
178774179299 .{ .v_pd, .mova }
178775 else if (self.hasFeature(.sse2))
179300 else if (cg.hasFeature(.sse2))
178776179301 .{ ._pd, .mova }
178777179302 else
178778179303 .{ ._ps, .mova },
178779179304 80 => null,
178780179305 else => unreachable,
178781179306 },
178782 }) orelse return self.fail("TODO implement genSetReg for {f}", .{ty.fmt(pt)}),
179307 }) orelse return cg.fail("TODO implement genSetReg for {f}", .{ty.fmt(pt)}),
178783179308 dst_alias,
178784 registerAlias(src_reg, abi_size),
179309 registerAlias(src_reg, @intCast(cg.unalignedSize(ty))),
178785179310 ),
178786179311 },
178787179312 .ip, .cr, .dr => unreachable,
178788 } else if ((dst_reg.class() == .gphi) != (src_reg.class() == .gphi)) try self.asmRegisterRegister(
179313 } else if ((dst_reg.class() == .gphi) != (src_reg.class() == .gphi)) try cg.asmRegisterRegister(
178789179314 .{ ._, .mov },
178790179315 dst_reg.to8(),
178791179316 src_reg.to8(),
......@@ -178795,41 +179320,41 @@ fn genSetReg(
178795179320 .register_quadruple,
178796179321 => |src_regs| switch (dst_reg.class()) {
178797179322 .general_purpose => switch (src_regs[0].class()) {
178798 .general_purpose => try self.genSetReg(dst_reg, ty, .{ .register = src_regs[0] }, opts),
179323 .general_purpose => try cg.genSetReg(dst_reg, ty, .{ .register = src_regs[0] }, opts),
178799179324 else => unreachable,
178800179325 },
178801179326 .sse => switch (src_regs[0].class()) {
178802179327 .general_purpose => if (abi_size <= 16) {
178803 if (self.hasFeature(.avx)) {
178804 try self.asmRegisterRegister(.{ .v_q, .mov }, dst_reg.to128(), src_regs[0].to64());
178805 try self.asmRegisterRegisterRegisterImmediate(
179328 if (cg.hasFeature(.avx)) {
179329 try cg.asmRegisterRegister(.{ .v_q, .mov }, dst_reg.to128(), src_regs[0].to64());
179330 try cg.asmRegisterRegisterRegisterImmediate(
178806179331 .{ .vp_q, .insr },
178807179332 dst_reg.to128(),
178808179333 dst_reg.to128(),
178809179334 src_regs[1].to64(),
178810179335 .u(1),
178811179336 );
178812 } else if (self.hasFeature(.sse4_1)) {
178813 try self.asmRegisterRegister(.{ ._q, .mov }, dst_reg.to128(), src_regs[0].to64());
178814 try self.asmRegisterRegisterImmediate(.{ .p_q, .insr }, dst_reg.to128(), src_regs[1].to64(), .u(1));
178815 } else if (self.hasFeature(.sse2)) {
178816 const tmp_reg = try self.register_manager.allocReg(null, abi.RegisterClass.sse);
178817 const tmp_lock = self.register_manager.lockRegAssumeUnused(tmp_reg);
178818 defer self.register_manager.unlockReg(tmp_lock);
178819
178820 try self.asmRegisterRegister(.{ ._q, .mov }, dst_reg.to128(), src_regs[0].to64());
178821 try self.asmRegisterRegister(.{ ._q, .mov }, tmp_reg.to128(), src_regs[1].to64());
178822 try self.asmRegisterRegister(.{ ._ps, .movlh }, dst_reg.to128(), tmp_reg.to128());
179337 } else if (cg.hasFeature(.sse4_1)) {
179338 try cg.asmRegisterRegister(.{ ._q, .mov }, dst_reg.to128(), src_regs[0].to64());
179339 try cg.asmRegisterRegisterImmediate(.{ .p_q, .insr }, dst_reg.to128(), src_regs[1].to64(), .u(1));
179340 } else if (cg.hasFeature(.sse2)) {
179341 const tmp_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.sse);
179342 const tmp_lock = cg.register_manager.lockRegAssumeUnused(tmp_reg);
179343 defer cg.register_manager.unlockReg(tmp_lock);
179344
179345 try cg.asmRegisterRegister(.{ ._q, .mov }, dst_reg.to128(), src_regs[0].to64());
179346 try cg.asmRegisterRegister(.{ ._q, .mov }, tmp_reg.to128(), src_regs[1].to64());
179347 try cg.asmRegisterRegister(.{ ._ps, .movlh }, dst_reg.to128(), tmp_reg.to128());
178823179348 } else {
178824 const frame_index = try self.allocFrameIndex(.init(.{
179349 const frame_index = try cg.allocFrameIndex(.init(.{
178825179350 .size = 16,
178826179351 .alignment = .@"16",
178827179352 }));
178828 for (src_regs, 0..) |src_reg, src_index| try self.asmMemoryRegister(.{ ._, .mov }, .{
179353 for (src_regs, 0..) |src_reg, src_index| try cg.asmMemoryRegister(.{ ._, .mov }, .{
178829179354 .base = .{ .frame = frame_index },
178830179355 .mod = .{ .rm = .{ .size = .qword, .disp = @intCast(8 * src_index) } },
178831179356 }, src_reg.to64());
178832 try self.asmRegisterMemory(.{ ._ps, .mova }, dst_reg.to128(), .{
179357 try cg.asmRegisterMemory(.{ ._ps, .mova }, dst_reg.to128(), .{
178833179358 .base = .{ .frame = frame_index },
178834179359 .mod = .{ .rm = .{ .size = .xword } },
178835179360 });
......@@ -178843,38 +179368,41 @@ fn genSetReg(
178843179368 .indirect,
178844179369 .load_frame,
178845179370 .lea_frame,
178846 => try @as(MoveStrategy, switch (src_mcv) {
178847 .register_offset => |reg_off| switch (reg_off.off) {
178848 0 => return self.genSetReg(dst_reg, ty, .{ .register = reg_off.reg }, opts),
178849 else => .{ .load_store = .{ ._, .lea } },
178850 },
178851 .indirect => try self.moveStrategy(ty, dst_reg.class(), false),
178852 .load_frame => |frame_addr| try self.moveStrategy(
178853 ty,
178854 dst_reg.class(),
178855 self.getFrameAddrAlignment(frame_addr).compare(.gte, .fromLog2Units(
178856 std.math.log2_int_ceil(u64, @divExact(dst_reg.size().bitSize(self.target), 8)),
178857 )),
178858 ),
178859 .lea_frame => .{ .load_store = .{ ._, .lea } },
178860 else => unreachable,
178861 }).read(self, dst_alias, switch (src_mcv) {
178862 .register_offset, .indirect => |reg_off| .{
178863 .base = .{ .reg = reg_off.reg.to64() },
178864 .mod = .{ .rm = .{
178865 .size = self.memSize(ty),
178866 .disp = reg_off.off,
178867 } },
178868 },
178869 .load_frame, .lea_frame => |frame_addr| .{
178870 .base = .{ .frame = frame_addr.index },
178871 .mod = .{ .rm = .{
178872 .size = self.memSize(ty),
178873 .disp = frame_addr.off,
178874 } },
178875 },
178876 else => unreachable,
178877 }),
179371 => {
179372 const dst_rc = dst_reg.class();
179373 try @as(MoveStrategy, switch (src_mcv) {
179374 .register_offset => |reg_off| switch (reg_off.off) {
179375 0 => return cg.genSetReg(dst_reg, ty, .{ .register = reg_off.reg }, opts),
179376 else => .{ .load_store = .{ ._, .lea } },
179377 },
179378 .indirect => try cg.moveStrategy(ty, dst_rc, false),
179379 .load_frame => |frame_addr| try cg.moveStrategy(
179380 ty,
179381 dst_rc,
179382 cg.getFrameAddrAlignment(frame_addr).compare(.gte, .fromLog2Units(
179383 std.math.log2_int_ceil(u64, @divExact(dst_reg.size().bitSize(cg.target), 8)),
179384 )),
179385 ),
179386 .lea_frame => .{ .load_store = .{ ._, .lea } },
179387 else => unreachable,
179388 }).read(cg, dst_alias, switch (src_mcv) {
179389 .register_offset, .indirect => |reg_off| .{
179390 .base = .{ .reg = reg_off.reg.to64() },
179391 .mod = .{ .rm = .{
179392 .size = cg.memSize(ty, dst_rc),
179393 .disp = reg_off.off,
179394 } },
179395 },
179396 .load_frame, .lea_frame => |frame_addr| .{
179397 .base = .{ .frame = frame_addr.index },
179398 .mod = .{ .rm = .{
179399 .size = cg.memSize(ty, dst_rc),
179400 .disp = frame_addr.off,
179401 } },
179402 },
179403 else => unreachable,
179404 });
179405 },
178878179406 .register_overflow => |src_reg_ov| {
178879179407 const ip = &zcu.intern_pool;
178880179408 const first_ty: Type = .fromInterned(first_ty: switch (ip.indexToKey(ty.toIntern())) {
......@@ -178891,116 +179419,189 @@ fn genSetReg(
178891179419 });
178892179420 const first_size: u31 = @intCast(first_ty.abiSize(zcu));
178893179421 const frame_size = std.math.ceilPowerOfTwoAssert(u32, abi_size);
178894 const frame_index = try self.allocFrameIndex(.init(.{
179422 const frame_index = try cg.allocFrameIndex(.init(.{
178895179423 .size = frame_size,
178896179424 .alignment = .fromNonzeroByteUnits(frame_size),
178897179425 }));
178898 try self.asmMemoryRegister(.{ ._, .mov }, .{
179426 try cg.asmMemoryRegister(.{ ._, .mov }, .{
178899179427 .base = .{ .frame = frame_index },
178900179428 .mod = .{ .rm = .{ .size = .fromSize(first_size) } },
178901179429 }, registerAlias(src_reg_ov.reg, first_size));
178902 try self.asmSetccMemory(src_reg_ov.eflags, .{
179430 try cg.asmSetccMemory(src_reg_ov.eflags, .{
178903179431 .base = .{ .frame = frame_index },
178904179432 .mod = .{ .rm = .{ .size = .byte, .disp = first_size } },
178905179433 });
178906 try self.asmRegisterMemory(.{ ._, .mov }, registerAlias(dst_reg, abi_size), .{
179434 try cg.asmRegisterMemory(.{ ._, .mov }, registerAlias(dst_reg, abi_size), .{
178907179435 .base = .{ .frame = frame_index },
178908179436 .mod = .{ .rm = .{ .size = .fromSize(frame_size) } },
178909179437 });
178910179438 },
178911179439 .register_mask => |src_reg_mask| {
178912179440 assert(src_reg_mask.reg.isClass(.sse));
178913 const has_avx = self.hasFeature(.avx);
179441 const has_avx = cg.hasFeature(.avx);
178914179442 const bits_reg = switch (dst_reg.class()) {
178915179443 .general_purpose => dst_reg,
178916 else => try self.register_manager.allocReg(null, abi.RegisterClass.gp),
179444 else => try cg.register_manager.allocReg(null, abi.RegisterClass.gp),
178917179445 };
178918 const bits_lock = self.register_manager.lockReg(bits_reg);
178919 defer if (bits_lock) |lock| self.register_manager.unlockReg(lock);
179446 const bits_lock = cg.register_manager.lockReg(bits_reg);
179447 defer if (bits_lock) |lock| cg.register_manager.unlockReg(lock);
178920179448
178921 const pack_reg = switch (src_reg_mask.info.scalar) {
178922 else => src_reg_mask.reg,
178923 .word => try self.register_manager.allocReg(null, abi.RegisterClass.sse),
179449 var mask_size: u32 = @intCast(
179450 @divExact(src_reg_mask.info.scalar.bitSize(cg.target), 8) * ty.vectorLen(zcu),
179451 );
179452 const sign_reg = switch (src_reg_mask.info.kind) {
179453 .lsb => sign_reg: {
179454 const sign_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.sse);
179455 const src_alias = registerAlias(src_reg_mask.reg, mask_size);
179456 const sign_alias = registerAlias(sign_reg, mask_size);
179457 if (cg.hasFeature(.avx2)) try cg.asmRegisterRegisterImmediate(
179458 .{ switch (src_reg_mask.info.scalar) {
179459 else => unreachable,
179460 .byte, .word => .vp_w,
179461 .dword => .vp_d,
179462 .qword => .vp_q,
179463 }, .sll },
179464 sign_alias,
179465 src_alias,
179466 .u(src_reg_mask.info.scalar.bitSize(cg.target) - 1),
179467 ) else {
179468 if (sign_alias != src_alias) try cg.asmRegisterRegister(
179469 .{ ._dqa, .mov },
179470 sign_alias,
179471 src_alias,
179472 );
179473 try cg.asmRegisterImmediate(
179474 .{ switch (src_reg_mask.info.scalar) {
179475 else => unreachable,
179476 .byte, .word => .p_w,
179477 .dword => .p_d,
179478 .qword => .p_q,
179479 }, .sll },
179480 sign_alias,
179481 .u(src_reg_mask.info.scalar.bitSize(cg.target) - 1),
179482 );
179483 }
179484 break :sign_reg sign_reg;
179485 },
179486 .zero_extend => sign_reg: {
179487 const sign_reg = try cg.register_manager.allocReg(null, abi.RegisterClass.sse);
179488 const src_alias = registerAlias(src_reg_mask.reg, mask_size);
179489 const sign_alias = registerAlias(sign_reg, mask_size);
179490 if (has_avx) {
179491 try cg.asmRegisterRegisterRegister(
179492 .{ .vp_, .xor },
179493 sign_alias,
179494 sign_alias,
179495 sign_alias,
179496 );
179497 try cg.asmRegisterRegisterRegister(.{ switch (src_reg_mask.info.scalar) {
179498 else => unreachable,
179499 .byte => .vp_b,
179500 .word => .vp_w,
179501 .dword => .vp_d,
179502 .qword => .vp_q,
179503 }, .sub }, sign_alias, sign_alias, src_alias);
179504 } else {
179505 try cg.asmRegisterRegister(.{ .p_, .xor }, sign_alias, sign_alias);
179506 try cg.asmRegisterRegister(.{ switch (src_reg_mask.info.scalar) {
179507 else => unreachable,
179508 .byte => .p_b,
179509 .word => .p_w,
179510 .dword => .p_d,
179511 .qword => .p_q,
179512 }, .sub }, sign_alias, src_alias);
179513 }
179514 break :sign_reg sign_reg;
179515 },
179516 .msb, .sign_extend => src_reg_mask.reg,
178924179517 };
178925 const pack_lock = self.register_manager.lockReg(pack_reg);
178926 defer if (pack_lock) |lock| self.register_manager.unlockReg(lock);
179518 const sign_lock = cg.register_manager.lockReg(sign_reg);
179519 defer if (sign_lock) |lock| cg.register_manager.unlockReg(lock);
178927179520
178928 var mask_size: u32 = @intCast(ty.vectorLen(zcu) * @divExact(src_reg_mask.info.scalar.bitSize(self.target), 8));
178929 switch (src_reg_mask.info.scalar) {
178930 else => {},
178931 .word => {
178932 const src_alias = registerAlias(src_reg_mask.reg, mask_size);
179521 const pack_reg = switch (src_reg_mask.info.scalar) {
179522 else => sign_reg,
179523 .word => pack_reg: {
179524 const pack_reg = if (sign_reg == src_reg_mask.reg)
179525 try cg.register_manager.allocReg(null, abi.RegisterClass.sse)
179526 else
179527 sign_reg;
179528 const sign_alias = registerAlias(sign_reg, mask_size);
178933179529 const pack_alias = registerAlias(pack_reg, mask_size);
178934179530 if (has_avx) {
178935 try self.asmRegisterRegisterRegister(.{ .vp_b, .ackssw }, pack_alias, src_alias, src_alias);
179531 try cg.asmRegisterRegisterRegister(.{ .vp_b, .ackssw }, pack_alias, sign_alias, sign_alias);
178936179532 } else {
178937 try self.asmRegisterRegister(.{ ._dqa, .mov }, pack_alias, src_alias);
178938 try self.asmRegisterRegister(.{ .p_b, .ackssw }, pack_alias, pack_alias);
179533 if (pack_alias != sign_alias) try cg.asmRegisterRegister(.{ ._dqa, .mov }, pack_alias, sign_alias);
179534 try cg.asmRegisterRegister(.{ .p_b, .ackssw }, pack_alias, pack_alias);
178939179535 }
178940179536 mask_size = std.math.divCeil(u32, mask_size, 2) catch unreachable;
179537 break :pack_reg pack_reg;
178941179538 },
178942 }
178943 try self.asmRegisterRegister(.{ switch (src_reg_mask.info.scalar) {
179539 };
179540 const pack_lock = cg.register_manager.lockReg(pack_reg);
179541 defer if (pack_lock) |lock| cg.register_manager.unlockReg(lock);
179542
179543 try cg.asmRegisterRegister(.{ switch (src_reg_mask.info.scalar) {
179544 else => unreachable,
178944179545 .byte, .word => if (has_avx) .vp_b else .p_b,
178945179546 .dword => if (has_avx) .v_ps else ._ps,
178946179547 .qword => if (has_avx) .v_pd else ._pd,
178947 else => unreachable,
178948179548 }, .movmsk }, bits_reg.to32(), registerAlias(pack_reg, mask_size));
178949 if (src_reg_mask.info.inverted) try self.asmRegister(.{ ._, .not }, registerAlias(bits_reg, abi_size));
178950 try self.genSetReg(dst_reg, ty, .{ .register = bits_reg }, .{});
179549 if (src_reg_mask.info.inverted) try cg.asmRegister(.{ ._, .not }, registerAlias(bits_reg, abi_size));
179550 try cg.genSetReg(dst_reg, ty, .{ .register = bits_reg }, .{});
178951179551 },
178952179552 .memory, .load_nav, .load_uav, .load_lazy_sym, .load_extern_func => {
179553 const dst_rc = dst_reg.class();
178953179554 switch (src_mcv) {
178954179555 .memory => |addr| if (std.math.cast(i32, @as(i64, @bitCast(addr)))) |small_addr|
178955 return (try self.moveStrategy(
179556 return (try cg.moveStrategy(
178956179557 ty,
178957 dst_reg.class(),
179558 dst_rc,
178958179559 ty.abiAlignment(zcu).check(@as(u32, @bitCast(small_addr))),
178959 )).read(self, dst_alias, .{
179560 )).read(cg, dst_alias, .{
178960179561 .base = .{ .reg = .ds },
178961179562 .mod = .{ .rm = .{
178962 .size = self.memSize(ty),
179563 .size = cg.memSize(ty, dst_rc),
178963179564 .disp = small_addr,
178964179565 } },
178965179566 }),
178966 .load_nav => |nav| switch (dst_reg.class()) {
179567 .load_nav => |nav| switch (dst_rc) {
178967179568 .general_purpose, .gphi => {
178968 try self.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179569 try cg.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
178969179570 .base = .{ .nav = nav },
178970 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
179571 .mod = .{ .rm = .{ .size = cg.memSize(ty, dst_rc) } },
178971179572 });
178972179573 return;
178973179574 },
178974179575 .segment, .mmx, .ip, .cr, .dr => unreachable,
178975179576 .x87, .sse => {},
178976179577 },
178977 .load_uav => |uav| switch (dst_reg.class()) {
179578 .load_uav => |uav| switch (dst_rc) {
178978179579 .general_purpose, .gphi => {
178979 try self.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179580 try cg.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
178980179581 .base = .{ .uav = uav },
178981 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
179582 .mod = .{ .rm = .{ .size = cg.memSize(ty, dst_rc) } },
178982179583 });
178983179584 return;
178984179585 },
178985179586 .segment, .mmx, .ip, .cr, .dr => unreachable,
178986179587 .x87, .sse => {},
178987179588 },
178988 .load_lazy_sym => |lazy_sym| switch (dst_reg.class()) {
179589 .load_lazy_sym => |lazy_sym| switch (dst_rc) {
178989179590 .general_purpose, .gphi => {
178990 try self.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179591 try cg.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
178991179592 .base = .{ .lazy_sym = lazy_sym },
178992 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
179593 .mod = .{ .rm = .{ .size = cg.memSize(ty, dst_rc) } },
178993179594 });
178994179595 return;
178995179596 },
178996179597 .segment, .mmx, .ip, .cr, .dr => unreachable,
178997179598 .x87, .sse => {},
178998179599 },
178999 .load_extern_func => |extern_func| switch (dst_reg.class()) {
179600 .load_extern_func => |extern_func| switch (dst_rc) {
179000179601 .general_purpose, .gphi => {
179001 try self.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179602 try cg.asmRegisterMemory(.{ ._, .mov }, dst_alias, .{
179002179603 .base = .{ .extern_func = extern_func },
179003 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
179604 .mod = .{ .rm = .{ .size = cg.memSize(ty, dst_rc) } },
179004179605 });
179005179606 return;
179006179607 },
......@@ -179010,40 +179611,40 @@ fn genSetReg(
179010179611 else => unreachable,
179011179612 }
179012179613
179013 const addr_reg = try self.copyToTmpRegister(.usize, src_mcv.address());
179014 const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
179015 defer self.register_manager.unlockReg(addr_lock);
179614 const addr_reg = try cg.copyToTmpRegister(.usize, src_mcv.address());
179615 const addr_lock = cg.register_manager.lockRegAssumeUnused(addr_reg);
179616 defer cg.register_manager.unlockReg(addr_lock);
179016179617
179017 try (try self.moveStrategy(ty, dst_reg.class(), false)).read(self, dst_alias, .{
179618 try (try cg.moveStrategy(ty, dst_rc, false)).read(cg, dst_alias, .{
179018179619 .base = .{ .reg = addr_reg.to64() },
179019 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
179620 .mod = .{ .rm = .{ .size = cg.memSize(ty, dst_rc) } },
179020179621 });
179021179622 },
179022 .lea_nav => |nav| try self.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179623 .lea_nav => |nav| try cg.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179023179624 .base = .{ .nav = nav },
179024179625 }),
179025 .lea_uav => |uav| try self.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179626 .lea_uav => |uav| try cg.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179026179627 .base = .{ .uav = uav },
179027179628 }),
179028 .lea_lazy_sym => |lazy_sym| try self.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179629 .lea_lazy_sym => |lazy_sym| try cg.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179029179630 .base = .{ .lazy_sym = lazy_sym },
179030179631 }),
179031 .lea_extern_func => |lazy_sym| try self.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179632 .lea_extern_func => |lazy_sym| try cg.asmRegisterMemory(.{ ._, .lea }, dst_reg.to64(), .{
179032179633 .base = .{ .extern_func = lazy_sym },
179033179634 }),
179034 .air_ref => |src_ref| try self.genSetReg(dst_reg, ty, try self.resolveInst(src_ref), opts),
179635 .air_ref => |src_ref| try cg.genSetReg(dst_reg, ty, try cg.resolveInst(src_ref), opts),
179035179636 }
179036179637}
179037179638
179038179639fn genSetMem(
179039 self: *CodeGen,
179640 cg: *CodeGen,
179040179641 base: Memory.Base,
179041179642 disp: i32,
179042179643 ty: Type,
179043179644 src_mcv: MCValue,
179044179645 opts: CopyOptions,
179045179646) InnerError!void {
179046 const pt = self.pt;
179647 const pt = cg.pt;
179047179648 const zcu = pt.zcu;
179048179649 const abi_size: u32 = @intCast(ty.abiSize(zcu));
179049179650 const dst_ptr_mcv: MCValue = switch (base) {
......@@ -179053,11 +179654,11 @@ fn genSetMem(
179053179654 .table, .rip_inst, .lazy_sym => unreachable,
179054179655 .nav => |nav| {
179055179656 // hack around linker relocation bugs
179056 const addr_reg = try self.copyToTmpRegister(.usize, .{ .lea_nav = nav });
179057 const addr_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
179058 defer self.register_manager.unlockReg(addr_lock);
179657 const addr_reg = try cg.copyToTmpRegister(.usize, .{ .lea_nav = nav });
179658 const addr_lock = cg.register_manager.lockRegAssumeUnused(addr_reg);
179659 defer cg.register_manager.unlockReg(addr_lock);
179059179660
179060 return self.genSetMem(.{ .reg = addr_reg }, disp, ty, src_mcv, opts);
179661 return cg.genSetMem(.{ .reg = addr_reg }, disp, ty, src_mcv, opts);
179061179662 },
179062179663 .uav => |uav| .{ .lea_uav = uav },
179063179664 .extern_func => |extern_func| .{ .lea_extern_func = extern_func },
......@@ -179067,10 +179668,16 @@ fn genSetMem(
179067179668 .unreach,
179068179669 .dead,
179069179670 .indirect_load_frame,
179070 .elementwise_args,
179671 .indirect_mask,
179672 .register_tee,
179673 .elementwise_gpr,
179674 .elementwise_sse,
179675 .xwordwise_sse,
179676 .ywordwise_sse,
179677 .zwordwise_sse,
179071179678 .reserved_frame,
179072179679 => unreachable,
179073 .undef => if (opts.safety) try self.genInlineMemset(
179680 .undef => if (opts.safety) try cg.genInlineMemset(
179074179681 dst_ptr_mcv,
179075179682 src_mcv,
179076179683 .{ .immediate = abi_size },
......@@ -179085,7 +179692,7 @@ fn genSetMem(
179085179692 .signed => .s(@truncate(@as(i64, @bitCast(imm)))),
179086179693 .unsigned => .u(@as(u32, @intCast(imm))),
179087179694 };
179088 try self.asmMemoryImmediate(
179695 try cg.asmMemoryImmediate(
179089179696 .{ ._, .mov },
179090179697 .{ .base = base, .mod = .{ .rm = .{
179091179698 .size = .fromSize(abi_size),
......@@ -179096,7 +179703,7 @@ fn genSetMem(
179096179703 },
179097179704 3, 5...7 => unreachable,
179098179705 else => if (std.math.cast(i32, @as(i64, @bitCast(imm)))) |small| {
179099 try self.asmMemoryImmediate(
179706 try cg.asmMemoryImmediate(
179100179707 .{ ._, .mov },
179101179708 .{ .base = base, .mod = .{ .rm = .{
179102179709 .size = .fromSize(abi_size),
......@@ -179106,7 +179713,7 @@ fn genSetMem(
179106179713 );
179107179714 } else {
179108179715 var offset: i32 = 0;
179109 while (offset < abi_size) : (offset += 4) try self.asmMemoryImmediate(
179716 while (offset < abi_size) : (offset += 4) try cg.asmMemoryImmediate(
179110179717 .{ ._, .mov },
179111179718 .{ .base = base, .mod = .{ .rm = .{
179112179719 .size = .dword,
......@@ -179120,7 +179727,7 @@ fn genSetMem(
179120179727 );
179121179728 },
179122179729 },
179123 .eflags => |cc| try self.asmSetccMemory(cc, .{ .base = base, .mod = .{
179730 .eflags => |cc| try cg.asmSetccMemory(cc, .{ .base = base, .mod = .{
179124179731 .rm = .{ .size = .byte, .disp = disp },
179125179732 } }),
179126179733 .register => |src_reg| {
......@@ -179128,75 +179735,75 @@ fn genSetMem(
179128179735 const mem_size = switch (base) {
179129179736 .frame => |base_fi| mem_size: {
179130179737 assert(disp >= 0);
179131 const frame_abi_size = self.frame_allocs.items(.abi_size)[@intFromEnum(base_fi)];
179132 const frame_spill_pad = self.frame_allocs.items(.spill_pad)[@intFromEnum(base_fi)];
179738 const frame_abi_size = cg.frame_allocs.items(.abi_size)[@intFromEnum(base_fi)];
179739 const frame_spill_pad = cg.frame_allocs.items(.spill_pad)[@intFromEnum(base_fi)];
179133179740 assert(frame_abi_size - frame_spill_pad - disp >= abi_size);
179134179741 break :mem_size if (frame_abi_size - frame_spill_pad - disp == abi_size) frame_abi_size else abi_size;
179135179742 },
179136179743 else => abi_size,
179137179744 };
179138 const src_alias = registerAlias(src_reg, @intCast(self.unalignedSize(ty)));
179139 const src_class = src_alias.class();
179140 const src_size: Memory.Size = switch (src_class) {
179745 const src_alias = registerAlias(src_reg, @intCast(cg.unalignedSize(ty)));
179746 const src_rc = src_alias.class();
179747 const src_size: Memory.Size = switch (src_rc) {
179141179748 .general_purpose, .gphi, .segment, .ip, .cr, .dr => src_alias.size(),
179142179749 .mmx, .sse => .fromSize(abi_size),
179143 .x87 => switch (abi.classifySystemV(ty, zcu, self.target, .other)[0]) {
179750 .x87 => switch (abi.classifySystemV(ty, zcu, cg.target, .other)[0]) {
179144179751 else => unreachable,
179145179752 .float => .dword,
179146179753 .float_combine, .sse => .qword,
179147179754 .x87 => .tbyte,
179148179755 },
179149179756 };
179150 const src_bit_size = src_size.bitSize(self.target);
179757 const src_bit_size = src_size.bitSize(cg.target);
179151179758 const src_align: InternPool.Alignment = .fromNonzeroByteUnits(std.math.ceilPowerOfTwoAssert(u64, src_bit_size));
179152179759 const src_byte_size = @divExact(src_bit_size, 8);
179153179760 if (src_byte_size > mem_size) {
179154 const frame_index = try self.allocFrameIndex(.init(.{
179761 const frame_index = try cg.allocFrameIndex(.init(.{
179155179762 .size = src_byte_size,
179156179763 .alignment = src_align,
179157179764 }));
179158179765 const frame_mcv: MCValue = .{ .load_frame = .{ .index = frame_index } };
179159 try (try self.moveStrategy(ty, src_class, true)).write(self, .{
179766 try (try cg.moveStrategy(ty, src_rc, true)).write(cg, .{
179160179767 .base = .{ .frame = frame_index },
179161179768 .mod = .{ .rm = .{ .size = src_size } },
179162179769 }, src_alias);
179163 try self.genSetMem(base, disp, ty, frame_mcv, opts);
179164 try self.freeValue(frame_mcv, .{});
179165 } else try (try self.moveStrategy(ty, src_class, switch (base) {
179770 try cg.genSetMem(base, disp, ty, frame_mcv, opts);
179771 try cg.freeValue(frame_mcv, .{});
179772 } else try (try cg.moveStrategy(ty, src_rc, switch (base) {
179166179773 .none => src_align.check(@as(u32, @bitCast(disp))),
179167179774 .reg => |reg| switch (reg) {
179168179775 .es, .cs, .ss, .ds => src_align.check(@as(u32, @bitCast(disp))),
179169179776 else => false,
179170179777 },
179171 .frame => |frame_index| self.getFrameAddrAlignment(.{
179778 .frame => |frame_index| cg.getFrameAddrAlignment(.{
179172179779 .index = frame_index,
179173179780 .off = disp,
179174179781 }).compare(.gte, src_align),
179175179782 .table, .rip_inst, .lazy_sym, .extern_func => unreachable,
179176179783 .nav => |nav| ip.getNav(nav).resolved.?.@"align".compare(.gte, src_align),
179177179784 .uav => |uav| Type.fromInterned(uav.orig_ty).ptrAlignment(zcu).compare(.gte, src_align),
179178 })).write(self, .{
179785 })).write(cg, .{
179179179786 .base = base,
179180179787 .mod = .{ .rm = .{ .size = src_size, .disp = disp } },
179181179788 }, src_alias);
179182179789 },
179183179790 inline .register_pair, .register_triple, .register_quadruple => |src_regs| {
179184179791 var part_disp: i32 = disp;
179185 for (try self.splitType(src_regs.len, ty), src_regs) |src_ty, src_reg| {
179186 try self.genSetMem(base, part_disp, src_ty, .{ .register = src_reg }, opts);
179187 part_disp += @intCast(src_ty.abiSize(zcu));
179792 for (try cg.splitType(src_regs.len, ty), src_regs) |src_ty, src_reg| {
179793 try cg.genSetMem(base, part_disp, src_ty, .{ .register = src_reg }, opts);
179794 part_disp += @intCast(cg.unalignedSize(src_ty));
179188179795 }
179189179796 },
179190179797 .register_overflow => |ro| switch (ty.zigTypeTag(zcu)) {
179191179798 .@"struct" => {
179192 try self.genSetMem(
179799 try cg.genSetMem(
179193179800 base,
179194179801 disp + @as(i32, @intCast(ty.structFieldOffset(0, zcu))),
179195179802 ty.fieldType(0, zcu),
179196179803 .{ .register = ro.reg },
179197179804 opts,
179198179805 );
179199 try self.genSetMem(
179806 try cg.genSetMem(
179200179807 base,
179201179808 disp + @as(i32, @intCast(ty.structFieldOffset(1, zcu))),
179202179809 ty.fieldType(1, zcu),
......@@ -179207,8 +179814,8 @@ fn genSetMem(
179207179814 .optional => {
179208179815 assert(!ty.optionalReprIsPayload(zcu));
179209179816 const child_ty = ty.optionalChild(zcu);
179210 try self.genSetMem(base, disp, child_ty, .{ .register = ro.reg }, opts);
179211 try self.genSetMem(
179817 try cg.genSetMem(base, disp, child_ty, .{ .register = ro.reg }, opts);
179818 try cg.genSetMem(
179212179819 base,
179213179820 disp + @as(i32, @intCast(child_ty.abiSize(zcu))),
179214179821 .bool,
......@@ -179216,37 +179823,37 @@ fn genSetMem(
179216179823 opts,
179217179824 );
179218179825 },
179219 else => return self.fail("TODO implement genSetMem for {s} of {f}", .{
179826 else => return cg.fail("TODO implement genSetMem for {s} of {f}", .{
179220179827 @tagName(src_mcv), ty.fmt(pt),
179221179828 }),
179222179829 },
179223179830 .register_offset => |reg_off| {
179224 const src_reg = self.copyToTmpRegister(ty, src_mcv) catch |err| switch (err) {
179831 const src_reg = cg.copyToTmpRegister(ty, src_mcv) catch |err| switch (err) {
179225179832 error.OutOfRegisters => {
179226 const src_reg = registerAlias(reg_off.reg, abi_size);
179227 try self.asmRegisterMemory(.{ ._, .lea }, src_reg, .{
179228 .base = .{ .reg = src_reg },
179833 const src_alias = registerAlias(reg_off.reg, @intCast(cg.unalignedSize(ty)));
179834 try cg.asmRegisterMemory(.{ ._, .lea }, src_alias, .{
179835 .base = .{ .reg = src_alias },
179229179836 .mod = .{ .rm = .{ .disp = reg_off.off } },
179230179837 });
179231 try self.genSetMem(base, disp, ty, .{ .register = reg_off.reg }, opts);
179232 return self.asmRegisterMemory(.{ ._, .lea }, src_reg, .{
179233 .base = .{ .reg = src_reg },
179838 try cg.genSetMem(base, disp, ty, .{ .register = reg_off.reg }, opts);
179839 return cg.asmRegisterMemory(.{ ._, .lea }, src_alias, .{
179840 .base = .{ .reg = src_alias },
179234179841 .mod = .{ .rm = .{ .disp = -reg_off.off } },
179235179842 });
179236179843 },
179237179844 else => |e| return e,
179238179845 };
179239 const src_lock = self.register_manager.lockRegAssumeUnused(src_reg);
179240 defer self.register_manager.unlockReg(src_lock);
179846 const src_lock = cg.register_manager.lockRegAssumeUnused(src_reg);
179847 defer cg.register_manager.unlockReg(src_lock);
179241179848
179242 try self.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179849 try cg.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179243179850 },
179244179851 .register_mask => {
179245 const src_reg = try self.copyToTmpRegister(ty, src_mcv);
179246 const src_lock = self.register_manager.lockRegAssumeUnused(src_reg);
179247 defer self.register_manager.unlockReg(src_lock);
179852 const src_reg = try cg.copyToTmpRegister(ty, src_mcv);
179853 const src_lock = cg.register_manager.lockRegAssumeUnused(src_reg);
179854 defer cg.register_manager.unlockReg(src_lock);
179248179855
179249 try self.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179856 try cg.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179250179857 },
179251179858 .memory,
179252179859 .indirect,
......@@ -179263,15 +179870,15 @@ fn genSetMem(
179263179870 => switch (abi_size) {
179264179871 0 => {},
179265179872 1, 2, 4, 8 => {
179266 const src_reg = try self.copyToTmpRegister(ty, src_mcv);
179267 const src_lock = self.register_manager.lockRegAssumeUnused(src_reg);
179268 defer self.register_manager.unlockReg(src_lock);
179873 const src_reg = try cg.copyToTmpRegister(ty, src_mcv);
179874 const src_lock = cg.register_manager.lockRegAssumeUnused(src_reg);
179875 defer cg.register_manager.unlockReg(src_lock);
179269179876
179270 try self.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179877 try cg.genSetMem(base, disp, ty, .{ .register = src_reg }, opts);
179271179878 },
179272 else => try self.genInlineMemcpy(dst_ptr_mcv, src_mcv.address(), .{ .immediate = abi_size }, .{ .no_alias = true }),
179879 else => try cg.genInlineMemcpy(dst_ptr_mcv, src_mcv.address(), .{ .immediate = abi_size }, .{ .no_alias = true }),
179273179880 },
179274 .air_ref => |src_ref| try self.genSetMem(base, disp, ty, try self.resolveInst(src_ref), opts),
179881 .air_ref => |src_ref| try cg.genSetMem(base, disp, ty, try cg.resolveInst(src_ref), opts),
179275179882 }
179276179883}
179277179884
......@@ -179780,7 +180387,7 @@ fn atomicOp(
179780180387 mir_tag,
179781180388 sse_reg.to128(),
179782180389 sse_reg.to128(),
179783 try val_mcv.mem(self, .{ .size = self.memSize(val_ty) }),
180390 try val_mcv.mem(self, .{ .size = self.memSize(val_ty, sse_reg.class()) }),
179784180391 ) else try self.asmRegisterRegisterRegister(
179785180392 mir_tag,
179786180393 sse_reg.to128(),
......@@ -179793,7 +180400,7 @@ fn atomicOp(
179793180400 ._ss, ._sd => if (val_mcv.isBase()) try self.asmRegisterMemory(
179794180401 mir_tag,
179795180402 sse_reg.to128(),
179796 try val_mcv.mem(self, .{ .size = self.memSize(val_ty) }),
180403 try val_mcv.mem(self, .{ .size = self.memSize(val_ty, sse_reg.class()) }),
179797180404 ) else try self.asmRegisterRegister(
179798180405 mir_tag,
179799180406 sse_reg.to128(),
......@@ -180327,32 +180934,32 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180327180934 const dst_lock = self.register_manager.lockReg(dst_reg);
180328180935 defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
180329180936
180330 const mir_tag = @as(?Mir.Inst.FixedTag, if ((pred_reg_mask.info.kind == .all and
180937 const mir_tag = @as(?Mir.Inst.FixedTag, if ((pred_reg_mask.info.kind == .sign_extend and
180331180938 elem_ty.toIntern() != .f32_type and elem_ty.toIntern() != .f64_type) or pred_reg_mask.info.scalar == .byte)
180332180939 if (has_avx)
180333180940 .{ .vp_b, .blendv }
180334180941 else if (has_blend)
180335180942 .{ .p_b, .blendv }
180336 else if (pred_reg_mask.info.kind == .all)
180943 else if (pred_reg_mask.info.kind == .sign_extend)
180337180944 .{ .p_, undefined }
180338180945 else
180339180946 null
180340 else if ((pred_reg_mask.info.kind == .all and (elem_ty.toIntern() != .f64_type or !self.hasFeature(.sse2))) or
180947 else if ((pred_reg_mask.info.kind == .sign_extend and (elem_ty.toIntern() != .f64_type or !self.hasFeature(.sse2))) or
180341180948 pred_reg_mask.info.scalar == .dword)
180342180949 if (has_avx)
180343180950 .{ .v_ps, .blendv }
180344180951 else if (has_blend)
180345180952 .{ ._ps, .blendv }
180346 else if (pred_reg_mask.info.kind == .all)
180953 else if (pred_reg_mask.info.kind == .sign_extend)
180347180954 .{ ._ps, undefined }
180348180955 else
180349180956 null
180350 else if (pred_reg_mask.info.kind == .all or pred_reg_mask.info.scalar == .qword)
180957 else if (pred_reg_mask.info.kind == .sign_extend or pred_reg_mask.info.scalar == .qword)
180351180958 if (has_avx)
180352180959 .{ .v_pd, .blendv }
180353180960 else if (has_blend)
180354180961 .{ ._pd, .blendv }
180355 else if (pred_reg_mask.info.kind == .all)
180962 else if (pred_reg_mask.info.kind == .sign_extend)
180356180963 .{ ._pd, undefined }
180357180964 else
180358180965 null
......@@ -180369,7 +180976,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180369180976 mir_tag,
180370180977 dst_alias,
180371180978 rhs_alias,
180372 try other_mcv.mem(self, .{ .size = self.memSize(ty) }),
180979 try other_mcv.mem(self, .{ .size = self.memSize(ty, dst_reg.class()) }),
180373180980 mask_alias,
180374180981 ) else try self.asmRegisterRegisterRegisterRegister(
180375180982 mir_tag,
......@@ -180384,7 +180991,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180384180991 } else if (has_blend) if (other_mcv.isBase()) try self.asmRegisterMemoryRegister(
180385180992 mir_tag,
180386180993 dst_alias,
180387 try other_mcv.mem(self, .{ .size = self.memSize(ty) }),
180994 try other_mcv.mem(self, .{ .size = self.memSize(ty, dst_reg.class()) }),
180388180995 mask_alias,
180389180996 ) else try self.asmRegisterRegisterRegister(
180390180997 mir_tag,
......@@ -180527,7 +181134,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180527181134 } })));
180528181135 const mask_mem: Memory = .{
180529181136 .base = .{ .reg = try self.copyToTmpRegister(.usize, mask_mcv.address()) },
180530 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
181137 .mod = .{ .rm = .{ .size = self.memSize(ty, mask_reg.class()) } },
180531181138 };
180532181139 if (has_avx) try self.asmRegisterRegisterMemory(
180533181140 .{ .vp_b, .shuf },
......@@ -180552,7 +181159,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180552181159 const mask_mcv = try self.lowerValue(try pt.aggregateValue(mask_ty, mask_elems));
180553181160 const mask_mem: Memory = .{
180554181161 .base = .{ .reg = try self.copyToTmpRegister(.usize, mask_mcv.address()) },
180555 .mod = .{ .rm = .{ .size = self.memSize(ty) } },
181162 .mod = .{ .rm = .{ .size = self.memSize(ty, mask_reg.class()) } },
180556181163 };
180557181164 if (has_avx) {
180558181165 try self.asmRegisterRegisterMemory(
......@@ -180671,7 +181278,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180671181278 mir_tag,
180672181279 dst_alias,
180673181280 rhs_alias,
180674 try lhs_mcv.mem(self, .{ .size = self.memSize(ty) }),
181281 try lhs_mcv.mem(self, .{ .size = self.memSize(ty, dst_reg.class()) }),
180675181282 mask_alias,
180676181283 ) else try self.asmRegisterRegisterRegisterRegister(
180677181284 mir_tag,
......@@ -180686,7 +181293,7 @@ fn airSelect(self: *CodeGen, inst: Air.Inst.Index) !void {
180686181293 } else if (has_blend) if (lhs_mcv.isBase()) try self.asmRegisterMemoryRegister(
180687181294 mir_tag,
180688181295 dst_alias,
180689 try lhs_mcv.mem(self, .{ .size = self.memSize(ty) }),
181296 try lhs_mcv.mem(self, .{ .size = self.memSize(ty, dst_reg.class()) }),
180690181297 mask_alias,
180691181298 ) else try self.asmRegisterRegisterRegister(
180692181299 mir_tag,
......@@ -181205,100 +181812,163 @@ fn resolveCallingConventionValues(
181205181812 result.stack_align = .fromByteUnits(cc_opts.incoming_stack_alignment orelse 16);
181206181813
181207181814 switch (cc) {
181815 else => unreachable,
181208181816 .x86_64_sysv => {},
181209181817 .x86_64_win => result.stack_byte_count += @intCast(win64_shadow_space),
181210 else => unreachable,
181211181818 }
181212181819
181213 // Return values
181214 if (ret_ty.isNoReturn(zcu)) {
181215 result.return_value = .init(.unreach);
181216 } else if (!ret_ty.hasRuntimeBits(zcu)) {
181217 // TODO: is this even possible for C calling convention?
181218 result.return_value = .init(.none);
181219 } else {
181220 var ret_tracking: [4]InstTracking = undefined;
181221 var ret_tracking_len: u32 = 0;
181222 var ret_gpr = abi.getCAbiIntReturnRegs(cc);
181223 var ret_sse = abi.getCAbiSseReturnRegs(cc);
181224 var ret_x87 = abi.getCAbiX87ReturnRegs(cc);
181225
181226 const classes: []const abi.Class = switch (cc) {
181227 .x86_64_sysv => std.mem.sliceTo(&abi.classifySystemV(ret_ty, zcu, cg.target, .ret), .none),
181228 .x86_64_win => &.{abi.classifyWindows(ret_ty, zcu, cg.target, .ret)},
181229 else => unreachable,
181230 };
181231 for (classes) |class| switch (class) {
181232 .integer => {
181233 ret_tracking[ret_tracking_len] = .init(.{ .register = registerAlias(
181234 ret_gpr[0],
181235 @intCast(@min(ret_ty.abiSize(zcu), 8)),
181236 ) });
181237 ret_tracking_len += 1;
181238 ret_gpr = ret_gpr[1..];
181239 },
181240 .sse, .float, .float_combine, .win_i128 => {
181241 const abi_size: u32 = @intCast(ret_ty.abiSize(zcu));
181242 const reg_size = @min(abi_size, cg.vectorSize(.float));
181243 var byte_offset: u32 = 0;
181244 while (byte_offset < abi_size) : (byte_offset += reg_size) {
181245 const ret_sse_reg = registerAlias(ret_sse[0], reg_size);
181820 result.return_value = switch (ret_ty.classify(zcu)) {
181821 .no_possible_value => .init(.unreach),
181822 .one_possible_value => .init(.none),
181823 .runtime, .partially_comptime => return_value: {
181824 var ret_tracking: [4]InstTracking = undefined;
181825 var ret_tracking_len: u32 = 0;
181826 var ret_gpr = abi.getCAbiIntReturnRegs(cc);
181827 var ret_sse = abi.getCAbiSseReturnRegs(cc);
181828 var ret_x87 = abi.getCAbiX87ReturnRegs(cc);
181829
181830 var classes_buf: [8]abi.Class = undefined;
181831 const classes = classes: switch (cc) {
181832 else => unreachable,
181833 .x86_64_sysv => {
181834 classes_buf = abi.classifySystemV(ret_ty, zcu, cg.target, .ret);
181835 break :classes &classes_buf;
181836 },
181837 .x86_64_win => {
181838 classes_buf[0] = abi.classifyWindows(ret_ty, zcu, cg.target, .ret);
181839 break :classes classes_buf[0..1];
181840 },
181841 };
181842 for (classes) |class| switch (class) {
181843 .integer => {
181844 ret_tracking[ret_tracking_len] = .init(.{ .register = registerAlias(
181845 ret_gpr[0],
181846 @intCast(@min(ret_ty.abiSize(zcu), 8)),
181847 ) });
181848 ret_tracking_len += 1;
181849 ret_gpr = ret_gpr[1..];
181850 },
181851 .sse, .float, .float_combine, .win_i128 => {
181852 ret_tracking[ret_tracking_len] = .init(.{
181853 .register = registerAlias(ret_sse[0], @intCast(ret_ty.abiSize(zcu))),
181854 });
181855 ret_tracking_len += 1;
181246181856 ret_sse = ret_sse[1..];
181247
181248 ret_tracking[ret_tracking_len] = .init(.{ .register = ret_sse_reg });
181857 },
181858 .sseup => assert(ret_tracking[ret_tracking_len - 1].short.register.isClass(.sse)),
181859 .x87 => {
181860 ret_tracking[ret_tracking_len] = .init(.{ .register = ret_x87[0] });
181249181861 ret_tracking_len += 1;
181250 }
181251 },
181252 .sseup => assert(ret_tracking[ret_tracking_len - 1].short.register.isClass(.sse)),
181253 .x87 => {
181254 ret_tracking[ret_tracking_len] = .init(.{ .register = ret_x87[0] });
181255 ret_tracking_len += 1;
181256 ret_x87 = ret_x87[1..];
181257 },
181258 .x87up => assert(ret_tracking[ret_tracking_len - 1].short.register.isClass(.x87)),
181259 .memory, .integer_per_element => {
181260 ret_tracking[ret_tracking_len] = .{
181261 .short = .{ .indirect = .{ .reg = ret_gpr[0].to64() } },
181262 .long = .{ .indirect = .{ .reg = param_gpr[param_gpr_index].to64() } },
181263 };
181264 ret_tracking_len += 1;
181265 ret_gpr = ret_gpr[1..];
181266 param_gpr_index += 1;
181267 },
181268 .none => unreachable,
181269 };
181270 result.return_value = switch (ret_tracking_len) {
181271 else => unreachable,
181272 1 => ret_tracking[0],
181273 2 => .init(.{ .register_pair = .{
181274 ret_tracking[0].short.register,
181275 ret_tracking[1].short.register,
181276 } }),
181277 3 => .init(.{ .register_triple = .{
181278 ret_tracking[0].short.register,
181279 ret_tracking[1].short.register,
181280 ret_tracking[2].short.register,
181281 } }),
181282 4 => .init(.{ .register_quadruple = .{
181283 ret_tracking[0].short.register,
181284 ret_tracking[1].short.register,
181285 ret_tracking[2].short.register,
181286 ret_tracking[3].short.register,
181287 } }),
181288 };
181289 }
181862 ret_x87 = ret_x87[1..];
181863 },
181864 .x87up => assert(ret_tracking[ret_tracking_len - 1].short.register.isClass(.x87)),
181865 .none => {},
181866 .memory => {
181867 ret_tracking[ret_tracking_len] = .{
181868 .short = .{ .indirect = .{ .reg = ret_gpr[0].to64() } },
181869 .long = .{ .indirect = .{ .reg = param_gpr[param_gpr_index].to64() } },
181870 };
181871 ret_tracking_len += 1;
181872 ret_gpr = ret_gpr[1..];
181873 param_gpr_index += 1;
181874 },
181875 .bool_vector_mask => {
181876 const len = ret_ty.vectorLen(zcu);
181877 const elem_size =
181878 @divExact(16, std.math.ceilPowerOfTwoAssert(u32, @min(len, 16)));
181879 ret_tracking[ret_tracking_len] = .init(.{ .register_mask = .{
181880 .reg = registerAlias(ret_sse[0], elem_size * len),
181881 .info = .{ .kind = .lsb, .scalar = .fromSize(elem_size) },
181882 } });
181883 ret_tracking_len += 1;
181884 ret_sse = ret_sse[1..];
181885 },
181886 .integer_per_element => {
181887 const len: u32 = @intCast(ret_ty.vectorLen(zcu));
181888 const alias_size: u32 = @intCast(@min(ret_ty.childType(zcu).abiSize(zcu), 8));
181889 for (ret_tracking[ret_tracking_len..][0..len], ret_gpr[0..len]) |*tracking, gpr|
181890 tracking.* = .init(.{ .register = registerAlias(gpr, alias_size) });
181891 ret_tracking_len += len;
181892 ret_gpr = ret_gpr[len..];
181893 },
181894 .sse_per_element => {
181895 const len: u32 = @intCast(ret_ty.vectorLen(zcu));
181896 const alias_size: u32 = @intCast(@min(ret_ty.childType(zcu).abiSize(zcu), 8));
181897 for (ret_tracking[ret_tracking_len..][0..len], ret_sse[0..len]) |*tracking, sse|
181898 tracking.* = .init(.{ .register = registerAlias(sse, alias_size) });
181899 ret_tracking_len += len;
181900 ret_sse = ret_sse[len..];
181901 },
181902 .sse_sse_x87_per_qword, .sse_per_xword, .sse_per_yword, .sse_per_zword => {
181903 const reg_size: u32 = switch (class) {
181904 else => unreachable,
181905 .sse_sse_x87_per_qword => 8,
181906 .sse_per_xword => 16,
181907 .sse_per_yword => 32,
181908 .sse_per_zword => 64,
181909 };
181910 var byte_offset: u32 = 0;
181911 const unaligned_size = cg.unalignedSize(ret_ty);
181912 while (byte_offset < unaligned_size) : (byte_offset += reg_size) {
181913 switch (@as(enum { sse, x87 }, switch (class) {
181914 else => unreachable,
181915 .sse_sse_x87_per_qword => switch (byte_offset) {
181916 0 => .sse, // duck
181917 8 => .sse, // duck
181918 else => .x87, // goose!
181919 },
181920 .sse_per_xword, .sse_per_yword, .sse_per_zword => .sse,
181921 })) {
181922 .sse => {
181923 ret_tracking[ret_tracking_len] = .init(.{
181924 .register = registerAlias(ret_sse[0], reg_size),
181925 });
181926 ret_tracking_len += 1;
181927 ret_sse = ret_sse[1..];
181928 },
181929 .x87 => {
181930 ret_tracking[ret_tracking_len] = .init(.{
181931 .register = registerAlias(ret_x87[0], reg_size),
181932 });
181933 ret_tracking_len += 1;
181934 ret_x87 = ret_x87[1..];
181935 },
181936 }
181937 }
181938 },
181939 };
181940 break :return_value switch (ret_tracking_len) {
181941 else => unreachable,
181942 1 => ret_tracking[0],
181943 2 => .init(.{ .register_pair = .{
181944 ret_tracking[0].short.register,
181945 ret_tracking[1].short.register,
181946 } }),
181947 3 => .init(.{ .register_triple = .{
181948 ret_tracking[0].short.register,
181949 ret_tracking[1].short.register,
181950 ret_tracking[2].short.register,
181951 } }),
181952 4 => .init(.{ .register_quadruple = .{
181953 ret_tracking[0].short.register,
181954 ret_tracking[1].short.register,
181955 ret_tracking[2].short.register,
181956 ret_tracking[3].short.register,
181957 } }),
181958 };
181959 },
181960 .fully_comptime => unreachable,
181961 };
181290181962
181291 // Input params
181292 params: for (param_types, result.args) |ty, *arg| {
181293 assert(ty.hasRuntimeBits(zcu));
181963 params: for (0.., param_types, result.args) |param_index, ty, *arg| {
181294181964 result.air_arg_count += 1;
181295181965 switch (cc) {
181966 else => unreachable,
181296181967 .x86_64_sysv => {},
181297181968 .x86_64_win => {
181298181969 param_gpr_index = @max(param_gpr_index, param_sse_index);
181299181970 param_sse_index = param_gpr_index;
181300181971 },
181301 else => unreachable,
181302181972 }
181303181973
181304181974 const save_param_gpr_index = param_gpr_index;
......@@ -181307,17 +181977,25 @@ fn resolveCallingConventionValues(
181307181977 var arg_mcv: [4]MCValue = undefined;
181308181978 var arg_mcv_len: u32 = 0;
181309181979
181310 const classes = switch (cc) {
181311 .x86_64_sysv => std.mem.sliceTo(&abi.classifySystemV(ty, zcu, cg.target, .arg), .none),
181312 .x86_64_win => &.{abi.classifyWindows(ty, zcu, cg.target, .arg)},
181980 var classes_buf: [8]abi.Class = undefined;
181981 const classes = classes: switch (cc) {
181313181982 else => unreachable,
181983 .x86_64_sysv => {
181984 classes_buf = abi.classifySystemV(ty, zcu, cg.target, .arg);
181985 break :classes &classes_buf;
181986 },
181987 .x86_64_win => {
181988 classes_buf[0] = abi.classifyWindows(ty, zcu, cg.target, .arg);
181989 break :classes classes_buf[0..1];
181990 },
181314181991 };
181315181992 classes: for (classes) |class| switch (class) {
181316181993 .integer => {
181317181994 if (param_gpr_index >= param_gpr.len) break;
181318 arg_mcv[arg_mcv_len] = .{
181319 .register = registerAlias(param_gpr[param_gpr_index], @intCast(@min(ty.abiSize(zcu), 8))),
181320 };
181995 arg_mcv[arg_mcv_len] = .{ .register = registerAlias(
181996 param_gpr[param_gpr_index],
181997 @intCast(@min(ty.abiSize(zcu), 8)),
181998 ) };
181321181999 arg_mcv_len += 1;
181322182000 param_gpr_index += 1;
181323182001 },
......@@ -181327,62 +182005,138 @@ fn resolveCallingConventionValues(
181327182005 var byte_offset: u32 = 0;
181328182006 while (byte_offset < abi_size) : (byte_offset += reg_size) {
181329182007 if (param_sse_index >= param_sse.len) break :classes;
181330
181331 const param_sse_reg = registerAlias(param_sse[param_sse_index], reg_size);
181332 param_sse_index += 1;
181333
181334 arg_mcv[arg_mcv_len] = .{ .register = param_sse_reg };
182008 arg_mcv[arg_mcv_len] = arg_mcv: {
182009 const param_sse_reg =
182010 registerAlias(param_sse[param_sse_index], reg_size);
182011 switch (cc) {
182012 else => unreachable,
182013 .x86_64_sysv => {},
182014 .x86_64_win => if (param_index >= fn_info.param_types.len) {
182015 const param_gpr_reg =
182016 registerAlias(param_gpr[param_gpr_index], reg_size);
182017 param_gpr_index += 1;
182018 break :arg_mcv .{ .register_tee = .{
182019 param_sse_reg,
182020 param_gpr_reg,
182021 .none,
182022 .none,
182023 } };
182024 },
182025 }
182026 break :arg_mcv .{ .register = param_sse_reg };
182027 };
181335182028 arg_mcv_len += 1;
182029 param_sse_index += 1;
181336182030 }
181337182031 },
181338182032 .sseup => assert(arg_mcv[arg_mcv_len - 1].register.isClass(.sse)),
181339182033 .x87, .x87up, .memory, .win_i128 => switch (cc) {
181340182034 .x86_64_sysv => switch (class) {
181341 .x87, .x87up, .memory => break,
181342182035 else => unreachable,
182036 .x87, .x87up, .memory => break,
182037 },
182038 .x86_64_win => if (param_gpr_index < param_gpr.len) {
182039 arg_mcv[arg_mcv_len] = .{ .indirect = .{
182040 .reg = param_gpr[param_gpr_index].to64(),
182041 } };
182042 arg_mcv_len += 1;
182043 param_gpr_index += 1;
182044 } else {
182045 assert(arg_mcv_len == 0);
182046 const param_align = Type.usize.abiAlignment(zcu);
182047 result.stack_byte_count =
182048 @intCast(param_align.forward(result.stack_byte_count));
182049 result.stack_align = result.stack_align.max(param_align);
182050 arg.* = .{ .indirect_load_frame = .{
182051 .index = stack_frame_base,
182052 .off = result.stack_byte_count,
182053 } };
182054 result.stack_byte_count += @intCast(Type.usize.abiSize(zcu));
182055 continue :params;
181343182056 },
181344 .x86_64_win => if (ty.abiSize(zcu) > 8) {
181345 if (param_gpr_index < param_gpr.len) {
181346 arg_mcv[arg_mcv_len] = .{ .indirect = .{ .reg = param_gpr[param_gpr_index].to64() } };
181347 arg_mcv_len += 1;
181348 param_gpr_index += 1;
181349 } else {
181350 assert(arg_mcv_len == 0);
181351 const param_align = Type.usize.abiAlignment(zcu);
181352 result.stack_byte_count = @intCast(param_align.forward(result.stack_byte_count));
181353 result.stack_align = result.stack_align.max(param_align);
181354 arg.* = .{ .indirect_load_frame = .{
181355 .index = stack_frame_base,
181356 .off = result.stack_byte_count,
181357 } };
181358 result.stack_byte_count += @intCast(Type.usize.abiSize(zcu));
181359 continue :params;
181360 }
181361 } else break,
181362182057 else => unreachable,
181363182058 },
181364 .none => unreachable,
181365 .integer_per_element => {
181366 const remaining_param_gpr_len: u3 = @intCast(param_gpr.len - param_gpr_index);
181367 param_gpr_index = @intCast(param_gpr.len);
181368
182059 .none => {},
182060 .bool_vector_mask => {
182061 arg_mcv[arg_mcv_len] = .{ .indirect_mask = .{
182062 .reg = param_gpr[param_gpr_index].to64(),
182063 .info = .{ .kind = .lsb, .scalar = .fromSize(@divExact(
182064 16,
182065 std.math.ceilPowerOfTwoAssert(u32, @min(ty.vectorLen(zcu), 16)),
182066 )) },
182067 } };
182068 arg_mcv_len += 1;
182069 param_gpr_index += 1;
182070 },
182071 .integer_per_element,
182072 .sse_per_element,
182073 .sse_per_xword,
182074 .sse_per_yword,
182075 .sse_per_zword,
182076 => {
182077 const len = switch (class) {
182078 else => unreachable,
182079 .integer_per_element, .sse_per_element => ty.vectorLen(zcu),
182080 .sse_per_xword => @divExact(ty.abiSize(zcu), 16),
182081 .sse_per_yword => @divExact(ty.abiSize(zcu), 32),
182082 .sse_per_zword => @divExact(ty.abiSize(zcu), 64),
182083 };
182084 const param_reg_len: u32 = @intCast(@min(len, switch (class) {
182085 else => unreachable,
182086 .integer_per_element => param_gpr.len - param_gpr_index,
182087 .sse_per_element,
182088 .sse_per_xword,
182089 .sse_per_yword,
182090 .sse_per_zword,
182091 => param_sse.len - param_sse_index,
182092 }));
182093 const frame_elem_len = len - param_reg_len;
181369182094 const frame_elem_align = 8;
181370 const frame_elems_len = ty.vectorLen(zcu) - remaining_param_gpr_len;
181371 const frame_elem_size = std.mem.alignForward(u64, ty.childType(zcu).abiSize(zcu), frame_elem_align);
181372 const frame_size: u31 = @intCast(frame_elems_len * frame_elem_size);
181373
181374 result.stack_byte_count = std.mem.alignForward(u31, result.stack_byte_count, frame_elem_align);
181375 arg_mcv[arg_mcv_len] = .{ .elementwise_args = .{
181376 .regs = remaining_param_gpr_len,
181377 .frame_off = @intCast(result.stack_byte_count),
182095 const frame_elem_size = switch (class) {
182096 else => unreachable,
182097 .integer_per_element, .sse_per_element => std.mem.alignForward(
182098 u64,
182099 ty.childType(zcu).abiSize(zcu),
182100 frame_elem_align,
182101 ),
182102 .sse_per_xword, .sse_per_yword, .sse_per_zword => 8,
182103 };
182104 const frame_size: u31 = @intCast(frame_elem_size * frame_elem_len);
182105
182106 if (frame_size > 0) result.stack_byte_count =
182107 std.mem.alignForward(u31, result.stack_byte_count, frame_elem_align);
182108 const info: ArgsInfo = .{
182109 .info = .{
182110 .reg_index = @intCast(param_gpr_index),
182111 .frame_off = @intCast(result.stack_byte_count),
182112 },
181378182113 .frame_index = stack_frame_base,
181379 } };
182114 };
182115 arg_mcv[arg_mcv_len] = switch (class) {
182116 else => unreachable,
182117 .integer_per_element => .{ .elementwise_gpr = info },
182118 .sse_per_element => .{ .elementwise_sse = info },
182119 .sse_per_xword => .{ .xwordwise_sse = info },
182120 .sse_per_yword => .{ .ywordwise_sse = info },
182121 .sse_per_zword => .{ .zwordwise_sse = info },
182122 };
181380182123 arg_mcv_len += 1;
182124 switch (class) {
182125 else => unreachable,
182126 .integer_per_element => param_gpr_index += param_reg_len,
182127 .sse_per_element,
182128 .sse_per_xword,
182129 .sse_per_yword,
182130 .sse_per_zword,
182131 => param_sse_index += param_reg_len,
182132 }
181381182133 result.stack_byte_count += frame_size;
181382182134 },
182135 .sse_sse_x87_per_qword => unreachable, // thank goodness
181383182136 } else {
181384182137 arg.* = switch (arg_mcv_len) {
181385182138 else => unreachable,
182139 0 => .none,
181386182140 1 => arg_mcv[0],
181387182141 2 => .{ .register_pair = .{
181388182142 arg_mcv[0].register,
......@@ -181432,82 +182186,82 @@ fn resolveCallingConventionValues(
181432182186 param_gpr = param_gpr[0 .. param_gpr.len - 1];
181433182187 }
181434182188
181435 // Return values
181436 result.return_value = if (ret_ty.isNoReturn(zcu))
181437 .init(.unreach)
181438 else if (!ret_ty.hasRuntimeBits(zcu))
181439 .init(.none)
181440 else return_value: {
181441 const ret_gpr = abi.getCAbiIntReturnRegs(cc);
181442 const ret_size: u31 = @intCast(ret_ty.abiSize(zcu));
181443 if (abi.zigcc.return_in_regs) switch (cg.regClassForType(ret_ty)) {
181444 .general_purpose, .gphi => if (ret_size <= @as(u4, switch (cg.target.cpu.arch) {
181445 else => unreachable,
181446 .x86 => 4,
181447 .x86_64 => 8,
181448 }))
181449 break :return_value .init(.{ .register = registerAlias(ret_gpr[0], ret_size) })
181450 else if (ret_gpr.len >= 2 and ret_ty.isSliceAtRuntime(zcu))
181451 break :return_value .init(.{ .register_pair = ret_gpr[0..2].* }),
181452 .segment, .mmx, .ip, .cr, .dr => unreachable,
181453 .x87 => if (ret_size <= 16) break :return_value .init(.{ .register = .st0 }),
181454 .sse => if (ret_size <= cg.vectorSize(.float)) break :return_value .init(.{
181455 .register = registerAlias(abi.getCAbiSseReturnRegs(cc)[0], @max(ret_size, 16)),
181456 }),
181457 };
181458 const ret_indirect_reg = param_gpr[0];
181459 param_gpr = param_gpr[1..];
181460 break :return_value .{
181461 .short = .{ .indirect = .{ .reg = ret_gpr[0] } },
181462 .long = .{ .indirect = .{ .reg = ret_indirect_reg } },
181463 };
182189 result.return_value = switch (ret_ty.classify(zcu)) {
182190 .no_possible_value => .init(.unreach),
182191 .one_possible_value => .init(.none),
182192 .runtime, .partially_comptime => return_value: {
182193 const ret_gpr = abi.getCAbiIntReturnRegs(cc);
182194 const ret_size: u31 = @intCast(ret_ty.abiSize(zcu));
182195 if (abi.zigcc.return_in_regs) switch (cg.regClassForType(ret_ty)) {
182196 .general_purpose, .gphi => if (ret_size <= @as(u4, switch (cg.target.cpu.arch) {
182197 else => unreachable,
182198 .x86 => 4,
182199 .x86_64 => 8,
182200 }))
182201 break :return_value .init(.{ .register = registerAlias(ret_gpr[0], ret_size) })
182202 else if (ret_gpr.len >= 2 and ret_ty.isSliceAtRuntime(zcu))
182203 break :return_value .init(.{ .register_pair = ret_gpr[0..2].* }),
182204 .segment, .mmx, .ip, .cr, .dr => unreachable,
182205 .x87 => if (ret_size <= 16) break :return_value .init(.{ .register = .st0 }),
182206 .sse => if (ret_size <= cg.vectorSize(.float)) break :return_value .init(.{
182207 .register = registerAlias(abi.getCAbiSseReturnRegs(cc)[0], @max(ret_size, 16)),
182208 }),
182209 };
182210 const ret_indirect_reg = param_gpr[0];
182211 param_gpr = param_gpr[1..];
182212 break :return_value .{
182213 .short = .{ .indirect = .{ .reg = ret_gpr[0] } },
182214 .long = .{ .indirect = .{ .reg = ret_indirect_reg } },
182215 };
182216 },
182217 .fully_comptime => unreachable,
181464182218 };
181465182219
181466 // Input params
181467 for (param_types, result.args) |param_ty, *arg| {
181468 if (!param_ty.hasRuntimeBits(zcu)) {
181469 arg.* = .none;
181470 continue;
181471 }
181472 result.air_arg_count += 1;
181473 const param_size: u31 = @intCast(param_ty.abiSize(zcu));
181474 if (abi.zigcc.params_in_regs) switch (cg.regClassForType(param_ty)) {
181475 .general_purpose, .gphi => if (param_gpr.len >= 1 and param_size <= @as(u4, switch (cg.target.cpu.arch) {
181476 else => unreachable,
181477 .x86 => 4,
181478 .x86_64 => 8,
181479 })) {
181480 arg.* = .{ .register = registerAlias(param_gpr[0], param_size) };
181481 param_gpr = param_gpr[1..];
181482 continue;
181483 } else if (param_gpr.len >= 2 and param_ty.isSliceAtRuntime(zcu)) {
181484 arg.* = .{ .register_pair = param_gpr[0..2].* };
181485 param_gpr = param_gpr[2..];
181486 continue;
181487 },
181488 .segment, .mmx, .ip, .cr, .dr => unreachable,
181489 .x87 => if (param_x87.len >= 1 and param_size <= 16) {
181490 arg.* = .{ .register = param_x87[0] };
181491 param_x87 = param_x87[1..];
181492 continue;
181493 },
181494 .sse => if (param_sse.len >= 1 and param_size <= cg.vectorSize(.float)) {
181495 arg.* = .{
181496 .register = registerAlias(param_sse[0], @max(param_size, 16)),
181497 };
181498 param_sse = param_sse[1..];
181499 continue;
181500 },
181501 };
181502 const param_align = param_ty.abiAlignment(zcu);
181503 result.stack_byte_count = @intCast(param_align.forward(result.stack_byte_count));
181504 result.stack_align = result.stack_align.max(param_align);
181505 arg.* = .{ .load_frame = .{
181506 .index = stack_frame_base,
181507 .off = result.stack_byte_count,
181508 } };
181509 result.stack_byte_count += param_size;
181510 }
182220 for (param_types, result.args) |param_ty, *arg| switch (param_ty.classify(zcu)) {
182221 .no_possible_value => arg.* = .unreach,
182222 .one_possible_value => arg.* = .none,
182223 .runtime, .partially_comptime => {
182224 result.air_arg_count += 1;
182225 const param_size: u31 = @intCast(param_ty.abiSize(zcu));
182226 if (abi.zigcc.params_in_regs) switch (cg.regClassForType(param_ty)) {
182227 .general_purpose, .gphi => if (param_gpr.len >= 1 and param_size <= @as(u4, switch (cg.target.cpu.arch) {
182228 else => unreachable,
182229 .x86 => 4,
182230 .x86_64 => 8,
182231 })) {
182232 arg.* = .{ .register = registerAlias(param_gpr[0], param_size) };
182233 param_gpr = param_gpr[1..];
182234 continue;
182235 } else if (param_gpr.len >= 2 and param_ty.isSliceAtRuntime(zcu)) {
182236 arg.* = .{ .register_pair = param_gpr[0..2].* };
182237 param_gpr = param_gpr[2..];
182238 continue;
182239 },
182240 .segment, .mmx, .ip, .cr, .dr => unreachable,
182241 .x87 => if (param_x87.len >= 1 and param_size <= 16) {
182242 arg.* = .{ .register = param_x87[0] };
182243 param_x87 = param_x87[1..];
182244 continue;
182245 },
182246 .sse => if (param_sse.len >= 1 and param_size <= cg.vectorSize(.float)) {
182247 arg.* = .{
182248 .register = registerAlias(param_sse[0], @max(param_size, 16)),
182249 };
182250 param_sse = param_sse[1..];
182251 continue;
182252 },
182253 };
182254 const param_align = param_ty.abiAlignment(zcu);
182255 result.stack_byte_count = @intCast(param_align.forward(result.stack_byte_count));
182256 result.stack_align = result.stack_align.max(param_align);
182257 arg.* = .{ .load_frame = .{
182258 .index = stack_frame_base,
182259 .off = result.stack_byte_count,
182260 } };
182261 result.stack_byte_count += param_size;
182262 },
182263 .fully_comptime => unreachable,
182264 };
181511182265 },
181512182266 else => return cg.fail("TODO implement function parameters and return values for {} on x86_64", .{cc}),
181513182267 }
......@@ -181593,14 +182347,17 @@ fn registerAlias(reg: Register, size_bytes: u32) Register {
181593182347 };
181594182348}
181595182349
181596fn memSize(self: *CodeGen, ty: Type) Memory.Size {
182350fn memSize(self: *CodeGen, ty: Type, class: Register.Class) Memory.Size {
181597182351 const zcu = self.pt.zcu;
181598182352 return if (self.floatBits(ty)) |float_bits|
181599182353 .fromBitSize(float_bits)
181600182354 else if (ty.isVector(zcu) and ty.vectorLen(zcu) == 1 and self.floatBits(ty.childType(zcu)) == 80)
181601182355 .tbyte
181602182356 else
181603 .fromSize(@intCast(ty.abiSize(zcu)));
182357 .fromSize(@intCast(switch (class) {
182358 .general_purpose, .gphi, .segment, .x87, .ip, .cr, .dr => self.unalignedSize(ty),
182359 .mmx, .sse => ty.abiSize(zcu),
182360 }));
181604182361}
181605182362
181606182363fn splitType(self: *CodeGen, comptime parts_len: usize, ty: Type) ![parts_len]Type {
......@@ -181610,7 +182367,10 @@ fn splitType(self: *CodeGen, comptime parts_len: usize, ty: Type) ![parts_len]Ty
181610182367 var parts: [parts_len]Type = undefined;
181611182368 switch (ip.indexToKey(ty.toIntern())) {
181612182369 .vector_type => |vector_type| if (std.math.divExact(u32, vector_type.len, parts_len)) |vec_len| {
181613 return @splat(try pt.vectorType(.{ .len = vec_len, .child = vector_type.child }));
182370 return @splat(switch (vec_len) {
182371 1 => .fromInterned(vector_type.child),
182372 else => try pt.vectorType(.{ .len = vec_len, .child = vector_type.child }),
182373 });
181614182374 } else |err| switch (err) {
181615182375 error.DivisionByZero => unreachable,
181616182376 error.UnexpectedRemainder => {},
......@@ -181768,13 +182528,11 @@ fn typeOfIndex(self: *CodeGen, inst: Air.Inst.Index) Type {
181768182528 return Temp.typeOf(.{ .index = inst }, self);
181769182529}
181770182530
181771fn promoteInt(self: *CodeGen, ty: Type) Type {
181772 const pt = self.pt;
182531fn promoteInt(cg: *CodeGen, ty: Type) Type {
182532 const pt = cg.pt;
181773182533 const zcu = pt.zcu;
181774 const int_info: InternPool.Key.IntType = switch (ty.toIntern()) {
181775 .bool_type => .{ .signedness = .unsigned, .bits = 1 },
181776 else => if (ty.isAbiInt(zcu)) ty.intInfo(zcu) else return ty,
181777 };
182534 const int_info = cg.intInfo(ty) orelse return ty;
182535 if (int_info.bits == 0) return .void;
181778182536 for ([_]Type{
181779182537 .c_int, .c_uint,
181780182538 .c_long, .c_ulong,
......@@ -181942,6 +182700,7 @@ const Temp = struct {
181942182700 .memory,
181943182701 .indirect,
181944182702 .indirect_load_frame,
182703 .indirect_mask,
181945182704 .lea_frame,
181946182705 .load_nav,
181947182706 .lea_nav,
......@@ -181951,7 +182710,12 @@ const Temp = struct {
181951182710 .lea_lazy_sym,
181952182711 .lea_extern_func,
181953182712 .load_extern_func,
181954 .elementwise_args,
182713 .register_tee,
182714 .elementwise_gpr,
182715 .elementwise_sse,
182716 .xwordwise_sse,
182717 .ywordwise_sse,
182718 .zwordwise_sse,
181955182719 .reserved_frame,
181956182720 .air_ref,
181957182721 => false,
......@@ -182414,7 +183178,13 @@ const Temp = struct {
182414183178 .register_overflow,
182415183179 .register_mask,
182416183180 .indirect_load_frame,
182417 .elementwise_args,
183181 .indirect_mask,
183182 .register_tee,
183183 .elementwise_gpr,
183184 .elementwise_sse,
183185 .xwordwise_sse,
183186 .ywordwise_sse,
183187 .zwordwise_sse,
182418183188 .reserved_frame,
182419183189 .air_ref,
182420183190 => unreachable, // not a valid pointer
......@@ -182546,7 +183316,7 @@ const Temp = struct {
182546183316 try cg.asmMemoryImmediate(
182547183317 .{ ._, .mov },
182548183318 try ptr.tracking(cg).short.deref().mem(cg, .{
182549 .size = cg.memSize(val_ty),
183319 .size = cg.memSize(val_ty, .general_purpose),
182550183320 }),
182551183321 val_op,
182552183322 );
......@@ -182566,10 +183336,9 @@ const Temp = struct {
182566183336 try ptr.tracking(cg).short.deref().mem(cg, .{ .size = .byte }),
182567183337 );
182568183338 },
182569 .register => |val_reg| try ptr.storeRegs(val_ty, &.{registerAlias(
182570 val_reg,
182571 @intCast(val_ty.abiSize(cg.pt.zcu)),
182572 )}, cg),
183339 .register => |val_reg| try ptr.storeRegs(val_ty, &.{
183340 registerAlias(val_reg, @intCast(cg.unalignedSize(val_ty))),
183341 }, cg),
182573183342 inline .register_pair,
182574183343 .register_triple,
182575183344 .register_quadruple,
......@@ -182679,14 +183448,10 @@ const Temp = struct {
182679183448 .s(val_simm32)
182680183449 else
182681183450 continue :val_to_gpr;
182682 try cg.asmMemoryImmediate(
182683 .{ ._, .mov },
182684 try dst.tracking(cg).short.mem(cg, .{
182685 .size = cg.memSize(val_ty),
182686 .disp = opts.disp,
182687 }),
182688 val_op,
182689 );
183451 try cg.asmMemoryImmediate(.{ ._, .mov }, try dst.tracking(cg).short.mem(cg, .{
183452 .size = cg.memSize(val_ty, .general_purpose),
183453 .disp = opts.disp,
183454 }), val_op);
182690183455 },
182691183456 .eflags => |cc| try cg.asmSetccMemory(
182692183457 cc,
......@@ -182758,7 +183523,7 @@ const Temp = struct {
182758183523 while (try ptr.toRegClass(false, .general_purpose, cg)) {},
182759183524 }
182760183525 try strat.read(cg, dst_reg, try ptr.tracking(cg).short.deref().mem(cg, .{
182761 .size = cg.memSize(dst_ty),
183526 .size = cg.memSize(dst_ty, dst_rc),
182762183527 }));
182763183528 }
182764183529
......@@ -182767,7 +183532,9 @@ const Temp = struct {
182767183532 const ip = &zcu.intern_pool;
182768183533 var part_disp: u31 = 0;
182769183534 var deferred_disp: u31 = 0;
182770 var src_abi_size: u32 = @intCast(src_ty.abiSize(cg.pt.zcu));
183535 const is_full = src_regs.len == 1 and
183536 (src_regs[0].class() == .sse or !(src_ty.isRuntimeFloat() or src_ty.isVector(zcu)));
183537 var src_size: u32 = @intCast(if (is_full) src_ty.abiSize(zcu) else cg.unalignedSize(src_ty));
182771183538 for (src_regs, 0..) |src_reg, part_index| {
182772183539 const part_ty: Type = if (src_regs.len == 1)
182773183540 src_ty
......@@ -182782,13 +183549,17 @@ const Temp = struct {
182782183549 break :part_ty .usize;
182783183550 },
182784183551 .array_type => {
182785 assert(src_regs.len - part_index == std.math.divCeil(u32, src_abi_size, 8) catch unreachable);
182786 break :part_ty try cg.pt.intType(.unsigned, @as(u16, 8) * @min(src_abi_size, 8));
183552 assert(src_regs.len - part_index == std.math.divCeil(u32, src_size, 8) catch unreachable);
183553 break :part_ty try cg.pt.intType(.unsigned, @as(u16, 8) * @min(src_size, 8));
183554 },
183555 .vector_type => |vector_type| switch (@divExact(vector_type.len, src_regs.len)) {
183556 0 => unreachable,
183557 1 => .fromInterned(vector_type.child),
183558 else => |len| try cg.pt.vectorType(.{
183559 .len = @intCast(len),
183560 .child = vector_type.child,
183561 }),
182787183562 },
182788 .vector_type => |vector_type| try cg.pt.vectorType(.{
182789 .len = @intCast(@divExact(vector_type.len, src_regs.len)),
182790 .child = vector_type.child,
182791 }),
182792183563 .opt_type => |opt_child| switch (ip.indexToKey(opt_child)) {
182793183564 else => std.debug.panic("{s}: {f}\n", .{ @src().fn_name, src_ty.fmt(cg.pt) }),
182794183565 .ptr_type => |ptr_info| {
......@@ -182798,8 +183569,8 @@ const Temp = struct {
182798183569 },
182799183570 },
182800183571 .struct_type, .union_type => {
182801 assert(src_regs.len - part_index == std.math.divCeil(u32, src_abi_size, 8) catch unreachable);
182802 break :part_ty switch (src_abi_size) {
183572 assert(src_regs.len - part_index == std.math.divCeil(u32, src_size, 8) catch unreachable);
183573 break :part_ty switch (src_size) {
182803183574 0, 3, 5...7 => unreachable,
182804183575 1 => .u8,
182805183576 2 => .u16,
......@@ -182812,7 +183583,8 @@ const Temp = struct {
182812183583 break :part_ty .fromInterned(tuple_type.types.get(ip)[part_index]);
182813183584 },
182814183585 };
182815 const part_size: u31 = @intCast(part_ty.abiSize(zcu));
183586 const part_size: u31 =
183587 @intCast(if (is_full) part_ty.abiSize(zcu) else cg.unalignedSize(part_ty));
182816183588 const src_rc = src_reg.class();
182817183589 if (src_rc == .x87 or std.math.isPowerOfTwo(part_size)) {
182818183590 // hack around linker relocation bugs
......@@ -182827,8 +183599,9 @@ const Temp = struct {
182827183599 .x87 => switch (abi.classifySystemV(src_ty, zcu, cg.target, .other)[part_index]) {
182828183600 else => unreachable,
182829183601 .float => .dword,
182830 .float_combine, .sse => .qword,
182831 .x87 => .tbyte,
183602 .float_combine, .sse, .sseup => .qword,
183603 .x87, .x87up => .tbyte,
183604 .none => .fromBitSize(8 * part_size),
182832183605 },
182833183606 },
182834183607 .disp = part_disp,
......@@ -182847,19 +183620,20 @@ const Temp = struct {
182847183620 try ptr.toOffset(deferred_disp, cg);
182848183621 deferred_disp = 0;
182849183622 var src_ptr = try cg.tempInit(.usize, .{ .lea_frame = .{ .index = frame_index } });
182850 try ptr.memcpy(&src_ptr, src_abi_size, cg);
183623 try ptr.memcpy(&src_ptr, src_size, cg);
182851183624 try src_ptr.die(cg);
182852183625 }
182853183626 part_disp += part_size;
182854183627 deferred_disp += part_size;
182855 src_abi_size -= part_size;
183628 src_size -= part_size;
182856183629 }
182857183630 }
182858183631
182859183632 fn readReg(src: Temp, disp: i32, dst_ty: Type, dst_reg: Register, cg: *CodeGen) InnerError!void {
182860 const strat = try cg.moveStrategy(dst_ty, dst_reg.class(), false);
183633 const dst_rc = dst_reg.class();
183634 const strat = try cg.moveStrategy(dst_ty, dst_rc, false);
182861183635 try strat.read(cg, dst_reg, try src.tracking(cg).short.mem(cg, .{
182862 .size = cg.memSize(dst_ty),
183636 .size = cg.memSize(dst_ty, dst_rc),
182863183637 .disp = disp,
182864183638 }));
182865183639 }
......@@ -182870,7 +183644,7 @@ const Temp = struct {
182870183644 if (src_rc == .x87 or std.math.isPowerOfTwo(src_abi_size)) {
182871183645 const strat = try cg.moveStrategy(src_ty, src_rc, false);
182872183646 try strat.write(cg, try dst.tracking(cg).short.mem(cg, .{
182873 .size = cg.memSize(src_ty),
183647 .size = cg.memSize(src_ty, src_rc),
182874183648 .disp = disp,
182875183649 }), registerAlias(src_reg, src_abi_size));
182876183650 } else {
......@@ -182906,14 +183680,36 @@ const Temp = struct {
182906183680 .integer, .memory, .float, .float_combine => class_index + 1,
182907183681 .sse => std.mem.indexOfNonePos(abi.Class, classes, class_index + 1, &.{.sseup}) orelse classes.len,
182908183682 .x87 => std.mem.indexOfNonePos(abi.Class, classes, class_index + 1, &.{.x87up}) orelse classes.len,
182909 .sseup, .x87up, .none, .win_i128, .integer_per_element => unreachable,
183683 .sseup,
183684 .x87up,
183685 .none,
183686 .win_i128,
183687 .bool_vector_mask,
183688 .integer_per_element,
183689 .sse_per_element,
183690 .sse_sse_x87_per_qword,
183691 .sse_per_xword,
183692 .sse_per_yword,
183693 .sse_per_zword,
183694 => unreachable,
182910183695 });
182911183696 const part_size = switch (class) {
182912183697 .integer, .sse, .memory => @min(8 * @as(u7, next_class_index - class_index), remaining_abi_size),
182913183698 .x87 => 16,
182914183699 .float => 4,
182915183700 .float_combine => 8,
182916 .sseup, .x87up, .none, .win_i128, .integer_per_element => unreachable,
183701 .sseup,
183702 .x87up,
183703 .none,
183704 .win_i128,
183705 .bool_vector_mask,
183706 .integer_per_element,
183707 .sse_per_element,
183708 .sse_sse_x87_per_qword,
183709 .sse_per_xword,
183710 .sse_per_yword,
183711 .sse_per_zword,
183712 => unreachable,
182917183713 };
182918183714 try dst.writeReg(part_disp, switch (class) {
182919183715 .integer => .u64,
......@@ -182926,7 +183722,19 @@ const Temp = struct {
182926183722 .x87 => .f80,
182927183723 .float => .f32,
182928183724 .float_combine => .vector_2_f32,
182929 .sseup, .x87up, .memory, .none, .win_i128, .integer_per_element => unreachable,
183725 .sseup,
183726 .x87up,
183727 .memory,
183728 .none,
183729 .win_i128,
183730 .bool_vector_mask,
183731 .integer_per_element,
183732 .sse_per_element,
183733 .sse_sse_x87_per_qword,
183734 .sse_per_xword,
183735 .sse_per_yword,
183736 .sse_per_zword,
183737 => unreachable,
182930183738 }, src_reg, cg);
182931183739 part_disp += part_size;
182932183740 remaining_abi_size -= part_size;
......@@ -182958,6 +183766,1331 @@ const Temp = struct {
182958183766 try cg.asmOpOnly(.{ .@"rep _sb", .sto });
182959183767 }
182960183768
183769 fn copyToMask(dst: *Temp, src: *Temp, cg: *CodeGen) Select.Error!void {
183770 var ops: [2]Temp = .{ dst.*, src.* };
183771 try cg.select(&.{}, &.{}, &ops, comptime &.{ .{
183772 .required_features = .{ .avx2, null, null, null },
183773 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183774 .patterns = &.{
183775 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .mem, .none } },
183776 },
183777 .extra_temps = .{
183778 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183779 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183780 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183781 .unused,
183782 .unused,
183783 .unused,
183784 .unused,
183785 .unused,
183786 .unused,
183787 .unused,
183788 .unused,
183789 },
183790 .each = .{ .once = &.{
183791 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
183792 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183793 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183794 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183795 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183796 } },
183797 }, .{
183798 .required_features = .{ .avx2, null, null, null },
183799 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183800 .patterns = &.{
183801 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
183802 },
183803 .extra_temps = .{
183804 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183805 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183806 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183807 .unused,
183808 .unused,
183809 .unused,
183810 .unused,
183811 .unused,
183812 .unused,
183813 .unused,
183814 .unused,
183815 },
183816 .each = .{ .once = &.{
183817 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
183818 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183819 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183820 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183821 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183822 } },
183823 }, .{
183824 .required_features = .{ .avx2, null, null, null },
183825 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183826 .patterns = &.{
183827 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .mem, .none } },
183828 },
183829 .extra_temps = .{
183830 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183831 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183832 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183833 .unused,
183834 .unused,
183835 .unused,
183836 .unused,
183837 .unused,
183838 .unused,
183839 .unused,
183840 .unused,
183841 },
183842 .each = .{ .once = &.{
183843 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
183844 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183845 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183846 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183847 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183848 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
183849 .{ ._, .vp_q, .sub, .src0x, .tmp2x, .src0x, ._ },
183850 } },
183851 }, .{
183852 .required_features = .{ .avx2, null, null, null },
183853 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183854 .patterns = &.{
183855 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
183856 },
183857 .extra_temps = .{
183858 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183859 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183860 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183861 .unused,
183862 .unused,
183863 .unused,
183864 .unused,
183865 .unused,
183866 .unused,
183867 .unused,
183868 .unused,
183869 },
183870 .each = .{ .once = &.{
183871 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
183872 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183873 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183874 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183875 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183876 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
183877 .{ ._, .vp_q, .sub, .src0x, .tmp2x, .src0x, ._ },
183878 } },
183879 }, .{
183880 .required_features = .{ .avx, null, null, null },
183881 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183882 .patterns = &.{
183883 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
183884 },
183885 .extra_temps = .{
183886 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183887 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183888 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183889 .unused,
183890 .unused,
183891 .unused,
183892 .unused,
183893 .unused,
183894 .unused,
183895 .unused,
183896 .unused,
183897 },
183898 .each = .{ .once = &.{
183899 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
183900 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
183901 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183902 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183903 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183904 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183905 } },
183906 }, .{
183907 .required_features = .{ .avx, null, null, null },
183908 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183909 .patterns = &.{
183910 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
183911 },
183912 .extra_temps = .{
183913 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183914 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183915 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183916 .unused,
183917 .unused,
183918 .unused,
183919 .unused,
183920 .unused,
183921 .unused,
183922 .unused,
183923 .unused,
183924 },
183925 .each = .{ .once = &.{
183926 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
183927 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
183928 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183929 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183930 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
183931 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
183932 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
183933 .{ ._, .vp_q, .sub, .src0x, .tmp2x, .src0x, ._ },
183934 } },
183935 }, .{
183936 .required_features = .{ .ssse3, null, null, null },
183937 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183938 .patterns = &.{
183939 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
183940 },
183941 .extra_temps = .{
183942 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183943 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183944 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
183945 .unused,
183946 .unused,
183947 .unused,
183948 .unused,
183949 .unused,
183950 .unused,
183951 .unused,
183952 .unused,
183953 },
183954 .each = .{ .once = &.{
183955 .{ ._, .p_, .xor, .tmp2x, .tmp2x, ._, ._ },
183956 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
183957 .{ ._, .p_b, .shuf, .src0x, .tmp2x, ._, ._ },
183958 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183959 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
183960 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
183961 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
183962 } },
183963 }, .{
183964 .required_features = .{ .ssse3, null, null, null },
183965 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183966 .patterns = &.{
183967 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_mut_sse, .none } },
183968 },
183969 .extra_temps = .{
183970 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
183971 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
183972 .unused,
183973 .unused,
183974 .unused,
183975 .unused,
183976 .unused,
183977 .unused,
183978 .unused,
183979 .unused,
183980 .unused,
183981 },
183982 .each = .{ .once = &.{
183983 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
183984 .{ ._, .p_b, .shuf, .src1x, .src0x, ._, ._ },
183985 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
183986 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
183987 .{ ._, .p_, .@"and", .src1x, .src0x, ._, ._ },
183988 .{ ._, .p_b, .cmpeq, .src1x, .src0x, ._, ._ },
183989 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
183990 .{ ._, .p_q, .sub, .src0x, .src1x, ._, ._ },
183991 } },
183992 }, .{
183993 .required_features = .{ .sse2, null, null, null },
183994 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
183995 .patterns = &.{
183996 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
183997 },
183998 .extra_temps = .{
183999 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
184000 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184001 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184002 .unused,
184003 .unused,
184004 .unused,
184005 .unused,
184006 .unused,
184007 .unused,
184008 .unused,
184009 .unused,
184010 },
184011 .each = .{ .once = &.{
184012 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184013 .{ ._, .p_, .unpcklbw, .src0x, .src0x, ._, ._ },
184014 .{ ._, .p_, .unpcklwd, .src0x, .src0x, ._, ._ },
184015 .{ ._, .p_, .unpckldq, .src0x, .src0x, ._, ._ },
184016 .{ ._, .p_, .unpcklqdq, .src0x, .src0x, ._, ._ },
184017 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184018 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184019 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184020 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184021 } },
184022 }, .{
184023 .required_features = .{ .sse2, null, null, null },
184024 .src_constraints = .{ .{ .exact_bool_vec = 2 }, .{ .exact_bool_vec = 2 }, .any },
184025 .patterns = &.{
184026 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_mut_sse, .none } },
184027 },
184028 .extra_temps = .{
184029 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 8 } } },
184030 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184031 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184032 .unused,
184033 .unused,
184034 .unused,
184035 .unused,
184036 .unused,
184037 .unused,
184038 .unused,
184039 .unused,
184040 },
184041 .each = .{ .once = &.{
184042 .{ ._, ._dqa, .mov, .tmp2x, .src1x, ._, ._ },
184043 .{ ._, .p_, .unpcklbw, .tmp2x, .tmp2x, ._, ._ },
184044 .{ ._, .p_, .unpcklwd, .tmp2x, .tmp2x, ._, ._ },
184045 .{ ._, .p_, .unpckldq, .tmp2x, .tmp2x, ._, ._ },
184046 .{ ._, .p_, .unpcklqdq, .tmp2x, .tmp2x, ._, ._ },
184047 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184048 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184049 .{ ._, .p_, .@"and", .tmp2x, .src0x, ._, ._ },
184050 .{ ._, .p_b, .cmpeq, .tmp2x, .src0x, ._, ._ },
184051 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184052 .{ ._, .p_q, .sub, .src0x, .tmp2x, ._, ._ },
184053 } },
184054 }, .{
184055 .required_features = .{ .avx2, null, null, null },
184056 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184057 .patterns = &.{
184058 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .mem, .none } },
184059 },
184060 .extra_temps = .{
184061 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184062 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184063 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184064 .unused,
184065 .unused,
184066 .unused,
184067 .unused,
184068 .unused,
184069 .unused,
184070 .unused,
184071 .unused,
184072 },
184073 .each = .{ .once = &.{
184074 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
184075 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184076 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184077 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184078 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184079 } },
184080 }, .{
184081 .required_features = .{ .avx2, null, null, null },
184082 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184083 .patterns = &.{
184084 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184085 },
184086 .extra_temps = .{
184087 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184088 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184089 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184090 .unused,
184091 .unused,
184092 .unused,
184093 .unused,
184094 .unused,
184095 .unused,
184096 .unused,
184097 .unused,
184098 },
184099 .each = .{ .once = &.{
184100 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
184101 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184102 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184103 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184104 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184105 } },
184106 }, .{
184107 .required_features = .{ .avx2, null, null, null },
184108 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184109 .patterns = &.{
184110 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .mem, .none } },
184111 },
184112 .extra_temps = .{
184113 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184114 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184115 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184116 .unused,
184117 .unused,
184118 .unused,
184119 .unused,
184120 .unused,
184121 .unused,
184122 .unused,
184123 .unused,
184124 },
184125 .each = .{ .once = &.{
184126 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
184127 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184128 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184129 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184130 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184131 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184132 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184133 } },
184134 }, .{
184135 .required_features = .{ .avx2, null, null, null },
184136 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184137 .patterns = &.{
184138 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184139 },
184140 .extra_temps = .{
184141 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184142 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184143 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184144 .unused,
184145 .unused,
184146 .unused,
184147 .unused,
184148 .unused,
184149 .unused,
184150 .unused,
184151 .unused,
184152 },
184153 .each = .{ .once = &.{
184154 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
184155 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184156 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184157 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184158 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184159 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184160 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184161 } },
184162 }, .{
184163 .required_features = .{ .avx, null, null, null },
184164 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184165 .patterns = &.{
184166 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184167 },
184168 .extra_temps = .{
184169 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184170 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184171 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184172 .unused,
184173 .unused,
184174 .unused,
184175 .unused,
184176 .unused,
184177 .unused,
184178 .unused,
184179 .unused,
184180 },
184181 .each = .{ .once = &.{
184182 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184183 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
184184 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184185 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184186 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184187 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184188 } },
184189 }, .{
184190 .required_features = .{ .avx, null, null, null },
184191 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184192 .patterns = &.{
184193 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184194 },
184195 .extra_temps = .{
184196 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184197 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184198 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184199 .unused,
184200 .unused,
184201 .unused,
184202 .unused,
184203 .unused,
184204 .unused,
184205 .unused,
184206 .unused,
184207 },
184208 .each = .{ .once = &.{
184209 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184210 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
184211 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184212 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184213 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184214 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184215 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184216 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184217 } },
184218 }, .{
184219 .required_features = .{ .ssse3, null, null, null },
184220 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184221 .patterns = &.{
184222 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184223 },
184224 .extra_temps = .{
184225 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184226 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184227 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184228 .unused,
184229 .unused,
184230 .unused,
184231 .unused,
184232 .unused,
184233 .unused,
184234 .unused,
184235 .unused,
184236 },
184237 .each = .{ .once = &.{
184238 .{ ._, .p_, .xor, .tmp2x, .tmp2x, ._, ._ },
184239 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184240 .{ ._, .p_b, .shuf, .src0x, .tmp2x, ._, ._ },
184241 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184242 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184243 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184244 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184245 } },
184246 }, .{
184247 .required_features = .{ .ssse3, null, null, null },
184248 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184249 .patterns = &.{
184250 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_mut_sse, .none } },
184251 },
184252 .extra_temps = .{
184253 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184254 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184255 .unused,
184256 .unused,
184257 .unused,
184258 .unused,
184259 .unused,
184260 .unused,
184261 .unused,
184262 .unused,
184263 .unused,
184264 },
184265 .each = .{ .once = &.{
184266 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184267 .{ ._, .p_b, .shuf, .src1x, .src0x, ._, ._ },
184268 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184269 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184270 .{ ._, .p_, .@"and", .src1x, .src0x, ._, ._ },
184271 .{ ._, .p_b, .cmpeq, .src1x, .src0x, ._, ._ },
184272 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184273 .{ ._, .p_b, .sub, .src0x, .src1x, ._, ._ },
184274 } },
184275 }, .{
184276 .required_features = .{ .sse2, null, null, null },
184277 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184278 .patterns = &.{
184279 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184280 },
184281 .extra_temps = .{
184282 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184283 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184284 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184285 .unused,
184286 .unused,
184287 .unused,
184288 .unused,
184289 .unused,
184290 .unused,
184291 .unused,
184292 .unused,
184293 },
184294 .each = .{ .once = &.{
184295 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184296 .{ ._, .p_, .unpcklbw, .src0x, .src0x, ._, ._ },
184297 .{ ._, .p_, .unpcklwd, .src0x, .src0x, ._, ._ },
184298 .{ ._, .p_, .unpckldq, .src0x, .src0x, ._, ._ },
184299 .{ ._, .p_, .unpcklqdq, .src0x, .src0x, ._, ._ },
184300 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184301 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184302 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184303 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184304 } },
184305 }, .{
184306 .required_features = .{ .sse2, null, null, null },
184307 .src_constraints = .{ .{ .exact_bool_vec = 4 }, .{ .exact_bool_vec = 4 }, .any },
184308 .patterns = &.{
184309 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184310 },
184311 .extra_temps = .{
184312 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 4 } } },
184313 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184314 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184315 .unused,
184316 .unused,
184317 .unused,
184318 .unused,
184319 .unused,
184320 .unused,
184321 .unused,
184322 .unused,
184323 },
184324 .each = .{ .once = &.{
184325 .{ ._, ._dqa, .mov, .tmp2x, .src1x, ._, ._ },
184326 .{ ._, .p_, .unpcklbw, .tmp2x, .tmp2x, ._, ._ },
184327 .{ ._, .p_, .unpcklwd, .tmp2x, .tmp2x, ._, ._ },
184328 .{ ._, .p_, .unpckldq, .tmp2x, .tmp2x, ._, ._ },
184329 .{ ._, .p_, .unpcklqdq, .tmp2x, .tmp2x, ._, ._ },
184330 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184331 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184332 .{ ._, .p_, .@"and", .tmp2x, .src0x, ._, ._ },
184333 .{ ._, .p_b, .cmpeq, .tmp2x, .src0x, ._, ._ },
184334 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184335 .{ ._, .p_b, .sub, .src0x, .tmp2x, ._, ._ },
184336 } },
184337 }, .{
184338 .required_features = .{ .avx2, null, null, null },
184339 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184340 .patterns = &.{
184341 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .mem, .none } },
184342 },
184343 .extra_temps = .{
184344 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184345 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184346 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184347 .unused,
184348 .unused,
184349 .unused,
184350 .unused,
184351 .unused,
184352 .unused,
184353 .unused,
184354 .unused,
184355 },
184356 .each = .{ .once = &.{
184357 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
184358 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184359 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184360 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184361 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184362 } },
184363 }, .{
184364 .required_features = .{ .avx2, null, null, null },
184365 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184366 .patterns = &.{
184367 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184368 },
184369 .extra_temps = .{
184370 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184371 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184372 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184373 .unused,
184374 .unused,
184375 .unused,
184376 .unused,
184377 .unused,
184378 .unused,
184379 .unused,
184380 .unused,
184381 },
184382 .each = .{ .once = &.{
184383 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
184384 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184385 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184386 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184387 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184388 } },
184389 }, .{
184390 .required_features = .{ .avx2, null, null, null },
184391 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184392 .patterns = &.{
184393 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .mem, .none } },
184394 },
184395 .extra_temps = .{
184396 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184397 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184398 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184399 .unused,
184400 .unused,
184401 .unused,
184402 .unused,
184403 .unused,
184404 .unused,
184405 .unused,
184406 .unused,
184407 },
184408 .each = .{ .once = &.{
184409 .{ ._, .vp_b, .broadcast, .src0x, .src1b, ._, ._ },
184410 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184411 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184412 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184413 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184414 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184415 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184416 } },
184417 }, .{
184418 .required_features = .{ .avx2, null, null, null },
184419 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184420 .patterns = &.{
184421 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184422 },
184423 .extra_temps = .{
184424 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184425 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184426 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184427 .unused,
184428 .unused,
184429 .unused,
184430 .unused,
184431 .unused,
184432 .unused,
184433 .unused,
184434 .unused,
184435 },
184436 .each = .{ .once = &.{
184437 .{ ._, .vp_b, .broadcast, .src0x, .src1x, ._, ._ },
184438 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184439 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184440 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184441 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184442 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184443 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184444 } },
184445 }, .{
184446 .required_features = .{ .avx, null, null, null },
184447 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184448 .patterns = &.{
184449 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184450 },
184451 .extra_temps = .{
184452 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184453 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184454 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184455 .unused,
184456 .unused,
184457 .unused,
184458 .unused,
184459 .unused,
184460 .unused,
184461 .unused,
184462 .unused,
184463 },
184464 .each = .{ .once = &.{
184465 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184466 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
184467 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184468 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184469 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184470 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184471 } },
184472 }, .{
184473 .required_features = .{ .avx, null, null, null },
184474 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184475 .patterns = &.{
184476 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184477 },
184478 .extra_temps = .{
184479 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184480 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184481 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184482 .unused,
184483 .unused,
184484 .unused,
184485 .unused,
184486 .unused,
184487 .unused,
184488 .unused,
184489 .unused,
184490 },
184491 .each = .{ .once = &.{
184492 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184493 .{ ._, .vp_b, .shuf, .src0x, .src1x, .tmp2x, ._ },
184494 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184495 .{ ._, .v_dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184496 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp2x, ._ },
184497 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp2x, ._ },
184498 .{ ._, .vp_, .xor, .tmp2x, .tmp2x, .tmp2x, ._ },
184499 .{ ._, .vp_b, .sub, .src0x, .tmp2x, .src0x, ._ },
184500 } },
184501 }, .{
184502 .required_features = .{ .ssse3, null, null, null },
184503 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184504 .patterns = &.{
184505 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184506 },
184507 .extra_temps = .{
184508 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184509 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184510 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184511 .unused,
184512 .unused,
184513 .unused,
184514 .unused,
184515 .unused,
184516 .unused,
184517 .unused,
184518 .unused,
184519 },
184520 .each = .{ .once = &.{
184521 .{ ._, .p_, .xor, .tmp2x, .tmp2x, ._, ._ },
184522 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184523 .{ ._, .p_b, .shuf, .src0x, .tmp2x, ._, ._ },
184524 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184525 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184526 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184527 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184528 } },
184529 }, .{
184530 .required_features = .{ .ssse3, null, null, null },
184531 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184532 .patterns = &.{
184533 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_mut_sse, .none } },
184534 },
184535 .extra_temps = .{
184536 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184537 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184538 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184539 .unused,
184540 .unused,
184541 .unused,
184542 .unused,
184543 .unused,
184544 .unused,
184545 .unused,
184546 .unused,
184547 },
184548 .each = .{ .once = &.{
184549 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184550 .{ ._, .p_b, .shuf, .src1x, .src0x, ._, ._ },
184551 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184552 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184553 .{ ._, .p_, .@"and", .src1x, .src0x, ._, ._ },
184554 .{ ._, .p_b, .cmpeq, .src1x, .src0x, ._, ._ },
184555 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184556 .{ ._, .p_b, .sub, .src0x, .src1x, ._, ._ },
184557 } },
184558 }, .{
184559 .required_features = .{ .sse2, null, null, null },
184560 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184561 .patterns = &.{
184562 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184563 },
184564 .extra_temps = .{
184565 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184566 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184567 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184568 .unused,
184569 .unused,
184570 .unused,
184571 .unused,
184572 .unused,
184573 .unused,
184574 .unused,
184575 .unused,
184576 },
184577 .each = .{ .once = &.{
184578 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184579 .{ ._, .p_, .unpcklbw, .src0x, .src0x, ._, ._ },
184580 .{ ._, .p_, .unpcklwd, .src0x, .src0x, ._, ._ },
184581 .{ ._, .p_, .unpckldq, .src0x, .src0x, ._, ._ },
184582 .{ ._, .p_, .unpcklqdq, .src0x, .src0x, ._, ._ },
184583 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184584 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184585 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184586 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184587 } },
184588 }, .{
184589 .required_features = .{ .sse2, null, null, null },
184590 .src_constraints = .{ .{ .exact_bool_vec = 8 }, .{ .exact_bool_vec = 8 }, .any },
184591 .patterns = &.{
184592 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184593 },
184594 .extra_temps = .{
184595 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward, .smear = 2 } } },
184596 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184597 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184598 .unused,
184599 .unused,
184600 .unused,
184601 .unused,
184602 .unused,
184603 .unused,
184604 .unused,
184605 .unused,
184606 },
184607 .each = .{ .once = &.{
184608 .{ ._, ._dqa, .mov, .tmp2x, .src1x, ._, ._ },
184609 .{ ._, .p_, .unpcklbw, .tmp2x, .tmp2x, ._, ._ },
184610 .{ ._, .p_, .unpcklwd, .tmp2x, .tmp2x, ._, ._ },
184611 .{ ._, .p_, .unpckldq, .tmp2x, .tmp2x, ._, ._ },
184612 .{ ._, .p_, .unpcklqdq, .tmp2x, .tmp2x, ._, ._ },
184613 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184614 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184615 .{ ._, .p_, .@"and", .tmp2x, .src0x, ._, ._ },
184616 .{ ._, .p_b, .cmpeq, .tmp2x, .src0x, ._, ._ },
184617 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184618 .{ ._, .p_b, .sub, .src0x, .tmp2x, ._, ._ },
184619 } },
184620 }, .{
184621 .required_features = .{ .avx2, null, null, null },
184622 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184623 .patterns = &.{
184624 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184625 },
184626 .extra_temps = .{
184627 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184628 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184629 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184630 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184631 .unused,
184632 .unused,
184633 .unused,
184634 .unused,
184635 .unused,
184636 .unused,
184637 .unused,
184638 },
184639 .each = .{ .once = &.{
184640 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184641 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lea(.tmp2x), ._ },
184642 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184643 .{ ._, .vp_q, .broadcast, .tmp3x, .lea(.tmp2q), ._, ._ },
184644 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp3x, ._ },
184645 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp3x, ._ },
184646 } },
184647 }, .{
184648 .required_features = .{ .avx2, null, null, null },
184649 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184650 .patterns = &.{
184651 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184652 },
184653 .extra_temps = .{
184654 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184655 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184656 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184657 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184658 .unused,
184659 .unused,
184660 .unused,
184661 .unused,
184662 .unused,
184663 .unused,
184664 .unused,
184665 },
184666 .each = .{ .once = &.{
184667 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184668 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lea(.tmp2x), ._ },
184669 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184670 .{ ._, .vp_q, .broadcast, .tmp3x, .lea(.tmp2q), ._, ._ },
184671 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp3x, ._ },
184672 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp3x, ._ },
184673 .{ ._, .vp_, .xor, .tmp3x, .tmp3x, .tmp3x, ._ },
184674 .{ ._, .vp_b, .sub, .src0x, .tmp3x, .src0x, ._ },
184675 } },
184676 }, .{
184677 .required_features = .{ .avx, null, null, null },
184678 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184679 .patterns = &.{
184680 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184681 },
184682 .extra_temps = .{
184683 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184684 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184685 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184686 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184687 .unused,
184688 .unused,
184689 .unused,
184690 .unused,
184691 .unused,
184692 .unused,
184693 .unused,
184694 },
184695 .each = .{ .once = &.{
184696 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184697 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lea(.tmp2x), ._ },
184698 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184699 .{ ._, .v_, .movddup, .tmp3x, .lea(.tmp2q), ._, ._ },
184700 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp3x, ._ },
184701 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp3x, ._ },
184702 } },
184703 }, .{
184704 .required_features = .{ .avx, null, null, null },
184705 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184706 .patterns = &.{
184707 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184708 },
184709 .extra_temps = .{
184710 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184711 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184712 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184713 .{ .type = .vector_16_u8, .kind = .{ .rc = .sse } },
184714 .unused,
184715 .unused,
184716 .unused,
184717 .unused,
184718 .unused,
184719 .unused,
184720 .unused,
184721 },
184722 .each = .{ .once = &.{
184723 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184724 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lea(.tmp2x), ._ },
184725 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184726 .{ ._, .v_, .movddup, .tmp3x, .lea(.tmp2q), ._, ._ },
184727 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp3x, ._ },
184728 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp3x, ._ },
184729 .{ ._, .vp_, .xor, .tmp3x, .tmp3x, .tmp3x, ._ },
184730 .{ ._, .vp_b, .sub, .src0x, .tmp3x, .src0x, ._ },
184731 } },
184732 }, .{
184733 .required_features = .{ .ssse3, null, null, null },
184734 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184735 .patterns = &.{
184736 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184737 },
184738 .extra_temps = .{
184739 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184740 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184741 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184742 .{ .type = .usize, .kind = .{ .rc = .sse } },
184743 .unused,
184744 .unused,
184745 .unused,
184746 .unused,
184747 .unused,
184748 .unused,
184749 .unused,
184750 },
184751 .each = .{ .once = &.{
184752 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184753 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184754 .{ ._, .p_b, .shuf, .src0x, .lea(.tmp2x), ._, ._ },
184755 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184756 .{ ._, ._, .movddup, .tmp3x, .lea(.tmp2q), ._, ._ },
184757 .{ ._, .p_, .@"and", .src0x, .tmp3x, ._, ._ },
184758 .{ ._, .p_b, .cmpeq, .src0x, .tmp3x, ._, ._ },
184759 } },
184760 }, .{
184761 .required_features = .{ .ssse3, null, null, null },
184762 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184763 .patterns = &.{
184764 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_mut_sse, .none } },
184765 },
184766 .extra_temps = .{
184767 .{ .type = .vector_16_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .word, .smear = 8 } } },
184768 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184769 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184770 .unused,
184771 .unused,
184772 .unused,
184773 .unused,
184774 .unused,
184775 .unused,
184776 .unused,
184777 .unused,
184778 },
184779 .each = .{ .once = &.{
184780 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184781 .{ ._, .p_b, .shuf, .src1x, .lea(.tmp2x), ._, ._ },
184782 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184783 .{ ._, ._, .movddup, .src0x, .lea(.tmp2q), ._, ._ },
184784 .{ ._, .p_, .@"and", .src1x, .src0x, ._, ._ },
184785 .{ ._, .p_b, .cmpeq, .src1x, .src0x, ._, ._ },
184786 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184787 .{ ._, .p_b, .sub, .src0x, .src1x, ._, ._ },
184788 } },
184789 }, .{
184790 .required_features = .{ .sse3, null, null, null },
184791 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184792 .patterns = &.{
184793 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184794 },
184795 .extra_temps = .{
184796 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184797 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184798 .{ .type = .usize, .kind = .{ .rc = .sse } },
184799 .unused,
184800 .unused,
184801 .unused,
184802 .unused,
184803 .unused,
184804 .unused,
184805 .unused,
184806 .unused,
184807 },
184808 .each = .{ .once = &.{
184809 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184810 .{ ._, .p_, .unpcklbw, .src0x, .src0x, ._, ._ },
184811 .{ ._, .p_, .unpcklwd, .src0x, .src0x, ._, ._ },
184812 .{ ._, .p_, .unpckldq, .src0x, .src0x, ._, ._ },
184813 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184814 .{ ._, ._, .movddup, .tmp2x, .lea(.tmp1q), ._, ._ },
184815 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184816 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184817 } },
184818 }, .{
184819 .required_features = .{ .sse3, null, null, null },
184820 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184821 .patterns = &.{
184822 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184823 },
184824 .extra_temps = .{
184825 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184826 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184827 .{ .type = .usize, .kind = .{ .rc = .sse } },
184828 .unused,
184829 .unused,
184830 .unused,
184831 .unused,
184832 .unused,
184833 .unused,
184834 .unused,
184835 .unused,
184836 },
184837 .each = .{ .once = &.{
184838 .{ ._, ._dqa, .mov, .tmp2x, .src1x, ._, ._ },
184839 .{ ._, .p_, .unpcklbw, .tmp2x, .tmp2x, ._, ._ },
184840 .{ ._, .p_, .unpcklwd, .tmp2x, .tmp2x, ._, ._ },
184841 .{ ._, .p_, .unpckldq, .tmp2x, .tmp2x, ._, ._ },
184842 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184843 .{ ._, ._, .movddup, .src0x, .lea(.tmp1q), ._, ._ },
184844 .{ ._, .p_, .@"and", .tmp2x, .src0x, ._, ._ },
184845 .{ ._, .p_b, .cmpeq, .tmp2x, .src0x, ._, ._ },
184846 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184847 .{ ._, .p_b, .sub, .src0x, .tmp2x, ._, ._ },
184848 } },
184849 }, .{
184850 .required_features = .{ .sse2, null, null, null },
184851 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184852 .patterns = &.{
184853 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184854 },
184855 .extra_temps = .{
184856 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184857 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184858 .{ .type = .usize, .kind = .{ .rc = .sse } },
184859 .unused,
184860 .unused,
184861 .unused,
184862 .unused,
184863 .unused,
184864 .unused,
184865 .unused,
184866 .unused,
184867 },
184868 .each = .{ .once = &.{
184869 .{ ._, ._dqa, .mov, .src0x, .src1x, ._, ._ },
184870 .{ ._, .p_, .unpcklbw, .src0x, .src0x, ._, ._ },
184871 .{ ._, .p_, .unpcklwd, .src0x, .src0x, ._, ._ },
184872 .{ ._, .p_, .unpckldq, .src0x, .src0x, ._, ._ },
184873 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184874 .{ ._, ._dqa, .mov, .tmp2x, .lea(.tmp1x), ._, ._ },
184875 .{ ._, .p_, .@"and", .src0x, .tmp2x, ._, ._ },
184876 .{ ._, .p_b, .cmpeq, .src0x, .tmp2x, ._, ._ },
184877 } },
184878 }, .{
184879 .required_features = .{ .sse2, null, null, null },
184880 .src_constraints = .{ .{ .exact_bool_vec = 16 }, .{ .exact_bool_vec = 16 }, .any },
184881 .patterns = &.{
184882 .{ .src = .{ .{ .reg_mask = .{ .size = .xword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
184883 },
184884 .extra_temps = .{
184885 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184886 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184887 .{ .type = .usize, .kind = .{ .rc = .sse } },
184888 .unused,
184889 .unused,
184890 .unused,
184891 .unused,
184892 .unused,
184893 .unused,
184894 .unused,
184895 .unused,
184896 },
184897 .each = .{ .once = &.{
184898 .{ ._, ._dqa, .mov, .tmp2x, .src1x, ._, ._ },
184899 .{ ._, .p_, .unpcklbw, .tmp2x, .tmp2x, ._, ._ },
184900 .{ ._, .p_, .unpcklwd, .tmp2x, .tmp2x, ._, ._ },
184901 .{ ._, .p_, .unpckldq, .tmp2x, .tmp2x, ._, ._ },
184902 .{ ._, ._, .lea, .tmp1p, .mem(.tmp0), ._, ._ },
184903 .{ ._, ._dqa, .mov, .src0x, .lea(.tmp1x), ._, ._ },
184904 .{ ._, .p_, .@"and", .tmp2x, .src0x, ._, ._ },
184905 .{ ._, .p_b, .cmpeq, .tmp2x, .src0x, ._, ._ },
184906 .{ ._, .p_, .xor, .src0x, .src0x, ._, ._ },
184907 .{ ._, .p_b, .sub, .src0x, .tmp2x, ._, ._ },
184908 } },
184909 }, .{
184910 .required_features = .{ .avx2, null, null, null },
184911 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
184912 .patterns = &.{
184913 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_sign_extend, .is = .uninverted } }, .mem, .none } },
184914 },
184915 .extra_temps = .{
184916 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
184917 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184918 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184919 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
184920 .unused,
184921 .unused,
184922 .unused,
184923 .unused,
184924 .unused,
184925 .unused,
184926 .unused,
184927 },
184928 .each = .{ .once = &.{
184929 .{ ._, .vp_d, .broadcast, .src0y, .src1d, ._, ._ },
184930 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184931 .{ ._, .vp_b, .shuf, .src0y, .src0y, .lea(.tmp2y), ._ },
184932 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184933 .{ ._, .vp_q, .broadcast, .tmp3y, .lea(.tmp2q), ._, ._ },
184934 .{ ._, .vp_, .@"and", .src0y, .src0y, .tmp3y, ._ },
184935 .{ ._, .vp_b, .cmpeq, .src0y, .src0y, .tmp3y, ._ },
184936 } },
184937 }, .{
184938 .required_features = .{ .avx2, null, null, null },
184939 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
184940 .patterns = &.{
184941 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
184942 },
184943 .extra_temps = .{
184944 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
184945 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184946 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184947 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
184948 .unused,
184949 .unused,
184950 .unused,
184951 .unused,
184952 .unused,
184953 .unused,
184954 .unused,
184955 },
184956 .each = .{ .once = &.{
184957 .{ ._, .vp_d, .broadcast, .src0y, .src1x, ._, ._ },
184958 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184959 .{ ._, .vp_b, .shuf, .src0y, .src0y, .lea(.tmp2y), ._ },
184960 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184961 .{ ._, .vp_q, .broadcast, .tmp3y, .lea(.tmp2q), ._, ._ },
184962 .{ ._, .vp_, .@"and", .src0y, .src0y, .tmp3y, ._ },
184963 .{ ._, .vp_b, .cmpeq, .src0y, .src0y, .tmp3y, ._ },
184964 } },
184965 }, .{
184966 .required_features = .{ .avx2, null, null, null },
184967 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
184968 .patterns = &.{
184969 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_zero_extend, .is = .uninverted } }, .mem, .none } },
184970 },
184971 .extra_temps = .{
184972 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
184973 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
184974 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
184975 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
184976 .unused,
184977 .unused,
184978 .unused,
184979 .unused,
184980 .unused,
184981 .unused,
184982 .unused,
184983 },
184984 .each = .{ .once = &.{
184985 .{ ._, .vp_d, .broadcast, .src0y, .src1d, ._, ._ },
184986 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
184987 .{ ._, .vp_b, .shuf, .src0y, .src0y, .lea(.tmp2y), ._ },
184988 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
184989 .{ ._, .vp_q, .broadcast, .tmp3y, .lea(.tmp2q), ._, ._ },
184990 .{ ._, .vp_, .@"and", .src0y, .src0y, .tmp3y, ._ },
184991 .{ ._, .vp_b, .cmpeq, .src0y, .src0y, .tmp3y, ._ },
184992 .{ ._, .vp_, .xor, .tmp3y, .tmp3y, .tmp3y, ._ },
184993 .{ ._, .vp_b, .sub, .src0y, .tmp3y, .src0y, ._ },
184994 } },
184995 }, .{
184996 .required_features = .{ .avx2, null, null, null },
184997 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
184998 .patterns = &.{
184999 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
185000 },
185001 .extra_temps = .{
185002 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
185003 .{ .type = .vector_8_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
185004 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
185005 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
185006 .unused,
185007 .unused,
185008 .unused,
185009 .unused,
185010 .unused,
185011 .unused,
185012 .unused,
185013 },
185014 .each = .{ .once = &.{
185015 .{ ._, .vp_d, .broadcast, .src0y, .src1x, ._, ._ },
185016 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
185017 .{ ._, .vp_b, .shuf, .src0y, .src0y, .lea(.tmp2y), ._ },
185018 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
185019 .{ ._, .vp_q, .broadcast, .tmp3y, .lea(.tmp2q), ._, ._ },
185020 .{ ._, .vp_, .@"and", .src0y, .src0y, .tmp3y, ._ },
185021 .{ ._, .vp_b, .cmpeq, .src0y, .src0y, .tmp3y, ._ },
185022 .{ ._, .vp_, .xor, .tmp3y, .tmp3y, .tmp3y, ._ },
185023 .{ ._, .vp_b, .sub, .src0y, .tmp3y, .src0y, ._ },
185024 } },
185025 }, .{
185026 .required_features = .{ .avx, null, null, null },
185027 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
185028 .patterns = &.{
185029 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_sign_extend, .is = .uninverted } }, .to_sse, .none } },
185030 },
185031 .extra_temps = .{
185032 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
185033 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
185034 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
185035 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
185036 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
185037 .unused,
185038 .unused,
185039 .unused,
185040 .unused,
185041 .unused,
185042 .unused,
185043 },
185044 .each = .{ .once = &.{
185045 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
185046 .{ ._, .vp_b, .shuf, .tmp3x, .src1x, .lea(.tmp2y), ._ },
185047 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lead(.tmp2y, 16), ._ },
185048 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
185049 .{ ._, .v_dqa, .mov, .tmp4x, .lea(.tmp2x), ._, ._ },
185050 .{ ._, .vp_, .@"and", .tmp3x, .tmp3x, .tmp4x, ._ },
185051 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp4x, ._ },
185052 .{ ._, .vp_b, .cmpeq, .tmp3x, .tmp3x, .tmp4x, ._ },
185053 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp4x, ._ },
185054 .{ ._, .v_f128, .insert, .src0y, .tmp3y, .src0x, .ui(1) },
185055 } },
185056 }, .{
185057 .required_features = .{ .avx, null, null, null },
185058 .src_constraints = .{ .{ .exact_bool_vec = 32 }, .{ .exact_bool_vec = 32 }, .any },
185059 .patterns = &.{
185060 .{ .src = .{ .{ .reg_mask = .{ .size = .yword, .kind = .from_zero_extend, .is = .uninverted } }, .to_sse, .none } },
185061 },
185062 .extra_temps = .{
185063 .{ .type = .vector_32_u8, .kind = .{ .pshufb_bytes_mem = .{ .direction = .forward, .size = .dword, .smear = 8 } } },
185064 .{ .type = .vector_16_u8, .kind = .{ .bits_mem = .{ .direction = .forward } } },
185065 .{ .type = .usize, .kind = .{ .rc = .general_purpose } },
185066 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
185067 .{ .type = .vector_32_u8, .kind = .{ .rc = .sse } },
185068 .unused,
185069 .unused,
185070 .unused,
185071 .unused,
185072 .unused,
185073 .unused,
185074 },
185075 .each = .{ .once = &.{
185076 .{ ._, ._, .lea, .tmp2p, .mem(.tmp0), ._, ._ },
185077 .{ ._, .vp_b, .shuf, .tmp3x, .src1x, .lea(.tmp2y), ._ },
185078 .{ ._, .vp_b, .shuf, .src0x, .src1x, .lead(.tmp2y, 16), ._ },
185079 .{ ._, ._, .lea, .tmp2p, .mem(.tmp1), ._, ._ },
185080 .{ ._, .v_dqa, .mov, .tmp4x, .lea(.tmp2x), ._, ._ },
185081 .{ ._, .vp_, .@"and", .tmp3x, .tmp3x, .tmp4x, ._ },
185082 .{ ._, .vp_, .@"and", .src0x, .src0x, .tmp4x, ._ },
185083 .{ ._, .vp_b, .cmpeq, .tmp3x, .tmp3x, .tmp4x, ._ },
185084 .{ ._, .vp_b, .cmpeq, .src0x, .src0x, .tmp4x, ._ },
185085 .{ ._, .vp_, .xor, .tmp4x, .tmp4x, .tmp4x, ._ },
185086 .{ ._, .vp_b, .sub, .tmp3x, .tmp4x, .tmp3x, ._ },
185087 .{ ._, .vp_b, .sub, .src0x, .tmp4x, .src0x, ._ },
185088 .{ ._, .v_f128, .insert, .src0y, .tmp3y, .src0x, .ui(1) },
185089 } },
185090 } });
185091 dst.*, src.* = ops;
185092 }
185093
182961185094 fn wrapInt(temp: *Temp, cg: *CodeGen) Select.Error!void {
182962185095 var ops: [1]Temp = .{temp.*};
182963185096 var res: [1]Temp = undefined;
......@@ -187486,7 +189619,13 @@ const Temp = struct {
187486189619 .unreach,
187487189620 .dead,
187488189621 .indirect_load_frame,
187489 .elementwise_args,
189622 .indirect_mask,
189623 .register_tee,
189624 .elementwise_gpr,
189625 .elementwise_sse,
189626 .xwordwise_sse,
189627 .ywordwise_sse,
189628 .zwordwise_sse,
187490189629 .reserved_frame,
187491189630 .air_ref,
187492189631 => unreachable,
......@@ -188336,25 +190475,60 @@ const Select = struct {
188336190475 to_sse,
188337190476 mut_sse,
188338190477 to_mut_sse,
188339 reg_mask: RegMaskSpec,
188340 all_reg_mask: RegMaskSpec,
188341
188342 const RegMaskSpec = struct {
190478 reg_mask: struct {
188343190479 size: Memory.Size,
190480 kind: enum {
190481 any,
190482 lsb,
190483 msb,
190484 zero_extend,
190485 sign_extend,
190486 from_lsb,
190487 from_msb,
190488 from_zero_extend,
190489 from_sign_extend,
190490 },
188344190491 is: enum {
188345190492 any,
188346190493 uninverted,
188347190494 inverted,
188348
188349 fn matches(is: @This(), inverted: bool) bool {
188350 return switch (is) {
188351 .any => true,
188352 .uninverted => !inverted,
188353 .inverted => inverted,
188354 };
188355 }
188356190495 } = .any,
188357 };
190496
190497 fn matches(spec: @This(), info: MaskInfo) bool {
190498 return switch (spec.kind) {
190499 .any => true,
190500 .lsb => switch (info.kind) {
190501 .lsb, .msb, .zero_extend, .sign_extend => true,
190502 },
190503 .msb => switch (info.kind) {
190504 .lsb, .zero_extend => false,
190505 .msb, .sign_extend => true,
190506 },
190507 .zero_extend => info.kind == .zero_extend,
190508 .sign_extend => info.kind == .sign_extend,
190509 .from_lsb => switch (info.kind) {
190510 .lsb => true,
190511 .msb, .zero_extend, .sign_extend => false,
190512 },
190513 .from_msb => switch (info.kind) {
190514 .lsb, .msb => true,
190515 .zero_extend, .sign_extend => false,
190516 },
190517 .from_sign_extend => switch (info.kind) {
190518 .lsb, .msb, .sign_extend => true,
190519 .zero_extend => false,
190520 },
190521 .from_zero_extend => switch (info.kind) {
190522 .lsb, .zero_extend => true,
190523 .msb, .sign_extend => false,
190524 },
190525 } and switch (spec.is) {
190526 .any => true,
190527 .uninverted => !info.inverted,
190528 .inverted => info.inverted,
190529 };
190530 }
190531 },
188358190532
188359190533 fn matches(src: Src, temp: Temp, cg: *CodeGen) bool {
188360190534 return switch (src) {
......@@ -188439,13 +190613,7 @@ const Select = struct {
188439190613 .reg_mask => |mask_spec| switch (temp.tracking(cg).short) {
188440190614 .register_mask => |reg_mask| mask_spec.size.bitSize(cg.target) >=
188441190615 reg_mask.info.scalar.bitSize(cg.target) * temp.typeOf(cg).vectorLen(cg.pt.zcu) and
188442 mask_spec.is.matches(reg_mask.info.inverted),
188443 else => false,
188444 },
188445 .all_reg_mask => |mask_spec| switch (temp.tracking(cg).short) {
188446 .register_mask => |reg_mask| mask_spec.size.bitSize(cg.target) ==
188447 reg_mask.info.scalar.bitSize(cg.target) * temp.typeOf(cg).vectorLen(cg.pt.zcu) and
188448 reg_mask.info.kind == .all and mask_spec.is.matches(reg_mask.info.inverted),
190616 mask_spec.matches(reg_mask.info),
188449190617 else => false,
188450190618 },
188451190619 };
......@@ -188453,7 +190621,7 @@ const Select = struct {
188453190621
188454190622 fn convert(src: Src, temp: *Temp, cg: *CodeGen) InnerError!bool {
188455190623 return switch (src) {
188456 .none, .any, .imm, .imm8, .imm16, .imm32, .simm32, .reg_mask, .all_reg_mask => false,
190624 .none, .any, .imm, .imm8, .imm16, .imm32, .simm32, .reg_mask => false,
188457190625 .mem, .to_mem => try temp.toBase(false, cg),
188458190626 .mut_mem, .to_mut_mem => try temp.toBase(true, cg),
188459190627 .to_reg => |reg| try temp.toReg(reg, cg),
......@@ -188524,8 +190692,8 @@ const Select = struct {
188524190692 pand_trunc_mem: struct { from: Memory.Size, to: Memory.Size },
188525190693 pand_mask_mem: struct { ref: Select.Operand.Ref, invert: bool = false },
188526190694 ptest_mask_mem: Select.Operand.Ref,
188527 pshufb_bswap_mem: struct { repeat: u4 = 1, size: Memory.Size, smear: u4 = 1 },
188528 bits_mem: enum { forward, reverse },
190695 pshufb_bytes_mem: struct { direction: Direction, repeat: u4 = 1, size: Memory.Size, smear: u4 = 1 },
190696 bits_mem: struct { direction: Direction, smear: u4 = 1 },
188529190697 splat_int_mem: struct { ref: Select.Operand.Ref, inside: enum { umin, smin, smax } = .umin, outside: enum { smin, smax } },
188530190698 splat_float_mem: struct { ref: Select.Operand.Ref, inside: enum { zero } = .zero, outside: f16 },
188531190699 frame: FrameIndex,
......@@ -188560,6 +190728,8 @@ const Select = struct {
188560190728 }
188561190729 };
188562190730
190731 const Direction = enum { forward, reverse };
190732
188563190733 fn lock(kind: Kind, cg: *CodeGen) ![2]?RegisterLock {
188564190734 var reg_locks: [2]?RegisterLock = @splat(null);
188565190735 const regs: [2]Register = switch (kind) {
......@@ -188881,11 +191051,15 @@ const Select = struct {
188881191051 var index: u7 = 0;
188882191052 for (0..@intCast(ref_ty.vectorLen(zcu))) |_| {
188883191053 switch (mask_info.kind) {
188884 .sign => {
191054 .lsb, .zero_extend => {
191055 elems[index] = 1;
191056 @memset(elems[index + 1 ..][0 .. elem_bytes - 1], std.math.minInt(u8));
191057 },
191058 .msb => {
188885191059 @memset(elems[index..][0 .. elem_bytes - 1], std.math.minInt(u8));
188886191060 elems[index + elem_bytes - 1] = @bitCast(@as(i8, std.math.minInt(i8)));
188887191061 },
188888 .all => @memset(elems[index..][0..elem_bytes], std.math.maxInt(u8)),
191062 .sign_extend => @memset(elems[index..][0..elem_bytes], std.math.maxInt(u8)),
188889191063 }
188890191064 index += elem_bytes;
188891191065 }
......@@ -188894,31 +191068,40 @@ const Select = struct {
188894191068 .storage = .{ .bytes = try zcu.intern_pool.getOrPutString(zcu.gpa, io, pt.tid, elems, .maybe_embedded_nulls) },
188895191069 } }))), true };
188896191070 },
188897 .pshufb_bswap_mem => |bswap_spec| {
191071 .pshufb_bytes_mem => |bytes_spec| {
188898191072 const zcu = pt.zcu;
188899191073 assert(spec.type.isVector(zcu) and spec.type.childType(zcu).toIntern() == .u8_type);
188900191074 var elem_buf: [32]u8 = @splat(1 << 7);
188901191075 const elems = elem_buf[0..spec.type.vectorLen(zcu)];
188902 const len: usize = @intCast(@divExact(bswap_spec.size.bitSize(cg.target), 8));
191076 const len: usize = @intCast(@divExact(bytes_spec.size.bitSize(cg.target), 8));
188903191077 var to_index: u6 = 0;
188904 for (0..bswap_spec.repeat) |_| for (0..len) |from_index| {
188905 @memset(elems[to_index..][0..bswap_spec.smear], @intCast(len - 1 - from_index));
188906 to_index += bswap_spec.smear;
191078 for (0..bytes_spec.repeat) |_| for (0..len) |from_index| {
191079 @memset(elems[to_index..][0..bytes_spec.smear], @intCast(switch (bytes_spec.direction) {
191080 .forward => from_index,
191081 .reverse => len - 1 - from_index,
191082 }));
191083 to_index += bytes_spec.smear;
188907191084 };
188908191085 return .{ try cg.tempMemFromValue(.fromInterned(try pt.intern(.{ .aggregate = .{
188909191086 .ty = spec.type.toIntern(),
188910191087 .storage = .{ .bytes = try zcu.intern_pool.getOrPutString(zcu.gpa, io, pt.tid, elems, .maybe_embedded_nulls) },
188911191088 } }))), true };
188912191089 },
188913 .bits_mem => |direction| {
191090 .bits_mem => |bits_spec| {
188914191091 const zcu = pt.zcu;
188915191092 assert(spec.type.isVector(zcu) and spec.type.childType(zcu).toIntern() == .u8_type);
188916 var bytes: [32]u8 = undefined;
188917 const elems = bytes[0..spec.type.vectorLen(zcu)];
188918 for (elems, 0..) |*elem, index| elem.* = switch (direction) {
188919 .forward => @as(u8, 1 << 0) << @truncate(index),
188920 .reverse => @as(u8, 1 << 7) >> @truncate(index),
188921 };
191093 var elem_buf: [32]u8 = @splat(1 << 7);
191094 const elems = elem_buf[0..spec.type.vectorLen(zcu)];
191095 var from_index: u6 = 0;
191096 var to_index: u6 = 0;
191097 while (elems.len - to_index > 0) {
191098 @memset(elems[to_index..][0..bits_spec.smear], @intCast(switch (bits_spec.direction) {
191099 .forward => @as(u8, 1 << 0) << @truncate(from_index),
191100 .reverse => @as(u8, 1 << 7) >> @truncate(from_index),
191101 }));
191102 from_index += 1;
191103 to_index += bits_spec.smear;
191104 }
188922191105 return .{ try cg.tempMemFromValue(.fromInterned(try pt.intern(.{ .aggregate = .{
188923191106 .ty = spec.type.toIntern(),
188924191107 .storage = .{ .bytes = try zcu.intern_pool.getOrPutString(zcu.gpa, io, pt.tid, elems, .maybe_embedded_nulls) },
......@@ -190152,7 +192335,16 @@ const Select = struct {
190152192335 .lea_lazy_sym => |lazy_sym| .{ .imm = .{ .lazy_sym = lazy_sym } },
190153192336 .lea_extern_func => |extern_func| .{ .imm = .{ .extern_func = extern_func } },
190154192337 else => |mcv| .{ .mem = try mcv.mem(s.cg, .{ .size = op.flags.base.size }) },
190155 .lea_frame, .elementwise_args, .reserved_frame, .air_ref => unreachable,
192338 .lea_frame,
192339 .register_tee,
192340 .elementwise_gpr,
192341 .elementwise_sse,
192342 .xwordwise_sse,
192343 .ywordwise_sse,
192344 .zwordwise_sse,
192345 .reserved_frame,
192346 .air_ref,
192347 => unreachable,
190156192348 },
190157192349 1...2 => |imm| switch (op.flags.base.ref.valueOf(s)) {
190158192350 inline .register_pair, .register_triple, .register_quadruple => |regs| .{
src/codegen/x86_64/abi.zig+122-112
......@@ -24,59 +24,40 @@ pub const Class = enum {
2424 float,
2525 /// A `Class.sse` containing two `f32`s.
2626 float_combine,
27 /// Clang passes each vector element in a separate `Class.integer`, but returns as `Class.memory`.
27 /// Clang uses different element sizes depending on the vector length.
28 bool_vector_mask,
29 /// Clang passes each vector element in a separate `Class.integer`.
2830 integer_per_element,
29
30 pub const one_integer: [8]Class = .{
31 .integer, .none, .none, .none,
32 .none, .none, .none, .none,
33 };
34 pub const two_integers: [8]Class = .{
35 .integer, .integer, .none, .none,
36 .none, .none, .none, .none,
37 };
38 pub const three_integers: [8]Class = .{
39 .integer, .integer, .integer, .none,
40 .none, .none, .none, .none,
41 };
42 pub const four_integers: [8]Class = .{
43 .integer, .integer, .integer, .integer,
44 .none, .none, .none, .none,
45 };
46 pub const len_integers: [8]Class = .{
47 .integer_per_element, .none, .none, .none,
48 .none, .none, .none, .none,
49 };
31 /// Clang passes each vector element in a separate `Class.sse`.
32 sse_per_element,
33 /// Just complete insanity, idk what to say.
34 sse_sse_x87_per_qword,
35 /// Clang passes each 16 bytes in a separate `Class.sse`.
36 sse_per_xword,
37 /// Clang passes each 32 bytes in a separate `Class.sse`.
38 sse_per_yword,
39 /// Clang passes each 64 bytes in a separate `Class.sse`.
40 sse_per_zword,
41
42 pub const zero_bit: [8]Class = .{ .none, .none, .none, .none, .none, .none, .none, .none };
43
44 pub const one_integer: [8]Class = .{ .integer, .none, .none, .none, .none, .none, .none, .none };
45 pub const two_integers: [8]Class = .{ .integer, .integer, .none, .none, .none, .none, .none, .none };
46 pub const three_integers: [8]Class = .{ .integer, .integer, .integer, .none, .none, .none, .none, .none };
47 pub const four_integers: [8]Class = .{ .integer, .integer, .integer, .integer, .none, .none, .none, .none };
48 pub const len_integers: [8]Class = .{ .integer_per_element, .none, .none, .none, .none, .none, .none, .none };
5049
5150 pub const @"f16" = @"f64";
52 pub const @"f32": [8]Class = .{
53 .float, .none, .none, .none,
54 .none, .none, .none, .none,
55 };
56 pub const @"f64": [8]Class = .{
57 .sse, .none, .none, .none,
58 .none, .none, .none, .none,
59 };
60 pub const @"f80": [8]Class = .{
61 .x87, .x87up, .none, .none,
62 .none, .none, .none, .none,
63 };
64 pub const @"f128": [8]Class = .{
65 .sse, .sseup, .none, .none,
66 .none, .none, .none, .none,
67 };
51 pub const @"f32": [8]Class = .{ .float, .none, .none, .none, .none, .none, .none, .none };
52 pub const @"f64": [8]Class = .{ .sse, .none, .none, .none, .none, .none, .none, .none };
53 pub const @"f80": [8]Class = .{ .x87, .x87up, .none, .none, .none, .none, .none, .none };
54 pub const @"f128": [8]Class = .{ .sse, .sseup, .none, .none, .none, .none, .none, .none };
6855
6956 /// COMPLEX_X87: This class consists of types that will be returned via the x87
7057 /// FPU.
71 pub const complex_x87: [8]Class = .{
72 .x87, .x87up, .x87, .x87up,
73 .none, .none, .none, .none,
74 };
58 pub const complex_x87: [8]Class = .{ .x87, .x87up, .x87, .x87up, .none, .none, .none, .none };
7559
76 pub const stack: [8]Class = .{
77 .memory, .none, .none, .none,
78 .none, .none, .none, .none,
79 };
60 pub const stack: [8]Class = .{ .memory, .none, .none, .none, .none, .none, .none, .none };
8061
8162 pub fn isX87(class: Class) bool {
8263 return switch (class) {
......@@ -112,7 +93,7 @@ pub const Class = enum {
11293
11394pub const Context = enum { ret, arg, other };
11495
115pub fn classifyWindows(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Context) Class {
96pub fn classifyWindows(init_ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Context) Class {
11697 // https://docs.microsoft.com/en-gb/cpp/build/x64-calling-convention?view=vs-2017
11798 // "There's a strict one-to-one correspondence between a function call's arguments
11899 // and the registers used for those arguments. Any argument that doesn't fit in 8
......@@ -121,13 +102,13 @@ pub fn classifyWindows(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
121102 // "All floating point operations are done using the 16 XMM registers."
122103 // "Structs and unions of size 8, 16, 32, or 64 bits, and __m64 types, are passed
123104 // as if they were integers of the same size."
124 return switch (ty.zigTypeTag(zcu)) {
105 var ty = init_ty;
106 while (true) return switch (ty.zigTypeTag(zcu)) {
107 .void => return .none,
108 .bool,
125109 .pointer,
126110 .int,
127 .bool,
128111 .@"enum",
129 .void,
130 .noreturn,
131112 .error_set,
132113 .@"struct",
133114 .@"union",
......@@ -137,7 +118,7 @@ pub fn classifyWindows(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
137118 .@"anyframe",
138119 .frame,
139120 => switch (ty.abiSize(zcu)) {
140 0 => unreachable,
121 0 => .none,
141122 1, 2, 4, 8 => .integer,
142123 else => switch (ty.zigTypeTag(zcu)) {
143124 .int => .win_i128,
......@@ -148,15 +129,43 @@ pub fn classifyWindows(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
148129 else => .memory,
149130 },
150131 },
151
132 .noreturn => unreachable,
152133 .float => switch (ty.floatBits(target)) {
153134 16, 32, 64 => .sse,
154135 80 => .memory,
155136 128 => if (ctx == .arg) .memory else .sse,
156137 else => unreachable,
157138 },
158 .vector => .sse,
159
139 .vector => {
140 const len = ty.vectorLen(zcu);
141 if (len == 0) return .none;
142 const elem_ty = ty.childType(zcu);
143 if (len == 1) {
144 ty = elem_ty;
145 continue;
146 }
147 const reg_size: u64, const split_class: Class = if (target.cpu.has(.x86, .avx512f))
148 .{ 64, .sse_per_zword }
149 else if (target.cpu.has(.x86, .avx))
150 .{ 32, .sse_per_yword }
151 else
152 .{ 16, .sse_per_xword };
153 if (elem_ty.toIntern() == .bool_type) {
154 if (len > reg_size) return if (ctx == .arg) .integer_per_element else .memory;
155 return .bool_vector_mask;
156 }
157 const elem_size = elem_ty.abiSize(zcu);
158 const unaligned_size = elem_size * len;
159 if ((unaligned_size <= 8 or unaligned_size > reg_size) and !std.math.isPowerOfTwo(len)) {
160 if (ctx == .ret and len > Win64.c_abi_int_return_regs.len) return .memory;
161 if (!elem_ty.isRuntimeFloat()) return .integer_per_element;
162 if (ctx == .ret and len > 2 and elem_size == 8) return .sse_sse_x87_per_qword;
163 return .sse_per_element;
164 }
165 if (unaligned_size <= reg_size) return if (ctx == .arg) .memory else .sse;
166 if (ctx == .ret and unaligned_size > reg_size * Win64.c_abi_sse_return_regs.len) return .memory;
167 return split_class;
168 },
160169 .type,
161170 .comptime_float,
162171 .comptime_int,
......@@ -174,19 +183,18 @@ pub fn classifyWindows(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
174183/// the beginning of the array; unused slots are filled with .none.
175184pub fn classifySystemV(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Context) [8]Class {
176185 switch (ty.zigTypeTag(zcu)) {
177 .pointer => switch (ty.ptrSize(zcu)) {
178 .slice => return Class.two_integers,
179 else => return Class.one_integer,
180 },
186 .void => return Class.zero_bit,
187 .bool => return Class.one_integer,
188 .noreturn => unreachable,
181189 .int, .@"enum", .error_set => {
182190 const bits = ty.intInfo(zcu).bits;
191 if (bits == 0) return Class.zero_bit;
183192 if (bits <= 64 * 1) return Class.one_integer;
184193 if (bits <= 64 * 2) return Class.two_integers;
185194 if (bits <= 64 * 3) return Class.three_integers;
186195 if (bits <= 64 * 4) return Class.four_integers;
187196 return Class.stack;
188197 },
189 .bool, .void, .noreturn => return Class.one_integer,
190198 .float => switch (ty.floatBits(target)) {
191199 16 => {
192200 if (ctx == .other) return Class.stack;
......@@ -205,61 +213,61 @@ pub fn classifySystemV(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
205213 80 => return Class.f80,
206214 else => unreachable,
207215 },
216 .pointer => switch (ty.ptrSize(zcu)) {
217 .slice => return Class.two_integers,
218 else => return Class.one_integer,
219 },
208220 .vector => {
221 const len = ty.vectorLen(zcu);
222 if (len == 0) return Class.zero_bit;
209223 const elem_ty = ty.childType(zcu);
210 const bits = elem_ty.bitSize(zcu) * ty.arrayLen(zcu);
211224 if (elem_ty.toIntern() == .bool_type) {
212 if (bits <= 32) return Class.one_integer;
213 if (bits <= 64) return Class.f64;
214 if (ctx == .other) return Class.stack;
215 if (bits <= 128) return Class.len_integers;
216 if (bits <= 256 and target.cpu.has(.x86, .avx)) return Class.len_integers;
217 if (bits <= 512 and target.cpu.has(.x86, .avx512f)) return Class.len_integers;
225 if (len <= 32) return Class.one_integer;
226 if (len <= 64) return Class.f64;
227 if (ctx != .arg) return Class.stack;
228 if (len <= 128) return Class.len_integers;
229 if (len <= 256 and target.cpu.has(.x86, .avx)) return Class.len_integers;
230 if (len <= 512 and target.cpu.has(.x86, .avx512f)) return Class.len_integers;
218231 return Class.stack;
219232 }
220 if (elem_ty.isRuntimeFloat() and elem_ty.floatBits(target) == 80) {
221 if (bits <= 80 * 1) return Class.f80;
222 if (bits <= 80 * 2) return Class.complex_x87;
233 if (elem_ty.isRuntimeFloat() and elem_ty.floatBits(target) == 80) switch (len) {
234 0 => unreachable,
235 1 => return Class.f80,
236 2 => return Class.complex_x87,
237 else => return Class.stack,
238 };
239 const unaligned_size = elem_ty.abiSize(zcu) * len;
240 if (unaligned_size <= 4) return Class.one_integer;
241 if (ctx == .arg and unaligned_size == 8 * 1 * 1 and len == 1 and
242 elem_ty.isRuntimeFloat()) return Class.stack; // what
243 if (unaligned_size <= 8 * 1) return .{ .sse, .none, .none, .none, .none, .none, .none, .none };
244 if (unaligned_size <= 8 * 2) return .{ .sse, .sseup, .none, .none, .none, .none, .none, .none };
245 if (!target.cpu.has(.x86, .avx)) {
246 if (ctx == .ret) switch (unaligned_size) {
247 else => {},
248 8 * 3 => if (len == 3) return if (elem_ty.isRuntimeFloat()) .{
249 .sse_sse_x87_per_qword, .none, .none, .none, .none, .none, .none, .none, // how
250 } else Class.len_integers, // why
251 8 * 2 * 2, 8 * 2 * 4 => return .{ .sse_per_xword, .none, .none, .none, .none, .none, .none, .none },
252 };
223253 return Class.stack;
224254 }
225 if (bits <= 64 * 1) return .{
226 .sse, .none, .none, .none,
227 .none, .none, .none, .none,
228 };
229 if (bits <= 64 * 2) return .{
230 .sse, .sseup, .none, .none,
231 .none, .none, .none, .none,
232 };
233 if (ctx == .arg and !target.cpu.has(.x86, .avx)) return Class.stack;
234 if (bits <= 64 * 3) return .{
235 .sse, .sseup, .sseup, .none,
236 .none, .none, .none, .none,
237 };
238 if (bits <= 64 * 4) return .{
239 .sse, .sseup, .sseup, .sseup,
240 .none, .none, .none, .none,
241 };
242 if (ctx == .arg and !target.cpu.has(.x86, .avx512f)) return Class.stack;
243 if (bits <= 64 * 5) return .{
244 .sse, .sseup, .sseup, .sseup,
245 .sseup, .none, .none, .none,
246 };
247 if (bits <= 64 * 6) return .{
248 .sse, .sseup, .sseup, .sseup,
249 .sseup, .sseup, .none, .none,
250 };
251 if (bits <= 64 * 7) return .{
252 .sse, .sseup, .sseup, .sseup,
253 .sseup, .sseup, .sseup, .none,
254 };
255 if (bits <= 64 * 8 or (ctx == .ret and bits <= @as(u64, if (target.cpu.has(.x86, .avx512f))
256 64 * 32
257 else if (target.cpu.has(.x86, .avx))
258 64 * 16
259 else
260 64 * 8))) return .{
261 .sse, .sseup, .sseup, .sseup,
262 .sseup, .sseup, .sseup, .sseup,
255 if (unaligned_size <= 8 * 3) return .{ .sse, .sseup, .sseup, .none, .none, .none, .none, .none };
256 if (unaligned_size <= 8 * 4) return .{ .sse, .sseup, .sseup, .sseup, .none, .none, .none, .none };
257 if (!target.cpu.has(.x86, .avx512f)) {
258 if (ctx == .ret) switch (unaligned_size) {
259 else => {},
260 8 * 4 * 2, 8 * 4 * 4 => return .{ .sse_per_yword, .none, .none, .none, .none, .none, .none, .none },
261 };
262 return Class.stack;
263 }
264 if (unaligned_size <= 8 * 5) return .{ .sse, .sseup, .sseup, .sseup, .sseup, .none, .none, .none };
265 if (unaligned_size <= 8 * 6) return .{ .sse, .sseup, .sseup, .sseup, .sseup, .sseup, .none, .none };
266 if (unaligned_size <= 8 * 7) return .{ .sse, .sseup, .sseup, .sseup, .sseup, .sseup, .sseup, .none };
267 if (unaligned_size <= 8 * 8) return .{ .sse, .sseup, .sseup, .sseup, .sseup, .sseup, .sseup, .sseup };
268 if (ctx == .ret) switch (unaligned_size) {
269 else => {},
270 8 * 8 * 2, 8 * 8 * 4 => return .{ .sse_per_zword, .none, .none, .none, .none, .none, .none, .none },
263271 };
264272 return Class.stack;
265273 },
......@@ -275,6 +283,7 @@ pub fn classifySystemV(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
275283 // "If the size of the aggregate exceeds a single eightbyte, each is classified
276284 // separately.".
277285 const ty_size = ty.abiSize(zcu);
286 if (ty_size == 0) return Class.zero_bit;
278287 switch (ty.containerLayout(zcu)) {
279288 .auto => unreachable,
280289 .@"extern" => {},
......@@ -325,6 +334,7 @@ pub fn classifySystemV(ty: Type, zcu: *Zcu, target: *const std.Target, ctx: Cont
325334 },
326335 .array => {
327336 const ty_size = ty.abiSize(zcu);
337 if (ty_size == 0) return Class.zero_bit;
328338 if (ty_size <= 8) return Class.one_integer;
329339 if (ty_size <= 16) return Class.two_integers;
330340 return Class.stack;
......@@ -457,7 +467,7 @@ pub const SysV = struct {
457467 pub const c_abi_int_param_regs = [_]Register{ .rdi, .rsi, .rdx, .rcx, .r8, .r9 };
458468 pub const c_abi_x87_param_regs = x87_regs[0..0];
459469 pub const c_abi_sse_param_regs = sse_avx_regs[0..8];
460 pub const c_abi_int_return_regs = [_]Register{ .rax, .rdx };
470 pub const c_abi_int_return_regs = [_]Register{ .rax, .rdx, .rcx };
461471 pub const c_abi_x87_return_regs = x87_regs[0..2];
462472 pub const c_abi_sse_return_regs = sse_avx_regs[0..4];
463473};
......@@ -474,9 +484,9 @@ pub const Win64 = struct {
474484 pub const c_abi_int_param_regs = [_]Register{ .rcx, .rdx, .r8, .r9 };
475485 pub const c_abi_x87_param_regs = x87_regs[0..0];
476486 pub const c_abi_sse_param_regs = sse_avx_regs[0..4];
477 pub const c_abi_int_return_regs = [_]Register{.rax};
478 pub const c_abi_x87_return_regs = x87_regs[0..0];
479 pub const c_abi_sse_return_regs = sse_avx_regs[0..1];
487 pub const c_abi_int_return_regs = [_]Register{ .rax, .rdx, .rcx };
488 pub const c_abi_x87_return_regs = x87_regs[0..1];
489 pub const c_abi_sse_return_regs = sse_avx_regs[0..4];
480490};
481491
482492pub fn getCalleePreservedRegs(cc: std.lang.CallingConvention.Tag) []const Register {
src/dev.zig+14
......@@ -52,6 +52,10 @@ pub const Env = enum {
5252 /// - `zig build-* -fincremental -fno-llvm -fno-lld -target x86_64-linux --listen=-`
5353 @"x86_64-linux",
5454
55 /// - sema
56 /// - `zig build-* -fincremental -fno-llvm -fno-lld -target x86_64-windows --listen=-`
57 @"x86_64-windows",
58
5559 pub inline fn supports(comptime dev_env: Env, comptime feature: Feature) bool {
5660 return switch (dev_env) {
5761 .full => true,
......@@ -216,6 +220,16 @@ pub const Env = enum {
216220 => true,
217221 else => Env.sema.supports(feature),
218222 },
223 .@"x86_64-windows" => switch (feature) {
224 .build_command,
225 .stdio_listen,
226 .incremental,
227 .legalize,
228 .x86_64_backend,
229 .coff2_linker,
230 => true,
231 else => Env.sema.supports(feature),
232 },
219233 };
220234 }
221235
src/link.zig+2-2
......@@ -933,8 +933,8 @@ pub const File = struct {
933933 // Until then, we do `lld -r -o output.o input.o` even though the output is the same
934934 // as the input. For the preprocessing case (`zig cc -E -o foo`) we copy the file
935935 // to the final location. See also the corresponding TODO in Coff linking.
936 assert(comp.c_object_table.count() == 1);
937 const the_key = comp.c_object_table.keys()[0];
936 assert(comp.c_objects.items.len == 1);
937 const the_key = comp.c_objects.items[0];
938938 const cached_pp_file_path = the_key.status.success.object_path;
939939 Io.Dir.copyFile(
940940 cached_pp_file_path.root_dir.handle,
src/link/Lld.zig+20-20
......@@ -313,14 +313,14 @@ fn linkAsArchive(lld: *Lld, arena: Allocator) !void {
313313 object_files.appendAssumeCapacity(try input.path().?.toStringZ(arena));
314314 }
315315
316 try object_files.ensureUnusedCapacity(arena, comp.c_object_table.count() +
317 comp.win32_resource_table.count() + 2);
316 try object_files.ensureUnusedCapacity(arena, comp.c_objects.items.len +
317 comp.win32_resources.items.len + 2);
318318
319 for (comp.c_object_table.keys()) |key| {
320 object_files.appendAssumeCapacity(try key.status.success.object_path.toStringZ(arena));
319 for (comp.c_objects.items) |c_object| {
320 object_files.appendAssumeCapacity(try c_object.status.success.object_path.toStringZ(arena));
321321 }
322 for (comp.win32_resource_table.keys()) |key| {
323 object_files.appendAssumeCapacity(try arena.dupeSentinel(u8, key.status.success.res_path, 0));
322 for (comp.win32_resources.items) |win32_resource| {
323 object_files.appendAssumeCapacity(try arena.dupeSentinel(u8, win32_resource.status.success.res_path, 0));
324324 }
325325 if (zcu_obj_path) |p| object_files.appendAssumeCapacity(try p.toStringZ(arena));
326326 if (compiler_rt_path) |p| object_files.appendAssumeCapacity(try p.toStringZ(arena));
......@@ -395,8 +395,8 @@ fn coffLink(lld: *Lld, arena: Allocator) !void {
395395 const the_object_path = blk: {
396396 if (link.firstObjectInput(comp.link_inputs)) |obj| break :blk obj.path;
397397
398 if (comp.c_object_table.count() != 0)
399 break :blk comp.c_object_table.keys()[0].status.success.object_path;
398 if (comp.c_objects.items.len != 0)
399 break :blk comp.c_objects.items[0].status.success.object_path;
400400
401401 if (zcu_obj_path) |p|
402402 break :blk p;
......@@ -546,12 +546,12 @@ fn coffLink(lld: *Lld, arena: Allocator) !void {
546546 },
547547 };
548548
549 for (comp.c_object_table.keys()) |key| {
550 try argv.append(try key.status.success.object_path.toString(arena));
549 for (comp.c_objects.items) |c_object| {
550 try argv.append(try c_object.status.success.object_path.toString(arena));
551551 }
552552
553 for (comp.win32_resource_table.keys()) |key| {
554 try argv.append(key.status.success.res_path);
553 for (comp.win32_resources.items) |win32_resource| {
554 try argv.append(win32_resource.status.success.res_path);
555555 }
556556
557557 if (zcu_obj_path) |p| {
......@@ -805,8 +805,8 @@ fn elfLink(lld: *Lld, arena: Allocator) !void {
805805 const the_object_path = blk: {
806806 if (link.firstObjectInput(comp.link_inputs)) |obj| break :blk obj.path;
807807
808 if (comp.c_object_table.count() != 0)
809 break :blk comp.c_object_table.keys()[0].status.success.object_path;
808 if (comp.c_objects.items.len != 0)
809 break :blk comp.c_objects.items[0].status.success.object_path;
810810
811811 if (zcu_obj_path) |p|
812812 break :blk p;
......@@ -1099,8 +1099,8 @@ fn elfLink(lld: *Lld, arena: Allocator) !void {
10991099 whole_archive = false;
11001100 }
11011101
1102 for (comp.c_object_table.keys()) |key| {
1103 try argv.append(try key.status.success.object_path.toString(arena));
1102 for (comp.c_objects.items) |c_object| {
1103 try argv.append(try c_object.status.success.object_path.toString(arena));
11041104 }
11051105
11061106 if (zcu_obj_path) |p| {
......@@ -1381,8 +1381,8 @@ fn wasmLink(lld: *Lld, arena: Allocator) !void {
13811381 const the_object_path = blk: {
13821382 if (link.firstObjectInput(comp.link_inputs)) |obj| break :blk obj.path;
13831383
1384 if (comp.c_object_table.count() != 0)
1385 break :blk comp.c_object_table.keys()[0].status.success.object_path;
1384 if (comp.c_objects.items.len != 0)
1385 break :blk comp.c_objects.items[0].status.success.object_path;
13861386
13871387 if (zcu_obj_path) |p|
13881388 break :blk p;
......@@ -1566,8 +1566,8 @@ fn wasmLink(lld: *Lld, arena: Allocator) !void {
15661566 whole_archive = false;
15671567 }
15681568
1569 for (comp.c_object_table.keys()) |key| {
1570 try argv.append(try key.status.success.object_path.toString(arena));
1569 for (comp.c_objects.items) |c_object| {
1570 try argv.append(try c_object.status.success.object_path.toString(arena));
15711571 }
15721572 if (zcu_obj_path) |p| {
15731573 try argv.append(try p.toString(arena));
src/link/MachO.zig+7-7
......@@ -377,9 +377,9 @@ pub fn flush(
377377 // This is a set of object files emitted by clang in a single `build-exe` invocation.
378378 // For instance, the implicit `a.o` as compiled by `zig build-exe a.c` will end up
379379 // in this set.
380 try positionals.ensureUnusedCapacity(comp.c_object_table.keys().len);
381 for (comp.c_object_table.keys()) |key| {
382 positionals.appendAssumeCapacity(try link.openObjectInput(io, diags, key.status.success.object_path));
380 try positionals.ensureUnusedCapacity(comp.c_objects.items.len);
381 for (comp.c_objects.items) |c_object| {
382 positionals.appendAssumeCapacity(try link.openObjectInput(io, diags, c_object.status.success.object_path));
383383 }
384384
385385 if (zcu_obj_path) |path| try positionals.append(try link.openObjectInput(io, diags, path));
......@@ -657,8 +657,8 @@ fn dumpArgv(self: *MachO, comp: *Compilation) !void {
657657 .dso_exact => |dso_exact| try argv.appendSlice(&.{ "-l", dso_exact.name }),
658658 };
659659
660 for (comp.c_object_table.keys()) |key| {
661 try argv.append(try key.status.success.object_path.toString(arena));
660 for (comp.c_objects.items) |c_object| {
661 try argv.append(try c_object.status.success.object_path.toString(arena));
662662 }
663663
664664 if (zcu_obj_path) |p| {
......@@ -749,8 +749,8 @@ fn dumpArgv(self: *MachO, comp: *Compilation) !void {
749749 .dso_exact => |dso_exact| try argv.appendSlice(&.{ "-l", dso_exact.name }),
750750 };
751751
752 for (comp.c_object_table.keys()) |key| {
753 try argv.append(try key.status.success.object_path.toString(arena));
752 for (comp.c_objects.items) |c_object| {
753 try argv.append(try c_object.status.success.object_path.toString(arena));
754754 }
755755
756756 if (zcu_obj_path) |p| {
src/link/MachO/relocatable.zig+4-4
......@@ -9,8 +9,8 @@ pub fn flushObject(macho_file: *MachO, comp: *Compilation, module_obj_path: ?Pat
99 try positionals.ensureUnusedCapacity(comp.link_inputs.len);
1010 positionals.appendSliceAssumeCapacity(comp.link_inputs);
1111
12 for (comp.c_object_table.keys()) |key| {
13 try positionals.append(try link.openObjectInput(io, diags, key.status.success.object_path));
12 for (comp.c_objects.items) |c_object| {
13 try positionals.append(try link.openObjectInput(io, diags, c_object.status.success.object_path));
1414 }
1515
1616 if (module_obj_path) |path| try positionals.append(try link.openObjectInput(io, diags, path));
......@@ -86,8 +86,8 @@ pub fn flushStaticLib(macho_file: *MachO, comp: *Compilation, module_obj_path: ?
8686 try positionals.ensureUnusedCapacity(comp.link_inputs.len);
8787 positionals.appendSliceAssumeCapacity(comp.link_inputs);
8888
89 for (comp.c_object_table.keys()) |key| {
90 try positionals.append(try link.openObjectInput(io, diags, key.status.success.object_path));
89 for (comp.c_objects.items) |c_object| {
90 try positionals.append(try link.openObjectInput(io, diags, c_object.status.success.object_path));
9191 }
9292
9393 if (module_obj_path) |path| try positionals.append(try link.openObjectInput(io, diags, path));
src/main.zig+70-28
......@@ -887,6 +887,7 @@ const CliModule = struct {
887887 inherited: Package.Module.CreateOptions.Inherited,
888888 target_arch_os_abi: ?[]const u8,
889889 target_mcpu: ?[]const u8,
890 dynamic_linker: ?[]const u8,
890891
891892 deps: []const Dep,
892893 resolved: ?*Package.Module,
......@@ -943,6 +944,7 @@ fn buildOutputType(
943944 var emit_implib_arg_provided = false;
944945 var target_arch_os_abi: ?[]const u8 = null;
945946 var target_mcpu: ?[]const u8 = null;
947 var dynamic_linker: ?[]const u8 = null;
946948 var emit_h: Emit = .no;
947949 var soname: SOName = undefined;
948950 var want_compiler_rt: ?bool = null;
......@@ -1059,7 +1061,6 @@ fn buildOutputType(
10591061 // Populated just before the call to `createModule`.
10601062 .dirs = undefined,
10611063 .object_format = null,
1062 .dynamic_linker = null,
10631064 .modules = .empty,
10641065 .opts = .{
10651066 .is_test = switch (arg_mode) {
......@@ -1179,6 +1180,7 @@ fn buildOutputType(
11791180 &cc_argv,
11801181 &target_arch_os_abi,
11811182 &target_mcpu,
1183 &dynamic_linker,
11821184 &deps,
11831185 &c_source_files_owner_index,
11841186 &rc_source_files_owner_index,
......@@ -1397,9 +1399,9 @@ fn buildOutputType(
13971399 } else if (mem.cutPrefix(u8, arg, "-O")) |rest| {
13981400 mod_opts.optimize_mode = parseOptimizeMode(rest);
13991401 } else if (mem.eql(u8, arg, "--dynamic-linker")) {
1400 create_module.dynamic_linker = args_iter.nextOrFatal();
1402 dynamic_linker = args_iter.nextOrFatal();
14011403 } else if (mem.eql(u8, arg, "--no-dynamic-linker")) {
1402 create_module.dynamic_linker = "";
1404 dynamic_linker = "";
14031405 } else if (mem.eql(u8, arg, "--sysroot")) {
14041406 const next_arg = args_iter.nextOrFatal();
14051407 create_module.sysroot = next_arg;
......@@ -1846,7 +1848,7 @@ fn buildOutputType(
18461848 const lang = if (rest.len == 0) args_iter.nextOrFatal() else rest;
18471849 if (mem.eql(u8, lang, "none")) {
18481850 file_ext = null;
1849 } else if (Compilation.LangToExt.get(lang)) |got_ext| {
1851 } else if (Compilation.FileExt.from_lang.get(lang)) |got_ext| {
18501852 file_ext = got_ext;
18511853 } else {
18521854 fatal("language not recognized: {s}", .{lang});
......@@ -1983,7 +1985,7 @@ fn buildOutputType(
19831985 const lang = mem.sliceTo(it.only_arg, 0);
19841986 if (mem.eql(u8, lang, "none")) {
19851987 file_ext = null;
1986 } else if (Compilation.LangToExt.get(lang)) |got_ext| {
1988 } else if (Compilation.FileExt.from_lang.get(lang)) |got_ext| {
19871989 file_ext = got_ext;
19881990 } else {
19891991 fatal("language not recognized: {q}", .{lang});
......@@ -2610,12 +2612,11 @@ fn buildOutputType(
26102612 mem.eql(u8, arg, "--dynamic-linker") or
26112613 mem.eql(u8, arg, "-dynamic-linker"))
26122614 {
2613 create_module.dynamic_linker = linker_args_it.nextOrFatal();
2614 } else if (mem.eql(u8, arg, "-I") or
2615 mem.eql(u8, arg, "--no-dynamic-linker") or
2615 dynamic_linker = linker_args_it.nextOrFatal();
2616 } else if (mem.eql(u8, arg, "--no-dynamic-linker") or
26162617 mem.eql(u8, arg, "-no-dynamic-linker"))
26172618 {
2618 create_module.dynamic_linker = "";
2619 dynamic_linker = "";
26192620 } else if (mem.eql(u8, arg, "-E") or
26202621 mem.eql(u8, arg, "--export-dynamic") or
26212622 mem.eql(u8, arg, "-export-dynamic"))
......@@ -3184,6 +3185,7 @@ fn buildOutputType(
31843185 .inherited = mod_opts,
31853186 .target_arch_os_abi = target_arch_os_abi,
31863187 .target_mcpu = target_mcpu,
3188 .dynamic_linker = dynamic_linker,
31873189 .deps = try deps.toOwnedSlice(arena),
31883190 .resolved = null,
31893191 .c_source_files_start = c_source_files_owner_index,
......@@ -3842,10 +3844,59 @@ fn buildOutputType(
38423844 if (test_exec_args.items.len == 0 and target.ofmt == .c and emit_bin_resolved != .no) {
38433845 // Default to using `zig run` to execute the produced .c code from `zig test`.
38443846 try test_exec_args.appendSlice(arena, &.{ self_exe_path, "run" });
3845 if (dirs.zig_lib.path) |p| {
3846 try test_exec_args.appendSlice(arena, &.{ "-I", p });
3847 // Skip passing `-ofmt`, we want the default for the target, not `.c` anymore.
3848
3849 var prev_has_cflags = false;
3850 var prev_has_rcflags = false;
3851 if (dirs.zig_lib.path) |zig_lib_path| {
3852 try test_exec_args.appendSlice(arena, &.{ "-cflags", "-I", zig_lib_path, "--" });
3853 prev_has_cflags = true;
3854 }
3855 try test_exec_args.append(arena, null);
3856 for (create_module.modules.keys(), create_module.modules.values()) |mod_name, mod| {
3857 for (create_module.c_source_files.items[mod.c_source_files_start..mod.c_source_files_end]) |c_source_file| {
3858 const cflags_len = c_source_file.extra_flags.len + c_source_file.cache_exempt_flags.len;
3859 if (prev_has_cflags or cflags_len > 0) {
3860 try test_exec_args.ensureUnusedCapacity(arena, 1 + cflags_len + 1);
3861 test_exec_args.appendAssumeCapacity("-cflags");
3862 for (c_source_file.extra_flags) |extra_flag| test_exec_args.appendAssumeCapacity(extra_flag);
3863 for (c_source_file.cache_exempt_flags) |cache_exempt_flag| test_exec_args.appendAssumeCapacity(cache_exempt_flag);
3864 test_exec_args.appendAssumeCapacity("--");
3865 }
3866 prev_has_cflags = cflags_len > 0;
3867 if (c_source_file.ext) |ext| try test_exec_args.appendSlice(arena, &.{ "-x", ext.toLang() });
3868 try test_exec_args.append(arena, c_source_file.src_path);
3869 if (c_source_file.ext) |_| try test_exec_args.appendSlice(arena, &.{ "-x", "none" });
3870 }
3871 for (create_module.rc_source_files.items[mod.rc_source_files_start..mod.rc_source_files_end]) |rc_source_file| {
3872 const rcflags_len = rc_source_file.extra_flags.len;
3873 if (prev_has_rcflags or rcflags_len > 0) {
3874 try test_exec_args.ensureUnusedCapacity(arena, 1 + rcflags_len + 1);
3875 test_exec_args.appendAssumeCapacity("-rcflags");
3876 for (rc_source_file.extra_flags) |extra_flag| test_exec_args.appendAssumeCapacity(extra_flag);
3877 test_exec_args.appendAssumeCapacity("--");
3878 }
3879 prev_has_rcflags = rcflags_len > 0;
3880 try test_exec_args.append(arena, rc_source_file.src_path);
3881 }
3882 if (mod.target_arch_os_abi) |triple| try test_exec_args.appendSlice(arena, &.{ "-target", triple });
3883 if (mod.target_mcpu) |mcpu| try test_exec_args.appendSlice(arena, &.{ "-mcpu", mcpu });
3884 if (mod.dynamic_linker) |dl| if (dl.len > 0)
3885 try test_exec_args.appendSlice(arena, &.{ "--dynamic-linker", dl })
3886 else
3887 try test_exec_args.append(arena, "--no-dynamic-linker");
3888 try test_exec_args.ensureUnusedCapacity(arena, mod.cc_argv.len);
3889 for (mod.cc_argv) |cc_arg| test_exec_args.appendAssumeCapacity(cc_arg);
3890 for (mod.deps) |dep| try test_exec_args.appendSlice(arena, &.{
3891 "--dep",
3892 if (std.mem.eql(u8, dep.key, dep.value)) dep.value else try std.fmt.allocPrint(arena, "{s}={s}", .{ dep.key, dep.value }),
3893 });
3894 try test_exec_args.append(arena, try std.fmt.allocPrint(arena, "-M{s}", .{mod_name}));
38473895 }
38483896
3897 try test_exec_args.ensureUnusedCapacity(arena, comp.global_cc_argv.len);
3898 for (comp.global_cc_argv) |global_cc_arg| test_exec_args.appendAssumeCapacity(global_cc_arg);
3899 if (create_module.resolved_options.link_libcpp) try test_exec_args.append(arena, "-lc++");
38493900 if (create_module.resolved_options.link_libc) {
38503901 try test_exec_args.append(arena, "-lc");
38513902 } else if (target.os.tag == .windows) {
......@@ -3855,21 +3906,10 @@ fn buildOutputType(
38553906 });
38563907 }
38573908
3858 const first_cli_mod = create_module.modules.values()[0];
3859 if (first_cli_mod.target_arch_os_abi) |triple| {
3860 try test_exec_args.appendSlice(arena, &.{ "-target", triple });
3861 }
3862 if (first_cli_mod.target_mcpu) |mcpu| {
3863 try test_exec_args.append(arena, try std.fmt.allocPrint(arena, "-mcpu={s}", .{mcpu}));
3864 }
3865 if (create_module.dynamic_linker) |dl| {
3866 if (dl.len > 0) {
3867 try test_exec_args.appendSlice(arena, &.{ "--dynamic-linker", dl });
3868 } else {
3869 try test_exec_args.append(arena, "--no-dynamic-linker");
3870 }
3871 }
3872 try test_exec_args.append(arena, null); // placeholder for the path of the emitted C source file
3909 try test_exec_args.ensureUnusedCapacity(arena, 2 * log_scopes.items.len + @intFromBool(verbose_link) + @intFromBool(verbose_cc));
3910 for (log_scopes.items) |log_scope| test_exec_args.appendSliceAssumeCapacity(&.{ "--debug-log", log_scope });
3911 if (verbose_link) test_exec_args.appendAssumeCapacity("--verbose-link");
3912 if (verbose_cc) test_exec_args.appendAssumeCapacity("--verbose-cc");
38733913 }
38743914
38753915 try runOrTest(
......@@ -3898,7 +3938,6 @@ const CreateModule = struct {
38983938 dirs: Compilation.Directories,
38993939 modules: std.array_hash_map.String(CliModule),
39003940 opts: Compilation.Config.Options,
3901 dynamic_linker: ?[]const u8,
39023941 object_format: ?[]const u8,
39033942 /// undefined until createModule() for the root module is called.
39043943 resolved_options: Compilation.Config,
......@@ -3960,7 +3999,7 @@ fn createModule(
39603999 var target_parse_options: std.Target.Query.ParseOptions = .{
39614000 .arch_os_abi = cli_mod.target_arch_os_abi orelse "native",
39624001 .cpu_features = cli_mod.target_mcpu,
3963 .dynamic_linker = create_module.dynamic_linker,
4002 .dynamic_linker = cli_mod.dynamic_linker,
39644003 .object_format = create_module.object_format,
39654004 };
39664005
......@@ -7844,6 +7883,7 @@ fn handleModArg(
78447883 cc_argv: *std.ArrayList([]const u8),
78457884 target_arch_os_abi: *?[]const u8,
78467885 target_mcpu: *?[]const u8,
7886 dynamic_linker: *?[]const u8,
78477887 deps: *std.ArrayList(CliModule.Dep),
78487888 c_source_files_owner_index: *usize,
78497889 rc_source_files_owner_index: *usize,
......@@ -7892,6 +7932,7 @@ fn handleModArg(
78927932 .inherited = mod_opts.*,
78937933 .target_arch_os_abi = target_arch_os_abi.*,
78947934 .target_mcpu = target_mcpu.*,
7935 .dynamic_linker = dynamic_linker.*,
78957936 .deps = try deps.toOwnedSlice(arena),
78967937 .resolved = null,
78977938 .c_source_files_start = c_source_files_owner_index.*,
......@@ -7903,6 +7944,7 @@ fn handleModArg(
79037944 mod_opts.* = .{};
79047945 target_arch_os_abi.* = null;
79057946 target_mcpu.* = null;
7947 dynamic_linker.* = null;
79067948 c_source_files_owner_index.* = create_module.c_source_files.items.len;
79077949 rc_source_files_owner_index.* = create_module.rc_source_files.items.len;
79087950}
test/c_abi/cfuncs.c+14176-3982
......@@ -13,7 +13,15 @@ static void assert_or_panic(bool ok) {
1313 }
1414}
1515
16#if defined __powerpc__ && !defined _ARCH_PPC64
16#if defined(__mips64__)
17# define ZIG_MIPS64
18#elif defined(__mips__)
19# define ZIG_MIPS32
20#endif
21
22#if defined(_ARCH_PPC64)
23# define ZIG_PPC64
24#elif defined(__powerpc__)
1725# define ZIG_PPC32
1826#endif
1927
......@@ -211,437 +219,238 @@ float complex zig_cmultf(float complex a, float complex b);
211219double complex zig_cmultd(double complex a, double complex b);
212220#endif
213221
214struct Struct_u8 {
215 uint8_t a;
216};
217
218struct Struct_u8 zig_ret_struct_u8(void);
222#if defined(ZIG_BACKEND_STAGE2_X86_64) || defined(ZIG_PPC32) || defined(__wasm__)
219223
220void zig_struct_u8(struct Struct_u8, size_t);
224typedef bool Vector_2_bool __attribute__((ext_vector_type(2)));
221225
222struct Struct_u8 c_ret_struct_u8(void) {
223 return (struct Struct_u8){ .a = 4 };
224}
226Vector_2_bool zig_ret_vector_2_bool(void);
227void zig_vector_2_bool(Vector_2_bool vec);
225228
226void c_struct_u8(struct Struct_u8 s, size_t i) {
227 assert_or_panic(s.a == 5);
228 assert_or_panic(i == 6);
229Vector_2_bool c_ret_vector_2_bool(void) {
230 return (Vector_2_bool){
231 true,
232 false,
233 };
229234}
230
231struct Struct_u16 {
232 uint16_t a;
233};
234
235struct Struct_u16 zig_ret_struct_u16(void);
236
237void zig_struct_u16(struct Struct_u16, size_t);
238
239struct Struct_u16 c_ret_struct_u16(void) {
240 return (struct Struct_u16){ .a = 10 };
235void c_vector_2_bool(Vector_2_bool vec) {
236 assert_or_panic(vec[0] == true);
237 assert_or_panic(vec[1] == true);
241238}
242
243void c_struct_u16(struct Struct_u16 s, size_t i) {
244 assert_or_panic(s.a == 11);
245 assert_or_panic(i == 12);
239void c_test_vector_2_bool(void) {
240 Vector_2_bool vec = zig_ret_vector_2_bool();
241 assert_or_panic(vec[0] == false);
242 assert_or_panic(vec[1] == false);
243 zig_vector_2_bool((Vector_2_bool){
244 false,
245 true,
246 });
246247}
247248
248struct Struct_u32 {
249 uint32_t a;
250};
251
252struct Struct_u32 zig_ret_struct_u32(void);
253
254void zig_struct_u32(struct Struct_u32, size_t);
249typedef bool Vector_4_bool __attribute__((ext_vector_type(4)));
255250
256struct Struct_u32 c_ret_struct_u32(void) {
257 return (struct Struct_u32){ .a = 16 };
258}
251Vector_4_bool zig_ret_vector_4_bool(void);
252void zig_vector_4_bool(Vector_4_bool vec);
259253
260void c_struct_u32(struct Struct_u32 s, size_t i) {
261 assert_or_panic(s.a == 17);
262 assert_or_panic(i == 18);
254Vector_4_bool c_ret_vector_4_bool(void) {
255 return (Vector_4_bool){
256 true,
257 false,
258 true,
259 false,
260 };
263261}
264
265struct Struct_u64 {
266 uint64_t a;
267};
268
269struct Struct_u64 zig_ret_struct_u64(void);
270
271void zig_struct_u64(struct Struct_u64, size_t);
272
273struct Struct_u64 c_ret_struct_u64(void) {
274 return (struct Struct_u64){ .a = 22 };
262void c_vector_4_bool(Vector_4_bool vec) {
263 assert_or_panic(vec[0] == true);
264 assert_or_panic(vec[1] == true);
265 assert_or_panic(vec[2] == false);
266 assert_or_panic(vec[3] == true);
275267}
276
277void c_struct_u64(struct Struct_u64 s, size_t i) {
278 assert_or_panic(s.a == 23);
279 assert_or_panic(i == 24);
268void c_test_vector_4_bool(void) {
269 Vector_4_bool vec = zig_ret_vector_4_bool();
270 assert_or_panic(vec[0] == false);
271 assert_or_panic(vec[1] == true);
272 assert_or_panic(vec[2] == true);
273 assert_or_panic(vec[3] == true);
274 zig_vector_4_bool((Vector_4_bool){
275 false,
276 false,
277 false,
278 false,
279 });
280280}
281281
282struct Struct_u64_u64 {
283 uint64_t a;
284 uint64_t b;
285};
286
287struct Struct_u64_u64 zig_ret_struct_u64_u64(void);
288
289void zig_struct_u64_u64_0(struct Struct_u64_u64, size_t);
290void zig_struct_u64_u64_1(size_t, struct Struct_u64_u64, size_t);
291void zig_struct_u64_u64_2(size_t, size_t, struct Struct_u64_u64, size_t);
292void zig_struct_u64_u64_3(size_t, size_t, size_t, struct Struct_u64_u64, size_t);
293void zig_struct_u64_u64_4(size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
294void zig_struct_u64_u64_5(size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
295void zig_struct_u64_u64_6(size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
296void zig_struct_u64_u64_7(size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
297void zig_struct_u64_u64_8(size_t, size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
282typedef bool Vector_8_bool __attribute__((ext_vector_type(8)));
298283
299struct Struct_u64_u64 c_ret_struct_u64_u64(void) {
300 return (struct Struct_u64_u64){ .a = 21, .b = 22 };
301}
284Vector_8_bool zig_ret_vector_8_bool(void);
285void zig_vector_8_bool(Vector_8_bool vec);
302286
303void c_struct_u64_u64_0(struct Struct_u64_u64 s, size_t i) {
304 assert_or_panic(s.a == 23);
305 assert_or_panic(s.b == 24);
306 assert_or_panic(i == 1);
307}
308void c_struct_u64_u64_1(size_t a0, struct Struct_u64_u64 s, size_t i) {
309 assert_or_panic(s.a == 25);
310 assert_or_panic(s.b == 26);
311 assert_or_panic(i == 2);
312}
313void c_struct_u64_u64_2(size_t, size_t, struct Struct_u64_u64 s, size_t i) {
314 assert_or_panic(s.a == 27);
315 assert_or_panic(s.b == 28);
316 assert_or_panic(i == 3);
317}
318void c_struct_u64_u64_3(size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
319 assert_or_panic(s.a == 29);
320 assert_or_panic(s.b == 30);
321 assert_or_panic(i == 4);
322}
323void c_struct_u64_u64_4(size_t, size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
324 assert_or_panic(s.a == 31);
325 assert_or_panic(s.b == 32);
326 assert_or_panic(i == 5);
327}
328void c_struct_u64_u64_5(size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
329 assert_or_panic(s.a == 33);
330 assert_or_panic(s.b == 34);
331 assert_or_panic(i == 6);
332}
333void c_struct_u64_u64_6(size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
334 assert_or_panic(s.a == 35);
335 assert_or_panic(s.b == 36);
336 assert_or_panic(i == 7);
287Vector_8_bool c_ret_vector_8_bool(void) {
288 return (Vector_8_bool){
289 false,
290 true,
291 false,
292 false,
293 true,
294 false,
295 false,
296 true,
297 };
337298}
338void c_struct_u64_u64_7(size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
339 assert_or_panic(s.a == 37);
340 assert_or_panic(s.b == 38);
341 assert_or_panic(i == 8);
299void c_vector_8_bool(Vector_8_bool vec) {
300 assert_or_panic(vec[0] == true);
301 assert_or_panic(vec[1] == false);
302 assert_or_panic(vec[2] == true);
303 assert_or_panic(vec[3] == true);
304 assert_or_panic(vec[4] == true);
305 assert_or_panic(vec[5] == true);
306 assert_or_panic(vec[6] == false);
307 assert_or_panic(vec[7] == true);
342308}
343void c_struct_u64_u64_8(size_t, size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64 s, size_t i) {
344 assert_or_panic(s.a == 39);
345 assert_or_panic(s.b == 40);
346 assert_or_panic(i == 9);
309void c_test_vector_8_bool(void) {
310 Vector_8_bool vec = zig_ret_vector_8_bool();
311 assert_or_panic(vec[0] == false);
312 assert_or_panic(vec[1] == false);
313 assert_or_panic(vec[2] == false);
314 assert_or_panic(vec[3] == false);
315 assert_or_panic(vec[4] == true);
316 assert_or_panic(vec[5] == false);
317 assert_or_panic(vec[6] == false);
318 assert_or_panic(vec[7] == false);
319 zig_vector_8_bool((Vector_8_bool){
320 true,
321 true,
322 false,
323 true,
324 false,
325 true,
326 true,
327 false,
328 });
347329}
348330
349struct Struct_f32 {
350 float a;
351};
352
353struct Struct_f32 zig_ret_struct_f32(void);
354
355void zig_struct_f32(struct Struct_f32);
331typedef bool Vector_16_bool __attribute__((ext_vector_type(16)));
356332
357struct Struct_f32 c_ret_struct_f32(void) {
358 return (struct Struct_f32){ .a = 2.5f };
359}
333Vector_16_bool zig_ret_vector_16_bool(void);
334void zig_vector_16_bool(Vector_16_bool vec);
360335
361void c_struct_f32(struct Struct_f32 s) {
362 assert_or_panic(s.a == 2.5f);
336Vector_16_bool c_ret_vector_16_bool(void) {
337 return (Vector_16_bool){
338 true,
339 true,
340 false,
341 false,
342 false,
343 false,
344 true,
345 false,
346 true,
347 false,
348 false,
349 true,
350 true,
351 false,
352 true,
353 true,
354 };
363355}
364
365struct Struct_f64 {
366 double a;
367};
368
369struct Struct_f64 zig_ret_struct_f64(void);
370
371void zig_struct_f64(struct Struct_f64);
372
373struct Struct_f64 c_ret_struct_f64(void) {
374 return (struct Struct_f64){ .a = 2.5 };
356void c_vector_16_bool(Vector_16_bool vec) {
357 assert_or_panic(vec[0] == true);
358 assert_or_panic(vec[1] == false);
359 assert_or_panic(vec[2] == false);
360 assert_or_panic(vec[3] == false);
361 assert_or_panic(vec[4] == true);
362 assert_or_panic(vec[5] == false);
363 assert_or_panic(vec[6] == true);
364 assert_or_panic(vec[7] == true);
365 assert_or_panic(vec[8] == true);
366 assert_or_panic(vec[9] == true);
367 assert_or_panic(vec[10] == true);
368 assert_or_panic(vec[11] == true);
369 assert_or_panic(vec[12] == false);
370 assert_or_panic(vec[13] == false);
371 assert_or_panic(vec[14] == false);
372 assert_or_panic(vec[15] == false);
375373}
376
377void c_struct_f64(struct Struct_f64 s) {
378 assert_or_panic(s.a == 2.5);
374void c_test_vector_16_bool(void) {
375 Vector_16_bool vec = zig_ret_vector_16_bool();
376 assert_or_panic(vec[0] == false);
377 assert_or_panic(vec[1] == true);
378 assert_or_panic(vec[2] == false);
379 assert_or_panic(vec[3] == false);
380 assert_or_panic(vec[4] == false);
381 assert_or_panic(vec[5] == true);
382 assert_or_panic(vec[6] == false);
383 assert_or_panic(vec[7] == false);
384 assert_or_panic(vec[8] == true);
385 assert_or_panic(vec[9] == false);
386 assert_or_panic(vec[10] == false);
387 assert_or_panic(vec[11] == false);
388 assert_or_panic(vec[12] == false);
389 assert_or_panic(vec[13] == true);
390 assert_or_panic(vec[14] == false);
391 assert_or_panic(vec[15] == false);
392 zig_vector_16_bool((Vector_16_bool){
393 true,
394 false,
395 true,
396 true,
397 true,
398 false,
399 false,
400 false,
401 true,
402 true,
403 true,
404 true,
405 false,
406 false,
407 false,
408 true,
409 });
379410}
380411
381struct Struct_f32a8 {
382 alignas(8) float a;
383};
384
385struct Struct_f32a8 zig_ret_struct_f32a8(void);
386
387void zig_struct_f32a8(struct Struct_f32a8, float);
388
389struct Struct_f32a8 c_ret_struct_f32a8(void) {
390 return (struct Struct_f32a8){ .a = 4.125f };
391}
412typedef bool Vector_32_bool __attribute__((ext_vector_type(32)));
392413
393void c_struct_f32a8(struct Struct_f32a8 s, float f) {
394 assert_or_panic(s.a == 5.375f);
395 assert_or_panic(f == 6.5f);
396}
414Vector_32_bool zig_ret_vector_32_bool(void);
415void zig_vector_32_bool(Vector_32_bool vec);
397416
398struct Struct_f32a8_f32a8 {
399 alignas(8) float a;
400 alignas(8) float b;
401};
402
403struct Struct_f32a8_f32a8 zig_ret_struct_f32a8_f32a8(void);
404
405void zig_struct_f32a8_f32a8(struct Struct_f32a8_f32a8, float);
406
407struct Struct_f32a8_f32a8 c_ret_struct_f32a8_f32a8(void) {
408 return (struct Struct_f32a8_f32a8){ .a = 6.625f, .b = 7.875f };
409}
410
411void c_struct_f32a8_f32a8(struct Struct_f32a8_f32a8 s, float f) {
412 assert_or_panic(s.a == 8.0625f);
413 assert_or_panic(s.b == 9.1875f);
414 assert_or_panic(f == 10.5f);
415}
416
417struct Struct_f32f32_f32 {
418 struct {
419 float b, c;
420 } a;
421 float d;
422};
423
424struct Struct_f32f32_f32 zig_ret_struct_f32f32_f32(void);
425
426void zig_struct_f32f32_f32(struct Struct_f32f32_f32);
427
428struct Struct_f32f32_f32 c_ret_struct_f32f32_f32(void) {
429 return (struct Struct_f32f32_f32){ .a = { .b = 1.0f, .c = 2.0f }, .d = 3.0f };
430}
431
432void c_struct_f32f32_f32(struct Struct_f32f32_f32 s) {
433 assert_or_panic(s.a.b == 1.0f);
434 assert_or_panic(s.a.c == 2.0f);
435 assert_or_panic(s.d == 3.0f);
436}
437
438struct Struct_f32_f32f32 {
439 float a;
440 struct {
441 float c, d;
442 } b;
443};
444
445struct Struct_f32_f32f32 zig_ret_struct_f32_f32f32(void);
446
447void zig_struct_f32_f32f32(struct Struct_f32_f32f32);
448
449struct Struct_f32_f32f32 c_ret_struct_f32_f32f32(void) {
450 return (struct Struct_f32_f32f32){ .a = 1.0f, .b = { .c = 2.0f, .d = 3.0f } };
451}
452
453void c_struct_f32_f32f32(struct Struct_f32_f32f32 s) {
454 assert_or_panic(s.a == 1.0f);
455 assert_or_panic(s.b.c == 2.0f);
456 assert_or_panic(s.b.d == 3.0f);
457}
458
459struct Struct_u32_Union_u32_u32u32 {
460 uint32_t a;
461 union {
462 struct {
463 uint32_t d, e;
464 } c;
465 } b;
466};
467
468struct Struct_u32_Union_u32_u32u32 zig_ret_struct_u32_union_u32_u32u32(void);
469
470void zig_struct_u32_union_u32_u32u32(struct Struct_u32_Union_u32_u32u32);
471
472struct Struct_u32_Union_u32_u32u32 c_ret_struct_u32_union_u32_u32u32(void) {
473 struct Struct_u32_Union_u32_u32u32 s;
474 s.a = 1;
475 s.b.c.d = 2;
476 s.b.c.e = 3;
477 return s;
478}
479
480void c_struct_u32_union_u32_u32u32(struct Struct_u32_Union_u32_u32u32 s) {
481 assert_or_panic(s.a == 1);
482 assert_or_panic(s.b.c.d == 2);
483 assert_or_panic(s.b.c.e == 3);
484}
485
486struct Struct_i32_i32 {
487 int32_t a;
488 int32_t b;
489};
490
491void zig_struct_i32_i32(struct Struct_i32_i32);
492
493struct BigStruct {
494 uint64_t a;
495 uint64_t b;
496 uint64_t c;
497 uint64_t d;
498 uint8_t e;
499};
500
501void zig_big_struct(struct BigStruct);
502
503union BigUnion {
504 struct BigStruct a;
505};
506
507void zig_big_union(union BigUnion);
508
509struct SmallStructInts {
510 uint8_t a;
511 uint8_t b;
512 uint8_t c;
513 uint8_t d;
514};
515
516void zig_small_struct_ints(struct SmallStructInts);
517struct SmallStructInts zig_ret_small_struct_ints();
518
519struct MedStructInts {
520 int32_t x;
521 int32_t y;
522 int32_t z;
523};
524
525void zig_med_struct_ints(struct MedStructInts);
526struct MedStructInts zig_ret_med_struct_ints();
527
528struct MedStructMixed {
529 uint32_t a;
530 float b;
531 float c;
532 uint32_t d;
533};
534
535void zig_med_struct_mixed(struct MedStructMixed);
536struct MedStructMixed zig_ret_med_struct_mixed();
537
538void zig_small_packed_struct(uint8_t);
539#ifndef ZIG_NO_I128
540void zig_big_packed_struct(__int128);
541#endif
542
543struct SplitStructInts {
544 uint64_t a;
545 uint8_t b;
546 uint32_t c;
547};
548void zig_split_struct_ints(struct SplitStructInts);
549
550struct SplitStructMixed {
551 uint64_t a;
552 uint8_t b;
553 float c;
554};
555void zig_split_struct_mixed(struct SplitStructMixed);
556struct SplitStructMixed zig_ret_split_struct_mixed();
557
558struct BigStruct zig_big_struct_both(struct BigStruct);
559
560typedef float Vector2Float __attribute__((ext_vector_type(2)));
561typedef float Vector4Float __attribute__((ext_vector_type(4)));
562
563void c_vector_2_float(Vector2Float vec) {
564 assert_or_panic(vec[0] == 1.0);
565 assert_or_panic(vec[1] == 2.0);
566}
567
568void c_vector_4_float(Vector4Float vec) {
569 assert_or_panic(vec[0] == 1.0);
570 assert_or_panic(vec[1] == 2.0);
571 assert_or_panic(vec[2] == 3.0);
572 assert_or_panic(vec[3] == 4.0);
573}
574
575Vector2Float c_ret_vector_2_float(void) {
576 return (Vector2Float){
577 1.0,
578 2.0,
579 };
580}
581Vector4Float c_ret_vector_4_float(void) {
582 return (Vector4Float){
583 1.0,
584 2.0,
585 3.0,
586 4.0,
417Vector_32_bool c_ret_vector_32_bool(void) {
418 return (Vector_32_bool){
419 true,
420 false,
421 true,
422 true,
423 true,
424 false,
425 true,
426 false,
427 true,
428 true,
429 true,
430 false,
431 true,
432 true,
433 false,
434 false,
435 true,
436 false,
437 false,
438 false,
439 false,
440 true,
441 true,
442 true,
443 false,
444 true,
445 false,
446 false,
447 true,
448 false,
449 false,
450 false,
587451 };
588452}
589
590#if defined(ZIG_BACKEND_STAGE2_X86_64) || defined(ZIG_PPC32) || defined(__wasm__)
591
592typedef bool Vector2Bool __attribute__((ext_vector_type(2)));
593typedef bool Vector4Bool __attribute__((ext_vector_type(4)));
594typedef bool Vector8Bool __attribute__((ext_vector_type(8)));
595typedef bool Vector16Bool __attribute__((ext_vector_type(16)));
596typedef bool Vector32Bool __attribute__((ext_vector_type(32)));
597typedef bool Vector64Bool __attribute__((ext_vector_type(64)));
598typedef bool Vector128Bool __attribute__((ext_vector_type(128)));
599typedef bool Vector256Bool __attribute__((ext_vector_type(256)));
600typedef bool Vector512Bool __attribute__((ext_vector_type(512)));
601
602void c_vector_2_bool(Vector2Bool vec) {
603 assert_or_panic(vec[0] == true);
604 assert_or_panic(vec[1] == true);
605}
606
607void c_vector_4_bool(Vector4Bool vec) {
608 assert_or_panic(vec[0] == true);
609 assert_or_panic(vec[1] == true);
610 assert_or_panic(vec[2] == false);
611 assert_or_panic(vec[3] == true);
612}
613
614void c_vector_8_bool(Vector8Bool vec) {
615 assert_or_panic(vec[0] == true);
616 assert_or_panic(vec[1] == false);
617 assert_or_panic(vec[2] == true);
618 assert_or_panic(vec[3] == true);
619 assert_or_panic(vec[4] == true);
620 assert_or_panic(vec[5] == true);
621 assert_or_panic(vec[6] == false);
622 assert_or_panic(vec[7] == true);
623}
624
625void c_vector_16_bool(Vector16Bool vec) {
626 assert_or_panic(vec[0] == true);
627 assert_or_panic(vec[1] == false);
628 assert_or_panic(vec[2] == false);
629 assert_or_panic(vec[3] == false);
630 assert_or_panic(vec[4] == true);
631 assert_or_panic(vec[5] == false);
632 assert_or_panic(vec[6] == true);
633 assert_or_panic(vec[7] == true);
634 assert_or_panic(vec[8] == true);
635 assert_or_panic(vec[9] == true);
636 assert_or_panic(vec[10] == true);
637 assert_or_panic(vec[11] == true);
638 assert_or_panic(vec[12] == false);
639 assert_or_panic(vec[13] == false);
640 assert_or_panic(vec[14] == false);
641 assert_or_panic(vec[15] == false);
642}
643
644void c_vector_32_bool(Vector32Bool vec) {
453void c_vector_32_bool(Vector_32_bool vec) {
645454 assert_or_panic(vec[0] == true);
646455 assert_or_panic(vec[1] == false);
647456 assert_or_panic(vec[2] == true);
......@@ -675,29 +484,171 @@ void c_vector_32_bool(Vector32Bool vec) {
675484 assert_or_panic(vec[30] == true);
676485 assert_or_panic(vec[31] == false);
677486}
678
679void c_vector_64_bool(Vector64Bool vec) {
680 assert_or_panic(vec[0] == true);
487void c_test_vector_32_bool(void) {
488 Vector_32_bool vec = zig_ret_vector_32_bool();
489 assert_or_panic(vec[0] == false);
681490 assert_or_panic(vec[1] == true);
682 assert_or_panic(vec[2] == true);
491 assert_or_panic(vec[2] == false);
683492 assert_or_panic(vec[3] == false);
684493 assert_or_panic(vec[4] == true);
685494 assert_or_panic(vec[5] == false);
686 assert_or_panic(vec[6] == false);
687 assert_or_panic(vec[7] == false);
495 assert_or_panic(vec[6] == true);
496 assert_or_panic(vec[7] == true);
688497 assert_or_panic(vec[8] == true);
689 assert_or_panic(vec[9] == false);
690 assert_or_panic(vec[10] == false);
691 assert_or_panic(vec[11] == false);
498 assert_or_panic(vec[9] == true);
499 assert_or_panic(vec[10] == true);
500 assert_or_panic(vec[11] == true);
692501 assert_or_panic(vec[12] == false);
693 assert_or_panic(vec[13] == true);
694 assert_or_panic(vec[14] == true);
695 assert_or_panic(vec[15] == true);
696 assert_or_panic(vec[16] == true);
502 assert_or_panic(vec[13] == false);
503 assert_or_panic(vec[14] == false);
504 assert_or_panic(vec[15] == false);
505 assert_or_panic(vec[16] == false);
697506 assert_or_panic(vec[17] == false);
698 assert_or_panic(vec[18] == false);
507 assert_or_panic(vec[18] == true);
699508 assert_or_panic(vec[19] == true);
700 assert_or_panic(vec[20] == false);
509 assert_or_panic(vec[20] == true);
510 assert_or_panic(vec[21] == false);
511 assert_or_panic(vec[22] == true);
512 assert_or_panic(vec[23] == false);
513 assert_or_panic(vec[24] == true);
514 assert_or_panic(vec[25] == false);
515 assert_or_panic(vec[26] == false);
516 assert_or_panic(vec[27] == true);
517 assert_or_panic(vec[28] == false);
518 assert_or_panic(vec[29] == false);
519 assert_or_panic(vec[30] == true);
520 assert_or_panic(vec[31] == true);
521 zig_vector_32_bool((Vector_32_bool){
522 false,
523 false,
524 false,
525 true,
526 true,
527 false,
528 false,
529 true,
530 false,
531 true,
532 true,
533 true,
534 false,
535 false,
536 true,
537 true,
538 true,
539 true,
540 true,
541 false,
542 true,
543 true,
544 true,
545 false,
546 false,
547 true,
548 true,
549 false,
550 true,
551 true,
552 false,
553 true,
554 });
555}
556
557typedef bool Vector_64_bool __attribute__((ext_vector_type(64)));
558
559Vector_64_bool zig_ret_vector_64_bool(void);
560void zig_vector_64_bool(Vector_64_bool vec);
561
562Vector_64_bool c_ret_vector_64_bool(void) {
563 return (Vector_64_bool){
564 false,
565 true,
566 false,
567 true,
568 true,
569 true,
570 false,
571 true,
572 true,
573 true,
574 true,
575 true,
576 true,
577 false,
578 true,
579 true,
580 true,
581 false,
582 false,
583 false,
584 true,
585 true,
586 false,
587 true,
588 false,
589 true,
590 false,
591 true,
592 false,
593 true,
594 false,
595 true,
596 false,
597 false,
598 true,
599 true,
600 false,
601 false,
602 false,
603 true,
604 true,
605 true,
606 true,
607 false,
608 false,
609 false,
610 true,
611 true,
612 false,
613 false,
614 true,
615 false,
616 false,
617 false,
618 false,
619 true,
620 false,
621 false,
622 false,
623 true,
624 true,
625 true,
626 true,
627 true,
628 };
629}
630void c_vector_64_bool(Vector_64_bool vec) {
631 assert_or_panic(vec[0] == true);
632 assert_or_panic(vec[1] == true);
633 assert_or_panic(vec[2] == true);
634 assert_or_panic(vec[3] == false);
635 assert_or_panic(vec[4] == true);
636 assert_or_panic(vec[5] == false);
637 assert_or_panic(vec[6] == false);
638 assert_or_panic(vec[7] == false);
639 assert_or_panic(vec[8] == true);
640 assert_or_panic(vec[9] == false);
641 assert_or_panic(vec[10] == false);
642 assert_or_panic(vec[11] == false);
643 assert_or_panic(vec[12] == false);
644 assert_or_panic(vec[13] == true);
645 assert_or_panic(vec[14] == true);
646 assert_or_panic(vec[15] == true);
647 assert_or_panic(vec[16] == true);
648 assert_or_panic(vec[17] == false);
649 assert_or_panic(vec[18] == false);
650 assert_or_panic(vec[19] == true);
651 assert_or_panic(vec[20] == false);
701652 assert_or_panic(vec[21] == true);
702653 assert_or_panic(vec[22] == false);
703654 assert_or_panic(vec[23] == true);
......@@ -742,430 +693,438 @@ void c_vector_64_bool(Vector64Bool vec) {
742693 assert_or_panic(vec[62] == true);
743694 assert_or_panic(vec[63] == false);
744695}
745
746void c_vector_128_bool(Vector128Bool vec) {
747 assert_or_panic(vec[0] == false);
696void c_test_vector_64_bool(void) {
697 Vector_64_bool vec = zig_ret_vector_64_bool();
698 assert_or_panic(vec[0] == true);
748699 assert_or_panic(vec[1] == false);
749 assert_or_panic(vec[2] == false);
700 assert_or_panic(vec[2] == true);
750701 assert_or_panic(vec[3] == false);
751702 assert_or_panic(vec[4] == false);
752703 assert_or_panic(vec[5] == true);
753 assert_or_panic(vec[6] == true);
754 assert_or_panic(vec[7] == false);
704 assert_or_panic(vec[6] == false);
705 assert_or_panic(vec[7] == true);
755706 assert_or_panic(vec[8] == true);
756 assert_or_panic(vec[9] == true);
757 assert_or_panic(vec[10] == false);
758 assert_or_panic(vec[11] == true);
707 assert_or_panic(vec[9] == false);
708 assert_or_panic(vec[10] == true);
709 assert_or_panic(vec[11] == false);
759710 assert_or_panic(vec[12] == true);
760711 assert_or_panic(vec[13] == false);
761 assert_or_panic(vec[14] == true);
712 assert_or_panic(vec[14] == false);
762713 assert_or_panic(vec[15] == true);
763 assert_or_panic(vec[16] == true);
714 assert_or_panic(vec[16] == false);
764715 assert_or_panic(vec[17] == false);
765 assert_or_panic(vec[18] == false);
766 assert_or_panic(vec[19] == false);
716 assert_or_panic(vec[18] == true);
717 assert_or_panic(vec[19] == true);
767718 assert_or_panic(vec[20] == false);
768 assert_or_panic(vec[21] == true);
719 assert_or_panic(vec[21] == false);
769720 assert_or_panic(vec[22] == true);
770721 assert_or_panic(vec[23] == false);
771722 assert_or_panic(vec[24] == false);
772 assert_or_panic(vec[25] == false);
723 assert_or_panic(vec[25] == true);
773724 assert_or_panic(vec[26] == true);
774725 assert_or_panic(vec[27] == true);
775 assert_or_panic(vec[28] == false);
726 assert_or_panic(vec[28] == true);
776727 assert_or_panic(vec[29] == true);
777728 assert_or_panic(vec[30] == false);
778729 assert_or_panic(vec[31] == false);
779730 assert_or_panic(vec[32] == true);
780 assert_or_panic(vec[33] == false);
781 assert_or_panic(vec[34] == false);
731 assert_or_panic(vec[33] == true);
732 assert_or_panic(vec[34] == true);
782733 assert_or_panic(vec[35] == true);
783 assert_or_panic(vec[36] == true);
734 assert_or_panic(vec[36] == false);
784735 assert_or_panic(vec[37] == true);
785 assert_or_panic(vec[38] == true);
736 assert_or_panic(vec[38] == false);
786737 assert_or_panic(vec[39] == true);
787 assert_or_panic(vec[40] == false);
738 assert_or_panic(vec[40] == true);
788739 assert_or_panic(vec[41] == true);
789740 assert_or_panic(vec[42] == true);
790741 assert_or_panic(vec[43] == true);
791742 assert_or_panic(vec[44] == false);
792743 assert_or_panic(vec[45] == false);
793744 assert_or_panic(vec[46] == false);
794 assert_or_panic(vec[47] == false);
745 assert_or_panic(vec[47] == true);
795746 assert_or_panic(vec[48] == true);
796747 assert_or_panic(vec[49] == true);
797748 assert_or_panic(vec[50] == false);
798749 assert_or_panic(vec[51] == true);
799750 assert_or_panic(vec[52] == true);
800751 assert_or_panic(vec[53] == true);
801 assert_or_panic(vec[54] == true);
802 assert_or_panic(vec[55] == true);
752 assert_or_panic(vec[54] == false);
753 assert_or_panic(vec[55] == false);
803754 assert_or_panic(vec[56] == false);
804755 assert_or_panic(vec[57] == true);
805 assert_or_panic(vec[58] == true);
756 assert_or_panic(vec[58] == false);
806757 assert_or_panic(vec[59] == false);
807758 assert_or_panic(vec[60] == true);
808759 assert_or_panic(vec[61] == false);
809 assert_or_panic(vec[62] == false);
810 assert_or_panic(vec[63] == true);
811 assert_or_panic(vec[64] == true);
812 assert_or_panic(vec[65] == false);
813 assert_or_panic(vec[66] == true);
814 assert_or_panic(vec[67] == true);
815 assert_or_panic(vec[68] == false);
816 assert_or_panic(vec[69] == true);
817 assert_or_panic(vec[70] == false);
818 assert_or_panic(vec[71] == false);
819 assert_or_panic(vec[72] == true);
820 assert_or_panic(vec[73] == true);
821 assert_or_panic(vec[74] == false);
822 assert_or_panic(vec[75] == true);
823 assert_or_panic(vec[76] == true);
824 assert_or_panic(vec[77] == true);
825 assert_or_panic(vec[78] == false);
826 assert_or_panic(vec[79] == true);
827 assert_or_panic(vec[80] == false);
828 assert_or_panic(vec[81] == false);
829 assert_or_panic(vec[82] == false);
830 assert_or_panic(vec[83] == false);
831 assert_or_panic(vec[84] == true);
832 assert_or_panic(vec[85] == false);
833 assert_or_panic(vec[86] == false);
834 assert_or_panic(vec[87] == false);
835 assert_or_panic(vec[88] == true);
836 assert_or_panic(vec[89] == true);
837 assert_or_panic(vec[90] == false);
838 assert_or_panic(vec[91] == false);
839 assert_or_panic(vec[92] == true);
840 assert_or_panic(vec[93] == true);
841 assert_or_panic(vec[94] == true);
842 assert_or_panic(vec[95] == true);
843 assert_or_panic(vec[96] == false);
844 assert_or_panic(vec[97] == false);
845 assert_or_panic(vec[98] == false);
846 assert_or_panic(vec[99] == false);
847 assert_or_panic(vec[100] == false);
848 assert_or_panic(vec[101] == true);
849 assert_or_panic(vec[102] == false);
850 assert_or_panic(vec[103] == false);
851 assert_or_panic(vec[104] == false);
852 assert_or_panic(vec[105] == false);
853 assert_or_panic(vec[106] == true);
854 assert_or_panic(vec[107] == true);
855 assert_or_panic(vec[108] == true);
856 assert_or_panic(vec[109] == true);
857 assert_or_panic(vec[110] == true);
858 assert_or_panic(vec[111] == false);
859 assert_or_panic(vec[112] == false);
860 assert_or_panic(vec[113] == true);
861 assert_or_panic(vec[114] == false);
862 assert_or_panic(vec[115] == true);
863 assert_or_panic(vec[116] == false);
864 assert_or_panic(vec[117] == false);
865 assert_or_panic(vec[118] == true);
866 assert_or_panic(vec[119] == false);
867 assert_or_panic(vec[120] == true);
868 assert_or_panic(vec[121] == false);
869 assert_or_panic(vec[122] == true);
870 assert_or_panic(vec[123] == true);
871 assert_or_panic(vec[124] == true);
872 assert_or_panic(vec[125] == true);
873 assert_or_panic(vec[126] == true);
874 assert_or_panic(vec[127] == true);
875}
876
877// WASM: The following vector functions define too many Wasm locals for wasmtime in debug mode and are therefore disabled for the wasm target.
878#if !defined(__wasm__)
879
880void c_vector_256_bool(Vector256Bool vec) {
881 assert_or_panic(vec[0] == false);
882 assert_or_panic(vec[1] == true);
883 assert_or_panic(vec[2] == true);
884 assert_or_panic(vec[3] == false);
885 assert_or_panic(vec[4] == false);
886 assert_or_panic(vec[5] == true);
887 assert_or_panic(vec[6] == true);
888 assert_or_panic(vec[7] == true);
889 assert_or_panic(vec[8] == false);
760 assert_or_panic(vec[62] == true);
761 assert_or_panic(vec[63] == false);
762 zig_vector_64_bool((Vector_64_bool){
763 true,
764 true,
765 false,
766 true,
767 false,
768 true,
769 false,
770 false,
771 true,
772 true,
773 true,
774 true,
775 true,
776 true,
777 true,
778 false,
779 false,
780 true,
781 true,
782 false,
783 true,
784 true,
785 true,
786 true,
787 false,
788 false,
789 true,
790 false,
791 false,
792 true,
793 false,
794 true,
795 false,
796 true,
797 true,
798 false,
799 true,
800 true,
801 false,
802 false,
803 true,
804 true,
805 true,
806 true,
807 true,
808 false,
809 true,
810 false,
811 false,
812 false,
813 false,
814 false,
815 true,
816 false,
817 false,
818 true,
819 true,
820 false,
821 false,
822 false,
823 true,
824 true,
825 true,
826 true,
827 });
828}
829
830typedef bool Vector_128_bool __attribute__((ext_vector_type(128)));
831
832Vector_128_bool zig_ret_vector_128_bool(void);
833void zig_vector_128_bool(Vector_128_bool vec);
834
835Vector_128_bool c_ret_vector_128_bool(void) {
836 return (Vector_128_bool){
837 false,
838 true,
839 true,
840 false,
841 true,
842 false,
843 false,
844 true,
845 true,
846 false,
847 true,
848 false,
849 false,
850 false,
851 true,
852 false,
853 true,
854 false,
855 false,
856 true,
857 false,
858 true,
859 false,
860 false,
861 false,
862 true,
863 true,
864 true,
865 false,
866 false,
867 false,
868 false,
869 true,
870 true,
871 true,
872 false,
873 true,
874 true,
875 false,
876 false,
877 false,
878 false,
879 true,
880 true,
881 true,
882 false,
883 false,
884 false,
885 false,
886 true,
887 false,
888 false,
889 true,
890 false,
891 false,
892 false,
893 false,
894 false,
895 true,
896 true,
897 true,
898 false,
899 true,
900 true,
901 false,
902 false,
903 false,
904 false,
905 false,
906 false,
907 false,
908 false,
909 true,
910 true,
911 true,
912 true,
913 true,
914 false,
915 false,
916 false,
917 false,
918 false,
919 false,
920 true,
921 false,
922 true,
923 false,
924 true,
925 false,
926 true,
927 false,
928 true,
929 true,
930 true,
931 true,
932 false,
933 false,
934 true,
935 false,
936 false,
937 true,
938 true,
939 true,
940 true,
941 false,
942 true,
943 true,
944 true,
945 false,
946 false,
947 true,
948 false,
949 false,
950 true,
951 true,
952 false,
953 true,
954 false,
955 true,
956 true,
957 true,
958 true,
959 true,
960 false,
961 false,
962 true,
963 false,
964 true,
965 };
966}
967void c_vector_128_bool(Vector_128_bool vec) {
968 assert_or_panic(vec[0] == false);
969 assert_or_panic(vec[1] == false);
970 assert_or_panic(vec[2] == false);
971 assert_or_panic(vec[3] == false);
972 assert_or_panic(vec[4] == false);
973 assert_or_panic(vec[5] == true);
974 assert_or_panic(vec[6] == true);
975 assert_or_panic(vec[7] == false);
976 assert_or_panic(vec[8] == true);
890977 assert_or_panic(vec[9] == true);
891 assert_or_panic(vec[10] == true);
978 assert_or_panic(vec[10] == false);
892979 assert_or_panic(vec[11] == true);
893 assert_or_panic(vec[12] == false);
894 assert_or_panic(vec[13] == true);
895 assert_or_panic(vec[14] == false);
980 assert_or_panic(vec[12] == true);
981 assert_or_panic(vec[13] == false);
982 assert_or_panic(vec[14] == true);
896983 assert_or_panic(vec[15] == true);
897 assert_or_panic(vec[16] == false);
984 assert_or_panic(vec[16] == true);
898985 assert_or_panic(vec[17] == false);
899 assert_or_panic(vec[18] == true);
900 assert_or_panic(vec[19] == true);
986 assert_or_panic(vec[18] == false);
987 assert_or_panic(vec[19] == false);
901988 assert_or_panic(vec[20] == false);
902989 assert_or_panic(vec[21] == true);
903 assert_or_panic(vec[22] == false);
990 assert_or_panic(vec[22] == true);
904991 assert_or_panic(vec[23] == false);
905992 assert_or_panic(vec[24] == false);
906 assert_or_panic(vec[25] == true);
993 assert_or_panic(vec[25] == false);
907994 assert_or_panic(vec[26] == true);
908 assert_or_panic(vec[27] == false);
995 assert_or_panic(vec[27] == true);
909996 assert_or_panic(vec[28] == false);
910997 assert_or_panic(vec[29] == true);
911 assert_or_panic(vec[30] == true);
998 assert_or_panic(vec[30] == false);
912999 assert_or_panic(vec[31] == false);
9131000 assert_or_panic(vec[32] == true);
9141001 assert_or_panic(vec[33] == false);
9151002 assert_or_panic(vec[34] == false);
9161003 assert_or_panic(vec[35] == true);
917 assert_or_panic(vec[36] == false);
1004 assert_or_panic(vec[36] == true);
9181005 assert_or_panic(vec[37] == true);
919 assert_or_panic(vec[38] == false);
1006 assert_or_panic(vec[38] == true);
9201007 assert_or_panic(vec[39] == true);
921 assert_or_panic(vec[40] == true);
1008 assert_or_panic(vec[40] == false);
9221009 assert_or_panic(vec[41] == true);
9231010 assert_or_panic(vec[42] == true);
924 assert_or_panic(vec[43] == false);
1011 assert_or_panic(vec[43] == true);
9251012 assert_or_panic(vec[44] == false);
926 assert_or_panic(vec[45] == true);
1013 assert_or_panic(vec[45] == false);
9271014 assert_or_panic(vec[46] == false);
9281015 assert_or_panic(vec[47] == false);
929 assert_or_panic(vec[48] == false);
930 assert_or_panic(vec[49] == false);
1016 assert_or_panic(vec[48] == true);
1017 assert_or_panic(vec[49] == true);
9311018 assert_or_panic(vec[50] == false);
932 assert_or_panic(vec[51] == false);
1019 assert_or_panic(vec[51] == true);
9331020 assert_or_panic(vec[52] == true);
9341021 assert_or_panic(vec[53] == true);
9351022 assert_or_panic(vec[54] == true);
9361023 assert_or_panic(vec[55] == true);
937 assert_or_panic(vec[56] == true);
1024 assert_or_panic(vec[56] == false);
9381025 assert_or_panic(vec[57] == true);
939 assert_or_panic(vec[58] == false);
940 assert_or_panic(vec[59] == true);
1026 assert_or_panic(vec[58] == true);
1027 assert_or_panic(vec[59] == false);
9411028 assert_or_panic(vec[60] == true);
9421029 assert_or_panic(vec[61] == false);
9431030 assert_or_panic(vec[62] == false);
9441031 assert_or_panic(vec[63] == true);
945 assert_or_panic(vec[64] == false);
1032 assert_or_panic(vec[64] == true);
9461033 assert_or_panic(vec[65] == false);
947 assert_or_panic(vec[66] == false);
948 assert_or_panic(vec[67] == false);
1034 assert_or_panic(vec[66] == true);
1035 assert_or_panic(vec[67] == true);
9491036 assert_or_panic(vec[68] == false);
950 assert_or_panic(vec[69] == false);
951 assert_or_panic(vec[70] == true);
952 assert_or_panic(vec[71] == true);
1037 assert_or_panic(vec[69] == true);
1038 assert_or_panic(vec[70] == false);
1039 assert_or_panic(vec[71] == false);
9531040 assert_or_panic(vec[72] == true);
954 assert_or_panic(vec[73] == false);
1041 assert_or_panic(vec[73] == true);
9551042 assert_or_panic(vec[74] == false);
956 assert_or_panic(vec[75] == false);
1043 assert_or_panic(vec[75] == true);
9571044 assert_or_panic(vec[76] == true);
958 assert_or_panic(vec[77] == false);
959 assert_or_panic(vec[78] == true);
1045 assert_or_panic(vec[77] == true);
1046 assert_or_panic(vec[78] == false);
9601047 assert_or_panic(vec[79] == true);
9611048 assert_or_panic(vec[80] == false);
9621049 assert_or_panic(vec[81] == false);
963 assert_or_panic(vec[82] == true);
964 assert_or_panic(vec[83] == true);
965 assert_or_panic(vec[84] == false);
966 assert_or_panic(vec[85] == true);
967 assert_or_panic(vec[86] == true);
968 assert_or_panic(vec[87] == true);
1050 assert_or_panic(vec[82] == false);
1051 assert_or_panic(vec[83] == false);
1052 assert_or_panic(vec[84] == true);
1053 assert_or_panic(vec[85] == false);
1054 assert_or_panic(vec[86] == false);
1055 assert_or_panic(vec[87] == false);
9691056 assert_or_panic(vec[88] == true);
9701057 assert_or_panic(vec[89] == true);
971 assert_or_panic(vec[90] == true);
972 assert_or_panic(vec[91] == true);
973 assert_or_panic(vec[92] == false);
1058 assert_or_panic(vec[90] == false);
1059 assert_or_panic(vec[91] == false);
1060 assert_or_panic(vec[92] == true);
9741061 assert_or_panic(vec[93] == true);
9751062 assert_or_panic(vec[94] == true);
976 assert_or_panic(vec[95] == false);
1063 assert_or_panic(vec[95] == true);
9771064 assert_or_panic(vec[96] == false);
978 assert_or_panic(vec[97] == true);
979 assert_or_panic(vec[98] == true);
1065 assert_or_panic(vec[97] == false);
1066 assert_or_panic(vec[98] == false);
9801067 assert_or_panic(vec[99] == false);
981 assert_or_panic(vec[100] == true);
982 assert_or_panic(vec[101] == false);
1068 assert_or_panic(vec[100] == false);
1069 assert_or_panic(vec[101] == true);
9831070 assert_or_panic(vec[102] == false);
984 assert_or_panic(vec[103] == true);
1071 assert_or_panic(vec[103] == false);
9851072 assert_or_panic(vec[104] == false);
986 assert_or_panic(vec[105] == true);
1073 assert_or_panic(vec[105] == false);
9871074 assert_or_panic(vec[106] == true);
9881075 assert_or_panic(vec[107] == true);
9891076 assert_or_panic(vec[108] == true);
9901077 assert_or_panic(vec[109] == true);
991 assert_or_panic(vec[110] == false);
1078 assert_or_panic(vec[110] == true);
9921079 assert_or_panic(vec[111] == false);
9931080 assert_or_panic(vec[112] == false);
994 assert_or_panic(vec[113] == false);
995 assert_or_panic(vec[114] == true);
1081 assert_or_panic(vec[113] == true);
1082 assert_or_panic(vec[114] == false);
9961083 assert_or_panic(vec[115] == true);
9971084 assert_or_panic(vec[116] == false);
998 assert_or_panic(vec[117] == true);
999 assert_or_panic(vec[118] == false);
1085 assert_or_panic(vec[117] == false);
1086 assert_or_panic(vec[118] == true);
10001087 assert_or_panic(vec[119] == false);
10011088 assert_or_panic(vec[120] == true);
10021089 assert_or_panic(vec[121] == false);
1003 assert_or_panic(vec[122] == false);
1090 assert_or_panic(vec[122] == true);
10041091 assert_or_panic(vec[123] == true);
1005 assert_or_panic(vec[124] == false);
1092 assert_or_panic(vec[124] == true);
10061093 assert_or_panic(vec[125] == true);
10071094 assert_or_panic(vec[126] == true);
10081095 assert_or_panic(vec[127] == true);
1009 assert_or_panic(vec[128] == true);
1010 assert_or_panic(vec[129] == false);
1011 assert_or_panic(vec[130] == true);
1012 assert_or_panic(vec[131] == true);
1013 assert_or_panic(vec[132] == false);
1014 assert_or_panic(vec[133] == false);
1015 assert_or_panic(vec[134] == true);
1016 assert_or_panic(vec[135] == false);
1017 assert_or_panic(vec[136] == false);
1018 assert_or_panic(vec[137] == true);
1019 assert_or_panic(vec[138] == false);
1020 assert_or_panic(vec[139] == true);
1021 assert_or_panic(vec[140] == false);
1022 assert_or_panic(vec[141] == true);
1023 assert_or_panic(vec[142] == true);
1024 assert_or_panic(vec[143] == true);
1025 assert_or_panic(vec[144] == true);
1026 assert_or_panic(vec[145] == false);
1027 assert_or_panic(vec[146] == true);
1028 assert_or_panic(vec[147] == false);
1029 assert_or_panic(vec[148] == false);
1030 assert_or_panic(vec[149] == false);
1031 assert_or_panic(vec[150] == true);
1032 assert_or_panic(vec[151] == true);
1033 assert_or_panic(vec[152] == true);
1034 assert_or_panic(vec[153] == true);
1035 assert_or_panic(vec[154] == true);
1036 assert_or_panic(vec[155] == false);
1037 assert_or_panic(vec[156] == true);
1038 assert_or_panic(vec[157] == false);
1039 assert_or_panic(vec[158] == false);
1040 assert_or_panic(vec[159] == false);
1041 assert_or_panic(vec[160] == true);
1042 assert_or_panic(vec[161] == true);
1043 assert_or_panic(vec[162] == false);
1044 assert_or_panic(vec[163] == true);
1045 assert_or_panic(vec[164] == true);
1046 assert_or_panic(vec[165] == false);
1047 assert_or_panic(vec[166] == false);
1048 assert_or_panic(vec[167] == false);
1049 assert_or_panic(vec[168] == false);
1050 assert_or_panic(vec[169] == true);
1051 assert_or_panic(vec[170] == false);
1052 assert_or_panic(vec[171] == true);
1053 assert_or_panic(vec[172] == false);
1054 assert_or_panic(vec[173] == false);
1055 assert_or_panic(vec[174] == false);
1056 assert_or_panic(vec[175] == false);
1057 assert_or_panic(vec[176] == true);
1058 assert_or_panic(vec[177] == true);
1059 assert_or_panic(vec[178] == true);
1060 assert_or_panic(vec[179] == false);
1061 assert_or_panic(vec[180] == true);
1062 assert_or_panic(vec[181] == false);
1063 assert_or_panic(vec[182] == true);
1064 assert_or_panic(vec[183] == true);
1065 assert_or_panic(vec[184] == false);
1066 assert_or_panic(vec[185] == false);
1067 assert_or_panic(vec[186] == true);
1068 assert_or_panic(vec[187] == false);
1069 assert_or_panic(vec[188] == false);
1070 assert_or_panic(vec[189] == false);
1071 assert_or_panic(vec[190] == false);
1072 assert_or_panic(vec[191] == true);
1073 assert_or_panic(vec[192] == true);
1074 assert_or_panic(vec[193] == true);
1075 assert_or_panic(vec[194] == true);
1076 assert_or_panic(vec[195] == true);
1077 assert_or_panic(vec[196] == true);
1078 assert_or_panic(vec[197] == true);
1079 assert_or_panic(vec[198] == false);
1080 assert_or_panic(vec[199] == true);
1081 assert_or_panic(vec[200] == false);
1082 assert_or_panic(vec[201] == false);
1083 assert_or_panic(vec[202] == true);
1084 assert_or_panic(vec[203] == false);
1085 assert_or_panic(vec[204] == true);
1086 assert_or_panic(vec[205] == true);
1087 assert_or_panic(vec[206] == true);
1088 assert_or_panic(vec[207] == false);
1089 assert_or_panic(vec[208] == false);
1090 assert_or_panic(vec[209] == true);
1091 assert_or_panic(vec[210] == true);
1092 assert_or_panic(vec[211] == true);
1093 assert_or_panic(vec[212] == false);
1094 assert_or_panic(vec[213] == true);
1095 assert_or_panic(vec[214] == true);
1096 assert_or_panic(vec[215] == true);
1097 assert_or_panic(vec[216] == true);
1098 assert_or_panic(vec[217] == true);
1099 assert_or_panic(vec[218] == false);
1100 assert_or_panic(vec[219] == false);
1101 assert_or_panic(vec[220] == false);
1102 assert_or_panic(vec[221] == false);
1103 assert_or_panic(vec[222] == false);
1104 assert_or_panic(vec[223] == true);
1105 assert_or_panic(vec[224] == true);
1106 assert_or_panic(vec[225] == false);
1107 assert_or_panic(vec[226] == true);
1108 assert_or_panic(vec[227] == false);
1109 assert_or_panic(vec[228] == false);
1110 assert_or_panic(vec[229] == true);
1111 assert_or_panic(vec[230] == false);
1112 assert_or_panic(vec[231] == true);
1113 assert_or_panic(vec[232] == false);
1114 assert_or_panic(vec[233] == false);
1115 assert_or_panic(vec[234] == false);
1116 assert_or_panic(vec[235] == true);
1117 assert_or_panic(vec[236] == false);
1118 assert_or_panic(vec[237] == false);
1119 assert_or_panic(vec[238] == false);
1120 assert_or_panic(vec[239] == true);
1121 assert_or_panic(vec[240] == true);
1122 assert_or_panic(vec[241] == true);
1123 assert_or_panic(vec[242] == true);
1124 assert_or_panic(vec[243] == true);
1125 assert_or_panic(vec[244] == true);
1126 assert_or_panic(vec[245] == false);
1127 assert_or_panic(vec[246] == false);
1128 assert_or_panic(vec[247] == true);
1129 assert_or_panic(vec[248] == false);
1130 assert_or_panic(vec[249] == true);
1131 assert_or_panic(vec[250] == true);
1132 assert_or_panic(vec[251] == false);
1133 assert_or_panic(vec[252] == true);
1134 assert_or_panic(vec[253] == true);
1135 assert_or_panic(vec[254] == true);
1136 assert_or_panic(vec[255] == false);
11371096}
1138
1139void c_vector_512_bool(Vector512Bool vec) {
1097void c_test_vector_128_bool(void) {
1098 Vector_128_bool vec = zig_ret_vector_128_bool();
11401099 assert_or_panic(vec[0] == true);
11411100 assert_or_panic(vec[1] == true);
1142 assert_or_panic(vec[2] == true);
1143 assert_or_panic(vec[3] == true);
1144 assert_or_panic(vec[4] == true);
1145 assert_or_panic(vec[5] == false);
1146 assert_or_panic(vec[6] == false);
1147 assert_or_panic(vec[7] == true);
1148 assert_or_panic(vec[8] == true);
1101 assert_or_panic(vec[2] == false);
1102 assert_or_panic(vec[3] == false);
1103 assert_or_panic(vec[4] == false);
1104 assert_or_panic(vec[5] == true);
1105 assert_or_panic(vec[6] == true);
1106 assert_or_panic(vec[7] == false);
1107 assert_or_panic(vec[8] == false);
11491108 assert_or_panic(vec[9] == true);
1150 assert_or_panic(vec[10] == true);
1109 assert_or_panic(vec[10] == false);
11511110 assert_or_panic(vec[11] == false);
1152 assert_or_panic(vec[12] == true);
1111 assert_or_panic(vec[12] == false);
11531112 assert_or_panic(vec[13] == true);
11541113 assert_or_panic(vec[14] == false);
1155 assert_or_panic(vec[15] == false);
1156 assert_or_panic(vec[16] == false);
1157 assert_or_panic(vec[17] == true);
1158 assert_or_panic(vec[18] == true);
1114 assert_or_panic(vec[15] == true);
1115 assert_or_panic(vec[16] == true);
1116 assert_or_panic(vec[17] == false);
1117 assert_or_panic(vec[18] == false);
11591118 assert_or_panic(vec[19] == true);
11601119 assert_or_panic(vec[20] == true);
11611120 assert_or_panic(vec[21] == true);
1162 assert_or_panic(vec[22] == false);
1163 assert_or_panic(vec[23] == false);
1164 assert_or_panic(vec[24] == true);
1165 assert_or_panic(vec[25] == true);
1166 assert_or_panic(vec[26] == false);
1167 assert_or_panic(vec[27] == false);
1168 assert_or_panic(vec[28] == false);
1121 assert_or_panic(vec[22] == true);
1122 assert_or_panic(vec[23] == true);
1123 assert_or_panic(vec[24] == false);
1124 assert_or_panic(vec[25] == false);
1125 assert_or_panic(vec[26] == true);
1126 assert_or_panic(vec[27] == true);
1127 assert_or_panic(vec[28] == true);
11691128 assert_or_panic(vec[29] == false);
11701129 assert_or_panic(vec[30] == false);
11711130 assert_or_panic(vec[31] == true);
......@@ -1174,519 +1133,110 @@ void c_vector_512_bool(Vector512Bool vec) {
11741133 assert_or_panic(vec[34] == true);
11751134 assert_or_panic(vec[35] == true);
11761135 assert_or_panic(vec[36] == true);
1177 assert_or_panic(vec[37] == true);
1136 assert_or_panic(vec[37] == false);
11781137 assert_or_panic(vec[38] == true);
11791138 assert_or_panic(vec[39] == true);
1180 assert_or_panic(vec[40] == false);
1181 assert_or_panic(vec[41] == true);
1139 assert_or_panic(vec[40] == true);
1140 assert_or_panic(vec[41] == false);
11821141 assert_or_panic(vec[42] == true);
1183 assert_or_panic(vec[43] == false);
1142 assert_or_panic(vec[43] == true);
11841143 assert_or_panic(vec[44] == false);
11851144 assert_or_panic(vec[45] == false);
1186 assert_or_panic(vec[46] == true);
1145 assert_or_panic(vec[46] == false);
11871146 assert_or_panic(vec[47] == true);
11881147 assert_or_panic(vec[48] == false);
1189 assert_or_panic(vec[49] == true);
1148 assert_or_panic(vec[49] == false);
11901149 assert_or_panic(vec[50] == false);
1191 assert_or_panic(vec[51] == true);
1150 assert_or_panic(vec[51] == false);
11921151 assert_or_panic(vec[52] == true);
11931152 assert_or_panic(vec[53] == false);
11941153 assert_or_panic(vec[54] == true);
11951154 assert_or_panic(vec[55] == false);
1196 assert_or_panic(vec[56] == false);
1197 assert_or_panic(vec[57] == true);
1198 assert_or_panic(vec[58] == true);
1199 assert_or_panic(vec[59] == false);
1155 assert_or_panic(vec[56] == true);
1156 assert_or_panic(vec[57] == false);
1157 assert_or_panic(vec[58] == false);
1158 assert_or_panic(vec[59] == true);
12001159 assert_or_panic(vec[60] == true);
12011160 assert_or_panic(vec[61] == true);
1202 assert_or_panic(vec[62] == false);
1161 assert_or_panic(vec[62] == true);
12031162 assert_or_panic(vec[63] == true);
12041163 assert_or_panic(vec[64] == false);
1205 assert_or_panic(vec[65] == true);
1206 assert_or_panic(vec[66] == true);
1164 assert_or_panic(vec[65] == false);
1165 assert_or_panic(vec[66] == false);
12071166 assert_or_panic(vec[67] == true);
12081167 assert_or_panic(vec[68] == true);
1209 assert_or_panic(vec[69] == true);
1168 assert_or_panic(vec[69] == false);
12101169 assert_or_panic(vec[70] == true);
12111170 assert_or_panic(vec[71] == true);
1212 assert_or_panic(vec[72] == true);
1171 assert_or_panic(vec[72] == false);
12131172 assert_or_panic(vec[73] == true);
1214 assert_or_panic(vec[74] == false);
1215 assert_or_panic(vec[75] == true);
1173 assert_or_panic(vec[74] == true);
1174 assert_or_panic(vec[75] == false);
12161175 assert_or_panic(vec[76] == false);
12171176 assert_or_panic(vec[77] == true);
12181177 assert_or_panic(vec[78] == false);
1219 assert_or_panic(vec[79] == false);
1178 assert_or_panic(vec[79] == true);
12201179 assert_or_panic(vec[80] == false);
1221 assert_or_panic(vec[81] == true);
1222 assert_or_panic(vec[82] == false);
1180 assert_or_panic(vec[81] == false);
1181 assert_or_panic(vec[82] == true);
12231182 assert_or_panic(vec[83] == true);
1224 assert_or_panic(vec[84] == true);
1225 assert_or_panic(vec[85] == false);
1226 assert_or_panic(vec[86] == true);
1227 assert_or_panic(vec[87] == true);
1183 assert_or_panic(vec[84] == false);
1184 assert_or_panic(vec[85] == true);
1185 assert_or_panic(vec[86] == false);
1186 assert_or_panic(vec[87] == false);
12281187 assert_or_panic(vec[88] == true);
1229 assert_or_panic(vec[89] == false);
1188 assert_or_panic(vec[89] == true);
12301189 assert_or_panic(vec[90] == true);
12311190 assert_or_panic(vec[91] == true);
1232 assert_or_panic(vec[92] == false);
1233 assert_or_panic(vec[93] == true);
1191 assert_or_panic(vec[92] == true);
1192 assert_or_panic(vec[93] == false);
12341193 assert_or_panic(vec[94] == false);
12351194 assert_or_panic(vec[95] == true);
1236 assert_or_panic(vec[96] == true);
1195 assert_or_panic(vec[96] == false);
12371196 assert_or_panic(vec[97] == false);
1238 assert_or_panic(vec[98] == false);
1239 assert_or_panic(vec[99] == false);
1197 assert_or_panic(vec[98] == true);
1198 assert_or_panic(vec[99] == true);
12401199 assert_or_panic(vec[100] == true);
12411200 assert_or_panic(vec[101] == true);
1242 assert_or_panic(vec[102] == false);
1201 assert_or_panic(vec[102] == true);
12431202 assert_or_panic(vec[103] == true);
1244 assert_or_panic(vec[104] == false);
1203 assert_or_panic(vec[104] == true);
12451204 assert_or_panic(vec[105] == false);
1246 assert_or_panic(vec[106] == true);
1247 assert_or_panic(vec[107] == false);
1205 assert_or_panic(vec[106] == false);
1206 assert_or_panic(vec[107] == true);
12481207 assert_or_panic(vec[108] == false);
1249 assert_or_panic(vec[109] == true);
1250 assert_or_panic(vec[110] == false);
1208 assert_or_panic(vec[109] == false);
1209 assert_or_panic(vec[110] == true);
12511210 assert_or_panic(vec[111] == false);
12521211 assert_or_panic(vec[112] == false);
1253 assert_or_panic(vec[113] == false);
1212 assert_or_panic(vec[113] == true);
12541213 assert_or_panic(vec[114] == false);
1255 assert_or_panic(vec[115] == true);
1256 assert_or_panic(vec[116] == true);
1214 assert_or_panic(vec[115] == false);
1215 assert_or_panic(vec[116] == false);
12571216 assert_or_panic(vec[117] == false);
12581217 assert_or_panic(vec[118] == false);
12591218 assert_or_panic(vec[119] == false);
1260 assert_or_panic(vec[120] == false);
1219 assert_or_panic(vec[120] == true);
12611220 assert_or_panic(vec[121] == true);
1262 assert_or_panic(vec[122] == false);
1221 assert_or_panic(vec[122] == true);
12631222 assert_or_panic(vec[123] == false);
12641223 assert_or_panic(vec[124] == true);
1265 assert_or_panic(vec[125] == true);
1224 assert_or_panic(vec[125] == false);
12661225 assert_or_panic(vec[126] == false);
12671226 assert_or_panic(vec[127] == true);
1268 assert_or_panic(vec[128] == false);
1269 assert_or_panic(vec[129] == true);
1270 assert_or_panic(vec[130] == true);
1271 assert_or_panic(vec[131] == false);
1272 assert_or_panic(vec[132] == true);
1273 assert_or_panic(vec[133] == false);
1274 assert_or_panic(vec[134] == false);
1275 assert_or_panic(vec[135] == false);
1276 assert_or_panic(vec[136] == false);
1277 assert_or_panic(vec[137] == true);
1278 assert_or_panic(vec[138] == true);
1279 assert_or_panic(vec[139] == false);
1280 assert_or_panic(vec[140] == false);
1281 assert_or_panic(vec[141] == false);
1282 assert_or_panic(vec[142] == true);
1283 assert_or_panic(vec[143] == true);
1284 assert_or_panic(vec[144] == false);
1285 assert_or_panic(vec[145] == false);
1286 assert_or_panic(vec[146] == true);
1287 assert_or_panic(vec[147] == true);
1288 assert_or_panic(vec[148] == true);
1289 assert_or_panic(vec[149] == true);
1290 assert_or_panic(vec[150] == true);
1291 assert_or_panic(vec[151] == true);
1292 assert_or_panic(vec[152] == true);
1293 assert_or_panic(vec[153] == false);
1294 assert_or_panic(vec[154] == true);
1295 assert_or_panic(vec[155] == false);
1296 assert_or_panic(vec[156] == false);
1297 assert_or_panic(vec[157] == true);
1298 assert_or_panic(vec[158] == false);
1299 assert_or_panic(vec[159] == true);
1300 assert_or_panic(vec[160] == false);
1301 assert_or_panic(vec[161] == true);
1302 assert_or_panic(vec[162] == true);
1303 assert_or_panic(vec[163] == true);
1304 assert_or_panic(vec[164] == true);
1305 assert_or_panic(vec[165] == true);
1306 assert_or_panic(vec[166] == true);
1307 assert_or_panic(vec[167] == true);
1308 assert_or_panic(vec[168] == true);
1309 assert_or_panic(vec[169] == false);
1310 assert_or_panic(vec[170] == true);
1311 assert_or_panic(vec[171] == true);
1312 assert_or_panic(vec[172] == false);
1313 assert_or_panic(vec[173] == true);
1314 assert_or_panic(vec[174] == true);
1315 assert_or_panic(vec[175] == false);
1316 assert_or_panic(vec[176] == false);
1317 assert_or_panic(vec[177] == false);
1318 assert_or_panic(vec[178] == true);
1319 assert_or_panic(vec[179] == false);
1320 assert_or_panic(vec[180] == false);
1321 assert_or_panic(vec[181] == true);
1322 assert_or_panic(vec[182] == true);
1323 assert_or_panic(vec[183] == true);
1324 assert_or_panic(vec[184] == true);
1325 assert_or_panic(vec[185] == true);
1326 assert_or_panic(vec[186] == true);
1327 assert_or_panic(vec[187] == true);
1328 assert_or_panic(vec[188] == true);
1329 assert_or_panic(vec[189] == true);
1330 assert_or_panic(vec[190] == false);
1331 assert_or_panic(vec[191] == true);
1332 assert_or_panic(vec[192] == true);
1333 assert_or_panic(vec[193] == false);
1334 assert_or_panic(vec[194] == false);
1335 assert_or_panic(vec[195] == true);
1336 assert_or_panic(vec[196] == true);
1337 assert_or_panic(vec[197] == false);
1338 assert_or_panic(vec[198] == true);
1339 assert_or_panic(vec[199] == true);
1340 assert_or_panic(vec[200] == false);
1341 assert_or_panic(vec[201] == true);
1342 assert_or_panic(vec[202] == true);
1343 assert_or_panic(vec[203] == false);
1344 assert_or_panic(vec[204] == true);
1345 assert_or_panic(vec[205] == true);
1346 assert_or_panic(vec[206] == true);
1347 assert_or_panic(vec[207] == true);
1348 assert_or_panic(vec[208] == false);
1349 assert_or_panic(vec[209] == true);
1350 assert_or_panic(vec[210] == false);
1351 assert_or_panic(vec[211] == true);
1352 assert_or_panic(vec[212] == true);
1353 assert_or_panic(vec[213] == false);
1354 assert_or_panic(vec[214] == true);
1355 assert_or_panic(vec[215] == false);
1356 assert_or_panic(vec[216] == true);
1357 assert_or_panic(vec[217] == false);
1358 assert_or_panic(vec[218] == true);
1359 assert_or_panic(vec[219] == false);
1360 assert_or_panic(vec[220] == false);
1361 assert_or_panic(vec[221] == true);
1362 assert_or_panic(vec[222] == false);
1363 assert_or_panic(vec[223] == false);
1364 assert_or_panic(vec[224] == false);
1365 assert_or_panic(vec[225] == true);
1366 assert_or_panic(vec[226] == true);
1367 assert_or_panic(vec[227] == false);
1368 assert_or_panic(vec[228] == false);
1369 assert_or_panic(vec[229] == false);
1370 assert_or_panic(vec[230] == true);
1371 assert_or_panic(vec[231] == false);
1372 assert_or_panic(vec[232] == true);
1373 assert_or_panic(vec[233] == false);
1374 assert_or_panic(vec[234] == false);
1375 assert_or_panic(vec[235] == false);
1376 assert_or_panic(vec[236] == true);
1377 assert_or_panic(vec[237] == true);
1378 assert_or_panic(vec[238] == false);
1379 assert_or_panic(vec[239] == false);
1380 assert_or_panic(vec[240] == false);
1381 assert_or_panic(vec[241] == false);
1382 assert_or_panic(vec[242] == false);
1383 assert_or_panic(vec[243] == true);
1384 assert_or_panic(vec[244] == true);
1385 assert_or_panic(vec[245] == false);
1386 assert_or_panic(vec[246] == true);
1387 assert_or_panic(vec[247] == false);
1388 assert_or_panic(vec[248] == false);
1389 assert_or_panic(vec[249] == true);
1390 assert_or_panic(vec[250] == false);
1391 assert_or_panic(vec[251] == false);
1392 assert_or_panic(vec[252] == false);
1393 assert_or_panic(vec[253] == true);
1394 assert_or_panic(vec[254] == false);
1395 assert_or_panic(vec[255] == false);
1396 assert_or_panic(vec[256] == false);
1397 assert_or_panic(vec[257] == false);
1398 assert_or_panic(vec[258] == true);
1399 assert_or_panic(vec[259] == true);
1400 assert_or_panic(vec[260] == true);
1401 assert_or_panic(vec[261] == true);
1402 assert_or_panic(vec[262] == false);
1403 assert_or_panic(vec[263] == true);
1404 assert_or_panic(vec[264] == false);
1405 assert_or_panic(vec[265] == false);
1406 assert_or_panic(vec[266] == false);
1407 assert_or_panic(vec[267] == true);
1408 assert_or_panic(vec[268] == false);
1409 assert_or_panic(vec[269] == false);
1410 assert_or_panic(vec[270] == true);
1411 assert_or_panic(vec[271] == true);
1412 assert_or_panic(vec[272] == false);
1413 assert_or_panic(vec[273] == false);
1414 assert_or_panic(vec[274] == false);
1415 assert_or_panic(vec[275] == false);
1416 assert_or_panic(vec[276] == false);
1417 assert_or_panic(vec[277] == true);
1418 assert_or_panic(vec[278] == false);
1419 assert_or_panic(vec[279] == true);
1420 assert_or_panic(vec[280] == true);
1421 assert_or_panic(vec[281] == true);
1422 assert_or_panic(vec[282] == true);
1423 assert_or_panic(vec[283] == true);
1424 assert_or_panic(vec[284] == false);
1425 assert_or_panic(vec[285] == false);
1426 assert_or_panic(vec[286] == false);
1427 assert_or_panic(vec[287] == false);
1428 assert_or_panic(vec[288] == false);
1429 assert_or_panic(vec[289] == false);
1430 assert_or_panic(vec[290] == false);
1431 assert_or_panic(vec[291] == false);
1432 assert_or_panic(vec[292] == false);
1433 assert_or_panic(vec[293] == true);
1434 assert_or_panic(vec[294] == true);
1435 assert_or_panic(vec[295] == true);
1436 assert_or_panic(vec[296] == true);
1437 assert_or_panic(vec[297] == true);
1438 assert_or_panic(vec[298] == true);
1439 assert_or_panic(vec[299] == false);
1440 assert_or_panic(vec[300] == true);
1441 assert_or_panic(vec[301] == false);
1442 assert_or_panic(vec[302] == true);
1443 assert_or_panic(vec[303] == true);
1444 assert_or_panic(vec[304] == true);
1445 assert_or_panic(vec[305] == false);
1446 assert_or_panic(vec[306] == false);
1447 assert_or_panic(vec[307] == true);
1448 assert_or_panic(vec[308] == true);
1449 assert_or_panic(vec[309] == true);
1450 assert_or_panic(vec[310] == false);
1451 assert_or_panic(vec[311] == true);
1452 assert_or_panic(vec[312] == true);
1453 assert_or_panic(vec[313] == true);
1454 assert_or_panic(vec[314] == false);
1455 assert_or_panic(vec[315] == true);
1456 assert_or_panic(vec[316] == true);
1457 assert_or_panic(vec[317] == true);
1458 assert_or_panic(vec[318] == false);
1459 assert_or_panic(vec[319] == true);
1460 assert_or_panic(vec[320] == true);
1461 assert_or_panic(vec[321] == false);
1462 assert_or_panic(vec[322] == false);
1463 assert_or_panic(vec[323] == true);
1464 assert_or_panic(vec[324] == false);
1465 assert_or_panic(vec[325] == false);
1466 assert_or_panic(vec[326] == false);
1467 assert_or_panic(vec[327] == false);
1468 assert_or_panic(vec[328] == true);
1469 assert_or_panic(vec[329] == false);
1470 assert_or_panic(vec[330] == true);
1471 assert_or_panic(vec[331] == true);
1472 assert_or_panic(vec[332] == true);
1473 assert_or_panic(vec[333] == true);
1474 assert_or_panic(vec[334] == false);
1475 assert_or_panic(vec[335] == false);
1476 assert_or_panic(vec[336] == true);
1477 assert_or_panic(vec[337] == false);
1478 assert_or_panic(vec[338] == true);
1479 assert_or_panic(vec[339] == false);
1480 assert_or_panic(vec[340] == false);
1481 assert_or_panic(vec[341] == false);
1482 assert_or_panic(vec[342] == true);
1483 assert_or_panic(vec[343] == false);
1484 assert_or_panic(vec[344] == true);
1485 assert_or_panic(vec[345] == false);
1486 assert_or_panic(vec[346] == false);
1487 assert_or_panic(vec[347] == true);
1488 assert_or_panic(vec[348] == true);
1489 assert_or_panic(vec[349] == true);
1490 assert_or_panic(vec[350] == true);
1491 assert_or_panic(vec[351] == false);
1492 assert_or_panic(vec[352] == false);
1493 assert_or_panic(vec[353] == false);
1494 assert_or_panic(vec[354] == true);
1495 assert_or_panic(vec[355] == true);
1496 assert_or_panic(vec[356] == false);
1497 assert_or_panic(vec[357] == true);
1498 assert_or_panic(vec[358] == false);
1499 assert_or_panic(vec[359] == false);
1500 assert_or_panic(vec[360] == true);
1501 assert_or_panic(vec[361] == false);
1502 assert_or_panic(vec[362] == true);
1503 assert_or_panic(vec[363] == false);
1504 assert_or_panic(vec[364] == true);
1505 assert_or_panic(vec[365] == true);
1506 assert_or_panic(vec[366] == false);
1507 assert_or_panic(vec[367] == false);
1508 assert_or_panic(vec[368] == true);
1509 assert_or_panic(vec[369] == true);
1510 assert_or_panic(vec[370] == true);
1511 assert_or_panic(vec[371] == true);
1512 assert_or_panic(vec[372] == false);
1513 assert_or_panic(vec[373] == false);
1514 assert_or_panic(vec[374] == true);
1515 assert_or_panic(vec[375] == false);
1516 assert_or_panic(vec[376] == true);
1517 assert_or_panic(vec[377] == true);
1518 assert_or_panic(vec[378] == false);
1519 assert_or_panic(vec[379] == true);
1520 assert_or_panic(vec[380] == true);
1521 assert_or_panic(vec[381] == false);
1522 assert_or_panic(vec[382] == true);
1523 assert_or_panic(vec[383] == true);
1524 assert_or_panic(vec[384] == true);
1525 assert_or_panic(vec[385] == false);
1526 assert_or_panic(vec[386] == true);
1527 assert_or_panic(vec[387] == true);
1528 assert_or_panic(vec[388] == true);
1529 assert_or_panic(vec[389] == false);
1530 assert_or_panic(vec[390] == false);
1531 assert_or_panic(vec[391] == true);
1532 assert_or_panic(vec[392] == false);
1533 assert_or_panic(vec[393] == true);
1534 assert_or_panic(vec[394] == true);
1535 assert_or_panic(vec[395] == true);
1536 assert_or_panic(vec[396] == false);
1537 assert_or_panic(vec[397] == false);
1538 assert_or_panic(vec[398] == false);
1539 assert_or_panic(vec[399] == false);
1540 assert_or_panic(vec[400] == false);
1541 assert_or_panic(vec[401] == true);
1542 assert_or_panic(vec[402] == false);
1543 assert_or_panic(vec[403] == false);
1544 assert_or_panic(vec[404] == false);
1545 assert_or_panic(vec[405] == false);
1546 assert_or_panic(vec[406] == true);
1547 assert_or_panic(vec[407] == false);
1548 assert_or_panic(vec[408] == false);
1549 assert_or_panic(vec[409] == true);
1550 assert_or_panic(vec[410] == true);
1551 assert_or_panic(vec[411] == false);
1552 assert_or_panic(vec[412] == false);
1553 assert_or_panic(vec[413] == false);
1554 assert_or_panic(vec[414] == false);
1555 assert_or_panic(vec[415] == true);
1556 assert_or_panic(vec[416] == true);
1557 assert_or_panic(vec[417] == true);
1558 assert_or_panic(vec[418] == true);
1559 assert_or_panic(vec[419] == true);
1560 assert_or_panic(vec[420] == false);
1561 assert_or_panic(vec[421] == false);
1562 assert_or_panic(vec[422] == false);
1563 assert_or_panic(vec[423] == true);
1564 assert_or_panic(vec[424] == false);
1565 assert_or_panic(vec[425] == false);
1566 assert_or_panic(vec[426] == false);
1567 assert_or_panic(vec[427] == false);
1568 assert_or_panic(vec[428] == true);
1569 assert_or_panic(vec[429] == false);
1570 assert_or_panic(vec[430] == true);
1571 assert_or_panic(vec[431] == false);
1572 assert_or_panic(vec[432] == true);
1573 assert_or_panic(vec[433] == true);
1574 assert_or_panic(vec[434] == true);
1575 assert_or_panic(vec[435] == true);
1576 assert_or_panic(vec[436] == false);
1577 assert_or_panic(vec[437] == false);
1578 assert_or_panic(vec[438] == false);
1579 assert_or_panic(vec[439] == false);
1580 assert_or_panic(vec[440] == false);
1581 assert_or_panic(vec[441] == true);
1582 assert_or_panic(vec[442] == true);
1583 assert_or_panic(vec[443] == true);
1584 assert_or_panic(vec[444] == true);
1585 assert_or_panic(vec[445] == true);
1586 assert_or_panic(vec[446] == true);
1587 assert_or_panic(vec[447] == true);
1588 assert_or_panic(vec[448] == true);
1589 assert_or_panic(vec[449] == true);
1590 assert_or_panic(vec[450] == false);
1591 assert_or_panic(vec[451] == false);
1592 assert_or_panic(vec[452] == true);
1593 assert_or_panic(vec[453] == false);
1594 assert_or_panic(vec[454] == true);
1595 assert_or_panic(vec[455] == false);
1596 assert_or_panic(vec[456] == false);
1597 assert_or_panic(vec[457] == true);
1598 assert_or_panic(vec[458] == false);
1599 assert_or_panic(vec[459] == false);
1600 assert_or_panic(vec[460] == true);
1601 assert_or_panic(vec[461] == true);
1602 assert_or_panic(vec[462] == true);
1603 assert_or_panic(vec[463] == true);
1604 assert_or_panic(vec[464] == true);
1605 assert_or_panic(vec[465] == true);
1606 assert_or_panic(vec[466] == false);
1607 assert_or_panic(vec[467] == true);
1608 assert_or_panic(vec[468] == false);
1609 assert_or_panic(vec[469] == false);
1610 assert_or_panic(vec[470] == false);
1611 assert_or_panic(vec[471] == true);
1612 assert_or_panic(vec[472] == true);
1613 assert_or_panic(vec[473] == false);
1614 assert_or_panic(vec[474] == true);
1615 assert_or_panic(vec[475] == true);
1616 assert_or_panic(vec[476] == false);
1617 assert_or_panic(vec[477] == false);
1618 assert_or_panic(vec[478] == true);
1619 assert_or_panic(vec[479] == true);
1620 assert_or_panic(vec[480] == false);
1621 assert_or_panic(vec[481] == false);
1622 assert_or_panic(vec[482] == true);
1623 assert_or_panic(vec[483] == true);
1624 assert_or_panic(vec[484] == false);
1625 assert_or_panic(vec[485] == true);
1626 assert_or_panic(vec[486] == false);
1627 assert_or_panic(vec[487] == true);
1628 assert_or_panic(vec[488] == true);
1629 assert_or_panic(vec[489] == true);
1630 assert_or_panic(vec[490] == true);
1631 assert_or_panic(vec[491] == true);
1632 assert_or_panic(vec[492] == true);
1633 assert_or_panic(vec[493] == true);
1634 assert_or_panic(vec[494] == true);
1635 assert_or_panic(vec[495] == true);
1636 assert_or_panic(vec[496] == false);
1637 assert_or_panic(vec[497] == true);
1638 assert_or_panic(vec[498] == true);
1639 assert_or_panic(vec[499] == true);
1640 assert_or_panic(vec[500] == false);
1641 assert_or_panic(vec[501] == false);
1642 assert_or_panic(vec[502] == true);
1643 assert_or_panic(vec[503] == false);
1644 assert_or_panic(vec[504] == false);
1645 assert_or_panic(vec[505] == false);
1646 assert_or_panic(vec[506] == true);
1647 assert_or_panic(vec[507] == true);
1648 assert_or_panic(vec[508] == false);
1649 assert_or_panic(vec[509] == true);
1650 assert_or_panic(vec[510] == false);
1651 assert_or_panic(vec[511] == true);
1652}
1653
1654#endif
1655
1656Vector2Bool c_ret_vector_2_bool(void) {
1657 return (Vector2Bool){
1227 zig_vector_128_bool((Vector_128_bool){
16581228 true,
1659 false,
1660 };
1661}
1662
1663Vector4Bool c_ret_vector_4_bool(void) {
1664 return (Vector4Bool){
16651229 true,
16661230 false,
16671231 true,
1668 false,
1669 };
1670}
1671
1672Vector8Bool c_ret_vector_8_bool(void) {
1673 return (Vector8Bool){
1674 false,
16751232 true,
16761233 false,
16771234 false,
16781235 true,
1679 false,
1680 false,
16811236 true,
1682 };
1683}
1684
1685Vector16Bool c_ret_vector_16_bool(void) {
1686 return (Vector16Bool){
16871237 true,
16881238 true,
1689 false,
1239 true,
16901240 false,
16911241 false,
16921242 false,
......@@ -1696,39 +1246,26 @@ Vector16Bool c_ret_vector_16_bool(void) {
16961246 false,
16971247 false,
16981248 true,
1699 true,
17001249 false,
1701 true,
1702 true,
1703 };
1704}
1705
1706Vector32Bool c_ret_vector_32_bool(void) {
1707 return (Vector32Bool){
17081250 true,
17091251 false,
1710 true,
1711 true,
1712 true,
17131252 false,
1714 true,
17151253 false,
17161254 true,
1717 true,
1718 true,
17191255 false,
17201256 true,
17211257 true,
17221258 false,
1259 true,
17231260 false,
17241261 true,
1262 true,
17251263 false,
17261264 false,
17271265 false,
17281266 false,
17291267 true,
17301268 true,
1731 true,
17321269 false,
17331270 true,
17341271 false,
......@@ -1736,29 +1273,29 @@ Vector32Bool c_ret_vector_32_bool(void) {
17361273 true,
17371274 false,
17381275 false,
1276 true,
1277 true,
17391278 false,
1740 };
1741}
1742
1743Vector64Bool c_ret_vector_64_bool(void) {
1744 return (Vector64Bool){
17451279 false,
17461280 true,
17471281 false,
1282 false,
17481283 true,
17491284 true,
17501285 true,
1751 false,
17521286 true,
17531287 true,
17541288 true,
17551289 true,
17561290 true,
1291 false,
1292 false,
17571293 true,
17581294 false,
17591295 true,
17601296 true,
17611297 true,
1298 true,
17621299 false,
17631300 false,
17641301 false,
......@@ -1766,37 +1303,22 @@ Vector64Bool c_ret_vector_64_bool(void) {
17661303 true,
17671304 false,
17681305 true,
1769 false,
1770 true,
1771 false,
17721306 true,
1773 false,
17741307 true,
1775 false,
17761308 true,
17771309 false,
1778 false,
17791310 true,
17801311 true,
1781 false,
1782 false,
1783 false,
17841312 true,
17851313 true,
17861314 true,
17871315 true,
17881316 false,
1789 false,
1790 false,
17911317 true,
17921318 true,
1793 false,
1794 false,
17951319 true,
1796 false,
1797 false,
1798 false,
1799 false,
1320 true,
1321 true,
18001322 true,
18011323 false,
18021324 false,
......@@ -1806,144 +1328,41 @@ Vector64Bool c_ret_vector_64_bool(void) {
18061328 true,
18071329 true,
18081330 true,
1809 };
1810}
1811
1812Vector128Bool c_ret_vector_128_bool(void) {
1813 return (Vector128Bool){
1814 false,
18151331 true,
18161332 true,
18171333 false,
1818 true,
1334 false,
1335 false,
18191336 false,
18201337 false,
18211338 true,
18221339 true,
1823 false,
18241340 true,
18251341 false,
18261342 false,
18271343 false,
1828 true,
1344 false,
18291345 false,
18301346 true,
18311347 false,
18321348 false,
1833 true,
18341349 false,
1835 true,
1836 false,
1837 false,
1838 false,
1839 true,
1840 true,
1841 true,
1842 false,
1843 false,
1844 false,
1845 false,
1846 true,
1847 true,
1848 true,
1849 false,
1850 true,
1851 true,
1852 false,
1853 false,
1854 false,
1855 false,
1856 true,
1857 true,
1858 true,
1859 false,
1860 false,
1861 false,
1862 false,
1863 true,
1864 false,
1865 false,
1866 true,
1867 false,
1868 false,
1869 false,
1870 false,
1871 false,
1872 true,
1873 true,
1874 true,
1875 false,
1876 true,
1877 true,
1878 false,
1879 false,
1880 false,
1881 false,
1882 false,
1883 false,
1884 false,
1885 false,
1886 true,
1887 true,
1888 true,
1889 true,
1890 true,
1891 false,
1892 false,
1893 false,
1894 false,
1895 false,
1896 false,
1897 true,
1898 false,
1899 true,
1900 false,
1901 true,
1902 false,
1903 true,
1904 false,
1905 true,
1906 true,
1907 true,
1908 true,
1909 false,
1910 false,
1911 true,
1912 false,
1913 false,
1914 true,
1915 true,
1916 true,
1917 true,
1918 false,
1919 true,
1920 true,
1921 true,
1922 false,
1923 false,
1924 true,
1925 false,
1926 false,
1927 true,
1928 true,
1929 false,
1930 true,
19311350 false,
19321351 true,
19331352 true,
1934 true,
1935 true,
1936 true,
1937 false,
19381353 false,
19391354 true,
19401355 false,
1941 true,
1942 };
1356 });
19431357}
19441358
1945Vector256Bool c_ret_vector_256_bool(void) {
1946 return (Vector256Bool){
1359typedef bool Vector_256_bool __attribute__((ext_vector_type(256)));
1360
1361Vector_256_bool zig_ret_vector_256_bool(void);
1362void zig_vector_256_bool(Vector_256_bool vec);
1363
1364Vector_256_bool c_ret_vector_256_bool(void) {
1365 return (Vector_256_bool){
19471366 true,
19481367 false,
19491368 true,
......@@ -2202,181 +1621,2374 @@ Vector256Bool c_ret_vector_256_bool(void) {
22021621 false,
22031622 };
22041623}
2205
2206Vector512Bool c_ret_vector_512_bool(void) {
2207 return (Vector512Bool){
2208 false,
2209 true,
2210 false,
2211 false,
2212 false,
2213 true,
2214 false,
2215 false,
2216 false,
2217 true,
2218 false,
2219 false,
2220 false,
2221 true,
2222 false,
2223 true,
2224 false,
2225 false,
2226 false,
2227 false,
2228 false,
2229 false,
2230 true,
2231 true,
2232 false,
2233 false,
2234 false,
2235 false,
2236 true,
2237 true,
2238 false,
2239 true,
2240 false,
2241 true,
2242 true,
2243 true,
2244 false,
2245 false,
2246 true,
2247 true,
2248 false,
2249 false,
2250 false,
2251 false,
2252 false,
2253 true,
2254 false,
2255 true,
2256 true,
2257 false,
2258 true,
2259 true,
2260 true,
2261 true,
2262 false,
2263 false,
2264 false,
2265 true,
2266 true,
2267 false,
2268 false,
2269 false,
2270 false,
2271 true,
2272 true,
2273 true,
2274 true,
2275 true,
2276 false,
2277 false,
2278 false,
2279 false,
2280 false,
2281 true,
2282 false,
2283 true,
2284 false,
2285 false,
2286 true,
2287 true,
2288 false,
2289 false,
2290 false,
2291 true,
2292 false,
2293 true,
2294 true,
2295 true,
2296 false,
2297 true,
2298 false,
2299 false,
2300 true,
2301 true,
2302 false,
2303 true,
2304 true,
2305 false,
2306 true,
2307 false,
2308 true,
2309 true,
2310 false,
2311 true,
2312 true,
2313 false,
2314 false,
2315 false,
2316 true,
2317 false,
2318 false,
2319 false,
2320 true,
2321 true,
2322 true,
2323 false,
2324 true,
2325 false,
2326 true,
2327 false,
2328 true,
2329 true,
2330 false,
2331 true,
2332 false,
2333 true,
2334 true,
2335 true,
2336 false,
2337 true,
2338 false,
2339 false,
2340 false,
2341 false,
2342 false,
2343 false,
2344 true,
2345 false,
2346 true,
2347 false,
2348 true,
2349 true,
2350 false,
2351 true,
2352 false,
2353 false,
2354 true,
2355 false,
2356 false,
2357 true,
2358 false,
1624// WASM: The following vector functions define too many Wasm locals for wasmtime in debug mode and are therefore disabled for the wasm target.
1625#ifndef __wasm__
1626void c_vector_256_bool(Vector_256_bool vec) {
1627 assert_or_panic(vec[0] == false);
1628 assert_or_panic(vec[1] == true);
1629 assert_or_panic(vec[2] == true);
1630 assert_or_panic(vec[3] == false);
1631 assert_or_panic(vec[4] == false);
1632 assert_or_panic(vec[5] == true);
1633 assert_or_panic(vec[6] == true);
1634 assert_or_panic(vec[7] == true);
1635 assert_or_panic(vec[8] == false);
1636 assert_or_panic(vec[9] == true);
1637 assert_or_panic(vec[10] == true);
1638 assert_or_panic(vec[11] == true);
1639 assert_or_panic(vec[12] == false);
1640 assert_or_panic(vec[13] == true);
1641 assert_or_panic(vec[14] == false);
1642 assert_or_panic(vec[15] == true);
1643 assert_or_panic(vec[16] == false);
1644 assert_or_panic(vec[17] == false);
1645 assert_or_panic(vec[18] == true);
1646 assert_or_panic(vec[19] == true);
1647 assert_or_panic(vec[20] == false);
1648 assert_or_panic(vec[21] == true);
1649 assert_or_panic(vec[22] == false);
1650 assert_or_panic(vec[23] == false);
1651 assert_or_panic(vec[24] == false);
1652 assert_or_panic(vec[25] == true);
1653 assert_or_panic(vec[26] == true);
1654 assert_or_panic(vec[27] == false);
1655 assert_or_panic(vec[28] == false);
1656 assert_or_panic(vec[29] == true);
1657 assert_or_panic(vec[30] == true);
1658 assert_or_panic(vec[31] == false);
1659 assert_or_panic(vec[32] == true);
1660 assert_or_panic(vec[33] == false);
1661 assert_or_panic(vec[34] == false);
1662 assert_or_panic(vec[35] == true);
1663 assert_or_panic(vec[36] == false);
1664 assert_or_panic(vec[37] == true);
1665 assert_or_panic(vec[38] == false);
1666 assert_or_panic(vec[39] == true);
1667 assert_or_panic(vec[40] == true);
1668 assert_or_panic(vec[41] == true);
1669 assert_or_panic(vec[42] == true);
1670 assert_or_panic(vec[43] == false);
1671 assert_or_panic(vec[44] == false);
1672 assert_or_panic(vec[45] == true);
1673 assert_or_panic(vec[46] == false);
1674 assert_or_panic(vec[47] == false);
1675 assert_or_panic(vec[48] == false);
1676 assert_or_panic(vec[49] == false);
1677 assert_or_panic(vec[50] == false);
1678 assert_or_panic(vec[51] == false);
1679 assert_or_panic(vec[52] == true);
1680 assert_or_panic(vec[53] == true);
1681 assert_or_panic(vec[54] == true);
1682 assert_or_panic(vec[55] == true);
1683 assert_or_panic(vec[56] == true);
1684 assert_or_panic(vec[57] == true);
1685 assert_or_panic(vec[58] == false);
1686 assert_or_panic(vec[59] == true);
1687 assert_or_panic(vec[60] == true);
1688 assert_or_panic(vec[61] == false);
1689 assert_or_panic(vec[62] == false);
1690 assert_or_panic(vec[63] == true);
1691 assert_or_panic(vec[64] == false);
1692 assert_or_panic(vec[65] == false);
1693 assert_or_panic(vec[66] == false);
1694 assert_or_panic(vec[67] == false);
1695 assert_or_panic(vec[68] == false);
1696 assert_or_panic(vec[69] == false);
1697 assert_or_panic(vec[70] == true);
1698 assert_or_panic(vec[71] == true);
1699 assert_or_panic(vec[72] == true);
1700 assert_or_panic(vec[73] == false);
1701 assert_or_panic(vec[74] == false);
1702 assert_or_panic(vec[75] == false);
1703 assert_or_panic(vec[76] == true);
1704 assert_or_panic(vec[77] == false);
1705 assert_or_panic(vec[78] == true);
1706 assert_or_panic(vec[79] == true);
1707 assert_or_panic(vec[80] == false);
1708 assert_or_panic(vec[81] == false);
1709 assert_or_panic(vec[82] == true);
1710 assert_or_panic(vec[83] == true);
1711 assert_or_panic(vec[84] == false);
1712 assert_or_panic(vec[85] == true);
1713 assert_or_panic(vec[86] == true);
1714 assert_or_panic(vec[87] == true);
1715 assert_or_panic(vec[88] == true);
1716 assert_or_panic(vec[89] == true);
1717 assert_or_panic(vec[90] == true);
1718 assert_or_panic(vec[91] == true);
1719 assert_or_panic(vec[92] == false);
1720 assert_or_panic(vec[93] == true);
1721 assert_or_panic(vec[94] == true);
1722 assert_or_panic(vec[95] == false);
1723 assert_or_panic(vec[96] == false);
1724 assert_or_panic(vec[97] == true);
1725 assert_or_panic(vec[98] == true);
1726 assert_or_panic(vec[99] == false);
1727 assert_or_panic(vec[100] == true);
1728 assert_or_panic(vec[101] == false);
1729 assert_or_panic(vec[102] == false);
1730 assert_or_panic(vec[103] == true);
1731 assert_or_panic(vec[104] == false);
1732 assert_or_panic(vec[105] == true);
1733 assert_or_panic(vec[106] == true);
1734 assert_or_panic(vec[107] == true);
1735 assert_or_panic(vec[108] == true);
1736 assert_or_panic(vec[109] == true);
1737 assert_or_panic(vec[110] == false);
1738 assert_or_panic(vec[111] == false);
1739 assert_or_panic(vec[112] == false);
1740 assert_or_panic(vec[113] == false);
1741 assert_or_panic(vec[114] == true);
1742 assert_or_panic(vec[115] == true);
1743 assert_or_panic(vec[116] == false);
1744 assert_or_panic(vec[117] == true);
1745 assert_or_panic(vec[118] == false);
1746 assert_or_panic(vec[119] == false);
1747 assert_or_panic(vec[120] == true);
1748 assert_or_panic(vec[121] == false);
1749 assert_or_panic(vec[122] == false);
1750 assert_or_panic(vec[123] == true);
1751 assert_or_panic(vec[124] == false);
1752 assert_or_panic(vec[125] == true);
1753 assert_or_panic(vec[126] == true);
1754 assert_or_panic(vec[127] == true);
1755 assert_or_panic(vec[128] == true);
1756 assert_or_panic(vec[129] == false);
1757 assert_or_panic(vec[130] == true);
1758 assert_or_panic(vec[131] == true);
1759 assert_or_panic(vec[132] == false);
1760 assert_or_panic(vec[133] == false);
1761 assert_or_panic(vec[134] == true);
1762 assert_or_panic(vec[135] == false);
1763 assert_or_panic(vec[136] == false);
1764 assert_or_panic(vec[137] == true);
1765 assert_or_panic(vec[138] == false);
1766 assert_or_panic(vec[139] == true);
1767 assert_or_panic(vec[140] == false);
1768 assert_or_panic(vec[141] == true);
1769 assert_or_panic(vec[142] == true);
1770 assert_or_panic(vec[143] == true);
1771 assert_or_panic(vec[144] == true);
1772 assert_or_panic(vec[145] == false);
1773 assert_or_panic(vec[146] == true);
1774 assert_or_panic(vec[147] == false);
1775 assert_or_panic(vec[148] == false);
1776 assert_or_panic(vec[149] == false);
1777 assert_or_panic(vec[150] == true);
1778 assert_or_panic(vec[151] == true);
1779 assert_or_panic(vec[152] == true);
1780 assert_or_panic(vec[153] == true);
1781 assert_or_panic(vec[154] == true);
1782 assert_or_panic(vec[155] == false);
1783 assert_or_panic(vec[156] == true);
1784 assert_or_panic(vec[157] == false);
1785 assert_or_panic(vec[158] == false);
1786 assert_or_panic(vec[159] == false);
1787 assert_or_panic(vec[160] == true);
1788 assert_or_panic(vec[161] == true);
1789 assert_or_panic(vec[162] == false);
1790 assert_or_panic(vec[163] == true);
1791 assert_or_panic(vec[164] == true);
1792 assert_or_panic(vec[165] == false);
1793 assert_or_panic(vec[166] == false);
1794 assert_or_panic(vec[167] == false);
1795 assert_or_panic(vec[168] == false);
1796 assert_or_panic(vec[169] == true);
1797 assert_or_panic(vec[170] == false);
1798 assert_or_panic(vec[171] == true);
1799 assert_or_panic(vec[172] == false);
1800 assert_or_panic(vec[173] == false);
1801 assert_or_panic(vec[174] == false);
1802 assert_or_panic(vec[175] == false);
1803 assert_or_panic(vec[176] == true);
1804 assert_or_panic(vec[177] == true);
1805 assert_or_panic(vec[178] == true);
1806 assert_or_panic(vec[179] == false);
1807 assert_or_panic(vec[180] == true);
1808 assert_or_panic(vec[181] == false);
1809 assert_or_panic(vec[182] == true);
1810 assert_or_panic(vec[183] == true);
1811 assert_or_panic(vec[184] == false);
1812 assert_or_panic(vec[185] == false);
1813 assert_or_panic(vec[186] == true);
1814 assert_or_panic(vec[187] == false);
1815 assert_or_panic(vec[188] == false);
1816 assert_or_panic(vec[189] == false);
1817 assert_or_panic(vec[190] == false);
1818 assert_or_panic(vec[191] == true);
1819 assert_or_panic(vec[192] == true);
1820 assert_or_panic(vec[193] == true);
1821 assert_or_panic(vec[194] == true);
1822 assert_or_panic(vec[195] == true);
1823 assert_or_panic(vec[196] == true);
1824 assert_or_panic(vec[197] == true);
1825 assert_or_panic(vec[198] == false);
1826 assert_or_panic(vec[199] == true);
1827 assert_or_panic(vec[200] == false);
1828 assert_or_panic(vec[201] == false);
1829 assert_or_panic(vec[202] == true);
1830 assert_or_panic(vec[203] == false);
1831 assert_or_panic(vec[204] == true);
1832 assert_or_panic(vec[205] == true);
1833 assert_or_panic(vec[206] == true);
1834 assert_or_panic(vec[207] == false);
1835 assert_or_panic(vec[208] == false);
1836 assert_or_panic(vec[209] == true);
1837 assert_or_panic(vec[210] == true);
1838 assert_or_panic(vec[211] == true);
1839 assert_or_panic(vec[212] == false);
1840 assert_or_panic(vec[213] == true);
1841 assert_or_panic(vec[214] == true);
1842 assert_or_panic(vec[215] == true);
1843 assert_or_panic(vec[216] == true);
1844 assert_or_panic(vec[217] == true);
1845 assert_or_panic(vec[218] == false);
1846 assert_or_panic(vec[219] == false);
1847 assert_or_panic(vec[220] == false);
1848 assert_or_panic(vec[221] == false);
1849 assert_or_panic(vec[222] == false);
1850 assert_or_panic(vec[223] == true);
1851 assert_or_panic(vec[224] == true);
1852 assert_or_panic(vec[225] == false);
1853 assert_or_panic(vec[226] == true);
1854 assert_or_panic(vec[227] == false);
1855 assert_or_panic(vec[228] == false);
1856 assert_or_panic(vec[229] == true);
1857 assert_or_panic(vec[230] == false);
1858 assert_or_panic(vec[231] == true);
1859 assert_or_panic(vec[232] == false);
1860 assert_or_panic(vec[233] == false);
1861 assert_or_panic(vec[234] == false);
1862 assert_or_panic(vec[235] == true);
1863 assert_or_panic(vec[236] == false);
1864 assert_or_panic(vec[237] == false);
1865 assert_or_panic(vec[238] == false);
1866 assert_or_panic(vec[239] == true);
1867 assert_or_panic(vec[240] == true);
1868 assert_or_panic(vec[241] == true);
1869 assert_or_panic(vec[242] == true);
1870 assert_or_panic(vec[243] == true);
1871 assert_or_panic(vec[244] == true);
1872 assert_or_panic(vec[245] == false);
1873 assert_or_panic(vec[246] == false);
1874 assert_or_panic(vec[247] == true);
1875 assert_or_panic(vec[248] == false);
1876 assert_or_panic(vec[249] == true);
1877 assert_or_panic(vec[250] == true);
1878 assert_or_panic(vec[251] == false);
1879 assert_or_panic(vec[252] == true);
1880 assert_or_panic(vec[253] == true);
1881 assert_or_panic(vec[254] == true);
1882 assert_or_panic(vec[255] == false);
1883}
1884#endif
1885void c_test_vector_256_bool(void) {
1886 Vector_256_bool vec = zig_ret_vector_256_bool();
1887 assert_or_panic(vec[0] == true);
1888 assert_or_panic(vec[1] == true);
1889 assert_or_panic(vec[2] == true);
1890 assert_or_panic(vec[3] == false);
1891 assert_or_panic(vec[4] == true);
1892 assert_or_panic(vec[5] == false);
1893 assert_or_panic(vec[6] == false);
1894 assert_or_panic(vec[7] == true);
1895 assert_or_panic(vec[8] == false);
1896 assert_or_panic(vec[9] == false);
1897 assert_or_panic(vec[10] == false);
1898 assert_or_panic(vec[11] == false);
1899 assert_or_panic(vec[12] == false);
1900 assert_or_panic(vec[13] == false);
1901 assert_or_panic(vec[14] == false);
1902 assert_or_panic(vec[15] == false);
1903 assert_or_panic(vec[16] == true);
1904 assert_or_panic(vec[17] == false);
1905 assert_or_panic(vec[18] == true);
1906 assert_or_panic(vec[19] == false);
1907 assert_or_panic(vec[20] == false);
1908 assert_or_panic(vec[21] == true);
1909 assert_or_panic(vec[22] == true);
1910 assert_or_panic(vec[23] == false);
1911 assert_or_panic(vec[24] == false);
1912 assert_or_panic(vec[25] == true);
1913 assert_or_panic(vec[26] == true);
1914 assert_or_panic(vec[27] == false);
1915 assert_or_panic(vec[28] == true);
1916 assert_or_panic(vec[29] == true);
1917 assert_or_panic(vec[30] == true);
1918 assert_or_panic(vec[31] == false);
1919 assert_or_panic(vec[32] == true);
1920 assert_or_panic(vec[33] == false);
1921 assert_or_panic(vec[34] == true);
1922 assert_or_panic(vec[35] == false);
1923 assert_or_panic(vec[36] == true);
1924 assert_or_panic(vec[37] == false);
1925 assert_or_panic(vec[38] == true);
1926 assert_or_panic(vec[39] == false);
1927 assert_or_panic(vec[40] == false);
1928 assert_or_panic(vec[41] == false);
1929 assert_or_panic(vec[42] == true);
1930 assert_or_panic(vec[43] == true);
1931 assert_or_panic(vec[44] == true);
1932 assert_or_panic(vec[45] == false);
1933 assert_or_panic(vec[46] == false);
1934 assert_or_panic(vec[47] == false);
1935 assert_or_panic(vec[48] == true);
1936 assert_or_panic(vec[49] == false);
1937 assert_or_panic(vec[50] == true);
1938 assert_or_panic(vec[51] == false);
1939 assert_or_panic(vec[52] == true);
1940 assert_or_panic(vec[53] == false);
1941 assert_or_panic(vec[54] == true);
1942 assert_or_panic(vec[55] == true);
1943 assert_or_panic(vec[56] == false);
1944 assert_or_panic(vec[57] == false);
1945 assert_or_panic(vec[58] == false);
1946 assert_or_panic(vec[59] == true);
1947 assert_or_panic(vec[60] == true);
1948 assert_or_panic(vec[61] == true);
1949 assert_or_panic(vec[62] == false);
1950 assert_or_panic(vec[63] == true);
1951 assert_or_panic(vec[64] == false);
1952 assert_or_panic(vec[65] == true);
1953 assert_or_panic(vec[66] == false);
1954 assert_or_panic(vec[67] == true);
1955 assert_or_panic(vec[68] == true);
1956 assert_or_panic(vec[69] == false);
1957 assert_or_panic(vec[70] == true);
1958 assert_or_panic(vec[71] == false);
1959 assert_or_panic(vec[72] == true);
1960 assert_or_panic(vec[73] == true);
1961 assert_or_panic(vec[74] == false);
1962 assert_or_panic(vec[75] == false);
1963 assert_or_panic(vec[76] == false);
1964 assert_or_panic(vec[77] == false);
1965 assert_or_panic(vec[78] == false);
1966 assert_or_panic(vec[79] == false);
1967 assert_or_panic(vec[80] == false);
1968 assert_or_panic(vec[81] == false);
1969 assert_or_panic(vec[82] == false);
1970 assert_or_panic(vec[83] == true);
1971 assert_or_panic(vec[84] == false);
1972 assert_or_panic(vec[85] == false);
1973 assert_or_panic(vec[86] == false);
1974 assert_or_panic(vec[87] == true);
1975 assert_or_panic(vec[88] == false);
1976 assert_or_panic(vec[89] == true);
1977 assert_or_panic(vec[90] == true);
1978 assert_or_panic(vec[91] == false);
1979 assert_or_panic(vec[92] == false);
1980 assert_or_panic(vec[93] == true);
1981 assert_or_panic(vec[94] == true);
1982 assert_or_panic(vec[95] == false);
1983 assert_or_panic(vec[96] == false);
1984 assert_or_panic(vec[97] == true);
1985 assert_or_panic(vec[98] == false);
1986 assert_or_panic(vec[99] == false);
1987 assert_or_panic(vec[100] == false);
1988 assert_or_panic(vec[101] == false);
1989 assert_or_panic(vec[102] == false);
1990 assert_or_panic(vec[103] == false);
1991 assert_or_panic(vec[104] == false);
1992 assert_or_panic(vec[105] == true);
1993 assert_or_panic(vec[106] == true);
1994 assert_or_panic(vec[107] == false);
1995 assert_or_panic(vec[108] == true);
1996 assert_or_panic(vec[109] == false);
1997 assert_or_panic(vec[110] == true);
1998 assert_or_panic(vec[111] == true);
1999 assert_or_panic(vec[112] == false);
2000 assert_or_panic(vec[113] == false);
2001 assert_or_panic(vec[114] == false);
2002 assert_or_panic(vec[115] == false);
2003 assert_or_panic(vec[116] == false);
2004 assert_or_panic(vec[117] == false);
2005 assert_or_panic(vec[118] == false);
2006 assert_or_panic(vec[119] == true);
2007 assert_or_panic(vec[120] == true);
2008 assert_or_panic(vec[121] == true);
2009 assert_or_panic(vec[122] == false);
2010 assert_or_panic(vec[123] == true);
2011 assert_or_panic(vec[124] == true);
2012 assert_or_panic(vec[125] == false);
2013 assert_or_panic(vec[126] == false);
2014 assert_or_panic(vec[127] == true);
2015 assert_or_panic(vec[128] == true);
2016 assert_or_panic(vec[129] == true);
2017 assert_or_panic(vec[130] == true);
2018 assert_or_panic(vec[131] == true);
2019 assert_or_panic(vec[132] == false);
2020 assert_or_panic(vec[133] == true);
2021 assert_or_panic(vec[134] == true);
2022 assert_or_panic(vec[135] == false);
2023 assert_or_panic(vec[136] == false);
2024 assert_or_panic(vec[137] == true);
2025 assert_or_panic(vec[138] == true);
2026 assert_or_panic(vec[139] == false);
2027 assert_or_panic(vec[140] == true);
2028 assert_or_panic(vec[141] == false);
2029 assert_or_panic(vec[142] == true);
2030 assert_or_panic(vec[143] == false);
2031 assert_or_panic(vec[144] == true);
2032 assert_or_panic(vec[145] == true);
2033 assert_or_panic(vec[146] == true);
2034 assert_or_panic(vec[147] == true);
2035 assert_or_panic(vec[148] == false);
2036 assert_or_panic(vec[149] == false);
2037 assert_or_panic(vec[150] == false);
2038 assert_or_panic(vec[151] == true);
2039 assert_or_panic(vec[152] == false);
2040 assert_or_panic(vec[153] == true);
2041 assert_or_panic(vec[154] == false);
2042 assert_or_panic(vec[155] == true);
2043 assert_or_panic(vec[156] == true);
2044 assert_or_panic(vec[157] == false);
2045 assert_or_panic(vec[158] == true);
2046 assert_or_panic(vec[159] == true);
2047 assert_or_panic(vec[160] == true);
2048 assert_or_panic(vec[161] == true);
2049 assert_or_panic(vec[162] == true);
2050 assert_or_panic(vec[163] == false);
2051 assert_or_panic(vec[164] == false);
2052 assert_or_panic(vec[165] == true);
2053 assert_or_panic(vec[166] == false);
2054 assert_or_panic(vec[167] == true);
2055 assert_or_panic(vec[168] == true);
2056 assert_or_panic(vec[169] == true);
2057 assert_or_panic(vec[170] == true);
2058 assert_or_panic(vec[171] == false);
2059 assert_or_panic(vec[172] == true);
2060 assert_or_panic(vec[173] == true);
2061 assert_or_panic(vec[174] == true);
2062 assert_or_panic(vec[175] == true);
2063 assert_or_panic(vec[176] == true);
2064 assert_or_panic(vec[177] == true);
2065 assert_or_panic(vec[178] == true);
2066 assert_or_panic(vec[179] == false);
2067 assert_or_panic(vec[180] == true);
2068 assert_or_panic(vec[181] == false);
2069 assert_or_panic(vec[182] == false);
2070 assert_or_panic(vec[183] == false);
2071 assert_or_panic(vec[184] == true);
2072 assert_or_panic(vec[185] == false);
2073 assert_or_panic(vec[186] == true);
2074 assert_or_panic(vec[187] == true);
2075 assert_or_panic(vec[188] == false);
2076 assert_or_panic(vec[189] == true);
2077 assert_or_panic(vec[190] == false);
2078 assert_or_panic(vec[191] == true);
2079 assert_or_panic(vec[192] == false);
2080 assert_or_panic(vec[193] == true);
2081 assert_or_panic(vec[194] == false);
2082 assert_or_panic(vec[195] == false);
2083 assert_or_panic(vec[196] == true);
2084 assert_or_panic(vec[197] == true);
2085 assert_or_panic(vec[198] == true);
2086 assert_or_panic(vec[199] == true);
2087 assert_or_panic(vec[200] == true);
2088 assert_or_panic(vec[201] == true);
2089 assert_or_panic(vec[202] == true);
2090 assert_or_panic(vec[203] == false);
2091 assert_or_panic(vec[204] == true);
2092 assert_or_panic(vec[205] == false);
2093 assert_or_panic(vec[206] == false);
2094 assert_or_panic(vec[207] == true);
2095 assert_or_panic(vec[208] == true);
2096 assert_or_panic(vec[209] == false);
2097 assert_or_panic(vec[210] == false);
2098 assert_or_panic(vec[211] == false);
2099 assert_or_panic(vec[212] == true);
2100 assert_or_panic(vec[213] == true);
2101 assert_or_panic(vec[214] == true);
2102 assert_or_panic(vec[215] == false);
2103 assert_or_panic(vec[216] == false);
2104 assert_or_panic(vec[217] == true);
2105 assert_or_panic(vec[218] == true);
2106 assert_or_panic(vec[219] == true);
2107 assert_or_panic(vec[220] == true);
2108 assert_or_panic(vec[221] == false);
2109 assert_or_panic(vec[222] == true);
2110 assert_or_panic(vec[223] == false);
2111 assert_or_panic(vec[224] == true);
2112 assert_or_panic(vec[225] == true);
2113 assert_or_panic(vec[226] == true);
2114 assert_or_panic(vec[227] == false);
2115 assert_or_panic(vec[228] == false);
2116 assert_or_panic(vec[229] == false);
2117 assert_or_panic(vec[230] == false);
2118 assert_or_panic(vec[231] == false);
2119 assert_or_panic(vec[232] == true);
2120 assert_or_panic(vec[233] == true);
2121 assert_or_panic(vec[234] == false);
2122 assert_or_panic(vec[235] == false);
2123 assert_or_panic(vec[236] == false);
2124 assert_or_panic(vec[237] == true);
2125 assert_or_panic(vec[238] == true);
2126 assert_or_panic(vec[239] == false);
2127 assert_or_panic(vec[240] == true);
2128 assert_or_panic(vec[241] == true);
2129 assert_or_panic(vec[242] == true);
2130 assert_or_panic(vec[243] == false);
2131 assert_or_panic(vec[244] == true);
2132 assert_or_panic(vec[245] == true);
2133 assert_or_panic(vec[246] == false);
2134 assert_or_panic(vec[247] == true);
2135 assert_or_panic(vec[248] == false);
2136 assert_or_panic(vec[249] == false);
2137 assert_or_panic(vec[250] == true);
2138 assert_or_panic(vec[251] == true);
2139 assert_or_panic(vec[252] == false);
2140 assert_or_panic(vec[253] == true);
2141 assert_or_panic(vec[254] == false);
2142 assert_or_panic(vec[255] == true);
2143 zig_vector_256_bool((Vector_256_bool){
2144 false,
2145 false,
2146 false,
2147 false,
2148 true,
2149 true,
2150 false,
2151 false,
2152 false,
2153 true,
2154 true,
2155 false,
2156 true,
2157 false,
2158 false,
2159 false,
2160 false,
2161 true,
2162 true,
2163 true,
2164 false,
2165 true,
2166 true,
2167 false,
2168 true,
2169 false,
2170 false,
2171 true,
2172 true,
2173 true,
2174 false,
2175 true,
2176 false,
2177 true,
2178 false,
2179 false,
2180 false,
2181 true,
2182 false,
2183 false,
2184 true,
2185 true,
2186 false,
2187 true,
2188 true,
2189 false,
2190 true,
2191 false,
2192 true,
2193 false,
2194 true,
2195 false,
2196 true,
2197 true,
2198 true,
2199 false,
2200 false,
2201 true,
2202 true,
2203 false,
2204 false,
2205 true,
2206 true,
2207 false,
2208 false,
2209 false,
2210 true,
2211 true,
2212 false,
2213 true,
2214 false,
2215 true,
2216 false,
2217 true,
2218 false,
2219 false,
2220 true,
2221 false,
2222 false,
2223 false,
2224 false,
2225 false,
2226 true,
2227 false,
2228 false,
2229 false,
2230 true,
2231 true,
2232 true,
2233 false,
2234 true,
2235 false,
2236 true,
2237 false,
2238 true,
2239 true,
2240 true,
2241 true,
2242 false,
2243 true,
2244 false,
2245 true,
2246 true,
2247 false,
2248 false,
2249 true,
2250 false,
2251 true,
2252 false,
2253 false,
2254 false,
2255 false,
2256 false,
2257 false,
2258 false,
2259 false,
2260 false,
2261 false,
2262 false,
2263 false,
2264 false,
2265 false,
2266 true,
2267 true,
2268 false,
2269 false,
2270 false,
2271 true,
2272 true,
2273 true,
2274 true,
2275 false,
2276 false,
2277 false,
2278 true,
2279 true,
2280 false,
2281 false,
2282 true,
2283 true,
2284 true,
2285 true,
2286 true,
2287 false,
2288 true,
2289 true,
2290 true,
2291 false,
2292 false,
2293 false,
2294 false,
2295 false,
2296 false,
2297 false,
2298 true,
2299 false,
2300 false,
2301 false,
2302 true,
2303 true,
2304 false,
2305 true,
2306 false,
2307 false,
2308 false,
2309 true,
2310 false,
2311 true,
2312 false,
2313 false,
2314 false,
2315 false,
2316 true,
2317 true,
2318 true,
2319 true,
2320 true,
2321 true,
2322 false,
2323 true,
2324 true,
2325 false,
2326 true,
2327 false,
2328 true,
2329 false,
2330 true,
2331 false,
2332 true,
2333 false,
2334 false,
2335 false,
2336 false,
2337 true,
2338 true,
2339 true,
2340 false,
2341 false,
2342 true,
2343 false,
2344 false,
2345 true,
2346 true,
2347 false,
2348 true,
2349 false,
2350 true,
2351 false,
2352 false,
2353 false,
2354 true,
2355 true,
2356 false,
2357 false,
2358 false,
2359 true,
2360 false,
2361 true,
2362 true,
2363 true,
2364 false,
2365 true,
2366 false,
2367 true,
2368 false,
2369 false,
2370 false,
2371 true,
2372 true,
2373 false,
2374 false,
2375 false,
2376 false,
2377 false,
2378 true,
2379 false,
2380 false,
2381 false,
2382 true,
2383 false,
2384 true,
2385 true,
2386 true,
2387 false,
2388 false,
2389 true,
2390 false,
2391 false,
2392 false,
2393 true,
2394 false,
2395 false,
2396 true,
2397 true,
2398 true,
2399 true,
2400 });
2401}
2402
2403typedef bool Vector_512_bool __attribute__((ext_vector_type(512)));
2404
2405Vector_512_bool zig_ret_vector_512_bool(void);
2406void zig_vector_512_bool(Vector_512_bool vec);
2407
2408Vector_512_bool c_ret_vector_512_bool(void) {
2409 return (Vector_512_bool){
2410 false,
2411 true,
2412 false,
2413 false,
2414 false,
2415 true,
2416 false,
2417 false,
2418 false,
2419 true,
2420 false,
2421 false,
2422 false,
2423 true,
2424 false,
2425 true,
2426 false,
2427 false,
2428 false,
2429 false,
2430 false,
2431 false,
2432 true,
2433 true,
2434 false,
2435 false,
2436 false,
2437 false,
2438 true,
2439 true,
2440 false,
2441 true,
2442 false,
2443 true,
2444 true,
2445 true,
2446 false,
2447 false,
2448 true,
2449 true,
2450 false,
2451 false,
2452 false,
2453 false,
2454 false,
2455 true,
2456 false,
2457 true,
2458 true,
2459 false,
2460 true,
2461 true,
2462 true,
2463 true,
2464 false,
2465 false,
2466 false,
2467 true,
2468 true,
2469 false,
2470 false,
2471 false,
2472 false,
2473 true,
2474 true,
2475 true,
2476 true,
2477 true,
2478 false,
2479 false,
2480 false,
2481 false,
2482 false,
2483 true,
2484 false,
2485 true,
2486 false,
2487 false,
2488 true,
2489 true,
2490 false,
2491 false,
2492 false,
2493 true,
2494 false,
2495 true,
2496 true,
2497 true,
2498 false,
2499 true,
2500 false,
2501 false,
2502 true,
2503 true,
2504 false,
2505 true,
2506 true,
2507 false,
2508 true,
2509 false,
2510 true,
2511 true,
2512 false,
2513 true,
2514 true,
2515 false,
2516 false,
2517 false,
2518 true,
2519 false,
2520 false,
2521 false,
2522 true,
2523 true,
2524 true,
2525 false,
2526 true,
2527 false,
2528 true,
2529 false,
2530 true,
2531 true,
2532 false,
2533 true,
2534 false,
2535 true,
2536 true,
2537 true,
2538 false,
2539 true,
2540 false,
2541 false,
2542 false,
2543 false,
2544 false,
2545 false,
2546 true,
2547 false,
2548 true,
2549 false,
2550 true,
2551 true,
2552 false,
2553 true,
2554 false,
2555 false,
2556 true,
2557 false,
2558 false,
2559 true,
2560 false,
2561 true,
2562 false,
2563 true,
2564 false,
2565 false,
2566 true,
2567 false,
2568 true,
2569 true,
2570 true,
2571 false,
2572 false,
2573 true,
2574 false,
2575 false,
2576 false,
2577 true,
2578 true,
2579 true,
2580 false,
2581 true,
2582 false,
2583 false,
2584 false,
2585 false,
2586 false,
2587 true,
2588 true,
2589 false,
2590 false,
2591 true,
2592 false,
2593 false,
2594 false,
2595 false,
2596 false,
2597 true,
2598 true,
2599 false,
2600 false,
2601 false,
2602 false,
2603 false,
2604 false,
2605 true,
2606 true,
2607 false,
2608 true,
2609 true,
2610 true,
2611 true,
2612 true,
2613 true,
2614 false,
2615 false,
2616 false,
2617 false,
2618 true,
2619 false,
2620 true,
2621 true,
2622 true,
2623 true,
2624 false,
2625 false,
2626 false,
2627 true,
2628 true,
2629 false,
2630 true,
2631 true,
2632 false,
2633 false,
2634 false,
2635 true,
2636 true,
2637 true,
2638 true,
2639 false,
2640 true,
2641 false,
2642 true,
2643 true,
2644 true,
2645 true,
2646 false,
2647 true,
2648 false,
2649 true,
2650 false,
2651 true,
2652 false,
2653 false,
2654 false,
2655 true,
2656 true,
2657 false,
2658 true,
2659 false,
2660 false,
2661 false,
2662 true,
2663 true,
2664 true,
2665 true,
2666 true,
2667 false,
2668 true,
2669 true,
2670 true,
2671 true,
2672 false,
2673 true,
2674 false,
2675 false,
2676 true,
2677 false,
2678 true,
2679 false,
2680 false,
2681 true,
2682 true,
2683 false,
2684 true,
2685 false,
2686 false,
2687 true,
2688 false,
2689 false,
2690 true,
2691 true,
2692 true,
2693 false,
2694 false,
2695 true,
2696 true,
2697 true,
2698 false,
2699 false,
2700 false,
2701 false,
2702 false,
2703 false,
2704 true,
2705 false,
2706 true,
2707 false,
2708 true,
2709 true,
2710 false,
2711 false,
2712 false,
2713 false,
2714 true,
2715 true,
2716 true,
2717 true,
2718 true,
2719 false,
2720 true,
2721 true,
2722 true,
2723 true,
2724 true,
2725 false,
2726 true,
2727 true,
2728 true,
2729 false,
2730 true,
2731 false,
2732 true,
2733 true,
2734 true,
2735 false,
2736 false,
2737 true,
2738 true,
2739 true,
2740 false,
2741 false,
2742 true,
2743 true,
2744 false,
2745 true,
2746 true,
2747 true,
2748 true,
2749 true,
2750 true,
2751 false,
2752 true,
2753 false,
2754 true,
2755 false,
2756 false,
2757 false,
2758 false,
2759 true,
2760 true,
2761 true,
2762 true,
2763 false,
2764 true,
2765 false,
2766 true,
2767 true,
2768 false,
2769 true,
2770 false,
2771 false,
2772 true,
2773 false,
2774 false,
2775 false,
2776 false,
2777 false,
2778 false,
2779 false,
2780 true,
2781 false,
2782 true,
2783 true,
2784 false,
2785 false,
2786 true,
2787 false,
2788 false,
2789 true,
2790 false,
2791 false,
2792 true,
2793 false,
2794 false,
2795 false,
2796 false,
2797 true,
2798 true,
2799 true,
2800 true,
2801 true,
2802 true,
2803 true,
2804 false,
2805 true,
2806 true,
2807 false,
2808 false,
2809 false,
2810 true,
2811 false,
2812 true,
2813 true,
2814 false,
2815 true,
2816 true,
2817 true,
2818 true,
2819 false,
2820 false,
2821 false,
2822 true,
2823 true,
2824 false,
2825 true,
2826 false,
2827 true,
2828 false,
2829 false,
2830 false,
2831 false,
2832 true,
2833 true,
2834 true,
2835 false,
2836 true,
2837 false,
2838 false,
2839 false,
2840 true,
2841 true,
2842 false,
2843 true,
2844 false,
2845 false,
2846 true,
2847 true,
2848 true,
2849 true,
2850 true,
2851 true,
2852 false,
2853 false,
2854 false,
2855 true,
2856 true,
2857 true,
2858 false,
2859 false,
2860 false,
2861 false,
2862 false,
2863 false,
2864 false,
2865 false,
2866 false,
2867 false,
2868 false,
2869 true,
2870 false,
2871 false,
2872 false,
2873 true,
2874 false,
2875 false,
2876 false,
2877 false,
2878 true,
2879 true,
2880 true,
2881 true,
2882 true,
2883 false,
2884 false,
2885 true,
2886 true,
2887 true,
2888 false,
2889 true,
2890 true,
2891 true,
2892 false,
2893 true,
2894 false,
2895 true,
2896 false,
2897 true,
2898 false,
2899 true,
2900 true,
2901 true,
2902 true,
2903 false,
2904 true,
2905 true,
2906 false,
2907 true,
2908 false,
2909 false,
2910 false,
2911 false,
2912 false,
2913 false,
2914 false,
2915 false,
2916 false,
2917 true,
2918 true,
2919 false,
23592920 true,
23602921 false,
2922 };
2923}
2924// WASM: The following vector functions define too many Wasm locals for wasmtime in debug mode and are therefore disabled for the wasm target.
2925#ifndef __wasm__
2926void c_vector_512_bool(Vector_512_bool vec) {
2927 assert_or_panic(vec[0] == true);
2928 assert_or_panic(vec[1] == true);
2929 assert_or_panic(vec[2] == true);
2930 assert_or_panic(vec[3] == true);
2931 assert_or_panic(vec[4] == true);
2932 assert_or_panic(vec[5] == false);
2933 assert_or_panic(vec[6] == false);
2934 assert_or_panic(vec[7] == true);
2935 assert_or_panic(vec[8] == true);
2936 assert_or_panic(vec[9] == true);
2937 assert_or_panic(vec[10] == true);
2938 assert_or_panic(vec[11] == false);
2939 assert_or_panic(vec[12] == true);
2940 assert_or_panic(vec[13] == true);
2941 assert_or_panic(vec[14] == false);
2942 assert_or_panic(vec[15] == false);
2943 assert_or_panic(vec[16] == false);
2944 assert_or_panic(vec[17] == true);
2945 assert_or_panic(vec[18] == true);
2946 assert_or_panic(vec[19] == true);
2947 assert_or_panic(vec[20] == true);
2948 assert_or_panic(vec[21] == true);
2949 assert_or_panic(vec[22] == false);
2950 assert_or_panic(vec[23] == false);
2951 assert_or_panic(vec[24] == true);
2952 assert_or_panic(vec[25] == true);
2953 assert_or_panic(vec[26] == false);
2954 assert_or_panic(vec[27] == false);
2955 assert_or_panic(vec[28] == false);
2956 assert_or_panic(vec[29] == false);
2957 assert_or_panic(vec[30] == false);
2958 assert_or_panic(vec[31] == true);
2959 assert_or_panic(vec[32] == true);
2960 assert_or_panic(vec[33] == false);
2961 assert_or_panic(vec[34] == true);
2962 assert_or_panic(vec[35] == true);
2963 assert_or_panic(vec[36] == true);
2964 assert_or_panic(vec[37] == true);
2965 assert_or_panic(vec[38] == true);
2966 assert_or_panic(vec[39] == true);
2967 assert_or_panic(vec[40] == false);
2968 assert_or_panic(vec[41] == true);
2969 assert_or_panic(vec[42] == true);
2970 assert_or_panic(vec[43] == false);
2971 assert_or_panic(vec[44] == false);
2972 assert_or_panic(vec[45] == false);
2973 assert_or_panic(vec[46] == true);
2974 assert_or_panic(vec[47] == true);
2975 assert_or_panic(vec[48] == false);
2976 assert_or_panic(vec[49] == true);
2977 assert_or_panic(vec[50] == false);
2978 assert_or_panic(vec[51] == true);
2979 assert_or_panic(vec[52] == true);
2980 assert_or_panic(vec[53] == false);
2981 assert_or_panic(vec[54] == true);
2982 assert_or_panic(vec[55] == false);
2983 assert_or_panic(vec[56] == false);
2984 assert_or_panic(vec[57] == true);
2985 assert_or_panic(vec[58] == true);
2986 assert_or_panic(vec[59] == false);
2987 assert_or_panic(vec[60] == true);
2988 assert_or_panic(vec[61] == true);
2989 assert_or_panic(vec[62] == false);
2990 assert_or_panic(vec[63] == true);
2991 assert_or_panic(vec[64] == false);
2992 assert_or_panic(vec[65] == true);
2993 assert_or_panic(vec[66] == true);
2994 assert_or_panic(vec[67] == true);
2995 assert_or_panic(vec[68] == true);
2996 assert_or_panic(vec[69] == true);
2997 assert_or_panic(vec[70] == true);
2998 assert_or_panic(vec[71] == true);
2999 assert_or_panic(vec[72] == true);
3000 assert_or_panic(vec[73] == true);
3001 assert_or_panic(vec[74] == false);
3002 assert_or_panic(vec[75] == true);
3003 assert_or_panic(vec[76] == false);
3004 assert_or_panic(vec[77] == true);
3005 assert_or_panic(vec[78] == false);
3006 assert_or_panic(vec[79] == false);
3007 assert_or_panic(vec[80] == false);
3008 assert_or_panic(vec[81] == true);
3009 assert_or_panic(vec[82] == false);
3010 assert_or_panic(vec[83] == true);
3011 assert_or_panic(vec[84] == true);
3012 assert_or_panic(vec[85] == false);
3013 assert_or_panic(vec[86] == true);
3014 assert_or_panic(vec[87] == true);
3015 assert_or_panic(vec[88] == true);
3016 assert_or_panic(vec[89] == false);
3017 assert_or_panic(vec[90] == true);
3018 assert_or_panic(vec[91] == true);
3019 assert_or_panic(vec[92] == false);
3020 assert_or_panic(vec[93] == true);
3021 assert_or_panic(vec[94] == false);
3022 assert_or_panic(vec[95] == true);
3023 assert_or_panic(vec[96] == true);
3024 assert_or_panic(vec[97] == false);
3025 assert_or_panic(vec[98] == false);
3026 assert_or_panic(vec[99] == false);
3027 assert_or_panic(vec[100] == true);
3028 assert_or_panic(vec[101] == true);
3029 assert_or_panic(vec[102] == false);
3030 assert_or_panic(vec[103] == true);
3031 assert_or_panic(vec[104] == false);
3032 assert_or_panic(vec[105] == false);
3033 assert_or_panic(vec[106] == true);
3034 assert_or_panic(vec[107] == false);
3035 assert_or_panic(vec[108] == false);
3036 assert_or_panic(vec[109] == true);
3037 assert_or_panic(vec[110] == false);
3038 assert_or_panic(vec[111] == false);
3039 assert_or_panic(vec[112] == false);
3040 assert_or_panic(vec[113] == false);
3041 assert_or_panic(vec[114] == false);
3042 assert_or_panic(vec[115] == true);
3043 assert_or_panic(vec[116] == true);
3044 assert_or_panic(vec[117] == false);
3045 assert_or_panic(vec[118] == false);
3046 assert_or_panic(vec[119] == false);
3047 assert_or_panic(vec[120] == false);
3048 assert_or_panic(vec[121] == true);
3049 assert_or_panic(vec[122] == false);
3050 assert_or_panic(vec[123] == false);
3051 assert_or_panic(vec[124] == true);
3052 assert_or_panic(vec[125] == true);
3053 assert_or_panic(vec[126] == false);
3054 assert_or_panic(vec[127] == true);
3055 assert_or_panic(vec[128] == false);
3056 assert_or_panic(vec[129] == true);
3057 assert_or_panic(vec[130] == true);
3058 assert_or_panic(vec[131] == false);
3059 assert_or_panic(vec[132] == true);
3060 assert_or_panic(vec[133] == false);
3061 assert_or_panic(vec[134] == false);
3062 assert_or_panic(vec[135] == false);
3063 assert_or_panic(vec[136] == false);
3064 assert_or_panic(vec[137] == true);
3065 assert_or_panic(vec[138] == true);
3066 assert_or_panic(vec[139] == false);
3067 assert_or_panic(vec[140] == false);
3068 assert_or_panic(vec[141] == false);
3069 assert_or_panic(vec[142] == true);
3070 assert_or_panic(vec[143] == true);
3071 assert_or_panic(vec[144] == false);
3072 assert_or_panic(vec[145] == false);
3073 assert_or_panic(vec[146] == true);
3074 assert_or_panic(vec[147] == true);
3075 assert_or_panic(vec[148] == true);
3076 assert_or_panic(vec[149] == true);
3077 assert_or_panic(vec[150] == true);
3078 assert_or_panic(vec[151] == true);
3079 assert_or_panic(vec[152] == true);
3080 assert_or_panic(vec[153] == false);
3081 assert_or_panic(vec[154] == true);
3082 assert_or_panic(vec[155] == false);
3083 assert_or_panic(vec[156] == false);
3084 assert_or_panic(vec[157] == true);
3085 assert_or_panic(vec[158] == false);
3086 assert_or_panic(vec[159] == true);
3087 assert_or_panic(vec[160] == false);
3088 assert_or_panic(vec[161] == true);
3089 assert_or_panic(vec[162] == true);
3090 assert_or_panic(vec[163] == true);
3091 assert_or_panic(vec[164] == true);
3092 assert_or_panic(vec[165] == true);
3093 assert_or_panic(vec[166] == true);
3094 assert_or_panic(vec[167] == true);
3095 assert_or_panic(vec[168] == true);
3096 assert_or_panic(vec[169] == false);
3097 assert_or_panic(vec[170] == true);
3098 assert_or_panic(vec[171] == true);
3099 assert_or_panic(vec[172] == false);
3100 assert_or_panic(vec[173] == true);
3101 assert_or_panic(vec[174] == true);
3102 assert_or_panic(vec[175] == false);
3103 assert_or_panic(vec[176] == false);
3104 assert_or_panic(vec[177] == false);
3105 assert_or_panic(vec[178] == true);
3106 assert_or_panic(vec[179] == false);
3107 assert_or_panic(vec[180] == false);
3108 assert_or_panic(vec[181] == true);
3109 assert_or_panic(vec[182] == true);
3110 assert_or_panic(vec[183] == true);
3111 assert_or_panic(vec[184] == true);
3112 assert_or_panic(vec[185] == true);
3113 assert_or_panic(vec[186] == true);
3114 assert_or_panic(vec[187] == true);
3115 assert_or_panic(vec[188] == true);
3116 assert_or_panic(vec[189] == true);
3117 assert_or_panic(vec[190] == false);
3118 assert_or_panic(vec[191] == true);
3119 assert_or_panic(vec[192] == true);
3120 assert_or_panic(vec[193] == false);
3121 assert_or_panic(vec[194] == false);
3122 assert_or_panic(vec[195] == true);
3123 assert_or_panic(vec[196] == true);
3124 assert_or_panic(vec[197] == false);
3125 assert_or_panic(vec[198] == true);
3126 assert_or_panic(vec[199] == true);
3127 assert_or_panic(vec[200] == false);
3128 assert_or_panic(vec[201] == true);
3129 assert_or_panic(vec[202] == true);
3130 assert_or_panic(vec[203] == false);
3131 assert_or_panic(vec[204] == true);
3132 assert_or_panic(vec[205] == true);
3133 assert_or_panic(vec[206] == true);
3134 assert_or_panic(vec[207] == true);
3135 assert_or_panic(vec[208] == false);
3136 assert_or_panic(vec[209] == true);
3137 assert_or_panic(vec[210] == false);
3138 assert_or_panic(vec[211] == true);
3139 assert_or_panic(vec[212] == true);
3140 assert_or_panic(vec[213] == false);
3141 assert_or_panic(vec[214] == true);
3142 assert_or_panic(vec[215] == false);
3143 assert_or_panic(vec[216] == true);
3144 assert_or_panic(vec[217] == false);
3145 assert_or_panic(vec[218] == true);
3146 assert_or_panic(vec[219] == false);
3147 assert_or_panic(vec[220] == false);
3148 assert_or_panic(vec[221] == true);
3149 assert_or_panic(vec[222] == false);
3150 assert_or_panic(vec[223] == false);
3151 assert_or_panic(vec[224] == false);
3152 assert_or_panic(vec[225] == true);
3153 assert_or_panic(vec[226] == true);
3154 assert_or_panic(vec[227] == false);
3155 assert_or_panic(vec[228] == false);
3156 assert_or_panic(vec[229] == false);
3157 assert_or_panic(vec[230] == true);
3158 assert_or_panic(vec[231] == false);
3159 assert_or_panic(vec[232] == true);
3160 assert_or_panic(vec[233] == false);
3161 assert_or_panic(vec[234] == false);
3162 assert_or_panic(vec[235] == false);
3163 assert_or_panic(vec[236] == true);
3164 assert_or_panic(vec[237] == true);
3165 assert_or_panic(vec[238] == false);
3166 assert_or_panic(vec[239] == false);
3167 assert_or_panic(vec[240] == false);
3168 assert_or_panic(vec[241] == false);
3169 assert_or_panic(vec[242] == false);
3170 assert_or_panic(vec[243] == true);
3171 assert_or_panic(vec[244] == true);
3172 assert_or_panic(vec[245] == false);
3173 assert_or_panic(vec[246] == true);
3174 assert_or_panic(vec[247] == false);
3175 assert_or_panic(vec[248] == false);
3176 assert_or_panic(vec[249] == true);
3177 assert_or_panic(vec[250] == false);
3178 assert_or_panic(vec[251] == false);
3179 assert_or_panic(vec[252] == false);
3180 assert_or_panic(vec[253] == true);
3181 assert_or_panic(vec[254] == false);
3182 assert_or_panic(vec[255] == false);
3183 assert_or_panic(vec[256] == false);
3184 assert_or_panic(vec[257] == false);
3185 assert_or_panic(vec[258] == true);
3186 assert_or_panic(vec[259] == true);
3187 assert_or_panic(vec[260] == true);
3188 assert_or_panic(vec[261] == true);
3189 assert_or_panic(vec[262] == false);
3190 assert_or_panic(vec[263] == true);
3191 assert_or_panic(vec[264] == false);
3192 assert_or_panic(vec[265] == false);
3193 assert_or_panic(vec[266] == false);
3194 assert_or_panic(vec[267] == true);
3195 assert_or_panic(vec[268] == false);
3196 assert_or_panic(vec[269] == false);
3197 assert_or_panic(vec[270] == true);
3198 assert_or_panic(vec[271] == true);
3199 assert_or_panic(vec[272] == false);
3200 assert_or_panic(vec[273] == false);
3201 assert_or_panic(vec[274] == false);
3202 assert_or_panic(vec[275] == false);
3203 assert_or_panic(vec[276] == false);
3204 assert_or_panic(vec[277] == true);
3205 assert_or_panic(vec[278] == false);
3206 assert_or_panic(vec[279] == true);
3207 assert_or_panic(vec[280] == true);
3208 assert_or_panic(vec[281] == true);
3209 assert_or_panic(vec[282] == true);
3210 assert_or_panic(vec[283] == true);
3211 assert_or_panic(vec[284] == false);
3212 assert_or_panic(vec[285] == false);
3213 assert_or_panic(vec[286] == false);
3214 assert_or_panic(vec[287] == false);
3215 assert_or_panic(vec[288] == false);
3216 assert_or_panic(vec[289] == false);
3217 assert_or_panic(vec[290] == false);
3218 assert_or_panic(vec[291] == false);
3219 assert_or_panic(vec[292] == false);
3220 assert_or_panic(vec[293] == true);
3221 assert_or_panic(vec[294] == true);
3222 assert_or_panic(vec[295] == true);
3223 assert_or_panic(vec[296] == true);
3224 assert_or_panic(vec[297] == true);
3225 assert_or_panic(vec[298] == true);
3226 assert_or_panic(vec[299] == false);
3227 assert_or_panic(vec[300] == true);
3228 assert_or_panic(vec[301] == false);
3229 assert_or_panic(vec[302] == true);
3230 assert_or_panic(vec[303] == true);
3231 assert_or_panic(vec[304] == true);
3232 assert_or_panic(vec[305] == false);
3233 assert_or_panic(vec[306] == false);
3234 assert_or_panic(vec[307] == true);
3235 assert_or_panic(vec[308] == true);
3236 assert_or_panic(vec[309] == true);
3237 assert_or_panic(vec[310] == false);
3238 assert_or_panic(vec[311] == true);
3239 assert_or_panic(vec[312] == true);
3240 assert_or_panic(vec[313] == true);
3241 assert_or_panic(vec[314] == false);
3242 assert_or_panic(vec[315] == true);
3243 assert_or_panic(vec[316] == true);
3244 assert_or_panic(vec[317] == true);
3245 assert_or_panic(vec[318] == false);
3246 assert_or_panic(vec[319] == true);
3247 assert_or_panic(vec[320] == true);
3248 assert_or_panic(vec[321] == false);
3249 assert_or_panic(vec[322] == false);
3250 assert_or_panic(vec[323] == true);
3251 assert_or_panic(vec[324] == false);
3252 assert_or_panic(vec[325] == false);
3253 assert_or_panic(vec[326] == false);
3254 assert_or_panic(vec[327] == false);
3255 assert_or_panic(vec[328] == true);
3256 assert_or_panic(vec[329] == false);
3257 assert_or_panic(vec[330] == true);
3258 assert_or_panic(vec[331] == true);
3259 assert_or_panic(vec[332] == true);
3260 assert_or_panic(vec[333] == true);
3261 assert_or_panic(vec[334] == false);
3262 assert_or_panic(vec[335] == false);
3263 assert_or_panic(vec[336] == true);
3264 assert_or_panic(vec[337] == false);
3265 assert_or_panic(vec[338] == true);
3266 assert_or_panic(vec[339] == false);
3267 assert_or_panic(vec[340] == false);
3268 assert_or_panic(vec[341] == false);
3269 assert_or_panic(vec[342] == true);
3270 assert_or_panic(vec[343] == false);
3271 assert_or_panic(vec[344] == true);
3272 assert_or_panic(vec[345] == false);
3273 assert_or_panic(vec[346] == false);
3274 assert_or_panic(vec[347] == true);
3275 assert_or_panic(vec[348] == true);
3276 assert_or_panic(vec[349] == true);
3277 assert_or_panic(vec[350] == true);
3278 assert_or_panic(vec[351] == false);
3279 assert_or_panic(vec[352] == false);
3280 assert_or_panic(vec[353] == false);
3281 assert_or_panic(vec[354] == true);
3282 assert_or_panic(vec[355] == true);
3283 assert_or_panic(vec[356] == false);
3284 assert_or_panic(vec[357] == true);
3285 assert_or_panic(vec[358] == false);
3286 assert_or_panic(vec[359] == false);
3287 assert_or_panic(vec[360] == true);
3288 assert_or_panic(vec[361] == false);
3289 assert_or_panic(vec[362] == true);
3290 assert_or_panic(vec[363] == false);
3291 assert_or_panic(vec[364] == true);
3292 assert_or_panic(vec[365] == true);
3293 assert_or_panic(vec[366] == false);
3294 assert_or_panic(vec[367] == false);
3295 assert_or_panic(vec[368] == true);
3296 assert_or_panic(vec[369] == true);
3297 assert_or_panic(vec[370] == true);
3298 assert_or_panic(vec[371] == true);
3299 assert_or_panic(vec[372] == false);
3300 assert_or_panic(vec[373] == false);
3301 assert_or_panic(vec[374] == true);
3302 assert_or_panic(vec[375] == false);
3303 assert_or_panic(vec[376] == true);
3304 assert_or_panic(vec[377] == true);
3305 assert_or_panic(vec[378] == false);
3306 assert_or_panic(vec[379] == true);
3307 assert_or_panic(vec[380] == true);
3308 assert_or_panic(vec[381] == false);
3309 assert_or_panic(vec[382] == true);
3310 assert_or_panic(vec[383] == true);
3311 assert_or_panic(vec[384] == true);
3312 assert_or_panic(vec[385] == false);
3313 assert_or_panic(vec[386] == true);
3314 assert_or_panic(vec[387] == true);
3315 assert_or_panic(vec[388] == true);
3316 assert_or_panic(vec[389] == false);
3317 assert_or_panic(vec[390] == false);
3318 assert_or_panic(vec[391] == true);
3319 assert_or_panic(vec[392] == false);
3320 assert_or_panic(vec[393] == true);
3321 assert_or_panic(vec[394] == true);
3322 assert_or_panic(vec[395] == true);
3323 assert_or_panic(vec[396] == false);
3324 assert_or_panic(vec[397] == false);
3325 assert_or_panic(vec[398] == false);
3326 assert_or_panic(vec[399] == false);
3327 assert_or_panic(vec[400] == false);
3328 assert_or_panic(vec[401] == true);
3329 assert_or_panic(vec[402] == false);
3330 assert_or_panic(vec[403] == false);
3331 assert_or_panic(vec[404] == false);
3332 assert_or_panic(vec[405] == false);
3333 assert_or_panic(vec[406] == true);
3334 assert_or_panic(vec[407] == false);
3335 assert_or_panic(vec[408] == false);
3336 assert_or_panic(vec[409] == true);
3337 assert_or_panic(vec[410] == true);
3338 assert_or_panic(vec[411] == false);
3339 assert_or_panic(vec[412] == false);
3340 assert_or_panic(vec[413] == false);
3341 assert_or_panic(vec[414] == false);
3342 assert_or_panic(vec[415] == true);
3343 assert_or_panic(vec[416] == true);
3344 assert_or_panic(vec[417] == true);
3345 assert_or_panic(vec[418] == true);
3346 assert_or_panic(vec[419] == true);
3347 assert_or_panic(vec[420] == false);
3348 assert_or_panic(vec[421] == false);
3349 assert_or_panic(vec[422] == false);
3350 assert_or_panic(vec[423] == true);
3351 assert_or_panic(vec[424] == false);
3352 assert_or_panic(vec[425] == false);
3353 assert_or_panic(vec[426] == false);
3354 assert_or_panic(vec[427] == false);
3355 assert_or_panic(vec[428] == true);
3356 assert_or_panic(vec[429] == false);
3357 assert_or_panic(vec[430] == true);
3358 assert_or_panic(vec[431] == false);
3359 assert_or_panic(vec[432] == true);
3360 assert_or_panic(vec[433] == true);
3361 assert_or_panic(vec[434] == true);
3362 assert_or_panic(vec[435] == true);
3363 assert_or_panic(vec[436] == false);
3364 assert_or_panic(vec[437] == false);
3365 assert_or_panic(vec[438] == false);
3366 assert_or_panic(vec[439] == false);
3367 assert_or_panic(vec[440] == false);
3368 assert_or_panic(vec[441] == true);
3369 assert_or_panic(vec[442] == true);
3370 assert_or_panic(vec[443] == true);
3371 assert_or_panic(vec[444] == true);
3372 assert_or_panic(vec[445] == true);
3373 assert_or_panic(vec[446] == true);
3374 assert_or_panic(vec[447] == true);
3375 assert_or_panic(vec[448] == true);
3376 assert_or_panic(vec[449] == true);
3377 assert_or_panic(vec[450] == false);
3378 assert_or_panic(vec[451] == false);
3379 assert_or_panic(vec[452] == true);
3380 assert_or_panic(vec[453] == false);
3381 assert_or_panic(vec[454] == true);
3382 assert_or_panic(vec[455] == false);
3383 assert_or_panic(vec[456] == false);
3384 assert_or_panic(vec[457] == true);
3385 assert_or_panic(vec[458] == false);
3386 assert_or_panic(vec[459] == false);
3387 assert_or_panic(vec[460] == true);
3388 assert_or_panic(vec[461] == true);
3389 assert_or_panic(vec[462] == true);
3390 assert_or_panic(vec[463] == true);
3391 assert_or_panic(vec[464] == true);
3392 assert_or_panic(vec[465] == true);
3393 assert_or_panic(vec[466] == false);
3394 assert_or_panic(vec[467] == true);
3395 assert_or_panic(vec[468] == false);
3396 assert_or_panic(vec[469] == false);
3397 assert_or_panic(vec[470] == false);
3398 assert_or_panic(vec[471] == true);
3399 assert_or_panic(vec[472] == true);
3400 assert_or_panic(vec[473] == false);
3401 assert_or_panic(vec[474] == true);
3402 assert_or_panic(vec[475] == true);
3403 assert_or_panic(vec[476] == false);
3404 assert_or_panic(vec[477] == false);
3405 assert_or_panic(vec[478] == true);
3406 assert_or_panic(vec[479] == true);
3407 assert_or_panic(vec[480] == false);
3408 assert_or_panic(vec[481] == false);
3409 assert_or_panic(vec[482] == true);
3410 assert_or_panic(vec[483] == true);
3411 assert_or_panic(vec[484] == false);
3412 assert_or_panic(vec[485] == true);
3413 assert_or_panic(vec[486] == false);
3414 assert_or_panic(vec[487] == true);
3415 assert_or_panic(vec[488] == true);
3416 assert_or_panic(vec[489] == true);
3417 assert_or_panic(vec[490] == true);
3418 assert_or_panic(vec[491] == true);
3419 assert_or_panic(vec[492] == true);
3420 assert_or_panic(vec[493] == true);
3421 assert_or_panic(vec[494] == true);
3422 assert_or_panic(vec[495] == true);
3423 assert_or_panic(vec[496] == false);
3424 assert_or_panic(vec[497] == true);
3425 assert_or_panic(vec[498] == true);
3426 assert_or_panic(vec[499] == true);
3427 assert_or_panic(vec[500] == false);
3428 assert_or_panic(vec[501] == false);
3429 assert_or_panic(vec[502] == true);
3430 assert_or_panic(vec[503] == false);
3431 assert_or_panic(vec[504] == false);
3432 assert_or_panic(vec[505] == false);
3433 assert_or_panic(vec[506] == true);
3434 assert_or_panic(vec[507] == true);
3435 assert_or_panic(vec[508] == false);
3436 assert_or_panic(vec[509] == true);
3437 assert_or_panic(vec[510] == false);
3438 assert_or_panic(vec[511] == true);
3439}
3440#endif
3441void c_test_vector_512_bool(void) {
3442 Vector_512_bool vec = zig_ret_vector_512_bool();
3443 assert_or_panic(vec[0] == true);
3444 assert_or_panic(vec[1] == true);
3445 assert_or_panic(vec[2] == true);
3446 assert_or_panic(vec[3] == true);
3447 assert_or_panic(vec[4] == false);
3448 assert_or_panic(vec[5] == true);
3449 assert_or_panic(vec[6] == false);
3450 assert_or_panic(vec[7] == true);
3451 assert_or_panic(vec[8] == true);
3452 assert_or_panic(vec[9] == true);
3453 assert_or_panic(vec[10] == false);
3454 assert_or_panic(vec[11] == true);
3455 assert_or_panic(vec[12] == false);
3456 assert_or_panic(vec[13] == false);
3457 assert_or_panic(vec[14] == false);
3458 assert_or_panic(vec[15] == true);
3459 assert_or_panic(vec[16] == true);
3460 assert_or_panic(vec[17] == false);
3461 assert_or_panic(vec[18] == false);
3462 assert_or_panic(vec[19] == false);
3463 assert_or_panic(vec[20] == true);
3464 assert_or_panic(vec[21] == true);
3465 assert_or_panic(vec[22] == false);
3466 assert_or_panic(vec[23] == false);
3467 assert_or_panic(vec[24] == false);
3468 assert_or_panic(vec[25] == false);
3469 assert_or_panic(vec[26] == true);
3470 assert_or_panic(vec[27] == false);
3471 assert_or_panic(vec[28] == false);
3472 assert_or_panic(vec[29] == false);
3473 assert_or_panic(vec[30] == true);
3474 assert_or_panic(vec[31] == true);
3475 assert_or_panic(vec[32] == true);
3476 assert_or_panic(vec[33] == true);
3477 assert_or_panic(vec[34] == false);
3478 assert_or_panic(vec[35] == false);
3479 assert_or_panic(vec[36] == false);
3480 assert_or_panic(vec[37] == true);
3481 assert_or_panic(vec[38] == true);
3482 assert_or_panic(vec[39] == true);
3483 assert_or_panic(vec[40] == false);
3484 assert_or_panic(vec[41] == false);
3485 assert_or_panic(vec[42] == true);
3486 assert_or_panic(vec[43] == false);
3487 assert_or_panic(vec[44] == false);
3488 assert_or_panic(vec[45] == true);
3489 assert_or_panic(vec[46] == false);
3490 assert_or_panic(vec[47] == false);
3491 assert_or_panic(vec[48] == true);
3492 assert_or_panic(vec[49] == true);
3493 assert_or_panic(vec[50] == true);
3494 assert_or_panic(vec[51] == true);
3495 assert_or_panic(vec[52] == false);
3496 assert_or_panic(vec[53] == false);
3497 assert_or_panic(vec[54] == false);
3498 assert_or_panic(vec[55] == true);
3499 assert_or_panic(vec[56] == false);
3500 assert_or_panic(vec[57] == true);
3501 assert_or_panic(vec[58] == false);
3502 assert_or_panic(vec[59] == true);
3503 assert_or_panic(vec[60] == true);
3504 assert_or_panic(vec[61] == false);
3505 assert_or_panic(vec[62] == false);
3506 assert_or_panic(vec[63] == true);
3507 assert_or_panic(vec[64] == true);
3508 assert_or_panic(vec[65] == false);
3509 assert_or_panic(vec[66] == true);
3510 assert_or_panic(vec[67] == false);
3511 assert_or_panic(vec[68] == false);
3512 assert_or_panic(vec[69] == false);
3513 assert_or_panic(vec[70] == true);
3514 assert_or_panic(vec[71] == true);
3515 assert_or_panic(vec[72] == true);
3516 assert_or_panic(vec[73] == true);
3517 assert_or_panic(vec[74] == true);
3518 assert_or_panic(vec[75] == false);
3519 assert_or_panic(vec[76] == true);
3520 assert_or_panic(vec[77] == false);
3521 assert_or_panic(vec[78] == true);
3522 assert_or_panic(vec[79] == true);
3523 assert_or_panic(vec[80] == true);
3524 assert_or_panic(vec[81] == true);
3525 assert_or_panic(vec[82] == true);
3526 assert_or_panic(vec[83] == false);
3527 assert_or_panic(vec[84] == true);
3528 assert_or_panic(vec[85] == true);
3529 assert_or_panic(vec[86] == false);
3530 assert_or_panic(vec[87] == true);
3531 assert_or_panic(vec[88] == false);
3532 assert_or_panic(vec[89] == false);
3533 assert_or_panic(vec[90] == true);
3534 assert_or_panic(vec[91] == false);
3535 assert_or_panic(vec[92] == true);
3536 assert_or_panic(vec[93] == false);
3537 assert_or_panic(vec[94] == false);
3538 assert_or_panic(vec[95] == false);
3539 assert_or_panic(vec[96] == true);
3540 assert_or_panic(vec[97] == true);
3541 assert_or_panic(vec[98] == false);
3542 assert_or_panic(vec[99] == true);
3543 assert_or_panic(vec[100] == true);
3544 assert_or_panic(vec[101] == false);
3545 assert_or_panic(vec[102] == true);
3546 assert_or_panic(vec[103] == false);
3547 assert_or_panic(vec[104] == true);
3548 assert_or_panic(vec[105] == false);
3549 assert_or_panic(vec[106] == true);
3550 assert_or_panic(vec[107] == false);
3551 assert_or_panic(vec[108] == false);
3552 assert_or_panic(vec[109] == true);
3553 assert_or_panic(vec[110] == false);
3554 assert_or_panic(vec[111] == false);
3555 assert_or_panic(vec[112] == true);
3556 assert_or_panic(vec[113] == false);
3557 assert_or_panic(vec[114] == true);
3558 assert_or_panic(vec[115] == false);
3559 assert_or_panic(vec[116] == true);
3560 assert_or_panic(vec[117] == false);
3561 assert_or_panic(vec[118] == false);
3562 assert_or_panic(vec[119] == true);
3563 assert_or_panic(vec[120] == true);
3564 assert_or_panic(vec[121] == true);
3565 assert_or_panic(vec[122] == false);
3566 assert_or_panic(vec[123] == true);
3567 assert_or_panic(vec[124] == false);
3568 assert_or_panic(vec[125] == false);
3569 assert_or_panic(vec[126] == true);
3570 assert_or_panic(vec[127] == true);
3571 assert_or_panic(vec[128] == false);
3572 assert_or_panic(vec[129] == true);
3573 assert_or_panic(vec[130] == true);
3574 assert_or_panic(vec[131] == false);
3575 assert_or_panic(vec[132] == true);
3576 assert_or_panic(vec[133] == true);
3577 assert_or_panic(vec[134] == false);
3578 assert_or_panic(vec[135] == true);
3579 assert_or_panic(vec[136] == true);
3580 assert_or_panic(vec[137] == false);
3581 assert_or_panic(vec[138] == false);
3582 assert_or_panic(vec[139] == false);
3583 assert_or_panic(vec[140] == true);
3584 assert_or_panic(vec[141] == false);
3585 assert_or_panic(vec[142] == true);
3586 assert_or_panic(vec[143] == false);
3587 assert_or_panic(vec[144] == false);
3588 assert_or_panic(vec[145] == false);
3589 assert_or_panic(vec[146] == true);
3590 assert_or_panic(vec[147] == false);
3591 assert_or_panic(vec[148] == true);
3592 assert_or_panic(vec[149] == false);
3593 assert_or_panic(vec[150] == false);
3594 assert_or_panic(vec[151] == true);
3595 assert_or_panic(vec[152] == false);
3596 assert_or_panic(vec[153] == true);
3597 assert_or_panic(vec[154] == true);
3598 assert_or_panic(vec[155] == false);
3599 assert_or_panic(vec[156] == true);
3600 assert_or_panic(vec[157] == true);
3601 assert_or_panic(vec[158] == false);
3602 assert_or_panic(vec[159] == true);
3603 assert_or_panic(vec[160] == true);
3604 assert_or_panic(vec[161] == false);
3605 assert_or_panic(vec[162] == false);
3606 assert_or_panic(vec[163] == false);
3607 assert_or_panic(vec[164] == true);
3608 assert_or_panic(vec[165] == false);
3609 assert_or_panic(vec[166] == true);
3610 assert_or_panic(vec[167] == true);
3611 assert_or_panic(vec[168] == true);
3612 assert_or_panic(vec[169] == true);
3613 assert_or_panic(vec[170] == false);
3614 assert_or_panic(vec[171] == true);
3615 assert_or_panic(vec[172] == false);
3616 assert_or_panic(vec[173] == false);
3617 assert_or_panic(vec[174] == true);
3618 assert_or_panic(vec[175] == true);
3619 assert_or_panic(vec[176] == true);
3620 assert_or_panic(vec[177] == false);
3621 assert_or_panic(vec[178] == false);
3622 assert_or_panic(vec[179] == false);
3623 assert_or_panic(vec[180] == true);
3624 assert_or_panic(vec[181] == false);
3625 assert_or_panic(vec[182] == false);
3626 assert_or_panic(vec[183] == true);
3627 assert_or_panic(vec[184] == true);
3628 assert_or_panic(vec[185] == false);
3629 assert_or_panic(vec[186] == true);
3630 assert_or_panic(vec[187] == false);
3631 assert_or_panic(vec[188] == true);
3632 assert_or_panic(vec[189] == true);
3633 assert_or_panic(vec[190] == true);
3634 assert_or_panic(vec[191] == true);
3635 assert_or_panic(vec[192] == true);
3636 assert_or_panic(vec[193] == true);
3637 assert_or_panic(vec[194] == true);
3638 assert_or_panic(vec[195] == false);
3639 assert_or_panic(vec[196] == false);
3640 assert_or_panic(vec[197] == false);
3641 assert_or_panic(vec[198] == false);
3642 assert_or_panic(vec[199] == false);
3643 assert_or_panic(vec[200] == true);
3644 assert_or_panic(vec[201] == false);
3645 assert_or_panic(vec[202] == true);
3646 assert_or_panic(vec[203] == false);
3647 assert_or_panic(vec[204] == true);
3648 assert_or_panic(vec[205] == true);
3649 assert_or_panic(vec[206] == false);
3650 assert_or_panic(vec[207] == false);
3651 assert_or_panic(vec[208] == false);
3652 assert_or_panic(vec[209] == true);
3653 assert_or_panic(vec[210] == true);
3654 assert_or_panic(vec[211] == true);
3655 assert_or_panic(vec[212] == false);
3656 assert_or_panic(vec[213] == false);
3657 assert_or_panic(vec[214] == true);
3658 assert_or_panic(vec[215] == true);
3659 assert_or_panic(vec[216] == true);
3660 assert_or_panic(vec[217] == false);
3661 assert_or_panic(vec[218] == false);
3662 assert_or_panic(vec[219] == true);
3663 assert_or_panic(vec[220] == false);
3664 assert_or_panic(vec[221] == true);
3665 assert_or_panic(vec[222] == true);
3666 assert_or_panic(vec[223] == false);
3667 assert_or_panic(vec[224] == true);
3668 assert_or_panic(vec[225] == false);
3669 assert_or_panic(vec[226] == false);
3670 assert_or_panic(vec[227] == true);
3671 assert_or_panic(vec[228] == false);
3672 assert_or_panic(vec[229] == false);
3673 assert_or_panic(vec[230] == true);
3674 assert_or_panic(vec[231] == true);
3675 assert_or_panic(vec[232] == false);
3676 assert_or_panic(vec[233] == true);
3677 assert_or_panic(vec[234] == true);
3678 assert_or_panic(vec[235] == true);
3679 assert_or_panic(vec[236] == true);
3680 assert_or_panic(vec[237] == true);
3681 assert_or_panic(vec[238] == false);
3682 assert_or_panic(vec[239] == true);
3683 assert_or_panic(vec[240] == false);
3684 assert_or_panic(vec[241] == false);
3685 assert_or_panic(vec[242] == true);
3686 assert_or_panic(vec[243] == false);
3687 assert_or_panic(vec[244] == true);
3688 assert_or_panic(vec[245] == false);
3689 assert_or_panic(vec[246] == true);
3690 assert_or_panic(vec[247] == false);
3691 assert_or_panic(vec[248] == true);
3692 assert_or_panic(vec[249] == true);
3693 assert_or_panic(vec[250] == true);
3694 assert_or_panic(vec[251] == true);
3695 assert_or_panic(vec[252] == true);
3696 assert_or_panic(vec[253] == false);
3697 assert_or_panic(vec[254] == false);
3698 assert_or_panic(vec[255] == false);
3699 assert_or_panic(vec[256] == false);
3700 assert_or_panic(vec[257] == false);
3701 assert_or_panic(vec[258] == false);
3702 assert_or_panic(vec[259] == true);
3703 assert_or_panic(vec[260] == true);
3704 assert_or_panic(vec[261] == true);
3705 assert_or_panic(vec[262] == true);
3706 assert_or_panic(vec[263] == false);
3707 assert_or_panic(vec[264] == false);
3708 assert_or_panic(vec[265] == false);
3709 assert_or_panic(vec[266] == true);
3710 assert_or_panic(vec[267] == false);
3711 assert_or_panic(vec[268] == true);
3712 assert_or_panic(vec[269] == false);
3713 assert_or_panic(vec[270] == true);
3714 assert_or_panic(vec[271] == true);
3715 assert_or_panic(vec[272] == true);
3716 assert_or_panic(vec[273] == true);
3717 assert_or_panic(vec[274] == true);
3718 assert_or_panic(vec[275] == true);
3719 assert_or_panic(vec[276] == false);
3720 assert_or_panic(vec[277] == false);
3721 assert_or_panic(vec[278] == true);
3722 assert_or_panic(vec[279] == true);
3723 assert_or_panic(vec[280] == false);
3724 assert_or_panic(vec[281] == false);
3725 assert_or_panic(vec[282] == false);
3726 assert_or_panic(vec[283] == false);
3727 assert_or_panic(vec[284] == true);
3728 assert_or_panic(vec[285] == true);
3729 assert_or_panic(vec[286] == true);
3730 assert_or_panic(vec[287] == false);
3731 assert_or_panic(vec[288] == false);
3732 assert_or_panic(vec[289] == false);
3733 assert_or_panic(vec[290] == true);
3734 assert_or_panic(vec[291] == false);
3735 assert_or_panic(vec[292] == true);
3736 assert_or_panic(vec[293] == true);
3737 assert_or_panic(vec[294] == false);
3738 assert_or_panic(vec[295] == true);
3739 assert_or_panic(vec[296] == true);
3740 assert_or_panic(vec[297] == true);
3741 assert_or_panic(vec[298] == false);
3742 assert_or_panic(vec[299] == true);
3743 assert_or_panic(vec[300] == true);
3744 assert_or_panic(vec[301] == false);
3745 assert_or_panic(vec[302] == false);
3746 assert_or_panic(vec[303] == true);
3747 assert_or_panic(vec[304] == false);
3748 assert_or_panic(vec[305] == false);
3749 assert_or_panic(vec[306] == true);
3750 assert_or_panic(vec[307] == true);
3751 assert_or_panic(vec[308] == true);
3752 assert_or_panic(vec[309] == true);
3753 assert_or_panic(vec[310] == false);
3754 assert_or_panic(vec[311] == false);
3755 assert_or_panic(vec[312] == false);
3756 assert_or_panic(vec[313] == false);
3757 assert_or_panic(vec[314] == false);
3758 assert_or_panic(vec[315] == true);
3759 assert_or_panic(vec[316] == false);
3760 assert_or_panic(vec[317] == false);
3761 assert_or_panic(vec[318] == true);
3762 assert_or_panic(vec[319] == false);
3763 assert_or_panic(vec[320] == false);
3764 assert_or_panic(vec[321] == true);
3765 assert_or_panic(vec[322] == true);
3766 assert_or_panic(vec[323] == true);
3767 assert_or_panic(vec[324] == true);
3768 assert_or_panic(vec[325] == false);
3769 assert_or_panic(vec[326] == false);
3770 assert_or_panic(vec[327] == false);
3771 assert_or_panic(vec[328] == true);
3772 assert_or_panic(vec[329] == true);
3773 assert_or_panic(vec[330] == false);
3774 assert_or_panic(vec[331] == true);
3775 assert_or_panic(vec[332] == true);
3776 assert_or_panic(vec[333] == false);
3777 assert_or_panic(vec[334] == false);
3778 assert_or_panic(vec[335] == true);
3779 assert_or_panic(vec[336] == true);
3780 assert_or_panic(vec[337] == false);
3781 assert_or_panic(vec[338] == true);
3782 assert_or_panic(vec[339] == true);
3783 assert_or_panic(vec[340] == true);
3784 assert_or_panic(vec[341] == false);
3785 assert_or_panic(vec[342] == false);
3786 assert_or_panic(vec[343] == false);
3787 assert_or_panic(vec[344] == true);
3788 assert_or_panic(vec[345] == true);
3789 assert_or_panic(vec[346] == false);
3790 assert_or_panic(vec[347] == true);
3791 assert_or_panic(vec[348] == false);
3792 assert_or_panic(vec[349] == true);
3793 assert_or_panic(vec[350] == false);
3794 assert_or_panic(vec[351] == false);
3795 assert_or_panic(vec[352] == true);
3796 assert_or_panic(vec[353] == false);
3797 assert_or_panic(vec[354] == true);
3798 assert_or_panic(vec[355] == false);
3799 assert_or_panic(vec[356] == false);
3800 assert_or_panic(vec[357] == false);
3801 assert_or_panic(vec[358] == false);
3802 assert_or_panic(vec[359] == false);
3803 assert_or_panic(vec[360] == true);
3804 assert_or_panic(vec[361] == true);
3805 assert_or_panic(vec[362] == false);
3806 assert_or_panic(vec[363] == false);
3807 assert_or_panic(vec[364] == false);
3808 assert_or_panic(vec[365] == false);
3809 assert_or_panic(vec[366] == true);
3810 assert_or_panic(vec[367] == false);
3811 assert_or_panic(vec[368] == true);
3812 assert_or_panic(vec[369] == false);
3813 assert_or_panic(vec[370] == true);
3814 assert_or_panic(vec[371] == true);
3815 assert_or_panic(vec[372] == false);
3816 assert_or_panic(vec[373] == true);
3817 assert_or_panic(vec[374] == true);
3818 assert_or_panic(vec[375] == true);
3819 assert_or_panic(vec[376] == true);
3820 assert_or_panic(vec[377] == true);
3821 assert_or_panic(vec[378] == false);
3822 assert_or_panic(vec[379] == true);
3823 assert_or_panic(vec[380] == false);
3824 assert_or_panic(vec[381] == true);
3825 assert_or_panic(vec[382] == true);
3826 assert_or_panic(vec[383] == true);
3827 assert_or_panic(vec[384] == true);
3828 assert_or_panic(vec[385] == true);
3829 assert_or_panic(vec[386] == false);
3830 assert_or_panic(vec[387] == true);
3831 assert_or_panic(vec[388] == true);
3832 assert_or_panic(vec[389] == false);
3833 assert_or_panic(vec[390] == true);
3834 assert_or_panic(vec[391] == false);
3835 assert_or_panic(vec[392] == true);
3836 assert_or_panic(vec[393] == false);
3837 assert_or_panic(vec[394] == true);
3838 assert_or_panic(vec[395] == false);
3839 assert_or_panic(vec[396] == true);
3840 assert_or_panic(vec[397] == false);
3841 assert_or_panic(vec[398] == false);
3842 assert_or_panic(vec[399] == true);
3843 assert_or_panic(vec[400] == true);
3844 assert_or_panic(vec[401] == true);
3845 assert_or_panic(vec[402] == true);
3846 assert_or_panic(vec[403] == false);
3847 assert_or_panic(vec[404] == false);
3848 assert_or_panic(vec[405] == true);
3849 assert_or_panic(vec[406] == false);
3850 assert_or_panic(vec[407] == false);
3851 assert_or_panic(vec[408] == false);
3852 assert_or_panic(vec[409] == true);
3853 assert_or_panic(vec[410] == false);
3854 assert_or_panic(vec[411] == true);
3855 assert_or_panic(vec[412] == true);
3856 assert_or_panic(vec[413] == false);
3857 assert_or_panic(vec[414] == true);
3858 assert_or_panic(vec[415] == true);
3859 assert_or_panic(vec[416] == false);
3860 assert_or_panic(vec[417] == true);
3861 assert_or_panic(vec[418] == true);
3862 assert_or_panic(vec[419] == false);
3863 assert_or_panic(vec[420] == false);
3864 assert_or_panic(vec[421] == true);
3865 assert_or_panic(vec[422] == false);
3866 assert_or_panic(vec[423] == false);
3867 assert_or_panic(vec[424] == true);
3868 assert_or_panic(vec[425] == false);
3869 assert_or_panic(vec[426] == true);
3870 assert_or_panic(vec[427] == false);
3871 assert_or_panic(vec[428] == false);
3872 assert_or_panic(vec[429] == true);
3873 assert_or_panic(vec[430] == false);
3874 assert_or_panic(vec[431] == true);
3875 assert_or_panic(vec[432] == true);
3876 assert_or_panic(vec[433] == false);
3877 assert_or_panic(vec[434] == true);
3878 assert_or_panic(vec[435] == false);
3879 assert_or_panic(vec[436] == true);
3880 assert_or_panic(vec[437] == false);
3881 assert_or_panic(vec[438] == true);
3882 assert_or_panic(vec[439] == false);
3883 assert_or_panic(vec[440] == false);
3884 assert_or_panic(vec[441] == true);
3885 assert_or_panic(vec[442] == true);
3886 assert_or_panic(vec[443] == false);
3887 assert_or_panic(vec[444] == true);
3888 assert_or_panic(vec[445] == true);
3889 assert_or_panic(vec[446] == false);
3890 assert_or_panic(vec[447] == true);
3891 assert_or_panic(vec[448] == true);
3892 assert_or_panic(vec[449] == false);
3893 assert_or_panic(vec[450] == false);
3894 assert_or_panic(vec[451] == false);
3895 assert_or_panic(vec[452] == false);
3896 assert_or_panic(vec[453] == false);
3897 assert_or_panic(vec[454] == true);
3898 assert_or_panic(vec[455] == false);
3899 assert_or_panic(vec[456] == false);
3900 assert_or_panic(vec[457] == true);
3901 assert_or_panic(vec[458] == false);
3902 assert_or_panic(vec[459] == true);
3903 assert_or_panic(vec[460] == false);
3904 assert_or_panic(vec[461] == false);
3905 assert_or_panic(vec[462] == false);
3906 assert_or_panic(vec[463] == true);
3907 assert_or_panic(vec[464] == false);
3908 assert_or_panic(vec[465] == true);
3909 assert_or_panic(vec[466] == false);
3910 assert_or_panic(vec[467] == false);
3911 assert_or_panic(vec[468] == false);
3912 assert_or_panic(vec[469] == false);
3913 assert_or_panic(vec[470] == true);
3914 assert_or_panic(vec[471] == true);
3915 assert_or_panic(vec[472] == false);
3916 assert_or_panic(vec[473] == true);
3917 assert_or_panic(vec[474] == true);
3918 assert_or_panic(vec[475] == false);
3919 assert_or_panic(vec[476] == false);
3920 assert_or_panic(vec[477] == true);
3921 assert_or_panic(vec[478] == true);
3922 assert_or_panic(vec[479] == true);
3923 assert_or_panic(vec[480] == false);
3924 assert_or_panic(vec[481] == false);
3925 assert_or_panic(vec[482] == true);
3926 assert_or_panic(vec[483] == false);
3927 assert_or_panic(vec[484] == false);
3928 assert_or_panic(vec[485] == false);
3929 assert_or_panic(vec[486] == true);
3930 assert_or_panic(vec[487] == true);
3931 assert_or_panic(vec[488] == false);
3932 assert_or_panic(vec[489] == false);
3933 assert_or_panic(vec[490] == false);
3934 assert_or_panic(vec[491] == false);
3935 assert_or_panic(vec[492] == false);
3936 assert_or_panic(vec[493] == true);
3937 assert_or_panic(vec[494] == true);
3938 assert_or_panic(vec[495] == true);
3939 assert_or_panic(vec[496] == true);
3940 assert_or_panic(vec[497] == false);
3941 assert_or_panic(vec[498] == false);
3942 assert_or_panic(vec[499] == false);
3943 assert_or_panic(vec[500] == true);
3944 assert_or_panic(vec[501] == false);
3945 assert_or_panic(vec[502] == true);
3946 assert_or_panic(vec[503] == true);
3947 assert_or_panic(vec[504] == true);
3948 assert_or_panic(vec[505] == true);
3949 assert_or_panic(vec[506] == false);
3950 assert_or_panic(vec[507] == false);
3951 assert_or_panic(vec[508] == true);
3952 assert_or_panic(vec[509] == true);
3953 assert_or_panic(vec[510] == false);
3954 assert_or_panic(vec[511] == false);
3955 zig_vector_512_bool((Vector_512_bool){
3956 false,
3957 true,
23613958 true,
2362 false,
23633959 false,
23643960 true,
23653961 false,
23663962 true,
3963 false,
3964 false,
3965 false,
3966 false,
3967 false,
23673968 true,
3969 false,
23683970 true,
23693971 false,
23703972 false,
3973 false,
3974 true,
3975 true,
3976 true,
23713977 true,
23723978 false,
23733979 false,
23743980 false,
23753981 true,
23763982 true,
3983 false,
3984 true,
23773985 true,
23783986 false,
3987 false,
23793988 true,
3989 true,
3990 false,
3991 false,
23803992 false,
23813993 false,
23823994 false,
......@@ -2384,20 +3996,32 @@ Vector512Bool c_ret_vector_512_bool(void) {
23843996 false,
23853997 true,
23863998 true,
3999 true,
23874000 false,
2388 false,
4001 true,
4002 true,
4003 true,
4004 true,
23894005 true,
23904006 false,
4007 true,
4008 true,
4009 true,
23914010 false,
4011 true,
23924012 false,
23934013 false,
4014 true,
23944015 false,
23954016 true,
23964017 true,
23974018 false,
23984019 false,
23994020 false,
2400 false,
4021 true,
4022 true,
4023 true,
4024 true,
24014025 false,
24024026 false,
24034027 true,
......@@ -2405,81 +4029,140 @@ Vector512Bool c_ret_vector_512_bool(void) {
24054029 false,
24064030 true,
24074031 true,
4032 false,
4033 false,
24084034 true,
4035 false,
4036 false,
4037 false,
24094038 true,
24104039 true,
24114040 true,
24124041 false,
24134042 false,
2414 false,
4043 true,
24154044 false,
24164045 true,
24174046 false,
4047 false,
24184048 true,
4049 false,
4050 false,
24194051 true,
24204052 true,
4053 false,
4054 false,
4055 false,
4056 false,
24214057 true,
24224058 false,
24234059 false,
24244060 false,
4061 false,
4062 false,
4063 false,
4064 true,
24254065 true,
24264066 true,
2427 false,
24284067 true,
24294068 true,
24304069 false,
24314070 false,
24324071 false,
4072 false,
24334073 true,
24344074 true,
4075 false,
24354076 true,
24364077 true,
24374078 false,
4079 false,
24384080 true,
24394081 false,
4082 false,
4083 false,
4084 false,
24404085 true,
24414086 true,
24424087 true,
24434088 true,
24444089 false,
2445 true,
24464090 false,
2447 true,
4091 false,
24484092 false,
24494093 true,
24504094 false,
24514095 false,
24524096 false,
4097 false,
24534098 true,
24544099 true,
24554100 false,
24564101 true,
24574102 false,
4103 true,
24584104 false,
24594105 false,
24604106 true,
24614107 true,
4108 false,
24624109 true,
24634110 true,
4111 false,
4112 false,
4113 false,
24644114 true,
24654115 false,
4116 false,
4117 false,
4118 false,
24664119 true,
24674120 true,
4121 false,
4122 false,
4123 true,
4124 false,
24684125 true,
24694126 true,
24704127 false,
4128 false,
4129 false,
4130 false,
4131 false,
4132 false,
24714133 true,
24724134 false,
24734135 false,
4136 false,
4137 false,
4138 false,
4139 false,
24744140 true,
24754141 false,
4142 false,
4143 false,
4144 false,
24764145 true,
24774146 false,
24784147 false,
4148 false,
4149 false,
4150 false,
4151 false,
24794152 true,
24804153 true,
4154 true,
4155 false,
4156 true,
4157 true,
4158 false,
4159 false,
4160 false,
4161 false,
24814162 false,
24824163 true,
4164 true,
4165 false,
24834166 false,
24844167 false,
24854168 true,
......@@ -2491,7 +4174,16 @@ Vector512Bool c_ret_vector_512_bool(void) {
24914174 false,
24924175 false,
24934176 true,
4177 false,
4178 true,
4179 true,
4180 true,
4181 true,
4182 false,
24944183 true,
4184 false,
4185 false,
4186 false,
24954187 true,
24964188 false,
24974189 false,
......@@ -2499,8 +4191,14 @@ Vector512Bool c_ret_vector_512_bool(void) {
24994191 false,
25004192 false,
25014193 false,
4194 false,
25024195 true,
25034196 false,
4197 false,
4198 false,
4199 true,
4200 true,
4201 true,
25044202 true,
25054203 false,
25064204 true,
......@@ -2508,20 +4206,33 @@ Vector512Bool c_ret_vector_512_bool(void) {
25084206 false,
25094207 false,
25104208 false,
4209 true,
4210 false,
25114211 false,
25124212 true,
25134213 true,
4214 false,
4215 true,
4216 false,
25144217 true,
25154218 true,
4219 false,
4220 false,
4221 false,
4222 false,
25164223 true,
25174224 false,
25184225 true,
25194226 true,
4227 false,
4228 false,
25204229 true,
25214230 true,
25224231 true,
25234232 false,
25244233 true,
4234 false,
4235 false,
25254236 true,
25264237 true,
25274238 false,
......@@ -2530,26 +4241,31 @@ Vector512Bool c_ret_vector_512_bool(void) {
25304241 true,
25314242 true,
25324243 true,
2533 false,
2534 false,
25354244 true,
25364245 true,
25374246 true,
2538 false,
2539 false,
4247 true,
4248 true,
25404249 true,
25414250 true,
25424251 false,
25434252 true,
4253 false,
25444254 true,
4255 false,
25454256 true,
25464257 true,
4258 false,
25474259 true,
4260 false,
25484261 true,
25494262 false,
25504263 true,
4264 true,
25514265 false,
25524266 true,
4267 true,
4268 true,
25534269 false,
25544270 false,
25554271 false,
......@@ -2558,16 +4274,18 @@ Vector512Bool c_ret_vector_512_bool(void) {
25584274 true,
25594275 true,
25604276 true,
4277 true,
4278 true,
4279 true,
4280 true,
4281 true,
25614282 false,
25624283 true,
25634284 false,
2564 true,
2565 true,
25664285 false,
25674286 true,
25684287 false,
25694288 false,
2570 true,
25714289 false,
25724290 false,
25734291 false,
......@@ -2575,39 +4293,50 @@ Vector512Bool c_ret_vector_512_bool(void) {
25754293 false,
25764294 false,
25774295 false,
2578 true,
4296 false,
25794297 false,
25804298 true,
25814299 true,
25824300 false,
25834301 false,
4302 false,
4303 false,
4304 false,
25844305 true,
4306 true,
4307 true,
4308 true,
4309 false,
25854310 false,
25864311 false,
4312 false,
4313 true,
25874314 true,
25884315 false,
25894316 false,
4317 false,
4318 true,
25904319 true,
25914320 false,
25924321 false,
25934322 false,
25944323 false,
4324 false,
25954325 true,
25964326 true,
4327 false,
25974328 true,
25984329 true,
2599 true,
4330 false,
26004331 true,
26014332 true,
26024333 false,
26034334 true,
26044335 true,
26054336 false,
2606 false,
2607 false,
26084337 true,
2609 false,
26104338 true,
4339 false,
26114340 true,
26124341 false,
26134342 true,
......@@ -2619,12 +4348,16 @@ Vector512Bool c_ret_vector_512_bool(void) {
26194348 false,
26204349 true,
26214350 true,
2622 false,
4351 true,
26234352 true,
26244353 false,
26254354 true,
4355 true,
4356 true,
26264357 false,
26274358 false,
4359 true,
4360 false,
26284361 false,
26294362 false,
26304363 true,
......@@ -2636,42 +4369,52 @@ Vector512Bool c_ret_vector_512_bool(void) {
26364369 false,
26374370 false,
26384371 true,
2639 true,
2640 false,
2641 true,
26424372 false,
26434373 false,
26444374 true,
26454375 true,
26464376 true,
26474377 true,
4378 false,
26484379 true,
26494380 true,
26504381 false,
26514382 false,
26524383 false,
26534384 true,
4385 false,
26544386 true,
26554387 true,
26564388 false,
26574389 false,
26584390 false,
26594391 false,
4392 true,
26604393 false,
4394 true,
26614395 false,
26624396 false,
26634397 false,
26644398 false,
4399 true,
26654400 false,
26664401 false,
26674402 true,
4403 true,
4404 true,
26684405 false,
4406 true,
4407 true,
26694408 false,
4409 true,
26704410 false,
26714411 true,
26724412 false,
26734413 false,
26744414 false,
4415 true,
4416 false,
4417 false,
26754418 false,
26764419 true,
26774420 true,
......@@ -2680,99 +4423,10881 @@ Vector512Bool c_ret_vector_512_bool(void) {
26804423 true,
26814424 false,
26824425 false,
4426 false,
4427 false,
4428 false,
4429 false,
26834430 true,
26844431 true,
26854432 true,
2686 false,
2687 true,
26884433 true,
26894434 true,
26904435 false,
26914436 true,
2692 false,
26934437 true,
26944438 false,
26954439 true,
26964440 false,
26974441 true,
2698 true,
2699 true,
2700 true,
27014442 false,
27024443 true,
2703 true,
4444 false,
4445 false,
27044446 false,
27054447 true,
27064448 false,
27074449 false,
27084450 false,
4451 true,
4452 true,
27094453 false,
27104454 false,
4455 true,
27114456 false,
4457 true,
27124458 false,
27134459 false,
27144460 false,
27154461 true,
27164462 true,
2717 false,
27184463 true,
4464 true,
4465 false,
27194466 false,
4467 true,
4468 });
4469}
4470
4471#endif
4472
4473typedef uint8_t Vector_1_u8 __attribute__((vector_size(1 * sizeof(uint8_t))));
4474
4475Vector_1_u8 zig_ret_vector_1_u8(void);
4476void zig_vector_1_u8(Vector_1_u8, size_t);
4477
4478Vector_1_u8 c_ret_vector_1_u8(void) {
4479 return (Vector_1_u8){ 3 };
4480}
4481void c_vector_1_u8(Vector_1_u8 v, size_t i) {
4482 assert_or_panic(v[0] == 4);
4483 assert_or_panic(i == 1);
4484}
4485void c_test_vector_1_u8(void) {
4486 Vector_1_u8 v = zig_ret_vector_1_u8();
4487 assert_or_panic(v[0] == 1);
4488 zig_vector_1_u8((Vector_1_u8){ 2 }, 1);
4489}
4490
4491typedef uint8_t Vector_2_u8 __attribute__((vector_size(2 * sizeof(uint8_t))));
4492
4493Vector_2_u8 zig_ret_vector_2_u8(void);
4494void zig_vector_2_u8(Vector_2_u8, size_t);
4495
4496Vector_2_u8 c_ret_vector_2_u8(void) {
4497 return (Vector_2_u8){ 9, 10 };
4498}
4499void c_vector_2_u8(Vector_2_u8 v, size_t i) {
4500 assert_or_panic(v[0] == 11);
4501 assert_or_panic(v[1] == 12);
4502 assert_or_panic(i == 2);
4503}
4504void c_test_vector_2_u8(void) {
4505 Vector_2_u8 v = zig_ret_vector_2_u8();
4506 assert_or_panic(v[0] == 5);
4507 assert_or_panic(v[1] == 6);
4508 zig_vector_2_u8((Vector_2_u8){ 7, 8 }, 2);
4509}
4510
4511typedef uint8_t Vector_3_u8 __attribute__((vector_size(3 * sizeof(uint8_t))));
4512
4513Vector_3_u8 zig_ret_vector_3_u8(void);
4514void zig_vector_3_u8(Vector_3_u8, size_t);
4515
4516Vector_3_u8 c_ret_vector_3_u8(void) {
4517 return (Vector_3_u8){ 19, 20, 21 };
4518}
4519void c_vector_3_u8(Vector_3_u8 v, size_t i) {
4520 assert_or_panic(v[0] == 22);
4521 assert_or_panic(v[1] == 23);
4522 assert_or_panic(v[2] == 24);
4523 assert_or_panic(i == 3);
4524}
4525void c_test_vector_3_u8(void) {
4526 Vector_3_u8 v = zig_ret_vector_3_u8();
4527 assert_or_panic(v[0] == 13);
4528 assert_or_panic(v[1] == 14);
4529 assert_or_panic(v[2] == 15);
4530 zig_vector_3_u8((Vector_3_u8){ 16, 17, 18 }, 3);
4531}
4532
4533typedef uint8_t Vector_4_u8 __attribute__((vector_size(4 * sizeof(uint8_t))));
4534
4535Vector_4_u8 zig_ret_vector_4_u8(void);
4536void zig_vector_4_u8(Vector_4_u8, size_t);
4537void zig_vector_4_u8_vector_4_u8(Vector_4_u8, Vector_4_u8, size_t);
4538
4539Vector_4_u8 c_ret_vector_4_u8(void) {
4540 return (Vector_4_u8){ 41, 42, 43, 44 };
4541}
4542void c_vector_4_u8(Vector_4_u8 v, size_t i) {
4543 assert_or_panic(v[0] == 45);
4544 assert_or_panic(v[1] == 46);
4545 assert_or_panic(v[2] == 47);
4546 assert_or_panic(v[3] == 48);
4547 assert_or_panic(i == 4);
4548}
4549void c_vector_4_u8_vector_4_u8(Vector_4_u8 v0, Vector_4_u8 v1, size_t i) {
4550 assert_or_panic(v0[0] == 49);
4551 assert_or_panic(v0[1] == 50);
4552 assert_or_panic(v0[2] == 51);
4553 assert_or_panic(v0[3] == 52);
4554 assert_or_panic(v1[0] == 53);
4555 assert_or_panic(v1[1] == 54);
4556 assert_or_panic(v1[2] == 55);
4557 assert_or_panic(v1[3] == 56);
4558 assert_or_panic(i == 8);
4559}
4560void c_test_vector_4_u8(void) {
4561 Vector_4_u8 v = zig_ret_vector_4_u8();
4562 assert_or_panic(v[0] == 25);
4563 assert_or_panic(v[1] == 26);
4564 assert_or_panic(v[2] == 27);
4565 assert_or_panic(v[3] == 28);
4566 zig_vector_4_u8((Vector_4_u8){ 29, 30, 31, 32 }, 4);
4567 zig_vector_4_u8_vector_4_u8((Vector_4_u8){ 33, 34, 35, 36 }, (Vector_4_u8){ 37, 38, 39, 40 }, 8);
4568}
4569
4570typedef uint8_t Vector_6_u8 __attribute__((vector_size(6 * sizeof(uint8_t))));
4571
4572Vector_6_u8 zig_ret_vector_6_u8(void);
4573void zig_vector_6_u8(Vector_6_u8, size_t);
4574
4575Vector_6_u8 c_ret_vector_6_u8(void) {
4576 return (Vector_6_u8){ 53, 54, 55, 56, 57, 58 };
4577}
4578void c_vector_6_u8(Vector_6_u8 v, size_t i) {
4579 assert_or_panic(v[0] == 59);
4580 assert_or_panic(v[1] == 60);
4581 assert_or_panic(v[2] == 61);
4582 assert_or_panic(v[3] == 62);
4583 assert_or_panic(v[4] == 63);
4584 assert_or_panic(v[5] == 64);
4585 assert_or_panic(i == 6);
4586}
4587void c_test_vector_6_u8(void) {
4588 Vector_6_u8 v = zig_ret_vector_6_u8();
4589 assert_or_panic(v[0] == 41);
4590 assert_or_panic(v[1] == 42);
4591 assert_or_panic(v[2] == 43);
4592 assert_or_panic(v[3] == 44);
4593 assert_or_panic(v[4] == 45);
4594 assert_or_panic(v[5] == 46);
4595 zig_vector_6_u8((Vector_6_u8){ 47, 48, 49, 50, 51, 52 }, 6);
4596}
4597
4598typedef uint8_t Vector_8_u8 __attribute__((vector_size(8 * sizeof(uint8_t))));
4599
4600Vector_8_u8 zig_ret_vector_8_u8(void);
4601void zig_vector_8_u8(Vector_8_u8, size_t);
4602
4603Vector_8_u8 c_ret_vector_8_u8(void) {
4604 return (Vector_8_u8){ 81, 82, 83, 84, 85, 86, 87, 88 };
4605}
4606void c_vector_8_u8(Vector_8_u8 v, size_t i) {
4607 assert_or_panic(v[0] == 89);
4608 assert_or_panic(v[1] == 90);
4609 assert_or_panic(v[2] == 91);
4610 assert_or_panic(v[3] == 92);
4611 assert_or_panic(v[4] == 93);
4612 assert_or_panic(v[5] == 94);
4613 assert_or_panic(v[6] == 95);
4614 assert_or_panic(v[7] == 96);
4615 assert_or_panic(i == 8);
4616}
4617void c_test_vector_8_u8(void) {
4618 Vector_8_u8 v = zig_ret_vector_8_u8();
4619 assert_or_panic(v[0] == 65);
4620 assert_or_panic(v[1] == 66);
4621 assert_or_panic(v[2] == 67);
4622 assert_or_panic(v[3] == 68);
4623 assert_or_panic(v[4] == 69);
4624 assert_or_panic(v[5] == 70);
4625 assert_or_panic(v[6] == 71);
4626 assert_or_panic(v[7] == 72);
4627 zig_vector_8_u8((Vector_8_u8){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
4628}
4629
4630typedef uint8_t Vector_12_u8 __attribute__((vector_size(12 * sizeof(uint8_t))));
4631
4632Vector_12_u8 zig_ret_vector_12_u8(void);
4633void zig_vector_12_u8(Vector_12_u8, size_t);
4634
4635Vector_12_u8 c_ret_vector_12_u8(void) {
4636 return (Vector_12_u8){ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32 };
4637}
4638void c_vector_12_u8(Vector_12_u8 v, size_t i) {
4639 assert_or_panic(v[0] == 33);
4640 assert_or_panic(v[1] == 34);
4641 assert_or_panic(v[2] == 35);
4642 assert_or_panic(v[3] == 36);
4643 assert_or_panic(v[4] == 37);
4644 assert_or_panic(v[5] == 38);
4645 assert_or_panic(v[6] == 39);
4646 assert_or_panic(v[7] == 40);
4647 assert_or_panic(v[8] == 41);
4648 assert_or_panic(v[9] == 42);
4649 assert_or_panic(v[10] == 43);
4650 assert_or_panic(v[11] == 44);
4651 assert_or_panic(i == 12);
4652}
4653void c_test_vector_12_u8(void) {
4654 Vector_12_u8 v = zig_ret_vector_12_u8();
4655 assert_or_panic(v[0] == 97);
4656 assert_or_panic(v[1] == 98);
4657 assert_or_panic(v[2] == 99);
4658 assert_or_panic(v[3] == 0);
4659 assert_or_panic(v[4] == 1);
4660 assert_or_panic(v[5] == 2);
4661 assert_or_panic(v[6] == 3);
4662 assert_or_panic(v[7] == 4);
4663 assert_or_panic(v[8] == 5);
4664 assert_or_panic(v[9] == 6);
4665 assert_or_panic(v[10] == 7);
4666 assert_or_panic(v[11] == 8);
4667 zig_vector_12_u8((Vector_12_u8){ 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20 }, 12);
4668}
4669
4670typedef uint8_t Vector_16_u8 __attribute__((vector_size(16 * sizeof(uint8_t))));
4671
4672Vector_16_u8 zig_ret_vector_16_u8(void);
4673void zig_vector_16_u8(Vector_16_u8, size_t);
4674
4675Vector_16_u8 c_ret_vector_16_u8(void) {
4676 return (Vector_16_u8){ 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92 };
4677}
4678void c_vector_16_u8(Vector_16_u8 v, size_t i) {
4679 assert_or_panic(v[0] == 93);
4680 assert_or_panic(v[1] == 94);
4681 assert_or_panic(v[2] == 95);
4682 assert_or_panic(v[3] == 96);
4683 assert_or_panic(v[4] == 97);
4684 assert_or_panic(v[5] == 98);
4685 assert_or_panic(v[6] == 99);
4686 assert_or_panic(v[7] == 0);
4687 assert_or_panic(v[8] == 1);
4688 assert_or_panic(v[9] == 2);
4689 assert_or_panic(v[10] == 3);
4690 assert_or_panic(v[11] == 4);
4691 assert_or_panic(v[12] == 5);
4692 assert_or_panic(v[13] == 6);
4693 assert_or_panic(v[14] == 7);
4694 assert_or_panic(v[15] == 8);
4695 assert_or_panic(i == 16);
4696}
4697void c_test_vector_16_u8(void) {
4698 Vector_16_u8 v = zig_ret_vector_16_u8();
4699 assert_or_panic(v[0] == 45);
4700 assert_or_panic(v[1] == 46);
4701 assert_or_panic(v[2] == 47);
4702 assert_or_panic(v[3] == 48);
4703 assert_or_panic(v[4] == 49);
4704 assert_or_panic(v[5] == 50);
4705 assert_or_panic(v[6] == 51);
4706 assert_or_panic(v[7] == 52);
4707 assert_or_panic(v[8] == 53);
4708 assert_or_panic(v[9] == 54);
4709 assert_or_panic(v[10] == 55);
4710 assert_or_panic(v[11] == 56);
4711 assert_or_panic(v[12] == 57);
4712 assert_or_panic(v[13] == 58);
4713 assert_or_panic(v[14] == 59);
4714 assert_or_panic(v[15] == 60);
4715 zig_vector_16_u8((Vector_16_u8){ 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76 }, 16);
4716}
4717
4718typedef uint8_t Vector_24_u8 __attribute__((vector_size(24 * sizeof(uint8_t))));
4719
4720Vector_24_u8 zig_ret_vector_24_u8(void);
4721void zig_vector_24_u8(Vector_24_u8, size_t);
4722
4723Vector_24_u8 c_ret_vector_24_u8(void) {
4724 return (Vector_24_u8){
4725 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72,
4726 73, 74, 75, 76, 77, 78, 79, 80,
4727 };
4728}
4729void c_vector_24_u8(Vector_24_u8 v, size_t i) {
4730 assert_or_panic(v[0] == 81);
4731 assert_or_panic(v[1] == 82);
4732 assert_or_panic(v[2] == 83);
4733 assert_or_panic(v[3] == 84);
4734 assert_or_panic(v[4] == 85);
4735 assert_or_panic(v[5] == 86);
4736 assert_or_panic(v[6] == 87);
4737 assert_or_panic(v[7] == 88);
4738 assert_or_panic(v[8] == 89);
4739 assert_or_panic(v[9] == 90);
4740 assert_or_panic(v[10] == 91);
4741 assert_or_panic(v[11] == 92);
4742 assert_or_panic(v[12] == 93);
4743 assert_or_panic(v[13] == 94);
4744 assert_or_panic(v[14] == 95);
4745 assert_or_panic(v[15] == 96);
4746 assert_or_panic(v[16] == 97);
4747 assert_or_panic(v[17] == 98);
4748 assert_or_panic(v[18] == 99);
4749 assert_or_panic(v[19] == 0);
4750 assert_or_panic(v[20] == 1);
4751 assert_or_panic(v[21] == 2);
4752 assert_or_panic(v[22] == 3);
4753 assert_or_panic(v[23] == 4);
4754 assert_or_panic(i == 24);
4755}
4756void c_test_vector_24_u8(void) {
4757 Vector_24_u8 v = zig_ret_vector_24_u8();
4758 assert_or_panic(v[0] == 9);
4759 assert_or_panic(v[1] == 10);
4760 assert_or_panic(v[2] == 11);
4761 assert_or_panic(v[3] == 12);
4762 assert_or_panic(v[4] == 13);
4763 assert_or_panic(v[5] == 14);
4764 assert_or_panic(v[6] == 15);
4765 assert_or_panic(v[7] == 16);
4766 assert_or_panic(v[8] == 17);
4767 assert_or_panic(v[9] == 18);
4768 assert_or_panic(v[10] == 19);
4769 assert_or_panic(v[11] == 20);
4770 assert_or_panic(v[12] == 21);
4771 assert_or_panic(v[13] == 22);
4772 assert_or_panic(v[14] == 23);
4773 assert_or_panic(v[15] == 24);
4774 assert_or_panic(v[16] == 25);
4775 assert_or_panic(v[17] == 26);
4776 assert_or_panic(v[18] == 27);
4777 assert_or_panic(v[19] == 28);
4778 assert_or_panic(v[20] == 29);
4779 assert_or_panic(v[21] == 30);
4780 assert_or_panic(v[22] == 31);
4781 assert_or_panic(v[23] == 32);
4782 zig_vector_24_u8((Vector_24_u8){
4783 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
4784 49, 50, 51, 52, 53, 54, 55, 56,
4785 }, 24);
4786}
4787
4788typedef uint8_t Vector_32_u8 __attribute__((vector_size(32 * sizeof(uint8_t))));
4789
4790Vector_32_u8 zig_ret_vector_32_u8(void);
4791void zig_vector_32_u8(Vector_32_u8, size_t);
4792
4793Vector_32_u8 c_ret_vector_32_u8(void) {
4794 return (Vector_32_u8){
4795 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
4796 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0,
4797 };
4798}
4799void c_vector_32_u8(Vector_32_u8 v, size_t i) {
4800 assert_or_panic(v[0] == 1);
4801 assert_or_panic(v[1] == 2);
4802 assert_or_panic(v[2] == 3);
4803 assert_or_panic(v[3] == 4);
4804 assert_or_panic(v[4] == 5);
4805 assert_or_panic(v[5] == 6);
4806 assert_or_panic(v[6] == 7);
4807 assert_or_panic(v[7] == 8);
4808 assert_or_panic(v[8] == 9);
4809 assert_or_panic(v[9] == 10);
4810 assert_or_panic(v[10] == 11);
4811 assert_or_panic(v[11] == 12);
4812 assert_or_panic(v[12] == 13);
4813 assert_or_panic(v[13] == 14);
4814 assert_or_panic(v[14] == 15);
4815 assert_or_panic(v[15] == 16);
4816 assert_or_panic(v[16] == 17);
4817 assert_or_panic(v[17] == 18);
4818 assert_or_panic(v[18] == 19);
4819 assert_or_panic(v[19] == 20);
4820 assert_or_panic(v[20] == 21);
4821 assert_or_panic(v[21] == 22);
4822 assert_or_panic(v[22] == 23);
4823 assert_or_panic(v[23] == 24);
4824 assert_or_panic(v[24] == 25);
4825 assert_or_panic(v[25] == 26);
4826 assert_or_panic(v[26] == 27);
4827 assert_or_panic(v[27] == 28);
4828 assert_or_panic(v[28] == 29);
4829 assert_or_panic(v[29] == 30);
4830 assert_or_panic(v[30] == 31);
4831 assert_or_panic(v[31] == 32);
4832 assert_or_panic(i == 32);
4833}
4834void c_test_vector_32_u8(void) {
4835 Vector_32_u8 v = zig_ret_vector_32_u8();
4836 assert_or_panic(v[0] == 5);
4837 assert_or_panic(v[1] == 6);
4838 assert_or_panic(v[2] == 7);
4839 assert_or_panic(v[3] == 8);
4840 assert_or_panic(v[4] == 9);
4841 assert_or_panic(v[5] == 10);
4842 assert_or_panic(v[6] == 11);
4843 assert_or_panic(v[7] == 12);
4844 assert_or_panic(v[8] == 13);
4845 assert_or_panic(v[9] == 14);
4846 assert_or_panic(v[10] == 15);
4847 assert_or_panic(v[11] == 16);
4848 assert_or_panic(v[12] == 17);
4849 assert_or_panic(v[13] == 18);
4850 assert_or_panic(v[14] == 19);
4851 assert_or_panic(v[15] == 20);
4852 assert_or_panic(v[16] == 21);
4853 assert_or_panic(v[17] == 22);
4854 assert_or_panic(v[18] == 23);
4855 assert_or_panic(v[19] == 24);
4856 assert_or_panic(v[20] == 25);
4857 assert_or_panic(v[21] == 26);
4858 assert_or_panic(v[22] == 27);
4859 assert_or_panic(v[23] == 28);
4860 assert_or_panic(v[24] == 29);
4861 assert_or_panic(v[25] == 30);
4862 assert_or_panic(v[26] == 31);
4863 assert_or_panic(v[27] == 32);
4864 assert_or_panic(v[28] == 33);
4865 assert_or_panic(v[29] == 34);
4866 assert_or_panic(v[30] == 35);
4867 assert_or_panic(v[31] == 36);
4868 zig_vector_32_u8((Vector_32_u8){
4869 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
4870 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
4871 }, 32);
4872}
4873
4874typedef uint8_t Vector_48_u8 __attribute__((vector_size(48 * sizeof(uint8_t))));
4875
4876Vector_48_u8 zig_ret_vector_48_u8(void);
4877void zig_vector_48_u8(Vector_48_u8, size_t);
4878
4879Vector_48_u8 c_ret_vector_48_u8(void) {
4880 return (Vector_48_u8){
4881 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
4882 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60,
4883 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,
4884 };
4885}
4886void c_vector_48_u8(Vector_48_u8 v, size_t i) {
4887 assert_or_panic(v[0] == 77);
4888 assert_or_panic(v[1] == 78);
4889 assert_or_panic(v[2] == 79);
4890 assert_or_panic(v[3] == 80);
4891 assert_or_panic(v[4] == 81);
4892 assert_or_panic(v[5] == 82);
4893 assert_or_panic(v[6] == 83);
4894 assert_or_panic(v[7] == 84);
4895 assert_or_panic(v[8] == 85);
4896 assert_or_panic(v[9] == 86);
4897 assert_or_panic(v[10] == 87);
4898 assert_or_panic(v[11] == 88);
4899 assert_or_panic(v[12] == 89);
4900 assert_or_panic(v[13] == 90);
4901 assert_or_panic(v[14] == 91);
4902 assert_or_panic(v[15] == 92);
4903 assert_or_panic(v[16] == 93);
4904 assert_or_panic(v[17] == 94);
4905 assert_or_panic(v[18] == 95);
4906 assert_or_panic(v[19] == 96);
4907 assert_or_panic(v[20] == 97);
4908 assert_or_panic(v[21] == 98);
4909 assert_or_panic(v[22] == 99);
4910 assert_or_panic(v[23] == 0);
4911 assert_or_panic(v[24] == 1);
4912 assert_or_panic(v[25] == 2);
4913 assert_or_panic(v[26] == 3);
4914 assert_or_panic(v[27] == 4);
4915 assert_or_panic(v[28] == 5);
4916 assert_or_panic(v[29] == 6);
4917 assert_or_panic(v[30] == 7);
4918 assert_or_panic(v[31] == 8);
4919 assert_or_panic(v[32] == 9);
4920 assert_or_panic(v[33] == 10);
4921 assert_or_panic(v[34] == 11);
4922 assert_or_panic(v[35] == 12);
4923 assert_or_panic(v[36] == 13);
4924 assert_or_panic(v[37] == 14);
4925 assert_or_panic(v[38] == 15);
4926 assert_or_panic(v[39] == 16);
4927 assert_or_panic(v[40] == 17);
4928 assert_or_panic(v[41] == 18);
4929 assert_or_panic(v[42] == 19);
4930 assert_or_panic(v[43] == 20);
4931 assert_or_panic(v[44] == 21);
4932 assert_or_panic(v[45] == 22);
4933 assert_or_panic(v[46] == 23);
4934 assert_or_panic(v[47] == 24);
4935 assert_or_panic(i == 48);
4936}
4937void c_test_vector_48_u8(void) {
4938 Vector_48_u8 v = zig_ret_vector_48_u8();
4939 assert_or_panic(v[0] == 33);
4940 assert_or_panic(v[1] == 34);
4941 assert_or_panic(v[2] == 35);
4942 assert_or_panic(v[3] == 36);
4943 assert_or_panic(v[4] == 37);
4944 assert_or_panic(v[5] == 38);
4945 assert_or_panic(v[6] == 39);
4946 assert_or_panic(v[7] == 40);
4947 assert_or_panic(v[8] == 41);
4948 assert_or_panic(v[9] == 42);
4949 assert_or_panic(v[10] == 43);
4950 assert_or_panic(v[11] == 44);
4951 assert_or_panic(v[12] == 45);
4952 assert_or_panic(v[13] == 46);
4953 assert_or_panic(v[14] == 47);
4954 assert_or_panic(v[15] == 48);
4955 assert_or_panic(v[16] == 49);
4956 assert_or_panic(v[17] == 50);
4957 assert_or_panic(v[18] == 51);
4958 assert_or_panic(v[19] == 52);
4959 assert_or_panic(v[20] == 53);
4960 assert_or_panic(v[21] == 54);
4961 assert_or_panic(v[22] == 55);
4962 assert_or_panic(v[23] == 56);
4963 assert_or_panic(v[24] == 57);
4964 assert_or_panic(v[25] == 58);
4965 assert_or_panic(v[26] == 59);
4966 assert_or_panic(v[27] == 60);
4967 assert_or_panic(v[28] == 61);
4968 assert_or_panic(v[29] == 62);
4969 assert_or_panic(v[30] == 63);
4970 assert_or_panic(v[31] == 64);
4971 assert_or_panic(v[32] == 65);
4972 assert_or_panic(v[33] == 66);
4973 assert_or_panic(v[34] == 67);
4974 assert_or_panic(v[35] == 68);
4975 assert_or_panic(v[36] == 69);
4976 assert_or_panic(v[37] == 70);
4977 assert_or_panic(v[38] == 71);
4978 assert_or_panic(v[39] == 72);
4979 assert_or_panic(v[40] == 73);
4980 assert_or_panic(v[41] == 74);
4981 assert_or_panic(v[42] == 75);
4982 assert_or_panic(v[43] == 76);
4983 assert_or_panic(v[44] == 77);
4984 assert_or_panic(v[45] == 78);
4985 assert_or_panic(v[46] == 79);
4986 assert_or_panic(v[47] == 80);
4987 zig_vector_48_u8((Vector_48_u8){
4988 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96,
4989 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
4990 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
4991 }, 48);
4992}
4993
4994typedef uint8_t Vector_64_u8 __attribute__((vector_size(64 * sizeof(uint8_t))));
4995
4996Vector_64_u8 zig_ret_vector_64_u8(void);
4997void zig_vector_64_u8(Vector_64_u8, size_t);
4998
4999Vector_64_u8 c_ret_vector_64_u8(void) {
5000 return (Vector_64_u8){
5001 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
5002 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
5003 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0,
5004 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
5005 };
5006}
5007void c_vector_64_u8(Vector_64_u8 v, size_t i) {
5008 assert_or_panic(v[0] == 17);
5009 assert_or_panic(v[1] == 18);
5010 assert_or_panic(v[2] == 19);
5011 assert_or_panic(v[3] == 20);
5012 assert_or_panic(v[4] == 21);
5013 assert_or_panic(v[5] == 22);
5014 assert_or_panic(v[6] == 23);
5015 assert_or_panic(v[7] == 24);
5016 assert_or_panic(v[8] == 25);
5017 assert_or_panic(v[9] == 26);
5018 assert_or_panic(v[10] == 27);
5019 assert_or_panic(v[11] == 28);
5020 assert_or_panic(v[12] == 29);
5021 assert_or_panic(v[13] == 30);
5022 assert_or_panic(v[14] == 31);
5023 assert_or_panic(v[15] == 32);
5024 assert_or_panic(v[16] == 33);
5025 assert_or_panic(v[17] == 34);
5026 assert_or_panic(v[18] == 35);
5027 assert_or_panic(v[19] == 36);
5028 assert_or_panic(v[20] == 37);
5029 assert_or_panic(v[21] == 38);
5030 assert_or_panic(v[22] == 39);
5031 assert_or_panic(v[23] == 40);
5032 assert_or_panic(v[24] == 41);
5033 assert_or_panic(v[25] == 42);
5034 assert_or_panic(v[26] == 43);
5035 assert_or_panic(v[27] == 44);
5036 assert_or_panic(v[28] == 45);
5037 assert_or_panic(v[29] == 46);
5038 assert_or_panic(v[30] == 47);
5039 assert_or_panic(v[31] == 48);
5040 assert_or_panic(v[32] == 49);
5041 assert_or_panic(v[33] == 50);
5042 assert_or_panic(v[34] == 51);
5043 assert_or_panic(v[35] == 52);
5044 assert_or_panic(v[36] == 53);
5045 assert_or_panic(v[37] == 54);
5046 assert_or_panic(v[38] == 55);
5047 assert_or_panic(v[39] == 56);
5048 assert_or_panic(v[40] == 57);
5049 assert_or_panic(v[41] == 58);
5050 assert_or_panic(v[42] == 59);
5051 assert_or_panic(v[43] == 60);
5052 assert_or_panic(v[44] == 61);
5053 assert_or_panic(v[45] == 62);
5054 assert_or_panic(v[46] == 63);
5055 assert_or_panic(v[47] == 64);
5056 assert_or_panic(v[48] == 65);
5057 assert_or_panic(v[49] == 66);
5058 assert_or_panic(v[50] == 67);
5059 assert_or_panic(v[51] == 68);
5060 assert_or_panic(v[52] == 69);
5061 assert_or_panic(v[53] == 70);
5062 assert_or_panic(v[54] == 71);
5063 assert_or_panic(v[55] == 72);
5064 assert_or_panic(v[56] == 73);
5065 assert_or_panic(v[57] == 74);
5066 assert_or_panic(v[58] == 75);
5067 assert_or_panic(v[59] == 76);
5068 assert_or_panic(v[60] == 77);
5069 assert_or_panic(v[61] == 78);
5070 assert_or_panic(v[62] == 79);
5071 assert_or_panic(v[63] == 80);
5072 assert_or_panic(i == 64);
5073}
5074void c_test_vector_64_u8(void) {
5075 Vector_64_u8 v = zig_ret_vector_64_u8();
5076 assert_or_panic(v[0] == 25);
5077 assert_or_panic(v[1] == 26);
5078 assert_or_panic(v[2] == 27);
5079 assert_or_panic(v[3] == 28);
5080 assert_or_panic(v[4] == 29);
5081 assert_or_panic(v[5] == 30);
5082 assert_or_panic(v[6] == 31);
5083 assert_or_panic(v[7] == 32);
5084 assert_or_panic(v[8] == 33);
5085 assert_or_panic(v[9] == 34);
5086 assert_or_panic(v[10] == 35);
5087 assert_or_panic(v[11] == 36);
5088 assert_or_panic(v[12] == 37);
5089 assert_or_panic(v[13] == 38);
5090 assert_or_panic(v[14] == 39);
5091 assert_or_panic(v[15] == 40);
5092 assert_or_panic(v[16] == 41);
5093 assert_or_panic(v[17] == 42);
5094 assert_or_panic(v[18] == 43);
5095 assert_or_panic(v[19] == 44);
5096 assert_or_panic(v[20] == 45);
5097 assert_or_panic(v[21] == 46);
5098 assert_or_panic(v[22] == 47);
5099 assert_or_panic(v[23] == 48);
5100 assert_or_panic(v[24] == 49);
5101 assert_or_panic(v[25] == 50);
5102 assert_or_panic(v[26] == 51);
5103 assert_or_panic(v[27] == 52);
5104 assert_or_panic(v[28] == 53);
5105 assert_or_panic(v[29] == 54);
5106 assert_or_panic(v[30] == 55);
5107 assert_or_panic(v[31] == 56);
5108 assert_or_panic(v[32] == 57);
5109 assert_or_panic(v[33] == 58);
5110 assert_or_panic(v[34] == 59);
5111 assert_or_panic(v[35] == 60);
5112 assert_or_panic(v[36] == 61);
5113 assert_or_panic(v[37] == 62);
5114 assert_or_panic(v[38] == 63);
5115 assert_or_panic(v[39] == 64);
5116 assert_or_panic(v[40] == 65);
5117 assert_or_panic(v[41] == 66);
5118 assert_or_panic(v[42] == 67);
5119 assert_or_panic(v[43] == 68);
5120 assert_or_panic(v[44] == 69);
5121 assert_or_panic(v[45] == 70);
5122 assert_or_panic(v[46] == 71);
5123 assert_or_panic(v[47] == 72);
5124 assert_or_panic(v[48] == 73);
5125 assert_or_panic(v[49] == 74);
5126 assert_or_panic(v[50] == 75);
5127 assert_or_panic(v[51] == 76);
5128 assert_or_panic(v[52] == 77);
5129 assert_or_panic(v[53] == 78);
5130 assert_or_panic(v[54] == 79);
5131 assert_or_panic(v[55] == 80);
5132 assert_or_panic(v[56] == 81);
5133 assert_or_panic(v[57] == 82);
5134 assert_or_panic(v[58] == 83);
5135 assert_or_panic(v[59] == 84);
5136 assert_or_panic(v[60] == 85);
5137 assert_or_panic(v[61] == 86);
5138 assert_or_panic(v[62] == 87);
5139 assert_or_panic(v[63] == 88);
5140 zig_vector_64_u8((Vector_64_u8){
5141 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4,
5142 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
5143 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
5144 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
5145 }, 64);
5146}
5147
5148typedef uint8_t Vector_96_u8 __attribute__((vector_size(96 * sizeof(uint8_t))));
5149
5150Vector_96_u8 zig_ret_vector_96_u8(void);
5151void zig_vector_96_u8(Vector_96_u8, size_t);
5152
5153Vector_96_u8 c_ret_vector_96_u8(void) {
5154 return (Vector_96_u8){
5155 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
5156 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
5157 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
5158 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
5159 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
5160 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
5161 };
5162}
5163void c_vector_96_u8(Vector_96_u8 v, size_t i) {
5164 assert_or_panic(v[0] == 78);
5165 assert_or_panic(v[1] == 79);
5166 assert_or_panic(v[2] == 80);
5167 assert_or_panic(v[3] == 81);
5168 assert_or_panic(v[4] == 82);
5169 assert_or_panic(v[5] == 83);
5170 assert_or_panic(v[6] == 84);
5171 assert_or_panic(v[7] == 85);
5172 assert_or_panic(v[8] == 86);
5173 assert_or_panic(v[9] == 87);
5174 assert_or_panic(v[10] == 88);
5175 assert_or_panic(v[11] == 89);
5176 assert_or_panic(v[12] == 90);
5177 assert_or_panic(v[13] == 91);
5178 assert_or_panic(v[14] == 92);
5179 assert_or_panic(v[15] == 93);
5180 assert_or_panic(v[16] == 94);
5181 assert_or_panic(v[17] == 95);
5182 assert_or_panic(v[18] == 96);
5183 assert_or_panic(v[19] == 97);
5184 assert_or_panic(v[20] == 98);
5185 assert_or_panic(v[21] == 99);
5186 assert_or_panic(v[22] == 0);
5187 assert_or_panic(v[23] == 1);
5188 assert_or_panic(v[24] == 2);
5189 assert_or_panic(v[25] == 3);
5190 assert_or_panic(v[26] == 4);
5191 assert_or_panic(v[27] == 5);
5192 assert_or_panic(v[28] == 6);
5193 assert_or_panic(v[29] == 7);
5194 assert_or_panic(v[30] == 8);
5195 assert_or_panic(v[31] == 9);
5196 assert_or_panic(v[32] == 10);
5197 assert_or_panic(v[33] == 11);
5198 assert_or_panic(v[34] == 12);
5199 assert_or_panic(v[35] == 13);
5200 assert_or_panic(v[36] == 14);
5201 assert_or_panic(v[37] == 15);
5202 assert_or_panic(v[38] == 16);
5203 assert_or_panic(v[39] == 17);
5204 assert_or_panic(v[40] == 18);
5205 assert_or_panic(v[41] == 19);
5206 assert_or_panic(v[42] == 20);
5207 assert_or_panic(v[43] == 21);
5208 assert_or_panic(v[44] == 22);
5209 assert_or_panic(v[45] == 23);
5210 assert_or_panic(v[46] == 24);
5211 assert_or_panic(v[47] == 25);
5212 assert_or_panic(v[48] == 26);
5213 assert_or_panic(v[49] == 27);
5214 assert_or_panic(v[50] == 28);
5215 assert_or_panic(v[51] == 29);
5216 assert_or_panic(v[52] == 30);
5217 assert_or_panic(v[53] == 31);
5218 assert_or_panic(v[54] == 32);
5219 assert_or_panic(v[55] == 33);
5220 assert_or_panic(v[56] == 34);
5221 assert_or_panic(v[57] == 35);
5222 assert_or_panic(v[58] == 36);
5223 assert_or_panic(v[59] == 37);
5224 assert_or_panic(v[60] == 38);
5225 assert_or_panic(v[61] == 39);
5226 assert_or_panic(v[62] == 40);
5227 assert_or_panic(v[63] == 41);
5228 assert_or_panic(v[64] == 42);
5229 assert_or_panic(v[65] == 43);
5230 assert_or_panic(v[66] == 44);
5231 assert_or_panic(v[67] == 45);
5232 assert_or_panic(v[68] == 46);
5233 assert_or_panic(v[69] == 47);
5234 assert_or_panic(v[70] == 48);
5235 assert_or_panic(v[71] == 49);
5236 assert_or_panic(v[72] == 50);
5237 assert_or_panic(v[73] == 51);
5238 assert_or_panic(v[74] == 52);
5239 assert_or_panic(v[75] == 53);
5240 assert_or_panic(v[76] == 54);
5241 assert_or_panic(v[77] == 55);
5242 assert_or_panic(v[80] == 58);
5243 assert_or_panic(v[81] == 59);
5244 assert_or_panic(v[82] == 60);
5245 assert_or_panic(v[83] == 61);
5246 assert_or_panic(v[84] == 62);
5247 assert_or_panic(v[85] == 63);
5248 assert_or_panic(v[86] == 64);
5249 assert_or_panic(v[87] == 65);
5250 assert_or_panic(v[88] == 66);
5251 assert_or_panic(v[89] == 67);
5252 assert_or_panic(v[90] == 68);
5253 assert_or_panic(v[91] == 69);
5254 assert_or_panic(v[92] == 70);
5255 assert_or_panic(v[93] == 71);
5256 assert_or_panic(v[94] == 72);
5257 assert_or_panic(v[95] == 73);
5258 assert_or_panic(i == 96);
5259}
5260void c_test_vector_96_u8(void) {
5261 Vector_96_u8 v = zig_ret_vector_96_u8();
5262 assert_or_panic(v[0] == 90);
5263 assert_or_panic(v[1] == 91);
5264 assert_or_panic(v[2] == 92);
5265 assert_or_panic(v[3] == 93);
5266 assert_or_panic(v[4] == 94);
5267 assert_or_panic(v[5] == 95);
5268 assert_or_panic(v[6] == 96);
5269 assert_or_panic(v[7] == 97);
5270 assert_or_panic(v[8] == 98);
5271 assert_or_panic(v[9] == 99);
5272 assert_or_panic(v[10] == 0);
5273 assert_or_panic(v[11] == 1);
5274 assert_or_panic(v[12] == 2);
5275 assert_or_panic(v[13] == 3);
5276 assert_or_panic(v[14] == 4);
5277 assert_or_panic(v[15] == 5);
5278 assert_or_panic(v[16] == 6);
5279 assert_or_panic(v[17] == 7);
5280 assert_or_panic(v[18] == 8);
5281 assert_or_panic(v[19] == 9);
5282 assert_or_panic(v[20] == 10);
5283 assert_or_panic(v[21] == 11);
5284 assert_or_panic(v[22] == 12);
5285 assert_or_panic(v[23] == 13);
5286 assert_or_panic(v[24] == 14);
5287 assert_or_panic(v[25] == 15);
5288 assert_or_panic(v[26] == 16);
5289 assert_or_panic(v[27] == 17);
5290 assert_or_panic(v[28] == 18);
5291 assert_or_panic(v[29] == 19);
5292 assert_or_panic(v[30] == 20);
5293 assert_or_panic(v[31] == 21);
5294 assert_or_panic(v[32] == 22);
5295 assert_or_panic(v[33] == 23);
5296 assert_or_panic(v[34] == 24);
5297 assert_or_panic(v[35] == 25);
5298 assert_or_panic(v[36] == 26);
5299 assert_or_panic(v[37] == 27);
5300 assert_or_panic(v[38] == 28);
5301 assert_or_panic(v[39] == 29);
5302 assert_or_panic(v[40] == 30);
5303 assert_or_panic(v[41] == 31);
5304 assert_or_panic(v[42] == 32);
5305 assert_or_panic(v[43] == 33);
5306 assert_or_panic(v[44] == 34);
5307 assert_or_panic(v[45] == 35);
5308 assert_or_panic(v[46] == 36);
5309 assert_or_panic(v[47] == 37);
5310 assert_or_panic(v[48] == 38);
5311 assert_or_panic(v[49] == 39);
5312 assert_or_panic(v[50] == 40);
5313 assert_or_panic(v[51] == 41);
5314 assert_or_panic(v[52] == 42);
5315 assert_or_panic(v[53] == 43);
5316 assert_or_panic(v[54] == 44);
5317 assert_or_panic(v[55] == 45);
5318 assert_or_panic(v[56] == 46);
5319 assert_or_panic(v[57] == 47);
5320 assert_or_panic(v[58] == 48);
5321 assert_or_panic(v[59] == 49);
5322 assert_or_panic(v[60] == 50);
5323 assert_or_panic(v[61] == 51);
5324 assert_or_panic(v[62] == 52);
5325 assert_or_panic(v[63] == 53);
5326 assert_or_panic(v[64] == 54);
5327 assert_or_panic(v[65] == 55);
5328 assert_or_panic(v[66] == 56);
5329 assert_or_panic(v[67] == 57);
5330 assert_or_panic(v[68] == 58);
5331 assert_or_panic(v[69] == 59);
5332 assert_or_panic(v[70] == 60);
5333 assert_or_panic(v[71] == 61);
5334 assert_or_panic(v[72] == 62);
5335 assert_or_panic(v[73] == 63);
5336 assert_or_panic(v[74] == 64);
5337 assert_or_panic(v[75] == 65);
5338 assert_or_panic(v[76] == 66);
5339 assert_or_panic(v[77] == 67);
5340 assert_or_panic(v[78] == 68);
5341 assert_or_panic(v[79] == 69);
5342 assert_or_panic(v[80] == 70);
5343 assert_or_panic(v[81] == 71);
5344 assert_or_panic(v[82] == 72);
5345 assert_or_panic(v[83] == 73);
5346 assert_or_panic(v[84] == 74);
5347 assert_or_panic(v[85] == 75);
5348 assert_or_panic(v[86] == 76);
5349 assert_or_panic(v[87] == 77);
5350 assert_or_panic(v[88] == 78);
5351 assert_or_panic(v[89] == 79);
5352 assert_or_panic(v[90] == 80);
5353 assert_or_panic(v[91] == 81);
5354 assert_or_panic(v[92] == 82);
5355 assert_or_panic(v[93] == 83);
5356 assert_or_panic(v[94] == 84);
5357 assert_or_panic(v[95] == 85);
5358 zig_vector_96_u8((Vector_96_u8){
5359 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
5360 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
5361 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
5362 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
5363 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
5364 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
5365 }, 96);
5366}
5367
5368typedef uint8_t Vector_128_u8 __attribute__((vector_size(128 * sizeof(uint8_t))));
5369
5370Vector_128_u8 zig_ret_vector_128_u8(void);
5371void zig_vector_128_u8(Vector_128_u8, size_t);
5372
5373Vector_128_u8 c_ret_vector_128_u8(void) {
5374 return (Vector_128_u8){
5375 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
5376 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
5377 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
5378 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
5379 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
5380 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
5381 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
5382 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
5383 };
5384}
5385void c_vector_128_u8(Vector_128_u8 v, size_t i) {
5386 assert_or_panic(v[0] == 58);
5387 assert_or_panic(v[1] == 59);
5388 assert_or_panic(v[2] == 60);
5389 assert_or_panic(v[3] == 61);
5390 assert_or_panic(v[4] == 62);
5391 assert_or_panic(v[5] == 63);
5392 assert_or_panic(v[6] == 64);
5393 assert_or_panic(v[7] == 65);
5394 assert_or_panic(v[8] == 66);
5395 assert_or_panic(v[9] == 67);
5396 assert_or_panic(v[10] == 68);
5397 assert_or_panic(v[11] == 69);
5398 assert_or_panic(v[12] == 70);
5399 assert_or_panic(v[13] == 71);
5400 assert_or_panic(v[14] == 72);
5401 assert_or_panic(v[15] == 73);
5402 assert_or_panic(v[16] == 74);
5403 assert_or_panic(v[17] == 75);
5404 assert_or_panic(v[18] == 76);
5405 assert_or_panic(v[19] == 77);
5406 assert_or_panic(v[20] == 78);
5407 assert_or_panic(v[21] == 79);
5408 assert_or_panic(v[22] == 80);
5409 assert_or_panic(v[23] == 81);
5410 assert_or_panic(v[24] == 82);
5411 assert_or_panic(v[25] == 83);
5412 assert_or_panic(v[26] == 84);
5413 assert_or_panic(v[27] == 85);
5414 assert_or_panic(v[28] == 86);
5415 assert_or_panic(v[29] == 87);
5416 assert_or_panic(v[30] == 88);
5417 assert_or_panic(v[31] == 89);
5418 assert_or_panic(v[32] == 90);
5419 assert_or_panic(v[33] == 91);
5420 assert_or_panic(v[34] == 92);
5421 assert_or_panic(v[35] == 93);
5422 assert_or_panic(v[36] == 94);
5423 assert_or_panic(v[37] == 95);
5424 assert_or_panic(v[38] == 96);
5425 assert_or_panic(v[39] == 97);
5426 assert_or_panic(v[40] == 98);
5427 assert_or_panic(v[41] == 99);
5428 assert_or_panic(v[42] == 0);
5429 assert_or_panic(v[43] == 1);
5430 assert_or_panic(v[44] == 2);
5431 assert_or_panic(v[45] == 3);
5432 assert_or_panic(v[46] == 4);
5433 assert_or_panic(v[47] == 5);
5434 assert_or_panic(v[48] == 6);
5435 assert_or_panic(v[49] == 7);
5436 assert_or_panic(v[50] == 8);
5437 assert_or_panic(v[51] == 9);
5438 assert_or_panic(v[52] == 10);
5439 assert_or_panic(v[53] == 11);
5440 assert_or_panic(v[54] == 12);
5441 assert_or_panic(v[55] == 13);
5442 assert_or_panic(v[56] == 14);
5443 assert_or_panic(v[57] == 15);
5444 assert_or_panic(v[58] == 16);
5445 assert_or_panic(v[59] == 17);
5446 assert_or_panic(v[60] == 18);
5447 assert_or_panic(v[61] == 19);
5448 assert_or_panic(v[62] == 20);
5449 assert_or_panic(v[63] == 21);
5450 assert_or_panic(v[64] == 22);
5451 assert_or_panic(v[65] == 23);
5452 assert_or_panic(v[66] == 24);
5453 assert_or_panic(v[67] == 25);
5454 assert_or_panic(v[68] == 26);
5455 assert_or_panic(v[69] == 27);
5456 assert_or_panic(v[70] == 28);
5457 assert_or_panic(v[71] == 29);
5458 assert_or_panic(v[72] == 30);
5459 assert_or_panic(v[73] == 31);
5460 assert_or_panic(v[74] == 32);
5461 assert_or_panic(v[75] == 33);
5462 assert_or_panic(v[76] == 34);
5463 assert_or_panic(v[77] == 35);
5464 assert_or_panic(v[78] == 36);
5465 assert_or_panic(v[79] == 37);
5466 assert_or_panic(v[80] == 38);
5467 assert_or_panic(v[81] == 39);
5468 assert_or_panic(v[82] == 40);
5469 assert_or_panic(v[83] == 41);
5470 assert_or_panic(v[84] == 42);
5471 assert_or_panic(v[85] == 43);
5472 assert_or_panic(v[86] == 44);
5473 assert_or_panic(v[87] == 45);
5474 assert_or_panic(v[88] == 46);
5475 assert_or_panic(v[89] == 47);
5476 assert_or_panic(v[90] == 48);
5477 assert_or_panic(v[91] == 49);
5478 assert_or_panic(v[92] == 50);
5479 assert_or_panic(v[93] == 51);
5480 assert_or_panic(v[94] == 52);
5481 assert_or_panic(v[95] == 53);
5482 assert_or_panic(v[96] == 54);
5483 assert_or_panic(v[97] == 55);
5484 assert_or_panic(v[98] == 56);
5485 assert_or_panic(v[99] == 57);
5486 assert_or_panic(v[100] == 58);
5487 assert_or_panic(v[101] == 59);
5488 assert_or_panic(v[102] == 60);
5489 assert_or_panic(v[103] == 61);
5490 assert_or_panic(v[104] == 62);
5491 assert_or_panic(v[105] == 63);
5492 assert_or_panic(v[106] == 64);
5493 assert_or_panic(v[107] == 65);
5494 assert_or_panic(v[108] == 66);
5495 assert_or_panic(v[109] == 67);
5496 assert_or_panic(v[110] == 68);
5497 assert_or_panic(v[111] == 69);
5498 assert_or_panic(v[112] == 70);
5499 assert_or_panic(v[113] == 71);
5500 assert_or_panic(v[114] == 72);
5501 assert_or_panic(v[115] == 73);
5502 assert_or_panic(v[116] == 74);
5503 assert_or_panic(v[117] == 75);
5504 assert_or_panic(v[118] == 76);
5505 assert_or_panic(v[119] == 77);
5506 assert_or_panic(v[120] == 78);
5507 assert_or_panic(v[121] == 79);
5508 assert_or_panic(v[122] == 80);
5509 assert_or_panic(v[123] == 81);
5510 assert_or_panic(v[124] == 82);
5511 assert_or_panic(v[125] == 83);
5512 assert_or_panic(v[126] == 84);
5513 assert_or_panic(v[127] == 85);
5514 assert_or_panic(i == 128);
5515}
5516void c_test_vector_128_u8(void) {
5517 Vector_128_u8 v = zig_ret_vector_128_u8();
5518 assert_or_panic(v[0] == 74);
5519 assert_or_panic(v[1] == 75);
5520 assert_or_panic(v[2] == 76);
5521 assert_or_panic(v[3] == 77);
5522 assert_or_panic(v[4] == 78);
5523 assert_or_panic(v[5] == 79);
5524 assert_or_panic(v[6] == 80);
5525 assert_or_panic(v[7] == 81);
5526 assert_or_panic(v[8] == 82);
5527 assert_or_panic(v[9] == 83);
5528 assert_or_panic(v[10] == 84);
5529 assert_or_panic(v[11] == 85);
5530 assert_or_panic(v[12] == 86);
5531 assert_or_panic(v[13] == 87);
5532 assert_or_panic(v[14] == 88);
5533 assert_or_panic(v[15] == 89);
5534 assert_or_panic(v[16] == 90);
5535 assert_or_panic(v[17] == 91);
5536 assert_or_panic(v[18] == 92);
5537 assert_or_panic(v[19] == 93);
5538 assert_or_panic(v[20] == 94);
5539 assert_or_panic(v[21] == 95);
5540 assert_or_panic(v[22] == 96);
5541 assert_or_panic(v[23] == 97);
5542 assert_or_panic(v[24] == 98);
5543 assert_or_panic(v[25] == 99);
5544 assert_or_panic(v[26] == 0);
5545 assert_or_panic(v[27] == 1);
5546 assert_or_panic(v[28] == 2);
5547 assert_or_panic(v[29] == 3);
5548 assert_or_panic(v[30] == 4);
5549 assert_or_panic(v[31] == 5);
5550 assert_or_panic(v[32] == 6);
5551 assert_or_panic(v[33] == 7);
5552 assert_or_panic(v[34] == 8);
5553 assert_or_panic(v[35] == 9);
5554 assert_or_panic(v[36] == 10);
5555 assert_or_panic(v[37] == 11);
5556 assert_or_panic(v[38] == 12);
5557 assert_or_panic(v[39] == 13);
5558 assert_or_panic(v[40] == 14);
5559 assert_or_panic(v[41] == 15);
5560 assert_or_panic(v[42] == 16);
5561 assert_or_panic(v[43] == 17);
5562 assert_or_panic(v[44] == 18);
5563 assert_or_panic(v[45] == 19);
5564 assert_or_panic(v[46] == 20);
5565 assert_or_panic(v[47] == 21);
5566 assert_or_panic(v[48] == 22);
5567 assert_or_panic(v[49] == 23);
5568 assert_or_panic(v[50] == 24);
5569 assert_or_panic(v[51] == 25);
5570 assert_or_panic(v[52] == 26);
5571 assert_or_panic(v[53] == 27);
5572 assert_or_panic(v[54] == 28);
5573 assert_or_panic(v[55] == 29);
5574 assert_or_panic(v[56] == 30);
5575 assert_or_panic(v[57] == 31);
5576 assert_or_panic(v[58] == 32);
5577 assert_or_panic(v[59] == 33);
5578 assert_or_panic(v[60] == 34);
5579 assert_or_panic(v[61] == 35);
5580 assert_or_panic(v[62] == 36);
5581 assert_or_panic(v[63] == 37);
5582 assert_or_panic(v[64] == 38);
5583 assert_or_panic(v[65] == 39);
5584 assert_or_panic(v[66] == 40);
5585 assert_or_panic(v[67] == 41);
5586 assert_or_panic(v[68] == 42);
5587 assert_or_panic(v[69] == 43);
5588 assert_or_panic(v[70] == 44);
5589 assert_or_panic(v[71] == 45);
5590 assert_or_panic(v[72] == 46);
5591 assert_or_panic(v[73] == 47);
5592 assert_or_panic(v[74] == 48);
5593 assert_or_panic(v[75] == 49);
5594 assert_or_panic(v[76] == 50);
5595 assert_or_panic(v[77] == 51);
5596 assert_or_panic(v[78] == 52);
5597 assert_or_panic(v[79] == 53);
5598 assert_or_panic(v[80] == 54);
5599 assert_or_panic(v[81] == 55);
5600 assert_or_panic(v[82] == 56);
5601 assert_or_panic(v[83] == 57);
5602 assert_or_panic(v[84] == 58);
5603 assert_or_panic(v[85] == 59);
5604 assert_or_panic(v[86] == 60);
5605 assert_or_panic(v[87] == 61);
5606 assert_or_panic(v[88] == 62);
5607 assert_or_panic(v[89] == 63);
5608 assert_or_panic(v[90] == 64);
5609 assert_or_panic(v[91] == 65);
5610 assert_or_panic(v[92] == 66);
5611 assert_or_panic(v[93] == 67);
5612 assert_or_panic(v[94] == 68);
5613 assert_or_panic(v[95] == 69);
5614 assert_or_panic(v[96] == 70);
5615 assert_or_panic(v[97] == 71);
5616 assert_or_panic(v[98] == 72);
5617 assert_or_panic(v[99] == 73);
5618 assert_or_panic(v[100] == 74);
5619 assert_or_panic(v[101] == 75);
5620 assert_or_panic(v[102] == 76);
5621 assert_or_panic(v[103] == 77);
5622 assert_or_panic(v[104] == 78);
5623 assert_or_panic(v[105] == 79);
5624 assert_or_panic(v[106] == 80);
5625 assert_or_panic(v[107] == 81);
5626 assert_or_panic(v[108] == 82);
5627 assert_or_panic(v[109] == 83);
5628 assert_or_panic(v[110] == 84);
5629 assert_or_panic(v[111] == 85);
5630 assert_or_panic(v[112] == 86);
5631 assert_or_panic(v[113] == 87);
5632 assert_or_panic(v[114] == 88);
5633 assert_or_panic(v[115] == 89);
5634 assert_or_panic(v[116] == 90);
5635 assert_or_panic(v[117] == 91);
5636 assert_or_panic(v[118] == 92);
5637 assert_or_panic(v[119] == 93);
5638 assert_or_panic(v[120] == 94);
5639 assert_or_panic(v[121] == 95);
5640 assert_or_panic(v[122] == 96);
5641 assert_or_panic(v[123] == 97);
5642 assert_or_panic(v[124] == 98);
5643 assert_or_panic(v[125] == 99);
5644 assert_or_panic(v[126] == 0);
5645 assert_or_panic(v[127] == 1);
5646 zig_vector_128_u8((Vector_128_u8){
5647 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
5648 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
5649 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
5650 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
5651 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
5652 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
5653 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
5654 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
5655 }, 128);
5656}
5657
5658typedef uint8_t Vector_192_u8 __attribute__((vector_size(192 * sizeof(uint8_t))));
5659
5660Vector_192_u8 zig_ret_vector_192_u8(void);
5661void zig_vector_192_u8(Vector_192_u8, size_t);
5662
5663Vector_192_u8 c_ret_vector_192_u8(void) {
5664 return (Vector_192_u8){
5665 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
5666 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
5667 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
5668 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
5669 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
5670 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
5671 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
5672 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
5673 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
5674 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
5675 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
5676 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
5677 };
5678}
5679void c_vector_192_u8(Vector_192_u8 v, size_t i) {
5680 assert_or_panic(v[0] == 62);
5681 assert_or_panic(v[1] == 63);
5682 assert_or_panic(v[2] == 64);
5683 assert_or_panic(v[3] == 65);
5684 assert_or_panic(v[4] == 66);
5685 assert_or_panic(v[5] == 67);
5686 assert_or_panic(v[6] == 68);
5687 assert_or_panic(v[7] == 69);
5688 assert_or_panic(v[8] == 70);
5689 assert_or_panic(v[9] == 71);
5690 assert_or_panic(v[10] == 72);
5691 assert_or_panic(v[11] == 73);
5692 assert_or_panic(v[12] == 74);
5693 assert_or_panic(v[13] == 75);
5694 assert_or_panic(v[14] == 76);
5695 assert_or_panic(v[15] == 77);
5696 assert_or_panic(v[16] == 78);
5697 assert_or_panic(v[17] == 79);
5698 assert_or_panic(v[18] == 80);
5699 assert_or_panic(v[19] == 81);
5700 assert_or_panic(v[20] == 82);
5701 assert_or_panic(v[21] == 83);
5702 assert_or_panic(v[22] == 84);
5703 assert_or_panic(v[23] == 85);
5704 assert_or_panic(v[24] == 86);
5705 assert_or_panic(v[25] == 87);
5706 assert_or_panic(v[26] == 88);
5707 assert_or_panic(v[27] == 89);
5708 assert_or_panic(v[28] == 90);
5709 assert_or_panic(v[29] == 91);
5710 assert_or_panic(v[30] == 92);
5711 assert_or_panic(v[31] == 93);
5712 assert_or_panic(v[32] == 94);
5713 assert_or_panic(v[33] == 95);
5714 assert_or_panic(v[34] == 96);
5715 assert_or_panic(v[35] == 97);
5716 assert_or_panic(v[36] == 98);
5717 assert_or_panic(v[37] == 99);
5718 assert_or_panic(v[38] == 0);
5719 assert_or_panic(v[39] == 1);
5720 assert_or_panic(v[40] == 2);
5721 assert_or_panic(v[41] == 3);
5722 assert_or_panic(v[42] == 4);
5723 assert_or_panic(v[43] == 5);
5724 assert_or_panic(v[44] == 6);
5725 assert_or_panic(v[45] == 7);
5726 assert_or_panic(v[46] == 8);
5727 assert_or_panic(v[47] == 9);
5728 assert_or_panic(v[48] == 10);
5729 assert_or_panic(v[49] == 11);
5730 assert_or_panic(v[50] == 12);
5731 assert_or_panic(v[51] == 13);
5732 assert_or_panic(v[52] == 14);
5733 assert_or_panic(v[53] == 15);
5734 assert_or_panic(v[54] == 16);
5735 assert_or_panic(v[55] == 17);
5736 assert_or_panic(v[56] == 18);
5737 assert_or_panic(v[57] == 19);
5738 assert_or_panic(v[58] == 20);
5739 assert_or_panic(v[59] == 21);
5740 assert_or_panic(v[60] == 22);
5741 assert_or_panic(v[61] == 23);
5742 assert_or_panic(v[62] == 24);
5743 assert_or_panic(v[63] == 25);
5744 assert_or_panic(v[64] == 26);
5745 assert_or_panic(v[65] == 27);
5746 assert_or_panic(v[66] == 28);
5747 assert_or_panic(v[67] == 29);
5748 assert_or_panic(v[68] == 30);
5749 assert_or_panic(v[69] == 31);
5750 assert_or_panic(v[70] == 32);
5751 assert_or_panic(v[71] == 33);
5752 assert_or_panic(v[72] == 34);
5753 assert_or_panic(v[73] == 35);
5754 assert_or_panic(v[74] == 36);
5755 assert_or_panic(v[75] == 37);
5756 assert_or_panic(v[76] == 38);
5757 assert_or_panic(v[77] == 39);
5758 assert_or_panic(v[78] == 40);
5759 assert_or_panic(v[79] == 41);
5760 assert_or_panic(v[80] == 42);
5761 assert_or_panic(v[81] == 43);
5762 assert_or_panic(v[82] == 44);
5763 assert_or_panic(v[83] == 45);
5764 assert_or_panic(v[84] == 46);
5765 assert_or_panic(v[85] == 47);
5766 assert_or_panic(v[86] == 48);
5767 assert_or_panic(v[87] == 49);
5768 assert_or_panic(v[88] == 50);
5769 assert_or_panic(v[89] == 51);
5770 assert_or_panic(v[90] == 52);
5771 assert_or_panic(v[91] == 53);
5772 assert_or_panic(v[92] == 54);
5773 assert_or_panic(v[93] == 55);
5774 assert_or_panic(v[94] == 56);
5775 assert_or_panic(v[95] == 57);
5776 assert_or_panic(v[96] == 58);
5777 assert_or_panic(v[97] == 59);
5778 assert_or_panic(v[98] == 60);
5779 assert_or_panic(v[99] == 61);
5780 assert_or_panic(v[100] == 62);
5781 assert_or_panic(v[101] == 63);
5782 assert_or_panic(v[102] == 64);
5783 assert_or_panic(v[103] == 65);
5784 assert_or_panic(v[104] == 66);
5785 assert_or_panic(v[105] == 67);
5786 assert_or_panic(v[106] == 68);
5787 assert_or_panic(v[107] == 69);
5788 assert_or_panic(v[108] == 70);
5789 assert_or_panic(v[109] == 71);
5790 assert_or_panic(v[110] == 72);
5791 assert_or_panic(v[111] == 73);
5792 assert_or_panic(v[112] == 74);
5793 assert_or_panic(v[113] == 75);
5794 assert_or_panic(v[114] == 76);
5795 assert_or_panic(v[115] == 77);
5796 assert_or_panic(v[116] == 78);
5797 assert_or_panic(v[117] == 79);
5798 assert_or_panic(v[118] == 80);
5799 assert_or_panic(v[119] == 81);
5800 assert_or_panic(v[120] == 82);
5801 assert_or_panic(v[121] == 83);
5802 assert_or_panic(v[122] == 84);
5803 assert_or_panic(v[123] == 85);
5804 assert_or_panic(v[124] == 86);
5805 assert_or_panic(v[125] == 87);
5806 assert_or_panic(v[126] == 88);
5807 assert_or_panic(v[127] == 89);
5808 assert_or_panic(v[128] == 90);
5809 assert_or_panic(v[129] == 91);
5810 assert_or_panic(v[130] == 92);
5811 assert_or_panic(v[131] == 93);
5812 assert_or_panic(v[132] == 94);
5813 assert_or_panic(v[133] == 95);
5814 assert_or_panic(v[134] == 96);
5815 assert_or_panic(v[135] == 97);
5816 assert_or_panic(v[136] == 98);
5817 assert_or_panic(v[137] == 99);
5818 assert_or_panic(v[138] == 0);
5819 assert_or_panic(v[139] == 1);
5820 assert_or_panic(v[140] == 2);
5821 assert_or_panic(v[141] == 3);
5822 assert_or_panic(v[142] == 4);
5823 assert_or_panic(v[143] == 5);
5824 assert_or_panic(v[144] == 6);
5825 assert_or_panic(v[145] == 7);
5826 assert_or_panic(v[146] == 8);
5827 assert_or_panic(v[147] == 9);
5828 assert_or_panic(v[148] == 10);
5829 assert_or_panic(v[149] == 11);
5830 assert_or_panic(v[150] == 12);
5831 assert_or_panic(v[151] == 13);
5832 assert_or_panic(v[152] == 14);
5833 assert_or_panic(v[153] == 15);
5834 assert_or_panic(v[154] == 16);
5835 assert_or_panic(v[155] == 17);
5836 assert_or_panic(v[156] == 18);
5837 assert_or_panic(v[157] == 19);
5838 assert_or_panic(v[158] == 20);
5839 assert_or_panic(v[159] == 21);
5840 assert_or_panic(v[160] == 22);
5841 assert_or_panic(v[161] == 23);
5842 assert_or_panic(v[162] == 24);
5843 assert_or_panic(v[163] == 25);
5844 assert_or_panic(v[164] == 26);
5845 assert_or_panic(v[165] == 27);
5846 assert_or_panic(v[166] == 28);
5847 assert_or_panic(v[167] == 29);
5848 assert_or_panic(v[168] == 30);
5849 assert_or_panic(v[169] == 31);
5850 assert_or_panic(v[170] == 32);
5851 assert_or_panic(v[171] == 33);
5852 assert_or_panic(v[172] == 34);
5853 assert_or_panic(v[173] == 35);
5854 assert_or_panic(v[174] == 36);
5855 assert_or_panic(v[175] == 37);
5856 assert_or_panic(v[176] == 38);
5857 assert_or_panic(v[177] == 39);
5858 assert_or_panic(v[178] == 40);
5859 assert_or_panic(v[179] == 41);
5860 assert_or_panic(v[180] == 42);
5861 assert_or_panic(v[181] == 43);
5862 assert_or_panic(v[182] == 44);
5863 assert_or_panic(v[183] == 45);
5864 assert_or_panic(v[184] == 46);
5865 assert_or_panic(v[185] == 47);
5866 assert_or_panic(v[186] == 48);
5867 assert_or_panic(v[187] == 49);
5868 assert_or_panic(v[188] == 50);
5869 assert_or_panic(v[189] == 51);
5870 assert_or_panic(v[190] == 52);
5871 assert_or_panic(v[191] == 53);
5872 assert_or_panic(i == 192);
5873}
5874void c_test_vector_192_u8(void) {
5875 Vector_192_u8 v = zig_ret_vector_192_u8();
5876 assert_or_panic(v[0] == 86);
5877 assert_or_panic(v[1] == 87);
5878 assert_or_panic(v[2] == 88);
5879 assert_or_panic(v[3] == 89);
5880 assert_or_panic(v[4] == 90);
5881 assert_or_panic(v[5] == 91);
5882 assert_or_panic(v[6] == 92);
5883 assert_or_panic(v[7] == 93);
5884 assert_or_panic(v[8] == 94);
5885 assert_or_panic(v[9] == 95);
5886 assert_or_panic(v[10] == 96);
5887 assert_or_panic(v[11] == 97);
5888 assert_or_panic(v[12] == 98);
5889 assert_or_panic(v[13] == 99);
5890 assert_or_panic(v[14] == 0);
5891 assert_or_panic(v[15] == 1);
5892 assert_or_panic(v[16] == 2);
5893 assert_or_panic(v[17] == 3);
5894 assert_or_panic(v[18] == 4);
5895 assert_or_panic(v[19] == 5);
5896 assert_or_panic(v[20] == 6);
5897 assert_or_panic(v[21] == 7);
5898 assert_or_panic(v[22] == 8);
5899 assert_or_panic(v[23] == 9);
5900 assert_or_panic(v[24] == 10);
5901 assert_or_panic(v[25] == 11);
5902 assert_or_panic(v[26] == 12);
5903 assert_or_panic(v[27] == 13);
5904 assert_or_panic(v[28] == 14);
5905 assert_or_panic(v[29] == 15);
5906 assert_or_panic(v[30] == 16);
5907 assert_or_panic(v[31] == 17);
5908 assert_or_panic(v[32] == 18);
5909 assert_or_panic(v[33] == 19);
5910 assert_or_panic(v[34] == 20);
5911 assert_or_panic(v[35] == 21);
5912 assert_or_panic(v[36] == 22);
5913 assert_or_panic(v[37] == 23);
5914 assert_or_panic(v[38] == 24);
5915 assert_or_panic(v[39] == 25);
5916 assert_or_panic(v[40] == 26);
5917 assert_or_panic(v[41] == 27);
5918 assert_or_panic(v[42] == 28);
5919 assert_or_panic(v[43] == 29);
5920 assert_or_panic(v[44] == 30);
5921 assert_or_panic(v[45] == 31);
5922 assert_or_panic(v[46] == 32);
5923 assert_or_panic(v[47] == 33);
5924 assert_or_panic(v[48] == 34);
5925 assert_or_panic(v[49] == 35);
5926 assert_or_panic(v[50] == 36);
5927 assert_or_panic(v[51] == 37);
5928 assert_or_panic(v[52] == 38);
5929 assert_or_panic(v[53] == 39);
5930 assert_or_panic(v[54] == 40);
5931 assert_or_panic(v[55] == 41);
5932 assert_or_panic(v[56] == 42);
5933 assert_or_panic(v[57] == 43);
5934 assert_or_panic(v[58] == 44);
5935 assert_or_panic(v[59] == 45);
5936 assert_or_panic(v[60] == 46);
5937 assert_or_panic(v[61] == 47);
5938 assert_or_panic(v[62] == 48);
5939 assert_or_panic(v[63] == 49);
5940 assert_or_panic(v[64] == 50);
5941 assert_or_panic(v[65] == 51);
5942 assert_or_panic(v[66] == 52);
5943 assert_or_panic(v[67] == 53);
5944 assert_or_panic(v[68] == 54);
5945 assert_or_panic(v[69] == 55);
5946 assert_or_panic(v[70] == 56);
5947 assert_or_panic(v[71] == 57);
5948 assert_or_panic(v[72] == 58);
5949 assert_or_panic(v[73] == 59);
5950 assert_or_panic(v[74] == 60);
5951 assert_or_panic(v[75] == 61);
5952 assert_or_panic(v[76] == 62);
5953 assert_or_panic(v[77] == 63);
5954 assert_or_panic(v[78] == 64);
5955 assert_or_panic(v[79] == 65);
5956 assert_or_panic(v[80] == 66);
5957 assert_or_panic(v[81] == 67);
5958 assert_or_panic(v[82] == 68);
5959 assert_or_panic(v[83] == 69);
5960 assert_or_panic(v[84] == 70);
5961 assert_or_panic(v[85] == 71);
5962 assert_or_panic(v[86] == 72);
5963 assert_or_panic(v[87] == 73);
5964 assert_or_panic(v[88] == 74);
5965 assert_or_panic(v[89] == 75);
5966 assert_or_panic(v[90] == 76);
5967 assert_or_panic(v[91] == 77);
5968 assert_or_panic(v[92] == 78);
5969 assert_or_panic(v[93] == 79);
5970 assert_or_panic(v[94] == 80);
5971 assert_or_panic(v[95] == 81);
5972 assert_or_panic(v[96] == 82);
5973 assert_or_panic(v[97] == 83);
5974 assert_or_panic(v[98] == 84);
5975 assert_or_panic(v[99] == 85);
5976 assert_or_panic(v[100] == 86);
5977 assert_or_panic(v[101] == 87);
5978 assert_or_panic(v[102] == 88);
5979 assert_or_panic(v[103] == 89);
5980 assert_or_panic(v[104] == 90);
5981 assert_or_panic(v[105] == 91);
5982 assert_or_panic(v[106] == 92);
5983 assert_or_panic(v[107] == 93);
5984 assert_or_panic(v[108] == 94);
5985 assert_or_panic(v[109] == 95);
5986 assert_or_panic(v[110] == 96);
5987 assert_or_panic(v[111] == 97);
5988 assert_or_panic(v[112] == 98);
5989 assert_or_panic(v[113] == 99);
5990 assert_or_panic(v[114] == 0);
5991 assert_or_panic(v[115] == 1);
5992 assert_or_panic(v[116] == 2);
5993 assert_or_panic(v[117] == 3);
5994 assert_or_panic(v[118] == 4);
5995 assert_or_panic(v[119] == 5);
5996 assert_or_panic(v[120] == 6);
5997 assert_or_panic(v[121] == 7);
5998 assert_or_panic(v[122] == 8);
5999 assert_or_panic(v[123] == 9);
6000 assert_or_panic(v[124] == 10);
6001 assert_or_panic(v[125] == 11);
6002 assert_or_panic(v[126] == 12);
6003 assert_or_panic(v[127] == 13);
6004 assert_or_panic(v[128] == 14);
6005 assert_or_panic(v[129] == 15);
6006 assert_or_panic(v[130] == 16);
6007 assert_or_panic(v[131] == 17);
6008 assert_or_panic(v[132] == 18);
6009 assert_or_panic(v[133] == 19);
6010 assert_or_panic(v[134] == 20);
6011 assert_or_panic(v[135] == 21);
6012 assert_or_panic(v[136] == 22);
6013 assert_or_panic(v[137] == 23);
6014 assert_or_panic(v[138] == 24);
6015 assert_or_panic(v[139] == 25);
6016 assert_or_panic(v[140] == 26);
6017 assert_or_panic(v[141] == 27);
6018 assert_or_panic(v[142] == 28);
6019 assert_or_panic(v[143] == 29);
6020 assert_or_panic(v[144] == 30);
6021 assert_or_panic(v[145] == 31);
6022 assert_or_panic(v[146] == 32);
6023 assert_or_panic(v[147] == 33);
6024 assert_or_panic(v[148] == 34);
6025 assert_or_panic(v[149] == 35);
6026 assert_or_panic(v[150] == 36);
6027 assert_or_panic(v[151] == 37);
6028 assert_or_panic(v[152] == 38);
6029 assert_or_panic(v[153] == 39);
6030 assert_or_panic(v[154] == 40);
6031 assert_or_panic(v[155] == 41);
6032 assert_or_panic(v[156] == 42);
6033 assert_or_panic(v[157] == 43);
6034 assert_or_panic(v[158] == 44);
6035 assert_or_panic(v[159] == 45);
6036 assert_or_panic(v[160] == 46);
6037 assert_or_panic(v[161] == 47);
6038 assert_or_panic(v[162] == 48);
6039 assert_or_panic(v[163] == 49);
6040 assert_or_panic(v[164] == 50);
6041 assert_or_panic(v[165] == 51);
6042 assert_or_panic(v[166] == 52);
6043 assert_or_panic(v[167] == 53);
6044 assert_or_panic(v[168] == 54);
6045 assert_or_panic(v[169] == 55);
6046 assert_or_panic(v[170] == 56);
6047 assert_or_panic(v[171] == 57);
6048 assert_or_panic(v[172] == 58);
6049 assert_or_panic(v[173] == 59);
6050 assert_or_panic(v[174] == 60);
6051 assert_or_panic(v[175] == 61);
6052 assert_or_panic(v[176] == 62);
6053 assert_or_panic(v[177] == 63);
6054 assert_or_panic(v[178] == 64);
6055 assert_or_panic(v[179] == 65);
6056 assert_or_panic(v[180] == 66);
6057 assert_or_panic(v[181] == 67);
6058 assert_or_panic(v[182] == 68);
6059 assert_or_panic(v[183] == 69);
6060 assert_or_panic(v[184] == 70);
6061 assert_or_panic(v[185] == 71);
6062 assert_or_panic(v[186] == 72);
6063 assert_or_panic(v[187] == 73);
6064 assert_or_panic(v[188] == 74);
6065 assert_or_panic(v[189] == 75);
6066 assert_or_panic(v[190] == 76);
6067 assert_or_panic(v[191] == 77);
6068 zig_vector_192_u8((Vector_192_u8){
6069 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6070 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6071 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6072 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6073 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6074 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6075 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6076 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6077 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6078 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6079 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6080 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6081 }, 192);
6082}
6083
6084typedef uint8_t Vector_256_u8 __attribute__((vector_size(256 * sizeof(uint8_t))));
6085
6086Vector_256_u8 zig_ret_vector_256_u8(void);
6087void zig_vector_256_u8(Vector_256_u8, size_t);
6088
6089Vector_256_u8 c_ret_vector_256_u8(void) {
6090 return (Vector_256_u8){
6091 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
6092 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
6093 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
6094 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
6095 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
6096 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
6097 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
6098 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6099 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6100 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6101 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6102 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6103 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6104 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6105 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6106 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6107 };
6108}
6109void c_vector_256_u8(Vector_256_u8 v, size_t i) {
6110 assert_or_panic(v[0] == 22);
6111 assert_or_panic(v[1] == 23);
6112 assert_or_panic(v[2] == 24);
6113 assert_or_panic(v[3] == 25);
6114 assert_or_panic(v[4] == 26);
6115 assert_or_panic(v[5] == 27);
6116 assert_or_panic(v[6] == 28);
6117 assert_or_panic(v[7] == 29);
6118 assert_or_panic(v[8] == 30);
6119 assert_or_panic(v[9] == 31);
6120 assert_or_panic(v[10] == 32);
6121 assert_or_panic(v[11] == 33);
6122 assert_or_panic(v[12] == 34);
6123 assert_or_panic(v[13] == 35);
6124 assert_or_panic(v[14] == 36);
6125 assert_or_panic(v[15] == 37);
6126 assert_or_panic(v[16] == 38);
6127 assert_or_panic(v[17] == 39);
6128 assert_or_panic(v[18] == 40);
6129 assert_or_panic(v[19] == 41);
6130 assert_or_panic(v[20] == 42);
6131 assert_or_panic(v[21] == 43);
6132 assert_or_panic(v[22] == 44);
6133 assert_or_panic(v[23] == 45);
6134 assert_or_panic(v[24] == 46);
6135 assert_or_panic(v[25] == 47);
6136 assert_or_panic(v[26] == 48);
6137 assert_or_panic(v[27] == 49);
6138 assert_or_panic(v[28] == 50);
6139 assert_or_panic(v[29] == 51);
6140 assert_or_panic(v[30] == 52);
6141 assert_or_panic(v[31] == 53);
6142 assert_or_panic(v[32] == 54);
6143 assert_or_panic(v[33] == 55);
6144 assert_or_panic(v[34] == 56);
6145 assert_or_panic(v[35] == 57);
6146 assert_or_panic(v[36] == 58);
6147 assert_or_panic(v[37] == 59);
6148 assert_or_panic(v[38] == 60);
6149 assert_or_panic(v[39] == 61);
6150 assert_or_panic(v[40] == 62);
6151 assert_or_panic(v[41] == 63);
6152 assert_or_panic(v[42] == 64);
6153 assert_or_panic(v[43] == 65);
6154 assert_or_panic(v[44] == 66);
6155 assert_or_panic(v[45] == 67);
6156 assert_or_panic(v[46] == 68);
6157 assert_or_panic(v[47] == 69);
6158 assert_or_panic(v[48] == 70);
6159 assert_or_panic(v[49] == 71);
6160 assert_or_panic(v[50] == 72);
6161 assert_or_panic(v[51] == 73);
6162 assert_or_panic(v[52] == 74);
6163 assert_or_panic(v[53] == 75);
6164 assert_or_panic(v[54] == 76);
6165 assert_or_panic(v[55] == 77);
6166 assert_or_panic(v[56] == 78);
6167 assert_or_panic(v[57] == 79);
6168 assert_or_panic(v[58] == 80);
6169 assert_or_panic(v[59] == 81);
6170 assert_or_panic(v[60] == 82);
6171 assert_or_panic(v[61] == 83);
6172 assert_or_panic(v[62] == 84);
6173 assert_or_panic(v[63] == 85);
6174 assert_or_panic(v[64] == 86);
6175 assert_or_panic(v[65] == 87);
6176 assert_or_panic(v[66] == 88);
6177 assert_or_panic(v[67] == 89);
6178 assert_or_panic(v[68] == 90);
6179 assert_or_panic(v[69] == 91);
6180 assert_or_panic(v[70] == 92);
6181 assert_or_panic(v[71] == 93);
6182 assert_or_panic(v[72] == 94);
6183 assert_or_panic(v[73] == 95);
6184 assert_or_panic(v[74] == 96);
6185 assert_or_panic(v[75] == 97);
6186 assert_or_panic(v[76] == 98);
6187 assert_or_panic(v[77] == 99);
6188 assert_or_panic(v[78] == 0);
6189 assert_or_panic(v[79] == 1);
6190 assert_or_panic(v[80] == 2);
6191 assert_or_panic(v[81] == 3);
6192 assert_or_panic(v[82] == 4);
6193 assert_or_panic(v[83] == 5);
6194 assert_or_panic(v[84] == 6);
6195 assert_or_panic(v[85] == 7);
6196 assert_or_panic(v[86] == 8);
6197 assert_or_panic(v[87] == 9);
6198 assert_or_panic(v[88] == 10);
6199 assert_or_panic(v[89] == 11);
6200 assert_or_panic(v[90] == 12);
6201 assert_or_panic(v[91] == 13);
6202 assert_or_panic(v[92] == 14);
6203 assert_or_panic(v[93] == 15);
6204 assert_or_panic(v[94] == 16);
6205 assert_or_panic(v[95] == 17);
6206 assert_or_panic(v[96] == 18);
6207 assert_or_panic(v[97] == 19);
6208 assert_or_panic(v[98] == 20);
6209 assert_or_panic(v[99] == 21);
6210 assert_or_panic(v[100] == 22);
6211 assert_or_panic(v[101] == 23);
6212 assert_or_panic(v[102] == 24);
6213 assert_or_panic(v[103] == 25);
6214 assert_or_panic(v[104] == 26);
6215 assert_or_panic(v[105] == 27);
6216 assert_or_panic(v[106] == 28);
6217 assert_or_panic(v[107] == 29);
6218 assert_or_panic(v[108] == 30);
6219 assert_or_panic(v[109] == 31);
6220 assert_or_panic(v[110] == 32);
6221 assert_or_panic(v[111] == 33);
6222 assert_or_panic(v[112] == 34);
6223 assert_or_panic(v[113] == 35);
6224 assert_or_panic(v[114] == 36);
6225 assert_or_panic(v[115] == 37);
6226 assert_or_panic(v[116] == 38);
6227 assert_or_panic(v[117] == 39);
6228 assert_or_panic(v[118] == 40);
6229 assert_or_panic(v[119] == 41);
6230 assert_or_panic(v[120] == 42);
6231 assert_or_panic(v[121] == 43);
6232 assert_or_panic(v[122] == 44);
6233 assert_or_panic(v[123] == 45);
6234 assert_or_panic(v[124] == 46);
6235 assert_or_panic(v[125] == 47);
6236 assert_or_panic(v[126] == 48);
6237 assert_or_panic(v[127] == 49);
6238 assert_or_panic(v[128] == 50);
6239 assert_or_panic(v[129] == 51);
6240 assert_or_panic(v[130] == 52);
6241 assert_or_panic(v[131] == 53);
6242 assert_or_panic(v[132] == 54);
6243 assert_or_panic(v[133] == 55);
6244 assert_or_panic(v[134] == 56);
6245 assert_or_panic(v[135] == 57);
6246 assert_or_panic(v[136] == 58);
6247 assert_or_panic(v[137] == 59);
6248 assert_or_panic(v[138] == 60);
6249 assert_or_panic(v[139] == 61);
6250 assert_or_panic(v[140] == 62);
6251 assert_or_panic(v[141] == 63);
6252 assert_or_panic(v[142] == 64);
6253 assert_or_panic(v[143] == 65);
6254 assert_or_panic(v[144] == 66);
6255 assert_or_panic(v[145] == 67);
6256 assert_or_panic(v[146] == 68);
6257 assert_or_panic(v[147] == 69);
6258 assert_or_panic(v[148] == 70);
6259 assert_or_panic(v[149] == 71);
6260 assert_or_panic(v[150] == 72);
6261 assert_or_panic(v[151] == 73);
6262 assert_or_panic(v[152] == 74);
6263 assert_or_panic(v[153] == 75);
6264 assert_or_panic(v[154] == 76);
6265 assert_or_panic(v[155] == 77);
6266 assert_or_panic(v[156] == 78);
6267 assert_or_panic(v[157] == 79);
6268 assert_or_panic(v[158] == 80);
6269 assert_or_panic(v[159] == 81);
6270 assert_or_panic(v[160] == 82);
6271 assert_or_panic(v[161] == 83);
6272 assert_or_panic(v[162] == 84);
6273 assert_or_panic(v[163] == 85);
6274 assert_or_panic(v[164] == 86);
6275 assert_or_panic(v[165] == 87);
6276 assert_or_panic(v[166] == 88);
6277 assert_or_panic(v[167] == 89);
6278 assert_or_panic(v[168] == 90);
6279 assert_or_panic(v[169] == 91);
6280 assert_or_panic(v[170] == 92);
6281 assert_or_panic(v[171] == 93);
6282 assert_or_panic(v[172] == 94);
6283 assert_or_panic(v[173] == 95);
6284 assert_or_panic(v[174] == 96);
6285 assert_or_panic(v[175] == 97);
6286 assert_or_panic(v[176] == 98);
6287 assert_or_panic(v[177] == 99);
6288 assert_or_panic(v[178] == 0);
6289 assert_or_panic(v[179] == 1);
6290 assert_or_panic(v[180] == 2);
6291 assert_or_panic(v[181] == 3);
6292 assert_or_panic(v[182] == 4);
6293 assert_or_panic(v[183] == 5);
6294 assert_or_panic(v[184] == 6);
6295 assert_or_panic(v[185] == 7);
6296 assert_or_panic(v[186] == 8);
6297 assert_or_panic(v[187] == 9);
6298 assert_or_panic(v[188] == 10);
6299 assert_or_panic(v[189] == 11);
6300 assert_or_panic(v[190] == 12);
6301 assert_or_panic(v[191] == 13);
6302 assert_or_panic(v[192] == 14);
6303 assert_or_panic(v[193] == 15);
6304 assert_or_panic(v[194] == 16);
6305 assert_or_panic(v[195] == 17);
6306 assert_or_panic(v[196] == 18);
6307 assert_or_panic(v[197] == 19);
6308 assert_or_panic(v[198] == 20);
6309 assert_or_panic(v[199] == 21);
6310 assert_or_panic(v[200] == 22);
6311 assert_or_panic(v[201] == 23);
6312 assert_or_panic(v[202] == 24);
6313 assert_or_panic(v[203] == 25);
6314 assert_or_panic(v[204] == 26);
6315 assert_or_panic(v[205] == 27);
6316 assert_or_panic(v[206] == 28);
6317 assert_or_panic(v[207] == 29);
6318 assert_or_panic(v[208] == 30);
6319 assert_or_panic(v[209] == 31);
6320 assert_or_panic(v[210] == 32);
6321 assert_or_panic(v[211] == 33);
6322 assert_or_panic(v[212] == 34);
6323 assert_or_panic(v[213] == 35);
6324 assert_or_panic(v[214] == 36);
6325 assert_or_panic(v[215] == 37);
6326 assert_or_panic(v[216] == 38);
6327 assert_or_panic(v[217] == 39);
6328 assert_or_panic(v[218] == 40);
6329 assert_or_panic(v[219] == 41);
6330 assert_or_panic(v[220] == 42);
6331 assert_or_panic(v[221] == 43);
6332 assert_or_panic(v[222] == 44);
6333 assert_or_panic(v[223] == 45);
6334 assert_or_panic(v[224] == 46);
6335 assert_or_panic(v[225] == 47);
6336 assert_or_panic(v[226] == 48);
6337 assert_or_panic(v[227] == 49);
6338 assert_or_panic(v[228] == 50);
6339 assert_or_panic(v[229] == 51);
6340 assert_or_panic(v[230] == 52);
6341 assert_or_panic(v[231] == 53);
6342 assert_or_panic(v[232] == 54);
6343 assert_or_panic(v[233] == 55);
6344 assert_or_panic(v[234] == 56);
6345 assert_or_panic(v[235] == 57);
6346 assert_or_panic(v[236] == 58);
6347 assert_or_panic(v[237] == 59);
6348 assert_or_panic(v[238] == 60);
6349 assert_or_panic(v[239] == 61);
6350 assert_or_panic(v[240] == 62);
6351 assert_or_panic(v[241] == 63);
6352 assert_or_panic(v[242] == 64);
6353 assert_or_panic(v[243] == 65);
6354 assert_or_panic(v[244] == 66);
6355 assert_or_panic(v[245] == 67);
6356 assert_or_panic(v[246] == 68);
6357 assert_or_panic(v[247] == 69);
6358 assert_or_panic(v[248] == 70);
6359 assert_or_panic(v[249] == 71);
6360 assert_or_panic(v[250] == 72);
6361 assert_or_panic(v[251] == 73);
6362 assert_or_panic(v[252] == 74);
6363 assert_or_panic(v[253] == 75);
6364 assert_or_panic(v[254] == 76);
6365 assert_or_panic(v[255] == 77);
6366 assert_or_panic(i == 256);
6367}
6368void c_test_vector_256_u8(void) {
6369 Vector_256_u8 v = zig_ret_vector_256_u8();
6370 assert_or_panic(v[0] == 54);
6371 assert_or_panic(v[1] == 55);
6372 assert_or_panic(v[2] == 56);
6373 assert_or_panic(v[3] == 57);
6374 assert_or_panic(v[4] == 58);
6375 assert_or_panic(v[5] == 59);
6376 assert_or_panic(v[6] == 60);
6377 assert_or_panic(v[7] == 61);
6378 assert_or_panic(v[8] == 62);
6379 assert_or_panic(v[9] == 63);
6380 assert_or_panic(v[10] == 64);
6381 assert_or_panic(v[11] == 65);
6382 assert_or_panic(v[12] == 66);
6383 assert_or_panic(v[13] == 67);
6384 assert_or_panic(v[14] == 68);
6385 assert_or_panic(v[15] == 69);
6386 assert_or_panic(v[16] == 70);
6387 assert_or_panic(v[17] == 71);
6388 assert_or_panic(v[18] == 72);
6389 assert_or_panic(v[19] == 73);
6390 assert_or_panic(v[20] == 74);
6391 assert_or_panic(v[21] == 75);
6392 assert_or_panic(v[22] == 76);
6393 assert_or_panic(v[23] == 77);
6394 assert_or_panic(v[24] == 78);
6395 assert_or_panic(v[25] == 79);
6396 assert_or_panic(v[26] == 80);
6397 assert_or_panic(v[27] == 81);
6398 assert_or_panic(v[28] == 82);
6399 assert_or_panic(v[29] == 83);
6400 assert_or_panic(v[30] == 84);
6401 assert_or_panic(v[31] == 85);
6402 assert_or_panic(v[32] == 86);
6403 assert_or_panic(v[33] == 87);
6404 assert_or_panic(v[34] == 88);
6405 assert_or_panic(v[35] == 89);
6406 assert_or_panic(v[36] == 90);
6407 assert_or_panic(v[37] == 91);
6408 assert_or_panic(v[38] == 92);
6409 assert_or_panic(v[39] == 93);
6410 assert_or_panic(v[40] == 94);
6411 assert_or_panic(v[41] == 95);
6412 assert_or_panic(v[42] == 96);
6413 assert_or_panic(v[43] == 97);
6414 assert_or_panic(v[44] == 98);
6415 assert_or_panic(v[45] == 99);
6416 assert_or_panic(v[46] == 0);
6417 assert_or_panic(v[47] == 1);
6418 assert_or_panic(v[48] == 2);
6419 assert_or_panic(v[49] == 3);
6420 assert_or_panic(v[50] == 4);
6421 assert_or_panic(v[51] == 5);
6422 assert_or_panic(v[52] == 6);
6423 assert_or_panic(v[53] == 7);
6424 assert_or_panic(v[54] == 8);
6425 assert_or_panic(v[55] == 9);
6426 assert_or_panic(v[56] == 10);
6427 assert_or_panic(v[57] == 11);
6428 assert_or_panic(v[58] == 12);
6429 assert_or_panic(v[59] == 13);
6430 assert_or_panic(v[60] == 14);
6431 assert_or_panic(v[61] == 15);
6432 assert_or_panic(v[62] == 16);
6433 assert_or_panic(v[63] == 17);
6434 assert_or_panic(v[64] == 18);
6435 assert_or_panic(v[65] == 19);
6436 assert_or_panic(v[66] == 20);
6437 assert_or_panic(v[67] == 21);
6438 assert_or_panic(v[68] == 22);
6439 assert_or_panic(v[69] == 23);
6440 assert_or_panic(v[70] == 24);
6441 assert_or_panic(v[71] == 25);
6442 assert_or_panic(v[72] == 26);
6443 assert_or_panic(v[73] == 27);
6444 assert_or_panic(v[74] == 28);
6445 assert_or_panic(v[75] == 29);
6446 assert_or_panic(v[76] == 30);
6447 assert_or_panic(v[77] == 31);
6448 assert_or_panic(v[78] == 32);
6449 assert_or_panic(v[79] == 33);
6450 assert_or_panic(v[80] == 34);
6451 assert_or_panic(v[81] == 35);
6452 assert_or_panic(v[82] == 36);
6453 assert_or_panic(v[83] == 37);
6454 assert_or_panic(v[84] == 38);
6455 assert_or_panic(v[85] == 39);
6456 assert_or_panic(v[86] == 40);
6457 assert_or_panic(v[87] == 41);
6458 assert_or_panic(v[88] == 42);
6459 assert_or_panic(v[89] == 43);
6460 assert_or_panic(v[90] == 44);
6461 assert_or_panic(v[91] == 45);
6462 assert_or_panic(v[92] == 46);
6463 assert_or_panic(v[93] == 47);
6464 assert_or_panic(v[94] == 48);
6465 assert_or_panic(v[95] == 49);
6466 assert_or_panic(v[96] == 50);
6467 assert_or_panic(v[97] == 51);
6468 assert_or_panic(v[98] == 52);
6469 assert_or_panic(v[99] == 53);
6470 assert_or_panic(v[100] == 54);
6471 assert_or_panic(v[101] == 55);
6472 assert_or_panic(v[102] == 56);
6473 assert_or_panic(v[103] == 57);
6474 assert_or_panic(v[104] == 58);
6475 assert_or_panic(v[105] == 59);
6476 assert_or_panic(v[106] == 60);
6477 assert_or_panic(v[107] == 61);
6478 assert_or_panic(v[108] == 62);
6479 assert_or_panic(v[109] == 63);
6480 assert_or_panic(v[110] == 64);
6481 assert_or_panic(v[111] == 65);
6482 assert_or_panic(v[112] == 66);
6483 assert_or_panic(v[113] == 67);
6484 assert_or_panic(v[114] == 68);
6485 assert_or_panic(v[115] == 69);
6486 assert_or_panic(v[116] == 70);
6487 assert_or_panic(v[117] == 71);
6488 assert_or_panic(v[118] == 72);
6489 assert_or_panic(v[119] == 73);
6490 assert_or_panic(v[120] == 74);
6491 assert_or_panic(v[121] == 75);
6492 assert_or_panic(v[122] == 76);
6493 assert_or_panic(v[123] == 77);
6494 assert_or_panic(v[124] == 78);
6495 assert_or_panic(v[125] == 79);
6496 assert_or_panic(v[126] == 80);
6497 assert_or_panic(v[127] == 81);
6498 assert_or_panic(v[128] == 82);
6499 assert_or_panic(v[129] == 83);
6500 assert_or_panic(v[130] == 84);
6501 assert_or_panic(v[131] == 85);
6502 assert_or_panic(v[132] == 86);
6503 assert_or_panic(v[133] == 87);
6504 assert_or_panic(v[134] == 88);
6505 assert_or_panic(v[135] == 89);
6506 assert_or_panic(v[136] == 90);
6507 assert_or_panic(v[137] == 91);
6508 assert_or_panic(v[138] == 92);
6509 assert_or_panic(v[139] == 93);
6510 assert_or_panic(v[140] == 94);
6511 assert_or_panic(v[141] == 95);
6512 assert_or_panic(v[142] == 96);
6513 assert_or_panic(v[143] == 97);
6514 assert_or_panic(v[144] == 98);
6515 assert_or_panic(v[145] == 99);
6516 assert_or_panic(v[146] == 0);
6517 assert_or_panic(v[147] == 1);
6518 assert_or_panic(v[148] == 2);
6519 assert_or_panic(v[149] == 3);
6520 assert_or_panic(v[150] == 4);
6521 assert_or_panic(v[151] == 5);
6522 assert_or_panic(v[152] == 6);
6523 assert_or_panic(v[153] == 7);
6524 assert_or_panic(v[154] == 8);
6525 assert_or_panic(v[155] == 9);
6526 assert_or_panic(v[156] == 10);
6527 assert_or_panic(v[157] == 11);
6528 assert_or_panic(v[158] == 12);
6529 assert_or_panic(v[159] == 13);
6530 assert_or_panic(v[160] == 14);
6531 assert_or_panic(v[161] == 15);
6532 assert_or_panic(v[162] == 16);
6533 assert_or_panic(v[163] == 17);
6534 assert_or_panic(v[164] == 18);
6535 assert_or_panic(v[165] == 19);
6536 assert_or_panic(v[166] == 20);
6537 assert_or_panic(v[167] == 21);
6538 assert_or_panic(v[168] == 22);
6539 assert_or_panic(v[169] == 23);
6540 assert_or_panic(v[170] == 24);
6541 assert_or_panic(v[171] == 25);
6542 assert_or_panic(v[172] == 26);
6543 assert_or_panic(v[173] == 27);
6544 assert_or_panic(v[174] == 28);
6545 assert_or_panic(v[175] == 29);
6546 assert_or_panic(v[176] == 30);
6547 assert_or_panic(v[177] == 31);
6548 assert_or_panic(v[178] == 32);
6549 assert_or_panic(v[179] == 33);
6550 assert_or_panic(v[180] == 34);
6551 assert_or_panic(v[181] == 35);
6552 assert_or_panic(v[182] == 36);
6553 assert_or_panic(v[183] == 37);
6554 assert_or_panic(v[184] == 38);
6555 assert_or_panic(v[185] == 39);
6556 assert_or_panic(v[186] == 40);
6557 assert_or_panic(v[187] == 41);
6558 assert_or_panic(v[188] == 42);
6559 assert_or_panic(v[189] == 43);
6560 assert_or_panic(v[190] == 44);
6561 assert_or_panic(v[191] == 45);
6562 assert_or_panic(v[192] == 46);
6563 assert_or_panic(v[193] == 47);
6564 assert_or_panic(v[194] == 48);
6565 assert_or_panic(v[195] == 49);
6566 assert_or_panic(v[196] == 50);
6567 assert_or_panic(v[197] == 51);
6568 assert_or_panic(v[198] == 52);
6569 assert_or_panic(v[199] == 53);
6570 assert_or_panic(v[200] == 54);
6571 assert_or_panic(v[201] == 55);
6572 assert_or_panic(v[202] == 56);
6573 assert_or_panic(v[203] == 57);
6574 assert_or_panic(v[204] == 58);
6575 assert_or_panic(v[205] == 59);
6576 assert_or_panic(v[206] == 60);
6577 assert_or_panic(v[207] == 61);
6578 assert_or_panic(v[208] == 62);
6579 assert_or_panic(v[209] == 63);
6580 assert_or_panic(v[210] == 64);
6581 assert_or_panic(v[211] == 65);
6582 assert_or_panic(v[212] == 66);
6583 assert_or_panic(v[213] == 67);
6584 assert_or_panic(v[214] == 68);
6585 assert_or_panic(v[215] == 69);
6586 assert_or_panic(v[216] == 70);
6587 assert_or_panic(v[217] == 71);
6588 assert_or_panic(v[218] == 72);
6589 assert_or_panic(v[219] == 73);
6590 assert_or_panic(v[220] == 74);
6591 assert_or_panic(v[221] == 75);
6592 assert_or_panic(v[222] == 76);
6593 assert_or_panic(v[223] == 77);
6594 assert_or_panic(v[224] == 78);
6595 assert_or_panic(v[225] == 79);
6596 assert_or_panic(v[226] == 80);
6597 assert_or_panic(v[227] == 81);
6598 assert_or_panic(v[228] == 82);
6599 assert_or_panic(v[229] == 83);
6600 assert_or_panic(v[230] == 84);
6601 assert_or_panic(v[231] == 85);
6602 assert_or_panic(v[232] == 86);
6603 assert_or_panic(v[233] == 87);
6604 assert_or_panic(v[234] == 88);
6605 assert_or_panic(v[235] == 89);
6606 assert_or_panic(v[236] == 90);
6607 assert_or_panic(v[237] == 91);
6608 assert_or_panic(v[238] == 92);
6609 assert_or_panic(v[239] == 93);
6610 assert_or_panic(v[240] == 94);
6611 assert_or_panic(v[241] == 95);
6612 assert_or_panic(v[242] == 96);
6613 assert_or_panic(v[243] == 97);
6614 assert_or_panic(v[244] == 98);
6615 assert_or_panic(v[245] == 99);
6616 assert_or_panic(v[246] == 0);
6617 assert_or_panic(v[247] == 1);
6618 assert_or_panic(v[248] == 2);
6619 assert_or_panic(v[249] == 3);
6620 assert_or_panic(v[250] == 4);
6621 assert_or_panic(v[251] == 5);
6622 assert_or_panic(v[252] == 6);
6623 assert_or_panic(v[253] == 7);
6624 assert_or_panic(v[254] == 8);
6625 assert_or_panic(v[255] == 9);
6626 zig_vector_256_u8((Vector_256_u8){
6627 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6628 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6629 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6630 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6631 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6632 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6633 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6634 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6635 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6636 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6637 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
6638 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
6639 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
6640 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
6641 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
6642 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
6643 }, 256);
6644}
6645
6646typedef uint8_t Vector_384_u8 __attribute__((vector_size(384 * sizeof(uint8_t))));
6647
6648Vector_384_u8 zig_ret_vector_384_u8(void);
6649void zig_vector_384_u8(Vector_384_u8, size_t);
6650
6651Vector_384_u8 c_ret_vector_384_u8(void) {
6652 return (Vector_384_u8){
6653 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
6654 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
6655 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6656 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6657 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6658 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6659 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6660 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6661 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6662 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6663 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6664 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6665 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6666 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6667 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
6668 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
6669 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
6670 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
6671 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
6672 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
6673 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
6674 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
6675 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
6676 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
6677 };
6678}
6679void c_vector_384_u8(Vector_384_u8 v, size_t i) {
6680 assert_or_panic(v[0] == 30);
6681 assert_or_panic(v[1] == 31);
6682 assert_or_panic(v[2] == 32);
6683 assert_or_panic(v[3] == 33);
6684 assert_or_panic(v[4] == 34);
6685 assert_or_panic(v[5] == 35);
6686 assert_or_panic(v[6] == 36);
6687 assert_or_panic(v[7] == 37);
6688 assert_or_panic(v[8] == 38);
6689 assert_or_panic(v[9] == 39);
6690 assert_or_panic(v[10] == 40);
6691 assert_or_panic(v[11] == 41);
6692 assert_or_panic(v[12] == 42);
6693 assert_or_panic(v[13] == 43);
6694 assert_or_panic(v[14] == 44);
6695 assert_or_panic(v[15] == 45);
6696 assert_or_panic(v[16] == 46);
6697 assert_or_panic(v[17] == 47);
6698 assert_or_panic(v[18] == 48);
6699 assert_or_panic(v[19] == 49);
6700 assert_or_panic(v[20] == 50);
6701 assert_or_panic(v[21] == 51);
6702 assert_or_panic(v[22] == 52);
6703 assert_or_panic(v[23] == 53);
6704 assert_or_panic(v[24] == 54);
6705 assert_or_panic(v[25] == 55);
6706 assert_or_panic(v[26] == 56);
6707 assert_or_panic(v[27] == 57);
6708 assert_or_panic(v[28] == 58);
6709 assert_or_panic(v[29] == 59);
6710 assert_or_panic(v[30] == 60);
6711 assert_or_panic(v[31] == 61);
6712 assert_or_panic(v[32] == 62);
6713 assert_or_panic(v[33] == 63);
6714 assert_or_panic(v[34] == 64);
6715 assert_or_panic(v[35] == 65);
6716 assert_or_panic(v[36] == 66);
6717 assert_or_panic(v[37] == 67);
6718 assert_or_panic(v[38] == 68);
6719 assert_or_panic(v[39] == 69);
6720 assert_or_panic(v[40] == 70);
6721 assert_or_panic(v[41] == 71);
6722 assert_or_panic(v[42] == 72);
6723 assert_or_panic(v[43] == 73);
6724 assert_or_panic(v[44] == 74);
6725 assert_or_panic(v[45] == 75);
6726 assert_or_panic(v[46] == 76);
6727 assert_or_panic(v[47] == 77);
6728 assert_or_panic(v[48] == 78);
6729 assert_or_panic(v[49] == 79);
6730 assert_or_panic(v[50] == 80);
6731 assert_or_panic(v[51] == 81);
6732 assert_or_panic(v[52] == 82);
6733 assert_or_panic(v[53] == 83);
6734 assert_or_panic(v[54] == 84);
6735 assert_or_panic(v[55] == 85);
6736 assert_or_panic(v[56] == 86);
6737 assert_or_panic(v[57] == 87);
6738 assert_or_panic(v[58] == 88);
6739 assert_or_panic(v[59] == 89);
6740 assert_or_panic(v[60] == 90);
6741 assert_or_panic(v[61] == 91);
6742 assert_or_panic(v[62] == 92);
6743 assert_or_panic(v[63] == 93);
6744 assert_or_panic(v[64] == 94);
6745 assert_or_panic(v[65] == 95);
6746 assert_or_panic(v[66] == 96);
6747 assert_or_panic(v[67] == 97);
6748 assert_or_panic(v[68] == 98);
6749 assert_or_panic(v[69] == 99);
6750 assert_or_panic(v[70] == 0);
6751 assert_or_panic(v[71] == 1);
6752 assert_or_panic(v[72] == 2);
6753 assert_or_panic(v[73] == 3);
6754 assert_or_panic(v[74] == 4);
6755 assert_or_panic(v[75] == 5);
6756 assert_or_panic(v[76] == 6);
6757 assert_or_panic(v[77] == 7);
6758 assert_or_panic(v[78] == 8);
6759 assert_or_panic(v[79] == 9);
6760 assert_or_panic(v[80] == 10);
6761 assert_or_panic(v[81] == 11);
6762 assert_or_panic(v[82] == 12);
6763 assert_or_panic(v[83] == 13);
6764 assert_or_panic(v[84] == 14);
6765 assert_or_panic(v[85] == 15);
6766 assert_or_panic(v[86] == 16);
6767 assert_or_panic(v[87] == 17);
6768 assert_or_panic(v[88] == 18);
6769 assert_or_panic(v[89] == 19);
6770 assert_or_panic(v[90] == 20);
6771 assert_or_panic(v[91] == 21);
6772 assert_or_panic(v[92] == 22);
6773 assert_or_panic(v[93] == 23);
6774 assert_or_panic(v[94] == 24);
6775 assert_or_panic(v[95] == 25);
6776 assert_or_panic(v[96] == 26);
6777 assert_or_panic(v[97] == 27);
6778 assert_or_panic(v[98] == 28);
6779 assert_or_panic(v[99] == 29);
6780 assert_or_panic(v[100] == 30);
6781 assert_or_panic(v[101] == 31);
6782 assert_or_panic(v[102] == 32);
6783 assert_or_panic(v[103] == 33);
6784 assert_or_panic(v[104] == 34);
6785 assert_or_panic(v[105] == 35);
6786 assert_or_panic(v[106] == 36);
6787 assert_or_panic(v[107] == 37);
6788 assert_or_panic(v[108] == 38);
6789 assert_or_panic(v[109] == 39);
6790 assert_or_panic(v[110] == 40);
6791 assert_or_panic(v[111] == 41);
6792 assert_or_panic(v[112] == 42);
6793 assert_or_panic(v[113] == 43);
6794 assert_or_panic(v[114] == 44);
6795 assert_or_panic(v[115] == 45);
6796 assert_or_panic(v[116] == 46);
6797 assert_or_panic(v[117] == 47);
6798 assert_or_panic(v[118] == 48);
6799 assert_or_panic(v[119] == 49);
6800 assert_or_panic(v[120] == 50);
6801 assert_or_panic(v[121] == 51);
6802 assert_or_panic(v[122] == 52);
6803 assert_or_panic(v[123] == 53);
6804 assert_or_panic(v[124] == 54);
6805 assert_or_panic(v[125] == 55);
6806 assert_or_panic(v[126] == 56);
6807 assert_or_panic(v[127] == 57);
6808 assert_or_panic(v[128] == 58);
6809 assert_or_panic(v[129] == 59);
6810 assert_or_panic(v[130] == 60);
6811 assert_or_panic(v[131] == 61);
6812 assert_or_panic(v[132] == 62);
6813 assert_or_panic(v[133] == 63);
6814 assert_or_panic(v[134] == 64);
6815 assert_or_panic(v[135] == 65);
6816 assert_or_panic(v[136] == 66);
6817 assert_or_panic(v[137] == 67);
6818 assert_or_panic(v[138] == 68);
6819 assert_or_panic(v[139] == 69);
6820 assert_or_panic(v[140] == 70);
6821 assert_or_panic(v[141] == 71);
6822 assert_or_panic(v[142] == 72);
6823 assert_or_panic(v[143] == 73);
6824 assert_or_panic(v[144] == 74);
6825 assert_or_panic(v[145] == 75);
6826 assert_or_panic(v[146] == 76);
6827 assert_or_panic(v[147] == 77);
6828 assert_or_panic(v[148] == 78);
6829 assert_or_panic(v[149] == 79);
6830 assert_or_panic(v[150] == 80);
6831 assert_or_panic(v[151] == 81);
6832 assert_or_panic(v[152] == 82);
6833 assert_or_panic(v[153] == 83);
6834 assert_or_panic(v[154] == 84);
6835 assert_or_panic(v[155] == 85);
6836 assert_or_panic(v[156] == 86);
6837 assert_or_panic(v[157] == 87);
6838 assert_or_panic(v[158] == 88);
6839 assert_or_panic(v[159] == 89);
6840 assert_or_panic(v[160] == 90);
6841 assert_or_panic(v[161] == 91);
6842 assert_or_panic(v[162] == 92);
6843 assert_or_panic(v[163] == 93);
6844 assert_or_panic(v[164] == 94);
6845 assert_or_panic(v[165] == 95);
6846 assert_or_panic(v[166] == 96);
6847 assert_or_panic(v[167] == 97);
6848 assert_or_panic(v[168] == 98);
6849 assert_or_panic(v[169] == 99);
6850 assert_or_panic(v[170] == 0);
6851 assert_or_panic(v[171] == 1);
6852 assert_or_panic(v[172] == 2);
6853 assert_or_panic(v[173] == 3);
6854 assert_or_panic(v[174] == 4);
6855 assert_or_panic(v[175] == 5);
6856 assert_or_panic(v[176] == 6);
6857 assert_or_panic(v[177] == 7);
6858 assert_or_panic(v[178] == 8);
6859 assert_or_panic(v[179] == 9);
6860 assert_or_panic(v[180] == 10);
6861 assert_or_panic(v[181] == 11);
6862 assert_or_panic(v[182] == 12);
6863 assert_or_panic(v[183] == 13);
6864 assert_or_panic(v[184] == 14);
6865 assert_or_panic(v[185] == 15);
6866 assert_or_panic(v[186] == 16);
6867 assert_or_panic(v[187] == 17);
6868 assert_or_panic(v[188] == 18);
6869 assert_or_panic(v[189] == 19);
6870 assert_or_panic(v[190] == 20);
6871 assert_or_panic(v[191] == 21);
6872 assert_or_panic(v[192] == 22);
6873 assert_or_panic(v[193] == 23);
6874 assert_or_panic(v[194] == 24);
6875 assert_or_panic(v[195] == 25);
6876 assert_or_panic(v[196] == 26);
6877 assert_or_panic(v[197] == 27);
6878 assert_or_panic(v[198] == 28);
6879 assert_or_panic(v[199] == 29);
6880 assert_or_panic(v[200] == 30);
6881 assert_or_panic(v[201] == 31);
6882 assert_or_panic(v[202] == 32);
6883 assert_or_panic(v[203] == 33);
6884 assert_or_panic(v[204] == 34);
6885 assert_or_panic(v[205] == 35);
6886 assert_or_panic(v[206] == 36);
6887 assert_or_panic(v[207] == 37);
6888 assert_or_panic(v[208] == 38);
6889 assert_or_panic(v[209] == 39);
6890 assert_or_panic(v[210] == 40);
6891 assert_or_panic(v[211] == 41);
6892 assert_or_panic(v[212] == 42);
6893 assert_or_panic(v[213] == 43);
6894 assert_or_panic(v[214] == 44);
6895 assert_or_panic(v[215] == 45);
6896 assert_or_panic(v[216] == 46);
6897 assert_or_panic(v[217] == 47);
6898 assert_or_panic(v[218] == 48);
6899 assert_or_panic(v[219] == 49);
6900 assert_or_panic(v[220] == 50);
6901 assert_or_panic(v[221] == 51);
6902 assert_or_panic(v[222] == 52);
6903 assert_or_panic(v[223] == 53);
6904 assert_or_panic(v[224] == 54);
6905 assert_or_panic(v[225] == 55);
6906 assert_or_panic(v[226] == 56);
6907 assert_or_panic(v[227] == 57);
6908 assert_or_panic(v[228] == 58);
6909 assert_or_panic(v[229] == 59);
6910 assert_or_panic(v[230] == 60);
6911 assert_or_panic(v[231] == 61);
6912 assert_or_panic(v[232] == 62);
6913 assert_or_panic(v[233] == 63);
6914 assert_or_panic(v[234] == 64);
6915 assert_or_panic(v[235] == 65);
6916 assert_or_panic(v[236] == 66);
6917 assert_or_panic(v[237] == 67);
6918 assert_or_panic(v[238] == 68);
6919 assert_or_panic(v[239] == 69);
6920 assert_or_panic(v[240] == 70);
6921 assert_or_panic(v[241] == 71);
6922 assert_or_panic(v[242] == 72);
6923 assert_or_panic(v[243] == 73);
6924 assert_or_panic(v[244] == 74);
6925 assert_or_panic(v[245] == 75);
6926 assert_or_panic(v[246] == 76);
6927 assert_or_panic(v[247] == 77);
6928 assert_or_panic(v[248] == 78);
6929 assert_or_panic(v[249] == 79);
6930 assert_or_panic(v[250] == 80);
6931 assert_or_panic(v[251] == 81);
6932 assert_or_panic(v[252] == 82);
6933 assert_or_panic(v[253] == 83);
6934 assert_or_panic(v[254] == 84);
6935 assert_or_panic(v[255] == 85);
6936 assert_or_panic(v[256] == 86);
6937 assert_or_panic(v[257] == 87);
6938 assert_or_panic(v[258] == 88);
6939 assert_or_panic(v[259] == 89);
6940 assert_or_panic(v[260] == 90);
6941 assert_or_panic(v[261] == 91);
6942 assert_or_panic(v[262] == 92);
6943 assert_or_panic(v[263] == 93);
6944 assert_or_panic(v[264] == 94);
6945 assert_or_panic(v[265] == 95);
6946 assert_or_panic(v[266] == 96);
6947 assert_or_panic(v[267] == 97);
6948 assert_or_panic(v[268] == 98);
6949 assert_or_panic(v[269] == 99);
6950 assert_or_panic(v[270] == 0);
6951 assert_or_panic(v[271] == 1);
6952 assert_or_panic(v[272] == 2);
6953 assert_or_panic(v[273] == 3);
6954 assert_or_panic(v[274] == 4);
6955 assert_or_panic(v[275] == 5);
6956 assert_or_panic(v[276] == 6);
6957 assert_or_panic(v[277] == 7);
6958 assert_or_panic(v[278] == 8);
6959 assert_or_panic(v[279] == 9);
6960 assert_or_panic(v[280] == 10);
6961 assert_or_panic(v[281] == 11);
6962 assert_or_panic(v[282] == 12);
6963 assert_or_panic(v[283] == 13);
6964 assert_or_panic(v[284] == 14);
6965 assert_or_panic(v[285] == 15);
6966 assert_or_panic(v[286] == 16);
6967 assert_or_panic(v[287] == 17);
6968 assert_or_panic(v[288] == 18);
6969 assert_or_panic(v[289] == 19);
6970 assert_or_panic(v[290] == 20);
6971 assert_or_panic(v[291] == 21);
6972 assert_or_panic(v[292] == 22);
6973 assert_or_panic(v[293] == 23);
6974 assert_or_panic(v[294] == 24);
6975 assert_or_panic(v[295] == 25);
6976 assert_or_panic(v[296] == 26);
6977 assert_or_panic(v[297] == 27);
6978 assert_or_panic(v[298] == 28);
6979 assert_or_panic(v[299] == 29);
6980 assert_or_panic(v[300] == 30);
6981 assert_or_panic(v[301] == 31);
6982 assert_or_panic(v[302] == 32);
6983 assert_or_panic(v[303] == 33);
6984 assert_or_panic(v[304] == 34);
6985 assert_or_panic(v[305] == 35);
6986 assert_or_panic(v[306] == 36);
6987 assert_or_panic(v[307] == 37);
6988 assert_or_panic(v[308] == 38);
6989 assert_or_panic(v[309] == 39);
6990 assert_or_panic(v[310] == 40);
6991 assert_or_panic(v[311] == 41);
6992 assert_or_panic(v[312] == 42);
6993 assert_or_panic(v[313] == 43);
6994 assert_or_panic(v[314] == 44);
6995 assert_or_panic(v[315] == 45);
6996 assert_or_panic(v[316] == 46);
6997 assert_or_panic(v[317] == 47);
6998 assert_or_panic(v[318] == 48);
6999 assert_or_panic(v[319] == 49);
7000 assert_or_panic(v[320] == 50);
7001 assert_or_panic(v[321] == 51);
7002 assert_or_panic(v[322] == 52);
7003 assert_or_panic(v[323] == 53);
7004 assert_or_panic(v[324] == 54);
7005 assert_or_panic(v[325] == 55);
7006 assert_or_panic(v[326] == 56);
7007 assert_or_panic(v[327] == 57);
7008 assert_or_panic(v[328] == 58);
7009 assert_or_panic(v[329] == 59);
7010 assert_or_panic(v[330] == 60);
7011 assert_or_panic(v[331] == 61);
7012 assert_or_panic(v[332] == 62);
7013 assert_or_panic(v[333] == 63);
7014 assert_or_panic(v[334] == 64);
7015 assert_or_panic(v[335] == 65);
7016 assert_or_panic(v[336] == 66);
7017 assert_or_panic(v[337] == 67);
7018 assert_or_panic(v[338] == 68);
7019 assert_or_panic(v[339] == 69);
7020 assert_or_panic(v[340] == 70);
7021 assert_or_panic(v[341] == 71);
7022 assert_or_panic(v[342] == 72);
7023 assert_or_panic(v[343] == 73);
7024 assert_or_panic(v[344] == 74);
7025 assert_or_panic(v[345] == 75);
7026 assert_or_panic(v[346] == 76);
7027 assert_or_panic(v[347] == 77);
7028 assert_or_panic(v[348] == 78);
7029 assert_or_panic(v[349] == 79);
7030 assert_or_panic(v[350] == 80);
7031 assert_or_panic(v[351] == 81);
7032 assert_or_panic(v[352] == 82);
7033 assert_or_panic(v[353] == 83);
7034 assert_or_panic(v[354] == 84);
7035 assert_or_panic(v[355] == 85);
7036 assert_or_panic(v[356] == 86);
7037 assert_or_panic(v[357] == 87);
7038 assert_or_panic(v[358] == 88);
7039 assert_or_panic(v[359] == 89);
7040 assert_or_panic(v[360] == 90);
7041 assert_or_panic(v[361] == 91);
7042 assert_or_panic(v[362] == 92);
7043 assert_or_panic(v[363] == 93);
7044 assert_or_panic(v[364] == 94);
7045 assert_or_panic(v[365] == 95);
7046 assert_or_panic(v[366] == 96);
7047 assert_or_panic(v[367] == 97);
7048 assert_or_panic(v[368] == 98);
7049 assert_or_panic(v[369] == 99);
7050 assert_or_panic(v[370] == 0);
7051 assert_or_panic(v[371] == 1);
7052 assert_or_panic(v[372] == 2);
7053 assert_or_panic(v[373] == 3);
7054 assert_or_panic(v[374] == 4);
7055 assert_or_panic(v[375] == 5);
7056 assert_or_panic(v[376] == 6);
7057 assert_or_panic(v[377] == 7);
7058 assert_or_panic(v[378] == 8);
7059 assert_or_panic(v[379] == 9);
7060 assert_or_panic(v[380] == 10);
7061 assert_or_panic(v[381] == 11);
7062 assert_or_panic(v[382] == 12);
7063 assert_or_panic(v[383] == 13);
7064 assert_or_panic(i == 384);
7065}
7066void c_test_vector_384_u8(void) {
7067 Vector_384_u8 v = zig_ret_vector_384_u8();
7068 assert_or_panic(v[0] == 78);
7069 assert_or_panic(v[1] == 79);
7070 assert_or_panic(v[2] == 80);
7071 assert_or_panic(v[3] == 81);
7072 assert_or_panic(v[4] == 82);
7073 assert_or_panic(v[5] == 83);
7074 assert_or_panic(v[6] == 84);
7075 assert_or_panic(v[7] == 85);
7076 assert_or_panic(v[8] == 86);
7077 assert_or_panic(v[9] == 87);
7078 assert_or_panic(v[10] == 88);
7079 assert_or_panic(v[11] == 89);
7080 assert_or_panic(v[12] == 90);
7081 assert_or_panic(v[13] == 91);
7082 assert_or_panic(v[14] == 92);
7083 assert_or_panic(v[15] == 93);
7084 assert_or_panic(v[16] == 94);
7085 assert_or_panic(v[17] == 95);
7086 assert_or_panic(v[18] == 96);
7087 assert_or_panic(v[19] == 97);
7088 assert_or_panic(v[20] == 98);
7089 assert_or_panic(v[21] == 99);
7090 assert_or_panic(v[22] == 0);
7091 assert_or_panic(v[23] == 1);
7092 assert_or_panic(v[24] == 2);
7093 assert_or_panic(v[25] == 3);
7094 assert_or_panic(v[26] == 4);
7095 assert_or_panic(v[27] == 5);
7096 assert_or_panic(v[28] == 6);
7097 assert_or_panic(v[29] == 7);
7098 assert_or_panic(v[30] == 8);
7099 assert_or_panic(v[31] == 9);
7100 assert_or_panic(v[32] == 10);
7101 assert_or_panic(v[33] == 11);
7102 assert_or_panic(v[34] == 12);
7103 assert_or_panic(v[35] == 13);
7104 assert_or_panic(v[36] == 14);
7105 assert_or_panic(v[37] == 15);
7106 assert_or_panic(v[38] == 16);
7107 assert_or_panic(v[39] == 17);
7108 assert_or_panic(v[40] == 18);
7109 assert_or_panic(v[41] == 19);
7110 assert_or_panic(v[42] == 20);
7111 assert_or_panic(v[43] == 21);
7112 assert_or_panic(v[44] == 22);
7113 assert_or_panic(v[45] == 23);
7114 assert_or_panic(v[46] == 24);
7115 assert_or_panic(v[47] == 25);
7116 assert_or_panic(v[48] == 26);
7117 assert_or_panic(v[49] == 27);
7118 assert_or_panic(v[50] == 28);
7119 assert_or_panic(v[51] == 29);
7120 assert_or_panic(v[52] == 30);
7121 assert_or_panic(v[53] == 31);
7122 assert_or_panic(v[54] == 32);
7123 assert_or_panic(v[55] == 33);
7124 assert_or_panic(v[56] == 34);
7125 assert_or_panic(v[57] == 35);
7126 assert_or_panic(v[58] == 36);
7127 assert_or_panic(v[59] == 37);
7128 assert_or_panic(v[60] == 38);
7129 assert_or_panic(v[61] == 39);
7130 assert_or_panic(v[62] == 40);
7131 assert_or_panic(v[63] == 41);
7132 assert_or_panic(v[64] == 42);
7133 assert_or_panic(v[65] == 43);
7134 assert_or_panic(v[66] == 44);
7135 assert_or_panic(v[67] == 45);
7136 assert_or_panic(v[68] == 46);
7137 assert_or_panic(v[69] == 47);
7138 assert_or_panic(v[70] == 48);
7139 assert_or_panic(v[71] == 49);
7140 assert_or_panic(v[72] == 50);
7141 assert_or_panic(v[73] == 51);
7142 assert_or_panic(v[74] == 52);
7143 assert_or_panic(v[75] == 53);
7144 assert_or_panic(v[76] == 54);
7145 assert_or_panic(v[77] == 55);
7146 assert_or_panic(v[78] == 56);
7147 assert_or_panic(v[79] == 57);
7148 assert_or_panic(v[80] == 58);
7149 assert_or_panic(v[81] == 59);
7150 assert_or_panic(v[82] == 60);
7151 assert_or_panic(v[83] == 61);
7152 assert_or_panic(v[84] == 62);
7153 assert_or_panic(v[85] == 63);
7154 assert_or_panic(v[86] == 64);
7155 assert_or_panic(v[87] == 65);
7156 assert_or_panic(v[88] == 66);
7157 assert_or_panic(v[89] == 67);
7158 assert_or_panic(v[90] == 68);
7159 assert_or_panic(v[91] == 69);
7160 assert_or_panic(v[92] == 70);
7161 assert_or_panic(v[93] == 71);
7162 assert_or_panic(v[94] == 72);
7163 assert_or_panic(v[95] == 73);
7164 assert_or_panic(v[96] == 74);
7165 assert_or_panic(v[97] == 75);
7166 assert_or_panic(v[98] == 76);
7167 assert_or_panic(v[99] == 77);
7168 assert_or_panic(v[100] == 78);
7169 assert_or_panic(v[101] == 79);
7170 assert_or_panic(v[102] == 80);
7171 assert_or_panic(v[103] == 81);
7172 assert_or_panic(v[104] == 82);
7173 assert_or_panic(v[105] == 83);
7174 assert_or_panic(v[106] == 84);
7175 assert_or_panic(v[107] == 85);
7176 assert_or_panic(v[108] == 86);
7177 assert_or_panic(v[109] == 87);
7178 assert_or_panic(v[110] == 88);
7179 assert_or_panic(v[111] == 89);
7180 assert_or_panic(v[112] == 90);
7181 assert_or_panic(v[113] == 91);
7182 assert_or_panic(v[114] == 92);
7183 assert_or_panic(v[115] == 93);
7184 assert_or_panic(v[116] == 94);
7185 assert_or_panic(v[117] == 95);
7186 assert_or_panic(v[118] == 96);
7187 assert_or_panic(v[119] == 97);
7188 assert_or_panic(v[120] == 98);
7189 assert_or_panic(v[121] == 99);
7190 assert_or_panic(v[122] == 0);
7191 assert_or_panic(v[123] == 1);
7192 assert_or_panic(v[124] == 2);
7193 assert_or_panic(v[125] == 3);
7194 assert_or_panic(v[126] == 4);
7195 assert_or_panic(v[127] == 5);
7196 assert_or_panic(v[128] == 6);
7197 assert_or_panic(v[129] == 7);
7198 assert_or_panic(v[130] == 8);
7199 assert_or_panic(v[131] == 9);
7200 assert_or_panic(v[132] == 10);
7201 assert_or_panic(v[133] == 11);
7202 assert_or_panic(v[134] == 12);
7203 assert_or_panic(v[135] == 13);
7204 assert_or_panic(v[136] == 14);
7205 assert_or_panic(v[137] == 15);
7206 assert_or_panic(v[138] == 16);
7207 assert_or_panic(v[139] == 17);
7208 assert_or_panic(v[140] == 18);
7209 assert_or_panic(v[141] == 19);
7210 assert_or_panic(v[142] == 20);
7211 assert_or_panic(v[143] == 21);
7212 assert_or_panic(v[144] == 22);
7213 assert_or_panic(v[145] == 23);
7214 assert_or_panic(v[146] == 24);
7215 assert_or_panic(v[147] == 25);
7216 assert_or_panic(v[148] == 26);
7217 assert_or_panic(v[149] == 27);
7218 assert_or_panic(v[150] == 28);
7219 assert_or_panic(v[151] == 29);
7220 assert_or_panic(v[152] == 30);
7221 assert_or_panic(v[153] == 31);
7222 assert_or_panic(v[154] == 32);
7223 assert_or_panic(v[155] == 33);
7224 assert_or_panic(v[156] == 34);
7225 assert_or_panic(v[157] == 35);
7226 assert_or_panic(v[158] == 36);
7227 assert_or_panic(v[159] == 37);
7228 assert_or_panic(v[160] == 38);
7229 assert_or_panic(v[161] == 39);
7230 assert_or_panic(v[162] == 40);
7231 assert_or_panic(v[163] == 41);
7232 assert_or_panic(v[164] == 42);
7233 assert_or_panic(v[165] == 43);
7234 assert_or_panic(v[166] == 44);
7235 assert_or_panic(v[167] == 45);
7236 assert_or_panic(v[168] == 46);
7237 assert_or_panic(v[169] == 47);
7238 assert_or_panic(v[170] == 48);
7239 assert_or_panic(v[171] == 49);
7240 assert_or_panic(v[172] == 50);
7241 assert_or_panic(v[173] == 51);
7242 assert_or_panic(v[174] == 52);
7243 assert_or_panic(v[175] == 53);
7244 assert_or_panic(v[176] == 54);
7245 assert_or_panic(v[177] == 55);
7246 assert_or_panic(v[178] == 56);
7247 assert_or_panic(v[179] == 57);
7248 assert_or_panic(v[180] == 58);
7249 assert_or_panic(v[181] == 59);
7250 assert_or_panic(v[182] == 60);
7251 assert_or_panic(v[183] == 61);
7252 assert_or_panic(v[184] == 62);
7253 assert_or_panic(v[185] == 63);
7254 assert_or_panic(v[186] == 64);
7255 assert_or_panic(v[187] == 65);
7256 assert_or_panic(v[188] == 66);
7257 assert_or_panic(v[189] == 67);
7258 assert_or_panic(v[190] == 68);
7259 assert_or_panic(v[191] == 69);
7260 assert_or_panic(v[192] == 70);
7261 assert_or_panic(v[193] == 71);
7262 assert_or_panic(v[194] == 72);
7263 assert_or_panic(v[195] == 73);
7264 assert_or_panic(v[196] == 74);
7265 assert_or_panic(v[197] == 75);
7266 assert_or_panic(v[198] == 76);
7267 assert_or_panic(v[199] == 77);
7268 assert_or_panic(v[200] == 78);
7269 assert_or_panic(v[201] == 79);
7270 assert_or_panic(v[202] == 80);
7271 assert_or_panic(v[203] == 81);
7272 assert_or_panic(v[204] == 82);
7273 assert_or_panic(v[205] == 83);
7274 assert_or_panic(v[206] == 84);
7275 assert_or_panic(v[207] == 85);
7276 assert_or_panic(v[208] == 86);
7277 assert_or_panic(v[209] == 87);
7278 assert_or_panic(v[210] == 88);
7279 assert_or_panic(v[211] == 89);
7280 assert_or_panic(v[212] == 90);
7281 assert_or_panic(v[213] == 91);
7282 assert_or_panic(v[214] == 92);
7283 assert_or_panic(v[215] == 93);
7284 assert_or_panic(v[216] == 94);
7285 assert_or_panic(v[217] == 95);
7286 assert_or_panic(v[218] == 96);
7287 assert_or_panic(v[219] == 97);
7288 assert_or_panic(v[220] == 98);
7289 assert_or_panic(v[221] == 99);
7290 assert_or_panic(v[222] == 0);
7291 assert_or_panic(v[223] == 1);
7292 assert_or_panic(v[224] == 2);
7293 assert_or_panic(v[225] == 3);
7294 assert_or_panic(v[226] == 4);
7295 assert_or_panic(v[227] == 5);
7296 assert_or_panic(v[228] == 6);
7297 assert_or_panic(v[229] == 7);
7298 assert_or_panic(v[230] == 8);
7299 assert_or_panic(v[231] == 9);
7300 assert_or_panic(v[232] == 10);
7301 assert_or_panic(v[233] == 11);
7302 assert_or_panic(v[234] == 12);
7303 assert_or_panic(v[235] == 13);
7304 assert_or_panic(v[236] == 14);
7305 assert_or_panic(v[237] == 15);
7306 assert_or_panic(v[238] == 16);
7307 assert_or_panic(v[239] == 17);
7308 assert_or_panic(v[240] == 18);
7309 assert_or_panic(v[241] == 19);
7310 assert_or_panic(v[242] == 20);
7311 assert_or_panic(v[243] == 21);
7312 assert_or_panic(v[244] == 22);
7313 assert_or_panic(v[245] == 23);
7314 assert_or_panic(v[246] == 24);
7315 assert_or_panic(v[247] == 25);
7316 assert_or_panic(v[248] == 26);
7317 assert_or_panic(v[249] == 27);
7318 assert_or_panic(v[250] == 28);
7319 assert_or_panic(v[251] == 29);
7320 assert_or_panic(v[252] == 30);
7321 assert_or_panic(v[253] == 31);
7322 assert_or_panic(v[254] == 32);
7323 assert_or_panic(v[255] == 33);
7324 assert_or_panic(v[256] == 34);
7325 assert_or_panic(v[257] == 35);
7326 assert_or_panic(v[258] == 36);
7327 assert_or_panic(v[259] == 37);
7328 assert_or_panic(v[260] == 38);
7329 assert_or_panic(v[261] == 39);
7330 assert_or_panic(v[262] == 40);
7331 assert_or_panic(v[263] == 41);
7332 assert_or_panic(v[264] == 42);
7333 assert_or_panic(v[265] == 43);
7334 assert_or_panic(v[266] == 44);
7335 assert_or_panic(v[267] == 45);
7336 assert_or_panic(v[268] == 46);
7337 assert_or_panic(v[269] == 47);
7338 assert_or_panic(v[270] == 48);
7339 assert_or_panic(v[271] == 49);
7340 assert_or_panic(v[272] == 50);
7341 assert_or_panic(v[273] == 51);
7342 assert_or_panic(v[274] == 52);
7343 assert_or_panic(v[275] == 53);
7344 assert_or_panic(v[276] == 54);
7345 assert_or_panic(v[277] == 55);
7346 assert_or_panic(v[278] == 56);
7347 assert_or_panic(v[279] == 57);
7348 assert_or_panic(v[280] == 58);
7349 assert_or_panic(v[281] == 59);
7350 assert_or_panic(v[282] == 60);
7351 assert_or_panic(v[283] == 61);
7352 assert_or_panic(v[284] == 62);
7353 assert_or_panic(v[285] == 63);
7354 assert_or_panic(v[286] == 64);
7355 assert_or_panic(v[287] == 65);
7356 assert_or_panic(v[288] == 66);
7357 assert_or_panic(v[289] == 67);
7358 assert_or_panic(v[290] == 68);
7359 assert_or_panic(v[291] == 69);
7360 assert_or_panic(v[292] == 70);
7361 assert_or_panic(v[293] == 71);
7362 assert_or_panic(v[294] == 72);
7363 assert_or_panic(v[295] == 73);
7364 assert_or_panic(v[296] == 74);
7365 assert_or_panic(v[297] == 75);
7366 assert_or_panic(v[298] == 76);
7367 assert_or_panic(v[299] == 77);
7368 assert_or_panic(v[300] == 78);
7369 assert_or_panic(v[301] == 79);
7370 assert_or_panic(v[302] == 80);
7371 assert_or_panic(v[303] == 81);
7372 assert_or_panic(v[304] == 82);
7373 assert_or_panic(v[305] == 83);
7374 assert_or_panic(v[306] == 84);
7375 assert_or_panic(v[307] == 85);
7376 assert_or_panic(v[308] == 86);
7377 assert_or_panic(v[309] == 87);
7378 assert_or_panic(v[310] == 88);
7379 assert_or_panic(v[311] == 89);
7380 assert_or_panic(v[312] == 90);
7381 assert_or_panic(v[313] == 91);
7382 assert_or_panic(v[314] == 92);
7383 assert_or_panic(v[315] == 93);
7384 assert_or_panic(v[316] == 94);
7385 assert_or_panic(v[317] == 95);
7386 assert_or_panic(v[318] == 96);
7387 assert_or_panic(v[319] == 97);
7388 assert_or_panic(v[320] == 98);
7389 assert_or_panic(v[321] == 99);
7390 assert_or_panic(v[322] == 0);
7391 assert_or_panic(v[323] == 1);
7392 assert_or_panic(v[324] == 2);
7393 assert_or_panic(v[325] == 3);
7394 assert_or_panic(v[326] == 4);
7395 assert_or_panic(v[327] == 5);
7396 assert_or_panic(v[328] == 6);
7397 assert_or_panic(v[329] == 7);
7398 assert_or_panic(v[330] == 8);
7399 assert_or_panic(v[331] == 9);
7400 assert_or_panic(v[332] == 10);
7401 assert_or_panic(v[333] == 11);
7402 assert_or_panic(v[334] == 12);
7403 assert_or_panic(v[335] == 13);
7404 assert_or_panic(v[336] == 14);
7405 assert_or_panic(v[337] == 15);
7406 assert_or_panic(v[338] == 16);
7407 assert_or_panic(v[339] == 17);
7408 assert_or_panic(v[340] == 18);
7409 assert_or_panic(v[341] == 19);
7410 assert_or_panic(v[342] == 20);
7411 assert_or_panic(v[343] == 21);
7412 assert_or_panic(v[344] == 22);
7413 assert_or_panic(v[345] == 23);
7414 assert_or_panic(v[346] == 24);
7415 assert_or_panic(v[347] == 25);
7416 assert_or_panic(v[348] == 26);
7417 assert_or_panic(v[349] == 27);
7418 assert_or_panic(v[350] == 28);
7419 assert_or_panic(v[351] == 29);
7420 assert_or_panic(v[352] == 30);
7421 assert_or_panic(v[353] == 31);
7422 assert_or_panic(v[354] == 32);
7423 assert_or_panic(v[355] == 33);
7424 assert_or_panic(v[356] == 34);
7425 assert_or_panic(v[357] == 35);
7426 assert_or_panic(v[358] == 36);
7427 assert_or_panic(v[359] == 37);
7428 assert_or_panic(v[360] == 38);
7429 assert_or_panic(v[361] == 39);
7430 assert_or_panic(v[362] == 40);
7431 assert_or_panic(v[363] == 41);
7432 assert_or_panic(v[364] == 42);
7433 assert_or_panic(v[365] == 43);
7434 assert_or_panic(v[366] == 44);
7435 assert_or_panic(v[367] == 45);
7436 assert_or_panic(v[368] == 46);
7437 assert_or_panic(v[369] == 47);
7438 assert_or_panic(v[370] == 48);
7439 assert_or_panic(v[371] == 49);
7440 assert_or_panic(v[372] == 50);
7441 assert_or_panic(v[373] == 51);
7442 assert_or_panic(v[374] == 52);
7443 assert_or_panic(v[375] == 53);
7444 assert_or_panic(v[376] == 54);
7445 assert_or_panic(v[377] == 55);
7446 assert_or_panic(v[378] == 56);
7447 assert_or_panic(v[379] == 57);
7448 assert_or_panic(v[380] == 58);
7449 assert_or_panic(v[381] == 59);
7450 assert_or_panic(v[382] == 60);
7451 assert_or_panic(v[383] == 61);
7452 zig_vector_384_u8((Vector_384_u8){
7453 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
7454 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
7455 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
7456 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
7457 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
7458 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
7459 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
7460 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
7461 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
7462 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
7463 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
7464 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
7465 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
7466 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
7467 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
7468 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7469 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
7470 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
7471 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
7472 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
7473 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
7474 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
7475 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
7476 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
7477 }, 384);
7478}
7479
7480typedef uint8_t Vector_512_u8 __attribute__((vector_size(512 * sizeof(uint8_t))));
7481
7482Vector_512_u8 zig_ret_vector_512_u8(void);
7483void zig_vector_512_u8(Vector_512_u8, size_t);
7484
7485Vector_512_u8 c_ret_vector_512_u8(void) {
7486 return (Vector_512_u8){
7487 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
7488 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
7489 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
7490 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
7491 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7492 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
7493 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
7494 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
7495 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
7496 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
7497 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
7498 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
7499 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
7500 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
7501 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
7502 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
7503 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
7504 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
7505 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
7506 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
7507 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
7508 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
7509 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
7510 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
7511 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
7512 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
7513 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
7514 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
7515 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
7516 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7517 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
7518 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
7519 };
7520}
7521void c_vector_512_u8(Vector_512_u8 v, size_t i) {
7522 assert_or_panic(v[0] == 50);
7523 assert_or_panic(v[1] == 51);
7524 assert_or_panic(v[2] == 52);
7525 assert_or_panic(v[3] == 53);
7526 assert_or_panic(v[4] == 54);
7527 assert_or_panic(v[5] == 55);
7528 assert_or_panic(v[6] == 56);
7529 assert_or_panic(v[7] == 57);
7530 assert_or_panic(v[8] == 58);
7531 assert_or_panic(v[9] == 59);
7532 assert_or_panic(v[10] == 60);
7533 assert_or_panic(v[11] == 61);
7534 assert_or_panic(v[12] == 62);
7535 assert_or_panic(v[13] == 63);
7536 assert_or_panic(v[14] == 64);
7537 assert_or_panic(v[15] == 65);
7538 assert_or_panic(v[16] == 66);
7539 assert_or_panic(v[17] == 67);
7540 assert_or_panic(v[18] == 68);
7541 assert_or_panic(v[19] == 69);
7542 assert_or_panic(v[20] == 70);
7543 assert_or_panic(v[21] == 71);
7544 assert_or_panic(v[22] == 72);
7545 assert_or_panic(v[23] == 73);
7546 assert_or_panic(v[24] == 74);
7547 assert_or_panic(v[25] == 75);
7548 assert_or_panic(v[26] == 76);
7549 assert_or_panic(v[27] == 77);
7550 assert_or_panic(v[28] == 78);
7551 assert_or_panic(v[29] == 79);
7552 assert_or_panic(v[30] == 80);
7553 assert_or_panic(v[31] == 81);
7554 assert_or_panic(v[32] == 82);
7555 assert_or_panic(v[33] == 83);
7556 assert_or_panic(v[34] == 84);
7557 assert_or_panic(v[35] == 85);
7558 assert_or_panic(v[36] == 86);
7559 assert_or_panic(v[37] == 87);
7560 assert_or_panic(v[38] == 88);
7561 assert_or_panic(v[39] == 89);
7562 assert_or_panic(v[40] == 90);
7563 assert_or_panic(v[41] == 91);
7564 assert_or_panic(v[42] == 92);
7565 assert_or_panic(v[43] == 93);
7566 assert_or_panic(v[44] == 94);
7567 assert_or_panic(v[45] == 95);
7568 assert_or_panic(v[46] == 96);
7569 assert_or_panic(v[47] == 97);
7570 assert_or_panic(v[48] == 98);
7571 assert_or_panic(v[49] == 99);
7572 assert_or_panic(v[50] == 0);
7573 assert_or_panic(v[51] == 1);
7574 assert_or_panic(v[52] == 2);
7575 assert_or_panic(v[53] == 3);
7576 assert_or_panic(v[54] == 4);
7577 assert_or_panic(v[55] == 5);
7578 assert_or_panic(v[56] == 6);
7579 assert_or_panic(v[57] == 7);
7580 assert_or_panic(v[58] == 8);
7581 assert_or_panic(v[59] == 9);
7582 assert_or_panic(v[60] == 10);
7583 assert_or_panic(v[61] == 11);
7584 assert_or_panic(v[62] == 12);
7585 assert_or_panic(v[63] == 13);
7586 assert_or_panic(v[64] == 14);
7587 assert_or_panic(v[65] == 15);
7588 assert_or_panic(v[66] == 16);
7589 assert_or_panic(v[67] == 17);
7590 assert_or_panic(v[68] == 18);
7591 assert_or_panic(v[69] == 19);
7592 assert_or_panic(v[70] == 20);
7593 assert_or_panic(v[71] == 21);
7594 assert_or_panic(v[72] == 22);
7595 assert_or_panic(v[73] == 23);
7596 assert_or_panic(v[74] == 24);
7597 assert_or_panic(v[75] == 25);
7598 assert_or_panic(v[76] == 26);
7599 assert_or_panic(v[77] == 27);
7600 assert_or_panic(v[78] == 28);
7601 assert_or_panic(v[79] == 29);
7602 assert_or_panic(v[80] == 30);
7603 assert_or_panic(v[81] == 31);
7604 assert_or_panic(v[82] == 32);
7605 assert_or_panic(v[83] == 33);
7606 assert_or_panic(v[84] == 34);
7607 assert_or_panic(v[85] == 35);
7608 assert_or_panic(v[86] == 36);
7609 assert_or_panic(v[87] == 37);
7610 assert_or_panic(v[88] == 38);
7611 assert_or_panic(v[89] == 39);
7612 assert_or_panic(v[90] == 40);
7613 assert_or_panic(v[91] == 41);
7614 assert_or_panic(v[92] == 42);
7615 assert_or_panic(v[93] == 43);
7616 assert_or_panic(v[94] == 44);
7617 assert_or_panic(v[95] == 45);
7618 assert_or_panic(v[96] == 46);
7619 assert_or_panic(v[97] == 47);
7620 assert_or_panic(v[98] == 48);
7621 assert_or_panic(v[99] == 49);
7622 assert_or_panic(v[100] == 50);
7623 assert_or_panic(v[101] == 51);
7624 assert_or_panic(v[102] == 52);
7625 assert_or_panic(v[103] == 53);
7626 assert_or_panic(v[104] == 54);
7627 assert_or_panic(v[105] == 55);
7628 assert_or_panic(v[106] == 56);
7629 assert_or_panic(v[107] == 57);
7630 assert_or_panic(v[108] == 58);
7631 assert_or_panic(v[109] == 59);
7632 assert_or_panic(v[110] == 60);
7633 assert_or_panic(v[111] == 61);
7634 assert_or_panic(v[112] == 62);
7635 assert_or_panic(v[113] == 63);
7636 assert_or_panic(v[114] == 64);
7637 assert_or_panic(v[115] == 65);
7638 assert_or_panic(v[116] == 66);
7639 assert_or_panic(v[117] == 67);
7640 assert_or_panic(v[118] == 68);
7641 assert_or_panic(v[119] == 69);
7642 assert_or_panic(v[120] == 70);
7643 assert_or_panic(v[121] == 71);
7644 assert_or_panic(v[122] == 72);
7645 assert_or_panic(v[123] == 73);
7646 assert_or_panic(v[124] == 74);
7647 assert_or_panic(v[125] == 75);
7648 assert_or_panic(v[126] == 76);
7649 assert_or_panic(v[127] == 77);
7650 assert_or_panic(v[128] == 78);
7651 assert_or_panic(v[129] == 79);
7652 assert_or_panic(v[130] == 80);
7653 assert_or_panic(v[131] == 81);
7654 assert_or_panic(v[132] == 82);
7655 assert_or_panic(v[133] == 83);
7656 assert_or_panic(v[134] == 84);
7657 assert_or_panic(v[135] == 85);
7658 assert_or_panic(v[136] == 86);
7659 assert_or_panic(v[137] == 87);
7660 assert_or_panic(v[138] == 88);
7661 assert_or_panic(v[139] == 89);
7662 assert_or_panic(v[140] == 90);
7663 assert_or_panic(v[141] == 91);
7664 assert_or_panic(v[142] == 92);
7665 assert_or_panic(v[143] == 93);
7666 assert_or_panic(v[144] == 94);
7667 assert_or_panic(v[145] == 95);
7668 assert_or_panic(v[146] == 96);
7669 assert_or_panic(v[147] == 97);
7670 assert_or_panic(v[148] == 98);
7671 assert_or_panic(v[149] == 99);
7672 assert_or_panic(v[150] == 0);
7673 assert_or_panic(v[151] == 1);
7674 assert_or_panic(v[152] == 2);
7675 assert_or_panic(v[153] == 3);
7676 assert_or_panic(v[154] == 4);
7677 assert_or_panic(v[155] == 5);
7678 assert_or_panic(v[156] == 6);
7679 assert_or_panic(v[157] == 7);
7680 assert_or_panic(v[158] == 8);
7681 assert_or_panic(v[159] == 9);
7682 assert_or_panic(v[160] == 10);
7683 assert_or_panic(v[161] == 11);
7684 assert_or_panic(v[162] == 12);
7685 assert_or_panic(v[163] == 13);
7686 assert_or_panic(v[164] == 14);
7687 assert_or_panic(v[165] == 15);
7688 assert_or_panic(v[166] == 16);
7689 assert_or_panic(v[167] == 17);
7690 assert_or_panic(v[168] == 18);
7691 assert_or_panic(v[169] == 19);
7692 assert_or_panic(v[170] == 20);
7693 assert_or_panic(v[171] == 21);
7694 assert_or_panic(v[172] == 22);
7695 assert_or_panic(v[173] == 23);
7696 assert_or_panic(v[174] == 24);
7697 assert_or_panic(v[175] == 25);
7698 assert_or_panic(v[176] == 26);
7699 assert_or_panic(v[177] == 27);
7700 assert_or_panic(v[178] == 28);
7701 assert_or_panic(v[179] == 29);
7702 assert_or_panic(v[180] == 30);
7703 assert_or_panic(v[181] == 31);
7704 assert_or_panic(v[182] == 32);
7705 assert_or_panic(v[183] == 33);
7706 assert_or_panic(v[184] == 34);
7707 assert_or_panic(v[185] == 35);
7708 assert_or_panic(v[186] == 36);
7709 assert_or_panic(v[187] == 37);
7710 assert_or_panic(v[188] == 38);
7711 assert_or_panic(v[189] == 39);
7712 assert_or_panic(v[190] == 40);
7713 assert_or_panic(v[191] == 41);
7714 assert_or_panic(v[192] == 42);
7715 assert_or_panic(v[193] == 43);
7716 assert_or_panic(v[194] == 44);
7717 assert_or_panic(v[195] == 45);
7718 assert_or_panic(v[196] == 46);
7719 assert_or_panic(v[197] == 47);
7720 assert_or_panic(v[198] == 48);
7721 assert_or_panic(v[199] == 49);
7722 assert_or_panic(v[200] == 50);
7723 assert_or_panic(v[201] == 51);
7724 assert_or_panic(v[202] == 52);
7725 assert_or_panic(v[203] == 53);
7726 assert_or_panic(v[204] == 54);
7727 assert_or_panic(v[205] == 55);
7728 assert_or_panic(v[206] == 56);
7729 assert_or_panic(v[207] == 57);
7730 assert_or_panic(v[208] == 58);
7731 assert_or_panic(v[209] == 59);
7732 assert_or_panic(v[210] == 60);
7733 assert_or_panic(v[211] == 61);
7734 assert_or_panic(v[212] == 62);
7735 assert_or_panic(v[213] == 63);
7736 assert_or_panic(v[214] == 64);
7737 assert_or_panic(v[215] == 65);
7738 assert_or_panic(v[216] == 66);
7739 assert_or_panic(v[217] == 67);
7740 assert_or_panic(v[218] == 68);
7741 assert_or_panic(v[219] == 69);
7742 assert_or_panic(v[220] == 70);
7743 assert_or_panic(v[221] == 71);
7744 assert_or_panic(v[222] == 72);
7745 assert_or_panic(v[223] == 73);
7746 assert_or_panic(v[224] == 74);
7747 assert_or_panic(v[225] == 75);
7748 assert_or_panic(v[226] == 76);
7749 assert_or_panic(v[227] == 77);
7750 assert_or_panic(v[228] == 78);
7751 assert_or_panic(v[229] == 79);
7752 assert_or_panic(v[230] == 80);
7753 assert_or_panic(v[231] == 81);
7754 assert_or_panic(v[232] == 82);
7755 assert_or_panic(v[233] == 83);
7756 assert_or_panic(v[234] == 84);
7757 assert_or_panic(v[235] == 85);
7758 assert_or_panic(v[236] == 86);
7759 assert_or_panic(v[237] == 87);
7760 assert_or_panic(v[238] == 88);
7761 assert_or_panic(v[239] == 89);
7762 assert_or_panic(v[240] == 90);
7763 assert_or_panic(v[241] == 91);
7764 assert_or_panic(v[242] == 92);
7765 assert_or_panic(v[243] == 93);
7766 assert_or_panic(v[244] == 94);
7767 assert_or_panic(v[245] == 95);
7768 assert_or_panic(v[246] == 96);
7769 assert_or_panic(v[247] == 97);
7770 assert_or_panic(v[248] == 98);
7771 assert_or_panic(v[249] == 99);
7772 assert_or_panic(v[250] == 0);
7773 assert_or_panic(v[251] == 1);
7774 assert_or_panic(v[252] == 2);
7775 assert_or_panic(v[253] == 3);
7776 assert_or_panic(v[254] == 4);
7777 assert_or_panic(v[255] == 5);
7778 assert_or_panic(v[256] == 6);
7779 assert_or_panic(v[257] == 7);
7780 assert_or_panic(v[258] == 8);
7781 assert_or_panic(v[259] == 9);
7782 assert_or_panic(v[260] == 10);
7783 assert_or_panic(v[261] == 11);
7784 assert_or_panic(v[262] == 12);
7785 assert_or_panic(v[263] == 13);
7786 assert_or_panic(v[264] == 14);
7787 assert_or_panic(v[265] == 15);
7788 assert_or_panic(v[266] == 16);
7789 assert_or_panic(v[267] == 17);
7790 assert_or_panic(v[268] == 18);
7791 assert_or_panic(v[269] == 19);
7792 assert_or_panic(v[270] == 20);
7793 assert_or_panic(v[271] == 21);
7794 assert_or_panic(v[272] == 22);
7795 assert_or_panic(v[273] == 23);
7796 assert_or_panic(v[274] == 24);
7797 assert_or_panic(v[275] == 25);
7798 assert_or_panic(v[276] == 26);
7799 assert_or_panic(v[277] == 27);
7800 assert_or_panic(v[278] == 28);
7801 assert_or_panic(v[279] == 29);
7802 assert_or_panic(v[280] == 30);
7803 assert_or_panic(v[281] == 31);
7804 assert_or_panic(v[282] == 32);
7805 assert_or_panic(v[283] == 33);
7806 assert_or_panic(v[284] == 34);
7807 assert_or_panic(v[285] == 35);
7808 assert_or_panic(v[286] == 36);
7809 assert_or_panic(v[287] == 37);
7810 assert_or_panic(v[288] == 38);
7811 assert_or_panic(v[289] == 39);
7812 assert_or_panic(v[290] == 40);
7813 assert_or_panic(v[291] == 41);
7814 assert_or_panic(v[292] == 42);
7815 assert_or_panic(v[293] == 43);
7816 assert_or_panic(v[294] == 44);
7817 assert_or_panic(v[295] == 45);
7818 assert_or_panic(v[296] == 46);
7819 assert_or_panic(v[297] == 47);
7820 assert_or_panic(v[298] == 48);
7821 assert_or_panic(v[299] == 49);
7822 assert_or_panic(v[300] == 50);
7823 assert_or_panic(v[301] == 51);
7824 assert_or_panic(v[302] == 52);
7825 assert_or_panic(v[303] == 53);
7826 assert_or_panic(v[304] == 54);
7827 assert_or_panic(v[305] == 55);
7828 assert_or_panic(v[306] == 56);
7829 assert_or_panic(v[307] == 57);
7830 assert_or_panic(v[308] == 58);
7831 assert_or_panic(v[309] == 59);
7832 assert_or_panic(v[310] == 60);
7833 assert_or_panic(v[311] == 61);
7834 assert_or_panic(v[312] == 62);
7835 assert_or_panic(v[313] == 63);
7836 assert_or_panic(v[314] == 64);
7837 assert_or_panic(v[315] == 65);
7838 assert_or_panic(v[316] == 66);
7839 assert_or_panic(v[317] == 67);
7840 assert_or_panic(v[318] == 68);
7841 assert_or_panic(v[319] == 69);
7842 assert_or_panic(v[320] == 70);
7843 assert_or_panic(v[321] == 71);
7844 assert_or_panic(v[322] == 72);
7845 assert_or_panic(v[323] == 73);
7846 assert_or_panic(v[324] == 74);
7847 assert_or_panic(v[325] == 75);
7848 assert_or_panic(v[326] == 76);
7849 assert_or_panic(v[327] == 77);
7850 assert_or_panic(v[328] == 78);
7851 assert_or_panic(v[329] == 79);
7852 assert_or_panic(v[330] == 80);
7853 assert_or_panic(v[331] == 81);
7854 assert_or_panic(v[332] == 82);
7855 assert_or_panic(v[333] == 83);
7856 assert_or_panic(v[334] == 84);
7857 assert_or_panic(v[335] == 85);
7858 assert_or_panic(v[336] == 86);
7859 assert_or_panic(v[337] == 87);
7860 assert_or_panic(v[338] == 88);
7861 assert_or_panic(v[339] == 89);
7862 assert_or_panic(v[340] == 90);
7863 assert_or_panic(v[341] == 91);
7864 assert_or_panic(v[342] == 92);
7865 assert_or_panic(v[343] == 93);
7866 assert_or_panic(v[344] == 94);
7867 assert_or_panic(v[345] == 95);
7868 assert_or_panic(v[346] == 96);
7869 assert_or_panic(v[347] == 97);
7870 assert_or_panic(v[348] == 98);
7871 assert_or_panic(v[349] == 99);
7872 assert_or_panic(v[350] == 0);
7873 assert_or_panic(v[351] == 1);
7874 assert_or_panic(v[352] == 2);
7875 assert_or_panic(v[353] == 3);
7876 assert_or_panic(v[354] == 4);
7877 assert_or_panic(v[355] == 5);
7878 assert_or_panic(v[356] == 6);
7879 assert_or_panic(v[357] == 7);
7880 assert_or_panic(v[358] == 8);
7881 assert_or_panic(v[359] == 9);
7882 assert_or_panic(v[360] == 10);
7883 assert_or_panic(v[361] == 11);
7884 assert_or_panic(v[362] == 12);
7885 assert_or_panic(v[363] == 13);
7886 assert_or_panic(v[364] == 14);
7887 assert_or_panic(v[365] == 15);
7888 assert_or_panic(v[366] == 16);
7889 assert_or_panic(v[367] == 17);
7890 assert_or_panic(v[368] == 18);
7891 assert_or_panic(v[369] == 19);
7892 assert_or_panic(v[370] == 20);
7893 assert_or_panic(v[371] == 21);
7894 assert_or_panic(v[372] == 22);
7895 assert_or_panic(v[373] == 23);
7896 assert_or_panic(v[374] == 24);
7897 assert_or_panic(v[375] == 25);
7898 assert_or_panic(v[376] == 26);
7899 assert_or_panic(v[377] == 27);
7900 assert_or_panic(v[378] == 28);
7901 assert_or_panic(v[379] == 29);
7902 assert_or_panic(v[380] == 30);
7903 assert_or_panic(v[381] == 31);
7904 assert_or_panic(v[382] == 32);
7905 assert_or_panic(v[383] == 33);
7906 assert_or_panic(v[384] == 34);
7907 assert_or_panic(v[385] == 35);
7908 assert_or_panic(v[386] == 36);
7909 assert_or_panic(v[387] == 37);
7910 assert_or_panic(v[388] == 38);
7911 assert_or_panic(v[389] == 39);
7912 assert_or_panic(v[390] == 40);
7913 assert_or_panic(v[391] == 41);
7914 assert_or_panic(v[392] == 42);
7915 assert_or_panic(v[393] == 43);
7916 assert_or_panic(v[394] == 44);
7917 assert_or_panic(v[395] == 45);
7918 assert_or_panic(v[396] == 46);
7919 assert_or_panic(v[397] == 47);
7920 assert_or_panic(v[398] == 48);
7921 assert_or_panic(v[399] == 49);
7922 assert_or_panic(v[400] == 50);
7923 assert_or_panic(v[401] == 51);
7924 assert_or_panic(v[402] == 52);
7925 assert_or_panic(v[403] == 53);
7926 assert_or_panic(v[404] == 54);
7927 assert_or_panic(v[405] == 55);
7928 assert_or_panic(v[406] == 56);
7929 assert_or_panic(v[407] == 57);
7930 assert_or_panic(v[408] == 58);
7931 assert_or_panic(v[409] == 59);
7932 assert_or_panic(v[410] == 60);
7933 assert_or_panic(v[411] == 61);
7934 assert_or_panic(v[412] == 62);
7935 assert_or_panic(v[413] == 63);
7936 assert_or_panic(v[414] == 64);
7937 assert_or_panic(v[415] == 65);
7938 assert_or_panic(v[416] == 66);
7939 assert_or_panic(v[417] == 67);
7940 assert_or_panic(v[418] == 68);
7941 assert_or_panic(v[419] == 69);
7942 assert_or_panic(v[420] == 70);
7943 assert_or_panic(v[421] == 71);
7944 assert_or_panic(v[422] == 72);
7945 assert_or_panic(v[423] == 73);
7946 assert_or_panic(v[424] == 74);
7947 assert_or_panic(v[425] == 75);
7948 assert_or_panic(v[426] == 76);
7949 assert_or_panic(v[427] == 77);
7950 assert_or_panic(v[428] == 78);
7951 assert_or_panic(v[429] == 79);
7952 assert_or_panic(v[430] == 80);
7953 assert_or_panic(v[431] == 81);
7954 assert_or_panic(v[432] == 82);
7955 assert_or_panic(v[433] == 83);
7956 assert_or_panic(v[434] == 84);
7957 assert_or_panic(v[435] == 85);
7958 assert_or_panic(v[436] == 86);
7959 assert_or_panic(v[437] == 87);
7960 assert_or_panic(v[438] == 88);
7961 assert_or_panic(v[439] == 89);
7962 assert_or_panic(v[440] == 90);
7963 assert_or_panic(v[441] == 91);
7964 assert_or_panic(v[442] == 92);
7965 assert_or_panic(v[443] == 93);
7966 assert_or_panic(v[444] == 94);
7967 assert_or_panic(v[445] == 95);
7968 assert_or_panic(v[446] == 96);
7969 assert_or_panic(v[447] == 97);
7970 assert_or_panic(v[448] == 98);
7971 assert_or_panic(v[449] == 99);
7972 assert_or_panic(v[450] == 0);
7973 assert_or_panic(v[451] == 1);
7974 assert_or_panic(v[452] == 2);
7975 assert_or_panic(v[453] == 3);
7976 assert_or_panic(v[454] == 4);
7977 assert_or_panic(v[455] == 5);
7978 assert_or_panic(v[456] == 6);
7979 assert_or_panic(v[457] == 7);
7980 assert_or_panic(v[458] == 8);
7981 assert_or_panic(v[459] == 9);
7982 assert_or_panic(v[460] == 10);
7983 assert_or_panic(v[461] == 11);
7984 assert_or_panic(v[462] == 12);
7985 assert_or_panic(v[463] == 13);
7986 assert_or_panic(v[464] == 14);
7987 assert_or_panic(v[465] == 15);
7988 assert_or_panic(v[466] == 16);
7989 assert_or_panic(v[467] == 17);
7990 assert_or_panic(v[468] == 18);
7991 assert_or_panic(v[469] == 19);
7992 assert_or_panic(v[470] == 20);
7993 assert_or_panic(v[471] == 21);
7994 assert_or_panic(v[472] == 22);
7995 assert_or_panic(v[473] == 23);
7996 assert_or_panic(v[474] == 24);
7997 assert_or_panic(v[475] == 25);
7998 assert_or_panic(v[476] == 26);
7999 assert_or_panic(v[477] == 27);
8000 assert_or_panic(v[478] == 28);
8001 assert_or_panic(v[479] == 29);
8002 assert_or_panic(v[480] == 30);
8003 assert_or_panic(v[481] == 31);
8004 assert_or_panic(v[482] == 32);
8005 assert_or_panic(v[483] == 33);
8006 assert_or_panic(v[484] == 34);
8007 assert_or_panic(v[485] == 35);
8008 assert_or_panic(v[486] == 36);
8009 assert_or_panic(v[487] == 37);
8010 assert_or_panic(v[488] == 38);
8011 assert_or_panic(v[489] == 39);
8012 assert_or_panic(v[490] == 40);
8013 assert_or_panic(v[491] == 41);
8014 assert_or_panic(v[492] == 42);
8015 assert_or_panic(v[493] == 43);
8016 assert_or_panic(v[494] == 44);
8017 assert_or_panic(v[495] == 45);
8018 assert_or_panic(v[496] == 46);
8019 assert_or_panic(v[497] == 47);
8020 assert_or_panic(v[498] == 48);
8021 assert_or_panic(v[499] == 49);
8022 assert_or_panic(v[500] == 50);
8023 assert_or_panic(v[501] == 51);
8024 assert_or_panic(v[502] == 52);
8025 assert_or_panic(v[503] == 53);
8026 assert_or_panic(v[504] == 54);
8027 assert_or_panic(v[505] == 55);
8028 assert_or_panic(v[506] == 56);
8029 assert_or_panic(v[507] == 57);
8030 assert_or_panic(v[508] == 58);
8031 assert_or_panic(v[509] == 59);
8032 assert_or_panic(v[510] == 60);
8033 assert_or_panic(v[511] == 61);
8034 assert_or_panic(i == 512);
8035}
8036void c_test_vector_512_u8(void) {
8037 Vector_512_u8 v = zig_ret_vector_512_u8();
8038 assert_or_panic(v[0] == 14);
8039 assert_or_panic(v[1] == 15);
8040 assert_or_panic(v[2] == 16);
8041 assert_or_panic(v[3] == 17);
8042 assert_or_panic(v[4] == 18);
8043 assert_or_panic(v[5] == 19);
8044 assert_or_panic(v[6] == 20);
8045 assert_or_panic(v[7] == 21);
8046 assert_or_panic(v[8] == 22);
8047 assert_or_panic(v[9] == 23);
8048 assert_or_panic(v[10] == 24);
8049 assert_or_panic(v[11] == 25);
8050 assert_or_panic(v[12] == 26);
8051 assert_or_panic(v[13] == 27);
8052 assert_or_panic(v[14] == 28);
8053 assert_or_panic(v[15] == 29);
8054 assert_or_panic(v[16] == 30);
8055 assert_or_panic(v[17] == 31);
8056 assert_or_panic(v[18] == 32);
8057 assert_or_panic(v[19] == 33);
8058 assert_or_panic(v[20] == 34);
8059 assert_or_panic(v[21] == 35);
8060 assert_or_panic(v[22] == 36);
8061 assert_or_panic(v[23] == 37);
8062 assert_or_panic(v[24] == 38);
8063 assert_or_panic(v[25] == 39);
8064 assert_or_panic(v[26] == 40);
8065 assert_or_panic(v[27] == 41);
8066 assert_or_panic(v[28] == 42);
8067 assert_or_panic(v[29] == 43);
8068 assert_or_panic(v[30] == 44);
8069 assert_or_panic(v[31] == 45);
8070 assert_or_panic(v[32] == 46);
8071 assert_or_panic(v[33] == 47);
8072 assert_or_panic(v[34] == 48);
8073 assert_or_panic(v[35] == 49);
8074 assert_or_panic(v[36] == 50);
8075 assert_or_panic(v[37] == 51);
8076 assert_or_panic(v[38] == 52);
8077 assert_or_panic(v[39] == 53);
8078 assert_or_panic(v[40] == 54);
8079 assert_or_panic(v[41] == 55);
8080 assert_or_panic(v[42] == 56);
8081 assert_or_panic(v[43] == 57);
8082 assert_or_panic(v[44] == 58);
8083 assert_or_panic(v[45] == 59);
8084 assert_or_panic(v[46] == 60);
8085 assert_or_panic(v[47] == 61);
8086 assert_or_panic(v[48] == 62);
8087 assert_or_panic(v[49] == 63);
8088 assert_or_panic(v[50] == 64);
8089 assert_or_panic(v[51] == 65);
8090 assert_or_panic(v[52] == 66);
8091 assert_or_panic(v[53] == 67);
8092 assert_or_panic(v[54] == 68);
8093 assert_or_panic(v[55] == 69);
8094 assert_or_panic(v[56] == 70);
8095 assert_or_panic(v[57] == 71);
8096 assert_or_panic(v[58] == 72);
8097 assert_or_panic(v[59] == 73);
8098 assert_or_panic(v[60] == 74);
8099 assert_or_panic(v[61] == 75);
8100 assert_or_panic(v[62] == 76);
8101 assert_or_panic(v[63] == 77);
8102 assert_or_panic(v[64] == 78);
8103 assert_or_panic(v[65] == 79);
8104 assert_or_panic(v[66] == 80);
8105 assert_or_panic(v[67] == 81);
8106 assert_or_panic(v[68] == 82);
8107 assert_or_panic(v[69] == 83);
8108 assert_or_panic(v[70] == 84);
8109 assert_or_panic(v[71] == 85);
8110 assert_or_panic(v[72] == 86);
8111 assert_or_panic(v[73] == 87);
8112 assert_or_panic(v[74] == 88);
8113 assert_or_panic(v[75] == 89);
8114 assert_or_panic(v[76] == 90);
8115 assert_or_panic(v[77] == 91);
8116 assert_or_panic(v[78] == 92);
8117 assert_or_panic(v[79] == 93);
8118 assert_or_panic(v[80] == 94);
8119 assert_or_panic(v[81] == 95);
8120 assert_or_panic(v[82] == 96);
8121 assert_or_panic(v[83] == 97);
8122 assert_or_panic(v[84] == 98);
8123 assert_or_panic(v[85] == 99);
8124 assert_or_panic(v[86] == 0);
8125 assert_or_panic(v[87] == 1);
8126 assert_or_panic(v[88] == 2);
8127 assert_or_panic(v[89] == 3);
8128 assert_or_panic(v[90] == 4);
8129 assert_or_panic(v[91] == 5);
8130 assert_or_panic(v[92] == 6);
8131 assert_or_panic(v[93] == 7);
8132 assert_or_panic(v[94] == 8);
8133 assert_or_panic(v[95] == 9);
8134 assert_or_panic(v[96] == 10);
8135 assert_or_panic(v[97] == 11);
8136 assert_or_panic(v[98] == 12);
8137 assert_or_panic(v[99] == 13);
8138 assert_or_panic(v[100] == 14);
8139 assert_or_panic(v[101] == 15);
8140 assert_or_panic(v[102] == 16);
8141 assert_or_panic(v[103] == 17);
8142 assert_or_panic(v[104] == 18);
8143 assert_or_panic(v[105] == 19);
8144 assert_or_panic(v[106] == 20);
8145 assert_or_panic(v[107] == 21);
8146 assert_or_panic(v[108] == 22);
8147 assert_or_panic(v[109] == 23);
8148 assert_or_panic(v[110] == 24);
8149 assert_or_panic(v[111] == 25);
8150 assert_or_panic(v[112] == 26);
8151 assert_or_panic(v[113] == 27);
8152 assert_or_panic(v[114] == 28);
8153 assert_or_panic(v[115] == 29);
8154 assert_or_panic(v[116] == 30);
8155 assert_or_panic(v[117] == 31);
8156 assert_or_panic(v[118] == 32);
8157 assert_or_panic(v[119] == 33);
8158 assert_or_panic(v[120] == 34);
8159 assert_or_panic(v[121] == 35);
8160 assert_or_panic(v[122] == 36);
8161 assert_or_panic(v[123] == 37);
8162 assert_or_panic(v[124] == 38);
8163 assert_or_panic(v[125] == 39);
8164 assert_or_panic(v[126] == 40);
8165 assert_or_panic(v[127] == 41);
8166 assert_or_panic(v[128] == 42);
8167 assert_or_panic(v[129] == 43);
8168 assert_or_panic(v[130] == 44);
8169 assert_or_panic(v[131] == 45);
8170 assert_or_panic(v[132] == 46);
8171 assert_or_panic(v[133] == 47);
8172 assert_or_panic(v[134] == 48);
8173 assert_or_panic(v[135] == 49);
8174 assert_or_panic(v[136] == 50);
8175 assert_or_panic(v[137] == 51);
8176 assert_or_panic(v[138] == 52);
8177 assert_or_panic(v[139] == 53);
8178 assert_or_panic(v[140] == 54);
8179 assert_or_panic(v[141] == 55);
8180 assert_or_panic(v[142] == 56);
8181 assert_or_panic(v[143] == 57);
8182 assert_or_panic(v[144] == 58);
8183 assert_or_panic(v[145] == 59);
8184 assert_or_panic(v[146] == 60);
8185 assert_or_panic(v[147] == 61);
8186 assert_or_panic(v[148] == 62);
8187 assert_or_panic(v[149] == 63);
8188 assert_or_panic(v[150] == 64);
8189 assert_or_panic(v[151] == 65);
8190 assert_or_panic(v[152] == 66);
8191 assert_or_panic(v[153] == 67);
8192 assert_or_panic(v[154] == 68);
8193 assert_or_panic(v[155] == 69);
8194 assert_or_panic(v[156] == 70);
8195 assert_or_panic(v[157] == 71);
8196 assert_or_panic(v[158] == 72);
8197 assert_or_panic(v[159] == 73);
8198 assert_or_panic(v[160] == 74);
8199 assert_or_panic(v[161] == 75);
8200 assert_or_panic(v[162] == 76);
8201 assert_or_panic(v[163] == 77);
8202 assert_or_panic(v[164] == 78);
8203 assert_or_panic(v[165] == 79);
8204 assert_or_panic(v[166] == 80);
8205 assert_or_panic(v[167] == 81);
8206 assert_or_panic(v[168] == 82);
8207 assert_or_panic(v[169] == 83);
8208 assert_or_panic(v[170] == 84);
8209 assert_or_panic(v[171] == 85);
8210 assert_or_panic(v[172] == 86);
8211 assert_or_panic(v[173] == 87);
8212 assert_or_panic(v[174] == 88);
8213 assert_or_panic(v[175] == 89);
8214 assert_or_panic(v[176] == 90);
8215 assert_or_panic(v[177] == 91);
8216 assert_or_panic(v[178] == 92);
8217 assert_or_panic(v[179] == 93);
8218 assert_or_panic(v[180] == 94);
8219 assert_or_panic(v[181] == 95);
8220 assert_or_panic(v[182] == 96);
8221 assert_or_panic(v[183] == 97);
8222 assert_or_panic(v[184] == 98);
8223 assert_or_panic(v[185] == 99);
8224 assert_or_panic(v[186] == 0);
8225 assert_or_panic(v[187] == 1);
8226 assert_or_panic(v[188] == 2);
8227 assert_or_panic(v[189] == 3);
8228 assert_or_panic(v[190] == 4);
8229 assert_or_panic(v[191] == 5);
8230 assert_or_panic(v[192] == 6);
8231 assert_or_panic(v[193] == 7);
8232 assert_or_panic(v[194] == 8);
8233 assert_or_panic(v[195] == 9);
8234 assert_or_panic(v[196] == 10);
8235 assert_or_panic(v[197] == 11);
8236 assert_or_panic(v[198] == 12);
8237 assert_or_panic(v[199] == 13);
8238 assert_or_panic(v[200] == 14);
8239 assert_or_panic(v[201] == 15);
8240 assert_or_panic(v[202] == 16);
8241 assert_or_panic(v[203] == 17);
8242 assert_or_panic(v[204] == 18);
8243 assert_or_panic(v[205] == 19);
8244 assert_or_panic(v[206] == 20);
8245 assert_or_panic(v[207] == 21);
8246 assert_or_panic(v[208] == 22);
8247 assert_or_panic(v[209] == 23);
8248 assert_or_panic(v[210] == 24);
8249 assert_or_panic(v[211] == 25);
8250 assert_or_panic(v[212] == 26);
8251 assert_or_panic(v[213] == 27);
8252 assert_or_panic(v[214] == 28);
8253 assert_or_panic(v[215] == 29);
8254 assert_or_panic(v[216] == 30);
8255 assert_or_panic(v[217] == 31);
8256 assert_or_panic(v[218] == 32);
8257 assert_or_panic(v[219] == 33);
8258 assert_or_panic(v[220] == 34);
8259 assert_or_panic(v[221] == 35);
8260 assert_or_panic(v[222] == 36);
8261 assert_or_panic(v[223] == 37);
8262 assert_or_panic(v[224] == 38);
8263 assert_or_panic(v[225] == 39);
8264 assert_or_panic(v[226] == 40);
8265 assert_or_panic(v[227] == 41);
8266 assert_or_panic(v[228] == 42);
8267 assert_or_panic(v[229] == 43);
8268 assert_or_panic(v[230] == 44);
8269 assert_or_panic(v[231] == 45);
8270 assert_or_panic(v[232] == 46);
8271 assert_or_panic(v[233] == 47);
8272 assert_or_panic(v[234] == 48);
8273 assert_or_panic(v[235] == 49);
8274 assert_or_panic(v[236] == 50);
8275 assert_or_panic(v[237] == 51);
8276 assert_or_panic(v[238] == 52);
8277 assert_or_panic(v[239] == 53);
8278 assert_or_panic(v[240] == 54);
8279 assert_or_panic(v[241] == 55);
8280 assert_or_panic(v[242] == 56);
8281 assert_or_panic(v[243] == 57);
8282 assert_or_panic(v[244] == 58);
8283 assert_or_panic(v[245] == 59);
8284 assert_or_panic(v[246] == 60);
8285 assert_or_panic(v[247] == 61);
8286 assert_or_panic(v[248] == 62);
8287 assert_or_panic(v[249] == 63);
8288 assert_or_panic(v[250] == 64);
8289 assert_or_panic(v[251] == 65);
8290 assert_or_panic(v[252] == 66);
8291 assert_or_panic(v[253] == 67);
8292 assert_or_panic(v[254] == 68);
8293 assert_or_panic(v[255] == 69);
8294 assert_or_panic(v[256] == 70);
8295 assert_or_panic(v[257] == 71);
8296 assert_or_panic(v[258] == 72);
8297 assert_or_panic(v[259] == 73);
8298 assert_or_panic(v[260] == 74);
8299 assert_or_panic(v[261] == 75);
8300 assert_or_panic(v[262] == 76);
8301 assert_or_panic(v[263] == 77);
8302 assert_or_panic(v[264] == 78);
8303 assert_or_panic(v[265] == 79);
8304 assert_or_panic(v[266] == 80);
8305 assert_or_panic(v[267] == 81);
8306 assert_or_panic(v[268] == 82);
8307 assert_or_panic(v[269] == 83);
8308 assert_or_panic(v[270] == 84);
8309 assert_or_panic(v[271] == 85);
8310 assert_or_panic(v[272] == 86);
8311 assert_or_panic(v[273] == 87);
8312 assert_or_panic(v[274] == 88);
8313 assert_or_panic(v[275] == 89);
8314 assert_or_panic(v[276] == 90);
8315 assert_or_panic(v[277] == 91);
8316 assert_or_panic(v[278] == 92);
8317 assert_or_panic(v[279] == 93);
8318 assert_or_panic(v[280] == 94);
8319 assert_or_panic(v[281] == 95);
8320 assert_or_panic(v[282] == 96);
8321 assert_or_panic(v[283] == 97);
8322 assert_or_panic(v[284] == 98);
8323 assert_or_panic(v[285] == 99);
8324 assert_or_panic(v[286] == 0);
8325 assert_or_panic(v[287] == 1);
8326 assert_or_panic(v[288] == 2);
8327 assert_or_panic(v[289] == 3);
8328 assert_or_panic(v[290] == 4);
8329 assert_or_panic(v[291] == 5);
8330 assert_or_panic(v[292] == 6);
8331 assert_or_panic(v[293] == 7);
8332 assert_or_panic(v[294] == 8);
8333 assert_or_panic(v[295] == 9);
8334 assert_or_panic(v[296] == 10);
8335 assert_or_panic(v[297] == 11);
8336 assert_or_panic(v[298] == 12);
8337 assert_or_panic(v[299] == 13);
8338 assert_or_panic(v[300] == 14);
8339 assert_or_panic(v[301] == 15);
8340 assert_or_panic(v[302] == 16);
8341 assert_or_panic(v[303] == 17);
8342 assert_or_panic(v[304] == 18);
8343 assert_or_panic(v[305] == 19);
8344 assert_or_panic(v[306] == 20);
8345 assert_or_panic(v[307] == 21);
8346 assert_or_panic(v[308] == 22);
8347 assert_or_panic(v[309] == 23);
8348 assert_or_panic(v[310] == 24);
8349 assert_or_panic(v[311] == 25);
8350 assert_or_panic(v[312] == 26);
8351 assert_or_panic(v[313] == 27);
8352 assert_or_panic(v[314] == 28);
8353 assert_or_panic(v[315] == 29);
8354 assert_or_panic(v[316] == 30);
8355 assert_or_panic(v[317] == 31);
8356 assert_or_panic(v[318] == 32);
8357 assert_or_panic(v[319] == 33);
8358 assert_or_panic(v[320] == 34);
8359 assert_or_panic(v[321] == 35);
8360 assert_or_panic(v[322] == 36);
8361 assert_or_panic(v[323] == 37);
8362 assert_or_panic(v[324] == 38);
8363 assert_or_panic(v[325] == 39);
8364 assert_or_panic(v[326] == 40);
8365 assert_or_panic(v[327] == 41);
8366 assert_or_panic(v[328] == 42);
8367 assert_or_panic(v[329] == 43);
8368 assert_or_panic(v[330] == 44);
8369 assert_or_panic(v[331] == 45);
8370 assert_or_panic(v[332] == 46);
8371 assert_or_panic(v[333] == 47);
8372 assert_or_panic(v[334] == 48);
8373 assert_or_panic(v[335] == 49);
8374 assert_or_panic(v[336] == 50);
8375 assert_or_panic(v[337] == 51);
8376 assert_or_panic(v[338] == 52);
8377 assert_or_panic(v[339] == 53);
8378 assert_or_panic(v[340] == 54);
8379 assert_or_panic(v[341] == 55);
8380 assert_or_panic(v[342] == 56);
8381 assert_or_panic(v[343] == 57);
8382 assert_or_panic(v[344] == 58);
8383 assert_or_panic(v[345] == 59);
8384 assert_or_panic(v[346] == 60);
8385 assert_or_panic(v[347] == 61);
8386 assert_or_panic(v[348] == 62);
8387 assert_or_panic(v[349] == 63);
8388 assert_or_panic(v[350] == 64);
8389 assert_or_panic(v[351] == 65);
8390 assert_or_panic(v[352] == 66);
8391 assert_or_panic(v[353] == 67);
8392 assert_or_panic(v[354] == 68);
8393 assert_or_panic(v[355] == 69);
8394 assert_or_panic(v[356] == 70);
8395 assert_or_panic(v[357] == 71);
8396 assert_or_panic(v[358] == 72);
8397 assert_or_panic(v[359] == 73);
8398 assert_or_panic(v[360] == 74);
8399 assert_or_panic(v[361] == 75);
8400 assert_or_panic(v[362] == 76);
8401 assert_or_panic(v[363] == 77);
8402 assert_or_panic(v[364] == 78);
8403 assert_or_panic(v[365] == 79);
8404 assert_or_panic(v[366] == 80);
8405 assert_or_panic(v[367] == 81);
8406 assert_or_panic(v[368] == 82);
8407 assert_or_panic(v[369] == 83);
8408 assert_or_panic(v[370] == 84);
8409 assert_or_panic(v[371] == 85);
8410 assert_or_panic(v[372] == 86);
8411 assert_or_panic(v[373] == 87);
8412 assert_or_panic(v[374] == 88);
8413 assert_or_panic(v[375] == 89);
8414 assert_or_panic(v[376] == 90);
8415 assert_or_panic(v[377] == 91);
8416 assert_or_panic(v[378] == 92);
8417 assert_or_panic(v[379] == 93);
8418 assert_or_panic(v[380] == 94);
8419 assert_or_panic(v[381] == 95);
8420 assert_or_panic(v[382] == 96);
8421 assert_or_panic(v[383] == 97);
8422 assert_or_panic(v[384] == 98);
8423 assert_or_panic(v[385] == 99);
8424 assert_or_panic(v[386] == 0);
8425 assert_or_panic(v[387] == 1);
8426 assert_or_panic(v[388] == 2);
8427 assert_or_panic(v[389] == 3);
8428 assert_or_panic(v[390] == 4);
8429 assert_or_panic(v[391] == 5);
8430 assert_or_panic(v[392] == 6);
8431 assert_or_panic(v[393] == 7);
8432 assert_or_panic(v[394] == 8);
8433 assert_or_panic(v[395] == 9);
8434 assert_or_panic(v[396] == 10);
8435 assert_or_panic(v[397] == 11);
8436 assert_or_panic(v[398] == 12);
8437 assert_or_panic(v[399] == 13);
8438 assert_or_panic(v[400] == 14);
8439 assert_or_panic(v[401] == 15);
8440 assert_or_panic(v[402] == 16);
8441 assert_or_panic(v[403] == 17);
8442 assert_or_panic(v[404] == 18);
8443 assert_or_panic(v[405] == 19);
8444 assert_or_panic(v[406] == 20);
8445 assert_or_panic(v[407] == 21);
8446 assert_or_panic(v[408] == 22);
8447 assert_or_panic(v[409] == 23);
8448 assert_or_panic(v[410] == 24);
8449 assert_or_panic(v[411] == 25);
8450 assert_or_panic(v[412] == 26);
8451 assert_or_panic(v[413] == 27);
8452 assert_or_panic(v[414] == 28);
8453 assert_or_panic(v[415] == 29);
8454 assert_or_panic(v[416] == 30);
8455 assert_or_panic(v[417] == 31);
8456 assert_or_panic(v[418] == 32);
8457 assert_or_panic(v[419] == 33);
8458 assert_or_panic(v[420] == 34);
8459 assert_or_panic(v[421] == 35);
8460 assert_or_panic(v[422] == 36);
8461 assert_or_panic(v[423] == 37);
8462 assert_or_panic(v[424] == 38);
8463 assert_or_panic(v[425] == 39);
8464 assert_or_panic(v[426] == 40);
8465 assert_or_panic(v[427] == 41);
8466 assert_or_panic(v[428] == 42);
8467 assert_or_panic(v[429] == 43);
8468 assert_or_panic(v[430] == 44);
8469 assert_or_panic(v[431] == 45);
8470 assert_or_panic(v[432] == 46);
8471 assert_or_panic(v[433] == 47);
8472 assert_or_panic(v[434] == 48);
8473 assert_or_panic(v[435] == 49);
8474 assert_or_panic(v[436] == 50);
8475 assert_or_panic(v[437] == 51);
8476 assert_or_panic(v[438] == 52);
8477 assert_or_panic(v[439] == 53);
8478 assert_or_panic(v[440] == 54);
8479 assert_or_panic(v[441] == 55);
8480 assert_or_panic(v[442] == 56);
8481 assert_or_panic(v[443] == 57);
8482 assert_or_panic(v[444] == 58);
8483 assert_or_panic(v[445] == 59);
8484 assert_or_panic(v[446] == 60);
8485 assert_or_panic(v[447] == 61);
8486 assert_or_panic(v[448] == 62);
8487 assert_or_panic(v[449] == 63);
8488 assert_or_panic(v[450] == 64);
8489 assert_or_panic(v[451] == 65);
8490 assert_or_panic(v[452] == 66);
8491 assert_or_panic(v[453] == 67);
8492 assert_or_panic(v[454] == 68);
8493 assert_or_panic(v[455] == 69);
8494 assert_or_panic(v[456] == 70);
8495 assert_or_panic(v[457] == 71);
8496 assert_or_panic(v[458] == 72);
8497 assert_or_panic(v[459] == 73);
8498 assert_or_panic(v[460] == 74);
8499 assert_or_panic(v[461] == 75);
8500 assert_or_panic(v[462] == 76);
8501 assert_or_panic(v[463] == 77);
8502 assert_or_panic(v[464] == 78);
8503 assert_or_panic(v[465] == 79);
8504 assert_or_panic(v[466] == 80);
8505 assert_or_panic(v[467] == 81);
8506 assert_or_panic(v[468] == 82);
8507 assert_or_panic(v[469] == 83);
8508 assert_or_panic(v[470] == 84);
8509 assert_or_panic(v[471] == 85);
8510 assert_or_panic(v[472] == 86);
8511 assert_or_panic(v[473] == 87);
8512 assert_or_panic(v[474] == 88);
8513 assert_or_panic(v[475] == 89);
8514 assert_or_panic(v[476] == 90);
8515 assert_or_panic(v[477] == 91);
8516 assert_or_panic(v[478] == 92);
8517 assert_or_panic(v[479] == 93);
8518 assert_or_panic(v[480] == 94);
8519 assert_or_panic(v[481] == 95);
8520 assert_or_panic(v[482] == 96);
8521 assert_or_panic(v[483] == 97);
8522 assert_or_panic(v[484] == 98);
8523 assert_or_panic(v[485] == 99);
8524 assert_or_panic(v[486] == 0);
8525 assert_or_panic(v[487] == 1);
8526 assert_or_panic(v[488] == 2);
8527 assert_or_panic(v[489] == 3);
8528 assert_or_panic(v[490] == 4);
8529 assert_or_panic(v[491] == 5);
8530 assert_or_panic(v[492] == 6);
8531 assert_or_panic(v[493] == 7);
8532 assert_or_panic(v[494] == 8);
8533 assert_or_panic(v[495] == 9);
8534 assert_or_panic(v[496] == 10);
8535 assert_or_panic(v[497] == 11);
8536 assert_or_panic(v[498] == 12);
8537 assert_or_panic(v[499] == 13);
8538 assert_or_panic(v[500] == 14);
8539 assert_or_panic(v[501] == 15);
8540 assert_or_panic(v[502] == 16);
8541 assert_or_panic(v[503] == 17);
8542 assert_or_panic(v[504] == 18);
8543 assert_or_panic(v[505] == 19);
8544 assert_or_panic(v[506] == 20);
8545 assert_or_panic(v[507] == 21);
8546 assert_or_panic(v[508] == 22);
8547 assert_or_panic(v[509] == 23);
8548 assert_or_panic(v[510] == 24);
8549 assert_or_panic(v[511] == 25);
8550 zig_vector_512_u8((Vector_512_u8){
8551 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
8552 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
8553 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
8554 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
8555 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
8556 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
8557 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
8558 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
8559 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
8560 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
8561 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
8562 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
8563 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
8564 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
8565 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
8566 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
8567 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
8568 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
8569 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
8570 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
8571 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
8572 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
8573 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
8574 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
8575 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
8576 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
8577 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
8578 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
8579 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
8580 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
8581 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
8582 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
8583 }, 512);
8584}
8585
8586typedef uint16_t Vector_1_u16 __attribute__((vector_size(1 * sizeof(uint16_t))));
8587
8588Vector_1_u16 zig_ret_vector_1_u16(void);
8589void zig_vector_1_u16(Vector_1_u16, size_t);
8590
8591Vector_1_u16 c_ret_vector_1_u16(void) {
8592 return (Vector_1_u16){ 3 };
8593}
8594void c_vector_1_u16(Vector_1_u16 v, size_t i) {
8595 assert_or_panic(v[0] == 4);
8596 assert_or_panic(i == 1);
8597}
8598void c_test_vector_1_u16(void) {
8599 Vector_1_u16 v = zig_ret_vector_1_u16();
8600 assert_or_panic(v[0] == 1);
8601 zig_vector_1_u16((Vector_1_u16){ 2 }, 1);
8602}
8603
8604typedef uint16_t Vector_2_u16 __attribute__((vector_size(2 * sizeof(uint16_t))));
8605
8606Vector_2_u16 zig_ret_vector_2_u16(void);
8607void zig_vector_2_u16(Vector_2_u16, size_t);
8608
8609Vector_2_u16 c_ret_vector_2_u16(void) {
8610 return (Vector_2_u16){ 9, 10 };
8611}
8612void c_vector_2_u16(Vector_2_u16 v, size_t i) {
8613 assert_or_panic(v[0] == 11);
8614 assert_or_panic(v[1] == 12);
8615 assert_or_panic(i == 2);
8616}
8617void c_test_vector_2_u16(void) {
8618 Vector_2_u16 v = zig_ret_vector_2_u16();
8619 assert_or_panic(v[0] == 5);
8620 assert_or_panic(v[1] == 6);
8621 zig_vector_2_u16((Vector_2_u16){ 7, 8 }, 2);
8622}
8623
8624typedef uint16_t Vector_3_u16 __attribute__((vector_size(3 * sizeof(uint16_t))));
8625
8626Vector_3_u16 zig_ret_vector_3_u16(void);
8627void zig_vector_3_u16(Vector_3_u16, size_t);
8628
8629Vector_3_u16 c_ret_vector_3_u16(void) {
8630 return (Vector_3_u16){ 19, 20, 21 };
8631}
8632void c_vector_3_u16(Vector_3_u16 v, size_t i) {
8633 assert_or_panic(v[0] == 22);
8634 assert_or_panic(v[1] == 23);
8635 assert_or_panic(v[2] == 24);
8636 assert_or_panic(i == 3);
8637}
8638void c_test_vector_3_u16(void) {
8639 Vector_3_u16 v = zig_ret_vector_3_u16();
8640 assert_or_panic(v[0] == 13);
8641 assert_or_panic(v[1] == 14);
8642 assert_or_panic(v[2] == 15);
8643 zig_vector_3_u16((Vector_3_u16){ 16, 17, 18 }, 3);
8644}
8645
8646typedef uint16_t Vector_4_u16 __attribute__((vector_size(4 * sizeof(uint16_t))));
8647
8648Vector_4_u16 zig_ret_vector_4_u16(void);
8649
8650void zig_vector_4_u16(Vector_4_u16, size_t);
8651void zig_vector_4_u16_vector_4_u16(Vector_4_u16, Vector_4_u16, size_t);
8652
8653Vector_4_u16 c_ret_vector_4_u16(void) {
8654 return (Vector_4_u16){ 41, 42, 43, 44 };
8655}
8656void c_vector_4_u16(Vector_4_u16 v, size_t i) {
8657 assert_or_panic(v[0] == 45);
8658 assert_or_panic(v[1] == 46);
8659 assert_or_panic(v[2] == 47);
8660 assert_or_panic(v[3] == 48);
8661 assert_or_panic(i == 4);
8662}
8663void c_vector_4_u16_vector_4_u16(Vector_4_u16 v0, Vector_4_u16 v1, size_t i) {
8664 assert_or_panic(v0[0] == 49);
8665 assert_or_panic(v0[1] == 50);
8666 assert_or_panic(v0[2] == 51);
8667 assert_or_panic(v0[3] == 52);
8668 assert_or_panic(v1[0] == 53);
8669 assert_or_panic(v1[1] == 54);
8670 assert_or_panic(v1[2] == 55);
8671 assert_or_panic(v1[3] == 56);
8672 assert_or_panic(i == 8);
8673}
8674void c_test_vector_4_u16(void) {
8675 Vector_4_u16 v = zig_ret_vector_4_u16();
8676 assert_or_panic(v[0] == 25);
8677 assert_or_panic(v[1] == 26);
8678 assert_or_panic(v[2] == 27);
8679 assert_or_panic(v[3] == 28);
8680 zig_vector_4_u16((Vector_4_u16){ 29, 30, 31, 32 }, 4);
8681 zig_vector_4_u16_vector_4_u16((Vector_4_u16){ 33, 34, 35, 36 }, (Vector_4_u16){ 37, 38, 39, 40 }, 8);
8682}
8683
8684typedef uint16_t Vector_6_u16 __attribute__((vector_size(6 * sizeof(uint16_t))));
8685
8686Vector_6_u16 zig_ret_vector_6_u16(void);
8687void zig_vector_6_u16(Vector_6_u16, size_t);
8688
8689Vector_6_u16 c_ret_vector_6_u16(void) {
8690 return (Vector_6_u16){ 53, 54, 55, 56, 57, 58 };
8691}
8692void c_vector_6_u16(Vector_6_u16 v, size_t i) {
8693 assert_or_panic(v[0] == 59);
8694 assert_or_panic(v[1] == 60);
8695 assert_or_panic(v[2] == 61);
8696 assert_or_panic(v[3] == 62);
8697 assert_or_panic(v[4] == 63);
8698 assert_or_panic(v[5] == 64);
8699 assert_or_panic(i == 6);
8700}
8701void c_test_vector_6_u16(void) {
8702 Vector_6_u16 v = zig_ret_vector_6_u16();
8703 assert_or_panic(v[0] == 41);
8704 assert_or_panic(v[1] == 42);
8705 assert_or_panic(v[2] == 43);
8706 assert_or_panic(v[3] == 44);
8707 assert_or_panic(v[4] == 45);
8708 assert_or_panic(v[5] == 46);
8709 zig_vector_6_u16((Vector_6_u16){ 47, 48, 49, 50, 51, 52 }, 6);
8710}
8711
8712typedef uint16_t Vector_8_u16 __attribute__((vector_size(8 * sizeof(uint16_t))));
8713
8714Vector_8_u16 zig_ret_vector_8_u16(void);
8715void zig_vector_8_u16(Vector_8_u16, size_t);
8716
8717Vector_8_u16 c_ret_vector_8_u16(void) {
8718 return (Vector_8_u16){ 81, 82, 83, 84, 85, 86, 87, 88 };
8719}
8720void c_vector_8_u16(Vector_8_u16 v, size_t i) {
8721 assert_or_panic(v[0] == 89);
8722 assert_or_panic(v[1] == 90);
8723 assert_or_panic(v[2] == 91);
8724 assert_or_panic(v[3] == 92);
8725 assert_or_panic(v[4] == 93);
8726 assert_or_panic(v[5] == 94);
8727 assert_or_panic(v[6] == 95);
8728 assert_or_panic(v[7] == 96);
8729 assert_or_panic(i == 8);
8730}
8731void c_test_vector_8_u16(void) {
8732 Vector_8_u16 v = zig_ret_vector_8_u16();
8733 assert_or_panic(v[0] == 65);
8734 assert_or_panic(v[1] == 66);
8735 assert_or_panic(v[2] == 67);
8736 assert_or_panic(v[3] == 68);
8737 assert_or_panic(v[4] == 69);
8738 assert_or_panic(v[5] == 70);
8739 assert_or_panic(v[6] == 71);
8740 assert_or_panic(v[7] == 72);
8741 zig_vector_8_u16((Vector_8_u16){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
8742}
8743
8744typedef uint16_t Vector_12_u16 __attribute__((vector_size(12 * sizeof(uint16_t))));
8745
8746Vector_12_u16 zig_ret_vector_12_u16(void);
8747void zig_vector_12_u16(Vector_12_u16, size_t);
8748
8749Vector_12_u16 c_ret_vector_12_u16(void) {
8750 return (Vector_12_u16){ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132 };
8751}
8752void c_vector_12_u16(Vector_12_u16 v, size_t i) {
8753 assert_or_panic(v[0] == 133);
8754 assert_or_panic(v[1] == 134);
8755 assert_or_panic(v[2] == 135);
8756 assert_or_panic(v[3] == 136);
8757 assert_or_panic(v[4] == 137);
8758 assert_or_panic(v[5] == 138);
8759 assert_or_panic(v[6] == 139);
8760 assert_or_panic(v[7] == 140);
8761 assert_or_panic(v[8] == 141);
8762 assert_or_panic(v[9] == 142);
8763 assert_or_panic(v[10] == 143);
8764 assert_or_panic(v[11] == 144);
8765 assert_or_panic(i == 12);
8766}
8767void c_test_vector_12_u16(void) {
8768 Vector_12_u16 v = zig_ret_vector_12_u16();
8769 assert_or_panic(v[0] == 97);
8770 assert_or_panic(v[1] == 98);
8771 assert_or_panic(v[2] == 99);
8772 assert_or_panic(v[3] == 100);
8773 assert_or_panic(v[4] == 101);
8774 assert_or_panic(v[5] == 102);
8775 assert_or_panic(v[6] == 103);
8776 assert_or_panic(v[7] == 104);
8777 assert_or_panic(v[8] == 105);
8778 assert_or_panic(v[9] == 106);
8779 assert_or_panic(v[10] == 107);
8780 assert_or_panic(v[11] == 108);
8781 zig_vector_12_u16((Vector_12_u16){ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120 }, 12);
8782}
8783
8784typedef uint16_t Vector_16_u16 __attribute__((vector_size(16 * sizeof(uint16_t))));
8785
8786Vector_16_u16 zig_ret_vector_16_u16(void);
8787void zig_vector_16_u16(Vector_16_u16, size_t);
8788
8789Vector_16_u16 c_ret_vector_16_u16(void) {
8790 return (Vector_16_u16){ 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192 };
8791}
8792void c_vector_16_u16(Vector_16_u16 v, size_t i) {
8793 assert_or_panic(v[0] == 193);
8794 assert_or_panic(v[1] == 194);
8795 assert_or_panic(v[2] == 195);
8796 assert_or_panic(v[3] == 196);
8797 assert_or_panic(v[4] == 197);
8798 assert_or_panic(v[5] == 198);
8799 assert_or_panic(v[6] == 199);
8800 assert_or_panic(v[7] == 200);
8801 assert_or_panic(v[8] == 201);
8802 assert_or_panic(v[9] == 202);
8803 assert_or_panic(v[10] == 203);
8804 assert_or_panic(v[11] == 204);
8805 assert_or_panic(v[12] == 205);
8806 assert_or_panic(v[13] == 206);
8807 assert_or_panic(v[14] == 207);
8808 assert_or_panic(v[15] == 208);
8809 assert_or_panic(i == 16);
8810}
8811void c_test_vector_16_u16(void) {
8812 Vector_16_u16 v = zig_ret_vector_16_u16();
8813 assert_or_panic(v[0] == 145);
8814 assert_or_panic(v[1] == 146);
8815 assert_or_panic(v[2] == 147);
8816 assert_or_panic(v[3] == 148);
8817 assert_or_panic(v[4] == 149);
8818 assert_or_panic(v[5] == 150);
8819 assert_or_panic(v[6] == 151);
8820 assert_or_panic(v[7] == 152);
8821 assert_or_panic(v[8] == 153);
8822 assert_or_panic(v[9] == 154);
8823 assert_or_panic(v[10] == 155);
8824 assert_or_panic(v[11] == 156);
8825 assert_or_panic(v[12] == 157);
8826 assert_or_panic(v[13] == 158);
8827 assert_or_panic(v[14] == 159);
8828 assert_or_panic(v[15] == 160);
8829 zig_vector_16_u16((Vector_16_u16){ 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176 }, 16);
8830}
8831
8832typedef uint16_t Vector_24_u16 __attribute__((vector_size(24 * sizeof(uint16_t))));
8833
8834Vector_24_u16 zig_ret_vector_24_u16(void);
8835void zig_vector_24_u16(Vector_24_u16, size_t);
8836
8837Vector_24_u16 c_ret_vector_24_u16(void) {
8838 return (Vector_24_u16){
8839 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272,
8840 273, 274, 275, 276, 277, 278, 279, 280,
8841 };
8842}
8843void c_vector_24_u16(Vector_24_u16 v, size_t i) {
8844 assert_or_panic(v[0] == 281);
8845 assert_or_panic(v[1] == 282);
8846 assert_or_panic(v[2] == 283);
8847 assert_or_panic(v[3] == 284);
8848 assert_or_panic(v[4] == 285);
8849 assert_or_panic(v[5] == 286);
8850 assert_or_panic(v[6] == 287);
8851 assert_or_panic(v[7] == 288);
8852 assert_or_panic(v[8] == 289);
8853 assert_or_panic(v[9] == 290);
8854 assert_or_panic(v[10] == 291);
8855 assert_or_panic(v[11] == 292);
8856 assert_or_panic(v[12] == 293);
8857 assert_or_panic(v[13] == 294);
8858 assert_or_panic(v[14] == 295);
8859 assert_or_panic(v[15] == 296);
8860 assert_or_panic(v[16] == 297);
8861 assert_or_panic(v[17] == 298);
8862 assert_or_panic(v[18] == 299);
8863 assert_or_panic(v[19] == 300);
8864 assert_or_panic(v[20] == 301);
8865 assert_or_panic(v[21] == 302);
8866 assert_or_panic(v[22] == 303);
8867 assert_or_panic(v[23] == 304);
8868 assert_or_panic(i == 24);
8869}
8870void c_test_vector_24_u16(void) {
8871 Vector_24_u16 v = zig_ret_vector_24_u16();
8872 assert_or_panic(v[0] == 209);
8873 assert_or_panic(v[1] == 210);
8874 assert_or_panic(v[2] == 211);
8875 assert_or_panic(v[3] == 212);
8876 assert_or_panic(v[4] == 213);
8877 assert_or_panic(v[5] == 214);
8878 assert_or_panic(v[6] == 215);
8879 assert_or_panic(v[7] == 216);
8880 assert_or_panic(v[8] == 217);
8881 assert_or_panic(v[9] == 218);
8882 assert_or_panic(v[10] == 219);
8883 assert_or_panic(v[11] == 220);
8884 assert_or_panic(v[12] == 221);
8885 assert_or_panic(v[13] == 222);
8886 assert_or_panic(v[14] == 223);
8887 assert_or_panic(v[15] == 224);
8888 assert_or_panic(v[16] == 225);
8889 assert_or_panic(v[17] == 226);
8890 assert_or_panic(v[18] == 227);
8891 assert_or_panic(v[19] == 228);
8892 assert_or_panic(v[20] == 229);
8893 assert_or_panic(v[21] == 230);
8894 assert_or_panic(v[22] == 231);
8895 assert_or_panic(v[23] == 232);
8896 zig_vector_24_u16((Vector_24_u16){
8897 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248,
8898 249, 250, 251, 252, 253, 254, 255, 256,
8899 }, 24);
8900}
8901
8902typedef uint16_t Vector_32_u16 __attribute__((vector_size(32 * sizeof(uint16_t))));
8903
8904Vector_32_u16 zig_ret_vector_32_u16(void);
8905void zig_vector_32_u16(Vector_32_u16, size_t);
8906
8907Vector_32_u16 c_ret_vector_32_u16(void) {
8908 return (Vector_32_u16){
8909 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
8910 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400,
8911 };
8912}
8913void c_vector_32_u16(Vector_32_u16 v, size_t i) {
8914 assert_or_panic(v[0] == 401);
8915 assert_or_panic(v[1] == 402);
8916 assert_or_panic(v[2] == 403);
8917 assert_or_panic(v[3] == 404);
8918 assert_or_panic(v[4] == 405);
8919 assert_or_panic(v[5] == 406);
8920 assert_or_panic(v[6] == 407);
8921 assert_or_panic(v[7] == 408);
8922 assert_or_panic(v[8] == 409);
8923 assert_or_panic(v[9] == 410);
8924 assert_or_panic(v[10] == 411);
8925 assert_or_panic(v[11] == 412);
8926 assert_or_panic(v[12] == 413);
8927 assert_or_panic(v[13] == 414);
8928 assert_or_panic(v[14] == 415);
8929 assert_or_panic(v[15] == 416);
8930 assert_or_panic(v[16] == 417);
8931 assert_or_panic(v[17] == 418);
8932 assert_or_panic(v[18] == 419);
8933 assert_or_panic(v[19] == 420);
8934 assert_or_panic(v[20] == 421);
8935 assert_or_panic(v[21] == 422);
8936 assert_or_panic(v[22] == 423);
8937 assert_or_panic(v[23] == 424);
8938 assert_or_panic(v[24] == 425);
8939 assert_or_panic(v[25] == 426);
8940 assert_or_panic(v[26] == 427);
8941 assert_or_panic(v[27] == 428);
8942 assert_or_panic(v[28] == 429);
8943 assert_or_panic(v[29] == 430);
8944 assert_or_panic(v[30] == 431);
8945 assert_or_panic(v[31] == 432);
8946 assert_or_panic(i == 32);
8947}
8948void c_test_vector_32_u16(void) {
8949 Vector_32_u16 v = zig_ret_vector_32_u16();
8950 assert_or_panic(v[0] == 305);
8951 assert_or_panic(v[1] == 306);
8952 assert_or_panic(v[2] == 307);
8953 assert_or_panic(v[3] == 308);
8954 assert_or_panic(v[4] == 309);
8955 assert_or_panic(v[5] == 310);
8956 assert_or_panic(v[6] == 311);
8957 assert_or_panic(v[7] == 312);
8958 assert_or_panic(v[8] == 313);
8959 assert_or_panic(v[9] == 314);
8960 assert_or_panic(v[10] == 315);
8961 assert_or_panic(v[11] == 316);
8962 assert_or_panic(v[12] == 317);
8963 assert_or_panic(v[13] == 318);
8964 assert_or_panic(v[14] == 319);
8965 assert_or_panic(v[15] == 320);
8966 assert_or_panic(v[16] == 321);
8967 assert_or_panic(v[17] == 322);
8968 assert_or_panic(v[18] == 323);
8969 assert_or_panic(v[19] == 324);
8970 assert_or_panic(v[20] == 325);
8971 assert_or_panic(v[21] == 326);
8972 assert_or_panic(v[22] == 327);
8973 assert_or_panic(v[23] == 328);
8974 assert_or_panic(v[24] == 329);
8975 assert_or_panic(v[25] == 330);
8976 assert_or_panic(v[26] == 331);
8977 assert_or_panic(v[27] == 332);
8978 assert_or_panic(v[28] == 333);
8979 assert_or_panic(v[29] == 334);
8980 assert_or_panic(v[30] == 335);
8981 assert_or_panic(v[31] == 336);
8982 zig_vector_32_u16((Vector_32_u16){
8983 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352,
8984 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
8985 }, 32);
8986}
8987
8988typedef uint16_t Vector_48_u16 __attribute__((vector_size(48 * sizeof(uint16_t))));
8989
8990Vector_48_u16 zig_ret_vector_48_u16(void);
8991void zig_vector_48_u16(Vector_48_u16, size_t);
8992
8993Vector_48_u16 c_ret_vector_48_u16(void) {
8994 return (Vector_48_u16){
8995 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544,
8996 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560,
8997 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576,
8998 };
8999}
9000void c_vector_48_u16(Vector_48_u16 v, size_t i) {
9001 assert_or_panic(v[0] == 577);
9002 assert_or_panic(v[1] == 578);
9003 assert_or_panic(v[2] == 579);
9004 assert_or_panic(v[3] == 580);
9005 assert_or_panic(v[4] == 581);
9006 assert_or_panic(v[5] == 582);
9007 assert_or_panic(v[6] == 583);
9008 assert_or_panic(v[7] == 584);
9009 assert_or_panic(v[8] == 585);
9010 assert_or_panic(v[9] == 586);
9011 assert_or_panic(v[10] == 587);
9012 assert_or_panic(v[11] == 588);
9013 assert_or_panic(v[12] == 589);
9014 assert_or_panic(v[13] == 590);
9015 assert_or_panic(v[14] == 591);
9016 assert_or_panic(v[15] == 592);
9017 assert_or_panic(v[16] == 593);
9018 assert_or_panic(v[17] == 594);
9019 assert_or_panic(v[18] == 595);
9020 assert_or_panic(v[19] == 596);
9021 assert_or_panic(v[20] == 597);
9022 assert_or_panic(v[21] == 598);
9023 assert_or_panic(v[22] == 599);
9024 assert_or_panic(v[23] == 600);
9025 assert_or_panic(v[24] == 601);
9026 assert_or_panic(v[25] == 602);
9027 assert_or_panic(v[26] == 603);
9028 assert_or_panic(v[27] == 604);
9029 assert_or_panic(v[28] == 605);
9030 assert_or_panic(v[29] == 606);
9031 assert_or_panic(v[30] == 607);
9032 assert_or_panic(v[31] == 608);
9033 assert_or_panic(v[32] == 609);
9034 assert_or_panic(v[33] == 610);
9035 assert_or_panic(v[34] == 611);
9036 assert_or_panic(v[35] == 612);
9037 assert_or_panic(v[36] == 613);
9038 assert_or_panic(v[37] == 614);
9039 assert_or_panic(v[38] == 615);
9040 assert_or_panic(v[39] == 616);
9041 assert_or_panic(v[40] == 617);
9042 assert_or_panic(v[41] == 618);
9043 assert_or_panic(v[42] == 619);
9044 assert_or_panic(v[43] == 620);
9045 assert_or_panic(v[44] == 621);
9046 assert_or_panic(v[45] == 622);
9047 assert_or_panic(v[46] == 623);
9048 assert_or_panic(v[47] == 624);
9049 assert_or_panic(i == 48);
9050}
9051void c_test_vector_48_u16(void) {
9052 Vector_48_u16 v = zig_ret_vector_48_u16();
9053 assert_or_panic(v[0] == 433);
9054 assert_or_panic(v[1] == 434);
9055 assert_or_panic(v[2] == 435);
9056 assert_or_panic(v[3] == 436);
9057 assert_or_panic(v[4] == 437);
9058 assert_or_panic(v[5] == 438);
9059 assert_or_panic(v[6] == 439);
9060 assert_or_panic(v[7] == 440);
9061 assert_or_panic(v[8] == 441);
9062 assert_or_panic(v[9] == 442);
9063 assert_or_panic(v[10] == 443);
9064 assert_or_panic(v[11] == 444);
9065 assert_or_panic(v[12] == 445);
9066 assert_or_panic(v[13] == 446);
9067 assert_or_panic(v[14] == 447);
9068 assert_or_panic(v[15] == 448);
9069 assert_or_panic(v[16] == 449);
9070 assert_or_panic(v[17] == 450);
9071 assert_or_panic(v[18] == 451);
9072 assert_or_panic(v[19] == 452);
9073 assert_or_panic(v[20] == 453);
9074 assert_or_panic(v[21] == 454);
9075 assert_or_panic(v[22] == 455);
9076 assert_or_panic(v[23] == 456);
9077 assert_or_panic(v[24] == 457);
9078 assert_or_panic(v[25] == 458);
9079 assert_or_panic(v[26] == 459);
9080 assert_or_panic(v[27] == 460);
9081 assert_or_panic(v[28] == 461);
9082 assert_or_panic(v[29] == 462);
9083 assert_or_panic(v[30] == 463);
9084 assert_or_panic(v[31] == 464);
9085 assert_or_panic(v[32] == 465);
9086 assert_or_panic(v[33] == 466);
9087 assert_or_panic(v[34] == 467);
9088 assert_or_panic(v[35] == 468);
9089 assert_or_panic(v[36] == 469);
9090 assert_or_panic(v[37] == 470);
9091 assert_or_panic(v[38] == 471);
9092 assert_or_panic(v[39] == 472);
9093 assert_or_panic(v[40] == 473);
9094 assert_or_panic(v[41] == 474);
9095 assert_or_panic(v[42] == 475);
9096 assert_or_panic(v[43] == 476);
9097 assert_or_panic(v[44] == 477);
9098 assert_or_panic(v[45] == 478);
9099 assert_or_panic(v[46] == 479);
9100 assert_or_panic(v[47] == 480);
9101 zig_vector_48_u16((Vector_48_u16){
9102 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496,
9103 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512,
9104 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528,
9105 }, 48);
9106}
9107
9108typedef uint16_t Vector_64_u16 __attribute__((vector_size(64 * sizeof(uint16_t))));
9109
9110Vector_64_u16 zig_ret_vector_64_u16(void);
9111void zig_vector_64_u16(Vector_64_u16, size_t);
9112
9113Vector_64_u16 c_ret_vector_64_u16(void) {
9114 return (Vector_64_u16){
9115 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768,
9116 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,
9117 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
9118 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816,
9119 };
9120}
9121void c_vector_64_u16(Vector_64_u16 v, size_t i) {
9122 assert_or_panic(v[0] == 817);
9123 assert_or_panic(v[1] == 818);
9124 assert_or_panic(v[2] == 819);
9125 assert_or_panic(v[3] == 820);
9126 assert_or_panic(v[4] == 821);
9127 assert_or_panic(v[5] == 822);
9128 assert_or_panic(v[6] == 823);
9129 assert_or_panic(v[7] == 824);
9130 assert_or_panic(v[8] == 825);
9131 assert_or_panic(v[9] == 826);
9132 assert_or_panic(v[10] == 827);
9133 assert_or_panic(v[11] == 828);
9134 assert_or_panic(v[12] == 829);
9135 assert_or_panic(v[13] == 830);
9136 assert_or_panic(v[14] == 831);
9137 assert_or_panic(v[15] == 832);
9138 assert_or_panic(v[16] == 833);
9139 assert_or_panic(v[17] == 834);
9140 assert_or_panic(v[18] == 835);
9141 assert_or_panic(v[19] == 836);
9142 assert_or_panic(v[20] == 837);
9143 assert_or_panic(v[21] == 838);
9144 assert_or_panic(v[22] == 839);
9145 assert_or_panic(v[23] == 840);
9146 assert_or_panic(v[24] == 841);
9147 assert_or_panic(v[25] == 842);
9148 assert_or_panic(v[26] == 843);
9149 assert_or_panic(v[27] == 844);
9150 assert_or_panic(v[28] == 845);
9151 assert_or_panic(v[29] == 846);
9152 assert_or_panic(v[30] == 847);
9153 assert_or_panic(v[31] == 848);
9154 assert_or_panic(v[32] == 849);
9155 assert_or_panic(v[33] == 850);
9156 assert_or_panic(v[34] == 851);
9157 assert_or_panic(v[35] == 852);
9158 assert_or_panic(v[36] == 853);
9159 assert_or_panic(v[37] == 854);
9160 assert_or_panic(v[38] == 855);
9161 assert_or_panic(v[39] == 856);
9162 assert_or_panic(v[40] == 857);
9163 assert_or_panic(v[41] == 858);
9164 assert_or_panic(v[42] == 859);
9165 assert_or_panic(v[43] == 860);
9166 assert_or_panic(v[44] == 861);
9167 assert_or_panic(v[45] == 862);
9168 assert_or_panic(v[46] == 863);
9169 assert_or_panic(v[47] == 864);
9170 assert_or_panic(v[48] == 865);
9171 assert_or_panic(v[49] == 866);
9172 assert_or_panic(v[50] == 867);
9173 assert_or_panic(v[51] == 868);
9174 assert_or_panic(v[52] == 869);
9175 assert_or_panic(v[53] == 870);
9176 assert_or_panic(v[54] == 871);
9177 assert_or_panic(v[55] == 872);
9178 assert_or_panic(v[56] == 873);
9179 assert_or_panic(v[57] == 874);
9180 assert_or_panic(v[58] == 875);
9181 assert_or_panic(v[59] == 876);
9182 assert_or_panic(v[60] == 877);
9183 assert_or_panic(v[61] == 878);
9184 assert_or_panic(v[62] == 879);
9185 assert_or_panic(v[63] == 880);
9186 assert_or_panic(i == 64);
9187}
9188void c_test_vector_64_u16(void) {
9189 Vector_64_u16 v = zig_ret_vector_64_u16();
9190 assert_or_panic(v[0] == 625);
9191 assert_or_panic(v[1] == 626);
9192 assert_or_panic(v[2] == 627);
9193 assert_or_panic(v[3] == 628);
9194 assert_or_panic(v[4] == 629);
9195 assert_or_panic(v[5] == 630);
9196 assert_or_panic(v[6] == 631);
9197 assert_or_panic(v[7] == 632);
9198 assert_or_panic(v[8] == 633);
9199 assert_or_panic(v[9] == 634);
9200 assert_or_panic(v[10] == 635);
9201 assert_or_panic(v[11] == 636);
9202 assert_or_panic(v[12] == 637);
9203 assert_or_panic(v[13] == 638);
9204 assert_or_panic(v[14] == 639);
9205 assert_or_panic(v[15] == 640);
9206 assert_or_panic(v[16] == 641);
9207 assert_or_panic(v[17] == 642);
9208 assert_or_panic(v[18] == 643);
9209 assert_or_panic(v[19] == 644);
9210 assert_or_panic(v[20] == 645);
9211 assert_or_panic(v[21] == 646);
9212 assert_or_panic(v[22] == 647);
9213 assert_or_panic(v[23] == 648);
9214 assert_or_panic(v[24] == 649);
9215 assert_or_panic(v[25] == 650);
9216 assert_or_panic(v[26] == 651);
9217 assert_or_panic(v[27] == 652);
9218 assert_or_panic(v[28] == 653);
9219 assert_or_panic(v[29] == 654);
9220 assert_or_panic(v[30] == 655);
9221 assert_or_panic(v[31] == 656);
9222 assert_or_panic(v[32] == 657);
9223 assert_or_panic(v[33] == 658);
9224 assert_or_panic(v[34] == 659);
9225 assert_or_panic(v[35] == 660);
9226 assert_or_panic(v[36] == 661);
9227 assert_or_panic(v[37] == 662);
9228 assert_or_panic(v[38] == 663);
9229 assert_or_panic(v[39] == 664);
9230 assert_or_panic(v[40] == 665);
9231 assert_or_panic(v[41] == 666);
9232 assert_or_panic(v[42] == 667);
9233 assert_or_panic(v[43] == 668);
9234 assert_or_panic(v[44] == 669);
9235 assert_or_panic(v[45] == 670);
9236 assert_or_panic(v[46] == 671);
9237 assert_or_panic(v[47] == 672);
9238 assert_or_panic(v[48] == 673);
9239 assert_or_panic(v[49] == 674);
9240 assert_or_panic(v[50] == 675);
9241 assert_or_panic(v[51] == 676);
9242 assert_or_panic(v[52] == 677);
9243 assert_or_panic(v[53] == 678);
9244 assert_or_panic(v[54] == 679);
9245 assert_or_panic(v[55] == 680);
9246 assert_or_panic(v[56] == 681);
9247 assert_or_panic(v[57] == 682);
9248 assert_or_panic(v[58] == 683);
9249 assert_or_panic(v[59] == 684);
9250 assert_or_panic(v[60] == 685);
9251 assert_or_panic(v[61] == 686);
9252 assert_or_panic(v[62] == 687);
9253 assert_or_panic(v[63] == 688);
9254 zig_vector_64_u16((Vector_64_u16){
9255 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704,
9256 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720,
9257 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736,
9258 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752,
9259 }, 64);
9260}
9261
9262typedef uint16_t Vector_96_u16 __attribute__((vector_size(96 * sizeof(uint16_t))));
9263
9264Vector_96_u16 zig_ret_vector_96_u16(void);
9265void zig_vector_96_u16(Vector_96_u16, size_t);
9266
9267Vector_96_u16 c_ret_vector_96_u16(void) {
9268 return (Vector_96_u16){
9269 1082, 1083, 1084, 1085, 1086, 1087, 1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097,
9270 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113,
9271 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129,
9272 1130, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145,
9273 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161,
9274 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177,
9275 };
9276}
9277void c_vector_96_u16(Vector_96_u16 v, size_t i) {
9278 assert_or_panic(v[0] == 1178);
9279 assert_or_panic(v[1] == 1179);
9280 assert_or_panic(v[2] == 1180);
9281 assert_or_panic(v[3] == 1181);
9282 assert_or_panic(v[4] == 1182);
9283 assert_or_panic(v[5] == 1183);
9284 assert_or_panic(v[6] == 1184);
9285 assert_or_panic(v[7] == 1185);
9286 assert_or_panic(v[8] == 1186);
9287 assert_or_panic(v[9] == 1187);
9288 assert_or_panic(v[10] == 1188);
9289 assert_or_panic(v[11] == 1189);
9290 assert_or_panic(v[12] == 1190);
9291 assert_or_panic(v[13] == 1191);
9292 assert_or_panic(v[14] == 1192);
9293 assert_or_panic(v[15] == 1193);
9294 assert_or_panic(v[16] == 1194);
9295 assert_or_panic(v[17] == 1195);
9296 assert_or_panic(v[18] == 1196);
9297 assert_or_panic(v[19] == 1197);
9298 assert_or_panic(v[20] == 1198);
9299 assert_or_panic(v[21] == 1199);
9300 assert_or_panic(v[22] == 1200);
9301 assert_or_panic(v[23] == 1201);
9302 assert_or_panic(v[24] == 1202);
9303 assert_or_panic(v[25] == 1203);
9304 assert_or_panic(v[26] == 1204);
9305 assert_or_panic(v[27] == 1205);
9306 assert_or_panic(v[28] == 1206);
9307 assert_or_panic(v[29] == 1207);
9308 assert_or_panic(v[30] == 1208);
9309 assert_or_panic(v[31] == 1209);
9310 assert_or_panic(v[32] == 1210);
9311 assert_or_panic(v[33] == 1211);
9312 assert_or_panic(v[34] == 1212);
9313 assert_or_panic(v[35] == 1213);
9314 assert_or_panic(v[36] == 1214);
9315 assert_or_panic(v[37] == 1215);
9316 assert_or_panic(v[38] == 1216);
9317 assert_or_panic(v[39] == 1217);
9318 assert_or_panic(v[40] == 1218);
9319 assert_or_panic(v[41] == 1219);
9320 assert_or_panic(v[42] == 1220);
9321 assert_or_panic(v[43] == 1221);
9322 assert_or_panic(v[44] == 1222);
9323 assert_or_panic(v[45] == 1223);
9324 assert_or_panic(v[46] == 1224);
9325 assert_or_panic(v[47] == 1225);
9326 assert_or_panic(v[48] == 1226);
9327 assert_or_panic(v[49] == 1227);
9328 assert_or_panic(v[50] == 1228);
9329 assert_or_panic(v[51] == 1229);
9330 assert_or_panic(v[52] == 1230);
9331 assert_or_panic(v[53] == 1231);
9332 assert_or_panic(v[54] == 1232);
9333 assert_or_panic(v[55] == 1233);
9334 assert_or_panic(v[56] == 1234);
9335 assert_or_panic(v[57] == 1235);
9336 assert_or_panic(v[58] == 1236);
9337 assert_or_panic(v[59] == 1237);
9338 assert_or_panic(v[60] == 1238);
9339 assert_or_panic(v[61] == 1239);
9340 assert_or_panic(v[62] == 1240);
9341 assert_or_panic(v[63] == 1241);
9342 assert_or_panic(v[64] == 1242);
9343 assert_or_panic(v[65] == 1243);
9344 assert_or_panic(v[66] == 1244);
9345 assert_or_panic(v[67] == 1245);
9346 assert_or_panic(v[68] == 1246);
9347 assert_or_panic(v[69] == 1247);
9348 assert_or_panic(v[70] == 1248);
9349 assert_or_panic(v[71] == 1249);
9350 assert_or_panic(v[72] == 1250);
9351 assert_or_panic(v[73] == 1251);
9352 assert_or_panic(v[74] == 1252);
9353 assert_or_panic(v[75] == 1253);
9354 assert_or_panic(v[76] == 1254);
9355 assert_or_panic(v[77] == 1255);
9356 assert_or_panic(v[80] == 1258);
9357 assert_or_panic(v[81] == 1259);
9358 assert_or_panic(v[82] == 1260);
9359 assert_or_panic(v[83] == 1261);
9360 assert_or_panic(v[84] == 1262);
9361 assert_or_panic(v[85] == 1263);
9362 assert_or_panic(v[86] == 1264);
9363 assert_or_panic(v[87] == 1265);
9364 assert_or_panic(v[88] == 1266);
9365 assert_or_panic(v[89] == 1267);
9366 assert_or_panic(v[90] == 1268);
9367 assert_or_panic(v[91] == 1269);
9368 assert_or_panic(v[92] == 1270);
9369 assert_or_panic(v[93] == 1271);
9370 assert_or_panic(v[94] == 1272);
9371 assert_or_panic(v[95] == 1273);
9372 assert_or_panic(i == 96);
9373}
9374void c_test_vector_96_u16(void) {
9375 Vector_96_u16 v = zig_ret_vector_96_u16();
9376 assert_or_panic(v[0] == 890);
9377 assert_or_panic(v[1] == 891);
9378 assert_or_panic(v[2] == 892);
9379 assert_or_panic(v[3] == 893);
9380 assert_or_panic(v[4] == 894);
9381 assert_or_panic(v[5] == 895);
9382 assert_or_panic(v[6] == 896);
9383 assert_or_panic(v[7] == 897);
9384 assert_or_panic(v[8] == 898);
9385 assert_or_panic(v[9] == 899);
9386 assert_or_panic(v[10] == 900);
9387 assert_or_panic(v[11] == 901);
9388 assert_or_panic(v[12] == 902);
9389 assert_or_panic(v[13] == 903);
9390 assert_or_panic(v[14] == 904);
9391 assert_or_panic(v[15] == 905);
9392 assert_or_panic(v[16] == 906);
9393 assert_or_panic(v[17] == 907);
9394 assert_or_panic(v[18] == 908);
9395 assert_or_panic(v[19] == 909);
9396 assert_or_panic(v[20] == 910);
9397 assert_or_panic(v[21] == 911);
9398 assert_or_panic(v[22] == 912);
9399 assert_or_panic(v[23] == 913);
9400 assert_or_panic(v[24] == 914);
9401 assert_or_panic(v[25] == 915);
9402 assert_or_panic(v[26] == 916);
9403 assert_or_panic(v[27] == 917);
9404 assert_or_panic(v[28] == 918);
9405 assert_or_panic(v[29] == 919);
9406 assert_or_panic(v[30] == 920);
9407 assert_or_panic(v[31] == 921);
9408 assert_or_panic(v[32] == 922);
9409 assert_or_panic(v[33] == 923);
9410 assert_or_panic(v[34] == 924);
9411 assert_or_panic(v[35] == 925);
9412 assert_or_panic(v[36] == 926);
9413 assert_or_panic(v[37] == 927);
9414 assert_or_panic(v[38] == 928);
9415 assert_or_panic(v[39] == 929);
9416 assert_or_panic(v[40] == 930);
9417 assert_or_panic(v[41] == 931);
9418 assert_or_panic(v[42] == 932);
9419 assert_or_panic(v[43] == 933);
9420 assert_or_panic(v[44] == 934);
9421 assert_or_panic(v[45] == 935);
9422 assert_or_panic(v[46] == 936);
9423 assert_or_panic(v[47] == 937);
9424 assert_or_panic(v[48] == 938);
9425 assert_or_panic(v[49] == 939);
9426 assert_or_panic(v[50] == 940);
9427 assert_or_panic(v[51] == 941);
9428 assert_or_panic(v[52] == 942);
9429 assert_or_panic(v[53] == 943);
9430 assert_or_panic(v[54] == 944);
9431 assert_or_panic(v[55] == 945);
9432 assert_or_panic(v[56] == 946);
9433 assert_or_panic(v[57] == 947);
9434 assert_or_panic(v[58] == 948);
9435 assert_or_panic(v[59] == 949);
9436 assert_or_panic(v[60] == 950);
9437 assert_or_panic(v[61] == 951);
9438 assert_or_panic(v[62] == 952);
9439 assert_or_panic(v[63] == 953);
9440 assert_or_panic(v[64] == 954);
9441 assert_or_panic(v[65] == 955);
9442 assert_or_panic(v[66] == 956);
9443 assert_or_panic(v[67] == 957);
9444 assert_or_panic(v[68] == 958);
9445 assert_or_panic(v[69] == 959);
9446 assert_or_panic(v[70] == 960);
9447 assert_or_panic(v[71] == 961);
9448 assert_or_panic(v[72] == 962);
9449 assert_or_panic(v[73] == 963);
9450 assert_or_panic(v[74] == 964);
9451 assert_or_panic(v[75] == 965);
9452 assert_or_panic(v[76] == 966);
9453 assert_or_panic(v[77] == 967);
9454 assert_or_panic(v[78] == 968);
9455 assert_or_panic(v[79] == 969);
9456 assert_or_panic(v[80] == 970);
9457 assert_or_panic(v[81] == 971);
9458 assert_or_panic(v[82] == 972);
9459 assert_or_panic(v[83] == 973);
9460 assert_or_panic(v[84] == 974);
9461 assert_or_panic(v[85] == 975);
9462 assert_or_panic(v[86] == 976);
9463 assert_or_panic(v[87] == 977);
9464 assert_or_panic(v[88] == 978);
9465 assert_or_panic(v[89] == 979);
9466 assert_or_panic(v[90] == 980);
9467 assert_or_panic(v[91] == 981);
9468 assert_or_panic(v[92] == 982);
9469 assert_or_panic(v[93] == 983);
9470 assert_or_panic(v[94] == 984);
9471 assert_or_panic(v[95] == 985);
9472 zig_vector_96_u16((Vector_96_u16){
9473 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001,
9474 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017,
9475 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033,
9476 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049,
9477 1050, 1051, 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065,
9478 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081,
9479 }, 96);
9480}
9481
9482typedef uint16_t Vector_128_u16 __attribute__((vector_size(128 * sizeof(uint16_t))));
9483
9484Vector_128_u16 zig_ret_vector_128_u16(void);
9485void zig_vector_128_u16(Vector_128_u16, size_t);
9486
9487Vector_128_u16 c_ret_vector_128_u16(void) {
9488 return (Vector_128_u16){
9489 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544, 1545,
9490 1546, 1547, 1548, 1549, 1550, 1551, 1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560, 1561,
9491 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577,
9492 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1587, 1588, 1589, 1590, 1591, 1592, 1593,
9493 1594, 1595, 1596, 1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609,
9494 1610, 1611, 1612, 1613, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625,
9495 1626, 1627, 1628, 1629, 1630, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641,
9496 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657,
9497 };
9498}
9499void c_vector_128_u16(Vector_128_u16 v, size_t i) {
9500 assert_or_panic(v[0] == 1658);
9501 assert_or_panic(v[1] == 1659);
9502 assert_or_panic(v[2] == 1660);
9503 assert_or_panic(v[3] == 1661);
9504 assert_or_panic(v[4] == 1662);
9505 assert_or_panic(v[5] == 1663);
9506 assert_or_panic(v[6] == 1664);
9507 assert_or_panic(v[7] == 1665);
9508 assert_or_panic(v[8] == 1666);
9509 assert_or_panic(v[9] == 1667);
9510 assert_or_panic(v[10] == 1668);
9511 assert_or_panic(v[11] == 1669);
9512 assert_or_panic(v[12] == 1670);
9513 assert_or_panic(v[13] == 1671);
9514 assert_or_panic(v[14] == 1672);
9515 assert_or_panic(v[15] == 1673);
9516 assert_or_panic(v[16] == 1674);
9517 assert_or_panic(v[17] == 1675);
9518 assert_or_panic(v[18] == 1676);
9519 assert_or_panic(v[19] == 1677);
9520 assert_or_panic(v[20] == 1678);
9521 assert_or_panic(v[21] == 1679);
9522 assert_or_panic(v[22] == 1680);
9523 assert_or_panic(v[23] == 1681);
9524 assert_or_panic(v[24] == 1682);
9525 assert_or_panic(v[25] == 1683);
9526 assert_or_panic(v[26] == 1684);
9527 assert_or_panic(v[27] == 1685);
9528 assert_or_panic(v[28] == 1686);
9529 assert_or_panic(v[29] == 1687);
9530 assert_or_panic(v[30] == 1688);
9531 assert_or_panic(v[31] == 1689);
9532 assert_or_panic(v[32] == 1690);
9533 assert_or_panic(v[33] == 1691);
9534 assert_or_panic(v[34] == 1692);
9535 assert_or_panic(v[35] == 1693);
9536 assert_or_panic(v[36] == 1694);
9537 assert_or_panic(v[37] == 1695);
9538 assert_or_panic(v[38] == 1696);
9539 assert_or_panic(v[39] == 1697);
9540 assert_or_panic(v[40] == 1698);
9541 assert_or_panic(v[41] == 1699);
9542 assert_or_panic(v[42] == 1700);
9543 assert_or_panic(v[43] == 1701);
9544 assert_or_panic(v[44] == 1702);
9545 assert_or_panic(v[45] == 1703);
9546 assert_or_panic(v[46] == 1704);
9547 assert_or_panic(v[47] == 1705);
9548 assert_or_panic(v[48] == 1706);
9549 assert_or_panic(v[49] == 1707);
9550 assert_or_panic(v[50] == 1708);
9551 assert_or_panic(v[51] == 1709);
9552 assert_or_panic(v[52] == 1710);
9553 assert_or_panic(v[53] == 1711);
9554 assert_or_panic(v[54] == 1712);
9555 assert_or_panic(v[55] == 1713);
9556 assert_or_panic(v[56] == 1714);
9557 assert_or_panic(v[57] == 1715);
9558 assert_or_panic(v[58] == 1716);
9559 assert_or_panic(v[59] == 1717);
9560 assert_or_panic(v[60] == 1718);
9561 assert_or_panic(v[61] == 1719);
9562 assert_or_panic(v[62] == 1720);
9563 assert_or_panic(v[63] == 1721);
9564 assert_or_panic(v[64] == 1722);
9565 assert_or_panic(v[65] == 1723);
9566 assert_or_panic(v[66] == 1724);
9567 assert_or_panic(v[67] == 1725);
9568 assert_or_panic(v[68] == 1726);
9569 assert_or_panic(v[69] == 1727);
9570 assert_or_panic(v[70] == 1728);
9571 assert_or_panic(v[71] == 1729);
9572 assert_or_panic(v[72] == 1730);
9573 assert_or_panic(v[73] == 1731);
9574 assert_or_panic(v[74] == 1732);
9575 assert_or_panic(v[75] == 1733);
9576 assert_or_panic(v[76] == 1734);
9577 assert_or_panic(v[77] == 1735);
9578 assert_or_panic(v[78] == 1736);
9579 assert_or_panic(v[79] == 1737);
9580 assert_or_panic(v[80] == 1738);
9581 assert_or_panic(v[81] == 1739);
9582 assert_or_panic(v[82] == 1740);
9583 assert_or_panic(v[83] == 1741);
9584 assert_or_panic(v[84] == 1742);
9585 assert_or_panic(v[85] == 1743);
9586 assert_or_panic(v[86] == 1744);
9587 assert_or_panic(v[87] == 1745);
9588 assert_or_panic(v[88] == 1746);
9589 assert_or_panic(v[89] == 1747);
9590 assert_or_panic(v[90] == 1748);
9591 assert_or_panic(v[91] == 1749);
9592 assert_or_panic(v[92] == 1750);
9593 assert_or_panic(v[93] == 1751);
9594 assert_or_panic(v[94] == 1752);
9595 assert_or_panic(v[95] == 1753);
9596 assert_or_panic(v[96] == 1754);
9597 assert_or_panic(v[97] == 1755);
9598 assert_or_panic(v[98] == 1756);
9599 assert_or_panic(v[99] == 1757);
9600 assert_or_panic(v[100] == 1758);
9601 assert_or_panic(v[101] == 1759);
9602 assert_or_panic(v[102] == 1760);
9603 assert_or_panic(v[103] == 1761);
9604 assert_or_panic(v[104] == 1762);
9605 assert_or_panic(v[105] == 1763);
9606 assert_or_panic(v[106] == 1764);
9607 assert_or_panic(v[107] == 1765);
9608 assert_or_panic(v[108] == 1766);
9609 assert_or_panic(v[109] == 1767);
9610 assert_or_panic(v[110] == 1768);
9611 assert_or_panic(v[111] == 1769);
9612 assert_or_panic(v[112] == 1770);
9613 assert_or_panic(v[113] == 1771);
9614 assert_or_panic(v[114] == 1772);
9615 assert_or_panic(v[115] == 1773);
9616 assert_or_panic(v[116] == 1774);
9617 assert_or_panic(v[117] == 1775);
9618 assert_or_panic(v[118] == 1776);
9619 assert_or_panic(v[119] == 1777);
9620 assert_or_panic(v[120] == 1778);
9621 assert_or_panic(v[121] == 1779);
9622 assert_or_panic(v[122] == 1780);
9623 assert_or_panic(v[123] == 1781);
9624 assert_or_panic(v[124] == 1782);
9625 assert_or_panic(v[125] == 1783);
9626 assert_or_panic(v[126] == 1784);
9627 assert_or_panic(v[127] == 1785);
9628 assert_or_panic(i == 128);
9629}
9630void c_test_vector_128_u16(void) {
9631 Vector_128_u16 v = zig_ret_vector_128_u16();
9632 assert_or_panic(v[0] == 1274);
9633 assert_or_panic(v[1] == 1275);
9634 assert_or_panic(v[2] == 1276);
9635 assert_or_panic(v[3] == 1277);
9636 assert_or_panic(v[4] == 1278);
9637 assert_or_panic(v[5] == 1279);
9638 assert_or_panic(v[6] == 1280);
9639 assert_or_panic(v[7] == 1281);
9640 assert_or_panic(v[8] == 1282);
9641 assert_or_panic(v[9] == 1283);
9642 assert_or_panic(v[10] == 1284);
9643 assert_or_panic(v[11] == 1285);
9644 assert_or_panic(v[12] == 1286);
9645 assert_or_panic(v[13] == 1287);
9646 assert_or_panic(v[14] == 1288);
9647 assert_or_panic(v[15] == 1289);
9648 assert_or_panic(v[16] == 1290);
9649 assert_or_panic(v[17] == 1291);
9650 assert_or_panic(v[18] == 1292);
9651 assert_or_panic(v[19] == 1293);
9652 assert_or_panic(v[20] == 1294);
9653 assert_or_panic(v[21] == 1295);
9654 assert_or_panic(v[22] == 1296);
9655 assert_or_panic(v[23] == 1297);
9656 assert_or_panic(v[24] == 1298);
9657 assert_or_panic(v[25] == 1299);
9658 assert_or_panic(v[26] == 1300);
9659 assert_or_panic(v[27] == 1301);
9660 assert_or_panic(v[28] == 1302);
9661 assert_or_panic(v[29] == 1303);
9662 assert_or_panic(v[30] == 1304);
9663 assert_or_panic(v[31] == 1305);
9664 assert_or_panic(v[32] == 1306);
9665 assert_or_panic(v[33] == 1307);
9666 assert_or_panic(v[34] == 1308);
9667 assert_or_panic(v[35] == 1309);
9668 assert_or_panic(v[36] == 1310);
9669 assert_or_panic(v[37] == 1311);
9670 assert_or_panic(v[38] == 1312);
9671 assert_or_panic(v[39] == 1313);
9672 assert_or_panic(v[40] == 1314);
9673 assert_or_panic(v[41] == 1315);
9674 assert_or_panic(v[42] == 1316);
9675 assert_or_panic(v[43] == 1317);
9676 assert_or_panic(v[44] == 1318);
9677 assert_or_panic(v[45] == 1319);
9678 assert_or_panic(v[46] == 1320);
9679 assert_or_panic(v[47] == 1321);
9680 assert_or_panic(v[48] == 1322);
9681 assert_or_panic(v[49] == 1323);
9682 assert_or_panic(v[50] == 1324);
9683 assert_or_panic(v[51] == 1325);
9684 assert_or_panic(v[52] == 1326);
9685 assert_or_panic(v[53] == 1327);
9686 assert_or_panic(v[54] == 1328);
9687 assert_or_panic(v[55] == 1329);
9688 assert_or_panic(v[56] == 1330);
9689 assert_or_panic(v[57] == 1331);
9690 assert_or_panic(v[58] == 1332);
9691 assert_or_panic(v[59] == 1333);
9692 assert_or_panic(v[60] == 1334);
9693 assert_or_panic(v[61] == 1335);
9694 assert_or_panic(v[62] == 1336);
9695 assert_or_panic(v[63] == 1337);
9696 assert_or_panic(v[64] == 1338);
9697 assert_or_panic(v[65] == 1339);
9698 assert_or_panic(v[66] == 1340);
9699 assert_or_panic(v[67] == 1341);
9700 assert_or_panic(v[68] == 1342);
9701 assert_or_panic(v[69] == 1343);
9702 assert_or_panic(v[70] == 1344);
9703 assert_or_panic(v[71] == 1345);
9704 assert_or_panic(v[72] == 1346);
9705 assert_or_panic(v[73] == 1347);
9706 assert_or_panic(v[74] == 1348);
9707 assert_or_panic(v[75] == 1349);
9708 assert_or_panic(v[76] == 1350);
9709 assert_or_panic(v[77] == 1351);
9710 assert_or_panic(v[78] == 1352);
9711 assert_or_panic(v[79] == 1353);
9712 assert_or_panic(v[80] == 1354);
9713 assert_or_panic(v[81] == 1355);
9714 assert_or_panic(v[82] == 1356);
9715 assert_or_panic(v[83] == 1357);
9716 assert_or_panic(v[84] == 1358);
9717 assert_or_panic(v[85] == 1359);
9718 assert_or_panic(v[86] == 1360);
9719 assert_or_panic(v[87] == 1361);
9720 assert_or_panic(v[88] == 1362);
9721 assert_or_panic(v[89] == 1363);
9722 assert_or_panic(v[90] == 1364);
9723 assert_or_panic(v[91] == 1365);
9724 assert_or_panic(v[92] == 1366);
9725 assert_or_panic(v[93] == 1367);
9726 assert_or_panic(v[94] == 1368);
9727 assert_or_panic(v[95] == 1369);
9728 assert_or_panic(v[96] == 1370);
9729 assert_or_panic(v[97] == 1371);
9730 assert_or_panic(v[98] == 1372);
9731 assert_or_panic(v[99] == 1373);
9732 assert_or_panic(v[100] == 1374);
9733 assert_or_panic(v[101] == 1375);
9734 assert_or_panic(v[102] == 1376);
9735 assert_or_panic(v[103] == 1377);
9736 assert_or_panic(v[104] == 1378);
9737 assert_or_panic(v[105] == 1379);
9738 assert_or_panic(v[106] == 1380);
9739 assert_or_panic(v[107] == 1381);
9740 assert_or_panic(v[108] == 1382);
9741 assert_or_panic(v[109] == 1383);
9742 assert_or_panic(v[110] == 1384);
9743 assert_or_panic(v[111] == 1385);
9744 assert_or_panic(v[112] == 1386);
9745 assert_or_panic(v[113] == 1387);
9746 assert_or_panic(v[114] == 1388);
9747 assert_or_panic(v[115] == 1389);
9748 assert_or_panic(v[116] == 1390);
9749 assert_or_panic(v[117] == 1391);
9750 assert_or_panic(v[118] == 1392);
9751 assert_or_panic(v[119] == 1393);
9752 assert_or_panic(v[120] == 1394);
9753 assert_or_panic(v[121] == 1395);
9754 assert_or_panic(v[122] == 1396);
9755 assert_or_panic(v[123] == 1397);
9756 assert_or_panic(v[124] == 1398);
9757 assert_or_panic(v[125] == 1399);
9758 assert_or_panic(v[126] == 1400);
9759 assert_or_panic(v[127] == 1401);
9760 zig_vector_128_u16((Vector_128_u16){
9761 1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1417,
9762 1418, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432, 1433,
9763 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446, 1447, 1448, 1449,
9764 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464, 1465,
9765 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481,
9766 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491, 1492, 1493, 1494, 1495, 1496, 1497,
9767 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1509, 1510, 1511, 1512, 1513,
9768 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521, 1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529,
9769 }, 128);
9770}
9771
9772typedef uint16_t Vector_192_u16 __attribute__((vector_size(192 * sizeof(uint16_t))));
9773
9774Vector_192_u16 zig_ret_vector_192_u16(void);
9775void zig_vector_192_u16(Vector_192_u16, size_t);
9776
9777Vector_192_u16 c_ret_vector_192_u16(void) {
9778 return (Vector_192_u16){
9779 2170, 2171, 2172, 2173, 2174, 2175, 2176, 2177, 2178, 2179, 2180, 2181, 2182, 2183, 2184, 2185,
9780 2186, 2187, 2188, 2189, 2190, 2191, 2192, 2193, 2194, 2195, 2196, 2197, 2198, 2199, 2200, 2201,
9781 2202, 2203, 2204, 2205, 2206, 2207, 2208, 2209, 2210, 2211, 2212, 2213, 2214, 2215, 2216, 2217,
9782 2218, 2219, 2220, 2221, 2222, 2223, 2224, 2225, 2226, 2227, 2228, 2229, 2230, 2231, 2232, 2233,
9783 2234, 2235, 2236, 2237, 2238, 2239, 2240, 2241, 2242, 2243, 2244, 2245, 2246, 2247, 2248, 2249,
9784 2250, 2251, 2252, 2253, 2254, 2255, 2256, 2257, 2258, 2259, 2260, 2261, 2262, 2263, 2264, 2265,
9785 2266, 2267, 2268, 2269, 2270, 2271, 2272, 2273, 2274, 2275, 2276, 2277, 2278, 2279, 2280, 2281,
9786 2282, 2283, 2284, 2285, 2286, 2287, 2288, 2289, 2290, 2291, 2292, 2293, 2294, 2295, 2296, 2297,
9787 2298, 2299, 2300, 2301, 2302, 2303, 2304, 2305, 2306, 2307, 2308, 2309, 2310, 2311, 2312, 2313,
9788 2314, 2315, 2316, 2317, 2318, 2319, 2320, 2321, 2322, 2323, 2324, 2325, 2326, 2327, 2328, 2329,
9789 2330, 2331, 2332, 2333, 2334, 2335, 2336, 2337, 2338, 2339, 2340, 2341, 2342, 2343, 2344, 2345,
9790 2346, 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, 2361,
9791 };
9792}
9793void c_vector_192_u16(Vector_192_u16 v, size_t i) {
9794 assert_or_panic(v[0] == 2362);
9795 assert_or_panic(v[1] == 2363);
9796 assert_or_panic(v[2] == 2364);
9797 assert_or_panic(v[3] == 2365);
9798 assert_or_panic(v[4] == 2366);
9799 assert_or_panic(v[5] == 2367);
9800 assert_or_panic(v[6] == 2368);
9801 assert_or_panic(v[7] == 2369);
9802 assert_or_panic(v[8] == 2370);
9803 assert_or_panic(v[9] == 2371);
9804 assert_or_panic(v[10] == 2372);
9805 assert_or_panic(v[11] == 2373);
9806 assert_or_panic(v[12] == 2374);
9807 assert_or_panic(v[13] == 2375);
9808 assert_or_panic(v[14] == 2376);
9809 assert_or_panic(v[15] == 2377);
9810 assert_or_panic(v[16] == 2378);
9811 assert_or_panic(v[17] == 2379);
9812 assert_or_panic(v[18] == 2380);
9813 assert_or_panic(v[19] == 2381);
9814 assert_or_panic(v[20] == 2382);
9815 assert_or_panic(v[21] == 2383);
9816 assert_or_panic(v[22] == 2384);
9817 assert_or_panic(v[23] == 2385);
9818 assert_or_panic(v[24] == 2386);
9819 assert_or_panic(v[25] == 2387);
9820 assert_or_panic(v[26] == 2388);
9821 assert_or_panic(v[27] == 2389);
9822 assert_or_panic(v[28] == 2390);
9823 assert_or_panic(v[29] == 2391);
9824 assert_or_panic(v[30] == 2392);
9825 assert_or_panic(v[31] == 2393);
9826 assert_or_panic(v[32] == 2394);
9827 assert_or_panic(v[33] == 2395);
9828 assert_or_panic(v[34] == 2396);
9829 assert_or_panic(v[35] == 2397);
9830 assert_or_panic(v[36] == 2398);
9831 assert_or_panic(v[37] == 2399);
9832 assert_or_panic(v[38] == 2400);
9833 assert_or_panic(v[39] == 2401);
9834 assert_or_panic(v[40] == 2402);
9835 assert_or_panic(v[41] == 2403);
9836 assert_or_panic(v[42] == 2404);
9837 assert_or_panic(v[43] == 2405);
9838 assert_or_panic(v[44] == 2406);
9839 assert_or_panic(v[45] == 2407);
9840 assert_or_panic(v[46] == 2408);
9841 assert_or_panic(v[47] == 2409);
9842 assert_or_panic(v[48] == 2410);
9843 assert_or_panic(v[49] == 2411);
9844 assert_or_panic(v[50] == 2412);
9845 assert_or_panic(v[51] == 2413);
9846 assert_or_panic(v[52] == 2414);
9847 assert_or_panic(v[53] == 2415);
9848 assert_or_panic(v[54] == 2416);
9849 assert_or_panic(v[55] == 2417);
9850 assert_or_panic(v[56] == 2418);
9851 assert_or_panic(v[57] == 2419);
9852 assert_or_panic(v[58] == 2420);
9853 assert_or_panic(v[59] == 2421);
9854 assert_or_panic(v[60] == 2422);
9855 assert_or_panic(v[61] == 2423);
9856 assert_or_panic(v[62] == 2424);
9857 assert_or_panic(v[63] == 2425);
9858 assert_or_panic(v[64] == 2426);
9859 assert_or_panic(v[65] == 2427);
9860 assert_or_panic(v[66] == 2428);
9861 assert_or_panic(v[67] == 2429);
9862 assert_or_panic(v[68] == 2430);
9863 assert_or_panic(v[69] == 2431);
9864 assert_or_panic(v[70] == 2432);
9865 assert_or_panic(v[71] == 2433);
9866 assert_or_panic(v[72] == 2434);
9867 assert_or_panic(v[73] == 2435);
9868 assert_or_panic(v[74] == 2436);
9869 assert_or_panic(v[75] == 2437);
9870 assert_or_panic(v[76] == 2438);
9871 assert_or_panic(v[77] == 2439);
9872 assert_or_panic(v[78] == 2440);
9873 assert_or_panic(v[79] == 2441);
9874 assert_or_panic(v[80] == 2442);
9875 assert_or_panic(v[81] == 2443);
9876 assert_or_panic(v[82] == 2444);
9877 assert_or_panic(v[83] == 2445);
9878 assert_or_panic(v[84] == 2446);
9879 assert_or_panic(v[85] == 2447);
9880 assert_or_panic(v[86] == 2448);
9881 assert_or_panic(v[87] == 2449);
9882 assert_or_panic(v[88] == 2450);
9883 assert_or_panic(v[89] == 2451);
9884 assert_or_panic(v[90] == 2452);
9885 assert_or_panic(v[91] == 2453);
9886 assert_or_panic(v[92] == 2454);
9887 assert_or_panic(v[93] == 2455);
9888 assert_or_panic(v[94] == 2456);
9889 assert_or_panic(v[95] == 2457);
9890 assert_or_panic(v[96] == 2458);
9891 assert_or_panic(v[97] == 2459);
9892 assert_or_panic(v[98] == 2460);
9893 assert_or_panic(v[99] == 2461);
9894 assert_or_panic(v[100] == 2462);
9895 assert_or_panic(v[101] == 2463);
9896 assert_or_panic(v[102] == 2464);
9897 assert_or_panic(v[103] == 2465);
9898 assert_or_panic(v[104] == 2466);
9899 assert_or_panic(v[105] == 2467);
9900 assert_or_panic(v[106] == 2468);
9901 assert_or_panic(v[107] == 2469);
9902 assert_or_panic(v[108] == 2470);
9903 assert_or_panic(v[109] == 2471);
9904 assert_or_panic(v[110] == 2472);
9905 assert_or_panic(v[111] == 2473);
9906 assert_or_panic(v[112] == 2474);
9907 assert_or_panic(v[113] == 2475);
9908 assert_or_panic(v[114] == 2476);
9909 assert_or_panic(v[115] == 2477);
9910 assert_or_panic(v[116] == 2478);
9911 assert_or_panic(v[117] == 2479);
9912 assert_or_panic(v[118] == 2480);
9913 assert_or_panic(v[119] == 2481);
9914 assert_or_panic(v[120] == 2482);
9915 assert_or_panic(v[121] == 2483);
9916 assert_or_panic(v[122] == 2484);
9917 assert_or_panic(v[123] == 2485);
9918 assert_or_panic(v[124] == 2486);
9919 assert_or_panic(v[125] == 2487);
9920 assert_or_panic(v[126] == 2488);
9921 assert_or_panic(v[127] == 2489);
9922 assert_or_panic(v[128] == 2490);
9923 assert_or_panic(v[129] == 2491);
9924 assert_or_panic(v[130] == 2492);
9925 assert_or_panic(v[131] == 2493);
9926 assert_or_panic(v[132] == 2494);
9927 assert_or_panic(v[133] == 2495);
9928 assert_or_panic(v[134] == 2496);
9929 assert_or_panic(v[135] == 2497);
9930 assert_or_panic(v[136] == 2498);
9931 assert_or_panic(v[137] == 2499);
9932 assert_or_panic(v[138] == 2500);
9933 assert_or_panic(v[139] == 2501);
9934 assert_or_panic(v[140] == 2502);
9935 assert_or_panic(v[141] == 2503);
9936 assert_or_panic(v[142] == 2504);
9937 assert_or_panic(v[143] == 2505);
9938 assert_or_panic(v[144] == 2506);
9939 assert_or_panic(v[145] == 2507);
9940 assert_or_panic(v[146] == 2508);
9941 assert_or_panic(v[147] == 2509);
9942 assert_or_panic(v[148] == 2510);
9943 assert_or_panic(v[149] == 2511);
9944 assert_or_panic(v[150] == 2512);
9945 assert_or_panic(v[151] == 2513);
9946 assert_or_panic(v[152] == 2514);
9947 assert_or_panic(v[153] == 2515);
9948 assert_or_panic(v[154] == 2516);
9949 assert_or_panic(v[155] == 2517);
9950 assert_or_panic(v[156] == 2518);
9951 assert_or_panic(v[157] == 2519);
9952 assert_or_panic(v[158] == 2520);
9953 assert_or_panic(v[159] == 2521);
9954 assert_or_panic(v[160] == 2522);
9955 assert_or_panic(v[161] == 2523);
9956 assert_or_panic(v[162] == 2524);
9957 assert_or_panic(v[163] == 2525);
9958 assert_or_panic(v[164] == 2526);
9959 assert_or_panic(v[165] == 2527);
9960 assert_or_panic(v[166] == 2528);
9961 assert_or_panic(v[167] == 2529);
9962 assert_or_panic(v[168] == 2530);
9963 assert_or_panic(v[169] == 2531);
9964 assert_or_panic(v[170] == 2532);
9965 assert_or_panic(v[171] == 2533);
9966 assert_or_panic(v[172] == 2534);
9967 assert_or_panic(v[173] == 2535);
9968 assert_or_panic(v[174] == 2536);
9969 assert_or_panic(v[175] == 2537);
9970 assert_or_panic(v[176] == 2538);
9971 assert_or_panic(v[177] == 2539);
9972 assert_or_panic(v[178] == 2540);
9973 assert_or_panic(v[179] == 2541);
9974 assert_or_panic(v[180] == 2542);
9975 assert_or_panic(v[181] == 2543);
9976 assert_or_panic(v[182] == 2544);
9977 assert_or_panic(v[183] == 2545);
9978 assert_or_panic(v[184] == 2546);
9979 assert_or_panic(v[185] == 2547);
9980 assert_or_panic(v[186] == 2548);
9981 assert_or_panic(v[187] == 2549);
9982 assert_or_panic(v[188] == 2550);
9983 assert_or_panic(v[189] == 2551);
9984 assert_or_panic(v[190] == 2552);
9985 assert_or_panic(v[191] == 2553);
9986 assert_or_panic(i == 192);
9987}
9988void c_test_vector_192_u16(void) {
9989 Vector_192_u16 v = zig_ret_vector_192_u16();
9990 assert_or_panic(v[0] == 1786);
9991 assert_or_panic(v[1] == 1787);
9992 assert_or_panic(v[2] == 1788);
9993 assert_or_panic(v[3] == 1789);
9994 assert_or_panic(v[4] == 1790);
9995 assert_or_panic(v[5] == 1791);
9996 assert_or_panic(v[6] == 1792);
9997 assert_or_panic(v[7] == 1793);
9998 assert_or_panic(v[8] == 1794);
9999 assert_or_panic(v[9] == 1795);
10000 assert_or_panic(v[10] == 1796);
10001 assert_or_panic(v[11] == 1797);
10002 assert_or_panic(v[12] == 1798);
10003 assert_or_panic(v[13] == 1799);
10004 assert_or_panic(v[14] == 1800);
10005 assert_or_panic(v[15] == 1801);
10006 assert_or_panic(v[16] == 1802);
10007 assert_or_panic(v[17] == 1803);
10008 assert_or_panic(v[18] == 1804);
10009 assert_or_panic(v[19] == 1805);
10010 assert_or_panic(v[20] == 1806);
10011 assert_or_panic(v[21] == 1807);
10012 assert_or_panic(v[22] == 1808);
10013 assert_or_panic(v[23] == 1809);
10014 assert_or_panic(v[24] == 1810);
10015 assert_or_panic(v[25] == 1811);
10016 assert_or_panic(v[26] == 1812);
10017 assert_or_panic(v[27] == 1813);
10018 assert_or_panic(v[28] == 1814);
10019 assert_or_panic(v[29] == 1815);
10020 assert_or_panic(v[30] == 1816);
10021 assert_or_panic(v[31] == 1817);
10022 assert_or_panic(v[32] == 1818);
10023 assert_or_panic(v[33] == 1819);
10024 assert_or_panic(v[34] == 1820);
10025 assert_or_panic(v[35] == 1821);
10026 assert_or_panic(v[36] == 1822);
10027 assert_or_panic(v[37] == 1823);
10028 assert_or_panic(v[38] == 1824);
10029 assert_or_panic(v[39] == 1825);
10030 assert_or_panic(v[40] == 1826);
10031 assert_or_panic(v[41] == 1827);
10032 assert_or_panic(v[42] == 1828);
10033 assert_or_panic(v[43] == 1829);
10034 assert_or_panic(v[44] == 1830);
10035 assert_or_panic(v[45] == 1831);
10036 assert_or_panic(v[46] == 1832);
10037 assert_or_panic(v[47] == 1833);
10038 assert_or_panic(v[48] == 1834);
10039 assert_or_panic(v[49] == 1835);
10040 assert_or_panic(v[50] == 1836);
10041 assert_or_panic(v[51] == 1837);
10042 assert_or_panic(v[52] == 1838);
10043 assert_or_panic(v[53] == 1839);
10044 assert_or_panic(v[54] == 1840);
10045 assert_or_panic(v[55] == 1841);
10046 assert_or_panic(v[56] == 1842);
10047 assert_or_panic(v[57] == 1843);
10048 assert_or_panic(v[58] == 1844);
10049 assert_or_panic(v[59] == 1845);
10050 assert_or_panic(v[60] == 1846);
10051 assert_or_panic(v[61] == 1847);
10052 assert_or_panic(v[62] == 1848);
10053 assert_or_panic(v[63] == 1849);
10054 assert_or_panic(v[64] == 1850);
10055 assert_or_panic(v[65] == 1851);
10056 assert_or_panic(v[66] == 1852);
10057 assert_or_panic(v[67] == 1853);
10058 assert_or_panic(v[68] == 1854);
10059 assert_or_panic(v[69] == 1855);
10060 assert_or_panic(v[70] == 1856);
10061 assert_or_panic(v[71] == 1857);
10062 assert_or_panic(v[72] == 1858);
10063 assert_or_panic(v[73] == 1859);
10064 assert_or_panic(v[74] == 1860);
10065 assert_or_panic(v[75] == 1861);
10066 assert_or_panic(v[76] == 1862);
10067 assert_or_panic(v[77] == 1863);
10068 assert_or_panic(v[78] == 1864);
10069 assert_or_panic(v[79] == 1865);
10070 assert_or_panic(v[80] == 1866);
10071 assert_or_panic(v[81] == 1867);
10072 assert_or_panic(v[82] == 1868);
10073 assert_or_panic(v[83] == 1869);
10074 assert_or_panic(v[84] == 1870);
10075 assert_or_panic(v[85] == 1871);
10076 assert_or_panic(v[86] == 1872);
10077 assert_or_panic(v[87] == 1873);
10078 assert_or_panic(v[88] == 1874);
10079 assert_or_panic(v[89] == 1875);
10080 assert_or_panic(v[90] == 1876);
10081 assert_or_panic(v[91] == 1877);
10082 assert_or_panic(v[92] == 1878);
10083 assert_or_panic(v[93] == 1879);
10084 assert_or_panic(v[94] == 1880);
10085 assert_or_panic(v[95] == 1881);
10086 assert_or_panic(v[96] == 1882);
10087 assert_or_panic(v[97] == 1883);
10088 assert_or_panic(v[98] == 1884);
10089 assert_or_panic(v[99] == 1885);
10090 assert_or_panic(v[100] == 1886);
10091 assert_or_panic(v[101] == 1887);
10092 assert_or_panic(v[102] == 1888);
10093 assert_or_panic(v[103] == 1889);
10094 assert_or_panic(v[104] == 1890);
10095 assert_or_panic(v[105] == 1891);
10096 assert_or_panic(v[106] == 1892);
10097 assert_or_panic(v[107] == 1893);
10098 assert_or_panic(v[108] == 1894);
10099 assert_or_panic(v[109] == 1895);
10100 assert_or_panic(v[110] == 1896);
10101 assert_or_panic(v[111] == 1897);
10102 assert_or_panic(v[112] == 1898);
10103 assert_or_panic(v[113] == 1899);
10104 assert_or_panic(v[114] == 1900);
10105 assert_or_panic(v[115] == 1901);
10106 assert_or_panic(v[116] == 1902);
10107 assert_or_panic(v[117] == 1903);
10108 assert_or_panic(v[118] == 1904);
10109 assert_or_panic(v[119] == 1905);
10110 assert_or_panic(v[120] == 1906);
10111 assert_or_panic(v[121] == 1907);
10112 assert_or_panic(v[122] == 1908);
10113 assert_or_panic(v[123] == 1909);
10114 assert_or_panic(v[124] == 1910);
10115 assert_or_panic(v[125] == 1911);
10116 assert_or_panic(v[126] == 1912);
10117 assert_or_panic(v[127] == 1913);
10118 assert_or_panic(v[128] == 1914);
10119 assert_or_panic(v[129] == 1915);
10120 assert_or_panic(v[130] == 1916);
10121 assert_or_panic(v[131] == 1917);
10122 assert_or_panic(v[132] == 1918);
10123 assert_or_panic(v[133] == 1919);
10124 assert_or_panic(v[134] == 1920);
10125 assert_or_panic(v[135] == 1921);
10126 assert_or_panic(v[136] == 1922);
10127 assert_or_panic(v[137] == 1923);
10128 assert_or_panic(v[138] == 1924);
10129 assert_or_panic(v[139] == 1925);
10130 assert_or_panic(v[140] == 1926);
10131 assert_or_panic(v[141] == 1927);
10132 assert_or_panic(v[142] == 1928);
10133 assert_or_panic(v[143] == 1929);
10134 assert_or_panic(v[144] == 1930);
10135 assert_or_panic(v[145] == 1931);
10136 assert_or_panic(v[146] == 1932);
10137 assert_or_panic(v[147] == 1933);
10138 assert_or_panic(v[148] == 1934);
10139 assert_or_panic(v[149] == 1935);
10140 assert_or_panic(v[150] == 1936);
10141 assert_or_panic(v[151] == 1937);
10142 assert_or_panic(v[152] == 1938);
10143 assert_or_panic(v[153] == 1939);
10144 assert_or_panic(v[154] == 1940);
10145 assert_or_panic(v[155] == 1941);
10146 assert_or_panic(v[156] == 1942);
10147 assert_or_panic(v[157] == 1943);
10148 assert_or_panic(v[158] == 1944);
10149 assert_or_panic(v[159] == 1945);
10150 assert_or_panic(v[160] == 1946);
10151 assert_or_panic(v[161] == 1947);
10152 assert_or_panic(v[162] == 1948);
10153 assert_or_panic(v[163] == 1949);
10154 assert_or_panic(v[164] == 1950);
10155 assert_or_panic(v[165] == 1951);
10156 assert_or_panic(v[166] == 1952);
10157 assert_or_panic(v[167] == 1953);
10158 assert_or_panic(v[168] == 1954);
10159 assert_or_panic(v[169] == 1955);
10160 assert_or_panic(v[170] == 1956);
10161 assert_or_panic(v[171] == 1957);
10162 assert_or_panic(v[172] == 1958);
10163 assert_or_panic(v[173] == 1959);
10164 assert_or_panic(v[174] == 1960);
10165 assert_or_panic(v[175] == 1961);
10166 assert_or_panic(v[176] == 1962);
10167 assert_or_panic(v[177] == 1963);
10168 assert_or_panic(v[178] == 1964);
10169 assert_or_panic(v[179] == 1965);
10170 assert_or_panic(v[180] == 1966);
10171 assert_or_panic(v[181] == 1967);
10172 assert_or_panic(v[182] == 1968);
10173 assert_or_panic(v[183] == 1969);
10174 assert_or_panic(v[184] == 1970);
10175 assert_or_panic(v[185] == 1971);
10176 assert_or_panic(v[186] == 1972);
10177 assert_or_panic(v[187] == 1973);
10178 assert_or_panic(v[188] == 1974);
10179 assert_or_panic(v[189] == 1975);
10180 assert_or_panic(v[190] == 1976);
10181 assert_or_panic(v[191] == 1977);
10182 zig_vector_192_u16((Vector_192_u16){
10183 1978, 1979, 1980, 1981, 1982, 1983, 1984, 1985, 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993,
10184 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
10185 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023, 2024, 2025,
10186 2026, 2027, 2028, 2029, 2030, 2031, 2032, 2033, 2034, 2035, 2036, 2037, 2038, 2039, 2040, 2041,
10187 2042, 2043, 2044, 2045, 2046, 2047, 2048, 2049, 2050, 2051, 2052, 2053, 2054, 2055, 2056, 2057,
10188 2058, 2059, 2060, 2061, 2062, 2063, 2064, 2065, 2066, 2067, 2068, 2069, 2070, 2071, 2072, 2073,
10189 2074, 2075, 2076, 2077, 2078, 2079, 2080, 2081, 2082, 2083, 2084, 2085, 2086, 2087, 2088, 2089,
10190 2090, 2091, 2092, 2093, 2094, 2095, 2096, 2097, 2098, 2099, 2100, 2101, 2102, 2103, 2104, 2105,
10191 2106, 2107, 2108, 2109, 2110, 2111, 2112, 2113, 2114, 2115, 2116, 2117, 2118, 2119, 2120, 2121,
10192 2122, 2123, 2124, 2125, 2126, 2127, 2128, 2129, 2130, 2131, 2132, 2133, 2134, 2135, 2136, 2137,
10193 2138, 2139, 2140, 2141, 2142, 2143, 2144, 2145, 2146, 2147, 2148, 2149, 2150, 2151, 2152, 2153,
10194 2154, 2155, 2156, 2157, 2158, 2159, 2160, 2161, 2162, 2163, 2164, 2165, 2166, 2167, 2168, 2169,
10195 }, 192);
10196}
10197
10198typedef uint16_t Vector_256_u16 __attribute__((vector_size(256 * sizeof(uint16_t))));
10199
10200Vector_256_u16 zig_ret_vector_256_u16(void);
10201void zig_vector_256_u16(Vector_256_u16, size_t);
10202
10203Vector_256_u16 c_ret_vector_256_u16(void) {
10204 return (Vector_256_u16){
10205 3066, 3067, 3068, 3069, 3070, 3071, 3072, 3073, 3074, 3075, 3076, 3077, 3078, 3079, 3080, 3081,
10206 3082, 3083, 3084, 3085, 3086, 3087, 3088, 3089, 3090, 3091, 3092, 3093, 3094, 3095, 3096, 3097,
10207 3098, 3099, 3100, 3101, 3102, 3103, 3104, 3105, 3106, 3107, 3108, 3109, 3110, 3111, 3112, 3113,
10208 3114, 3115, 3116, 3117, 3118, 3119, 3120, 3121, 3122, 3123, 3124, 3125, 3126, 3127, 3128, 3129,
10209 3130, 3131, 3132, 3133, 3134, 3135, 3136, 3137, 3138, 3139, 3140, 3141, 3142, 3143, 3144, 3145,
10210 3146, 3147, 3148, 3149, 3150, 3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158, 3159, 3160, 3161,
10211 3162, 3163, 3164, 3165, 3166, 3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174, 3175, 3176, 3177,
10212 3178, 3179, 3180, 3181, 3182, 3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190, 3191, 3192, 3193,
10213 3194, 3195, 3196, 3197, 3198, 3199, 3200, 3201, 3202, 3203, 3204, 3205, 3206, 3207, 3208, 3209,
10214 3210, 3211, 3212, 3213, 3214, 3215, 3216, 3217, 3218, 3219, 3220, 3221, 3222, 3223, 3224, 3225,
10215 3226, 3227, 3228, 3229, 3230, 3231, 3232, 3233, 3234, 3235, 3236, 3237, 3238, 3239, 3240, 3241,
10216 3242, 3243, 3244, 3245, 3246, 3247, 3248, 3249, 3250, 3251, 3252, 3253, 3254, 3255, 3256, 3257,
10217 3258, 3259, 3260, 3261, 3262, 3263, 3264, 3265, 3266, 3267, 3268, 3269, 3270, 3271, 3272, 3273,
10218 3274, 3275, 3276, 3277, 3278, 3279, 3280, 3281, 3282, 3283, 3284, 3285, 3286, 3287, 3288, 3289,
10219 3290, 3291, 3292, 3293, 3294, 3295, 3296, 3297, 3298, 3299, 3300, 3301, 3302, 3303, 3304, 3305,
10220 3306, 3307, 3308, 3309, 3310, 3311, 3312, 3313, 3314, 3315, 3316, 3317, 3318, 3319, 3320, 3321,
10221 };
10222}
10223void c_vector_256_u16(Vector_256_u16 v, size_t i) {
10224 assert_or_panic(v[0] == 3322);
10225 assert_or_panic(v[1] == 3323);
10226 assert_or_panic(v[2] == 3324);
10227 assert_or_panic(v[3] == 3325);
10228 assert_or_panic(v[4] == 3326);
10229 assert_or_panic(v[5] == 3327);
10230 assert_or_panic(v[6] == 3328);
10231 assert_or_panic(v[7] == 3329);
10232 assert_or_panic(v[8] == 3330);
10233 assert_or_panic(v[9] == 3331);
10234 assert_or_panic(v[10] == 3332);
10235 assert_or_panic(v[11] == 3333);
10236 assert_or_panic(v[12] == 3334);
10237 assert_or_panic(v[13] == 3335);
10238 assert_or_panic(v[14] == 3336);
10239 assert_or_panic(v[15] == 3337);
10240 assert_or_panic(v[16] == 3338);
10241 assert_or_panic(v[17] == 3339);
10242 assert_or_panic(v[18] == 3340);
10243 assert_or_panic(v[19] == 3341);
10244 assert_or_panic(v[20] == 3342);
10245 assert_or_panic(v[21] == 3343);
10246 assert_or_panic(v[22] == 3344);
10247 assert_or_panic(v[23] == 3345);
10248 assert_or_panic(v[24] == 3346);
10249 assert_or_panic(v[25] == 3347);
10250 assert_or_panic(v[26] == 3348);
10251 assert_or_panic(v[27] == 3349);
10252 assert_or_panic(v[28] == 3350);
10253 assert_or_panic(v[29] == 3351);
10254 assert_or_panic(v[30] == 3352);
10255 assert_or_panic(v[31] == 3353);
10256 assert_or_panic(v[32] == 3354);
10257 assert_or_panic(v[33] == 3355);
10258 assert_or_panic(v[34] == 3356);
10259 assert_or_panic(v[35] == 3357);
10260 assert_or_panic(v[36] == 3358);
10261 assert_or_panic(v[37] == 3359);
10262 assert_or_panic(v[38] == 3360);
10263 assert_or_panic(v[39] == 3361);
10264 assert_or_panic(v[40] == 3362);
10265 assert_or_panic(v[41] == 3363);
10266 assert_or_panic(v[42] == 3364);
10267 assert_or_panic(v[43] == 3365);
10268 assert_or_panic(v[44] == 3366);
10269 assert_or_panic(v[45] == 3367);
10270 assert_or_panic(v[46] == 3368);
10271 assert_or_panic(v[47] == 3369);
10272 assert_or_panic(v[48] == 3370);
10273 assert_or_panic(v[49] == 3371);
10274 assert_or_panic(v[50] == 3372);
10275 assert_or_panic(v[51] == 3373);
10276 assert_or_panic(v[52] == 3374);
10277 assert_or_panic(v[53] == 3375);
10278 assert_or_panic(v[54] == 3376);
10279 assert_or_panic(v[55] == 3377);
10280 assert_or_panic(v[56] == 3378);
10281 assert_or_panic(v[57] == 3379);
10282 assert_or_panic(v[58] == 3380);
10283 assert_or_panic(v[59] == 3381);
10284 assert_or_panic(v[60] == 3382);
10285 assert_or_panic(v[61] == 3383);
10286 assert_or_panic(v[62] == 3384);
10287 assert_or_panic(v[63] == 3385);
10288 assert_or_panic(v[64] == 3386);
10289 assert_or_panic(v[65] == 3387);
10290 assert_or_panic(v[66] == 3388);
10291 assert_or_panic(v[67] == 3389);
10292 assert_or_panic(v[68] == 3390);
10293 assert_or_panic(v[69] == 3391);
10294 assert_or_panic(v[70] == 3392);
10295 assert_or_panic(v[71] == 3393);
10296 assert_or_panic(v[72] == 3394);
10297 assert_or_panic(v[73] == 3395);
10298 assert_or_panic(v[74] == 3396);
10299 assert_or_panic(v[75] == 3397);
10300 assert_or_panic(v[76] == 3398);
10301 assert_or_panic(v[77] == 3399);
10302 assert_or_panic(v[78] == 3400);
10303 assert_or_panic(v[79] == 3401);
10304 assert_or_panic(v[80] == 3402);
10305 assert_or_panic(v[81] == 3403);
10306 assert_or_panic(v[82] == 3404);
10307 assert_or_panic(v[83] == 3405);
10308 assert_or_panic(v[84] == 3406);
10309 assert_or_panic(v[85] == 3407);
10310 assert_or_panic(v[86] == 3408);
10311 assert_or_panic(v[87] == 3409);
10312 assert_or_panic(v[88] == 3410);
10313 assert_or_panic(v[89] == 3411);
10314 assert_or_panic(v[90] == 3412);
10315 assert_or_panic(v[91] == 3413);
10316 assert_or_panic(v[92] == 3414);
10317 assert_or_panic(v[93] == 3415);
10318 assert_or_panic(v[94] == 3416);
10319 assert_or_panic(v[95] == 3417);
10320 assert_or_panic(v[96] == 3418);
10321 assert_or_panic(v[97] == 3419);
10322 assert_or_panic(v[98] == 3420);
10323 assert_or_panic(v[99] == 3421);
10324 assert_or_panic(v[100] == 3422);
10325 assert_or_panic(v[101] == 3423);
10326 assert_or_panic(v[102] == 3424);
10327 assert_or_panic(v[103] == 3425);
10328 assert_or_panic(v[104] == 3426);
10329 assert_or_panic(v[105] == 3427);
10330 assert_or_panic(v[106] == 3428);
10331 assert_or_panic(v[107] == 3429);
10332 assert_or_panic(v[108] == 3430);
10333 assert_or_panic(v[109] == 3431);
10334 assert_or_panic(v[110] == 3432);
10335 assert_or_panic(v[111] == 3433);
10336 assert_or_panic(v[112] == 3434);
10337 assert_or_panic(v[113] == 3435);
10338 assert_or_panic(v[114] == 3436);
10339 assert_or_panic(v[115] == 3437);
10340 assert_or_panic(v[116] == 3438);
10341 assert_or_panic(v[117] == 3439);
10342 assert_or_panic(v[118] == 3440);
10343 assert_or_panic(v[119] == 3441);
10344 assert_or_panic(v[120] == 3442);
10345 assert_or_panic(v[121] == 3443);
10346 assert_or_panic(v[122] == 3444);
10347 assert_or_panic(v[123] == 3445);
10348 assert_or_panic(v[124] == 3446);
10349 assert_or_panic(v[125] == 3447);
10350 assert_or_panic(v[126] == 3448);
10351 assert_or_panic(v[127] == 3449);
10352 assert_or_panic(v[128] == 3450);
10353 assert_or_panic(v[129] == 3451);
10354 assert_or_panic(v[130] == 3452);
10355 assert_or_panic(v[131] == 3453);
10356 assert_or_panic(v[132] == 3454);
10357 assert_or_panic(v[133] == 3455);
10358 assert_or_panic(v[134] == 3456);
10359 assert_or_panic(v[135] == 3457);
10360 assert_or_panic(v[136] == 3458);
10361 assert_or_panic(v[137] == 3459);
10362 assert_or_panic(v[138] == 3460);
10363 assert_or_panic(v[139] == 3461);
10364 assert_or_panic(v[140] == 3462);
10365 assert_or_panic(v[141] == 3463);
10366 assert_or_panic(v[142] == 3464);
10367 assert_or_panic(v[143] == 3465);
10368 assert_or_panic(v[144] == 3466);
10369 assert_or_panic(v[145] == 3467);
10370 assert_or_panic(v[146] == 3468);
10371 assert_or_panic(v[147] == 3469);
10372 assert_or_panic(v[148] == 3470);
10373 assert_or_panic(v[149] == 3471);
10374 assert_or_panic(v[150] == 3472);
10375 assert_or_panic(v[151] == 3473);
10376 assert_or_panic(v[152] == 3474);
10377 assert_or_panic(v[153] == 3475);
10378 assert_or_panic(v[154] == 3476);
10379 assert_or_panic(v[155] == 3477);
10380 assert_or_panic(v[156] == 3478);
10381 assert_or_panic(v[157] == 3479);
10382 assert_or_panic(v[158] == 3480);
10383 assert_or_panic(v[159] == 3481);
10384 assert_or_panic(v[160] == 3482);
10385 assert_or_panic(v[161] == 3483);
10386 assert_or_panic(v[162] == 3484);
10387 assert_or_panic(v[163] == 3485);
10388 assert_or_panic(v[164] == 3486);
10389 assert_or_panic(v[165] == 3487);
10390 assert_or_panic(v[166] == 3488);
10391 assert_or_panic(v[167] == 3489);
10392 assert_or_panic(v[168] == 3490);
10393 assert_or_panic(v[169] == 3491);
10394 assert_or_panic(v[170] == 3492);
10395 assert_or_panic(v[171] == 3493);
10396 assert_or_panic(v[172] == 3494);
10397 assert_or_panic(v[173] == 3495);
10398 assert_or_panic(v[174] == 3496);
10399 assert_or_panic(v[175] == 3497);
10400 assert_or_panic(v[176] == 3498);
10401 assert_or_panic(v[177] == 3499);
10402 assert_or_panic(v[178] == 3500);
10403 assert_or_panic(v[179] == 3501);
10404 assert_or_panic(v[180] == 3502);
10405 assert_or_panic(v[181] == 3503);
10406 assert_or_panic(v[182] == 3504);
10407 assert_or_panic(v[183] == 3505);
10408 assert_or_panic(v[184] == 3506);
10409 assert_or_panic(v[185] == 3507);
10410 assert_or_panic(v[186] == 3508);
10411 assert_or_panic(v[187] == 3509);
10412 assert_or_panic(v[188] == 3510);
10413 assert_or_panic(v[189] == 3511);
10414 assert_or_panic(v[190] == 3512);
10415 assert_or_panic(v[191] == 3513);
10416 assert_or_panic(v[192] == 3514);
10417 assert_or_panic(v[193] == 3515);
10418 assert_or_panic(v[194] == 3516);
10419 assert_or_panic(v[195] == 3517);
10420 assert_or_panic(v[196] == 3518);
10421 assert_or_panic(v[197] == 3519);
10422 assert_or_panic(v[198] == 3520);
10423 assert_or_panic(v[199] == 3521);
10424 assert_or_panic(v[200] == 3522);
10425 assert_or_panic(v[201] == 3523);
10426 assert_or_panic(v[202] == 3524);
10427 assert_or_panic(v[203] == 3525);
10428 assert_or_panic(v[204] == 3526);
10429 assert_or_panic(v[205] == 3527);
10430 assert_or_panic(v[206] == 3528);
10431 assert_or_panic(v[207] == 3529);
10432 assert_or_panic(v[208] == 3530);
10433 assert_or_panic(v[209] == 3531);
10434 assert_or_panic(v[210] == 3532);
10435 assert_or_panic(v[211] == 3533);
10436 assert_or_panic(v[212] == 3534);
10437 assert_or_panic(v[213] == 3535);
10438 assert_or_panic(v[214] == 3536);
10439 assert_or_panic(v[215] == 3537);
10440 assert_or_panic(v[216] == 3538);
10441 assert_or_panic(v[217] == 3539);
10442 assert_or_panic(v[218] == 3540);
10443 assert_or_panic(v[219] == 3541);
10444 assert_or_panic(v[220] == 3542);
10445 assert_or_panic(v[221] == 3543);
10446 assert_or_panic(v[222] == 3544);
10447 assert_or_panic(v[223] == 3545);
10448 assert_or_panic(v[224] == 3546);
10449 assert_or_panic(v[225] == 3547);
10450 assert_or_panic(v[226] == 3548);
10451 assert_or_panic(v[227] == 3549);
10452 assert_or_panic(v[228] == 3550);
10453 assert_or_panic(v[229] == 3551);
10454 assert_or_panic(v[230] == 3552);
10455 assert_or_panic(v[231] == 3553);
10456 assert_or_panic(v[232] == 3554);
10457 assert_or_panic(v[233] == 3555);
10458 assert_or_panic(v[234] == 3556);
10459 assert_or_panic(v[235] == 3557);
10460 assert_or_panic(v[236] == 3558);
10461 assert_or_panic(v[237] == 3559);
10462 assert_or_panic(v[238] == 3560);
10463 assert_or_panic(v[239] == 3561);
10464 assert_or_panic(v[240] == 3562);
10465 assert_or_panic(v[241] == 3563);
10466 assert_or_panic(v[242] == 3564);
10467 assert_or_panic(v[243] == 3565);
10468 assert_or_panic(v[244] == 3566);
10469 assert_or_panic(v[245] == 3567);
10470 assert_or_panic(v[246] == 3568);
10471 assert_or_panic(v[247] == 3569);
10472 assert_or_panic(v[248] == 3570);
10473 assert_or_panic(v[249] == 3571);
10474 assert_or_panic(v[250] == 3572);
10475 assert_or_panic(v[251] == 3573);
10476 assert_or_panic(v[252] == 3574);
10477 assert_or_panic(v[253] == 3575);
10478 assert_or_panic(v[254] == 3576);
10479 assert_or_panic(v[255] == 3577);
10480 assert_or_panic(i == 256);
10481}
10482void c_test_vector_256_u16(void) {
10483 Vector_256_u16 v = zig_ret_vector_256_u16();
10484 assert_or_panic(v[0] == 2554);
10485 assert_or_panic(v[1] == 2555);
10486 assert_or_panic(v[2] == 2556);
10487 assert_or_panic(v[3] == 2557);
10488 assert_or_panic(v[4] == 2558);
10489 assert_or_panic(v[5] == 2559);
10490 assert_or_panic(v[6] == 2560);
10491 assert_or_panic(v[7] == 2561);
10492 assert_or_panic(v[8] == 2562);
10493 assert_or_panic(v[9] == 2563);
10494 assert_or_panic(v[10] == 2564);
10495 assert_or_panic(v[11] == 2565);
10496 assert_or_panic(v[12] == 2566);
10497 assert_or_panic(v[13] == 2567);
10498 assert_or_panic(v[14] == 2568);
10499 assert_or_panic(v[15] == 2569);
10500 assert_or_panic(v[16] == 2570);
10501 assert_or_panic(v[17] == 2571);
10502 assert_or_panic(v[18] == 2572);
10503 assert_or_panic(v[19] == 2573);
10504 assert_or_panic(v[20] == 2574);
10505 assert_or_panic(v[21] == 2575);
10506 assert_or_panic(v[22] == 2576);
10507 assert_or_panic(v[23] == 2577);
10508 assert_or_panic(v[24] == 2578);
10509 assert_or_panic(v[25] == 2579);
10510 assert_or_panic(v[26] == 2580);
10511 assert_or_panic(v[27] == 2581);
10512 assert_or_panic(v[28] == 2582);
10513 assert_or_panic(v[29] == 2583);
10514 assert_or_panic(v[30] == 2584);
10515 assert_or_panic(v[31] == 2585);
10516 assert_or_panic(v[32] == 2586);
10517 assert_or_panic(v[33] == 2587);
10518 assert_or_panic(v[34] == 2588);
10519 assert_or_panic(v[35] == 2589);
10520 assert_or_panic(v[36] == 2590);
10521 assert_or_panic(v[37] == 2591);
10522 assert_or_panic(v[38] == 2592);
10523 assert_or_panic(v[39] == 2593);
10524 assert_or_panic(v[40] == 2594);
10525 assert_or_panic(v[41] == 2595);
10526 assert_or_panic(v[42] == 2596);
10527 assert_or_panic(v[43] == 2597);
10528 assert_or_panic(v[44] == 2598);
10529 assert_or_panic(v[45] == 2599);
10530 assert_or_panic(v[46] == 2600);
10531 assert_or_panic(v[47] == 2601);
10532 assert_or_panic(v[48] == 2602);
10533 assert_or_panic(v[49] == 2603);
10534 assert_or_panic(v[50] == 2604);
10535 assert_or_panic(v[51] == 2605);
10536 assert_or_panic(v[52] == 2606);
10537 assert_or_panic(v[53] == 2607);
10538 assert_or_panic(v[54] == 2608);
10539 assert_or_panic(v[55] == 2609);
10540 assert_or_panic(v[56] == 2610);
10541 assert_or_panic(v[57] == 2611);
10542 assert_or_panic(v[58] == 2612);
10543 assert_or_panic(v[59] == 2613);
10544 assert_or_panic(v[60] == 2614);
10545 assert_or_panic(v[61] == 2615);
10546 assert_or_panic(v[62] == 2616);
10547 assert_or_panic(v[63] == 2617);
10548 assert_or_panic(v[64] == 2618);
10549 assert_or_panic(v[65] == 2619);
10550 assert_or_panic(v[66] == 2620);
10551 assert_or_panic(v[67] == 2621);
10552 assert_or_panic(v[68] == 2622);
10553 assert_or_panic(v[69] == 2623);
10554 assert_or_panic(v[70] == 2624);
10555 assert_or_panic(v[71] == 2625);
10556 assert_or_panic(v[72] == 2626);
10557 assert_or_panic(v[73] == 2627);
10558 assert_or_panic(v[74] == 2628);
10559 assert_or_panic(v[75] == 2629);
10560 assert_or_panic(v[76] == 2630);
10561 assert_or_panic(v[77] == 2631);
10562 assert_or_panic(v[78] == 2632);
10563 assert_or_panic(v[79] == 2633);
10564 assert_or_panic(v[80] == 2634);
10565 assert_or_panic(v[81] == 2635);
10566 assert_or_panic(v[82] == 2636);
10567 assert_or_panic(v[83] == 2637);
10568 assert_or_panic(v[84] == 2638);
10569 assert_or_panic(v[85] == 2639);
10570 assert_or_panic(v[86] == 2640);
10571 assert_or_panic(v[87] == 2641);
10572 assert_or_panic(v[88] == 2642);
10573 assert_or_panic(v[89] == 2643);
10574 assert_or_panic(v[90] == 2644);
10575 assert_or_panic(v[91] == 2645);
10576 assert_or_panic(v[92] == 2646);
10577 assert_or_panic(v[93] == 2647);
10578 assert_or_panic(v[94] == 2648);
10579 assert_or_panic(v[95] == 2649);
10580 assert_or_panic(v[96] == 2650);
10581 assert_or_panic(v[97] == 2651);
10582 assert_or_panic(v[98] == 2652);
10583 assert_or_panic(v[99] == 2653);
10584 assert_or_panic(v[100] == 2654);
10585 assert_or_panic(v[101] == 2655);
10586 assert_or_panic(v[102] == 2656);
10587 assert_or_panic(v[103] == 2657);
10588 assert_or_panic(v[104] == 2658);
10589 assert_or_panic(v[105] == 2659);
10590 assert_or_panic(v[106] == 2660);
10591 assert_or_panic(v[107] == 2661);
10592 assert_or_panic(v[108] == 2662);
10593 assert_or_panic(v[109] == 2663);
10594 assert_or_panic(v[110] == 2664);
10595 assert_or_panic(v[111] == 2665);
10596 assert_or_panic(v[112] == 2666);
10597 assert_or_panic(v[113] == 2667);
10598 assert_or_panic(v[114] == 2668);
10599 assert_or_panic(v[115] == 2669);
10600 assert_or_panic(v[116] == 2670);
10601 assert_or_panic(v[117] == 2671);
10602 assert_or_panic(v[118] == 2672);
10603 assert_or_panic(v[119] == 2673);
10604 assert_or_panic(v[120] == 2674);
10605 assert_or_panic(v[121] == 2675);
10606 assert_or_panic(v[122] == 2676);
10607 assert_or_panic(v[123] == 2677);
10608 assert_or_panic(v[124] == 2678);
10609 assert_or_panic(v[125] == 2679);
10610 assert_or_panic(v[126] == 2680);
10611 assert_or_panic(v[127] == 2681);
10612 assert_or_panic(v[128] == 2682);
10613 assert_or_panic(v[129] == 2683);
10614 assert_or_panic(v[130] == 2684);
10615 assert_or_panic(v[131] == 2685);
10616 assert_or_panic(v[132] == 2686);
10617 assert_or_panic(v[133] == 2687);
10618 assert_or_panic(v[134] == 2688);
10619 assert_or_panic(v[135] == 2689);
10620 assert_or_panic(v[136] == 2690);
10621 assert_or_panic(v[137] == 2691);
10622 assert_or_panic(v[138] == 2692);
10623 assert_or_panic(v[139] == 2693);
10624 assert_or_panic(v[140] == 2694);
10625 assert_or_panic(v[141] == 2695);
10626 assert_or_panic(v[142] == 2696);
10627 assert_or_panic(v[143] == 2697);
10628 assert_or_panic(v[144] == 2698);
10629 assert_or_panic(v[145] == 2699);
10630 assert_or_panic(v[146] == 2700);
10631 assert_or_panic(v[147] == 2701);
10632 assert_or_panic(v[148] == 2702);
10633 assert_or_panic(v[149] == 2703);
10634 assert_or_panic(v[150] == 2704);
10635 assert_or_panic(v[151] == 2705);
10636 assert_or_panic(v[152] == 2706);
10637 assert_or_panic(v[153] == 2707);
10638 assert_or_panic(v[154] == 2708);
10639 assert_or_panic(v[155] == 2709);
10640 assert_or_panic(v[156] == 2710);
10641 assert_or_panic(v[157] == 2711);
10642 assert_or_panic(v[158] == 2712);
10643 assert_or_panic(v[159] == 2713);
10644 assert_or_panic(v[160] == 2714);
10645 assert_or_panic(v[161] == 2715);
10646 assert_or_panic(v[162] == 2716);
10647 assert_or_panic(v[163] == 2717);
10648 assert_or_panic(v[164] == 2718);
10649 assert_or_panic(v[165] == 2719);
10650 assert_or_panic(v[166] == 2720);
10651 assert_or_panic(v[167] == 2721);
10652 assert_or_panic(v[168] == 2722);
10653 assert_or_panic(v[169] == 2723);
10654 assert_or_panic(v[170] == 2724);
10655 assert_or_panic(v[171] == 2725);
10656 assert_or_panic(v[172] == 2726);
10657 assert_or_panic(v[173] == 2727);
10658 assert_or_panic(v[174] == 2728);
10659 assert_or_panic(v[175] == 2729);
10660 assert_or_panic(v[176] == 2730);
10661 assert_or_panic(v[177] == 2731);
10662 assert_or_panic(v[178] == 2732);
10663 assert_or_panic(v[179] == 2733);
10664 assert_or_panic(v[180] == 2734);
10665 assert_or_panic(v[181] == 2735);
10666 assert_or_panic(v[182] == 2736);
10667 assert_or_panic(v[183] == 2737);
10668 assert_or_panic(v[184] == 2738);
10669 assert_or_panic(v[185] == 2739);
10670 assert_or_panic(v[186] == 2740);
10671 assert_or_panic(v[187] == 2741);
10672 assert_or_panic(v[188] == 2742);
10673 assert_or_panic(v[189] == 2743);
10674 assert_or_panic(v[190] == 2744);
10675 assert_or_panic(v[191] == 2745);
10676 assert_or_panic(v[192] == 2746);
10677 assert_or_panic(v[193] == 2747);
10678 assert_or_panic(v[194] == 2748);
10679 assert_or_panic(v[195] == 2749);
10680 assert_or_panic(v[196] == 2750);
10681 assert_or_panic(v[197] == 2751);
10682 assert_or_panic(v[198] == 2752);
10683 assert_or_panic(v[199] == 2753);
10684 assert_or_panic(v[200] == 2754);
10685 assert_or_panic(v[201] == 2755);
10686 assert_or_panic(v[202] == 2756);
10687 assert_or_panic(v[203] == 2757);
10688 assert_or_panic(v[204] == 2758);
10689 assert_or_panic(v[205] == 2759);
10690 assert_or_panic(v[206] == 2760);
10691 assert_or_panic(v[207] == 2761);
10692 assert_or_panic(v[208] == 2762);
10693 assert_or_panic(v[209] == 2763);
10694 assert_or_panic(v[210] == 2764);
10695 assert_or_panic(v[211] == 2765);
10696 assert_or_panic(v[212] == 2766);
10697 assert_or_panic(v[213] == 2767);
10698 assert_or_panic(v[214] == 2768);
10699 assert_or_panic(v[215] == 2769);
10700 assert_or_panic(v[216] == 2770);
10701 assert_or_panic(v[217] == 2771);
10702 assert_or_panic(v[218] == 2772);
10703 assert_or_panic(v[219] == 2773);
10704 assert_or_panic(v[220] == 2774);
10705 assert_or_panic(v[221] == 2775);
10706 assert_or_panic(v[222] == 2776);
10707 assert_or_panic(v[223] == 2777);
10708 assert_or_panic(v[224] == 2778);
10709 assert_or_panic(v[225] == 2779);
10710 assert_or_panic(v[226] == 2780);
10711 assert_or_panic(v[227] == 2781);
10712 assert_or_panic(v[228] == 2782);
10713 assert_or_panic(v[229] == 2783);
10714 assert_or_panic(v[230] == 2784);
10715 assert_or_panic(v[231] == 2785);
10716 assert_or_panic(v[232] == 2786);
10717 assert_or_panic(v[233] == 2787);
10718 assert_or_panic(v[234] == 2788);
10719 assert_or_panic(v[235] == 2789);
10720 assert_or_panic(v[236] == 2790);
10721 assert_or_panic(v[237] == 2791);
10722 assert_or_panic(v[238] == 2792);
10723 assert_or_panic(v[239] == 2793);
10724 assert_or_panic(v[240] == 2794);
10725 assert_or_panic(v[241] == 2795);
10726 assert_or_panic(v[242] == 2796);
10727 assert_or_panic(v[243] == 2797);
10728 assert_or_panic(v[244] == 2798);
10729 assert_or_panic(v[245] == 2799);
10730 assert_or_panic(v[246] == 2800);
10731 assert_or_panic(v[247] == 2801);
10732 assert_or_panic(v[248] == 2802);
10733 assert_or_panic(v[249] == 2803);
10734 assert_or_panic(v[250] == 2804);
10735 assert_or_panic(v[251] == 2805);
10736 assert_or_panic(v[252] == 2806);
10737 assert_or_panic(v[253] == 2807);
10738 assert_or_panic(v[254] == 2808);
10739 assert_or_panic(v[255] == 2809);
10740 zig_vector_256_u16((Vector_256_u16){
10741 2810, 2811, 2812, 2813, 2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821, 2822, 2823, 2824, 2825,
10742 2826, 2827, 2828, 2829, 2830, 2831, 2832, 2833, 2834, 2835, 2836, 2837, 2838, 2839, 2840, 2841,
10743 2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849, 2850, 2851, 2852, 2853, 2854, 2855, 2856, 2857,
10744 2858, 2859, 2860, 2861, 2862, 2863, 2864, 2865, 2866, 2867, 2868, 2869, 2870, 2871, 2872, 2873,
10745 2874, 2875, 2876, 2877, 2878, 2879, 2880, 2881, 2882, 2883, 2884, 2885, 2886, 2887, 2888, 2889,
10746 2890, 2891, 2892, 2893, 2894, 2895, 2896, 2897, 2898, 2899, 2900, 2901, 2902, 2903, 2904, 2905,
10747 2906, 2907, 2908, 2909, 2910, 2911, 2912, 2913, 2914, 2915, 2916, 2917, 2918, 2919, 2920, 2921,
10748 2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929, 2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
10749 2938, 2939, 2940, 2941, 2942, 2943, 2944, 2945, 2946, 2947, 2948, 2949, 2950, 2951, 2952, 2953,
10750 2954, 2955, 2956, 2957, 2958, 2959, 2960, 2961, 2962, 2963, 2964, 2965, 2966, 2967, 2968, 2969,
10751 2970, 2971, 2972, 2973, 2974, 2975, 2976, 2977, 2978, 2979, 2980, 2981, 2982, 2983, 2984, 2985,
10752 2986, 2987, 2988, 2989, 2990, 2991, 2992, 2993, 2994, 2995, 2996, 2997, 2998, 2999, 3000, 3001,
10753 3002, 3003, 3004, 3005, 3006, 3007, 3008, 3009, 3010, 3011, 3012, 3013, 3014, 3015, 3016, 3017,
10754 3018, 3019, 3020, 3021, 3022, 3023, 3024, 3025, 3026, 3027, 3028, 3029, 3030, 3031, 3032, 3033,
10755 3034, 3035, 3036, 3037, 3038, 3039, 3040, 3041, 3042, 3043, 3044, 3045, 3046, 3047, 3048, 3049,
10756 3050, 3051, 3052, 3053, 3054, 3055, 3056, 3057, 3058, 3059, 3060, 3061, 3062, 3063, 3064, 3065,
10757 }, 256);
10758}
10759
10760typedef uint32_t Vector_1_u32 __attribute__((vector_size(1 * sizeof(uint32_t))));
10761
10762Vector_1_u32 zig_ret_vector_1_u32(void);
10763void zig_vector_1_u32(Vector_1_u32, size_t);
10764
10765Vector_1_u32 c_ret_vector_1_u32(void) {
10766 return (Vector_1_u32){ 3 };
10767}
10768void c_vector_1_u32(Vector_1_u32 v, size_t i) {
10769 assert_or_panic(v[0] == 4);
10770 assert_or_panic(i == 1);
10771}
10772void c_test_vector_1_u32(void) {
10773 Vector_1_u32 v = zig_ret_vector_1_u32();
10774 assert_or_panic(v[0] == 1);
10775 zig_vector_1_u32((Vector_1_u32){ 2 }, 1);
10776}
10777
10778typedef uint32_t Vector_2_u32 __attribute__((vector_size(2 * sizeof(uint32_t))));
10779
10780Vector_2_u32 zig_ret_vector_2_u32(void);
10781void zig_vector_2_u32(Vector_2_u32, size_t);
10782
10783Vector_2_u32 c_ret_vector_2_u32(void) {
10784 return (Vector_2_u32){ 9, 10 };
10785}
10786void c_vector_2_u32(Vector_2_u32 v, size_t i) {
10787 assert_or_panic(v[0] == 11);
10788 assert_or_panic(v[1] == 12);
10789 assert_or_panic(i == 2);
10790}
10791void c_test_vector_2_u32(void) {
10792 Vector_2_u32 v = zig_ret_vector_2_u32();
10793 assert_or_panic(v[0] == 5);
10794 assert_or_panic(v[1] == 6);
10795 zig_vector_2_u32((Vector_2_u32){ 7, 8 }, 2);
10796}
10797
10798typedef uint32_t Vector_3_u32 __attribute__((vector_size(3 * sizeof(uint32_t))));
10799
10800Vector_3_u32 zig_ret_vector_3_u32(void);
10801void zig_vector_3_u32(Vector_3_u32, size_t);
10802
10803Vector_3_u32 c_ret_vector_3_u32(void) {
10804 return (Vector_3_u32){ 19, 20, 21 };
10805}
10806void c_vector_3_u32(Vector_3_u32 v, size_t i) {
10807 assert_or_panic(v[0] == 22);
10808 assert_or_panic(v[1] == 23);
10809 assert_or_panic(v[2] == 24);
10810 assert_or_panic(i == 3);
10811}
10812void c_test_vector_3_u32(void) {
10813 Vector_3_u32 v = zig_ret_vector_3_u32();
10814 assert_or_panic(v[0] == 13);
10815 assert_or_panic(v[1] == 14);
10816 assert_or_panic(v[2] == 15);
10817 zig_vector_3_u32((Vector_3_u32){ 16, 17, 18 }, 3);
10818}
10819
10820typedef uint32_t Vector_4_u32 __attribute__((vector_size(4 * sizeof(uint32_t))));
10821
10822Vector_4_u32 zig_ret_vector_4_u32(void);
10823
10824void zig_vector_4_u32(Vector_4_u32, size_t);
10825void zig_vector_4_u32_vector_4_u32(Vector_4_u32, Vector_4_u32, size_t);
10826
10827Vector_4_u32 c_ret_vector_4_u32(void) {
10828 return (Vector_4_u32){ 41, 42, 43, 44 };
10829}
10830void c_vector_4_u32(Vector_4_u32 v, size_t i) {
10831 assert_or_panic(v[0] == 45);
10832 assert_or_panic(v[1] == 46);
10833 assert_or_panic(v[2] == 47);
10834 assert_or_panic(v[3] == 48);
10835 assert_or_panic(i == 4);
10836}
10837void c_vector_4_u32_vector_4_u32(Vector_4_u32 v0, Vector_4_u32 v1, size_t i) {
10838 assert_or_panic(v0[0] == 49);
10839 assert_or_panic(v0[1] == 50);
10840 assert_or_panic(v0[2] == 51);
10841 assert_or_panic(v0[3] == 52);
10842 assert_or_panic(v1[0] == 53);
10843 assert_or_panic(v1[1] == 54);
10844 assert_or_panic(v1[2] == 55);
10845 assert_or_panic(v1[3] == 56);
10846 assert_or_panic(i == 8);
10847}
10848void c_test_vector_4_u32(void) {
10849 Vector_4_u32 v = zig_ret_vector_4_u32();
10850 assert_or_panic(v[0] == 25);
10851 assert_or_panic(v[1] == 26);
10852 assert_or_panic(v[2] == 27);
10853 assert_or_panic(v[3] == 28);
10854 zig_vector_4_u32((Vector_4_u32){ 29, 30, 31, 32 }, 4);
10855 zig_vector_4_u32_vector_4_u32((Vector_4_u32){ 33, 34, 35, 36 }, (Vector_4_u32){ 37, 38, 39, 40 }, 8);
10856}
10857
10858typedef uint32_t Vector_6_u32 __attribute__((vector_size(6 * sizeof(uint32_t))));
10859
10860Vector_6_u32 zig_ret_vector_6_u32(void);
10861void zig_vector_6_u32(Vector_6_u32, size_t);
10862
10863Vector_6_u32 c_ret_vector_6_u32(void) {
10864 return (Vector_6_u32){ 53, 54, 55, 56, 57, 58 };
10865}
10866void c_vector_6_u32(Vector_6_u32 v, size_t i) {
10867 assert_or_panic(v[0] == 59);
10868 assert_or_panic(v[1] == 60);
10869 assert_or_panic(v[2] == 61);
10870 assert_or_panic(v[3] == 62);
10871 assert_or_panic(v[4] == 63);
10872 assert_or_panic(v[5] == 64);
10873 assert_or_panic(i == 6);
10874}
10875void c_test_vector_6_u32(void) {
10876 Vector_6_u32 v = zig_ret_vector_6_u32();
10877 assert_or_panic(v[0] == 41);
10878 assert_or_panic(v[1] == 42);
10879 assert_or_panic(v[2] == 43);
10880 assert_or_panic(v[3] == 44);
10881 assert_or_panic(v[4] == 45);
10882 assert_or_panic(v[5] == 46);
10883 zig_vector_6_u32((Vector_6_u32){ 47, 48, 49, 50, 51, 52 }, 6);
10884}
10885
10886typedef uint32_t Vector_8_u32 __attribute__((vector_size(8 * sizeof(uint32_t))));
10887
10888Vector_8_u32 zig_ret_vector_8_u32(void);
10889void zig_vector_8_u32(Vector_8_u32, size_t);
10890
10891Vector_8_u32 c_ret_vector_8_u32(void) {
10892 return (Vector_8_u32){ 81, 82, 83, 84, 85, 86, 87, 88 };
10893}
10894void c_vector_8_u32(Vector_8_u32 v, size_t i) {
10895 assert_or_panic(v[0] == 89);
10896 assert_or_panic(v[1] == 90);
10897 assert_or_panic(v[2] == 91);
10898 assert_or_panic(v[3] == 92);
10899 assert_or_panic(v[4] == 93);
10900 assert_or_panic(v[5] == 94);
10901 assert_or_panic(v[6] == 95);
10902 assert_or_panic(v[7] == 96);
10903 assert_or_panic(i == 8);
10904}
10905void c_test_vector_8_u32(void) {
10906 Vector_8_u32 v = zig_ret_vector_8_u32();
10907 assert_or_panic(v[0] == 65);
10908 assert_or_panic(v[1] == 66);
10909 assert_or_panic(v[2] == 67);
10910 assert_or_panic(v[3] == 68);
10911 assert_or_panic(v[4] == 69);
10912 assert_or_panic(v[5] == 70);
10913 assert_or_panic(v[6] == 71);
10914 assert_or_panic(v[7] == 72);
10915 zig_vector_8_u32((Vector_8_u32){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
10916}
10917
10918typedef uint32_t Vector_12_u32 __attribute__((vector_size(12 * sizeof(uint32_t))));
10919
10920Vector_12_u32 zig_ret_vector_12_u32(void);
10921void zig_vector_12_u32(Vector_12_u32, size_t);
10922
10923Vector_12_u32 c_ret_vector_12_u32(void) {
10924 return (Vector_12_u32){ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132 };
10925}
10926void c_vector_12_u32(Vector_12_u32 v, size_t i) {
10927 assert_or_panic(v[0] == 133);
10928 assert_or_panic(v[1] == 134);
10929 assert_or_panic(v[2] == 135);
10930 assert_or_panic(v[3] == 136);
10931 assert_or_panic(v[4] == 137);
10932 assert_or_panic(v[5] == 138);
10933 assert_or_panic(v[6] == 139);
10934 assert_or_panic(v[7] == 140);
10935 assert_or_panic(v[8] == 141);
10936 assert_or_panic(v[9] == 142);
10937 assert_or_panic(v[10] == 143);
10938 assert_or_panic(v[11] == 144);
10939 assert_or_panic(i == 12);
10940}
10941void c_test_vector_12_u32(void) {
10942 Vector_12_u32 v = zig_ret_vector_12_u32();
10943 assert_or_panic(v[0] == 97);
10944 assert_or_panic(v[1] == 98);
10945 assert_or_panic(v[2] == 99);
10946 assert_or_panic(v[3] == 100);
10947 assert_or_panic(v[4] == 101);
10948 assert_or_panic(v[5] == 102);
10949 assert_or_panic(v[6] == 103);
10950 assert_or_panic(v[7] == 104);
10951 assert_or_panic(v[8] == 105);
10952 assert_or_panic(v[9] == 106);
10953 assert_or_panic(v[10] == 107);
10954 assert_or_panic(v[11] == 108);
10955 zig_vector_12_u32((Vector_12_u32){ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120 }, 12);
10956}
10957
10958typedef uint32_t Vector_16_u32 __attribute__((vector_size(16 * sizeof(uint32_t))));
10959
10960Vector_16_u32 zig_ret_vector_16_u32(void);
10961void zig_vector_16_u32(Vector_16_u32, size_t);
10962
10963Vector_16_u32 c_ret_vector_16_u32(void) {
10964 return (Vector_16_u32){ 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192 };
10965}
10966void c_vector_16_u32(Vector_16_u32 v, size_t i) {
10967 assert_or_panic(v[0] == 193);
10968 assert_or_panic(v[1] == 194);
10969 assert_or_panic(v[2] == 195);
10970 assert_or_panic(v[3] == 196);
10971 assert_or_panic(v[4] == 197);
10972 assert_or_panic(v[5] == 198);
10973 assert_or_panic(v[6] == 199);
10974 assert_or_panic(v[7] == 200);
10975 assert_or_panic(v[8] == 201);
10976 assert_or_panic(v[9] == 202);
10977 assert_or_panic(v[10] == 203);
10978 assert_or_panic(v[11] == 204);
10979 assert_or_panic(v[12] == 205);
10980 assert_or_panic(v[13] == 206);
10981 assert_or_panic(v[14] == 207);
10982 assert_or_panic(v[15] == 208);
10983 assert_or_panic(i == 16);
10984}
10985void c_test_vector_16_u32(void) {
10986 Vector_16_u32 v = zig_ret_vector_16_u32();
10987 assert_or_panic(v[0] == 145);
10988 assert_or_panic(v[1] == 146);
10989 assert_or_panic(v[2] == 147);
10990 assert_or_panic(v[3] == 148);
10991 assert_or_panic(v[4] == 149);
10992 assert_or_panic(v[5] == 150);
10993 assert_or_panic(v[6] == 151);
10994 assert_or_panic(v[7] == 152);
10995 assert_or_panic(v[8] == 153);
10996 assert_or_panic(v[9] == 154);
10997 assert_or_panic(v[10] == 155);
10998 assert_or_panic(v[11] == 156);
10999 assert_or_panic(v[12] == 157);
11000 assert_or_panic(v[13] == 158);
11001 assert_or_panic(v[14] == 159);
11002 assert_or_panic(v[15] == 160);
11003 zig_vector_16_u32((Vector_16_u32){ 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176 }, 16);
11004}
11005
11006typedef uint32_t Vector_24_u32 __attribute__((vector_size(24 * sizeof(uint32_t))));
11007
11008Vector_24_u32 zig_ret_vector_24_u32(void);
11009void zig_vector_24_u32(Vector_24_u32, size_t);
11010
11011Vector_24_u32 c_ret_vector_24_u32(void) {
11012 return (Vector_24_u32){
11013 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272,
11014 273, 274, 275, 276, 277, 278, 279, 280,
11015 };
11016}
11017void c_vector_24_u32(Vector_24_u32 v, size_t i) {
11018 assert_or_panic(v[0] == 281);
11019 assert_or_panic(v[1] == 282);
11020 assert_or_panic(v[2] == 283);
11021 assert_or_panic(v[3] == 284);
11022 assert_or_panic(v[4] == 285);
11023 assert_or_panic(v[5] == 286);
11024 assert_or_panic(v[6] == 287);
11025 assert_or_panic(v[7] == 288);
11026 assert_or_panic(v[8] == 289);
11027 assert_or_panic(v[9] == 290);
11028 assert_or_panic(v[10] == 291);
11029 assert_or_panic(v[11] == 292);
11030 assert_or_panic(v[12] == 293);
11031 assert_or_panic(v[13] == 294);
11032 assert_or_panic(v[14] == 295);
11033 assert_or_panic(v[15] == 296);
11034 assert_or_panic(v[16] == 297);
11035 assert_or_panic(v[17] == 298);
11036 assert_or_panic(v[18] == 299);
11037 assert_or_panic(v[19] == 300);
11038 assert_or_panic(v[20] == 301);
11039 assert_or_panic(v[21] == 302);
11040 assert_or_panic(v[22] == 303);
11041 assert_or_panic(v[23] == 304);
11042 assert_or_panic(i == 24);
11043}
11044void c_test_vector_24_u32(void) {
11045 Vector_24_u32 v = zig_ret_vector_24_u32();
11046 assert_or_panic(v[0] == 209);
11047 assert_or_panic(v[1] == 210);
11048 assert_or_panic(v[2] == 211);
11049 assert_or_panic(v[3] == 212);
11050 assert_or_panic(v[4] == 213);
11051 assert_or_panic(v[5] == 214);
11052 assert_or_panic(v[6] == 215);
11053 assert_or_panic(v[7] == 216);
11054 assert_or_panic(v[8] == 217);
11055 assert_or_panic(v[9] == 218);
11056 assert_or_panic(v[10] == 219);
11057 assert_or_panic(v[11] == 220);
11058 assert_or_panic(v[12] == 221);
11059 assert_or_panic(v[13] == 222);
11060 assert_or_panic(v[14] == 223);
11061 assert_or_panic(v[15] == 224);
11062 assert_or_panic(v[16] == 225);
11063 assert_or_panic(v[17] == 226);
11064 assert_or_panic(v[18] == 227);
11065 assert_or_panic(v[19] == 228);
11066 assert_or_panic(v[20] == 229);
11067 assert_or_panic(v[21] == 230);
11068 assert_or_panic(v[22] == 231);
11069 assert_or_panic(v[23] == 232);
11070 zig_vector_24_u32((Vector_24_u32){
11071 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248,
11072 249, 250, 251, 252, 253, 254, 255, 256,
11073 }, 24);
11074}
11075
11076typedef uint32_t Vector_32_u32 __attribute__((vector_size(32 * sizeof(uint32_t))));
11077
11078Vector_32_u32 zig_ret_vector_32_u32(void);
11079void zig_vector_32_u32(Vector_32_u32, size_t);
11080
11081Vector_32_u32 c_ret_vector_32_u32(void) {
11082 return (Vector_32_u32){
11083 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
11084 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400,
11085 };
11086}
11087void c_vector_32_u32(Vector_32_u32 v, size_t i) {
11088 assert_or_panic(v[0] == 401);
11089 assert_or_panic(v[1] == 402);
11090 assert_or_panic(v[2] == 403);
11091 assert_or_panic(v[3] == 404);
11092 assert_or_panic(v[4] == 405);
11093 assert_or_panic(v[5] == 406);
11094 assert_or_panic(v[6] == 407);
11095 assert_or_panic(v[7] == 408);
11096 assert_or_panic(v[8] == 409);
11097 assert_or_panic(v[9] == 410);
11098 assert_or_panic(v[10] == 411);
11099 assert_or_panic(v[11] == 412);
11100 assert_or_panic(v[12] == 413);
11101 assert_or_panic(v[13] == 414);
11102 assert_or_panic(v[14] == 415);
11103 assert_or_panic(v[15] == 416);
11104 assert_or_panic(v[16] == 417);
11105 assert_or_panic(v[17] == 418);
11106 assert_or_panic(v[18] == 419);
11107 assert_or_panic(v[19] == 420);
11108 assert_or_panic(v[20] == 421);
11109 assert_or_panic(v[21] == 422);
11110 assert_or_panic(v[22] == 423);
11111 assert_or_panic(v[23] == 424);
11112 assert_or_panic(v[24] == 425);
11113 assert_or_panic(v[25] == 426);
11114 assert_or_panic(v[26] == 427);
11115 assert_or_panic(v[27] == 428);
11116 assert_or_panic(v[28] == 429);
11117 assert_or_panic(v[29] == 430);
11118 assert_or_panic(v[30] == 431);
11119 assert_or_panic(v[31] == 432);
11120 assert_or_panic(i == 32);
11121}
11122void c_test_vector_32_u32(void) {
11123 Vector_32_u32 v = zig_ret_vector_32_u32();
11124 assert_or_panic(v[0] == 305);
11125 assert_or_panic(v[1] == 306);
11126 assert_or_panic(v[2] == 307);
11127 assert_or_panic(v[3] == 308);
11128 assert_or_panic(v[4] == 309);
11129 assert_or_panic(v[5] == 310);
11130 assert_or_panic(v[6] == 311);
11131 assert_or_panic(v[7] == 312);
11132 assert_or_panic(v[8] == 313);
11133 assert_or_panic(v[9] == 314);
11134 assert_or_panic(v[10] == 315);
11135 assert_or_panic(v[11] == 316);
11136 assert_or_panic(v[12] == 317);
11137 assert_or_panic(v[13] == 318);
11138 assert_or_panic(v[14] == 319);
11139 assert_or_panic(v[15] == 320);
11140 assert_or_panic(v[16] == 321);
11141 assert_or_panic(v[17] == 322);
11142 assert_or_panic(v[18] == 323);
11143 assert_or_panic(v[19] == 324);
11144 assert_or_panic(v[20] == 325);
11145 assert_or_panic(v[21] == 326);
11146 assert_or_panic(v[22] == 327);
11147 assert_or_panic(v[23] == 328);
11148 assert_or_panic(v[24] == 329);
11149 assert_or_panic(v[25] == 330);
11150 assert_or_panic(v[26] == 331);
11151 assert_or_panic(v[27] == 332);
11152 assert_or_panic(v[28] == 333);
11153 assert_or_panic(v[29] == 334);
11154 assert_or_panic(v[30] == 335);
11155 assert_or_panic(v[31] == 336);
11156 zig_vector_32_u32((Vector_32_u32){
11157 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352,
11158 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
11159 }, 32);
11160}
11161
11162typedef uint32_t Vector_48_u32 __attribute__((vector_size(48 * sizeof(uint32_t))));
11163
11164Vector_48_u32 zig_ret_vector_48_u32(void);
11165void zig_vector_48_u32(Vector_48_u32, size_t);
11166
11167Vector_48_u32 c_ret_vector_48_u32(void) {
11168 return (Vector_48_u32){
11169 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544,
11170 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560,
11171 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576,
11172 };
11173}
11174void c_vector_48_u32(Vector_48_u32 v, size_t i) {
11175 assert_or_panic(v[0] == 577);
11176 assert_or_panic(v[1] == 578);
11177 assert_or_panic(v[2] == 579);
11178 assert_or_panic(v[3] == 580);
11179 assert_or_panic(v[4] == 581);
11180 assert_or_panic(v[5] == 582);
11181 assert_or_panic(v[6] == 583);
11182 assert_or_panic(v[7] == 584);
11183 assert_or_panic(v[8] == 585);
11184 assert_or_panic(v[9] == 586);
11185 assert_or_panic(v[10] == 587);
11186 assert_or_panic(v[11] == 588);
11187 assert_or_panic(v[12] == 589);
11188 assert_or_panic(v[13] == 590);
11189 assert_or_panic(v[14] == 591);
11190 assert_or_panic(v[15] == 592);
11191 assert_or_panic(v[16] == 593);
11192 assert_or_panic(v[17] == 594);
11193 assert_or_panic(v[18] == 595);
11194 assert_or_panic(v[19] == 596);
11195 assert_or_panic(v[20] == 597);
11196 assert_or_panic(v[21] == 598);
11197 assert_or_panic(v[22] == 599);
11198 assert_or_panic(v[23] == 600);
11199 assert_or_panic(v[24] == 601);
11200 assert_or_panic(v[25] == 602);
11201 assert_or_panic(v[26] == 603);
11202 assert_or_panic(v[27] == 604);
11203 assert_or_panic(v[28] == 605);
11204 assert_or_panic(v[29] == 606);
11205 assert_or_panic(v[30] == 607);
11206 assert_or_panic(v[31] == 608);
11207 assert_or_panic(v[32] == 609);
11208 assert_or_panic(v[33] == 610);
11209 assert_or_panic(v[34] == 611);
11210 assert_or_panic(v[35] == 612);
11211 assert_or_panic(v[36] == 613);
11212 assert_or_panic(v[37] == 614);
11213 assert_or_panic(v[38] == 615);
11214 assert_or_panic(v[39] == 616);
11215 assert_or_panic(v[40] == 617);
11216 assert_or_panic(v[41] == 618);
11217 assert_or_panic(v[42] == 619);
11218 assert_or_panic(v[43] == 620);
11219 assert_or_panic(v[44] == 621);
11220 assert_or_panic(v[45] == 622);
11221 assert_or_panic(v[46] == 623);
11222 assert_or_panic(v[47] == 624);
11223 assert_or_panic(i == 48);
11224}
11225void c_test_vector_48_u32(void) {
11226 Vector_48_u32 v = zig_ret_vector_48_u32();
11227 assert_or_panic(v[0] == 433);
11228 assert_or_panic(v[1] == 434);
11229 assert_or_panic(v[2] == 435);
11230 assert_or_panic(v[3] == 436);
11231 assert_or_panic(v[4] == 437);
11232 assert_or_panic(v[5] == 438);
11233 assert_or_panic(v[6] == 439);
11234 assert_or_panic(v[7] == 440);
11235 assert_or_panic(v[8] == 441);
11236 assert_or_panic(v[9] == 442);
11237 assert_or_panic(v[10] == 443);
11238 assert_or_panic(v[11] == 444);
11239 assert_or_panic(v[12] == 445);
11240 assert_or_panic(v[13] == 446);
11241 assert_or_panic(v[14] == 447);
11242 assert_or_panic(v[15] == 448);
11243 assert_or_panic(v[16] == 449);
11244 assert_or_panic(v[17] == 450);
11245 assert_or_panic(v[18] == 451);
11246 assert_or_panic(v[19] == 452);
11247 assert_or_panic(v[20] == 453);
11248 assert_or_panic(v[21] == 454);
11249 assert_or_panic(v[22] == 455);
11250 assert_or_panic(v[23] == 456);
11251 assert_or_panic(v[24] == 457);
11252 assert_or_panic(v[25] == 458);
11253 assert_or_panic(v[26] == 459);
11254 assert_or_panic(v[27] == 460);
11255 assert_or_panic(v[28] == 461);
11256 assert_or_panic(v[29] == 462);
11257 assert_or_panic(v[30] == 463);
11258 assert_or_panic(v[31] == 464);
11259 assert_or_panic(v[32] == 465);
11260 assert_or_panic(v[33] == 466);
11261 assert_or_panic(v[34] == 467);
11262 assert_or_panic(v[35] == 468);
11263 assert_or_panic(v[36] == 469);
11264 assert_or_panic(v[37] == 470);
11265 assert_or_panic(v[38] == 471);
11266 assert_or_panic(v[39] == 472);
11267 assert_or_panic(v[40] == 473);
11268 assert_or_panic(v[41] == 474);
11269 assert_or_panic(v[42] == 475);
11270 assert_or_panic(v[43] == 476);
11271 assert_or_panic(v[44] == 477);
11272 assert_or_panic(v[45] == 478);
11273 assert_or_panic(v[46] == 479);
11274 assert_or_panic(v[47] == 480);
11275 zig_vector_48_u32((Vector_48_u32){
11276 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496,
11277 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512,
11278 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528,
11279 }, 48);
11280}
11281
11282typedef uint32_t Vector_64_u32 __attribute__((vector_size(64 * sizeof(uint32_t))));
11283
11284Vector_64_u32 zig_ret_vector_64_u32(void);
11285void zig_vector_64_u32(Vector_64_u32, size_t);
11286
11287Vector_64_u32 c_ret_vector_64_u32(void) {
11288 return (Vector_64_u32){
11289 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768,
11290 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,
11291 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
11292 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816,
11293 };
11294}
11295void c_vector_64_u32(Vector_64_u32 v, size_t i) {
11296 assert_or_panic(v[0] == 817);
11297 assert_or_panic(v[1] == 818);
11298 assert_or_panic(v[2] == 819);
11299 assert_or_panic(v[3] == 820);
11300 assert_or_panic(v[4] == 821);
11301 assert_or_panic(v[5] == 822);
11302 assert_or_panic(v[6] == 823);
11303 assert_or_panic(v[7] == 824);
11304 assert_or_panic(v[8] == 825);
11305 assert_or_panic(v[9] == 826);
11306 assert_or_panic(v[10] == 827);
11307 assert_or_panic(v[11] == 828);
11308 assert_or_panic(v[12] == 829);
11309 assert_or_panic(v[13] == 830);
11310 assert_or_panic(v[14] == 831);
11311 assert_or_panic(v[15] == 832);
11312 assert_or_panic(v[16] == 833);
11313 assert_or_panic(v[17] == 834);
11314 assert_or_panic(v[18] == 835);
11315 assert_or_panic(v[19] == 836);
11316 assert_or_panic(v[20] == 837);
11317 assert_or_panic(v[21] == 838);
11318 assert_or_panic(v[22] == 839);
11319 assert_or_panic(v[23] == 840);
11320 assert_or_panic(v[24] == 841);
11321 assert_or_panic(v[25] == 842);
11322 assert_or_panic(v[26] == 843);
11323 assert_or_panic(v[27] == 844);
11324 assert_or_panic(v[28] == 845);
11325 assert_or_panic(v[29] == 846);
11326 assert_or_panic(v[30] == 847);
11327 assert_or_panic(v[31] == 848);
11328 assert_or_panic(v[32] == 849);
11329 assert_or_panic(v[33] == 850);
11330 assert_or_panic(v[34] == 851);
11331 assert_or_panic(v[35] == 852);
11332 assert_or_panic(v[36] == 853);
11333 assert_or_panic(v[37] == 854);
11334 assert_or_panic(v[38] == 855);
11335 assert_or_panic(v[39] == 856);
11336 assert_or_panic(v[40] == 857);
11337 assert_or_panic(v[41] == 858);
11338 assert_or_panic(v[42] == 859);
11339 assert_or_panic(v[43] == 860);
11340 assert_or_panic(v[44] == 861);
11341 assert_or_panic(v[45] == 862);
11342 assert_or_panic(v[46] == 863);
11343 assert_or_panic(v[47] == 864);
11344 assert_or_panic(v[48] == 865);
11345 assert_or_panic(v[49] == 866);
11346 assert_or_panic(v[50] == 867);
11347 assert_or_panic(v[51] == 868);
11348 assert_or_panic(v[52] == 869);
11349 assert_or_panic(v[53] == 870);
11350 assert_or_panic(v[54] == 871);
11351 assert_or_panic(v[55] == 872);
11352 assert_or_panic(v[56] == 873);
11353 assert_or_panic(v[57] == 874);
11354 assert_or_panic(v[58] == 875);
11355 assert_or_panic(v[59] == 876);
11356 assert_or_panic(v[60] == 877);
11357 assert_or_panic(v[61] == 878);
11358 assert_or_panic(v[62] == 879);
11359 assert_or_panic(v[63] == 880);
11360 assert_or_panic(i == 64);
11361}
11362void c_test_vector_64_u32(void) {
11363 Vector_64_u32 v = zig_ret_vector_64_u32();
11364 assert_or_panic(v[0] == 625);
11365 assert_or_panic(v[1] == 626);
11366 assert_or_panic(v[2] == 627);
11367 assert_or_panic(v[3] == 628);
11368 assert_or_panic(v[4] == 629);
11369 assert_or_panic(v[5] == 630);
11370 assert_or_panic(v[6] == 631);
11371 assert_or_panic(v[7] == 632);
11372 assert_or_panic(v[8] == 633);
11373 assert_or_panic(v[9] == 634);
11374 assert_or_panic(v[10] == 635);
11375 assert_or_panic(v[11] == 636);
11376 assert_or_panic(v[12] == 637);
11377 assert_or_panic(v[13] == 638);
11378 assert_or_panic(v[14] == 639);
11379 assert_or_panic(v[15] == 640);
11380 assert_or_panic(v[16] == 641);
11381 assert_or_panic(v[17] == 642);
11382 assert_or_panic(v[18] == 643);
11383 assert_or_panic(v[19] == 644);
11384 assert_or_panic(v[20] == 645);
11385 assert_or_panic(v[21] == 646);
11386 assert_or_panic(v[22] == 647);
11387 assert_or_panic(v[23] == 648);
11388 assert_or_panic(v[24] == 649);
11389 assert_or_panic(v[25] == 650);
11390 assert_or_panic(v[26] == 651);
11391 assert_or_panic(v[27] == 652);
11392 assert_or_panic(v[28] == 653);
11393 assert_or_panic(v[29] == 654);
11394 assert_or_panic(v[30] == 655);
11395 assert_or_panic(v[31] == 656);
11396 assert_or_panic(v[32] == 657);
11397 assert_or_panic(v[33] == 658);
11398 assert_or_panic(v[34] == 659);
11399 assert_or_panic(v[35] == 660);
11400 assert_or_panic(v[36] == 661);
11401 assert_or_panic(v[37] == 662);
11402 assert_or_panic(v[38] == 663);
11403 assert_or_panic(v[39] == 664);
11404 assert_or_panic(v[40] == 665);
11405 assert_or_panic(v[41] == 666);
11406 assert_or_panic(v[42] == 667);
11407 assert_or_panic(v[43] == 668);
11408 assert_or_panic(v[44] == 669);
11409 assert_or_panic(v[45] == 670);
11410 assert_or_panic(v[46] == 671);
11411 assert_or_panic(v[47] == 672);
11412 assert_or_panic(v[48] == 673);
11413 assert_or_panic(v[49] == 674);
11414 assert_or_panic(v[50] == 675);
11415 assert_or_panic(v[51] == 676);
11416 assert_or_panic(v[52] == 677);
11417 assert_or_panic(v[53] == 678);
11418 assert_or_panic(v[54] == 679);
11419 assert_or_panic(v[55] == 680);
11420 assert_or_panic(v[56] == 681);
11421 assert_or_panic(v[57] == 682);
11422 assert_or_panic(v[58] == 683);
11423 assert_or_panic(v[59] == 684);
11424 assert_or_panic(v[60] == 685);
11425 assert_or_panic(v[61] == 686);
11426 assert_or_panic(v[62] == 687);
11427 assert_or_panic(v[63] == 688);
11428 zig_vector_64_u32((Vector_64_u32){
11429 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704,
11430 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720,
11431 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736,
11432 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752,
11433 }, 64);
11434}
11435
11436typedef uint32_t Vector_96_u32 __attribute__((vector_size(96 * sizeof(uint32_t))));
11437
11438Vector_96_u32 zig_ret_vector_96_u32(void);
11439void zig_vector_96_u32(Vector_96_u32, size_t);
11440
11441Vector_96_u32 c_ret_vector_96_u32(void) {
11442 return (Vector_96_u32){
11443 1082, 1083, 1084, 1085, 1086, 1087, 1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097,
11444 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113,
11445 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129,
11446 1130, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145,
11447 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161,
11448 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177,
11449 };
11450}
11451void c_vector_96_u32(Vector_96_u32 v, size_t i) {
11452 assert_or_panic(v[0] == 1178);
11453 assert_or_panic(v[1] == 1179);
11454 assert_or_panic(v[2] == 1180);
11455 assert_or_panic(v[3] == 1181);
11456 assert_or_panic(v[4] == 1182);
11457 assert_or_panic(v[5] == 1183);
11458 assert_or_panic(v[6] == 1184);
11459 assert_or_panic(v[7] == 1185);
11460 assert_or_panic(v[8] == 1186);
11461 assert_or_panic(v[9] == 1187);
11462 assert_or_panic(v[10] == 1188);
11463 assert_or_panic(v[11] == 1189);
11464 assert_or_panic(v[12] == 1190);
11465 assert_or_panic(v[13] == 1191);
11466 assert_or_panic(v[14] == 1192);
11467 assert_or_panic(v[15] == 1193);
11468 assert_or_panic(v[16] == 1194);
11469 assert_or_panic(v[17] == 1195);
11470 assert_or_panic(v[18] == 1196);
11471 assert_or_panic(v[19] == 1197);
11472 assert_or_panic(v[20] == 1198);
11473 assert_or_panic(v[21] == 1199);
11474 assert_or_panic(v[22] == 1200);
11475 assert_or_panic(v[23] == 1201);
11476 assert_or_panic(v[24] == 1202);
11477 assert_or_panic(v[25] == 1203);
11478 assert_or_panic(v[26] == 1204);
11479 assert_or_panic(v[27] == 1205);
11480 assert_or_panic(v[28] == 1206);
11481 assert_or_panic(v[29] == 1207);
11482 assert_or_panic(v[30] == 1208);
11483 assert_or_panic(v[31] == 1209);
11484 assert_or_panic(v[32] == 1210);
11485 assert_or_panic(v[33] == 1211);
11486 assert_or_panic(v[34] == 1212);
11487 assert_or_panic(v[35] == 1213);
11488 assert_or_panic(v[36] == 1214);
11489 assert_or_panic(v[37] == 1215);
11490 assert_or_panic(v[38] == 1216);
11491 assert_or_panic(v[39] == 1217);
11492 assert_or_panic(v[40] == 1218);
11493 assert_or_panic(v[41] == 1219);
11494 assert_or_panic(v[42] == 1220);
11495 assert_or_panic(v[43] == 1221);
11496 assert_or_panic(v[44] == 1222);
11497 assert_or_panic(v[45] == 1223);
11498 assert_or_panic(v[46] == 1224);
11499 assert_or_panic(v[47] == 1225);
11500 assert_or_panic(v[48] == 1226);
11501 assert_or_panic(v[49] == 1227);
11502 assert_or_panic(v[50] == 1228);
11503 assert_or_panic(v[51] == 1229);
11504 assert_or_panic(v[52] == 1230);
11505 assert_or_panic(v[53] == 1231);
11506 assert_or_panic(v[54] == 1232);
11507 assert_or_panic(v[55] == 1233);
11508 assert_or_panic(v[56] == 1234);
11509 assert_or_panic(v[57] == 1235);
11510 assert_or_panic(v[58] == 1236);
11511 assert_or_panic(v[59] == 1237);
11512 assert_or_panic(v[60] == 1238);
11513 assert_or_panic(v[61] == 1239);
11514 assert_or_panic(v[62] == 1240);
11515 assert_or_panic(v[63] == 1241);
11516 assert_or_panic(v[64] == 1242);
11517 assert_or_panic(v[65] == 1243);
11518 assert_or_panic(v[66] == 1244);
11519 assert_or_panic(v[67] == 1245);
11520 assert_or_panic(v[68] == 1246);
11521 assert_or_panic(v[69] == 1247);
11522 assert_or_panic(v[70] == 1248);
11523 assert_or_panic(v[71] == 1249);
11524 assert_or_panic(v[72] == 1250);
11525 assert_or_panic(v[73] == 1251);
11526 assert_or_panic(v[74] == 1252);
11527 assert_or_panic(v[75] == 1253);
11528 assert_or_panic(v[76] == 1254);
11529 assert_or_panic(v[77] == 1255);
11530 assert_or_panic(v[80] == 1258);
11531 assert_or_panic(v[81] == 1259);
11532 assert_or_panic(v[82] == 1260);
11533 assert_or_panic(v[83] == 1261);
11534 assert_or_panic(v[84] == 1262);
11535 assert_or_panic(v[85] == 1263);
11536 assert_or_panic(v[86] == 1264);
11537 assert_or_panic(v[87] == 1265);
11538 assert_or_panic(v[88] == 1266);
11539 assert_or_panic(v[89] == 1267);
11540 assert_or_panic(v[90] == 1268);
11541 assert_or_panic(v[91] == 1269);
11542 assert_or_panic(v[92] == 1270);
11543 assert_or_panic(v[93] == 1271);
11544 assert_or_panic(v[94] == 1272);
11545 assert_or_panic(v[95] == 1273);
11546 assert_or_panic(i == 96);
11547}
11548void c_test_vector_96_u32(void) {
11549 Vector_96_u32 v = zig_ret_vector_96_u32();
11550 assert_or_panic(v[0] == 890);
11551 assert_or_panic(v[1] == 891);
11552 assert_or_panic(v[2] == 892);
11553 assert_or_panic(v[3] == 893);
11554 assert_or_panic(v[4] == 894);
11555 assert_or_panic(v[5] == 895);
11556 assert_or_panic(v[6] == 896);
11557 assert_or_panic(v[7] == 897);
11558 assert_or_panic(v[8] == 898);
11559 assert_or_panic(v[9] == 899);
11560 assert_or_panic(v[10] == 900);
11561 assert_or_panic(v[11] == 901);
11562 assert_or_panic(v[12] == 902);
11563 assert_or_panic(v[13] == 903);
11564 assert_or_panic(v[14] == 904);
11565 assert_or_panic(v[15] == 905);
11566 assert_or_panic(v[16] == 906);
11567 assert_or_panic(v[17] == 907);
11568 assert_or_panic(v[18] == 908);
11569 assert_or_panic(v[19] == 909);
11570 assert_or_panic(v[20] == 910);
11571 assert_or_panic(v[21] == 911);
11572 assert_or_panic(v[22] == 912);
11573 assert_or_panic(v[23] == 913);
11574 assert_or_panic(v[24] == 914);
11575 assert_or_panic(v[25] == 915);
11576 assert_or_panic(v[26] == 916);
11577 assert_or_panic(v[27] == 917);
11578 assert_or_panic(v[28] == 918);
11579 assert_or_panic(v[29] == 919);
11580 assert_or_panic(v[30] == 920);
11581 assert_or_panic(v[31] == 921);
11582 assert_or_panic(v[32] == 922);
11583 assert_or_panic(v[33] == 923);
11584 assert_or_panic(v[34] == 924);
11585 assert_or_panic(v[35] == 925);
11586 assert_or_panic(v[36] == 926);
11587 assert_or_panic(v[37] == 927);
11588 assert_or_panic(v[38] == 928);
11589 assert_or_panic(v[39] == 929);
11590 assert_or_panic(v[40] == 930);
11591 assert_or_panic(v[41] == 931);
11592 assert_or_panic(v[42] == 932);
11593 assert_or_panic(v[43] == 933);
11594 assert_or_panic(v[44] == 934);
11595 assert_or_panic(v[45] == 935);
11596 assert_or_panic(v[46] == 936);
11597 assert_or_panic(v[47] == 937);
11598 assert_or_panic(v[48] == 938);
11599 assert_or_panic(v[49] == 939);
11600 assert_or_panic(v[50] == 940);
11601 assert_or_panic(v[51] == 941);
11602 assert_or_panic(v[52] == 942);
11603 assert_or_panic(v[53] == 943);
11604 assert_or_panic(v[54] == 944);
11605 assert_or_panic(v[55] == 945);
11606 assert_or_panic(v[56] == 946);
11607 assert_or_panic(v[57] == 947);
11608 assert_or_panic(v[58] == 948);
11609 assert_or_panic(v[59] == 949);
11610 assert_or_panic(v[60] == 950);
11611 assert_or_panic(v[61] == 951);
11612 assert_or_panic(v[62] == 952);
11613 assert_or_panic(v[63] == 953);
11614 assert_or_panic(v[64] == 954);
11615 assert_or_panic(v[65] == 955);
11616 assert_or_panic(v[66] == 956);
11617 assert_or_panic(v[67] == 957);
11618 assert_or_panic(v[68] == 958);
11619 assert_or_panic(v[69] == 959);
11620 assert_or_panic(v[70] == 960);
11621 assert_or_panic(v[71] == 961);
11622 assert_or_panic(v[72] == 962);
11623 assert_or_panic(v[73] == 963);
11624 assert_or_panic(v[74] == 964);
11625 assert_or_panic(v[75] == 965);
11626 assert_or_panic(v[76] == 966);
11627 assert_or_panic(v[77] == 967);
11628 assert_or_panic(v[78] == 968);
11629 assert_or_panic(v[79] == 969);
11630 assert_or_panic(v[80] == 970);
11631 assert_or_panic(v[81] == 971);
11632 assert_or_panic(v[82] == 972);
11633 assert_or_panic(v[83] == 973);
11634 assert_or_panic(v[84] == 974);
11635 assert_or_panic(v[85] == 975);
11636 assert_or_panic(v[86] == 976);
11637 assert_or_panic(v[87] == 977);
11638 assert_or_panic(v[88] == 978);
11639 assert_or_panic(v[89] == 979);
11640 assert_or_panic(v[90] == 980);
11641 assert_or_panic(v[91] == 981);
11642 assert_or_panic(v[92] == 982);
11643 assert_or_panic(v[93] == 983);
11644 assert_or_panic(v[94] == 984);
11645 assert_or_panic(v[95] == 985);
11646 zig_vector_96_u32((Vector_96_u32){
11647 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001,
11648 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017,
11649 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033,
11650 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049,
11651 1050, 1051, 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065,
11652 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081,
11653 }, 96);
11654}
11655
11656typedef uint32_t Vector_128_u32 __attribute__((vector_size(128 * sizeof(uint32_t))));
11657
11658Vector_128_u32 zig_ret_vector_128_u32(void);
11659void zig_vector_128_u32(Vector_128_u32, size_t);
11660
11661Vector_128_u32 c_ret_vector_128_u32(void) {
11662 return (Vector_128_u32){
11663 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544, 1545,
11664 1546, 1547, 1548, 1549, 1550, 1551, 1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560, 1561,
11665 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577,
11666 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1587, 1588, 1589, 1590, 1591, 1592, 1593,
11667 1594, 1595, 1596, 1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609,
11668 1610, 1611, 1612, 1613, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625,
11669 1626, 1627, 1628, 1629, 1630, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641,
11670 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657,
11671 };
11672}
11673void c_vector_128_u32(Vector_128_u32 v, size_t i) {
11674 assert_or_panic(v[0] == 1658);
11675 assert_or_panic(v[1] == 1659);
11676 assert_or_panic(v[2] == 1660);
11677 assert_or_panic(v[3] == 1661);
11678 assert_or_panic(v[4] == 1662);
11679 assert_or_panic(v[5] == 1663);
11680 assert_or_panic(v[6] == 1664);
11681 assert_or_panic(v[7] == 1665);
11682 assert_or_panic(v[8] == 1666);
11683 assert_or_panic(v[9] == 1667);
11684 assert_or_panic(v[10] == 1668);
11685 assert_or_panic(v[11] == 1669);
11686 assert_or_panic(v[12] == 1670);
11687 assert_or_panic(v[13] == 1671);
11688 assert_or_panic(v[14] == 1672);
11689 assert_or_panic(v[15] == 1673);
11690 assert_or_panic(v[16] == 1674);
11691 assert_or_panic(v[17] == 1675);
11692 assert_or_panic(v[18] == 1676);
11693 assert_or_panic(v[19] == 1677);
11694 assert_or_panic(v[20] == 1678);
11695 assert_or_panic(v[21] == 1679);
11696 assert_or_panic(v[22] == 1680);
11697 assert_or_panic(v[23] == 1681);
11698 assert_or_panic(v[24] == 1682);
11699 assert_or_panic(v[25] == 1683);
11700 assert_or_panic(v[26] == 1684);
11701 assert_or_panic(v[27] == 1685);
11702 assert_or_panic(v[28] == 1686);
11703 assert_or_panic(v[29] == 1687);
11704 assert_or_panic(v[30] == 1688);
11705 assert_or_panic(v[31] == 1689);
11706 assert_or_panic(v[32] == 1690);
11707 assert_or_panic(v[33] == 1691);
11708 assert_or_panic(v[34] == 1692);
11709 assert_or_panic(v[35] == 1693);
11710 assert_or_panic(v[36] == 1694);
11711 assert_or_panic(v[37] == 1695);
11712 assert_or_panic(v[38] == 1696);
11713 assert_or_panic(v[39] == 1697);
11714 assert_or_panic(v[40] == 1698);
11715 assert_or_panic(v[41] == 1699);
11716 assert_or_panic(v[42] == 1700);
11717 assert_or_panic(v[43] == 1701);
11718 assert_or_panic(v[44] == 1702);
11719 assert_or_panic(v[45] == 1703);
11720 assert_or_panic(v[46] == 1704);
11721 assert_or_panic(v[47] == 1705);
11722 assert_or_panic(v[48] == 1706);
11723 assert_or_panic(v[49] == 1707);
11724 assert_or_panic(v[50] == 1708);
11725 assert_or_panic(v[51] == 1709);
11726 assert_or_panic(v[52] == 1710);
11727 assert_or_panic(v[53] == 1711);
11728 assert_or_panic(v[54] == 1712);
11729 assert_or_panic(v[55] == 1713);
11730 assert_or_panic(v[56] == 1714);
11731 assert_or_panic(v[57] == 1715);
11732 assert_or_panic(v[58] == 1716);
11733 assert_or_panic(v[59] == 1717);
11734 assert_or_panic(v[60] == 1718);
11735 assert_or_panic(v[61] == 1719);
11736 assert_or_panic(v[62] == 1720);
11737 assert_or_panic(v[63] == 1721);
11738 assert_or_panic(v[64] == 1722);
11739 assert_or_panic(v[65] == 1723);
11740 assert_or_panic(v[66] == 1724);
11741 assert_or_panic(v[67] == 1725);
11742 assert_or_panic(v[68] == 1726);
11743 assert_or_panic(v[69] == 1727);
11744 assert_or_panic(v[70] == 1728);
11745 assert_or_panic(v[71] == 1729);
11746 assert_or_panic(v[72] == 1730);
11747 assert_or_panic(v[73] == 1731);
11748 assert_or_panic(v[74] == 1732);
11749 assert_or_panic(v[75] == 1733);
11750 assert_or_panic(v[76] == 1734);
11751 assert_or_panic(v[77] == 1735);
11752 assert_or_panic(v[78] == 1736);
11753 assert_or_panic(v[79] == 1737);
11754 assert_or_panic(v[80] == 1738);
11755 assert_or_panic(v[81] == 1739);
11756 assert_or_panic(v[82] == 1740);
11757 assert_or_panic(v[83] == 1741);
11758 assert_or_panic(v[84] == 1742);
11759 assert_or_panic(v[85] == 1743);
11760 assert_or_panic(v[86] == 1744);
11761 assert_or_panic(v[87] == 1745);
11762 assert_or_panic(v[88] == 1746);
11763 assert_or_panic(v[89] == 1747);
11764 assert_or_panic(v[90] == 1748);
11765 assert_or_panic(v[91] == 1749);
11766 assert_or_panic(v[92] == 1750);
11767 assert_or_panic(v[93] == 1751);
11768 assert_or_panic(v[94] == 1752);
11769 assert_or_panic(v[95] == 1753);
11770 assert_or_panic(v[96] == 1754);
11771 assert_or_panic(v[97] == 1755);
11772 assert_or_panic(v[98] == 1756);
11773 assert_or_panic(v[99] == 1757);
11774 assert_or_panic(v[100] == 1758);
11775 assert_or_panic(v[101] == 1759);
11776 assert_or_panic(v[102] == 1760);
11777 assert_or_panic(v[103] == 1761);
11778 assert_or_panic(v[104] == 1762);
11779 assert_or_panic(v[105] == 1763);
11780 assert_or_panic(v[106] == 1764);
11781 assert_or_panic(v[107] == 1765);
11782 assert_or_panic(v[108] == 1766);
11783 assert_or_panic(v[109] == 1767);
11784 assert_or_panic(v[110] == 1768);
11785 assert_or_panic(v[111] == 1769);
11786 assert_or_panic(v[112] == 1770);
11787 assert_or_panic(v[113] == 1771);
11788 assert_or_panic(v[114] == 1772);
11789 assert_or_panic(v[115] == 1773);
11790 assert_or_panic(v[116] == 1774);
11791 assert_or_panic(v[117] == 1775);
11792 assert_or_panic(v[118] == 1776);
11793 assert_or_panic(v[119] == 1777);
11794 assert_or_panic(v[120] == 1778);
11795 assert_or_panic(v[121] == 1779);
11796 assert_or_panic(v[122] == 1780);
11797 assert_or_panic(v[123] == 1781);
11798 assert_or_panic(v[124] == 1782);
11799 assert_or_panic(v[125] == 1783);
11800 assert_or_panic(v[126] == 1784);
11801 assert_or_panic(v[127] == 1785);
11802 assert_or_panic(i == 128);
11803}
11804void c_test_vector_128_u32(void) {
11805 Vector_128_u32 v = zig_ret_vector_128_u32();
11806 assert_or_panic(v[0] == 1274);
11807 assert_or_panic(v[1] == 1275);
11808 assert_or_panic(v[2] == 1276);
11809 assert_or_panic(v[3] == 1277);
11810 assert_or_panic(v[4] == 1278);
11811 assert_or_panic(v[5] == 1279);
11812 assert_or_panic(v[6] == 1280);
11813 assert_or_panic(v[7] == 1281);
11814 assert_or_panic(v[8] == 1282);
11815 assert_or_panic(v[9] == 1283);
11816 assert_or_panic(v[10] == 1284);
11817 assert_or_panic(v[11] == 1285);
11818 assert_or_panic(v[12] == 1286);
11819 assert_or_panic(v[13] == 1287);
11820 assert_or_panic(v[14] == 1288);
11821 assert_or_panic(v[15] == 1289);
11822 assert_or_panic(v[16] == 1290);
11823 assert_or_panic(v[17] == 1291);
11824 assert_or_panic(v[18] == 1292);
11825 assert_or_panic(v[19] == 1293);
11826 assert_or_panic(v[20] == 1294);
11827 assert_or_panic(v[21] == 1295);
11828 assert_or_panic(v[22] == 1296);
11829 assert_or_panic(v[23] == 1297);
11830 assert_or_panic(v[24] == 1298);
11831 assert_or_panic(v[25] == 1299);
11832 assert_or_panic(v[26] == 1300);
11833 assert_or_panic(v[27] == 1301);
11834 assert_or_panic(v[28] == 1302);
11835 assert_or_panic(v[29] == 1303);
11836 assert_or_panic(v[30] == 1304);
11837 assert_or_panic(v[31] == 1305);
11838 assert_or_panic(v[32] == 1306);
11839 assert_or_panic(v[33] == 1307);
11840 assert_or_panic(v[34] == 1308);
11841 assert_or_panic(v[35] == 1309);
11842 assert_or_panic(v[36] == 1310);
11843 assert_or_panic(v[37] == 1311);
11844 assert_or_panic(v[38] == 1312);
11845 assert_or_panic(v[39] == 1313);
11846 assert_or_panic(v[40] == 1314);
11847 assert_or_panic(v[41] == 1315);
11848 assert_or_panic(v[42] == 1316);
11849 assert_or_panic(v[43] == 1317);
11850 assert_or_panic(v[44] == 1318);
11851 assert_or_panic(v[45] == 1319);
11852 assert_or_panic(v[46] == 1320);
11853 assert_or_panic(v[47] == 1321);
11854 assert_or_panic(v[48] == 1322);
11855 assert_or_panic(v[49] == 1323);
11856 assert_or_panic(v[50] == 1324);
11857 assert_or_panic(v[51] == 1325);
11858 assert_or_panic(v[52] == 1326);
11859 assert_or_panic(v[53] == 1327);
11860 assert_or_panic(v[54] == 1328);
11861 assert_or_panic(v[55] == 1329);
11862 assert_or_panic(v[56] == 1330);
11863 assert_or_panic(v[57] == 1331);
11864 assert_or_panic(v[58] == 1332);
11865 assert_or_panic(v[59] == 1333);
11866 assert_or_panic(v[60] == 1334);
11867 assert_or_panic(v[61] == 1335);
11868 assert_or_panic(v[62] == 1336);
11869 assert_or_panic(v[63] == 1337);
11870 assert_or_panic(v[64] == 1338);
11871 assert_or_panic(v[65] == 1339);
11872 assert_or_panic(v[66] == 1340);
11873 assert_or_panic(v[67] == 1341);
11874 assert_or_panic(v[68] == 1342);
11875 assert_or_panic(v[69] == 1343);
11876 assert_or_panic(v[70] == 1344);
11877 assert_or_panic(v[71] == 1345);
11878 assert_or_panic(v[72] == 1346);
11879 assert_or_panic(v[73] == 1347);
11880 assert_or_panic(v[74] == 1348);
11881 assert_or_panic(v[75] == 1349);
11882 assert_or_panic(v[76] == 1350);
11883 assert_or_panic(v[77] == 1351);
11884 assert_or_panic(v[78] == 1352);
11885 assert_or_panic(v[79] == 1353);
11886 assert_or_panic(v[80] == 1354);
11887 assert_or_panic(v[81] == 1355);
11888 assert_or_panic(v[82] == 1356);
11889 assert_or_panic(v[83] == 1357);
11890 assert_or_panic(v[84] == 1358);
11891 assert_or_panic(v[85] == 1359);
11892 assert_or_panic(v[86] == 1360);
11893 assert_or_panic(v[87] == 1361);
11894 assert_or_panic(v[88] == 1362);
11895 assert_or_panic(v[89] == 1363);
11896 assert_or_panic(v[90] == 1364);
11897 assert_or_panic(v[91] == 1365);
11898 assert_or_panic(v[92] == 1366);
11899 assert_or_panic(v[93] == 1367);
11900 assert_or_panic(v[94] == 1368);
11901 assert_or_panic(v[95] == 1369);
11902 assert_or_panic(v[96] == 1370);
11903 assert_or_panic(v[97] == 1371);
11904 assert_or_panic(v[98] == 1372);
11905 assert_or_panic(v[99] == 1373);
11906 assert_or_panic(v[100] == 1374);
11907 assert_or_panic(v[101] == 1375);
11908 assert_or_panic(v[102] == 1376);
11909 assert_or_panic(v[103] == 1377);
11910 assert_or_panic(v[104] == 1378);
11911 assert_or_panic(v[105] == 1379);
11912 assert_or_panic(v[106] == 1380);
11913 assert_or_panic(v[107] == 1381);
11914 assert_or_panic(v[108] == 1382);
11915 assert_or_panic(v[109] == 1383);
11916 assert_or_panic(v[110] == 1384);
11917 assert_or_panic(v[111] == 1385);
11918 assert_or_panic(v[112] == 1386);
11919 assert_or_panic(v[113] == 1387);
11920 assert_or_panic(v[114] == 1388);
11921 assert_or_panic(v[115] == 1389);
11922 assert_or_panic(v[116] == 1390);
11923 assert_or_panic(v[117] == 1391);
11924 assert_or_panic(v[118] == 1392);
11925 assert_or_panic(v[119] == 1393);
11926 assert_or_panic(v[120] == 1394);
11927 assert_or_panic(v[121] == 1395);
11928 assert_or_panic(v[122] == 1396);
11929 assert_or_panic(v[123] == 1397);
11930 assert_or_panic(v[124] == 1398);
11931 assert_or_panic(v[125] == 1399);
11932 assert_or_panic(v[126] == 1400);
11933 assert_or_panic(v[127] == 1401);
11934 zig_vector_128_u32((Vector_128_u32){
11935 1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1417,
11936 1418, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432, 1433,
11937 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446, 1447, 1448, 1449,
11938 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464, 1465,
11939 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481,
11940 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491, 1492, 1493, 1494, 1495, 1496, 1497,
11941 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1509, 1510, 1511, 1512, 1513,
11942 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521, 1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529,
11943 }, 128);
11944}
11945
11946typedef uint64_t Vector_1_u64 __attribute__((vector_size(1 * sizeof(uint64_t))));
11947
11948Vector_1_u64 zig_ret_vector_1_u64(void);
11949void zig_vector_1_u64(Vector_1_u64, size_t);
11950
11951Vector_1_u64 c_ret_vector_1_u64(void) {
11952 return (Vector_1_u64){ 3 };
11953}
11954void c_vector_1_u64(Vector_1_u64 v, size_t i) {
11955 assert_or_panic(v[0] == 4);
11956 assert_or_panic(i == 1);
11957}
11958void c_test_vector_1_u64(void) {
11959 Vector_1_u64 v = zig_ret_vector_1_u64();
11960 assert_or_panic(v[0] == 1);
11961 zig_vector_1_u64((Vector_1_u64){ 2 }, 1);
11962}
11963
11964typedef uint64_t Vector_2_u64 __attribute__((vector_size(2 * sizeof(uint64_t))));
11965
11966Vector_2_u64 zig_ret_vector_2_u64(void);
11967void zig_vector_2_u64(Vector_2_u64, size_t);
11968
11969Vector_2_u64 c_ret_vector_2_u64(void) {
11970 return (Vector_2_u64){ 9, 10 };
11971}
11972void c_vector_2_u64(Vector_2_u64 v, size_t i) {
11973 assert_or_panic(v[0] == 11);
11974 assert_or_panic(v[1] == 12);
11975 assert_or_panic(i == 2);
11976}
11977void c_test_vector_2_u64(void) {
11978 Vector_2_u64 v = zig_ret_vector_2_u64();
11979 assert_or_panic(v[0] == 5);
11980 assert_or_panic(v[1] == 6);
11981 zig_vector_2_u64((Vector_2_u64){ 7, 8 }, 2);
11982}
11983
11984typedef uint64_t Vector_3_u64 __attribute__((vector_size(3 * sizeof(uint64_t))));
11985
11986Vector_3_u64 zig_ret_vector_3_u64(void);
11987void zig_vector_3_u64(Vector_3_u64, size_t);
11988
11989Vector_3_u64 c_ret_vector_3_u64(void) {
11990 return (Vector_3_u64){ 19, 20, 21 };
11991}
11992void c_vector_3_u64(Vector_3_u64 v, size_t i) {
11993 assert_or_panic(v[0] == 22);
11994 assert_or_panic(v[1] == 23);
11995 assert_or_panic(v[2] == 24);
11996 assert_or_panic(i == 3);
11997}
11998void c_test_vector_3_u64(void) {
11999 Vector_3_u64 v = zig_ret_vector_3_u64();
12000 assert_or_panic(v[0] == 13);
12001 assert_or_panic(v[1] == 14);
12002 assert_or_panic(v[2] == 15);
12003 zig_vector_3_u64((Vector_3_u64){ 16, 17, 18 }, 3);
12004}
12005
12006typedef uint64_t Vector_4_u64 __attribute__((vector_size(4 * sizeof(uint64_t))));
12007
12008Vector_4_u64 zig_ret_vector_4_u64(void);
12009void zig_vector_4_u64(Vector_4_u64, size_t);
12010
12011Vector_4_u64 c_ret_vector_4_u64(void) {
12012 return (Vector_4_u64){ 33, 34, 35, 36 };
12013}
12014void c_vector_4_u64(Vector_4_u64 v, size_t i) {
12015 assert_or_panic(v[0] == 37);
12016 assert_or_panic(v[1] == 38);
12017 assert_or_panic(v[2] == 39);
12018 assert_or_panic(v[3] == 40);
12019 assert_or_panic(i == 4);
12020}
12021void c_test_vector_4_u64(void) {
12022 Vector_4_u64 v = zig_ret_vector_4_u64();
12023 assert_or_panic(v[0] == 25);
12024 assert_or_panic(v[1] == 26);
12025 assert_or_panic(v[2] == 27);
12026 assert_or_panic(v[3] == 28);
12027 zig_vector_4_u64((Vector_4_u64){ 29, 30, 31, 32 }, 4);
12028}
12029
12030typedef uint64_t Vector_6_u64 __attribute__((vector_size(6 * sizeof(uint64_t))));
12031
12032Vector_6_u64 zig_ret_vector_6_u64(void);
12033void zig_vector_6_u64(Vector_6_u64, size_t);
12034
12035Vector_6_u64 c_ret_vector_6_u64(void) {
12036 return (Vector_6_u64){ 53, 54, 55, 56, 57, 58 };
12037}
12038void c_vector_6_u64(Vector_6_u64 v, size_t i) {
12039 assert_or_panic(v[0] == 59);
12040 assert_or_panic(v[1] == 60);
12041 assert_or_panic(v[2] == 61);
12042 assert_or_panic(v[3] == 62);
12043 assert_or_panic(v[4] == 63);
12044 assert_or_panic(v[5] == 64);
12045 assert_or_panic(i == 6);
12046}
12047void c_test_vector_6_u64(void) {
12048 Vector_6_u64 v = zig_ret_vector_6_u64();
12049 assert_or_panic(v[0] == 41);
12050 assert_or_panic(v[1] == 42);
12051 assert_or_panic(v[2] == 43);
12052 assert_or_panic(v[3] == 44);
12053 assert_or_panic(v[4] == 45);
12054 assert_or_panic(v[5] == 46);
12055 zig_vector_6_u64((Vector_6_u64){ 47, 48, 49, 50, 51, 52 }, 6);
12056}
12057
12058typedef uint64_t Vector_8_u64 __attribute__((vector_size(8 * sizeof(uint64_t))));
12059
12060Vector_8_u64 zig_ret_vector_8_u64(void);
12061void zig_vector_8_u64(Vector_8_u64, size_t);
12062
12063Vector_8_u64 c_ret_vector_8_u64(void) {
12064 return (Vector_8_u64){ 81, 82, 83, 84, 85, 86, 87, 88 };
12065}
12066void c_vector_8_u64(Vector_8_u64 v, size_t i) {
12067 assert_or_panic(v[0] == 89);
12068 assert_or_panic(v[1] == 90);
12069 assert_or_panic(v[2] == 91);
12070 assert_or_panic(v[3] == 92);
12071 assert_or_panic(v[4] == 93);
12072 assert_or_panic(v[5] == 94);
12073 assert_or_panic(v[6] == 95);
12074 assert_or_panic(v[7] == 96);
12075 assert_or_panic(i == 8);
12076}
12077void c_test_vector_8_u64(void) {
12078 Vector_8_u64 v = zig_ret_vector_8_u64();
12079 assert_or_panic(v[0] == 65);
12080 assert_or_panic(v[1] == 66);
12081 assert_or_panic(v[2] == 67);
12082 assert_or_panic(v[3] == 68);
12083 assert_or_panic(v[4] == 69);
12084 assert_or_panic(v[5] == 70);
12085 assert_or_panic(v[6] == 71);
12086 assert_or_panic(v[7] == 72);
12087 zig_vector_8_u64((Vector_8_u64){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
12088}
12089
12090typedef uint64_t Vector_12_u64 __attribute__((vector_size(12 * sizeof(uint64_t))));
12091
12092Vector_12_u64 zig_ret_vector_12_u64(void);
12093void zig_vector_12_u64(Vector_12_u64, size_t);
12094
12095Vector_12_u64 c_ret_vector_12_u64(void) {
12096 return (Vector_12_u64){ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132 };
12097}
12098void c_vector_12_u64(Vector_12_u64 v, size_t i) {
12099 assert_or_panic(v[0] == 133);
12100 assert_or_panic(v[1] == 134);
12101 assert_or_panic(v[2] == 135);
12102 assert_or_panic(v[3] == 136);
12103 assert_or_panic(v[4] == 137);
12104 assert_or_panic(v[5] == 138);
12105 assert_or_panic(v[6] == 139);
12106 assert_or_panic(v[7] == 140);
12107 assert_or_panic(v[8] == 141);
12108 assert_or_panic(v[9] == 142);
12109 assert_or_panic(v[10] == 143);
12110 assert_or_panic(v[11] == 144);
12111 assert_or_panic(i == 12);
12112}
12113void c_test_vector_12_u64(void) {
12114 Vector_12_u64 v = zig_ret_vector_12_u64();
12115 assert_or_panic(v[0] == 97);
12116 assert_or_panic(v[1] == 98);
12117 assert_or_panic(v[2] == 99);
12118 assert_or_panic(v[3] == 100);
12119 assert_or_panic(v[4] == 101);
12120 assert_or_panic(v[5] == 102);
12121 assert_or_panic(v[6] == 103);
12122 assert_or_panic(v[7] == 104);
12123 assert_or_panic(v[8] == 105);
12124 assert_or_panic(v[9] == 106);
12125 assert_or_panic(v[10] == 107);
12126 assert_or_panic(v[11] == 108);
12127 zig_vector_12_u64((Vector_12_u64){ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120 }, 12);
12128}
12129
12130typedef uint64_t Vector_16_u64 __attribute__((vector_size(16 * sizeof(uint64_t))));
12131
12132Vector_16_u64 zig_ret_vector_16_u64(void);
12133void zig_vector_16_u64(Vector_16_u64, size_t);
12134
12135Vector_16_u64 c_ret_vector_16_u64(void) {
12136 return (Vector_16_u64){ 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192 };
12137}
12138void c_vector_16_u64(Vector_16_u64 v, size_t i) {
12139 assert_or_panic(v[0] == 193);
12140 assert_or_panic(v[1] == 194);
12141 assert_or_panic(v[2] == 195);
12142 assert_or_panic(v[3] == 196);
12143 assert_or_panic(v[4] == 197);
12144 assert_or_panic(v[5] == 198);
12145 assert_or_panic(v[6] == 199);
12146 assert_or_panic(v[7] == 200);
12147 assert_or_panic(v[8] == 201);
12148 assert_or_panic(v[9] == 202);
12149 assert_or_panic(v[10] == 203);
12150 assert_or_panic(v[11] == 204);
12151 assert_or_panic(v[12] == 205);
12152 assert_or_panic(v[13] == 206);
12153 assert_or_panic(v[14] == 207);
12154 assert_or_panic(v[15] == 208);
12155 assert_or_panic(i == 16);
12156}
12157void c_test_vector_16_u64(void) {
12158 Vector_16_u64 v = zig_ret_vector_16_u64();
12159 assert_or_panic(v[0] == 145);
12160 assert_or_panic(v[1] == 146);
12161 assert_or_panic(v[2] == 147);
12162 assert_or_panic(v[3] == 148);
12163 assert_or_panic(v[4] == 149);
12164 assert_or_panic(v[5] == 150);
12165 assert_or_panic(v[6] == 151);
12166 assert_or_panic(v[7] == 152);
12167 assert_or_panic(v[8] == 153);
12168 assert_or_panic(v[9] == 154);
12169 assert_or_panic(v[10] == 155);
12170 assert_or_panic(v[11] == 156);
12171 assert_or_panic(v[12] == 157);
12172 assert_or_panic(v[13] == 158);
12173 assert_or_panic(v[14] == 159);
12174 assert_or_panic(v[15] == 160);
12175 zig_vector_16_u64((Vector_16_u64){ 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176 }, 16);
12176}
12177
12178typedef uint64_t Vector_24_u64 __attribute__((vector_size(24 * sizeof(uint64_t))));
12179
12180Vector_24_u64 zig_ret_vector_24_u64(void);
12181void zig_vector_24_u64(Vector_24_u64, size_t);
12182
12183Vector_24_u64 c_ret_vector_24_u64(void) {
12184 return (Vector_24_u64){
12185 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272,
12186 273, 274, 275, 276, 277, 278, 279, 280,
12187 };
12188}
12189void c_vector_24_u64(Vector_24_u64 v, size_t i) {
12190 assert_or_panic(v[0] == 281);
12191 assert_or_panic(v[1] == 282);
12192 assert_or_panic(v[2] == 283);
12193 assert_or_panic(v[3] == 284);
12194 assert_or_panic(v[4] == 285);
12195 assert_or_panic(v[5] == 286);
12196 assert_or_panic(v[6] == 287);
12197 assert_or_panic(v[7] == 288);
12198 assert_or_panic(v[8] == 289);
12199 assert_or_panic(v[9] == 290);
12200 assert_or_panic(v[10] == 291);
12201 assert_or_panic(v[11] == 292);
12202 assert_or_panic(v[12] == 293);
12203 assert_or_panic(v[13] == 294);
12204 assert_or_panic(v[14] == 295);
12205 assert_or_panic(v[15] == 296);
12206 assert_or_panic(v[16] == 297);
12207 assert_or_panic(v[17] == 298);
12208 assert_or_panic(v[18] == 299);
12209 assert_or_panic(v[19] == 300);
12210 assert_or_panic(v[20] == 301);
12211 assert_or_panic(v[21] == 302);
12212 assert_or_panic(v[22] == 303);
12213 assert_or_panic(v[23] == 304);
12214 assert_or_panic(i == 24);
12215}
12216void c_test_vector_24_u64(void) {
12217 Vector_24_u64 v = zig_ret_vector_24_u64();
12218 assert_or_panic(v[0] == 209);
12219 assert_or_panic(v[1] == 210);
12220 assert_or_panic(v[2] == 211);
12221 assert_or_panic(v[3] == 212);
12222 assert_or_panic(v[4] == 213);
12223 assert_or_panic(v[5] == 214);
12224 assert_or_panic(v[6] == 215);
12225 assert_or_panic(v[7] == 216);
12226 assert_or_panic(v[8] == 217);
12227 assert_or_panic(v[9] == 218);
12228 assert_or_panic(v[10] == 219);
12229 assert_or_panic(v[11] == 220);
12230 assert_or_panic(v[12] == 221);
12231 assert_or_panic(v[13] == 222);
12232 assert_or_panic(v[14] == 223);
12233 assert_or_panic(v[15] == 224);
12234 assert_or_panic(v[16] == 225);
12235 assert_or_panic(v[17] == 226);
12236 assert_or_panic(v[18] == 227);
12237 assert_or_panic(v[19] == 228);
12238 assert_or_panic(v[20] == 229);
12239 assert_or_panic(v[21] == 230);
12240 assert_or_panic(v[22] == 231);
12241 assert_or_panic(v[23] == 232);
12242 zig_vector_24_u64((Vector_24_u64){
12243 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248,
12244 249, 250, 251, 252, 253, 254, 255, 256,
12245 }, 24);
12246}
12247
12248typedef uint64_t Vector_32_u64 __attribute__((vector_size(32 * sizeof(uint64_t))));
12249
12250Vector_32_u64 zig_ret_vector_32_u64(void);
12251void zig_vector_32_u64(Vector_32_u64, size_t);
12252
12253Vector_32_u64 c_ret_vector_32_u64(void) {
12254 return (Vector_32_u64){
12255 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
12256 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400,
12257 };
12258}
12259void c_vector_32_u64(Vector_32_u64 v, size_t i) {
12260 assert_or_panic(v[0] == 401);
12261 assert_or_panic(v[1] == 402);
12262 assert_or_panic(v[2] == 403);
12263 assert_or_panic(v[3] == 404);
12264 assert_or_panic(v[4] == 405);
12265 assert_or_panic(v[5] == 406);
12266 assert_or_panic(v[6] == 407);
12267 assert_or_panic(v[7] == 408);
12268 assert_or_panic(v[8] == 409);
12269 assert_or_panic(v[9] == 410);
12270 assert_or_panic(v[10] == 411);
12271 assert_or_panic(v[11] == 412);
12272 assert_or_panic(v[12] == 413);
12273 assert_or_panic(v[13] == 414);
12274 assert_or_panic(v[14] == 415);
12275 assert_or_panic(v[15] == 416);
12276 assert_or_panic(v[16] == 417);
12277 assert_or_panic(v[17] == 418);
12278 assert_or_panic(v[18] == 419);
12279 assert_or_panic(v[19] == 420);
12280 assert_or_panic(v[20] == 421);
12281 assert_or_panic(v[21] == 422);
12282 assert_or_panic(v[22] == 423);
12283 assert_or_panic(v[23] == 424);
12284 assert_or_panic(v[24] == 425);
12285 assert_or_panic(v[25] == 426);
12286 assert_or_panic(v[26] == 427);
12287 assert_or_panic(v[27] == 428);
12288 assert_or_panic(v[28] == 429);
12289 assert_or_panic(v[29] == 430);
12290 assert_or_panic(v[30] == 431);
12291 assert_or_panic(v[31] == 432);
12292 assert_or_panic(i == 32);
12293}
12294void c_test_vector_32_u64(void) {
12295 Vector_32_u64 v = zig_ret_vector_32_u64();
12296 assert_or_panic(v[0] == 305);
12297 assert_or_panic(v[1] == 306);
12298 assert_or_panic(v[2] == 307);
12299 assert_or_panic(v[3] == 308);
12300 assert_or_panic(v[4] == 309);
12301 assert_or_panic(v[5] == 310);
12302 assert_or_panic(v[6] == 311);
12303 assert_or_panic(v[7] == 312);
12304 assert_or_panic(v[8] == 313);
12305 assert_or_panic(v[9] == 314);
12306 assert_or_panic(v[10] == 315);
12307 assert_or_panic(v[11] == 316);
12308 assert_or_panic(v[12] == 317);
12309 assert_or_panic(v[13] == 318);
12310 assert_or_panic(v[14] == 319);
12311 assert_or_panic(v[15] == 320);
12312 assert_or_panic(v[16] == 321);
12313 assert_or_panic(v[17] == 322);
12314 assert_or_panic(v[18] == 323);
12315 assert_or_panic(v[19] == 324);
12316 assert_or_panic(v[20] == 325);
12317 assert_or_panic(v[21] == 326);
12318 assert_or_panic(v[22] == 327);
12319 assert_or_panic(v[23] == 328);
12320 assert_or_panic(v[24] == 329);
12321 assert_or_panic(v[25] == 330);
12322 assert_or_panic(v[26] == 331);
12323 assert_or_panic(v[27] == 332);
12324 assert_or_panic(v[28] == 333);
12325 assert_or_panic(v[29] == 334);
12326 assert_or_panic(v[30] == 335);
12327 assert_or_panic(v[31] == 336);
12328 zig_vector_32_u64((Vector_32_u64){
12329 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352,
12330 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
12331 }, 32);
12332}
12333
12334typedef uint64_t Vector_48_u64 __attribute__((vector_size(48 * sizeof(uint64_t))));
12335
12336Vector_48_u64 zig_ret_vector_48_u64(void);
12337void zig_vector_48_u64(Vector_48_u64, size_t);
12338
12339Vector_48_u64 c_ret_vector_48_u64(void) {
12340 return (Vector_48_u64){
12341 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544,
12342 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560,
12343 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576,
12344 };
12345}
12346void c_vector_48_u64(Vector_48_u64 v, size_t i) {
12347 assert_or_panic(v[0] == 577);
12348 assert_or_panic(v[1] == 578);
12349 assert_or_panic(v[2] == 579);
12350 assert_or_panic(v[3] == 580);
12351 assert_or_panic(v[4] == 581);
12352 assert_or_panic(v[5] == 582);
12353 assert_or_panic(v[6] == 583);
12354 assert_or_panic(v[7] == 584);
12355 assert_or_panic(v[8] == 585);
12356 assert_or_panic(v[9] == 586);
12357 assert_or_panic(v[10] == 587);
12358 assert_or_panic(v[11] == 588);
12359 assert_or_panic(v[12] == 589);
12360 assert_or_panic(v[13] == 590);
12361 assert_or_panic(v[14] == 591);
12362 assert_or_panic(v[15] == 592);
12363 assert_or_panic(v[16] == 593);
12364 assert_or_panic(v[17] == 594);
12365 assert_or_panic(v[18] == 595);
12366 assert_or_panic(v[19] == 596);
12367 assert_or_panic(v[20] == 597);
12368 assert_or_panic(v[21] == 598);
12369 assert_or_panic(v[22] == 599);
12370 assert_or_panic(v[23] == 600);
12371 assert_or_panic(v[24] == 601);
12372 assert_or_panic(v[25] == 602);
12373 assert_or_panic(v[26] == 603);
12374 assert_or_panic(v[27] == 604);
12375 assert_or_panic(v[28] == 605);
12376 assert_or_panic(v[29] == 606);
12377 assert_or_panic(v[30] == 607);
12378 assert_or_panic(v[31] == 608);
12379 assert_or_panic(v[32] == 609);
12380 assert_or_panic(v[33] == 610);
12381 assert_or_panic(v[34] == 611);
12382 assert_or_panic(v[35] == 612);
12383 assert_or_panic(v[36] == 613);
12384 assert_or_panic(v[37] == 614);
12385 assert_or_panic(v[38] == 615);
12386 assert_or_panic(v[39] == 616);
12387 assert_or_panic(v[40] == 617);
12388 assert_or_panic(v[41] == 618);
12389 assert_or_panic(v[42] == 619);
12390 assert_or_panic(v[43] == 620);
12391 assert_or_panic(v[44] == 621);
12392 assert_or_panic(v[45] == 622);
12393 assert_or_panic(v[46] == 623);
12394 assert_or_panic(v[47] == 624);
12395 assert_or_panic(i == 48);
12396}
12397void c_test_vector_48_u64(void) {
12398 Vector_48_u64 v = zig_ret_vector_48_u64();
12399 assert_or_panic(v[0] == 433);
12400 assert_or_panic(v[1] == 434);
12401 assert_or_panic(v[2] == 435);
12402 assert_or_panic(v[3] == 436);
12403 assert_or_panic(v[4] == 437);
12404 assert_or_panic(v[5] == 438);
12405 assert_or_panic(v[6] == 439);
12406 assert_or_panic(v[7] == 440);
12407 assert_or_panic(v[8] == 441);
12408 assert_or_panic(v[9] == 442);
12409 assert_or_panic(v[10] == 443);
12410 assert_or_panic(v[11] == 444);
12411 assert_or_panic(v[12] == 445);
12412 assert_or_panic(v[13] == 446);
12413 assert_or_panic(v[14] == 447);
12414 assert_or_panic(v[15] == 448);
12415 assert_or_panic(v[16] == 449);
12416 assert_or_panic(v[17] == 450);
12417 assert_or_panic(v[18] == 451);
12418 assert_or_panic(v[19] == 452);
12419 assert_or_panic(v[20] == 453);
12420 assert_or_panic(v[21] == 454);
12421 assert_or_panic(v[22] == 455);
12422 assert_or_panic(v[23] == 456);
12423 assert_or_panic(v[24] == 457);
12424 assert_or_panic(v[25] == 458);
12425 assert_or_panic(v[26] == 459);
12426 assert_or_panic(v[27] == 460);
12427 assert_or_panic(v[28] == 461);
12428 assert_or_panic(v[29] == 462);
12429 assert_or_panic(v[30] == 463);
12430 assert_or_panic(v[31] == 464);
12431 assert_or_panic(v[32] == 465);
12432 assert_or_panic(v[33] == 466);
12433 assert_or_panic(v[34] == 467);
12434 assert_or_panic(v[35] == 468);
12435 assert_or_panic(v[36] == 469);
12436 assert_or_panic(v[37] == 470);
12437 assert_or_panic(v[38] == 471);
12438 assert_or_panic(v[39] == 472);
12439 assert_or_panic(v[40] == 473);
12440 assert_or_panic(v[41] == 474);
12441 assert_or_panic(v[42] == 475);
12442 assert_or_panic(v[43] == 476);
12443 assert_or_panic(v[44] == 477);
12444 assert_or_panic(v[45] == 478);
12445 assert_or_panic(v[46] == 479);
12446 assert_or_panic(v[47] == 480);
12447 zig_vector_48_u64((Vector_48_u64){
12448 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496,
12449 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512,
12450 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528,
12451 }, 48);
12452}
12453
12454typedef uint64_t Vector_64_u64 __attribute__((vector_size(64 * sizeof(uint64_t))));
12455
12456Vector_64_u64 zig_ret_vector_64_u64(void);
12457void zig_vector_64_u64(Vector_64_u64, size_t);
12458
12459Vector_64_u64 c_ret_vector_64_u64(void) {
12460 return (Vector_64_u64){
12461 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768,
12462 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,
12463 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
12464 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816,
12465 };
12466}
12467void c_vector_64_u64(Vector_64_u64 v, size_t i) {
12468 assert_or_panic(v[0] == 817);
12469 assert_or_panic(v[1] == 818);
12470 assert_or_panic(v[2] == 819);
12471 assert_or_panic(v[3] == 820);
12472 assert_or_panic(v[4] == 821);
12473 assert_or_panic(v[5] == 822);
12474 assert_or_panic(v[6] == 823);
12475 assert_or_panic(v[7] == 824);
12476 assert_or_panic(v[8] == 825);
12477 assert_or_panic(v[9] == 826);
12478 assert_or_panic(v[10] == 827);
12479 assert_or_panic(v[11] == 828);
12480 assert_or_panic(v[12] == 829);
12481 assert_or_panic(v[13] == 830);
12482 assert_or_panic(v[14] == 831);
12483 assert_or_panic(v[15] == 832);
12484 assert_or_panic(v[16] == 833);
12485 assert_or_panic(v[17] == 834);
12486 assert_or_panic(v[18] == 835);
12487 assert_or_panic(v[19] == 836);
12488 assert_or_panic(v[20] == 837);
12489 assert_or_panic(v[21] == 838);
12490 assert_or_panic(v[22] == 839);
12491 assert_or_panic(v[23] == 840);
12492 assert_or_panic(v[24] == 841);
12493 assert_or_panic(v[25] == 842);
12494 assert_or_panic(v[26] == 843);
12495 assert_or_panic(v[27] == 844);
12496 assert_or_panic(v[28] == 845);
12497 assert_or_panic(v[29] == 846);
12498 assert_or_panic(v[30] == 847);
12499 assert_or_panic(v[31] == 848);
12500 assert_or_panic(v[32] == 849);
12501 assert_or_panic(v[33] == 850);
12502 assert_or_panic(v[34] == 851);
12503 assert_or_panic(v[35] == 852);
12504 assert_or_panic(v[36] == 853);
12505 assert_or_panic(v[37] == 854);
12506 assert_or_panic(v[38] == 855);
12507 assert_or_panic(v[39] == 856);
12508 assert_or_panic(v[40] == 857);
12509 assert_or_panic(v[41] == 858);
12510 assert_or_panic(v[42] == 859);
12511 assert_or_panic(v[43] == 860);
12512 assert_or_panic(v[44] == 861);
12513 assert_or_panic(v[45] == 862);
12514 assert_or_panic(v[46] == 863);
12515 assert_or_panic(v[47] == 864);
12516 assert_or_panic(v[48] == 865);
12517 assert_or_panic(v[49] == 866);
12518 assert_or_panic(v[50] == 867);
12519 assert_or_panic(v[51] == 868);
12520 assert_or_panic(v[52] == 869);
12521 assert_or_panic(v[53] == 870);
12522 assert_or_panic(v[54] == 871);
12523 assert_or_panic(v[55] == 872);
12524 assert_or_panic(v[56] == 873);
12525 assert_or_panic(v[57] == 874);
12526 assert_or_panic(v[58] == 875);
12527 assert_or_panic(v[59] == 876);
12528 assert_or_panic(v[60] == 877);
12529 assert_or_panic(v[61] == 878);
12530 assert_or_panic(v[62] == 879);
12531 assert_or_panic(v[63] == 880);
12532 assert_or_panic(i == 64);
12533}
12534void c_test_vector_64_u64(void) {
12535 Vector_64_u64 v = zig_ret_vector_64_u64();
12536 assert_or_panic(v[0] == 625);
12537 assert_or_panic(v[1] == 626);
12538 assert_or_panic(v[2] == 627);
12539 assert_or_panic(v[3] == 628);
12540 assert_or_panic(v[4] == 629);
12541 assert_or_panic(v[5] == 630);
12542 assert_or_panic(v[6] == 631);
12543 assert_or_panic(v[7] == 632);
12544 assert_or_panic(v[8] == 633);
12545 assert_or_panic(v[9] == 634);
12546 assert_or_panic(v[10] == 635);
12547 assert_or_panic(v[11] == 636);
12548 assert_or_panic(v[12] == 637);
12549 assert_or_panic(v[13] == 638);
12550 assert_or_panic(v[14] == 639);
12551 assert_or_panic(v[15] == 640);
12552 assert_or_panic(v[16] == 641);
12553 assert_or_panic(v[17] == 642);
12554 assert_or_panic(v[18] == 643);
12555 assert_or_panic(v[19] == 644);
12556 assert_or_panic(v[20] == 645);
12557 assert_or_panic(v[21] == 646);
12558 assert_or_panic(v[22] == 647);
12559 assert_or_panic(v[23] == 648);
12560 assert_or_panic(v[24] == 649);
12561 assert_or_panic(v[25] == 650);
12562 assert_or_panic(v[26] == 651);
12563 assert_or_panic(v[27] == 652);
12564 assert_or_panic(v[28] == 653);
12565 assert_or_panic(v[29] == 654);
12566 assert_or_panic(v[30] == 655);
12567 assert_or_panic(v[31] == 656);
12568 assert_or_panic(v[32] == 657);
12569 assert_or_panic(v[33] == 658);
12570 assert_or_panic(v[34] == 659);
12571 assert_or_panic(v[35] == 660);
12572 assert_or_panic(v[36] == 661);
12573 assert_or_panic(v[37] == 662);
12574 assert_or_panic(v[38] == 663);
12575 assert_or_panic(v[39] == 664);
12576 assert_or_panic(v[40] == 665);
12577 assert_or_panic(v[41] == 666);
12578 assert_or_panic(v[42] == 667);
12579 assert_or_panic(v[43] == 668);
12580 assert_or_panic(v[44] == 669);
12581 assert_or_panic(v[45] == 670);
12582 assert_or_panic(v[46] == 671);
12583 assert_or_panic(v[47] == 672);
12584 assert_or_panic(v[48] == 673);
12585 assert_or_panic(v[49] == 674);
12586 assert_or_panic(v[50] == 675);
12587 assert_or_panic(v[51] == 676);
12588 assert_or_panic(v[52] == 677);
12589 assert_or_panic(v[53] == 678);
12590 assert_or_panic(v[54] == 679);
12591 assert_or_panic(v[55] == 680);
12592 assert_or_panic(v[56] == 681);
12593 assert_or_panic(v[57] == 682);
12594 assert_or_panic(v[58] == 683);
12595 assert_or_panic(v[59] == 684);
12596 assert_or_panic(v[60] == 685);
12597 assert_or_panic(v[61] == 686);
12598 assert_or_panic(v[62] == 687);
12599 assert_or_panic(v[63] == 688);
12600 zig_vector_64_u64((Vector_64_u64){
12601 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704,
12602 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720,
12603 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736,
12604 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752,
12605 }, 64);
12606}
12607
12608typedef float Vector_1_f32 __attribute__((vector_size(1 * sizeof(float))));
12609
12610Vector_1_f32 zig_ret_vector_1_f32(void);
12611void zig_vector_1_f32(Vector_1_f32, size_t);
12612
12613Vector_1_f32 c_ret_vector_1_f32(void) {
12614 return (Vector_1_f32){ 3 };
12615}
12616void c_vector_1_f32(Vector_1_f32 v, size_t i) {
12617 assert_or_panic(v[0] == 4);
12618 assert_or_panic(i == 1);
12619}
12620void c_test_vector_1_f32(void) {
12621 Vector_1_f32 v = zig_ret_vector_1_f32();
12622 assert_or_panic(v[0] == 1);
12623 zig_vector_1_f32((Vector_1_f32){ 2 }, 1);
12624}
12625
12626typedef float Vector_2_f32 __attribute__((vector_size(2 * sizeof(float))));
12627
12628Vector_2_f32 zig_ret_vector_2_f32(void);
12629void zig_vector_2_f32(Vector_2_f32, size_t);
12630
12631Vector_2_f32 c_ret_vector_2_f32(void) {
12632 return (Vector_2_f32){ 9, 10 };
12633}
12634void c_vector_2_f32(Vector_2_f32 v, size_t i) {
12635 assert_or_panic(v[0] == 11);
12636 assert_or_panic(v[1] == 12);
12637 assert_or_panic(i == 2);
12638}
12639void c_test_vector_2_f32(void) {
12640 Vector_2_f32 v = zig_ret_vector_2_f32();
12641 assert_or_panic(v[0] == 5);
12642 assert_or_panic(v[1] == 6);
12643 zig_vector_2_f32((Vector_2_f32){ 7, 8 }, 2);
12644}
12645
12646typedef float Vector_3_f32 __attribute__((vector_size(3 * sizeof(float))));
12647
12648Vector_3_f32 zig_ret_vector_3_f32(void);
12649void zig_vector_3_f32(Vector_3_f32, size_t);
12650
12651Vector_3_f32 c_ret_vector_3_f32(void) {
12652 return (Vector_3_f32){ 19, 20, 21 };
12653}
12654void c_vector_3_f32(Vector_3_f32 v, size_t i) {
12655 assert_or_panic(v[0] == 22);
12656 assert_or_panic(v[1] == 23);
12657 assert_or_panic(v[2] == 24);
12658 assert_or_panic(i == 32);
12659}
12660void c_test_vector_3_f32(void) {
12661 Vector_3_f32 v = zig_ret_vector_3_f32();
12662 assert_or_panic(v[0] == 13);
12663 assert_or_panic(v[1] == 14);
12664 assert_or_panic(v[2] == 15);
12665 zig_vector_3_f32((Vector_3_f32){ 16, 17, 18 }, 3);
12666}
12667
12668typedef float Vector_4_f32 __attribute__((vector_size(4 * sizeof(float))));
12669
12670Vector_4_f32 zig_ret_vector_4_f32(void);
12671void zig_vector_4_f32(Vector_4_f32, size_t);
12672void zig_vector_4_f32_vector_4_f32(Vector_4_f32, Vector_4_f32, size_t);
12673
12674Vector_4_f32 c_ret_vector_4_f32(void) {
12675 return (Vector_4_f32){ 41, 42, 43, 44 };
12676}
12677void c_vector_4_f32(Vector_4_f32 v, size_t i) {
12678 assert_or_panic(v[0] == 45);
12679 assert_or_panic(v[1] == 46);
12680 assert_or_panic(v[2] == 47);
12681 assert_or_panic(v[3] == 48);
12682 assert_or_panic(i == 4);
12683}
12684void c_vector_4_f32_vector_4_f32(Vector_4_f32 v0, Vector_4_f32 v1, size_t i) {
12685 assert_or_panic(v0[0] == 49);
12686 assert_or_panic(v0[1] == 50);
12687 assert_or_panic(v0[2] == 51);
12688 assert_or_panic(v0[3] == 52);
12689 assert_or_panic(v1[0] == 53);
12690 assert_or_panic(v1[1] == 54);
12691 assert_or_panic(v1[2] == 55);
12692 assert_or_panic(v1[3] == 56);
12693 assert_or_panic(i == 8);
12694}
12695void c_test_vector_4_f32(void) {
12696 Vector_4_f32 v = zig_ret_vector_4_f32();
12697 assert_or_panic(v[0] == 25);
12698 assert_or_panic(v[1] == 26);
12699 assert_or_panic(v[2] == 27);
12700 assert_or_panic(v[3] == 28);
12701 zig_vector_4_f32((Vector_4_f32){ 29, 30, 31, 32 }, 4);
12702 zig_vector_4_f32_vector_4_f32((Vector_4_f32){ 33, 34, 35, 36 }, (Vector_4_f32){ 37, 38, 39, 40 }, 8);
12703}
12704
12705typedef float Vector_6_f32 __attribute__((vector_size(6 * sizeof(float))));
12706
12707Vector_6_f32 zig_ret_vector_6_f32(void);
12708void zig_vector_6_f32(Vector_6_f32, size_t);
12709
12710Vector_6_f32 c_ret_vector_6_f32(void) {
12711 return (Vector_6_f32){ 53, 54, 55, 56, 57, 58 };
12712}
12713void c_vector_6_f32(Vector_6_f32 v, size_t i) {
12714 assert_or_panic(v[0] == 59);
12715 assert_or_panic(v[1] == 60);
12716 assert_or_panic(v[2] == 61);
12717 assert_or_panic(v[3] == 62);
12718 assert_or_panic(v[4] == 63);
12719 assert_or_panic(v[5] == 64);
12720 assert_or_panic(i == 6);
12721}
12722void c_test_vector_6_f32(void) {
12723 Vector_6_f32 v = zig_ret_vector_6_f32();
12724 assert_or_panic(v[0] == 41);
12725 assert_or_panic(v[1] == 42);
12726 assert_or_panic(v[2] == 43);
12727 assert_or_panic(v[3] == 44);
12728 assert_or_panic(v[4] == 45);
12729 assert_or_panic(v[5] == 46);
12730 zig_vector_6_f32((Vector_6_f32){ 47, 48, 49, 50, 51, 52 }, 6);
12731}
12732
12733typedef float Vector_8_f32 __attribute__((vector_size(8 * sizeof(float))));
12734
12735Vector_8_f32 zig_ret_vector_8_f32(void);
12736void zig_vector_8_f32(Vector_8_f32, size_t);
12737
12738Vector_8_f32 c_ret_vector_8_f32(void) {
12739 return (Vector_8_f32){ 81, 82, 83, 84, 85, 86, 87, 88 };
12740}
12741void c_vector_8_f32(Vector_8_f32 v, size_t i) {
12742 assert_or_panic(v[0] == 89);
12743 assert_or_panic(v[1] == 90);
12744 assert_or_panic(v[2] == 91);
12745 assert_or_panic(v[3] == 92);
12746 assert_or_panic(v[4] == 93);
12747 assert_or_panic(v[5] == 94);
12748 assert_or_panic(v[6] == 95);
12749 assert_or_panic(v[7] == 96);
12750 assert_or_panic(i == 8);
12751}
12752void c_test_vector_8_f32(void) {
12753 Vector_8_f32 v = zig_ret_vector_8_f32();
12754 assert_or_panic(v[0] == 65);
12755 assert_or_panic(v[1] == 66);
12756 assert_or_panic(v[2] == 67);
12757 assert_or_panic(v[3] == 68);
12758 assert_or_panic(v[4] == 69);
12759 assert_or_panic(v[5] == 70);
12760 assert_or_panic(v[6] == 71);
12761 assert_or_panic(v[7] == 72);
12762 zig_vector_8_f32((Vector_8_f32){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
12763}
12764
12765typedef float Vector_12_f32 __attribute__((vector_size(12 * sizeof(float))));
12766
12767Vector_12_f32 zig_ret_vector_12_f32(void);
12768void zig_vector_12_f32(Vector_12_f32, size_t);
12769
12770Vector_12_f32 c_ret_vector_12_f32(void) {
12771 return (Vector_12_f32){ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132 };
12772}
12773void c_vector_12_f32(Vector_12_f32 v, size_t i) {
12774 assert_or_panic(v[0] == 133);
12775 assert_or_panic(v[1] == 134);
12776 assert_or_panic(v[2] == 135);
12777 assert_or_panic(v[3] == 136);
12778 assert_or_panic(v[4] == 137);
12779 assert_or_panic(v[5] == 138);
12780 assert_or_panic(v[6] == 139);
12781 assert_or_panic(v[7] == 140);
12782 assert_or_panic(v[8] == 141);
12783 assert_or_panic(v[9] == 142);
12784 assert_or_panic(v[10] == 143);
12785 assert_or_panic(v[11] == 144);
12786 assert_or_panic(i == 12);
12787}
12788void c_test_vector_12_f32(void) {
12789 Vector_12_f32 v = zig_ret_vector_12_f32();
12790 assert_or_panic(v[0] == 97);
12791 assert_or_panic(v[1] == 98);
12792 assert_or_panic(v[2] == 99);
12793 assert_or_panic(v[3] == 100);
12794 assert_or_panic(v[4] == 101);
12795 assert_or_panic(v[5] == 102);
12796 assert_or_panic(v[6] == 103);
12797 assert_or_panic(v[7] == 104);
12798 assert_or_panic(v[8] == 105);
12799 assert_or_panic(v[9] == 106);
12800 assert_or_panic(v[10] == 107);
12801 assert_or_panic(v[11] == 108);
12802 zig_vector_12_f32((Vector_12_f32){ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120 }, 12);
12803}
12804
12805typedef float Vector_16_f32 __attribute__((vector_size(16 * sizeof(float))));
12806
12807Vector_16_f32 zig_ret_vector_16_f32(void);
12808void zig_vector_16_f32(Vector_16_f32, size_t);
12809
12810Vector_16_f32 c_ret_vector_16_f32(void) {
12811 return (Vector_16_f32){ 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192 };
12812}
12813void c_vector_16_f32(Vector_16_f32 v, size_t i) {
12814 assert_or_panic(v[0] == 193);
12815 assert_or_panic(v[1] == 194);
12816 assert_or_panic(v[2] == 195);
12817 assert_or_panic(v[3] == 196);
12818 assert_or_panic(v[4] == 197);
12819 assert_or_panic(v[5] == 198);
12820 assert_or_panic(v[6] == 199);
12821 assert_or_panic(v[7] == 200);
12822 assert_or_panic(v[8] == 201);
12823 assert_or_panic(v[9] == 202);
12824 assert_or_panic(v[10] == 203);
12825 assert_or_panic(v[11] == 204);
12826 assert_or_panic(v[12] == 205);
12827 assert_or_panic(v[13] == 206);
12828 assert_or_panic(v[14] == 207);
12829 assert_or_panic(v[15] == 208);
12830 assert_or_panic(i == 16);
12831}
12832void c_test_vector_16_f32(void) {
12833 Vector_16_f32 v = zig_ret_vector_16_f32();
12834 assert_or_panic(v[0] == 145);
12835 assert_or_panic(v[1] == 146);
12836 assert_or_panic(v[2] == 147);
12837 assert_or_panic(v[3] == 148);
12838 assert_or_panic(v[4] == 149);
12839 assert_or_panic(v[5] == 150);
12840 assert_or_panic(v[6] == 151);
12841 assert_or_panic(v[7] == 152);
12842 assert_or_panic(v[8] == 153);
12843 assert_or_panic(v[9] == 154);
12844 assert_or_panic(v[10] == 155);
12845 assert_or_panic(v[11] == 156);
12846 assert_or_panic(v[12] == 157);
12847 assert_or_panic(v[13] == 158);
12848 assert_or_panic(v[14] == 159);
12849 assert_or_panic(v[15] == 160);
12850 zig_vector_16_f32((Vector_16_f32){ 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176 }, 16);
12851}
12852
12853typedef float Vector_24_f32 __attribute__((vector_size(24 * sizeof(float))));
12854
12855Vector_24_f32 zig_ret_vector_24_f32(void);
12856void zig_vector_24_f32(Vector_24_f32, size_t);
12857
12858Vector_24_f32 c_ret_vector_24_f32(void) {
12859 return (Vector_24_f32){
12860 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272,
12861 273, 274, 275, 276, 277, 278, 279, 280,
12862 };
12863}
12864void c_vector_24_f32(Vector_24_f32 v, size_t i) {
12865 assert_or_panic(v[0] == 281);
12866 assert_or_panic(v[1] == 282);
12867 assert_or_panic(v[2] == 283);
12868 assert_or_panic(v[3] == 284);
12869 assert_or_panic(v[4] == 285);
12870 assert_or_panic(v[5] == 286);
12871 assert_or_panic(v[6] == 287);
12872 assert_or_panic(v[7] == 288);
12873 assert_or_panic(v[8] == 289);
12874 assert_or_panic(v[9] == 290);
12875 assert_or_panic(v[10] == 291);
12876 assert_or_panic(v[11] == 292);
12877 assert_or_panic(v[12] == 293);
12878 assert_or_panic(v[13] == 294);
12879 assert_or_panic(v[14] == 295);
12880 assert_or_panic(v[15] == 296);
12881 assert_or_panic(v[16] == 297);
12882 assert_or_panic(v[17] == 298);
12883 assert_or_panic(v[18] == 299);
12884 assert_or_panic(v[19] == 300);
12885 assert_or_panic(v[20] == 301);
12886 assert_or_panic(v[21] == 302);
12887 assert_or_panic(v[22] == 303);
12888 assert_or_panic(v[23] == 304);
12889 assert_or_panic(i == 24);
12890}
12891void c_test_vector_24_f32(void) {
12892 Vector_24_f32 v = zig_ret_vector_24_f32();
12893 assert_or_panic(v[0] == 209);
12894 assert_or_panic(v[1] == 210);
12895 assert_or_panic(v[2] == 211);
12896 assert_or_panic(v[3] == 212);
12897 assert_or_panic(v[4] == 213);
12898 assert_or_panic(v[5] == 214);
12899 assert_or_panic(v[6] == 215);
12900 assert_or_panic(v[7] == 216);
12901 assert_or_panic(v[8] == 217);
12902 assert_or_panic(v[9] == 218);
12903 assert_or_panic(v[10] == 219);
12904 assert_or_panic(v[11] == 220);
12905 assert_or_panic(v[12] == 221);
12906 assert_or_panic(v[13] == 222);
12907 assert_or_panic(v[14] == 223);
12908 assert_or_panic(v[15] == 224);
12909 assert_or_panic(v[16] == 225);
12910 assert_or_panic(v[17] == 226);
12911 assert_or_panic(v[18] == 227);
12912 assert_or_panic(v[19] == 228);
12913 assert_or_panic(v[20] == 229);
12914 assert_or_panic(v[21] == 230);
12915 assert_or_panic(v[22] == 231);
12916 assert_or_panic(v[23] == 232);
12917 zig_vector_24_f32((Vector_24_f32){
12918 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248,
12919 249, 250, 251, 252, 253, 254, 255, 256,
12920 }, 24);
12921}
12922
12923typedef float Vector_32_f32 __attribute__((vector_size(32 * sizeof(float))));
12924
12925Vector_32_f32 zig_ret_vector_32_f32(void);
12926void zig_vector_32_f32(Vector_32_f32, size_t);
12927
12928Vector_32_f32 c_ret_vector_32_f32(void) {
12929 return (Vector_32_f32){
12930 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
12931 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400,
12932 };
12933}
12934void c_vector_32_f32(Vector_32_f32 v, size_t i) {
12935 assert_or_panic(v[0] == 401);
12936 assert_or_panic(v[1] == 402);
12937 assert_or_panic(v[2] == 403);
12938 assert_or_panic(v[3] == 404);
12939 assert_or_panic(v[4] == 405);
12940 assert_or_panic(v[5] == 406);
12941 assert_or_panic(v[6] == 407);
12942 assert_or_panic(v[7] == 408);
12943 assert_or_panic(v[8] == 409);
12944 assert_or_panic(v[9] == 410);
12945 assert_or_panic(v[10] == 411);
12946 assert_or_panic(v[11] == 412);
12947 assert_or_panic(v[12] == 413);
12948 assert_or_panic(v[13] == 414);
12949 assert_or_panic(v[14] == 415);
12950 assert_or_panic(v[15] == 416);
12951 assert_or_panic(v[16] == 417);
12952 assert_or_panic(v[17] == 418);
12953 assert_or_panic(v[18] == 419);
12954 assert_or_panic(v[19] == 420);
12955 assert_or_panic(v[20] == 421);
12956 assert_or_panic(v[21] == 422);
12957 assert_or_panic(v[22] == 423);
12958 assert_or_panic(v[23] == 424);
12959 assert_or_panic(v[24] == 425);
12960 assert_or_panic(v[25] == 426);
12961 assert_or_panic(v[26] == 427);
12962 assert_or_panic(v[27] == 428);
12963 assert_or_panic(v[28] == 429);
12964 assert_or_panic(v[29] == 430);
12965 assert_or_panic(v[30] == 431);
12966 assert_or_panic(v[31] == 432);
12967 assert_or_panic(i == 32);
12968}
12969void c_test_vector_32_f32(void) {
12970 Vector_32_f32 v = zig_ret_vector_32_f32();
12971 assert_or_panic(v[0] == 305);
12972 assert_or_panic(v[1] == 306);
12973 assert_or_panic(v[2] == 307);
12974 assert_or_panic(v[3] == 308);
12975 assert_or_panic(v[4] == 309);
12976 assert_or_panic(v[5] == 310);
12977 assert_or_panic(v[6] == 311);
12978 assert_or_panic(v[7] == 312);
12979 assert_or_panic(v[8] == 313);
12980 assert_or_panic(v[9] == 314);
12981 assert_or_panic(v[10] == 315);
12982 assert_or_panic(v[11] == 316);
12983 assert_or_panic(v[12] == 317);
12984 assert_or_panic(v[13] == 318);
12985 assert_or_panic(v[14] == 319);
12986 assert_or_panic(v[15] == 320);
12987 assert_or_panic(v[16] == 321);
12988 assert_or_panic(v[17] == 322);
12989 assert_or_panic(v[18] == 323);
12990 assert_or_panic(v[19] == 324);
12991 assert_or_panic(v[20] == 325);
12992 assert_or_panic(v[21] == 326);
12993 assert_or_panic(v[22] == 327);
12994 assert_or_panic(v[23] == 328);
12995 assert_or_panic(v[24] == 329);
12996 assert_or_panic(v[25] == 330);
12997 assert_or_panic(v[26] == 331);
12998 assert_or_panic(v[27] == 332);
12999 assert_or_panic(v[28] == 333);
13000 assert_or_panic(v[29] == 334);
13001 assert_or_panic(v[30] == 335);
13002 assert_or_panic(v[31] == 336);
13003 zig_vector_32_f32((Vector_32_f32){
13004 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352,
13005 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
13006 }, 32);
13007}
13008
13009typedef float Vector_48_f32 __attribute__((vector_size(48 * sizeof(float))));
13010
13011Vector_48_f32 zig_ret_vector_48_f32(void);
13012void zig_vector_48_f32(Vector_48_f32, size_t);
13013
13014Vector_48_f32 c_ret_vector_48_f32(void) {
13015 return (Vector_48_f32){
13016 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544,
13017 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560,
13018 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576,
13019 };
13020}
13021void c_vector_48_f32(Vector_48_f32 v, size_t i) {
13022 assert_or_panic(v[0] == 577);
13023 assert_or_panic(v[1] == 578);
13024 assert_or_panic(v[2] == 579);
13025 assert_or_panic(v[3] == 580);
13026 assert_or_panic(v[4] == 581);
13027 assert_or_panic(v[5] == 582);
13028 assert_or_panic(v[6] == 583);
13029 assert_or_panic(v[7] == 584);
13030 assert_or_panic(v[8] == 585);
13031 assert_or_panic(v[9] == 586);
13032 assert_or_panic(v[10] == 587);
13033 assert_or_panic(v[11] == 588);
13034 assert_or_panic(v[12] == 589);
13035 assert_or_panic(v[13] == 590);
13036 assert_or_panic(v[14] == 591);
13037 assert_or_panic(v[15] == 592);
13038 assert_or_panic(v[16] == 593);
13039 assert_or_panic(v[17] == 594);
13040 assert_or_panic(v[18] == 595);
13041 assert_or_panic(v[19] == 596);
13042 assert_or_panic(v[20] == 597);
13043 assert_or_panic(v[21] == 598);
13044 assert_or_panic(v[22] == 599);
13045 assert_or_panic(v[23] == 600);
13046 assert_or_panic(v[24] == 601);
13047 assert_or_panic(v[25] == 602);
13048 assert_or_panic(v[26] == 603);
13049 assert_or_panic(v[27] == 604);
13050 assert_or_panic(v[28] == 605);
13051 assert_or_panic(v[29] == 606);
13052 assert_or_panic(v[30] == 607);
13053 assert_or_panic(v[31] == 608);
13054 assert_or_panic(v[32] == 609);
13055 assert_or_panic(v[33] == 610);
13056 assert_or_panic(v[34] == 611);
13057 assert_or_panic(v[35] == 612);
13058 assert_or_panic(v[36] == 613);
13059 assert_or_panic(v[37] == 614);
13060 assert_or_panic(v[38] == 615);
13061 assert_or_panic(v[39] == 616);
13062 assert_or_panic(v[40] == 617);
13063 assert_or_panic(v[41] == 618);
13064 assert_or_panic(v[42] == 619);
13065 assert_or_panic(v[43] == 620);
13066 assert_or_panic(v[44] == 621);
13067 assert_or_panic(v[45] == 622);
13068 assert_or_panic(v[46] == 623);
13069 assert_or_panic(v[47] == 624);
13070 assert_or_panic(i == 48);
13071}
13072void c_test_vector_48_f32(void) {
13073 Vector_48_f32 v = zig_ret_vector_48_f32();
13074 assert_or_panic(v[0] == 433);
13075 assert_or_panic(v[1] == 434);
13076 assert_or_panic(v[2] == 435);
13077 assert_or_panic(v[3] == 436);
13078 assert_or_panic(v[4] == 437);
13079 assert_or_panic(v[5] == 438);
13080 assert_or_panic(v[6] == 439);
13081 assert_or_panic(v[7] == 440);
13082 assert_or_panic(v[8] == 441);
13083 assert_or_panic(v[9] == 442);
13084 assert_or_panic(v[10] == 443);
13085 assert_or_panic(v[11] == 444);
13086 assert_or_panic(v[12] == 445);
13087 assert_or_panic(v[13] == 446);
13088 assert_or_panic(v[14] == 447);
13089 assert_or_panic(v[15] == 448);
13090 assert_or_panic(v[16] == 449);
13091 assert_or_panic(v[17] == 450);
13092 assert_or_panic(v[18] == 451);
13093 assert_or_panic(v[19] == 452);
13094 assert_or_panic(v[20] == 453);
13095 assert_or_panic(v[21] == 454);
13096 assert_or_panic(v[22] == 455);
13097 assert_or_panic(v[23] == 456);
13098 assert_or_panic(v[24] == 457);
13099 assert_or_panic(v[25] == 458);
13100 assert_or_panic(v[26] == 459);
13101 assert_or_panic(v[27] == 460);
13102 assert_or_panic(v[28] == 461);
13103 assert_or_panic(v[29] == 462);
13104 assert_or_panic(v[30] == 463);
13105 assert_or_panic(v[31] == 464);
13106 assert_or_panic(v[32] == 465);
13107 assert_or_panic(v[33] == 466);
13108 assert_or_panic(v[34] == 467);
13109 assert_or_panic(v[35] == 468);
13110 assert_or_panic(v[36] == 469);
13111 assert_or_panic(v[37] == 470);
13112 assert_or_panic(v[38] == 471);
13113 assert_or_panic(v[39] == 472);
13114 assert_or_panic(v[40] == 473);
13115 assert_or_panic(v[41] == 474);
13116 assert_or_panic(v[42] == 475);
13117 assert_or_panic(v[43] == 476);
13118 assert_or_panic(v[44] == 477);
13119 assert_or_panic(v[45] == 478);
13120 assert_or_panic(v[46] == 479);
13121 assert_or_panic(v[47] == 480);
13122 zig_vector_48_f32((Vector_48_f32){
13123 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496,
13124 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512,
13125 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528,
13126 }, 48);
13127}
13128
13129typedef float Vector_64_f32 __attribute__((vector_size(64 * sizeof(float))));
13130
13131Vector_64_f32 zig_ret_vector_64_f32(void);
13132void zig_vector_64_f32(Vector_64_f32, size_t);
13133
13134Vector_64_f32 c_ret_vector_64_f32(void) {
13135 return (Vector_64_f32){
13136 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768,
13137 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,
13138 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
13139 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816,
13140 };
13141}
13142void c_vector_64_f32(Vector_64_f32 v, size_t i) {
13143 assert_or_panic(v[0] == 817);
13144 assert_or_panic(v[1] == 818);
13145 assert_or_panic(v[2] == 819);
13146 assert_or_panic(v[3] == 820);
13147 assert_or_panic(v[4] == 821);
13148 assert_or_panic(v[5] == 822);
13149 assert_or_panic(v[6] == 823);
13150 assert_or_panic(v[7] == 824);
13151 assert_or_panic(v[8] == 825);
13152 assert_or_panic(v[9] == 826);
13153 assert_or_panic(v[10] == 827);
13154 assert_or_panic(v[11] == 828);
13155 assert_or_panic(v[12] == 829);
13156 assert_or_panic(v[13] == 830);
13157 assert_or_panic(v[14] == 831);
13158 assert_or_panic(v[15] == 832);
13159 assert_or_panic(v[16] == 833);
13160 assert_or_panic(v[17] == 834);
13161 assert_or_panic(v[18] == 835);
13162 assert_or_panic(v[19] == 836);
13163 assert_or_panic(v[20] == 837);
13164 assert_or_panic(v[21] == 838);
13165 assert_or_panic(v[22] == 839);
13166 assert_or_panic(v[23] == 840);
13167 assert_or_panic(v[24] == 841);
13168 assert_or_panic(v[25] == 842);
13169 assert_or_panic(v[26] == 843);
13170 assert_or_panic(v[27] == 844);
13171 assert_or_panic(v[28] == 845);
13172 assert_or_panic(v[29] == 846);
13173 assert_or_panic(v[30] == 847);
13174 assert_or_panic(v[31] == 848);
13175 assert_or_panic(v[32] == 849);
13176 assert_or_panic(v[33] == 850);
13177 assert_or_panic(v[34] == 851);
13178 assert_or_panic(v[35] == 852);
13179 assert_or_panic(v[36] == 853);
13180 assert_or_panic(v[37] == 854);
13181 assert_or_panic(v[38] == 855);
13182 assert_or_panic(v[39] == 856);
13183 assert_or_panic(v[40] == 857);
13184 assert_or_panic(v[41] == 858);
13185 assert_or_panic(v[42] == 859);
13186 assert_or_panic(v[43] == 860);
13187 assert_or_panic(v[44] == 861);
13188 assert_or_panic(v[45] == 862);
13189 assert_or_panic(v[46] == 863);
13190 assert_or_panic(v[47] == 864);
13191 assert_or_panic(v[48] == 865);
13192 assert_or_panic(v[49] == 866);
13193 assert_or_panic(v[50] == 867);
13194 assert_or_panic(v[51] == 868);
13195 assert_or_panic(v[52] == 869);
13196 assert_or_panic(v[53] == 870);
13197 assert_or_panic(v[54] == 871);
13198 assert_or_panic(v[55] == 872);
13199 assert_or_panic(v[56] == 873);
13200 assert_or_panic(v[57] == 874);
13201 assert_or_panic(v[58] == 875);
13202 assert_or_panic(v[59] == 876);
13203 assert_or_panic(v[60] == 877);
13204 assert_or_panic(v[61] == 878);
13205 assert_or_panic(v[62] == 879);
13206 assert_or_panic(v[63] == 880);
13207 assert_or_panic(i == 64);
13208}
13209void c_test_vector_64_f32(void) {
13210 Vector_64_f32 v = zig_ret_vector_64_f32();
13211 assert_or_panic(v[0] == 625);
13212 assert_or_panic(v[1] == 626);
13213 assert_or_panic(v[2] == 627);
13214 assert_or_panic(v[3] == 628);
13215 assert_or_panic(v[4] == 629);
13216 assert_or_panic(v[5] == 630);
13217 assert_or_panic(v[6] == 631);
13218 assert_or_panic(v[7] == 632);
13219 assert_or_panic(v[8] == 633);
13220 assert_or_panic(v[9] == 634);
13221 assert_or_panic(v[10] == 635);
13222 assert_or_panic(v[11] == 636);
13223 assert_or_panic(v[12] == 637);
13224 assert_or_panic(v[13] == 638);
13225 assert_or_panic(v[14] == 639);
13226 assert_or_panic(v[15] == 640);
13227 assert_or_panic(v[16] == 641);
13228 assert_or_panic(v[17] == 642);
13229 assert_or_panic(v[18] == 643);
13230 assert_or_panic(v[19] == 644);
13231 assert_or_panic(v[20] == 645);
13232 assert_or_panic(v[21] == 646);
13233 assert_or_panic(v[22] == 647);
13234 assert_or_panic(v[23] == 648);
13235 assert_or_panic(v[24] == 649);
13236 assert_or_panic(v[25] == 650);
13237 assert_or_panic(v[26] == 651);
13238 assert_or_panic(v[27] == 652);
13239 assert_or_panic(v[28] == 653);
13240 assert_or_panic(v[29] == 654);
13241 assert_or_panic(v[30] == 655);
13242 assert_or_panic(v[31] == 656);
13243 assert_or_panic(v[32] == 657);
13244 assert_or_panic(v[33] == 658);
13245 assert_or_panic(v[34] == 659);
13246 assert_or_panic(v[35] == 660);
13247 assert_or_panic(v[36] == 661);
13248 assert_or_panic(v[37] == 662);
13249 assert_or_panic(v[38] == 663);
13250 assert_or_panic(v[39] == 664);
13251 assert_or_panic(v[40] == 665);
13252 assert_or_panic(v[41] == 666);
13253 assert_or_panic(v[42] == 667);
13254 assert_or_panic(v[43] == 668);
13255 assert_or_panic(v[44] == 669);
13256 assert_or_panic(v[45] == 670);
13257 assert_or_panic(v[46] == 671);
13258 assert_or_panic(v[47] == 672);
13259 assert_or_panic(v[48] == 673);
13260 assert_or_panic(v[49] == 674);
13261 assert_or_panic(v[50] == 675);
13262 assert_or_panic(v[51] == 676);
13263 assert_or_panic(v[52] == 677);
13264 assert_or_panic(v[53] == 678);
13265 assert_or_panic(v[54] == 679);
13266 assert_or_panic(v[55] == 680);
13267 assert_or_panic(v[56] == 681);
13268 assert_or_panic(v[57] == 682);
13269 assert_or_panic(v[58] == 683);
13270 assert_or_panic(v[59] == 684);
13271 assert_or_panic(v[60] == 685);
13272 assert_or_panic(v[61] == 686);
13273 assert_or_panic(v[62] == 687);
13274 assert_or_panic(v[63] == 688);
13275 zig_vector_64_f32((Vector_64_f32){
13276 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704,
13277 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720,
13278 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736,
13279 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752,
13280 }, 64);
13281}
13282
13283typedef float Vector_96_f32 __attribute__((vector_size(96 * sizeof(float))));
13284
13285Vector_96_f32 zig_ret_vector_96_f32(void);
13286void zig_vector_96_f32(Vector_96_f32, size_t);
13287
13288Vector_96_f32 c_ret_vector_96_f32(void) {
13289 return (Vector_96_f32){
13290 1082, 1083, 1084, 1085, 1086, 1087, 1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097,
13291 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113,
13292 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129,
13293 1130, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145,
13294 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161,
13295 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177,
13296 };
13297}
13298void c_vector_96_f32(Vector_96_f32 v, size_t i) {
13299 assert_or_panic(v[0] == 1178);
13300 assert_or_panic(v[1] == 1179);
13301 assert_or_panic(v[2] == 1180);
13302 assert_or_panic(v[3] == 1181);
13303 assert_or_panic(v[4] == 1182);
13304 assert_or_panic(v[5] == 1183);
13305 assert_or_panic(v[6] == 1184);
13306 assert_or_panic(v[7] == 1185);
13307 assert_or_panic(v[8] == 1186);
13308 assert_or_panic(v[9] == 1187);
13309 assert_or_panic(v[10] == 1188);
13310 assert_or_panic(v[11] == 1189);
13311 assert_or_panic(v[12] == 1190);
13312 assert_or_panic(v[13] == 1191);
13313 assert_or_panic(v[14] == 1192);
13314 assert_or_panic(v[15] == 1193);
13315 assert_or_panic(v[16] == 1194);
13316 assert_or_panic(v[17] == 1195);
13317 assert_or_panic(v[18] == 1196);
13318 assert_or_panic(v[19] == 1197);
13319 assert_or_panic(v[20] == 1198);
13320 assert_or_panic(v[21] == 1199);
13321 assert_or_panic(v[22] == 1200);
13322 assert_or_panic(v[23] == 1201);
13323 assert_or_panic(v[24] == 1202);
13324 assert_or_panic(v[25] == 1203);
13325 assert_or_panic(v[26] == 1204);
13326 assert_or_panic(v[27] == 1205);
13327 assert_or_panic(v[28] == 1206);
13328 assert_or_panic(v[29] == 1207);
13329 assert_or_panic(v[30] == 1208);
13330 assert_or_panic(v[31] == 1209);
13331 assert_or_panic(v[32] == 1210);
13332 assert_or_panic(v[33] == 1211);
13333 assert_or_panic(v[34] == 1212);
13334 assert_or_panic(v[35] == 1213);
13335 assert_or_panic(v[36] == 1214);
13336 assert_or_panic(v[37] == 1215);
13337 assert_or_panic(v[38] == 1216);
13338 assert_or_panic(v[39] == 1217);
13339 assert_or_panic(v[40] == 1218);
13340 assert_or_panic(v[41] == 1219);
13341 assert_or_panic(v[42] == 1220);
13342 assert_or_panic(v[43] == 1221);
13343 assert_or_panic(v[44] == 1222);
13344 assert_or_panic(v[45] == 1223);
13345 assert_or_panic(v[46] == 1224);
13346 assert_or_panic(v[47] == 1225);
13347 assert_or_panic(v[48] == 1226);
13348 assert_or_panic(v[49] == 1227);
13349 assert_or_panic(v[50] == 1228);
13350 assert_or_panic(v[51] == 1229);
13351 assert_or_panic(v[52] == 1230);
13352 assert_or_panic(v[53] == 1231);
13353 assert_or_panic(v[54] == 1232);
13354 assert_or_panic(v[55] == 1233);
13355 assert_or_panic(v[56] == 1234);
13356 assert_or_panic(v[57] == 1235);
13357 assert_or_panic(v[58] == 1236);
13358 assert_or_panic(v[59] == 1237);
13359 assert_or_panic(v[60] == 1238);
13360 assert_or_panic(v[61] == 1239);
13361 assert_or_panic(v[62] == 1240);
13362 assert_or_panic(v[63] == 1241);
13363 assert_or_panic(v[64] == 1242);
13364 assert_or_panic(v[65] == 1243);
13365 assert_or_panic(v[66] == 1244);
13366 assert_or_panic(v[67] == 1245);
13367 assert_or_panic(v[68] == 1246);
13368 assert_or_panic(v[69] == 1247);
13369 assert_or_panic(v[70] == 1248);
13370 assert_or_panic(v[71] == 1249);
13371 assert_or_panic(v[72] == 1250);
13372 assert_or_panic(v[73] == 1251);
13373 assert_or_panic(v[74] == 1252);
13374 assert_or_panic(v[75] == 1253);
13375 assert_or_panic(v[76] == 1254);
13376 assert_or_panic(v[77] == 1255);
13377 assert_or_panic(v[80] == 1258);
13378 assert_or_panic(v[81] == 1259);
13379 assert_or_panic(v[82] == 1260);
13380 assert_or_panic(v[83] == 1261);
13381 assert_or_panic(v[84] == 1262);
13382 assert_or_panic(v[85] == 1263);
13383 assert_or_panic(v[86] == 1264);
13384 assert_or_panic(v[87] == 1265);
13385 assert_or_panic(v[88] == 1266);
13386 assert_or_panic(v[89] == 1267);
13387 assert_or_panic(v[90] == 1268);
13388 assert_or_panic(v[91] == 1269);
13389 assert_or_panic(v[92] == 1270);
13390 assert_or_panic(v[93] == 1271);
13391 assert_or_panic(v[94] == 1272);
13392 assert_or_panic(v[95] == 1273);
13393 assert_or_panic(i == 96);
13394}
13395void c_test_vector_96_f32(void) {
13396 Vector_96_f32 v = zig_ret_vector_96_f32();
13397 assert_or_panic(v[0] == 890);
13398 assert_or_panic(v[1] == 891);
13399 assert_or_panic(v[2] == 892);
13400 assert_or_panic(v[3] == 893);
13401 assert_or_panic(v[4] == 894);
13402 assert_or_panic(v[5] == 895);
13403 assert_or_panic(v[6] == 896);
13404 assert_or_panic(v[7] == 897);
13405 assert_or_panic(v[8] == 898);
13406 assert_or_panic(v[9] == 899);
13407 assert_or_panic(v[10] == 900);
13408 assert_or_panic(v[11] == 901);
13409 assert_or_panic(v[12] == 902);
13410 assert_or_panic(v[13] == 903);
13411 assert_or_panic(v[14] == 904);
13412 assert_or_panic(v[15] == 905);
13413 assert_or_panic(v[16] == 906);
13414 assert_or_panic(v[17] == 907);
13415 assert_or_panic(v[18] == 908);
13416 assert_or_panic(v[19] == 909);
13417 assert_or_panic(v[20] == 910);
13418 assert_or_panic(v[21] == 911);
13419 assert_or_panic(v[22] == 912);
13420 assert_or_panic(v[23] == 913);
13421 assert_or_panic(v[24] == 914);
13422 assert_or_panic(v[25] == 915);
13423 assert_or_panic(v[26] == 916);
13424 assert_or_panic(v[27] == 917);
13425 assert_or_panic(v[28] == 918);
13426 assert_or_panic(v[29] == 919);
13427 assert_or_panic(v[30] == 920);
13428 assert_or_panic(v[31] == 921);
13429 assert_or_panic(v[32] == 922);
13430 assert_or_panic(v[33] == 923);
13431 assert_or_panic(v[34] == 924);
13432 assert_or_panic(v[35] == 925);
13433 assert_or_panic(v[36] == 926);
13434 assert_or_panic(v[37] == 927);
13435 assert_or_panic(v[38] == 928);
13436 assert_or_panic(v[39] == 929);
13437 assert_or_panic(v[40] == 930);
13438 assert_or_panic(v[41] == 931);
13439 assert_or_panic(v[42] == 932);
13440 assert_or_panic(v[43] == 933);
13441 assert_or_panic(v[44] == 934);
13442 assert_or_panic(v[45] == 935);
13443 assert_or_panic(v[46] == 936);
13444 assert_or_panic(v[47] == 937);
13445 assert_or_panic(v[48] == 938);
13446 assert_or_panic(v[49] == 939);
13447 assert_or_panic(v[50] == 940);
13448 assert_or_panic(v[51] == 941);
13449 assert_or_panic(v[52] == 942);
13450 assert_or_panic(v[53] == 943);
13451 assert_or_panic(v[54] == 944);
13452 assert_or_panic(v[55] == 945);
13453 assert_or_panic(v[56] == 946);
13454 assert_or_panic(v[57] == 947);
13455 assert_or_panic(v[58] == 948);
13456 assert_or_panic(v[59] == 949);
13457 assert_or_panic(v[60] == 950);
13458 assert_or_panic(v[61] == 951);
13459 assert_or_panic(v[62] == 952);
13460 assert_or_panic(v[63] == 953);
13461 assert_or_panic(v[64] == 954);
13462 assert_or_panic(v[65] == 955);
13463 assert_or_panic(v[66] == 956);
13464 assert_or_panic(v[67] == 957);
13465 assert_or_panic(v[68] == 958);
13466 assert_or_panic(v[69] == 959);
13467 assert_or_panic(v[70] == 960);
13468 assert_or_panic(v[71] == 961);
13469 assert_or_panic(v[72] == 962);
13470 assert_or_panic(v[73] == 963);
13471 assert_or_panic(v[74] == 964);
13472 assert_or_panic(v[75] == 965);
13473 assert_or_panic(v[76] == 966);
13474 assert_or_panic(v[77] == 967);
13475 assert_or_panic(v[78] == 968);
13476 assert_or_panic(v[79] == 969);
13477 assert_or_panic(v[80] == 970);
13478 assert_or_panic(v[81] == 971);
13479 assert_or_panic(v[82] == 972);
13480 assert_or_panic(v[83] == 973);
13481 assert_or_panic(v[84] == 974);
13482 assert_or_panic(v[85] == 975);
13483 assert_or_panic(v[86] == 976);
13484 assert_or_panic(v[87] == 977);
13485 assert_or_panic(v[88] == 978);
13486 assert_or_panic(v[89] == 979);
13487 assert_or_panic(v[90] == 980);
13488 assert_or_panic(v[91] == 981);
13489 assert_or_panic(v[92] == 982);
13490 assert_or_panic(v[93] == 983);
13491 assert_or_panic(v[94] == 984);
13492 assert_or_panic(v[95] == 985);
13493 zig_vector_96_f32((Vector_96_f32){
13494 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001,
13495 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017,
13496 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033,
13497 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049,
13498 1050, 1051, 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065,
13499 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081,
13500 }, 96);
13501}
13502
13503typedef float Vector_128_f32 __attribute__((vector_size(128 * sizeof(float))));
13504
13505Vector_128_f32 zig_ret_vector_128_f32(void);
13506void zig_vector_128_f32(Vector_128_f32, size_t);
13507
13508Vector_128_f32 c_ret_vector_128_f32(void) {
13509 return (Vector_128_f32){
13510 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544, 1545,
13511 1546, 1547, 1548, 1549, 1550, 1551, 1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560, 1561,
13512 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577,
13513 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1587, 1588, 1589, 1590, 1591, 1592, 1593,
13514 1594, 1595, 1596, 1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609,
13515 1610, 1611, 1612, 1613, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625,
13516 1626, 1627, 1628, 1629, 1630, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641,
13517 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657,
13518 };
13519}
13520void c_vector_128_f32(Vector_128_f32 v, size_t i) {
13521 assert_or_panic(v[0] == 1658);
13522 assert_or_panic(v[1] == 1659);
13523 assert_or_panic(v[2] == 1660);
13524 assert_or_panic(v[3] == 1661);
13525 assert_or_panic(v[4] == 1662);
13526 assert_or_panic(v[5] == 1663);
13527 assert_or_panic(v[6] == 1664);
13528 assert_or_panic(v[7] == 1665);
13529 assert_or_panic(v[8] == 1666);
13530 assert_or_panic(v[9] == 1667);
13531 assert_or_panic(v[10] == 1668);
13532 assert_or_panic(v[11] == 1669);
13533 assert_or_panic(v[12] == 1670);
13534 assert_or_panic(v[13] == 1671);
13535 assert_or_panic(v[14] == 1672);
13536 assert_or_panic(v[15] == 1673);
13537 assert_or_panic(v[16] == 1674);
13538 assert_or_panic(v[17] == 1675);
13539 assert_or_panic(v[18] == 1676);
13540 assert_or_panic(v[19] == 1677);
13541 assert_or_panic(v[20] == 1678);
13542 assert_or_panic(v[21] == 1679);
13543 assert_or_panic(v[22] == 1680);
13544 assert_or_panic(v[23] == 1681);
13545 assert_or_panic(v[24] == 1682);
13546 assert_or_panic(v[25] == 1683);
13547 assert_or_panic(v[26] == 1684);
13548 assert_or_panic(v[27] == 1685);
13549 assert_or_panic(v[28] == 1686);
13550 assert_or_panic(v[29] == 1687);
13551 assert_or_panic(v[30] == 1688);
13552 assert_or_panic(v[31] == 1689);
13553 assert_or_panic(v[32] == 1690);
13554 assert_or_panic(v[33] == 1691);
13555 assert_or_panic(v[34] == 1692);
13556 assert_or_panic(v[35] == 1693);
13557 assert_or_panic(v[36] == 1694);
13558 assert_or_panic(v[37] == 1695);
13559 assert_or_panic(v[38] == 1696);
13560 assert_or_panic(v[39] == 1697);
13561 assert_or_panic(v[40] == 1698);
13562 assert_or_panic(v[41] == 1699);
13563 assert_or_panic(v[42] == 1700);
13564 assert_or_panic(v[43] == 1701);
13565 assert_or_panic(v[44] == 1702);
13566 assert_or_panic(v[45] == 1703);
13567 assert_or_panic(v[46] == 1704);
13568 assert_or_panic(v[47] == 1705);
13569 assert_or_panic(v[48] == 1706);
13570 assert_or_panic(v[49] == 1707);
13571 assert_or_panic(v[50] == 1708);
13572 assert_or_panic(v[51] == 1709);
13573 assert_or_panic(v[52] == 1710);
13574 assert_or_panic(v[53] == 1711);
13575 assert_or_panic(v[54] == 1712);
13576 assert_or_panic(v[55] == 1713);
13577 assert_or_panic(v[56] == 1714);
13578 assert_or_panic(v[57] == 1715);
13579 assert_or_panic(v[58] == 1716);
13580 assert_or_panic(v[59] == 1717);
13581 assert_or_panic(v[60] == 1718);
13582 assert_or_panic(v[61] == 1719);
13583 assert_or_panic(v[62] == 1720);
13584 assert_or_panic(v[63] == 1721);
13585 assert_or_panic(v[64] == 1722);
13586 assert_or_panic(v[65] == 1723);
13587 assert_or_panic(v[66] == 1724);
13588 assert_or_panic(v[67] == 1725);
13589 assert_or_panic(v[68] == 1726);
13590 assert_or_panic(v[69] == 1727);
13591 assert_or_panic(v[70] == 1728);
13592 assert_or_panic(v[71] == 1729);
13593 assert_or_panic(v[72] == 1730);
13594 assert_or_panic(v[73] == 1731);
13595 assert_or_panic(v[74] == 1732);
13596 assert_or_panic(v[75] == 1733);
13597 assert_or_panic(v[76] == 1734);
13598 assert_or_panic(v[77] == 1735);
13599 assert_or_panic(v[78] == 1736);
13600 assert_or_panic(v[79] == 1737);
13601 assert_or_panic(v[80] == 1738);
13602 assert_or_panic(v[81] == 1739);
13603 assert_or_panic(v[82] == 1740);
13604 assert_or_panic(v[83] == 1741);
13605 assert_or_panic(v[84] == 1742);
13606 assert_or_panic(v[85] == 1743);
13607 assert_or_panic(v[86] == 1744);
13608 assert_or_panic(v[87] == 1745);
13609 assert_or_panic(v[88] == 1746);
13610 assert_or_panic(v[89] == 1747);
13611 assert_or_panic(v[90] == 1748);
13612 assert_or_panic(v[91] == 1749);
13613 assert_or_panic(v[92] == 1750);
13614 assert_or_panic(v[93] == 1751);
13615 assert_or_panic(v[94] == 1752);
13616 assert_or_panic(v[95] == 1753);
13617 assert_or_panic(v[96] == 1754);
13618 assert_or_panic(v[97] == 1755);
13619 assert_or_panic(v[98] == 1756);
13620 assert_or_panic(v[99] == 1757);
13621 assert_or_panic(v[100] == 1758);
13622 assert_or_panic(v[101] == 1759);
13623 assert_or_panic(v[102] == 1760);
13624 assert_or_panic(v[103] == 1761);
13625 assert_or_panic(v[104] == 1762);
13626 assert_or_panic(v[105] == 1763);
13627 assert_or_panic(v[106] == 1764);
13628 assert_or_panic(v[107] == 1765);
13629 assert_or_panic(v[108] == 1766);
13630 assert_or_panic(v[109] == 1767);
13631 assert_or_panic(v[110] == 1768);
13632 assert_or_panic(v[111] == 1769);
13633 assert_or_panic(v[112] == 1770);
13634 assert_or_panic(v[113] == 1771);
13635 assert_or_panic(v[114] == 1772);
13636 assert_or_panic(v[115] == 1773);
13637 assert_or_panic(v[116] == 1774);
13638 assert_or_panic(v[117] == 1775);
13639 assert_or_panic(v[118] == 1776);
13640 assert_or_panic(v[119] == 1777);
13641 assert_or_panic(v[120] == 1778);
13642 assert_or_panic(v[121] == 1779);
13643 assert_or_panic(v[122] == 1780);
13644 assert_or_panic(v[123] == 1781);
13645 assert_or_panic(v[124] == 1782);
13646 assert_or_panic(v[125] == 1783);
13647 assert_or_panic(v[126] == 1784);
13648 assert_or_panic(v[127] == 1785);
13649 assert_or_panic(i == 128);
13650}
13651void c_test_vector_128_f32(void) {
13652 Vector_128_f32 v = zig_ret_vector_128_f32();
13653 assert_or_panic(v[0] == 1274);
13654 assert_or_panic(v[1] == 1275);
13655 assert_or_panic(v[2] == 1276);
13656 assert_or_panic(v[3] == 1277);
13657 assert_or_panic(v[4] == 1278);
13658 assert_or_panic(v[5] == 1279);
13659 assert_or_panic(v[6] == 1280);
13660 assert_or_panic(v[7] == 1281);
13661 assert_or_panic(v[8] == 1282);
13662 assert_or_panic(v[9] == 1283);
13663 assert_or_panic(v[10] == 1284);
13664 assert_or_panic(v[11] == 1285);
13665 assert_or_panic(v[12] == 1286);
13666 assert_or_panic(v[13] == 1287);
13667 assert_or_panic(v[14] == 1288);
13668 assert_or_panic(v[15] == 1289);
13669 assert_or_panic(v[16] == 1290);
13670 assert_or_panic(v[17] == 1291);
13671 assert_or_panic(v[18] == 1292);
13672 assert_or_panic(v[19] == 1293);
13673 assert_or_panic(v[20] == 1294);
13674 assert_or_panic(v[21] == 1295);
13675 assert_or_panic(v[22] == 1296);
13676 assert_or_panic(v[23] == 1297);
13677 assert_or_panic(v[24] == 1298);
13678 assert_or_panic(v[25] == 1299);
13679 assert_or_panic(v[26] == 1300);
13680 assert_or_panic(v[27] == 1301);
13681 assert_or_panic(v[28] == 1302);
13682 assert_or_panic(v[29] == 1303);
13683 assert_or_panic(v[30] == 1304);
13684 assert_or_panic(v[31] == 1305);
13685 assert_or_panic(v[32] == 1306);
13686 assert_or_panic(v[33] == 1307);
13687 assert_or_panic(v[34] == 1308);
13688 assert_or_panic(v[35] == 1309);
13689 assert_or_panic(v[36] == 1310);
13690 assert_or_panic(v[37] == 1311);
13691 assert_or_panic(v[38] == 1312);
13692 assert_or_panic(v[39] == 1313);
13693 assert_or_panic(v[40] == 1314);
13694 assert_or_panic(v[41] == 1315);
13695 assert_or_panic(v[42] == 1316);
13696 assert_or_panic(v[43] == 1317);
13697 assert_or_panic(v[44] == 1318);
13698 assert_or_panic(v[45] == 1319);
13699 assert_or_panic(v[46] == 1320);
13700 assert_or_panic(v[47] == 1321);
13701 assert_or_panic(v[48] == 1322);
13702 assert_or_panic(v[49] == 1323);
13703 assert_or_panic(v[50] == 1324);
13704 assert_or_panic(v[51] == 1325);
13705 assert_or_panic(v[52] == 1326);
13706 assert_or_panic(v[53] == 1327);
13707 assert_or_panic(v[54] == 1328);
13708 assert_or_panic(v[55] == 1329);
13709 assert_or_panic(v[56] == 1330);
13710 assert_or_panic(v[57] == 1331);
13711 assert_or_panic(v[58] == 1332);
13712 assert_or_panic(v[59] == 1333);
13713 assert_or_panic(v[60] == 1334);
13714 assert_or_panic(v[61] == 1335);
13715 assert_or_panic(v[62] == 1336);
13716 assert_or_panic(v[63] == 1337);
13717 assert_or_panic(v[64] == 1338);
13718 assert_or_panic(v[65] == 1339);
13719 assert_or_panic(v[66] == 1340);
13720 assert_or_panic(v[67] == 1341);
13721 assert_or_panic(v[68] == 1342);
13722 assert_or_panic(v[69] == 1343);
13723 assert_or_panic(v[70] == 1344);
13724 assert_or_panic(v[71] == 1345);
13725 assert_or_panic(v[72] == 1346);
13726 assert_or_panic(v[73] == 1347);
13727 assert_or_panic(v[74] == 1348);
13728 assert_or_panic(v[75] == 1349);
13729 assert_or_panic(v[76] == 1350);
13730 assert_or_panic(v[77] == 1351);
13731 assert_or_panic(v[78] == 1352);
13732 assert_or_panic(v[79] == 1353);
13733 assert_or_panic(v[80] == 1354);
13734 assert_or_panic(v[81] == 1355);
13735 assert_or_panic(v[82] == 1356);
13736 assert_or_panic(v[83] == 1357);
13737 assert_or_panic(v[84] == 1358);
13738 assert_or_panic(v[85] == 1359);
13739 assert_or_panic(v[86] == 1360);
13740 assert_or_panic(v[87] == 1361);
13741 assert_or_panic(v[88] == 1362);
13742 assert_or_panic(v[89] == 1363);
13743 assert_or_panic(v[90] == 1364);
13744 assert_or_panic(v[91] == 1365);
13745 assert_or_panic(v[92] == 1366);
13746 assert_or_panic(v[93] == 1367);
13747 assert_or_panic(v[94] == 1368);
13748 assert_or_panic(v[95] == 1369);
13749 assert_or_panic(v[96] == 1370);
13750 assert_or_panic(v[97] == 1371);
13751 assert_or_panic(v[98] == 1372);
13752 assert_or_panic(v[99] == 1373);
13753 assert_or_panic(v[100] == 1374);
13754 assert_or_panic(v[101] == 1375);
13755 assert_or_panic(v[102] == 1376);
13756 assert_or_panic(v[103] == 1377);
13757 assert_or_panic(v[104] == 1378);
13758 assert_or_panic(v[105] == 1379);
13759 assert_or_panic(v[106] == 1380);
13760 assert_or_panic(v[107] == 1381);
13761 assert_or_panic(v[108] == 1382);
13762 assert_or_panic(v[109] == 1383);
13763 assert_or_panic(v[110] == 1384);
13764 assert_or_panic(v[111] == 1385);
13765 assert_or_panic(v[112] == 1386);
13766 assert_or_panic(v[113] == 1387);
13767 assert_or_panic(v[114] == 1388);
13768 assert_or_panic(v[115] == 1389);
13769 assert_or_panic(v[116] == 1390);
13770 assert_or_panic(v[117] == 1391);
13771 assert_or_panic(v[118] == 1392);
13772 assert_or_panic(v[119] == 1393);
13773 assert_or_panic(v[120] == 1394);
13774 assert_or_panic(v[121] == 1395);
13775 assert_or_panic(v[122] == 1396);
13776 assert_or_panic(v[123] == 1397);
13777 assert_or_panic(v[124] == 1398);
13778 assert_or_panic(v[125] == 1399);
13779 assert_or_panic(v[126] == 1400);
13780 assert_or_panic(v[127] == 1401);
13781 zig_vector_128_f32((Vector_128_f32){
13782 1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1417,
13783 1418, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432, 1433,
13784 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446, 1447, 1448, 1449,
13785 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464, 1465,
13786 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481,
13787 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491, 1492, 1493, 1494, 1495, 1496, 1497,
13788 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1509, 1510, 1511, 1512, 1513,
13789 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521, 1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529,
13790 }, 128);
13791}
13792
13793typedef double Vector_1_f64 __attribute__((vector_size(1 * sizeof(double))));
13794
13795Vector_1_f64 zig_ret_vector_1_f64(void);
13796void zig_vector_1_f64(Vector_1_f64, size_t);
13797
13798Vector_1_f64 c_ret_vector_1_f64(void) {
13799 return (Vector_1_f64){ 3 };
13800}
13801void c_vector_1_f64(Vector_1_f64 v, size_t i) {
13802 assert_or_panic(v[0] == 4);
13803 assert_or_panic(i == 1);
13804}
13805void c_test_vector_1_f64(void) {
13806 Vector_1_f64 v = zig_ret_vector_1_f64();
13807 assert_or_panic(v[0] == 1);
13808 zig_vector_1_f64((Vector_1_f64){ 2 }, 1);
13809}
13810
13811typedef double Vector_2_f64 __attribute__((vector_size(2 * sizeof(double))));
13812
13813Vector_2_f64 zig_ret_vector_2_f64(void);
13814void zig_vector_2_f64(Vector_2_f64, size_t);
13815
13816Vector_2_f64 c_ret_vector_2_f64(void) {
13817 return (Vector_2_f64){ 9, 10 };
13818}
13819void c_vector_2_f64(Vector_2_f64 v, size_t i) {
13820 assert_or_panic(v[0] == 11);
13821 assert_or_panic(v[1] == 12);
13822 assert_or_panic(i == 2);
13823}
13824void c_test_vector_2_f64(void) {
13825 Vector_2_f64 v = zig_ret_vector_2_f64();
13826 assert_or_panic(v[0] == 5);
13827 assert_or_panic(v[1] == 6);
13828 zig_vector_2_f64((Vector_2_f64){ 7, 8 }, 2);
13829}
13830
13831typedef double Vector_3_f64 __attribute__((vector_size(3 * sizeof(double))));
13832
13833Vector_3_f64 zig_ret_vector_3_f64(void);
13834void zig_vector_3_f64(Vector_3_f64, size_t);
13835
13836Vector_3_f64 c_ret_vector_3_f64(void) {
13837 return (Vector_3_f64){ 19, 20, 21 };
13838}
13839void c_vector_3_f64(Vector_3_f64 v, size_t i) {
13840 assert_or_panic(v[0] == 22);
13841 assert_or_panic(v[1] == 23);
13842 assert_or_panic(v[2] == 24);
13843 assert_or_panic(i == 3);
13844}
13845void c_test_vector_3_f64(void) {
13846 Vector_3_f64 v = zig_ret_vector_3_f64();
13847 assert_or_panic(v[0] == 13);
13848 assert_or_panic(v[1] == 14);
13849 assert_or_panic(v[2] == 15);
13850 zig_vector_3_f64((Vector_3_f64){ 16, 17, 18 }, 3);
13851}
13852
13853typedef double Vector_4_f64 __attribute__((vector_size(4 * sizeof(double))));
13854
13855Vector_4_f64 zig_ret_vector_4_f64(void);
13856void zig_vector_4_f64(Vector_4_f64, size_t);
13857
13858Vector_4_f64 c_ret_vector_4_f64(void) {
13859 return (Vector_4_f64){ 33, 34, 35, 36 };
13860}
13861void c_vector_4_f64(Vector_4_f64 v, size_t i) {
13862 assert_or_panic(v[0] == 37);
13863 assert_or_panic(v[1] == 38);
13864 assert_or_panic(v[2] == 39);
13865 assert_or_panic(v[3] == 40);
13866 assert_or_panic(i == 4);
13867}
13868void c_test_vector_4_f64(void) {
13869 Vector_4_f64 v = zig_ret_vector_4_f64();
13870 assert_or_panic(v[0] == 25);
13871 assert_or_panic(v[1] == 26);
13872 assert_or_panic(v[2] == 27);
13873 assert_or_panic(v[3] == 28);
13874 zig_vector_4_f64((Vector_4_f64){ 29, 30, 31, 32 }, 4);
13875}
13876
13877typedef double Vector_6_f64 __attribute__((vector_size(6 * sizeof(double))));
13878
13879Vector_6_f64 zig_ret_vector_6_f64(void);
13880void zig_vector_6_f64(Vector_6_f64, size_t);
13881
13882Vector_6_f64 c_ret_vector_6_f64(void) {
13883 return (Vector_6_f64){ 53, 54, 55, 56, 57, 58 };
13884}
13885void c_vector_6_f64(Vector_6_f64 v, size_t i) {
13886 assert_or_panic(v[0] == 59);
13887 assert_or_panic(v[1] == 60);
13888 assert_or_panic(v[2] == 61);
13889 assert_or_panic(v[3] == 62);
13890 assert_or_panic(v[4] == 63);
13891 assert_or_panic(v[5] == 64);
13892 assert_or_panic(i == 6);
13893}
13894void c_test_vector_6_f64(void) {
13895 Vector_6_f64 v = zig_ret_vector_6_f64();
13896 assert_or_panic(v[0] == 41);
13897 assert_or_panic(v[1] == 42);
13898 assert_or_panic(v[2] == 43);
13899 assert_or_panic(v[3] == 44);
13900 assert_or_panic(v[4] == 45);
13901 assert_or_panic(v[5] == 46);
13902 zig_vector_6_f64((Vector_6_f64){ 47, 48, 49, 50, 51, 52 }, 6);
13903}
13904
13905typedef double Vector_8_f64 __attribute__((vector_size(8 * sizeof(double))));
13906
13907Vector_8_f64 zig_ret_vector_8_f64(void);
13908void zig_vector_8_f64(Vector_8_f64, size_t);
13909
13910Vector_8_f64 c_ret_vector_8_f64(void) {
13911 return (Vector_8_f64){ 81, 82, 83, 84, 85, 86, 87, 88 };
13912}
13913void c_vector_8_f64(Vector_8_f64 v, size_t i) {
13914 assert_or_panic(v[0] == 89);
13915 assert_or_panic(v[1] == 90);
13916 assert_or_panic(v[2] == 91);
13917 assert_or_panic(v[3] == 92);
13918 assert_or_panic(v[4] == 93);
13919 assert_or_panic(v[5] == 94);
13920 assert_or_panic(v[6] == 95);
13921 assert_or_panic(v[7] == 96);
13922 assert_or_panic(i == 8);
13923}
13924void c_test_vector_8_f64(void) {
13925 Vector_8_f64 v = zig_ret_vector_8_f64();
13926 assert_or_panic(v[0] == 65);
13927 assert_or_panic(v[1] == 66);
13928 assert_or_panic(v[2] == 67);
13929 assert_or_panic(v[3] == 68);
13930 assert_or_panic(v[4] == 69);
13931 assert_or_panic(v[5] == 70);
13932 assert_or_panic(v[6] == 71);
13933 assert_or_panic(v[7] == 72);
13934 zig_vector_8_f64((Vector_8_f64){ 73, 74, 75, 76, 77, 78, 79, 80 }, 8);
13935}
13936
13937typedef double Vector_12_f64 __attribute__((vector_size(12 * sizeof(double))));
13938
13939Vector_12_f64 zig_ret_vector_12_f64(void);
13940void zig_vector_12_f64(Vector_12_f64, size_t);
13941
13942Vector_12_f64 c_ret_vector_12_f64(void) {
13943 return (Vector_12_f64){ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132 };
13944}
13945void c_vector_12_f64(Vector_12_f64 v, size_t i) {
13946 assert_or_panic(v[0] == 133);
13947 assert_or_panic(v[1] == 134);
13948 assert_or_panic(v[2] == 135);
13949 assert_or_panic(v[3] == 136);
13950 assert_or_panic(v[4] == 137);
13951 assert_or_panic(v[5] == 138);
13952 assert_or_panic(v[6] == 139);
13953 assert_or_panic(v[7] == 140);
13954 assert_or_panic(v[8] == 141);
13955 assert_or_panic(v[9] == 142);
13956 assert_or_panic(v[10] == 143);
13957 assert_or_panic(v[11] == 144);
13958 assert_or_panic(i == 12);
13959}
13960void c_test_vector_12_f64(void) {
13961 Vector_12_f64 v = zig_ret_vector_12_f64();
13962 assert_or_panic(v[0] == 97);
13963 assert_or_panic(v[1] == 98);
13964 assert_or_panic(v[2] == 99);
13965 assert_or_panic(v[3] == 100);
13966 assert_or_panic(v[4] == 101);
13967 assert_or_panic(v[5] == 102);
13968 assert_or_panic(v[6] == 103);
13969 assert_or_panic(v[7] == 104);
13970 assert_or_panic(v[8] == 105);
13971 assert_or_panic(v[9] == 106);
13972 assert_or_panic(v[10] == 107);
13973 assert_or_panic(v[11] == 108);
13974 zig_vector_12_f64((Vector_12_f64){ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120 }, 12);
13975}
13976
13977typedef double Vector_16_f64 __attribute__((vector_size(16 * sizeof(double))));
13978
13979Vector_16_f64 zig_ret_vector_16_f64(void);
13980void zig_vector_16_f64(Vector_16_f64, size_t);
13981
13982Vector_16_f64 c_ret_vector_16_f64(void) {
13983 return (Vector_16_f64){ 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192 };
13984}
13985void c_vector_16_f64(Vector_16_f64 v, size_t i) {
13986 assert_or_panic(v[0] == 193);
13987 assert_or_panic(v[1] == 194);
13988 assert_or_panic(v[2] == 195);
13989 assert_or_panic(v[3] == 196);
13990 assert_or_panic(v[4] == 197);
13991 assert_or_panic(v[5] == 198);
13992 assert_or_panic(v[6] == 199);
13993 assert_or_panic(v[7] == 200);
13994 assert_or_panic(v[8] == 201);
13995 assert_or_panic(v[9] == 202);
13996 assert_or_panic(v[10] == 203);
13997 assert_or_panic(v[11] == 204);
13998 assert_or_panic(v[12] == 205);
13999 assert_or_panic(v[13] == 206);
14000 assert_or_panic(v[14] == 207);
14001 assert_or_panic(v[15] == 208);
14002 assert_or_panic(i == 16);
14003}
14004void c_test_vector_16_f64(void) {
14005 Vector_16_f64 v = zig_ret_vector_16_f64();
14006 assert_or_panic(v[0] == 145);
14007 assert_or_panic(v[1] == 146);
14008 assert_or_panic(v[2] == 147);
14009 assert_or_panic(v[3] == 148);
14010 assert_or_panic(v[4] == 149);
14011 assert_or_panic(v[5] == 150);
14012 assert_or_panic(v[6] == 151);
14013 assert_or_panic(v[7] == 152);
14014 assert_or_panic(v[8] == 153);
14015 assert_or_panic(v[9] == 154);
14016 assert_or_panic(v[10] == 155);
14017 assert_or_panic(v[11] == 156);
14018 assert_or_panic(v[12] == 157);
14019 assert_or_panic(v[13] == 158);
14020 assert_or_panic(v[14] == 159);
14021 assert_or_panic(v[15] == 160);
14022 zig_vector_16_f64((Vector_16_f64){ 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176 }, 16);
14023}
14024
14025typedef double Vector_24_f64 __attribute__((vector_size(24 * sizeof(double))));
14026
14027Vector_24_f64 zig_ret_vector_24_f64(void);
14028void zig_vector_24_f64(Vector_24_f64, size_t);
14029
14030Vector_24_f64 c_ret_vector_24_f64(void) {
14031 return (Vector_24_f64){
14032 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272,
14033 273, 274, 275, 276, 277, 278, 279, 280,
14034 };
14035}
14036void c_vector_24_f64(Vector_24_f64 v, size_t i) {
14037 assert_or_panic(v[0] == 281);
14038 assert_or_panic(v[1] == 282);
14039 assert_or_panic(v[2] == 283);
14040 assert_or_panic(v[3] == 284);
14041 assert_or_panic(v[4] == 285);
14042 assert_or_panic(v[5] == 286);
14043 assert_or_panic(v[6] == 287);
14044 assert_or_panic(v[7] == 288);
14045 assert_or_panic(v[8] == 289);
14046 assert_or_panic(v[9] == 290);
14047 assert_or_panic(v[10] == 291);
14048 assert_or_panic(v[11] == 292);
14049 assert_or_panic(v[12] == 293);
14050 assert_or_panic(v[13] == 294);
14051 assert_or_panic(v[14] == 295);
14052 assert_or_panic(v[15] == 296);
14053 assert_or_panic(v[16] == 297);
14054 assert_or_panic(v[17] == 298);
14055 assert_or_panic(v[18] == 299);
14056 assert_or_panic(v[19] == 300);
14057 assert_or_panic(v[20] == 301);
14058 assert_or_panic(v[21] == 302);
14059 assert_or_panic(v[22] == 303);
14060 assert_or_panic(v[23] == 304);
14061 assert_or_panic(i == 24);
14062}
14063void c_test_vector_24_f64(void) {
14064 Vector_24_f64 v = zig_ret_vector_24_f64();
14065 assert_or_panic(v[0] == 209);
14066 assert_or_panic(v[1] == 210);
14067 assert_or_panic(v[2] == 211);
14068 assert_or_panic(v[3] == 212);
14069 assert_or_panic(v[4] == 213);
14070 assert_or_panic(v[5] == 214);
14071 assert_or_panic(v[6] == 215);
14072 assert_or_panic(v[7] == 216);
14073 assert_or_panic(v[8] == 217);
14074 assert_or_panic(v[9] == 218);
14075 assert_or_panic(v[10] == 219);
14076 assert_or_panic(v[11] == 220);
14077 assert_or_panic(v[12] == 221);
14078 assert_or_panic(v[13] == 222);
14079 assert_or_panic(v[14] == 223);
14080 assert_or_panic(v[15] == 224);
14081 assert_or_panic(v[16] == 225);
14082 assert_or_panic(v[17] == 226);
14083 assert_or_panic(v[18] == 227);
14084 assert_or_panic(v[19] == 228);
14085 assert_or_panic(v[20] == 229);
14086 assert_or_panic(v[21] == 230);
14087 assert_or_panic(v[22] == 231);
14088 assert_or_panic(v[23] == 232);
14089 zig_vector_24_f64((Vector_24_f64){
14090 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248,
14091 249, 250, 251, 252, 253, 254, 255, 256,
14092 }, 24);
14093}
14094
14095typedef double Vector_32_f64 __attribute__((vector_size(32 * sizeof(double))));
14096
14097Vector_32_f64 zig_ret_vector_32_f64(void);
14098void zig_vector_32_f64(Vector_32_f64, size_t);
14099
14100Vector_32_f64 c_ret_vector_32_f64(void) {
14101 return (Vector_32_f64){
14102 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
14103 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400,
14104 };
14105}
14106void c_vector_32_f64(Vector_32_f64 v, size_t i) {
14107 assert_or_panic(v[0] == 401);
14108 assert_or_panic(v[1] == 402);
14109 assert_or_panic(v[2] == 403);
14110 assert_or_panic(v[3] == 404);
14111 assert_or_panic(v[4] == 405);
14112 assert_or_panic(v[5] == 406);
14113 assert_or_panic(v[6] == 407);
14114 assert_or_panic(v[7] == 408);
14115 assert_or_panic(v[8] == 409);
14116 assert_or_panic(v[9] == 410);
14117 assert_or_panic(v[10] == 411);
14118 assert_or_panic(v[11] == 412);
14119 assert_or_panic(v[12] == 413);
14120 assert_or_panic(v[13] == 414);
14121 assert_or_panic(v[14] == 415);
14122 assert_or_panic(v[15] == 416);
14123 assert_or_panic(v[16] == 417);
14124 assert_or_panic(v[17] == 418);
14125 assert_or_panic(v[18] == 419);
14126 assert_or_panic(v[19] == 420);
14127 assert_or_panic(v[20] == 421);
14128 assert_or_panic(v[21] == 422);
14129 assert_or_panic(v[22] == 423);
14130 assert_or_panic(v[23] == 424);
14131 assert_or_panic(v[24] == 425);
14132 assert_or_panic(v[25] == 426);
14133 assert_or_panic(v[26] == 427);
14134 assert_or_panic(v[27] == 428);
14135 assert_or_panic(v[28] == 429);
14136 assert_or_panic(v[29] == 430);
14137 assert_or_panic(v[30] == 431);
14138 assert_or_panic(v[31] == 432);
14139 assert_or_panic(i == 32);
14140}
14141void c_test_vector_32_f64(void) {
14142 Vector_32_f64 v = zig_ret_vector_32_f64();
14143 assert_or_panic(v[0] == 305);
14144 assert_or_panic(v[1] == 306);
14145 assert_or_panic(v[2] == 307);
14146 assert_or_panic(v[3] == 308);
14147 assert_or_panic(v[4] == 309);
14148 assert_or_panic(v[5] == 310);
14149 assert_or_panic(v[6] == 311);
14150 assert_or_panic(v[7] == 312);
14151 assert_or_panic(v[8] == 313);
14152 assert_or_panic(v[9] == 314);
14153 assert_or_panic(v[10] == 315);
14154 assert_or_panic(v[11] == 316);
14155 assert_or_panic(v[12] == 317);
14156 assert_or_panic(v[13] == 318);
14157 assert_or_panic(v[14] == 319);
14158 assert_or_panic(v[15] == 320);
14159 assert_or_panic(v[16] == 321);
14160 assert_or_panic(v[17] == 322);
14161 assert_or_panic(v[18] == 323);
14162 assert_or_panic(v[19] == 324);
14163 assert_or_panic(v[20] == 325);
14164 assert_or_panic(v[21] == 326);
14165 assert_or_panic(v[22] == 327);
14166 assert_or_panic(v[23] == 328);
14167 assert_or_panic(v[24] == 329);
14168 assert_or_panic(v[25] == 330);
14169 assert_or_panic(v[26] == 331);
14170 assert_or_panic(v[27] == 332);
14171 assert_or_panic(v[28] == 333);
14172 assert_or_panic(v[29] == 334);
14173 assert_or_panic(v[30] == 335);
14174 assert_or_panic(v[31] == 336);
14175 zig_vector_32_f64((Vector_32_f64){
14176 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352,
14177 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
14178 }, 32);
14179}
14180
14181typedef double Vector_48_f64 __attribute__((vector_size(48 * sizeof(double))));
14182
14183Vector_48_f64 zig_ret_vector_48_f64(void);
14184void zig_vector_48_f64(Vector_48_f64, size_t);
14185
14186Vector_48_f64 c_ret_vector_48_f64(void) {
14187 return (Vector_48_f64){
14188 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544,
14189 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560,
14190 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573, 574, 575, 576,
14191 };
14192}
14193void c_vector_48_f64(Vector_48_f64 v, size_t i) {
14194 assert_or_panic(v[0] == 577);
14195 assert_or_panic(v[1] == 578);
14196 assert_or_panic(v[2] == 579);
14197 assert_or_panic(v[3] == 580);
14198 assert_or_panic(v[4] == 581);
14199 assert_or_panic(v[5] == 582);
14200 assert_or_panic(v[6] == 583);
14201 assert_or_panic(v[7] == 584);
14202 assert_or_panic(v[8] == 585);
14203 assert_or_panic(v[9] == 586);
14204 assert_or_panic(v[10] == 587);
14205 assert_or_panic(v[11] == 588);
14206 assert_or_panic(v[12] == 589);
14207 assert_or_panic(v[13] == 590);
14208 assert_or_panic(v[14] == 591);
14209 assert_or_panic(v[15] == 592);
14210 assert_or_panic(v[16] == 593);
14211 assert_or_panic(v[17] == 594);
14212 assert_or_panic(v[18] == 595);
14213 assert_or_panic(v[19] == 596);
14214 assert_or_panic(v[20] == 597);
14215 assert_or_panic(v[21] == 598);
14216 assert_or_panic(v[22] == 599);
14217 assert_or_panic(v[23] == 600);
14218 assert_or_panic(v[24] == 601);
14219 assert_or_panic(v[25] == 602);
14220 assert_or_panic(v[26] == 603);
14221 assert_or_panic(v[27] == 604);
14222 assert_or_panic(v[28] == 605);
14223 assert_or_panic(v[29] == 606);
14224 assert_or_panic(v[30] == 607);
14225 assert_or_panic(v[31] == 608);
14226 assert_or_panic(v[32] == 609);
14227 assert_or_panic(v[33] == 610);
14228 assert_or_panic(v[34] == 611);
14229 assert_or_panic(v[35] == 612);
14230 assert_or_panic(v[36] == 613);
14231 assert_or_panic(v[37] == 614);
14232 assert_or_panic(v[38] == 615);
14233 assert_or_panic(v[39] == 616);
14234 assert_or_panic(v[40] == 617);
14235 assert_or_panic(v[41] == 618);
14236 assert_or_panic(v[42] == 619);
14237 assert_or_panic(v[43] == 620);
14238 assert_or_panic(v[44] == 621);
14239 assert_or_panic(v[45] == 622);
14240 assert_or_panic(v[46] == 623);
14241 assert_or_panic(v[47] == 624);
14242 assert_or_panic(i == 48);
14243}
14244void c_test_vector_48_f64(void) {
14245 Vector_48_f64 v = zig_ret_vector_48_f64();
14246 assert_or_panic(v[0] == 433);
14247 assert_or_panic(v[1] == 434);
14248 assert_or_panic(v[2] == 435);
14249 assert_or_panic(v[3] == 436);
14250 assert_or_panic(v[4] == 437);
14251 assert_or_panic(v[5] == 438);
14252 assert_or_panic(v[6] == 439);
14253 assert_or_panic(v[7] == 440);
14254 assert_or_panic(v[8] == 441);
14255 assert_or_panic(v[9] == 442);
14256 assert_or_panic(v[10] == 443);
14257 assert_or_panic(v[11] == 444);
14258 assert_or_panic(v[12] == 445);
14259 assert_or_panic(v[13] == 446);
14260 assert_or_panic(v[14] == 447);
14261 assert_or_panic(v[15] == 448);
14262 assert_or_panic(v[16] == 449);
14263 assert_or_panic(v[17] == 450);
14264 assert_or_panic(v[18] == 451);
14265 assert_or_panic(v[19] == 452);
14266 assert_or_panic(v[20] == 453);
14267 assert_or_panic(v[21] == 454);
14268 assert_or_panic(v[22] == 455);
14269 assert_or_panic(v[23] == 456);
14270 assert_or_panic(v[24] == 457);
14271 assert_or_panic(v[25] == 458);
14272 assert_or_panic(v[26] == 459);
14273 assert_or_panic(v[27] == 460);
14274 assert_or_panic(v[28] == 461);
14275 assert_or_panic(v[29] == 462);
14276 assert_or_panic(v[30] == 463);
14277 assert_or_panic(v[31] == 464);
14278 assert_or_panic(v[32] == 465);
14279 assert_or_panic(v[33] == 466);
14280 assert_or_panic(v[34] == 467);
14281 assert_or_panic(v[35] == 468);
14282 assert_or_panic(v[36] == 469);
14283 assert_or_panic(v[37] == 470);
14284 assert_or_panic(v[38] == 471);
14285 assert_or_panic(v[39] == 472);
14286 assert_or_panic(v[40] == 473);
14287 assert_or_panic(v[41] == 474);
14288 assert_or_panic(v[42] == 475);
14289 assert_or_panic(v[43] == 476);
14290 assert_or_panic(v[44] == 477);
14291 assert_or_panic(v[45] == 478);
14292 assert_or_panic(v[46] == 479);
14293 assert_or_panic(v[47] == 480);
14294 zig_vector_48_f64((Vector_48_f64){
14295 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496,
14296 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512,
14297 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528,
14298 }, 48);
14299}
14300
14301typedef double Vector_64_f64 __attribute__((vector_size(64 * sizeof(double))));
14302
14303Vector_64_f64 zig_ret_vector_64_f64(void);
14304void zig_vector_64_f64(Vector_64_f64, size_t);
14305
14306Vector_64_f64 c_ret_vector_64_f64(void) {
14307 return (Vector_64_f64){
14308 753, 754, 755, 756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768,
14309 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784,
14310 785, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
14311 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816,
272014312 };
272114313}
14314void c_vector_64_f64(Vector_64_f64 v, size_t i) {
14315 assert_or_panic(v[0] == 817);
14316 assert_or_panic(v[1] == 818);
14317 assert_or_panic(v[2] == 819);
14318 assert_or_panic(v[3] == 820);
14319 assert_or_panic(v[4] == 821);
14320 assert_or_panic(v[5] == 822);
14321 assert_or_panic(v[6] == 823);
14322 assert_or_panic(v[7] == 824);
14323 assert_or_panic(v[8] == 825);
14324 assert_or_panic(v[9] == 826);
14325 assert_or_panic(v[10] == 827);
14326 assert_or_panic(v[11] == 828);
14327 assert_or_panic(v[12] == 829);
14328 assert_or_panic(v[13] == 830);
14329 assert_or_panic(v[14] == 831);
14330 assert_or_panic(v[15] == 832);
14331 assert_or_panic(v[16] == 833);
14332 assert_or_panic(v[17] == 834);
14333 assert_or_panic(v[18] == 835);
14334 assert_or_panic(v[19] == 836);
14335 assert_or_panic(v[20] == 837);
14336 assert_or_panic(v[21] == 838);
14337 assert_or_panic(v[22] == 839);
14338 assert_or_panic(v[23] == 840);
14339 assert_or_panic(v[24] == 841);
14340 assert_or_panic(v[25] == 842);
14341 assert_or_panic(v[26] == 843);
14342 assert_or_panic(v[27] == 844);
14343 assert_or_panic(v[28] == 845);
14344 assert_or_panic(v[29] == 846);
14345 assert_or_panic(v[30] == 847);
14346 assert_or_panic(v[31] == 848);
14347 assert_or_panic(v[32] == 849);
14348 assert_or_panic(v[33] == 850);
14349 assert_or_panic(v[34] == 851);
14350 assert_or_panic(v[35] == 852);
14351 assert_or_panic(v[36] == 853);
14352 assert_or_panic(v[37] == 854);
14353 assert_or_panic(v[38] == 855);
14354 assert_or_panic(v[39] == 856);
14355 assert_or_panic(v[40] == 857);
14356 assert_or_panic(v[41] == 858);
14357 assert_or_panic(v[42] == 859);
14358 assert_or_panic(v[43] == 860);
14359 assert_or_panic(v[44] == 861);
14360 assert_or_panic(v[45] == 862);
14361 assert_or_panic(v[46] == 863);
14362 assert_or_panic(v[47] == 864);
14363 assert_or_panic(v[48] == 865);
14364 assert_or_panic(v[49] == 866);
14365 assert_or_panic(v[50] == 867);
14366 assert_or_panic(v[51] == 868);
14367 assert_or_panic(v[52] == 869);
14368 assert_or_panic(v[53] == 870);
14369 assert_or_panic(v[54] == 871);
14370 assert_or_panic(v[55] == 872);
14371 assert_or_panic(v[56] == 873);
14372 assert_or_panic(v[57] == 874);
14373 assert_or_panic(v[58] == 875);
14374 assert_or_panic(v[59] == 876);
14375 assert_or_panic(v[60] == 877);
14376 assert_or_panic(v[61] == 878);
14377 assert_or_panic(v[62] == 879);
14378 assert_or_panic(v[63] == 880);
14379 assert_or_panic(i == 64);
14380}
14381void c_test_vector_64_f64(void) {
14382 Vector_64_f64 v = zig_ret_vector_64_f64();
14383 assert_or_panic(v[0] == 625);
14384 assert_or_panic(v[1] == 626);
14385 assert_or_panic(v[2] == 627);
14386 assert_or_panic(v[3] == 628);
14387 assert_or_panic(v[4] == 629);
14388 assert_or_panic(v[5] == 630);
14389 assert_or_panic(v[6] == 631);
14390 assert_or_panic(v[7] == 632);
14391 assert_or_panic(v[8] == 633);
14392 assert_or_panic(v[9] == 634);
14393 assert_or_panic(v[10] == 635);
14394 assert_or_panic(v[11] == 636);
14395 assert_or_panic(v[12] == 637);
14396 assert_or_panic(v[13] == 638);
14397 assert_or_panic(v[14] == 639);
14398 assert_or_panic(v[15] == 640);
14399 assert_or_panic(v[16] == 641);
14400 assert_or_panic(v[17] == 642);
14401 assert_or_panic(v[18] == 643);
14402 assert_or_panic(v[19] == 644);
14403 assert_or_panic(v[20] == 645);
14404 assert_or_panic(v[21] == 646);
14405 assert_or_panic(v[22] == 647);
14406 assert_or_panic(v[23] == 648);
14407 assert_or_panic(v[24] == 649);
14408 assert_or_panic(v[25] == 650);
14409 assert_or_panic(v[26] == 651);
14410 assert_or_panic(v[27] == 652);
14411 assert_or_panic(v[28] == 653);
14412 assert_or_panic(v[29] == 654);
14413 assert_or_panic(v[30] == 655);
14414 assert_or_panic(v[31] == 656);
14415 assert_or_panic(v[32] == 657);
14416 assert_or_panic(v[33] == 658);
14417 assert_or_panic(v[34] == 659);
14418 assert_or_panic(v[35] == 660);
14419 assert_or_panic(v[36] == 661);
14420 assert_or_panic(v[37] == 662);
14421 assert_or_panic(v[38] == 663);
14422 assert_or_panic(v[39] == 664);
14423 assert_or_panic(v[40] == 665);
14424 assert_or_panic(v[41] == 666);
14425 assert_or_panic(v[42] == 667);
14426 assert_or_panic(v[43] == 668);
14427 assert_or_panic(v[44] == 669);
14428 assert_or_panic(v[45] == 670);
14429 assert_or_panic(v[46] == 671);
14430 assert_or_panic(v[47] == 672);
14431 assert_or_panic(v[48] == 673);
14432 assert_or_panic(v[49] == 674);
14433 assert_or_panic(v[50] == 675);
14434 assert_or_panic(v[51] == 676);
14435 assert_or_panic(v[52] == 677);
14436 assert_or_panic(v[53] == 678);
14437 assert_or_panic(v[54] == 679);
14438 assert_or_panic(v[55] == 680);
14439 assert_or_panic(v[56] == 681);
14440 assert_or_panic(v[57] == 682);
14441 assert_or_panic(v[58] == 683);
14442 assert_or_panic(v[59] == 684);
14443 assert_or_panic(v[60] == 685);
14444 assert_or_panic(v[61] == 686);
14445 assert_or_panic(v[62] == 687);
14446 assert_or_panic(v[63] == 688);
14447 zig_vector_64_f64((Vector_64_f64){
14448 689, 690, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 701, 702, 703, 704,
14449 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720,
14450 721, 722, 723, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 735, 736,
14451 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752,
14452 }, 64);
14453}
14454
14455struct Struct_u8 {
14456 uint8_t a;
14457};
14458
14459struct Struct_u8 zig_ret_struct_u8(void);
14460void zig_struct_u8(struct Struct_u8, size_t);
14461
14462struct Struct_u8 c_ret_struct_u8(void) {
14463 return (struct Struct_u8){ .a = 4 };
14464}
14465void c_struct_u8(struct Struct_u8 s, size_t i) {
14466 assert_or_panic(s.a == 5);
14467 assert_or_panic(i == 6);
14468}
14469void c_test_struct_u8(void) {
14470 struct Struct_u8 s = zig_ret_struct_u8();
14471 assert_or_panic(s.a == 1);
14472 zig_struct_u8((struct Struct_u8){ .a = 2 }, 3);
14473}
14474
14475struct Struct_u8_u8 {
14476 uint8_t a, b;
14477};
14478
14479struct Struct_u8_u8 zig_ret_struct_u8_u8(void);
14480void zig_struct_u8_u8(struct Struct_u8_u8, size_t);
14481
14482struct Struct_u8_u8 c_ret_struct_u8_u8(void) {
14483 return (struct Struct_u8_u8){ .a = 6, .b = 7 };
14484}
14485void c_struct_u8_u8(struct Struct_u8_u8 s, size_t i) {
14486 assert_or_panic(s.a == 8);
14487 assert_or_panic(s.b == 9);
14488 assert_or_panic(i == 10);
14489}
14490void c_test_struct_u8_u8(void) {
14491 struct Struct_u8_u8 s = zig_ret_struct_u8_u8();
14492 assert_or_panic(s.a == 1);
14493 assert_or_panic(s.b == 2);
14494 zig_struct_u8_u8((struct Struct_u8_u8){ .a = 3, .b = 4 }, 5);
14495}
14496
14497struct Struct_u8_u8_u8 {
14498 uint8_t a, b, c;
14499};
14500
14501struct Struct_u8_u8_u8 zig_ret_struct_u8_u8_u8(void);
14502void zig_struct_u8_u8_u8(struct Struct_u8_u8_u8, size_t);
14503
14504struct Struct_u8_u8_u8 c_ret_struct_u8_u8_u8(void) {
14505 return (struct Struct_u8_u8_u8){ .a = 8, .b = 9, .c = 10 };
14506}
14507void c_struct_u8_u8_u8(struct Struct_u8_u8_u8 s, size_t i) {
14508 assert_or_panic(s.a == 11);
14509 assert_or_panic(s.b == 12);
14510 assert_or_panic(s.c == 13);
14511 assert_or_panic(i == 14);
14512}
14513void c_test_struct_u8_u8_u8(void) {
14514 struct Struct_u8_u8_u8 s = zig_ret_struct_u8_u8_u8();
14515 assert_or_panic(s.a == 1);
14516 assert_or_panic(s.b == 2);
14517 assert_or_panic(s.c == 3);
14518 zig_struct_u8_u8_u8((struct Struct_u8_u8_u8){ .a = 4, .b = 5, .c = 6 }, 7);
14519}
14520
14521struct Struct_u8_u8_u8_u8 {
14522 uint8_t a, b, c, d;
14523};
14524
14525struct Struct_u8_u8_u8_u8 zig_ret_struct_u8_u8_u8_u8(void);
14526void zig_struct_u8_u8_u8_u8(struct Struct_u8_u8_u8_u8, size_t);
14527
14528struct Struct_u8_u8_u8_u8 c_ret_struct_u8_u8_u8_u8(void) {
14529 return (struct Struct_u8_u8_u8_u8){ .a = 10, .b = 11, .c = 12, .d = 13 };
14530}
14531void c_struct_u8_u8_u8_u8(struct Struct_u8_u8_u8_u8 s, size_t i) {
14532 assert_or_panic(s.a == 14);
14533 assert_or_panic(s.b == 15);
14534 assert_or_panic(s.c == 16);
14535 assert_or_panic(s.d == 17);
14536 assert_or_panic(i == 18);
14537}
14538void c_test_struct_u8_u8_u8_u8(void) {
14539 struct Struct_u8_u8_u8_u8 s = zig_ret_struct_u8_u8_u8_u8();
14540 assert_or_panic(s.a == 1);
14541 assert_or_panic(s.b == 2);
14542 assert_or_panic(s.c == 3);
14543 assert_or_panic(s.d == 4);
14544 zig_struct_u8_u8_u8_u8((struct Struct_u8_u8_u8_u8){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
14545}
14546
14547struct Struct_u16 {
14548 uint16_t a;
14549};
14550
14551struct Struct_u16 zig_ret_struct_u16(void);
14552void zig_struct_u16(struct Struct_u16, size_t);
14553
14554struct Struct_u16 c_ret_struct_u16(void) {
14555 return (struct Struct_u16){ .a = 4 };
14556}
14557void c_struct_u16(struct Struct_u16 s, size_t i) {
14558 assert_or_panic(s.a == 5);
14559 assert_or_panic(i == 6);
14560}
14561void c_test_struct_u16(void) {
14562 struct Struct_u16 s = zig_ret_struct_u16();
14563 assert_or_panic(s.a == 1);
14564 zig_struct_u16((struct Struct_u16){ .a = 2 }, 3);
14565}
14566
14567struct Struct_u16_u16 {
14568 uint16_t a, b;
14569};
14570
14571struct Struct_u16_u16 zig_ret_struct_u16_u16(void);
14572void zig_struct_u16_u16(struct Struct_u16_u16, size_t);
14573
14574struct Struct_u16_u16 c_ret_struct_u16_u16(void) {
14575 return (struct Struct_u16_u16){ .a = 6, .b = 7 };
14576}
14577void c_struct_u16_u16(struct Struct_u16_u16 s, size_t i) {
14578 assert_or_panic(s.a == 8);
14579 assert_or_panic(s.b == 9);
14580 assert_or_panic(i == 10);
14581}
14582void c_test_struct_u16_u16(void) {
14583 struct Struct_u16_u16 s = zig_ret_struct_u16_u16();
14584 assert_or_panic(s.a == 1);
14585 assert_or_panic(s.b == 2);
14586 zig_struct_u16_u16((struct Struct_u16_u16){ .a = 3, .b = 4 }, 5);
14587}
14588
14589struct Struct_u16_u16_u16 {
14590 uint16_t a, b, c;
14591};
14592
14593struct Struct_u16_u16_u16 zig_ret_struct_u16_u16_u16(void);
14594void zig_struct_u16_u16_u16(struct Struct_u16_u16_u16, size_t);
14595
14596struct Struct_u16_u16_u16 c_ret_struct_u16_u16_u16(void) {
14597 return (struct Struct_u16_u16_u16){ .a = 8, .b = 9, .c = 10 };
14598}
14599void c_struct_u16_u16_u16(struct Struct_u16_u16_u16 s, size_t i) {
14600 assert_or_panic(s.a == 11);
14601 assert_or_panic(s.b == 12);
14602 assert_or_panic(s.c == 13);
14603 assert_or_panic(i == 14);
14604}
14605void c_test_struct_u16_u16_u16(void) {
14606 struct Struct_u16_u16_u16 s = zig_ret_struct_u16_u16_u16();
14607 assert_or_panic(s.a == 1);
14608 assert_or_panic(s.b == 2);
14609 assert_or_panic(s.c == 3);
14610 zig_struct_u16_u16_u16((struct Struct_u16_u16_u16){ .a = 4, .b = 5, .c = 6 }, 7);
14611}
14612
14613struct Struct_u16_u16_u16_u16 {
14614 uint16_t a, b, c, d;
14615};
14616
14617struct Struct_u16_u16_u16_u16 zig_ret_struct_u16_u16_u16_u16(void);
14618void zig_struct_u16_u16_u16_u16(struct Struct_u16_u16_u16_u16, size_t);
14619
14620struct Struct_u16_u16_u16_u16 c_ret_struct_u16_u16_u16_u16(void) {
14621 return (struct Struct_u16_u16_u16_u16){ .a = 10, .b = 11, .c = 12, .d = 13 };
14622}
14623void c_struct_u16_u16_u16_u16(struct Struct_u16_u16_u16_u16 s, size_t i) {
14624 assert_or_panic(s.a == 14);
14625 assert_or_panic(s.b == 15);
14626 assert_or_panic(s.c == 16);
14627 assert_or_panic(s.d == 17);
14628 assert_or_panic(i == 18);
14629}
14630void c_test_struct_u16_u16_u16_u16(void) {
14631 struct Struct_u16_u16_u16_u16 s = zig_ret_struct_u16_u16_u16_u16();
14632 assert_or_panic(s.a == 1);
14633 assert_or_panic(s.b == 2);
14634 assert_or_panic(s.c == 3);
14635 assert_or_panic(s.d == 4);
14636 zig_struct_u16_u16_u16_u16((struct Struct_u16_u16_u16_u16){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
14637}
14638
14639struct Struct_u32 {
14640 uint32_t a;
14641};
14642
14643struct Struct_u32 zig_ret_struct_u32(void);
14644void zig_struct_u32(struct Struct_u32, size_t);
14645
14646struct Struct_u32 c_ret_struct_u32(void) {
14647 return (struct Struct_u32){ .a = 4 };
14648}
14649void c_struct_u32(struct Struct_u32 s, size_t i) {
14650 assert_or_panic(s.a == 5);
14651 assert_or_panic(i == 6);
14652}
14653void c_test_struct_u32(void) {
14654 struct Struct_u32 s = zig_ret_struct_u32();
14655 assert_or_panic(s.a == 1);
14656 zig_struct_u32((struct Struct_u32){ .a = 2 }, 3);
14657}
14658
14659struct Struct_u32_u32 {
14660 uint32_t a, b;
14661};
14662
14663struct Struct_u32_u32 zig_ret_struct_u32_u32(void);
14664void zig_struct_u32_u32(struct Struct_u32_u32, size_t);
14665
14666struct Struct_u32_u32 c_ret_struct_u32_u32(void) {
14667 return (struct Struct_u32_u32){ .a = 6, .b = 7 };
14668}
14669void c_struct_u32_u32(struct Struct_u32_u32 s, size_t i) {
14670 assert_or_panic(s.a == 8);
14671 assert_or_panic(s.b == 9);
14672 assert_or_panic(i == 10);
14673}
14674void c_test_struct_u32_u32(void) {
14675 struct Struct_u32_u32 s = zig_ret_struct_u32_u32();
14676 assert_or_panic(s.a == 1);
14677 assert_or_panic(s.b == 2);
14678 zig_struct_u32_u32((struct Struct_u32_u32){ .a = 3, .b = 4 }, 5);
14679}
14680
14681struct Struct_u32_u32_u32 {
14682 uint32_t a, b, c;
14683};
14684
14685struct Struct_u32_u32_u32 zig_ret_struct_u32_u32_u32(void);
14686void zig_struct_u32_u32_u32(struct Struct_u32_u32_u32, size_t);
14687
14688struct Struct_u32_u32_u32 c_ret_struct_u32_u32_u32(void) {
14689 return (struct Struct_u32_u32_u32){ .a = 8, .b = 9, .c = 10 };
14690}
14691void c_struct_u32_u32_u32(struct Struct_u32_u32_u32 s, size_t i) {
14692 assert_or_panic(s.a == 11);
14693 assert_or_panic(s.b == 12);
14694 assert_or_panic(s.c == 13);
14695 assert_or_panic(i == 14);
14696}
14697void c_test_struct_u32_u32_u32(void) {
14698 struct Struct_u32_u32_u32 s = zig_ret_struct_u32_u32_u32();
14699 assert_or_panic(s.a == 1);
14700 assert_or_panic(s.b == 2);
14701 assert_or_panic(s.c == 3);
14702 zig_struct_u32_u32_u32((struct Struct_u32_u32_u32){ .a = 4, .b = 5, .c = 6 }, 7);
14703}
14704
14705struct Struct_u32_u32_u32_u32 {
14706 uint32_t a, b, c, d;
14707};
14708
14709struct Struct_u32_u32_u32_u32 zig_ret_struct_u32_u32_u32_u32(void);
14710void zig_struct_u32_u32_u32_u32(struct Struct_u32_u32_u32_u32, size_t);
14711
14712struct Struct_u32_u32_u32_u32 c_ret_struct_u32_u32_u32_u32(void) {
14713 return (struct Struct_u32_u32_u32_u32){ .a = 10, .b = 11, .c = 12, .d = 13 };
14714}
14715void c_struct_u32_u32_u32_u32(struct Struct_u32_u32_u32_u32 s, size_t i) {
14716 assert_or_panic(s.a == 14);
14717 assert_or_panic(s.b == 15);
14718 assert_or_panic(s.c == 16);
14719 assert_or_panic(s.d == 17);
14720 assert_or_panic(i == 18);
14721}
14722void c_test_struct_u32_u32_u32_u32(void) {
14723 struct Struct_u32_u32_u32_u32 s = zig_ret_struct_u32_u32_u32_u32();
14724 assert_or_panic(s.a == 1);
14725 assert_or_panic(s.b == 2);
14726 assert_or_panic(s.c == 3);
14727 assert_or_panic(s.d == 4);
14728 zig_struct_u32_u32_u32_u32((struct Struct_u32_u32_u32_u32){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
14729}
14730
14731struct Struct_u64 {
14732 uint64_t a;
14733};
14734
14735struct Struct_u64 zig_ret_struct_u64(void);
14736void zig_struct_u64(struct Struct_u64, size_t);
14737
14738struct Struct_u64 c_ret_struct_u64(void) {
14739 return (struct Struct_u64){ .a = 4 };
14740}
14741void c_struct_u64(struct Struct_u64 s, size_t i) {
14742 assert_or_panic(s.a == 5);
14743 assert_or_panic(i == 6);
14744}
14745void c_test_struct_u64(void) {
14746 struct Struct_u64 s = zig_ret_struct_u64();
14747 assert_or_panic(s.a == 1);
14748 zig_struct_u64((struct Struct_u64){ .a = 2 }, 3);
14749}
14750
14751struct Struct_u64_u64 {
14752 uint64_t a;
14753 uint64_t b;
14754};
14755
14756struct Struct_u64_u64 zig_ret_struct_u64_u64(void);
14757void zig_struct_u64_u64(struct Struct_u64_u64, size_t);
14758void zig_1_struct_u64_u64(size_t, struct Struct_u64_u64, size_t);
14759void zig_2_struct_u64_u64(size_t, size_t, struct Struct_u64_u64, size_t);
14760void zig_3_struct_u64_u64(size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14761void zig_4_struct_u64_u64(size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14762void zig_5_struct_u64_u64(size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14763void zig_6_struct_u64_u64(size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14764void zig_7_struct_u64_u64(size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14765void zig_8_struct_u64_u64(size_t, size_t, size_t, size_t, size_t, size_t, size_t, size_t, struct Struct_u64_u64, size_t);
14766
14767struct Struct_u64_u64 c_ret_struct_u64_u64(void) {
14768 return (struct Struct_u64_u64){ .a = 21, .b = 22 };
14769}
14770void c_struct_u64_u64(struct Struct_u64_u64 s, size_t i) {
14771 assert_or_panic(s.a == 23);
14772 assert_or_panic(s.b == 24);
14773 assert_or_panic(i == 1);
14774}
14775void c_1_struct_u64_u64(size_t a0, struct Struct_u64_u64 s, size_t i) {
14776 assert_or_panic(s.a == 25);
14777 assert_or_panic(s.b == 26);
14778 assert_or_panic(i == 2);
14779}
14780void c_2_struct_u64_u64(size_t a0, size_t a1, struct Struct_u64_u64 s, size_t i) {
14781 assert_or_panic(s.a == 27);
14782 assert_or_panic(s.b == 28);
14783 assert_or_panic(i == 3);
14784}
14785void c_3_struct_u64_u64(size_t a0, size_t a1, size_t a2, struct Struct_u64_u64 s, size_t i) {
14786 assert_or_panic(s.a == 29);
14787 assert_or_panic(s.b == 30);
14788 assert_or_panic(i == 4);
14789}
14790void c_4_struct_u64_u64(size_t a0, size_t a1, size_t a2, size_t a3, struct Struct_u64_u64 s, size_t i) {
14791 assert_or_panic(s.a == 31);
14792 assert_or_panic(s.b == 32);
14793 assert_or_panic(i == 5);
14794}
14795void c_5_struct_u64_u64(size_t a0, size_t a1, size_t a2, size_t a3, size_t a4, struct Struct_u64_u64 s, size_t i) {
14796 assert_or_panic(s.a == 33);
14797 assert_or_panic(s.b == 34);
14798 assert_or_panic(i == 6);
14799}
14800void c_6_struct_u64_u64(size_t a0, size_t a1, size_t a2, size_t a3, size_t a4, size_t a5, struct Struct_u64_u64 s, size_t i) {
14801 assert_or_panic(s.a == 35);
14802 assert_or_panic(s.b == 36);
14803 assert_or_panic(i == 7);
14804}
14805void c_7_struct_u64_u64(size_t a0, size_t a1, size_t a2, size_t a3, size_t a4, size_t a5, size_t a6, struct Struct_u64_u64 s, size_t i) {
14806 assert_or_panic(s.a == 37);
14807 assert_or_panic(s.b == 38);
14808 assert_or_panic(i == 8);
14809}
14810void c_8_struct_u64_u64(size_t a0, size_t a1, size_t a2, size_t a3, size_t a4, size_t a5, size_t a6, size_t a7, struct Struct_u64_u64 s, size_t i) {
14811 assert_or_panic(s.a == 39);
14812 assert_or_panic(s.b == 40);
14813 assert_or_panic(i == 9);
14814}
14815void c_test_struct_u64_u64(void) {
14816 struct Struct_u64_u64 s = zig_ret_struct_u64_u64();
14817 assert_or_panic(s.a == 1);
14818 assert_or_panic(s.b == 2);
14819 zig_struct_u64_u64((struct Struct_u64_u64){ .a = 3, .b = 4 }, 1);
14820 zig_1_struct_u64_u64(0, (struct Struct_u64_u64){ .a = 5, .b = 6 }, 2);
14821 zig_2_struct_u64_u64(0, 1, (struct Struct_u64_u64){ .a = 7, .b = 8 }, 3);
14822 zig_3_struct_u64_u64(0, 1, 2, (struct Struct_u64_u64){ .a = 9, .b = 10 }, 4);
14823 zig_4_struct_u64_u64(0, 1, 2, 3, (struct Struct_u64_u64){ .a = 11, .b = 12 }, 5);
14824 zig_5_struct_u64_u64(0, 1, 2, 3, 4, (struct Struct_u64_u64){ .a = 13, .b = 14 }, 6);
14825 zig_6_struct_u64_u64(0, 1, 2, 3, 4, 5, (struct Struct_u64_u64){ .a = 15, .b = 16 }, 7);
14826 zig_7_struct_u64_u64(0, 1, 2, 3, 4, 5, 6, (struct Struct_u64_u64){ .a = 17, .b = 18 }, 8);
14827 zig_8_struct_u64_u64(0, 1, 2, 3, 4, 5, 6, 7, (struct Struct_u64_u64){ .a = 19, .b = 20 }, 9);
14828}
14829
14830struct Struct_u64_u64_u64 {
14831 uint64_t a, b, c;
14832};
14833
14834struct Struct_u64_u64_u64 zig_ret_struct_u64_u64_u64(void);
14835void zig_struct_u64_u64_u64(struct Struct_u64_u64_u64, size_t);
14836
14837struct Struct_u64_u64_u64 c_ret_struct_u64_u64_u64(void) {
14838 return (struct Struct_u64_u64_u64){ .a = 8, .b = 9, .c = 10 };
14839}
14840void c_struct_u64_u64_u64(struct Struct_u64_u64_u64 s, size_t i) {
14841 assert_or_panic(s.a == 11);
14842 assert_or_panic(s.b == 12);
14843 assert_or_panic(s.c == 13);
14844 assert_or_panic(i == 14);
14845}
14846void c_test_struct_u64_u64_u64(void) {
14847 struct Struct_u64_u64_u64 s = zig_ret_struct_u64_u64_u64();
14848 assert_or_panic(s.a == 1);
14849 assert_or_panic(s.b == 2);
14850 assert_or_panic(s.c == 3);
14851 zig_struct_u64_u64_u64((struct Struct_u64_u64_u64){ .a = 4, .b = 5, .c = 6 }, 7);
14852}
14853
14854struct Struct_u64_u64_u64_u64 {
14855 uint64_t a, b, c, d;
14856};
14857
14858struct Struct_u64_u64_u64_u64 zig_ret_struct_u64_u64_u64_u64(void);
14859void zig_struct_u64_u64_u64_u64(struct Struct_u64_u64_u64_u64, size_t);
14860
14861struct Struct_u64_u64_u64_u64 c_ret_struct_u64_u64_u64_u64(void) {
14862 return (struct Struct_u64_u64_u64_u64){ .a = 10, .b = 11, .c = 12, .d = 13 };
14863}
14864void c_struct_u64_u64_u64_u64(struct Struct_u64_u64_u64_u64 s, size_t i) {
14865 assert_or_panic(s.a == 14);
14866 assert_or_panic(s.b == 15);
14867 assert_or_panic(s.c == 16);
14868 assert_or_panic(s.d == 17);
14869 assert_or_panic(i == 18);
14870}
14871void c_test_struct_u64_u64_u64_u64(void) {
14872 struct Struct_u64_u64_u64_u64 s = zig_ret_struct_u64_u64_u64_u64();
14873 assert_or_panic(s.a == 1);
14874 assert_or_panic(s.b == 2);
14875 assert_or_panic(s.c == 3);
14876 assert_or_panic(s.d == 4);
14877 zig_struct_u64_u64_u64_u64((struct Struct_u64_u64_u64_u64){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
14878}
14879
14880struct Struct_f32 {
14881 float a;
14882};
14883
14884struct Struct_f32 zig_ret_struct_f32(void);
14885void zig_struct_f32(struct Struct_f32, size_t);
14886
14887struct Struct_f32 c_ret_struct_f32(void) {
14888 return (struct Struct_f32){ .a = 4 };
14889}
14890void c_struct_f32(struct Struct_f32 s, size_t i) {
14891 assert_or_panic(s.a == 5);
14892 assert_or_panic(i == 6);
14893}
14894void c_test_struct_f32(void) {
14895 struct Struct_f32 s = zig_ret_struct_f32();
14896 assert_or_panic(s.a == 1);
14897 zig_struct_f32((struct Struct_f32){ .a = 2 }, 3);
14898}
14899
14900struct Struct_f32_f32 {
14901 float a, b;
14902};
14903
14904struct Struct_f32_f32 zig_ret_struct_f32_f32(void);
14905void zig_struct_f32_f32(struct Struct_f32_f32, size_t);
14906
14907struct Struct_f32_f32 c_ret_struct_f32_f32(void) {
14908 return (struct Struct_f32_f32){ .a = 6, .b = 7 };
14909}
14910void c_struct_f32_f32(struct Struct_f32_f32 s, size_t i) {
14911 assert_or_panic(s.a == 8);
14912 assert_or_panic(s.b == 9);
14913 assert_or_panic(i == 10);
14914}
14915void c_test_struct_f32_f32(void) {
14916 struct Struct_f32_f32 s = zig_ret_struct_f32_f32();
14917 assert_or_panic(s.a == 1);
14918 assert_or_panic(s.b == 2);
14919 zig_struct_f32_f32((struct Struct_f32_f32){ .a = 3, .b = 4 }, 5);
14920}
14921
14922struct Struct_f32_f32_f32 {
14923 float a, b, c;
14924};
14925
14926struct Struct_f32_f32_f32 zig_ret_struct_f32_f32_f32(void);
14927void zig_struct_f32_f32_f32(struct Struct_f32_f32_f32, size_t);
14928
14929struct Struct_f32_f32_f32 c_ret_struct_f32_f32_f32(void) {
14930 return (struct Struct_f32_f32_f32){ .a = 8, .b = 9, .c = 10 };
14931}
14932void c_struct_f32_f32_f32(struct Struct_f32_f32_f32 s, size_t i) {
14933 assert_or_panic(s.a == 11);
14934 assert_or_panic(s.b == 12);
14935 assert_or_panic(s.c == 13);
14936 assert_or_panic(i == 14);
14937}
14938void c_test_struct_f32_f32_f32(void) {
14939 struct Struct_f32_f32_f32 s = zig_ret_struct_f32_f32_f32();
14940 assert_or_panic(s.a == 1);
14941 assert_or_panic(s.b == 2);
14942 assert_or_panic(s.c == 3);
14943 zig_struct_f32_f32_f32((struct Struct_f32_f32_f32){ .a = 4, .b = 5, .c = 6 }, 7);
14944}
14945
14946struct Struct_f32_f32_f32_f32 {
14947 float a, b, c, d;
14948};
14949
14950struct Struct_f32_f32_f32_f32 zig_ret_struct_f32_f32_f32_f32(void);
14951void zig_struct_f32_f32_f32_f32(struct Struct_f32_f32_f32_f32, size_t);
14952
14953struct Struct_f32_f32_f32_f32 c_ret_struct_f32_f32_f32_f32(void) {
14954 return (struct Struct_f32_f32_f32_f32){ .a = 10, .b = 11, .c = 12, .d = 13 };
14955}
14956void c_struct_f32_f32_f32_f32(struct Struct_f32_f32_f32_f32 s, size_t i) {
14957 assert_or_panic(s.a == 14);
14958 assert_or_panic(s.b == 15);
14959 assert_or_panic(s.c == 16);
14960 assert_or_panic(s.d == 17);
14961 assert_or_panic(i == 18);
14962}
14963void c_test_struct_f32_f32_f32_f32(void) {
14964 struct Struct_f32_f32_f32_f32 s = zig_ret_struct_f32_f32_f32_f32();
14965 assert_or_panic(s.a == 1);
14966 assert_or_panic(s.b == 2);
14967 assert_or_panic(s.c == 3);
14968 assert_or_panic(s.d == 4);
14969 zig_struct_f32_f32_f32_f32((struct Struct_f32_f32_f32_f32){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
14970}
14971
14972struct Struct_f32_f32_f32_f32_f32 {
14973 float a, b, c, d, e;
14974};
14975
14976struct Struct_f32_f32_f32_f32_f32 zig_ret_struct_f32_f32_f32_f32_f32(void);
14977void zig_struct_f32_f32_f32_f32_f32(struct Struct_f32_f32_f32_f32_f32, size_t);
14978
14979struct Struct_f32_f32_f32_f32_f32 c_ret_struct_f32_f32_f32_f32_f32(void) {
14980 return (struct Struct_f32_f32_f32_f32_f32){ .a = 12, .b = 13, .c = 14, .d = 15, .e = 16 };
14981}
14982void c_struct_f32_f32_f32_f32_f32(struct Struct_f32_f32_f32_f32_f32 s, size_t i) {
14983 assert_or_panic(s.a == 17);
14984 assert_or_panic(s.b == 18);
14985 assert_or_panic(s.c == 19);
14986 assert_or_panic(s.d == 20);
14987 assert_or_panic(s.e == 21);
14988 assert_or_panic(i == 22);
14989}
14990void c_test_struct_f32_f32_f32_f32_f32(void) {
14991 struct Struct_f32_f32_f32_f32_f32 s = zig_ret_struct_f32_f32_f32_f32_f32();
14992 assert_or_panic(s.a == 1);
14993 assert_or_panic(s.b == 2);
14994 assert_or_panic(s.c == 3);
14995 assert_or_panic(s.d == 4);
14996 assert_or_panic(s.e == 5);
14997 zig_struct_f32_f32_f32_f32_f32((struct Struct_f32_f32_f32_f32_f32){ .a = 6, .b = 7, .c = 8, .d = 9, .e = 10 }, 11);
14998}
14999
15000struct Struct_f32a8 {
15001 alignas(8) float a;
15002};
15003
15004struct Struct_f32a8 zig_ret_struct_f32a8(void);
15005void zig_struct_f32a8(struct Struct_f32a8, float);
15006
15007struct Struct_f32a8 c_ret_struct_f32a8(void) {
15008 return (struct Struct_f32a8){ .a = 4.125f };
15009}
15010void c_struct_f32a8(struct Struct_f32a8 s, float f) {
15011 assert_or_panic(s.a == 5.375f);
15012 assert_or_panic(f == 6.5f);
15013}
15014void c_test_struct_f32a8(void) {
15015 struct Struct_f32a8 s = zig_ret_struct_f32a8();
15016 assert_or_panic(s.a == 1.25f);
15017 zig_struct_f32a8((struct Struct_f32a8){ .a = 2.75f }, 3.5f);
15018}
15019
15020struct Struct_f32a8_f32a8 {
15021 alignas(8) float a;
15022 alignas(8) float b;
15023};
15024
15025struct Struct_f32a8_f32a8 zig_ret_struct_f32a8_f32a8(void);
15026void zig_struct_f32a8_f32a8(struct Struct_f32a8_f32a8, float);
15027
15028struct Struct_f32a8_f32a8 c_ret_struct_f32a8_f32a8(void) {
15029 return (struct Struct_f32a8_f32a8){ .a = 6.625f, .b = 7.875f };
15030}
15031void c_struct_f32a8_f32a8(struct Struct_f32a8_f32a8 s, float f) {
15032 assert_or_panic(s.a == 8.0625f);
15033 assert_or_panic(s.b == 9.1875f);
15034 assert_or_panic(f == 10.5f);
15035}
15036void c_test_struct_f32a8_f32a8(void) {
15037 struct Struct_f32a8_f32a8 s = zig_ret_struct_f32a8_f32a8();
15038 assert_or_panic(s.a == 1.25f);
15039 assert_or_panic(s.b == 2.75f);
15040 zig_struct_f32a8_f32a8((struct Struct_f32a8_f32a8){ .a = 3.125f, .b = 4.375f }, 5.5f);
15041}
15042
15043struct Struct_f32f32_f32 {
15044 struct {
15045 float b, c;
15046 } a;
15047 float d;
15048};
15049
15050struct Struct_f32f32_f32 zig_ret_struct_f32f32_f32(void);
15051void zig_struct_f32f32_f32(struct Struct_f32f32_f32);
15052
15053struct Struct_f32f32_f32 c_ret_struct_f32f32_f32(void) {
15054 return (struct Struct_f32f32_f32){ .a = { .b = 1.0f, .c = 2.0f }, .d = 3.0f };
15055}
15056void c_struct_f32f32_f32(struct Struct_f32f32_f32 s) {
15057 assert_or_panic(s.a.b == 1.0f);
15058 assert_or_panic(s.a.c == 2.0f);
15059 assert_or_panic(s.d == 3.0f);
15060}
15061void c_test_struct_f32f32_f32(void) {
15062 struct Struct_f32f32_f32 s = zig_ret_struct_f32f32_f32();
15063 assert_or_panic(s.a.b == 1.0f);
15064 assert_or_panic(s.a.c == 2.0f);
15065 assert_or_panic(s.d == 3.0f);
15066 zig_struct_f32f32_f32((struct Struct_f32f32_f32){ .a = { .b = 1.0f, .c = 2.0f }, .d = 3.0f });
15067}
15068
15069struct Struct_f32_f32f32 {
15070 float a;
15071 struct {
15072 float c, d;
15073 } b;
15074};
15075
15076struct Struct_f32_f32f32 zig_ret_struct_f32_f32f32(void);
15077void zig_struct_f32_f32f32(struct Struct_f32_f32f32);
15078
15079struct Struct_f32_f32f32 c_ret_struct_f32_f32f32(void) {
15080 return (struct Struct_f32_f32f32){ .a = 1.0f, .b = { .c = 2.0f, .d = 3.0f } };
15081}
15082void c_struct_f32_f32f32(struct Struct_f32_f32f32 s) {
15083 assert_or_panic(s.a == 1.0f);
15084 assert_or_panic(s.b.c == 2.0f);
15085 assert_or_panic(s.b.d == 3.0f);
15086}
15087void c_test_struct_f32_f32f32(void) {
15088 struct Struct_f32_f32f32 s = zig_ret_struct_f32_f32f32();
15089 assert_or_panic(s.a == 1.0f);
15090 assert_or_panic(s.b.c == 2.0f);
15091 assert_or_panic(s.b.d == 3.0f);
15092 zig_struct_f32_f32f32((struct Struct_f32_f32f32){ .a = 1.0f, .b = { .c = 2.0f, .d = 3.0f } });
15093}
15094
15095struct Struct_f64 {
15096 double a;
15097};
15098
15099struct Struct_f64 zig_ret_struct_f64(void);
15100void zig_struct_f64(struct Struct_f64, size_t);
15101
15102struct Struct_f64 c_ret_struct_f64(void) {
15103 return (struct Struct_f64){ .a = 4 };
15104}
15105void c_struct_f64(struct Struct_f64 s, size_t i) {
15106 assert_or_panic(s.a == 5);
15107 assert_or_panic(i == 6);
15108}
15109void c_test_struct_f64(void) {
15110 struct Struct_f64 s = zig_ret_struct_f64();
15111 assert_or_panic(s.a == 1);
15112 zig_struct_f64((struct Struct_f64){ .a = 2 }, 3);
15113}
15114
15115struct Struct_f64_f64 {
15116 double a, b;
15117};
15118
15119struct Struct_f64_f64 zig_ret_struct_f64_f64(void);
15120void zig_struct_f64_f64(struct Struct_f64_f64, size_t);
15121
15122struct Struct_f64_f64 c_ret_struct_f64_f64(void) {
15123 return (struct Struct_f64_f64){ .a = 6, .b = 7 };
15124}
15125void c_struct_f64_f64(struct Struct_f64_f64 s, size_t i) {
15126 assert_or_panic(s.a == 8);
15127 assert_or_panic(s.b == 9);
15128 assert_or_panic(i == 10);
15129}
15130void c_test_struct_f64_f64(void) {
15131 struct Struct_f64_f64 s = zig_ret_struct_f64_f64();
15132 assert_or_panic(s.a == 1);
15133 assert_or_panic(s.b == 2);
15134 zig_struct_f64_f64((struct Struct_f64_f64){ .a = 3, .b = 4 }, 5);
15135}
15136
15137struct Struct_f64_f64_f64 {
15138 double a, b, c;
15139};
15140
15141struct Struct_f64_f64_f64 zig_ret_struct_f64_f64_f64(void);
15142void zig_struct_f64_f64_f64(struct Struct_f64_f64_f64, size_t);
15143
15144struct Struct_f64_f64_f64 c_ret_struct_f64_f64_f64(void) {
15145 return (struct Struct_f64_f64_f64){ .a = 8, .b = 9, .c = 10 };
15146}
15147void c_struct_f64_f64_f64(struct Struct_f64_f64_f64 s, size_t i) {
15148 assert_or_panic(s.a == 11);
15149 assert_or_panic(s.b == 12);
15150 assert_or_panic(s.c == 13);
15151 assert_or_panic(i == 14);
15152}
15153void c_test_struct_f64_f64_f64(void) {
15154 struct Struct_f64_f64_f64 s = zig_ret_struct_f64_f64_f64();
15155 assert_or_panic(s.a == 1);
15156 assert_or_panic(s.b == 2);
15157 assert_or_panic(s.c == 3);
15158 zig_struct_f64_f64_f64((struct Struct_f64_f64_f64){ .a = 4, .b = 5, .c = 6 }, 7);
15159}
15160
15161struct Struct_f64_f64_f64_f64 {
15162 double a, b, c, d;
15163};
15164
15165struct Struct_f64_f64_f64_f64 zig_ret_struct_f64_f64_f64_f64(void);
15166void zig_struct_f64_f64_f64_f64(struct Struct_f64_f64_f64_f64, size_t);
15167
15168struct Struct_f64_f64_f64_f64 c_ret_struct_f64_f64_f64_f64(void) {
15169 return (struct Struct_f64_f64_f64_f64){ .a = 10, .b = 11, .c = 12, .d = 13 };
15170}
15171void c_struct_f64_f64_f64_f64(struct Struct_f64_f64_f64_f64 s, size_t i) {
15172 assert_or_panic(s.a == 14);
15173 assert_or_panic(s.b == 15);
15174 assert_or_panic(s.c == 16);
15175 assert_or_panic(s.d == 17);
15176 assert_or_panic(i == 18);
15177}
15178void c_test_struct_f64_f64_f64_f64(void) {
15179 struct Struct_f64_f64_f64_f64 s = zig_ret_struct_f64_f64_f64_f64();
15180 assert_or_panic(s.a == 1);
15181 assert_or_panic(s.b == 2);
15182 assert_or_panic(s.c == 3);
15183 assert_or_panic(s.d == 4);
15184 zig_struct_f64_f64_f64_f64((struct Struct_f64_f64_f64_f64){ .a = 5, .b = 6, .c = 7, .d = 8 }, 9);
15185}
15186
15187struct Struct_f64_f64_f64_f64_f64 {
15188 double a, b, c, d, e;
15189};
15190
15191struct Struct_f64_f64_f64_f64_f64 zig_ret_struct_f64_f64_f64_f64_f64(void);
15192void zig_struct_f64_f64_f64_f64_f64(struct Struct_f64_f64_f64_f64_f64, size_t);
15193
15194struct Struct_f64_f64_f64_f64_f64 c_ret_struct_f64_f64_f64_f64_f64(void) {
15195 return (struct Struct_f64_f64_f64_f64_f64){ .a = 12, .b = 13, .c = 14, .d = 15, .e = 16 };
15196}
15197void c_struct_f64_f64_f64_f64_f64(struct Struct_f64_f64_f64_f64_f64 s, size_t i) {
15198 assert_or_panic(s.a == 17);
15199 assert_or_panic(s.b == 18);
15200 assert_or_panic(s.c == 19);
15201 assert_or_panic(s.d == 20);
15202 assert_or_panic(s.e == 21);
15203 assert_or_panic(i == 22);
15204}
15205void c_test_struct_f64_f64_f64_f64_f64(void) {
15206 struct Struct_f64_f64_f64_f64_f64 s = zig_ret_struct_f64_f64_f64_f64_f64();
15207 assert_or_panic(s.a == 1);
15208 assert_or_panic(s.b == 2);
15209 assert_or_panic(s.c == 3);
15210 assert_or_panic(s.d == 4);
15211 assert_or_panic(s.e == 5);
15212 zig_struct_f64_f64_f64_f64_f64((struct Struct_f64_f64_f64_f64_f64){ .a = 6, .b = 7, .c = 8, .d = 9, .e = 10 }, 11);
15213}
15214
15215struct Struct_u32_Union_u32_u32u32 {
15216 uint32_t a;
15217 union {
15218 struct {
15219 uint32_t d, e;
15220 } c;
15221 } b;
15222};
15223
15224struct Struct_u32_Union_u32_u32u32 zig_ret_struct_u32_union_u32_u32u32(void);
15225void zig_struct_u32_union_u32_u32u32(struct Struct_u32_Union_u32_u32u32);
15226
15227struct Struct_u32_Union_u32_u32u32 c_ret_struct_u32_union_u32_u32u32(void) {
15228 struct Struct_u32_Union_u32_u32u32 s;
15229 s.a = 1;
15230 s.b.c.d = 2;
15231 s.b.c.e = 3;
15232 return s;
15233}
15234void c_struct_u32_union_u32_u32u32(struct Struct_u32_Union_u32_u32u32 s) {
15235 assert_or_panic(s.a == 1);
15236 assert_or_panic(s.b.c.d == 2);
15237 assert_or_panic(s.b.c.e == 3);
15238}
15239void c_test_struct_u32_union_u32_u32u32(void) {
15240 struct Struct_u32_Union_u32_u32u32 s = zig_ret_struct_u32_union_u32_u32u32();
15241 assert_or_panic(s.a == 1);
15242 assert_or_panic(s.b.c.d == 2);
15243 assert_or_panic(s.b.c.e == 3);
15244 zig_struct_u32_union_u32_u32u32(s);
15245}
15246
15247struct Struct_i32_i32 {
15248 int32_t a;
15249 int32_t b;
15250};
15251
15252void zig_struct_i32_i32(struct Struct_i32_i32);
15253
15254struct BigStruct {
15255 uint64_t a;
15256 uint64_t b;
15257 uint64_t c;
15258 uint64_t d;
15259 uint8_t e;
15260};
15261
15262void zig_big_struct(struct BigStruct);
15263
15264union BigUnion {
15265 struct BigStruct a;
15266};
15267
15268void zig_big_union(union BigUnion);
15269
15270struct MedStructMixed {
15271 uint32_t a;
15272 float b;
15273 float c;
15274 uint32_t d;
15275};
272215276
2723void zig_vector_2_bool(Vector2Bool vec);
2724void zig_vector_4_bool(Vector4Bool vec);
2725void zig_vector_8_bool(Vector8Bool vec);
2726void zig_vector_16_bool(Vector16Bool vec);
2727void zig_vector_32_bool(Vector32Bool vec);
2728void zig_vector_64_bool(Vector64Bool vec);
2729void zig_vector_128_bool(Vector128Bool vec);
2730void zig_vector_256_bool(Vector256Bool vec);
2731void zig_vector_512_bool(Vector512Bool vec);
2732
2733Vector2Bool zig_ret_vector_2_bool(void);
2734Vector4Bool zig_ret_vector_4_bool(void);
2735Vector8Bool zig_ret_vector_8_bool(void);
2736Vector16Bool zig_ret_vector_16_bool(void);
2737Vector32Bool zig_ret_vector_32_bool(void);
2738Vector64Bool zig_ret_vector_64_bool(void);
2739Vector128Bool zig_ret_vector_128_bool(void);
2740Vector256Bool zig_ret_vector_256_bool(void);
2741Vector512Bool zig_ret_vector_512_bool(void);
15277void zig_med_struct_mixed(struct MedStructMixed);
15278struct MedStructMixed zig_ret_med_struct_mixed();
274215279
15280void zig_small_packed_struct(uint8_t);
15281#ifndef ZIG_NO_I128
15282void zig_big_packed_struct(__int128);
274315283#endif
274415284
2745typedef struct Vector3 {
2746 float x;
2747 float y;
2748 float z;
2749} Vector3;
2750
2751typedef struct Vector5 {
2752 float x;
2753 float y;
2754 float z;
2755 float w;
2756 float q;
2757} Vector5;
2758
2759typedef struct Rect {
2760 uint32_t left;
2761 uint32_t right;
2762 uint32_t top;
2763 uint32_t bottom;
2764} Rect;
2765
2766void zig_multiple_struct_ints(struct Rect, struct Rect);
2767
2768typedef struct FloatRect {
2769 float left;
2770 float right;
2771 float top;
2772 float bottom;
2773} FloatRect;
2774
2775void zig_multiple_struct_floats(struct FloatRect, struct FloatRect);
15285struct SplitStructInts {
15286 uint64_t a;
15287 uint8_t b;
15288 uint32_t c;
15289};
15290void zig_split_struct_ints(struct SplitStructInts);
15291
15292struct SplitStructMixed {
15293 uint64_t a;
15294 uint8_t b;
15295 float c;
15296};
15297void zig_split_struct_mixed(struct SplitStructMixed);
15298struct SplitStructMixed zig_ret_split_struct_mixed();
15299
15300struct BigStruct zig_big_struct_both(struct BigStruct);
277615301
277715302void run_c_tests(void) {
277815303 zig_u8(0xff);
......@@ -2849,202 +15374,34 @@ void run_c_tests(void) {
284915374 }
285015375#endif
285115376
2852#if !defined(__mips64)
2853#if !defined(ZIG_PPC32)
2854#if !defined(__s390x__)
2855#if !(defined(_WIN32) && defined(__i386__))
2856 {
2857 struct Struct_u8 s = zig_ret_struct_u8();
2858 assert_or_panic(s.a == 1);
2859 zig_struct_u8((struct Struct_u8){ .a = 2 }, 3);
2860 }
2861#endif
2862#endif
2863#endif
2864#endif
2865
2866#if !defined(__mips64)
2867#if !defined(ZIG_PPC32)
2868#if !defined(__s390x__)
2869#if !(defined(_WIN32) && defined(__i386__))
2870 {
2871 struct Struct_u16 s = zig_ret_struct_u16();
2872 assert_or_panic(s.a == 7);
2873 zig_struct_u16((struct Struct_u16){ .a = 8 }, 9);
2874 }
2875#endif
2876#endif
2877#endif
2878#endif
2879
2880#if !defined(__mips64)
2881#if !defined(ZIG_PPC32)
2882#if !defined(__s390x__)
2883#if !(defined(_WIN32) && defined(__i386__))
2884 {
2885 struct Struct_u32 s = zig_ret_struct_u32();
2886 assert_or_panic(s.a == 13);
2887 zig_struct_u32((struct Struct_u32){ .a = 14 }, 15);
2888 }
2889#endif
2890#endif
2891#endif
2892#endif
2893
2894#if !defined(ZIG_PPC32)
2895#if !defined(ZIG_RISCV32)
2896#if !defined(__s390x__)
2897#if !(defined(_WIN32) && defined(__i386__))
2898 {
2899 struct Struct_u64 s = zig_ret_struct_u64();
2900 assert_or_panic(s.a == 19);
2901 zig_struct_u64((struct Struct_u64){ .a = 20 }, 21);
2902 }
2903#endif
2904#endif
2905#endif
2906#endif
2907
2908#if !defined(ZIG_PPC32) && !defined(__hexagon__) && !defined(__s390x__)
2909 {
2910 struct Struct_u64_u64 s = zig_ret_struct_u64_u64();
2911 assert_or_panic(s.a == 1);
2912 assert_or_panic(s.b == 2);
2913 zig_struct_u64_u64_0((struct Struct_u64_u64){ .a = 3, .b = 4 }, 1);
2914 zig_struct_u64_u64_1(0, (struct Struct_u64_u64){ .a = 5, .b = 6 }, 2);
2915 zig_struct_u64_u64_2(0, 1, (struct Struct_u64_u64){ .a = 7, .b = 8 }, 3);
2916 zig_struct_u64_u64_3(0, 1, 2, (struct Struct_u64_u64){ .a = 9, .b = 10 }, 4);
2917 zig_struct_u64_u64_4(0, 1, 2, 3, (struct Struct_u64_u64){ .a = 11, .b = 12 }, 5);
2918 zig_struct_u64_u64_5(0, 1, 2, 3, 4, (struct Struct_u64_u64){ .a = 13, .b = 14 }, 6);
2919 zig_struct_u64_u64_6(0, 1, 2, 3, 4, 5, (struct Struct_u64_u64){ .a = 15, .b = 16 }, 7);
2920 zig_struct_u64_u64_7(0, 1, 2, 3, 4, 5, 6, (struct Struct_u64_u64){ .a = 17, .b = 18 }, 8);
2921 zig_struct_u64_u64_8(0, 1, 2, 3, 4, 5, 6, 7, (struct Struct_u64_u64){ .a = 19, .b = 20 }, 9);
2922 }
2923
2924#if !defined(__mips64__)
2925#if !(defined(_WIN32) && defined(__i386__))
2926 {
2927 struct Struct_f32 s = zig_ret_struct_f32();
2928 assert_or_panic(s.a == 2.5f);
2929 zig_struct_f32((struct Struct_f32){ .a = 2.5f });
2930 }
2931#endif
2932#endif
2933
2934#if !(defined(__arm__) && defined(__SOFTFP__))
2935#if !defined(ZIG_RISCV32)
2936#if !(defined(_WIN32) && defined(__i386__))
2937 {
2938 struct Struct_f64 s = zig_ret_struct_f64();
2939 assert_or_panic(s.a == 2.5);
2940 zig_struct_f64((struct Struct_f64){ .a = 2.5 });
2941 }
2942#endif
2943#endif
2944#endif
2945
2946#if !defined(__arm__)
2947#if !defined(__loongarch__)
2948#if !defined(__mips64__)
2949#if !defined(__powerpc__)
2950#if !defined(ZIG_RISCV32)
2951#if !defined(__s390x__)
2952#if !defined(__i386__)
2953 {
2954 struct Struct_f32a8 s = zig_ret_struct_f32a8();
2955 assert_or_panic(s.a == 1.25f);
2956 zig_struct_f32a8((struct Struct_f32a8){ .a = 2.75f }, 3.5f);
2957 }
2958#endif
2959#endif
2960#endif
2961#endif
2962#endif
2963#endif
2964#endif
2965
2966#if !defined(__arm__)
2967#if !defined(__loongarch__)
2968#if !defined(__mips64__)
2969#if !defined(__powerpc__)
2970#if !defined(__riscv)
2971#if !defined(__s390x__)
2972#if !defined(__i386__)
15377#if !(defined(__i386__) && defined(_WIN32))
15378#ifndef __loongarch__
15379#ifndef ZIG_MIPS64
15380#ifndef __powerpc__
15381#ifndef __s390x__
297315382 {
2974 struct Struct_f32a8_f32a8 s = zig_ret_struct_f32a8_f32a8();
2975 assert_or_panic(s.a == 1.25f);
2976 assert_or_panic(s.b == 2.75f);
2977 zig_struct_f32a8_f32a8((struct Struct_f32a8_f32a8){ .a = 3.125f, .b = 4.375f }, 5.5f);
15383 struct Struct_i32_i32 s = {1, 2};
15384 zig_struct_i32_i32(s);
297815385 }
297915386#endif
298015387#endif
298115388#endif
298215389#endif
298315390#endif
2984#endif
2985#endif
2986
2987#if !(defined(__arm__) && defined(__SOFTFP__))
2988#if !defined(__loongarch__) && !defined(__mips64__)
2989 {
2990 struct Struct_f32f32_f32 s = zig_ret_struct_f32f32_f32();
2991 assert_or_panic(s.a.b == 1.0f);
2992 assert_or_panic(s.a.c == 2.0f);
2993 assert_or_panic(s.d == 3.0f);
2994 zig_struct_f32f32_f32((struct Struct_f32f32_f32){ .a = { .b = 1.0f, .c = 2.0f }, .d = 3.0f });
2995 }
2996
2997 {
2998 struct Struct_f32_f32f32 s = zig_ret_struct_f32_f32f32();
2999 assert_or_panic(s.a == 1.0f);
3000 assert_or_panic(s.b.c == 2.0f);
3001 assert_or_panic(s.b.d == 3.0f);
3002 zig_struct_f32_f32f32((struct Struct_f32_f32f32){ .a = 1.0f, .b = { .c = 2.0f, .d = 3.0f } });
3003 }
3004#endif
3005#endif
3006
3007#if !defined(__powerpc__) && !defined(__loongarch__) && !defined(__mips64__)
3008#if !(defined(_WIN32) && defined(__i386__))
3009 {
3010 struct Struct_u32_Union_u32_u32u32 s = zig_ret_struct_u32_union_u32_u32u32();
3011 assert_or_panic(s.a == 1);
3012 assert_or_panic(s.b.c.d == 2);
3013 assert_or_panic(s.b.c.e == 3);
3014 zig_struct_u32_union_u32_u32u32(s);
3015 }
3016
3017 {
3018 struct Struct_i32_i32 s = {1, 2};
3019 zig_struct_i32_i32(s);
3020 }
3021#endif
3022#endif
302315391
3024#if !defined(__powerpc64__) && !defined(__loongarch__) && !defined(__mips64__)
15392#ifndef __hexagon__
15393#ifndef __loongarch__
15394#ifndef ZIG_MIPS64
15395#ifndef __powerpc__
15396#ifndef __s390x__
302515397 {
302615398 struct BigStruct s = {1, 2, 3, 4, 5};
302715399 zig_big_struct(s);
302815400 }
302915401#endif
303015402#endif
3031
3032#if !defined __i386__ && !defined __arm__ && \
3033 !defined __powerpc__ && !defined(__loongarch__) && \
3034 !defined(__mips64__) && !defined(__hexagon__) && !defined(__s390x__)
3035 {
3036 struct SmallStructInts s = {1, 2, 3, 4};
3037 zig_small_struct_ints(s);
3038 }
303915403#endif
3040
3041#if !defined __arm__ && \
3042 !defined __powerpc__ && !defined(__loongarch__) && \
3043 !defined(__mips64__) && !defined(__hexagon__) && !defined(__s390x__)
3044 {
3045 struct MedStructInts s = {1, 2, 3};
3046 zig_med_struct_ints(s);
3047 }
15404#endif
304815405#endif
304915406
305015407#ifndef ZIG_NO_I128
......@@ -3065,34 +15422,60 @@ void run_c_tests(void) {
306515422 zig_small_packed_struct(s);
306615423 }
306715424
3068#if !defined __i386__ && !defined __arm__ && \
3069 !defined ZIG_PPC32 && !defined _ARCH_PPC64 && !defined(__loongarch__) && \
3070 !defined(__mips64__) && !defined(__hexagon__) && !defined(__s390x__)
15425#ifndef __hexagon__
15426#ifndef __i386__
15427#ifndef __loongarch__
15428#ifndef ZIG_MIPS64
15429#ifndef __powerpc__
15430#ifndef __s390x__
307115431 {
307215432 struct SplitStructInts s = {1234, 100, 1337};
307315433 zig_split_struct_ints(s);
307415434 }
307515435#endif
15436#endif
15437#endif
15438#endif
15439#endif
15440#endif
307615441
3077#if !defined __arm__ && !defined ZIG_PPC32 && !defined _ARCH_PPC64 && !defined(__loongarch__) && \
3078 !defined(__mips64__) && !defined(__hexagon__) && !defined(__s390x__)
15442#ifndef __hexagon__
15443#ifndef __loongarch__
15444#ifndef ZIG_MIPS64
15445#ifndef __powerpc__
15446#ifndef __s390x__
307915447 {
308015448 struct MedStructMixed s = {1234, 100.0f, 1337.0f};
308115449 zig_med_struct_mixed(s);
308215450 }
308315451#endif
15452#endif
15453#endif
15454#endif
15455#endif
308415456
3085#if !defined __i386__ && !defined __arm__ && \
3086 !defined ZIG_PPC32 && !defined _ARCH_PPC64 && !defined(__loongarch__) && \
3087 !defined(__mips64__) && !defined(__hexagon__) && !defined(__s390x__)
15457#ifndef __hexagon__
15458#ifndef __i386__
15459#ifndef __loongarch__
15460#ifndef ZIG_MIPS64
15461#ifndef __powerpc__
15462#ifndef __s390x__
308815463 {
308915464 struct SplitStructMixed s = {1234, 100, 1337.0f};
309015465 zig_split_struct_mixed(s);
309115466 }
309215467#endif
15468#endif
15469#endif
15470#endif
15471#endif
15472#endif
309315473
3094#if !defined(__powerpc__) && !defined(__loongarch__) && !defined(__mips64__) && !defined(__hexagon__) && \
3095 !defined(__s390x__)
15474#ifndef __hexagon__
15475#ifndef __loongarch__
15476#ifndef ZIG_MIPS64
15477#ifndef __powerpc__
15478#ifndef __s390x__
309615479 {
309715480 struct BigStruct s = {30, 31, 32, 33, 34};
309815481 struct BigStruct res = zig_big_struct_both(s);
......@@ -3103,23 +15486,9 @@ void run_c_tests(void) {
310315486 assert_or_panic(res.e == 24);
310415487 }
310515488#endif
3106
3107#if !defined ZIG_PPC32 && !defined _ARCH_PPC64 && !defined(__loongarch__) && !defined(__mips64__) && \
3108 !defined(__hexagon__) && !defined(__s390x__)
3109 {
3110 struct Rect r1 = {1, 21, 16, 4};
3111 struct Rect r2 = {178, 189, 21, 15};
3112 zig_multiple_struct_ints(r1, r2);
3113 }
311415489#endif
3115
3116#if !defined ZIG_PPC32 && !defined(__loongarch__) && !defined(__mips64__) && !defined(__hexagon__) && \
3117 !defined(__s390x__)
3118 {
3119 struct FloatRect r1 = {1, 21, 16, 4};
3120 struct FloatRect r2 = {178, 189, 21, 15};
3121 zig_multiple_struct_floats(r1, r2);
3122 }
15490#endif
15491#endif
312315492#endif
312415493
312515494 {
......@@ -3135,2107 +15504,6 @@ void run_c_tests(void) {
313515504 assert_or_panic(zig_ret_i32() == -1);
313615505 assert_or_panic(zig_ret_i64() == -1);
313715506 }
3138
3139#if defined(ZIG_BACKEND_STAGE2_X86_64) || defined(ZIG_PPC32)
3140 {
3141 zig_vector_2_bool((Vector2Bool){
3142 false,
3143 true,
3144 });
3145
3146 Vector2Bool vec = zig_ret_vector_2_bool();
3147 assert_or_panic(vec[0] == false);
3148 assert_or_panic(vec[1] == false);
3149 }
3150 {
3151 zig_vector_4_bool((Vector4Bool){
3152 false,
3153 false,
3154 false,
3155 false,
3156 });
3157
3158 Vector4Bool vec = zig_ret_vector_4_bool();
3159 assert_or_panic(vec[0] == false);
3160 assert_or_panic(vec[1] == true);
3161 assert_or_panic(vec[2] == true);
3162 assert_or_panic(vec[3] == true);
3163 }
3164 {
3165 zig_vector_8_bool((Vector8Bool){
3166 true,
3167 true,
3168 false,
3169 true,
3170 false,
3171 true,
3172 true,
3173 false,
3174 });
3175
3176 Vector8Bool vec = zig_ret_vector_8_bool();
3177 assert_or_panic(vec[0] == false);
3178 assert_or_panic(vec[1] == false);
3179 assert_or_panic(vec[2] == false);
3180 assert_or_panic(vec[3] == false);
3181 assert_or_panic(vec[4] == true);
3182 assert_or_panic(vec[5] == false);
3183 assert_or_panic(vec[6] == false);
3184 assert_or_panic(vec[7] == false);
3185 }
3186 {
3187 zig_vector_16_bool((Vector16Bool){
3188 true,
3189 false,
3190 true,
3191 true,
3192 true,
3193 false,
3194 false,
3195 false,
3196 true,
3197 true,
3198 true,
3199 true,
3200 false,
3201 false,
3202 false,
3203 true,
3204 });
3205
3206 Vector16Bool vec = zig_ret_vector_16_bool();
3207 assert_or_panic(vec[0] == false);
3208 assert_or_panic(vec[1] == true);
3209 assert_or_panic(vec[2] == false);
3210 assert_or_panic(vec[3] == false);
3211 assert_or_panic(vec[4] == false);
3212 assert_or_panic(vec[5] == true);
3213 assert_or_panic(vec[6] == false);
3214 assert_or_panic(vec[7] == false);
3215 assert_or_panic(vec[8] == true);
3216 assert_or_panic(vec[9] == false);
3217 assert_or_panic(vec[10] == false);
3218 assert_or_panic(vec[11] == false);
3219 assert_or_panic(vec[12] == false);
3220 assert_or_panic(vec[13] == true);
3221 assert_or_panic(vec[14] == false);
3222 assert_or_panic(vec[15] == false);
3223 }
3224 {
3225 zig_vector_32_bool((Vector32Bool){
3226 false,
3227 false,
3228 false,
3229 true,
3230 true,
3231 false,
3232 false,
3233 true,
3234 false,
3235 true,
3236 true,
3237 true,
3238 false,
3239 false,
3240 true,
3241 true,
3242 true,
3243 true,
3244 true,
3245 false,
3246 true,
3247 true,
3248 true,
3249 false,
3250 false,
3251 true,
3252 true,
3253 false,
3254 true,
3255 true,
3256 false,
3257 true,
3258 });
3259
3260 Vector32Bool vec = zig_ret_vector_32_bool();
3261 assert_or_panic(vec[0] == false);
3262 assert_or_panic(vec[1] == true);
3263 assert_or_panic(vec[2] == false);
3264 assert_or_panic(vec[3] == false);
3265 assert_or_panic(vec[4] == true);
3266 assert_or_panic(vec[5] == false);
3267 assert_or_panic(vec[6] == true);
3268 assert_or_panic(vec[7] == true);
3269 assert_or_panic(vec[8] == true);
3270 assert_or_panic(vec[9] == true);
3271 assert_or_panic(vec[10] == true);
3272 assert_or_panic(vec[11] == true);
3273 assert_or_panic(vec[12] == false);
3274 assert_or_panic(vec[13] == false);
3275 assert_or_panic(vec[14] == false);
3276 assert_or_panic(vec[15] == false);
3277 assert_or_panic(vec[16] == false);
3278 assert_or_panic(vec[17] == false);
3279 assert_or_panic(vec[18] == true);
3280 assert_or_panic(vec[19] == true);
3281 assert_or_panic(vec[20] == true);
3282 assert_or_panic(vec[21] == false);
3283 assert_or_panic(vec[22] == true);
3284 assert_or_panic(vec[23] == false);
3285 assert_or_panic(vec[24] == true);
3286 assert_or_panic(vec[25] == false);
3287 assert_or_panic(vec[26] == false);
3288 assert_or_panic(vec[27] == true);
3289 assert_or_panic(vec[28] == false);
3290 assert_or_panic(vec[29] == false);
3291 assert_or_panic(vec[30] == true);
3292 assert_or_panic(vec[31] == true);
3293 }
3294 {
3295 zig_vector_64_bool((Vector64Bool){
3296 true,
3297 true,
3298 false,
3299 true,
3300 false,
3301 true,
3302 false,
3303 false,
3304 true,
3305 true,
3306 true,
3307 true,
3308 true,
3309 true,
3310 true,
3311 false,
3312 false,
3313 true,
3314 true,
3315 false,
3316 true,
3317 true,
3318 true,
3319 true,
3320 false,
3321 false,
3322 true,
3323 false,
3324 false,
3325 true,
3326 false,
3327 true,
3328 false,
3329 true,
3330 true,
3331 false,
3332 true,
3333 true,
3334 false,
3335 false,
3336 true,
3337 true,
3338 true,
3339 true,
3340 true,
3341 false,
3342 true,
3343 false,
3344 false,
3345 false,
3346 false,
3347 false,
3348 true,
3349 false,
3350 false,
3351 true,
3352 true,
3353 false,
3354 false,
3355 false,
3356 true,
3357 true,
3358 true,
3359 true,
3360 });
3361
3362 Vector64Bool vec = zig_ret_vector_64_bool();
3363 assert_or_panic(vec[0] == true);
3364 assert_or_panic(vec[1] == false);
3365 assert_or_panic(vec[2] == true);
3366 assert_or_panic(vec[3] == false);
3367 assert_or_panic(vec[4] == false);
3368 assert_or_panic(vec[5] == true);
3369 assert_or_panic(vec[6] == false);
3370 assert_or_panic(vec[7] == true);
3371 assert_or_panic(vec[8] == true);
3372 assert_or_panic(vec[9] == false);
3373 assert_or_panic(vec[10] == true);
3374 assert_or_panic(vec[11] == false);
3375 assert_or_panic(vec[12] == true);
3376 assert_or_panic(vec[13] == false);
3377 assert_or_panic(vec[14] == false);
3378 assert_or_panic(vec[15] == true);
3379 assert_or_panic(vec[16] == false);
3380 assert_or_panic(vec[17] == false);
3381 assert_or_panic(vec[18] == true);
3382 assert_or_panic(vec[19] == true);
3383 assert_or_panic(vec[20] == false);
3384 assert_or_panic(vec[21] == false);
3385 assert_or_panic(vec[22] == true);
3386 assert_or_panic(vec[23] == false);
3387 assert_or_panic(vec[24] == false);
3388 assert_or_panic(vec[25] == true);
3389 assert_or_panic(vec[26] == true);
3390 assert_or_panic(vec[27] == true);
3391 assert_or_panic(vec[28] == true);
3392 assert_or_panic(vec[29] == true);
3393 assert_or_panic(vec[30] == false);
3394 assert_or_panic(vec[31] == false);
3395 assert_or_panic(vec[32] == true);
3396 assert_or_panic(vec[33] == true);
3397 assert_or_panic(vec[34] == true);
3398 assert_or_panic(vec[35] == true);
3399 assert_or_panic(vec[36] == false);
3400 assert_or_panic(vec[37] == true);
3401 assert_or_panic(vec[38] == false);
3402 assert_or_panic(vec[39] == true);
3403 assert_or_panic(vec[40] == true);
3404 assert_or_panic(vec[41] == true);
3405 assert_or_panic(vec[42] == true);
3406 assert_or_panic(vec[43] == true);
3407 assert_or_panic(vec[44] == false);
3408 assert_or_panic(vec[45] == false);
3409 assert_or_panic(vec[46] == false);
3410 assert_or_panic(vec[47] == true);
3411 assert_or_panic(vec[48] == true);
3412 assert_or_panic(vec[49] == true);
3413 assert_or_panic(vec[50] == false);
3414 assert_or_panic(vec[51] == true);
3415 assert_or_panic(vec[52] == true);
3416 assert_or_panic(vec[53] == true);
3417 assert_or_panic(vec[54] == false);
3418 assert_or_panic(vec[55] == false);
3419 assert_or_panic(vec[56] == false);
3420 assert_or_panic(vec[57] == true);
3421 assert_or_panic(vec[58] == false);
3422 assert_or_panic(vec[59] == false);
3423 assert_or_panic(vec[60] == true);
3424 assert_or_panic(vec[61] == false);
3425 assert_or_panic(vec[62] == true);
3426 assert_or_panic(vec[63] == false);
3427 }
3428 {
3429 zig_vector_128_bool((Vector128Bool){
3430 true,
3431 true,
3432 false,
3433 true,
3434 true,
3435 false,
3436 false,
3437 true,
3438 true,
3439 true,
3440 true,
3441 true,
3442 false,
3443 false,
3444 false,
3445 true,
3446 false,
3447 true,
3448 false,
3449 false,
3450 true,
3451 false,
3452 true,
3453 false,
3454 false,
3455 false,
3456 true,
3457 false,
3458 true,
3459 true,
3460 false,
3461 true,
3462 false,
3463 true,
3464 true,
3465 false,
3466 false,
3467 false,
3468 false,
3469 true,
3470 true,
3471 false,
3472 true,
3473 false,
3474 false,
3475 true,
3476 false,
3477 false,
3478 true,
3479 true,
3480 false,
3481 false,
3482 true,
3483 false,
3484 false,
3485 true,
3486 true,
3487 true,
3488 true,
3489 true,
3490 true,
3491 true,
3492 true,
3493 false,
3494 false,
3495 true,
3496 false,
3497 true,
3498 true,
3499 true,
3500 true,
3501 false,
3502 false,
3503 false,
3504 true,
3505 true,
3506 false,
3507 true,
3508 true,
3509 true,
3510 true,
3511 false,
3512 true,
3513 true,
3514 true,
3515 true,
3516 true,
3517 true,
3518 false,
3519 true,
3520 true,
3521 true,
3522 true,
3523 true,
3524 true,
3525 false,
3526 false,
3527 false,
3528 true,
3529 true,
3530 true,
3531 true,
3532 true,
3533 true,
3534 true,
3535 false,
3536 false,
3537 false,
3538 false,
3539 false,
3540 true,
3541 true,
3542 true,
3543 false,
3544 false,
3545 false,
3546 false,
3547 false,
3548 true,
3549 false,
3550 false,
3551 false,
3552 false,
3553 true,
3554 true,
3555 false,
3556 true,
3557 false,
3558 });
3559
3560 Vector128Bool vec = zig_ret_vector_128_bool();
3561 assert_or_panic(vec[0] == true);
3562 assert_or_panic(vec[1] == true);
3563 assert_or_panic(vec[2] == false);
3564 assert_or_panic(vec[3] == false);
3565 assert_or_panic(vec[4] == false);
3566 assert_or_panic(vec[5] == true);
3567 assert_or_panic(vec[6] == true);
3568 assert_or_panic(vec[7] == false);
3569 assert_or_panic(vec[8] == false);
3570 assert_or_panic(vec[9] == true);
3571 assert_or_panic(vec[10] == false);
3572 assert_or_panic(vec[11] == false);
3573 assert_or_panic(vec[12] == false);
3574 assert_or_panic(vec[13] == true);
3575 assert_or_panic(vec[14] == false);
3576 assert_or_panic(vec[15] == true);
3577 assert_or_panic(vec[16] == true);
3578 assert_or_panic(vec[17] == false);
3579 assert_or_panic(vec[18] == false);
3580 assert_or_panic(vec[19] == true);
3581 assert_or_panic(vec[20] == true);
3582 assert_or_panic(vec[21] == true);
3583 assert_or_panic(vec[22] == true);
3584 assert_or_panic(vec[23] == true);
3585 assert_or_panic(vec[24] == false);
3586 assert_or_panic(vec[25] == false);
3587 assert_or_panic(vec[26] == true);
3588 assert_or_panic(vec[27] == true);
3589 assert_or_panic(vec[28] == true);
3590 assert_or_panic(vec[29] == false);
3591 assert_or_panic(vec[30] == false);
3592 assert_or_panic(vec[31] == true);
3593 assert_or_panic(vec[32] == true);
3594 assert_or_panic(vec[33] == false);
3595 assert_or_panic(vec[34] == true);
3596 assert_or_panic(vec[35] == true);
3597 assert_or_panic(vec[36] == true);
3598 assert_or_panic(vec[37] == false);
3599 assert_or_panic(vec[38] == true);
3600 assert_or_panic(vec[39] == true);
3601 assert_or_panic(vec[40] == true);
3602 assert_or_panic(vec[41] == false);
3603 assert_or_panic(vec[42] == true);
3604 assert_or_panic(vec[43] == true);
3605 assert_or_panic(vec[44] == false);
3606 assert_or_panic(vec[45] == false);
3607 assert_or_panic(vec[46] == false);
3608 assert_or_panic(vec[47] == true);
3609 assert_or_panic(vec[48] == false);
3610 assert_or_panic(vec[49] == false);
3611 assert_or_panic(vec[50] == false);
3612 assert_or_panic(vec[51] == false);
3613 assert_or_panic(vec[52] == true);
3614 assert_or_panic(vec[53] == false);
3615 assert_or_panic(vec[54] == true);
3616 assert_or_panic(vec[55] == false);
3617 assert_or_panic(vec[56] == true);
3618 assert_or_panic(vec[57] == false);
3619 assert_or_panic(vec[58] == false);
3620 assert_or_panic(vec[59] == true);
3621 assert_or_panic(vec[60] == true);
3622 assert_or_panic(vec[61] == true);
3623 assert_or_panic(vec[62] == true);
3624 assert_or_panic(vec[63] == true);
3625 assert_or_panic(vec[64] == false);
3626 assert_or_panic(vec[65] == false);
3627 assert_or_panic(vec[66] == false);
3628 assert_or_panic(vec[67] == true);
3629 assert_or_panic(vec[68] == true);
3630 assert_or_panic(vec[69] == false);
3631 assert_or_panic(vec[70] == true);
3632 assert_or_panic(vec[71] == true);
3633 assert_or_panic(vec[72] == false);
3634 assert_or_panic(vec[73] == true);
3635 assert_or_panic(vec[74] == true);
3636 assert_or_panic(vec[75] == false);
3637 assert_or_panic(vec[76] == false);
3638 assert_or_panic(vec[77] == true);
3639 assert_or_panic(vec[78] == false);
3640 assert_or_panic(vec[79] == true);
3641 assert_or_panic(vec[80] == false);
3642 assert_or_panic(vec[81] == false);
3643 assert_or_panic(vec[82] == true);
3644 assert_or_panic(vec[83] == true);
3645 assert_or_panic(vec[84] == false);
3646 assert_or_panic(vec[85] == true);
3647 assert_or_panic(vec[86] == false);
3648 assert_or_panic(vec[87] == false);
3649 assert_or_panic(vec[88] == true);
3650 assert_or_panic(vec[89] == true);
3651 assert_or_panic(vec[90] == true);
3652 assert_or_panic(vec[91] == true);
3653 assert_or_panic(vec[92] == true);
3654 assert_or_panic(vec[93] == false);
3655 assert_or_panic(vec[94] == false);
3656 assert_or_panic(vec[95] == true);
3657 assert_or_panic(vec[96] == false);
3658 assert_or_panic(vec[97] == false);
3659 assert_or_panic(vec[98] == true);
3660 assert_or_panic(vec[99] == true);
3661 assert_or_panic(vec[100] == true);
3662 assert_or_panic(vec[101] == true);
3663 assert_or_panic(vec[102] == true);
3664 assert_or_panic(vec[103] == true);
3665 assert_or_panic(vec[104] == true);
3666 assert_or_panic(vec[105] == false);
3667 assert_or_panic(vec[106] == false);
3668 assert_or_panic(vec[107] == true);
3669 assert_or_panic(vec[108] == false);
3670 assert_or_panic(vec[109] == false);
3671 assert_or_panic(vec[110] == true);
3672 assert_or_panic(vec[111] == false);
3673 assert_or_panic(vec[112] == false);
3674 assert_or_panic(vec[113] == true);
3675 assert_or_panic(vec[114] == false);
3676 assert_or_panic(vec[115] == false);
3677 assert_or_panic(vec[116] == false);
3678 assert_or_panic(vec[117] == false);
3679 assert_or_panic(vec[118] == false);
3680 assert_or_panic(vec[119] == false);
3681 assert_or_panic(vec[120] == true);
3682 assert_or_panic(vec[121] == true);
3683 assert_or_panic(vec[122] == true);
3684 assert_or_panic(vec[123] == false);
3685 assert_or_panic(vec[124] == true);
3686 assert_or_panic(vec[125] == false);
3687 assert_or_panic(vec[126] == false);
3688 assert_or_panic(vec[127] == true);
3689 }
3690 {
3691 zig_vector_256_bool((Vector256Bool){
3692 false,
3693 false,
3694 false,
3695 false,
3696 true,
3697 true,
3698 false,
3699 false,
3700 false,
3701 true,
3702 true,
3703 false,
3704 true,
3705 false,
3706 false,
3707 false,
3708 false,
3709 true,
3710 true,
3711 true,
3712 false,
3713 true,
3714 true,
3715 false,
3716 true,
3717 false,
3718 false,
3719 true,
3720 true,
3721 true,
3722 false,
3723 true,
3724 false,
3725 true,
3726 false,
3727 false,
3728 false,
3729 true,
3730 false,
3731 false,
3732 true,
3733 true,
3734 false,
3735 true,
3736 true,
3737 false,
3738 true,
3739 false,
3740 true,
3741 false,
3742 true,
3743 false,
3744 true,
3745 true,
3746 true,
3747 false,
3748 false,
3749 true,
3750 true,
3751 false,
3752 false,
3753 true,
3754 true,
3755 false,
3756 false,
3757 false,
3758 true,
3759 true,
3760 false,
3761 true,
3762 false,
3763 true,
3764 false,
3765 true,
3766 false,
3767 false,
3768 true,
3769 false,
3770 false,
3771 false,
3772 false,
3773 false,
3774 true,
3775 false,
3776 false,
3777 false,
3778 true,
3779 true,
3780 true,
3781 false,
3782 true,
3783 false,
3784 true,
3785 false,
3786 true,
3787 true,
3788 true,
3789 true,
3790 false,
3791 true,
3792 false,
3793 true,
3794 true,
3795 false,
3796 false,
3797 true,
3798 false,
3799 true,
3800 false,
3801 false,
3802 false,
3803 false,
3804 false,
3805 false,
3806 false,
3807 false,
3808 false,
3809 false,
3810 false,
3811 false,
3812 false,
3813 false,
3814 true,
3815 true,
3816 false,
3817 false,
3818 false,
3819 true,
3820 true,
3821 true,
3822 true,
3823 false,
3824 false,
3825 false,
3826 true,
3827 true,
3828 false,
3829 false,
3830 true,
3831 true,
3832 true,
3833 true,
3834 true,
3835 false,
3836 true,
3837 true,
3838 true,
3839 false,
3840 false,
3841 false,
3842 false,
3843 false,
3844 false,
3845 false,
3846 true,
3847 false,
3848 false,
3849 false,
3850 true,
3851 true,
3852 false,
3853 true,
3854 false,
3855 false,
3856 false,
3857 true,
3858 false,
3859 true,
3860 false,
3861 false,
3862 false,
3863 false,
3864 true,
3865 true,
3866 true,
3867 true,
3868 true,
3869 true,
3870 false,
3871 true,
3872 true,
3873 false,
3874 true,
3875 false,
3876 true,
3877 false,
3878 true,
3879 false,
3880 true,
3881 false,
3882 false,
3883 false,
3884 false,
3885 true,
3886 true,
3887 true,
3888 false,
3889 false,
3890 true,
3891 false,
3892 false,
3893 true,
3894 true,
3895 false,
3896 true,
3897 false,
3898 true,
3899 false,
3900 false,
3901 false,
3902 true,
3903 true,
3904 false,
3905 false,
3906 false,
3907 true,
3908 false,
3909 true,
3910 true,
3911 true,
3912 false,
3913 true,
3914 false,
3915 true,
3916 false,
3917 false,
3918 false,
3919 true,
3920 true,
3921 false,
3922 false,
3923 false,
3924 false,
3925 false,
3926 true,
3927 false,
3928 false,
3929 false,
3930 true,
3931 false,
3932 true,
3933 true,
3934 true,
3935 false,
3936 false,
3937 true,
3938 false,
3939 false,
3940 false,
3941 true,
3942 false,
3943 false,
3944 true,
3945 true,
3946 true,
3947 true,
3948 });
3949
3950 Vector256Bool vec = zig_ret_vector_256_bool();
3951 assert_or_panic(vec[0] == true);
3952 assert_or_panic(vec[1] == true);
3953 assert_or_panic(vec[2] == true);
3954 assert_or_panic(vec[3] == false);
3955 assert_or_panic(vec[4] == true);
3956 assert_or_panic(vec[5] == false);
3957 assert_or_panic(vec[6] == false);
3958 assert_or_panic(vec[7] == true);
3959 assert_or_panic(vec[8] == false);
3960 assert_or_panic(vec[9] == false);
3961 assert_or_panic(vec[10] == false);
3962 assert_or_panic(vec[11] == false);
3963 assert_or_panic(vec[12] == false);
3964 assert_or_panic(vec[13] == false);
3965 assert_or_panic(vec[14] == false);
3966 assert_or_panic(vec[15] == false);
3967 assert_or_panic(vec[16] == true);
3968 assert_or_panic(vec[17] == false);
3969 assert_or_panic(vec[18] == true);
3970 assert_or_panic(vec[19] == false);
3971 assert_or_panic(vec[20] == false);
3972 assert_or_panic(vec[21] == true);
3973 assert_or_panic(vec[22] == true);
3974 assert_or_panic(vec[23] == false);
3975 assert_or_panic(vec[24] == false);
3976 assert_or_panic(vec[25] == true);
3977 assert_or_panic(vec[26] == true);
3978 assert_or_panic(vec[27] == false);
3979 assert_or_panic(vec[28] == true);
3980 assert_or_panic(vec[29] == true);
3981 assert_or_panic(vec[30] == true);
3982 assert_or_panic(vec[31] == false);
3983 assert_or_panic(vec[32] == true);
3984 assert_or_panic(vec[33] == false);
3985 assert_or_panic(vec[34] == true);
3986 assert_or_panic(vec[35] == false);
3987 assert_or_panic(vec[36] == true);
3988 assert_or_panic(vec[37] == false);
3989 assert_or_panic(vec[38] == true);
3990 assert_or_panic(vec[39] == false);
3991 assert_or_panic(vec[40] == false);
3992 assert_or_panic(vec[41] == false);
3993 assert_or_panic(vec[42] == true);
3994 assert_or_panic(vec[43] == true);
3995 assert_or_panic(vec[44] == true);
3996 assert_or_panic(vec[45] == false);
3997 assert_or_panic(vec[46] == false);
3998 assert_or_panic(vec[47] == false);
3999 assert_or_panic(vec[48] == true);
4000 assert_or_panic(vec[49] == false);
4001 assert_or_panic(vec[50] == true);
4002 assert_or_panic(vec[51] == false);
4003 assert_or_panic(vec[52] == true);
4004 assert_or_panic(vec[53] == false);
4005 assert_or_panic(vec[54] == true);
4006 assert_or_panic(vec[55] == true);
4007 assert_or_panic(vec[56] == false);
4008 assert_or_panic(vec[57] == false);
4009 assert_or_panic(vec[58] == false);
4010 assert_or_panic(vec[59] == true);
4011 assert_or_panic(vec[60] == true);
4012 assert_or_panic(vec[61] == true);
4013 assert_or_panic(vec[62] == false);
4014 assert_or_panic(vec[63] == true);
4015 assert_or_panic(vec[64] == false);
4016 assert_or_panic(vec[65] == true);
4017 assert_or_panic(vec[66] == false);
4018 assert_or_panic(vec[67] == true);
4019 assert_or_panic(vec[68] == true);
4020 assert_or_panic(vec[69] == false);
4021 assert_or_panic(vec[70] == true);
4022 assert_or_panic(vec[71] == false);
4023 assert_or_panic(vec[72] == true);
4024 assert_or_panic(vec[73] == true);
4025 assert_or_panic(vec[74] == false);
4026 assert_or_panic(vec[75] == false);
4027 assert_or_panic(vec[76] == false);
4028 assert_or_panic(vec[77] == false);
4029 assert_or_panic(vec[78] == false);
4030 assert_or_panic(vec[79] == false);
4031 assert_or_panic(vec[80] == false);
4032 assert_or_panic(vec[81] == false);
4033 assert_or_panic(vec[82] == false);
4034 assert_or_panic(vec[83] == true);
4035 assert_or_panic(vec[84] == false);
4036 assert_or_panic(vec[85] == false);
4037 assert_or_panic(vec[86] == false);
4038 assert_or_panic(vec[87] == true);
4039 assert_or_panic(vec[88] == false);
4040 assert_or_panic(vec[89] == true);
4041 assert_or_panic(vec[90] == true);
4042 assert_or_panic(vec[91] == false);
4043 assert_or_panic(vec[92] == false);
4044 assert_or_panic(vec[93] == true);
4045 assert_or_panic(vec[94] == true);
4046 assert_or_panic(vec[95] == false);
4047 assert_or_panic(vec[96] == false);
4048 assert_or_panic(vec[97] == true);
4049 assert_or_panic(vec[98] == false);
4050 assert_or_panic(vec[99] == false);
4051 assert_or_panic(vec[100] == false);
4052 assert_or_panic(vec[101] == false);
4053 assert_or_panic(vec[102] == false);
4054 assert_or_panic(vec[103] == false);
4055 assert_or_panic(vec[104] == false);
4056 assert_or_panic(vec[105] == true);
4057 assert_or_panic(vec[106] == true);
4058 assert_or_panic(vec[107] == false);
4059 assert_or_panic(vec[108] == true);
4060 assert_or_panic(vec[109] == false);
4061 assert_or_panic(vec[110] == true);
4062 assert_or_panic(vec[111] == true);
4063 assert_or_panic(vec[112] == false);
4064 assert_or_panic(vec[113] == false);
4065 assert_or_panic(vec[114] == false);
4066 assert_or_panic(vec[115] == false);
4067 assert_or_panic(vec[116] == false);
4068 assert_or_panic(vec[117] == false);
4069 assert_or_panic(vec[118] == false);
4070 assert_or_panic(vec[119] == true);
4071 assert_or_panic(vec[120] == true);
4072 assert_or_panic(vec[121] == true);
4073 assert_or_panic(vec[122] == false);
4074 assert_or_panic(vec[123] == true);
4075 assert_or_panic(vec[124] == true);
4076 assert_or_panic(vec[125] == false);
4077 assert_or_panic(vec[126] == false);
4078 assert_or_panic(vec[127] == true);
4079 assert_or_panic(vec[128] == true);
4080 assert_or_panic(vec[129] == true);
4081 assert_or_panic(vec[130] == true);
4082 assert_or_panic(vec[131] == true);
4083 assert_or_panic(vec[132] == false);
4084 assert_or_panic(vec[133] == true);
4085 assert_or_panic(vec[134] == true);
4086 assert_or_panic(vec[135] == false);
4087 assert_or_panic(vec[136] == false);
4088 assert_or_panic(vec[137] == true);
4089 assert_or_panic(vec[138] == true);
4090 assert_or_panic(vec[139] == false);
4091 assert_or_panic(vec[140] == true);
4092 assert_or_panic(vec[141] == false);
4093 assert_or_panic(vec[142] == true);
4094 assert_or_panic(vec[143] == false);
4095 assert_or_panic(vec[144] == true);
4096 assert_or_panic(vec[145] == true);
4097 assert_or_panic(vec[146] == true);
4098 assert_or_panic(vec[147] == true);
4099 assert_or_panic(vec[148] == false);
4100 assert_or_panic(vec[149] == false);
4101 assert_or_panic(vec[150] == false);
4102 assert_or_panic(vec[151] == true);
4103 assert_or_panic(vec[152] == false);
4104 assert_or_panic(vec[153] == true);
4105 assert_or_panic(vec[154] == false);
4106 assert_or_panic(vec[155] == true);
4107 assert_or_panic(vec[156] == true);
4108 assert_or_panic(vec[157] == false);
4109 assert_or_panic(vec[158] == true);
4110 assert_or_panic(vec[159] == true);
4111 assert_or_panic(vec[160] == true);
4112 assert_or_panic(vec[161] == true);
4113 assert_or_panic(vec[162] == true);
4114 assert_or_panic(vec[163] == false);
4115 assert_or_panic(vec[164] == false);
4116 assert_or_panic(vec[165] == true);
4117 assert_or_panic(vec[166] == false);
4118 assert_or_panic(vec[167] == true);
4119 assert_or_panic(vec[168] == true);
4120 assert_or_panic(vec[169] == true);
4121 assert_or_panic(vec[170] == true);
4122 assert_or_panic(vec[171] == false);
4123 assert_or_panic(vec[172] == true);
4124 assert_or_panic(vec[173] == true);
4125 assert_or_panic(vec[174] == true);
4126 assert_or_panic(vec[175] == true);
4127 assert_or_panic(vec[176] == true);
4128 assert_or_panic(vec[177] == true);
4129 assert_or_panic(vec[178] == true);
4130 assert_or_panic(vec[179] == false);
4131 assert_or_panic(vec[180] == true);
4132 assert_or_panic(vec[181] == false);
4133 assert_or_panic(vec[182] == false);
4134 assert_or_panic(vec[183] == false);
4135 assert_or_panic(vec[184] == true);
4136 assert_or_panic(vec[185] == false);
4137 assert_or_panic(vec[186] == true);
4138 assert_or_panic(vec[187] == true);
4139 assert_or_panic(vec[188] == false);
4140 assert_or_panic(vec[189] == true);
4141 assert_or_panic(vec[190] == false);
4142 assert_or_panic(vec[191] == true);
4143 assert_or_panic(vec[192] == false);
4144 assert_or_panic(vec[193] == true);
4145 assert_or_panic(vec[194] == false);
4146 assert_or_panic(vec[195] == false);
4147 assert_or_panic(vec[196] == true);
4148 assert_or_panic(vec[197] == true);
4149 assert_or_panic(vec[198] == true);
4150 assert_or_panic(vec[199] == true);
4151 assert_or_panic(vec[200] == true);
4152 assert_or_panic(vec[201] == true);
4153 assert_or_panic(vec[202] == true);
4154 assert_or_panic(vec[203] == false);
4155 assert_or_panic(vec[204] == true);
4156 assert_or_panic(vec[205] == false);
4157 assert_or_panic(vec[206] == false);
4158 assert_or_panic(vec[207] == true);
4159 assert_or_panic(vec[208] == true);
4160 assert_or_panic(vec[209] == false);
4161 assert_or_panic(vec[210] == false);
4162 assert_or_panic(vec[211] == false);
4163 assert_or_panic(vec[212] == true);
4164 assert_or_panic(vec[213] == true);
4165 assert_or_panic(vec[214] == true);
4166 assert_or_panic(vec[215] == false);
4167 assert_or_panic(vec[216] == false);
4168 assert_or_panic(vec[217] == true);
4169 assert_or_panic(vec[218] == true);
4170 assert_or_panic(vec[219] == true);
4171 assert_or_panic(vec[220] == true);
4172 assert_or_panic(vec[221] == false);
4173 assert_or_panic(vec[222] == true);
4174 assert_or_panic(vec[223] == false);
4175 assert_or_panic(vec[224] == true);
4176 assert_or_panic(vec[225] == true);
4177 assert_or_panic(vec[226] == true);
4178 assert_or_panic(vec[227] == false);
4179 assert_or_panic(vec[228] == false);
4180 assert_or_panic(vec[229] == false);
4181 assert_or_panic(vec[230] == false);
4182 assert_or_panic(vec[231] == false);
4183 assert_or_panic(vec[232] == true);
4184 assert_or_panic(vec[233] == true);
4185 assert_or_panic(vec[234] == false);
4186 assert_or_panic(vec[235] == false);
4187 assert_or_panic(vec[236] == false);
4188 assert_or_panic(vec[237] == true);
4189 assert_or_panic(vec[238] == true);
4190 assert_or_panic(vec[239] == false);
4191 assert_or_panic(vec[240] == true);
4192 assert_or_panic(vec[241] == true);
4193 assert_or_panic(vec[242] == true);
4194 assert_or_panic(vec[243] == false);
4195 assert_or_panic(vec[244] == true);
4196 assert_or_panic(vec[245] == true);
4197 assert_or_panic(vec[246] == false);
4198 assert_or_panic(vec[247] == true);
4199 assert_or_panic(vec[248] == false);
4200 assert_or_panic(vec[249] == false);
4201 assert_or_panic(vec[250] == true);
4202 assert_or_panic(vec[251] == true);
4203 assert_or_panic(vec[252] == false);
4204 assert_or_panic(vec[253] == true);
4205 assert_or_panic(vec[254] == false);
4206 assert_or_panic(vec[255] == true);
4207 }
4208 {
4209 zig_vector_512_bool((Vector512Bool){
4210 false,
4211 true,
4212 true,
4213 false,
4214 true,
4215 false,
4216 true,
4217 false,
4218 false,
4219 false,
4220 false,
4221 false,
4222 true,
4223 false,
4224 true,
4225 false,
4226 false,
4227 false,
4228 true,
4229 true,
4230 true,
4231 true,
4232 false,
4233 false,
4234 false,
4235 true,
4236 true,
4237 false,
4238 true,
4239 true,
4240 false,
4241 false,
4242 true,
4243 true,
4244 false,
4245 false,
4246 false,
4247 false,
4248 false,
4249 false,
4250 false,
4251 true,
4252 true,
4253 true,
4254 false,
4255 true,
4256 true,
4257 true,
4258 true,
4259 true,
4260 false,
4261 true,
4262 true,
4263 true,
4264 false,
4265 true,
4266 false,
4267 false,
4268 true,
4269 false,
4270 true,
4271 true,
4272 false,
4273 false,
4274 false,
4275 true,
4276 true,
4277 true,
4278 true,
4279 false,
4280 false,
4281 true,
4282 true,
4283 false,
4284 true,
4285 true,
4286 false,
4287 false,
4288 true,
4289 false,
4290 false,
4291 false,
4292 true,
4293 true,
4294 true,
4295 false,
4296 false,
4297 true,
4298 false,
4299 true,
4300 false,
4301 false,
4302 true,
4303 false,
4304 false,
4305 true,
4306 true,
4307 false,
4308 false,
4309 false,
4310 false,
4311 true,
4312 false,
4313 false,
4314 false,
4315 false,
4316 false,
4317 false,
4318 true,
4319 true,
4320 true,
4321 true,
4322 true,
4323 false,
4324 false,
4325 false,
4326 false,
4327 true,
4328 true,
4329 false,
4330 true,
4331 true,
4332 false,
4333 false,
4334 true,
4335 false,
4336 false,
4337 false,
4338 false,
4339 true,
4340 true,
4341 true,
4342 true,
4343 false,
4344 false,
4345 false,
4346 false,
4347 true,
4348 false,
4349 false,
4350 false,
4351 false,
4352 true,
4353 true,
4354 false,
4355 true,
4356 false,
4357 true,
4358 false,
4359 false,
4360 true,
4361 true,
4362 false,
4363 true,
4364 true,
4365 false,
4366 false,
4367 false,
4368 true,
4369 false,
4370 false,
4371 false,
4372 false,
4373 true,
4374 true,
4375 false,
4376 false,
4377 true,
4378 false,
4379 true,
4380 true,
4381 false,
4382 false,
4383 false,
4384 false,
4385 false,
4386 false,
4387 true,
4388 false,
4389 false,
4390 false,
4391 false,
4392 false,
4393 false,
4394 true,
4395 false,
4396 false,
4397 false,
4398 false,
4399 true,
4400 false,
4401 false,
4402 false,
4403 false,
4404 false,
4405 false,
4406 true,
4407 true,
4408 true,
4409 false,
4410 true,
4411 true,
4412 false,
4413 false,
4414 false,
4415 false,
4416 false,
4417 true,
4418 true,
4419 false,
4420 false,
4421 false,
4422 true,
4423 false,
4424 false,
4425 true,
4426 true,
4427 true,
4428 false,
4429 false,
4430 true,
4431 false,
4432 true,
4433 true,
4434 true,
4435 true,
4436 false,
4437 true,
4438 false,
4439 false,
4440 false,
4441 true,
4442 false,
4443 false,
4444 false,
4445 false,
4446 false,
4447 false,
4448 false,
4449 true,
4450 false,
4451 false,
4452 false,
4453 true,
4454 true,
4455 true,
4456 true,
4457 false,
4458 true,
4459 true,
4460 false,
4461 false,
4462 false,
4463 true,
4464 false,
4465 false,
4466 true,
4467 true,
4468 false,
4469 true,
4470 false,
4471 true,
4472 true,
4473 false,
4474 false,
4475 false,
4476 false,
4477 true,
4478 false,
4479 true,
4480 true,
4481 false,
4482 false,
4483 true,
4484 true,
4485 true,
4486 false,
4487 true,
4488 false,
4489 false,
4490 true,
4491 true,
4492 false,
4493 true,
4494 false,
4495 true,
4496 true,
4497 true,
4498 true,
4499 true,
4500 true,
4501 true,
4502 true,
4503 true,
4504 true,
4505 false,
4506 true,
4507 false,
4508 true,
4509 false,
4510 true,
4511 true,
4512 false,
4513 true,
4514 false,
4515 true,
4516 false,
4517 true,
4518 true,
4519 false,
4520 true,
4521 true,
4522 true,
4523 false,
4524 false,
4525 false,
4526 false,
4527 true,
4528 true,
4529 true,
4530 true,
4531 true,
4532 true,
4533 true,
4534 true,
4535 true,
4536 false,
4537 true,
4538 false,
4539 false,
4540 true,
4541 false,
4542 false,
4543 false,
4544 false,
4545 false,
4546 false,
4547 false,
4548 false,
4549 false,
4550 false,
4551 false,
4552 true,
4553 true,
4554 false,
4555 false,
4556 false,
4557 false,
4558 false,
4559 true,
4560 true,
4561 true,
4562 true,
4563 false,
4564 false,
4565 false,
4566 false,
4567 true,
4568 true,
4569 false,
4570 false,
4571 false,
4572 true,
4573 true,
4574 false,
4575 false,
4576 false,
4577 false,
4578 false,
4579 true,
4580 true,
4581 false,
4582 true,
4583 true,
4584 false,
4585 true,
4586 true,
4587 false,
4588 true,
4589 true,
4590 false,
4591 true,
4592 true,
4593 false,
4594 true,
4595 false,
4596 true,
4597 true,
4598 true,
4599 true,
4600 false,
4601 false,
4602 false,
4603 true,
4604 true,
4605 true,
4606 true,
4607 false,
4608 true,
4609 true,
4610 true,
4611 false,
4612 false,
4613 true,
4614 false,
4615 false,
4616 false,
4617 true,
4618 true,
4619 true,
4620 false,
4621 true,
4622 false,
4623 false,
4624 false,
4625 true,
4626 false,
4627 false,
4628 true,
4629 true,
4630 true,
4631 true,
4632 false,
4633 true,
4634 true,
4635 false,
4636 false,
4637 false,
4638 true,
4639 false,
4640 true,
4641 true,
4642 false,
4643 false,
4644 false,
4645 false,
4646 true,
4647 false,
4648 true,
4649 false,
4650 false,
4651 false,
4652 false,
4653 true,
4654 false,
4655 false,
4656 true,
4657 true,
4658 true,
4659 false,
4660 true,
4661 true,
4662 false,
4663 true,
4664 false,
4665 true,
4666 false,
4667 false,
4668 false,
4669 true,
4670 false,
4671 false,
4672 false,
4673 true,
4674 true,
4675 true,
4676 true,
4677 true,
4678 false,
4679 false,
4680 false,
4681 false,
4682 false,
4683 false,
4684 true,
4685 true,
4686 true,
4687 true,
4688 true,
4689 false,
4690 true,
4691 true,
4692 false,
4693 true,
4694 false,
4695 true,
4696 false,
4697 true,
4698 false,
4699 false,
4700 false,
4701 true,
4702 false,
4703 false,
4704 false,
4705 true,
4706 true,
4707 false,
4708 false,
4709 true,
4710 false,
4711 true,
4712 false,
4713 false,
4714 false,
4715 true,
4716 true,
4717 true,
4718 true,
4719 false,
4720 false,
4721 true,
4722 });
4723
4724 Vector512Bool vec = zig_ret_vector_512_bool();
4725 assert_or_panic(vec[0] == true);
4726 assert_or_panic(vec[1] == true);
4727 assert_or_panic(vec[2] == true);
4728 assert_or_panic(vec[3] == true);
4729 assert_or_panic(vec[4] == false);
4730 assert_or_panic(vec[5] == true);
4731 assert_or_panic(vec[6] == false);
4732 assert_or_panic(vec[7] == true);
4733 assert_or_panic(vec[8] == true);
4734 assert_or_panic(vec[9] == true);
4735 assert_or_panic(vec[10] == false);
4736 assert_or_panic(vec[11] == true);
4737 assert_or_panic(vec[12] == false);
4738 assert_or_panic(vec[13] == false);
4739 assert_or_panic(vec[14] == false);
4740 assert_or_panic(vec[15] == true);
4741 assert_or_panic(vec[16] == true);
4742 assert_or_panic(vec[17] == false);
4743 assert_or_panic(vec[18] == false);
4744 assert_or_panic(vec[19] == false);
4745 assert_or_panic(vec[20] == true);
4746 assert_or_panic(vec[21] == true);
4747 assert_or_panic(vec[22] == false);
4748 assert_or_panic(vec[23] == false);
4749 assert_or_panic(vec[24] == false);
4750 assert_or_panic(vec[25] == false);
4751 assert_or_panic(vec[26] == true);
4752 assert_or_panic(vec[27] == false);
4753 assert_or_panic(vec[28] == false);
4754 assert_or_panic(vec[29] == false);
4755 assert_or_panic(vec[30] == true);
4756 assert_or_panic(vec[31] == true);
4757 assert_or_panic(vec[32] == true);
4758 assert_or_panic(vec[33] == true);
4759 assert_or_panic(vec[34] == false);
4760 assert_or_panic(vec[35] == false);
4761 assert_or_panic(vec[36] == false);
4762 assert_or_panic(vec[37] == true);
4763 assert_or_panic(vec[38] == true);
4764 assert_or_panic(vec[39] == true);
4765 assert_or_panic(vec[40] == false);
4766 assert_or_panic(vec[41] == false);
4767 assert_or_panic(vec[42] == true);
4768 assert_or_panic(vec[43] == false);
4769 assert_or_panic(vec[44] == false);
4770 assert_or_panic(vec[45] == true);
4771 assert_or_panic(vec[46] == false);
4772 assert_or_panic(vec[47] == false);
4773 assert_or_panic(vec[48] == true);
4774 assert_or_panic(vec[49] == true);
4775 assert_or_panic(vec[50] == true);
4776 assert_or_panic(vec[51] == true);
4777 assert_or_panic(vec[52] == false);
4778 assert_or_panic(vec[53] == false);
4779 assert_or_panic(vec[54] == false);
4780 assert_or_panic(vec[55] == true);
4781 assert_or_panic(vec[56] == false);
4782 assert_or_panic(vec[57] == true);
4783 assert_or_panic(vec[58] == false);
4784 assert_or_panic(vec[59] == true);
4785 assert_or_panic(vec[60] == true);
4786 assert_or_panic(vec[61] == false);
4787 assert_or_panic(vec[62] == false);
4788 assert_or_panic(vec[63] == true);
4789 assert_or_panic(vec[64] == true);
4790 assert_or_panic(vec[65] == false);
4791 assert_or_panic(vec[66] == true);
4792 assert_or_panic(vec[67] == false);
4793 assert_or_panic(vec[68] == false);
4794 assert_or_panic(vec[69] == false);
4795 assert_or_panic(vec[70] == true);
4796 assert_or_panic(vec[71] == true);
4797 assert_or_panic(vec[72] == true);
4798 assert_or_panic(vec[73] == true);
4799 assert_or_panic(vec[74] == true);
4800 assert_or_panic(vec[75] == false);
4801 assert_or_panic(vec[76] == true);
4802 assert_or_panic(vec[77] == false);
4803 assert_or_panic(vec[78] == true);
4804 assert_or_panic(vec[79] == true);
4805 assert_or_panic(vec[80] == true);
4806 assert_or_panic(vec[81] == true);
4807 assert_or_panic(vec[82] == true);
4808 assert_or_panic(vec[83] == false);
4809 assert_or_panic(vec[84] == true);
4810 assert_or_panic(vec[85] == true);
4811 assert_or_panic(vec[86] == false);
4812 assert_or_panic(vec[87] == true);
4813 assert_or_panic(vec[88] == false);
4814 assert_or_panic(vec[89] == false);
4815 assert_or_panic(vec[90] == true);
4816 assert_or_panic(vec[91] == false);
4817 assert_or_panic(vec[92] == true);
4818 assert_or_panic(vec[93] == false);
4819 assert_or_panic(vec[94] == false);
4820 assert_or_panic(vec[95] == false);
4821 assert_or_panic(vec[96] == true);
4822 assert_or_panic(vec[97] == true);
4823 assert_or_panic(vec[98] == false);
4824 assert_or_panic(vec[99] == true);
4825 assert_or_panic(vec[100] == true);
4826 assert_or_panic(vec[101] == false);
4827 assert_or_panic(vec[102] == true);
4828 assert_or_panic(vec[103] == false);
4829 assert_or_panic(vec[104] == true);
4830 assert_or_panic(vec[105] == false);
4831 assert_or_panic(vec[106] == true);
4832 assert_or_panic(vec[107] == false);
4833 assert_or_panic(vec[108] == false);
4834 assert_or_panic(vec[109] == true);
4835 assert_or_panic(vec[110] == false);
4836 assert_or_panic(vec[111] == false);
4837 assert_or_panic(vec[112] == true);
4838 assert_or_panic(vec[113] == false);
4839 assert_or_panic(vec[114] == true);
4840 assert_or_panic(vec[115] == false);
4841 assert_or_panic(vec[116] == true);
4842 assert_or_panic(vec[117] == false);
4843 assert_or_panic(vec[118] == false);
4844 assert_or_panic(vec[119] == true);
4845 assert_or_panic(vec[120] == true);
4846 assert_or_panic(vec[121] == true);
4847 assert_or_panic(vec[122] == false);
4848 assert_or_panic(vec[123] == true);
4849 assert_or_panic(vec[124] == false);
4850 assert_or_panic(vec[125] == false);
4851 assert_or_panic(vec[126] == true);
4852 assert_or_panic(vec[127] == true);
4853 assert_or_panic(vec[128] == false);
4854 assert_or_panic(vec[129] == true);
4855 assert_or_panic(vec[130] == true);
4856 assert_or_panic(vec[131] == false);
4857 assert_or_panic(vec[132] == true);
4858 assert_or_panic(vec[133] == true);
4859 assert_or_panic(vec[134] == false);
4860 assert_or_panic(vec[135] == true);
4861 assert_or_panic(vec[136] == true);
4862 assert_or_panic(vec[137] == false);
4863 assert_or_panic(vec[138] == false);
4864 assert_or_panic(vec[139] == false);
4865 assert_or_panic(vec[140] == true);
4866 assert_or_panic(vec[141] == false);
4867 assert_or_panic(vec[142] == true);
4868 assert_or_panic(vec[143] == false);
4869 assert_or_panic(vec[144] == false);
4870 assert_or_panic(vec[145] == false);
4871 assert_or_panic(vec[146] == true);
4872 assert_or_panic(vec[147] == false);
4873 assert_or_panic(vec[148] == true);
4874 assert_or_panic(vec[149] == false);
4875 assert_or_panic(vec[150] == false);
4876 assert_or_panic(vec[151] == true);
4877 assert_or_panic(vec[152] == false);
4878 assert_or_panic(vec[153] == true);
4879 assert_or_panic(vec[154] == true);
4880 assert_or_panic(vec[155] == false);
4881 assert_or_panic(vec[156] == true);
4882 assert_or_panic(vec[157] == true);
4883 assert_or_panic(vec[158] == false);
4884 assert_or_panic(vec[159] == true);
4885 assert_or_panic(vec[160] == true);
4886 assert_or_panic(vec[161] == false);
4887 assert_or_panic(vec[162] == false);
4888 assert_or_panic(vec[163] == false);
4889 assert_or_panic(vec[164] == true);
4890 assert_or_panic(vec[165] == false);
4891 assert_or_panic(vec[166] == true);
4892 assert_or_panic(vec[167] == true);
4893 assert_or_panic(vec[168] == true);
4894 assert_or_panic(vec[169] == true);
4895 assert_or_panic(vec[170] == false);
4896 assert_or_panic(vec[171] == true);
4897 assert_or_panic(vec[172] == false);
4898 assert_or_panic(vec[173] == false);
4899 assert_or_panic(vec[174] == true);
4900 assert_or_panic(vec[175] == true);
4901 assert_or_panic(vec[176] == true);
4902 assert_or_panic(vec[177] == false);
4903 assert_or_panic(vec[178] == false);
4904 assert_or_panic(vec[179] == false);
4905 assert_or_panic(vec[180] == true);
4906 assert_or_panic(vec[181] == false);
4907 assert_or_panic(vec[182] == false);
4908 assert_or_panic(vec[183] == true);
4909 assert_or_panic(vec[184] == true);
4910 assert_or_panic(vec[185] == false);
4911 assert_or_panic(vec[186] == true);
4912 assert_or_panic(vec[187] == false);
4913 assert_or_panic(vec[188] == true);
4914 assert_or_panic(vec[189] == true);
4915 assert_or_panic(vec[190] == true);
4916 assert_or_panic(vec[191] == true);
4917 assert_or_panic(vec[192] == true);
4918 assert_or_panic(vec[193] == true);
4919 assert_or_panic(vec[194] == true);
4920 assert_or_panic(vec[195] == false);
4921 assert_or_panic(vec[196] == false);
4922 assert_or_panic(vec[197] == false);
4923 assert_or_panic(vec[198] == false);
4924 assert_or_panic(vec[199] == false);
4925 assert_or_panic(vec[200] == true);
4926 assert_or_panic(vec[201] == false);
4927 assert_or_panic(vec[202] == true);
4928 assert_or_panic(vec[203] == false);
4929 assert_or_panic(vec[204] == true);
4930 assert_or_panic(vec[205] == true);
4931 assert_or_panic(vec[206] == false);
4932 assert_or_panic(vec[207] == false);
4933 assert_or_panic(vec[208] == false);
4934 assert_or_panic(vec[209] == true);
4935 assert_or_panic(vec[210] == true);
4936 assert_or_panic(vec[211] == true);
4937 assert_or_panic(vec[212] == false);
4938 assert_or_panic(vec[213] == false);
4939 assert_or_panic(vec[214] == true);
4940 assert_or_panic(vec[215] == true);
4941 assert_or_panic(vec[216] == true);
4942 assert_or_panic(vec[217] == false);
4943 assert_or_panic(vec[218] == false);
4944 assert_or_panic(vec[219] == true);
4945 assert_or_panic(vec[220] == false);
4946 assert_or_panic(vec[221] == true);
4947 assert_or_panic(vec[222] == true);
4948 assert_or_panic(vec[223] == false);
4949 assert_or_panic(vec[224] == true);
4950 assert_or_panic(vec[225] == false);
4951 assert_or_panic(vec[226] == false);
4952 assert_or_panic(vec[227] == true);
4953 assert_or_panic(vec[228] == false);
4954 assert_or_panic(vec[229] == false);
4955 assert_or_panic(vec[230] == true);
4956 assert_or_panic(vec[231] == true);
4957 assert_or_panic(vec[232] == false);
4958 assert_or_panic(vec[233] == true);
4959 assert_or_panic(vec[234] == true);
4960 assert_or_panic(vec[235] == true);
4961 assert_or_panic(vec[236] == true);
4962 assert_or_panic(vec[237] == true);
4963 assert_or_panic(vec[238] == false);
4964 assert_or_panic(vec[239] == true);
4965 assert_or_panic(vec[240] == false);
4966 assert_or_panic(vec[241] == false);
4967 assert_or_panic(vec[242] == true);
4968 assert_or_panic(vec[243] == false);
4969 assert_or_panic(vec[244] == true);
4970 assert_or_panic(vec[245] == false);
4971 assert_or_panic(vec[246] == true);
4972 assert_or_panic(vec[247] == false);
4973 assert_or_panic(vec[248] == true);
4974 assert_or_panic(vec[249] == true);
4975 assert_or_panic(vec[250] == true);
4976 assert_or_panic(vec[251] == true);
4977 assert_or_panic(vec[252] == true);
4978 assert_or_panic(vec[253] == false);
4979 assert_or_panic(vec[254] == false);
4980 assert_or_panic(vec[255] == false);
4981 assert_or_panic(vec[256] == false);
4982 assert_or_panic(vec[257] == false);
4983 assert_or_panic(vec[258] == false);
4984 assert_or_panic(vec[259] == true);
4985 assert_or_panic(vec[260] == true);
4986 assert_or_panic(vec[261] == true);
4987 assert_or_panic(vec[262] == true);
4988 assert_or_panic(vec[263] == false);
4989 assert_or_panic(vec[264] == false);
4990 assert_or_panic(vec[265] == false);
4991 assert_or_panic(vec[266] == true);
4992 assert_or_panic(vec[267] == false);
4993 assert_or_panic(vec[268] == true);
4994 assert_or_panic(vec[269] == false);
4995 assert_or_panic(vec[270] == true);
4996 assert_or_panic(vec[271] == true);
4997 assert_or_panic(vec[272] == true);
4998 assert_or_panic(vec[273] == true);
4999 assert_or_panic(vec[274] == true);
5000 assert_or_panic(vec[275] == true);
5001 assert_or_panic(vec[276] == false);
5002 assert_or_panic(vec[277] == false);
5003 assert_or_panic(vec[278] == true);
5004 assert_or_panic(vec[279] == true);
5005 assert_or_panic(vec[280] == false);
5006 assert_or_panic(vec[281] == false);
5007 assert_or_panic(vec[282] == false);
5008 assert_or_panic(vec[283] == false);
5009 assert_or_panic(vec[284] == true);
5010 assert_or_panic(vec[285] == true);
5011 assert_or_panic(vec[286] == true);
5012 assert_or_panic(vec[287] == false);
5013 assert_or_panic(vec[288] == false);
5014 assert_or_panic(vec[289] == false);
5015 assert_or_panic(vec[290] == true);
5016 assert_or_panic(vec[291] == false);
5017 assert_or_panic(vec[292] == true);
5018 assert_or_panic(vec[293] == true);
5019 assert_or_panic(vec[294] == false);
5020 assert_or_panic(vec[295] == true);
5021 assert_or_panic(vec[296] == true);
5022 assert_or_panic(vec[297] == true);
5023 assert_or_panic(vec[298] == false);
5024 assert_or_panic(vec[299] == true);
5025 assert_or_panic(vec[300] == true);
5026 assert_or_panic(vec[301] == false);
5027 assert_or_panic(vec[302] == false);
5028 assert_or_panic(vec[303] == true);
5029 assert_or_panic(vec[304] == false);
5030 assert_or_panic(vec[305] == false);
5031 assert_or_panic(vec[306] == true);
5032 assert_or_panic(vec[307] == true);
5033 assert_or_panic(vec[308] == true);
5034 assert_or_panic(vec[309] == true);
5035 assert_or_panic(vec[310] == false);
5036 assert_or_panic(vec[311] == false);
5037 assert_or_panic(vec[312] == false);
5038 assert_or_panic(vec[313] == false);
5039 assert_or_panic(vec[314] == false);
5040 assert_or_panic(vec[315] == true);
5041 assert_or_panic(vec[316] == false);
5042 assert_or_panic(vec[317] == false);
5043 assert_or_panic(vec[318] == true);
5044 assert_or_panic(vec[319] == false);
5045 assert_or_panic(vec[320] == false);
5046 assert_or_panic(vec[321] == true);
5047 assert_or_panic(vec[322] == true);
5048 assert_or_panic(vec[323] == true);
5049 assert_or_panic(vec[324] == true);
5050 assert_or_panic(vec[325] == false);
5051 assert_or_panic(vec[326] == false);
5052 assert_or_panic(vec[327] == false);
5053 assert_or_panic(vec[328] == true);
5054 assert_or_panic(vec[329] == true);
5055 assert_or_panic(vec[330] == false);
5056 assert_or_panic(vec[331] == true);
5057 assert_or_panic(vec[332] == true);
5058 assert_or_panic(vec[333] == false);
5059 assert_or_panic(vec[334] == false);
5060 assert_or_panic(vec[335] == true);
5061 assert_or_panic(vec[336] == true);
5062 assert_or_panic(vec[337] == false);
5063 assert_or_panic(vec[338] == true);
5064 assert_or_panic(vec[339] == true);
5065 assert_or_panic(vec[340] == true);
5066 assert_or_panic(vec[341] == false);
5067 assert_or_panic(vec[342] == false);
5068 assert_or_panic(vec[343] == false);
5069 assert_or_panic(vec[344] == true);
5070 assert_or_panic(vec[345] == true);
5071 assert_or_panic(vec[346] == false);
5072 assert_or_panic(vec[347] == true);
5073 assert_or_panic(vec[348] == false);
5074 assert_or_panic(vec[349] == true);
5075 assert_or_panic(vec[350] == false);
5076 assert_or_panic(vec[351] == false);
5077 assert_or_panic(vec[352] == true);
5078 assert_or_panic(vec[353] == false);
5079 assert_or_panic(vec[354] == true);
5080 assert_or_panic(vec[355] == false);
5081 assert_or_panic(vec[356] == false);
5082 assert_or_panic(vec[357] == false);
5083 assert_or_panic(vec[358] == false);
5084 assert_or_panic(vec[359] == false);
5085 assert_or_panic(vec[360] == true);
5086 assert_or_panic(vec[361] == true);
5087 assert_or_panic(vec[362] == false);
5088 assert_or_panic(vec[363] == false);
5089 assert_or_panic(vec[364] == false);
5090 assert_or_panic(vec[365] == false);
5091 assert_or_panic(vec[366] == true);
5092 assert_or_panic(vec[367] == false);
5093 assert_or_panic(vec[368] == true);
5094 assert_or_panic(vec[369] == false);
5095 assert_or_panic(vec[370] == true);
5096 assert_or_panic(vec[371] == true);
5097 assert_or_panic(vec[372] == false);
5098 assert_or_panic(vec[373] == true);
5099 assert_or_panic(vec[374] == true);
5100 assert_or_panic(vec[375] == true);
5101 assert_or_panic(vec[376] == true);
5102 assert_or_panic(vec[377] == true);
5103 assert_or_panic(vec[378] == false);
5104 assert_or_panic(vec[379] == true);
5105 assert_or_panic(vec[380] == false);
5106 assert_or_panic(vec[381] == true);
5107 assert_or_panic(vec[382] == true);
5108 assert_or_panic(vec[383] == true);
5109 assert_or_panic(vec[384] == true);
5110 assert_or_panic(vec[385] == true);
5111 assert_or_panic(vec[386] == false);
5112 assert_or_panic(vec[387] == true);
5113 assert_or_panic(vec[388] == true);
5114 assert_or_panic(vec[389] == false);
5115 assert_or_panic(vec[390] == true);
5116 assert_or_panic(vec[391] == false);
5117 assert_or_panic(vec[392] == true);
5118 assert_or_panic(vec[393] == false);
5119 assert_or_panic(vec[394] == true);
5120 assert_or_panic(vec[395] == false);
5121 assert_or_panic(vec[396] == true);
5122 assert_or_panic(vec[397] == false);
5123 assert_or_panic(vec[398] == false);
5124 assert_or_panic(vec[399] == true);
5125 assert_or_panic(vec[400] == true);
5126 assert_or_panic(vec[401] == true);
5127 assert_or_panic(vec[402] == true);
5128 assert_or_panic(vec[403] == false);
5129 assert_or_panic(vec[404] == false);
5130 assert_or_panic(vec[405] == true);
5131 assert_or_panic(vec[406] == false);
5132 assert_or_panic(vec[407] == false);
5133 assert_or_panic(vec[408] == false);
5134 assert_or_panic(vec[409] == true);
5135 assert_or_panic(vec[410] == false);
5136 assert_or_panic(vec[411] == true);
5137 assert_or_panic(vec[412] == true);
5138 assert_or_panic(vec[413] == false);
5139 assert_or_panic(vec[414] == true);
5140 assert_or_panic(vec[415] == true);
5141 assert_or_panic(vec[416] == false);
5142 assert_or_panic(vec[417] == true);
5143 assert_or_panic(vec[418] == true);
5144 assert_or_panic(vec[419] == false);
5145 assert_or_panic(vec[420] == false);
5146 assert_or_panic(vec[421] == true);
5147 assert_or_panic(vec[422] == false);
5148 assert_or_panic(vec[423] == false);
5149 assert_or_panic(vec[424] == true);
5150 assert_or_panic(vec[425] == false);
5151 assert_or_panic(vec[426] == true);
5152 assert_or_panic(vec[427] == false);
5153 assert_or_panic(vec[428] == false);
5154 assert_or_panic(vec[429] == true);
5155 assert_or_panic(vec[430] == false);
5156 assert_or_panic(vec[431] == true);
5157 assert_or_panic(vec[432] == true);
5158 assert_or_panic(vec[433] == false);
5159 assert_or_panic(vec[434] == true);
5160 assert_or_panic(vec[435] == false);
5161 assert_or_panic(vec[436] == true);
5162 assert_or_panic(vec[437] == false);
5163 assert_or_panic(vec[438] == true);
5164 assert_or_panic(vec[439] == false);
5165 assert_or_panic(vec[440] == false);
5166 assert_or_panic(vec[441] == true);
5167 assert_or_panic(vec[442] == true);
5168 assert_or_panic(vec[443] == false);
5169 assert_or_panic(vec[444] == true);
5170 assert_or_panic(vec[445] == true);
5171 assert_or_panic(vec[446] == false);
5172 assert_or_panic(vec[447] == true);
5173 assert_or_panic(vec[448] == true);
5174 assert_or_panic(vec[449] == false);
5175 assert_or_panic(vec[450] == false);
5176 assert_or_panic(vec[451] == false);
5177 assert_or_panic(vec[452] == false);
5178 assert_or_panic(vec[453] == false);
5179 assert_or_panic(vec[454] == true);
5180 assert_or_panic(vec[455] == false);
5181 assert_or_panic(vec[456] == false);
5182 assert_or_panic(vec[457] == true);
5183 assert_or_panic(vec[458] == false);
5184 assert_or_panic(vec[459] == true);
5185 assert_or_panic(vec[460] == false);
5186 assert_or_panic(vec[461] == false);
5187 assert_or_panic(vec[462] == false);
5188 assert_or_panic(vec[463] == true);
5189 assert_or_panic(vec[464] == false);
5190 assert_or_panic(vec[465] == true);
5191 assert_or_panic(vec[466] == false);
5192 assert_or_panic(vec[467] == false);
5193 assert_or_panic(vec[468] == false);
5194 assert_or_panic(vec[469] == false);
5195 assert_or_panic(vec[470] == true);
5196 assert_or_panic(vec[471] == true);
5197 assert_or_panic(vec[472] == false);
5198 assert_or_panic(vec[473] == true);
5199 assert_or_panic(vec[474] == true);
5200 assert_or_panic(vec[475] == false);
5201 assert_or_panic(vec[476] == false);
5202 assert_or_panic(vec[477] == true);
5203 assert_or_panic(vec[478] == true);
5204 assert_or_panic(vec[479] == true);
5205 assert_or_panic(vec[480] == false);
5206 assert_or_panic(vec[481] == false);
5207 assert_or_panic(vec[482] == true);
5208 assert_or_panic(vec[483] == false);
5209 assert_or_panic(vec[484] == false);
5210 assert_or_panic(vec[485] == false);
5211 assert_or_panic(vec[486] == true);
5212 assert_or_panic(vec[487] == true);
5213 assert_or_panic(vec[488] == false);
5214 assert_or_panic(vec[489] == false);
5215 assert_or_panic(vec[490] == false);
5216 assert_or_panic(vec[491] == false);
5217 assert_or_panic(vec[492] == false);
5218 assert_or_panic(vec[493] == true);
5219 assert_or_panic(vec[494] == true);
5220 assert_or_panic(vec[495] == true);
5221 assert_or_panic(vec[496] == true);
5222 assert_or_panic(vec[497] == false);
5223 assert_or_panic(vec[498] == false);
5224 assert_or_panic(vec[499] == false);
5225 assert_or_panic(vec[500] == true);
5226 assert_or_panic(vec[501] == false);
5227 assert_or_panic(vec[502] == true);
5228 assert_or_panic(vec[503] == true);
5229 assert_or_panic(vec[504] == true);
5230 assert_or_panic(vec[505] == true);
5231 assert_or_panic(vec[506] == false);
5232 assert_or_panic(vec[507] == false);
5233 assert_or_panic(vec[508] == true);
5234 assert_or_panic(vec[509] == true);
5235 assert_or_panic(vec[510] == false);
5236 assert_or_panic(vec[511] == false);
5237 }
5238#endif
523915507}
524015508
524115509void c_u8(uint8_t x) {
......@@ -5386,51 +15654,6 @@ void c_big_union(union BigUnion x) {
538615654 assert_or_panic(x.a.d == 4);
538715655}
538815656
5389void c_small_struct_ints(struct SmallStructInts x) {
5390 assert_or_panic(x.a == 1);
5391 assert_or_panic(x.b == 2);
5392 assert_or_panic(x.c == 3);
5393 assert_or_panic(x.d == 4);
5394
5395 struct SmallStructInts y = zig_ret_small_struct_ints();
5396
5397 assert_or_panic(y.a == 1);
5398 assert_or_panic(y.b == 2);
5399 assert_or_panic(y.c == 3);
5400 assert_or_panic(y.d == 4);
5401}
5402
5403struct SmallStructInts c_ret_small_struct_ints() {
5404 struct SmallStructInts s = {
5405 .a = 1,
5406 .b = 2,
5407 .c = 3,
5408 .d = 4,
5409 };
5410 return s;
5411}
5412
5413void c_med_struct_ints(struct MedStructInts s) {
5414 assert_or_panic(s.x == 1);
5415 assert_or_panic(s.y == 2);
5416 assert_or_panic(s.z == 3);
5417
5418 struct MedStructInts s2 = zig_ret_med_struct_ints();
5419
5420 assert_or_panic(s2.x == 1);
5421 assert_or_panic(s2.y == 2);
5422 assert_or_panic(s2.z == 3);
5423}
5424
5425struct MedStructInts c_ret_med_struct_ints() {
5426 struct MedStructInts s = {
5427 .x = 1,
5428 .y = 2,
5429 .z = 3,
5430 };
5431 return s;
5432}
5433
543415657void c_med_struct_mixed(struct MedStructMixed x) {
543515658 assert_or_panic(x.a == 1234);
543615659 assert_or_panic(x.b == 100.0f);
......@@ -5443,7 +15666,7 @@ void c_med_struct_mixed(struct MedStructMixed x) {
544315666 assert_or_panic(y.c == 1337.0f);
544415667}
544515668
5446struct MedStructMixed c_ret_med_struct_mixed() {
15669struct MedStructMixed c_ret_med_struct_mixed(void) {
544715670 struct MedStructMixed s = {
544815671 .a = 1234,
544915672 .b = 100.0,
......@@ -5469,7 +15692,7 @@ void c_split_struct_mixed(struct SplitStructMixed x) {
546915692 assert_or_panic(y.c == 1337.0f);
547015693}
547115694
5472uint8_t c_ret_small_packed_struct() {
15695uint8_t c_ret_small_packed_struct(void) {
547315696 uint8_t s = 0;
547415697 s |= 0 << 0;
547515698 s |= 1 << 2;
......@@ -5486,7 +15709,7 @@ void c_small_packed_struct(uint8_t x) {
548615709}
548715710
548815711#ifndef ZIG_NO_I128
5489__int128 c_ret_big_packed_struct() {
15712__int128 c_ret_big_packed_struct(void) {
549015713 __int128 s = 0;
549115714 s |= 1 << 0;
549215715 s |= (__int128)2 << 64;
......@@ -5499,7 +15722,7 @@ void c_big_packed_struct(__int128 x) {
549915722}
550015723#endif
550115724
5502struct SplitStructMixed c_ret_split_struct_mixed() {
15725struct SplitStructMixed c_ret_split_struct_mixed(void) {
550315726 struct SplitStructMixed s = {
550415727 .a = 1234,
550515728 .b = 100,
......@@ -5518,74 +15741,31 @@ struct BigStruct c_big_struct_both(struct BigStruct x) {
551815741 return y;
551915742}
552015743
5521void c_small_struct_floats(Vector3 vec) {
5522 assert_or_panic(vec.x == 3.0);
5523 assert_or_panic(vec.y == 6.0);
5524 assert_or_panic(vec.z == 12.0);
5525}
5526
5527void c_small_struct_floats_extra(Vector3 vec, const char *str) {
5528 assert_or_panic(vec.x == 3.0);
5529 assert_or_panic(vec.y == 6.0);
5530 assert_or_panic(vec.z == 12.0);
5531 assert_or_panic(!strcmp(str, "hello"));
5532}
5533
5534void c_big_struct_floats(Vector5 vec) {
5535 assert_or_panic(vec.x == 76.0);
5536 assert_or_panic(vec.y == -1.0);
5537 assert_or_panic(vec.z == -12.0);
5538 assert_or_panic(vec.w == 69);
5539 assert_or_panic(vec.q == 55);
5540}
5541
5542void c_multiple_struct_ints(Rect x, Rect y) {
5543 assert_or_panic(x.left == 1);
5544 assert_or_panic(x.right == 21);
5545 assert_or_panic(x.top == 16);
5546 assert_or_panic(x.bottom == 4);
5547 assert_or_panic(y.left == 178);
5548 assert_or_panic(y.right == 189);
5549 assert_or_panic(y.top == 21);
5550 assert_or_panic(y.bottom == 15);
5551}
5552
5553void c_multiple_struct_floats(FloatRect x, FloatRect y) {
5554 assert_or_panic(x.left == 1);
5555 assert_or_panic(x.right == 21);
5556 assert_or_panic(x.top == 16);
5557 assert_or_panic(x.bottom == 4);
5558 assert_or_panic(y.left == 178);
5559 assert_or_panic(y.right == 189);
5560 assert_or_panic(y.top == 21);
5561 assert_or_panic(y.bottom == 15);
5562}
5563
5564bool c_ret_bool() {
15744bool c_ret_bool(void) {
556515745 return 1;
556615746}
5567uint8_t c_ret_u8() {
15747uint8_t c_ret_u8(void) {
556815748 return 0xff;
556915749}
5570uint16_t c_ret_u16() {
15750uint16_t c_ret_u16(void) {
557115751 return 0xffff;
557215752}
5573uint32_t c_ret_u32() {
15753uint32_t c_ret_u32(void) {
557415754 return 0xffffffff;
557515755}
5576uint64_t c_ret_u64() {
15756uint64_t c_ret_u64(void) {
557715757 return 0xffffffffffffffff;
557815758}
5579int8_t c_ret_i8() {
15759int8_t c_ret_i8(void) {
558015760 return -1;
558115761}
5582int16_t c_ret_i16() {
15762int16_t c_ret_i16(void) {
558315763 return -1;
558415764}
5585int32_t c_ret_i32() {
15765int32_t c_ret_i32(void) {
558615766 return -1;
558715767}
5588int64_t c_ret_i64() {
15768int64_t c_ret_i64(void) {
558915769 return -1;
559015770}
559115771
......@@ -5600,7 +15780,7 @@ void c_struct_with_array(StructWithArray x) {
560015780 assert_or_panic(x.b == 2);
560115781}
560215782
5603StructWithArray c_ret_struct_with_array() {
15783StructWithArray c_ret_struct_with_array(void) {
560415784 return (StructWithArray){4, {}, 155};
560515785}
560615786
......@@ -5622,7 +15802,7 @@ void c_float_array_struct(FloatArrayStruct x) {
562215802 assert_or_panic(x.size.height == 8);
562315803}
562415804
5625FloatArrayStruct c_ret_float_array_struct() {
15805FloatArrayStruct c_ret_float_array_struct(void) {
562615806 FloatArrayStruct x;
562715807 x.origin.x = 1;
562815808 x.origin.y = 2;
......@@ -5898,7 +16078,6 @@ struct ByRef __attribute__((sysv_abi)) c_explict_sys_v(struct ByRef in) {
589816078}
589916079#endif
590016080
5901
590216081struct byval_tail_callsite_attr_Point {
590316082 double x;
590416083 double y;
......@@ -6032,3 +16211,18 @@ void __attribute__((vectorcall)) c_vectorcall_check(int a, float b, double c, vo
603216211 zig_vectorcall_check(a, b, c, d, e, f, g, h, i, j);
603316212}
603416213#endif
16214
16215#if defined(__x86_64__) && defined(_WIN64)
16216void c_win64_varargs_u64_f64_u64_f64(uint64_t a, double b, uint64_t c, double d) {
16217 assert_or_panic(a == UINT64_C(0x3ff0000000000000));
16218 assert_or_panic(b == 2.0);
16219 assert_or_panic(c == UINT64_C(0x4008000000000000));
16220 assert_or_panic(d == 4.0);
16221}
16222void c_win64_varargs_f64_u64_f64_u64(double a, uint64_t b, double c, uint64_t d) {
16223 assert_or_panic(a == 5.0);
16224 assert_or_panic(b == UINT64_C(0x4018000000000000));
16225 assert_or_panic(c == 7.0);
16226 assert_or_panic(d == UINT64_C(0x4020000000000000));
16227}
16228#endif
test/c_abi/main.zig+15487-4486
......@@ -18,13 +18,12 @@ const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isArm() and
1818const have_f128 = builtin.cpu.arch.isWasm() or (builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin() and builtin.abi != .msvc);
1919const have_f80 = builtin.cpu.arch.isX86() and builtin.abi != .msvc;
2020
21extern fn run_c_tests() void;
22
2321export fn zig_panic() noreturn {
2422 @panic("zig_panic called from C");
2523}
2624
27test "C importing Zig ABI Tests" {
25extern fn run_c_tests() void;
26test run_c_tests {
2827 run_c_tests();
2928}
3029
......@@ -50,7 +49,7 @@ export fn zig_five_integers(a: i32, b: i32, c: i32, d: i32, e: i32) void {
5049 expect(e == 90) catch @panic("test failure: zig_five_integers 90");
5150}
5251
53test "C ABI integers" {
52test "integers" {
5453 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
5554
5655 c_u8(0xff);
......@@ -120,13 +119,13 @@ export fn zig_five_floats(a: f32, b: f32, c: f32, d: f32, e: f32) void {
120119 expect(e == 5.0) catch @panic("test failure: zig_five_floats 5.0");
121120}
122121
123test "C ABI floats" {
122test "floats" {
124123 c_f32(12.34);
125124 c_f64(56.78);
126125 c_five_floats(1.0, 2.0, 3.0, 4.0, 5.0);
127126}
128127
129test "C ABI long double" {
128test "long double" {
130129 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
131130
132131 c_long_double(12.34);
......@@ -145,7 +144,7 @@ export fn zig_longdouble(x: c_longdouble) void {
145144
146145extern fn c_ptr(*anyopaque) void;
147146
148test "C ABI pointer" {
147test "pointer" {
149148 c_ptr(@as(*anyopaque, @ptrFromInt(0xdeadbeef)));
150149}
151150
......@@ -155,7 +154,7 @@ export fn zig_ptr(x: *anyopaque) void {
155154
156155extern fn c_bool(bool) void;
157156
158test "C ABI bool" {
157test "bool" {
159158 c_bool(true);
160159}
161160
......@@ -190,7 +189,7 @@ const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.is
190189 builtin.cpu.arch != .s390x and
191190 !(builtin.cpu.arch.isLoongArch() and builtin.abi.float() == .soft);
192191
193test "C ABI complex float" {
192test "complex float" {
194193 if (!complex_abi_compatible) return error.SkipZigTest;
195194
196195 const a = ComplexFloat{ .real = 1.25, .imag = 2.6 };
......@@ -201,7 +200,7 @@ test "C ABI complex float" {
201200 try expect(z.imag == 13.5);
202201}
203202
204test "C ABI complex float by component" {
203test "complex float by component" {
205204 if (!complex_abi_compatible) return error.SkipZigTest;
206205
207206 const a = ComplexFloat{ .real = 1.25, .imag = 2.6 };
......@@ -212,7 +211,7 @@ test "C ABI complex float by component" {
212211 try expect(z2.imag == 13.5);
213212}
214213
215test "C ABI complex double" {
214test "complex double" {
216215 if (!complex_abi_compatible) return error.SkipZigTest;
217216
218217 const a = ComplexDouble{ .real = 1.25, .imag = 2.6 };
......@@ -223,7 +222,7 @@ test "C ABI complex double" {
223222 try expect(z.imag == 13.5);
224223}
225224
226test "C ABI complex double by component" {
225test "complex double by component" {
227226 if (!complex_abi_compatible) return error.SkipZigTest;
228227
229228 const a = ComplexDouble{ .real = 1.25, .imag = 2.6 };
......@@ -270,4500 +269,691 @@ export fn zig_cmultd_comp(a_r: f64, a_i: f64, b_r: f64, b_i: f64) ComplexDouble
270269 return .{ .real = 1.5, .imag = 13.5 };
271270}
272271
273const Struct_u8 = extern struct {
274 a: u8,
275};
272comptime {
273 skip: {
274 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
275 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
276276
277export fn zig_ret_struct_u8() Struct_u8 {
278 return .{ .a = 1 };
277 _ = struct {
278 export fn zig_ret_vector_2_bool() @Vector(2, bool) {
279 return .{
280 false,
281 false,
282 };
283 }
284 export fn zig_vector_2_bool(vec: @Vector(2, bool)) void {
285 expect(vec[0] == false) catch @panic("test failure");
286 expect(vec[1] == true) catch @panic("test failure");
287 }
288 };
289 }
279290}
280291
281export fn zig_struct_u8(s: Struct_u8, i: usize) void {
282 expect(s.a == 2) catch @panic("test failure");
283 expect(i == 3) catch @panic("test failure");
284}
292extern fn c_ret_vector_2_bool() @Vector(2, bool);
293extern fn c_vector_2_bool(@Vector(2, bool)) void;
294extern fn c_test_vector_2_bool() void;
285295
286extern fn c_ret_struct_u8() Struct_u8;
296test "@Vector(2, bool)" {
297 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
287298
288extern fn c_struct_u8(Struct_u8, usize) void;
299 const vec = c_ret_vector_2_bool();
300 try expect(vec[0] == true);
301 try expect(vec[1] == false);
302 c_vector_2_bool(.{
303 true,
304 true,
305 });
306 c_test_vector_2_bool();
307}
289308
290test "C ABI struct u8" {
291 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
292 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
293 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
294 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
309comptime {
310 skip: {
311 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
312 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
295313
296 const s = c_ret_struct_u8();
297 try expect(s.a == 4);
298 c_struct_u8(.{ .a = 5 }, 6);
314 _ = struct {
315 export fn zig_ret_vector_4_bool() @Vector(4, bool) {
316 return .{
317 false,
318 true,
319 true,
320 true,
321 };
322 }
323 export fn zig_vector_4_bool(vec: @Vector(4, bool)) void {
324 expect(vec[0] == false) catch @panic("test failure");
325 expect(vec[1] == false) catch @panic("test failure");
326 expect(vec[2] == false) catch @panic("test failure");
327 expect(vec[3] == false) catch @panic("test failure");
328 }
329 };
330 }
299331}
300332
301const Struct_u16 = extern struct {
302 a: u16,
303};
333extern fn c_ret_vector_4_bool() @Vector(4, bool);
334extern fn c_vector_4_bool(@Vector(4, bool)) void;
335extern fn c_test_vector_4_bool() void;
304336
305export fn zig_ret_struct_u16() Struct_u16 {
306 return .{ .a = 7 };
307}
337test "@Vector(4, bool)" {
338 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
308339
309export fn zig_struct_u16(s: Struct_u16, i: usize) void {
310 expect(s.a == 8) catch @panic("test failure");
311 expect(i == 9) catch @panic("test failure");
340 const vec = c_ret_vector_4_bool();
341 try expect(vec[0] == true);
342 try expect(vec[1] == false);
343 try expect(vec[2] == true);
344 try expect(vec[3] == false);
345 c_vector_4_bool(.{
346 true,
347 true,
348 false,
349 true,
350 });
351 c_test_vector_4_bool();
312352}
313353
314extern fn c_ret_struct_u16() Struct_u16;
354comptime {
355 skip: {
356 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
357 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
315358
316extern fn c_struct_u16(Struct_u16, usize) void;
359 _ = struct {
360 export fn zig_ret_vector_8_bool() @Vector(8, bool) {
361 return .{
362 false,
363 false,
364 false,
365 false,
366 true,
367 false,
368 false,
369 false,
370 };
371 }
372 export fn zig_vector_8_bool(vec: @Vector(8, bool)) void {
373 expect(vec[0] == true) catch @panic("test failure");
374 expect(vec[1] == true) catch @panic("test failure");
375 expect(vec[2] == false) catch @panic("test failure");
376 expect(vec[3] == true) catch @panic("test failure");
377 expect(vec[4] == false) catch @panic("test failure");
378 expect(vec[5] == true) catch @panic("test failure");
379 expect(vec[6] == true) catch @panic("test failure");
380 expect(vec[7] == false) catch @panic("test failure");
381 }
382 };
383 }
384}
317385
318test "C ABI struct u16" {
319 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
320 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
321 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
322 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
386extern fn c_ret_vector_8_bool() @Vector(8, bool);
387extern fn c_vector_8_bool(@Vector(8, bool)) void;
388extern fn c_test_vector_8_bool() void;
323389
324 const s = c_ret_struct_u16();
325 try expect(s.a == 10);
326 c_struct_u16(.{ .a = 11 }, 12);
390test "@Vector(8, bool)" {
391 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
392
393 const vec = c_ret_vector_8_bool();
394 try expect(vec[0] == false);
395 try expect(vec[1] == true);
396 try expect(vec[2] == false);
397 try expect(vec[3] == false);
398 try expect(vec[4] == true);
399 try expect(vec[5] == false);
400 try expect(vec[6] == false);
401 try expect(vec[7] == true);
402 c_vector_8_bool(.{
403 true,
404 false,
405 true,
406 true,
407 true,
408 true,
409 false,
410 true,
411 });
412 c_test_vector_8_bool();
327413}
328414
329const Struct_u32 = extern struct {
330 a: u32,
331};
415comptime {
416 skip: {
417 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
418 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
332419
333export fn zig_ret_struct_u32() Struct_u32 {
334 return .{ .a = 13 };
420 _ = struct {
421 export fn zig_ret_vector_16_bool() @Vector(16, bool) {
422 return .{
423 false,
424 true,
425 false,
426 false,
427 false,
428 true,
429 false,
430 false,
431 true,
432 false,
433 false,
434 false,
435 false,
436 true,
437 false,
438 false,
439 };
440 }
441 export fn zig_vector_16_bool(vec: @Vector(16, bool)) void {
442 expect(vec[0] == true) catch @panic("test failure");
443 expect(vec[1] == false) catch @panic("test failure");
444 expect(vec[2] == true) catch @panic("test failure");
445 expect(vec[3] == true) catch @panic("test failure");
446 expect(vec[4] == true) catch @panic("test failure");
447 expect(vec[5] == false) catch @panic("test failure");
448 expect(vec[6] == false) catch @panic("test failure");
449 expect(vec[7] == false) catch @panic("test failure");
450 expect(vec[8] == true) catch @panic("test failure");
451 expect(vec[9] == true) catch @panic("test failure");
452 expect(vec[10] == true) catch @panic("test failure");
453 expect(vec[11] == true) catch @panic("test failure");
454 expect(vec[12] == false) catch @panic("test failure");
455 expect(vec[13] == false) catch @panic("test failure");
456 expect(vec[14] == false) catch @panic("test failure");
457 expect(vec[15] == true) catch @panic("test failure");
458 }
459 };
460 }
335461}
336462
337export fn zig_struct_u32(s: Struct_u32, i: usize) void {
338 expect(s.a == 14) catch @panic("test failure");
339 expect(i == 15) catch @panic("test failure");
340}
463extern fn c_ret_vector_16_bool() @Vector(16, bool);
464extern fn c_vector_16_bool(@Vector(16, bool)) void;
465extern fn c_test_vector_16_bool() void;
341466
342extern fn c_ret_struct_u32() Struct_u32;
467test "@Vector(16, bool)" {
468 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
343469
344extern fn c_struct_u32(Struct_u32, usize) void;
470 const vec = c_ret_vector_16_bool();
471 try expect(vec[0] == true);
472 try expect(vec[1] == true);
473 try expect(vec[2] == false);
474 try expect(vec[3] == false);
475 try expect(vec[4] == false);
476 try expect(vec[5] == false);
477 try expect(vec[6] == true);
478 try expect(vec[7] == false);
479 try expect(vec[8] == true);
480 try expect(vec[9] == false);
481 try expect(vec[10] == false);
482 try expect(vec[11] == true);
483 try expect(vec[12] == true);
484 try expect(vec[13] == false);
485 try expect(vec[14] == true);
486 try expect(vec[15] == true);
487 c_vector_16_bool(.{
488 true,
489 false,
490 false,
491 false,
492 true,
493 false,
494 true,
495 true,
496 true,
497 true,
498 true,
499 true,
500 false,
501 false,
502 false,
503 false,
504 });
505 c_test_vector_16_bool();
506}
345507
346test "C ABI struct u32" {
347 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
348 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
349 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
350 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
508comptime {
509 skip: {
510 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
511 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
351512
352 const s = c_ret_struct_u32();
353 try expect(s.a == 16);
354 c_struct_u32(.{ .a = 17 }, 18);
513 _ = struct {
514 export fn zig_ret_vector_32_bool() @Vector(32, bool) {
515 return .{
516 false,
517 true,
518 false,
519 false,
520 true,
521 false,
522 true,
523 true,
524 true,
525 true,
526 true,
527 true,
528 false,
529 false,
530 false,
531 false,
532 false,
533 false,
534 true,
535 true,
536 true,
537 false,
538 true,
539 false,
540 true,
541 false,
542 false,
543 true,
544 false,
545 false,
546 true,
547 true,
548 };
549 }
550 export fn zig_vector_32_bool(vec: @Vector(32, bool)) void {
551 expect(vec[0] == false) catch @panic("test failure");
552 expect(vec[1] == false) catch @panic("test failure");
553 expect(vec[2] == false) catch @panic("test failure");
554 expect(vec[3] == true) catch @panic("test failure");
555 expect(vec[4] == true) catch @panic("test failure");
556 expect(vec[5] == false) catch @panic("test failure");
557 expect(vec[6] == false) catch @panic("test failure");
558 expect(vec[7] == true) catch @panic("test failure");
559 expect(vec[8] == false) catch @panic("test failure");
560 expect(vec[9] == true) catch @panic("test failure");
561 expect(vec[10] == true) catch @panic("test failure");
562 expect(vec[11] == true) catch @panic("test failure");
563 expect(vec[12] == false) catch @panic("test failure");
564 expect(vec[13] == false) catch @panic("test failure");
565 expect(vec[14] == true) catch @panic("test failure");
566 expect(vec[15] == true) catch @panic("test failure");
567 expect(vec[16] == true) catch @panic("test failure");
568 expect(vec[17] == true) catch @panic("test failure");
569 expect(vec[18] == true) catch @panic("test failure");
570 expect(vec[19] == false) catch @panic("test failure");
571 expect(vec[20] == true) catch @panic("test failure");
572 expect(vec[21] == true) catch @panic("test failure");
573 expect(vec[22] == true) catch @panic("test failure");
574 expect(vec[23] == false) catch @panic("test failure");
575 expect(vec[24] == false) catch @panic("test failure");
576 expect(vec[25] == true) catch @panic("test failure");
577 expect(vec[26] == true) catch @panic("test failure");
578 expect(vec[27] == false) catch @panic("test failure");
579 expect(vec[28] == true) catch @panic("test failure");
580 expect(vec[29] == true) catch @panic("test failure");
581 expect(vec[30] == false) catch @panic("test failure");
582 expect(vec[31] == true) catch @panic("test failure");
583 }
584 };
585 }
355586}
356587
357const Struct_u64 = extern struct {
358 a: u64,
359};
588extern fn c_ret_vector_32_bool() @Vector(32, bool);
589extern fn c_vector_32_bool(@Vector(32, bool)) void;
590extern fn c_test_vector_32_bool() void;
360591
361export fn zig_ret_struct_u64() Struct_u64 {
362 return .{ .a = 19 };
363}
592test "@Vector(32, bool)" {
593 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
364594
365export fn zig_struct_u64(s: Struct_u64, i: usize) void {
366 expect(s.a == 20) catch @panic("test failure");
367 expect(i == 21) catch @panic("test failure");
595 const vec = c_ret_vector_32_bool();
596 try expect(vec[0] == true);
597 try expect(vec[1] == false);
598 try expect(vec[2] == true);
599 try expect(vec[3] == true);
600 try expect(vec[4] == true);
601 try expect(vec[5] == false);
602 try expect(vec[6] == true);
603 try expect(vec[7] == false);
604 try expect(vec[8] == true);
605 try expect(vec[9] == true);
606 try expect(vec[10] == true);
607 try expect(vec[11] == false);
608 try expect(vec[12] == true);
609 try expect(vec[13] == true);
610 try expect(vec[14] == false);
611 try expect(vec[15] == false);
612 try expect(vec[16] == true);
613 try expect(vec[17] == false);
614 try expect(vec[18] == false);
615 try expect(vec[19] == false);
616 try expect(vec[20] == false);
617 try expect(vec[21] == true);
618 try expect(vec[22] == true);
619 try expect(vec[23] == true);
620 try expect(vec[24] == false);
621 try expect(vec[25] == true);
622 try expect(vec[26] == false);
623 try expect(vec[27] == false);
624 try expect(vec[28] == true);
625 try expect(vec[29] == false);
626 try expect(vec[30] == false);
627 try expect(vec[31] == false);
628 c_vector_32_bool(.{
629 true,
630 false,
631 true,
632 true,
633 false,
634 false,
635 true,
636 false,
637 true,
638 false,
639 true,
640 true,
641 true,
642 false,
643 false,
644 true,
645 false,
646 true,
647 false,
648 true,
649 true,
650 true,
651 true,
652 true,
653 false,
654 true,
655 true,
656 true,
657 false,
658 true,
659 true,
660 false,
661 });
662 c_test_vector_32_bool();
368663}
369664
370extern fn c_ret_struct_u64() Struct_u64;
371
372extern fn c_struct_u64(Struct_u64, usize) void;
665comptime {
666 skip: {
667 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
668 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
373669
374test "C ABI struct u64" {
375 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
376 if (builtin.cpu.arch == .riscv32) return error.SkipZigTest;
377 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
378 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
379
380 const s = c_ret_struct_u64();
381 try expect(s.a == 22);
382 c_struct_u64(.{ .a = 23 }, 24);
383}
384
385const Struct_u64_u64 = extern struct {
386 a: u64,
387 b: u64,
388};
389
390export fn zig_ret_struct_u64_u64() Struct_u64_u64 {
391 return .{ .a = 1, .b = 2 };
392}
393
394export fn zig_struct_u64_u64_0(s: Struct_u64_u64, i: usize) void {
395 expect(s.a == 3) catch @panic("test failure");
396 expect(s.b == 4) catch @panic("test failure");
397 expect(i == 1) catch @panic("test failure");
398}
399export fn zig_struct_u64_u64_1(_: usize, s: Struct_u64_u64, i: usize) void {
400 expect(s.a == 5) catch @panic("test failure");
401 expect(s.b == 6) catch @panic("test failure");
402 expect(i == 2) catch @panic("test failure");
403}
404export fn zig_struct_u64_u64_2(_: usize, _: usize, s: Struct_u64_u64, i: usize) void {
405 expect(s.a == 7) catch @panic("test failure");
406 expect(s.b == 8) catch @panic("test failure");
407 expect(i == 3) catch @panic("test failure");
408}
409export fn zig_struct_u64_u64_3(_: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
410 expect(s.a == 9) catch @panic("test failure");
411 expect(s.b == 10) catch @panic("test failure");
412 expect(i == 4) catch @panic("test failure");
413}
414export fn zig_struct_u64_u64_4(_: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
415 expect(s.a == 11) catch @panic("test failure");
416 expect(s.b == 12) catch @panic("test failure");
417 expect(i == 5) catch @panic("test failure");
418}
419export fn zig_struct_u64_u64_5(_: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
420 expect(s.a == 13) catch @panic("test failure");
421 expect(s.b == 14) catch @panic("test failure");
422 expect(i == 6) catch @panic("test failure");
423}
424export fn zig_struct_u64_u64_6(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
425 expect(s.a == 15) catch @panic("test failure");
426 expect(s.b == 16) catch @panic("test failure");
427 expect(i == 7) catch @panic("test failure");
428}
429export fn zig_struct_u64_u64_7(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
430 expect(s.a == 17) catch @panic("test failure");
431 expect(s.b == 18) catch @panic("test failure");
432 expect(i == 8) catch @panic("test failure");
433}
434export fn zig_struct_u64_u64_8(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
435 expect(s.a == 19) catch @panic("test failure");
436 expect(s.b == 20) catch @panic("test failure");
437 expect(i == 9) catch @panic("test failure");
438}
439
440extern fn c_ret_struct_u64_u64() Struct_u64_u64;
441
442extern fn c_struct_u64_u64_0(Struct_u64_u64, usize) void;
443extern fn c_struct_u64_u64_1(usize, Struct_u64_u64, usize) void;
444extern fn c_struct_u64_u64_2(usize, usize, Struct_u64_u64, usize) void;
445extern fn c_struct_u64_u64_3(usize, usize, usize, Struct_u64_u64, usize) void;
446extern fn c_struct_u64_u64_4(usize, usize, usize, usize, Struct_u64_u64, usize) void;
447extern fn c_struct_u64_u64_5(usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
448extern fn c_struct_u64_u64_6(usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
449extern fn c_struct_u64_u64_7(usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
450extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
451
452test "C ABI struct u64, u64" {
453 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
454 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
455 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
456 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
457
458 const s = c_ret_struct_u64_u64();
459 try expect(s.a == 21);
460 try expect(s.b == 22);
461 c_struct_u64_u64_0(.{ .a = 23, .b = 24 }, 1);
462 c_struct_u64_u64_1(0, .{ .a = 25, .b = 26 }, 2);
463 c_struct_u64_u64_2(0, 1, .{ .a = 27, .b = 28 }, 3);
464 c_struct_u64_u64_3(0, 1, 2, .{ .a = 29, .b = 30 }, 4);
465 c_struct_u64_u64_4(0, 1, 2, 3, .{ .a = 31, .b = 32 }, 5);
466 c_struct_u64_u64_5(0, 1, 2, 3, 4, .{ .a = 33, .b = 34 }, 6);
467 c_struct_u64_u64_6(0, 1, 2, 3, 4, 5, .{ .a = 35, .b = 36 }, 7);
468 c_struct_u64_u64_7(0, 1, 2, 3, 4, 5, 6, .{ .a = 37, .b = 38 }, 8);
469 c_struct_u64_u64_8(0, 1, 2, 3, 4, 5, 6, 7, .{ .a = 39, .b = 40 }, 9);
470}
471
472const Struct_f32 = extern struct {
473 a: f32,
474};
475
476export fn zig_ret_struct_f32() Struct_f32 {
477 return .{ .a = 2.5 };
478}
479
480export fn zig_struct_f32(s: Struct_f32) void {
481 expect(s.a == 2.5) catch @panic("test failure");
482}
483
484extern fn c_ret_struct_f32() Struct_f32;
485
486extern fn c_struct_f32(Struct_f32) void;
487
488test "C ABI struct f32" {
489 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
490 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
491 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
492 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
493
494 const s = c_ret_struct_f32();
495 try expect(s.a == 2.5);
496 c_struct_f32(.{ .a = 2.5 });
497}
498
499const Struct_f64 = extern struct {
500 a: f64,
501};
502
503export fn zig_ret_struct_f64() Struct_f64 {
504 return .{ .a = 2.5 };
505}
506
507export fn zig_struct_f64(s: Struct_f64) void {
508 expect(s.a == 2.5) catch @panic("test failure");
509}
510
511extern fn c_ret_struct_f64() Struct_f64;
512
513extern fn c_struct_f64(Struct_f64) void;
514
515test "C ABI struct f64" {
516 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
517 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
518 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
519 if (builtin.cpu.arch == .riscv32) return error.SkipZigTest;
520 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
521 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
522
523 const s = c_ret_struct_f64();
524 try expect(s.a == 2.5);
525 c_struct_f64(.{ .a = 2.5 });
670 _ = struct {
671 export fn zig_ret_vector_64_bool() @Vector(64, bool) {
672 return .{
673 true,
674 false,
675 true,
676 false,
677 false,
678 true,
679 false,
680 true,
681 true,
682 false,
683 true,
684 false,
685 true,
686 false,
687 false,
688 true,
689 false,
690 false,
691 true,
692 true,
693 false,
694 false,
695 true,
696 false,
697 false,
698 true,
699 true,
700 true,
701 true,
702 true,
703 false,
704 false,
705 true,
706 true,
707 true,
708 true,
709 false,
710 true,
711 false,
712 true,
713 true,
714 true,
715 true,
716 true,
717 false,
718 false,
719 false,
720 true,
721 true,
722 true,
723 false,
724 true,
725 true,
726 true,
727 false,
728 false,
729 false,
730 true,
731 false,
732 false,
733 true,
734 false,
735 true,
736 false,
737 };
738 }
739 export fn zig_vector_64_bool(vec: @Vector(64, bool)) void {
740 expect(vec[0] == true) catch @panic("test failure");
741 expect(vec[1] == true) catch @panic("test failure");
742 expect(vec[2] == false) catch @panic("test failure");
743 expect(vec[3] == true) catch @panic("test failure");
744 expect(vec[4] == false) catch @panic("test failure");
745 expect(vec[5] == true) catch @panic("test failure");
746 expect(vec[6] == false) catch @panic("test failure");
747 expect(vec[7] == false) catch @panic("test failure");
748 expect(vec[8] == true) catch @panic("test failure");
749 expect(vec[9] == true) catch @panic("test failure");
750 expect(vec[10] == true) catch @panic("test failure");
751 expect(vec[11] == true) catch @panic("test failure");
752 expect(vec[12] == true) catch @panic("test failure");
753 expect(vec[13] == true) catch @panic("test failure");
754 expect(vec[14] == true) catch @panic("test failure");
755 expect(vec[15] == false) catch @panic("test failure");
756 expect(vec[16] == false) catch @panic("test failure");
757 expect(vec[17] == true) catch @panic("test failure");
758 expect(vec[18] == true) catch @panic("test failure");
759 expect(vec[19] == false) catch @panic("test failure");
760 expect(vec[20] == true) catch @panic("test failure");
761 expect(vec[21] == true) catch @panic("test failure");
762 expect(vec[22] == true) catch @panic("test failure");
763 expect(vec[23] == true) catch @panic("test failure");
764 expect(vec[24] == false) catch @panic("test failure");
765 expect(vec[25] == false) catch @panic("test failure");
766 expect(vec[26] == true) catch @panic("test failure");
767 expect(vec[27] == false) catch @panic("test failure");
768 expect(vec[28] == false) catch @panic("test failure");
769 expect(vec[29] == true) catch @panic("test failure");
770 expect(vec[30] == false) catch @panic("test failure");
771 expect(vec[31] == true) catch @panic("test failure");
772 expect(vec[32] == false) catch @panic("test failure");
773 expect(vec[33] == true) catch @panic("test failure");
774 expect(vec[34] == true) catch @panic("test failure");
775 expect(vec[35] == false) catch @panic("test failure");
776 expect(vec[36] == true) catch @panic("test failure");
777 expect(vec[37] == true) catch @panic("test failure");
778 expect(vec[38] == false) catch @panic("test failure");
779 expect(vec[39] == false) catch @panic("test failure");
780 expect(vec[40] == true) catch @panic("test failure");
781 expect(vec[41] == true) catch @panic("test failure");
782 expect(vec[42] == true) catch @panic("test failure");
783 expect(vec[43] == true) catch @panic("test failure");
784 expect(vec[44] == true) catch @panic("test failure");
785 expect(vec[45] == false) catch @panic("test failure");
786 expect(vec[46] == true) catch @panic("test failure");
787 expect(vec[47] == false) catch @panic("test failure");
788 expect(vec[48] == false) catch @panic("test failure");
789 expect(vec[49] == false) catch @panic("test failure");
790 expect(vec[50] == false) catch @panic("test failure");
791 expect(vec[51] == false) catch @panic("test failure");
792 expect(vec[52] == true) catch @panic("test failure");
793 expect(vec[53] == false) catch @panic("test failure");
794 expect(vec[54] == false) catch @panic("test failure");
795 expect(vec[55] == true) catch @panic("test failure");
796 expect(vec[56] == true) catch @panic("test failure");
797 expect(vec[57] == false) catch @panic("test failure");
798 expect(vec[58] == false) catch @panic("test failure");
799 expect(vec[59] == false) catch @panic("test failure");
800 expect(vec[60] == true) catch @panic("test failure");
801 expect(vec[61] == true) catch @panic("test failure");
802 expect(vec[62] == true) catch @panic("test failure");
803 expect(vec[63] == true) catch @panic("test failure");
804 }
805 };
806 }
526807}
527808
528const Struct_f32a8 = extern struct {
529 a: f32 align(8),
530};
809extern fn c_ret_vector_64_bool() @Vector(64, bool);
810extern fn c_vector_64_bool(@Vector(64, bool)) void;
811extern fn c_test_vector_64_bool() void;
531812
532export fn zig_ret_struct_f32a8() Struct_f32a8 {
533 return .{ .a = 1.25 };
534}
813test "@Vector(64, bool)" {
814 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
535815
536export fn zig_struct_f32a8(s: Struct_f32a8, f: f32) void {
537 expect(s.a == 2.75) catch @panic("test failure");
538 expect(f == 3.5) catch @panic("test failure");
816 const vec = c_ret_vector_64_bool();
817 try expect(vec[0] == false);
818 try expect(vec[1] == true);
819 try expect(vec[2] == false);
820 try expect(vec[3] == true);
821 try expect(vec[4] == true);
822 try expect(vec[5] == true);
823 try expect(vec[6] == false);
824 try expect(vec[7] == true);
825 try expect(vec[8] == true);
826 try expect(vec[9] == true);
827 try expect(vec[10] == true);
828 try expect(vec[11] == true);
829 try expect(vec[12] == true);
830 try expect(vec[13] == false);
831 try expect(vec[14] == true);
832 try expect(vec[15] == true);
833 try expect(vec[16] == true);
834 try expect(vec[17] == false);
835 try expect(vec[18] == false);
836 try expect(vec[19] == false);
837 try expect(vec[20] == true);
838 try expect(vec[21] == true);
839 try expect(vec[22] == false);
840 try expect(vec[23] == true);
841 try expect(vec[24] == false);
842 try expect(vec[25] == true);
843 try expect(vec[26] == false);
844 try expect(vec[27] == true);
845 try expect(vec[28] == false);
846 try expect(vec[29] == true);
847 try expect(vec[30] == false);
848 try expect(vec[31] == true);
849 try expect(vec[32] == false);
850 try expect(vec[33] == false);
851 try expect(vec[34] == true);
852 try expect(vec[35] == true);
853 try expect(vec[36] == false);
854 try expect(vec[37] == false);
855 try expect(vec[38] == false);
856 try expect(vec[39] == true);
857 try expect(vec[40] == true);
858 try expect(vec[41] == true);
859 try expect(vec[42] == true);
860 try expect(vec[43] == false);
861 try expect(vec[44] == false);
862 try expect(vec[45] == false);
863 try expect(vec[46] == true);
864 try expect(vec[47] == true);
865 try expect(vec[48] == false);
866 try expect(vec[49] == false);
867 try expect(vec[50] == true);
868 try expect(vec[51] == false);
869 try expect(vec[52] == false);
870 try expect(vec[53] == false);
871 try expect(vec[54] == false);
872 try expect(vec[55] == true);
873 try expect(vec[56] == false);
874 try expect(vec[57] == false);
875 try expect(vec[58] == false);
876 try expect(vec[59] == true);
877 try expect(vec[60] == true);
878 try expect(vec[61] == true);
879 try expect(vec[62] == true);
880 try expect(vec[63] == true);
881 c_vector_64_bool(.{
882 true,
883 true,
884 true,
885 false,
886 true,
887 false,
888 false,
889 false,
890 true,
891 false,
892 false,
893 false,
894 false,
895 true,
896 true,
897 true,
898 true,
899 false,
900 false,
901 true,
902 false,
903 true,
904 false,
905 true,
906 true,
907 true,
908 true,
909 true,
910 true,
911 true,
912 false,
913 false,
914 true,
915 true,
916 false,
917 true,
918 false,
919 false,
920 true,
921 true,
922 true,
923 false,
924 false,
925 true,
926 true,
927 false,
928 true,
929 false,
930 true,
931 false,
932 false,
933 true,
934 false,
935 true,
936 true,
937 true,
938 true,
939 true,
940 false,
941 false,
942 true,
943 false,
944 true,
945 false,
946 });
947 c_test_vector_64_bool();
539948}
540949
541extern fn c_ret_struct_f32a8() Struct_f32a8;
542
543extern fn c_struct_f32a8(Struct_f32a8, f32) void;
950comptime {
951 skip: {
952 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
953 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
544954
545test "C ABI struct f32 align(8)" {
546 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
547 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
548 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
549 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
550 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
551 if (builtin.cpu.arch == .riscv32) return error.SkipZigTest;
552 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
553 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
554
555 const s = c_ret_struct_f32a8();
556 try expect(s.a == 4.125);
557 c_struct_f32a8(.{ .a = 5.375 }, 6.5);
558}
559
560const Struct_f32a8_f32a8 = extern struct {
561 a: f32 align(8),
562 b: f32 align(8),
563};
564
565export fn zig_ret_struct_f32a8_f32a8() Struct_f32a8_f32a8 {
566 return .{ .a = 1.25, .b = 2.75 };
567}
568
569export fn zig_struct_f32a8_f32a8(s: Struct_f32a8_f32a8, f: f32) void {
570 expect(s.a == 3.125) catch @panic("test failure");
571 expect(s.b == 4.375) catch @panic("test failure");
572 expect(f == 5.5) catch @panic("test failure");
573}
574
575extern fn c_ret_struct_f32a8_f32a8() Struct_f32a8_f32a8;
576
577extern fn c_struct_f32a8_f32a8(Struct_f32a8_f32a8, f32) void;
578
579test "C ABI struct f32 align(8), f32 align(8)" {
580 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
581 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
582 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
583 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
584 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
585 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
586 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
587 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
588
589 const s = c_ret_struct_f32a8_f32a8();
590 try expect(s.a == 6.625);
591 try expect(s.b == 7.875);
592 c_struct_f32a8_f32a8(.{ .a = 8.0625, .b = 9.1875 }, 10.5);
593}
594
595const Struct_f32f32_f32 = extern struct {
596 a: extern struct { b: f32, c: f32 },
597 d: f32,
598};
599
600export fn zig_ret_struct_f32f32_f32() Struct_f32f32_f32 {
601 return .{ .a = .{ .b = 1.0, .c = 2.0 }, .d = 3.0 };
602}
603
604export fn zig_struct_f32f32_f32(s: Struct_f32f32_f32) void {
605 expect(s.a.b == 1.0) catch @panic("test failure");
606 expect(s.a.c == 2.0) catch @panic("test failure");
607 expect(s.d == 3.0) catch @panic("test failure");
608}
609
610extern fn c_ret_struct_f32f32_f32() Struct_f32f32_f32;
611
612extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
613
614test "C ABI struct {f32, f32}, f32" {
615 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
616 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
617 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
618 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
619 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
620 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
621
622 const s = c_ret_struct_f32f32_f32();
623 try expect(s.a.b == 1.0);
624 try expect(s.a.c == 2.0);
625 try expect(s.d == 3.0);
626 c_struct_f32f32_f32(.{ .a = .{ .b = 1.0, .c = 2.0 }, .d = 3.0 });
627}
628
629const Struct_f32_f32f32 = extern struct {
630 a: f32,
631 b: extern struct { c: f32, d: f32 },
632};
633
634export fn zig_ret_struct_f32_f32f32() Struct_f32_f32f32 {
635 return .{ .a = 1.0, .b = .{ .c = 2.0, .d = 3.0 } };
636}
637
638export fn zig_struct_f32_f32f32(s: Struct_f32_f32f32) void {
639 expect(s.a == 1.0) catch @panic("test failure");
640 expect(s.b.c == 2.0) catch @panic("test failure");
641 expect(s.b.d == 3.0) catch @panic("test failure");
642}
643
644extern fn c_ret_struct_f32_f32f32() Struct_f32_f32f32;
645
646extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
647
648test "C ABI struct f32 {f32,f32}" {
649 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
650 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
651 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
652 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
653 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
654 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
655
656 const s = c_ret_struct_f32_f32f32();
657 try expect(s.a == 1.0);
658 try expect(s.b.c == 2.0);
659 try expect(s.b.d == 3.0);
660 c_struct_f32_f32f32(.{ .a = 1.0, .b = .{ .c = 2.0, .d = 3.0 } });
661}
662
663const Struct_u32_Union_u32_u32u32 = extern struct {
664 a: u32,
665 b: extern union {
666 c: extern struct {
667 d: u32,
668 e: u32,
669 },
670 },
671};
672
673export fn zig_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32 {
674 return .{ .a = 1, .b = .{ .c = .{ .d = 2, .e = 3 } } };
675}
676
677export fn zig_struct_u32_union_u32_u32u32(s: Struct_u32_Union_u32_u32u32) void {
678 expect(s.a == 1) catch @panic("test failure");
679 expect(s.b.c.d == 2) catch @panic("test failure");
680 expect(s.b.c.e == 3) catch @panic("test failure");
681}
682
683extern fn c_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32;
684
685extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
686
687test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {
688 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
689 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
690 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
691 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
692 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
693
694 const s = c_ret_struct_u32_union_u32_u32u32();
695 try expect(s.a == 1);
696 try expect(s.b.c.d == 2);
697 try expect(s.b.c.e == 3);
698 c_struct_u32_union_u32_u32u32(.{ .a = 1, .b = .{ .c = .{ .d = 2, .e = 3 } } });
699}
700
701const Struct_i32_i32 = extern struct {
702 a: i32,
703 b: i32,
704};
705extern fn c_mut_struct_i32_i32(Struct_i32_i32) Struct_i32_i32;
706extern fn c_struct_i32_i32(Struct_i32_i32) void;
707
708test "C ABI struct i32 i32" {
709 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
710 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
711 if (builtin.cpu.arch == .riscv32) return error.SkipZigTest;
712 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
713 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
714 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
715
716 const s: Struct_i32_i32 = .{
717 .a = 1,
718 .b = 2,
719 };
720 const mut_res = c_mut_struct_i32_i32(s);
721 try expect(s.a == 1);
722 try expect(s.b == 2);
723 try expect(mut_res.a == 101);
724 try expect(mut_res.b == 252);
725 c_struct_i32_i32(s);
726}
727
728export fn zig_struct_i32_i32(s: Struct_i32_i32) void {
729 expect(s.a == 1) catch @panic("test failure: zig_struct_i32_i32 1");
730 expect(s.b == 2) catch @panic("test failure: zig_struct_i32_i32 2");
731}
732
733const BigStruct = extern struct {
734 a: u64,
735 b: u64,
736 c: u64,
737 d: u64,
738 e: u8,
739};
740extern fn c_big_struct(BigStruct) void;
741
742test "C ABI big struct" {
743 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
744 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
745 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
746 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
747 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
748
749 const s = BigStruct{
750 .a = 1,
751 .b = 2,
752 .c = 3,
753 .d = 4,
754 .e = 5,
755 };
756 c_big_struct(s);
757}
758
759export fn zig_big_struct(x: BigStruct) void {
760 expect(x.a == 1) catch @panic("test failure: zig_big_struct 1");
761 expect(x.b == 2) catch @panic("test failure: zig_big_struct 2");
762 expect(x.c == 3) catch @panic("test failure: zig_big_struct 3");
763 expect(x.d == 4) catch @panic("test failure: zig_big_struct 4");
764 expect(x.e == 5) catch @panic("test failure: zig_big_struct 5");
765}
766
767const BigUnion = extern union {
768 a: BigStruct,
769};
770extern fn c_big_union(BigUnion) void;
771
772test "C ABI big union" {
773 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
774 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
775 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
776 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
777
778 const x = BigUnion{
779 .a = BigStruct{
780 .a = 1,
781 .b = 2,
782 .c = 3,
783 .d = 4,
784 .e = 5,
785 },
786 };
787 c_big_union(x);
788}
789
790export fn zig_big_union(x: BigUnion) void {
791 expect(x.a.a == 1) catch @panic("test failure: zig_big_union a");
792 expect(x.a.b == 2) catch @panic("test failure: zig_big_union b");
793 expect(x.a.c == 3) catch @panic("test failure: zig_big_union c");
794 expect(x.a.d == 4) catch @panic("test failure: zig_big_union d");
795 expect(x.a.e == 5) catch @panic("test failure: zig_big_union e");
796}
797
798const MedStructMixed = extern struct {
799 a: u32,
800 b: f32,
801 c: f32,
802 d: u32 = 0,
803};
804extern fn c_med_struct_mixed(MedStructMixed) void;
805extern fn c_ret_med_struct_mixed() MedStructMixed;
806
807test "C ABI medium struct of ints and floats" {
808 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
809 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
810 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
811 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
812 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
813
814 const s = MedStructMixed{
815 .a = 1234,
816 .b = 100.0,
817 .c = 1337.0,
818 };
819 c_med_struct_mixed(s);
820 const s2 = c_ret_med_struct_mixed();
821 try expect(s2.a == 1234);
822 try expect(s2.b == 100.0);
823 try expect(s2.c == 1337.0);
824}
825
826export fn zig_med_struct_mixed(x: MedStructMixed) void {
827 expect(x.a == 1234) catch @panic("test failure");
828 expect(x.b == 100.0) catch @panic("test failure");
829 expect(x.c == 1337.0) catch @panic("test failure");
830}
831
832const SmallStructInts = extern struct {
833 a: u8,
834 b: u8,
835 c: u8,
836 d: u8,
837};
838extern fn c_small_struct_ints(SmallStructInts) void;
839extern fn c_ret_small_struct_ints() SmallStructInts;
840
841test "C ABI small struct of ints" {
842 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
843 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
844 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
845 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
846 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
847 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
848
849 const s = SmallStructInts{
850 .a = 1,
851 .b = 2,
852 .c = 3,
853 .d = 4,
854 };
855 c_small_struct_ints(s);
856 const s2 = c_ret_small_struct_ints();
857 try expect(s2.a == 1);
858 try expect(s2.b == 2);
859 try expect(s2.c == 3);
860 try expect(s2.d == 4);
861}
862
863export fn zig_small_struct_ints(x: SmallStructInts) void {
864 expect(x.a == 1) catch @panic("test failure");
865 expect(x.b == 2) catch @panic("test failure");
866 expect(x.c == 3) catch @panic("test failure");
867 expect(x.d == 4) catch @panic("test failure");
868}
869
870const MedStructInts = extern struct {
871 x: i32,
872 y: i32,
873 z: i32,
874};
875extern fn c_med_struct_ints(MedStructInts) void;
876extern fn c_ret_med_struct_ints() MedStructInts;
877
878test "C ABI medium struct of ints" {
879 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
880 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
881 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
882 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
883 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
884
885 const s = MedStructInts{
886 .x = 1,
887 .y = 2,
888 .z = 3,
889 };
890 c_med_struct_ints(s);
891 const s2 = c_ret_med_struct_ints();
892 try expect(s2.x == 1);
893 try expect(s2.y == 2);
894 try expect(s2.z == 3);
895}
896
897export fn zig_med_struct_ints(s: MedStructInts) void {
898 expect(s.x == 1) catch @panic("test failure");
899 expect(s.y == 2) catch @panic("test failure");
900 expect(s.z == 3) catch @panic("test failure");
901}
902
903const SmallPackedStruct = packed struct(u8) {
904 a: u2,
905 b: u2,
906 c: u2,
907 d: u2,
908};
909extern fn c_small_packed_struct(SmallPackedStruct) void;
910extern fn c_ret_small_packed_struct() SmallPackedStruct;
911
912export fn zig_small_packed_struct(x: SmallPackedStruct) void {
913 expect(x.a == 0) catch @panic("test failure");
914 expect(x.b == 1) catch @panic("test failure");
915 expect(x.c == 2) catch @panic("test failure");
916 expect(x.d == 3) catch @panic("test failure");
917}
918
919test "C ABI small packed struct" {
920 const s = SmallPackedStruct{ .a = 0, .b = 1, .c = 2, .d = 3 };
921 c_small_packed_struct(s);
922 const s2 = c_ret_small_packed_struct();
923 try expect(s2.a == 0);
924 try expect(s2.b == 1);
925 try expect(s2.c == 2);
926 try expect(s2.d == 3);
927}
928
929const BigPackedStruct = packed struct(u128) {
930 a: u64,
931 b: u64,
932};
933extern fn c_big_packed_struct(BigPackedStruct) void;
934extern fn c_ret_big_packed_struct() BigPackedStruct;
935
936export fn zig_big_packed_struct(x: BigPackedStruct) void {
937 expect(x.a == 1) catch @panic("test failure");
938 expect(x.b == 2) catch @panic("test failure");
939}
940
941test "C ABI big packed struct" {
942 if (!have_i128) return error.SkipZigTest;
943
944 const s = BigPackedStruct{ .a = 1, .b = 2 };
945 c_big_packed_struct(s);
946 const s2 = c_ret_big_packed_struct();
947 try expect(s2.a == 1);
948 try expect(s2.b == 2);
949}
950
951const SplitStructInt = extern struct {
952 a: u64,
953 b: u8,
954 c: u32,
955};
956extern fn c_split_struct_ints(SplitStructInt) void;
957
958test "C ABI split struct of ints" {
959 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
960 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
961 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
962 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
963 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
964 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
965
966 const s = SplitStructInt{
967 .a = 1234,
968 .b = 100,
969 .c = 1337,
970 };
971 c_split_struct_ints(s);
972}
973
974export fn zig_split_struct_ints(x: SplitStructInt) void {
975 expect(x.a == 1234) catch @panic("test failure");
976 expect(x.b == 100) catch @panic("test failure");
977 expect(x.c == 1337) catch @panic("test failure");
978}
979
980const SplitStructMixed = extern struct {
981 a: u64,
982 b: u8,
983 c: f32,
984};
985extern fn c_split_struct_mixed(SplitStructMixed) void;
986extern fn c_ret_split_struct_mixed() SplitStructMixed;
987
988test "C ABI split struct of ints and floats" {
989 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
990 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
991 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
992 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
993 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
994 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
995
996 const s = SplitStructMixed{
997 .a = 1234,
998 .b = 100,
999 .c = 1337.0,
1000 };
1001 c_split_struct_mixed(s);
1002 const s2 = c_ret_split_struct_mixed();
1003 try expect(s2.a == 1234);
1004 try expect(s2.b == 100);
1005 try expect(s2.c == 1337.0);
1006}
1007
1008export fn zig_split_struct_mixed(x: SplitStructMixed) void {
1009 expect(x.a == 1234) catch @panic("test failure");
1010 expect(x.b == 100) catch @panic("test failure");
1011 expect(x.c == 1337.0) catch @panic("test failure");
1012}
1013
1014extern fn c_big_struct_both(BigStruct) BigStruct;
1015
1016extern fn c_multiple_struct_ints(Rect, Rect) void;
1017extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;
1018
1019test "C ABI sret and byval together" {
1020 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1021 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1022 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1023 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1024 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1025
1026 const s = BigStruct{
1027 .a = 1,
1028 .b = 2,
1029 .c = 3,
1030 .d = 4,
1031 .e = 5,
1032 };
1033 const y = c_big_struct_both(s);
1034 try expect(y.a == 10);
1035 try expect(y.b == 11);
1036 try expect(y.c == 12);
1037 try expect(y.d == 13);
1038 try expect(y.e == 14);
1039}
1040
1041export fn zig_big_struct_both(x: BigStruct) BigStruct {
1042 expect(x.a == 30) catch @panic("test failure");
1043 expect(x.b == 31) catch @panic("test failure");
1044 expect(x.c == 32) catch @panic("test failure");
1045 expect(x.d == 33) catch @panic("test failure");
1046 expect(x.e == 34) catch @panic("test failure");
1047 const s = BigStruct{
1048 .a = 20,
1049 .b = 21,
1050 .c = 22,
1051 .d = 23,
1052 .e = 24,
1053 };
1054 return s;
1055}
1056
1057const Vector3 = extern struct {
1058 x: f32,
1059 y: f32,
1060 z: f32,
1061};
1062extern fn c_small_struct_floats(Vector3) void;
1063extern fn c_small_struct_floats_extra(Vector3, ?[*]const u8) void;
1064
1065const Vector5 = extern struct {
1066 x: f32,
1067 y: f32,
1068 z: f32,
1069 w: f32,
1070 q: f32,
1071};
1072extern fn c_big_struct_floats(Vector5) void;
1073
1074test "C ABI structs of floats as parameter" {
1075 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1076 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1077 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1078 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1079 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1080
1081 const v3 = Vector3{
1082 .x = 3.0,
1083 .y = 6.0,
1084 .z = 12.0,
1085 };
1086 c_small_struct_floats(v3);
1087 c_small_struct_floats_extra(v3, "hello");
1088
1089 const v5 = Vector5{
1090 .x = 76.0,
1091 .y = -1.0,
1092 .z = -12.0,
1093 .w = 69.0,
1094 .q = 55,
1095 };
1096 c_big_struct_floats(v5);
1097}
1098
1099const Rect = extern struct {
1100 left: u32,
1101 right: u32,
1102 top: u32,
1103 bottom: u32,
1104};
1105
1106export fn zig_multiple_struct_ints(x: Rect, y: Rect) void {
1107 expect(x.left == 1) catch @panic("test failure");
1108 expect(x.right == 21) catch @panic("test failure");
1109 expect(x.top == 16) catch @panic("test failure");
1110 expect(x.bottom == 4) catch @panic("test failure");
1111 expect(y.left == 178) catch @panic("test failure");
1112 expect(y.right == 189) catch @panic("test failure");
1113 expect(y.top == 21) catch @panic("test failure");
1114 expect(y.bottom == 15) catch @panic("test failure");
1115}
1116
1117test "C ABI structs of ints as multiple parameters" {
1118 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1119 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1120 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1121 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1122 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1123
1124 const r1 = Rect{
1125 .left = 1,
1126 .right = 21,
1127 .top = 16,
1128 .bottom = 4,
1129 };
1130 const r2 = Rect{
1131 .left = 178,
1132 .right = 189,
1133 .top = 21,
1134 .bottom = 15,
1135 };
1136 c_multiple_struct_ints(r1, r2);
1137}
1138
1139const FloatRect = extern struct {
1140 left: f32,
1141 right: f32,
1142 top: f32,
1143 bottom: f32,
1144};
1145
1146export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {
1147 expect(x.left == 1) catch @panic("test failure");
1148 expect(x.right == 21) catch @panic("test failure");
1149 expect(x.top == 16) catch @panic("test failure");
1150 expect(x.bottom == 4) catch @panic("test failure");
1151 expect(y.left == 178) catch @panic("test failure");
1152 expect(y.right == 189) catch @panic("test failure");
1153 expect(y.top == 21) catch @panic("test failure");
1154 expect(y.bottom == 15) catch @panic("test failure");
1155}
1156
1157test "C ABI structs of floats as multiple parameters" {
1158 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1159 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1160 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1161 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1162 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1163
1164 const r1 = FloatRect{
1165 .left = 1,
1166 .right = 21,
1167 .top = 16,
1168 .bottom = 4,
1169 };
1170 const r2 = FloatRect{
1171 .left = 178,
1172 .right = 189,
1173 .top = 21,
1174 .bottom = 15,
1175 };
1176 c_multiple_struct_floats(r1, r2);
1177}
1178
1179export fn zig_ret_bool() bool {
1180 return true;
1181}
1182export fn zig_ret_u8() u8 {
1183 return 0xff;
1184}
1185export fn zig_ret_u16() u16 {
1186 return 0xffff;
1187}
1188export fn zig_ret_u32() u32 {
1189 return 0xffffffff;
1190}
1191export fn zig_ret_u64() u64 {
1192 return 0xffffffffffffffff;
1193}
1194export fn zig_ret_i8() i8 {
1195 return -1;
1196}
1197export fn zig_ret_i16() i16 {
1198 return -1;
1199}
1200export fn zig_ret_i32() i32 {
1201 return -1;
1202}
1203export fn zig_ret_i64() i64 {
1204 return -1;
1205}
1206
1207export fn zig_ret_small_struct_ints() SmallStructInts {
1208 return .{
1209 .a = 1,
1210 .b = 2,
1211 .c = 3,
1212 .d = 4,
1213 };
1214}
1215
1216export fn zig_ret_med_struct_ints() MedStructInts {
1217 return .{
1218 .x = 1,
1219 .y = 2,
1220 .z = 3,
1221 };
1222}
1223
1224export fn zig_ret_med_struct_mixed() MedStructMixed {
1225 return .{
1226 .a = 1234,
1227 .b = 100.0,
1228 .c = 1337.0,
1229 };
1230}
1231
1232export fn zig_ret_split_struct_mixed() SplitStructMixed {
1233 return .{
1234 .a = 1234,
1235 .b = 100,
1236 .c = 1337.0,
1237 };
1238}
1239
1240extern fn c_ret_bool() bool;
1241extern fn c_ret_u8() u8;
1242extern fn c_ret_u16() u16;
1243extern fn c_ret_u32() u32;
1244extern fn c_ret_u64() u64;
1245extern fn c_ret_i8() i8;
1246extern fn c_ret_i16() i16;
1247extern fn c_ret_i32() i32;
1248extern fn c_ret_i64() i64;
1249
1250test "C ABI integer return types" {
1251 try expect(c_ret_bool() == true);
1252
1253 try expect(c_ret_u8() == 0xff);
1254 try expect(c_ret_u16() == 0xffff);
1255 try expect(c_ret_u32() == 0xffffffff);
1256 try expect(c_ret_u64() == 0xffffffffffffffff);
1257
1258 try expect(c_ret_i8() == -1);
1259 try expect(c_ret_i16() == -1);
1260 try expect(c_ret_i32() == -1);
1261 try expect(c_ret_i64() == -1);
1262}
1263
1264const StructWithArray = extern struct {
1265 a: i32,
1266 padding: [4]u8,
1267 b: i64,
1268};
1269extern fn c_struct_with_array(StructWithArray) void;
1270extern fn c_ret_struct_with_array() StructWithArray;
1271
1272test "Struct with array as padding." {
1273 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1274 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1275 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1276 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1277 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1278 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1279
1280 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
1281
1282 const x = c_ret_struct_with_array();
1283 try expect(x.a == 4);
1284 try expect(x.b == 155);
1285}
1286
1287const FloatArrayStruct = extern struct {
1288 origin: extern struct {
1289 x: f64,
1290 y: f64,
1291 },
1292 size: extern struct {
1293 width: f64,
1294 height: f64,
1295 },
1296};
1297
1298extern fn c_float_array_struct(FloatArrayStruct) void;
1299extern fn c_ret_float_array_struct() FloatArrayStruct;
1300
1301test "Float array like struct" {
1302 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1303 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1304 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1305 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1306 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1307
1308 c_float_array_struct(.{
1309 .origin = .{
1310 .x = 5,
1311 .y = 6,
1312 },
1313 .size = .{
1314 .width = 7,
1315 .height = 8,
1316 },
1317 });
1318
1319 const x = c_ret_float_array_struct();
1320 try expect(x.origin.x == 1);
1321 try expect(x.origin.y == 2);
1322 try expect(x.size.width == 3);
1323 try expect(x.size.height == 4);
1324}
1325
1326const SmallVec = @Vector(2, u32);
1327
1328extern fn c_small_vec(SmallVec) void;
1329extern fn c_ret_small_vec() SmallVec;
1330
1331test "small simd vector" {
1332 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1333 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1334 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1335 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1336
1337 c_small_vec(.{ 1, 2 });
1338
1339 const x = c_ret_small_vec();
1340 try expect(x[0] == 3);
1341 try expect(x[1] == 4);
1342}
1343
1344const MediumVec = @Vector(4, usize);
1345
1346extern fn c_medium_vec(MediumVec) void;
1347extern fn c_ret_medium_vec() MediumVec;
1348
1349test "medium simd vector" {
1350 if (builtin.zig_backend == .stage2_x86_64 and !comptime builtin.cpu.has(.x86, .avx)) return error.SkipZigTest;
1351 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1352 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1353 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1354
1355 c_medium_vec(.{ 1, 2, 3, 4 });
1356
1357 const x = c_ret_medium_vec();
1358 try expect(x[0] == 5);
1359 try expect(x[1] == 6);
1360 try expect(x[2] == 7);
1361 try expect(x[3] == 8);
1362}
1363
1364const BigVec = @Vector(8, usize);
1365
1366extern fn c_big_vec(BigVec) void;
1367extern fn c_ret_big_vec() BigVec;
1368
1369test "big simd vector" {
1370 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1371
1372 if (builtin.cpu.arch.isMIPS64() and builtin.mode != .Debug) return error.SkipZigTest;
1373 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1374 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1375 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag.isDarwin() and builtin.mode != .Debug) return error.SkipZigTest;
1376 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1377
1378 c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });
1379
1380 const x = c_ret_big_vec();
1381 try expect(x[0] == 9);
1382 try expect(x[1] == 10);
1383 try expect(x[2] == 11);
1384 try expect(x[3] == 12);
1385 try expect(x[4] == 13);
1386 try expect(x[5] == 14);
1387 try expect(x[6] == 15);
1388 try expect(x[7] == 16);
1389}
1390
1391const Vector2Float = @Vector(2, f32);
1392const Vector4Float = @Vector(4, f32);
1393
1394extern fn c_vector_2_float(Vector2Float) void;
1395extern fn c_vector_4_float(Vector4Float) void;
1396
1397extern fn c_ret_vector_2_float() Vector2Float;
1398extern fn c_ret_vector_4_float() Vector4Float;
1399
1400test "float simd vectors" {
1401 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1402 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1403 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1404
1405 {
1406 c_vector_2_float(.{ 1.0, 2.0 });
1407 const vec = c_ret_vector_2_float();
1408 try expect(vec[0] == 1.0);
1409 try expect(vec[1] == 2.0);
1410 }
1411 {
1412 c_vector_4_float(.{ 1.0, 2.0, 3.0, 4.0 });
1413 const vec = c_ret_vector_4_float();
1414 try expect(vec[0] == 1.0);
1415 try expect(vec[1] == 2.0);
1416 try expect(vec[2] == 3.0);
1417 try expect(vec[3] == 4.0);
1418 }
1419}
1420
1421const Vector2Bool = @Vector(2, bool);
1422const Vector4Bool = @Vector(4, bool);
1423const Vector8Bool = @Vector(8, bool);
1424const Vector16Bool = @Vector(16, bool);
1425const Vector32Bool = @Vector(32, bool);
1426const Vector64Bool = @Vector(64, bool);
1427const Vector128Bool = @Vector(128, bool);
1428const Vector256Bool = @Vector(256, bool);
1429const Vector512Bool = @Vector(512, bool);
1430
1431extern fn c_vector_2_bool(Vector2Bool) void;
1432extern fn c_vector_4_bool(Vector4Bool) void;
1433extern fn c_vector_8_bool(Vector8Bool) void;
1434extern fn c_vector_16_bool(Vector16Bool) void;
1435extern fn c_vector_32_bool(Vector32Bool) void;
1436extern fn c_vector_64_bool(Vector64Bool) void;
1437extern fn c_vector_128_bool(Vector128Bool) void;
1438extern fn c_vector_256_bool(Vector256Bool) void;
1439extern fn c_vector_512_bool(Vector512Bool) void;
1440
1441extern fn c_ret_vector_2_bool() Vector2Bool;
1442extern fn c_ret_vector_4_bool() Vector4Bool;
1443extern fn c_ret_vector_8_bool() Vector8Bool;
1444extern fn c_ret_vector_16_bool() Vector16Bool;
1445extern fn c_ret_vector_32_bool() Vector32Bool;
1446extern fn c_ret_vector_64_bool() Vector64Bool;
1447extern fn c_ret_vector_128_bool() Vector128Bool;
1448extern fn c_ret_vector_256_bool() Vector256Bool;
1449extern fn c_ret_vector_512_bool() Vector512Bool;
1450
1451test "bool simd vector" {
1452 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
1453
1454 {
1455 c_vector_2_bool(.{
1456 true,
1457 true,
1458 });
1459
1460 const vec = c_ret_vector_2_bool();
1461 try expect(vec[0] == true);
1462 try expect(vec[1] == false);
1463 }
1464 {
1465 c_vector_4_bool(.{
1466 true,
1467 true,
1468 false,
1469 true,
1470 });
1471
1472 const vec = c_ret_vector_4_bool();
1473 try expect(vec[0] == true);
1474 try expect(vec[1] == false);
1475 try expect(vec[2] == true);
1476 try expect(vec[3] == false);
1477 }
1478 {
1479 c_vector_8_bool(.{
1480 true,
1481 false,
1482 true,
1483 true,
1484 true,
1485 true,
1486 false,
1487 true,
1488 });
1489
1490 const vec = c_ret_vector_8_bool();
1491 try expect(vec[0] == false);
1492 try expect(vec[1] == true);
1493 try expect(vec[2] == false);
1494 try expect(vec[3] == false);
1495 try expect(vec[4] == true);
1496 try expect(vec[5] == false);
1497 try expect(vec[6] == false);
1498 try expect(vec[7] == true);
1499 }
1500 {
1501 c_vector_16_bool(.{
1502 true,
1503 false,
1504 false,
1505 false,
1506 true,
1507 false,
1508 true,
1509 true,
1510 true,
1511 true,
1512 true,
1513 true,
1514 false,
1515 false,
1516 false,
1517 false,
1518 });
1519
1520 const vec = c_ret_vector_16_bool();
1521 try expect(vec[0] == true);
1522 try expect(vec[1] == true);
1523 try expect(vec[2] == false);
1524 try expect(vec[3] == false);
1525 try expect(vec[4] == false);
1526 try expect(vec[5] == false);
1527 try expect(vec[6] == true);
1528 try expect(vec[7] == false);
1529 try expect(vec[8] == true);
1530 try expect(vec[9] == false);
1531 try expect(vec[10] == false);
1532 try expect(vec[11] == true);
1533 try expect(vec[12] == true);
1534 try expect(vec[13] == false);
1535 try expect(vec[14] == true);
1536 try expect(vec[15] == true);
1537 }
1538 {
1539 c_vector_32_bool(.{
1540 true,
1541 false,
1542 true,
1543 true,
1544 false,
1545 false,
1546 true,
1547 false,
1548 true,
1549 false,
1550 true,
1551 true,
1552 true,
1553 false,
1554 false,
1555 true,
1556 false,
1557 true,
1558 false,
1559 true,
1560 true,
1561 true,
1562 true,
1563 true,
1564 false,
1565 true,
1566 true,
1567 true,
1568 false,
1569 true,
1570 true,
1571 false,
1572 });
1573
1574 const vec = c_ret_vector_32_bool();
1575 try expect(vec[0] == true);
1576 try expect(vec[1] == false);
1577 try expect(vec[2] == true);
1578 try expect(vec[3] == true);
1579 try expect(vec[4] == true);
1580 try expect(vec[5] == false);
1581 try expect(vec[6] == true);
1582 try expect(vec[7] == false);
1583 try expect(vec[8] == true);
1584 try expect(vec[9] == true);
1585 try expect(vec[10] == true);
1586 try expect(vec[11] == false);
1587 try expect(vec[12] == true);
1588 try expect(vec[13] == true);
1589 try expect(vec[14] == false);
1590 try expect(vec[15] == false);
1591 try expect(vec[16] == true);
1592 try expect(vec[17] == false);
1593 try expect(vec[18] == false);
1594 try expect(vec[19] == false);
1595 try expect(vec[20] == false);
1596 try expect(vec[21] == true);
1597 try expect(vec[22] == true);
1598 try expect(vec[23] == true);
1599 try expect(vec[24] == false);
1600 try expect(vec[25] == true);
1601 try expect(vec[26] == false);
1602 try expect(vec[27] == false);
1603 try expect(vec[28] == true);
1604 try expect(vec[29] == false);
1605 try expect(vec[30] == false);
1606 try expect(vec[31] == false);
1607 }
1608 {
1609 c_vector_64_bool(.{
1610 true,
1611 true,
1612 true,
1613 false,
1614 true,
1615 false,
1616 false,
1617 false,
1618 true,
1619 false,
1620 false,
1621 false,
1622 false,
1623 true,
1624 true,
1625 true,
1626 true,
1627 false,
1628 false,
1629 true,
1630 false,
1631 true,
1632 false,
1633 true,
1634 true,
1635 true,
1636 true,
1637 true,
1638 true,
1639 true,
1640 false,
1641 false,
1642 true,
1643 true,
1644 false,
1645 true,
1646 false,
1647 false,
1648 true,
1649 true,
1650 true,
1651 false,
1652 false,
1653 true,
1654 true,
1655 false,
1656 true,
1657 false,
1658 true,
1659 false,
1660 false,
1661 true,
1662 false,
1663 true,
1664 true,
1665 true,
1666 true,
1667 true,
1668 false,
1669 false,
1670 true,
1671 false,
1672 true,
1673 false,
1674 });
1675
1676 const vec = c_ret_vector_64_bool();
1677 try expect(vec[0] == false);
1678 try expect(vec[1] == true);
1679 try expect(vec[2] == false);
1680 try expect(vec[3] == true);
1681 try expect(vec[4] == true);
1682 try expect(vec[5] == true);
1683 try expect(vec[6] == false);
1684 try expect(vec[7] == true);
1685 try expect(vec[8] == true);
1686 try expect(vec[9] == true);
1687 try expect(vec[10] == true);
1688 try expect(vec[11] == true);
1689 try expect(vec[12] == true);
1690 try expect(vec[13] == false);
1691 try expect(vec[14] == true);
1692 try expect(vec[15] == true);
1693 try expect(vec[16] == true);
1694 try expect(vec[17] == false);
1695 try expect(vec[18] == false);
1696 try expect(vec[19] == false);
1697 try expect(vec[20] == true);
1698 try expect(vec[21] == true);
1699 try expect(vec[22] == false);
1700 try expect(vec[23] == true);
1701 try expect(vec[24] == false);
1702 try expect(vec[25] == true);
1703 try expect(vec[26] == false);
1704 try expect(vec[27] == true);
1705 try expect(vec[28] == false);
1706 try expect(vec[29] == true);
1707 try expect(vec[30] == false);
1708 try expect(vec[31] == true);
1709 try expect(vec[32] == false);
1710 try expect(vec[33] == false);
1711 try expect(vec[34] == true);
1712 try expect(vec[35] == true);
1713 try expect(vec[36] == false);
1714 try expect(vec[37] == false);
1715 try expect(vec[38] == false);
1716 try expect(vec[39] == true);
1717 try expect(vec[40] == true);
1718 try expect(vec[41] == true);
1719 try expect(vec[42] == true);
1720 try expect(vec[43] == false);
1721 try expect(vec[44] == false);
1722 try expect(vec[45] == false);
1723 try expect(vec[46] == true);
1724 try expect(vec[47] == true);
1725 try expect(vec[48] == false);
1726 try expect(vec[49] == false);
1727 try expect(vec[50] == true);
1728 try expect(vec[51] == false);
1729 try expect(vec[52] == false);
1730 try expect(vec[53] == false);
1731 try expect(vec[54] == false);
1732 try expect(vec[55] == true);
1733 try expect(vec[56] == false);
1734 try expect(vec[57] == false);
1735 try expect(vec[58] == false);
1736 try expect(vec[59] == true);
1737 try expect(vec[60] == true);
1738 try expect(vec[61] == true);
1739 try expect(vec[62] == true);
1740 try expect(vec[63] == true);
1741 }
1742 {
1743 c_vector_128_bool(.{
1744 false,
1745 false,
1746 false,
1747 false,
1748 false,
1749 true,
1750 true,
1751 false,
1752 true,
1753 true,
1754 false,
1755 true,
1756 true,
1757 false,
1758 true,
1759 true,
1760 true,
1761 false,
1762 false,
1763 false,
1764 false,
1765 true,
1766 true,
1767 false,
1768 false,
1769 false,
1770 true,
1771 true,
1772 false,
1773 true,
1774 false,
1775 false,
1776 true,
1777 false,
1778 false,
1779 true,
1780 true,
1781 true,
1782 true,
1783 true,
1784 false,
1785 true,
1786 true,
1787 true,
1788 false,
1789 false,
1790 false,
1791 false,
1792 true,
1793 true,
1794 false,
1795 true,
1796 true,
1797 true,
1798 true,
1799 true,
1800 false,
1801 true,
1802 true,
1803 false,
1804 true,
1805 false,
1806 false,
1807 true,
1808 true,
1809 false,
1810 true,
1811 true,
1812 false,
1813 true,
1814 false,
1815 false,
1816 true,
1817 true,
1818 false,
1819 true,
1820 true,
1821 true,
1822 false,
1823 true,
1824 false,
1825 false,
1826 false,
1827 false,
1828 true,
1829 false,
1830 false,
1831 false,
1832 true,
1833 true,
1834 false,
1835 false,
1836 true,
1837 true,
1838 true,
1839 true,
1840 false,
1841 false,
1842 false,
1843 false,
1844 false,
1845 true,
1846 false,
1847 false,
1848 false,
1849 false,
1850 true,
1851 true,
1852 true,
1853 true,
1854 true,
1855 false,
1856 false,
1857 true,
1858 false,
1859 true,
1860 false,
1861 false,
1862 true,
1863 false,
1864 true,
1865 false,
1866 true,
1867 true,
1868 true,
1869 true,
1870 true,
1871 true,
1872 });
1873
1874 const vec = c_ret_vector_128_bool();
1875 try expect(vec[0] == false);
1876 try expect(vec[1] == true);
1877 try expect(vec[2] == true);
1878 try expect(vec[3] == false);
1879 try expect(vec[4] == true);
1880 try expect(vec[5] == false);
1881 try expect(vec[6] == false);
1882 try expect(vec[7] == true);
1883 try expect(vec[8] == true);
1884 try expect(vec[9] == false);
1885 try expect(vec[10] == true);
1886 try expect(vec[11] == false);
1887 try expect(vec[12] == false);
1888 try expect(vec[13] == false);
1889 try expect(vec[14] == true);
1890 try expect(vec[15] == false);
1891 try expect(vec[16] == true);
1892 try expect(vec[17] == false);
1893 try expect(vec[18] == false);
1894 try expect(vec[19] == true);
1895 try expect(vec[20] == false);
1896 try expect(vec[21] == true);
1897 try expect(vec[22] == false);
1898 try expect(vec[23] == false);
1899 try expect(vec[24] == false);
1900 try expect(vec[25] == true);
1901 try expect(vec[26] == true);
1902 try expect(vec[27] == true);
1903 try expect(vec[28] == false);
1904 try expect(vec[29] == false);
1905 try expect(vec[30] == false);
1906 try expect(vec[31] == false);
1907 try expect(vec[32] == true);
1908 try expect(vec[33] == true);
1909 try expect(vec[34] == true);
1910 try expect(vec[35] == false);
1911 try expect(vec[36] == true);
1912 try expect(vec[37] == true);
1913 try expect(vec[38] == false);
1914 try expect(vec[39] == false);
1915 try expect(vec[40] == false);
1916 try expect(vec[41] == false);
1917 try expect(vec[42] == true);
1918 try expect(vec[43] == true);
1919 try expect(vec[44] == true);
1920 try expect(vec[45] == false);
1921 try expect(vec[46] == false);
1922 try expect(vec[47] == false);
1923 try expect(vec[48] == false);
1924 try expect(vec[49] == true);
1925 try expect(vec[50] == false);
1926 try expect(vec[51] == false);
1927 try expect(vec[52] == true);
1928 try expect(vec[53] == false);
1929 try expect(vec[54] == false);
1930 try expect(vec[55] == false);
1931 try expect(vec[56] == false);
1932 try expect(vec[57] == false);
1933 try expect(vec[58] == true);
1934 try expect(vec[59] == true);
1935 try expect(vec[60] == true);
1936 try expect(vec[61] == false);
1937 try expect(vec[62] == true);
1938 try expect(vec[63] == true);
1939 try expect(vec[64] == false);
1940 try expect(vec[65] == false);
1941 try expect(vec[66] == false);
1942 try expect(vec[67] == false);
1943 try expect(vec[68] == false);
1944 try expect(vec[69] == false);
1945 try expect(vec[70] == false);
1946 try expect(vec[71] == false);
1947 try expect(vec[72] == true);
1948 try expect(vec[73] == true);
1949 try expect(vec[74] == true);
1950 try expect(vec[75] == true);
1951 try expect(vec[76] == true);
1952 try expect(vec[77] == false);
1953 try expect(vec[78] == false);
1954 try expect(vec[79] == false);
1955 try expect(vec[80] == false);
1956 try expect(vec[81] == false);
1957 try expect(vec[82] == false);
1958 try expect(vec[83] == true);
1959 try expect(vec[84] == false);
1960 try expect(vec[85] == true);
1961 try expect(vec[86] == false);
1962 try expect(vec[87] == true);
1963 try expect(vec[88] == false);
1964 try expect(vec[89] == true);
1965 try expect(vec[90] == false);
1966 try expect(vec[91] == true);
1967 try expect(vec[92] == true);
1968 try expect(vec[93] == true);
1969 try expect(vec[94] == true);
1970 try expect(vec[95] == false);
1971 try expect(vec[96] == false);
1972 try expect(vec[97] == true);
1973 try expect(vec[98] == false);
1974 try expect(vec[99] == false);
1975 try expect(vec[100] == true);
1976 try expect(vec[101] == true);
1977 try expect(vec[102] == true);
1978 try expect(vec[103] == true);
1979 try expect(vec[104] == false);
1980 try expect(vec[105] == true);
1981 try expect(vec[106] == true);
1982 try expect(vec[107] == true);
1983 try expect(vec[108] == false);
1984 try expect(vec[109] == false);
1985 try expect(vec[110] == true);
1986 try expect(vec[111] == false);
1987 try expect(vec[112] == false);
1988 try expect(vec[113] == true);
1989 try expect(vec[114] == true);
1990 try expect(vec[115] == false);
1991 try expect(vec[116] == true);
1992 try expect(vec[117] == false);
1993 try expect(vec[118] == true);
1994 try expect(vec[119] == true);
1995 try expect(vec[120] == true);
1996 try expect(vec[121] == true);
1997 try expect(vec[122] == true);
1998 try expect(vec[123] == false);
1999 try expect(vec[124] == false);
2000 try expect(vec[125] == true);
2001 try expect(vec[126] == false);
2002 try expect(vec[127] == true);
2003 }
2004
2005 {
2006 if (!builtin.target.cpu.arch.isWasm()) c_vector_256_bool(.{
2007 false,
2008 true,
2009 true,
2010 false,
2011 false,
2012 true,
2013 true,
2014 true,
2015 false,
2016 true,
2017 true,
2018 true,
2019 false,
2020 true,
2021 false,
2022 true,
2023 false,
2024 false,
2025 true,
2026 true,
2027 false,
2028 true,
2029 false,
2030 false,
2031 false,
2032 true,
2033 true,
2034 false,
2035 false,
2036 true,
2037 true,
2038 false,
2039 true,
2040 false,
2041 false,
2042 true,
2043 false,
2044 true,
2045 false,
2046 true,
2047 true,
2048 true,
2049 true,
2050 false,
2051 false,
2052 true,
2053 false,
2054 false,
2055 false,
2056 false,
2057 false,
2058 false,
2059 true,
2060 true,
2061 true,
2062 true,
2063 true,
2064 true,
2065 false,
2066 true,
2067 true,
2068 false,
2069 false,
2070 true,
2071 false,
2072 false,
2073 false,
2074 false,
2075 false,
2076 false,
2077 true,
2078 true,
2079 true,
2080 false,
2081 false,
2082 false,
2083 true,
2084 false,
2085 true,
2086 true,
2087 false,
2088 false,
2089 true,
2090 true,
2091 false,
2092 true,
2093 true,
2094 true,
2095 true,
2096 true,
2097 true,
2098 true,
2099 false,
2100 true,
2101 true,
2102 false,
2103 false,
2104 true,
2105 true,
2106 false,
2107 true,
2108 false,
2109 false,
2110 true,
2111 false,
2112 true,
2113 true,
2114 true,
2115 true,
2116 true,
2117 false,
2118 false,
2119 false,
2120 false,
2121 true,
2122 true,
2123 false,
2124 true,
2125 false,
2126 false,
2127 true,
2128 false,
2129 false,
2130 true,
2131 false,
2132 true,
2133 true,
2134 true,
2135 true,
2136 false,
2137 true,
2138 true,
2139 false,
2140 false,
2141 true,
2142 false,
2143 false,
2144 true,
2145 false,
2146 true,
2147 false,
2148 true,
2149 true,
2150 true,
2151 true,
2152 false,
2153 true,
2154 false,
2155 false,
2156 false,
2157 true,
2158 true,
2159 true,
2160 true,
2161 true,
2162 false,
2163 true,
2164 false,
2165 false,
2166 false,
2167 true,
2168 true,
2169 false,
2170 true,
2171 true,
2172 false,
2173 false,
2174 false,
2175 false,
2176 true,
2177 false,
2178 true,
2179 false,
2180 false,
2181 false,
2182 false,
2183 true,
2184 true,
2185 true,
2186 false,
2187 true,
2188 false,
2189 true,
2190 true,
2191 false,
2192 false,
2193 true,
2194 false,
2195 false,
2196 false,
2197 false,
2198 true,
2199 true,
2200 true,
2201 true,
2202 true,
2203 true,
2204 true,
2205 false,
2206 true,
2207 false,
2208 false,
2209 true,
2210 false,
2211 true,
2212 true,
2213 true,
2214 false,
2215 false,
2216 true,
2217 true,
2218 true,
2219 false,
2220 true,
2221 true,
2222 true,
2223 true,
2224 true,
2225 false,
2226 false,
2227 false,
2228 false,
2229 false,
2230 true,
2231 true,
2232 false,
2233 true,
2234 false,
2235 false,
2236 true,
2237 false,
2238 true,
2239 false,
2240 false,
2241 false,
2242 true,
2243 false,
2244 false,
2245 false,
2246 true,
2247 true,
2248 true,
2249 true,
2250 true,
2251 true,
2252 false,
2253 false,
2254 true,
2255 false,
2256 true,
2257 true,
2258 false,
2259 true,
2260 true,
2261 true,
2262 false,
2263 });
2264
2265 const vec = c_ret_vector_256_bool();
2266 try expect(vec[0] == true);
2267 try expect(vec[1] == false);
2268 try expect(vec[2] == true);
2269 try expect(vec[3] == true);
2270 try expect(vec[4] == false);
2271 try expect(vec[5] == false);
2272 try expect(vec[6] == false);
2273 try expect(vec[7] == false);
2274 try expect(vec[8] == false);
2275 try expect(vec[9] == true);
2276 try expect(vec[10] == false);
2277 try expect(vec[11] == true);
2278 try expect(vec[12] == false);
2279 try expect(vec[13] == true);
2280 try expect(vec[14] == false);
2281 try expect(vec[15] == false);
2282 try expect(vec[16] == true);
2283 try expect(vec[17] == true);
2284 try expect(vec[18] == true);
2285 try expect(vec[19] == false);
2286 try expect(vec[20] == false);
2287 try expect(vec[21] == false);
2288 try expect(vec[22] == true);
2289 try expect(vec[23] == false);
2290 try expect(vec[24] == true);
2291 try expect(vec[25] == false);
2292 try expect(vec[26] == false);
2293 try expect(vec[27] == true);
2294 try expect(vec[28] == true);
2295 try expect(vec[29] == true);
2296 try expect(vec[30] == false);
2297 try expect(vec[31] == false);
2298 try expect(vec[32] == true);
2299 try expect(vec[33] == true);
2300 try expect(vec[34] == true);
2301 try expect(vec[35] == false);
2302 try expect(vec[36] == true);
2303 try expect(vec[37] == true);
2304 try expect(vec[38] == true);
2305 try expect(vec[39] == false);
2306 try expect(vec[40] == true);
2307 try expect(vec[41] == false);
2308 try expect(vec[42] == true);
2309 try expect(vec[43] == true);
2310 try expect(vec[44] == false);
2311 try expect(vec[45] == true);
2312 try expect(vec[46] == false);
2313 try expect(vec[47] == true);
2314 try expect(vec[48] == true);
2315 try expect(vec[49] == false);
2316 try expect(vec[50] == false);
2317 try expect(vec[51] == true);
2318 try expect(vec[52] == true);
2319 try expect(vec[53] == false);
2320 try expect(vec[54] == false);
2321 try expect(vec[55] == true);
2322 try expect(vec[56] == false);
2323 try expect(vec[57] == true);
2324 try expect(vec[58] == true);
2325 try expect(vec[59] == true);
2326 try expect(vec[60] == false);
2327 try expect(vec[61] == true);
2328 try expect(vec[62] == true);
2329 try expect(vec[63] == false);
2330 try expect(vec[64] == true);
2331 try expect(vec[65] == true);
2332 try expect(vec[66] == false);
2333 try expect(vec[67] == true);
2334 try expect(vec[68] == false);
2335 try expect(vec[69] == true);
2336 try expect(vec[70] == true);
2337 try expect(vec[71] == true);
2338 try expect(vec[72] == false);
2339 try expect(vec[73] == true);
2340 try expect(vec[74] == true);
2341 try expect(vec[75] == false);
2342 try expect(vec[76] == true);
2343 try expect(vec[77] == true);
2344 try expect(vec[78] == true);
2345 try expect(vec[79] == true);
2346 try expect(vec[80] == false);
2347 try expect(vec[81] == true);
2348 try expect(vec[82] == false);
2349 try expect(vec[83] == true);
2350 try expect(vec[84] == true);
2351 try expect(vec[85] == true);
2352 try expect(vec[86] == false);
2353 try expect(vec[87] == true);
2354 try expect(vec[88] == false);
2355 try expect(vec[89] == true);
2356 try expect(vec[90] == false);
2357 try expect(vec[91] == false);
2358 try expect(vec[92] == true);
2359 try expect(vec[93] == false);
2360 try expect(vec[94] == false);
2361 try expect(vec[95] == false);
2362 try expect(vec[96] == true);
2363 try expect(vec[97] == true);
2364 try expect(vec[98] == false);
2365 try expect(vec[99] == false);
2366 try expect(vec[100] == false);
2367 try expect(vec[101] == true);
2368 try expect(vec[102] == true);
2369 try expect(vec[103] == true);
2370 try expect(vec[104] == false);
2371 try expect(vec[105] == false);
2372 try expect(vec[106] == false);
2373 try expect(vec[107] == true);
2374 try expect(vec[108] == false);
2375 try expect(vec[109] == true);
2376 try expect(vec[110] == true);
2377 try expect(vec[111] == true);
2378 try expect(vec[112] == true);
2379 try expect(vec[113] == true);
2380 try expect(vec[114] == true);
2381 try expect(vec[115] == true);
2382 try expect(vec[116] == true);
2383 try expect(vec[117] == false);
2384 try expect(vec[118] == true);
2385 try expect(vec[119] == false);
2386 try expect(vec[120] == true);
2387 try expect(vec[121] == false);
2388 try expect(vec[122] == false);
2389 try expect(vec[123] == true);
2390 try expect(vec[124] == true);
2391 try expect(vec[125] == false);
2392 try expect(vec[126] == true);
2393 try expect(vec[127] == false);
2394 try expect(vec[128] == false);
2395 try expect(vec[129] == false);
2396 try expect(vec[130] == false);
2397 try expect(vec[131] == true);
2398 try expect(vec[132] == false);
2399 try expect(vec[133] == false);
2400 try expect(vec[134] == true);
2401 try expect(vec[135] == false);
2402 try expect(vec[136] == false);
2403 try expect(vec[137] == false);
2404 try expect(vec[138] == false);
2405 try expect(vec[139] == false);
2406 try expect(vec[140] == false);
2407 try expect(vec[141] == true);
2408 try expect(vec[142] == false);
2409 try expect(vec[143] == true);
2410 try expect(vec[144] == false);
2411 try expect(vec[145] == true);
2412 try expect(vec[146] == true);
2413 try expect(vec[147] == true);
2414 try expect(vec[148] == false);
2415 try expect(vec[149] == true);
2416 try expect(vec[150] == true);
2417 try expect(vec[151] == false);
2418 try expect(vec[152] == true);
2419 try expect(vec[153] == true);
2420 try expect(vec[154] == false);
2421 try expect(vec[155] == true);
2422 try expect(vec[156] == true);
2423 try expect(vec[157] == true);
2424 try expect(vec[158] == true);
2425 try expect(vec[159] == true);
2426 try expect(vec[160] == true);
2427 try expect(vec[161] == true);
2428 try expect(vec[162] == false);
2429 try expect(vec[163] == false);
2430 try expect(vec[164] == false);
2431 try expect(vec[165] == true);
2432 try expect(vec[166] == false);
2433 try expect(vec[167] == false);
2434 try expect(vec[168] == true);
2435 try expect(vec[169] == false);
2436 try expect(vec[170] == true);
2437 try expect(vec[171] == true);
2438 try expect(vec[172] == true);
2439 try expect(vec[173] == false);
2440 try expect(vec[174] == false);
2441 try expect(vec[175] == true);
2442 try expect(vec[176] == true);
2443 try expect(vec[177] == true);
2444 try expect(vec[178] == true);
2445 try expect(vec[179] == false);
2446 try expect(vec[180] == true);
2447 try expect(vec[181] == true);
2448 try expect(vec[182] == false);
2449 try expect(vec[183] == true);
2450 try expect(vec[184] == false);
2451 try expect(vec[185] == false);
2452 try expect(vec[186] == false);
2453 try expect(vec[187] == true);
2454 try expect(vec[188] == true);
2455 try expect(vec[189] == true);
2456 try expect(vec[190] == true);
2457 try expect(vec[191] == true);
2458 try expect(vec[192] == true);
2459 try expect(vec[193] == true);
2460 try expect(vec[194] == true);
2461 try expect(vec[195] == false);
2462 try expect(vec[196] == false);
2463 try expect(vec[197] == true);
2464 try expect(vec[198] == false);
2465 try expect(vec[199] == false);
2466 try expect(vec[200] == false);
2467 try expect(vec[201] == true);
2468 try expect(vec[202] == true);
2469 try expect(vec[203] == true);
2470 try expect(vec[204] == true);
2471 try expect(vec[205] == true);
2472 try expect(vec[206] == true);
2473 try expect(vec[207] == false);
2474 try expect(vec[208] == false);
2475 try expect(vec[209] == false);
2476 try expect(vec[210] == true);
2477 try expect(vec[211] == true);
2478 try expect(vec[212] == true);
2479 try expect(vec[213] == false);
2480 try expect(vec[214] == true);
2481 try expect(vec[215] == false);
2482 try expect(vec[216] == true);
2483 try expect(vec[217] == false);
2484 try expect(vec[218] == true);
2485 try expect(vec[219] == false);
2486 try expect(vec[220] == true);
2487 try expect(vec[221] == true);
2488 try expect(vec[222] == true);
2489 try expect(vec[223] == false);
2490 try expect(vec[224] == true);
2491 try expect(vec[225] == false);
2492 try expect(vec[226] == true);
2493 try expect(vec[227] == false);
2494 try expect(vec[228] == true);
2495 try expect(vec[229] == false);
2496 try expect(vec[230] == true);
2497 try expect(vec[231] == false);
2498 try expect(vec[232] == false);
2499 try expect(vec[233] == true);
2500 try expect(vec[234] == false);
2501 try expect(vec[235] == true);
2502 try expect(vec[236] == true);
2503 try expect(vec[237] == false);
2504 try expect(vec[238] == false);
2505 try expect(vec[239] == true);
2506 try expect(vec[240] == false);
2507 try expect(vec[241] == false);
2508 try expect(vec[242] == false);
2509 try expect(vec[243] == true);
2510 try expect(vec[244] == true);
2511 try expect(vec[245] == false);
2512 try expect(vec[246] == false);
2513 try expect(vec[247] == false);
2514 try expect(vec[248] == false);
2515 try expect(vec[249] == false);
2516 try expect(vec[250] == true);
2517 try expect(vec[251] == false);
2518 try expect(vec[252] == true);
2519 try expect(vec[253] == false);
2520 try expect(vec[254] == false);
2521 try expect(vec[255] == false);
2522 }
2523 {
2524 if (!builtin.target.cpu.arch.isWasm()) c_vector_512_bool(.{
2525 true,
2526 true,
2527 true,
2528 true,
2529 true,
2530 false,
2531 false,
2532 true,
2533 true,
2534 true,
2535 true,
2536 false,
2537 true,
2538 true,
2539 false,
2540 false,
2541 false,
2542 true,
2543 true,
2544 true,
2545 true,
2546 true,
2547 false,
2548 false,
2549 true,
2550 true,
2551 false,
2552 false,
2553 false,
2554 false,
2555 false,
2556 true,
2557 true,
2558 false,
2559 true,
2560 true,
2561 true,
2562 true,
2563 true,
2564 true,
2565 false,
2566 true,
2567 true,
2568 false,
2569 false,
2570 false,
2571 true,
2572 true,
2573 false,
2574 true,
2575 false,
2576 true,
2577 true,
2578 false,
2579 true,
2580 false,
2581 false,
2582 true,
2583 true,
2584 false,
2585 true,
2586 true,
2587 false,
2588 true,
2589 false,
2590 true,
2591 true,
2592 true,
2593 true,
2594 true,
2595 true,
2596 true,
2597 true,
2598 true,
2599 false,
2600 true,
2601 false,
2602 true,
2603 false,
2604 false,
2605 false,
2606 true,
2607 false,
2608 true,
2609 true,
2610 false,
2611 true,
2612 true,
2613 true,
2614 false,
2615 true,
2616 true,
2617 false,
2618 true,
2619 false,
2620 true,
2621 true,
2622 false,
2623 false,
2624 false,
2625 true,
2626 true,
2627 false,
2628 true,
2629 false,
2630 false,
2631 true,
2632 false,
2633 false,
2634 true,
2635 false,
2636 false,
2637 false,
2638 false,
2639 false,
2640 true,
2641 true,
2642 false,
2643 false,
2644 false,
2645 false,
2646 true,
2647 false,
2648 false,
2649 true,
2650 true,
2651 false,
2652 true,
2653 false,
2654 true,
2655 true,
2656 false,
2657 true,
2658 false,
2659 false,
2660 false,
2661 false,
2662 true,
2663 true,
2664 false,
2665 false,
2666 false,
2667 true,
2668 true,
2669 false,
2670 false,
2671 true,
2672 true,
2673 true,
2674 true,
2675 true,
2676 true,
2677 true,
2678 false,
2679 true,
2680 false,
2681 false,
2682 true,
2683 false,
2684 true,
2685 false,
2686 true,
2687 true,
2688 true,
2689 true,
2690 true,
2691 true,
2692 true,
2693 true,
2694 false,
2695 true,
2696 true,
2697 false,
2698 true,
2699 true,
2700 false,
2701 false,
2702 false,
2703 true,
2704 false,
2705 false,
2706 true,
2707 true,
2708 true,
2709 true,
2710 true,
2711 true,
2712 true,
2713 true,
2714 true,
2715 false,
2716 true,
2717 true,
2718 false,
2719 false,
2720 true,
2721 true,
2722 false,
2723 true,
2724 true,
2725 false,
2726 true,
2727 true,
2728 false,
2729 true,
2730 true,
2731 true,
2732 true,
2733 false,
2734 true,
2735 false,
2736 true,
2737 true,
2738 false,
2739 true,
2740 false,
2741 true,
2742 false,
2743 true,
2744 false,
2745 false,
2746 true,
2747 false,
2748 false,
2749 false,
2750 true,
2751 true,
2752 false,
2753 false,
2754 false,
2755 true,
2756 false,
2757 true,
2758 false,
2759 false,
2760 false,
2761 true,
2762 true,
2763 false,
2764 false,
2765 false,
2766 false,
2767 false,
2768 true,
2769 true,
2770 false,
2771 true,
2772 false,
2773 false,
2774 true,
2775 false,
2776 false,
2777 false,
2778 true,
2779 false,
2780 false,
2781 false,
2782 false,
2783 true,
2784 true,
2785 true,
2786 true,
2787 false,
2788 true,
2789 false,
2790 false,
2791 false,
2792 true,
2793 false,
2794 false,
2795 true,
2796 true,
2797 false,
2798 false,
2799 false,
2800 false,
2801 false,
2802 true,
2803 false,
2804 true,
2805 true,
2806 true,
2807 true,
2808 true,
2809 false,
2810 false,
2811 false,
2812 false,
2813 false,
2814 false,
2815 false,
2816 false,
2817 false,
2818 true,
2819 true,
2820 true,
2821 true,
2822 true,
2823 true,
2824 false,
2825 true,
2826 false,
2827 true,
2828 true,
2829 true,
2830 false,
2831 false,
2832 true,
2833 true,
2834 true,
2835 false,
2836 true,
2837 true,
2838 true,
2839 false,
2840 true,
2841 true,
2842 true,
2843 false,
2844 true,
2845 true,
2846 false,
2847 false,
2848 true,
2849 false,
2850 false,
2851 false,
2852 false,
2853 true,
2854 false,
2855 true,
2856 true,
2857 true,
2858 true,
2859 false,
2860 false,
2861 true,
2862 false,
2863 true,
2864 false,
2865 false,
2866 false,
2867 true,
2868 false,
2869 true,
2870 false,
2871 false,
2872 true,
2873 true,
2874 true,
2875 true,
2876 false,
2877 false,
2878 false,
2879 true,
2880 true,
2881 false,
2882 true,
2883 false,
2884 false,
2885 true,
2886 false,
2887 true,
2888 false,
2889 true,
2890 true,
2891 false,
2892 false,
2893 true,
2894 true,
2895 true,
2896 true,
2897 false,
2898 false,
2899 true,
2900 false,
2901 true,
2902 true,
2903 false,
2904 true,
2905 true,
2906 false,
2907 true,
2908 true,
2909 true,
2910 false,
2911 true,
2912 true,
2913 true,
2914 false,
2915 false,
2916 true,
2917 false,
2918 true,
2919 true,
2920 true,
2921 false,
2922 false,
2923 false,
2924 false,
2925 false,
2926 true,
2927 false,
2928 false,
2929 false,
2930 false,
2931 true,
2932 false,
2933 false,
2934 true,
2935 true,
2936 false,
2937 false,
2938 false,
2939 false,
2940 true,
2941 true,
2942 true,
2943 true,
2944 true,
2945 false,
2946 false,
2947 false,
2948 true,
2949 false,
2950 false,
2951 false,
2952 false,
2953 true,
2954 false,
2955 true,
2956 false,
2957 true,
2958 true,
2959 true,
2960 true,
2961 false,
2962 false,
2963 false,
2964 false,
2965 false,
2966 true,
2967 true,
2968 true,
2969 true,
2970 true,
2971 true,
2972 true,
2973 true,
2974 true,
2975 false,
2976 false,
2977 true,
2978 false,
2979 true,
2980 false,
2981 false,
2982 true,
2983 false,
2984 false,
2985 true,
2986 true,
2987 true,
2988 true,
2989 true,
2990 true,
2991 false,
2992 true,
2993 false,
2994 false,
2995 false,
2996 true,
2997 true,
2998 false,
2999 true,
3000 true,
3001 false,
3002 false,
3003 true,
3004 true,
3005 false,
3006 false,
3007 true,
3008 true,
3009 false,
3010 true,
3011 false,
3012 true,
3013 true,
3014 true,
3015 true,
3016 true,
3017 true,
3018 true,
3019 true,
3020 true,
3021 false,
3022 true,
3023 true,
3024 true,
3025 false,
3026 false,
3027 true,
3028 false,
3029 false,
3030 false,
3031 true,
3032 true,
3033 false,
3034 true,
3035 false,
3036 true,
3037 });
3038
3039 const vec = c_ret_vector_512_bool();
3040 try expect(vec[0] == false);
3041 try expect(vec[1] == true);
3042 try expect(vec[2] == false);
3043 try expect(vec[3] == false);
3044 try expect(vec[4] == false);
3045 try expect(vec[5] == true);
3046 try expect(vec[6] == false);
3047 try expect(vec[7] == false);
3048 try expect(vec[8] == false);
3049 try expect(vec[9] == true);
3050 try expect(vec[10] == false);
3051 try expect(vec[11] == false);
3052 try expect(vec[12] == false);
3053 try expect(vec[13] == true);
3054 try expect(vec[14] == false);
3055 try expect(vec[15] == true);
3056 try expect(vec[16] == false);
3057 try expect(vec[17] == false);
3058 try expect(vec[18] == false);
3059 try expect(vec[19] == false);
3060 try expect(vec[20] == false);
3061 try expect(vec[21] == false);
3062 try expect(vec[22] == true);
3063 try expect(vec[23] == true);
3064 try expect(vec[24] == false);
3065 try expect(vec[25] == false);
3066 try expect(vec[26] == false);
3067 try expect(vec[27] == false);
3068 try expect(vec[28] == true);
3069 try expect(vec[29] == true);
3070 try expect(vec[30] == false);
3071 try expect(vec[31] == true);
3072 try expect(vec[32] == false);
3073 try expect(vec[33] == true);
3074 try expect(vec[34] == true);
3075 try expect(vec[35] == true);
3076 try expect(vec[36] == false);
3077 try expect(vec[37] == false);
3078 try expect(vec[38] == true);
3079 try expect(vec[39] == true);
3080 try expect(vec[40] == false);
3081 try expect(vec[41] == false);
3082 try expect(vec[42] == false);
3083 try expect(vec[43] == false);
3084 try expect(vec[44] == false);
3085 try expect(vec[45] == true);
3086 try expect(vec[46] == false);
3087 try expect(vec[47] == true);
3088 try expect(vec[48] == true);
3089 try expect(vec[49] == false);
3090 try expect(vec[50] == true);
3091 try expect(vec[51] == true);
3092 try expect(vec[52] == true);
3093 try expect(vec[53] == true);
3094 try expect(vec[54] == false);
3095 try expect(vec[55] == false);
3096 try expect(vec[56] == false);
3097 try expect(vec[57] == true);
3098 try expect(vec[58] == true);
3099 try expect(vec[59] == false);
3100 try expect(vec[60] == false);
3101 try expect(vec[61] == false);
3102 try expect(vec[62] == false);
3103 try expect(vec[63] == true);
3104 try expect(vec[64] == true);
3105 try expect(vec[65] == true);
3106 try expect(vec[66] == true);
3107 try expect(vec[67] == true);
3108 try expect(vec[68] == false);
3109 try expect(vec[69] == false);
3110 try expect(vec[70] == false);
3111 try expect(vec[71] == false);
3112 try expect(vec[72] == false);
3113 try expect(vec[73] == true);
3114 try expect(vec[74] == false);
3115 try expect(vec[75] == true);
3116 try expect(vec[76] == false);
3117 try expect(vec[77] == false);
3118 try expect(vec[78] == true);
3119 try expect(vec[79] == true);
3120 try expect(vec[80] == false);
3121 try expect(vec[81] == false);
3122 try expect(vec[82] == false);
3123 try expect(vec[83] == true);
3124 try expect(vec[84] == false);
3125 try expect(vec[85] == true);
3126 try expect(vec[86] == true);
3127 try expect(vec[87] == true);
3128 try expect(vec[88] == false);
3129 try expect(vec[89] == true);
3130 try expect(vec[90] == false);
3131 try expect(vec[91] == false);
3132 try expect(vec[92] == true);
3133 try expect(vec[93] == true);
3134 try expect(vec[94] == false);
3135 try expect(vec[95] == true);
3136 try expect(vec[96] == true);
3137 try expect(vec[97] == false);
3138 try expect(vec[98] == true);
3139 try expect(vec[99] == false);
3140 try expect(vec[100] == true);
3141 try expect(vec[101] == true);
3142 try expect(vec[102] == false);
3143 try expect(vec[103] == true);
3144 try expect(vec[104] == true);
3145 try expect(vec[105] == false);
3146 try expect(vec[106] == false);
3147 try expect(vec[107] == false);
3148 try expect(vec[108] == true);
3149 try expect(vec[109] == false);
3150 try expect(vec[110] == false);
3151 try expect(vec[111] == false);
3152 try expect(vec[112] == true);
3153 try expect(vec[113] == true);
3154 try expect(vec[114] == true);
3155 try expect(vec[115] == false);
3156 try expect(vec[116] == true);
3157 try expect(vec[117] == false);
3158 try expect(vec[118] == true);
3159 try expect(vec[119] == false);
3160 try expect(vec[120] == true);
3161 try expect(vec[121] == true);
3162 try expect(vec[122] == false);
3163 try expect(vec[123] == true);
3164 try expect(vec[124] == false);
3165 try expect(vec[125] == true);
3166 try expect(vec[126] == true);
3167 try expect(vec[127] == true);
3168 try expect(vec[128] == false);
3169 try expect(vec[129] == true);
3170 try expect(vec[130] == false);
3171 try expect(vec[131] == false);
3172 try expect(vec[132] == false);
3173 try expect(vec[133] == false);
3174 try expect(vec[134] == false);
3175 try expect(vec[135] == false);
3176 try expect(vec[136] == true);
3177 try expect(vec[137] == false);
3178 try expect(vec[138] == true);
3179 try expect(vec[139] == false);
3180 try expect(vec[140] == true);
3181 try expect(vec[141] == true);
3182 try expect(vec[142] == false);
3183 try expect(vec[143] == true);
3184 try expect(vec[144] == false);
3185 try expect(vec[145] == false);
3186 try expect(vec[146] == true);
3187 try expect(vec[147] == false);
3188 try expect(vec[148] == false);
3189 try expect(vec[149] == true);
3190 try expect(vec[150] == false);
3191 try expect(vec[151] == true);
3192 try expect(vec[152] == false);
3193 try expect(vec[153] == true);
3194 try expect(vec[154] == false);
3195 try expect(vec[155] == false);
3196 try expect(vec[156] == true);
3197 try expect(vec[157] == false);
3198 try expect(vec[158] == true);
3199 try expect(vec[159] == true);
3200 try expect(vec[160] == true);
3201 try expect(vec[161] == false);
3202 try expect(vec[162] == false);
3203 try expect(vec[163] == true);
3204 try expect(vec[164] == false);
3205 try expect(vec[165] == false);
3206 try expect(vec[166] == false);
3207 try expect(vec[167] == true);
3208 try expect(vec[168] == true);
3209 try expect(vec[169] == true);
3210 try expect(vec[170] == false);
3211 try expect(vec[171] == true);
3212 try expect(vec[172] == false);
3213 try expect(vec[173] == false);
3214 try expect(vec[174] == false);
3215 try expect(vec[175] == false);
3216 try expect(vec[176] == false);
3217 try expect(vec[177] == true);
3218 try expect(vec[178] == true);
3219 try expect(vec[179] == false);
3220 try expect(vec[180] == false);
3221 try expect(vec[181] == true);
3222 try expect(vec[182] == false);
3223 try expect(vec[183] == false);
3224 try expect(vec[184] == false);
3225 try expect(vec[185] == false);
3226 try expect(vec[186] == false);
3227 try expect(vec[187] == true);
3228 try expect(vec[188] == true);
3229 try expect(vec[189] == false);
3230 try expect(vec[190] == false);
3231 try expect(vec[191] == false);
3232 try expect(vec[192] == false);
3233 try expect(vec[193] == false);
3234 try expect(vec[194] == false);
3235 try expect(vec[195] == true);
3236 try expect(vec[196] == true);
3237 try expect(vec[197] == false);
3238 try expect(vec[198] == true);
3239 try expect(vec[199] == true);
3240 try expect(vec[200] == true);
3241 try expect(vec[201] == true);
3242 try expect(vec[202] == true);
3243 try expect(vec[203] == true);
3244 try expect(vec[204] == false);
3245 try expect(vec[205] == false);
3246 try expect(vec[206] == false);
3247 try expect(vec[207] == false);
3248 try expect(vec[208] == true);
3249 try expect(vec[209] == false);
3250 try expect(vec[210] == true);
3251 try expect(vec[211] == true);
3252 try expect(vec[212] == true);
3253 try expect(vec[213] == true);
3254 try expect(vec[214] == false);
3255 try expect(vec[215] == false);
3256 try expect(vec[216] == false);
3257 try expect(vec[217] == true);
3258 try expect(vec[218] == true);
3259 try expect(vec[219] == false);
3260 try expect(vec[220] == true);
3261 try expect(vec[221] == true);
3262 try expect(vec[222] == false);
3263 try expect(vec[223] == false);
3264 try expect(vec[224] == false);
3265 try expect(vec[225] == true);
3266 try expect(vec[226] == true);
3267 try expect(vec[227] == true);
3268 try expect(vec[228] == true);
3269 try expect(vec[229] == false);
3270 try expect(vec[230] == true);
3271 try expect(vec[231] == false);
3272 try expect(vec[232] == true);
3273 try expect(vec[233] == true);
3274 try expect(vec[234] == true);
3275 try expect(vec[235] == true);
3276 try expect(vec[236] == false);
3277 try expect(vec[237] == true);
3278 try expect(vec[238] == false);
3279 try expect(vec[239] == true);
3280 try expect(vec[240] == false);
3281 try expect(vec[241] == true);
3282 try expect(vec[242] == false);
3283 try expect(vec[243] == false);
3284 try expect(vec[244] == false);
3285 try expect(vec[245] == true);
3286 try expect(vec[246] == true);
3287 try expect(vec[247] == false);
3288 try expect(vec[248] == true);
3289 try expect(vec[249] == false);
3290 try expect(vec[250] == false);
3291 try expect(vec[251] == false);
3292 try expect(vec[252] == true);
3293 try expect(vec[253] == true);
3294 try expect(vec[254] == true);
3295 try expect(vec[255] == true);
3296 try expect(vec[256] == true);
3297 try expect(vec[257] == false);
3298 try expect(vec[258] == true);
3299 try expect(vec[259] == true);
3300 try expect(vec[260] == true);
3301 try expect(vec[261] == true);
3302 try expect(vec[262] == false);
3303 try expect(vec[263] == true);
3304 try expect(vec[264] == false);
3305 try expect(vec[265] == false);
3306 try expect(vec[266] == true);
3307 try expect(vec[267] == false);
3308 try expect(vec[268] == true);
3309 try expect(vec[269] == false);
3310 try expect(vec[270] == false);
3311 try expect(vec[271] == true);
3312 try expect(vec[272] == true);
3313 try expect(vec[273] == false);
3314 try expect(vec[274] == true);
3315 try expect(vec[275] == false);
3316 try expect(vec[276] == false);
3317 try expect(vec[277] == true);
3318 try expect(vec[278] == false);
3319 try expect(vec[279] == false);
3320 try expect(vec[280] == true);
3321 try expect(vec[281] == true);
3322 try expect(vec[282] == true);
3323 try expect(vec[283] == false);
3324 try expect(vec[284] == false);
3325 try expect(vec[285] == true);
3326 try expect(vec[286] == true);
3327 try expect(vec[287] == true);
3328 try expect(vec[288] == false);
3329 try expect(vec[289] == false);
3330 try expect(vec[290] == false);
3331 try expect(vec[291] == false);
3332 try expect(vec[292] == false);
3333 try expect(vec[293] == false);
3334 try expect(vec[294] == true);
3335 try expect(vec[295] == false);
3336 try expect(vec[296] == true);
3337 try expect(vec[297] == false);
3338 try expect(vec[298] == true);
3339 try expect(vec[299] == true);
3340 try expect(vec[300] == false);
3341 try expect(vec[301] == false);
3342 try expect(vec[302] == false);
3343 try expect(vec[303] == false);
3344 try expect(vec[304] == true);
3345 try expect(vec[305] == true);
3346 try expect(vec[306] == true);
3347 try expect(vec[307] == true);
3348 try expect(vec[308] == true);
3349 try expect(vec[309] == false);
3350 try expect(vec[310] == true);
3351 try expect(vec[311] == true);
3352 try expect(vec[312] == true);
3353 try expect(vec[313] == true);
3354 try expect(vec[314] == true);
3355 try expect(vec[315] == false);
3356 try expect(vec[316] == true);
3357 try expect(vec[317] == true);
3358 try expect(vec[318] == true);
3359 try expect(vec[319] == false);
3360 try expect(vec[320] == true);
3361 try expect(vec[321] == false);
3362 try expect(vec[322] == true);
3363 try expect(vec[323] == true);
3364 try expect(vec[324] == true);
3365 try expect(vec[325] == false);
3366 try expect(vec[326] == false);
3367 try expect(vec[327] == true);
3368 try expect(vec[328] == true);
3369 try expect(vec[329] == true);
3370 try expect(vec[330] == false);
3371 try expect(vec[331] == false);
3372 try expect(vec[332] == true);
3373 try expect(vec[333] == true);
3374 try expect(vec[334] == false);
3375 try expect(vec[335] == true);
3376 try expect(vec[336] == true);
3377 try expect(vec[337] == true);
3378 try expect(vec[338] == true);
3379 try expect(vec[339] == true);
3380 try expect(vec[340] == true);
3381 try expect(vec[341] == false);
3382 try expect(vec[342] == true);
3383 try expect(vec[343] == false);
3384 try expect(vec[344] == true);
3385 try expect(vec[345] == false);
3386 try expect(vec[346] == false);
3387 try expect(vec[347] == false);
3388 try expect(vec[348] == false);
3389 try expect(vec[349] == true);
3390 try expect(vec[350] == true);
3391 try expect(vec[351] == true);
3392 try expect(vec[352] == true);
3393 try expect(vec[353] == false);
3394 try expect(vec[354] == true);
3395 try expect(vec[355] == false);
3396 try expect(vec[356] == true);
3397 try expect(vec[357] == true);
3398 try expect(vec[358] == false);
3399 try expect(vec[359] == true);
3400 try expect(vec[360] == false);
3401 try expect(vec[361] == false);
3402 try expect(vec[362] == true);
3403 try expect(vec[363] == false);
3404 try expect(vec[364] == false);
3405 try expect(vec[365] == false);
3406 try expect(vec[366] == false);
3407 try expect(vec[367] == false);
3408 try expect(vec[368] == false);
3409 try expect(vec[369] == false);
3410 try expect(vec[370] == true);
3411 try expect(vec[371] == false);
3412 try expect(vec[372] == true);
3413 try expect(vec[373] == true);
3414 try expect(vec[374] == false);
3415 try expect(vec[375] == false);
3416 try expect(vec[376] == true);
3417 try expect(vec[377] == false);
3418 try expect(vec[378] == false);
3419 try expect(vec[379] == true);
3420 try expect(vec[380] == false);
3421 try expect(vec[381] == false);
3422 try expect(vec[382] == true);
3423 try expect(vec[383] == false);
3424 try expect(vec[384] == false);
3425 try expect(vec[385] == false);
3426 try expect(vec[386] == false);
3427 try expect(vec[387] == true);
3428 try expect(vec[388] == true);
3429 try expect(vec[389] == true);
3430 try expect(vec[390] == true);
3431 try expect(vec[391] == true);
3432 try expect(vec[392] == true);
3433 try expect(vec[393] == true);
3434 try expect(vec[394] == false);
3435 try expect(vec[395] == true);
3436 try expect(vec[396] == true);
3437 try expect(vec[397] == false);
3438 try expect(vec[398] == false);
3439 try expect(vec[399] == false);
3440 try expect(vec[400] == true);
3441 try expect(vec[401] == false);
3442 try expect(vec[402] == true);
3443 try expect(vec[403] == true);
3444 try expect(vec[404] == false);
3445 try expect(vec[405] == true);
3446 try expect(vec[406] == true);
3447 try expect(vec[407] == true);
3448 try expect(vec[408] == true);
3449 try expect(vec[409] == false);
3450 try expect(vec[410] == false);
3451 try expect(vec[411] == false);
3452 try expect(vec[412] == true);
3453 try expect(vec[413] == true);
3454 try expect(vec[414] == false);
3455 try expect(vec[415] == true);
3456 try expect(vec[416] == false);
3457 try expect(vec[417] == true);
3458 try expect(vec[418] == false);
3459 try expect(vec[419] == false);
3460 try expect(vec[420] == false);
3461 try expect(vec[421] == false);
3462 try expect(vec[422] == true);
3463 try expect(vec[423] == true);
3464 try expect(vec[424] == true);
3465 try expect(vec[425] == false);
3466 try expect(vec[426] == true);
3467 try expect(vec[427] == false);
3468 try expect(vec[428] == false);
3469 try expect(vec[429] == false);
3470 try expect(vec[430] == true);
3471 try expect(vec[431] == true);
3472 try expect(vec[432] == false);
3473 try expect(vec[433] == true);
3474 try expect(vec[434] == false);
3475 try expect(vec[435] == false);
3476 try expect(vec[436] == true);
3477 try expect(vec[437] == true);
3478 try expect(vec[438] == true);
3479 try expect(vec[439] == true);
3480 try expect(vec[440] == true);
3481 try expect(vec[441] == true);
3482 try expect(vec[442] == false);
3483 try expect(vec[443] == false);
3484 try expect(vec[444] == false);
3485 try expect(vec[445] == true);
3486 try expect(vec[446] == true);
3487 try expect(vec[447] == true);
3488 try expect(vec[448] == false);
3489 try expect(vec[449] == false);
3490 try expect(vec[450] == false);
3491 try expect(vec[451] == false);
3492 try expect(vec[452] == false);
3493 try expect(vec[453] == false);
3494 try expect(vec[454] == false);
3495 try expect(vec[455] == false);
3496 try expect(vec[456] == false);
3497 try expect(vec[457] == false);
3498 try expect(vec[458] == false);
3499 try expect(vec[459] == true);
3500 try expect(vec[460] == false);
3501 try expect(vec[461] == false);
3502 try expect(vec[462] == false);
3503 try expect(vec[463] == true);
3504 try expect(vec[464] == false);
3505 try expect(vec[465] == false);
3506 try expect(vec[466] == false);
3507 try expect(vec[467] == false);
3508 try expect(vec[468] == true);
3509 try expect(vec[469] == true);
3510 try expect(vec[470] == true);
3511 try expect(vec[471] == true);
3512 try expect(vec[472] == true);
3513 try expect(vec[473] == false);
3514 try expect(vec[474] == false);
3515 try expect(vec[475] == true);
3516 try expect(vec[476] == true);
3517 try expect(vec[477] == true);
3518 try expect(vec[478] == false);
3519 try expect(vec[479] == true);
3520 try expect(vec[480] == true);
3521 try expect(vec[481] == true);
3522 try expect(vec[482] == false);
3523 try expect(vec[483] == true);
3524 try expect(vec[484] == false);
3525 try expect(vec[485] == true);
3526 try expect(vec[486] == false);
3527 try expect(vec[487] == true);
3528 try expect(vec[488] == false);
3529 try expect(vec[489] == true);
3530 try expect(vec[490] == true);
3531 try expect(vec[491] == true);
3532 try expect(vec[492] == true);
3533 try expect(vec[493] == false);
3534 try expect(vec[494] == true);
3535 try expect(vec[495] == true);
3536 try expect(vec[496] == false);
3537 try expect(vec[497] == true);
3538 try expect(vec[498] == false);
3539 try expect(vec[499] == false);
3540 try expect(vec[500] == false);
3541 try expect(vec[501] == false);
3542 try expect(vec[502] == false);
3543 try expect(vec[503] == false);
3544 try expect(vec[504] == false);
3545 try expect(vec[505] == false);
3546 try expect(vec[506] == false);
3547 try expect(vec[507] == true);
3548 try expect(vec[508] == true);
3549 try expect(vec[509] == false);
3550 try expect(vec[510] == true);
3551 try expect(vec[511] == false);
3552 }
3553}
3554
3555comptime {
3556 skip: {
3557 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
3558 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
3559
3560 _ = struct {
3561 export fn zig_vector_2_bool(vec: Vector2Bool) void {
3562 expect(vec[0] == false) catch @panic("test failure");
3563 expect(vec[1] == true) catch @panic("test failure");
3564 }
3565
3566 export fn zig_vector_4_bool(vec: Vector4Bool) void {
3567 expect(vec[0] == false) catch @panic("test failure");
3568 expect(vec[1] == false) catch @panic("test failure");
3569 expect(vec[2] == false) catch @panic("test failure");
3570 expect(vec[3] == false) catch @panic("test failure");
3571 }
3572
3573 export fn zig_vector_8_bool(vec: Vector8Bool) void {
3574 expect(vec[0] == true) catch @panic("test failure");
3575 expect(vec[1] == true) catch @panic("test failure");
3576 expect(vec[2] == false) catch @panic("test failure");
3577 expect(vec[3] == true) catch @panic("test failure");
3578 expect(vec[4] == false) catch @panic("test failure");
3579 expect(vec[5] == true) catch @panic("test failure");
3580 expect(vec[6] == true) catch @panic("test failure");
3581 expect(vec[7] == false) catch @panic("test failure");
3582 }
3583
3584 export fn zig_vector_16_bool(vec: Vector16Bool) void {
3585 expect(vec[0] == true) catch @panic("test failure");
3586 expect(vec[1] == false) catch @panic("test failure");
3587 expect(vec[2] == true) catch @panic("test failure");
3588 expect(vec[3] == true) catch @panic("test failure");
3589 expect(vec[4] == true) catch @panic("test failure");
3590 expect(vec[5] == false) catch @panic("test failure");
3591 expect(vec[6] == false) catch @panic("test failure");
3592 expect(vec[7] == false) catch @panic("test failure");
3593 expect(vec[8] == true) catch @panic("test failure");
3594 expect(vec[9] == true) catch @panic("test failure");
3595 expect(vec[10] == true) catch @panic("test failure");
3596 expect(vec[11] == true) catch @panic("test failure");
3597 expect(vec[12] == false) catch @panic("test failure");
3598 expect(vec[13] == false) catch @panic("test failure");
3599 expect(vec[14] == false) catch @panic("test failure");
3600 expect(vec[15] == true) catch @panic("test failure");
3601 }
3602
3603 export fn zig_vector_32_bool(vec: Vector32Bool) void {
3604 expect(vec[0] == false) catch @panic("test failure");
3605 expect(vec[1] == false) catch @panic("test failure");
3606 expect(vec[2] == false) catch @panic("test failure");
3607 expect(vec[3] == true) catch @panic("test failure");
3608 expect(vec[4] == true) catch @panic("test failure");
3609 expect(vec[5] == false) catch @panic("test failure");
3610 expect(vec[6] == false) catch @panic("test failure");
3611 expect(vec[7] == true) catch @panic("test failure");
3612 expect(vec[8] == false) catch @panic("test failure");
3613 expect(vec[9] == true) catch @panic("test failure");
3614 expect(vec[10] == true) catch @panic("test failure");
3615 expect(vec[11] == true) catch @panic("test failure");
3616 expect(vec[12] == false) catch @panic("test failure");
3617 expect(vec[13] == false) catch @panic("test failure");
3618 expect(vec[14] == true) catch @panic("test failure");
3619 expect(vec[15] == true) catch @panic("test failure");
3620 expect(vec[16] == true) catch @panic("test failure");
3621 expect(vec[17] == true) catch @panic("test failure");
3622 expect(vec[18] == true) catch @panic("test failure");
3623 expect(vec[19] == false) catch @panic("test failure");
3624 expect(vec[20] == true) catch @panic("test failure");
3625 expect(vec[21] == true) catch @panic("test failure");
3626 expect(vec[22] == true) catch @panic("test failure");
3627 expect(vec[23] == false) catch @panic("test failure");
3628 expect(vec[24] == false) catch @panic("test failure");
3629 expect(vec[25] == true) catch @panic("test failure");
3630 expect(vec[26] == true) catch @panic("test failure");
3631 expect(vec[27] == false) catch @panic("test failure");
3632 expect(vec[28] == true) catch @panic("test failure");
3633 expect(vec[29] == true) catch @panic("test failure");
3634 expect(vec[30] == false) catch @panic("test failure");
3635 expect(vec[31] == true) catch @panic("test failure");
3636 }
3637
3638 export fn zig_vector_64_bool(vec: Vector64Bool) void {
3639 expect(vec[0] == true) catch @panic("test failure");
3640 expect(vec[1] == true) catch @panic("test failure");
3641 expect(vec[2] == false) catch @panic("test failure");
3642 expect(vec[3] == true) catch @panic("test failure");
3643 expect(vec[4] == false) catch @panic("test failure");
3644 expect(vec[5] == true) catch @panic("test failure");
3645 expect(vec[6] == false) catch @panic("test failure");
3646 expect(vec[7] == false) catch @panic("test failure");
3647 expect(vec[8] == true) catch @panic("test failure");
3648 expect(vec[9] == true) catch @panic("test failure");
3649 expect(vec[10] == true) catch @panic("test failure");
3650 expect(vec[11] == true) catch @panic("test failure");
3651 expect(vec[12] == true) catch @panic("test failure");
3652 expect(vec[13] == true) catch @panic("test failure");
3653 expect(vec[14] == true) catch @panic("test failure");
3654 expect(vec[15] == false) catch @panic("test failure");
3655 expect(vec[16] == false) catch @panic("test failure");
3656 expect(vec[17] == true) catch @panic("test failure");
3657 expect(vec[18] == true) catch @panic("test failure");
3658 expect(vec[19] == false) catch @panic("test failure");
3659 expect(vec[20] == true) catch @panic("test failure");
3660 expect(vec[21] == true) catch @panic("test failure");
3661 expect(vec[22] == true) catch @panic("test failure");
3662 expect(vec[23] == true) catch @panic("test failure");
3663 expect(vec[24] == false) catch @panic("test failure");
3664 expect(vec[25] == false) catch @panic("test failure");
3665 expect(vec[26] == true) catch @panic("test failure");
3666 expect(vec[27] == false) catch @panic("test failure");
3667 expect(vec[28] == false) catch @panic("test failure");
3668 expect(vec[29] == true) catch @panic("test failure");
3669 expect(vec[30] == false) catch @panic("test failure");
3670 expect(vec[31] == true) catch @panic("test failure");
3671 expect(vec[32] == false) catch @panic("test failure");
3672 expect(vec[33] == true) catch @panic("test failure");
3673 expect(vec[34] == true) catch @panic("test failure");
3674 expect(vec[35] == false) catch @panic("test failure");
3675 expect(vec[36] == true) catch @panic("test failure");
3676 expect(vec[37] == true) catch @panic("test failure");
3677 expect(vec[38] == false) catch @panic("test failure");
3678 expect(vec[39] == false) catch @panic("test failure");
3679 expect(vec[40] == true) catch @panic("test failure");
3680 expect(vec[41] == true) catch @panic("test failure");
3681 expect(vec[42] == true) catch @panic("test failure");
3682 expect(vec[43] == true) catch @panic("test failure");
3683 expect(vec[44] == true) catch @panic("test failure");
3684 expect(vec[45] == false) catch @panic("test failure");
3685 expect(vec[46] == true) catch @panic("test failure");
3686 expect(vec[47] == false) catch @panic("test failure");
3687 expect(vec[48] == false) catch @panic("test failure");
3688 expect(vec[49] == false) catch @panic("test failure");
3689 expect(vec[50] == false) catch @panic("test failure");
3690 expect(vec[51] == false) catch @panic("test failure");
3691 expect(vec[52] == true) catch @panic("test failure");
3692 expect(vec[53] == false) catch @panic("test failure");
3693 expect(vec[54] == false) catch @panic("test failure");
3694 expect(vec[55] == true) catch @panic("test failure");
3695 expect(vec[56] == true) catch @panic("test failure");
3696 expect(vec[57] == false) catch @panic("test failure");
3697 expect(vec[58] == false) catch @panic("test failure");
3698 expect(vec[59] == false) catch @panic("test failure");
3699 expect(vec[60] == true) catch @panic("test failure");
3700 expect(vec[61] == true) catch @panic("test failure");
3701 expect(vec[62] == true) catch @panic("test failure");
3702 expect(vec[63] == true) catch @panic("test failure");
3703 }
3704
3705 export fn zig_vector_128_bool(vec: Vector128Bool) void {
3706 expect(vec[0] == true) catch @panic("test failure");
3707 expect(vec[1] == true) catch @panic("test failure");
3708 expect(vec[2] == false) catch @panic("test failure");
3709 expect(vec[3] == true) catch @panic("test failure");
3710 expect(vec[4] == true) catch @panic("test failure");
3711 expect(vec[5] == false) catch @panic("test failure");
3712 expect(vec[6] == false) catch @panic("test failure");
3713 expect(vec[7] == true) catch @panic("test failure");
3714 expect(vec[8] == true) catch @panic("test failure");
3715 expect(vec[9] == true) catch @panic("test failure");
3716 expect(vec[10] == true) catch @panic("test failure");
3717 expect(vec[11] == true) catch @panic("test failure");
3718 expect(vec[12] == false) catch @panic("test failure");
3719 expect(vec[13] == false) catch @panic("test failure");
3720 expect(vec[14] == false) catch @panic("test failure");
3721 expect(vec[15] == true) catch @panic("test failure");
3722 expect(vec[16] == false) catch @panic("test failure");
3723 expect(vec[17] == true) catch @panic("test failure");
3724 expect(vec[18] == false) catch @panic("test failure");
3725 expect(vec[19] == false) catch @panic("test failure");
3726 expect(vec[20] == true) catch @panic("test failure");
3727 expect(vec[21] == false) catch @panic("test failure");
3728 expect(vec[22] == true) catch @panic("test failure");
3729 expect(vec[23] == false) catch @panic("test failure");
3730 expect(vec[24] == false) catch @panic("test failure");
3731 expect(vec[25] == false) catch @panic("test failure");
3732 expect(vec[26] == true) catch @panic("test failure");
3733 expect(vec[27] == false) catch @panic("test failure");
3734 expect(vec[28] == true) catch @panic("test failure");
3735 expect(vec[29] == true) catch @panic("test failure");
3736 expect(vec[30] == false) catch @panic("test failure");
3737 expect(vec[31] == true) catch @panic("test failure");
3738 expect(vec[32] == false) catch @panic("test failure");
3739 expect(vec[33] == true) catch @panic("test failure");
3740 expect(vec[34] == true) catch @panic("test failure");
3741 expect(vec[35] == false) catch @panic("test failure");
3742 expect(vec[36] == false) catch @panic("test failure");
3743 expect(vec[37] == false) catch @panic("test failure");
3744 expect(vec[38] == false) catch @panic("test failure");
3745 expect(vec[39] == true) catch @panic("test failure");
3746 expect(vec[40] == true) catch @panic("test failure");
3747 expect(vec[41] == false) catch @panic("test failure");
3748 expect(vec[42] == true) catch @panic("test failure");
3749 expect(vec[43] == false) catch @panic("test failure");
3750 expect(vec[44] == false) catch @panic("test failure");
3751 expect(vec[45] == true) catch @panic("test failure");
3752 expect(vec[46] == false) catch @panic("test failure");
3753 expect(vec[47] == false) catch @panic("test failure");
3754 expect(vec[48] == true) catch @panic("test failure");
3755 expect(vec[49] == true) catch @panic("test failure");
3756 expect(vec[50] == false) catch @panic("test failure");
3757 expect(vec[51] == false) catch @panic("test failure");
3758 expect(vec[52] == true) catch @panic("test failure");
3759 expect(vec[53] == false) catch @panic("test failure");
3760 expect(vec[54] == false) catch @panic("test failure");
3761 expect(vec[55] == true) catch @panic("test failure");
3762 expect(vec[56] == true) catch @panic("test failure");
3763 expect(vec[57] == true) catch @panic("test failure");
3764 expect(vec[58] == true) catch @panic("test failure");
3765 expect(vec[59] == true) catch @panic("test failure");
3766 expect(vec[60] == true) catch @panic("test failure");
3767 expect(vec[61] == true) catch @panic("test failure");
3768 expect(vec[62] == true) catch @panic("test failure");
3769 expect(vec[63] == false) catch @panic("test failure");
3770 expect(vec[64] == false) catch @panic("test failure");
3771 expect(vec[65] == true) catch @panic("test failure");
3772 expect(vec[66] == false) catch @panic("test failure");
3773 expect(vec[67] == true) catch @panic("test failure");
3774 expect(vec[68] == true) catch @panic("test failure");
3775 expect(vec[69] == true) catch @panic("test failure");
3776 expect(vec[70] == true) catch @panic("test failure");
3777 expect(vec[71] == false) catch @panic("test failure");
3778 expect(vec[72] == false) catch @panic("test failure");
3779 expect(vec[73] == false) catch @panic("test failure");
3780 expect(vec[74] == true) catch @panic("test failure");
3781 expect(vec[75] == true) catch @panic("test failure");
3782 expect(vec[76] == false) catch @panic("test failure");
3783 expect(vec[77] == true) catch @panic("test failure");
3784 expect(vec[78] == true) catch @panic("test failure");
3785 expect(vec[79] == true) catch @panic("test failure");
3786 expect(vec[80] == true) catch @panic("test failure");
3787 expect(vec[81] == false) catch @panic("test failure");
3788 expect(vec[82] == true) catch @panic("test failure");
3789 expect(vec[83] == true) catch @panic("test failure");
3790 expect(vec[84] == true) catch @panic("test failure");
3791 expect(vec[85] == true) catch @panic("test failure");
3792 expect(vec[86] == true) catch @panic("test failure");
3793 expect(vec[87] == true) catch @panic("test failure");
3794 expect(vec[88] == false) catch @panic("test failure");
3795 expect(vec[89] == true) catch @panic("test failure");
3796 expect(vec[90] == true) catch @panic("test failure");
3797 expect(vec[91] == true) catch @panic("test failure");
3798 expect(vec[92] == true) catch @panic("test failure");
3799 expect(vec[93] == true) catch @panic("test failure");
3800 expect(vec[94] == true) catch @panic("test failure");
3801 expect(vec[95] == false) catch @panic("test failure");
3802 expect(vec[96] == false) catch @panic("test failure");
3803 expect(vec[97] == false) catch @panic("test failure");
3804 expect(vec[98] == true) catch @panic("test failure");
3805 expect(vec[99] == true) catch @panic("test failure");
3806 expect(vec[100] == true) catch @panic("test failure");
3807 expect(vec[101] == true) catch @panic("test failure");
3808 expect(vec[102] == true) catch @panic("test failure");
3809 expect(vec[103] == true) catch @panic("test failure");
3810 expect(vec[104] == true) catch @panic("test failure");
3811 expect(vec[105] == false) catch @panic("test failure");
3812 expect(vec[106] == false) catch @panic("test failure");
3813 expect(vec[107] == false) catch @panic("test failure");
3814 expect(vec[108] == false) catch @panic("test failure");
3815 expect(vec[109] == false) catch @panic("test failure");
3816 expect(vec[110] == true) catch @panic("test failure");
3817 expect(vec[111] == true) catch @panic("test failure");
3818 expect(vec[112] == true) catch @panic("test failure");
3819 expect(vec[113] == false) catch @panic("test failure");
3820 expect(vec[114] == false) catch @panic("test failure");
3821 expect(vec[115] == false) catch @panic("test failure");
3822 expect(vec[116] == false) catch @panic("test failure");
3823 expect(vec[117] == false) catch @panic("test failure");
3824 expect(vec[118] == true) catch @panic("test failure");
3825 expect(vec[119] == false) catch @panic("test failure");
3826 expect(vec[120] == false) catch @panic("test failure");
3827 expect(vec[121] == false) catch @panic("test failure");
3828 expect(vec[122] == false) catch @panic("test failure");
3829 expect(vec[123] == true) catch @panic("test failure");
3830 expect(vec[124] == true) catch @panic("test failure");
3831 expect(vec[125] == false) catch @panic("test failure");
3832 expect(vec[126] == true) catch @panic("test failure");
3833 expect(vec[127] == false) catch @panic("test failure");
3834 }
3835
3836 export fn zig_vector_256_bool(vec: Vector256Bool) void {
3837 expect(vec[0] == false) catch @panic("test failure");
3838 expect(vec[1] == false) catch @panic("test failure");
3839 expect(vec[2] == false) catch @panic("test failure");
3840 expect(vec[3] == false) catch @panic("test failure");
3841 expect(vec[4] == true) catch @panic("test failure");
3842 expect(vec[5] == true) catch @panic("test failure");
3843 expect(vec[6] == false) catch @panic("test failure");
3844 expect(vec[7] == false) catch @panic("test failure");
3845 expect(vec[8] == false) catch @panic("test failure");
3846 expect(vec[9] == true) catch @panic("test failure");
3847 expect(vec[10] == true) catch @panic("test failure");
3848 expect(vec[11] == false) catch @panic("test failure");
3849 expect(vec[12] == true) catch @panic("test failure");
3850 expect(vec[13] == false) catch @panic("test failure");
3851 expect(vec[14] == false) catch @panic("test failure");
3852 expect(vec[15] == false) catch @panic("test failure");
3853 expect(vec[16] == false) catch @panic("test failure");
3854 expect(vec[17] == true) catch @panic("test failure");
3855 expect(vec[18] == true) catch @panic("test failure");
3856 expect(vec[19] == true) catch @panic("test failure");
3857 expect(vec[20] == false) catch @panic("test failure");
3858 expect(vec[21] == true) catch @panic("test failure");
3859 expect(vec[22] == true) catch @panic("test failure");
3860 expect(vec[23] == false) catch @panic("test failure");
3861 expect(vec[24] == true) catch @panic("test failure");
3862 expect(vec[25] == false) catch @panic("test failure");
3863 expect(vec[26] == false) catch @panic("test failure");
3864 expect(vec[27] == true) catch @panic("test failure");
3865 expect(vec[28] == true) catch @panic("test failure");
3866 expect(vec[29] == true) catch @panic("test failure");
3867 expect(vec[30] == false) catch @panic("test failure");
3868 expect(vec[31] == true) catch @panic("test failure");
3869 expect(vec[32] == false) catch @panic("test failure");
3870 expect(vec[33] == true) catch @panic("test failure");
3871 expect(vec[34] == false) catch @panic("test failure");
3872 expect(vec[35] == false) catch @panic("test failure");
3873 expect(vec[36] == false) catch @panic("test failure");
3874 expect(vec[37] == true) catch @panic("test failure");
3875 expect(vec[38] == false) catch @panic("test failure");
3876 expect(vec[39] == false) catch @panic("test failure");
3877 expect(vec[40] == true) catch @panic("test failure");
3878 expect(vec[41] == true) catch @panic("test failure");
3879 expect(vec[42] == false) catch @panic("test failure");
3880 expect(vec[43] == true) catch @panic("test failure");
3881 expect(vec[44] == true) catch @panic("test failure");
3882 expect(vec[45] == false) catch @panic("test failure");
3883 expect(vec[46] == true) catch @panic("test failure");
3884 expect(vec[47] == false) catch @panic("test failure");
3885 expect(vec[48] == true) catch @panic("test failure");
3886 expect(vec[49] == false) catch @panic("test failure");
3887 expect(vec[50] == true) catch @panic("test failure");
3888 expect(vec[51] == false) catch @panic("test failure");
3889 expect(vec[52] == true) catch @panic("test failure");
3890 expect(vec[53] == true) catch @panic("test failure");
3891 expect(vec[54] == true) catch @panic("test failure");
3892 expect(vec[55] == false) catch @panic("test failure");
3893 expect(vec[56] == false) catch @panic("test failure");
3894 expect(vec[57] == true) catch @panic("test failure");
3895 expect(vec[58] == true) catch @panic("test failure");
3896 expect(vec[59] == false) catch @panic("test failure");
3897 expect(vec[60] == false) catch @panic("test failure");
3898 expect(vec[61] == true) catch @panic("test failure");
3899 expect(vec[62] == true) catch @panic("test failure");
3900 expect(vec[63] == false) catch @panic("test failure");
3901 expect(vec[64] == false) catch @panic("test failure");
3902 expect(vec[65] == false) catch @panic("test failure");
3903 expect(vec[66] == true) catch @panic("test failure");
3904 expect(vec[67] == true) catch @panic("test failure");
3905 expect(vec[68] == false) catch @panic("test failure");
3906 expect(vec[69] == true) catch @panic("test failure");
3907 expect(vec[70] == false) catch @panic("test failure");
3908 expect(vec[71] == true) catch @panic("test failure");
3909 expect(vec[72] == false) catch @panic("test failure");
3910 expect(vec[73] == true) catch @panic("test failure");
3911 expect(vec[74] == false) catch @panic("test failure");
3912 expect(vec[75] == false) catch @panic("test failure");
3913 expect(vec[76] == true) catch @panic("test failure");
3914 expect(vec[77] == false) catch @panic("test failure");
3915 expect(vec[78] == false) catch @panic("test failure");
3916 expect(vec[79] == false) catch @panic("test failure");
3917 expect(vec[80] == false) catch @panic("test failure");
3918 expect(vec[81] == false) catch @panic("test failure");
3919 expect(vec[82] == true) catch @panic("test failure");
3920 expect(vec[83] == false) catch @panic("test failure");
3921 expect(vec[84] == false) catch @panic("test failure");
3922 expect(vec[85] == false) catch @panic("test failure");
3923 expect(vec[86] == true) catch @panic("test failure");
3924 expect(vec[87] == true) catch @panic("test failure");
3925 expect(vec[88] == true) catch @panic("test failure");
3926 expect(vec[89] == false) catch @panic("test failure");
3927 expect(vec[90] == true) catch @panic("test failure");
3928 expect(vec[91] == false) catch @panic("test failure");
3929 expect(vec[92] == true) catch @panic("test failure");
3930 expect(vec[93] == false) catch @panic("test failure");
3931 expect(vec[94] == true) catch @panic("test failure");
3932 expect(vec[95] == true) catch @panic("test failure");
3933 expect(vec[96] == true) catch @panic("test failure");
3934 expect(vec[97] == true) catch @panic("test failure");
3935 expect(vec[98] == false) catch @panic("test failure");
3936 expect(vec[99] == true) catch @panic("test failure");
3937 expect(vec[100] == false) catch @panic("test failure");
3938 expect(vec[101] == true) catch @panic("test failure");
3939 expect(vec[102] == true) catch @panic("test failure");
3940 expect(vec[103] == false) catch @panic("test failure");
3941 expect(vec[104] == false) catch @panic("test failure");
3942 expect(vec[105] == true) catch @panic("test failure");
3943 expect(vec[106] == false) catch @panic("test failure");
3944 expect(vec[107] == true) catch @panic("test failure");
3945 expect(vec[108] == false) catch @panic("test failure");
3946 expect(vec[109] == false) catch @panic("test failure");
3947 expect(vec[110] == false) catch @panic("test failure");
3948 expect(vec[111] == false) catch @panic("test failure");
3949 expect(vec[112] == false) catch @panic("test failure");
3950 expect(vec[113] == false) catch @panic("test failure");
3951 expect(vec[114] == false) catch @panic("test failure");
3952 expect(vec[115] == false) catch @panic("test failure");
3953 expect(vec[116] == false) catch @panic("test failure");
3954 expect(vec[117] == false) catch @panic("test failure");
3955 expect(vec[118] == false) catch @panic("test failure");
3956 expect(vec[119] == false) catch @panic("test failure");
3957 expect(vec[120] == false) catch @panic("test failure");
3958 expect(vec[121] == false) catch @panic("test failure");
3959 expect(vec[122] == true) catch @panic("test failure");
3960 expect(vec[123] == true) catch @panic("test failure");
3961 expect(vec[124] == false) catch @panic("test failure");
3962 expect(vec[125] == false) catch @panic("test failure");
3963 expect(vec[126] == false) catch @panic("test failure");
3964 expect(vec[127] == true) catch @panic("test failure");
3965 expect(vec[128] == true) catch @panic("test failure");
3966 expect(vec[129] == true) catch @panic("test failure");
3967 expect(vec[130] == true) catch @panic("test failure");
3968 expect(vec[131] == false) catch @panic("test failure");
3969 expect(vec[132] == false) catch @panic("test failure");
3970 expect(vec[133] == false) catch @panic("test failure");
3971 expect(vec[134] == true) catch @panic("test failure");
3972 expect(vec[135] == true) catch @panic("test failure");
3973 expect(vec[136] == false) catch @panic("test failure");
3974 expect(vec[137] == false) catch @panic("test failure");
3975 expect(vec[138] == true) catch @panic("test failure");
3976 expect(vec[139] == true) catch @panic("test failure");
3977 expect(vec[140] == true) catch @panic("test failure");
3978 expect(vec[141] == true) catch @panic("test failure");
3979 expect(vec[142] == true) catch @panic("test failure");
3980 expect(vec[143] == false) catch @panic("test failure");
3981 expect(vec[144] == true) catch @panic("test failure");
3982 expect(vec[145] == true) catch @panic("test failure");
3983 expect(vec[146] == true) catch @panic("test failure");
3984 expect(vec[147] == false) catch @panic("test failure");
3985 expect(vec[148] == false) catch @panic("test failure");
3986 expect(vec[149] == false) catch @panic("test failure");
3987 expect(vec[150] == false) catch @panic("test failure");
3988 expect(vec[151] == false) catch @panic("test failure");
3989 expect(vec[152] == false) catch @panic("test failure");
3990 expect(vec[153] == false) catch @panic("test failure");
3991 expect(vec[154] == true) catch @panic("test failure");
3992 expect(vec[155] == false) catch @panic("test failure");
3993 expect(vec[156] == false) catch @panic("test failure");
3994 expect(vec[157] == false) catch @panic("test failure");
3995 expect(vec[158] == true) catch @panic("test failure");
3996 expect(vec[159] == true) catch @panic("test failure");
3997 expect(vec[160] == false) catch @panic("test failure");
3998 expect(vec[161] == true) catch @panic("test failure");
3999 expect(vec[162] == false) catch @panic("test failure");
4000 expect(vec[163] == false) catch @panic("test failure");
4001 expect(vec[164] == false) catch @panic("test failure");
4002 expect(vec[165] == true) catch @panic("test failure");
4003 expect(vec[166] == false) catch @panic("test failure");
4004 expect(vec[167] == true) catch @panic("test failure");
4005 expect(vec[168] == false) catch @panic("test failure");
4006 expect(vec[169] == false) catch @panic("test failure");
4007 expect(vec[170] == false) catch @panic("test failure");
4008 expect(vec[171] == false) catch @panic("test failure");
4009 expect(vec[172] == true) catch @panic("test failure");
4010 expect(vec[173] == true) catch @panic("test failure");
4011 expect(vec[174] == true) catch @panic("test failure");
4012 expect(vec[175] == true) catch @panic("test failure");
4013 expect(vec[176] == true) catch @panic("test failure");
4014 expect(vec[177] == true) catch @panic("test failure");
4015 expect(vec[178] == false) catch @panic("test failure");
4016 expect(vec[179] == true) catch @panic("test failure");
4017 expect(vec[180] == true) catch @panic("test failure");
4018 expect(vec[181] == false) catch @panic("test failure");
4019 expect(vec[182] == true) catch @panic("test failure");
4020 expect(vec[183] == false) catch @panic("test failure");
4021 expect(vec[184] == true) catch @panic("test failure");
4022 expect(vec[185] == false) catch @panic("test failure");
4023 expect(vec[186] == true) catch @panic("test failure");
4024 expect(vec[187] == false) catch @panic("test failure");
4025 expect(vec[188] == true) catch @panic("test failure");
4026 expect(vec[189] == false) catch @panic("test failure");
4027 expect(vec[190] == false) catch @panic("test failure");
4028 expect(vec[191] == false) catch @panic("test failure");
4029 expect(vec[192] == false) catch @panic("test failure");
4030 expect(vec[193] == true) catch @panic("test failure");
4031 expect(vec[194] == true) catch @panic("test failure");
4032 expect(vec[195] == true) catch @panic("test failure");
4033 expect(vec[196] == false) catch @panic("test failure");
4034 expect(vec[197] == false) catch @panic("test failure");
4035 expect(vec[198] == true) catch @panic("test failure");
4036 expect(vec[199] == false) catch @panic("test failure");
4037 expect(vec[200] == false) catch @panic("test failure");
4038 expect(vec[201] == true) catch @panic("test failure");
4039 expect(vec[202] == true) catch @panic("test failure");
4040 expect(vec[203] == false) catch @panic("test failure");
4041 expect(vec[204] == true) catch @panic("test failure");
4042 expect(vec[205] == false) catch @panic("test failure");
4043 expect(vec[206] == true) catch @panic("test failure");
4044 expect(vec[207] == false) catch @panic("test failure");
4045 expect(vec[208] == false) catch @panic("test failure");
4046 expect(vec[209] == false) catch @panic("test failure");
4047 expect(vec[210] == true) catch @panic("test failure");
4048 expect(vec[211] == true) catch @panic("test failure");
4049 expect(vec[212] == false) catch @panic("test failure");
4050 expect(vec[213] == false) catch @panic("test failure");
4051 expect(vec[214] == false) catch @panic("test failure");
4052 expect(vec[215] == true) catch @panic("test failure");
4053 expect(vec[216] == false) catch @panic("test failure");
4054 expect(vec[217] == true) catch @panic("test failure");
4055 expect(vec[218] == true) catch @panic("test failure");
4056 expect(vec[219] == true) catch @panic("test failure");
4057 expect(vec[220] == false) catch @panic("test failure");
4058 expect(vec[221] == true) catch @panic("test failure");
4059 expect(vec[222] == false) catch @panic("test failure");
4060 expect(vec[223] == true) catch @panic("test failure");
4061 expect(vec[224] == false) catch @panic("test failure");
4062 expect(vec[225] == false) catch @panic("test failure");
4063 expect(vec[226] == false) catch @panic("test failure");
4064 expect(vec[227] == true) catch @panic("test failure");
4065 expect(vec[228] == true) catch @panic("test failure");
4066 expect(vec[229] == false) catch @panic("test failure");
4067 expect(vec[230] == false) catch @panic("test failure");
4068 expect(vec[231] == false) catch @panic("test failure");
4069 expect(vec[232] == false) catch @panic("test failure");
4070 expect(vec[233] == false) catch @panic("test failure");
4071 expect(vec[234] == true) catch @panic("test failure");
4072 expect(vec[235] == false) catch @panic("test failure");
4073 expect(vec[236] == false) catch @panic("test failure");
4074 expect(vec[237] == false) catch @panic("test failure");
4075 expect(vec[238] == true) catch @panic("test failure");
4076 expect(vec[239] == false) catch @panic("test failure");
4077 expect(vec[240] == true) catch @panic("test failure");
4078 expect(vec[241] == true) catch @panic("test failure");
4079 expect(vec[242] == true) catch @panic("test failure");
4080 expect(vec[243] == false) catch @panic("test failure");
4081 expect(vec[244] == false) catch @panic("test failure");
4082 expect(vec[245] == true) catch @panic("test failure");
4083 expect(vec[246] == false) catch @panic("test failure");
4084 expect(vec[247] == false) catch @panic("test failure");
4085 expect(vec[248] == false) catch @panic("test failure");
4086 expect(vec[249] == true) catch @panic("test failure");
4087 expect(vec[250] == false) catch @panic("test failure");
4088 expect(vec[251] == false) catch @panic("test failure");
4089 expect(vec[252] == true) catch @panic("test failure");
4090 expect(vec[253] == true) catch @panic("test failure");
4091 expect(vec[254] == true) catch @panic("test failure");
4092 expect(vec[255] == true) catch @panic("test failure");
4093 }
4094
4095 export fn zig_vector_512_bool(vec: Vector512Bool) void {
4096 expect(vec[0] == false) catch @panic("test failure");
4097 expect(vec[1] == true) catch @panic("test failure");
4098 expect(vec[2] == true) catch @panic("test failure");
4099 expect(vec[3] == false) catch @panic("test failure");
4100 expect(vec[4] == true) catch @panic("test failure");
4101 expect(vec[5] == false) catch @panic("test failure");
4102 expect(vec[6] == true) catch @panic("test failure");
4103 expect(vec[7] == false) catch @panic("test failure");
4104 expect(vec[8] == false) catch @panic("test failure");
4105 expect(vec[9] == false) catch @panic("test failure");
4106 expect(vec[10] == false) catch @panic("test failure");
4107 expect(vec[11] == false) catch @panic("test failure");
4108 expect(vec[12] == true) catch @panic("test failure");
4109 expect(vec[13] == false) catch @panic("test failure");
4110 expect(vec[14] == true) catch @panic("test failure");
4111 expect(vec[15] == false) catch @panic("test failure");
4112 expect(vec[16] == false) catch @panic("test failure");
4113 expect(vec[17] == false) catch @panic("test failure");
4114 expect(vec[18] == true) catch @panic("test failure");
4115 expect(vec[19] == true) catch @panic("test failure");
4116 expect(vec[20] == true) catch @panic("test failure");
4117 expect(vec[21] == true) catch @panic("test failure");
4118 expect(vec[22] == false) catch @panic("test failure");
4119 expect(vec[23] == false) catch @panic("test failure");
4120 expect(vec[24] == false) catch @panic("test failure");
4121 expect(vec[25] == true) catch @panic("test failure");
4122 expect(vec[26] == true) catch @panic("test failure");
4123 expect(vec[27] == false) catch @panic("test failure");
4124 expect(vec[28] == true) catch @panic("test failure");
4125 expect(vec[29] == true) catch @panic("test failure");
4126 expect(vec[30] == false) catch @panic("test failure");
4127 expect(vec[31] == false) catch @panic("test failure");
4128 expect(vec[32] == true) catch @panic("test failure");
4129 expect(vec[33] == true) catch @panic("test failure");
4130 expect(vec[34] == false) catch @panic("test failure");
4131 expect(vec[35] == false) catch @panic("test failure");
4132 expect(vec[36] == false) catch @panic("test failure");
4133 expect(vec[37] == false) catch @panic("test failure");
4134 expect(vec[38] == false) catch @panic("test failure");
4135 expect(vec[39] == false) catch @panic("test failure");
4136 expect(vec[40] == false) catch @panic("test failure");
4137 expect(vec[41] == true) catch @panic("test failure");
4138 expect(vec[42] == true) catch @panic("test failure");
4139 expect(vec[43] == true) catch @panic("test failure");
4140 expect(vec[44] == false) catch @panic("test failure");
4141 expect(vec[45] == true) catch @panic("test failure");
4142 expect(vec[46] == true) catch @panic("test failure");
4143 expect(vec[47] == true) catch @panic("test failure");
4144 expect(vec[48] == true) catch @panic("test failure");
4145 expect(vec[49] == true) catch @panic("test failure");
4146 expect(vec[50] == false) catch @panic("test failure");
4147 expect(vec[51] == true) catch @panic("test failure");
4148 expect(vec[52] == true) catch @panic("test failure");
4149 expect(vec[53] == true) catch @panic("test failure");
4150 expect(vec[54] == false) catch @panic("test failure");
4151 expect(vec[55] == true) catch @panic("test failure");
4152 expect(vec[56] == false) catch @panic("test failure");
4153 expect(vec[57] == false) catch @panic("test failure");
4154 expect(vec[58] == true) catch @panic("test failure");
4155 expect(vec[59] == false) catch @panic("test failure");
4156 expect(vec[60] == true) catch @panic("test failure");
4157 expect(vec[61] == true) catch @panic("test failure");
4158 expect(vec[62] == false) catch @panic("test failure");
4159 expect(vec[63] == false) catch @panic("test failure");
4160 expect(vec[64] == false) catch @panic("test failure");
4161 expect(vec[65] == true) catch @panic("test failure");
4162 expect(vec[66] == true) catch @panic("test failure");
4163 expect(vec[67] == true) catch @panic("test failure");
4164 expect(vec[68] == true) catch @panic("test failure");
4165 expect(vec[69] == false) catch @panic("test failure");
4166 expect(vec[70] == false) catch @panic("test failure");
4167 expect(vec[71] == true) catch @panic("test failure");
4168 expect(vec[72] == true) catch @panic("test failure");
4169 expect(vec[73] == false) catch @panic("test failure");
4170 expect(vec[74] == true) catch @panic("test failure");
4171 expect(vec[75] == true) catch @panic("test failure");
4172 expect(vec[76] == false) catch @panic("test failure");
4173 expect(vec[77] == false) catch @panic("test failure");
4174 expect(vec[78] == true) catch @panic("test failure");
4175 expect(vec[79] == false) catch @panic("test failure");
4176 expect(vec[80] == false) catch @panic("test failure");
4177 expect(vec[81] == false) catch @panic("test failure");
4178 expect(vec[82] == true) catch @panic("test failure");
4179 expect(vec[83] == true) catch @panic("test failure");
4180 expect(vec[84] == true) catch @panic("test failure");
4181 expect(vec[85] == false) catch @panic("test failure");
4182 expect(vec[86] == false) catch @panic("test failure");
4183 expect(vec[87] == true) catch @panic("test failure");
4184 expect(vec[88] == false) catch @panic("test failure");
4185 expect(vec[89] == true) catch @panic("test failure");
4186 expect(vec[90] == false) catch @panic("test failure");
4187 expect(vec[91] == false) catch @panic("test failure");
4188 expect(vec[92] == true) catch @panic("test failure");
4189 expect(vec[93] == false) catch @panic("test failure");
4190 expect(vec[94] == false) catch @panic("test failure");
4191 expect(vec[95] == true) catch @panic("test failure");
4192 expect(vec[96] == true) catch @panic("test failure");
4193 expect(vec[97] == false) catch @panic("test failure");
4194 expect(vec[98] == false) catch @panic("test failure");
4195 expect(vec[99] == false) catch @panic("test failure");
4196 expect(vec[100] == false) catch @panic("test failure");
4197 expect(vec[101] == true) catch @panic("test failure");
4198 expect(vec[102] == false) catch @panic("test failure");
4199 expect(vec[103] == false) catch @panic("test failure");
4200 expect(vec[104] == false) catch @panic("test failure");
4201 expect(vec[105] == false) catch @panic("test failure");
4202 expect(vec[106] == false) catch @panic("test failure");
4203 expect(vec[107] == false) catch @panic("test failure");
4204 expect(vec[108] == true) catch @panic("test failure");
4205 expect(vec[109] == true) catch @panic("test failure");
4206 expect(vec[110] == true) catch @panic("test failure");
4207 expect(vec[111] == true) catch @panic("test failure");
4208 expect(vec[112] == true) catch @panic("test failure");
4209 expect(vec[113] == false) catch @panic("test failure");
4210 expect(vec[114] == false) catch @panic("test failure");
4211 expect(vec[115] == false) catch @panic("test failure");
4212 expect(vec[116] == false) catch @panic("test failure");
4213 expect(vec[117] == true) catch @panic("test failure");
4214 expect(vec[118] == true) catch @panic("test failure");
4215 expect(vec[119] == false) catch @panic("test failure");
4216 expect(vec[120] == true) catch @panic("test failure");
4217 expect(vec[121] == true) catch @panic("test failure");
4218 expect(vec[122] == false) catch @panic("test failure");
4219 expect(vec[123] == false) catch @panic("test failure");
4220 expect(vec[124] == true) catch @panic("test failure");
4221 expect(vec[125] == false) catch @panic("test failure");
4222 expect(vec[126] == false) catch @panic("test failure");
4223 expect(vec[127] == false) catch @panic("test failure");
4224 expect(vec[128] == false) catch @panic("test failure");
4225 expect(vec[129] == true) catch @panic("test failure");
4226 expect(vec[130] == true) catch @panic("test failure");
4227 expect(vec[131] == true) catch @panic("test failure");
4228 expect(vec[132] == true) catch @panic("test failure");
4229 expect(vec[133] == false) catch @panic("test failure");
4230 expect(vec[134] == false) catch @panic("test failure");
4231 expect(vec[135] == false) catch @panic("test failure");
4232 expect(vec[136] == false) catch @panic("test failure");
4233 expect(vec[137] == true) catch @panic("test failure");
4234 expect(vec[138] == false) catch @panic("test failure");
4235 expect(vec[139] == false) catch @panic("test failure");
4236 expect(vec[140] == false) catch @panic("test failure");
4237 expect(vec[141] == false) catch @panic("test failure");
4238 expect(vec[142] == true) catch @panic("test failure");
4239 expect(vec[143] == true) catch @panic("test failure");
4240 expect(vec[144] == false) catch @panic("test failure");
4241 expect(vec[145] == true) catch @panic("test failure");
4242 expect(vec[146] == false) catch @panic("test failure");
4243 expect(vec[147] == true) catch @panic("test failure");
4244 expect(vec[148] == false) catch @panic("test failure");
4245 expect(vec[149] == false) catch @panic("test failure");
4246 expect(vec[150] == true) catch @panic("test failure");
4247 expect(vec[151] == true) catch @panic("test failure");
4248 expect(vec[152] == false) catch @panic("test failure");
4249 expect(vec[153] == true) catch @panic("test failure");
4250 expect(vec[154] == true) catch @panic("test failure");
4251 expect(vec[155] == false) catch @panic("test failure");
4252 expect(vec[156] == false) catch @panic("test failure");
4253 expect(vec[157] == false) catch @panic("test failure");
4254 expect(vec[158] == true) catch @panic("test failure");
4255 expect(vec[159] == false) catch @panic("test failure");
4256 expect(vec[160] == false) catch @panic("test failure");
4257 expect(vec[161] == false) catch @panic("test failure");
4258 expect(vec[162] == false) catch @panic("test failure");
4259 expect(vec[163] == true) catch @panic("test failure");
4260 expect(vec[164] == true) catch @panic("test failure");
4261 expect(vec[165] == false) catch @panic("test failure");
4262 expect(vec[166] == false) catch @panic("test failure");
4263 expect(vec[167] == true) catch @panic("test failure");
4264 expect(vec[168] == false) catch @panic("test failure");
4265 expect(vec[169] == true) catch @panic("test failure");
4266 expect(vec[170] == true) catch @panic("test failure");
4267 expect(vec[171] == false) catch @panic("test failure");
4268 expect(vec[172] == false) catch @panic("test failure");
4269 expect(vec[173] == false) catch @panic("test failure");
4270 expect(vec[174] == false) catch @panic("test failure");
4271 expect(vec[175] == false) catch @panic("test failure");
4272 expect(vec[176] == false) catch @panic("test failure");
4273 expect(vec[177] == true) catch @panic("test failure");
4274 expect(vec[178] == false) catch @panic("test failure");
4275 expect(vec[179] == false) catch @panic("test failure");
4276 expect(vec[180] == false) catch @panic("test failure");
4277 expect(vec[181] == false) catch @panic("test failure");
4278 expect(vec[182] == false) catch @panic("test failure");
4279 expect(vec[183] == false) catch @panic("test failure");
4280 expect(vec[184] == true) catch @panic("test failure");
4281 expect(vec[185] == false) catch @panic("test failure");
4282 expect(vec[186] == false) catch @panic("test failure");
4283 expect(vec[187] == false) catch @panic("test failure");
4284 expect(vec[188] == false) catch @panic("test failure");
4285 expect(vec[189] == true) catch @panic("test failure");
4286 expect(vec[190] == false) catch @panic("test failure");
4287 expect(vec[191] == false) catch @panic("test failure");
4288 expect(vec[192] == false) catch @panic("test failure");
4289 expect(vec[193] == false) catch @panic("test failure");
4290 expect(vec[194] == false) catch @panic("test failure");
4291 expect(vec[195] == false) catch @panic("test failure");
4292 expect(vec[196] == true) catch @panic("test failure");
4293 expect(vec[197] == true) catch @panic("test failure");
4294 expect(vec[198] == true) catch @panic("test failure");
4295 expect(vec[199] == false) catch @panic("test failure");
4296 expect(vec[200] == true) catch @panic("test failure");
4297 expect(vec[201] == true) catch @panic("test failure");
4298 expect(vec[202] == false) catch @panic("test failure");
4299 expect(vec[203] == false) catch @panic("test failure");
4300 expect(vec[204] == false) catch @panic("test failure");
4301 expect(vec[205] == false) catch @panic("test failure");
4302 expect(vec[206] == false) catch @panic("test failure");
4303 expect(vec[207] == true) catch @panic("test failure");
4304 expect(vec[208] == true) catch @panic("test failure");
4305 expect(vec[209] == false) catch @panic("test failure");
4306 expect(vec[210] == false) catch @panic("test failure");
4307 expect(vec[211] == false) catch @panic("test failure");
4308 expect(vec[212] == true) catch @panic("test failure");
4309 expect(vec[213] == false) catch @panic("test failure");
4310 expect(vec[214] == false) catch @panic("test failure");
4311 expect(vec[215] == true) catch @panic("test failure");
4312 expect(vec[216] == true) catch @panic("test failure");
4313 expect(vec[217] == true) catch @panic("test failure");
4314 expect(vec[218] == false) catch @panic("test failure");
4315 expect(vec[219] == false) catch @panic("test failure");
4316 expect(vec[220] == true) catch @panic("test failure");
4317 expect(vec[221] == false) catch @panic("test failure");
4318 expect(vec[222] == true) catch @panic("test failure");
4319 expect(vec[223] == true) catch @panic("test failure");
4320 expect(vec[224] == true) catch @panic("test failure");
4321 expect(vec[225] == true) catch @panic("test failure");
4322 expect(vec[226] == false) catch @panic("test failure");
4323 expect(vec[227] == true) catch @panic("test failure");
4324 expect(vec[228] == false) catch @panic("test failure");
4325 expect(vec[229] == false) catch @panic("test failure");
4326 expect(vec[230] == false) catch @panic("test failure");
4327 expect(vec[231] == true) catch @panic("test failure");
4328 expect(vec[232] == false) catch @panic("test failure");
4329 expect(vec[233] == false) catch @panic("test failure");
4330 expect(vec[234] == false) catch @panic("test failure");
4331 expect(vec[235] == false) catch @panic("test failure");
4332 expect(vec[236] == false) catch @panic("test failure");
4333 expect(vec[237] == false) catch @panic("test failure");
4334 expect(vec[238] == false) catch @panic("test failure");
4335 expect(vec[239] == true) catch @panic("test failure");
4336 expect(vec[240] == false) catch @panic("test failure");
4337 expect(vec[241] == false) catch @panic("test failure");
4338 expect(vec[242] == false) catch @panic("test failure");
4339 expect(vec[243] == true) catch @panic("test failure");
4340 expect(vec[244] == true) catch @panic("test failure");
4341 expect(vec[245] == true) catch @panic("test failure");
4342 expect(vec[246] == true) catch @panic("test failure");
4343 expect(vec[247] == false) catch @panic("test failure");
4344 expect(vec[248] == true) catch @panic("test failure");
4345 expect(vec[249] == true) catch @panic("test failure");
4346 expect(vec[250] == false) catch @panic("test failure");
4347 expect(vec[251] == false) catch @panic("test failure");
4348 expect(vec[252] == false) catch @panic("test failure");
4349 expect(vec[253] == true) catch @panic("test failure");
4350 expect(vec[254] == false) catch @panic("test failure");
4351 expect(vec[255] == false) catch @panic("test failure");
4352 expect(vec[256] == true) catch @panic("test failure");
4353 expect(vec[257] == true) catch @panic("test failure");
4354 expect(vec[258] == false) catch @panic("test failure");
4355 expect(vec[259] == true) catch @panic("test failure");
4356 expect(vec[260] == false) catch @panic("test failure");
4357 expect(vec[261] == true) catch @panic("test failure");
4358 expect(vec[262] == true) catch @panic("test failure");
4359 expect(vec[263] == false) catch @panic("test failure");
4360 expect(vec[264] == false) catch @panic("test failure");
4361 expect(vec[265] == false) catch @panic("test failure");
4362 expect(vec[266] == false) catch @panic("test failure");
4363 expect(vec[267] == true) catch @panic("test failure");
4364 expect(vec[268] == false) catch @panic("test failure");
4365 expect(vec[269] == true) catch @panic("test failure");
4366 expect(vec[270] == true) catch @panic("test failure");
4367 expect(vec[271] == false) catch @panic("test failure");
4368 expect(vec[272] == false) catch @panic("test failure");
4369 expect(vec[273] == true) catch @panic("test failure");
4370 expect(vec[274] == true) catch @panic("test failure");
4371 expect(vec[275] == true) catch @panic("test failure");
4372 expect(vec[276] == false) catch @panic("test failure");
4373 expect(vec[277] == true) catch @panic("test failure");
4374 expect(vec[278] == false) catch @panic("test failure");
4375 expect(vec[279] == false) catch @panic("test failure");
4376 expect(vec[280] == true) catch @panic("test failure");
4377 expect(vec[281] == true) catch @panic("test failure");
4378 expect(vec[282] == false) catch @panic("test failure");
4379 expect(vec[283] == true) catch @panic("test failure");
4380 expect(vec[284] == false) catch @panic("test failure");
4381 expect(vec[285] == true) catch @panic("test failure");
4382 expect(vec[286] == true) catch @panic("test failure");
4383 expect(vec[287] == true) catch @panic("test failure");
4384 expect(vec[288] == true) catch @panic("test failure");
4385 expect(vec[289] == true) catch @panic("test failure");
4386 expect(vec[290] == true) catch @panic("test failure");
4387 expect(vec[291] == true) catch @panic("test failure");
4388 expect(vec[292] == true) catch @panic("test failure");
4389 expect(vec[293] == true) catch @panic("test failure");
4390 expect(vec[294] == true) catch @panic("test failure");
4391 expect(vec[295] == false) catch @panic("test failure");
4392 expect(vec[296] == true) catch @panic("test failure");
4393 expect(vec[297] == false) catch @panic("test failure");
4394 expect(vec[298] == true) catch @panic("test failure");
4395 expect(vec[299] == false) catch @panic("test failure");
4396 expect(vec[300] == true) catch @panic("test failure");
4397 expect(vec[301] == true) catch @panic("test failure");
4398 expect(vec[302] == false) catch @panic("test failure");
4399 expect(vec[303] == true) catch @panic("test failure");
4400 expect(vec[304] == false) catch @panic("test failure");
4401 expect(vec[305] == true) catch @panic("test failure");
4402 expect(vec[306] == false) catch @panic("test failure");
4403 expect(vec[307] == true) catch @panic("test failure");
4404 expect(vec[308] == true) catch @panic("test failure");
4405 expect(vec[309] == false) catch @panic("test failure");
4406 expect(vec[310] == true) catch @panic("test failure");
4407 expect(vec[311] == true) catch @panic("test failure");
4408 expect(vec[312] == true) catch @panic("test failure");
4409 expect(vec[313] == false) catch @panic("test failure");
4410 expect(vec[314] == false) catch @panic("test failure");
4411 expect(vec[315] == false) catch @panic("test failure");
4412 expect(vec[316] == false) catch @panic("test failure");
4413 expect(vec[317] == true) catch @panic("test failure");
4414 expect(vec[318] == true) catch @panic("test failure");
4415 expect(vec[319] == true) catch @panic("test failure");
4416 expect(vec[320] == true) catch @panic("test failure");
4417 expect(vec[321] == true) catch @panic("test failure");
4418 expect(vec[322] == true) catch @panic("test failure");
4419 expect(vec[323] == true) catch @panic("test failure");
4420 expect(vec[324] == true) catch @panic("test failure");
4421 expect(vec[325] == true) catch @panic("test failure");
4422 expect(vec[326] == false) catch @panic("test failure");
4423 expect(vec[327] == true) catch @panic("test failure");
4424 expect(vec[328] == false) catch @panic("test failure");
4425 expect(vec[329] == false) catch @panic("test failure");
4426 expect(vec[330] == true) catch @panic("test failure");
4427 expect(vec[331] == false) catch @panic("test failure");
4428 expect(vec[332] == false) catch @panic("test failure");
4429 expect(vec[333] == false) catch @panic("test failure");
4430 expect(vec[334] == false) catch @panic("test failure");
4431 expect(vec[335] == false) catch @panic("test failure");
4432 expect(vec[336] == false) catch @panic("test failure");
4433 expect(vec[337] == false) catch @panic("test failure");
4434 expect(vec[338] == false) catch @panic("test failure");
4435 expect(vec[339] == false) catch @panic("test failure");
4436 expect(vec[340] == false) catch @panic("test failure");
4437 expect(vec[341] == false) catch @panic("test failure");
4438 expect(vec[342] == true) catch @panic("test failure");
4439 expect(vec[343] == true) catch @panic("test failure");
4440 expect(vec[344] == false) catch @panic("test failure");
4441 expect(vec[345] == false) catch @panic("test failure");
4442 expect(vec[346] == false) catch @panic("test failure");
4443 expect(vec[347] == false) catch @panic("test failure");
4444 expect(vec[348] == false) catch @panic("test failure");
4445 expect(vec[349] == true) catch @panic("test failure");
4446 expect(vec[350] == true) catch @panic("test failure");
4447 expect(vec[351] == true) catch @panic("test failure");
4448 expect(vec[352] == true) catch @panic("test failure");
4449 expect(vec[353] == false) catch @panic("test failure");
4450 expect(vec[354] == false) catch @panic("test failure");
4451 expect(vec[355] == false) catch @panic("test failure");
4452 expect(vec[356] == false) catch @panic("test failure");
4453 expect(vec[357] == true) catch @panic("test failure");
4454 expect(vec[358] == true) catch @panic("test failure");
4455 expect(vec[359] == false) catch @panic("test failure");
4456 expect(vec[360] == false) catch @panic("test failure");
4457 expect(vec[361] == false) catch @panic("test failure");
4458 expect(vec[362] == true) catch @panic("test failure");
4459 expect(vec[363] == true) catch @panic("test failure");
4460 expect(vec[364] == false) catch @panic("test failure");
4461 expect(vec[365] == false) catch @panic("test failure");
4462 expect(vec[366] == false) catch @panic("test failure");
4463 expect(vec[367] == false) catch @panic("test failure");
4464 expect(vec[368] == false) catch @panic("test failure");
4465 expect(vec[369] == true) catch @panic("test failure");
4466 expect(vec[370] == true) catch @panic("test failure");
4467 expect(vec[371] == false) catch @panic("test failure");
4468 expect(vec[372] == true) catch @panic("test failure");
4469 expect(vec[373] == true) catch @panic("test failure");
4470 expect(vec[374] == false) catch @panic("test failure");
4471 expect(vec[375] == true) catch @panic("test failure");
4472 expect(vec[376] == true) catch @panic("test failure");
4473 expect(vec[377] == false) catch @panic("test failure");
4474 expect(vec[378] == true) catch @panic("test failure");
4475 expect(vec[379] == true) catch @panic("test failure");
4476 expect(vec[380] == false) catch @panic("test failure");
4477 expect(vec[381] == true) catch @panic("test failure");
4478 expect(vec[382] == true) catch @panic("test failure");
4479 expect(vec[383] == false) catch @panic("test failure");
4480 expect(vec[384] == true) catch @panic("test failure");
4481 expect(vec[385] == false) catch @panic("test failure");
4482 expect(vec[386] == true) catch @panic("test failure");
4483 expect(vec[387] == true) catch @panic("test failure");
4484 expect(vec[388] == true) catch @panic("test failure");
4485 expect(vec[389] == true) catch @panic("test failure");
4486 expect(vec[390] == false) catch @panic("test failure");
4487 expect(vec[391] == false) catch @panic("test failure");
4488 expect(vec[392] == false) catch @panic("test failure");
4489 expect(vec[393] == true) catch @panic("test failure");
4490 expect(vec[394] == true) catch @panic("test failure");
4491 expect(vec[395] == true) catch @panic("test failure");
4492 expect(vec[396] == true) catch @panic("test failure");
4493 expect(vec[397] == false) catch @panic("test failure");
4494 expect(vec[398] == true) catch @panic("test failure");
4495 expect(vec[399] == true) catch @panic("test failure");
4496 expect(vec[400] == true) catch @panic("test failure");
4497 expect(vec[401] == false) catch @panic("test failure");
4498 expect(vec[402] == false) catch @panic("test failure");
4499 expect(vec[403] == true) catch @panic("test failure");
4500 expect(vec[404] == false) catch @panic("test failure");
4501 expect(vec[405] == false) catch @panic("test failure");
4502 expect(vec[406] == false) catch @panic("test failure");
4503 expect(vec[407] == true) catch @panic("test failure");
4504 expect(vec[408] == true) catch @panic("test failure");
4505 expect(vec[409] == true) catch @panic("test failure");
4506 expect(vec[410] == false) catch @panic("test failure");
4507 expect(vec[411] == true) catch @panic("test failure");
4508 expect(vec[412] == false) catch @panic("test failure");
4509 expect(vec[413] == false) catch @panic("test failure");
4510 expect(vec[414] == false) catch @panic("test failure");
4511 expect(vec[415] == true) catch @panic("test failure");
4512 expect(vec[416] == false) catch @panic("test failure");
4513 expect(vec[417] == false) catch @panic("test failure");
4514 expect(vec[418] == true) catch @panic("test failure");
4515 expect(vec[419] == true) catch @panic("test failure");
4516 expect(vec[420] == true) catch @panic("test failure");
4517 expect(vec[421] == true) catch @panic("test failure");
4518 expect(vec[422] == false) catch @panic("test failure");
4519 expect(vec[423] == true) catch @panic("test failure");
4520 expect(vec[424] == true) catch @panic("test failure");
4521 expect(vec[425] == false) catch @panic("test failure");
4522 expect(vec[426] == false) catch @panic("test failure");
4523 expect(vec[427] == false) catch @panic("test failure");
4524 expect(vec[428] == true) catch @panic("test failure");
4525 expect(vec[429] == false) catch @panic("test failure");
4526 expect(vec[430] == true) catch @panic("test failure");
4527 expect(vec[431] == true) catch @panic("test failure");
4528 expect(vec[432] == false) catch @panic("test failure");
4529 expect(vec[433] == false) catch @panic("test failure");
4530 expect(vec[434] == false) catch @panic("test failure");
4531 expect(vec[435] == false) catch @panic("test failure");
4532 expect(vec[436] == true) catch @panic("test failure");
4533 expect(vec[437] == false) catch @panic("test failure");
4534 expect(vec[438] == true) catch @panic("test failure");
4535 expect(vec[439] == false) catch @panic("test failure");
4536 expect(vec[440] == false) catch @panic("test failure");
4537 expect(vec[441] == false) catch @panic("test failure");
4538 expect(vec[442] == false) catch @panic("test failure");
4539 expect(vec[443] == true) catch @panic("test failure");
4540 expect(vec[444] == false) catch @panic("test failure");
4541 expect(vec[445] == false) catch @panic("test failure");
4542 expect(vec[446] == true) catch @panic("test failure");
4543 expect(vec[447] == true) catch @panic("test failure");
4544 expect(vec[448] == true) catch @panic("test failure");
4545 expect(vec[449] == false) catch @panic("test failure");
4546 expect(vec[450] == true) catch @panic("test failure");
4547 expect(vec[451] == true) catch @panic("test failure");
4548 expect(vec[452] == false) catch @panic("test failure");
4549 expect(vec[453] == true) catch @panic("test failure");
4550 expect(vec[454] == false) catch @panic("test failure");
4551 expect(vec[455] == true) catch @panic("test failure");
4552 expect(vec[456] == false) catch @panic("test failure");
4553 expect(vec[457] == false) catch @panic("test failure");
4554 expect(vec[458] == false) catch @panic("test failure");
4555 expect(vec[459] == true) catch @panic("test failure");
4556 expect(vec[460] == false) catch @panic("test failure");
4557 expect(vec[461] == false) catch @panic("test failure");
4558 expect(vec[462] == false) catch @panic("test failure");
4559 expect(vec[463] == true) catch @panic("test failure");
4560 expect(vec[464] == true) catch @panic("test failure");
4561 expect(vec[465] == true) catch @panic("test failure");
4562 expect(vec[466] == true) catch @panic("test failure");
4563 expect(vec[467] == true) catch @panic("test failure");
4564 expect(vec[468] == false) catch @panic("test failure");
4565 expect(vec[469] == false) catch @panic("test failure");
4566 expect(vec[470] == false) catch @panic("test failure");
4567 expect(vec[471] == false) catch @panic("test failure");
4568 expect(vec[472] == false) catch @panic("test failure");
4569 expect(vec[473] == false) catch @panic("test failure");
4570 expect(vec[474] == true) catch @panic("test failure");
4571 expect(vec[475] == true) catch @panic("test failure");
4572 expect(vec[476] == true) catch @panic("test failure");
4573 expect(vec[477] == true) catch @panic("test failure");
4574 expect(vec[478] == true) catch @panic("test failure");
4575 expect(vec[479] == false) catch @panic("test failure");
4576 expect(vec[480] == true) catch @panic("test failure");
4577 expect(vec[481] == true) catch @panic("test failure");
4578 expect(vec[482] == false) catch @panic("test failure");
4579 expect(vec[483] == true) catch @panic("test failure");
4580 expect(vec[484] == false) catch @panic("test failure");
4581 expect(vec[485] == true) catch @panic("test failure");
4582 expect(vec[486] == false) catch @panic("test failure");
4583 expect(vec[487] == true) catch @panic("test failure");
4584 expect(vec[488] == false) catch @panic("test failure");
4585 expect(vec[489] == false) catch @panic("test failure");
4586 expect(vec[490] == false) catch @panic("test failure");
4587 expect(vec[491] == true) catch @panic("test failure");
4588 expect(vec[492] == false) catch @panic("test failure");
4589 expect(vec[493] == false) catch @panic("test failure");
4590 expect(vec[494] == false) catch @panic("test failure");
4591 expect(vec[495] == true) catch @panic("test failure");
4592 expect(vec[496] == true) catch @panic("test failure");
4593 expect(vec[497] == false) catch @panic("test failure");
4594 expect(vec[498] == false) catch @panic("test failure");
4595 expect(vec[499] == true) catch @panic("test failure");
4596 expect(vec[500] == false) catch @panic("test failure");
4597 expect(vec[501] == true) catch @panic("test failure");
4598 expect(vec[502] == false) catch @panic("test failure");
4599 expect(vec[503] == false) catch @panic("test failure");
4600 expect(vec[504] == false) catch @panic("test failure");
4601 expect(vec[505] == true) catch @panic("test failure");
4602 expect(vec[506] == true) catch @panic("test failure");
4603 expect(vec[507] == true) catch @panic("test failure");
4604 expect(vec[508] == true) catch @panic("test failure");
4605 expect(vec[509] == false) catch @panic("test failure");
4606 expect(vec[510] == false) catch @panic("test failure");
4607 expect(vec[511] == true) catch @panic("test failure");
4608 }
4609
4610 export fn zig_ret_vector_2_bool() Vector2Bool {
4611 return .{
4612 false,
4613 false,
4614 };
4615 }
4616
4617 export fn zig_ret_vector_4_bool() Vector4Bool {
4618 return .{
4619 false,
4620 true,
4621 true,
4622 true,
4623 };
4624 }
4625
4626 export fn zig_ret_vector_8_bool() Vector8Bool {
4627 return .{
4628 false,
4629 false,
4630 false,
4631 false,
4632 true,
4633 false,
4634 false,
4635 false,
4636 };
4637 }
4638
4639 export fn zig_ret_vector_16_bool() Vector16Bool {
4640 return .{
4641 false,
4642 true,
4643 false,
4644 false,
4645 false,
4646 true,
4647 false,
4648 false,
4649 true,
4650 false,
4651 false,
4652 false,
4653 false,
4654 true,
4655 false,
4656 false,
4657 };
4658 }
4659
4660 export fn zig_ret_vector_32_bool() Vector32Bool {
4661 return .{
4662 false,
4663 true,
4664 false,
4665 false,
4666 true,
4667 false,
4668 true,
4669 true,
4670 true,
4671 true,
4672 true,
4673 true,
4674 false,
4675 false,
4676 false,
4677 false,
4678 false,
4679 false,
4680 true,
4681 true,
4682 true,
4683 false,
4684 true,
4685 false,
4686 true,
4687 false,
4688 false,
4689 true,
4690 false,
4691 false,
4692 true,
4693 true,
4694 };
4695 }
4696
4697 export fn zig_ret_vector_64_bool() Vector64Bool {
4698 return .{
4699 true,
4700 false,
4701 true,
4702 false,
4703 false,
4704 true,
4705 false,
4706 true,
4707 true,
4708 false,
4709 true,
4710 false,
4711 true,
4712 false,
4713 false,
4714 true,
4715 false,
4716 false,
4717 true,
4718 true,
4719 false,
4720 false,
4721 true,
4722 false,
4723 false,
4724 true,
4725 true,
4726 true,
4727 true,
4728 true,
4729 false,
4730 false,
4731 true,
4732 true,
4733 true,
4734 true,
4735 false,
4736 true,
4737 false,
4738 true,
4739 true,
4740 true,
4741 true,
4742 true,
4743 false,
4744 false,
4745 false,
4746 true,
4747 true,
4748 true,
4749 false,
4750 true,
4751 true,
4752 true,
4753 false,
4754 false,
4755 false,
4756 true,
4757 false,
4758 false,
4759 true,
4760 false,
4761 true,
4762 false,
4763 };
4764 }
4765
4766 export fn zig_ret_vector_128_bool() Vector128Bool {
955 _ = struct {
956 export fn zig_ret_vector_128_bool() @Vector(128, bool) {
4767957 return .{
4768958 true,
4769959 true,
......@@ -4895,8 +1085,416 @@ comptime {
48951085 true,
48961086 };
48971087 }
1088 export fn zig_vector_128_bool(vec: @Vector(128, bool)) void {
1089 expect(vec[0] == true) catch @panic("test failure");
1090 expect(vec[1] == true) catch @panic("test failure");
1091 expect(vec[2] == false) catch @panic("test failure");
1092 expect(vec[3] == true) catch @panic("test failure");
1093 expect(vec[4] == true) catch @panic("test failure");
1094 expect(vec[5] == false) catch @panic("test failure");
1095 expect(vec[6] == false) catch @panic("test failure");
1096 expect(vec[7] == true) catch @panic("test failure");
1097 expect(vec[8] == true) catch @panic("test failure");
1098 expect(vec[9] == true) catch @panic("test failure");
1099 expect(vec[10] == true) catch @panic("test failure");
1100 expect(vec[11] == true) catch @panic("test failure");
1101 expect(vec[12] == false) catch @panic("test failure");
1102 expect(vec[13] == false) catch @panic("test failure");
1103 expect(vec[14] == false) catch @panic("test failure");
1104 expect(vec[15] == true) catch @panic("test failure");
1105 expect(vec[16] == false) catch @panic("test failure");
1106 expect(vec[17] == true) catch @panic("test failure");
1107 expect(vec[18] == false) catch @panic("test failure");
1108 expect(vec[19] == false) catch @panic("test failure");
1109 expect(vec[20] == true) catch @panic("test failure");
1110 expect(vec[21] == false) catch @panic("test failure");
1111 expect(vec[22] == true) catch @panic("test failure");
1112 expect(vec[23] == false) catch @panic("test failure");
1113 expect(vec[24] == false) catch @panic("test failure");
1114 expect(vec[25] == false) catch @panic("test failure");
1115 expect(vec[26] == true) catch @panic("test failure");
1116 expect(vec[27] == false) catch @panic("test failure");
1117 expect(vec[28] == true) catch @panic("test failure");
1118 expect(vec[29] == true) catch @panic("test failure");
1119 expect(vec[30] == false) catch @panic("test failure");
1120 expect(vec[31] == true) catch @panic("test failure");
1121 expect(vec[32] == false) catch @panic("test failure");
1122 expect(vec[33] == true) catch @panic("test failure");
1123 expect(vec[34] == true) catch @panic("test failure");
1124 expect(vec[35] == false) catch @panic("test failure");
1125 expect(vec[36] == false) catch @panic("test failure");
1126 expect(vec[37] == false) catch @panic("test failure");
1127 expect(vec[38] == false) catch @panic("test failure");
1128 expect(vec[39] == true) catch @panic("test failure");
1129 expect(vec[40] == true) catch @panic("test failure");
1130 expect(vec[41] == false) catch @panic("test failure");
1131 expect(vec[42] == true) catch @panic("test failure");
1132 expect(vec[43] == false) catch @panic("test failure");
1133 expect(vec[44] == false) catch @panic("test failure");
1134 expect(vec[45] == true) catch @panic("test failure");
1135 expect(vec[46] == false) catch @panic("test failure");
1136 expect(vec[47] == false) catch @panic("test failure");
1137 expect(vec[48] == true) catch @panic("test failure");
1138 expect(vec[49] == true) catch @panic("test failure");
1139 expect(vec[50] == false) catch @panic("test failure");
1140 expect(vec[51] == false) catch @panic("test failure");
1141 expect(vec[52] == true) catch @panic("test failure");
1142 expect(vec[53] == false) catch @panic("test failure");
1143 expect(vec[54] == false) catch @panic("test failure");
1144 expect(vec[55] == true) catch @panic("test failure");
1145 expect(vec[56] == true) catch @panic("test failure");
1146 expect(vec[57] == true) catch @panic("test failure");
1147 expect(vec[58] == true) catch @panic("test failure");
1148 expect(vec[59] == true) catch @panic("test failure");
1149 expect(vec[60] == true) catch @panic("test failure");
1150 expect(vec[61] == true) catch @panic("test failure");
1151 expect(vec[62] == true) catch @panic("test failure");
1152 expect(vec[63] == false) catch @panic("test failure");
1153 expect(vec[64] == false) catch @panic("test failure");
1154 expect(vec[65] == true) catch @panic("test failure");
1155 expect(vec[66] == false) catch @panic("test failure");
1156 expect(vec[67] == true) catch @panic("test failure");
1157 expect(vec[68] == true) catch @panic("test failure");
1158 expect(vec[69] == true) catch @panic("test failure");
1159 expect(vec[70] == true) catch @panic("test failure");
1160 expect(vec[71] == false) catch @panic("test failure");
1161 expect(vec[72] == false) catch @panic("test failure");
1162 expect(vec[73] == false) catch @panic("test failure");
1163 expect(vec[74] == true) catch @panic("test failure");
1164 expect(vec[75] == true) catch @panic("test failure");
1165 expect(vec[76] == false) catch @panic("test failure");
1166 expect(vec[77] == true) catch @panic("test failure");
1167 expect(vec[78] == true) catch @panic("test failure");
1168 expect(vec[79] == true) catch @panic("test failure");
1169 expect(vec[80] == true) catch @panic("test failure");
1170 expect(vec[81] == false) catch @panic("test failure");
1171 expect(vec[82] == true) catch @panic("test failure");
1172 expect(vec[83] == true) catch @panic("test failure");
1173 expect(vec[84] == true) catch @panic("test failure");
1174 expect(vec[85] == true) catch @panic("test failure");
1175 expect(vec[86] == true) catch @panic("test failure");
1176 expect(vec[87] == true) catch @panic("test failure");
1177 expect(vec[88] == false) catch @panic("test failure");
1178 expect(vec[89] == true) catch @panic("test failure");
1179 expect(vec[90] == true) catch @panic("test failure");
1180 expect(vec[91] == true) catch @panic("test failure");
1181 expect(vec[92] == true) catch @panic("test failure");
1182 expect(vec[93] == true) catch @panic("test failure");
1183 expect(vec[94] == true) catch @panic("test failure");
1184 expect(vec[95] == false) catch @panic("test failure");
1185 expect(vec[96] == false) catch @panic("test failure");
1186 expect(vec[97] == false) catch @panic("test failure");
1187 expect(vec[98] == true) catch @panic("test failure");
1188 expect(vec[99] == true) catch @panic("test failure");
1189 expect(vec[100] == true) catch @panic("test failure");
1190 expect(vec[101] == true) catch @panic("test failure");
1191 expect(vec[102] == true) catch @panic("test failure");
1192 expect(vec[103] == true) catch @panic("test failure");
1193 expect(vec[104] == true) catch @panic("test failure");
1194 expect(vec[105] == false) catch @panic("test failure");
1195 expect(vec[106] == false) catch @panic("test failure");
1196 expect(vec[107] == false) catch @panic("test failure");
1197 expect(vec[108] == false) catch @panic("test failure");
1198 expect(vec[109] == false) catch @panic("test failure");
1199 expect(vec[110] == true) catch @panic("test failure");
1200 expect(vec[111] == true) catch @panic("test failure");
1201 expect(vec[112] == true) catch @panic("test failure");
1202 expect(vec[113] == false) catch @panic("test failure");
1203 expect(vec[114] == false) catch @panic("test failure");
1204 expect(vec[115] == false) catch @panic("test failure");
1205 expect(vec[116] == false) catch @panic("test failure");
1206 expect(vec[117] == false) catch @panic("test failure");
1207 expect(vec[118] == true) catch @panic("test failure");
1208 expect(vec[119] == false) catch @panic("test failure");
1209 expect(vec[120] == false) catch @panic("test failure");
1210 expect(vec[121] == false) catch @panic("test failure");
1211 expect(vec[122] == false) catch @panic("test failure");
1212 expect(vec[123] == true) catch @panic("test failure");
1213 expect(vec[124] == true) catch @panic("test failure");
1214 expect(vec[125] == false) catch @panic("test failure");
1215 expect(vec[126] == true) catch @panic("test failure");
1216 expect(vec[127] == false) catch @panic("test failure");
1217 }
1218 };
1219 }
1220}
1221
1222extern fn c_ret_vector_128_bool() @Vector(128, bool);
1223extern fn c_vector_128_bool(@Vector(128, bool)) void;
1224extern fn c_test_vector_128_bool() void;
1225
1226test "@Vector(128, bool)" {
1227 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
1228
1229 const vec = c_ret_vector_128_bool();
1230 try expect(vec[0] == false);
1231 try expect(vec[1] == true);
1232 try expect(vec[2] == true);
1233 try expect(vec[3] == false);
1234 try expect(vec[4] == true);
1235 try expect(vec[5] == false);
1236 try expect(vec[6] == false);
1237 try expect(vec[7] == true);
1238 try expect(vec[8] == true);
1239 try expect(vec[9] == false);
1240 try expect(vec[10] == true);
1241 try expect(vec[11] == false);
1242 try expect(vec[12] == false);
1243 try expect(vec[13] == false);
1244 try expect(vec[14] == true);
1245 try expect(vec[15] == false);
1246 try expect(vec[16] == true);
1247 try expect(vec[17] == false);
1248 try expect(vec[18] == false);
1249 try expect(vec[19] == true);
1250 try expect(vec[20] == false);
1251 try expect(vec[21] == true);
1252 try expect(vec[22] == false);
1253 try expect(vec[23] == false);
1254 try expect(vec[24] == false);
1255 try expect(vec[25] == true);
1256 try expect(vec[26] == true);
1257 try expect(vec[27] == true);
1258 try expect(vec[28] == false);
1259 try expect(vec[29] == false);
1260 try expect(vec[30] == false);
1261 try expect(vec[31] == false);
1262 try expect(vec[32] == true);
1263 try expect(vec[33] == true);
1264 try expect(vec[34] == true);
1265 try expect(vec[35] == false);
1266 try expect(vec[36] == true);
1267 try expect(vec[37] == true);
1268 try expect(vec[38] == false);
1269 try expect(vec[39] == false);
1270 try expect(vec[40] == false);
1271 try expect(vec[41] == false);
1272 try expect(vec[42] == true);
1273 try expect(vec[43] == true);
1274 try expect(vec[44] == true);
1275 try expect(vec[45] == false);
1276 try expect(vec[46] == false);
1277 try expect(vec[47] == false);
1278 try expect(vec[48] == false);
1279 try expect(vec[49] == true);
1280 try expect(vec[50] == false);
1281 try expect(vec[51] == false);
1282 try expect(vec[52] == true);
1283 try expect(vec[53] == false);
1284 try expect(vec[54] == false);
1285 try expect(vec[55] == false);
1286 try expect(vec[56] == false);
1287 try expect(vec[57] == false);
1288 try expect(vec[58] == true);
1289 try expect(vec[59] == true);
1290 try expect(vec[60] == true);
1291 try expect(vec[61] == false);
1292 try expect(vec[62] == true);
1293 try expect(vec[63] == true);
1294 try expect(vec[64] == false);
1295 try expect(vec[65] == false);
1296 try expect(vec[66] == false);
1297 try expect(vec[67] == false);
1298 try expect(vec[68] == false);
1299 try expect(vec[69] == false);
1300 try expect(vec[70] == false);
1301 try expect(vec[71] == false);
1302 try expect(vec[72] == true);
1303 try expect(vec[73] == true);
1304 try expect(vec[74] == true);
1305 try expect(vec[75] == true);
1306 try expect(vec[76] == true);
1307 try expect(vec[77] == false);
1308 try expect(vec[78] == false);
1309 try expect(vec[79] == false);
1310 try expect(vec[80] == false);
1311 try expect(vec[81] == false);
1312 try expect(vec[82] == false);
1313 try expect(vec[83] == true);
1314 try expect(vec[84] == false);
1315 try expect(vec[85] == true);
1316 try expect(vec[86] == false);
1317 try expect(vec[87] == true);
1318 try expect(vec[88] == false);
1319 try expect(vec[89] == true);
1320 try expect(vec[90] == false);
1321 try expect(vec[91] == true);
1322 try expect(vec[92] == true);
1323 try expect(vec[93] == true);
1324 try expect(vec[94] == true);
1325 try expect(vec[95] == false);
1326 try expect(vec[96] == false);
1327 try expect(vec[97] == true);
1328 try expect(vec[98] == false);
1329 try expect(vec[99] == false);
1330 try expect(vec[100] == true);
1331 try expect(vec[101] == true);
1332 try expect(vec[102] == true);
1333 try expect(vec[103] == true);
1334 try expect(vec[104] == false);
1335 try expect(vec[105] == true);
1336 try expect(vec[106] == true);
1337 try expect(vec[107] == true);
1338 try expect(vec[108] == false);
1339 try expect(vec[109] == false);
1340 try expect(vec[110] == true);
1341 try expect(vec[111] == false);
1342 try expect(vec[112] == false);
1343 try expect(vec[113] == true);
1344 try expect(vec[114] == true);
1345 try expect(vec[115] == false);
1346 try expect(vec[116] == true);
1347 try expect(vec[117] == false);
1348 try expect(vec[118] == true);
1349 try expect(vec[119] == true);
1350 try expect(vec[120] == true);
1351 try expect(vec[121] == true);
1352 try expect(vec[122] == true);
1353 try expect(vec[123] == false);
1354 try expect(vec[124] == false);
1355 try expect(vec[125] == true);
1356 try expect(vec[126] == false);
1357 try expect(vec[127] == true);
1358 c_vector_128_bool(.{
1359 false,
1360 false,
1361 false,
1362 false,
1363 false,
1364 true,
1365 true,
1366 false,
1367 true,
1368 true,
1369 false,
1370 true,
1371 true,
1372 false,
1373 true,
1374 true,
1375 true,
1376 false,
1377 false,
1378 false,
1379 false,
1380 true,
1381 true,
1382 false,
1383 false,
1384 false,
1385 true,
1386 true,
1387 false,
1388 true,
1389 false,
1390 false,
1391 true,
1392 false,
1393 false,
1394 true,
1395 true,
1396 true,
1397 true,
1398 true,
1399 false,
1400 true,
1401 true,
1402 true,
1403 false,
1404 false,
1405 false,
1406 false,
1407 true,
1408 true,
1409 false,
1410 true,
1411 true,
1412 true,
1413 true,
1414 true,
1415 false,
1416 true,
1417 true,
1418 false,
1419 true,
1420 false,
1421 false,
1422 true,
1423 true,
1424 false,
1425 true,
1426 true,
1427 false,
1428 true,
1429 false,
1430 false,
1431 true,
1432 true,
1433 false,
1434 true,
1435 true,
1436 true,
1437 false,
1438 true,
1439 false,
1440 false,
1441 false,
1442 false,
1443 true,
1444 false,
1445 false,
1446 false,
1447 true,
1448 true,
1449 false,
1450 false,
1451 true,
1452 true,
1453 true,
1454 true,
1455 false,
1456 false,
1457 false,
1458 false,
1459 false,
1460 true,
1461 false,
1462 false,
1463 false,
1464 false,
1465 true,
1466 true,
1467 true,
1468 true,
1469 true,
1470 false,
1471 false,
1472 true,
1473 false,
1474 true,
1475 false,
1476 false,
1477 true,
1478 false,
1479 true,
1480 false,
1481 true,
1482 true,
1483 true,
1484 true,
1485 true,
1486 true,
1487 });
1488 c_test_vector_128_bool();
1489}
1490
1491comptime {
1492 skip: {
1493 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
1494 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
48981495
4899 export fn zig_ret_vector_256_bool() Vector256Bool {
1496 _ = struct {
1497 export fn zig_ret_vector_256_bool() @Vector(256, bool) {
49001498 return .{
49011499 true,
49021500 true,
......@@ -5156,8 +1754,800 @@ comptime {
51561754 true,
51571755 };
51581756 }
1757 export fn zig_vector_256_bool(vec: @Vector(256, bool)) void {
1758 expect(vec[0] == false) catch @panic("test failure");
1759 expect(vec[1] == false) catch @panic("test failure");
1760 expect(vec[2] == false) catch @panic("test failure");
1761 expect(vec[3] == false) catch @panic("test failure");
1762 expect(vec[4] == true) catch @panic("test failure");
1763 expect(vec[5] == true) catch @panic("test failure");
1764 expect(vec[6] == false) catch @panic("test failure");
1765 expect(vec[7] == false) catch @panic("test failure");
1766 expect(vec[8] == false) catch @panic("test failure");
1767 expect(vec[9] == true) catch @panic("test failure");
1768 expect(vec[10] == true) catch @panic("test failure");
1769 expect(vec[11] == false) catch @panic("test failure");
1770 expect(vec[12] == true) catch @panic("test failure");
1771 expect(vec[13] == false) catch @panic("test failure");
1772 expect(vec[14] == false) catch @panic("test failure");
1773 expect(vec[15] == false) catch @panic("test failure");
1774 expect(vec[16] == false) catch @panic("test failure");
1775 expect(vec[17] == true) catch @panic("test failure");
1776 expect(vec[18] == true) catch @panic("test failure");
1777 expect(vec[19] == true) catch @panic("test failure");
1778 expect(vec[20] == false) catch @panic("test failure");
1779 expect(vec[21] == true) catch @panic("test failure");
1780 expect(vec[22] == true) catch @panic("test failure");
1781 expect(vec[23] == false) catch @panic("test failure");
1782 expect(vec[24] == true) catch @panic("test failure");
1783 expect(vec[25] == false) catch @panic("test failure");
1784 expect(vec[26] == false) catch @panic("test failure");
1785 expect(vec[27] == true) catch @panic("test failure");
1786 expect(vec[28] == true) catch @panic("test failure");
1787 expect(vec[29] == true) catch @panic("test failure");
1788 expect(vec[30] == false) catch @panic("test failure");
1789 expect(vec[31] == true) catch @panic("test failure");
1790 expect(vec[32] == false) catch @panic("test failure");
1791 expect(vec[33] == true) catch @panic("test failure");
1792 expect(vec[34] == false) catch @panic("test failure");
1793 expect(vec[35] == false) catch @panic("test failure");
1794 expect(vec[36] == false) catch @panic("test failure");
1795 expect(vec[37] == true) catch @panic("test failure");
1796 expect(vec[38] == false) catch @panic("test failure");
1797 expect(vec[39] == false) catch @panic("test failure");
1798 expect(vec[40] == true) catch @panic("test failure");
1799 expect(vec[41] == true) catch @panic("test failure");
1800 expect(vec[42] == false) catch @panic("test failure");
1801 expect(vec[43] == true) catch @panic("test failure");
1802 expect(vec[44] == true) catch @panic("test failure");
1803 expect(vec[45] == false) catch @panic("test failure");
1804 expect(vec[46] == true) catch @panic("test failure");
1805 expect(vec[47] == false) catch @panic("test failure");
1806 expect(vec[48] == true) catch @panic("test failure");
1807 expect(vec[49] == false) catch @panic("test failure");
1808 expect(vec[50] == true) catch @panic("test failure");
1809 expect(vec[51] == false) catch @panic("test failure");
1810 expect(vec[52] == true) catch @panic("test failure");
1811 expect(vec[53] == true) catch @panic("test failure");
1812 expect(vec[54] == true) catch @panic("test failure");
1813 expect(vec[55] == false) catch @panic("test failure");
1814 expect(vec[56] == false) catch @panic("test failure");
1815 expect(vec[57] == true) catch @panic("test failure");
1816 expect(vec[58] == true) catch @panic("test failure");
1817 expect(vec[59] == false) catch @panic("test failure");
1818 expect(vec[60] == false) catch @panic("test failure");
1819 expect(vec[61] == true) catch @panic("test failure");
1820 expect(vec[62] == true) catch @panic("test failure");
1821 expect(vec[63] == false) catch @panic("test failure");
1822 expect(vec[64] == false) catch @panic("test failure");
1823 expect(vec[65] == false) catch @panic("test failure");
1824 expect(vec[66] == true) catch @panic("test failure");
1825 expect(vec[67] == true) catch @panic("test failure");
1826 expect(vec[68] == false) catch @panic("test failure");
1827 expect(vec[69] == true) catch @panic("test failure");
1828 expect(vec[70] == false) catch @panic("test failure");
1829 expect(vec[71] == true) catch @panic("test failure");
1830 expect(vec[72] == false) catch @panic("test failure");
1831 expect(vec[73] == true) catch @panic("test failure");
1832 expect(vec[74] == false) catch @panic("test failure");
1833 expect(vec[75] == false) catch @panic("test failure");
1834 expect(vec[76] == true) catch @panic("test failure");
1835 expect(vec[77] == false) catch @panic("test failure");
1836 expect(vec[78] == false) catch @panic("test failure");
1837 expect(vec[79] == false) catch @panic("test failure");
1838 expect(vec[80] == false) catch @panic("test failure");
1839 expect(vec[81] == false) catch @panic("test failure");
1840 expect(vec[82] == true) catch @panic("test failure");
1841 expect(vec[83] == false) catch @panic("test failure");
1842 expect(vec[84] == false) catch @panic("test failure");
1843 expect(vec[85] == false) catch @panic("test failure");
1844 expect(vec[86] == true) catch @panic("test failure");
1845 expect(vec[87] == true) catch @panic("test failure");
1846 expect(vec[88] == true) catch @panic("test failure");
1847 expect(vec[89] == false) catch @panic("test failure");
1848 expect(vec[90] == true) catch @panic("test failure");
1849 expect(vec[91] == false) catch @panic("test failure");
1850 expect(vec[92] == true) catch @panic("test failure");
1851 expect(vec[93] == false) catch @panic("test failure");
1852 expect(vec[94] == true) catch @panic("test failure");
1853 expect(vec[95] == true) catch @panic("test failure");
1854 expect(vec[96] == true) catch @panic("test failure");
1855 expect(vec[97] == true) catch @panic("test failure");
1856 expect(vec[98] == false) catch @panic("test failure");
1857 expect(vec[99] == true) catch @panic("test failure");
1858 expect(vec[100] == false) catch @panic("test failure");
1859 expect(vec[101] == true) catch @panic("test failure");
1860 expect(vec[102] == true) catch @panic("test failure");
1861 expect(vec[103] == false) catch @panic("test failure");
1862 expect(vec[104] == false) catch @panic("test failure");
1863 expect(vec[105] == true) catch @panic("test failure");
1864 expect(vec[106] == false) catch @panic("test failure");
1865 expect(vec[107] == true) catch @panic("test failure");
1866 expect(vec[108] == false) catch @panic("test failure");
1867 expect(vec[109] == false) catch @panic("test failure");
1868 expect(vec[110] == false) catch @panic("test failure");
1869 expect(vec[111] == false) catch @panic("test failure");
1870 expect(vec[112] == false) catch @panic("test failure");
1871 expect(vec[113] == false) catch @panic("test failure");
1872 expect(vec[114] == false) catch @panic("test failure");
1873 expect(vec[115] == false) catch @panic("test failure");
1874 expect(vec[116] == false) catch @panic("test failure");
1875 expect(vec[117] == false) catch @panic("test failure");
1876 expect(vec[118] == false) catch @panic("test failure");
1877 expect(vec[119] == false) catch @panic("test failure");
1878 expect(vec[120] == false) catch @panic("test failure");
1879 expect(vec[121] == false) catch @panic("test failure");
1880 expect(vec[122] == true) catch @panic("test failure");
1881 expect(vec[123] == true) catch @panic("test failure");
1882 expect(vec[124] == false) catch @panic("test failure");
1883 expect(vec[125] == false) catch @panic("test failure");
1884 expect(vec[126] == false) catch @panic("test failure");
1885 expect(vec[127] == true) catch @panic("test failure");
1886 expect(vec[128] == true) catch @panic("test failure");
1887 expect(vec[129] == true) catch @panic("test failure");
1888 expect(vec[130] == true) catch @panic("test failure");
1889 expect(vec[131] == false) catch @panic("test failure");
1890 expect(vec[132] == false) catch @panic("test failure");
1891 expect(vec[133] == false) catch @panic("test failure");
1892 expect(vec[134] == true) catch @panic("test failure");
1893 expect(vec[135] == true) catch @panic("test failure");
1894 expect(vec[136] == false) catch @panic("test failure");
1895 expect(vec[137] == false) catch @panic("test failure");
1896 expect(vec[138] == true) catch @panic("test failure");
1897 expect(vec[139] == true) catch @panic("test failure");
1898 expect(vec[140] == true) catch @panic("test failure");
1899 expect(vec[141] == true) catch @panic("test failure");
1900 expect(vec[142] == true) catch @panic("test failure");
1901 expect(vec[143] == false) catch @panic("test failure");
1902 expect(vec[144] == true) catch @panic("test failure");
1903 expect(vec[145] == true) catch @panic("test failure");
1904 expect(vec[146] == true) catch @panic("test failure");
1905 expect(vec[147] == false) catch @panic("test failure");
1906 expect(vec[148] == false) catch @panic("test failure");
1907 expect(vec[149] == false) catch @panic("test failure");
1908 expect(vec[150] == false) catch @panic("test failure");
1909 expect(vec[151] == false) catch @panic("test failure");
1910 expect(vec[152] == false) catch @panic("test failure");
1911 expect(vec[153] == false) catch @panic("test failure");
1912 expect(vec[154] == true) catch @panic("test failure");
1913 expect(vec[155] == false) catch @panic("test failure");
1914 expect(vec[156] == false) catch @panic("test failure");
1915 expect(vec[157] == false) catch @panic("test failure");
1916 expect(vec[158] == true) catch @panic("test failure");
1917 expect(vec[159] == true) catch @panic("test failure");
1918 expect(vec[160] == false) catch @panic("test failure");
1919 expect(vec[161] == true) catch @panic("test failure");
1920 expect(vec[162] == false) catch @panic("test failure");
1921 expect(vec[163] == false) catch @panic("test failure");
1922 expect(vec[164] == false) catch @panic("test failure");
1923 expect(vec[165] == true) catch @panic("test failure");
1924 expect(vec[166] == false) catch @panic("test failure");
1925 expect(vec[167] == true) catch @panic("test failure");
1926 expect(vec[168] == false) catch @panic("test failure");
1927 expect(vec[169] == false) catch @panic("test failure");
1928 expect(vec[170] == false) catch @panic("test failure");
1929 expect(vec[171] == false) catch @panic("test failure");
1930 expect(vec[172] == true) catch @panic("test failure");
1931 expect(vec[173] == true) catch @panic("test failure");
1932 expect(vec[174] == true) catch @panic("test failure");
1933 expect(vec[175] == true) catch @panic("test failure");
1934 expect(vec[176] == true) catch @panic("test failure");
1935 expect(vec[177] == true) catch @panic("test failure");
1936 expect(vec[178] == false) catch @panic("test failure");
1937 expect(vec[179] == true) catch @panic("test failure");
1938 expect(vec[180] == true) catch @panic("test failure");
1939 expect(vec[181] == false) catch @panic("test failure");
1940 expect(vec[182] == true) catch @panic("test failure");
1941 expect(vec[183] == false) catch @panic("test failure");
1942 expect(vec[184] == true) catch @panic("test failure");
1943 expect(vec[185] == false) catch @panic("test failure");
1944 expect(vec[186] == true) catch @panic("test failure");
1945 expect(vec[187] == false) catch @panic("test failure");
1946 expect(vec[188] == true) catch @panic("test failure");
1947 expect(vec[189] == false) catch @panic("test failure");
1948 expect(vec[190] == false) catch @panic("test failure");
1949 expect(vec[191] == false) catch @panic("test failure");
1950 expect(vec[192] == false) catch @panic("test failure");
1951 expect(vec[193] == true) catch @panic("test failure");
1952 expect(vec[194] == true) catch @panic("test failure");
1953 expect(vec[195] == true) catch @panic("test failure");
1954 expect(vec[196] == false) catch @panic("test failure");
1955 expect(vec[197] == false) catch @panic("test failure");
1956 expect(vec[198] == true) catch @panic("test failure");
1957 expect(vec[199] == false) catch @panic("test failure");
1958 expect(vec[200] == false) catch @panic("test failure");
1959 expect(vec[201] == true) catch @panic("test failure");
1960 expect(vec[202] == true) catch @panic("test failure");
1961 expect(vec[203] == false) catch @panic("test failure");
1962 expect(vec[204] == true) catch @panic("test failure");
1963 expect(vec[205] == false) catch @panic("test failure");
1964 expect(vec[206] == true) catch @panic("test failure");
1965 expect(vec[207] == false) catch @panic("test failure");
1966 expect(vec[208] == false) catch @panic("test failure");
1967 expect(vec[209] == false) catch @panic("test failure");
1968 expect(vec[210] == true) catch @panic("test failure");
1969 expect(vec[211] == true) catch @panic("test failure");
1970 expect(vec[212] == false) catch @panic("test failure");
1971 expect(vec[213] == false) catch @panic("test failure");
1972 expect(vec[214] == false) catch @panic("test failure");
1973 expect(vec[215] == true) catch @panic("test failure");
1974 expect(vec[216] == false) catch @panic("test failure");
1975 expect(vec[217] == true) catch @panic("test failure");
1976 expect(vec[218] == true) catch @panic("test failure");
1977 expect(vec[219] == true) catch @panic("test failure");
1978 expect(vec[220] == false) catch @panic("test failure");
1979 expect(vec[221] == true) catch @panic("test failure");
1980 expect(vec[222] == false) catch @panic("test failure");
1981 expect(vec[223] == true) catch @panic("test failure");
1982 expect(vec[224] == false) catch @panic("test failure");
1983 expect(vec[225] == false) catch @panic("test failure");
1984 expect(vec[226] == false) catch @panic("test failure");
1985 expect(vec[227] == true) catch @panic("test failure");
1986 expect(vec[228] == true) catch @panic("test failure");
1987 expect(vec[229] == false) catch @panic("test failure");
1988 expect(vec[230] == false) catch @panic("test failure");
1989 expect(vec[231] == false) catch @panic("test failure");
1990 expect(vec[232] == false) catch @panic("test failure");
1991 expect(vec[233] == false) catch @panic("test failure");
1992 expect(vec[234] == true) catch @panic("test failure");
1993 expect(vec[235] == false) catch @panic("test failure");
1994 expect(vec[236] == false) catch @panic("test failure");
1995 expect(vec[237] == false) catch @panic("test failure");
1996 expect(vec[238] == true) catch @panic("test failure");
1997 expect(vec[239] == false) catch @panic("test failure");
1998 expect(vec[240] == true) catch @panic("test failure");
1999 expect(vec[241] == true) catch @panic("test failure");
2000 expect(vec[242] == true) catch @panic("test failure");
2001 expect(vec[243] == false) catch @panic("test failure");
2002 expect(vec[244] == false) catch @panic("test failure");
2003 expect(vec[245] == true) catch @panic("test failure");
2004 expect(vec[246] == false) catch @panic("test failure");
2005 expect(vec[247] == false) catch @panic("test failure");
2006 expect(vec[248] == false) catch @panic("test failure");
2007 expect(vec[249] == true) catch @panic("test failure");
2008 expect(vec[250] == false) catch @panic("test failure");
2009 expect(vec[251] == false) catch @panic("test failure");
2010 expect(vec[252] == true) catch @panic("test failure");
2011 expect(vec[253] == true) catch @panic("test failure");
2012 expect(vec[254] == true) catch @panic("test failure");
2013 expect(vec[255] == true) catch @panic("test failure");
2014 }
2015 };
2016 }
2017}
2018
2019extern fn c_ret_vector_256_bool() @Vector(256, bool);
2020extern fn c_vector_256_bool(@Vector(256, bool)) void;
2021extern fn c_test_vector_256_bool() void;
2022
2023test "@Vector(256, bool)" {
2024 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
2025
2026 const vec = c_ret_vector_256_bool();
2027 try expect(vec[0] == true);
2028 try expect(vec[1] == false);
2029 try expect(vec[2] == true);
2030 try expect(vec[3] == true);
2031 try expect(vec[4] == false);
2032 try expect(vec[5] == false);
2033 try expect(vec[6] == false);
2034 try expect(vec[7] == false);
2035 try expect(vec[8] == false);
2036 try expect(vec[9] == true);
2037 try expect(vec[10] == false);
2038 try expect(vec[11] == true);
2039 try expect(vec[12] == false);
2040 try expect(vec[13] == true);
2041 try expect(vec[14] == false);
2042 try expect(vec[15] == false);
2043 try expect(vec[16] == true);
2044 try expect(vec[17] == true);
2045 try expect(vec[18] == true);
2046 try expect(vec[19] == false);
2047 try expect(vec[20] == false);
2048 try expect(vec[21] == false);
2049 try expect(vec[22] == true);
2050 try expect(vec[23] == false);
2051 try expect(vec[24] == true);
2052 try expect(vec[25] == false);
2053 try expect(vec[26] == false);
2054 try expect(vec[27] == true);
2055 try expect(vec[28] == true);
2056 try expect(vec[29] == true);
2057 try expect(vec[30] == false);
2058 try expect(vec[31] == false);
2059 try expect(vec[32] == true);
2060 try expect(vec[33] == true);
2061 try expect(vec[34] == true);
2062 try expect(vec[35] == false);
2063 try expect(vec[36] == true);
2064 try expect(vec[37] == true);
2065 try expect(vec[38] == true);
2066 try expect(vec[39] == false);
2067 try expect(vec[40] == true);
2068 try expect(vec[41] == false);
2069 try expect(vec[42] == true);
2070 try expect(vec[43] == true);
2071 try expect(vec[44] == false);
2072 try expect(vec[45] == true);
2073 try expect(vec[46] == false);
2074 try expect(vec[47] == true);
2075 try expect(vec[48] == true);
2076 try expect(vec[49] == false);
2077 try expect(vec[50] == false);
2078 try expect(vec[51] == true);
2079 try expect(vec[52] == true);
2080 try expect(vec[53] == false);
2081 try expect(vec[54] == false);
2082 try expect(vec[55] == true);
2083 try expect(vec[56] == false);
2084 try expect(vec[57] == true);
2085 try expect(vec[58] == true);
2086 try expect(vec[59] == true);
2087 try expect(vec[60] == false);
2088 try expect(vec[61] == true);
2089 try expect(vec[62] == true);
2090 try expect(vec[63] == false);
2091 try expect(vec[64] == true);
2092 try expect(vec[65] == true);
2093 try expect(vec[66] == false);
2094 try expect(vec[67] == true);
2095 try expect(vec[68] == false);
2096 try expect(vec[69] == true);
2097 try expect(vec[70] == true);
2098 try expect(vec[71] == true);
2099 try expect(vec[72] == false);
2100 try expect(vec[73] == true);
2101 try expect(vec[74] == true);
2102 try expect(vec[75] == false);
2103 try expect(vec[76] == true);
2104 try expect(vec[77] == true);
2105 try expect(vec[78] == true);
2106 try expect(vec[79] == true);
2107 try expect(vec[80] == false);
2108 try expect(vec[81] == true);
2109 try expect(vec[82] == false);
2110 try expect(vec[83] == true);
2111 try expect(vec[84] == true);
2112 try expect(vec[85] == true);
2113 try expect(vec[86] == false);
2114 try expect(vec[87] == true);
2115 try expect(vec[88] == false);
2116 try expect(vec[89] == true);
2117 try expect(vec[90] == false);
2118 try expect(vec[91] == false);
2119 try expect(vec[92] == true);
2120 try expect(vec[93] == false);
2121 try expect(vec[94] == false);
2122 try expect(vec[95] == false);
2123 try expect(vec[96] == true);
2124 try expect(vec[97] == true);
2125 try expect(vec[98] == false);
2126 try expect(vec[99] == false);
2127 try expect(vec[100] == false);
2128 try expect(vec[101] == true);
2129 try expect(vec[102] == true);
2130 try expect(vec[103] == true);
2131 try expect(vec[104] == false);
2132 try expect(vec[105] == false);
2133 try expect(vec[106] == false);
2134 try expect(vec[107] == true);
2135 try expect(vec[108] == false);
2136 try expect(vec[109] == true);
2137 try expect(vec[110] == true);
2138 try expect(vec[111] == true);
2139 try expect(vec[112] == true);
2140 try expect(vec[113] == true);
2141 try expect(vec[114] == true);
2142 try expect(vec[115] == true);
2143 try expect(vec[116] == true);
2144 try expect(vec[117] == false);
2145 try expect(vec[118] == true);
2146 try expect(vec[119] == false);
2147 try expect(vec[120] == true);
2148 try expect(vec[121] == false);
2149 try expect(vec[122] == false);
2150 try expect(vec[123] == true);
2151 try expect(vec[124] == true);
2152 try expect(vec[125] == false);
2153 try expect(vec[126] == true);
2154 try expect(vec[127] == false);
2155 try expect(vec[128] == false);
2156 try expect(vec[129] == false);
2157 try expect(vec[130] == false);
2158 try expect(vec[131] == true);
2159 try expect(vec[132] == false);
2160 try expect(vec[133] == false);
2161 try expect(vec[134] == true);
2162 try expect(vec[135] == false);
2163 try expect(vec[136] == false);
2164 try expect(vec[137] == false);
2165 try expect(vec[138] == false);
2166 try expect(vec[139] == false);
2167 try expect(vec[140] == false);
2168 try expect(vec[141] == true);
2169 try expect(vec[142] == false);
2170 try expect(vec[143] == true);
2171 try expect(vec[144] == false);
2172 try expect(vec[145] == true);
2173 try expect(vec[146] == true);
2174 try expect(vec[147] == true);
2175 try expect(vec[148] == false);
2176 try expect(vec[149] == true);
2177 try expect(vec[150] == true);
2178 try expect(vec[151] == false);
2179 try expect(vec[152] == true);
2180 try expect(vec[153] == true);
2181 try expect(vec[154] == false);
2182 try expect(vec[155] == true);
2183 try expect(vec[156] == true);
2184 try expect(vec[157] == true);
2185 try expect(vec[158] == true);
2186 try expect(vec[159] == true);
2187 try expect(vec[160] == true);
2188 try expect(vec[161] == true);
2189 try expect(vec[162] == false);
2190 try expect(vec[163] == false);
2191 try expect(vec[164] == false);
2192 try expect(vec[165] == true);
2193 try expect(vec[166] == false);
2194 try expect(vec[167] == false);
2195 try expect(vec[168] == true);
2196 try expect(vec[169] == false);
2197 try expect(vec[170] == true);
2198 try expect(vec[171] == true);
2199 try expect(vec[172] == true);
2200 try expect(vec[173] == false);
2201 try expect(vec[174] == false);
2202 try expect(vec[175] == true);
2203 try expect(vec[176] == true);
2204 try expect(vec[177] == true);
2205 try expect(vec[178] == true);
2206 try expect(vec[179] == false);
2207 try expect(vec[180] == true);
2208 try expect(vec[181] == true);
2209 try expect(vec[182] == false);
2210 try expect(vec[183] == true);
2211 try expect(vec[184] == false);
2212 try expect(vec[185] == false);
2213 try expect(vec[186] == false);
2214 try expect(vec[187] == true);
2215 try expect(vec[188] == true);
2216 try expect(vec[189] == true);
2217 try expect(vec[190] == true);
2218 try expect(vec[191] == true);
2219 try expect(vec[192] == true);
2220 try expect(vec[193] == true);
2221 try expect(vec[194] == true);
2222 try expect(vec[195] == false);
2223 try expect(vec[196] == false);
2224 try expect(vec[197] == true);
2225 try expect(vec[198] == false);
2226 try expect(vec[199] == false);
2227 try expect(vec[200] == false);
2228 try expect(vec[201] == true);
2229 try expect(vec[202] == true);
2230 try expect(vec[203] == true);
2231 try expect(vec[204] == true);
2232 try expect(vec[205] == true);
2233 try expect(vec[206] == true);
2234 try expect(vec[207] == false);
2235 try expect(vec[208] == false);
2236 try expect(vec[209] == false);
2237 try expect(vec[210] == true);
2238 try expect(vec[211] == true);
2239 try expect(vec[212] == true);
2240 try expect(vec[213] == false);
2241 try expect(vec[214] == true);
2242 try expect(vec[215] == false);
2243 try expect(vec[216] == true);
2244 try expect(vec[217] == false);
2245 try expect(vec[218] == true);
2246 try expect(vec[219] == false);
2247 try expect(vec[220] == true);
2248 try expect(vec[221] == true);
2249 try expect(vec[222] == true);
2250 try expect(vec[223] == false);
2251 try expect(vec[224] == true);
2252 try expect(vec[225] == false);
2253 try expect(vec[226] == true);
2254 try expect(vec[227] == false);
2255 try expect(vec[228] == true);
2256 try expect(vec[229] == false);
2257 try expect(vec[230] == true);
2258 try expect(vec[231] == false);
2259 try expect(vec[232] == false);
2260 try expect(vec[233] == true);
2261 try expect(vec[234] == false);
2262 try expect(vec[235] == true);
2263 try expect(vec[236] == true);
2264 try expect(vec[237] == false);
2265 try expect(vec[238] == false);
2266 try expect(vec[239] == true);
2267 try expect(vec[240] == false);
2268 try expect(vec[241] == false);
2269 try expect(vec[242] == false);
2270 try expect(vec[243] == true);
2271 try expect(vec[244] == true);
2272 try expect(vec[245] == false);
2273 try expect(vec[246] == false);
2274 try expect(vec[247] == false);
2275 try expect(vec[248] == false);
2276 try expect(vec[249] == false);
2277 try expect(vec[250] == true);
2278 try expect(vec[251] == false);
2279 try expect(vec[252] == true);
2280 try expect(vec[253] == false);
2281 try expect(vec[254] == false);
2282 try expect(vec[255] == false);
2283 if (!builtin.target.cpu.arch.isWasm()) c_vector_256_bool(.{
2284 false,
2285 true,
2286 true,
2287 false,
2288 false,
2289 true,
2290 true,
2291 true,
2292 false,
2293 true,
2294 true,
2295 true,
2296 false,
2297 true,
2298 false,
2299 true,
2300 false,
2301 false,
2302 true,
2303 true,
2304 false,
2305 true,
2306 false,
2307 false,
2308 false,
2309 true,
2310 true,
2311 false,
2312 false,
2313 true,
2314 true,
2315 false,
2316 true,
2317 false,
2318 false,
2319 true,
2320 false,
2321 true,
2322 false,
2323 true,
2324 true,
2325 true,
2326 true,
2327 false,
2328 false,
2329 true,
2330 false,
2331 false,
2332 false,
2333 false,
2334 false,
2335 false,
2336 true,
2337 true,
2338 true,
2339 true,
2340 true,
2341 true,
2342 false,
2343 true,
2344 true,
2345 false,
2346 false,
2347 true,
2348 false,
2349 false,
2350 false,
2351 false,
2352 false,
2353 false,
2354 true,
2355 true,
2356 true,
2357 false,
2358 false,
2359 false,
2360 true,
2361 false,
2362 true,
2363 true,
2364 false,
2365 false,
2366 true,
2367 true,
2368 false,
2369 true,
2370 true,
2371 true,
2372 true,
2373 true,
2374 true,
2375 true,
2376 false,
2377 true,
2378 true,
2379 false,
2380 false,
2381 true,
2382 true,
2383 false,
2384 true,
2385 false,
2386 false,
2387 true,
2388 false,
2389 true,
2390 true,
2391 true,
2392 true,
2393 true,
2394 false,
2395 false,
2396 false,
2397 false,
2398 true,
2399 true,
2400 false,
2401 true,
2402 false,
2403 false,
2404 true,
2405 false,
2406 false,
2407 true,
2408 false,
2409 true,
2410 true,
2411 true,
2412 true,
2413 false,
2414 true,
2415 true,
2416 false,
2417 false,
2418 true,
2419 false,
2420 false,
2421 true,
2422 false,
2423 true,
2424 false,
2425 true,
2426 true,
2427 true,
2428 true,
2429 false,
2430 true,
2431 false,
2432 false,
2433 false,
2434 true,
2435 true,
2436 true,
2437 true,
2438 true,
2439 false,
2440 true,
2441 false,
2442 false,
2443 false,
2444 true,
2445 true,
2446 false,
2447 true,
2448 true,
2449 false,
2450 false,
2451 false,
2452 false,
2453 true,
2454 false,
2455 true,
2456 false,
2457 false,
2458 false,
2459 false,
2460 true,
2461 true,
2462 true,
2463 false,
2464 true,
2465 false,
2466 true,
2467 true,
2468 false,
2469 false,
2470 true,
2471 false,
2472 false,
2473 false,
2474 false,
2475 true,
2476 true,
2477 true,
2478 true,
2479 true,
2480 true,
2481 true,
2482 false,
2483 true,
2484 false,
2485 false,
2486 true,
2487 false,
2488 true,
2489 true,
2490 true,
2491 false,
2492 false,
2493 true,
2494 true,
2495 true,
2496 false,
2497 true,
2498 true,
2499 true,
2500 true,
2501 true,
2502 false,
2503 false,
2504 false,
2505 false,
2506 false,
2507 true,
2508 true,
2509 false,
2510 true,
2511 false,
2512 false,
2513 true,
2514 false,
2515 true,
2516 false,
2517 false,
2518 false,
2519 true,
2520 false,
2521 false,
2522 false,
2523 true,
2524 true,
2525 true,
2526 true,
2527 true,
2528 true,
2529 false,
2530 false,
2531 true,
2532 false,
2533 true,
2534 true,
2535 false,
2536 true,
2537 true,
2538 true,
2539 false,
2540 });
2541 c_test_vector_512_bool();
2542}
2543
2544comptime {
2545 skip: {
2546 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) break :skip;
2547 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isPowerPC64()) break :skip;
51592548
5160 export fn zig_ret_vector_512_bool() Vector512Bool {
2549 _ = struct {
2550 export fn zig_ret_vector_512_bool() @Vector(512, bool) {
51612551 return .{
51622552 true,
51632553 true,
......@@ -5673,28 +3063,13612 @@ comptime {
56733063 false,
56743064 };
56753065 }
3066 export fn zig_vector_512_bool(vec: @Vector(512, bool)) void {
3067 expect(vec[0] == false) catch @panic("test failure");
3068 expect(vec[1] == true) catch @panic("test failure");
3069 expect(vec[2] == true) catch @panic("test failure");
3070 expect(vec[3] == false) catch @panic("test failure");
3071 expect(vec[4] == true) catch @panic("test failure");
3072 expect(vec[5] == false) catch @panic("test failure");
3073 expect(vec[6] == true) catch @panic("test failure");
3074 expect(vec[7] == false) catch @panic("test failure");
3075 expect(vec[8] == false) catch @panic("test failure");
3076 expect(vec[9] == false) catch @panic("test failure");
3077 expect(vec[10] == false) catch @panic("test failure");
3078 expect(vec[11] == false) catch @panic("test failure");
3079 expect(vec[12] == true) catch @panic("test failure");
3080 expect(vec[13] == false) catch @panic("test failure");
3081 expect(vec[14] == true) catch @panic("test failure");
3082 expect(vec[15] == false) catch @panic("test failure");
3083 expect(vec[16] == false) catch @panic("test failure");
3084 expect(vec[17] == false) catch @panic("test failure");
3085 expect(vec[18] == true) catch @panic("test failure");
3086 expect(vec[19] == true) catch @panic("test failure");
3087 expect(vec[20] == true) catch @panic("test failure");
3088 expect(vec[21] == true) catch @panic("test failure");
3089 expect(vec[22] == false) catch @panic("test failure");
3090 expect(vec[23] == false) catch @panic("test failure");
3091 expect(vec[24] == false) catch @panic("test failure");
3092 expect(vec[25] == true) catch @panic("test failure");
3093 expect(vec[26] == true) catch @panic("test failure");
3094 expect(vec[27] == false) catch @panic("test failure");
3095 expect(vec[28] == true) catch @panic("test failure");
3096 expect(vec[29] == true) catch @panic("test failure");
3097 expect(vec[30] == false) catch @panic("test failure");
3098 expect(vec[31] == false) catch @panic("test failure");
3099 expect(vec[32] == true) catch @panic("test failure");
3100 expect(vec[33] == true) catch @panic("test failure");
3101 expect(vec[34] == false) catch @panic("test failure");
3102 expect(vec[35] == false) catch @panic("test failure");
3103 expect(vec[36] == false) catch @panic("test failure");
3104 expect(vec[37] == false) catch @panic("test failure");
3105 expect(vec[38] == false) catch @panic("test failure");
3106 expect(vec[39] == false) catch @panic("test failure");
3107 expect(vec[40] == false) catch @panic("test failure");
3108 expect(vec[41] == true) catch @panic("test failure");
3109 expect(vec[42] == true) catch @panic("test failure");
3110 expect(vec[43] == true) catch @panic("test failure");
3111 expect(vec[44] == false) catch @panic("test failure");
3112 expect(vec[45] == true) catch @panic("test failure");
3113 expect(vec[46] == true) catch @panic("test failure");
3114 expect(vec[47] == true) catch @panic("test failure");
3115 expect(vec[48] == true) catch @panic("test failure");
3116 expect(vec[49] == true) catch @panic("test failure");
3117 expect(vec[50] == false) catch @panic("test failure");
3118 expect(vec[51] == true) catch @panic("test failure");
3119 expect(vec[52] == true) catch @panic("test failure");
3120 expect(vec[53] == true) catch @panic("test failure");
3121 expect(vec[54] == false) catch @panic("test failure");
3122 expect(vec[55] == true) catch @panic("test failure");
3123 expect(vec[56] == false) catch @panic("test failure");
3124 expect(vec[57] == false) catch @panic("test failure");
3125 expect(vec[58] == true) catch @panic("test failure");
3126 expect(vec[59] == false) catch @panic("test failure");
3127 expect(vec[60] == true) catch @panic("test failure");
3128 expect(vec[61] == true) catch @panic("test failure");
3129 expect(vec[62] == false) catch @panic("test failure");
3130 expect(vec[63] == false) catch @panic("test failure");
3131 expect(vec[64] == false) catch @panic("test failure");
3132 expect(vec[65] == true) catch @panic("test failure");
3133 expect(vec[66] == true) catch @panic("test failure");
3134 expect(vec[67] == true) catch @panic("test failure");
3135 expect(vec[68] == true) catch @panic("test failure");
3136 expect(vec[69] == false) catch @panic("test failure");
3137 expect(vec[70] == false) catch @panic("test failure");
3138 expect(vec[71] == true) catch @panic("test failure");
3139 expect(vec[72] == true) catch @panic("test failure");
3140 expect(vec[73] == false) catch @panic("test failure");
3141 expect(vec[74] == true) catch @panic("test failure");
3142 expect(vec[75] == true) catch @panic("test failure");
3143 expect(vec[76] == false) catch @panic("test failure");
3144 expect(vec[77] == false) catch @panic("test failure");
3145 expect(vec[78] == true) catch @panic("test failure");
3146 expect(vec[79] == false) catch @panic("test failure");
3147 expect(vec[80] == false) catch @panic("test failure");
3148 expect(vec[81] == false) catch @panic("test failure");
3149 expect(vec[82] == true) catch @panic("test failure");
3150 expect(vec[83] == true) catch @panic("test failure");
3151 expect(vec[84] == true) catch @panic("test failure");
3152 expect(vec[85] == false) catch @panic("test failure");
3153 expect(vec[86] == false) catch @panic("test failure");
3154 expect(vec[87] == true) catch @panic("test failure");
3155 expect(vec[88] == false) catch @panic("test failure");
3156 expect(vec[89] == true) catch @panic("test failure");
3157 expect(vec[90] == false) catch @panic("test failure");
3158 expect(vec[91] == false) catch @panic("test failure");
3159 expect(vec[92] == true) catch @panic("test failure");
3160 expect(vec[93] == false) catch @panic("test failure");
3161 expect(vec[94] == false) catch @panic("test failure");
3162 expect(vec[95] == true) catch @panic("test failure");
3163 expect(vec[96] == true) catch @panic("test failure");
3164 expect(vec[97] == false) catch @panic("test failure");
3165 expect(vec[98] == false) catch @panic("test failure");
3166 expect(vec[99] == false) catch @panic("test failure");
3167 expect(vec[100] == false) catch @panic("test failure");
3168 expect(vec[101] == true) catch @panic("test failure");
3169 expect(vec[102] == false) catch @panic("test failure");
3170 expect(vec[103] == false) catch @panic("test failure");
3171 expect(vec[104] == false) catch @panic("test failure");
3172 expect(vec[105] == false) catch @panic("test failure");
3173 expect(vec[106] == false) catch @panic("test failure");
3174 expect(vec[107] == false) catch @panic("test failure");
3175 expect(vec[108] == true) catch @panic("test failure");
3176 expect(vec[109] == true) catch @panic("test failure");
3177 expect(vec[110] == true) catch @panic("test failure");
3178 expect(vec[111] == true) catch @panic("test failure");
3179 expect(vec[112] == true) catch @panic("test failure");
3180 expect(vec[113] == false) catch @panic("test failure");
3181 expect(vec[114] == false) catch @panic("test failure");
3182 expect(vec[115] == false) catch @panic("test failure");
3183 expect(vec[116] == false) catch @panic("test failure");
3184 expect(vec[117] == true) catch @panic("test failure");
3185 expect(vec[118] == true) catch @panic("test failure");
3186 expect(vec[119] == false) catch @panic("test failure");
3187 expect(vec[120] == true) catch @panic("test failure");
3188 expect(vec[121] == true) catch @panic("test failure");
3189 expect(vec[122] == false) catch @panic("test failure");
3190 expect(vec[123] == false) catch @panic("test failure");
3191 expect(vec[124] == true) catch @panic("test failure");
3192 expect(vec[125] == false) catch @panic("test failure");
3193 expect(vec[126] == false) catch @panic("test failure");
3194 expect(vec[127] == false) catch @panic("test failure");
3195 expect(vec[128] == false) catch @panic("test failure");
3196 expect(vec[129] == true) catch @panic("test failure");
3197 expect(vec[130] == true) catch @panic("test failure");
3198 expect(vec[131] == true) catch @panic("test failure");
3199 expect(vec[132] == true) catch @panic("test failure");
3200 expect(vec[133] == false) catch @panic("test failure");
3201 expect(vec[134] == false) catch @panic("test failure");
3202 expect(vec[135] == false) catch @panic("test failure");
3203 expect(vec[136] == false) catch @panic("test failure");
3204 expect(vec[137] == true) catch @panic("test failure");
3205 expect(vec[138] == false) catch @panic("test failure");
3206 expect(vec[139] == false) catch @panic("test failure");
3207 expect(vec[140] == false) catch @panic("test failure");
3208 expect(vec[141] == false) catch @panic("test failure");
3209 expect(vec[142] == true) catch @panic("test failure");
3210 expect(vec[143] == true) catch @panic("test failure");
3211 expect(vec[144] == false) catch @panic("test failure");
3212 expect(vec[145] == true) catch @panic("test failure");
3213 expect(vec[146] == false) catch @panic("test failure");
3214 expect(vec[147] == true) catch @panic("test failure");
3215 expect(vec[148] == false) catch @panic("test failure");
3216 expect(vec[149] == false) catch @panic("test failure");
3217 expect(vec[150] == true) catch @panic("test failure");
3218 expect(vec[151] == true) catch @panic("test failure");
3219 expect(vec[152] == false) catch @panic("test failure");
3220 expect(vec[153] == true) catch @panic("test failure");
3221 expect(vec[154] == true) catch @panic("test failure");
3222 expect(vec[155] == false) catch @panic("test failure");
3223 expect(vec[156] == false) catch @panic("test failure");
3224 expect(vec[157] == false) catch @panic("test failure");
3225 expect(vec[158] == true) catch @panic("test failure");
3226 expect(vec[159] == false) catch @panic("test failure");
3227 expect(vec[160] == false) catch @panic("test failure");
3228 expect(vec[161] == false) catch @panic("test failure");
3229 expect(vec[162] == false) catch @panic("test failure");
3230 expect(vec[163] == true) catch @panic("test failure");
3231 expect(vec[164] == true) catch @panic("test failure");
3232 expect(vec[165] == false) catch @panic("test failure");
3233 expect(vec[166] == false) catch @panic("test failure");
3234 expect(vec[167] == true) catch @panic("test failure");
3235 expect(vec[168] == false) catch @panic("test failure");
3236 expect(vec[169] == true) catch @panic("test failure");
3237 expect(vec[170] == true) catch @panic("test failure");
3238 expect(vec[171] == false) catch @panic("test failure");
3239 expect(vec[172] == false) catch @panic("test failure");
3240 expect(vec[173] == false) catch @panic("test failure");
3241 expect(vec[174] == false) catch @panic("test failure");
3242 expect(vec[175] == false) catch @panic("test failure");
3243 expect(vec[176] == false) catch @panic("test failure");
3244 expect(vec[177] == true) catch @panic("test failure");
3245 expect(vec[178] == false) catch @panic("test failure");
3246 expect(vec[179] == false) catch @panic("test failure");
3247 expect(vec[180] == false) catch @panic("test failure");
3248 expect(vec[181] == false) catch @panic("test failure");
3249 expect(vec[182] == false) catch @panic("test failure");
3250 expect(vec[183] == false) catch @panic("test failure");
3251 expect(vec[184] == true) catch @panic("test failure");
3252 expect(vec[185] == false) catch @panic("test failure");
3253 expect(vec[186] == false) catch @panic("test failure");
3254 expect(vec[187] == false) catch @panic("test failure");
3255 expect(vec[188] == false) catch @panic("test failure");
3256 expect(vec[189] == true) catch @panic("test failure");
3257 expect(vec[190] == false) catch @panic("test failure");
3258 expect(vec[191] == false) catch @panic("test failure");
3259 expect(vec[192] == false) catch @panic("test failure");
3260 expect(vec[193] == false) catch @panic("test failure");
3261 expect(vec[194] == false) catch @panic("test failure");
3262 expect(vec[195] == false) catch @panic("test failure");
3263 expect(vec[196] == true) catch @panic("test failure");
3264 expect(vec[197] == true) catch @panic("test failure");
3265 expect(vec[198] == true) catch @panic("test failure");
3266 expect(vec[199] == false) catch @panic("test failure");
3267 expect(vec[200] == true) catch @panic("test failure");
3268 expect(vec[201] == true) catch @panic("test failure");
3269 expect(vec[202] == false) catch @panic("test failure");
3270 expect(vec[203] == false) catch @panic("test failure");
3271 expect(vec[204] == false) catch @panic("test failure");
3272 expect(vec[205] == false) catch @panic("test failure");
3273 expect(vec[206] == false) catch @panic("test failure");
3274 expect(vec[207] == true) catch @panic("test failure");
3275 expect(vec[208] == true) catch @panic("test failure");
3276 expect(vec[209] == false) catch @panic("test failure");
3277 expect(vec[210] == false) catch @panic("test failure");
3278 expect(vec[211] == false) catch @panic("test failure");
3279 expect(vec[212] == true) catch @panic("test failure");
3280 expect(vec[213] == false) catch @panic("test failure");
3281 expect(vec[214] == false) catch @panic("test failure");
3282 expect(vec[215] == true) catch @panic("test failure");
3283 expect(vec[216] == true) catch @panic("test failure");
3284 expect(vec[217] == true) catch @panic("test failure");
3285 expect(vec[218] == false) catch @panic("test failure");
3286 expect(vec[219] == false) catch @panic("test failure");
3287 expect(vec[220] == true) catch @panic("test failure");
3288 expect(vec[221] == false) catch @panic("test failure");
3289 expect(vec[222] == true) catch @panic("test failure");
3290 expect(vec[223] == true) catch @panic("test failure");
3291 expect(vec[224] == true) catch @panic("test failure");
3292 expect(vec[225] == true) catch @panic("test failure");
3293 expect(vec[226] == false) catch @panic("test failure");
3294 expect(vec[227] == true) catch @panic("test failure");
3295 expect(vec[228] == false) catch @panic("test failure");
3296 expect(vec[229] == false) catch @panic("test failure");
3297 expect(vec[230] == false) catch @panic("test failure");
3298 expect(vec[231] == true) catch @panic("test failure");
3299 expect(vec[232] == false) catch @panic("test failure");
3300 expect(vec[233] == false) catch @panic("test failure");
3301 expect(vec[234] == false) catch @panic("test failure");
3302 expect(vec[235] == false) catch @panic("test failure");
3303 expect(vec[236] == false) catch @panic("test failure");
3304 expect(vec[237] == false) catch @panic("test failure");
3305 expect(vec[238] == false) catch @panic("test failure");
3306 expect(vec[239] == true) catch @panic("test failure");
3307 expect(vec[240] == false) catch @panic("test failure");
3308 expect(vec[241] == false) catch @panic("test failure");
3309 expect(vec[242] == false) catch @panic("test failure");
3310 expect(vec[243] == true) catch @panic("test failure");
3311 expect(vec[244] == true) catch @panic("test failure");
3312 expect(vec[245] == true) catch @panic("test failure");
3313 expect(vec[246] == true) catch @panic("test failure");
3314 expect(vec[247] == false) catch @panic("test failure");
3315 expect(vec[248] == true) catch @panic("test failure");
3316 expect(vec[249] == true) catch @panic("test failure");
3317 expect(vec[250] == false) catch @panic("test failure");
3318 expect(vec[251] == false) catch @panic("test failure");
3319 expect(vec[252] == false) catch @panic("test failure");
3320 expect(vec[253] == true) catch @panic("test failure");
3321 expect(vec[254] == false) catch @panic("test failure");
3322 expect(vec[255] == false) catch @panic("test failure");
3323 expect(vec[256] == true) catch @panic("test failure");
3324 expect(vec[257] == true) catch @panic("test failure");
3325 expect(vec[258] == false) catch @panic("test failure");
3326 expect(vec[259] == true) catch @panic("test failure");
3327 expect(vec[260] == false) catch @panic("test failure");
3328 expect(vec[261] == true) catch @panic("test failure");
3329 expect(vec[262] == true) catch @panic("test failure");
3330 expect(vec[263] == false) catch @panic("test failure");
3331 expect(vec[264] == false) catch @panic("test failure");
3332 expect(vec[265] == false) catch @panic("test failure");
3333 expect(vec[266] == false) catch @panic("test failure");
3334 expect(vec[267] == true) catch @panic("test failure");
3335 expect(vec[268] == false) catch @panic("test failure");
3336 expect(vec[269] == true) catch @panic("test failure");
3337 expect(vec[270] == true) catch @panic("test failure");
3338 expect(vec[271] == false) catch @panic("test failure");
3339 expect(vec[272] == false) catch @panic("test failure");
3340 expect(vec[273] == true) catch @panic("test failure");
3341 expect(vec[274] == true) catch @panic("test failure");
3342 expect(vec[275] == true) catch @panic("test failure");
3343 expect(vec[276] == false) catch @panic("test failure");
3344 expect(vec[277] == true) catch @panic("test failure");
3345 expect(vec[278] == false) catch @panic("test failure");
3346 expect(vec[279] == false) catch @panic("test failure");
3347 expect(vec[280] == true) catch @panic("test failure");
3348 expect(vec[281] == true) catch @panic("test failure");
3349 expect(vec[282] == false) catch @panic("test failure");
3350 expect(vec[283] == true) catch @panic("test failure");
3351 expect(vec[284] == false) catch @panic("test failure");
3352 expect(vec[285] == true) catch @panic("test failure");
3353 expect(vec[286] == true) catch @panic("test failure");
3354 expect(vec[287] == true) catch @panic("test failure");
3355 expect(vec[288] == true) catch @panic("test failure");
3356 expect(vec[289] == true) catch @panic("test failure");
3357 expect(vec[290] == true) catch @panic("test failure");
3358 expect(vec[291] == true) catch @panic("test failure");
3359 expect(vec[292] == true) catch @panic("test failure");
3360 expect(vec[293] == true) catch @panic("test failure");
3361 expect(vec[294] == true) catch @panic("test failure");
3362 expect(vec[295] == false) catch @panic("test failure");
3363 expect(vec[296] == true) catch @panic("test failure");
3364 expect(vec[297] == false) catch @panic("test failure");
3365 expect(vec[298] == true) catch @panic("test failure");
3366 expect(vec[299] == false) catch @panic("test failure");
3367 expect(vec[300] == true) catch @panic("test failure");
3368 expect(vec[301] == true) catch @panic("test failure");
3369 expect(vec[302] == false) catch @panic("test failure");
3370 expect(vec[303] == true) catch @panic("test failure");
3371 expect(vec[304] == false) catch @panic("test failure");
3372 expect(vec[305] == true) catch @panic("test failure");
3373 expect(vec[306] == false) catch @panic("test failure");
3374 expect(vec[307] == true) catch @panic("test failure");
3375 expect(vec[308] == true) catch @panic("test failure");
3376 expect(vec[309] == false) catch @panic("test failure");
3377 expect(vec[310] == true) catch @panic("test failure");
3378 expect(vec[311] == true) catch @panic("test failure");
3379 expect(vec[312] == true) catch @panic("test failure");
3380 expect(vec[313] == false) catch @panic("test failure");
3381 expect(vec[314] == false) catch @panic("test failure");
3382 expect(vec[315] == false) catch @panic("test failure");
3383 expect(vec[316] == false) catch @panic("test failure");
3384 expect(vec[317] == true) catch @panic("test failure");
3385 expect(vec[318] == true) catch @panic("test failure");
3386 expect(vec[319] == true) catch @panic("test failure");
3387 expect(vec[320] == true) catch @panic("test failure");
3388 expect(vec[321] == true) catch @panic("test failure");
3389 expect(vec[322] == true) catch @panic("test failure");
3390 expect(vec[323] == true) catch @panic("test failure");
3391 expect(vec[324] == true) catch @panic("test failure");
3392 expect(vec[325] == true) catch @panic("test failure");
3393 expect(vec[326] == false) catch @panic("test failure");
3394 expect(vec[327] == true) catch @panic("test failure");
3395 expect(vec[328] == false) catch @panic("test failure");
3396 expect(vec[329] == false) catch @panic("test failure");
3397 expect(vec[330] == true) catch @panic("test failure");
3398 expect(vec[331] == false) catch @panic("test failure");
3399 expect(vec[332] == false) catch @panic("test failure");
3400 expect(vec[333] == false) catch @panic("test failure");
3401 expect(vec[334] == false) catch @panic("test failure");
3402 expect(vec[335] == false) catch @panic("test failure");
3403 expect(vec[336] == false) catch @panic("test failure");
3404 expect(vec[337] == false) catch @panic("test failure");
3405 expect(vec[338] == false) catch @panic("test failure");
3406 expect(vec[339] == false) catch @panic("test failure");
3407 expect(vec[340] == false) catch @panic("test failure");
3408 expect(vec[341] == false) catch @panic("test failure");
3409 expect(vec[342] == true) catch @panic("test failure");
3410 expect(vec[343] == true) catch @panic("test failure");
3411 expect(vec[344] == false) catch @panic("test failure");
3412 expect(vec[345] == false) catch @panic("test failure");
3413 expect(vec[346] == false) catch @panic("test failure");
3414 expect(vec[347] == false) catch @panic("test failure");
3415 expect(vec[348] == false) catch @panic("test failure");
3416 expect(vec[349] == true) catch @panic("test failure");
3417 expect(vec[350] == true) catch @panic("test failure");
3418 expect(vec[351] == true) catch @panic("test failure");
3419 expect(vec[352] == true) catch @panic("test failure");
3420 expect(vec[353] == false) catch @panic("test failure");
3421 expect(vec[354] == false) catch @panic("test failure");
3422 expect(vec[355] == false) catch @panic("test failure");
3423 expect(vec[356] == false) catch @panic("test failure");
3424 expect(vec[357] == true) catch @panic("test failure");
3425 expect(vec[358] == true) catch @panic("test failure");
3426 expect(vec[359] == false) catch @panic("test failure");
3427 expect(vec[360] == false) catch @panic("test failure");
3428 expect(vec[361] == false) catch @panic("test failure");
3429 expect(vec[362] == true) catch @panic("test failure");
3430 expect(vec[363] == true) catch @panic("test failure");
3431 expect(vec[364] == false) catch @panic("test failure");
3432 expect(vec[365] == false) catch @panic("test failure");
3433 expect(vec[366] == false) catch @panic("test failure");
3434 expect(vec[367] == false) catch @panic("test failure");
3435 expect(vec[368] == false) catch @panic("test failure");
3436 expect(vec[369] == true) catch @panic("test failure");
3437 expect(vec[370] == true) catch @panic("test failure");
3438 expect(vec[371] == false) catch @panic("test failure");
3439 expect(vec[372] == true) catch @panic("test failure");
3440 expect(vec[373] == true) catch @panic("test failure");
3441 expect(vec[374] == false) catch @panic("test failure");
3442 expect(vec[375] == true) catch @panic("test failure");
3443 expect(vec[376] == true) catch @panic("test failure");
3444 expect(vec[377] == false) catch @panic("test failure");
3445 expect(vec[378] == true) catch @panic("test failure");
3446 expect(vec[379] == true) catch @panic("test failure");
3447 expect(vec[380] == false) catch @panic("test failure");
3448 expect(vec[381] == true) catch @panic("test failure");
3449 expect(vec[382] == true) catch @panic("test failure");
3450 expect(vec[383] == false) catch @panic("test failure");
3451 expect(vec[384] == true) catch @panic("test failure");
3452 expect(vec[385] == false) catch @panic("test failure");
3453 expect(vec[386] == true) catch @panic("test failure");
3454 expect(vec[387] == true) catch @panic("test failure");
3455 expect(vec[388] == true) catch @panic("test failure");
3456 expect(vec[389] == true) catch @panic("test failure");
3457 expect(vec[390] == false) catch @panic("test failure");
3458 expect(vec[391] == false) catch @panic("test failure");
3459 expect(vec[392] == false) catch @panic("test failure");
3460 expect(vec[393] == true) catch @panic("test failure");
3461 expect(vec[394] == true) catch @panic("test failure");
3462 expect(vec[395] == true) catch @panic("test failure");
3463 expect(vec[396] == true) catch @panic("test failure");
3464 expect(vec[397] == false) catch @panic("test failure");
3465 expect(vec[398] == true) catch @panic("test failure");
3466 expect(vec[399] == true) catch @panic("test failure");
3467 expect(vec[400] == true) catch @panic("test failure");
3468 expect(vec[401] == false) catch @panic("test failure");
3469 expect(vec[402] == false) catch @panic("test failure");
3470 expect(vec[403] == true) catch @panic("test failure");
3471 expect(vec[404] == false) catch @panic("test failure");
3472 expect(vec[405] == false) catch @panic("test failure");
3473 expect(vec[406] == false) catch @panic("test failure");
3474 expect(vec[407] == true) catch @panic("test failure");
3475 expect(vec[408] == true) catch @panic("test failure");
3476 expect(vec[409] == true) catch @panic("test failure");
3477 expect(vec[410] == false) catch @panic("test failure");
3478 expect(vec[411] == true) catch @panic("test failure");
3479 expect(vec[412] == false) catch @panic("test failure");
3480 expect(vec[413] == false) catch @panic("test failure");
3481 expect(vec[414] == false) catch @panic("test failure");
3482 expect(vec[415] == true) catch @panic("test failure");
3483 expect(vec[416] == false) catch @panic("test failure");
3484 expect(vec[417] == false) catch @panic("test failure");
3485 expect(vec[418] == true) catch @panic("test failure");
3486 expect(vec[419] == true) catch @panic("test failure");
3487 expect(vec[420] == true) catch @panic("test failure");
3488 expect(vec[421] == true) catch @panic("test failure");
3489 expect(vec[422] == false) catch @panic("test failure");
3490 expect(vec[423] == true) catch @panic("test failure");
3491 expect(vec[424] == true) catch @panic("test failure");
3492 expect(vec[425] == false) catch @panic("test failure");
3493 expect(vec[426] == false) catch @panic("test failure");
3494 expect(vec[427] == false) catch @panic("test failure");
3495 expect(vec[428] == true) catch @panic("test failure");
3496 expect(vec[429] == false) catch @panic("test failure");
3497 expect(vec[430] == true) catch @panic("test failure");
3498 expect(vec[431] == true) catch @panic("test failure");
3499 expect(vec[432] == false) catch @panic("test failure");
3500 expect(vec[433] == false) catch @panic("test failure");
3501 expect(vec[434] == false) catch @panic("test failure");
3502 expect(vec[435] == false) catch @panic("test failure");
3503 expect(vec[436] == true) catch @panic("test failure");
3504 expect(vec[437] == false) catch @panic("test failure");
3505 expect(vec[438] == true) catch @panic("test failure");
3506 expect(vec[439] == false) catch @panic("test failure");
3507 expect(vec[440] == false) catch @panic("test failure");
3508 expect(vec[441] == false) catch @panic("test failure");
3509 expect(vec[442] == false) catch @panic("test failure");
3510 expect(vec[443] == true) catch @panic("test failure");
3511 expect(vec[444] == false) catch @panic("test failure");
3512 expect(vec[445] == false) catch @panic("test failure");
3513 expect(vec[446] == true) catch @panic("test failure");
3514 expect(vec[447] == true) catch @panic("test failure");
3515 expect(vec[448] == true) catch @panic("test failure");
3516 expect(vec[449] == false) catch @panic("test failure");
3517 expect(vec[450] == true) catch @panic("test failure");
3518 expect(vec[451] == true) catch @panic("test failure");
3519 expect(vec[452] == false) catch @panic("test failure");
3520 expect(vec[453] == true) catch @panic("test failure");
3521 expect(vec[454] == false) catch @panic("test failure");
3522 expect(vec[455] == true) catch @panic("test failure");
3523 expect(vec[456] == false) catch @panic("test failure");
3524 expect(vec[457] == false) catch @panic("test failure");
3525 expect(vec[458] == false) catch @panic("test failure");
3526 expect(vec[459] == true) catch @panic("test failure");
3527 expect(vec[460] == false) catch @panic("test failure");
3528 expect(vec[461] == false) catch @panic("test failure");
3529 expect(vec[462] == false) catch @panic("test failure");
3530 expect(vec[463] == true) catch @panic("test failure");
3531 expect(vec[464] == true) catch @panic("test failure");
3532 expect(vec[465] == true) catch @panic("test failure");
3533 expect(vec[466] == true) catch @panic("test failure");
3534 expect(vec[467] == true) catch @panic("test failure");
3535 expect(vec[468] == false) catch @panic("test failure");
3536 expect(vec[469] == false) catch @panic("test failure");
3537 expect(vec[470] == false) catch @panic("test failure");
3538 expect(vec[471] == false) catch @panic("test failure");
3539 expect(vec[472] == false) catch @panic("test failure");
3540 expect(vec[473] == false) catch @panic("test failure");
3541 expect(vec[474] == true) catch @panic("test failure");
3542 expect(vec[475] == true) catch @panic("test failure");
3543 expect(vec[476] == true) catch @panic("test failure");
3544 expect(vec[477] == true) catch @panic("test failure");
3545 expect(vec[478] == true) catch @panic("test failure");
3546 expect(vec[479] == false) catch @panic("test failure");
3547 expect(vec[480] == true) catch @panic("test failure");
3548 expect(vec[481] == true) catch @panic("test failure");
3549 expect(vec[482] == false) catch @panic("test failure");
3550 expect(vec[483] == true) catch @panic("test failure");
3551 expect(vec[484] == false) catch @panic("test failure");
3552 expect(vec[485] == true) catch @panic("test failure");
3553 expect(vec[486] == false) catch @panic("test failure");
3554 expect(vec[487] == true) catch @panic("test failure");
3555 expect(vec[488] == false) catch @panic("test failure");
3556 expect(vec[489] == false) catch @panic("test failure");
3557 expect(vec[490] == false) catch @panic("test failure");
3558 expect(vec[491] == true) catch @panic("test failure");
3559 expect(vec[492] == false) catch @panic("test failure");
3560 expect(vec[493] == false) catch @panic("test failure");
3561 expect(vec[494] == false) catch @panic("test failure");
3562 expect(vec[495] == true) catch @panic("test failure");
3563 expect(vec[496] == true) catch @panic("test failure");
3564 expect(vec[497] == false) catch @panic("test failure");
3565 expect(vec[498] == false) catch @panic("test failure");
3566 expect(vec[499] == true) catch @panic("test failure");
3567 expect(vec[500] == false) catch @panic("test failure");
3568 expect(vec[501] == true) catch @panic("test failure");
3569 expect(vec[502] == false) catch @panic("test failure");
3570 expect(vec[503] == false) catch @panic("test failure");
3571 expect(vec[504] == false) catch @panic("test failure");
3572 expect(vec[505] == true) catch @panic("test failure");
3573 expect(vec[506] == true) catch @panic("test failure");
3574 expect(vec[507] == true) catch @panic("test failure");
3575 expect(vec[508] == true) catch @panic("test failure");
3576 expect(vec[509] == false) catch @panic("test failure");
3577 expect(vec[510] == false) catch @panic("test failure");
3578 expect(vec[511] == true) catch @panic("test failure");
3579 }
56763580 };
56773581 }
56783582}
56793583
5680const Vector2 = extern struct { x: f32, y: f32 };
3584extern fn c_ret_vector_512_bool() @Vector(512, bool);
3585extern fn c_vector_512_bool(@Vector(512, bool)) void;
3586extern fn c_test_vector_512_bool() void;
3587
3588test "@Vector(512, bool)" {
3589 if (builtin.zig_backend == .stage2_llvm and (builtin.cpu.arch != .powerpc and builtin.cpu.arch != .wasm32)) return error.SkipZigTest;
3590
3591 const vec = c_ret_vector_512_bool();
3592 try expect(vec[0] == false);
3593 try expect(vec[1] == true);
3594 try expect(vec[2] == false);
3595 try expect(vec[3] == false);
3596 try expect(vec[4] == false);
3597 try expect(vec[5] == true);
3598 try expect(vec[6] == false);
3599 try expect(vec[7] == false);
3600 try expect(vec[8] == false);
3601 try expect(vec[9] == true);
3602 try expect(vec[10] == false);
3603 try expect(vec[11] == false);
3604 try expect(vec[12] == false);
3605 try expect(vec[13] == true);
3606 try expect(vec[14] == false);
3607 try expect(vec[15] == true);
3608 try expect(vec[16] == false);
3609 try expect(vec[17] == false);
3610 try expect(vec[18] == false);
3611 try expect(vec[19] == false);
3612 try expect(vec[20] == false);
3613 try expect(vec[21] == false);
3614 try expect(vec[22] == true);
3615 try expect(vec[23] == true);
3616 try expect(vec[24] == false);
3617 try expect(vec[25] == false);
3618 try expect(vec[26] == false);
3619 try expect(vec[27] == false);
3620 try expect(vec[28] == true);
3621 try expect(vec[29] == true);
3622 try expect(vec[30] == false);
3623 try expect(vec[31] == true);
3624 try expect(vec[32] == false);
3625 try expect(vec[33] == true);
3626 try expect(vec[34] == true);
3627 try expect(vec[35] == true);
3628 try expect(vec[36] == false);
3629 try expect(vec[37] == false);
3630 try expect(vec[38] == true);
3631 try expect(vec[39] == true);
3632 try expect(vec[40] == false);
3633 try expect(vec[41] == false);
3634 try expect(vec[42] == false);
3635 try expect(vec[43] == false);
3636 try expect(vec[44] == false);
3637 try expect(vec[45] == true);
3638 try expect(vec[46] == false);
3639 try expect(vec[47] == true);
3640 try expect(vec[48] == true);
3641 try expect(vec[49] == false);
3642 try expect(vec[50] == true);
3643 try expect(vec[51] == true);
3644 try expect(vec[52] == true);
3645 try expect(vec[53] == true);
3646 try expect(vec[54] == false);
3647 try expect(vec[55] == false);
3648 try expect(vec[56] == false);
3649 try expect(vec[57] == true);
3650 try expect(vec[58] == true);
3651 try expect(vec[59] == false);
3652 try expect(vec[60] == false);
3653 try expect(vec[61] == false);
3654 try expect(vec[62] == false);
3655 try expect(vec[63] == true);
3656 try expect(vec[64] == true);
3657 try expect(vec[65] == true);
3658 try expect(vec[66] == true);
3659 try expect(vec[67] == true);
3660 try expect(vec[68] == false);
3661 try expect(vec[69] == false);
3662 try expect(vec[70] == false);
3663 try expect(vec[71] == false);
3664 try expect(vec[72] == false);
3665 try expect(vec[73] == true);
3666 try expect(vec[74] == false);
3667 try expect(vec[75] == true);
3668 try expect(vec[76] == false);
3669 try expect(vec[77] == false);
3670 try expect(vec[78] == true);
3671 try expect(vec[79] == true);
3672 try expect(vec[80] == false);
3673 try expect(vec[81] == false);
3674 try expect(vec[82] == false);
3675 try expect(vec[83] == true);
3676 try expect(vec[84] == false);
3677 try expect(vec[85] == true);
3678 try expect(vec[86] == true);
3679 try expect(vec[87] == true);
3680 try expect(vec[88] == false);
3681 try expect(vec[89] == true);
3682 try expect(vec[90] == false);
3683 try expect(vec[91] == false);
3684 try expect(vec[92] == true);
3685 try expect(vec[93] == true);
3686 try expect(vec[94] == false);
3687 try expect(vec[95] == true);
3688 try expect(vec[96] == true);
3689 try expect(vec[97] == false);
3690 try expect(vec[98] == true);
3691 try expect(vec[99] == false);
3692 try expect(vec[100] == true);
3693 try expect(vec[101] == true);
3694 try expect(vec[102] == false);
3695 try expect(vec[103] == true);
3696 try expect(vec[104] == true);
3697 try expect(vec[105] == false);
3698 try expect(vec[106] == false);
3699 try expect(vec[107] == false);
3700 try expect(vec[108] == true);
3701 try expect(vec[109] == false);
3702 try expect(vec[110] == false);
3703 try expect(vec[111] == false);
3704 try expect(vec[112] == true);
3705 try expect(vec[113] == true);
3706 try expect(vec[114] == true);
3707 try expect(vec[115] == false);
3708 try expect(vec[116] == true);
3709 try expect(vec[117] == false);
3710 try expect(vec[118] == true);
3711 try expect(vec[119] == false);
3712 try expect(vec[120] == true);
3713 try expect(vec[121] == true);
3714 try expect(vec[122] == false);
3715 try expect(vec[123] == true);
3716 try expect(vec[124] == false);
3717 try expect(vec[125] == true);
3718 try expect(vec[126] == true);
3719 try expect(vec[127] == true);
3720 try expect(vec[128] == false);
3721 try expect(vec[129] == true);
3722 try expect(vec[130] == false);
3723 try expect(vec[131] == false);
3724 try expect(vec[132] == false);
3725 try expect(vec[133] == false);
3726 try expect(vec[134] == false);
3727 try expect(vec[135] == false);
3728 try expect(vec[136] == true);
3729 try expect(vec[137] == false);
3730 try expect(vec[138] == true);
3731 try expect(vec[139] == false);
3732 try expect(vec[140] == true);
3733 try expect(vec[141] == true);
3734 try expect(vec[142] == false);
3735 try expect(vec[143] == true);
3736 try expect(vec[144] == false);
3737 try expect(vec[145] == false);
3738 try expect(vec[146] == true);
3739 try expect(vec[147] == false);
3740 try expect(vec[148] == false);
3741 try expect(vec[149] == true);
3742 try expect(vec[150] == false);
3743 try expect(vec[151] == true);
3744 try expect(vec[152] == false);
3745 try expect(vec[153] == true);
3746 try expect(vec[154] == false);
3747 try expect(vec[155] == false);
3748 try expect(vec[156] == true);
3749 try expect(vec[157] == false);
3750 try expect(vec[158] == true);
3751 try expect(vec[159] == true);
3752 try expect(vec[160] == true);
3753 try expect(vec[161] == false);
3754 try expect(vec[162] == false);
3755 try expect(vec[163] == true);
3756 try expect(vec[164] == false);
3757 try expect(vec[165] == false);
3758 try expect(vec[166] == false);
3759 try expect(vec[167] == true);
3760 try expect(vec[168] == true);
3761 try expect(vec[169] == true);
3762 try expect(vec[170] == false);
3763 try expect(vec[171] == true);
3764 try expect(vec[172] == false);
3765 try expect(vec[173] == false);
3766 try expect(vec[174] == false);
3767 try expect(vec[175] == false);
3768 try expect(vec[176] == false);
3769 try expect(vec[177] == true);
3770 try expect(vec[178] == true);
3771 try expect(vec[179] == false);
3772 try expect(vec[180] == false);
3773 try expect(vec[181] == true);
3774 try expect(vec[182] == false);
3775 try expect(vec[183] == false);
3776 try expect(vec[184] == false);
3777 try expect(vec[185] == false);
3778 try expect(vec[186] == false);
3779 try expect(vec[187] == true);
3780 try expect(vec[188] == true);
3781 try expect(vec[189] == false);
3782 try expect(vec[190] == false);
3783 try expect(vec[191] == false);
3784 try expect(vec[192] == false);
3785 try expect(vec[193] == false);
3786 try expect(vec[194] == false);
3787 try expect(vec[195] == true);
3788 try expect(vec[196] == true);
3789 try expect(vec[197] == false);
3790 try expect(vec[198] == true);
3791 try expect(vec[199] == true);
3792 try expect(vec[200] == true);
3793 try expect(vec[201] == true);
3794 try expect(vec[202] == true);
3795 try expect(vec[203] == true);
3796 try expect(vec[204] == false);
3797 try expect(vec[205] == false);
3798 try expect(vec[206] == false);
3799 try expect(vec[207] == false);
3800 try expect(vec[208] == true);
3801 try expect(vec[209] == false);
3802 try expect(vec[210] == true);
3803 try expect(vec[211] == true);
3804 try expect(vec[212] == true);
3805 try expect(vec[213] == true);
3806 try expect(vec[214] == false);
3807 try expect(vec[215] == false);
3808 try expect(vec[216] == false);
3809 try expect(vec[217] == true);
3810 try expect(vec[218] == true);
3811 try expect(vec[219] == false);
3812 try expect(vec[220] == true);
3813 try expect(vec[221] == true);
3814 try expect(vec[222] == false);
3815 try expect(vec[223] == false);
3816 try expect(vec[224] == false);
3817 try expect(vec[225] == true);
3818 try expect(vec[226] == true);
3819 try expect(vec[227] == true);
3820 try expect(vec[228] == true);
3821 try expect(vec[229] == false);
3822 try expect(vec[230] == true);
3823 try expect(vec[231] == false);
3824 try expect(vec[232] == true);
3825 try expect(vec[233] == true);
3826 try expect(vec[234] == true);
3827 try expect(vec[235] == true);
3828 try expect(vec[236] == false);
3829 try expect(vec[237] == true);
3830 try expect(vec[238] == false);
3831 try expect(vec[239] == true);
3832 try expect(vec[240] == false);
3833 try expect(vec[241] == true);
3834 try expect(vec[242] == false);
3835 try expect(vec[243] == false);
3836 try expect(vec[244] == false);
3837 try expect(vec[245] == true);
3838 try expect(vec[246] == true);
3839 try expect(vec[247] == false);
3840 try expect(vec[248] == true);
3841 try expect(vec[249] == false);
3842 try expect(vec[250] == false);
3843 try expect(vec[251] == false);
3844 try expect(vec[252] == true);
3845 try expect(vec[253] == true);
3846 try expect(vec[254] == true);
3847 try expect(vec[255] == true);
3848 try expect(vec[256] == true);
3849 try expect(vec[257] == false);
3850 try expect(vec[258] == true);
3851 try expect(vec[259] == true);
3852 try expect(vec[260] == true);
3853 try expect(vec[261] == true);
3854 try expect(vec[262] == false);
3855 try expect(vec[263] == true);
3856 try expect(vec[264] == false);
3857 try expect(vec[265] == false);
3858 try expect(vec[266] == true);
3859 try expect(vec[267] == false);
3860 try expect(vec[268] == true);
3861 try expect(vec[269] == false);
3862 try expect(vec[270] == false);
3863 try expect(vec[271] == true);
3864 try expect(vec[272] == true);
3865 try expect(vec[273] == false);
3866 try expect(vec[274] == true);
3867 try expect(vec[275] == false);
3868 try expect(vec[276] == false);
3869 try expect(vec[277] == true);
3870 try expect(vec[278] == false);
3871 try expect(vec[279] == false);
3872 try expect(vec[280] == true);
3873 try expect(vec[281] == true);
3874 try expect(vec[282] == true);
3875 try expect(vec[283] == false);
3876 try expect(vec[284] == false);
3877 try expect(vec[285] == true);
3878 try expect(vec[286] == true);
3879 try expect(vec[287] == true);
3880 try expect(vec[288] == false);
3881 try expect(vec[289] == false);
3882 try expect(vec[290] == false);
3883 try expect(vec[291] == false);
3884 try expect(vec[292] == false);
3885 try expect(vec[293] == false);
3886 try expect(vec[294] == true);
3887 try expect(vec[295] == false);
3888 try expect(vec[296] == true);
3889 try expect(vec[297] == false);
3890 try expect(vec[298] == true);
3891 try expect(vec[299] == true);
3892 try expect(vec[300] == false);
3893 try expect(vec[301] == false);
3894 try expect(vec[302] == false);
3895 try expect(vec[303] == false);
3896 try expect(vec[304] == true);
3897 try expect(vec[305] == true);
3898 try expect(vec[306] == true);
3899 try expect(vec[307] == true);
3900 try expect(vec[308] == true);
3901 try expect(vec[309] == false);
3902 try expect(vec[310] == true);
3903 try expect(vec[311] == true);
3904 try expect(vec[312] == true);
3905 try expect(vec[313] == true);
3906 try expect(vec[314] == true);
3907 try expect(vec[315] == false);
3908 try expect(vec[316] == true);
3909 try expect(vec[317] == true);
3910 try expect(vec[318] == true);
3911 try expect(vec[319] == false);
3912 try expect(vec[320] == true);
3913 try expect(vec[321] == false);
3914 try expect(vec[322] == true);
3915 try expect(vec[323] == true);
3916 try expect(vec[324] == true);
3917 try expect(vec[325] == false);
3918 try expect(vec[326] == false);
3919 try expect(vec[327] == true);
3920 try expect(vec[328] == true);
3921 try expect(vec[329] == true);
3922 try expect(vec[330] == false);
3923 try expect(vec[331] == false);
3924 try expect(vec[332] == true);
3925 try expect(vec[333] == true);
3926 try expect(vec[334] == false);
3927 try expect(vec[335] == true);
3928 try expect(vec[336] == true);
3929 try expect(vec[337] == true);
3930 try expect(vec[338] == true);
3931 try expect(vec[339] == true);
3932 try expect(vec[340] == true);
3933 try expect(vec[341] == false);
3934 try expect(vec[342] == true);
3935 try expect(vec[343] == false);
3936 try expect(vec[344] == true);
3937 try expect(vec[345] == false);
3938 try expect(vec[346] == false);
3939 try expect(vec[347] == false);
3940 try expect(vec[348] == false);
3941 try expect(vec[349] == true);
3942 try expect(vec[350] == true);
3943 try expect(vec[351] == true);
3944 try expect(vec[352] == true);
3945 try expect(vec[353] == false);
3946 try expect(vec[354] == true);
3947 try expect(vec[355] == false);
3948 try expect(vec[356] == true);
3949 try expect(vec[357] == true);
3950 try expect(vec[358] == false);
3951 try expect(vec[359] == true);
3952 try expect(vec[360] == false);
3953 try expect(vec[361] == false);
3954 try expect(vec[362] == true);
3955 try expect(vec[363] == false);
3956 try expect(vec[364] == false);
3957 try expect(vec[365] == false);
3958 try expect(vec[366] == false);
3959 try expect(vec[367] == false);
3960 try expect(vec[368] == false);
3961 try expect(vec[369] == false);
3962 try expect(vec[370] == true);
3963 try expect(vec[371] == false);
3964 try expect(vec[372] == true);
3965 try expect(vec[373] == true);
3966 try expect(vec[374] == false);
3967 try expect(vec[375] == false);
3968 try expect(vec[376] == true);
3969 try expect(vec[377] == false);
3970 try expect(vec[378] == false);
3971 try expect(vec[379] == true);
3972 try expect(vec[380] == false);
3973 try expect(vec[381] == false);
3974 try expect(vec[382] == true);
3975 try expect(vec[383] == false);
3976 try expect(vec[384] == false);
3977 try expect(vec[385] == false);
3978 try expect(vec[386] == false);
3979 try expect(vec[387] == true);
3980 try expect(vec[388] == true);
3981 try expect(vec[389] == true);
3982 try expect(vec[390] == true);
3983 try expect(vec[391] == true);
3984 try expect(vec[392] == true);
3985 try expect(vec[393] == true);
3986 try expect(vec[394] == false);
3987 try expect(vec[395] == true);
3988 try expect(vec[396] == true);
3989 try expect(vec[397] == false);
3990 try expect(vec[398] == false);
3991 try expect(vec[399] == false);
3992 try expect(vec[400] == true);
3993 try expect(vec[401] == false);
3994 try expect(vec[402] == true);
3995 try expect(vec[403] == true);
3996 try expect(vec[404] == false);
3997 try expect(vec[405] == true);
3998 try expect(vec[406] == true);
3999 try expect(vec[407] == true);
4000 try expect(vec[408] == true);
4001 try expect(vec[409] == false);
4002 try expect(vec[410] == false);
4003 try expect(vec[411] == false);
4004 try expect(vec[412] == true);
4005 try expect(vec[413] == true);
4006 try expect(vec[414] == false);
4007 try expect(vec[415] == true);
4008 try expect(vec[416] == false);
4009 try expect(vec[417] == true);
4010 try expect(vec[418] == false);
4011 try expect(vec[419] == false);
4012 try expect(vec[420] == false);
4013 try expect(vec[421] == false);
4014 try expect(vec[422] == true);
4015 try expect(vec[423] == true);
4016 try expect(vec[424] == true);
4017 try expect(vec[425] == false);
4018 try expect(vec[426] == true);
4019 try expect(vec[427] == false);
4020 try expect(vec[428] == false);
4021 try expect(vec[429] == false);
4022 try expect(vec[430] == true);
4023 try expect(vec[431] == true);
4024 try expect(vec[432] == false);
4025 try expect(vec[433] == true);
4026 try expect(vec[434] == false);
4027 try expect(vec[435] == false);
4028 try expect(vec[436] == true);
4029 try expect(vec[437] == true);
4030 try expect(vec[438] == true);
4031 try expect(vec[439] == true);
4032 try expect(vec[440] == true);
4033 try expect(vec[441] == true);
4034 try expect(vec[442] == false);
4035 try expect(vec[443] == false);
4036 try expect(vec[444] == false);
4037 try expect(vec[445] == true);
4038 try expect(vec[446] == true);
4039 try expect(vec[447] == true);
4040 try expect(vec[448] == false);
4041 try expect(vec[449] == false);
4042 try expect(vec[450] == false);
4043 try expect(vec[451] == false);
4044 try expect(vec[452] == false);
4045 try expect(vec[453] == false);
4046 try expect(vec[454] == false);
4047 try expect(vec[455] == false);
4048 try expect(vec[456] == false);
4049 try expect(vec[457] == false);
4050 try expect(vec[458] == false);
4051 try expect(vec[459] == true);
4052 try expect(vec[460] == false);
4053 try expect(vec[461] == false);
4054 try expect(vec[462] == false);
4055 try expect(vec[463] == true);
4056 try expect(vec[464] == false);
4057 try expect(vec[465] == false);
4058 try expect(vec[466] == false);
4059 try expect(vec[467] == false);
4060 try expect(vec[468] == true);
4061 try expect(vec[469] == true);
4062 try expect(vec[470] == true);
4063 try expect(vec[471] == true);
4064 try expect(vec[472] == true);
4065 try expect(vec[473] == false);
4066 try expect(vec[474] == false);
4067 try expect(vec[475] == true);
4068 try expect(vec[476] == true);
4069 try expect(vec[477] == true);
4070 try expect(vec[478] == false);
4071 try expect(vec[479] == true);
4072 try expect(vec[480] == true);
4073 try expect(vec[481] == true);
4074 try expect(vec[482] == false);
4075 try expect(vec[483] == true);
4076 try expect(vec[484] == false);
4077 try expect(vec[485] == true);
4078 try expect(vec[486] == false);
4079 try expect(vec[487] == true);
4080 try expect(vec[488] == false);
4081 try expect(vec[489] == true);
4082 try expect(vec[490] == true);
4083 try expect(vec[491] == true);
4084 try expect(vec[492] == true);
4085 try expect(vec[493] == false);
4086 try expect(vec[494] == true);
4087 try expect(vec[495] == true);
4088 try expect(vec[496] == false);
4089 try expect(vec[497] == true);
4090 try expect(vec[498] == false);
4091 try expect(vec[499] == false);
4092 try expect(vec[500] == false);
4093 try expect(vec[501] == false);
4094 try expect(vec[502] == false);
4095 try expect(vec[503] == false);
4096 try expect(vec[504] == false);
4097 try expect(vec[505] == false);
4098 try expect(vec[506] == false);
4099 try expect(vec[507] == true);
4100 try expect(vec[508] == true);
4101 try expect(vec[509] == false);
4102 try expect(vec[510] == true);
4103 try expect(vec[511] == false);
4104 if (!builtin.target.cpu.arch.isWasm()) c_vector_512_bool(.{
4105 true,
4106 true,
4107 true,
4108 true,
4109 true,
4110 false,
4111 false,
4112 true,
4113 true,
4114 true,
4115 true,
4116 false,
4117 true,
4118 true,
4119 false,
4120 false,
4121 false,
4122 true,
4123 true,
4124 true,
4125 true,
4126 true,
4127 false,
4128 false,
4129 true,
4130 true,
4131 false,
4132 false,
4133 false,
4134 false,
4135 false,
4136 true,
4137 true,
4138 false,
4139 true,
4140 true,
4141 true,
4142 true,
4143 true,
4144 true,
4145 false,
4146 true,
4147 true,
4148 false,
4149 false,
4150 false,
4151 true,
4152 true,
4153 false,
4154 true,
4155 false,
4156 true,
4157 true,
4158 false,
4159 true,
4160 false,
4161 false,
4162 true,
4163 true,
4164 false,
4165 true,
4166 true,
4167 false,
4168 true,
4169 false,
4170 true,
4171 true,
4172 true,
4173 true,
4174 true,
4175 true,
4176 true,
4177 true,
4178 true,
4179 false,
4180 true,
4181 false,
4182 true,
4183 false,
4184 false,
4185 false,
4186 true,
4187 false,
4188 true,
4189 true,
4190 false,
4191 true,
4192 true,
4193 true,
4194 false,
4195 true,
4196 true,
4197 false,
4198 true,
4199 false,
4200 true,
4201 true,
4202 false,
4203 false,
4204 false,
4205 true,
4206 true,
4207 false,
4208 true,
4209 false,
4210 false,
4211 true,
4212 false,
4213 false,
4214 true,
4215 false,
4216 false,
4217 false,
4218 false,
4219 false,
4220 true,
4221 true,
4222 false,
4223 false,
4224 false,
4225 false,
4226 true,
4227 false,
4228 false,
4229 true,
4230 true,
4231 false,
4232 true,
4233 false,
4234 true,
4235 true,
4236 false,
4237 true,
4238 false,
4239 false,
4240 false,
4241 false,
4242 true,
4243 true,
4244 false,
4245 false,
4246 false,
4247 true,
4248 true,
4249 false,
4250 false,
4251 true,
4252 true,
4253 true,
4254 true,
4255 true,
4256 true,
4257 true,
4258 false,
4259 true,
4260 false,
4261 false,
4262 true,
4263 false,
4264 true,
4265 false,
4266 true,
4267 true,
4268 true,
4269 true,
4270 true,
4271 true,
4272 true,
4273 true,
4274 false,
4275 true,
4276 true,
4277 false,
4278 true,
4279 true,
4280 false,
4281 false,
4282 false,
4283 true,
4284 false,
4285 false,
4286 true,
4287 true,
4288 true,
4289 true,
4290 true,
4291 true,
4292 true,
4293 true,
4294 true,
4295 false,
4296 true,
4297 true,
4298 false,
4299 false,
4300 true,
4301 true,
4302 false,
4303 true,
4304 true,
4305 false,
4306 true,
4307 true,
4308 false,
4309 true,
4310 true,
4311 true,
4312 true,
4313 false,
4314 true,
4315 false,
4316 true,
4317 true,
4318 false,
4319 true,
4320 false,
4321 true,
4322 false,
4323 true,
4324 false,
4325 false,
4326 true,
4327 false,
4328 false,
4329 false,
4330 true,
4331 true,
4332 false,
4333 false,
4334 false,
4335 true,
4336 false,
4337 true,
4338 false,
4339 false,
4340 false,
4341 true,
4342 true,
4343 false,
4344 false,
4345 false,
4346 false,
4347 false,
4348 true,
4349 true,
4350 false,
4351 true,
4352 false,
4353 false,
4354 true,
4355 false,
4356 false,
4357 false,
4358 true,
4359 false,
4360 false,
4361 false,
4362 false,
4363 true,
4364 true,
4365 true,
4366 true,
4367 false,
4368 true,
4369 false,
4370 false,
4371 false,
4372 true,
4373 false,
4374 false,
4375 true,
4376 true,
4377 false,
4378 false,
4379 false,
4380 false,
4381 false,
4382 true,
4383 false,
4384 true,
4385 true,
4386 true,
4387 true,
4388 true,
4389 false,
4390 false,
4391 false,
4392 false,
4393 false,
4394 false,
4395 false,
4396 false,
4397 false,
4398 true,
4399 true,
4400 true,
4401 true,
4402 true,
4403 true,
4404 false,
4405 true,
4406 false,
4407 true,
4408 true,
4409 true,
4410 false,
4411 false,
4412 true,
4413 true,
4414 true,
4415 false,
4416 true,
4417 true,
4418 true,
4419 false,
4420 true,
4421 true,
4422 true,
4423 false,
4424 true,
4425 true,
4426 false,
4427 false,
4428 true,
4429 false,
4430 false,
4431 false,
4432 false,
4433 true,
4434 false,
4435 true,
4436 true,
4437 true,
4438 true,
4439 false,
4440 false,
4441 true,
4442 false,
4443 true,
4444 false,
4445 false,
4446 false,
4447 true,
4448 false,
4449 true,
4450 false,
4451 false,
4452 true,
4453 true,
4454 true,
4455 true,
4456 false,
4457 false,
4458 false,
4459 true,
4460 true,
4461 false,
4462 true,
4463 false,
4464 false,
4465 true,
4466 false,
4467 true,
4468 false,
4469 true,
4470 true,
4471 false,
4472 false,
4473 true,
4474 true,
4475 true,
4476 true,
4477 false,
4478 false,
4479 true,
4480 false,
4481 true,
4482 true,
4483 false,
4484 true,
4485 true,
4486 false,
4487 true,
4488 true,
4489 true,
4490 false,
4491 true,
4492 true,
4493 true,
4494 false,
4495 false,
4496 true,
4497 false,
4498 true,
4499 true,
4500 true,
4501 false,
4502 false,
4503 false,
4504 false,
4505 false,
4506 true,
4507 false,
4508 false,
4509 false,
4510 false,
4511 true,
4512 false,
4513 false,
4514 true,
4515 true,
4516 false,
4517 false,
4518 false,
4519 false,
4520 true,
4521 true,
4522 true,
4523 true,
4524 true,
4525 false,
4526 false,
4527 false,
4528 true,
4529 false,
4530 false,
4531 false,
4532 false,
4533 true,
4534 false,
4535 true,
4536 false,
4537 true,
4538 true,
4539 true,
4540 true,
4541 false,
4542 false,
4543 false,
4544 false,
4545 false,
4546 true,
4547 true,
4548 true,
4549 true,
4550 true,
4551 true,
4552 true,
4553 true,
4554 true,
4555 false,
4556 false,
4557 true,
4558 false,
4559 true,
4560 false,
4561 false,
4562 true,
4563 false,
4564 false,
4565 true,
4566 true,
4567 true,
4568 true,
4569 true,
4570 true,
4571 false,
4572 true,
4573 false,
4574 false,
4575 false,
4576 true,
4577 true,
4578 false,
4579 true,
4580 true,
4581 false,
4582 false,
4583 true,
4584 true,
4585 false,
4586 false,
4587 true,
4588 true,
4589 false,
4590 true,
4591 false,
4592 true,
4593 true,
4594 true,
4595 true,
4596 true,
4597 true,
4598 true,
4599 true,
4600 true,
4601 false,
4602 true,
4603 true,
4604 true,
4605 false,
4606 false,
4607 true,
4608 false,
4609 false,
4610 false,
4611 true,
4612 true,
4613 false,
4614 true,
4615 false,
4616 true,
4617 });
4618 c_test_vector_512_bool();
4619}
4620
4621export fn zig_ret_vector_1_u8() @Vector(1, u8) {
4622 return .{1};
4623}
4624export fn zig_vector_1_u8(v: @Vector(1, u8), i: usize) void {
4625 expect(v[0] == 2) catch @panic("test failure");
4626 expect(i == 1) catch @panic("test failure");
4627}
4628
4629extern fn c_ret_vector_1_u8() @Vector(1, u8);
4630extern fn c_vector_1_u8(@Vector(1, u8), usize) void;
4631extern fn c_test_vector_1_u8() void;
4632
4633test "@Vector(1, u8)" {
4634 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
4635 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
4636 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4637
4638 const v = c_ret_vector_1_u8();
4639 try expect(v[0] == 3);
4640 c_vector_1_u8(.{4}, 1);
4641 c_test_vector_1_u8();
4642}
4643
4644export fn zig_ret_vector_2_u8() @Vector(2, u8) {
4645 return .{ 5, 6 };
4646}
4647export fn zig_vector_2_u8(v: @Vector(2, u8), i: usize) void {
4648 expect(v[0] == 7) catch @panic("test failure");
4649 expect(v[1] == 8) catch @panic("test failure");
4650 expect(i == 2) catch @panic("test failure");
4651}
4652
4653extern fn c_ret_vector_2_u8() @Vector(2, u8);
4654extern fn c_vector_2_u8(@Vector(2, u8), usize) void;
4655extern fn c_test_vector_2_u8() void;
4656
4657test "@Vector(2, u8)" {
4658 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
4659 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
4660 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4661 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4662 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4663 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) return error.SkipZigTest;
4664
4665 const v = c_ret_vector_2_u8();
4666 try expect(v[0] == 9);
4667 try expect(v[1] == 10);
4668 c_vector_2_u8(.{ 11, 12 }, 2);
4669 c_test_vector_2_u8();
4670}
4671
4672export fn zig_ret_vector_3_u8() @Vector(3, u8) {
4673 return .{ 13, 14, 15 };
4674}
4675export fn zig_vector_3_u8(v: @Vector(3, u8), i: usize) void {
4676 expect(v[0] == 16) catch @panic("test failure");
4677 expect(v[1] == 17) catch @panic("test failure");
4678 expect(v[2] == 18) catch @panic("test failure");
4679 expect(i == 3) catch @panic("test failure");
4680}
4681
4682extern fn c_ret_vector_3_u8() @Vector(3, u8);
4683extern fn c_vector_3_u8(@Vector(3, u8), usize) void;
4684extern fn c_test_vector_3_u8() void;
4685
4686test "@Vector(3, u8)" {
4687 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
4688 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
4689 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4690 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4691 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4692 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag != .windows) return error.SkipZigTest;
4693
4694 const v = c_ret_vector_3_u8();
4695 try expect(v[0] == 19);
4696 try expect(v[1] == 20);
4697 try expect(v[2] == 21);
4698 c_vector_3_u8(.{ 22, 23, 24 }, 3);
4699 c_test_vector_3_u8();
4700}
4701
4702export fn zig_ret_vector_4_u8() @Vector(4, u8) {
4703 return .{ 25, 26, 27, 28 };
4704}
4705export fn zig_vector_4_u8(v: @Vector(4, u8), i: usize) void {
4706 expect(v[0] == 29) catch @panic("test failure");
4707 expect(v[1] == 30) catch @panic("test failure");
4708 expect(v[2] == 31) catch @panic("test failure");
4709 expect(v[3] == 32) catch @panic("test failure");
4710 expect(i == 4) catch @panic("test failure");
4711}
4712export fn zig_vector_4_u8_vector_4_u8(v0: @Vector(4, u8), v1: @Vector(4, u8), i: usize) void {
4713 expect(v0[0] == 33) catch @panic("test failure");
4714 expect(v0[1] == 34) catch @panic("test failure");
4715 expect(v0[2] == 35) catch @panic("test failure");
4716 expect(v0[3] == 36) catch @panic("test failure");
4717 expect(v1[0] == 37) catch @panic("test failure");
4718 expect(v1[1] == 38) catch @panic("test failure");
4719 expect(v1[2] == 39) catch @panic("test failure");
4720 expect(v1[3] == 40) catch @panic("test failure");
4721 expect(i == 8) catch @panic("test failure");
4722}
4723
4724extern fn c_ret_vector_4_u8() @Vector(4, u8);
4725extern fn c_vector_4_u8(@Vector(4, u8), usize) void;
4726extern fn c_vector_4_u8_vector_4_u8(@Vector(4, u8), @Vector(4, u8), usize) void;
4727extern fn c_test_vector_4_u8() void;
4728
4729test "@Vector(4, u8)" {
4730 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
4731 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
4732 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4733 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
4734 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4735 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) return error.SkipZigTest;
4736
4737 const v = c_ret_vector_4_u8();
4738 try expect(v[0] == 41);
4739 try expect(v[1] == 42);
4740 try expect(v[2] == 43);
4741 try expect(v[3] == 44);
4742 c_vector_4_u8(.{ 45, 46, 47, 48 }, 4);
4743 c_vector_4_u8_vector_4_u8(.{ 49, 50, 51, 52 }, .{ 53, 54, 55, 56 }, 8);
4744 c_test_vector_4_u8();
4745}
4746
4747export fn zig_ret_vector_6_u8() @Vector(6, u8) {
4748 return .{ 41, 42, 43, 44, 45, 46 };
4749}
4750export fn zig_vector_6_u8(v: @Vector(6, u8), i: usize) void {
4751 expect(v[0] == 47) catch @panic("test failure");
4752 expect(v[1] == 48) catch @panic("test failure");
4753 expect(v[2] == 49) catch @panic("test failure");
4754 expect(v[3] == 50) catch @panic("test failure");
4755 expect(v[4] == 51) catch @panic("test failure");
4756 expect(v[5] == 52) catch @panic("test failure");
4757 expect(i == 6) catch @panic("test failure");
4758}
4759
4760extern fn c_ret_vector_6_u8() @Vector(6, u8);
4761extern fn c_vector_6_u8(@Vector(6, u8), usize) void;
4762extern fn c_test_vector_6_u8() void;
4763
4764test "@Vector(6, u8)" {
4765 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
4766 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4767 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4768 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4769 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag != .windows) return error.SkipZigTest;
4770
4771 const v = c_ret_vector_6_u8();
4772 try expect(v[0] == 53);
4773 try expect(v[1] == 54);
4774 try expect(v[2] == 55);
4775 try expect(v[3] == 56);
4776 try expect(v[4] == 57);
4777 try expect(v[5] == 58);
4778 c_vector_6_u8(.{ 59, 60, 61, 62, 63, 64 }, 6);
4779 c_test_vector_6_u8();
4780}
4781
4782export fn zig_ret_vector_8_u8() @Vector(8, u8) {
4783 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
4784}
4785export fn zig_vector_8_u8(v: @Vector(8, u8), i: usize) void {
4786 expect(v[0] == 73) catch @panic("test failure");
4787 expect(v[1] == 74) catch @panic("test failure");
4788 expect(v[2] == 75) catch @panic("test failure");
4789 expect(v[3] == 76) catch @panic("test failure");
4790 expect(v[4] == 77) catch @panic("test failure");
4791 expect(v[5] == 78) catch @panic("test failure");
4792 expect(v[6] == 79) catch @panic("test failure");
4793 expect(v[7] == 80) catch @panic("test failure");
4794 expect(i == 8) catch @panic("test failure");
4795}
4796
4797extern fn c_ret_vector_8_u8() @Vector(8, u8);
4798extern fn c_vector_8_u8(@Vector(8, u8), usize) void;
4799extern fn c_test_vector_8_u8() void;
4800
4801test "@Vector(8, u8)" {
4802 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4803 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4804 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
4805 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .windows) return error.SkipZigTest;
4806
4807 const v = c_ret_vector_8_u8();
4808 try expect(v[0] == 81);
4809 try expect(v[1] == 82);
4810 try expect(v[2] == 83);
4811 try expect(v[3] == 84);
4812 try expect(v[4] == 85);
4813 try expect(v[5] == 86);
4814 try expect(v[6] == 87);
4815 try expect(v[7] == 88);
4816 c_vector_8_u8(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
4817 c_test_vector_8_u8();
4818}
4819
4820export fn zig_ret_vector_12_u8() @Vector(12, u8) {
4821 return .{ 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8 };
4822}
4823export fn zig_vector_12_u8(v: @Vector(12, u8), i: usize) void {
4824 expect(v[0] == 9) catch @panic("test failure");
4825 expect(v[1] == 10) catch @panic("test failure");
4826 expect(v[2] == 11) catch @panic("test failure");
4827 expect(v[3] == 12) catch @panic("test failure");
4828 expect(v[4] == 13) catch @panic("test failure");
4829 expect(v[5] == 14) catch @panic("test failure");
4830 expect(v[6] == 15) catch @panic("test failure");
4831 expect(v[7] == 16) catch @panic("test failure");
4832 expect(v[8] == 17) catch @panic("test failure");
4833 expect(v[9] == 18) catch @panic("test failure");
4834 expect(v[10] == 19) catch @panic("test failure");
4835 expect(v[11] == 20) catch @panic("test failure");
4836 expect(i == 12) catch @panic("test failure");
4837}
4838
4839extern fn c_ret_vector_12_u8() @Vector(12, u8);
4840extern fn c_vector_12_u8(@Vector(12, u8), usize) void;
4841extern fn c_test_vector_12_u8() void;
4842
4843test "@Vector(12, u8)" {
4844 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
4845 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4846 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4847
4848 const v = c_ret_vector_12_u8();
4849 try expect(v[0] == 21);
4850 try expect(v[1] == 22);
4851 try expect(v[2] == 23);
4852 try expect(v[3] == 24);
4853 try expect(v[4] == 25);
4854 try expect(v[5] == 26);
4855 try expect(v[6] == 27);
4856 try expect(v[7] == 28);
4857 try expect(v[8] == 29);
4858 try expect(v[9] == 30);
4859 try expect(v[10] == 31);
4860 try expect(v[11] == 32);
4861 c_vector_12_u8(.{ 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44 }, 12);
4862 c_test_vector_12_u8();
4863}
4864
4865export fn zig_ret_vector_16_u8() @Vector(16, u8) {
4866 return .{ 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60 };
4867}
4868export fn zig_vector_16_u8(v: @Vector(16, u8), i: usize) void {
4869 expect(v[0] == 61) catch @panic("test failure");
4870 expect(v[1] == 62) catch @panic("test failure");
4871 expect(v[2] == 63) catch @panic("test failure");
4872 expect(v[3] == 64) catch @panic("test failure");
4873 expect(v[4] == 65) catch @panic("test failure");
4874 expect(v[5] == 66) catch @panic("test failure");
4875 expect(v[6] == 67) catch @panic("test failure");
4876 expect(v[7] == 68) catch @panic("test failure");
4877 expect(v[8] == 69) catch @panic("test failure");
4878 expect(v[9] == 70) catch @panic("test failure");
4879 expect(v[10] == 71) catch @panic("test failure");
4880 expect(v[11] == 72) catch @panic("test failure");
4881 expect(v[12] == 73) catch @panic("test failure");
4882 expect(v[13] == 74) catch @panic("test failure");
4883 expect(v[14] == 75) catch @panic("test failure");
4884 expect(v[15] == 76) catch @panic("test failure");
4885 expect(i == 16) catch @panic("test failure");
4886}
4887
4888extern fn c_ret_vector_16_u8() @Vector(16, u8);
4889extern fn c_vector_16_u8(@Vector(16, u8), usize) void;
4890extern fn c_test_vector_16_u8() void;
4891
4892test "@Vector(16, u8)" {
4893 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4894
4895 const v = c_ret_vector_16_u8();
4896 try expect(v[0] == 77);
4897 try expect(v[1] == 78);
4898 try expect(v[2] == 79);
4899 try expect(v[3] == 80);
4900 try expect(v[4] == 81);
4901 try expect(v[5] == 82);
4902 try expect(v[6] == 83);
4903 try expect(v[7] == 84);
4904 try expect(v[8] == 85);
4905 try expect(v[9] == 86);
4906 try expect(v[10] == 87);
4907 try expect(v[11] == 88);
4908 try expect(v[12] == 89);
4909 try expect(v[13] == 90);
4910 try expect(v[14] == 91);
4911 try expect(v[15] == 92);
4912 c_vector_16_u8(.{ 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8 }, 16);
4913 c_test_vector_16_u8();
4914}
4915
4916export fn zig_ret_vector_24_u8() @Vector(24, u8) {
4917 return .{
4918 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
4919 25, 26, 27, 28, 29, 30, 31, 32,
4920 };
4921}
4922export fn zig_vector_24_u8(v: @Vector(24, u8), i: usize) void {
4923 expect(v[0] == 33) catch @panic("test failure");
4924 expect(v[1] == 34) catch @panic("test failure");
4925 expect(v[2] == 35) catch @panic("test failure");
4926 expect(v[3] == 36) catch @panic("test failure");
4927 expect(v[4] == 37) catch @panic("test failure");
4928 expect(v[5] == 38) catch @panic("test failure");
4929 expect(v[6] == 39) catch @panic("test failure");
4930 expect(v[7] == 40) catch @panic("test failure");
4931 expect(v[8] == 41) catch @panic("test failure");
4932 expect(v[9] == 42) catch @panic("test failure");
4933 expect(v[10] == 43) catch @panic("test failure");
4934 expect(v[11] == 44) catch @panic("test failure");
4935 expect(v[12] == 45) catch @panic("test failure");
4936 expect(v[13] == 46) catch @panic("test failure");
4937 expect(v[14] == 47) catch @panic("test failure");
4938 expect(v[15] == 48) catch @panic("test failure");
4939 expect(v[16] == 49) catch @panic("test failure");
4940 expect(v[17] == 50) catch @panic("test failure");
4941 expect(v[18] == 51) catch @panic("test failure");
4942 expect(v[19] == 52) catch @panic("test failure");
4943 expect(v[20] == 53) catch @panic("test failure");
4944 expect(v[21] == 54) catch @panic("test failure");
4945 expect(v[22] == 55) catch @panic("test failure");
4946 expect(v[23] == 56) catch @panic("test failure");
4947 expect(i == 24) catch @panic("test failure");
4948}
4949
4950extern fn c_ret_vector_24_u8() @Vector(24, u8);
4951extern fn c_vector_24_u8(@Vector(24, u8), usize) void;
4952extern fn c_test_vector_24_u8() void;
4953
4954test "@Vector(24, u8)" {
4955 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
4956 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
4957 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
4958 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
4959 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
4960
4961 const v = c_ret_vector_24_u8();
4962 try expect(v[0] == 57);
4963 try expect(v[1] == 58);
4964 try expect(v[2] == 59);
4965 try expect(v[3] == 60);
4966 try expect(v[4] == 61);
4967 try expect(v[5] == 62);
4968 try expect(v[6] == 63);
4969 try expect(v[7] == 64);
4970 try expect(v[8] == 65);
4971 try expect(v[9] == 66);
4972 try expect(v[10] == 67);
4973 try expect(v[11] == 68);
4974 try expect(v[12] == 69);
4975 try expect(v[13] == 70);
4976 try expect(v[14] == 71);
4977 try expect(v[15] == 72);
4978 try expect(v[16] == 73);
4979 try expect(v[17] == 74);
4980 try expect(v[18] == 75);
4981 try expect(v[19] == 76);
4982 try expect(v[20] == 77);
4983 try expect(v[21] == 78);
4984 try expect(v[22] == 79);
4985 try expect(v[23] == 80);
4986 c_vector_24_u8(.{
4987 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96,
4988 97, 98, 99, 0, 1, 2, 3, 4,
4989 }, 24);
4990 c_test_vector_24_u8();
4991}
4992
4993export fn zig_ret_vector_32_u8() @Vector(32, u8) {
4994 return .{
4995 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
4996 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
4997 };
4998}
4999export fn zig_vector_32_u8(v: @Vector(32, u8), i: usize) void {
5000 expect(v[0] == 37) catch @panic("test failure");
5001 expect(v[1] == 38) catch @panic("test failure");
5002 expect(v[2] == 39) catch @panic("test failure");
5003 expect(v[3] == 40) catch @panic("test failure");
5004 expect(v[4] == 41) catch @panic("test failure");
5005 expect(v[5] == 42) catch @panic("test failure");
5006 expect(v[6] == 43) catch @panic("test failure");
5007 expect(v[7] == 44) catch @panic("test failure");
5008 expect(v[8] == 45) catch @panic("test failure");
5009 expect(v[9] == 46) catch @panic("test failure");
5010 expect(v[10] == 47) catch @panic("test failure");
5011 expect(v[11] == 48) catch @panic("test failure");
5012 expect(v[12] == 49) catch @panic("test failure");
5013 expect(v[13] == 50) catch @panic("test failure");
5014 expect(v[14] == 51) catch @panic("test failure");
5015 expect(v[15] == 52) catch @panic("test failure");
5016 expect(v[16] == 53) catch @panic("test failure");
5017 expect(v[17] == 54) catch @panic("test failure");
5018 expect(v[18] == 55) catch @panic("test failure");
5019 expect(v[19] == 56) catch @panic("test failure");
5020 expect(v[20] == 57) catch @panic("test failure");
5021 expect(v[21] == 58) catch @panic("test failure");
5022 expect(v[22] == 59) catch @panic("test failure");
5023 expect(v[23] == 60) catch @panic("test failure");
5024 expect(v[24] == 61) catch @panic("test failure");
5025 expect(v[25] == 62) catch @panic("test failure");
5026 expect(v[26] == 63) catch @panic("test failure");
5027 expect(v[27] == 64) catch @panic("test failure");
5028 expect(v[28] == 65) catch @panic("test failure");
5029 expect(v[29] == 66) catch @panic("test failure");
5030 expect(v[30] == 67) catch @panic("test failure");
5031 expect(v[31] == 68) catch @panic("test failure");
5032 expect(i == 32) catch @panic("test failure");
5033}
5034
5035extern fn c_ret_vector_32_u8() @Vector(32, u8);
5036extern fn c_vector_32_u8(@Vector(32, u8), usize) void;
5037extern fn c_test_vector_32_u8() void;
5038
5039test "@Vector(32, u8)" {
5040 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5041 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5042 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5043 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5044
5045 const v = c_ret_vector_32_u8();
5046 try expect(v[0] == 69);
5047 try expect(v[1] == 70);
5048 try expect(v[2] == 71);
5049 try expect(v[3] == 72);
5050 try expect(v[4] == 73);
5051 try expect(v[5] == 74);
5052 try expect(v[6] == 75);
5053 try expect(v[7] == 76);
5054 try expect(v[8] == 77);
5055 try expect(v[9] == 78);
5056 try expect(v[10] == 79);
5057 try expect(v[11] == 80);
5058 try expect(v[12] == 81);
5059 try expect(v[13] == 82);
5060 try expect(v[14] == 83);
5061 try expect(v[15] == 84);
5062 try expect(v[16] == 85);
5063 try expect(v[17] == 86);
5064 try expect(v[18] == 87);
5065 try expect(v[19] == 88);
5066 try expect(v[20] == 89);
5067 try expect(v[21] == 90);
5068 try expect(v[22] == 91);
5069 try expect(v[23] == 92);
5070 try expect(v[24] == 93);
5071 try expect(v[25] == 94);
5072 try expect(v[26] == 95);
5073 try expect(v[27] == 96);
5074 try expect(v[28] == 97);
5075 try expect(v[29] == 98);
5076 try expect(v[30] == 99);
5077 try expect(v[31] == 0);
5078 c_vector_32_u8(.{
5079 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
5080 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
5081 }, 32);
5082 c_test_vector_32_u8();
5083}
5084
5085export fn zig_ret_vector_48_u8() @Vector(48, u8) {
5086 return .{
5087 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
5088 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
5089 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80,
5090 };
5091}
5092export fn zig_vector_48_u8(v: @Vector(48, u8), i: usize) void {
5093 expect(v[0] == 81) catch @panic("test failure");
5094 expect(v[1] == 82) catch @panic("test failure");
5095 expect(v[2] == 83) catch @panic("test failure");
5096 expect(v[3] == 84) catch @panic("test failure");
5097 expect(v[4] == 85) catch @panic("test failure");
5098 expect(v[5] == 86) catch @panic("test failure");
5099 expect(v[6] == 87) catch @panic("test failure");
5100 expect(v[7] == 88) catch @panic("test failure");
5101 expect(v[8] == 89) catch @panic("test failure");
5102 expect(v[9] == 90) catch @panic("test failure");
5103 expect(v[10] == 91) catch @panic("test failure");
5104 expect(v[11] == 92) catch @panic("test failure");
5105 expect(v[12] == 93) catch @panic("test failure");
5106 expect(v[13] == 94) catch @panic("test failure");
5107 expect(v[14] == 95) catch @panic("test failure");
5108 expect(v[15] == 96) catch @panic("test failure");
5109 expect(v[16] == 97) catch @panic("test failure");
5110 expect(v[17] == 98) catch @panic("test failure");
5111 expect(v[18] == 99) catch @panic("test failure");
5112 expect(v[19] == 0) catch @panic("test failure");
5113 expect(v[20] == 1) catch @panic("test failure");
5114 expect(v[21] == 2) catch @panic("test failure");
5115 expect(v[22] == 3) catch @panic("test failure");
5116 expect(v[23] == 4) catch @panic("test failure");
5117 expect(v[24] == 5) catch @panic("test failure");
5118 expect(v[25] == 6) catch @panic("test failure");
5119 expect(v[26] == 7) catch @panic("test failure");
5120 expect(v[27] == 8) catch @panic("test failure");
5121 expect(v[28] == 9) catch @panic("test failure");
5122 expect(v[29] == 10) catch @panic("test failure");
5123 expect(v[30] == 11) catch @panic("test failure");
5124 expect(v[31] == 12) catch @panic("test failure");
5125 expect(v[32] == 13) catch @panic("test failure");
5126 expect(v[33] == 14) catch @panic("test failure");
5127 expect(v[34] == 15) catch @panic("test failure");
5128 expect(v[35] == 16) catch @panic("test failure");
5129 expect(v[36] == 17) catch @panic("test failure");
5130 expect(v[37] == 18) catch @panic("test failure");
5131 expect(v[38] == 19) catch @panic("test failure");
5132 expect(v[39] == 20) catch @panic("test failure");
5133 expect(v[40] == 21) catch @panic("test failure");
5134 expect(v[41] == 22) catch @panic("test failure");
5135 expect(v[42] == 23) catch @panic("test failure");
5136 expect(v[43] == 24) catch @panic("test failure");
5137 expect(v[44] == 25) catch @panic("test failure");
5138 expect(v[45] == 26) catch @panic("test failure");
5139 expect(v[46] == 27) catch @panic("test failure");
5140 expect(v[47] == 28) catch @panic("test failure");
5141 expect(i == 48) catch @panic("test failure");
5142}
5143
5144extern fn c_ret_vector_48_u8() @Vector(48, u8);
5145extern fn c_vector_48_u8(@Vector(48, u8), usize) void;
5146extern fn c_test_vector_48_u8() void;
5147
5148test "@Vector(48, u8)" {
5149 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5150 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5151 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5152 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5153 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5154
5155 const v = c_ret_vector_48_u8();
5156 try expect(v[0] == 29);
5157 try expect(v[1] == 30);
5158 try expect(v[2] == 31);
5159 try expect(v[3] == 32);
5160 try expect(v[4] == 33);
5161 try expect(v[5] == 34);
5162 try expect(v[6] == 35);
5163 try expect(v[7] == 36);
5164 try expect(v[8] == 37);
5165 try expect(v[9] == 38);
5166 try expect(v[10] == 39);
5167 try expect(v[11] == 40);
5168 try expect(v[12] == 41);
5169 try expect(v[13] == 42);
5170 try expect(v[14] == 43);
5171 try expect(v[15] == 44);
5172 try expect(v[16] == 45);
5173 try expect(v[17] == 46);
5174 try expect(v[18] == 47);
5175 try expect(v[19] == 48);
5176 try expect(v[20] == 49);
5177 try expect(v[21] == 50);
5178 try expect(v[22] == 51);
5179 try expect(v[23] == 52);
5180 try expect(v[24] == 53);
5181 try expect(v[25] == 54);
5182 try expect(v[26] == 55);
5183 try expect(v[27] == 56);
5184 try expect(v[28] == 57);
5185 try expect(v[29] == 58);
5186 try expect(v[30] == 59);
5187 try expect(v[31] == 60);
5188 try expect(v[32] == 61);
5189 try expect(v[33] == 62);
5190 try expect(v[34] == 63);
5191 try expect(v[35] == 64);
5192 try expect(v[36] == 65);
5193 try expect(v[37] == 66);
5194 try expect(v[38] == 67);
5195 try expect(v[39] == 68);
5196 try expect(v[40] == 69);
5197 try expect(v[41] == 70);
5198 try expect(v[42] == 71);
5199 try expect(v[43] == 72);
5200 try expect(v[44] == 73);
5201 try expect(v[45] == 74);
5202 try expect(v[46] == 75);
5203 try expect(v[47] == 76);
5204 c_vector_48_u8(.{
5205 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92,
5206 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8,
5207 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
5208 }, 48);
5209 c_test_vector_48_u8();
5210}
5211
5212export fn zig_ret_vector_64_u8() @Vector(64, u8) {
5213 return .{
5214 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,
5215 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56,
5216 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72,
5217 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88,
5218 };
5219}
5220export fn zig_vector_64_u8(v: @Vector(64, u8), i: usize) void {
5221 expect(v[0] == 89) catch @panic("test failure");
5222 expect(v[1] == 90) catch @panic("test failure");
5223 expect(v[2] == 91) catch @panic("test failure");
5224 expect(v[3] == 92) catch @panic("test failure");
5225 expect(v[4] == 93) catch @panic("test failure");
5226 expect(v[5] == 94) catch @panic("test failure");
5227 expect(v[6] == 95) catch @panic("test failure");
5228 expect(v[7] == 96) catch @panic("test failure");
5229 expect(v[8] == 97) catch @panic("test failure");
5230 expect(v[9] == 98) catch @panic("test failure");
5231 expect(v[10] == 99) catch @panic("test failure");
5232 expect(v[11] == 0) catch @panic("test failure");
5233 expect(v[12] == 1) catch @panic("test failure");
5234 expect(v[13] == 2) catch @panic("test failure");
5235 expect(v[14] == 3) catch @panic("test failure");
5236 expect(v[15] == 4) catch @panic("test failure");
5237 expect(v[16] == 5) catch @panic("test failure");
5238 expect(v[17] == 6) catch @panic("test failure");
5239 expect(v[18] == 7) catch @panic("test failure");
5240 expect(v[19] == 8) catch @panic("test failure");
5241 expect(v[20] == 9) catch @panic("test failure");
5242 expect(v[21] == 10) catch @panic("test failure");
5243 expect(v[22] == 11) catch @panic("test failure");
5244 expect(v[23] == 12) catch @panic("test failure");
5245 expect(v[24] == 13) catch @panic("test failure");
5246 expect(v[25] == 14) catch @panic("test failure");
5247 expect(v[26] == 15) catch @panic("test failure");
5248 expect(v[27] == 16) catch @panic("test failure");
5249 expect(v[28] == 17) catch @panic("test failure");
5250 expect(v[29] == 18) catch @panic("test failure");
5251 expect(v[30] == 19) catch @panic("test failure");
5252 expect(v[31] == 20) catch @panic("test failure");
5253 expect(v[32] == 21) catch @panic("test failure");
5254 expect(v[33] == 22) catch @panic("test failure");
5255 expect(v[34] == 23) catch @panic("test failure");
5256 expect(v[35] == 24) catch @panic("test failure");
5257 expect(v[36] == 25) catch @panic("test failure");
5258 expect(v[37] == 26) catch @panic("test failure");
5259 expect(v[38] == 27) catch @panic("test failure");
5260 expect(v[39] == 28) catch @panic("test failure");
5261 expect(v[40] == 29) catch @panic("test failure");
5262 expect(v[41] == 30) catch @panic("test failure");
5263 expect(v[42] == 31) catch @panic("test failure");
5264 expect(v[43] == 32) catch @panic("test failure");
5265 expect(v[44] == 33) catch @panic("test failure");
5266 expect(v[45] == 34) catch @panic("test failure");
5267 expect(v[46] == 35) catch @panic("test failure");
5268 expect(v[47] == 36) catch @panic("test failure");
5269 expect(v[48] == 37) catch @panic("test failure");
5270 expect(v[49] == 38) catch @panic("test failure");
5271 expect(v[50] == 39) catch @panic("test failure");
5272 expect(v[51] == 40) catch @panic("test failure");
5273 expect(v[52] == 41) catch @panic("test failure");
5274 expect(v[53] == 42) catch @panic("test failure");
5275 expect(v[54] == 43) catch @panic("test failure");
5276 expect(v[55] == 44) catch @panic("test failure");
5277 expect(v[56] == 45) catch @panic("test failure");
5278 expect(v[57] == 46) catch @panic("test failure");
5279 expect(v[58] == 47) catch @panic("test failure");
5280 expect(v[59] == 48) catch @panic("test failure");
5281 expect(v[60] == 49) catch @panic("test failure");
5282 expect(v[61] == 50) catch @panic("test failure");
5283 expect(v[62] == 51) catch @panic("test failure");
5284 expect(v[63] == 52) catch @panic("test failure");
5285 expect(i == 64) catch @panic("test failure");
5286}
5287
5288extern fn c_ret_vector_64_u8() @Vector(64, u8);
5289extern fn c_vector_64_u8(@Vector(64, u8), usize) void;
5290extern fn c_test_vector_64_u8() void;
5291
5292test "@Vector(64, u8)" {
5293 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5294 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5295 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5296 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5297
5298 const v = c_ret_vector_64_u8();
5299 try expect(v[0] == 53);
5300 try expect(v[1] == 54);
5301 try expect(v[2] == 55);
5302 try expect(v[3] == 56);
5303 try expect(v[4] == 57);
5304 try expect(v[5] == 58);
5305 try expect(v[6] == 59);
5306 try expect(v[7] == 60);
5307 try expect(v[8] == 61);
5308 try expect(v[9] == 62);
5309 try expect(v[10] == 63);
5310 try expect(v[11] == 64);
5311 try expect(v[12] == 65);
5312 try expect(v[13] == 66);
5313 try expect(v[14] == 67);
5314 try expect(v[15] == 68);
5315 try expect(v[16] == 69);
5316 try expect(v[17] == 70);
5317 try expect(v[18] == 71);
5318 try expect(v[19] == 72);
5319 try expect(v[20] == 73);
5320 try expect(v[21] == 74);
5321 try expect(v[22] == 75);
5322 try expect(v[23] == 76);
5323 try expect(v[24] == 77);
5324 try expect(v[25] == 78);
5325 try expect(v[26] == 79);
5326 try expect(v[27] == 80);
5327 try expect(v[28] == 81);
5328 try expect(v[29] == 82);
5329 try expect(v[30] == 83);
5330 try expect(v[31] == 84);
5331 try expect(v[32] == 85);
5332 try expect(v[33] == 86);
5333 try expect(v[34] == 87);
5334 try expect(v[35] == 88);
5335 try expect(v[36] == 89);
5336 try expect(v[37] == 90);
5337 try expect(v[38] == 91);
5338 try expect(v[39] == 92);
5339 try expect(v[40] == 93);
5340 try expect(v[41] == 94);
5341 try expect(v[42] == 95);
5342 try expect(v[43] == 96);
5343 try expect(v[44] == 97);
5344 try expect(v[45] == 98);
5345 try expect(v[46] == 99);
5346 try expect(v[47] == 0);
5347 try expect(v[48] == 1);
5348 try expect(v[49] == 2);
5349 try expect(v[50] == 3);
5350 try expect(v[51] == 4);
5351 try expect(v[52] == 5);
5352 try expect(v[53] == 6);
5353 try expect(v[54] == 7);
5354 try expect(v[55] == 8);
5355 try expect(v[56] == 9);
5356 try expect(v[57] == 10);
5357 try expect(v[58] == 11);
5358 try expect(v[59] == 12);
5359 try expect(v[60] == 13);
5360 try expect(v[61] == 14);
5361 try expect(v[62] == 15);
5362 try expect(v[63] == 16);
5363 c_vector_64_u8(.{
5364 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
5365 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
5366 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
5367 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80,
5368 }, 64);
5369 c_test_vector_64_u8();
5370}
5371
5372export fn zig_ret_vector_96_u8() @Vector(96, u8) {
5373 return .{
5374 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
5375 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
5376 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
5377 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
5378 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
5379 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
5380 };
5381}
5382export fn zig_vector_96_u8(v: @Vector(96, u8), i: usize) void {
5383 expect(v[0] == 86) catch @panic("test failure");
5384 expect(v[1] == 87) catch @panic("test failure");
5385 expect(v[2] == 88) catch @panic("test failure");
5386 expect(v[3] == 89) catch @panic("test failure");
5387 expect(v[4] == 90) catch @panic("test failure");
5388 expect(v[5] == 91) catch @panic("test failure");
5389 expect(v[6] == 92) catch @panic("test failure");
5390 expect(v[7] == 93) catch @panic("test failure");
5391 expect(v[8] == 94) catch @panic("test failure");
5392 expect(v[9] == 95) catch @panic("test failure");
5393 expect(v[10] == 96) catch @panic("test failure");
5394 expect(v[11] == 97) catch @panic("test failure");
5395 expect(v[12] == 98) catch @panic("test failure");
5396 expect(v[13] == 99) catch @panic("test failure");
5397 expect(v[14] == 0) catch @panic("test failure");
5398 expect(v[15] == 1) catch @panic("test failure");
5399 expect(v[16] == 2) catch @panic("test failure");
5400 expect(v[17] == 3) catch @panic("test failure");
5401 expect(v[18] == 4) catch @panic("test failure");
5402 expect(v[19] == 5) catch @panic("test failure");
5403 expect(v[20] == 6) catch @panic("test failure");
5404 expect(v[21] == 7) catch @panic("test failure");
5405 expect(v[22] == 8) catch @panic("test failure");
5406 expect(v[23] == 9) catch @panic("test failure");
5407 expect(v[24] == 10) catch @panic("test failure");
5408 expect(v[25] == 11) catch @panic("test failure");
5409 expect(v[26] == 12) catch @panic("test failure");
5410 expect(v[27] == 13) catch @panic("test failure");
5411 expect(v[28] == 14) catch @panic("test failure");
5412 expect(v[29] == 15) catch @panic("test failure");
5413 expect(v[30] == 16) catch @panic("test failure");
5414 expect(v[31] == 17) catch @panic("test failure");
5415 expect(v[32] == 18) catch @panic("test failure");
5416 expect(v[33] == 19) catch @panic("test failure");
5417 expect(v[34] == 20) catch @panic("test failure");
5418 expect(v[35] == 21) catch @panic("test failure");
5419 expect(v[36] == 22) catch @panic("test failure");
5420 expect(v[37] == 23) catch @panic("test failure");
5421 expect(v[38] == 24) catch @panic("test failure");
5422 expect(v[39] == 25) catch @panic("test failure");
5423 expect(v[40] == 26) catch @panic("test failure");
5424 expect(v[41] == 27) catch @panic("test failure");
5425 expect(v[42] == 28) catch @panic("test failure");
5426 expect(v[43] == 29) catch @panic("test failure");
5427 expect(v[44] == 30) catch @panic("test failure");
5428 expect(v[45] == 31) catch @panic("test failure");
5429 expect(v[46] == 32) catch @panic("test failure");
5430 expect(v[47] == 33) catch @panic("test failure");
5431 expect(v[48] == 34) catch @panic("test failure");
5432 expect(v[49] == 35) catch @panic("test failure");
5433 expect(v[50] == 36) catch @panic("test failure");
5434 expect(v[51] == 37) catch @panic("test failure");
5435 expect(v[52] == 38) catch @panic("test failure");
5436 expect(v[53] == 39) catch @panic("test failure");
5437 expect(v[54] == 40) catch @panic("test failure");
5438 expect(v[55] == 41) catch @panic("test failure");
5439 expect(v[56] == 42) catch @panic("test failure");
5440 expect(v[57] == 43) catch @panic("test failure");
5441 expect(v[58] == 44) catch @panic("test failure");
5442 expect(v[59] == 45) catch @panic("test failure");
5443 expect(v[60] == 46) catch @panic("test failure");
5444 expect(v[61] == 47) catch @panic("test failure");
5445 expect(v[62] == 48) catch @panic("test failure");
5446 expect(v[63] == 49) catch @panic("test failure");
5447 expect(v[64] == 50) catch @panic("test failure");
5448 expect(v[65] == 51) catch @panic("test failure");
5449 expect(v[66] == 52) catch @panic("test failure");
5450 expect(v[67] == 53) catch @panic("test failure");
5451 expect(v[68] == 54) catch @panic("test failure");
5452 expect(v[69] == 55) catch @panic("test failure");
5453 expect(v[70] == 56) catch @panic("test failure");
5454 expect(v[71] == 57) catch @panic("test failure");
5455 expect(v[72] == 58) catch @panic("test failure");
5456 expect(v[73] == 59) catch @panic("test failure");
5457 expect(v[74] == 60) catch @panic("test failure");
5458 expect(v[75] == 61) catch @panic("test failure");
5459 expect(v[76] == 62) catch @panic("test failure");
5460 expect(v[77] == 63) catch @panic("test failure");
5461 expect(v[78] == 64) catch @panic("test failure");
5462 expect(v[79] == 65) catch @panic("test failure");
5463 expect(v[80] == 66) catch @panic("test failure");
5464 expect(v[81] == 67) catch @panic("test failure");
5465 expect(v[82] == 68) catch @panic("test failure");
5466 expect(v[83] == 69) catch @panic("test failure");
5467 expect(v[84] == 70) catch @panic("test failure");
5468 expect(v[85] == 71) catch @panic("test failure");
5469 expect(v[86] == 72) catch @panic("test failure");
5470 expect(v[87] == 73) catch @panic("test failure");
5471 expect(v[88] == 74) catch @panic("test failure");
5472 expect(v[89] == 75) catch @panic("test failure");
5473 expect(v[90] == 76) catch @panic("test failure");
5474 expect(v[91] == 77) catch @panic("test failure");
5475 expect(v[92] == 78) catch @panic("test failure");
5476 expect(v[93] == 79) catch @panic("test failure");
5477 expect(v[94] == 80) catch @panic("test failure");
5478 expect(v[95] == 81) catch @panic("test failure");
5479 expect(i == 96) catch @panic("test failure");
5480}
5481
5482extern fn c_ret_vector_96_u8() @Vector(96, u8);
5483extern fn c_vector_96_u8(@Vector(96, u8), usize) void;
5484extern fn c_test_vector_96_u8() void;
5485
5486test "@Vector(96, u8)" {
5487 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5488 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5489 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5490 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5491 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5492
5493 const v = c_ret_vector_96_u8();
5494 try expect(v[0] == 82);
5495 try expect(v[1] == 83);
5496 try expect(v[2] == 84);
5497 try expect(v[3] == 85);
5498 try expect(v[4] == 86);
5499 try expect(v[5] == 87);
5500 try expect(v[6] == 88);
5501 try expect(v[7] == 89);
5502 try expect(v[8] == 90);
5503 try expect(v[9] == 91);
5504 try expect(v[10] == 92);
5505 try expect(v[11] == 93);
5506 try expect(v[12] == 94);
5507 try expect(v[13] == 95);
5508 try expect(v[14] == 96);
5509 try expect(v[15] == 97);
5510 try expect(v[16] == 98);
5511 try expect(v[17] == 99);
5512 try expect(v[18] == 0);
5513 try expect(v[19] == 1);
5514 try expect(v[20] == 2);
5515 try expect(v[21] == 3);
5516 try expect(v[22] == 4);
5517 try expect(v[23] == 5);
5518 try expect(v[24] == 6);
5519 try expect(v[25] == 7);
5520 try expect(v[26] == 8);
5521 try expect(v[27] == 9);
5522 try expect(v[28] == 10);
5523 try expect(v[29] == 11);
5524 try expect(v[30] == 12);
5525 try expect(v[31] == 13);
5526 try expect(v[32] == 14);
5527 try expect(v[33] == 15);
5528 try expect(v[34] == 16);
5529 try expect(v[35] == 17);
5530 try expect(v[36] == 18);
5531 try expect(v[37] == 19);
5532 try expect(v[38] == 20);
5533 try expect(v[39] == 21);
5534 try expect(v[40] == 22);
5535 try expect(v[41] == 23);
5536 try expect(v[42] == 24);
5537 try expect(v[43] == 25);
5538 try expect(v[44] == 26);
5539 try expect(v[45] == 27);
5540 try expect(v[46] == 28);
5541 try expect(v[47] == 29);
5542 try expect(v[48] == 30);
5543 try expect(v[49] == 31);
5544 try expect(v[50] == 32);
5545 try expect(v[51] == 33);
5546 try expect(v[52] == 34);
5547 try expect(v[53] == 35);
5548 try expect(v[54] == 36);
5549 try expect(v[55] == 37);
5550 try expect(v[56] == 38);
5551 try expect(v[57] == 39);
5552 try expect(v[58] == 40);
5553 try expect(v[59] == 41);
5554 try expect(v[60] == 42);
5555 try expect(v[61] == 43);
5556 try expect(v[62] == 44);
5557 try expect(v[63] == 45);
5558 try expect(v[64] == 46);
5559 try expect(v[65] == 47);
5560 try expect(v[66] == 48);
5561 try expect(v[67] == 49);
5562 try expect(v[68] == 50);
5563 try expect(v[69] == 51);
5564 try expect(v[70] == 52);
5565 try expect(v[71] == 53);
5566 try expect(v[72] == 54);
5567 try expect(v[73] == 55);
5568 try expect(v[74] == 56);
5569 try expect(v[75] == 57);
5570 try expect(v[76] == 58);
5571 try expect(v[77] == 59);
5572 try expect(v[78] == 60);
5573 try expect(v[79] == 61);
5574 try expect(v[80] == 62);
5575 try expect(v[81] == 63);
5576 try expect(v[82] == 64);
5577 try expect(v[83] == 65);
5578 try expect(v[84] == 66);
5579 try expect(v[85] == 67);
5580 try expect(v[86] == 68);
5581 try expect(v[87] == 69);
5582 try expect(v[88] == 70);
5583 try expect(v[89] == 71);
5584 try expect(v[90] == 72);
5585 try expect(v[91] == 73);
5586 try expect(v[92] == 74);
5587 try expect(v[93] == 75);
5588 try expect(v[94] == 76);
5589 try expect(v[95] == 77);
5590 c_vector_96_u8(.{
5591 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
5592 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
5593 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
5594 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
5595 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
5596 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
5597 }, 96);
5598 c_test_vector_96_u8();
5599}
5600
5601export fn zig_ret_vector_128_u8() @Vector(128, u8) {
5602 return .{
5603 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5604 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
5605 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
5606 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
5607 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
5608 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
5609 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
5610 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
5611 };
5612}
5613export fn zig_vector_128_u8(v: @Vector(128, u8), i: usize) void {
5614 expect(v[0] == 2) catch @panic("test failure");
5615 expect(v[1] == 3) catch @panic("test failure");
5616 expect(v[2] == 4) catch @panic("test failure");
5617 expect(v[3] == 5) catch @panic("test failure");
5618 expect(v[4] == 6) catch @panic("test failure");
5619 expect(v[5] == 7) catch @panic("test failure");
5620 expect(v[6] == 8) catch @panic("test failure");
5621 expect(v[7] == 9) catch @panic("test failure");
5622 expect(v[8] == 10) catch @panic("test failure");
5623 expect(v[9] == 11) catch @panic("test failure");
5624 expect(v[10] == 12) catch @panic("test failure");
5625 expect(v[11] == 13) catch @panic("test failure");
5626 expect(v[12] == 14) catch @panic("test failure");
5627 expect(v[13] == 15) catch @panic("test failure");
5628 expect(v[14] == 16) catch @panic("test failure");
5629 expect(v[15] == 17) catch @panic("test failure");
5630 expect(v[16] == 18) catch @panic("test failure");
5631 expect(v[17] == 19) catch @panic("test failure");
5632 expect(v[18] == 20) catch @panic("test failure");
5633 expect(v[19] == 21) catch @panic("test failure");
5634 expect(v[20] == 22) catch @panic("test failure");
5635 expect(v[21] == 23) catch @panic("test failure");
5636 expect(v[22] == 24) catch @panic("test failure");
5637 expect(v[23] == 25) catch @panic("test failure");
5638 expect(v[24] == 26) catch @panic("test failure");
5639 expect(v[25] == 27) catch @panic("test failure");
5640 expect(v[26] == 28) catch @panic("test failure");
5641 expect(v[27] == 29) catch @panic("test failure");
5642 expect(v[28] == 30) catch @panic("test failure");
5643 expect(v[29] == 31) catch @panic("test failure");
5644 expect(v[30] == 32) catch @panic("test failure");
5645 expect(v[31] == 33) catch @panic("test failure");
5646 expect(v[32] == 34) catch @panic("test failure");
5647 expect(v[33] == 35) catch @panic("test failure");
5648 expect(v[34] == 36) catch @panic("test failure");
5649 expect(v[35] == 37) catch @panic("test failure");
5650 expect(v[36] == 38) catch @panic("test failure");
5651 expect(v[37] == 39) catch @panic("test failure");
5652 expect(v[38] == 40) catch @panic("test failure");
5653 expect(v[39] == 41) catch @panic("test failure");
5654 expect(v[40] == 42) catch @panic("test failure");
5655 expect(v[41] == 43) catch @panic("test failure");
5656 expect(v[42] == 44) catch @panic("test failure");
5657 expect(v[43] == 45) catch @panic("test failure");
5658 expect(v[44] == 46) catch @panic("test failure");
5659 expect(v[45] == 47) catch @panic("test failure");
5660 expect(v[46] == 48) catch @panic("test failure");
5661 expect(v[47] == 49) catch @panic("test failure");
5662 expect(v[48] == 50) catch @panic("test failure");
5663 expect(v[49] == 51) catch @panic("test failure");
5664 expect(v[50] == 52) catch @panic("test failure");
5665 expect(v[51] == 53) catch @panic("test failure");
5666 expect(v[52] == 54) catch @panic("test failure");
5667 expect(v[53] == 55) catch @panic("test failure");
5668 expect(v[54] == 56) catch @panic("test failure");
5669 expect(v[55] == 57) catch @panic("test failure");
5670 expect(v[56] == 58) catch @panic("test failure");
5671 expect(v[57] == 59) catch @panic("test failure");
5672 expect(v[58] == 60) catch @panic("test failure");
5673 expect(v[59] == 61) catch @panic("test failure");
5674 expect(v[60] == 62) catch @panic("test failure");
5675 expect(v[61] == 63) catch @panic("test failure");
5676 expect(v[62] == 64) catch @panic("test failure");
5677 expect(v[63] == 65) catch @panic("test failure");
5678 expect(v[64] == 66) catch @panic("test failure");
5679 expect(v[65] == 67) catch @panic("test failure");
5680 expect(v[66] == 68) catch @panic("test failure");
5681 expect(v[67] == 69) catch @panic("test failure");
5682 expect(v[68] == 70) catch @panic("test failure");
5683 expect(v[69] == 71) catch @panic("test failure");
5684 expect(v[70] == 72) catch @panic("test failure");
5685 expect(v[71] == 73) catch @panic("test failure");
5686 expect(v[72] == 74) catch @panic("test failure");
5687 expect(v[73] == 75) catch @panic("test failure");
5688 expect(v[74] == 76) catch @panic("test failure");
5689 expect(v[75] == 77) catch @panic("test failure");
5690 expect(v[76] == 78) catch @panic("test failure");
5691 expect(v[77] == 79) catch @panic("test failure");
5692 expect(v[78] == 80) catch @panic("test failure");
5693 expect(v[79] == 81) catch @panic("test failure");
5694 expect(v[80] == 82) catch @panic("test failure");
5695 expect(v[81] == 83) catch @panic("test failure");
5696 expect(v[82] == 84) catch @panic("test failure");
5697 expect(v[83] == 85) catch @panic("test failure");
5698 expect(v[84] == 86) catch @panic("test failure");
5699 expect(v[85] == 87) catch @panic("test failure");
5700 expect(v[86] == 88) catch @panic("test failure");
5701 expect(v[87] == 89) catch @panic("test failure");
5702 expect(v[88] == 90) catch @panic("test failure");
5703 expect(v[89] == 91) catch @panic("test failure");
5704 expect(v[90] == 92) catch @panic("test failure");
5705 expect(v[91] == 93) catch @panic("test failure");
5706 expect(v[92] == 94) catch @panic("test failure");
5707 expect(v[93] == 95) catch @panic("test failure");
5708 expect(v[94] == 96) catch @panic("test failure");
5709 expect(v[95] == 97) catch @panic("test failure");
5710 expect(v[96] == 98) catch @panic("test failure");
5711 expect(v[97] == 99) catch @panic("test failure");
5712 expect(v[98] == 0) catch @panic("test failure");
5713 expect(v[99] == 1) catch @panic("test failure");
5714 expect(v[100] == 2) catch @panic("test failure");
5715 expect(v[101] == 3) catch @panic("test failure");
5716 expect(v[102] == 4) catch @panic("test failure");
5717 expect(v[103] == 5) catch @panic("test failure");
5718 expect(v[104] == 6) catch @panic("test failure");
5719 expect(v[105] == 7) catch @panic("test failure");
5720 expect(v[106] == 8) catch @panic("test failure");
5721 expect(v[107] == 9) catch @panic("test failure");
5722 expect(v[108] == 10) catch @panic("test failure");
5723 expect(v[109] == 11) catch @panic("test failure");
5724 expect(v[110] == 12) catch @panic("test failure");
5725 expect(v[111] == 13) catch @panic("test failure");
5726 expect(v[112] == 14) catch @panic("test failure");
5727 expect(v[113] == 15) catch @panic("test failure");
5728 expect(v[114] == 16) catch @panic("test failure");
5729 expect(v[115] == 17) catch @panic("test failure");
5730 expect(v[116] == 18) catch @panic("test failure");
5731 expect(v[117] == 19) catch @panic("test failure");
5732 expect(v[118] == 20) catch @panic("test failure");
5733 expect(v[119] == 21) catch @panic("test failure");
5734 expect(v[120] == 22) catch @panic("test failure");
5735 expect(v[121] == 23) catch @panic("test failure");
5736 expect(v[122] == 24) catch @panic("test failure");
5737 expect(v[123] == 25) catch @panic("test failure");
5738 expect(v[124] == 26) catch @panic("test failure");
5739 expect(v[125] == 27) catch @panic("test failure");
5740 expect(v[126] == 28) catch @panic("test failure");
5741 expect(v[127] == 29) catch @panic("test failure");
5742 expect(i == 128) catch @panic("test failure");
5743}
5744
5745extern fn c_ret_vector_128_u8() @Vector(128, u8);
5746extern fn c_vector_128_u8(@Vector(128, u8), usize) void;
5747extern fn c_test_vector_128_u8() void;
5748
5749test "@Vector(128, u8)" {
5750 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5751 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5752 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
5753 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5754 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5755
5756 const v = c_ret_vector_128_u8();
5757 try expect(v[0] == 30);
5758 try expect(v[1] == 31);
5759 try expect(v[2] == 32);
5760 try expect(v[3] == 33);
5761 try expect(v[4] == 34);
5762 try expect(v[5] == 35);
5763 try expect(v[6] == 36);
5764 try expect(v[7] == 37);
5765 try expect(v[8] == 38);
5766 try expect(v[9] == 39);
5767 try expect(v[10] == 40);
5768 try expect(v[11] == 41);
5769 try expect(v[12] == 42);
5770 try expect(v[13] == 43);
5771 try expect(v[14] == 44);
5772 try expect(v[15] == 45);
5773 try expect(v[16] == 46);
5774 try expect(v[17] == 47);
5775 try expect(v[18] == 48);
5776 try expect(v[19] == 49);
5777 try expect(v[20] == 50);
5778 try expect(v[21] == 51);
5779 try expect(v[22] == 52);
5780 try expect(v[23] == 53);
5781 try expect(v[24] == 54);
5782 try expect(v[25] == 55);
5783 try expect(v[26] == 56);
5784 try expect(v[27] == 57);
5785 try expect(v[28] == 58);
5786 try expect(v[29] == 59);
5787 try expect(v[30] == 60);
5788 try expect(v[31] == 61);
5789 try expect(v[32] == 62);
5790 try expect(v[33] == 63);
5791 try expect(v[34] == 64);
5792 try expect(v[35] == 65);
5793 try expect(v[36] == 66);
5794 try expect(v[37] == 67);
5795 try expect(v[38] == 68);
5796 try expect(v[39] == 69);
5797 try expect(v[40] == 70);
5798 try expect(v[41] == 71);
5799 try expect(v[42] == 72);
5800 try expect(v[43] == 73);
5801 try expect(v[44] == 74);
5802 try expect(v[45] == 75);
5803 try expect(v[46] == 76);
5804 try expect(v[47] == 77);
5805 try expect(v[48] == 78);
5806 try expect(v[49] == 79);
5807 try expect(v[50] == 80);
5808 try expect(v[51] == 81);
5809 try expect(v[52] == 82);
5810 try expect(v[53] == 83);
5811 try expect(v[54] == 84);
5812 try expect(v[55] == 85);
5813 try expect(v[56] == 86);
5814 try expect(v[57] == 87);
5815 try expect(v[58] == 88);
5816 try expect(v[59] == 89);
5817 try expect(v[60] == 90);
5818 try expect(v[61] == 91);
5819 try expect(v[62] == 92);
5820 try expect(v[63] == 93);
5821 try expect(v[64] == 94);
5822 try expect(v[65] == 95);
5823 try expect(v[66] == 96);
5824 try expect(v[67] == 97);
5825 try expect(v[68] == 98);
5826 try expect(v[69] == 99);
5827 try expect(v[70] == 0);
5828 try expect(v[71] == 1);
5829 try expect(v[72] == 2);
5830 try expect(v[73] == 3);
5831 try expect(v[74] == 4);
5832 try expect(v[75] == 5);
5833 try expect(v[76] == 6);
5834 try expect(v[77] == 7);
5835 try expect(v[78] == 8);
5836 try expect(v[79] == 9);
5837 try expect(v[80] == 10);
5838 try expect(v[81] == 11);
5839 try expect(v[82] == 12);
5840 try expect(v[83] == 13);
5841 try expect(v[84] == 14);
5842 try expect(v[85] == 15);
5843 try expect(v[86] == 16);
5844 try expect(v[87] == 17);
5845 try expect(v[88] == 18);
5846 try expect(v[89] == 19);
5847 try expect(v[90] == 20);
5848 try expect(v[91] == 21);
5849 try expect(v[92] == 22);
5850 try expect(v[93] == 23);
5851 try expect(v[94] == 24);
5852 try expect(v[95] == 25);
5853 try expect(v[96] == 26);
5854 try expect(v[97] == 27);
5855 try expect(v[98] == 28);
5856 try expect(v[99] == 29);
5857 try expect(v[100] == 30);
5858 try expect(v[101] == 31);
5859 try expect(v[102] == 32);
5860 try expect(v[103] == 33);
5861 try expect(v[104] == 34);
5862 try expect(v[105] == 35);
5863 try expect(v[106] == 36);
5864 try expect(v[107] == 37);
5865 try expect(v[108] == 38);
5866 try expect(v[109] == 39);
5867 try expect(v[110] == 40);
5868 try expect(v[111] == 41);
5869 try expect(v[112] == 42);
5870 try expect(v[113] == 43);
5871 try expect(v[114] == 44);
5872 try expect(v[115] == 45);
5873 try expect(v[116] == 46);
5874 try expect(v[117] == 47);
5875 try expect(v[118] == 48);
5876 try expect(v[119] == 49);
5877 try expect(v[120] == 50);
5878 try expect(v[121] == 51);
5879 try expect(v[122] == 52);
5880 try expect(v[123] == 53);
5881 try expect(v[124] == 54);
5882 try expect(v[125] == 55);
5883 try expect(v[126] == 56);
5884 try expect(v[127] == 57);
5885 c_vector_128_u8(.{
5886 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
5887 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
5888 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
5889 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
5890 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
5891 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
5892 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
5893 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
5894 }, 128);
5895 c_test_vector_128_u8();
5896}
5897
5898export fn zig_ret_vector_192_u8() @Vector(192, u8) {
5899 return .{
5900 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
5901 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
5902 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
5903 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
5904 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
5905 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
5906 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
5907 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
5908 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
5909 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
5910 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
5911 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
5912 };
5913}
5914export fn zig_vector_192_u8(v: @Vector(192, u8), i: usize) void {
5915 expect(v[0] == 78) catch @panic("test failure");
5916 expect(v[1] == 79) catch @panic("test failure");
5917 expect(v[2] == 80) catch @panic("test failure");
5918 expect(v[3] == 81) catch @panic("test failure");
5919 expect(v[4] == 82) catch @panic("test failure");
5920 expect(v[5] == 83) catch @panic("test failure");
5921 expect(v[6] == 84) catch @panic("test failure");
5922 expect(v[7] == 85) catch @panic("test failure");
5923 expect(v[8] == 86) catch @panic("test failure");
5924 expect(v[9] == 87) catch @panic("test failure");
5925 expect(v[10] == 88) catch @panic("test failure");
5926 expect(v[11] == 89) catch @panic("test failure");
5927 expect(v[12] == 90) catch @panic("test failure");
5928 expect(v[13] == 91) catch @panic("test failure");
5929 expect(v[14] == 92) catch @panic("test failure");
5930 expect(v[15] == 93) catch @panic("test failure");
5931 expect(v[16] == 94) catch @panic("test failure");
5932 expect(v[17] == 95) catch @panic("test failure");
5933 expect(v[18] == 96) catch @panic("test failure");
5934 expect(v[19] == 97) catch @panic("test failure");
5935 expect(v[20] == 98) catch @panic("test failure");
5936 expect(v[21] == 99) catch @panic("test failure");
5937 expect(v[22] == 0) catch @panic("test failure");
5938 expect(v[23] == 1) catch @panic("test failure");
5939 expect(v[24] == 2) catch @panic("test failure");
5940 expect(v[25] == 3) catch @panic("test failure");
5941 expect(v[26] == 4) catch @panic("test failure");
5942 expect(v[27] == 5) catch @panic("test failure");
5943 expect(v[28] == 6) catch @panic("test failure");
5944 expect(v[29] == 7) catch @panic("test failure");
5945 expect(v[30] == 8) catch @panic("test failure");
5946 expect(v[31] == 9) catch @panic("test failure");
5947 expect(v[32] == 10) catch @panic("test failure");
5948 expect(v[33] == 11) catch @panic("test failure");
5949 expect(v[34] == 12) catch @panic("test failure");
5950 expect(v[35] == 13) catch @panic("test failure");
5951 expect(v[36] == 14) catch @panic("test failure");
5952 expect(v[37] == 15) catch @panic("test failure");
5953 expect(v[38] == 16) catch @panic("test failure");
5954 expect(v[39] == 17) catch @panic("test failure");
5955 expect(v[40] == 18) catch @panic("test failure");
5956 expect(v[41] == 19) catch @panic("test failure");
5957 expect(v[42] == 20) catch @panic("test failure");
5958 expect(v[43] == 21) catch @panic("test failure");
5959 expect(v[44] == 22) catch @panic("test failure");
5960 expect(v[45] == 23) catch @panic("test failure");
5961 expect(v[46] == 24) catch @panic("test failure");
5962 expect(v[47] == 25) catch @panic("test failure");
5963 expect(v[48] == 26) catch @panic("test failure");
5964 expect(v[49] == 27) catch @panic("test failure");
5965 expect(v[50] == 28) catch @panic("test failure");
5966 expect(v[51] == 29) catch @panic("test failure");
5967 expect(v[52] == 30) catch @panic("test failure");
5968 expect(v[53] == 31) catch @panic("test failure");
5969 expect(v[54] == 32) catch @panic("test failure");
5970 expect(v[55] == 33) catch @panic("test failure");
5971 expect(v[56] == 34) catch @panic("test failure");
5972 expect(v[57] == 35) catch @panic("test failure");
5973 expect(v[58] == 36) catch @panic("test failure");
5974 expect(v[59] == 37) catch @panic("test failure");
5975 expect(v[60] == 38) catch @panic("test failure");
5976 expect(v[61] == 39) catch @panic("test failure");
5977 expect(v[62] == 40) catch @panic("test failure");
5978 expect(v[63] == 41) catch @panic("test failure");
5979 expect(v[64] == 42) catch @panic("test failure");
5980 expect(v[65] == 43) catch @panic("test failure");
5981 expect(v[66] == 44) catch @panic("test failure");
5982 expect(v[67] == 45) catch @panic("test failure");
5983 expect(v[68] == 46) catch @panic("test failure");
5984 expect(v[69] == 47) catch @panic("test failure");
5985 expect(v[70] == 48) catch @panic("test failure");
5986 expect(v[71] == 49) catch @panic("test failure");
5987 expect(v[72] == 50) catch @panic("test failure");
5988 expect(v[73] == 51) catch @panic("test failure");
5989 expect(v[74] == 52) catch @panic("test failure");
5990 expect(v[75] == 53) catch @panic("test failure");
5991 expect(v[76] == 54) catch @panic("test failure");
5992 expect(v[77] == 55) catch @panic("test failure");
5993 expect(v[78] == 56) catch @panic("test failure");
5994 expect(v[79] == 57) catch @panic("test failure");
5995 expect(v[80] == 58) catch @panic("test failure");
5996 expect(v[81] == 59) catch @panic("test failure");
5997 expect(v[82] == 60) catch @panic("test failure");
5998 expect(v[83] == 61) catch @panic("test failure");
5999 expect(v[84] == 62) catch @panic("test failure");
6000 expect(v[85] == 63) catch @panic("test failure");
6001 expect(v[86] == 64) catch @panic("test failure");
6002 expect(v[87] == 65) catch @panic("test failure");
6003 expect(v[88] == 66) catch @panic("test failure");
6004 expect(v[89] == 67) catch @panic("test failure");
6005 expect(v[90] == 68) catch @panic("test failure");
6006 expect(v[91] == 69) catch @panic("test failure");
6007 expect(v[92] == 70) catch @panic("test failure");
6008 expect(v[93] == 71) catch @panic("test failure");
6009 expect(v[94] == 72) catch @panic("test failure");
6010 expect(v[95] == 73) catch @panic("test failure");
6011 expect(v[96] == 74) catch @panic("test failure");
6012 expect(v[97] == 75) catch @panic("test failure");
6013 expect(v[98] == 76) catch @panic("test failure");
6014 expect(v[99] == 77) catch @panic("test failure");
6015 expect(v[100] == 78) catch @panic("test failure");
6016 expect(v[101] == 79) catch @panic("test failure");
6017 expect(v[102] == 80) catch @panic("test failure");
6018 expect(v[103] == 81) catch @panic("test failure");
6019 expect(v[104] == 82) catch @panic("test failure");
6020 expect(v[105] == 83) catch @panic("test failure");
6021 expect(v[106] == 84) catch @panic("test failure");
6022 expect(v[107] == 85) catch @panic("test failure");
6023 expect(v[108] == 86) catch @panic("test failure");
6024 expect(v[109] == 87) catch @panic("test failure");
6025 expect(v[110] == 88) catch @panic("test failure");
6026 expect(v[111] == 89) catch @panic("test failure");
6027 expect(v[112] == 90) catch @panic("test failure");
6028 expect(v[113] == 91) catch @panic("test failure");
6029 expect(v[114] == 92) catch @panic("test failure");
6030 expect(v[115] == 93) catch @panic("test failure");
6031 expect(v[116] == 94) catch @panic("test failure");
6032 expect(v[117] == 95) catch @panic("test failure");
6033 expect(v[118] == 96) catch @panic("test failure");
6034 expect(v[119] == 97) catch @panic("test failure");
6035 expect(v[120] == 98) catch @panic("test failure");
6036 expect(v[121] == 99) catch @panic("test failure");
6037 expect(v[122] == 0) catch @panic("test failure");
6038 expect(v[123] == 1) catch @panic("test failure");
6039 expect(v[124] == 2) catch @panic("test failure");
6040 expect(v[125] == 3) catch @panic("test failure");
6041 expect(v[126] == 4) catch @panic("test failure");
6042 expect(v[127] == 5) catch @panic("test failure");
6043 expect(v[128] == 6) catch @panic("test failure");
6044 expect(v[129] == 7) catch @panic("test failure");
6045 expect(v[130] == 8) catch @panic("test failure");
6046 expect(v[131] == 9) catch @panic("test failure");
6047 expect(v[132] == 10) catch @panic("test failure");
6048 expect(v[133] == 11) catch @panic("test failure");
6049 expect(v[134] == 12) catch @panic("test failure");
6050 expect(v[135] == 13) catch @panic("test failure");
6051 expect(v[136] == 14) catch @panic("test failure");
6052 expect(v[137] == 15) catch @panic("test failure");
6053 expect(v[138] == 16) catch @panic("test failure");
6054 expect(v[139] == 17) catch @panic("test failure");
6055 expect(v[140] == 18) catch @panic("test failure");
6056 expect(v[141] == 19) catch @panic("test failure");
6057 expect(v[142] == 20) catch @panic("test failure");
6058 expect(v[143] == 21) catch @panic("test failure");
6059 expect(v[144] == 22) catch @panic("test failure");
6060 expect(v[145] == 23) catch @panic("test failure");
6061 expect(v[146] == 24) catch @panic("test failure");
6062 expect(v[147] == 25) catch @panic("test failure");
6063 expect(v[148] == 26) catch @panic("test failure");
6064 expect(v[149] == 27) catch @panic("test failure");
6065 expect(v[150] == 28) catch @panic("test failure");
6066 expect(v[151] == 29) catch @panic("test failure");
6067 expect(v[152] == 30) catch @panic("test failure");
6068 expect(v[153] == 31) catch @panic("test failure");
6069 expect(v[154] == 32) catch @panic("test failure");
6070 expect(v[155] == 33) catch @panic("test failure");
6071 expect(v[156] == 34) catch @panic("test failure");
6072 expect(v[157] == 35) catch @panic("test failure");
6073 expect(v[158] == 36) catch @panic("test failure");
6074 expect(v[159] == 37) catch @panic("test failure");
6075 expect(v[160] == 38) catch @panic("test failure");
6076 expect(v[161] == 39) catch @panic("test failure");
6077 expect(v[162] == 40) catch @panic("test failure");
6078 expect(v[163] == 41) catch @panic("test failure");
6079 expect(v[164] == 42) catch @panic("test failure");
6080 expect(v[165] == 43) catch @panic("test failure");
6081 expect(v[166] == 44) catch @panic("test failure");
6082 expect(v[167] == 45) catch @panic("test failure");
6083 expect(v[168] == 46) catch @panic("test failure");
6084 expect(v[169] == 47) catch @panic("test failure");
6085 expect(v[170] == 48) catch @panic("test failure");
6086 expect(v[171] == 49) catch @panic("test failure");
6087 expect(v[172] == 50) catch @panic("test failure");
6088 expect(v[173] == 51) catch @panic("test failure");
6089 expect(v[174] == 52) catch @panic("test failure");
6090 expect(v[175] == 53) catch @panic("test failure");
6091 expect(v[176] == 54) catch @panic("test failure");
6092 expect(v[177] == 55) catch @panic("test failure");
6093 expect(v[178] == 56) catch @panic("test failure");
6094 expect(v[179] == 57) catch @panic("test failure");
6095 expect(v[180] == 58) catch @panic("test failure");
6096 expect(v[181] == 59) catch @panic("test failure");
6097 expect(v[182] == 60) catch @panic("test failure");
6098 expect(v[183] == 61) catch @panic("test failure");
6099 expect(v[184] == 62) catch @panic("test failure");
6100 expect(v[185] == 63) catch @panic("test failure");
6101 expect(v[186] == 64) catch @panic("test failure");
6102 expect(v[187] == 65) catch @panic("test failure");
6103 expect(v[188] == 66) catch @panic("test failure");
6104 expect(v[189] == 67) catch @panic("test failure");
6105 expect(v[190] == 68) catch @panic("test failure");
6106 expect(v[191] == 69) catch @panic("test failure");
6107 expect(i == 192) catch @panic("test failure");
6108}
6109
6110extern fn c_ret_vector_192_u8() @Vector(192, u8);
6111extern fn c_vector_192_u8(@Vector(192, u8), usize) void;
6112extern fn c_test_vector_192_u8() void;
6113
6114test "@Vector(192, u8)" {
6115 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
6116 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
6117 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
6118 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
6119 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
6120
6121 const v = c_ret_vector_192_u8();
6122 try expect(v[0] == 70);
6123 try expect(v[1] == 71);
6124 try expect(v[2] == 72);
6125 try expect(v[3] == 73);
6126 try expect(v[4] == 74);
6127 try expect(v[5] == 75);
6128 try expect(v[6] == 76);
6129 try expect(v[7] == 77);
6130 try expect(v[8] == 78);
6131 try expect(v[9] == 79);
6132 try expect(v[10] == 80);
6133 try expect(v[11] == 81);
6134 try expect(v[12] == 82);
6135 try expect(v[13] == 83);
6136 try expect(v[14] == 84);
6137 try expect(v[15] == 85);
6138 try expect(v[16] == 86);
6139 try expect(v[17] == 87);
6140 try expect(v[18] == 88);
6141 try expect(v[19] == 89);
6142 try expect(v[20] == 90);
6143 try expect(v[21] == 91);
6144 try expect(v[22] == 92);
6145 try expect(v[23] == 93);
6146 try expect(v[24] == 94);
6147 try expect(v[25] == 95);
6148 try expect(v[26] == 96);
6149 try expect(v[27] == 97);
6150 try expect(v[28] == 98);
6151 try expect(v[29] == 99);
6152 try expect(v[30] == 0);
6153 try expect(v[31] == 1);
6154 try expect(v[32] == 2);
6155 try expect(v[33] == 3);
6156 try expect(v[34] == 4);
6157 try expect(v[35] == 5);
6158 try expect(v[36] == 6);
6159 try expect(v[37] == 7);
6160 try expect(v[38] == 8);
6161 try expect(v[39] == 9);
6162 try expect(v[40] == 10);
6163 try expect(v[41] == 11);
6164 try expect(v[42] == 12);
6165 try expect(v[43] == 13);
6166 try expect(v[44] == 14);
6167 try expect(v[45] == 15);
6168 try expect(v[46] == 16);
6169 try expect(v[47] == 17);
6170 try expect(v[48] == 18);
6171 try expect(v[49] == 19);
6172 try expect(v[50] == 20);
6173 try expect(v[51] == 21);
6174 try expect(v[52] == 22);
6175 try expect(v[53] == 23);
6176 try expect(v[54] == 24);
6177 try expect(v[55] == 25);
6178 try expect(v[56] == 26);
6179 try expect(v[57] == 27);
6180 try expect(v[58] == 28);
6181 try expect(v[59] == 29);
6182 try expect(v[60] == 30);
6183 try expect(v[61] == 31);
6184 try expect(v[62] == 32);
6185 try expect(v[63] == 33);
6186 try expect(v[64] == 34);
6187 try expect(v[65] == 35);
6188 try expect(v[66] == 36);
6189 try expect(v[67] == 37);
6190 try expect(v[68] == 38);
6191 try expect(v[69] == 39);
6192 try expect(v[70] == 40);
6193 try expect(v[71] == 41);
6194 try expect(v[72] == 42);
6195 try expect(v[73] == 43);
6196 try expect(v[74] == 44);
6197 try expect(v[75] == 45);
6198 try expect(v[76] == 46);
6199 try expect(v[77] == 47);
6200 try expect(v[78] == 48);
6201 try expect(v[79] == 49);
6202 try expect(v[80] == 50);
6203 try expect(v[81] == 51);
6204 try expect(v[82] == 52);
6205 try expect(v[83] == 53);
6206 try expect(v[84] == 54);
6207 try expect(v[85] == 55);
6208 try expect(v[86] == 56);
6209 try expect(v[87] == 57);
6210 try expect(v[88] == 58);
6211 try expect(v[89] == 59);
6212 try expect(v[90] == 60);
6213 try expect(v[91] == 61);
6214 try expect(v[92] == 62);
6215 try expect(v[93] == 63);
6216 try expect(v[94] == 64);
6217 try expect(v[95] == 65);
6218 try expect(v[96] == 66);
6219 try expect(v[97] == 67);
6220 try expect(v[98] == 68);
6221 try expect(v[99] == 69);
6222 try expect(v[100] == 70);
6223 try expect(v[101] == 71);
6224 try expect(v[102] == 72);
6225 try expect(v[103] == 73);
6226 try expect(v[104] == 74);
6227 try expect(v[105] == 75);
6228 try expect(v[106] == 76);
6229 try expect(v[107] == 77);
6230 try expect(v[108] == 78);
6231 try expect(v[109] == 79);
6232 try expect(v[110] == 80);
6233 try expect(v[111] == 81);
6234 try expect(v[112] == 82);
6235 try expect(v[113] == 83);
6236 try expect(v[114] == 84);
6237 try expect(v[115] == 85);
6238 try expect(v[116] == 86);
6239 try expect(v[117] == 87);
6240 try expect(v[118] == 88);
6241 try expect(v[119] == 89);
6242 try expect(v[120] == 90);
6243 try expect(v[121] == 91);
6244 try expect(v[122] == 92);
6245 try expect(v[123] == 93);
6246 try expect(v[124] == 94);
6247 try expect(v[125] == 95);
6248 try expect(v[126] == 96);
6249 try expect(v[127] == 97);
6250 try expect(v[128] == 98);
6251 try expect(v[129] == 99);
6252 try expect(v[130] == 0);
6253 try expect(v[131] == 1);
6254 try expect(v[132] == 2);
6255 try expect(v[133] == 3);
6256 try expect(v[134] == 4);
6257 try expect(v[135] == 5);
6258 try expect(v[136] == 6);
6259 try expect(v[137] == 7);
6260 try expect(v[138] == 8);
6261 try expect(v[139] == 9);
6262 try expect(v[140] == 10);
6263 try expect(v[141] == 11);
6264 try expect(v[142] == 12);
6265 try expect(v[143] == 13);
6266 try expect(v[144] == 14);
6267 try expect(v[145] == 15);
6268 try expect(v[146] == 16);
6269 try expect(v[147] == 17);
6270 try expect(v[148] == 18);
6271 try expect(v[149] == 19);
6272 try expect(v[150] == 20);
6273 try expect(v[151] == 21);
6274 try expect(v[152] == 22);
6275 try expect(v[153] == 23);
6276 try expect(v[154] == 24);
6277 try expect(v[155] == 25);
6278 try expect(v[156] == 26);
6279 try expect(v[157] == 27);
6280 try expect(v[158] == 28);
6281 try expect(v[159] == 29);
6282 try expect(v[160] == 30);
6283 try expect(v[161] == 31);
6284 try expect(v[162] == 32);
6285 try expect(v[163] == 33);
6286 try expect(v[164] == 34);
6287 try expect(v[165] == 35);
6288 try expect(v[166] == 36);
6289 try expect(v[167] == 37);
6290 try expect(v[168] == 38);
6291 try expect(v[169] == 39);
6292 try expect(v[170] == 40);
6293 try expect(v[171] == 41);
6294 try expect(v[172] == 42);
6295 try expect(v[173] == 43);
6296 try expect(v[174] == 44);
6297 try expect(v[175] == 45);
6298 try expect(v[176] == 46);
6299 try expect(v[177] == 47);
6300 try expect(v[178] == 48);
6301 try expect(v[179] == 49);
6302 try expect(v[180] == 50);
6303 try expect(v[181] == 51);
6304 try expect(v[182] == 52);
6305 try expect(v[183] == 53);
6306 try expect(v[184] == 54);
6307 try expect(v[185] == 55);
6308 try expect(v[186] == 56);
6309 try expect(v[187] == 57);
6310 try expect(v[188] == 58);
6311 try expect(v[189] == 59);
6312 try expect(v[190] == 60);
6313 try expect(v[191] == 61);
6314 c_vector_192_u8(.{
6315 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
6316 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6317 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6318 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6319 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6320 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6321 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6322 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6323 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6324 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6325 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6326 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6327 }, 192);
6328 c_test_vector_192_u8();
6329}
6330
6331export fn zig_ret_vector_256_u8() @Vector(256, u8) {
6332 return .{
6333 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6334 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
6335 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
6336 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
6337 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
6338 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
6339 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
6340 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
6341 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
6342 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
6343 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
6344 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
6345 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
6346 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
6347 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6348 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6349 };
6350}
6351export fn zig_vector_256_u8(v: @Vector(256, u8), i: usize) void {
6352 expect(v[0] == 10) catch @panic("test failure");
6353 expect(v[1] == 11) catch @panic("test failure");
6354 expect(v[2] == 12) catch @panic("test failure");
6355 expect(v[3] == 13) catch @panic("test failure");
6356 expect(v[4] == 14) catch @panic("test failure");
6357 expect(v[5] == 15) catch @panic("test failure");
6358 expect(v[6] == 16) catch @panic("test failure");
6359 expect(v[7] == 17) catch @panic("test failure");
6360 expect(v[8] == 18) catch @panic("test failure");
6361 expect(v[9] == 19) catch @panic("test failure");
6362 expect(v[10] == 20) catch @panic("test failure");
6363 expect(v[11] == 21) catch @panic("test failure");
6364 expect(v[12] == 22) catch @panic("test failure");
6365 expect(v[13] == 23) catch @panic("test failure");
6366 expect(v[14] == 24) catch @panic("test failure");
6367 expect(v[15] == 25) catch @panic("test failure");
6368 expect(v[16] == 26) catch @panic("test failure");
6369 expect(v[17] == 27) catch @panic("test failure");
6370 expect(v[18] == 28) catch @panic("test failure");
6371 expect(v[19] == 29) catch @panic("test failure");
6372 expect(v[20] == 30) catch @panic("test failure");
6373 expect(v[21] == 31) catch @panic("test failure");
6374 expect(v[22] == 32) catch @panic("test failure");
6375 expect(v[23] == 33) catch @panic("test failure");
6376 expect(v[24] == 34) catch @panic("test failure");
6377 expect(v[25] == 35) catch @panic("test failure");
6378 expect(v[26] == 36) catch @panic("test failure");
6379 expect(v[27] == 37) catch @panic("test failure");
6380 expect(v[28] == 38) catch @panic("test failure");
6381 expect(v[29] == 39) catch @panic("test failure");
6382 expect(v[30] == 40) catch @panic("test failure");
6383 expect(v[31] == 41) catch @panic("test failure");
6384 expect(v[32] == 42) catch @panic("test failure");
6385 expect(v[33] == 43) catch @panic("test failure");
6386 expect(v[34] == 44) catch @panic("test failure");
6387 expect(v[35] == 45) catch @panic("test failure");
6388 expect(v[36] == 46) catch @panic("test failure");
6389 expect(v[37] == 47) catch @panic("test failure");
6390 expect(v[38] == 48) catch @panic("test failure");
6391 expect(v[39] == 49) catch @panic("test failure");
6392 expect(v[40] == 50) catch @panic("test failure");
6393 expect(v[41] == 51) catch @panic("test failure");
6394 expect(v[42] == 52) catch @panic("test failure");
6395 expect(v[43] == 53) catch @panic("test failure");
6396 expect(v[44] == 54) catch @panic("test failure");
6397 expect(v[45] == 55) catch @panic("test failure");
6398 expect(v[46] == 56) catch @panic("test failure");
6399 expect(v[47] == 57) catch @panic("test failure");
6400 expect(v[48] == 58) catch @panic("test failure");
6401 expect(v[49] == 59) catch @panic("test failure");
6402 expect(v[50] == 60) catch @panic("test failure");
6403 expect(v[51] == 61) catch @panic("test failure");
6404 expect(v[52] == 62) catch @panic("test failure");
6405 expect(v[53] == 63) catch @panic("test failure");
6406 expect(v[54] == 64) catch @panic("test failure");
6407 expect(v[55] == 65) catch @panic("test failure");
6408 expect(v[56] == 66) catch @panic("test failure");
6409 expect(v[57] == 67) catch @panic("test failure");
6410 expect(v[58] == 68) catch @panic("test failure");
6411 expect(v[59] == 69) catch @panic("test failure");
6412 expect(v[60] == 70) catch @panic("test failure");
6413 expect(v[61] == 71) catch @panic("test failure");
6414 expect(v[62] == 72) catch @panic("test failure");
6415 expect(v[63] == 73) catch @panic("test failure");
6416 expect(v[64] == 74) catch @panic("test failure");
6417 expect(v[65] == 75) catch @panic("test failure");
6418 expect(v[66] == 76) catch @panic("test failure");
6419 expect(v[67] == 77) catch @panic("test failure");
6420 expect(v[68] == 78) catch @panic("test failure");
6421 expect(v[69] == 79) catch @panic("test failure");
6422 expect(v[70] == 80) catch @panic("test failure");
6423 expect(v[71] == 81) catch @panic("test failure");
6424 expect(v[72] == 82) catch @panic("test failure");
6425 expect(v[73] == 83) catch @panic("test failure");
6426 expect(v[74] == 84) catch @panic("test failure");
6427 expect(v[75] == 85) catch @panic("test failure");
6428 expect(v[76] == 86) catch @panic("test failure");
6429 expect(v[77] == 87) catch @panic("test failure");
6430 expect(v[78] == 88) catch @panic("test failure");
6431 expect(v[79] == 89) catch @panic("test failure");
6432 expect(v[80] == 90) catch @panic("test failure");
6433 expect(v[81] == 91) catch @panic("test failure");
6434 expect(v[82] == 92) catch @panic("test failure");
6435 expect(v[83] == 93) catch @panic("test failure");
6436 expect(v[84] == 94) catch @panic("test failure");
6437 expect(v[85] == 95) catch @panic("test failure");
6438 expect(v[86] == 96) catch @panic("test failure");
6439 expect(v[87] == 97) catch @panic("test failure");
6440 expect(v[88] == 98) catch @panic("test failure");
6441 expect(v[89] == 99) catch @panic("test failure");
6442 expect(v[90] == 0) catch @panic("test failure");
6443 expect(v[91] == 1) catch @panic("test failure");
6444 expect(v[92] == 2) catch @panic("test failure");
6445 expect(v[93] == 3) catch @panic("test failure");
6446 expect(v[94] == 4) catch @panic("test failure");
6447 expect(v[95] == 5) catch @panic("test failure");
6448 expect(v[96] == 6) catch @panic("test failure");
6449 expect(v[97] == 7) catch @panic("test failure");
6450 expect(v[98] == 8) catch @panic("test failure");
6451 expect(v[99] == 9) catch @panic("test failure");
6452 expect(v[100] == 10) catch @panic("test failure");
6453 expect(v[101] == 11) catch @panic("test failure");
6454 expect(v[102] == 12) catch @panic("test failure");
6455 expect(v[103] == 13) catch @panic("test failure");
6456 expect(v[104] == 14) catch @panic("test failure");
6457 expect(v[105] == 15) catch @panic("test failure");
6458 expect(v[106] == 16) catch @panic("test failure");
6459 expect(v[107] == 17) catch @panic("test failure");
6460 expect(v[108] == 18) catch @panic("test failure");
6461 expect(v[109] == 19) catch @panic("test failure");
6462 expect(v[110] == 20) catch @panic("test failure");
6463 expect(v[111] == 21) catch @panic("test failure");
6464 expect(v[112] == 22) catch @panic("test failure");
6465 expect(v[113] == 23) catch @panic("test failure");
6466 expect(v[114] == 24) catch @panic("test failure");
6467 expect(v[115] == 25) catch @panic("test failure");
6468 expect(v[116] == 26) catch @panic("test failure");
6469 expect(v[117] == 27) catch @panic("test failure");
6470 expect(v[118] == 28) catch @panic("test failure");
6471 expect(v[119] == 29) catch @panic("test failure");
6472 expect(v[120] == 30) catch @panic("test failure");
6473 expect(v[121] == 31) catch @panic("test failure");
6474 expect(v[122] == 32) catch @panic("test failure");
6475 expect(v[123] == 33) catch @panic("test failure");
6476 expect(v[124] == 34) catch @panic("test failure");
6477 expect(v[125] == 35) catch @panic("test failure");
6478 expect(v[126] == 36) catch @panic("test failure");
6479 expect(v[127] == 37) catch @panic("test failure");
6480 expect(v[128] == 38) catch @panic("test failure");
6481 expect(v[129] == 39) catch @panic("test failure");
6482 expect(v[130] == 40) catch @panic("test failure");
6483 expect(v[131] == 41) catch @panic("test failure");
6484 expect(v[132] == 42) catch @panic("test failure");
6485 expect(v[133] == 43) catch @panic("test failure");
6486 expect(v[134] == 44) catch @panic("test failure");
6487 expect(v[135] == 45) catch @panic("test failure");
6488 expect(v[136] == 46) catch @panic("test failure");
6489 expect(v[137] == 47) catch @panic("test failure");
6490 expect(v[138] == 48) catch @panic("test failure");
6491 expect(v[139] == 49) catch @panic("test failure");
6492 expect(v[140] == 50) catch @panic("test failure");
6493 expect(v[141] == 51) catch @panic("test failure");
6494 expect(v[142] == 52) catch @panic("test failure");
6495 expect(v[143] == 53) catch @panic("test failure");
6496 expect(v[144] == 54) catch @panic("test failure");
6497 expect(v[145] == 55) catch @panic("test failure");
6498 expect(v[146] == 56) catch @panic("test failure");
6499 expect(v[147] == 57) catch @panic("test failure");
6500 expect(v[148] == 58) catch @panic("test failure");
6501 expect(v[149] == 59) catch @panic("test failure");
6502 expect(v[150] == 60) catch @panic("test failure");
6503 expect(v[151] == 61) catch @panic("test failure");
6504 expect(v[152] == 62) catch @panic("test failure");
6505 expect(v[153] == 63) catch @panic("test failure");
6506 expect(v[154] == 64) catch @panic("test failure");
6507 expect(v[155] == 65) catch @panic("test failure");
6508 expect(v[156] == 66) catch @panic("test failure");
6509 expect(v[157] == 67) catch @panic("test failure");
6510 expect(v[158] == 68) catch @panic("test failure");
6511 expect(v[159] == 69) catch @panic("test failure");
6512 expect(v[160] == 70) catch @panic("test failure");
6513 expect(v[161] == 71) catch @panic("test failure");
6514 expect(v[162] == 72) catch @panic("test failure");
6515 expect(v[163] == 73) catch @panic("test failure");
6516 expect(v[164] == 74) catch @panic("test failure");
6517 expect(v[165] == 75) catch @panic("test failure");
6518 expect(v[166] == 76) catch @panic("test failure");
6519 expect(v[167] == 77) catch @panic("test failure");
6520 expect(v[168] == 78) catch @panic("test failure");
6521 expect(v[169] == 79) catch @panic("test failure");
6522 expect(v[170] == 80) catch @panic("test failure");
6523 expect(v[171] == 81) catch @panic("test failure");
6524 expect(v[172] == 82) catch @panic("test failure");
6525 expect(v[173] == 83) catch @panic("test failure");
6526 expect(v[174] == 84) catch @panic("test failure");
6527 expect(v[175] == 85) catch @panic("test failure");
6528 expect(v[176] == 86) catch @panic("test failure");
6529 expect(v[177] == 87) catch @panic("test failure");
6530 expect(v[178] == 88) catch @panic("test failure");
6531 expect(v[179] == 89) catch @panic("test failure");
6532 expect(v[180] == 90) catch @panic("test failure");
6533 expect(v[181] == 91) catch @panic("test failure");
6534 expect(v[182] == 92) catch @panic("test failure");
6535 expect(v[183] == 93) catch @panic("test failure");
6536 expect(v[184] == 94) catch @panic("test failure");
6537 expect(v[185] == 95) catch @panic("test failure");
6538 expect(v[186] == 96) catch @panic("test failure");
6539 expect(v[187] == 97) catch @panic("test failure");
6540 expect(v[188] == 98) catch @panic("test failure");
6541 expect(v[189] == 99) catch @panic("test failure");
6542 expect(v[190] == 0) catch @panic("test failure");
6543 expect(v[191] == 1) catch @panic("test failure");
6544 expect(v[192] == 2) catch @panic("test failure");
6545 expect(v[193] == 3) catch @panic("test failure");
6546 expect(v[194] == 4) catch @panic("test failure");
6547 expect(v[195] == 5) catch @panic("test failure");
6548 expect(v[196] == 6) catch @panic("test failure");
6549 expect(v[197] == 7) catch @panic("test failure");
6550 expect(v[198] == 8) catch @panic("test failure");
6551 expect(v[199] == 9) catch @panic("test failure");
6552 expect(v[200] == 10) catch @panic("test failure");
6553 expect(v[201] == 11) catch @panic("test failure");
6554 expect(v[202] == 12) catch @panic("test failure");
6555 expect(v[203] == 13) catch @panic("test failure");
6556 expect(v[204] == 14) catch @panic("test failure");
6557 expect(v[205] == 15) catch @panic("test failure");
6558 expect(v[206] == 16) catch @panic("test failure");
6559 expect(v[207] == 17) catch @panic("test failure");
6560 expect(v[208] == 18) catch @panic("test failure");
6561 expect(v[209] == 19) catch @panic("test failure");
6562 expect(v[210] == 20) catch @panic("test failure");
6563 expect(v[211] == 21) catch @panic("test failure");
6564 expect(v[212] == 22) catch @panic("test failure");
6565 expect(v[213] == 23) catch @panic("test failure");
6566 expect(v[214] == 24) catch @panic("test failure");
6567 expect(v[215] == 25) catch @panic("test failure");
6568 expect(v[216] == 26) catch @panic("test failure");
6569 expect(v[217] == 27) catch @panic("test failure");
6570 expect(v[218] == 28) catch @panic("test failure");
6571 expect(v[219] == 29) catch @panic("test failure");
6572 expect(v[220] == 30) catch @panic("test failure");
6573 expect(v[221] == 31) catch @panic("test failure");
6574 expect(v[222] == 32) catch @panic("test failure");
6575 expect(v[223] == 33) catch @panic("test failure");
6576 expect(v[224] == 34) catch @panic("test failure");
6577 expect(v[225] == 35) catch @panic("test failure");
6578 expect(v[226] == 36) catch @panic("test failure");
6579 expect(v[227] == 37) catch @panic("test failure");
6580 expect(v[228] == 38) catch @panic("test failure");
6581 expect(v[229] == 39) catch @panic("test failure");
6582 expect(v[230] == 40) catch @panic("test failure");
6583 expect(v[231] == 41) catch @panic("test failure");
6584 expect(v[232] == 42) catch @panic("test failure");
6585 expect(v[233] == 43) catch @panic("test failure");
6586 expect(v[234] == 44) catch @panic("test failure");
6587 expect(v[235] == 45) catch @panic("test failure");
6588 expect(v[236] == 46) catch @panic("test failure");
6589 expect(v[237] == 47) catch @panic("test failure");
6590 expect(v[238] == 48) catch @panic("test failure");
6591 expect(v[239] == 49) catch @panic("test failure");
6592 expect(v[240] == 50) catch @panic("test failure");
6593 expect(v[241] == 51) catch @panic("test failure");
6594 expect(v[242] == 52) catch @panic("test failure");
6595 expect(v[243] == 53) catch @panic("test failure");
6596 expect(v[244] == 54) catch @panic("test failure");
6597 expect(v[245] == 55) catch @panic("test failure");
6598 expect(v[246] == 56) catch @panic("test failure");
6599 expect(v[247] == 57) catch @panic("test failure");
6600 expect(v[248] == 58) catch @panic("test failure");
6601 expect(v[249] == 59) catch @panic("test failure");
6602 expect(v[250] == 60) catch @panic("test failure");
6603 expect(v[251] == 61) catch @panic("test failure");
6604 expect(v[252] == 62) catch @panic("test failure");
6605 expect(v[253] == 63) catch @panic("test failure");
6606 expect(v[254] == 64) catch @panic("test failure");
6607 expect(v[255] == 65) catch @panic("test failure");
6608 expect(i == 256) catch @panic("test failure");
6609}
6610
6611extern fn c_ret_vector_256_u8() @Vector(256, u8);
6612extern fn c_vector_256_u8(@Vector(256, u8), usize) void;
6613extern fn c_test_vector_256_u8() void;
6614
6615test "@Vector(256, u8)" {
6616 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
6617 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
6618 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
6619 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
6620 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
6621
6622 const v = c_ret_vector_256_u8();
6623 try expect(v[0] == 66);
6624 try expect(v[1] == 67);
6625 try expect(v[2] == 68);
6626 try expect(v[3] == 69);
6627 try expect(v[4] == 70);
6628 try expect(v[5] == 71);
6629 try expect(v[6] == 72);
6630 try expect(v[7] == 73);
6631 try expect(v[8] == 74);
6632 try expect(v[9] == 75);
6633 try expect(v[10] == 76);
6634 try expect(v[11] == 77);
6635 try expect(v[12] == 78);
6636 try expect(v[13] == 79);
6637 try expect(v[14] == 80);
6638 try expect(v[15] == 81);
6639 try expect(v[16] == 82);
6640 try expect(v[17] == 83);
6641 try expect(v[18] == 84);
6642 try expect(v[19] == 85);
6643 try expect(v[20] == 86);
6644 try expect(v[21] == 87);
6645 try expect(v[22] == 88);
6646 try expect(v[23] == 89);
6647 try expect(v[24] == 90);
6648 try expect(v[25] == 91);
6649 try expect(v[26] == 92);
6650 try expect(v[27] == 93);
6651 try expect(v[28] == 94);
6652 try expect(v[29] == 95);
6653 try expect(v[30] == 96);
6654 try expect(v[31] == 97);
6655 try expect(v[32] == 98);
6656 try expect(v[33] == 99);
6657 try expect(v[34] == 0);
6658 try expect(v[35] == 1);
6659 try expect(v[36] == 2);
6660 try expect(v[37] == 3);
6661 try expect(v[38] == 4);
6662 try expect(v[39] == 5);
6663 try expect(v[40] == 6);
6664 try expect(v[41] == 7);
6665 try expect(v[42] == 8);
6666 try expect(v[43] == 9);
6667 try expect(v[44] == 10);
6668 try expect(v[45] == 11);
6669 try expect(v[46] == 12);
6670 try expect(v[47] == 13);
6671 try expect(v[48] == 14);
6672 try expect(v[49] == 15);
6673 try expect(v[50] == 16);
6674 try expect(v[51] == 17);
6675 try expect(v[52] == 18);
6676 try expect(v[53] == 19);
6677 try expect(v[54] == 20);
6678 try expect(v[55] == 21);
6679 try expect(v[56] == 22);
6680 try expect(v[57] == 23);
6681 try expect(v[58] == 24);
6682 try expect(v[59] == 25);
6683 try expect(v[60] == 26);
6684 try expect(v[61] == 27);
6685 try expect(v[62] == 28);
6686 try expect(v[63] == 29);
6687 try expect(v[64] == 30);
6688 try expect(v[65] == 31);
6689 try expect(v[66] == 32);
6690 try expect(v[67] == 33);
6691 try expect(v[68] == 34);
6692 try expect(v[69] == 35);
6693 try expect(v[70] == 36);
6694 try expect(v[71] == 37);
6695 try expect(v[72] == 38);
6696 try expect(v[73] == 39);
6697 try expect(v[74] == 40);
6698 try expect(v[75] == 41);
6699 try expect(v[76] == 42);
6700 try expect(v[77] == 43);
6701 try expect(v[78] == 44);
6702 try expect(v[79] == 45);
6703 try expect(v[80] == 46);
6704 try expect(v[81] == 47);
6705 try expect(v[82] == 48);
6706 try expect(v[83] == 49);
6707 try expect(v[84] == 50);
6708 try expect(v[85] == 51);
6709 try expect(v[86] == 52);
6710 try expect(v[87] == 53);
6711 try expect(v[88] == 54);
6712 try expect(v[89] == 55);
6713 try expect(v[90] == 56);
6714 try expect(v[91] == 57);
6715 try expect(v[92] == 58);
6716 try expect(v[93] == 59);
6717 try expect(v[94] == 60);
6718 try expect(v[95] == 61);
6719 try expect(v[96] == 62);
6720 try expect(v[97] == 63);
6721 try expect(v[98] == 64);
6722 try expect(v[99] == 65);
6723 try expect(v[100] == 66);
6724 try expect(v[101] == 67);
6725 try expect(v[102] == 68);
6726 try expect(v[103] == 69);
6727 try expect(v[104] == 70);
6728 try expect(v[105] == 71);
6729 try expect(v[106] == 72);
6730 try expect(v[107] == 73);
6731 try expect(v[108] == 74);
6732 try expect(v[109] == 75);
6733 try expect(v[110] == 76);
6734 try expect(v[111] == 77);
6735 try expect(v[112] == 78);
6736 try expect(v[113] == 79);
6737 try expect(v[114] == 80);
6738 try expect(v[115] == 81);
6739 try expect(v[116] == 82);
6740 try expect(v[117] == 83);
6741 try expect(v[118] == 84);
6742 try expect(v[119] == 85);
6743 try expect(v[120] == 86);
6744 try expect(v[121] == 87);
6745 try expect(v[122] == 88);
6746 try expect(v[123] == 89);
6747 try expect(v[124] == 90);
6748 try expect(v[125] == 91);
6749 try expect(v[126] == 92);
6750 try expect(v[127] == 93);
6751 try expect(v[128] == 94);
6752 try expect(v[129] == 95);
6753 try expect(v[130] == 96);
6754 try expect(v[131] == 97);
6755 try expect(v[132] == 98);
6756 try expect(v[133] == 99);
6757 try expect(v[134] == 0);
6758 try expect(v[135] == 1);
6759 try expect(v[136] == 2);
6760 try expect(v[137] == 3);
6761 try expect(v[138] == 4);
6762 try expect(v[139] == 5);
6763 try expect(v[140] == 6);
6764 try expect(v[141] == 7);
6765 try expect(v[142] == 8);
6766 try expect(v[143] == 9);
6767 try expect(v[144] == 10);
6768 try expect(v[145] == 11);
6769 try expect(v[146] == 12);
6770 try expect(v[147] == 13);
6771 try expect(v[148] == 14);
6772 try expect(v[149] == 15);
6773 try expect(v[150] == 16);
6774 try expect(v[151] == 17);
6775 try expect(v[152] == 18);
6776 try expect(v[153] == 19);
6777 try expect(v[154] == 20);
6778 try expect(v[155] == 21);
6779 try expect(v[156] == 22);
6780 try expect(v[157] == 23);
6781 try expect(v[158] == 24);
6782 try expect(v[159] == 25);
6783 try expect(v[160] == 26);
6784 try expect(v[161] == 27);
6785 try expect(v[162] == 28);
6786 try expect(v[163] == 29);
6787 try expect(v[164] == 30);
6788 try expect(v[165] == 31);
6789 try expect(v[166] == 32);
6790 try expect(v[167] == 33);
6791 try expect(v[168] == 34);
6792 try expect(v[169] == 35);
6793 try expect(v[170] == 36);
6794 try expect(v[171] == 37);
6795 try expect(v[172] == 38);
6796 try expect(v[173] == 39);
6797 try expect(v[174] == 40);
6798 try expect(v[175] == 41);
6799 try expect(v[176] == 42);
6800 try expect(v[177] == 43);
6801 try expect(v[178] == 44);
6802 try expect(v[179] == 45);
6803 try expect(v[180] == 46);
6804 try expect(v[181] == 47);
6805 try expect(v[182] == 48);
6806 try expect(v[183] == 49);
6807 try expect(v[184] == 50);
6808 try expect(v[185] == 51);
6809 try expect(v[186] == 52);
6810 try expect(v[187] == 53);
6811 try expect(v[188] == 54);
6812 try expect(v[189] == 55);
6813 try expect(v[190] == 56);
6814 try expect(v[191] == 57);
6815 try expect(v[192] == 58);
6816 try expect(v[193] == 59);
6817 try expect(v[194] == 60);
6818 try expect(v[195] == 61);
6819 try expect(v[196] == 62);
6820 try expect(v[197] == 63);
6821 try expect(v[198] == 64);
6822 try expect(v[199] == 65);
6823 try expect(v[200] == 66);
6824 try expect(v[201] == 67);
6825 try expect(v[202] == 68);
6826 try expect(v[203] == 69);
6827 try expect(v[204] == 70);
6828 try expect(v[205] == 71);
6829 try expect(v[206] == 72);
6830 try expect(v[207] == 73);
6831 try expect(v[208] == 74);
6832 try expect(v[209] == 75);
6833 try expect(v[210] == 76);
6834 try expect(v[211] == 77);
6835 try expect(v[212] == 78);
6836 try expect(v[213] == 79);
6837 try expect(v[214] == 80);
6838 try expect(v[215] == 81);
6839 try expect(v[216] == 82);
6840 try expect(v[217] == 83);
6841 try expect(v[218] == 84);
6842 try expect(v[219] == 85);
6843 try expect(v[220] == 86);
6844 try expect(v[221] == 87);
6845 try expect(v[222] == 88);
6846 try expect(v[223] == 89);
6847 try expect(v[224] == 90);
6848 try expect(v[225] == 91);
6849 try expect(v[226] == 92);
6850 try expect(v[227] == 93);
6851 try expect(v[228] == 94);
6852 try expect(v[229] == 95);
6853 try expect(v[230] == 96);
6854 try expect(v[231] == 97);
6855 try expect(v[232] == 98);
6856 try expect(v[233] == 99);
6857 try expect(v[234] == 0);
6858 try expect(v[235] == 1);
6859 try expect(v[236] == 2);
6860 try expect(v[237] == 3);
6861 try expect(v[238] == 4);
6862 try expect(v[239] == 5);
6863 try expect(v[240] == 6);
6864 try expect(v[241] == 7);
6865 try expect(v[242] == 8);
6866 try expect(v[243] == 9);
6867 try expect(v[244] == 10);
6868 try expect(v[245] == 11);
6869 try expect(v[246] == 12);
6870 try expect(v[247] == 13);
6871 try expect(v[248] == 14);
6872 try expect(v[249] == 15);
6873 try expect(v[250] == 16);
6874 try expect(v[251] == 17);
6875 try expect(v[252] == 18);
6876 try expect(v[253] == 19);
6877 try expect(v[254] == 20);
6878 try expect(v[255] == 21);
6879 c_vector_256_u8(.{
6880 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6881 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6882 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6883 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
6884 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
6885 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
6886 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
6887 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
6888 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
6889 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
6890 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
6891 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
6892 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
6893 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
6894 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
6895 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
6896 }, 256);
6897 c_test_vector_256_u8();
6898}
6899
6900export fn zig_ret_vector_384_u8() @Vector(384, u8) {
6901 return .{
6902 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
6903 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
6904 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
6905 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
6906 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
6907 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
6908 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
6909 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
6910 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
6911 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
6912 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
6913 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
6914 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
6915 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
6916 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
6917 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
6918 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
6919 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
6920 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
6921 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
6922 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
6923 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
6924 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
6925 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
6926 };
6927}
6928export fn zig_vector_384_u8(v: @Vector(384, u8), i: usize) void {
6929 expect(v[0] == 62) catch @panic("test failure");
6930 expect(v[1] == 63) catch @panic("test failure");
6931 expect(v[2] == 64) catch @panic("test failure");
6932 expect(v[3] == 65) catch @panic("test failure");
6933 expect(v[4] == 66) catch @panic("test failure");
6934 expect(v[5] == 67) catch @panic("test failure");
6935 expect(v[6] == 68) catch @panic("test failure");
6936 expect(v[7] == 69) catch @panic("test failure");
6937 expect(v[8] == 70) catch @panic("test failure");
6938 expect(v[9] == 71) catch @panic("test failure");
6939 expect(v[10] == 72) catch @panic("test failure");
6940 expect(v[11] == 73) catch @panic("test failure");
6941 expect(v[12] == 74) catch @panic("test failure");
6942 expect(v[13] == 75) catch @panic("test failure");
6943 expect(v[14] == 76) catch @panic("test failure");
6944 expect(v[15] == 77) catch @panic("test failure");
6945 expect(v[16] == 78) catch @panic("test failure");
6946 expect(v[17] == 79) catch @panic("test failure");
6947 expect(v[18] == 80) catch @panic("test failure");
6948 expect(v[19] == 81) catch @panic("test failure");
6949 expect(v[20] == 82) catch @panic("test failure");
6950 expect(v[21] == 83) catch @panic("test failure");
6951 expect(v[22] == 84) catch @panic("test failure");
6952 expect(v[23] == 85) catch @panic("test failure");
6953 expect(v[24] == 86) catch @panic("test failure");
6954 expect(v[25] == 87) catch @panic("test failure");
6955 expect(v[26] == 88) catch @panic("test failure");
6956 expect(v[27] == 89) catch @panic("test failure");
6957 expect(v[28] == 90) catch @panic("test failure");
6958 expect(v[29] == 91) catch @panic("test failure");
6959 expect(v[30] == 92) catch @panic("test failure");
6960 expect(v[31] == 93) catch @panic("test failure");
6961 expect(v[32] == 94) catch @panic("test failure");
6962 expect(v[33] == 95) catch @panic("test failure");
6963 expect(v[34] == 96) catch @panic("test failure");
6964 expect(v[35] == 97) catch @panic("test failure");
6965 expect(v[36] == 98) catch @panic("test failure");
6966 expect(v[37] == 99) catch @panic("test failure");
6967 expect(v[38] == 0) catch @panic("test failure");
6968 expect(v[39] == 1) catch @panic("test failure");
6969 expect(v[40] == 2) catch @panic("test failure");
6970 expect(v[41] == 3) catch @panic("test failure");
6971 expect(v[42] == 4) catch @panic("test failure");
6972 expect(v[43] == 5) catch @panic("test failure");
6973 expect(v[44] == 6) catch @panic("test failure");
6974 expect(v[45] == 7) catch @panic("test failure");
6975 expect(v[46] == 8) catch @panic("test failure");
6976 expect(v[47] == 9) catch @panic("test failure");
6977 expect(v[48] == 10) catch @panic("test failure");
6978 expect(v[49] == 11) catch @panic("test failure");
6979 expect(v[50] == 12) catch @panic("test failure");
6980 expect(v[51] == 13) catch @panic("test failure");
6981 expect(v[52] == 14) catch @panic("test failure");
6982 expect(v[53] == 15) catch @panic("test failure");
6983 expect(v[54] == 16) catch @panic("test failure");
6984 expect(v[55] == 17) catch @panic("test failure");
6985 expect(v[56] == 18) catch @panic("test failure");
6986 expect(v[57] == 19) catch @panic("test failure");
6987 expect(v[58] == 20) catch @panic("test failure");
6988 expect(v[59] == 21) catch @panic("test failure");
6989 expect(v[60] == 22) catch @panic("test failure");
6990 expect(v[61] == 23) catch @panic("test failure");
6991 expect(v[62] == 24) catch @panic("test failure");
6992 expect(v[63] == 25) catch @panic("test failure");
6993 expect(v[64] == 26) catch @panic("test failure");
6994 expect(v[65] == 27) catch @panic("test failure");
6995 expect(v[66] == 28) catch @panic("test failure");
6996 expect(v[67] == 29) catch @panic("test failure");
6997 expect(v[68] == 30) catch @panic("test failure");
6998 expect(v[69] == 31) catch @panic("test failure");
6999 expect(v[70] == 32) catch @panic("test failure");
7000 expect(v[71] == 33) catch @panic("test failure");
7001 expect(v[72] == 34) catch @panic("test failure");
7002 expect(v[73] == 35) catch @panic("test failure");
7003 expect(v[74] == 36) catch @panic("test failure");
7004 expect(v[75] == 37) catch @panic("test failure");
7005 expect(v[76] == 38) catch @panic("test failure");
7006 expect(v[77] == 39) catch @panic("test failure");
7007 expect(v[78] == 40) catch @panic("test failure");
7008 expect(v[79] == 41) catch @panic("test failure");
7009 expect(v[80] == 42) catch @panic("test failure");
7010 expect(v[81] == 43) catch @panic("test failure");
7011 expect(v[82] == 44) catch @panic("test failure");
7012 expect(v[83] == 45) catch @panic("test failure");
7013 expect(v[84] == 46) catch @panic("test failure");
7014 expect(v[85] == 47) catch @panic("test failure");
7015 expect(v[86] == 48) catch @panic("test failure");
7016 expect(v[87] == 49) catch @panic("test failure");
7017 expect(v[88] == 50) catch @panic("test failure");
7018 expect(v[89] == 51) catch @panic("test failure");
7019 expect(v[90] == 52) catch @panic("test failure");
7020 expect(v[91] == 53) catch @panic("test failure");
7021 expect(v[92] == 54) catch @panic("test failure");
7022 expect(v[93] == 55) catch @panic("test failure");
7023 expect(v[94] == 56) catch @panic("test failure");
7024 expect(v[95] == 57) catch @panic("test failure");
7025 expect(v[96] == 58) catch @panic("test failure");
7026 expect(v[97] == 59) catch @panic("test failure");
7027 expect(v[98] == 60) catch @panic("test failure");
7028 expect(v[99] == 61) catch @panic("test failure");
7029 expect(v[100] == 62) catch @panic("test failure");
7030 expect(v[101] == 63) catch @panic("test failure");
7031 expect(v[102] == 64) catch @panic("test failure");
7032 expect(v[103] == 65) catch @panic("test failure");
7033 expect(v[104] == 66) catch @panic("test failure");
7034 expect(v[105] == 67) catch @panic("test failure");
7035 expect(v[106] == 68) catch @panic("test failure");
7036 expect(v[107] == 69) catch @panic("test failure");
7037 expect(v[108] == 70) catch @panic("test failure");
7038 expect(v[109] == 71) catch @panic("test failure");
7039 expect(v[110] == 72) catch @panic("test failure");
7040 expect(v[111] == 73) catch @panic("test failure");
7041 expect(v[112] == 74) catch @panic("test failure");
7042 expect(v[113] == 75) catch @panic("test failure");
7043 expect(v[114] == 76) catch @panic("test failure");
7044 expect(v[115] == 77) catch @panic("test failure");
7045 expect(v[116] == 78) catch @panic("test failure");
7046 expect(v[117] == 79) catch @panic("test failure");
7047 expect(v[118] == 80) catch @panic("test failure");
7048 expect(v[119] == 81) catch @panic("test failure");
7049 expect(v[120] == 82) catch @panic("test failure");
7050 expect(v[121] == 83) catch @panic("test failure");
7051 expect(v[122] == 84) catch @panic("test failure");
7052 expect(v[123] == 85) catch @panic("test failure");
7053 expect(v[124] == 86) catch @panic("test failure");
7054 expect(v[125] == 87) catch @panic("test failure");
7055 expect(v[126] == 88) catch @panic("test failure");
7056 expect(v[127] == 89) catch @panic("test failure");
7057 expect(v[128] == 90) catch @panic("test failure");
7058 expect(v[129] == 91) catch @panic("test failure");
7059 expect(v[130] == 92) catch @panic("test failure");
7060 expect(v[131] == 93) catch @panic("test failure");
7061 expect(v[132] == 94) catch @panic("test failure");
7062 expect(v[133] == 95) catch @panic("test failure");
7063 expect(v[134] == 96) catch @panic("test failure");
7064 expect(v[135] == 97) catch @panic("test failure");
7065 expect(v[136] == 98) catch @panic("test failure");
7066 expect(v[137] == 99) catch @panic("test failure");
7067 expect(v[138] == 0) catch @panic("test failure");
7068 expect(v[139] == 1) catch @panic("test failure");
7069 expect(v[140] == 2) catch @panic("test failure");
7070 expect(v[141] == 3) catch @panic("test failure");
7071 expect(v[142] == 4) catch @panic("test failure");
7072 expect(v[143] == 5) catch @panic("test failure");
7073 expect(v[144] == 6) catch @panic("test failure");
7074 expect(v[145] == 7) catch @panic("test failure");
7075 expect(v[146] == 8) catch @panic("test failure");
7076 expect(v[147] == 9) catch @panic("test failure");
7077 expect(v[148] == 10) catch @panic("test failure");
7078 expect(v[149] == 11) catch @panic("test failure");
7079 expect(v[150] == 12) catch @panic("test failure");
7080 expect(v[151] == 13) catch @panic("test failure");
7081 expect(v[152] == 14) catch @panic("test failure");
7082 expect(v[153] == 15) catch @panic("test failure");
7083 expect(v[154] == 16) catch @panic("test failure");
7084 expect(v[155] == 17) catch @panic("test failure");
7085 expect(v[156] == 18) catch @panic("test failure");
7086 expect(v[157] == 19) catch @panic("test failure");
7087 expect(v[158] == 20) catch @panic("test failure");
7088 expect(v[159] == 21) catch @panic("test failure");
7089 expect(v[160] == 22) catch @panic("test failure");
7090 expect(v[161] == 23) catch @panic("test failure");
7091 expect(v[162] == 24) catch @panic("test failure");
7092 expect(v[163] == 25) catch @panic("test failure");
7093 expect(v[164] == 26) catch @panic("test failure");
7094 expect(v[165] == 27) catch @panic("test failure");
7095 expect(v[166] == 28) catch @panic("test failure");
7096 expect(v[167] == 29) catch @panic("test failure");
7097 expect(v[168] == 30) catch @panic("test failure");
7098 expect(v[169] == 31) catch @panic("test failure");
7099 expect(v[170] == 32) catch @panic("test failure");
7100 expect(v[171] == 33) catch @panic("test failure");
7101 expect(v[172] == 34) catch @panic("test failure");
7102 expect(v[173] == 35) catch @panic("test failure");
7103 expect(v[174] == 36) catch @panic("test failure");
7104 expect(v[175] == 37) catch @panic("test failure");
7105 expect(v[176] == 38) catch @panic("test failure");
7106 expect(v[177] == 39) catch @panic("test failure");
7107 expect(v[178] == 40) catch @panic("test failure");
7108 expect(v[179] == 41) catch @panic("test failure");
7109 expect(v[180] == 42) catch @panic("test failure");
7110 expect(v[181] == 43) catch @panic("test failure");
7111 expect(v[182] == 44) catch @panic("test failure");
7112 expect(v[183] == 45) catch @panic("test failure");
7113 expect(v[184] == 46) catch @panic("test failure");
7114 expect(v[185] == 47) catch @panic("test failure");
7115 expect(v[186] == 48) catch @panic("test failure");
7116 expect(v[187] == 49) catch @panic("test failure");
7117 expect(v[188] == 50) catch @panic("test failure");
7118 expect(v[189] == 51) catch @panic("test failure");
7119 expect(v[190] == 52) catch @panic("test failure");
7120 expect(v[191] == 53) catch @panic("test failure");
7121 expect(v[192] == 54) catch @panic("test failure");
7122 expect(v[193] == 55) catch @panic("test failure");
7123 expect(v[194] == 56) catch @panic("test failure");
7124 expect(v[195] == 57) catch @panic("test failure");
7125 expect(v[196] == 58) catch @panic("test failure");
7126 expect(v[197] == 59) catch @panic("test failure");
7127 expect(v[198] == 60) catch @panic("test failure");
7128 expect(v[199] == 61) catch @panic("test failure");
7129 expect(v[200] == 62) catch @panic("test failure");
7130 expect(v[201] == 63) catch @panic("test failure");
7131 expect(v[202] == 64) catch @panic("test failure");
7132 expect(v[203] == 65) catch @panic("test failure");
7133 expect(v[204] == 66) catch @panic("test failure");
7134 expect(v[205] == 67) catch @panic("test failure");
7135 expect(v[206] == 68) catch @panic("test failure");
7136 expect(v[207] == 69) catch @panic("test failure");
7137 expect(v[208] == 70) catch @panic("test failure");
7138 expect(v[209] == 71) catch @panic("test failure");
7139 expect(v[210] == 72) catch @panic("test failure");
7140 expect(v[211] == 73) catch @panic("test failure");
7141 expect(v[212] == 74) catch @panic("test failure");
7142 expect(v[213] == 75) catch @panic("test failure");
7143 expect(v[214] == 76) catch @panic("test failure");
7144 expect(v[215] == 77) catch @panic("test failure");
7145 expect(v[216] == 78) catch @panic("test failure");
7146 expect(v[217] == 79) catch @panic("test failure");
7147 expect(v[218] == 80) catch @panic("test failure");
7148 expect(v[219] == 81) catch @panic("test failure");
7149 expect(v[220] == 82) catch @panic("test failure");
7150 expect(v[221] == 83) catch @panic("test failure");
7151 expect(v[222] == 84) catch @panic("test failure");
7152 expect(v[223] == 85) catch @panic("test failure");
7153 expect(v[224] == 86) catch @panic("test failure");
7154 expect(v[225] == 87) catch @panic("test failure");
7155 expect(v[226] == 88) catch @panic("test failure");
7156 expect(v[227] == 89) catch @panic("test failure");
7157 expect(v[228] == 90) catch @panic("test failure");
7158 expect(v[229] == 91) catch @panic("test failure");
7159 expect(v[230] == 92) catch @panic("test failure");
7160 expect(v[231] == 93) catch @panic("test failure");
7161 expect(v[232] == 94) catch @panic("test failure");
7162 expect(v[233] == 95) catch @panic("test failure");
7163 expect(v[234] == 96) catch @panic("test failure");
7164 expect(v[235] == 97) catch @panic("test failure");
7165 expect(v[236] == 98) catch @panic("test failure");
7166 expect(v[237] == 99) catch @panic("test failure");
7167 expect(v[238] == 0) catch @panic("test failure");
7168 expect(v[239] == 1) catch @panic("test failure");
7169 expect(v[240] == 2) catch @panic("test failure");
7170 expect(v[241] == 3) catch @panic("test failure");
7171 expect(v[242] == 4) catch @panic("test failure");
7172 expect(v[243] == 5) catch @panic("test failure");
7173 expect(v[244] == 6) catch @panic("test failure");
7174 expect(v[245] == 7) catch @panic("test failure");
7175 expect(v[246] == 8) catch @panic("test failure");
7176 expect(v[247] == 9) catch @panic("test failure");
7177 expect(v[248] == 10) catch @panic("test failure");
7178 expect(v[249] == 11) catch @panic("test failure");
7179 expect(v[250] == 12) catch @panic("test failure");
7180 expect(v[251] == 13) catch @panic("test failure");
7181 expect(v[252] == 14) catch @panic("test failure");
7182 expect(v[253] == 15) catch @panic("test failure");
7183 expect(v[254] == 16) catch @panic("test failure");
7184 expect(v[255] == 17) catch @panic("test failure");
7185 expect(v[256] == 18) catch @panic("test failure");
7186 expect(v[257] == 19) catch @panic("test failure");
7187 expect(v[258] == 20) catch @panic("test failure");
7188 expect(v[259] == 21) catch @panic("test failure");
7189 expect(v[260] == 22) catch @panic("test failure");
7190 expect(v[261] == 23) catch @panic("test failure");
7191 expect(v[262] == 24) catch @panic("test failure");
7192 expect(v[263] == 25) catch @panic("test failure");
7193 expect(v[264] == 26) catch @panic("test failure");
7194 expect(v[265] == 27) catch @panic("test failure");
7195 expect(v[266] == 28) catch @panic("test failure");
7196 expect(v[267] == 29) catch @panic("test failure");
7197 expect(v[268] == 30) catch @panic("test failure");
7198 expect(v[269] == 31) catch @panic("test failure");
7199 expect(v[270] == 32) catch @panic("test failure");
7200 expect(v[271] == 33) catch @panic("test failure");
7201 expect(v[272] == 34) catch @panic("test failure");
7202 expect(v[273] == 35) catch @panic("test failure");
7203 expect(v[274] == 36) catch @panic("test failure");
7204 expect(v[275] == 37) catch @panic("test failure");
7205 expect(v[276] == 38) catch @panic("test failure");
7206 expect(v[277] == 39) catch @panic("test failure");
7207 expect(v[278] == 40) catch @panic("test failure");
7208 expect(v[279] == 41) catch @panic("test failure");
7209 expect(v[280] == 42) catch @panic("test failure");
7210 expect(v[281] == 43) catch @panic("test failure");
7211 expect(v[282] == 44) catch @panic("test failure");
7212 expect(v[283] == 45) catch @panic("test failure");
7213 expect(v[284] == 46) catch @panic("test failure");
7214 expect(v[285] == 47) catch @panic("test failure");
7215 expect(v[286] == 48) catch @panic("test failure");
7216 expect(v[287] == 49) catch @panic("test failure");
7217 expect(v[288] == 50) catch @panic("test failure");
7218 expect(v[289] == 51) catch @panic("test failure");
7219 expect(v[290] == 52) catch @panic("test failure");
7220 expect(v[291] == 53) catch @panic("test failure");
7221 expect(v[292] == 54) catch @panic("test failure");
7222 expect(v[293] == 55) catch @panic("test failure");
7223 expect(v[294] == 56) catch @panic("test failure");
7224 expect(v[295] == 57) catch @panic("test failure");
7225 expect(v[296] == 58) catch @panic("test failure");
7226 expect(v[297] == 59) catch @panic("test failure");
7227 expect(v[298] == 60) catch @panic("test failure");
7228 expect(v[299] == 61) catch @panic("test failure");
7229 expect(v[300] == 62) catch @panic("test failure");
7230 expect(v[301] == 63) catch @panic("test failure");
7231 expect(v[302] == 64) catch @panic("test failure");
7232 expect(v[303] == 65) catch @panic("test failure");
7233 expect(v[304] == 66) catch @panic("test failure");
7234 expect(v[305] == 67) catch @panic("test failure");
7235 expect(v[306] == 68) catch @panic("test failure");
7236 expect(v[307] == 69) catch @panic("test failure");
7237 expect(v[308] == 70) catch @panic("test failure");
7238 expect(v[309] == 71) catch @panic("test failure");
7239 expect(v[310] == 72) catch @panic("test failure");
7240 expect(v[311] == 73) catch @panic("test failure");
7241 expect(v[312] == 74) catch @panic("test failure");
7242 expect(v[313] == 75) catch @panic("test failure");
7243 expect(v[314] == 76) catch @panic("test failure");
7244 expect(v[315] == 77) catch @panic("test failure");
7245 expect(v[316] == 78) catch @panic("test failure");
7246 expect(v[317] == 79) catch @panic("test failure");
7247 expect(v[318] == 80) catch @panic("test failure");
7248 expect(v[319] == 81) catch @panic("test failure");
7249 expect(v[320] == 82) catch @panic("test failure");
7250 expect(v[321] == 83) catch @panic("test failure");
7251 expect(v[322] == 84) catch @panic("test failure");
7252 expect(v[323] == 85) catch @panic("test failure");
7253 expect(v[324] == 86) catch @panic("test failure");
7254 expect(v[325] == 87) catch @panic("test failure");
7255 expect(v[326] == 88) catch @panic("test failure");
7256 expect(v[327] == 89) catch @panic("test failure");
7257 expect(v[328] == 90) catch @panic("test failure");
7258 expect(v[329] == 91) catch @panic("test failure");
7259 expect(v[330] == 92) catch @panic("test failure");
7260 expect(v[331] == 93) catch @panic("test failure");
7261 expect(v[332] == 94) catch @panic("test failure");
7262 expect(v[333] == 95) catch @panic("test failure");
7263 expect(v[334] == 96) catch @panic("test failure");
7264 expect(v[335] == 97) catch @panic("test failure");
7265 expect(v[336] == 98) catch @panic("test failure");
7266 expect(v[337] == 99) catch @panic("test failure");
7267 expect(v[338] == 0) catch @panic("test failure");
7268 expect(v[339] == 1) catch @panic("test failure");
7269 expect(v[340] == 2) catch @panic("test failure");
7270 expect(v[341] == 3) catch @panic("test failure");
7271 expect(v[342] == 4) catch @panic("test failure");
7272 expect(v[343] == 5) catch @panic("test failure");
7273 expect(v[344] == 6) catch @panic("test failure");
7274 expect(v[345] == 7) catch @panic("test failure");
7275 expect(v[346] == 8) catch @panic("test failure");
7276 expect(v[347] == 9) catch @panic("test failure");
7277 expect(v[348] == 10) catch @panic("test failure");
7278 expect(v[349] == 11) catch @panic("test failure");
7279 expect(v[350] == 12) catch @panic("test failure");
7280 expect(v[351] == 13) catch @panic("test failure");
7281 expect(v[352] == 14) catch @panic("test failure");
7282 expect(v[353] == 15) catch @panic("test failure");
7283 expect(v[354] == 16) catch @panic("test failure");
7284 expect(v[355] == 17) catch @panic("test failure");
7285 expect(v[356] == 18) catch @panic("test failure");
7286 expect(v[357] == 19) catch @panic("test failure");
7287 expect(v[358] == 20) catch @panic("test failure");
7288 expect(v[359] == 21) catch @panic("test failure");
7289 expect(v[360] == 22) catch @panic("test failure");
7290 expect(v[361] == 23) catch @panic("test failure");
7291 expect(v[362] == 24) catch @panic("test failure");
7292 expect(v[363] == 25) catch @panic("test failure");
7293 expect(v[364] == 26) catch @panic("test failure");
7294 expect(v[365] == 27) catch @panic("test failure");
7295 expect(v[366] == 28) catch @panic("test failure");
7296 expect(v[367] == 29) catch @panic("test failure");
7297 expect(v[368] == 30) catch @panic("test failure");
7298 expect(v[369] == 31) catch @panic("test failure");
7299 expect(v[370] == 32) catch @panic("test failure");
7300 expect(v[371] == 33) catch @panic("test failure");
7301 expect(v[372] == 34) catch @panic("test failure");
7302 expect(v[373] == 35) catch @panic("test failure");
7303 expect(v[374] == 36) catch @panic("test failure");
7304 expect(v[375] == 37) catch @panic("test failure");
7305 expect(v[376] == 38) catch @panic("test failure");
7306 expect(v[377] == 39) catch @panic("test failure");
7307 expect(v[378] == 40) catch @panic("test failure");
7308 expect(v[379] == 41) catch @panic("test failure");
7309 expect(v[380] == 42) catch @panic("test failure");
7310 expect(v[381] == 43) catch @panic("test failure");
7311 expect(v[382] == 44) catch @panic("test failure");
7312 expect(v[383] == 45) catch @panic("test failure");
7313 expect(i == 384) catch @panic("test failure");
7314}
7315
7316extern fn c_ret_vector_384_u8() @Vector(384, u8);
7317extern fn c_vector_384_u8(@Vector(384, u8), usize) void;
7318extern fn c_test_vector_384_u8() void;
7319
7320test "@Vector(384, u8)" {
7321 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
7322 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
7323 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
7324 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
7325 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
7326
7327 const v = c_ret_vector_384_u8();
7328 try expect(v[0] == 46);
7329 try expect(v[1] == 47);
7330 try expect(v[2] == 48);
7331 try expect(v[3] == 49);
7332 try expect(v[4] == 50);
7333 try expect(v[5] == 51);
7334 try expect(v[6] == 52);
7335 try expect(v[7] == 53);
7336 try expect(v[8] == 54);
7337 try expect(v[9] == 55);
7338 try expect(v[10] == 56);
7339 try expect(v[11] == 57);
7340 try expect(v[12] == 58);
7341 try expect(v[13] == 59);
7342 try expect(v[14] == 60);
7343 try expect(v[15] == 61);
7344 try expect(v[16] == 62);
7345 try expect(v[17] == 63);
7346 try expect(v[18] == 64);
7347 try expect(v[19] == 65);
7348 try expect(v[20] == 66);
7349 try expect(v[21] == 67);
7350 try expect(v[22] == 68);
7351 try expect(v[23] == 69);
7352 try expect(v[24] == 70);
7353 try expect(v[25] == 71);
7354 try expect(v[26] == 72);
7355 try expect(v[27] == 73);
7356 try expect(v[28] == 74);
7357 try expect(v[29] == 75);
7358 try expect(v[30] == 76);
7359 try expect(v[31] == 77);
7360 try expect(v[32] == 78);
7361 try expect(v[33] == 79);
7362 try expect(v[34] == 80);
7363 try expect(v[35] == 81);
7364 try expect(v[36] == 82);
7365 try expect(v[37] == 83);
7366 try expect(v[38] == 84);
7367 try expect(v[39] == 85);
7368 try expect(v[40] == 86);
7369 try expect(v[41] == 87);
7370 try expect(v[42] == 88);
7371 try expect(v[43] == 89);
7372 try expect(v[44] == 90);
7373 try expect(v[45] == 91);
7374 try expect(v[46] == 92);
7375 try expect(v[47] == 93);
7376 try expect(v[48] == 94);
7377 try expect(v[49] == 95);
7378 try expect(v[50] == 96);
7379 try expect(v[51] == 97);
7380 try expect(v[52] == 98);
7381 try expect(v[53] == 99);
7382 try expect(v[54] == 0);
7383 try expect(v[55] == 1);
7384 try expect(v[56] == 2);
7385 try expect(v[57] == 3);
7386 try expect(v[58] == 4);
7387 try expect(v[59] == 5);
7388 try expect(v[60] == 6);
7389 try expect(v[61] == 7);
7390 try expect(v[62] == 8);
7391 try expect(v[63] == 9);
7392 try expect(v[64] == 10);
7393 try expect(v[65] == 11);
7394 try expect(v[66] == 12);
7395 try expect(v[67] == 13);
7396 try expect(v[68] == 14);
7397 try expect(v[69] == 15);
7398 try expect(v[70] == 16);
7399 try expect(v[71] == 17);
7400 try expect(v[72] == 18);
7401 try expect(v[73] == 19);
7402 try expect(v[74] == 20);
7403 try expect(v[75] == 21);
7404 try expect(v[76] == 22);
7405 try expect(v[77] == 23);
7406 try expect(v[78] == 24);
7407 try expect(v[79] == 25);
7408 try expect(v[80] == 26);
7409 try expect(v[81] == 27);
7410 try expect(v[82] == 28);
7411 try expect(v[83] == 29);
7412 try expect(v[84] == 30);
7413 try expect(v[85] == 31);
7414 try expect(v[86] == 32);
7415 try expect(v[87] == 33);
7416 try expect(v[88] == 34);
7417 try expect(v[89] == 35);
7418 try expect(v[90] == 36);
7419 try expect(v[91] == 37);
7420 try expect(v[92] == 38);
7421 try expect(v[93] == 39);
7422 try expect(v[94] == 40);
7423 try expect(v[95] == 41);
7424 try expect(v[96] == 42);
7425 try expect(v[97] == 43);
7426 try expect(v[98] == 44);
7427 try expect(v[99] == 45);
7428 try expect(v[100] == 46);
7429 try expect(v[101] == 47);
7430 try expect(v[102] == 48);
7431 try expect(v[103] == 49);
7432 try expect(v[104] == 50);
7433 try expect(v[105] == 51);
7434 try expect(v[106] == 52);
7435 try expect(v[107] == 53);
7436 try expect(v[108] == 54);
7437 try expect(v[109] == 55);
7438 try expect(v[110] == 56);
7439 try expect(v[111] == 57);
7440 try expect(v[112] == 58);
7441 try expect(v[113] == 59);
7442 try expect(v[114] == 60);
7443 try expect(v[115] == 61);
7444 try expect(v[116] == 62);
7445 try expect(v[117] == 63);
7446 try expect(v[118] == 64);
7447 try expect(v[119] == 65);
7448 try expect(v[120] == 66);
7449 try expect(v[121] == 67);
7450 try expect(v[122] == 68);
7451 try expect(v[123] == 69);
7452 try expect(v[124] == 70);
7453 try expect(v[125] == 71);
7454 try expect(v[126] == 72);
7455 try expect(v[127] == 73);
7456 try expect(v[128] == 74);
7457 try expect(v[129] == 75);
7458 try expect(v[130] == 76);
7459 try expect(v[131] == 77);
7460 try expect(v[132] == 78);
7461 try expect(v[133] == 79);
7462 try expect(v[134] == 80);
7463 try expect(v[135] == 81);
7464 try expect(v[136] == 82);
7465 try expect(v[137] == 83);
7466 try expect(v[138] == 84);
7467 try expect(v[139] == 85);
7468 try expect(v[140] == 86);
7469 try expect(v[141] == 87);
7470 try expect(v[142] == 88);
7471 try expect(v[143] == 89);
7472 try expect(v[144] == 90);
7473 try expect(v[145] == 91);
7474 try expect(v[146] == 92);
7475 try expect(v[147] == 93);
7476 try expect(v[148] == 94);
7477 try expect(v[149] == 95);
7478 try expect(v[150] == 96);
7479 try expect(v[151] == 97);
7480 try expect(v[152] == 98);
7481 try expect(v[153] == 99);
7482 try expect(v[154] == 0);
7483 try expect(v[155] == 1);
7484 try expect(v[156] == 2);
7485 try expect(v[157] == 3);
7486 try expect(v[158] == 4);
7487 try expect(v[159] == 5);
7488 try expect(v[160] == 6);
7489 try expect(v[161] == 7);
7490 try expect(v[162] == 8);
7491 try expect(v[163] == 9);
7492 try expect(v[164] == 10);
7493 try expect(v[165] == 11);
7494 try expect(v[166] == 12);
7495 try expect(v[167] == 13);
7496 try expect(v[168] == 14);
7497 try expect(v[169] == 15);
7498 try expect(v[170] == 16);
7499 try expect(v[171] == 17);
7500 try expect(v[172] == 18);
7501 try expect(v[173] == 19);
7502 try expect(v[174] == 20);
7503 try expect(v[175] == 21);
7504 try expect(v[176] == 22);
7505 try expect(v[177] == 23);
7506 try expect(v[178] == 24);
7507 try expect(v[179] == 25);
7508 try expect(v[180] == 26);
7509 try expect(v[181] == 27);
7510 try expect(v[182] == 28);
7511 try expect(v[183] == 29);
7512 try expect(v[184] == 30);
7513 try expect(v[185] == 31);
7514 try expect(v[186] == 32);
7515 try expect(v[187] == 33);
7516 try expect(v[188] == 34);
7517 try expect(v[189] == 35);
7518 try expect(v[190] == 36);
7519 try expect(v[191] == 37);
7520 try expect(v[192] == 38);
7521 try expect(v[193] == 39);
7522 try expect(v[194] == 40);
7523 try expect(v[195] == 41);
7524 try expect(v[196] == 42);
7525 try expect(v[197] == 43);
7526 try expect(v[198] == 44);
7527 try expect(v[199] == 45);
7528 try expect(v[200] == 46);
7529 try expect(v[201] == 47);
7530 try expect(v[202] == 48);
7531 try expect(v[203] == 49);
7532 try expect(v[204] == 50);
7533 try expect(v[205] == 51);
7534 try expect(v[206] == 52);
7535 try expect(v[207] == 53);
7536 try expect(v[208] == 54);
7537 try expect(v[209] == 55);
7538 try expect(v[210] == 56);
7539 try expect(v[211] == 57);
7540 try expect(v[212] == 58);
7541 try expect(v[213] == 59);
7542 try expect(v[214] == 60);
7543 try expect(v[215] == 61);
7544 try expect(v[216] == 62);
7545 try expect(v[217] == 63);
7546 try expect(v[218] == 64);
7547 try expect(v[219] == 65);
7548 try expect(v[220] == 66);
7549 try expect(v[221] == 67);
7550 try expect(v[222] == 68);
7551 try expect(v[223] == 69);
7552 try expect(v[224] == 70);
7553 try expect(v[225] == 71);
7554 try expect(v[226] == 72);
7555 try expect(v[227] == 73);
7556 try expect(v[228] == 74);
7557 try expect(v[229] == 75);
7558 try expect(v[230] == 76);
7559 try expect(v[231] == 77);
7560 try expect(v[232] == 78);
7561 try expect(v[233] == 79);
7562 try expect(v[234] == 80);
7563 try expect(v[235] == 81);
7564 try expect(v[236] == 82);
7565 try expect(v[237] == 83);
7566 try expect(v[238] == 84);
7567 try expect(v[239] == 85);
7568 try expect(v[240] == 86);
7569 try expect(v[241] == 87);
7570 try expect(v[242] == 88);
7571 try expect(v[243] == 89);
7572 try expect(v[244] == 90);
7573 try expect(v[245] == 91);
7574 try expect(v[246] == 92);
7575 try expect(v[247] == 93);
7576 try expect(v[248] == 94);
7577 try expect(v[249] == 95);
7578 try expect(v[250] == 96);
7579 try expect(v[251] == 97);
7580 try expect(v[252] == 98);
7581 try expect(v[253] == 99);
7582 try expect(v[254] == 0);
7583 try expect(v[255] == 1);
7584 try expect(v[256] == 2);
7585 try expect(v[257] == 3);
7586 try expect(v[258] == 4);
7587 try expect(v[259] == 5);
7588 try expect(v[260] == 6);
7589 try expect(v[261] == 7);
7590 try expect(v[262] == 8);
7591 try expect(v[263] == 9);
7592 try expect(v[264] == 10);
7593 try expect(v[265] == 11);
7594 try expect(v[266] == 12);
7595 try expect(v[267] == 13);
7596 try expect(v[268] == 14);
7597 try expect(v[269] == 15);
7598 try expect(v[270] == 16);
7599 try expect(v[271] == 17);
7600 try expect(v[272] == 18);
7601 try expect(v[273] == 19);
7602 try expect(v[274] == 20);
7603 try expect(v[275] == 21);
7604 try expect(v[276] == 22);
7605 try expect(v[277] == 23);
7606 try expect(v[278] == 24);
7607 try expect(v[279] == 25);
7608 try expect(v[280] == 26);
7609 try expect(v[281] == 27);
7610 try expect(v[282] == 28);
7611 try expect(v[283] == 29);
7612 try expect(v[284] == 30);
7613 try expect(v[285] == 31);
7614 try expect(v[286] == 32);
7615 try expect(v[287] == 33);
7616 try expect(v[288] == 34);
7617 try expect(v[289] == 35);
7618 try expect(v[290] == 36);
7619 try expect(v[291] == 37);
7620 try expect(v[292] == 38);
7621 try expect(v[293] == 39);
7622 try expect(v[294] == 40);
7623 try expect(v[295] == 41);
7624 try expect(v[296] == 42);
7625 try expect(v[297] == 43);
7626 try expect(v[298] == 44);
7627 try expect(v[299] == 45);
7628 try expect(v[300] == 46);
7629 try expect(v[301] == 47);
7630 try expect(v[302] == 48);
7631 try expect(v[303] == 49);
7632 try expect(v[304] == 50);
7633 try expect(v[305] == 51);
7634 try expect(v[306] == 52);
7635 try expect(v[307] == 53);
7636 try expect(v[308] == 54);
7637 try expect(v[309] == 55);
7638 try expect(v[310] == 56);
7639 try expect(v[311] == 57);
7640 try expect(v[312] == 58);
7641 try expect(v[313] == 59);
7642 try expect(v[314] == 60);
7643 try expect(v[315] == 61);
7644 try expect(v[316] == 62);
7645 try expect(v[317] == 63);
7646 try expect(v[318] == 64);
7647 try expect(v[319] == 65);
7648 try expect(v[320] == 66);
7649 try expect(v[321] == 67);
7650 try expect(v[322] == 68);
7651 try expect(v[323] == 69);
7652 try expect(v[324] == 70);
7653 try expect(v[325] == 71);
7654 try expect(v[326] == 72);
7655 try expect(v[327] == 73);
7656 try expect(v[328] == 74);
7657 try expect(v[329] == 75);
7658 try expect(v[330] == 76);
7659 try expect(v[331] == 77);
7660 try expect(v[332] == 78);
7661 try expect(v[333] == 79);
7662 try expect(v[334] == 80);
7663 try expect(v[335] == 81);
7664 try expect(v[336] == 82);
7665 try expect(v[337] == 83);
7666 try expect(v[338] == 84);
7667 try expect(v[339] == 85);
7668 try expect(v[340] == 86);
7669 try expect(v[341] == 87);
7670 try expect(v[342] == 88);
7671 try expect(v[343] == 89);
7672 try expect(v[344] == 90);
7673 try expect(v[345] == 91);
7674 try expect(v[346] == 92);
7675 try expect(v[347] == 93);
7676 try expect(v[348] == 94);
7677 try expect(v[349] == 95);
7678 try expect(v[350] == 96);
7679 try expect(v[351] == 97);
7680 try expect(v[352] == 98);
7681 try expect(v[353] == 99);
7682 try expect(v[354] == 0);
7683 try expect(v[355] == 1);
7684 try expect(v[356] == 2);
7685 try expect(v[357] == 3);
7686 try expect(v[358] == 4);
7687 try expect(v[359] == 5);
7688 try expect(v[360] == 6);
7689 try expect(v[361] == 7);
7690 try expect(v[362] == 8);
7691 try expect(v[363] == 9);
7692 try expect(v[364] == 10);
7693 try expect(v[365] == 11);
7694 try expect(v[366] == 12);
7695 try expect(v[367] == 13);
7696 try expect(v[368] == 14);
7697 try expect(v[369] == 15);
7698 try expect(v[370] == 16);
7699 try expect(v[371] == 17);
7700 try expect(v[372] == 18);
7701 try expect(v[373] == 19);
7702 try expect(v[374] == 20);
7703 try expect(v[375] == 21);
7704 try expect(v[376] == 22);
7705 try expect(v[377] == 23);
7706 try expect(v[378] == 24);
7707 try expect(v[379] == 25);
7708 try expect(v[380] == 26);
7709 try expect(v[381] == 27);
7710 try expect(v[382] == 28);
7711 try expect(v[383] == 29);
7712 c_vector_384_u8(.{
7713 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
7714 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
7715 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
7716 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
7717 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
7718 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
7719 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
7720 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
7721 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
7722 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
7723 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
7724 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
7725 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
7726 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
7727 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
7728 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
7729 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
7730 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7731 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
7732 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
7733 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
7734 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
7735 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
7736 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
7737 }, 384);
7738 c_test_vector_384_u8();
7739}
7740
7741export fn zig_ret_vector_512_u8() @Vector(512, u8) {
7742 return .{
7743 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
7744 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
7745 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
7746 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
7747 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
7748 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
7749 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
7750 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
7751 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
7752 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
7753 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
7754 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
7755 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
7756 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
7757 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
7758 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
7759 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
7760 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
7761 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
7762 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
7763 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
7764 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
7765 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
7766 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
7767 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
7768 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
7769 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
7770 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
7771 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
7772 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
7773 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
7774 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
7775 };
7776}
7777export fn zig_vector_512_u8(v: @Vector(512, u8), i: usize) void {
7778 expect(v[0] == 26) catch @panic("test failure");
7779 expect(v[1] == 27) catch @panic("test failure");
7780 expect(v[2] == 28) catch @panic("test failure");
7781 expect(v[3] == 29) catch @panic("test failure");
7782 expect(v[4] == 30) catch @panic("test failure");
7783 expect(v[5] == 31) catch @panic("test failure");
7784 expect(v[6] == 32) catch @panic("test failure");
7785 expect(v[7] == 33) catch @panic("test failure");
7786 expect(v[8] == 34) catch @panic("test failure");
7787 expect(v[9] == 35) catch @panic("test failure");
7788 expect(v[10] == 36) catch @panic("test failure");
7789 expect(v[11] == 37) catch @panic("test failure");
7790 expect(v[12] == 38) catch @panic("test failure");
7791 expect(v[13] == 39) catch @panic("test failure");
7792 expect(v[14] == 40) catch @panic("test failure");
7793 expect(v[15] == 41) catch @panic("test failure");
7794 expect(v[16] == 42) catch @panic("test failure");
7795 expect(v[17] == 43) catch @panic("test failure");
7796 expect(v[18] == 44) catch @panic("test failure");
7797 expect(v[19] == 45) catch @panic("test failure");
7798 expect(v[20] == 46) catch @panic("test failure");
7799 expect(v[21] == 47) catch @panic("test failure");
7800 expect(v[22] == 48) catch @panic("test failure");
7801 expect(v[23] == 49) catch @panic("test failure");
7802 expect(v[24] == 50) catch @panic("test failure");
7803 expect(v[25] == 51) catch @panic("test failure");
7804 expect(v[26] == 52) catch @panic("test failure");
7805 expect(v[27] == 53) catch @panic("test failure");
7806 expect(v[28] == 54) catch @panic("test failure");
7807 expect(v[29] == 55) catch @panic("test failure");
7808 expect(v[30] == 56) catch @panic("test failure");
7809 expect(v[31] == 57) catch @panic("test failure");
7810 expect(v[32] == 58) catch @panic("test failure");
7811 expect(v[33] == 59) catch @panic("test failure");
7812 expect(v[34] == 60) catch @panic("test failure");
7813 expect(v[35] == 61) catch @panic("test failure");
7814 expect(v[36] == 62) catch @panic("test failure");
7815 expect(v[37] == 63) catch @panic("test failure");
7816 expect(v[38] == 64) catch @panic("test failure");
7817 expect(v[39] == 65) catch @panic("test failure");
7818 expect(v[40] == 66) catch @panic("test failure");
7819 expect(v[41] == 67) catch @panic("test failure");
7820 expect(v[42] == 68) catch @panic("test failure");
7821 expect(v[43] == 69) catch @panic("test failure");
7822 expect(v[44] == 70) catch @panic("test failure");
7823 expect(v[45] == 71) catch @panic("test failure");
7824 expect(v[46] == 72) catch @panic("test failure");
7825 expect(v[47] == 73) catch @panic("test failure");
7826 expect(v[48] == 74) catch @panic("test failure");
7827 expect(v[49] == 75) catch @panic("test failure");
7828 expect(v[50] == 76) catch @panic("test failure");
7829 expect(v[51] == 77) catch @panic("test failure");
7830 expect(v[52] == 78) catch @panic("test failure");
7831 expect(v[53] == 79) catch @panic("test failure");
7832 expect(v[54] == 80) catch @panic("test failure");
7833 expect(v[55] == 81) catch @panic("test failure");
7834 expect(v[56] == 82) catch @panic("test failure");
7835 expect(v[57] == 83) catch @panic("test failure");
7836 expect(v[58] == 84) catch @panic("test failure");
7837 expect(v[59] == 85) catch @panic("test failure");
7838 expect(v[60] == 86) catch @panic("test failure");
7839 expect(v[61] == 87) catch @panic("test failure");
7840 expect(v[62] == 88) catch @panic("test failure");
7841 expect(v[63] == 89) catch @panic("test failure");
7842 expect(v[64] == 90) catch @panic("test failure");
7843 expect(v[65] == 91) catch @panic("test failure");
7844 expect(v[66] == 92) catch @panic("test failure");
7845 expect(v[67] == 93) catch @panic("test failure");
7846 expect(v[68] == 94) catch @panic("test failure");
7847 expect(v[69] == 95) catch @panic("test failure");
7848 expect(v[70] == 96) catch @panic("test failure");
7849 expect(v[71] == 97) catch @panic("test failure");
7850 expect(v[72] == 98) catch @panic("test failure");
7851 expect(v[73] == 99) catch @panic("test failure");
7852 expect(v[74] == 0) catch @panic("test failure");
7853 expect(v[75] == 1) catch @panic("test failure");
7854 expect(v[76] == 2) catch @panic("test failure");
7855 expect(v[77] == 3) catch @panic("test failure");
7856 expect(v[78] == 4) catch @panic("test failure");
7857 expect(v[79] == 5) catch @panic("test failure");
7858 expect(v[80] == 6) catch @panic("test failure");
7859 expect(v[81] == 7) catch @panic("test failure");
7860 expect(v[82] == 8) catch @panic("test failure");
7861 expect(v[83] == 9) catch @panic("test failure");
7862 expect(v[84] == 10) catch @panic("test failure");
7863 expect(v[85] == 11) catch @panic("test failure");
7864 expect(v[86] == 12) catch @panic("test failure");
7865 expect(v[87] == 13) catch @panic("test failure");
7866 expect(v[88] == 14) catch @panic("test failure");
7867 expect(v[89] == 15) catch @panic("test failure");
7868 expect(v[90] == 16) catch @panic("test failure");
7869 expect(v[91] == 17) catch @panic("test failure");
7870 expect(v[92] == 18) catch @panic("test failure");
7871 expect(v[93] == 19) catch @panic("test failure");
7872 expect(v[94] == 20) catch @panic("test failure");
7873 expect(v[95] == 21) catch @panic("test failure");
7874 expect(v[96] == 22) catch @panic("test failure");
7875 expect(v[97] == 23) catch @panic("test failure");
7876 expect(v[98] == 24) catch @panic("test failure");
7877 expect(v[99] == 25) catch @panic("test failure");
7878 expect(v[100] == 26) catch @panic("test failure");
7879 expect(v[101] == 27) catch @panic("test failure");
7880 expect(v[102] == 28) catch @panic("test failure");
7881 expect(v[103] == 29) catch @panic("test failure");
7882 expect(v[104] == 30) catch @panic("test failure");
7883 expect(v[105] == 31) catch @panic("test failure");
7884 expect(v[106] == 32) catch @panic("test failure");
7885 expect(v[107] == 33) catch @panic("test failure");
7886 expect(v[108] == 34) catch @panic("test failure");
7887 expect(v[109] == 35) catch @panic("test failure");
7888 expect(v[110] == 36) catch @panic("test failure");
7889 expect(v[111] == 37) catch @panic("test failure");
7890 expect(v[112] == 38) catch @panic("test failure");
7891 expect(v[113] == 39) catch @panic("test failure");
7892 expect(v[114] == 40) catch @panic("test failure");
7893 expect(v[115] == 41) catch @panic("test failure");
7894 expect(v[116] == 42) catch @panic("test failure");
7895 expect(v[117] == 43) catch @panic("test failure");
7896 expect(v[118] == 44) catch @panic("test failure");
7897 expect(v[119] == 45) catch @panic("test failure");
7898 expect(v[120] == 46) catch @panic("test failure");
7899 expect(v[121] == 47) catch @panic("test failure");
7900 expect(v[122] == 48) catch @panic("test failure");
7901 expect(v[123] == 49) catch @panic("test failure");
7902 expect(v[124] == 50) catch @panic("test failure");
7903 expect(v[125] == 51) catch @panic("test failure");
7904 expect(v[126] == 52) catch @panic("test failure");
7905 expect(v[127] == 53) catch @panic("test failure");
7906 expect(v[128] == 54) catch @panic("test failure");
7907 expect(v[129] == 55) catch @panic("test failure");
7908 expect(v[130] == 56) catch @panic("test failure");
7909 expect(v[131] == 57) catch @panic("test failure");
7910 expect(v[132] == 58) catch @panic("test failure");
7911 expect(v[133] == 59) catch @panic("test failure");
7912 expect(v[134] == 60) catch @panic("test failure");
7913 expect(v[135] == 61) catch @panic("test failure");
7914 expect(v[136] == 62) catch @panic("test failure");
7915 expect(v[137] == 63) catch @panic("test failure");
7916 expect(v[138] == 64) catch @panic("test failure");
7917 expect(v[139] == 65) catch @panic("test failure");
7918 expect(v[140] == 66) catch @panic("test failure");
7919 expect(v[141] == 67) catch @panic("test failure");
7920 expect(v[142] == 68) catch @panic("test failure");
7921 expect(v[143] == 69) catch @panic("test failure");
7922 expect(v[144] == 70) catch @panic("test failure");
7923 expect(v[145] == 71) catch @panic("test failure");
7924 expect(v[146] == 72) catch @panic("test failure");
7925 expect(v[147] == 73) catch @panic("test failure");
7926 expect(v[148] == 74) catch @panic("test failure");
7927 expect(v[149] == 75) catch @panic("test failure");
7928 expect(v[150] == 76) catch @panic("test failure");
7929 expect(v[151] == 77) catch @panic("test failure");
7930 expect(v[152] == 78) catch @panic("test failure");
7931 expect(v[153] == 79) catch @panic("test failure");
7932 expect(v[154] == 80) catch @panic("test failure");
7933 expect(v[155] == 81) catch @panic("test failure");
7934 expect(v[156] == 82) catch @panic("test failure");
7935 expect(v[157] == 83) catch @panic("test failure");
7936 expect(v[158] == 84) catch @panic("test failure");
7937 expect(v[159] == 85) catch @panic("test failure");
7938 expect(v[160] == 86) catch @panic("test failure");
7939 expect(v[161] == 87) catch @panic("test failure");
7940 expect(v[162] == 88) catch @panic("test failure");
7941 expect(v[163] == 89) catch @panic("test failure");
7942 expect(v[164] == 90) catch @panic("test failure");
7943 expect(v[165] == 91) catch @panic("test failure");
7944 expect(v[166] == 92) catch @panic("test failure");
7945 expect(v[167] == 93) catch @panic("test failure");
7946 expect(v[168] == 94) catch @panic("test failure");
7947 expect(v[169] == 95) catch @panic("test failure");
7948 expect(v[170] == 96) catch @panic("test failure");
7949 expect(v[171] == 97) catch @panic("test failure");
7950 expect(v[172] == 98) catch @panic("test failure");
7951 expect(v[173] == 99) catch @panic("test failure");
7952 expect(v[174] == 0) catch @panic("test failure");
7953 expect(v[175] == 1) catch @panic("test failure");
7954 expect(v[176] == 2) catch @panic("test failure");
7955 expect(v[177] == 3) catch @panic("test failure");
7956 expect(v[178] == 4) catch @panic("test failure");
7957 expect(v[179] == 5) catch @panic("test failure");
7958 expect(v[180] == 6) catch @panic("test failure");
7959 expect(v[181] == 7) catch @panic("test failure");
7960 expect(v[182] == 8) catch @panic("test failure");
7961 expect(v[183] == 9) catch @panic("test failure");
7962 expect(v[184] == 10) catch @panic("test failure");
7963 expect(v[185] == 11) catch @panic("test failure");
7964 expect(v[186] == 12) catch @panic("test failure");
7965 expect(v[187] == 13) catch @panic("test failure");
7966 expect(v[188] == 14) catch @panic("test failure");
7967 expect(v[189] == 15) catch @panic("test failure");
7968 expect(v[190] == 16) catch @panic("test failure");
7969 expect(v[191] == 17) catch @panic("test failure");
7970 expect(v[192] == 18) catch @panic("test failure");
7971 expect(v[193] == 19) catch @panic("test failure");
7972 expect(v[194] == 20) catch @panic("test failure");
7973 expect(v[195] == 21) catch @panic("test failure");
7974 expect(v[196] == 22) catch @panic("test failure");
7975 expect(v[197] == 23) catch @panic("test failure");
7976 expect(v[198] == 24) catch @panic("test failure");
7977 expect(v[199] == 25) catch @panic("test failure");
7978 expect(v[200] == 26) catch @panic("test failure");
7979 expect(v[201] == 27) catch @panic("test failure");
7980 expect(v[202] == 28) catch @panic("test failure");
7981 expect(v[203] == 29) catch @panic("test failure");
7982 expect(v[204] == 30) catch @panic("test failure");
7983 expect(v[205] == 31) catch @panic("test failure");
7984 expect(v[206] == 32) catch @panic("test failure");
7985 expect(v[207] == 33) catch @panic("test failure");
7986 expect(v[208] == 34) catch @panic("test failure");
7987 expect(v[209] == 35) catch @panic("test failure");
7988 expect(v[210] == 36) catch @panic("test failure");
7989 expect(v[211] == 37) catch @panic("test failure");
7990 expect(v[212] == 38) catch @panic("test failure");
7991 expect(v[213] == 39) catch @panic("test failure");
7992 expect(v[214] == 40) catch @panic("test failure");
7993 expect(v[215] == 41) catch @panic("test failure");
7994 expect(v[216] == 42) catch @panic("test failure");
7995 expect(v[217] == 43) catch @panic("test failure");
7996 expect(v[218] == 44) catch @panic("test failure");
7997 expect(v[219] == 45) catch @panic("test failure");
7998 expect(v[220] == 46) catch @panic("test failure");
7999 expect(v[221] == 47) catch @panic("test failure");
8000 expect(v[222] == 48) catch @panic("test failure");
8001 expect(v[223] == 49) catch @panic("test failure");
8002 expect(v[224] == 50) catch @panic("test failure");
8003 expect(v[225] == 51) catch @panic("test failure");
8004 expect(v[226] == 52) catch @panic("test failure");
8005 expect(v[227] == 53) catch @panic("test failure");
8006 expect(v[228] == 54) catch @panic("test failure");
8007 expect(v[229] == 55) catch @panic("test failure");
8008 expect(v[230] == 56) catch @panic("test failure");
8009 expect(v[231] == 57) catch @panic("test failure");
8010 expect(v[232] == 58) catch @panic("test failure");
8011 expect(v[233] == 59) catch @panic("test failure");
8012 expect(v[234] == 60) catch @panic("test failure");
8013 expect(v[235] == 61) catch @panic("test failure");
8014 expect(v[236] == 62) catch @panic("test failure");
8015 expect(v[237] == 63) catch @panic("test failure");
8016 expect(v[238] == 64) catch @panic("test failure");
8017 expect(v[239] == 65) catch @panic("test failure");
8018 expect(v[240] == 66) catch @panic("test failure");
8019 expect(v[241] == 67) catch @panic("test failure");
8020 expect(v[242] == 68) catch @panic("test failure");
8021 expect(v[243] == 69) catch @panic("test failure");
8022 expect(v[244] == 70) catch @panic("test failure");
8023 expect(v[245] == 71) catch @panic("test failure");
8024 expect(v[246] == 72) catch @panic("test failure");
8025 expect(v[247] == 73) catch @panic("test failure");
8026 expect(v[248] == 74) catch @panic("test failure");
8027 expect(v[249] == 75) catch @panic("test failure");
8028 expect(v[250] == 76) catch @panic("test failure");
8029 expect(v[251] == 77) catch @panic("test failure");
8030 expect(v[252] == 78) catch @panic("test failure");
8031 expect(v[253] == 79) catch @panic("test failure");
8032 expect(v[254] == 80) catch @panic("test failure");
8033 expect(v[255] == 81) catch @panic("test failure");
8034 expect(v[256] == 82) catch @panic("test failure");
8035 expect(v[257] == 83) catch @panic("test failure");
8036 expect(v[258] == 84) catch @panic("test failure");
8037 expect(v[259] == 85) catch @panic("test failure");
8038 expect(v[260] == 86) catch @panic("test failure");
8039 expect(v[261] == 87) catch @panic("test failure");
8040 expect(v[262] == 88) catch @panic("test failure");
8041 expect(v[263] == 89) catch @panic("test failure");
8042 expect(v[264] == 90) catch @panic("test failure");
8043 expect(v[265] == 91) catch @panic("test failure");
8044 expect(v[266] == 92) catch @panic("test failure");
8045 expect(v[267] == 93) catch @panic("test failure");
8046 expect(v[268] == 94) catch @panic("test failure");
8047 expect(v[269] == 95) catch @panic("test failure");
8048 expect(v[270] == 96) catch @panic("test failure");
8049 expect(v[271] == 97) catch @panic("test failure");
8050 expect(v[272] == 98) catch @panic("test failure");
8051 expect(v[273] == 99) catch @panic("test failure");
8052 expect(v[274] == 0) catch @panic("test failure");
8053 expect(v[275] == 1) catch @panic("test failure");
8054 expect(v[276] == 2) catch @panic("test failure");
8055 expect(v[277] == 3) catch @panic("test failure");
8056 expect(v[278] == 4) catch @panic("test failure");
8057 expect(v[279] == 5) catch @panic("test failure");
8058 expect(v[280] == 6) catch @panic("test failure");
8059 expect(v[281] == 7) catch @panic("test failure");
8060 expect(v[282] == 8) catch @panic("test failure");
8061 expect(v[283] == 9) catch @panic("test failure");
8062 expect(v[284] == 10) catch @panic("test failure");
8063 expect(v[285] == 11) catch @panic("test failure");
8064 expect(v[286] == 12) catch @panic("test failure");
8065 expect(v[287] == 13) catch @panic("test failure");
8066 expect(v[288] == 14) catch @panic("test failure");
8067 expect(v[289] == 15) catch @panic("test failure");
8068 expect(v[290] == 16) catch @panic("test failure");
8069 expect(v[291] == 17) catch @panic("test failure");
8070 expect(v[292] == 18) catch @panic("test failure");
8071 expect(v[293] == 19) catch @panic("test failure");
8072 expect(v[294] == 20) catch @panic("test failure");
8073 expect(v[295] == 21) catch @panic("test failure");
8074 expect(v[296] == 22) catch @panic("test failure");
8075 expect(v[297] == 23) catch @panic("test failure");
8076 expect(v[298] == 24) catch @panic("test failure");
8077 expect(v[299] == 25) catch @panic("test failure");
8078 expect(v[300] == 26) catch @panic("test failure");
8079 expect(v[301] == 27) catch @panic("test failure");
8080 expect(v[302] == 28) catch @panic("test failure");
8081 expect(v[303] == 29) catch @panic("test failure");
8082 expect(v[304] == 30) catch @panic("test failure");
8083 expect(v[305] == 31) catch @panic("test failure");
8084 expect(v[306] == 32) catch @panic("test failure");
8085 expect(v[307] == 33) catch @panic("test failure");
8086 expect(v[308] == 34) catch @panic("test failure");
8087 expect(v[309] == 35) catch @panic("test failure");
8088 expect(v[310] == 36) catch @panic("test failure");
8089 expect(v[311] == 37) catch @panic("test failure");
8090 expect(v[312] == 38) catch @panic("test failure");
8091 expect(v[313] == 39) catch @panic("test failure");
8092 expect(v[314] == 40) catch @panic("test failure");
8093 expect(v[315] == 41) catch @panic("test failure");
8094 expect(v[316] == 42) catch @panic("test failure");
8095 expect(v[317] == 43) catch @panic("test failure");
8096 expect(v[318] == 44) catch @panic("test failure");
8097 expect(v[319] == 45) catch @panic("test failure");
8098 expect(v[320] == 46) catch @panic("test failure");
8099 expect(v[321] == 47) catch @panic("test failure");
8100 expect(v[322] == 48) catch @panic("test failure");
8101 expect(v[323] == 49) catch @panic("test failure");
8102 expect(v[324] == 50) catch @panic("test failure");
8103 expect(v[325] == 51) catch @panic("test failure");
8104 expect(v[326] == 52) catch @panic("test failure");
8105 expect(v[327] == 53) catch @panic("test failure");
8106 expect(v[328] == 54) catch @panic("test failure");
8107 expect(v[329] == 55) catch @panic("test failure");
8108 expect(v[330] == 56) catch @panic("test failure");
8109 expect(v[331] == 57) catch @panic("test failure");
8110 expect(v[332] == 58) catch @panic("test failure");
8111 expect(v[333] == 59) catch @panic("test failure");
8112 expect(v[334] == 60) catch @panic("test failure");
8113 expect(v[335] == 61) catch @panic("test failure");
8114 expect(v[336] == 62) catch @panic("test failure");
8115 expect(v[337] == 63) catch @panic("test failure");
8116 expect(v[338] == 64) catch @panic("test failure");
8117 expect(v[339] == 65) catch @panic("test failure");
8118 expect(v[340] == 66) catch @panic("test failure");
8119 expect(v[341] == 67) catch @panic("test failure");
8120 expect(v[342] == 68) catch @panic("test failure");
8121 expect(v[343] == 69) catch @panic("test failure");
8122 expect(v[344] == 70) catch @panic("test failure");
8123 expect(v[345] == 71) catch @panic("test failure");
8124 expect(v[346] == 72) catch @panic("test failure");
8125 expect(v[347] == 73) catch @panic("test failure");
8126 expect(v[348] == 74) catch @panic("test failure");
8127 expect(v[349] == 75) catch @panic("test failure");
8128 expect(v[350] == 76) catch @panic("test failure");
8129 expect(v[351] == 77) catch @panic("test failure");
8130 expect(v[352] == 78) catch @panic("test failure");
8131 expect(v[353] == 79) catch @panic("test failure");
8132 expect(v[354] == 80) catch @panic("test failure");
8133 expect(v[355] == 81) catch @panic("test failure");
8134 expect(v[356] == 82) catch @panic("test failure");
8135 expect(v[357] == 83) catch @panic("test failure");
8136 expect(v[358] == 84) catch @panic("test failure");
8137 expect(v[359] == 85) catch @panic("test failure");
8138 expect(v[360] == 86) catch @panic("test failure");
8139 expect(v[361] == 87) catch @panic("test failure");
8140 expect(v[362] == 88) catch @panic("test failure");
8141 expect(v[363] == 89) catch @panic("test failure");
8142 expect(v[364] == 90) catch @panic("test failure");
8143 expect(v[365] == 91) catch @panic("test failure");
8144 expect(v[366] == 92) catch @panic("test failure");
8145 expect(v[367] == 93) catch @panic("test failure");
8146 expect(v[368] == 94) catch @panic("test failure");
8147 expect(v[369] == 95) catch @panic("test failure");
8148 expect(v[370] == 96) catch @panic("test failure");
8149 expect(v[371] == 97) catch @panic("test failure");
8150 expect(v[372] == 98) catch @panic("test failure");
8151 expect(v[373] == 99) catch @panic("test failure");
8152 expect(v[374] == 0) catch @panic("test failure");
8153 expect(v[375] == 1) catch @panic("test failure");
8154 expect(v[376] == 2) catch @panic("test failure");
8155 expect(v[377] == 3) catch @panic("test failure");
8156 expect(v[378] == 4) catch @panic("test failure");
8157 expect(v[379] == 5) catch @panic("test failure");
8158 expect(v[380] == 6) catch @panic("test failure");
8159 expect(v[381] == 7) catch @panic("test failure");
8160 expect(v[382] == 8) catch @panic("test failure");
8161 expect(v[383] == 9) catch @panic("test failure");
8162 expect(v[384] == 10) catch @panic("test failure");
8163 expect(v[385] == 11) catch @panic("test failure");
8164 expect(v[386] == 12) catch @panic("test failure");
8165 expect(v[387] == 13) catch @panic("test failure");
8166 expect(v[388] == 14) catch @panic("test failure");
8167 expect(v[389] == 15) catch @panic("test failure");
8168 expect(v[390] == 16) catch @panic("test failure");
8169 expect(v[391] == 17) catch @panic("test failure");
8170 expect(v[392] == 18) catch @panic("test failure");
8171 expect(v[393] == 19) catch @panic("test failure");
8172 expect(v[394] == 20) catch @panic("test failure");
8173 expect(v[395] == 21) catch @panic("test failure");
8174 expect(v[396] == 22) catch @panic("test failure");
8175 expect(v[397] == 23) catch @panic("test failure");
8176 expect(v[398] == 24) catch @panic("test failure");
8177 expect(v[399] == 25) catch @panic("test failure");
8178 expect(v[400] == 26) catch @panic("test failure");
8179 expect(v[401] == 27) catch @panic("test failure");
8180 expect(v[402] == 28) catch @panic("test failure");
8181 expect(v[403] == 29) catch @panic("test failure");
8182 expect(v[404] == 30) catch @panic("test failure");
8183 expect(v[405] == 31) catch @panic("test failure");
8184 expect(v[406] == 32) catch @panic("test failure");
8185 expect(v[407] == 33) catch @panic("test failure");
8186 expect(v[408] == 34) catch @panic("test failure");
8187 expect(v[409] == 35) catch @panic("test failure");
8188 expect(v[410] == 36) catch @panic("test failure");
8189 expect(v[411] == 37) catch @panic("test failure");
8190 expect(v[412] == 38) catch @panic("test failure");
8191 expect(v[413] == 39) catch @panic("test failure");
8192 expect(v[414] == 40) catch @panic("test failure");
8193 expect(v[415] == 41) catch @panic("test failure");
8194 expect(v[416] == 42) catch @panic("test failure");
8195 expect(v[417] == 43) catch @panic("test failure");
8196 expect(v[418] == 44) catch @panic("test failure");
8197 expect(v[419] == 45) catch @panic("test failure");
8198 expect(v[420] == 46) catch @panic("test failure");
8199 expect(v[421] == 47) catch @panic("test failure");
8200 expect(v[422] == 48) catch @panic("test failure");
8201 expect(v[423] == 49) catch @panic("test failure");
8202 expect(v[424] == 50) catch @panic("test failure");
8203 expect(v[425] == 51) catch @panic("test failure");
8204 expect(v[426] == 52) catch @panic("test failure");
8205 expect(v[427] == 53) catch @panic("test failure");
8206 expect(v[428] == 54) catch @panic("test failure");
8207 expect(v[429] == 55) catch @panic("test failure");
8208 expect(v[430] == 56) catch @panic("test failure");
8209 expect(v[431] == 57) catch @panic("test failure");
8210 expect(v[432] == 58) catch @panic("test failure");
8211 expect(v[433] == 59) catch @panic("test failure");
8212 expect(v[434] == 60) catch @panic("test failure");
8213 expect(v[435] == 61) catch @panic("test failure");
8214 expect(v[436] == 62) catch @panic("test failure");
8215 expect(v[437] == 63) catch @panic("test failure");
8216 expect(v[438] == 64) catch @panic("test failure");
8217 expect(v[439] == 65) catch @panic("test failure");
8218 expect(v[440] == 66) catch @panic("test failure");
8219 expect(v[441] == 67) catch @panic("test failure");
8220 expect(v[442] == 68) catch @panic("test failure");
8221 expect(v[443] == 69) catch @panic("test failure");
8222 expect(v[444] == 70) catch @panic("test failure");
8223 expect(v[445] == 71) catch @panic("test failure");
8224 expect(v[446] == 72) catch @panic("test failure");
8225 expect(v[447] == 73) catch @panic("test failure");
8226 expect(v[448] == 74) catch @panic("test failure");
8227 expect(v[449] == 75) catch @panic("test failure");
8228 expect(v[450] == 76) catch @panic("test failure");
8229 expect(v[451] == 77) catch @panic("test failure");
8230 expect(v[452] == 78) catch @panic("test failure");
8231 expect(v[453] == 79) catch @panic("test failure");
8232 expect(v[454] == 80) catch @panic("test failure");
8233 expect(v[455] == 81) catch @panic("test failure");
8234 expect(v[456] == 82) catch @panic("test failure");
8235 expect(v[457] == 83) catch @panic("test failure");
8236 expect(v[458] == 84) catch @panic("test failure");
8237 expect(v[459] == 85) catch @panic("test failure");
8238 expect(v[460] == 86) catch @panic("test failure");
8239 expect(v[461] == 87) catch @panic("test failure");
8240 expect(v[462] == 88) catch @panic("test failure");
8241 expect(v[463] == 89) catch @panic("test failure");
8242 expect(v[464] == 90) catch @panic("test failure");
8243 expect(v[465] == 91) catch @panic("test failure");
8244 expect(v[466] == 92) catch @panic("test failure");
8245 expect(v[467] == 93) catch @panic("test failure");
8246 expect(v[468] == 94) catch @panic("test failure");
8247 expect(v[469] == 95) catch @panic("test failure");
8248 expect(v[470] == 96) catch @panic("test failure");
8249 expect(v[471] == 97) catch @panic("test failure");
8250 expect(v[472] == 98) catch @panic("test failure");
8251 expect(v[473] == 99) catch @panic("test failure");
8252 expect(v[474] == 0) catch @panic("test failure");
8253 expect(v[475] == 1) catch @panic("test failure");
8254 expect(v[476] == 2) catch @panic("test failure");
8255 expect(v[477] == 3) catch @panic("test failure");
8256 expect(v[478] == 4) catch @panic("test failure");
8257 expect(v[479] == 5) catch @panic("test failure");
8258 expect(v[480] == 6) catch @panic("test failure");
8259 expect(v[481] == 7) catch @panic("test failure");
8260 expect(v[482] == 8) catch @panic("test failure");
8261 expect(v[483] == 9) catch @panic("test failure");
8262 expect(v[484] == 10) catch @panic("test failure");
8263 expect(v[485] == 11) catch @panic("test failure");
8264 expect(v[486] == 12) catch @panic("test failure");
8265 expect(v[487] == 13) catch @panic("test failure");
8266 expect(v[488] == 14) catch @panic("test failure");
8267 expect(v[489] == 15) catch @panic("test failure");
8268 expect(v[490] == 16) catch @panic("test failure");
8269 expect(v[491] == 17) catch @panic("test failure");
8270 expect(v[492] == 18) catch @panic("test failure");
8271 expect(v[493] == 19) catch @panic("test failure");
8272 expect(v[494] == 20) catch @panic("test failure");
8273 expect(v[495] == 21) catch @panic("test failure");
8274 expect(v[496] == 22) catch @panic("test failure");
8275 expect(v[497] == 23) catch @panic("test failure");
8276 expect(v[498] == 24) catch @panic("test failure");
8277 expect(v[499] == 25) catch @panic("test failure");
8278 expect(v[500] == 26) catch @panic("test failure");
8279 expect(v[501] == 27) catch @panic("test failure");
8280 expect(v[502] == 28) catch @panic("test failure");
8281 expect(v[503] == 29) catch @panic("test failure");
8282 expect(v[504] == 30) catch @panic("test failure");
8283 expect(v[505] == 31) catch @panic("test failure");
8284 expect(v[506] == 32) catch @panic("test failure");
8285 expect(v[507] == 33) catch @panic("test failure");
8286 expect(v[508] == 34) catch @panic("test failure");
8287 expect(v[509] == 35) catch @panic("test failure");
8288 expect(v[510] == 36) catch @panic("test failure");
8289 expect(v[511] == 37) catch @panic("test failure");
8290 expect(i == 512) catch @panic("test failure");
8291}
8292
8293extern fn c_ret_vector_512_u8() @Vector(512, u8);
8294extern fn c_vector_512_u8(@Vector(512, u8), usize) void;
8295extern fn c_test_vector_512_u8() void;
8296
8297test "@Vector(512, u8)" {
8298 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
8299 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
8300 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
8301 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
8302 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
8303
8304 const v = c_ret_vector_512_u8();
8305 try expect(v[0] == 38);
8306 try expect(v[1] == 39);
8307 try expect(v[2] == 40);
8308 try expect(v[3] == 41);
8309 try expect(v[4] == 42);
8310 try expect(v[5] == 43);
8311 try expect(v[6] == 44);
8312 try expect(v[7] == 45);
8313 try expect(v[8] == 46);
8314 try expect(v[9] == 47);
8315 try expect(v[10] == 48);
8316 try expect(v[11] == 49);
8317 try expect(v[12] == 50);
8318 try expect(v[13] == 51);
8319 try expect(v[14] == 52);
8320 try expect(v[15] == 53);
8321 try expect(v[16] == 54);
8322 try expect(v[17] == 55);
8323 try expect(v[18] == 56);
8324 try expect(v[19] == 57);
8325 try expect(v[20] == 58);
8326 try expect(v[21] == 59);
8327 try expect(v[22] == 60);
8328 try expect(v[23] == 61);
8329 try expect(v[24] == 62);
8330 try expect(v[25] == 63);
8331 try expect(v[26] == 64);
8332 try expect(v[27] == 65);
8333 try expect(v[28] == 66);
8334 try expect(v[29] == 67);
8335 try expect(v[30] == 68);
8336 try expect(v[31] == 69);
8337 try expect(v[32] == 70);
8338 try expect(v[33] == 71);
8339 try expect(v[34] == 72);
8340 try expect(v[35] == 73);
8341 try expect(v[36] == 74);
8342 try expect(v[37] == 75);
8343 try expect(v[38] == 76);
8344 try expect(v[39] == 77);
8345 try expect(v[40] == 78);
8346 try expect(v[41] == 79);
8347 try expect(v[42] == 80);
8348 try expect(v[43] == 81);
8349 try expect(v[44] == 82);
8350 try expect(v[45] == 83);
8351 try expect(v[46] == 84);
8352 try expect(v[47] == 85);
8353 try expect(v[48] == 86);
8354 try expect(v[49] == 87);
8355 try expect(v[50] == 88);
8356 try expect(v[51] == 89);
8357 try expect(v[52] == 90);
8358 try expect(v[53] == 91);
8359 try expect(v[54] == 92);
8360 try expect(v[55] == 93);
8361 try expect(v[56] == 94);
8362 try expect(v[57] == 95);
8363 try expect(v[58] == 96);
8364 try expect(v[59] == 97);
8365 try expect(v[60] == 98);
8366 try expect(v[61] == 99);
8367 try expect(v[62] == 0);
8368 try expect(v[63] == 1);
8369 try expect(v[64] == 2);
8370 try expect(v[65] == 3);
8371 try expect(v[66] == 4);
8372 try expect(v[67] == 5);
8373 try expect(v[68] == 6);
8374 try expect(v[69] == 7);
8375 try expect(v[70] == 8);
8376 try expect(v[71] == 9);
8377 try expect(v[72] == 10);
8378 try expect(v[73] == 11);
8379 try expect(v[74] == 12);
8380 try expect(v[75] == 13);
8381 try expect(v[76] == 14);
8382 try expect(v[77] == 15);
8383 try expect(v[78] == 16);
8384 try expect(v[79] == 17);
8385 try expect(v[80] == 18);
8386 try expect(v[81] == 19);
8387 try expect(v[82] == 20);
8388 try expect(v[83] == 21);
8389 try expect(v[84] == 22);
8390 try expect(v[85] == 23);
8391 try expect(v[86] == 24);
8392 try expect(v[87] == 25);
8393 try expect(v[88] == 26);
8394 try expect(v[89] == 27);
8395 try expect(v[90] == 28);
8396 try expect(v[91] == 29);
8397 try expect(v[92] == 30);
8398 try expect(v[93] == 31);
8399 try expect(v[94] == 32);
8400 try expect(v[95] == 33);
8401 try expect(v[96] == 34);
8402 try expect(v[97] == 35);
8403 try expect(v[98] == 36);
8404 try expect(v[99] == 37);
8405 try expect(v[100] == 38);
8406 try expect(v[101] == 39);
8407 try expect(v[102] == 40);
8408 try expect(v[103] == 41);
8409 try expect(v[104] == 42);
8410 try expect(v[105] == 43);
8411 try expect(v[106] == 44);
8412 try expect(v[107] == 45);
8413 try expect(v[108] == 46);
8414 try expect(v[109] == 47);
8415 try expect(v[110] == 48);
8416 try expect(v[111] == 49);
8417 try expect(v[112] == 50);
8418 try expect(v[113] == 51);
8419 try expect(v[114] == 52);
8420 try expect(v[115] == 53);
8421 try expect(v[116] == 54);
8422 try expect(v[117] == 55);
8423 try expect(v[118] == 56);
8424 try expect(v[119] == 57);
8425 try expect(v[120] == 58);
8426 try expect(v[121] == 59);
8427 try expect(v[122] == 60);
8428 try expect(v[123] == 61);
8429 try expect(v[124] == 62);
8430 try expect(v[125] == 63);
8431 try expect(v[126] == 64);
8432 try expect(v[127] == 65);
8433 try expect(v[128] == 66);
8434 try expect(v[129] == 67);
8435 try expect(v[130] == 68);
8436 try expect(v[131] == 69);
8437 try expect(v[132] == 70);
8438 try expect(v[133] == 71);
8439 try expect(v[134] == 72);
8440 try expect(v[135] == 73);
8441 try expect(v[136] == 74);
8442 try expect(v[137] == 75);
8443 try expect(v[138] == 76);
8444 try expect(v[139] == 77);
8445 try expect(v[140] == 78);
8446 try expect(v[141] == 79);
8447 try expect(v[142] == 80);
8448 try expect(v[143] == 81);
8449 try expect(v[144] == 82);
8450 try expect(v[145] == 83);
8451 try expect(v[146] == 84);
8452 try expect(v[147] == 85);
8453 try expect(v[148] == 86);
8454 try expect(v[149] == 87);
8455 try expect(v[150] == 88);
8456 try expect(v[151] == 89);
8457 try expect(v[152] == 90);
8458 try expect(v[153] == 91);
8459 try expect(v[154] == 92);
8460 try expect(v[155] == 93);
8461 try expect(v[156] == 94);
8462 try expect(v[157] == 95);
8463 try expect(v[158] == 96);
8464 try expect(v[159] == 97);
8465 try expect(v[160] == 98);
8466 try expect(v[161] == 99);
8467 try expect(v[162] == 0);
8468 try expect(v[163] == 1);
8469 try expect(v[164] == 2);
8470 try expect(v[165] == 3);
8471 try expect(v[166] == 4);
8472 try expect(v[167] == 5);
8473 try expect(v[168] == 6);
8474 try expect(v[169] == 7);
8475 try expect(v[170] == 8);
8476 try expect(v[171] == 9);
8477 try expect(v[172] == 10);
8478 try expect(v[173] == 11);
8479 try expect(v[174] == 12);
8480 try expect(v[175] == 13);
8481 try expect(v[176] == 14);
8482 try expect(v[177] == 15);
8483 try expect(v[178] == 16);
8484 try expect(v[179] == 17);
8485 try expect(v[180] == 18);
8486 try expect(v[181] == 19);
8487 try expect(v[182] == 20);
8488 try expect(v[183] == 21);
8489 try expect(v[184] == 22);
8490 try expect(v[185] == 23);
8491 try expect(v[186] == 24);
8492 try expect(v[187] == 25);
8493 try expect(v[188] == 26);
8494 try expect(v[189] == 27);
8495 try expect(v[190] == 28);
8496 try expect(v[191] == 29);
8497 try expect(v[192] == 30);
8498 try expect(v[193] == 31);
8499 try expect(v[194] == 32);
8500 try expect(v[195] == 33);
8501 try expect(v[196] == 34);
8502 try expect(v[197] == 35);
8503 try expect(v[198] == 36);
8504 try expect(v[199] == 37);
8505 try expect(v[200] == 38);
8506 try expect(v[201] == 39);
8507 try expect(v[202] == 40);
8508 try expect(v[203] == 41);
8509 try expect(v[204] == 42);
8510 try expect(v[205] == 43);
8511 try expect(v[206] == 44);
8512 try expect(v[207] == 45);
8513 try expect(v[208] == 46);
8514 try expect(v[209] == 47);
8515 try expect(v[210] == 48);
8516 try expect(v[211] == 49);
8517 try expect(v[212] == 50);
8518 try expect(v[213] == 51);
8519 try expect(v[214] == 52);
8520 try expect(v[215] == 53);
8521 try expect(v[216] == 54);
8522 try expect(v[217] == 55);
8523 try expect(v[218] == 56);
8524 try expect(v[219] == 57);
8525 try expect(v[220] == 58);
8526 try expect(v[221] == 59);
8527 try expect(v[222] == 60);
8528 try expect(v[223] == 61);
8529 try expect(v[224] == 62);
8530 try expect(v[225] == 63);
8531 try expect(v[226] == 64);
8532 try expect(v[227] == 65);
8533 try expect(v[228] == 66);
8534 try expect(v[229] == 67);
8535 try expect(v[230] == 68);
8536 try expect(v[231] == 69);
8537 try expect(v[232] == 70);
8538 try expect(v[233] == 71);
8539 try expect(v[234] == 72);
8540 try expect(v[235] == 73);
8541 try expect(v[236] == 74);
8542 try expect(v[237] == 75);
8543 try expect(v[238] == 76);
8544 try expect(v[239] == 77);
8545 try expect(v[240] == 78);
8546 try expect(v[241] == 79);
8547 try expect(v[242] == 80);
8548 try expect(v[243] == 81);
8549 try expect(v[244] == 82);
8550 try expect(v[245] == 83);
8551 try expect(v[246] == 84);
8552 try expect(v[247] == 85);
8553 try expect(v[248] == 86);
8554 try expect(v[249] == 87);
8555 try expect(v[250] == 88);
8556 try expect(v[251] == 89);
8557 try expect(v[252] == 90);
8558 try expect(v[253] == 91);
8559 try expect(v[254] == 92);
8560 try expect(v[255] == 93);
8561 try expect(v[256] == 94);
8562 try expect(v[257] == 95);
8563 try expect(v[258] == 96);
8564 try expect(v[259] == 97);
8565 try expect(v[260] == 98);
8566 try expect(v[261] == 99);
8567 try expect(v[262] == 0);
8568 try expect(v[263] == 1);
8569 try expect(v[264] == 2);
8570 try expect(v[265] == 3);
8571 try expect(v[266] == 4);
8572 try expect(v[267] == 5);
8573 try expect(v[268] == 6);
8574 try expect(v[269] == 7);
8575 try expect(v[270] == 8);
8576 try expect(v[271] == 9);
8577 try expect(v[272] == 10);
8578 try expect(v[273] == 11);
8579 try expect(v[274] == 12);
8580 try expect(v[275] == 13);
8581 try expect(v[276] == 14);
8582 try expect(v[277] == 15);
8583 try expect(v[278] == 16);
8584 try expect(v[279] == 17);
8585 try expect(v[280] == 18);
8586 try expect(v[281] == 19);
8587 try expect(v[282] == 20);
8588 try expect(v[283] == 21);
8589 try expect(v[284] == 22);
8590 try expect(v[285] == 23);
8591 try expect(v[286] == 24);
8592 try expect(v[287] == 25);
8593 try expect(v[288] == 26);
8594 try expect(v[289] == 27);
8595 try expect(v[290] == 28);
8596 try expect(v[291] == 29);
8597 try expect(v[292] == 30);
8598 try expect(v[293] == 31);
8599 try expect(v[294] == 32);
8600 try expect(v[295] == 33);
8601 try expect(v[296] == 34);
8602 try expect(v[297] == 35);
8603 try expect(v[298] == 36);
8604 try expect(v[299] == 37);
8605 try expect(v[300] == 38);
8606 try expect(v[301] == 39);
8607 try expect(v[302] == 40);
8608 try expect(v[303] == 41);
8609 try expect(v[304] == 42);
8610 try expect(v[305] == 43);
8611 try expect(v[306] == 44);
8612 try expect(v[307] == 45);
8613 try expect(v[308] == 46);
8614 try expect(v[309] == 47);
8615 try expect(v[310] == 48);
8616 try expect(v[311] == 49);
8617 try expect(v[312] == 50);
8618 try expect(v[313] == 51);
8619 try expect(v[314] == 52);
8620 try expect(v[315] == 53);
8621 try expect(v[316] == 54);
8622 try expect(v[317] == 55);
8623 try expect(v[318] == 56);
8624 try expect(v[319] == 57);
8625 try expect(v[320] == 58);
8626 try expect(v[321] == 59);
8627 try expect(v[322] == 60);
8628 try expect(v[323] == 61);
8629 try expect(v[324] == 62);
8630 try expect(v[325] == 63);
8631 try expect(v[326] == 64);
8632 try expect(v[327] == 65);
8633 try expect(v[328] == 66);
8634 try expect(v[329] == 67);
8635 try expect(v[330] == 68);
8636 try expect(v[331] == 69);
8637 try expect(v[332] == 70);
8638 try expect(v[333] == 71);
8639 try expect(v[334] == 72);
8640 try expect(v[335] == 73);
8641 try expect(v[336] == 74);
8642 try expect(v[337] == 75);
8643 try expect(v[338] == 76);
8644 try expect(v[339] == 77);
8645 try expect(v[340] == 78);
8646 try expect(v[341] == 79);
8647 try expect(v[342] == 80);
8648 try expect(v[343] == 81);
8649 try expect(v[344] == 82);
8650 try expect(v[345] == 83);
8651 try expect(v[346] == 84);
8652 try expect(v[347] == 85);
8653 try expect(v[348] == 86);
8654 try expect(v[349] == 87);
8655 try expect(v[350] == 88);
8656 try expect(v[351] == 89);
8657 try expect(v[352] == 90);
8658 try expect(v[353] == 91);
8659 try expect(v[354] == 92);
8660 try expect(v[355] == 93);
8661 try expect(v[356] == 94);
8662 try expect(v[357] == 95);
8663 try expect(v[358] == 96);
8664 try expect(v[359] == 97);
8665 try expect(v[360] == 98);
8666 try expect(v[361] == 99);
8667 try expect(v[362] == 0);
8668 try expect(v[363] == 1);
8669 try expect(v[364] == 2);
8670 try expect(v[365] == 3);
8671 try expect(v[366] == 4);
8672 try expect(v[367] == 5);
8673 try expect(v[368] == 6);
8674 try expect(v[369] == 7);
8675 try expect(v[370] == 8);
8676 try expect(v[371] == 9);
8677 try expect(v[372] == 10);
8678 try expect(v[373] == 11);
8679 try expect(v[374] == 12);
8680 try expect(v[375] == 13);
8681 try expect(v[376] == 14);
8682 try expect(v[377] == 15);
8683 try expect(v[378] == 16);
8684 try expect(v[379] == 17);
8685 try expect(v[380] == 18);
8686 try expect(v[381] == 19);
8687 try expect(v[382] == 20);
8688 try expect(v[383] == 21);
8689 try expect(v[384] == 22);
8690 try expect(v[385] == 23);
8691 try expect(v[386] == 24);
8692 try expect(v[387] == 25);
8693 try expect(v[388] == 26);
8694 try expect(v[389] == 27);
8695 try expect(v[390] == 28);
8696 try expect(v[391] == 29);
8697 try expect(v[392] == 30);
8698 try expect(v[393] == 31);
8699 try expect(v[394] == 32);
8700 try expect(v[395] == 33);
8701 try expect(v[396] == 34);
8702 try expect(v[397] == 35);
8703 try expect(v[398] == 36);
8704 try expect(v[399] == 37);
8705 try expect(v[400] == 38);
8706 try expect(v[401] == 39);
8707 try expect(v[402] == 40);
8708 try expect(v[403] == 41);
8709 try expect(v[404] == 42);
8710 try expect(v[405] == 43);
8711 try expect(v[406] == 44);
8712 try expect(v[407] == 45);
8713 try expect(v[408] == 46);
8714 try expect(v[409] == 47);
8715 try expect(v[410] == 48);
8716 try expect(v[411] == 49);
8717 try expect(v[412] == 50);
8718 try expect(v[413] == 51);
8719 try expect(v[414] == 52);
8720 try expect(v[415] == 53);
8721 try expect(v[416] == 54);
8722 try expect(v[417] == 55);
8723 try expect(v[418] == 56);
8724 try expect(v[419] == 57);
8725 try expect(v[420] == 58);
8726 try expect(v[421] == 59);
8727 try expect(v[422] == 60);
8728 try expect(v[423] == 61);
8729 try expect(v[424] == 62);
8730 try expect(v[425] == 63);
8731 try expect(v[426] == 64);
8732 try expect(v[427] == 65);
8733 try expect(v[428] == 66);
8734 try expect(v[429] == 67);
8735 try expect(v[430] == 68);
8736 try expect(v[431] == 69);
8737 try expect(v[432] == 70);
8738 try expect(v[433] == 71);
8739 try expect(v[434] == 72);
8740 try expect(v[435] == 73);
8741 try expect(v[436] == 74);
8742 try expect(v[437] == 75);
8743 try expect(v[438] == 76);
8744 try expect(v[439] == 77);
8745 try expect(v[440] == 78);
8746 try expect(v[441] == 79);
8747 try expect(v[442] == 80);
8748 try expect(v[443] == 81);
8749 try expect(v[444] == 82);
8750 try expect(v[445] == 83);
8751 try expect(v[446] == 84);
8752 try expect(v[447] == 85);
8753 try expect(v[448] == 86);
8754 try expect(v[449] == 87);
8755 try expect(v[450] == 88);
8756 try expect(v[451] == 89);
8757 try expect(v[452] == 90);
8758 try expect(v[453] == 91);
8759 try expect(v[454] == 92);
8760 try expect(v[455] == 93);
8761 try expect(v[456] == 94);
8762 try expect(v[457] == 95);
8763 try expect(v[458] == 96);
8764 try expect(v[459] == 97);
8765 try expect(v[460] == 98);
8766 try expect(v[461] == 99);
8767 try expect(v[462] == 0);
8768 try expect(v[463] == 1);
8769 try expect(v[464] == 2);
8770 try expect(v[465] == 3);
8771 try expect(v[466] == 4);
8772 try expect(v[467] == 5);
8773 try expect(v[468] == 6);
8774 try expect(v[469] == 7);
8775 try expect(v[470] == 8);
8776 try expect(v[471] == 9);
8777 try expect(v[472] == 10);
8778 try expect(v[473] == 11);
8779 try expect(v[474] == 12);
8780 try expect(v[475] == 13);
8781 try expect(v[476] == 14);
8782 try expect(v[477] == 15);
8783 try expect(v[478] == 16);
8784 try expect(v[479] == 17);
8785 try expect(v[480] == 18);
8786 try expect(v[481] == 19);
8787 try expect(v[482] == 20);
8788 try expect(v[483] == 21);
8789 try expect(v[484] == 22);
8790 try expect(v[485] == 23);
8791 try expect(v[486] == 24);
8792 try expect(v[487] == 25);
8793 try expect(v[488] == 26);
8794 try expect(v[489] == 27);
8795 try expect(v[490] == 28);
8796 try expect(v[491] == 29);
8797 try expect(v[492] == 30);
8798 try expect(v[493] == 31);
8799 try expect(v[494] == 32);
8800 try expect(v[495] == 33);
8801 try expect(v[496] == 34);
8802 try expect(v[497] == 35);
8803 try expect(v[498] == 36);
8804 try expect(v[499] == 37);
8805 try expect(v[500] == 38);
8806 try expect(v[501] == 39);
8807 try expect(v[502] == 40);
8808 try expect(v[503] == 41);
8809 try expect(v[504] == 42);
8810 try expect(v[505] == 43);
8811 try expect(v[506] == 44);
8812 try expect(v[507] == 45);
8813 try expect(v[508] == 46);
8814 try expect(v[509] == 47);
8815 try expect(v[510] == 48);
8816 try expect(v[511] == 49);
8817 c_vector_512_u8(.{
8818 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
8819 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
8820 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
8821 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
8822 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
8823 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
8824 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
8825 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
8826 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
8827 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
8828 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
8829 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
8830 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
8831 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
8832 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
8833 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1, 2, 3, 4, 5,
8834 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
8835 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
8836 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
8837 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
8838 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
8839 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 0, 1,
8840 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
8841 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
8842 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
8843 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
8844 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,
8845 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
8846 98, 99, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
8847 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
8848 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
8849 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
8850 }, 512);
8851 c_test_vector_512_u8();
8852}
8853
8854export fn zig_ret_vector_1_u16() @Vector(1, u16) {
8855 return .{1};
8856}
8857export fn zig_vector_1_u16(v: @Vector(1, u16), i: usize) void {
8858 expect(v[0] == 2) catch @panic("test failure");
8859 expect(i == 1) catch @panic("test failure");
8860}
8861
8862extern fn c_ret_vector_1_u16() @Vector(1, u16);
8863extern fn c_vector_1_u16(@Vector(1, u16), usize) void;
8864extern fn c_test_vector_1_u16() void;
8865
8866test "@Vector(1, u16)" {
8867 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
8868 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
8869 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
8870
8871 const v = c_ret_vector_1_u16();
8872 try expect(v[0] == 3);
8873 c_vector_1_u16(.{4}, 1);
8874 c_test_vector_1_u16();
8875}
8876
8877export fn zig_ret_vector_2_u16() @Vector(2, u16) {
8878 return .{ 5, 6 };
8879}
8880export fn zig_vector_2_u16(v: @Vector(2, u16), i: usize) void {
8881 expect(v[0] == 7) catch @panic("test failure");
8882 expect(v[1] == 8) catch @panic("test failure");
8883 expect(i == 2) catch @panic("test failure");
8884}
8885
8886extern fn c_ret_vector_2_u16() @Vector(2, u16);
8887extern fn c_vector_2_u16(@Vector(2, u16), usize) void;
8888extern fn c_test_vector_2_u16() void;
8889
8890test "@Vector(2, u16)" {
8891 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
8892 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
8893 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
8894 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
8895 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
8896 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64) return error.SkipZigTest;
8897
8898 const v = c_ret_vector_2_u16();
8899 try expect(v[0] == 9);
8900 try expect(v[1] == 10);
8901 c_vector_2_u16(.{ 11, 12 }, 2);
8902 c_test_vector_2_u16();
8903}
8904
8905export fn zig_ret_vector_3_u16() @Vector(3, u16) {
8906 return .{ 13, 14, 15 };
8907}
8908export fn zig_vector_3_u16(v: @Vector(3, u16), i: usize) void {
8909 expect(v[0] == 16) catch @panic("test failure");
8910 expect(v[1] == 17) catch @panic("test failure");
8911 expect(v[2] == 18) catch @panic("test failure");
8912 expect(i == 3) catch @panic("test failure");
8913}
8914
8915extern fn c_ret_vector_3_u16() @Vector(3, u16);
8916extern fn c_vector_3_u16(@Vector(3, u16), usize) void;
8917extern fn c_test_vector_3_u16() void;
8918
8919test "@Vector(3, u16)" {
8920 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
8921 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
8922 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
8923 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
8924 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag != .windows) return error.SkipZigTest;
8925
8926 const v = c_ret_vector_3_u16();
8927 try expect(v[0] == 19);
8928 try expect(v[1] == 20);
8929 try expect(v[2] == 21);
8930 c_vector_3_u16(.{ 22, 23, 24 }, 3);
8931 c_test_vector_3_u16();
8932}
8933
8934export fn zig_ret_vector_4_u16() @Vector(4, u16) {
8935 return .{ 25, 26, 27, 28 };
8936}
8937export fn zig_vector_4_u16(v: @Vector(4, u16), i: usize) void {
8938 expect(v[0] == 29) catch @panic("test failure");
8939 expect(v[1] == 30) catch @panic("test failure");
8940 expect(v[2] == 31) catch @panic("test failure");
8941 expect(v[3] == 32) catch @panic("test failure");
8942 expect(i == 4) catch @panic("test failure");
8943}
8944export fn zig_vector_4_u16_vector_4_u16(v0: @Vector(4, u16), v1: @Vector(4, u16), i: usize) void {
8945 expect(v0[0] == 33) catch @panic("test failure");
8946 expect(v0[1] == 34) catch @panic("test failure");
8947 expect(v0[2] == 35) catch @panic("test failure");
8948 expect(v0[3] == 36) catch @panic("test failure");
8949 expect(v1[0] == 37) catch @panic("test failure");
8950 expect(v1[1] == 38) catch @panic("test failure");
8951 expect(v1[2] == 39) catch @panic("test failure");
8952 expect(v1[3] == 40) catch @panic("test failure");
8953 expect(i == 8) catch @panic("test failure");
8954}
8955
8956extern fn c_ret_vector_4_u16() @Vector(4, u16);
8957extern fn c_vector_4_u16(@Vector(4, u16), usize) void;
8958extern fn c_vector_4_u16_vector_4_u16(@Vector(4, u16), @Vector(4, u16), usize) void;
8959extern fn c_test_vector_4_u16() void;
8960
8961test "@Vector(4, u16)" {
8962 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
8963 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
8964 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
8965 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .windows) return error.SkipZigTest;
8966
8967 const v = c_ret_vector_4_u16();
8968 try expect(v[0] == 41);
8969 try expect(v[1] == 42);
8970 try expect(v[2] == 43);
8971 try expect(v[3] == 44);
8972 c_vector_4_u16(.{ 45, 46, 47, 48 }, 4);
8973 c_vector_4_u16_vector_4_u16(.{ 49, 50, 51, 52 }, .{ 53, 54, 55, 56 }, 8);
8974 c_test_vector_4_u16();
8975}
8976
8977export fn zig_ret_vector_6_u16() @Vector(6, u16) {
8978 return .{ 41, 42, 43, 44, 45, 46 };
8979}
8980export fn zig_vector_6_u16(v: @Vector(6, u16), i: usize) void {
8981 expect(v[0] == 47) catch @panic("test failure");
8982 expect(v[1] == 48) catch @panic("test failure");
8983 expect(v[2] == 49) catch @panic("test failure");
8984 expect(v[3] == 50) catch @panic("test failure");
8985 expect(v[4] == 51) catch @panic("test failure");
8986 expect(v[5] == 52) catch @panic("test failure");
8987 expect(i == 6) catch @panic("test failure");
8988}
8989
8990extern fn c_ret_vector_6_u16() @Vector(6, u16);
8991extern fn c_vector_6_u16(@Vector(6, u16), usize) void;
8992extern fn c_test_vector_6_u16() void;
8993
8994test "@Vector(6, u16)" {
8995 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
8996 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
8997 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
8998
8999 const v = c_ret_vector_6_u16();
9000 try expect(v[0] == 53);
9001 try expect(v[1] == 54);
9002 try expect(v[2] == 55);
9003 try expect(v[3] == 56);
9004 try expect(v[4] == 57);
9005 try expect(v[5] == 58);
9006 c_vector_6_u16(.{ 59, 60, 61, 62, 63, 64 }, 6);
9007 c_test_vector_6_u16();
9008}
9009
9010export fn zig_ret_vector_8_u16() @Vector(8, u16) {
9011 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
9012}
9013export fn zig_vector_8_u16(v: @Vector(8, u16), i: usize) void {
9014 expect(v[0] == 73) catch @panic("test failure");
9015 expect(v[1] == 74) catch @panic("test failure");
9016 expect(v[2] == 75) catch @panic("test failure");
9017 expect(v[3] == 76) catch @panic("test failure");
9018 expect(v[4] == 77) catch @panic("test failure");
9019 expect(v[5] == 78) catch @panic("test failure");
9020 expect(v[6] == 79) catch @panic("test failure");
9021 expect(v[7] == 80) catch @panic("test failure");
9022 expect(i == 8) catch @panic("test failure");
9023}
9024
9025extern fn c_ret_vector_8_u16() @Vector(8, u16);
9026extern fn c_vector_8_u16(@Vector(8, u16), usize) void;
9027extern fn c_test_vector_8_u16() void;
9028
9029test "@Vector(8, u16)" {
9030 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9031
9032 const v = c_ret_vector_8_u16();
9033 try expect(v[0] == 81);
9034 try expect(v[1] == 82);
9035 try expect(v[2] == 83);
9036 try expect(v[3] == 84);
9037 try expect(v[4] == 85);
9038 try expect(v[5] == 86);
9039 try expect(v[6] == 87);
9040 try expect(v[7] == 88);
9041 c_vector_8_u16(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
9042 c_test_vector_8_u16();
9043}
9044
9045export fn zig_ret_vector_12_u16() @Vector(12, u16) {
9046 return .{ 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108 };
9047}
9048export fn zig_vector_12_u16(v: @Vector(12, u16), i: usize) void {
9049 expect(v[0] == 109) catch @panic("test failure");
9050 expect(v[1] == 110) catch @panic("test failure");
9051 expect(v[2] == 111) catch @panic("test failure");
9052 expect(v[3] == 112) catch @panic("test failure");
9053 expect(v[4] == 113) catch @panic("test failure");
9054 expect(v[5] == 114) catch @panic("test failure");
9055 expect(v[6] == 115) catch @panic("test failure");
9056 expect(v[7] == 116) catch @panic("test failure");
9057 expect(v[8] == 117) catch @panic("test failure");
9058 expect(v[9] == 118) catch @panic("test failure");
9059 expect(v[10] == 119) catch @panic("test failure");
9060 expect(v[11] == 120) catch @panic("test failure");
9061 expect(i == 12) catch @panic("test failure");
9062}
9063
9064extern fn c_ret_vector_12_u16() @Vector(12, u16);
9065extern fn c_vector_12_u16(@Vector(12, u16), usize) void;
9066extern fn c_test_vector_12_u16() void;
9067
9068test "@Vector(12, u16)" {
9069 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9070 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9071 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
9072 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9073 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9074
9075 const v = c_ret_vector_12_u16();
9076 try expect(v[0] == 121);
9077 try expect(v[1] == 122);
9078 try expect(v[2] == 123);
9079 try expect(v[3] == 124);
9080 try expect(v[4] == 125);
9081 try expect(v[5] == 126);
9082 try expect(v[6] == 127);
9083 try expect(v[7] == 128);
9084 try expect(v[8] == 129);
9085 try expect(v[9] == 130);
9086 try expect(v[10] == 131);
9087 try expect(v[11] == 132);
9088 c_vector_12_u16(.{ 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 }, 12);
9089 c_test_vector_12_u16();
9090}
9091
9092export fn zig_ret_vector_16_u16() @Vector(16, u16) {
9093 return .{ 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160 };
9094}
9095export fn zig_vector_16_u16(v: @Vector(16, u16), i: usize) void {
9096 expect(v[0] == 161) catch @panic("test failure");
9097 expect(v[1] == 162) catch @panic("test failure");
9098 expect(v[2] == 163) catch @panic("test failure");
9099 expect(v[3] == 164) catch @panic("test failure");
9100 expect(v[4] == 165) catch @panic("test failure");
9101 expect(v[5] == 166) catch @panic("test failure");
9102 expect(v[6] == 167) catch @panic("test failure");
9103 expect(v[7] == 168) catch @panic("test failure");
9104 expect(v[8] == 169) catch @panic("test failure");
9105 expect(v[9] == 170) catch @panic("test failure");
9106 expect(v[10] == 171) catch @panic("test failure");
9107 expect(v[11] == 172) catch @panic("test failure");
9108 expect(v[12] == 173) catch @panic("test failure");
9109 expect(v[13] == 174) catch @panic("test failure");
9110 expect(v[14] == 175) catch @panic("test failure");
9111 expect(v[15] == 176) catch @panic("test failure");
9112 expect(i == 16) catch @panic("test failure");
9113}
9114
9115extern fn c_ret_vector_16_u16() @Vector(16, u16);
9116extern fn c_vector_16_u16(@Vector(16, u16), usize) void;
9117extern fn c_test_vector_16_u16() void;
9118
9119test "@Vector(16, u16)" {
9120 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9121 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9122 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9123 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9124
9125 const v = c_ret_vector_16_u16();
9126 try expect(v[0] == 177);
9127 try expect(v[1] == 178);
9128 try expect(v[2] == 179);
9129 try expect(v[3] == 180);
9130 try expect(v[4] == 181);
9131 try expect(v[5] == 182);
9132 try expect(v[6] == 183);
9133 try expect(v[7] == 184);
9134 try expect(v[8] == 185);
9135 try expect(v[9] == 186);
9136 try expect(v[10] == 187);
9137 try expect(v[11] == 188);
9138 try expect(v[12] == 189);
9139 try expect(v[13] == 190);
9140 try expect(v[14] == 191);
9141 try expect(v[15] == 192);
9142 c_vector_16_u16(.{ 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208 }, 16);
9143 c_test_vector_16_u16();
9144}
9145
9146export fn zig_ret_vector_24_u16() @Vector(24, u16) {
9147 return .{
9148 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224,
9149 225, 226, 227, 228, 229, 230, 231, 232,
9150 };
9151}
9152export fn zig_vector_24_u16(v: @Vector(24, u16), i: usize) void {
9153 expect(v[0] == 233) catch @panic("test failure");
9154 expect(v[1] == 234) catch @panic("test failure");
9155 expect(v[2] == 235) catch @panic("test failure");
9156 expect(v[3] == 236) catch @panic("test failure");
9157 expect(v[4] == 237) catch @panic("test failure");
9158 expect(v[5] == 238) catch @panic("test failure");
9159 expect(v[6] == 239) catch @panic("test failure");
9160 expect(v[7] == 240) catch @panic("test failure");
9161 expect(v[8] == 241) catch @panic("test failure");
9162 expect(v[9] == 242) catch @panic("test failure");
9163 expect(v[10] == 243) catch @panic("test failure");
9164 expect(v[11] == 244) catch @panic("test failure");
9165 expect(v[12] == 245) catch @panic("test failure");
9166 expect(v[13] == 246) catch @panic("test failure");
9167 expect(v[14] == 247) catch @panic("test failure");
9168 expect(v[15] == 248) catch @panic("test failure");
9169 expect(v[16] == 249) catch @panic("test failure");
9170 expect(v[17] == 250) catch @panic("test failure");
9171 expect(v[18] == 251) catch @panic("test failure");
9172 expect(v[19] == 252) catch @panic("test failure");
9173 expect(v[20] == 253) catch @panic("test failure");
9174 expect(v[21] == 254) catch @panic("test failure");
9175 expect(v[22] == 255) catch @panic("test failure");
9176 expect(v[23] == 256) catch @panic("test failure");
9177 expect(i == 24) catch @panic("test failure");
9178}
9179
9180extern fn c_ret_vector_24_u16() @Vector(24, u16);
9181extern fn c_vector_24_u16(@Vector(24, u16), usize) void;
9182extern fn c_test_vector_24_u16() void;
9183
9184test "@Vector(24, u16)" {
9185 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9186 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9187 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
9188 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9189 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9190
9191 const v = c_ret_vector_24_u16();
9192 try expect(v[0] == 257);
9193 try expect(v[1] == 258);
9194 try expect(v[2] == 259);
9195 try expect(v[3] == 260);
9196 try expect(v[4] == 261);
9197 try expect(v[5] == 262);
9198 try expect(v[6] == 263);
9199 try expect(v[7] == 264);
9200 try expect(v[8] == 265);
9201 try expect(v[9] == 266);
9202 try expect(v[10] == 267);
9203 try expect(v[11] == 268);
9204 try expect(v[12] == 269);
9205 try expect(v[13] == 270);
9206 try expect(v[14] == 271);
9207 try expect(v[15] == 272);
9208 try expect(v[16] == 273);
9209 try expect(v[17] == 274);
9210 try expect(v[18] == 275);
9211 try expect(v[19] == 276);
9212 try expect(v[20] == 277);
9213 try expect(v[21] == 278);
9214 try expect(v[22] == 279);
9215 try expect(v[23] == 280);
9216 c_vector_24_u16(.{
9217 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296,
9218 297, 298, 299, 300, 301, 302, 303, 304,
9219 }, 24);
9220 c_test_vector_24_u16();
9221}
9222
9223export fn zig_ret_vector_32_u16() @Vector(32, u16) {
9224 return .{
9225 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320,
9226 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336,
9227 };
9228}
9229export fn zig_vector_32_u16(v: @Vector(32, u16), i: usize) void {
9230 expect(v[0] == 337) catch @panic("test failure");
9231 expect(v[1] == 338) catch @panic("test failure");
9232 expect(v[2] == 339) catch @panic("test failure");
9233 expect(v[3] == 340) catch @panic("test failure");
9234 expect(v[4] == 341) catch @panic("test failure");
9235 expect(v[5] == 342) catch @panic("test failure");
9236 expect(v[6] == 343) catch @panic("test failure");
9237 expect(v[7] == 344) catch @panic("test failure");
9238 expect(v[8] == 345) catch @panic("test failure");
9239 expect(v[9] == 346) catch @panic("test failure");
9240 expect(v[10] == 347) catch @panic("test failure");
9241 expect(v[11] == 348) catch @panic("test failure");
9242 expect(v[12] == 349) catch @panic("test failure");
9243 expect(v[13] == 350) catch @panic("test failure");
9244 expect(v[14] == 351) catch @panic("test failure");
9245 expect(v[15] == 352) catch @panic("test failure");
9246 expect(v[16] == 353) catch @panic("test failure");
9247 expect(v[17] == 354) catch @panic("test failure");
9248 expect(v[18] == 355) catch @panic("test failure");
9249 expect(v[19] == 356) catch @panic("test failure");
9250 expect(v[20] == 357) catch @panic("test failure");
9251 expect(v[21] == 358) catch @panic("test failure");
9252 expect(v[22] == 359) catch @panic("test failure");
9253 expect(v[23] == 360) catch @panic("test failure");
9254 expect(v[24] == 361) catch @panic("test failure");
9255 expect(v[25] == 362) catch @panic("test failure");
9256 expect(v[26] == 363) catch @panic("test failure");
9257 expect(v[27] == 364) catch @panic("test failure");
9258 expect(v[28] == 365) catch @panic("test failure");
9259 expect(v[29] == 366) catch @panic("test failure");
9260 expect(v[30] == 367) catch @panic("test failure");
9261 expect(v[31] == 368) catch @panic("test failure");
9262 expect(i == 32) catch @panic("test failure");
9263}
9264
9265extern fn c_ret_vector_32_u16() @Vector(32, u16);
9266extern fn c_vector_32_u16(@Vector(32, u16), usize) void;
9267extern fn c_test_vector_32_u16() void;
9268
9269test "@Vector(32, u16)" {
9270 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9271 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9272 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9273 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9274
9275 const v = c_ret_vector_32_u16();
9276 try expect(v[0] == 369);
9277 try expect(v[1] == 370);
9278 try expect(v[2] == 371);
9279 try expect(v[3] == 372);
9280 try expect(v[4] == 373);
9281 try expect(v[5] == 374);
9282 try expect(v[6] == 375);
9283 try expect(v[7] == 376);
9284 try expect(v[8] == 377);
9285 try expect(v[9] == 378);
9286 try expect(v[10] == 379);
9287 try expect(v[11] == 380);
9288 try expect(v[12] == 381);
9289 try expect(v[13] == 382);
9290 try expect(v[14] == 383);
9291 try expect(v[15] == 384);
9292 try expect(v[16] == 385);
9293 try expect(v[17] == 386);
9294 try expect(v[18] == 387);
9295 try expect(v[19] == 388);
9296 try expect(v[20] == 389);
9297 try expect(v[21] == 390);
9298 try expect(v[22] == 391);
9299 try expect(v[23] == 392);
9300 try expect(v[24] == 393);
9301 try expect(v[25] == 394);
9302 try expect(v[26] == 395);
9303 try expect(v[27] == 396);
9304 try expect(v[28] == 397);
9305 try expect(v[29] == 398);
9306 try expect(v[30] == 399);
9307 try expect(v[31] == 400);
9308 c_vector_32_u16(.{
9309 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416,
9310 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432,
9311 }, 32);
9312 c_test_vector_32_u16();
9313}
9314
9315export fn zig_ret_vector_48_u16() @Vector(48, u16) {
9316 return .{
9317 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448,
9318 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464,
9319 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,
9320 };
9321}
9322export fn zig_vector_48_u16(v: @Vector(48, u16), i: usize) void {
9323 expect(v[0] == 481) catch @panic("test failure");
9324 expect(v[1] == 482) catch @panic("test failure");
9325 expect(v[2] == 483) catch @panic("test failure");
9326 expect(v[3] == 484) catch @panic("test failure");
9327 expect(v[4] == 485) catch @panic("test failure");
9328 expect(v[5] == 486) catch @panic("test failure");
9329 expect(v[6] == 487) catch @panic("test failure");
9330 expect(v[7] == 488) catch @panic("test failure");
9331 expect(v[8] == 489) catch @panic("test failure");
9332 expect(v[9] == 490) catch @panic("test failure");
9333 expect(v[10] == 491) catch @panic("test failure");
9334 expect(v[11] == 492) catch @panic("test failure");
9335 expect(v[12] == 493) catch @panic("test failure");
9336 expect(v[13] == 494) catch @panic("test failure");
9337 expect(v[14] == 495) catch @panic("test failure");
9338 expect(v[15] == 496) catch @panic("test failure");
9339 expect(v[16] == 497) catch @panic("test failure");
9340 expect(v[17] == 498) catch @panic("test failure");
9341 expect(v[18] == 499) catch @panic("test failure");
9342 expect(v[19] == 500) catch @panic("test failure");
9343 expect(v[20] == 501) catch @panic("test failure");
9344 expect(v[21] == 502) catch @panic("test failure");
9345 expect(v[22] == 503) catch @panic("test failure");
9346 expect(v[23] == 504) catch @panic("test failure");
9347 expect(v[24] == 505) catch @panic("test failure");
9348 expect(v[25] == 506) catch @panic("test failure");
9349 expect(v[26] == 507) catch @panic("test failure");
9350 expect(v[27] == 508) catch @panic("test failure");
9351 expect(v[28] == 509) catch @panic("test failure");
9352 expect(v[29] == 510) catch @panic("test failure");
9353 expect(v[30] == 511) catch @panic("test failure");
9354 expect(v[31] == 512) catch @panic("test failure");
9355 expect(v[32] == 513) catch @panic("test failure");
9356 expect(v[33] == 514) catch @panic("test failure");
9357 expect(v[34] == 515) catch @panic("test failure");
9358 expect(v[35] == 516) catch @panic("test failure");
9359 expect(v[36] == 517) catch @panic("test failure");
9360 expect(v[37] == 518) catch @panic("test failure");
9361 expect(v[38] == 519) catch @panic("test failure");
9362 expect(v[39] == 520) catch @panic("test failure");
9363 expect(v[40] == 521) catch @panic("test failure");
9364 expect(v[41] == 522) catch @panic("test failure");
9365 expect(v[42] == 523) catch @panic("test failure");
9366 expect(v[43] == 524) catch @panic("test failure");
9367 expect(v[44] == 525) catch @panic("test failure");
9368 expect(v[45] == 526) catch @panic("test failure");
9369 expect(v[46] == 527) catch @panic("test failure");
9370 expect(v[47] == 528) catch @panic("test failure");
9371 expect(i == 48) catch @panic("test failure");
9372}
9373
9374extern fn c_ret_vector_48_u16() @Vector(48, u16);
9375extern fn c_vector_48_u16(@Vector(48, u16), usize) void;
9376extern fn c_test_vector_48_u16() void;
9377
9378test "@Vector(48, u16)" {
9379 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9380 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9381 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
9382 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9383 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9384
9385 const v = c_ret_vector_48_u16();
9386 try expect(v[0] == 529);
9387 try expect(v[1] == 530);
9388 try expect(v[2] == 531);
9389 try expect(v[3] == 532);
9390 try expect(v[4] == 533);
9391 try expect(v[5] == 534);
9392 try expect(v[6] == 535);
9393 try expect(v[7] == 536);
9394 try expect(v[8] == 537);
9395 try expect(v[9] == 538);
9396 try expect(v[10] == 539);
9397 try expect(v[11] == 540);
9398 try expect(v[12] == 541);
9399 try expect(v[13] == 542);
9400 try expect(v[14] == 543);
9401 try expect(v[15] == 544);
9402 try expect(v[16] == 545);
9403 try expect(v[17] == 546);
9404 try expect(v[18] == 547);
9405 try expect(v[19] == 548);
9406 try expect(v[20] == 549);
9407 try expect(v[21] == 550);
9408 try expect(v[22] == 551);
9409 try expect(v[23] == 552);
9410 try expect(v[24] == 553);
9411 try expect(v[25] == 554);
9412 try expect(v[26] == 555);
9413 try expect(v[27] == 556);
9414 try expect(v[28] == 557);
9415 try expect(v[29] == 558);
9416 try expect(v[30] == 559);
9417 try expect(v[31] == 560);
9418 try expect(v[32] == 561);
9419 try expect(v[33] == 562);
9420 try expect(v[34] == 563);
9421 try expect(v[35] == 564);
9422 try expect(v[36] == 565);
9423 try expect(v[37] == 566);
9424 try expect(v[38] == 567);
9425 try expect(v[39] == 568);
9426 try expect(v[40] == 569);
9427 try expect(v[41] == 570);
9428 try expect(v[42] == 571);
9429 try expect(v[43] == 572);
9430 try expect(v[44] == 573);
9431 try expect(v[45] == 574);
9432 try expect(v[46] == 575);
9433 try expect(v[47] == 576);
9434 c_vector_48_u16(.{
9435 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592,
9436 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608,
9437 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624,
9438 }, 48);
9439 c_test_vector_48_u16();
9440}
9441
9442export fn zig_ret_vector_64_u16() @Vector(64, u16) {
9443 return .{
9444 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640,
9445 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656,
9446 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672,
9447 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688,
9448 };
9449}
9450export fn zig_vector_64_u16(v: @Vector(64, u16), i: usize) void {
9451 expect(v[0] == 689) catch @panic("test failure");
9452 expect(v[1] == 690) catch @panic("test failure");
9453 expect(v[2] == 691) catch @panic("test failure");
9454 expect(v[3] == 692) catch @panic("test failure");
9455 expect(v[4] == 693) catch @panic("test failure");
9456 expect(v[5] == 694) catch @panic("test failure");
9457 expect(v[6] == 695) catch @panic("test failure");
9458 expect(v[7] == 696) catch @panic("test failure");
9459 expect(v[8] == 697) catch @panic("test failure");
9460 expect(v[9] == 698) catch @panic("test failure");
9461 expect(v[10] == 699) catch @panic("test failure");
9462 expect(v[11] == 700) catch @panic("test failure");
9463 expect(v[12] == 701) catch @panic("test failure");
9464 expect(v[13] == 702) catch @panic("test failure");
9465 expect(v[14] == 703) catch @panic("test failure");
9466 expect(v[15] == 704) catch @panic("test failure");
9467 expect(v[16] == 705) catch @panic("test failure");
9468 expect(v[17] == 706) catch @panic("test failure");
9469 expect(v[18] == 707) catch @panic("test failure");
9470 expect(v[19] == 708) catch @panic("test failure");
9471 expect(v[20] == 709) catch @panic("test failure");
9472 expect(v[21] == 710) catch @panic("test failure");
9473 expect(v[22] == 711) catch @panic("test failure");
9474 expect(v[23] == 712) catch @panic("test failure");
9475 expect(v[24] == 713) catch @panic("test failure");
9476 expect(v[25] == 714) catch @panic("test failure");
9477 expect(v[26] == 715) catch @panic("test failure");
9478 expect(v[27] == 716) catch @panic("test failure");
9479 expect(v[28] == 717) catch @panic("test failure");
9480 expect(v[29] == 718) catch @panic("test failure");
9481 expect(v[30] == 719) catch @panic("test failure");
9482 expect(v[31] == 720) catch @panic("test failure");
9483 expect(v[32] == 721) catch @panic("test failure");
9484 expect(v[33] == 722) catch @panic("test failure");
9485 expect(v[34] == 723) catch @panic("test failure");
9486 expect(v[35] == 724) catch @panic("test failure");
9487 expect(v[36] == 725) catch @panic("test failure");
9488 expect(v[37] == 726) catch @panic("test failure");
9489 expect(v[38] == 727) catch @panic("test failure");
9490 expect(v[39] == 728) catch @panic("test failure");
9491 expect(v[40] == 729) catch @panic("test failure");
9492 expect(v[41] == 730) catch @panic("test failure");
9493 expect(v[42] == 731) catch @panic("test failure");
9494 expect(v[43] == 732) catch @panic("test failure");
9495 expect(v[44] == 733) catch @panic("test failure");
9496 expect(v[45] == 734) catch @panic("test failure");
9497 expect(v[46] == 735) catch @panic("test failure");
9498 expect(v[47] == 736) catch @panic("test failure");
9499 expect(v[48] == 737) catch @panic("test failure");
9500 expect(v[49] == 738) catch @panic("test failure");
9501 expect(v[50] == 739) catch @panic("test failure");
9502 expect(v[51] == 740) catch @panic("test failure");
9503 expect(v[52] == 741) catch @panic("test failure");
9504 expect(v[53] == 742) catch @panic("test failure");
9505 expect(v[54] == 743) catch @panic("test failure");
9506 expect(v[55] == 744) catch @panic("test failure");
9507 expect(v[56] == 745) catch @panic("test failure");
9508 expect(v[57] == 746) catch @panic("test failure");
9509 expect(v[58] == 747) catch @panic("test failure");
9510 expect(v[59] == 748) catch @panic("test failure");
9511 expect(v[60] == 749) catch @panic("test failure");
9512 expect(v[61] == 750) catch @panic("test failure");
9513 expect(v[62] == 751) catch @panic("test failure");
9514 expect(v[63] == 752) catch @panic("test failure");
9515 expect(i == 64) catch @panic("test failure");
9516}
9517
9518extern fn c_ret_vector_64_u16() @Vector(64, u16);
9519extern fn c_vector_64_u16(@Vector(64, u16), usize) void;
9520extern fn c_test_vector_64_u16() void;
9521
9522test "@Vector(64, u16)" {
9523 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9524 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9525 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
9526 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9527 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9528
9529 const v = c_ret_vector_64_u16();
9530 try expect(v[0] == 753);
9531 try expect(v[1] == 754);
9532 try expect(v[2] == 755);
9533 try expect(v[3] == 756);
9534 try expect(v[4] == 757);
9535 try expect(v[5] == 758);
9536 try expect(v[6] == 759);
9537 try expect(v[7] == 760);
9538 try expect(v[8] == 761);
9539 try expect(v[9] == 762);
9540 try expect(v[10] == 763);
9541 try expect(v[11] == 764);
9542 try expect(v[12] == 765);
9543 try expect(v[13] == 766);
9544 try expect(v[14] == 767);
9545 try expect(v[15] == 768);
9546 try expect(v[16] == 769);
9547 try expect(v[17] == 770);
9548 try expect(v[18] == 771);
9549 try expect(v[19] == 772);
9550 try expect(v[20] == 773);
9551 try expect(v[21] == 774);
9552 try expect(v[22] == 775);
9553 try expect(v[23] == 776);
9554 try expect(v[24] == 777);
9555 try expect(v[25] == 778);
9556 try expect(v[26] == 779);
9557 try expect(v[27] == 780);
9558 try expect(v[28] == 781);
9559 try expect(v[29] == 782);
9560 try expect(v[30] == 783);
9561 try expect(v[31] == 784);
9562 try expect(v[32] == 785);
9563 try expect(v[33] == 786);
9564 try expect(v[34] == 787);
9565 try expect(v[35] == 788);
9566 try expect(v[36] == 789);
9567 try expect(v[37] == 790);
9568 try expect(v[38] == 791);
9569 try expect(v[39] == 792);
9570 try expect(v[40] == 793);
9571 try expect(v[41] == 794);
9572 try expect(v[42] == 795);
9573 try expect(v[43] == 796);
9574 try expect(v[44] == 797);
9575 try expect(v[45] == 798);
9576 try expect(v[46] == 799);
9577 try expect(v[47] == 800);
9578 try expect(v[48] == 801);
9579 try expect(v[49] == 802);
9580 try expect(v[50] == 803);
9581 try expect(v[51] == 804);
9582 try expect(v[52] == 805);
9583 try expect(v[53] == 806);
9584 try expect(v[54] == 807);
9585 try expect(v[55] == 808);
9586 try expect(v[56] == 809);
9587 try expect(v[57] == 810);
9588 try expect(v[58] == 811);
9589 try expect(v[59] == 812);
9590 try expect(v[60] == 813);
9591 try expect(v[61] == 814);
9592 try expect(v[62] == 815);
9593 try expect(v[63] == 816);
9594 c_vector_64_u16(.{
9595 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832,
9596 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,
9597 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864,
9598 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880,
9599 }, 64);
9600 c_test_vector_64_u16();
9601}
9602
9603export fn zig_ret_vector_96_u16() @Vector(96, u16) {
9604 return .{
9605 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905,
9606 906, 907, 908, 909, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 920, 921,
9607 922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 933, 934, 935, 936, 937,
9608 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 952, 953,
9609 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 967, 968, 969,
9610 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 983, 984, 985,
9611 };
9612}
9613export fn zig_vector_96_u16(v: @Vector(96, u16), i: usize) void {
9614 expect(v[0] == 986) catch @panic("test failure");
9615 expect(v[1] == 987) catch @panic("test failure");
9616 expect(v[2] == 988) catch @panic("test failure");
9617 expect(v[3] == 989) catch @panic("test failure");
9618 expect(v[4] == 990) catch @panic("test failure");
9619 expect(v[5] == 991) catch @panic("test failure");
9620 expect(v[6] == 992) catch @panic("test failure");
9621 expect(v[7] == 993) catch @panic("test failure");
9622 expect(v[8] == 994) catch @panic("test failure");
9623 expect(v[9] == 995) catch @panic("test failure");
9624 expect(v[10] == 996) catch @panic("test failure");
9625 expect(v[11] == 997) catch @panic("test failure");
9626 expect(v[12] == 998) catch @panic("test failure");
9627 expect(v[13] == 999) catch @panic("test failure");
9628 expect(v[14] == 1000) catch @panic("test failure");
9629 expect(v[15] == 1001) catch @panic("test failure");
9630 expect(v[16] == 1002) catch @panic("test failure");
9631 expect(v[17] == 1003) catch @panic("test failure");
9632 expect(v[18] == 1004) catch @panic("test failure");
9633 expect(v[19] == 1005) catch @panic("test failure");
9634 expect(v[20] == 1006) catch @panic("test failure");
9635 expect(v[21] == 1007) catch @panic("test failure");
9636 expect(v[22] == 1008) catch @panic("test failure");
9637 expect(v[23] == 1009) catch @panic("test failure");
9638 expect(v[24] == 1010) catch @panic("test failure");
9639 expect(v[25] == 1011) catch @panic("test failure");
9640 expect(v[26] == 1012) catch @panic("test failure");
9641 expect(v[27] == 1013) catch @panic("test failure");
9642 expect(v[28] == 1014) catch @panic("test failure");
9643 expect(v[29] == 1015) catch @panic("test failure");
9644 expect(v[30] == 1016) catch @panic("test failure");
9645 expect(v[31] == 1017) catch @panic("test failure");
9646 expect(v[32] == 1018) catch @panic("test failure");
9647 expect(v[33] == 1019) catch @panic("test failure");
9648 expect(v[34] == 1020) catch @panic("test failure");
9649 expect(v[35] == 1021) catch @panic("test failure");
9650 expect(v[36] == 1022) catch @panic("test failure");
9651 expect(v[37] == 1023) catch @panic("test failure");
9652 expect(v[38] == 1024) catch @panic("test failure");
9653 expect(v[39] == 1025) catch @panic("test failure");
9654 expect(v[40] == 1026) catch @panic("test failure");
9655 expect(v[41] == 1027) catch @panic("test failure");
9656 expect(v[42] == 1028) catch @panic("test failure");
9657 expect(v[43] == 1029) catch @panic("test failure");
9658 expect(v[44] == 1030) catch @panic("test failure");
9659 expect(v[45] == 1031) catch @panic("test failure");
9660 expect(v[46] == 1032) catch @panic("test failure");
9661 expect(v[47] == 1033) catch @panic("test failure");
9662 expect(v[48] == 1034) catch @panic("test failure");
9663 expect(v[49] == 1035) catch @panic("test failure");
9664 expect(v[50] == 1036) catch @panic("test failure");
9665 expect(v[51] == 1037) catch @panic("test failure");
9666 expect(v[52] == 1038) catch @panic("test failure");
9667 expect(v[53] == 1039) catch @panic("test failure");
9668 expect(v[54] == 1040) catch @panic("test failure");
9669 expect(v[55] == 1041) catch @panic("test failure");
9670 expect(v[56] == 1042) catch @panic("test failure");
9671 expect(v[57] == 1043) catch @panic("test failure");
9672 expect(v[58] == 1044) catch @panic("test failure");
9673 expect(v[59] == 1045) catch @panic("test failure");
9674 expect(v[60] == 1046) catch @panic("test failure");
9675 expect(v[61] == 1047) catch @panic("test failure");
9676 expect(v[62] == 1048) catch @panic("test failure");
9677 expect(v[63] == 1049) catch @panic("test failure");
9678 expect(v[64] == 1050) catch @panic("test failure");
9679 expect(v[65] == 1051) catch @panic("test failure");
9680 expect(v[66] == 1052) catch @panic("test failure");
9681 expect(v[67] == 1053) catch @panic("test failure");
9682 expect(v[68] == 1054) catch @panic("test failure");
9683 expect(v[69] == 1055) catch @panic("test failure");
9684 expect(v[70] == 1056) catch @panic("test failure");
9685 expect(v[71] == 1057) catch @panic("test failure");
9686 expect(v[72] == 1058) catch @panic("test failure");
9687 expect(v[73] == 1059) catch @panic("test failure");
9688 expect(v[74] == 1060) catch @panic("test failure");
9689 expect(v[75] == 1061) catch @panic("test failure");
9690 expect(v[76] == 1062) catch @panic("test failure");
9691 expect(v[77] == 1063) catch @panic("test failure");
9692 expect(v[78] == 1064) catch @panic("test failure");
9693 expect(v[79] == 1065) catch @panic("test failure");
9694 expect(v[80] == 1066) catch @panic("test failure");
9695 expect(v[81] == 1067) catch @panic("test failure");
9696 expect(v[82] == 1068) catch @panic("test failure");
9697 expect(v[83] == 1069) catch @panic("test failure");
9698 expect(v[84] == 1070) catch @panic("test failure");
9699 expect(v[85] == 1071) catch @panic("test failure");
9700 expect(v[86] == 1072) catch @panic("test failure");
9701 expect(v[87] == 1073) catch @panic("test failure");
9702 expect(v[88] == 1074) catch @panic("test failure");
9703 expect(v[89] == 1075) catch @panic("test failure");
9704 expect(v[90] == 1076) catch @panic("test failure");
9705 expect(v[91] == 1077) catch @panic("test failure");
9706 expect(v[92] == 1078) catch @panic("test failure");
9707 expect(v[93] == 1079) catch @panic("test failure");
9708 expect(v[94] == 1080) catch @panic("test failure");
9709 expect(v[95] == 1081) catch @panic("test failure");
9710 expect(i == 96) catch @panic("test failure");
9711}
9712
9713extern fn c_ret_vector_96_u16() @Vector(96, u16);
9714extern fn c_vector_96_u16(@Vector(96, u16), usize) void;
9715extern fn c_test_vector_96_u16() void;
9716
9717test "@Vector(96, u16)" {
9718 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9719 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9720 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
9721 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9722 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9723
9724 const v = c_ret_vector_96_u16();
9725 try expect(v[0] == 1082);
9726 try expect(v[1] == 1083);
9727 try expect(v[2] == 1084);
9728 try expect(v[3] == 1085);
9729 try expect(v[4] == 1086);
9730 try expect(v[5] == 1087);
9731 try expect(v[6] == 1088);
9732 try expect(v[7] == 1089);
9733 try expect(v[8] == 1090);
9734 try expect(v[9] == 1091);
9735 try expect(v[10] == 1092);
9736 try expect(v[11] == 1093);
9737 try expect(v[12] == 1094);
9738 try expect(v[13] == 1095);
9739 try expect(v[14] == 1096);
9740 try expect(v[15] == 1097);
9741 try expect(v[16] == 1098);
9742 try expect(v[17] == 1099);
9743 try expect(v[18] == 1100);
9744 try expect(v[19] == 1101);
9745 try expect(v[20] == 1102);
9746 try expect(v[21] == 1103);
9747 try expect(v[22] == 1104);
9748 try expect(v[23] == 1105);
9749 try expect(v[24] == 1106);
9750 try expect(v[25] == 1107);
9751 try expect(v[26] == 1108);
9752 try expect(v[27] == 1109);
9753 try expect(v[28] == 1110);
9754 try expect(v[29] == 1111);
9755 try expect(v[30] == 1112);
9756 try expect(v[31] == 1113);
9757 try expect(v[32] == 1114);
9758 try expect(v[33] == 1115);
9759 try expect(v[34] == 1116);
9760 try expect(v[35] == 1117);
9761 try expect(v[36] == 1118);
9762 try expect(v[37] == 1119);
9763 try expect(v[38] == 1120);
9764 try expect(v[39] == 1121);
9765 try expect(v[40] == 1122);
9766 try expect(v[41] == 1123);
9767 try expect(v[42] == 1124);
9768 try expect(v[43] == 1125);
9769 try expect(v[44] == 1126);
9770 try expect(v[45] == 1127);
9771 try expect(v[46] == 1128);
9772 try expect(v[47] == 1129);
9773 try expect(v[48] == 1130);
9774 try expect(v[49] == 1131);
9775 try expect(v[50] == 1132);
9776 try expect(v[51] == 1133);
9777 try expect(v[52] == 1134);
9778 try expect(v[53] == 1135);
9779 try expect(v[54] == 1136);
9780 try expect(v[55] == 1137);
9781 try expect(v[56] == 1138);
9782 try expect(v[57] == 1139);
9783 try expect(v[58] == 1140);
9784 try expect(v[59] == 1141);
9785 try expect(v[60] == 1142);
9786 try expect(v[61] == 1143);
9787 try expect(v[62] == 1144);
9788 try expect(v[63] == 1145);
9789 try expect(v[64] == 1146);
9790 try expect(v[65] == 1147);
9791 try expect(v[66] == 1148);
9792 try expect(v[67] == 1149);
9793 try expect(v[68] == 1150);
9794 try expect(v[69] == 1151);
9795 try expect(v[70] == 1152);
9796 try expect(v[71] == 1153);
9797 try expect(v[72] == 1154);
9798 try expect(v[73] == 1155);
9799 try expect(v[74] == 1156);
9800 try expect(v[75] == 1157);
9801 try expect(v[76] == 1158);
9802 try expect(v[77] == 1159);
9803 try expect(v[78] == 1160);
9804 try expect(v[79] == 1161);
9805 try expect(v[80] == 1162);
9806 try expect(v[81] == 1163);
9807 try expect(v[82] == 1164);
9808 try expect(v[83] == 1165);
9809 try expect(v[84] == 1166);
9810 try expect(v[85] == 1167);
9811 try expect(v[86] == 1168);
9812 try expect(v[87] == 1169);
9813 try expect(v[88] == 1170);
9814 try expect(v[89] == 1171);
9815 try expect(v[90] == 1172);
9816 try expect(v[91] == 1173);
9817 try expect(v[92] == 1174);
9818 try expect(v[93] == 1175);
9819 try expect(v[94] == 1176);
9820 try expect(v[95] == 1177);
9821 c_vector_96_u16(.{
9822 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1192, 1193,
9823 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209,
9824 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225,
9825 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241,
9826 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1256, 1257,
9827 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273,
9828 }, 96);
9829 c_test_vector_96_u16();
9830}
9831
9832export fn zig_ret_vector_128_u16() @Vector(128, u16) {
9833 return .{
9834 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289,
9835 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305,
9836 1306, 1307, 1308, 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321,
9837 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337,
9838 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353,
9839 1354, 1355, 1356, 1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369,
9840 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385,
9841 1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401,
9842 };
9843}
9844export fn zig_vector_128_u16(v: @Vector(128, u16), i: usize) void {
9845 expect(v[0] == 1402) catch @panic("test failure");
9846 expect(v[1] == 1403) catch @panic("test failure");
9847 expect(v[2] == 1404) catch @panic("test failure");
9848 expect(v[3] == 1405) catch @panic("test failure");
9849 expect(v[4] == 1406) catch @panic("test failure");
9850 expect(v[5] == 1407) catch @panic("test failure");
9851 expect(v[6] == 1408) catch @panic("test failure");
9852 expect(v[7] == 1409) catch @panic("test failure");
9853 expect(v[8] == 1410) catch @panic("test failure");
9854 expect(v[9] == 1411) catch @panic("test failure");
9855 expect(v[10] == 1412) catch @panic("test failure");
9856 expect(v[11] == 1413) catch @panic("test failure");
9857 expect(v[12] == 1414) catch @panic("test failure");
9858 expect(v[13] == 1415) catch @panic("test failure");
9859 expect(v[14] == 1416) catch @panic("test failure");
9860 expect(v[15] == 1417) catch @panic("test failure");
9861 expect(v[16] == 1418) catch @panic("test failure");
9862 expect(v[17] == 1419) catch @panic("test failure");
9863 expect(v[18] == 1420) catch @panic("test failure");
9864 expect(v[19] == 1421) catch @panic("test failure");
9865 expect(v[20] == 1422) catch @panic("test failure");
9866 expect(v[21] == 1423) catch @panic("test failure");
9867 expect(v[22] == 1424) catch @panic("test failure");
9868 expect(v[23] == 1425) catch @panic("test failure");
9869 expect(v[24] == 1426) catch @panic("test failure");
9870 expect(v[25] == 1427) catch @panic("test failure");
9871 expect(v[26] == 1428) catch @panic("test failure");
9872 expect(v[27] == 1429) catch @panic("test failure");
9873 expect(v[28] == 1430) catch @panic("test failure");
9874 expect(v[29] == 1431) catch @panic("test failure");
9875 expect(v[30] == 1432) catch @panic("test failure");
9876 expect(v[31] == 1433) catch @panic("test failure");
9877 expect(v[32] == 1434) catch @panic("test failure");
9878 expect(v[33] == 1435) catch @panic("test failure");
9879 expect(v[34] == 1436) catch @panic("test failure");
9880 expect(v[35] == 1437) catch @panic("test failure");
9881 expect(v[36] == 1438) catch @panic("test failure");
9882 expect(v[37] == 1439) catch @panic("test failure");
9883 expect(v[38] == 1440) catch @panic("test failure");
9884 expect(v[39] == 1441) catch @panic("test failure");
9885 expect(v[40] == 1442) catch @panic("test failure");
9886 expect(v[41] == 1443) catch @panic("test failure");
9887 expect(v[42] == 1444) catch @panic("test failure");
9888 expect(v[43] == 1445) catch @panic("test failure");
9889 expect(v[44] == 1446) catch @panic("test failure");
9890 expect(v[45] == 1447) catch @panic("test failure");
9891 expect(v[46] == 1448) catch @panic("test failure");
9892 expect(v[47] == 1449) catch @panic("test failure");
9893 expect(v[48] == 1450) catch @panic("test failure");
9894 expect(v[49] == 1451) catch @panic("test failure");
9895 expect(v[50] == 1452) catch @panic("test failure");
9896 expect(v[51] == 1453) catch @panic("test failure");
9897 expect(v[52] == 1454) catch @panic("test failure");
9898 expect(v[53] == 1455) catch @panic("test failure");
9899 expect(v[54] == 1456) catch @panic("test failure");
9900 expect(v[55] == 1457) catch @panic("test failure");
9901 expect(v[56] == 1458) catch @panic("test failure");
9902 expect(v[57] == 1459) catch @panic("test failure");
9903 expect(v[58] == 1460) catch @panic("test failure");
9904 expect(v[59] == 1461) catch @panic("test failure");
9905 expect(v[60] == 1462) catch @panic("test failure");
9906 expect(v[61] == 1463) catch @panic("test failure");
9907 expect(v[62] == 1464) catch @panic("test failure");
9908 expect(v[63] == 1465) catch @panic("test failure");
9909 expect(v[64] == 1466) catch @panic("test failure");
9910 expect(v[65] == 1467) catch @panic("test failure");
9911 expect(v[66] == 1468) catch @panic("test failure");
9912 expect(v[67] == 1469) catch @panic("test failure");
9913 expect(v[68] == 1470) catch @panic("test failure");
9914 expect(v[69] == 1471) catch @panic("test failure");
9915 expect(v[70] == 1472) catch @panic("test failure");
9916 expect(v[71] == 1473) catch @panic("test failure");
9917 expect(v[72] == 1474) catch @panic("test failure");
9918 expect(v[73] == 1475) catch @panic("test failure");
9919 expect(v[74] == 1476) catch @panic("test failure");
9920 expect(v[75] == 1477) catch @panic("test failure");
9921 expect(v[76] == 1478) catch @panic("test failure");
9922 expect(v[77] == 1479) catch @panic("test failure");
9923 expect(v[78] == 1480) catch @panic("test failure");
9924 expect(v[79] == 1481) catch @panic("test failure");
9925 expect(v[80] == 1482) catch @panic("test failure");
9926 expect(v[81] == 1483) catch @panic("test failure");
9927 expect(v[82] == 1484) catch @panic("test failure");
9928 expect(v[83] == 1485) catch @panic("test failure");
9929 expect(v[84] == 1486) catch @panic("test failure");
9930 expect(v[85] == 1487) catch @panic("test failure");
9931 expect(v[86] == 1488) catch @panic("test failure");
9932 expect(v[87] == 1489) catch @panic("test failure");
9933 expect(v[88] == 1490) catch @panic("test failure");
9934 expect(v[89] == 1491) catch @panic("test failure");
9935 expect(v[90] == 1492) catch @panic("test failure");
9936 expect(v[91] == 1493) catch @panic("test failure");
9937 expect(v[92] == 1494) catch @panic("test failure");
9938 expect(v[93] == 1495) catch @panic("test failure");
9939 expect(v[94] == 1496) catch @panic("test failure");
9940 expect(v[95] == 1497) catch @panic("test failure");
9941 expect(v[96] == 1498) catch @panic("test failure");
9942 expect(v[97] == 1499) catch @panic("test failure");
9943 expect(v[98] == 1500) catch @panic("test failure");
9944 expect(v[99] == 1501) catch @panic("test failure");
9945 expect(v[100] == 1502) catch @panic("test failure");
9946 expect(v[101] == 1503) catch @panic("test failure");
9947 expect(v[102] == 1504) catch @panic("test failure");
9948 expect(v[103] == 1505) catch @panic("test failure");
9949 expect(v[104] == 1506) catch @panic("test failure");
9950 expect(v[105] == 1507) catch @panic("test failure");
9951 expect(v[106] == 1508) catch @panic("test failure");
9952 expect(v[107] == 1509) catch @panic("test failure");
9953 expect(v[108] == 1510) catch @panic("test failure");
9954 expect(v[109] == 1511) catch @panic("test failure");
9955 expect(v[110] == 1512) catch @panic("test failure");
9956 expect(v[111] == 1513) catch @panic("test failure");
9957 expect(v[112] == 1514) catch @panic("test failure");
9958 expect(v[113] == 1515) catch @panic("test failure");
9959 expect(v[114] == 1516) catch @panic("test failure");
9960 expect(v[115] == 1517) catch @panic("test failure");
9961 expect(v[116] == 1518) catch @panic("test failure");
9962 expect(v[117] == 1519) catch @panic("test failure");
9963 expect(v[118] == 1520) catch @panic("test failure");
9964 expect(v[119] == 1521) catch @panic("test failure");
9965 expect(v[120] == 1522) catch @panic("test failure");
9966 expect(v[121] == 1523) catch @panic("test failure");
9967 expect(v[122] == 1524) catch @panic("test failure");
9968 expect(v[123] == 1525) catch @panic("test failure");
9969 expect(v[124] == 1526) catch @panic("test failure");
9970 expect(v[125] == 1527) catch @panic("test failure");
9971 expect(v[126] == 1528) catch @panic("test failure");
9972 expect(v[127] == 1529) catch @panic("test failure");
9973 expect(i == 128) catch @panic("test failure");
9974}
9975
9976extern fn c_ret_vector_128_u16() @Vector(128, u16);
9977extern fn c_vector_128_u16(@Vector(128, u16), usize) void;
9978extern fn c_test_vector_128_u16() void;
9979
9980test "@Vector(128, u16)" {
9981 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9982 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9983 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
9984 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9985 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
9986
9987 const v = c_ret_vector_128_u16();
9988 try expect(v[0] == 1530);
9989 try expect(v[1] == 1531);
9990 try expect(v[2] == 1532);
9991 try expect(v[3] == 1533);
9992 try expect(v[4] == 1534);
9993 try expect(v[5] == 1535);
9994 try expect(v[6] == 1536);
9995 try expect(v[7] == 1537);
9996 try expect(v[8] == 1538);
9997 try expect(v[9] == 1539);
9998 try expect(v[10] == 1540);
9999 try expect(v[11] == 1541);
10000 try expect(v[12] == 1542);
10001 try expect(v[13] == 1543);
10002 try expect(v[14] == 1544);
10003 try expect(v[15] == 1545);
10004 try expect(v[16] == 1546);
10005 try expect(v[17] == 1547);
10006 try expect(v[18] == 1548);
10007 try expect(v[19] == 1549);
10008 try expect(v[20] == 1550);
10009 try expect(v[21] == 1551);
10010 try expect(v[22] == 1552);
10011 try expect(v[23] == 1553);
10012 try expect(v[24] == 1554);
10013 try expect(v[25] == 1555);
10014 try expect(v[26] == 1556);
10015 try expect(v[27] == 1557);
10016 try expect(v[28] == 1558);
10017 try expect(v[29] == 1559);
10018 try expect(v[30] == 1560);
10019 try expect(v[31] == 1561);
10020 try expect(v[32] == 1562);
10021 try expect(v[33] == 1563);
10022 try expect(v[34] == 1564);
10023 try expect(v[35] == 1565);
10024 try expect(v[36] == 1566);
10025 try expect(v[37] == 1567);
10026 try expect(v[38] == 1568);
10027 try expect(v[39] == 1569);
10028 try expect(v[40] == 1570);
10029 try expect(v[41] == 1571);
10030 try expect(v[42] == 1572);
10031 try expect(v[43] == 1573);
10032 try expect(v[44] == 1574);
10033 try expect(v[45] == 1575);
10034 try expect(v[46] == 1576);
10035 try expect(v[47] == 1577);
10036 try expect(v[48] == 1578);
10037 try expect(v[49] == 1579);
10038 try expect(v[50] == 1580);
10039 try expect(v[51] == 1581);
10040 try expect(v[52] == 1582);
10041 try expect(v[53] == 1583);
10042 try expect(v[54] == 1584);
10043 try expect(v[55] == 1585);
10044 try expect(v[56] == 1586);
10045 try expect(v[57] == 1587);
10046 try expect(v[58] == 1588);
10047 try expect(v[59] == 1589);
10048 try expect(v[60] == 1590);
10049 try expect(v[61] == 1591);
10050 try expect(v[62] == 1592);
10051 try expect(v[63] == 1593);
10052 try expect(v[64] == 1594);
10053 try expect(v[65] == 1595);
10054 try expect(v[66] == 1596);
10055 try expect(v[67] == 1597);
10056 try expect(v[68] == 1598);
10057 try expect(v[69] == 1599);
10058 try expect(v[70] == 1600);
10059 try expect(v[71] == 1601);
10060 try expect(v[72] == 1602);
10061 try expect(v[73] == 1603);
10062 try expect(v[74] == 1604);
10063 try expect(v[75] == 1605);
10064 try expect(v[76] == 1606);
10065 try expect(v[77] == 1607);
10066 try expect(v[78] == 1608);
10067 try expect(v[79] == 1609);
10068 try expect(v[80] == 1610);
10069 try expect(v[81] == 1611);
10070 try expect(v[82] == 1612);
10071 try expect(v[83] == 1613);
10072 try expect(v[84] == 1614);
10073 try expect(v[85] == 1615);
10074 try expect(v[86] == 1616);
10075 try expect(v[87] == 1617);
10076 try expect(v[88] == 1618);
10077 try expect(v[89] == 1619);
10078 try expect(v[90] == 1620);
10079 try expect(v[91] == 1621);
10080 try expect(v[92] == 1622);
10081 try expect(v[93] == 1623);
10082 try expect(v[94] == 1624);
10083 try expect(v[95] == 1625);
10084 try expect(v[96] == 1626);
10085 try expect(v[97] == 1627);
10086 try expect(v[98] == 1628);
10087 try expect(v[99] == 1629);
10088 try expect(v[100] == 1630);
10089 try expect(v[101] == 1631);
10090 try expect(v[102] == 1632);
10091 try expect(v[103] == 1633);
10092 try expect(v[104] == 1634);
10093 try expect(v[105] == 1635);
10094 try expect(v[106] == 1636);
10095 try expect(v[107] == 1637);
10096 try expect(v[108] == 1638);
10097 try expect(v[109] == 1639);
10098 try expect(v[110] == 1640);
10099 try expect(v[111] == 1641);
10100 try expect(v[112] == 1642);
10101 try expect(v[113] == 1643);
10102 try expect(v[114] == 1644);
10103 try expect(v[115] == 1645);
10104 try expect(v[116] == 1646);
10105 try expect(v[117] == 1647);
10106 try expect(v[118] == 1648);
10107 try expect(v[119] == 1649);
10108 try expect(v[120] == 1650);
10109 try expect(v[121] == 1651);
10110 try expect(v[122] == 1652);
10111 try expect(v[123] == 1653);
10112 try expect(v[124] == 1654);
10113 try expect(v[125] == 1655);
10114 try expect(v[126] == 1656);
10115 try expect(v[127] == 1657);
10116 c_vector_128_u16(.{
10117 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673,
10118 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1683, 1684, 1685, 1686, 1687, 1688, 1689,
10119 1690, 1691, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700, 1701, 1702, 1703, 1704, 1705,
10120 1706, 1707, 1708, 1709, 1710, 1711, 1712, 1713, 1714, 1715, 1716, 1717, 1718, 1719, 1720, 1721,
10121 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731, 1732, 1733, 1734, 1735, 1736, 1737,
10122 1738, 1739, 1740, 1741, 1742, 1743, 1744, 1745, 1746, 1747, 1748, 1749, 1750, 1751, 1752, 1753,
10123 1754, 1755, 1756, 1757, 1758, 1759, 1760, 1761, 1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769,
10124 1770, 1771, 1772, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785,
10125 }, 128);
10126 c_test_vector_128_u16();
10127}
10128
10129export fn zig_ret_vector_192_u16() @Vector(192, u16) {
10130 return .{
10131 1786, 1787, 1788, 1789, 1790, 1791, 1792, 1793, 1794, 1795, 1796, 1797, 1798, 1799, 1800, 1801,
10132 1802, 1803, 1804, 1805, 1806, 1807, 1808, 1809, 1810, 1811, 1812, 1813, 1814, 1815, 1816, 1817,
10133 1818, 1819, 1820, 1821, 1822, 1823, 1824, 1825, 1826, 1827, 1828, 1829, 1830, 1831, 1832, 1833,
10134 1834, 1835, 1836, 1837, 1838, 1839, 1840, 1841, 1842, 1843, 1844, 1845, 1846, 1847, 1848, 1849,
10135 1850, 1851, 1852, 1853, 1854, 1855, 1856, 1857, 1858, 1859, 1860, 1861, 1862, 1863, 1864, 1865,
10136 1866, 1867, 1868, 1869, 1870, 1871, 1872, 1873, 1874, 1875, 1876, 1877, 1878, 1879, 1880, 1881,
10137 1882, 1883, 1884, 1885, 1886, 1887, 1888, 1889, 1890, 1891, 1892, 1893, 1894, 1895, 1896, 1897,
10138 1898, 1899, 1900, 1901, 1902, 1903, 1904, 1905, 1906, 1907, 1908, 1909, 1910, 1911, 1912, 1913,
10139 1914, 1915, 1916, 1917, 1918, 1919, 1920, 1921, 1922, 1923, 1924, 1925, 1926, 1927, 1928, 1929,
10140 1930, 1931, 1932, 1933, 1934, 1935, 1936, 1937, 1938, 1939, 1940, 1941, 1942, 1943, 1944, 1945,
10141 1946, 1947, 1948, 1949, 1950, 1951, 1952, 1953, 1954, 1955, 1956, 1957, 1958, 1959, 1960, 1961,
10142 1962, 1963, 1964, 1965, 1966, 1967, 1968, 1969, 1970, 1971, 1972, 1973, 1974, 1975, 1976, 1977,
10143 };
10144}
10145export fn zig_vector_192_u16(v: @Vector(192, u16), i: usize) void {
10146 expect(v[0] == 1978) catch @panic("test failure");
10147 expect(v[1] == 1979) catch @panic("test failure");
10148 expect(v[2] == 1980) catch @panic("test failure");
10149 expect(v[3] == 1981) catch @panic("test failure");
10150 expect(v[4] == 1982) catch @panic("test failure");
10151 expect(v[5] == 1983) catch @panic("test failure");
10152 expect(v[6] == 1984) catch @panic("test failure");
10153 expect(v[7] == 1985) catch @panic("test failure");
10154 expect(v[8] == 1986) catch @panic("test failure");
10155 expect(v[9] == 1987) catch @panic("test failure");
10156 expect(v[10] == 1988) catch @panic("test failure");
10157 expect(v[11] == 1989) catch @panic("test failure");
10158 expect(v[12] == 1990) catch @panic("test failure");
10159 expect(v[13] == 1991) catch @panic("test failure");
10160 expect(v[14] == 1992) catch @panic("test failure");
10161 expect(v[15] == 1993) catch @panic("test failure");
10162 expect(v[16] == 1994) catch @panic("test failure");
10163 expect(v[17] == 1995) catch @panic("test failure");
10164 expect(v[18] == 1996) catch @panic("test failure");
10165 expect(v[19] == 1997) catch @panic("test failure");
10166 expect(v[20] == 1998) catch @panic("test failure");
10167 expect(v[21] == 1999) catch @panic("test failure");
10168 expect(v[22] == 2000) catch @panic("test failure");
10169 expect(v[23] == 2001) catch @panic("test failure");
10170 expect(v[24] == 2002) catch @panic("test failure");
10171 expect(v[25] == 2003) catch @panic("test failure");
10172 expect(v[26] == 2004) catch @panic("test failure");
10173 expect(v[27] == 2005) catch @panic("test failure");
10174 expect(v[28] == 2006) catch @panic("test failure");
10175 expect(v[29] == 2007) catch @panic("test failure");
10176 expect(v[30] == 2008) catch @panic("test failure");
10177 expect(v[31] == 2009) catch @panic("test failure");
10178 expect(v[32] == 2010) catch @panic("test failure");
10179 expect(v[33] == 2011) catch @panic("test failure");
10180 expect(v[34] == 2012) catch @panic("test failure");
10181 expect(v[35] == 2013) catch @panic("test failure");
10182 expect(v[36] == 2014) catch @panic("test failure");
10183 expect(v[37] == 2015) catch @panic("test failure");
10184 expect(v[38] == 2016) catch @panic("test failure");
10185 expect(v[39] == 2017) catch @panic("test failure");
10186 expect(v[40] == 2018) catch @panic("test failure");
10187 expect(v[41] == 2019) catch @panic("test failure");
10188 expect(v[42] == 2020) catch @panic("test failure");
10189 expect(v[43] == 2021) catch @panic("test failure");
10190 expect(v[44] == 2022) catch @panic("test failure");
10191 expect(v[45] == 2023) catch @panic("test failure");
10192 expect(v[46] == 2024) catch @panic("test failure");
10193 expect(v[47] == 2025) catch @panic("test failure");
10194 expect(v[48] == 2026) catch @panic("test failure");
10195 expect(v[49] == 2027) catch @panic("test failure");
10196 expect(v[50] == 2028) catch @panic("test failure");
10197 expect(v[51] == 2029) catch @panic("test failure");
10198 expect(v[52] == 2030) catch @panic("test failure");
10199 expect(v[53] == 2031) catch @panic("test failure");
10200 expect(v[54] == 2032) catch @panic("test failure");
10201 expect(v[55] == 2033) catch @panic("test failure");
10202 expect(v[56] == 2034) catch @panic("test failure");
10203 expect(v[57] == 2035) catch @panic("test failure");
10204 expect(v[58] == 2036) catch @panic("test failure");
10205 expect(v[59] == 2037) catch @panic("test failure");
10206 expect(v[60] == 2038) catch @panic("test failure");
10207 expect(v[61] == 2039) catch @panic("test failure");
10208 expect(v[62] == 2040) catch @panic("test failure");
10209 expect(v[63] == 2041) catch @panic("test failure");
10210 expect(v[64] == 2042) catch @panic("test failure");
10211 expect(v[65] == 2043) catch @panic("test failure");
10212 expect(v[66] == 2044) catch @panic("test failure");
10213 expect(v[67] == 2045) catch @panic("test failure");
10214 expect(v[68] == 2046) catch @panic("test failure");
10215 expect(v[69] == 2047) catch @panic("test failure");
10216 expect(v[70] == 2048) catch @panic("test failure");
10217 expect(v[71] == 2049) catch @panic("test failure");
10218 expect(v[72] == 2050) catch @panic("test failure");
10219 expect(v[73] == 2051) catch @panic("test failure");
10220 expect(v[74] == 2052) catch @panic("test failure");
10221 expect(v[75] == 2053) catch @panic("test failure");
10222 expect(v[76] == 2054) catch @panic("test failure");
10223 expect(v[77] == 2055) catch @panic("test failure");
10224 expect(v[78] == 2056) catch @panic("test failure");
10225 expect(v[79] == 2057) catch @panic("test failure");
10226 expect(v[80] == 2058) catch @panic("test failure");
10227 expect(v[81] == 2059) catch @panic("test failure");
10228 expect(v[82] == 2060) catch @panic("test failure");
10229 expect(v[83] == 2061) catch @panic("test failure");
10230 expect(v[84] == 2062) catch @panic("test failure");
10231 expect(v[85] == 2063) catch @panic("test failure");
10232 expect(v[86] == 2064) catch @panic("test failure");
10233 expect(v[87] == 2065) catch @panic("test failure");
10234 expect(v[88] == 2066) catch @panic("test failure");
10235 expect(v[89] == 2067) catch @panic("test failure");
10236 expect(v[90] == 2068) catch @panic("test failure");
10237 expect(v[91] == 2069) catch @panic("test failure");
10238 expect(v[92] == 2070) catch @panic("test failure");
10239 expect(v[93] == 2071) catch @panic("test failure");
10240 expect(v[94] == 2072) catch @panic("test failure");
10241 expect(v[95] == 2073) catch @panic("test failure");
10242 expect(v[96] == 2074) catch @panic("test failure");
10243 expect(v[97] == 2075) catch @panic("test failure");
10244 expect(v[98] == 2076) catch @panic("test failure");
10245 expect(v[99] == 2077) catch @panic("test failure");
10246 expect(v[100] == 2078) catch @panic("test failure");
10247 expect(v[101] == 2079) catch @panic("test failure");
10248 expect(v[102] == 2080) catch @panic("test failure");
10249 expect(v[103] == 2081) catch @panic("test failure");
10250 expect(v[104] == 2082) catch @panic("test failure");
10251 expect(v[105] == 2083) catch @panic("test failure");
10252 expect(v[106] == 2084) catch @panic("test failure");
10253 expect(v[107] == 2085) catch @panic("test failure");
10254 expect(v[108] == 2086) catch @panic("test failure");
10255 expect(v[109] == 2087) catch @panic("test failure");
10256 expect(v[110] == 2088) catch @panic("test failure");
10257 expect(v[111] == 2089) catch @panic("test failure");
10258 expect(v[112] == 2090) catch @panic("test failure");
10259 expect(v[113] == 2091) catch @panic("test failure");
10260 expect(v[114] == 2092) catch @panic("test failure");
10261 expect(v[115] == 2093) catch @panic("test failure");
10262 expect(v[116] == 2094) catch @panic("test failure");
10263 expect(v[117] == 2095) catch @panic("test failure");
10264 expect(v[118] == 2096) catch @panic("test failure");
10265 expect(v[119] == 2097) catch @panic("test failure");
10266 expect(v[120] == 2098) catch @panic("test failure");
10267 expect(v[121] == 2099) catch @panic("test failure");
10268 expect(v[122] == 2100) catch @panic("test failure");
10269 expect(v[123] == 2101) catch @panic("test failure");
10270 expect(v[124] == 2102) catch @panic("test failure");
10271 expect(v[125] == 2103) catch @panic("test failure");
10272 expect(v[126] == 2104) catch @panic("test failure");
10273 expect(v[127] == 2105) catch @panic("test failure");
10274 expect(v[128] == 2106) catch @panic("test failure");
10275 expect(v[129] == 2107) catch @panic("test failure");
10276 expect(v[130] == 2108) catch @panic("test failure");
10277 expect(v[131] == 2109) catch @panic("test failure");
10278 expect(v[132] == 2110) catch @panic("test failure");
10279 expect(v[133] == 2111) catch @panic("test failure");
10280 expect(v[134] == 2112) catch @panic("test failure");
10281 expect(v[135] == 2113) catch @panic("test failure");
10282 expect(v[136] == 2114) catch @panic("test failure");
10283 expect(v[137] == 2115) catch @panic("test failure");
10284 expect(v[138] == 2116) catch @panic("test failure");
10285 expect(v[139] == 2117) catch @panic("test failure");
10286 expect(v[140] == 2118) catch @panic("test failure");
10287 expect(v[141] == 2119) catch @panic("test failure");
10288 expect(v[142] == 2120) catch @panic("test failure");
10289 expect(v[143] == 2121) catch @panic("test failure");
10290 expect(v[144] == 2122) catch @panic("test failure");
10291 expect(v[145] == 2123) catch @panic("test failure");
10292 expect(v[146] == 2124) catch @panic("test failure");
10293 expect(v[147] == 2125) catch @panic("test failure");
10294 expect(v[148] == 2126) catch @panic("test failure");
10295 expect(v[149] == 2127) catch @panic("test failure");
10296 expect(v[150] == 2128) catch @panic("test failure");
10297 expect(v[151] == 2129) catch @panic("test failure");
10298 expect(v[152] == 2130) catch @panic("test failure");
10299 expect(v[153] == 2131) catch @panic("test failure");
10300 expect(v[154] == 2132) catch @panic("test failure");
10301 expect(v[155] == 2133) catch @panic("test failure");
10302 expect(v[156] == 2134) catch @panic("test failure");
10303 expect(v[157] == 2135) catch @panic("test failure");
10304 expect(v[158] == 2136) catch @panic("test failure");
10305 expect(v[159] == 2137) catch @panic("test failure");
10306 expect(v[160] == 2138) catch @panic("test failure");
10307 expect(v[161] == 2139) catch @panic("test failure");
10308 expect(v[162] == 2140) catch @panic("test failure");
10309 expect(v[163] == 2141) catch @panic("test failure");
10310 expect(v[164] == 2142) catch @panic("test failure");
10311 expect(v[165] == 2143) catch @panic("test failure");
10312 expect(v[166] == 2144) catch @panic("test failure");
10313 expect(v[167] == 2145) catch @panic("test failure");
10314 expect(v[168] == 2146) catch @panic("test failure");
10315 expect(v[169] == 2147) catch @panic("test failure");
10316 expect(v[170] == 2148) catch @panic("test failure");
10317 expect(v[171] == 2149) catch @panic("test failure");
10318 expect(v[172] == 2150) catch @panic("test failure");
10319 expect(v[173] == 2151) catch @panic("test failure");
10320 expect(v[174] == 2152) catch @panic("test failure");
10321 expect(v[175] == 2153) catch @panic("test failure");
10322 expect(v[176] == 2154) catch @panic("test failure");
10323 expect(v[177] == 2155) catch @panic("test failure");
10324 expect(v[178] == 2156) catch @panic("test failure");
10325 expect(v[179] == 2157) catch @panic("test failure");
10326 expect(v[180] == 2158) catch @panic("test failure");
10327 expect(v[181] == 2159) catch @panic("test failure");
10328 expect(v[182] == 2160) catch @panic("test failure");
10329 expect(v[183] == 2161) catch @panic("test failure");
10330 expect(v[184] == 2162) catch @panic("test failure");
10331 expect(v[185] == 2163) catch @panic("test failure");
10332 expect(v[186] == 2164) catch @panic("test failure");
10333 expect(v[187] == 2165) catch @panic("test failure");
10334 expect(v[188] == 2166) catch @panic("test failure");
10335 expect(v[189] == 2167) catch @panic("test failure");
10336 expect(v[190] == 2168) catch @panic("test failure");
10337 expect(v[191] == 2169) catch @panic("test failure");
10338 expect(i == 192) catch @panic("test failure");
10339}
10340
10341extern fn c_ret_vector_192_u16() @Vector(192, u16);
10342extern fn c_vector_192_u16(@Vector(192, u16), usize) void;
10343extern fn c_test_vector_192_u16() void;
10344
10345test "@Vector(192, u16)" {
10346 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
10347 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
10348 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
10349 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10350 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
10351
10352 const v = c_ret_vector_192_u16();
10353 try expect(v[0] == 2170);
10354 try expect(v[1] == 2171);
10355 try expect(v[2] == 2172);
10356 try expect(v[3] == 2173);
10357 try expect(v[4] == 2174);
10358 try expect(v[5] == 2175);
10359 try expect(v[6] == 2176);
10360 try expect(v[7] == 2177);
10361 try expect(v[8] == 2178);
10362 try expect(v[9] == 2179);
10363 try expect(v[10] == 2180);
10364 try expect(v[11] == 2181);
10365 try expect(v[12] == 2182);
10366 try expect(v[13] == 2183);
10367 try expect(v[14] == 2184);
10368 try expect(v[15] == 2185);
10369 try expect(v[16] == 2186);
10370 try expect(v[17] == 2187);
10371 try expect(v[18] == 2188);
10372 try expect(v[19] == 2189);
10373 try expect(v[20] == 2190);
10374 try expect(v[21] == 2191);
10375 try expect(v[22] == 2192);
10376 try expect(v[23] == 2193);
10377 try expect(v[24] == 2194);
10378 try expect(v[25] == 2195);
10379 try expect(v[26] == 2196);
10380 try expect(v[27] == 2197);
10381 try expect(v[28] == 2198);
10382 try expect(v[29] == 2199);
10383 try expect(v[30] == 2200);
10384 try expect(v[31] == 2201);
10385 try expect(v[32] == 2202);
10386 try expect(v[33] == 2203);
10387 try expect(v[34] == 2204);
10388 try expect(v[35] == 2205);
10389 try expect(v[36] == 2206);
10390 try expect(v[37] == 2207);
10391 try expect(v[38] == 2208);
10392 try expect(v[39] == 2209);
10393 try expect(v[40] == 2210);
10394 try expect(v[41] == 2211);
10395 try expect(v[42] == 2212);
10396 try expect(v[43] == 2213);
10397 try expect(v[44] == 2214);
10398 try expect(v[45] == 2215);
10399 try expect(v[46] == 2216);
10400 try expect(v[47] == 2217);
10401 try expect(v[48] == 2218);
10402 try expect(v[49] == 2219);
10403 try expect(v[50] == 2220);
10404 try expect(v[51] == 2221);
10405 try expect(v[52] == 2222);
10406 try expect(v[53] == 2223);
10407 try expect(v[54] == 2224);
10408 try expect(v[55] == 2225);
10409 try expect(v[56] == 2226);
10410 try expect(v[57] == 2227);
10411 try expect(v[58] == 2228);
10412 try expect(v[59] == 2229);
10413 try expect(v[60] == 2230);
10414 try expect(v[61] == 2231);
10415 try expect(v[62] == 2232);
10416 try expect(v[63] == 2233);
10417 try expect(v[64] == 2234);
10418 try expect(v[65] == 2235);
10419 try expect(v[66] == 2236);
10420 try expect(v[67] == 2237);
10421 try expect(v[68] == 2238);
10422 try expect(v[69] == 2239);
10423 try expect(v[70] == 2240);
10424 try expect(v[71] == 2241);
10425 try expect(v[72] == 2242);
10426 try expect(v[73] == 2243);
10427 try expect(v[74] == 2244);
10428 try expect(v[75] == 2245);
10429 try expect(v[76] == 2246);
10430 try expect(v[77] == 2247);
10431 try expect(v[78] == 2248);
10432 try expect(v[79] == 2249);
10433 try expect(v[80] == 2250);
10434 try expect(v[81] == 2251);
10435 try expect(v[82] == 2252);
10436 try expect(v[83] == 2253);
10437 try expect(v[84] == 2254);
10438 try expect(v[85] == 2255);
10439 try expect(v[86] == 2256);
10440 try expect(v[87] == 2257);
10441 try expect(v[88] == 2258);
10442 try expect(v[89] == 2259);
10443 try expect(v[90] == 2260);
10444 try expect(v[91] == 2261);
10445 try expect(v[92] == 2262);
10446 try expect(v[93] == 2263);
10447 try expect(v[94] == 2264);
10448 try expect(v[95] == 2265);
10449 try expect(v[96] == 2266);
10450 try expect(v[97] == 2267);
10451 try expect(v[98] == 2268);
10452 try expect(v[99] == 2269);
10453 try expect(v[100] == 2270);
10454 try expect(v[101] == 2271);
10455 try expect(v[102] == 2272);
10456 try expect(v[103] == 2273);
10457 try expect(v[104] == 2274);
10458 try expect(v[105] == 2275);
10459 try expect(v[106] == 2276);
10460 try expect(v[107] == 2277);
10461 try expect(v[108] == 2278);
10462 try expect(v[109] == 2279);
10463 try expect(v[110] == 2280);
10464 try expect(v[111] == 2281);
10465 try expect(v[112] == 2282);
10466 try expect(v[113] == 2283);
10467 try expect(v[114] == 2284);
10468 try expect(v[115] == 2285);
10469 try expect(v[116] == 2286);
10470 try expect(v[117] == 2287);
10471 try expect(v[118] == 2288);
10472 try expect(v[119] == 2289);
10473 try expect(v[120] == 2290);
10474 try expect(v[121] == 2291);
10475 try expect(v[122] == 2292);
10476 try expect(v[123] == 2293);
10477 try expect(v[124] == 2294);
10478 try expect(v[125] == 2295);
10479 try expect(v[126] == 2296);
10480 try expect(v[127] == 2297);
10481 try expect(v[128] == 2298);
10482 try expect(v[129] == 2299);
10483 try expect(v[130] == 2300);
10484 try expect(v[131] == 2301);
10485 try expect(v[132] == 2302);
10486 try expect(v[133] == 2303);
10487 try expect(v[134] == 2304);
10488 try expect(v[135] == 2305);
10489 try expect(v[136] == 2306);
10490 try expect(v[137] == 2307);
10491 try expect(v[138] == 2308);
10492 try expect(v[139] == 2309);
10493 try expect(v[140] == 2310);
10494 try expect(v[141] == 2311);
10495 try expect(v[142] == 2312);
10496 try expect(v[143] == 2313);
10497 try expect(v[144] == 2314);
10498 try expect(v[145] == 2315);
10499 try expect(v[146] == 2316);
10500 try expect(v[147] == 2317);
10501 try expect(v[148] == 2318);
10502 try expect(v[149] == 2319);
10503 try expect(v[150] == 2320);
10504 try expect(v[151] == 2321);
10505 try expect(v[152] == 2322);
10506 try expect(v[153] == 2323);
10507 try expect(v[154] == 2324);
10508 try expect(v[155] == 2325);
10509 try expect(v[156] == 2326);
10510 try expect(v[157] == 2327);
10511 try expect(v[158] == 2328);
10512 try expect(v[159] == 2329);
10513 try expect(v[160] == 2330);
10514 try expect(v[161] == 2331);
10515 try expect(v[162] == 2332);
10516 try expect(v[163] == 2333);
10517 try expect(v[164] == 2334);
10518 try expect(v[165] == 2335);
10519 try expect(v[166] == 2336);
10520 try expect(v[167] == 2337);
10521 try expect(v[168] == 2338);
10522 try expect(v[169] == 2339);
10523 try expect(v[170] == 2340);
10524 try expect(v[171] == 2341);
10525 try expect(v[172] == 2342);
10526 try expect(v[173] == 2343);
10527 try expect(v[174] == 2344);
10528 try expect(v[175] == 2345);
10529 try expect(v[176] == 2346);
10530 try expect(v[177] == 2347);
10531 try expect(v[178] == 2348);
10532 try expect(v[179] == 2349);
10533 try expect(v[180] == 2350);
10534 try expect(v[181] == 2351);
10535 try expect(v[182] == 2352);
10536 try expect(v[183] == 2353);
10537 try expect(v[184] == 2354);
10538 try expect(v[185] == 2355);
10539 try expect(v[186] == 2356);
10540 try expect(v[187] == 2357);
10541 try expect(v[188] == 2358);
10542 try expect(v[189] == 2359);
10543 try expect(v[190] == 2360);
10544 try expect(v[191] == 2361);
10545 c_vector_192_u16(.{
10546 2362, 2363, 2364, 2365, 2366, 2367, 2368, 2369, 2370, 2371, 2372, 2373, 2374, 2375, 2376, 2377,
10547 2378, 2379, 2380, 2381, 2382, 2383, 2384, 2385, 2386, 2387, 2388, 2389, 2390, 2391, 2392, 2393,
10548 2394, 2395, 2396, 2397, 2398, 2399, 2400, 2401, 2402, 2403, 2404, 2405, 2406, 2407, 2408, 2409,
10549 2410, 2411, 2412, 2413, 2414, 2415, 2416, 2417, 2418, 2419, 2420, 2421, 2422, 2423, 2424, 2425,
10550 2426, 2427, 2428, 2429, 2430, 2431, 2432, 2433, 2434, 2435, 2436, 2437, 2438, 2439, 2440, 2441,
10551 2442, 2443, 2444, 2445, 2446, 2447, 2448, 2449, 2450, 2451, 2452, 2453, 2454, 2455, 2456, 2457,
10552 2458, 2459, 2460, 2461, 2462, 2463, 2464, 2465, 2466, 2467, 2468, 2469, 2470, 2471, 2472, 2473,
10553 2474, 2475, 2476, 2477, 2478, 2479, 2480, 2481, 2482, 2483, 2484, 2485, 2486, 2487, 2488, 2489,
10554 2490, 2491, 2492, 2493, 2494, 2495, 2496, 2497, 2498, 2499, 2500, 2501, 2502, 2503, 2504, 2505,
10555 2506, 2507, 2508, 2509, 2510, 2511, 2512, 2513, 2514, 2515, 2516, 2517, 2518, 2519, 2520, 2521,
10556 2522, 2523, 2524, 2525, 2526, 2527, 2528, 2529, 2530, 2531, 2532, 2533, 2534, 2535, 2536, 2537,
10557 2538, 2539, 2540, 2541, 2542, 2543, 2544, 2545, 2546, 2547, 2548, 2549, 2550, 2551, 2552, 2553,
10558 }, 192);
10559 c_test_vector_192_u16();
10560}
10561
10562export fn zig_ret_vector_256_u16() @Vector(256, u16) {
10563 return .{
10564 2554, 2555, 2556, 2557, 2558, 2559, 2560, 2561, 2562, 2563, 2564, 2565, 2566, 2567, 2568, 2569,
10565 2570, 2571, 2572, 2573, 2574, 2575, 2576, 2577, 2578, 2579, 2580, 2581, 2582, 2583, 2584, 2585,
10566 2586, 2587, 2588, 2589, 2590, 2591, 2592, 2593, 2594, 2595, 2596, 2597, 2598, 2599, 2600, 2601,
10567 2602, 2603, 2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611, 2612, 2613, 2614, 2615, 2616, 2617,
10568 2618, 2619, 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627, 2628, 2629, 2630, 2631, 2632, 2633,
10569 2634, 2635, 2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643, 2644, 2645, 2646, 2647, 2648, 2649,
10570 2650, 2651, 2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659, 2660, 2661, 2662, 2663, 2664, 2665,
10571 2666, 2667, 2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675, 2676, 2677, 2678, 2679, 2680, 2681,
10572 2682, 2683, 2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691, 2692, 2693, 2694, 2695, 2696, 2697,
10573 2698, 2699, 2700, 2701, 2702, 2703, 2704, 2705, 2706, 2707, 2708, 2709, 2710, 2711, 2712, 2713,
10574 2714, 2715, 2716, 2717, 2718, 2719, 2720, 2721, 2722, 2723, 2724, 2725, 2726, 2727, 2728, 2729,
10575 2730, 2731, 2732, 2733, 2734, 2735, 2736, 2737, 2738, 2739, 2740, 2741, 2742, 2743, 2744, 2745,
10576 2746, 2747, 2748, 2749, 2750, 2751, 2752, 2753, 2754, 2755, 2756, 2757, 2758, 2759, 2760, 2761,
10577 2762, 2763, 2764, 2765, 2766, 2767, 2768, 2769, 2770, 2771, 2772, 2773, 2774, 2775, 2776, 2777,
10578 2778, 2779, 2780, 2781, 2782, 2783, 2784, 2785, 2786, 2787, 2788, 2789, 2790, 2791, 2792, 2793,
10579 2794, 2795, 2796, 2797, 2798, 2799, 2800, 2801, 2802, 2803, 2804, 2805, 2806, 2807, 2808, 2809,
10580 };
10581}
10582export fn zig_vector_256_u16(v: @Vector(256, u16), i: usize) void {
10583 expect(v[0] == 2810) catch @panic("test failure");
10584 expect(v[1] == 2811) catch @panic("test failure");
10585 expect(v[2] == 2812) catch @panic("test failure");
10586 expect(v[3] == 2813) catch @panic("test failure");
10587 expect(v[4] == 2814) catch @panic("test failure");
10588 expect(v[5] == 2815) catch @panic("test failure");
10589 expect(v[6] == 2816) catch @panic("test failure");
10590 expect(v[7] == 2817) catch @panic("test failure");
10591 expect(v[8] == 2818) catch @panic("test failure");
10592 expect(v[9] == 2819) catch @panic("test failure");
10593 expect(v[10] == 2820) catch @panic("test failure");
10594 expect(v[11] == 2821) catch @panic("test failure");
10595 expect(v[12] == 2822) catch @panic("test failure");
10596 expect(v[13] == 2823) catch @panic("test failure");
10597 expect(v[14] == 2824) catch @panic("test failure");
10598 expect(v[15] == 2825) catch @panic("test failure");
10599 expect(v[16] == 2826) catch @panic("test failure");
10600 expect(v[17] == 2827) catch @panic("test failure");
10601 expect(v[18] == 2828) catch @panic("test failure");
10602 expect(v[19] == 2829) catch @panic("test failure");
10603 expect(v[20] == 2830) catch @panic("test failure");
10604 expect(v[21] == 2831) catch @panic("test failure");
10605 expect(v[22] == 2832) catch @panic("test failure");
10606 expect(v[23] == 2833) catch @panic("test failure");
10607 expect(v[24] == 2834) catch @panic("test failure");
10608 expect(v[25] == 2835) catch @panic("test failure");
10609 expect(v[26] == 2836) catch @panic("test failure");
10610 expect(v[27] == 2837) catch @panic("test failure");
10611 expect(v[28] == 2838) catch @panic("test failure");
10612 expect(v[29] == 2839) catch @panic("test failure");
10613 expect(v[30] == 2840) catch @panic("test failure");
10614 expect(v[31] == 2841) catch @panic("test failure");
10615 expect(v[32] == 2842) catch @panic("test failure");
10616 expect(v[33] == 2843) catch @panic("test failure");
10617 expect(v[34] == 2844) catch @panic("test failure");
10618 expect(v[35] == 2845) catch @panic("test failure");
10619 expect(v[36] == 2846) catch @panic("test failure");
10620 expect(v[37] == 2847) catch @panic("test failure");
10621 expect(v[38] == 2848) catch @panic("test failure");
10622 expect(v[39] == 2849) catch @panic("test failure");
10623 expect(v[40] == 2850) catch @panic("test failure");
10624 expect(v[41] == 2851) catch @panic("test failure");
10625 expect(v[42] == 2852) catch @panic("test failure");
10626 expect(v[43] == 2853) catch @panic("test failure");
10627 expect(v[44] == 2854) catch @panic("test failure");
10628 expect(v[45] == 2855) catch @panic("test failure");
10629 expect(v[46] == 2856) catch @panic("test failure");
10630 expect(v[47] == 2857) catch @panic("test failure");
10631 expect(v[48] == 2858) catch @panic("test failure");
10632 expect(v[49] == 2859) catch @panic("test failure");
10633 expect(v[50] == 2860) catch @panic("test failure");
10634 expect(v[51] == 2861) catch @panic("test failure");
10635 expect(v[52] == 2862) catch @panic("test failure");
10636 expect(v[53] == 2863) catch @panic("test failure");
10637 expect(v[54] == 2864) catch @panic("test failure");
10638 expect(v[55] == 2865) catch @panic("test failure");
10639 expect(v[56] == 2866) catch @panic("test failure");
10640 expect(v[57] == 2867) catch @panic("test failure");
10641 expect(v[58] == 2868) catch @panic("test failure");
10642 expect(v[59] == 2869) catch @panic("test failure");
10643 expect(v[60] == 2870) catch @panic("test failure");
10644 expect(v[61] == 2871) catch @panic("test failure");
10645 expect(v[62] == 2872) catch @panic("test failure");
10646 expect(v[63] == 2873) catch @panic("test failure");
10647 expect(v[64] == 2874) catch @panic("test failure");
10648 expect(v[65] == 2875) catch @panic("test failure");
10649 expect(v[66] == 2876) catch @panic("test failure");
10650 expect(v[67] == 2877) catch @panic("test failure");
10651 expect(v[68] == 2878) catch @panic("test failure");
10652 expect(v[69] == 2879) catch @panic("test failure");
10653 expect(v[70] == 2880) catch @panic("test failure");
10654 expect(v[71] == 2881) catch @panic("test failure");
10655 expect(v[72] == 2882) catch @panic("test failure");
10656 expect(v[73] == 2883) catch @panic("test failure");
10657 expect(v[74] == 2884) catch @panic("test failure");
10658 expect(v[75] == 2885) catch @panic("test failure");
10659 expect(v[76] == 2886) catch @panic("test failure");
10660 expect(v[77] == 2887) catch @panic("test failure");
10661 expect(v[78] == 2888) catch @panic("test failure");
10662 expect(v[79] == 2889) catch @panic("test failure");
10663 expect(v[80] == 2890) catch @panic("test failure");
10664 expect(v[81] == 2891) catch @panic("test failure");
10665 expect(v[82] == 2892) catch @panic("test failure");
10666 expect(v[83] == 2893) catch @panic("test failure");
10667 expect(v[84] == 2894) catch @panic("test failure");
10668 expect(v[85] == 2895) catch @panic("test failure");
10669 expect(v[86] == 2896) catch @panic("test failure");
10670 expect(v[87] == 2897) catch @panic("test failure");
10671 expect(v[88] == 2898) catch @panic("test failure");
10672 expect(v[89] == 2899) catch @panic("test failure");
10673 expect(v[90] == 2900) catch @panic("test failure");
10674 expect(v[91] == 2901) catch @panic("test failure");
10675 expect(v[92] == 2902) catch @panic("test failure");
10676 expect(v[93] == 2903) catch @panic("test failure");
10677 expect(v[94] == 2904) catch @panic("test failure");
10678 expect(v[95] == 2905) catch @panic("test failure");
10679 expect(v[96] == 2906) catch @panic("test failure");
10680 expect(v[97] == 2907) catch @panic("test failure");
10681 expect(v[98] == 2908) catch @panic("test failure");
10682 expect(v[99] == 2909) catch @panic("test failure");
10683 expect(v[100] == 2910) catch @panic("test failure");
10684 expect(v[101] == 2911) catch @panic("test failure");
10685 expect(v[102] == 2912) catch @panic("test failure");
10686 expect(v[103] == 2913) catch @panic("test failure");
10687 expect(v[104] == 2914) catch @panic("test failure");
10688 expect(v[105] == 2915) catch @panic("test failure");
10689 expect(v[106] == 2916) catch @panic("test failure");
10690 expect(v[107] == 2917) catch @panic("test failure");
10691 expect(v[108] == 2918) catch @panic("test failure");
10692 expect(v[109] == 2919) catch @panic("test failure");
10693 expect(v[110] == 2920) catch @panic("test failure");
10694 expect(v[111] == 2921) catch @panic("test failure");
10695 expect(v[112] == 2922) catch @panic("test failure");
10696 expect(v[113] == 2923) catch @panic("test failure");
10697 expect(v[114] == 2924) catch @panic("test failure");
10698 expect(v[115] == 2925) catch @panic("test failure");
10699 expect(v[116] == 2926) catch @panic("test failure");
10700 expect(v[117] == 2927) catch @panic("test failure");
10701 expect(v[118] == 2928) catch @panic("test failure");
10702 expect(v[119] == 2929) catch @panic("test failure");
10703 expect(v[120] == 2930) catch @panic("test failure");
10704 expect(v[121] == 2931) catch @panic("test failure");
10705 expect(v[122] == 2932) catch @panic("test failure");
10706 expect(v[123] == 2933) catch @panic("test failure");
10707 expect(v[124] == 2934) catch @panic("test failure");
10708 expect(v[125] == 2935) catch @panic("test failure");
10709 expect(v[126] == 2936) catch @panic("test failure");
10710 expect(v[127] == 2937) catch @panic("test failure");
10711 expect(v[128] == 2938) catch @panic("test failure");
10712 expect(v[129] == 2939) catch @panic("test failure");
10713 expect(v[130] == 2940) catch @panic("test failure");
10714 expect(v[131] == 2941) catch @panic("test failure");
10715 expect(v[132] == 2942) catch @panic("test failure");
10716 expect(v[133] == 2943) catch @panic("test failure");
10717 expect(v[134] == 2944) catch @panic("test failure");
10718 expect(v[135] == 2945) catch @panic("test failure");
10719 expect(v[136] == 2946) catch @panic("test failure");
10720 expect(v[137] == 2947) catch @panic("test failure");
10721 expect(v[138] == 2948) catch @panic("test failure");
10722 expect(v[139] == 2949) catch @panic("test failure");
10723 expect(v[140] == 2950) catch @panic("test failure");
10724 expect(v[141] == 2951) catch @panic("test failure");
10725 expect(v[142] == 2952) catch @panic("test failure");
10726 expect(v[143] == 2953) catch @panic("test failure");
10727 expect(v[144] == 2954) catch @panic("test failure");
10728 expect(v[145] == 2955) catch @panic("test failure");
10729 expect(v[146] == 2956) catch @panic("test failure");
10730 expect(v[147] == 2957) catch @panic("test failure");
10731 expect(v[148] == 2958) catch @panic("test failure");
10732 expect(v[149] == 2959) catch @panic("test failure");
10733 expect(v[150] == 2960) catch @panic("test failure");
10734 expect(v[151] == 2961) catch @panic("test failure");
10735 expect(v[152] == 2962) catch @panic("test failure");
10736 expect(v[153] == 2963) catch @panic("test failure");
10737 expect(v[154] == 2964) catch @panic("test failure");
10738 expect(v[155] == 2965) catch @panic("test failure");
10739 expect(v[156] == 2966) catch @panic("test failure");
10740 expect(v[157] == 2967) catch @panic("test failure");
10741 expect(v[158] == 2968) catch @panic("test failure");
10742 expect(v[159] == 2969) catch @panic("test failure");
10743 expect(v[160] == 2970) catch @panic("test failure");
10744 expect(v[161] == 2971) catch @panic("test failure");
10745 expect(v[162] == 2972) catch @panic("test failure");
10746 expect(v[163] == 2973) catch @panic("test failure");
10747 expect(v[164] == 2974) catch @panic("test failure");
10748 expect(v[165] == 2975) catch @panic("test failure");
10749 expect(v[166] == 2976) catch @panic("test failure");
10750 expect(v[167] == 2977) catch @panic("test failure");
10751 expect(v[168] == 2978) catch @panic("test failure");
10752 expect(v[169] == 2979) catch @panic("test failure");
10753 expect(v[170] == 2980) catch @panic("test failure");
10754 expect(v[171] == 2981) catch @panic("test failure");
10755 expect(v[172] == 2982) catch @panic("test failure");
10756 expect(v[173] == 2983) catch @panic("test failure");
10757 expect(v[174] == 2984) catch @panic("test failure");
10758 expect(v[175] == 2985) catch @panic("test failure");
10759 expect(v[176] == 2986) catch @panic("test failure");
10760 expect(v[177] == 2987) catch @panic("test failure");
10761 expect(v[178] == 2988) catch @panic("test failure");
10762 expect(v[179] == 2989) catch @panic("test failure");
10763 expect(v[180] == 2990) catch @panic("test failure");
10764 expect(v[181] == 2991) catch @panic("test failure");
10765 expect(v[182] == 2992) catch @panic("test failure");
10766 expect(v[183] == 2993) catch @panic("test failure");
10767 expect(v[184] == 2994) catch @panic("test failure");
10768 expect(v[185] == 2995) catch @panic("test failure");
10769 expect(v[186] == 2996) catch @panic("test failure");
10770 expect(v[187] == 2997) catch @panic("test failure");
10771 expect(v[188] == 2998) catch @panic("test failure");
10772 expect(v[189] == 2999) catch @panic("test failure");
10773 expect(v[190] == 3000) catch @panic("test failure");
10774 expect(v[191] == 3001) catch @panic("test failure");
10775 expect(v[192] == 3002) catch @panic("test failure");
10776 expect(v[193] == 3003) catch @panic("test failure");
10777 expect(v[194] == 3004) catch @panic("test failure");
10778 expect(v[195] == 3005) catch @panic("test failure");
10779 expect(v[196] == 3006) catch @panic("test failure");
10780 expect(v[197] == 3007) catch @panic("test failure");
10781 expect(v[198] == 3008) catch @panic("test failure");
10782 expect(v[199] == 3009) catch @panic("test failure");
10783 expect(v[200] == 3010) catch @panic("test failure");
10784 expect(v[201] == 3011) catch @panic("test failure");
10785 expect(v[202] == 3012) catch @panic("test failure");
10786 expect(v[203] == 3013) catch @panic("test failure");
10787 expect(v[204] == 3014) catch @panic("test failure");
10788 expect(v[205] == 3015) catch @panic("test failure");
10789 expect(v[206] == 3016) catch @panic("test failure");
10790 expect(v[207] == 3017) catch @panic("test failure");
10791 expect(v[208] == 3018) catch @panic("test failure");
10792 expect(v[209] == 3019) catch @panic("test failure");
10793 expect(v[210] == 3020) catch @panic("test failure");
10794 expect(v[211] == 3021) catch @panic("test failure");
10795 expect(v[212] == 3022) catch @panic("test failure");
10796 expect(v[213] == 3023) catch @panic("test failure");
10797 expect(v[214] == 3024) catch @panic("test failure");
10798 expect(v[215] == 3025) catch @panic("test failure");
10799 expect(v[216] == 3026) catch @panic("test failure");
10800 expect(v[217] == 3027) catch @panic("test failure");
10801 expect(v[218] == 3028) catch @panic("test failure");
10802 expect(v[219] == 3029) catch @panic("test failure");
10803 expect(v[220] == 3030) catch @panic("test failure");
10804 expect(v[221] == 3031) catch @panic("test failure");
10805 expect(v[222] == 3032) catch @panic("test failure");
10806 expect(v[223] == 3033) catch @panic("test failure");
10807 expect(v[224] == 3034) catch @panic("test failure");
10808 expect(v[225] == 3035) catch @panic("test failure");
10809 expect(v[226] == 3036) catch @panic("test failure");
10810 expect(v[227] == 3037) catch @panic("test failure");
10811 expect(v[228] == 3038) catch @panic("test failure");
10812 expect(v[229] == 3039) catch @panic("test failure");
10813 expect(v[230] == 3040) catch @panic("test failure");
10814 expect(v[231] == 3041) catch @panic("test failure");
10815 expect(v[232] == 3042) catch @panic("test failure");
10816 expect(v[233] == 3043) catch @panic("test failure");
10817 expect(v[234] == 3044) catch @panic("test failure");
10818 expect(v[235] == 3045) catch @panic("test failure");
10819 expect(v[236] == 3046) catch @panic("test failure");
10820 expect(v[237] == 3047) catch @panic("test failure");
10821 expect(v[238] == 3048) catch @panic("test failure");
10822 expect(v[239] == 3049) catch @panic("test failure");
10823 expect(v[240] == 3050) catch @panic("test failure");
10824 expect(v[241] == 3051) catch @panic("test failure");
10825 expect(v[242] == 3052) catch @panic("test failure");
10826 expect(v[243] == 3053) catch @panic("test failure");
10827 expect(v[244] == 3054) catch @panic("test failure");
10828 expect(v[245] == 3055) catch @panic("test failure");
10829 expect(v[246] == 3056) catch @panic("test failure");
10830 expect(v[247] == 3057) catch @panic("test failure");
10831 expect(v[248] == 3058) catch @panic("test failure");
10832 expect(v[249] == 3059) catch @panic("test failure");
10833 expect(v[250] == 3060) catch @panic("test failure");
10834 expect(v[251] == 3061) catch @panic("test failure");
10835 expect(v[252] == 3062) catch @panic("test failure");
10836 expect(v[253] == 3063) catch @panic("test failure");
10837 expect(v[254] == 3064) catch @panic("test failure");
10838 expect(v[255] == 3065) catch @panic("test failure");
10839 expect(i == 256) catch @panic("test failure");
10840}
10841
10842extern fn c_ret_vector_256_u16() @Vector(256, u16);
10843extern fn c_vector_256_u16(@Vector(256, u16), usize) void;
10844extern fn c_test_vector_256_u16() void;
10845
10846test "@Vector(256, u16)" {
10847 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
10848 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
10849 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
10850 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10851 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
10852
10853 const v = c_ret_vector_256_u16();
10854 try expect(v[0] == 3066);
10855 try expect(v[1] == 3067);
10856 try expect(v[2] == 3068);
10857 try expect(v[3] == 3069);
10858 try expect(v[4] == 3070);
10859 try expect(v[5] == 3071);
10860 try expect(v[6] == 3072);
10861 try expect(v[7] == 3073);
10862 try expect(v[8] == 3074);
10863 try expect(v[9] == 3075);
10864 try expect(v[10] == 3076);
10865 try expect(v[11] == 3077);
10866 try expect(v[12] == 3078);
10867 try expect(v[13] == 3079);
10868 try expect(v[14] == 3080);
10869 try expect(v[15] == 3081);
10870 try expect(v[16] == 3082);
10871 try expect(v[17] == 3083);
10872 try expect(v[18] == 3084);
10873 try expect(v[19] == 3085);
10874 try expect(v[20] == 3086);
10875 try expect(v[21] == 3087);
10876 try expect(v[22] == 3088);
10877 try expect(v[23] == 3089);
10878 try expect(v[24] == 3090);
10879 try expect(v[25] == 3091);
10880 try expect(v[26] == 3092);
10881 try expect(v[27] == 3093);
10882 try expect(v[28] == 3094);
10883 try expect(v[29] == 3095);
10884 try expect(v[30] == 3096);
10885 try expect(v[31] == 3097);
10886 try expect(v[32] == 3098);
10887 try expect(v[33] == 3099);
10888 try expect(v[34] == 3100);
10889 try expect(v[35] == 3101);
10890 try expect(v[36] == 3102);
10891 try expect(v[37] == 3103);
10892 try expect(v[38] == 3104);
10893 try expect(v[39] == 3105);
10894 try expect(v[40] == 3106);
10895 try expect(v[41] == 3107);
10896 try expect(v[42] == 3108);
10897 try expect(v[43] == 3109);
10898 try expect(v[44] == 3110);
10899 try expect(v[45] == 3111);
10900 try expect(v[46] == 3112);
10901 try expect(v[47] == 3113);
10902 try expect(v[48] == 3114);
10903 try expect(v[49] == 3115);
10904 try expect(v[50] == 3116);
10905 try expect(v[51] == 3117);
10906 try expect(v[52] == 3118);
10907 try expect(v[53] == 3119);
10908 try expect(v[54] == 3120);
10909 try expect(v[55] == 3121);
10910 try expect(v[56] == 3122);
10911 try expect(v[57] == 3123);
10912 try expect(v[58] == 3124);
10913 try expect(v[59] == 3125);
10914 try expect(v[60] == 3126);
10915 try expect(v[61] == 3127);
10916 try expect(v[62] == 3128);
10917 try expect(v[63] == 3129);
10918 try expect(v[64] == 3130);
10919 try expect(v[65] == 3131);
10920 try expect(v[66] == 3132);
10921 try expect(v[67] == 3133);
10922 try expect(v[68] == 3134);
10923 try expect(v[69] == 3135);
10924 try expect(v[70] == 3136);
10925 try expect(v[71] == 3137);
10926 try expect(v[72] == 3138);
10927 try expect(v[73] == 3139);
10928 try expect(v[74] == 3140);
10929 try expect(v[75] == 3141);
10930 try expect(v[76] == 3142);
10931 try expect(v[77] == 3143);
10932 try expect(v[78] == 3144);
10933 try expect(v[79] == 3145);
10934 try expect(v[80] == 3146);
10935 try expect(v[81] == 3147);
10936 try expect(v[82] == 3148);
10937 try expect(v[83] == 3149);
10938 try expect(v[84] == 3150);
10939 try expect(v[85] == 3151);
10940 try expect(v[86] == 3152);
10941 try expect(v[87] == 3153);
10942 try expect(v[88] == 3154);
10943 try expect(v[89] == 3155);
10944 try expect(v[90] == 3156);
10945 try expect(v[91] == 3157);
10946 try expect(v[92] == 3158);
10947 try expect(v[93] == 3159);
10948 try expect(v[94] == 3160);
10949 try expect(v[95] == 3161);
10950 try expect(v[96] == 3162);
10951 try expect(v[97] == 3163);
10952 try expect(v[98] == 3164);
10953 try expect(v[99] == 3165);
10954 try expect(v[100] == 3166);
10955 try expect(v[101] == 3167);
10956 try expect(v[102] == 3168);
10957 try expect(v[103] == 3169);
10958 try expect(v[104] == 3170);
10959 try expect(v[105] == 3171);
10960 try expect(v[106] == 3172);
10961 try expect(v[107] == 3173);
10962 try expect(v[108] == 3174);
10963 try expect(v[109] == 3175);
10964 try expect(v[110] == 3176);
10965 try expect(v[111] == 3177);
10966 try expect(v[112] == 3178);
10967 try expect(v[113] == 3179);
10968 try expect(v[114] == 3180);
10969 try expect(v[115] == 3181);
10970 try expect(v[116] == 3182);
10971 try expect(v[117] == 3183);
10972 try expect(v[118] == 3184);
10973 try expect(v[119] == 3185);
10974 try expect(v[120] == 3186);
10975 try expect(v[121] == 3187);
10976 try expect(v[122] == 3188);
10977 try expect(v[123] == 3189);
10978 try expect(v[124] == 3190);
10979 try expect(v[125] == 3191);
10980 try expect(v[126] == 3192);
10981 try expect(v[127] == 3193);
10982 try expect(v[128] == 3194);
10983 try expect(v[129] == 3195);
10984 try expect(v[130] == 3196);
10985 try expect(v[131] == 3197);
10986 try expect(v[132] == 3198);
10987 try expect(v[133] == 3199);
10988 try expect(v[134] == 3200);
10989 try expect(v[135] == 3201);
10990 try expect(v[136] == 3202);
10991 try expect(v[137] == 3203);
10992 try expect(v[138] == 3204);
10993 try expect(v[139] == 3205);
10994 try expect(v[140] == 3206);
10995 try expect(v[141] == 3207);
10996 try expect(v[142] == 3208);
10997 try expect(v[143] == 3209);
10998 try expect(v[144] == 3210);
10999 try expect(v[145] == 3211);
11000 try expect(v[146] == 3212);
11001 try expect(v[147] == 3213);
11002 try expect(v[148] == 3214);
11003 try expect(v[149] == 3215);
11004 try expect(v[150] == 3216);
11005 try expect(v[151] == 3217);
11006 try expect(v[152] == 3218);
11007 try expect(v[153] == 3219);
11008 try expect(v[154] == 3220);
11009 try expect(v[155] == 3221);
11010 try expect(v[156] == 3222);
11011 try expect(v[157] == 3223);
11012 try expect(v[158] == 3224);
11013 try expect(v[159] == 3225);
11014 try expect(v[160] == 3226);
11015 try expect(v[161] == 3227);
11016 try expect(v[162] == 3228);
11017 try expect(v[163] == 3229);
11018 try expect(v[164] == 3230);
11019 try expect(v[165] == 3231);
11020 try expect(v[166] == 3232);
11021 try expect(v[167] == 3233);
11022 try expect(v[168] == 3234);
11023 try expect(v[169] == 3235);
11024 try expect(v[170] == 3236);
11025 try expect(v[171] == 3237);
11026 try expect(v[172] == 3238);
11027 try expect(v[173] == 3239);
11028 try expect(v[174] == 3240);
11029 try expect(v[175] == 3241);
11030 try expect(v[176] == 3242);
11031 try expect(v[177] == 3243);
11032 try expect(v[178] == 3244);
11033 try expect(v[179] == 3245);
11034 try expect(v[180] == 3246);
11035 try expect(v[181] == 3247);
11036 try expect(v[182] == 3248);
11037 try expect(v[183] == 3249);
11038 try expect(v[184] == 3250);
11039 try expect(v[185] == 3251);
11040 try expect(v[186] == 3252);
11041 try expect(v[187] == 3253);
11042 try expect(v[188] == 3254);
11043 try expect(v[189] == 3255);
11044 try expect(v[190] == 3256);
11045 try expect(v[191] == 3257);
11046 try expect(v[192] == 3258);
11047 try expect(v[193] == 3259);
11048 try expect(v[194] == 3260);
11049 try expect(v[195] == 3261);
11050 try expect(v[196] == 3262);
11051 try expect(v[197] == 3263);
11052 try expect(v[198] == 3264);
11053 try expect(v[199] == 3265);
11054 try expect(v[200] == 3266);
11055 try expect(v[201] == 3267);
11056 try expect(v[202] == 3268);
11057 try expect(v[203] == 3269);
11058 try expect(v[204] == 3270);
11059 try expect(v[205] == 3271);
11060 try expect(v[206] == 3272);
11061 try expect(v[207] == 3273);
11062 try expect(v[208] == 3274);
11063 try expect(v[209] == 3275);
11064 try expect(v[210] == 3276);
11065 try expect(v[211] == 3277);
11066 try expect(v[212] == 3278);
11067 try expect(v[213] == 3279);
11068 try expect(v[214] == 3280);
11069 try expect(v[215] == 3281);
11070 try expect(v[216] == 3282);
11071 try expect(v[217] == 3283);
11072 try expect(v[218] == 3284);
11073 try expect(v[219] == 3285);
11074 try expect(v[220] == 3286);
11075 try expect(v[221] == 3287);
11076 try expect(v[222] == 3288);
11077 try expect(v[223] == 3289);
11078 try expect(v[224] == 3290);
11079 try expect(v[225] == 3291);
11080 try expect(v[226] == 3292);
11081 try expect(v[227] == 3293);
11082 try expect(v[228] == 3294);
11083 try expect(v[229] == 3295);
11084 try expect(v[230] == 3296);
11085 try expect(v[231] == 3297);
11086 try expect(v[232] == 3298);
11087 try expect(v[233] == 3299);
11088 try expect(v[234] == 3300);
11089 try expect(v[235] == 3301);
11090 try expect(v[236] == 3302);
11091 try expect(v[237] == 3303);
11092 try expect(v[238] == 3304);
11093 try expect(v[239] == 3305);
11094 try expect(v[240] == 3306);
11095 try expect(v[241] == 3307);
11096 try expect(v[242] == 3308);
11097 try expect(v[243] == 3309);
11098 try expect(v[244] == 3310);
11099 try expect(v[245] == 3311);
11100 try expect(v[246] == 3312);
11101 try expect(v[247] == 3313);
11102 try expect(v[248] == 3314);
11103 try expect(v[249] == 3315);
11104 try expect(v[250] == 3316);
11105 try expect(v[251] == 3317);
11106 try expect(v[252] == 3318);
11107 try expect(v[253] == 3319);
11108 try expect(v[254] == 3320);
11109 try expect(v[255] == 3321);
11110 c_vector_256_u16(.{
11111 3322, 3323, 3324, 3325, 3326, 3327, 3328, 3329, 3330, 3331, 3332, 3333, 3334, 3335, 3336, 3337,
11112 3338, 3339, 3340, 3341, 3342, 3343, 3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351, 3352, 3353,
11113 3354, 3355, 3356, 3357, 3358, 3359, 3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367, 3368, 3369,
11114 3370, 3371, 3372, 3373, 3374, 3375, 3376, 3377, 3378, 3379, 3380, 3381, 3382, 3383, 3384, 3385,
11115 3386, 3387, 3388, 3389, 3390, 3391, 3392, 3393, 3394, 3395, 3396, 3397, 3398, 3399, 3400, 3401,
11116 3402, 3403, 3404, 3405, 3406, 3407, 3408, 3409, 3410, 3411, 3412, 3413, 3414, 3415, 3416, 3417,
11117 3418, 3419, 3420, 3421, 3422, 3423, 3424, 3425, 3426, 3427, 3428, 3429, 3430, 3431, 3432, 3433,
11118 3434, 3435, 3436, 3437, 3438, 3439, 3440, 3441, 3442, 3443, 3444, 3445, 3446, 3447, 3448, 3449,
11119 3450, 3451, 3452, 3453, 3454, 3455, 3456, 3457, 3458, 3459, 3460, 3461, 3462, 3463, 3464, 3465,
11120 3466, 3467, 3468, 3469, 3470, 3471, 3472, 3473, 3474, 3475, 3476, 3477, 3478, 3479, 3480, 3481,
11121 3482, 3483, 3484, 3485, 3486, 3487, 3488, 3489, 3490, 3491, 3492, 3493, 3494, 3495, 3496, 3497,
11122 3498, 3499, 3500, 3501, 3502, 3503, 3504, 3505, 3506, 3507, 3508, 3509, 3510, 3511, 3512, 3513,
11123 3514, 3515, 3516, 3517, 3518, 3519, 3520, 3521, 3522, 3523, 3524, 3525, 3526, 3527, 3528, 3529,
11124 3530, 3531, 3532, 3533, 3534, 3535, 3536, 3537, 3538, 3539, 3540, 3541, 3542, 3543, 3544, 3545,
11125 3546, 3547, 3548, 3549, 3550, 3551, 3552, 3553, 3554, 3555, 3556, 3557, 3558, 3559, 3560, 3561,
11126 3562, 3563, 3564, 3565, 3566, 3567, 3568, 3569, 3570, 3571, 3572, 3573, 3574, 3575, 3576, 3577,
11127 }, 256);
11128 c_test_vector_256_u16();
11129}
11130
11131export fn zig_ret_vector_1_u32() @Vector(1, u32) {
11132 return .{1};
11133}
11134export fn zig_vector_1_u32(v: @Vector(1, u32), i: usize) void {
11135 expect(v[0] == 2) catch @panic("test failure");
11136 expect(i == 1) catch @panic("test failure");
11137}
11138
11139extern fn c_ret_vector_1_u32() @Vector(1, u32);
11140extern fn c_vector_1_u32(@Vector(1, u32), usize) void;
11141extern fn c_test_vector_1_u32() void;
11142
11143test "@Vector(1, u32)" {
11144 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
11145 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
11146
11147 const v = c_ret_vector_1_u32();
11148 try expect(v[0] == 3);
11149 c_vector_1_u32(.{4}, 1);
11150 c_test_vector_1_u32();
11151}
11152
11153export fn zig_ret_vector_2_u32() @Vector(2, u32) {
11154 return .{ 5, 6 };
11155}
11156export fn zig_vector_2_u32(v: @Vector(2, u32), i: usize) void {
11157 expect(v[0] == 7) catch @panic("test failure");
11158 expect(v[1] == 8) catch @panic("test failure");
11159 expect(i == 2) catch @panic("test failure");
11160}
11161
11162extern fn c_ret_vector_2_u32() @Vector(2, u32);
11163extern fn c_vector_2_u32(@Vector(2, u32), usize) void;
11164extern fn c_test_vector_2_u32() void;
11165
11166test "@Vector(2, u32)" {
11167 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11168 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11169 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
11170 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .windows) return error.SkipZigTest;
11171
11172 const v = c_ret_vector_2_u32();
11173 try expect(v[0] == 9);
11174 try expect(v[1] == 10);
11175 c_vector_2_u32(.{ 11, 12 }, 2);
11176 c_test_vector_2_u32();
11177}
11178
11179export fn zig_ret_vector_3_u32() @Vector(3, u32) {
11180 return .{ 13, 14, 15 };
11181}
11182export fn zig_vector_3_u32(v: @Vector(3, u32), i: usize) void {
11183 expect(v[0] == 16) catch @panic("test failure");
11184 expect(v[1] == 17) catch @panic("test failure");
11185 expect(v[2] == 18) catch @panic("test failure");
11186 expect(i == 3) catch @panic("test failure");
11187}
11188
11189extern fn c_ret_vector_3_u32() @Vector(3, u32);
11190extern fn c_vector_3_u32(@Vector(3, u32), usize) void;
11191extern fn c_test_vector_3_u32() void;
11192
11193test "@Vector(3, u32)" {
11194 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
11195 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11196 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11197
11198 const v = c_ret_vector_3_u32();
11199 try expect(v[0] == 19);
11200 try expect(v[1] == 20);
11201 try expect(v[2] == 21);
11202 c_vector_3_u32(.{ 22, 23, 24 }, 3);
11203 c_test_vector_3_u32();
11204}
11205
11206export fn zig_ret_vector_4_u32() @Vector(4, u32) {
11207 return .{ 25, 26, 27, 28 };
11208}
11209export fn zig_vector_4_u32(v: @Vector(4, u32), i: usize) void {
11210 expect(v[0] == 29) catch @panic("test failure");
11211 expect(v[1] == 30) catch @panic("test failure");
11212 expect(v[2] == 31) catch @panic("test failure");
11213 expect(v[3] == 32) catch @panic("test failure");
11214 expect(i == 4) catch @panic("test failure");
11215}
11216export fn zig_vector_4_u32_vector_4_u32(v0: @Vector(4, u32), v1: @Vector(4, u32), i: usize) void {
11217 expect(v0[0] == 33) catch @panic("test failure");
11218 expect(v0[1] == 34) catch @panic("test failure");
11219 expect(v0[2] == 35) catch @panic("test failure");
11220 expect(v0[3] == 36) catch @panic("test failure");
11221 expect(v1[0] == 37) catch @panic("test failure");
11222 expect(v1[1] == 38) catch @panic("test failure");
11223 expect(v1[2] == 39) catch @panic("test failure");
11224 expect(v1[3] == 40) catch @panic("test failure");
11225 expect(i == 8) catch @panic("test failure");
11226}
11227
11228extern fn c_ret_vector_4_u32() @Vector(4, u32);
11229extern fn c_vector_4_u32(@Vector(4, u32), usize) void;
11230extern fn c_vector_4_u32_vector_4_u32(@Vector(4, u32), @Vector(4, u32), usize) void;
11231extern fn c_test_vector_4_u32() void;
11232
11233test "@Vector(4, u32)" {
11234 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11235
11236 const v = c_ret_vector_4_u32();
11237 try expect(v[0] == 41);
11238 try expect(v[1] == 42);
11239 try expect(v[2] == 43);
11240 try expect(v[3] == 44);
11241 c_vector_4_u32(.{ 45, 46, 47, 48 }, 4);
11242 c_vector_4_u32_vector_4_u32(.{ 49, 50, 51, 52 }, .{ 53, 54, 55, 56 }, 8);
11243 c_test_vector_4_u32();
11244}
11245
11246export fn zig_ret_vector_6_u32() @Vector(6, u32) {
11247 return .{ 41, 42, 43, 44, 45, 46 };
11248}
11249export fn zig_vector_6_u32(v: @Vector(6, u32), i: usize) void {
11250 expect(v[0] == 47) catch @panic("test failure");
11251 expect(v[1] == 48) catch @panic("test failure");
11252 expect(v[2] == 49) catch @panic("test failure");
11253 expect(v[3] == 50) catch @panic("test failure");
11254 expect(v[4] == 51) catch @panic("test failure");
11255 expect(v[5] == 52) catch @panic("test failure");
11256 expect(i == 6) catch @panic("test failure");
11257}
11258
11259extern fn c_ret_vector_6_u32() @Vector(6, u32);
11260extern fn c_vector_6_u32(@Vector(6, u32), usize) void;
11261extern fn c_test_vector_6_u32() void;
11262
11263test "@Vector(6, u32)" {
11264 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11265 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11266 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11267 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11268 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11269
11270 const v = c_ret_vector_6_u32();
11271 try expect(v[0] == 53);
11272 try expect(v[1] == 54);
11273 try expect(v[2] == 55);
11274 try expect(v[3] == 56);
11275 try expect(v[4] == 57);
11276 try expect(v[5] == 58);
11277 c_vector_6_u32(.{ 59, 60, 61, 62, 63, 64 }, 6);
11278 c_test_vector_6_u32();
11279}
11280
11281export fn zig_ret_vector_8_u32() @Vector(8, u32) {
11282 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
11283}
11284export fn zig_vector_8_u32(v: @Vector(8, u32), i: usize) void {
11285 expect(v[0] == 73) catch @panic("test failure");
11286 expect(v[1] == 74) catch @panic("test failure");
11287 expect(v[2] == 75) catch @panic("test failure");
11288 expect(v[3] == 76) catch @panic("test failure");
11289 expect(v[4] == 77) catch @panic("test failure");
11290 expect(v[5] == 78) catch @panic("test failure");
11291 expect(v[6] == 79) catch @panic("test failure");
11292 expect(v[7] == 80) catch @panic("test failure");
11293 expect(i == 8) catch @panic("test failure");
11294}
11295
11296extern fn c_ret_vector_8_u32() @Vector(8, u32);
11297extern fn c_vector_8_u32(@Vector(8, u32), usize) void;
11298extern fn c_test_vector_8_u32() void;
11299
11300test "@Vector(8, u32)" {
11301 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11302 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11303 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11304 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11305
11306 const v = c_ret_vector_8_u32();
11307 try expect(v[0] == 81);
11308 try expect(v[1] == 82);
11309 try expect(v[2] == 83);
11310 try expect(v[3] == 84);
11311 try expect(v[4] == 85);
11312 try expect(v[5] == 86);
11313 try expect(v[6] == 87);
11314 try expect(v[7] == 88);
11315 c_vector_8_u32(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
11316 c_test_vector_8_u32();
11317}
11318
11319export fn zig_ret_vector_12_u32() @Vector(12, u32) {
11320 return .{ 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108 };
11321}
11322export fn zig_vector_12_u32(v: @Vector(12, u32), i: usize) void {
11323 expect(v[0] == 109) catch @panic("test failure");
11324 expect(v[1] == 110) catch @panic("test failure");
11325 expect(v[2] == 111) catch @panic("test failure");
11326 expect(v[3] == 112) catch @panic("test failure");
11327 expect(v[4] == 113) catch @panic("test failure");
11328 expect(v[5] == 114) catch @panic("test failure");
11329 expect(v[6] == 115) catch @panic("test failure");
11330 expect(v[7] == 116) catch @panic("test failure");
11331 expect(v[8] == 117) catch @panic("test failure");
11332 expect(v[9] == 118) catch @panic("test failure");
11333 expect(v[10] == 119) catch @panic("test failure");
11334 expect(v[11] == 120) catch @panic("test failure");
11335 expect(i == 12) catch @panic("test failure");
11336}
11337
11338extern fn c_ret_vector_12_u32() @Vector(12, u32);
11339extern fn c_vector_12_u32(@Vector(12, u32), usize) void;
11340extern fn c_test_vector_12_u32() void;
11341
11342test "@Vector(12, u32)" {
11343 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11344 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11345 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11346 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11347 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11348
11349 const v = c_ret_vector_12_u32();
11350 try expect(v[0] == 121);
11351 try expect(v[1] == 122);
11352 try expect(v[2] == 123);
11353 try expect(v[3] == 124);
11354 try expect(v[4] == 125);
11355 try expect(v[5] == 126);
11356 try expect(v[6] == 127);
11357 try expect(v[7] == 128);
11358 try expect(v[8] == 129);
11359 try expect(v[9] == 130);
11360 try expect(v[10] == 131);
11361 try expect(v[11] == 132);
11362 c_vector_12_u32(.{ 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 }, 12);
11363 c_test_vector_12_u32();
11364}
11365
11366export fn zig_ret_vector_16_u32() @Vector(16, u32) {
11367 return .{ 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160 };
11368}
11369export fn zig_vector_16_u32(v: @Vector(16, u32), i: usize) void {
11370 expect(v[0] == 161) catch @panic("test failure");
11371 expect(v[1] == 162) catch @panic("test failure");
11372 expect(v[2] == 163) catch @panic("test failure");
11373 expect(v[3] == 164) catch @panic("test failure");
11374 expect(v[4] == 165) catch @panic("test failure");
11375 expect(v[5] == 166) catch @panic("test failure");
11376 expect(v[6] == 167) catch @panic("test failure");
11377 expect(v[7] == 168) catch @panic("test failure");
11378 expect(v[8] == 169) catch @panic("test failure");
11379 expect(v[9] == 170) catch @panic("test failure");
11380 expect(v[10] == 171) catch @panic("test failure");
11381 expect(v[11] == 172) catch @panic("test failure");
11382 expect(v[12] == 173) catch @panic("test failure");
11383 expect(v[13] == 174) catch @panic("test failure");
11384 expect(v[14] == 175) catch @panic("test failure");
11385 expect(v[15] == 176) catch @panic("test failure");
11386 expect(i == 16) catch @panic("test failure");
11387}
11388
11389extern fn c_ret_vector_16_u32() @Vector(16, u32);
11390extern fn c_vector_16_u32(@Vector(16, u32), usize) void;
11391extern fn c_test_vector_16_u32() void;
11392
11393test "@Vector(16, u32)" {
11394 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11395 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11396 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11397 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11398
11399 const v = c_ret_vector_16_u32();
11400 try expect(v[0] == 177);
11401 try expect(v[1] == 178);
11402 try expect(v[2] == 179);
11403 try expect(v[3] == 180);
11404 try expect(v[4] == 181);
11405 try expect(v[5] == 182);
11406 try expect(v[6] == 183);
11407 try expect(v[7] == 184);
11408 try expect(v[8] == 185);
11409 try expect(v[9] == 186);
11410 try expect(v[10] == 187);
11411 try expect(v[11] == 188);
11412 try expect(v[12] == 189);
11413 try expect(v[13] == 190);
11414 try expect(v[14] == 191);
11415 try expect(v[15] == 192);
11416 c_vector_16_u32(.{ 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208 }, 16);
11417 c_test_vector_16_u32();
11418}
11419
11420export fn zig_ret_vector_24_u32() @Vector(24, u32) {
11421 return .{
11422 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224,
11423 225, 226, 227, 228, 229, 230, 231, 232,
11424 };
11425}
11426export fn zig_vector_24_u32(v: @Vector(24, u32), i: usize) void {
11427 expect(v[0] == 233) catch @panic("test failure");
11428 expect(v[1] == 234) catch @panic("test failure");
11429 expect(v[2] == 235) catch @panic("test failure");
11430 expect(v[3] == 236) catch @panic("test failure");
11431 expect(v[4] == 237) catch @panic("test failure");
11432 expect(v[5] == 238) catch @panic("test failure");
11433 expect(v[6] == 239) catch @panic("test failure");
11434 expect(v[7] == 240) catch @panic("test failure");
11435 expect(v[8] == 241) catch @panic("test failure");
11436 expect(v[9] == 242) catch @panic("test failure");
11437 expect(v[10] == 243) catch @panic("test failure");
11438 expect(v[11] == 244) catch @panic("test failure");
11439 expect(v[12] == 245) catch @panic("test failure");
11440 expect(v[13] == 246) catch @panic("test failure");
11441 expect(v[14] == 247) catch @panic("test failure");
11442 expect(v[15] == 248) catch @panic("test failure");
11443 expect(v[16] == 249) catch @panic("test failure");
11444 expect(v[17] == 250) catch @panic("test failure");
11445 expect(v[18] == 251) catch @panic("test failure");
11446 expect(v[19] == 252) catch @panic("test failure");
11447 expect(v[20] == 253) catch @panic("test failure");
11448 expect(v[21] == 254) catch @panic("test failure");
11449 expect(v[22] == 255) catch @panic("test failure");
11450 expect(v[23] == 256) catch @panic("test failure");
11451 expect(i == 24) catch @panic("test failure");
11452}
11453
11454extern fn c_ret_vector_24_u32() @Vector(24, u32);
11455extern fn c_vector_24_u32(@Vector(24, u32), usize) void;
11456extern fn c_test_vector_24_u32() void;
11457
11458test "@Vector(24, u32)" {
11459 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11460 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11461 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11462 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11463 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11464
11465 const v = c_ret_vector_24_u32();
11466 try expect(v[0] == 257);
11467 try expect(v[1] == 258);
11468 try expect(v[2] == 259);
11469 try expect(v[3] == 260);
11470 try expect(v[4] == 261);
11471 try expect(v[5] == 262);
11472 try expect(v[6] == 263);
11473 try expect(v[7] == 264);
11474 try expect(v[8] == 265);
11475 try expect(v[9] == 266);
11476 try expect(v[10] == 267);
11477 try expect(v[11] == 268);
11478 try expect(v[12] == 269);
11479 try expect(v[13] == 270);
11480 try expect(v[14] == 271);
11481 try expect(v[15] == 272);
11482 try expect(v[16] == 273);
11483 try expect(v[17] == 274);
11484 try expect(v[18] == 275);
11485 try expect(v[19] == 276);
11486 try expect(v[20] == 277);
11487 try expect(v[21] == 278);
11488 try expect(v[22] == 279);
11489 try expect(v[23] == 280);
11490 c_vector_24_u32(.{
11491 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296,
11492 297, 298, 299, 300, 301, 302, 303, 304,
11493 }, 24);
11494 c_test_vector_24_u32();
11495}
11496
11497export fn zig_ret_vector_32_u32() @Vector(32, u32) {
11498 return .{
11499 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320,
11500 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336,
11501 };
11502}
11503export fn zig_vector_32_u32(v: @Vector(32, u32), i: usize) void {
11504 expect(v[0] == 337) catch @panic("test failure");
11505 expect(v[1] == 338) catch @panic("test failure");
11506 expect(v[2] == 339) catch @panic("test failure");
11507 expect(v[3] == 340) catch @panic("test failure");
11508 expect(v[4] == 341) catch @panic("test failure");
11509 expect(v[5] == 342) catch @panic("test failure");
11510 expect(v[6] == 343) catch @panic("test failure");
11511 expect(v[7] == 344) catch @panic("test failure");
11512 expect(v[8] == 345) catch @panic("test failure");
11513 expect(v[9] == 346) catch @panic("test failure");
11514 expect(v[10] == 347) catch @panic("test failure");
11515 expect(v[11] == 348) catch @panic("test failure");
11516 expect(v[12] == 349) catch @panic("test failure");
11517 expect(v[13] == 350) catch @panic("test failure");
11518 expect(v[14] == 351) catch @panic("test failure");
11519 expect(v[15] == 352) catch @panic("test failure");
11520 expect(v[16] == 353) catch @panic("test failure");
11521 expect(v[17] == 354) catch @panic("test failure");
11522 expect(v[18] == 355) catch @panic("test failure");
11523 expect(v[19] == 356) catch @panic("test failure");
11524 expect(v[20] == 357) catch @panic("test failure");
11525 expect(v[21] == 358) catch @panic("test failure");
11526 expect(v[22] == 359) catch @panic("test failure");
11527 expect(v[23] == 360) catch @panic("test failure");
11528 expect(v[24] == 361) catch @panic("test failure");
11529 expect(v[25] == 362) catch @panic("test failure");
11530 expect(v[26] == 363) catch @panic("test failure");
11531 expect(v[27] == 364) catch @panic("test failure");
11532 expect(v[28] == 365) catch @panic("test failure");
11533 expect(v[29] == 366) catch @panic("test failure");
11534 expect(v[30] == 367) catch @panic("test failure");
11535 expect(v[31] == 368) catch @panic("test failure");
11536 expect(i == 32) catch @panic("test failure");
11537}
11538
11539extern fn c_ret_vector_32_u32() @Vector(32, u32);
11540extern fn c_vector_32_u32(@Vector(32, u32), usize) void;
11541extern fn c_test_vector_32_u32() void;
11542
11543test "@Vector(32, u32)" {
11544 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11545 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11546 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
11547 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11548 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11549
11550 const v = c_ret_vector_32_u32();
11551 try expect(v[0] == 369);
11552 try expect(v[1] == 370);
11553 try expect(v[2] == 371);
11554 try expect(v[3] == 372);
11555 try expect(v[4] == 373);
11556 try expect(v[5] == 374);
11557 try expect(v[6] == 375);
11558 try expect(v[7] == 376);
11559 try expect(v[8] == 377);
11560 try expect(v[9] == 378);
11561 try expect(v[10] == 379);
11562 try expect(v[11] == 380);
11563 try expect(v[12] == 381);
11564 try expect(v[13] == 382);
11565 try expect(v[14] == 383);
11566 try expect(v[15] == 384);
11567 try expect(v[16] == 385);
11568 try expect(v[17] == 386);
11569 try expect(v[18] == 387);
11570 try expect(v[19] == 388);
11571 try expect(v[20] == 389);
11572 try expect(v[21] == 390);
11573 try expect(v[22] == 391);
11574 try expect(v[23] == 392);
11575 try expect(v[24] == 393);
11576 try expect(v[25] == 394);
11577 try expect(v[26] == 395);
11578 try expect(v[27] == 396);
11579 try expect(v[28] == 397);
11580 try expect(v[29] == 398);
11581 try expect(v[30] == 399);
11582 try expect(v[31] == 400);
11583 c_vector_32_u32(.{
11584 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416,
11585 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432,
11586 }, 32);
11587 c_test_vector_32_u32();
11588}
11589
11590export fn zig_ret_vector_48_u32() @Vector(48, u32) {
11591 return .{
11592 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448,
11593 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464,
11594 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,
11595 };
11596}
11597export fn zig_vector_48_u32(v: @Vector(48, u32), i: usize) void {
11598 expect(v[0] == 481) catch @panic("test failure");
11599 expect(v[1] == 482) catch @panic("test failure");
11600 expect(v[2] == 483) catch @panic("test failure");
11601 expect(v[3] == 484) catch @panic("test failure");
11602 expect(v[4] == 485) catch @panic("test failure");
11603 expect(v[5] == 486) catch @panic("test failure");
11604 expect(v[6] == 487) catch @panic("test failure");
11605 expect(v[7] == 488) catch @panic("test failure");
11606 expect(v[8] == 489) catch @panic("test failure");
11607 expect(v[9] == 490) catch @panic("test failure");
11608 expect(v[10] == 491) catch @panic("test failure");
11609 expect(v[11] == 492) catch @panic("test failure");
11610 expect(v[12] == 493) catch @panic("test failure");
11611 expect(v[13] == 494) catch @panic("test failure");
11612 expect(v[14] == 495) catch @panic("test failure");
11613 expect(v[15] == 496) catch @panic("test failure");
11614 expect(v[16] == 497) catch @panic("test failure");
11615 expect(v[17] == 498) catch @panic("test failure");
11616 expect(v[18] == 499) catch @panic("test failure");
11617 expect(v[19] == 500) catch @panic("test failure");
11618 expect(v[20] == 501) catch @panic("test failure");
11619 expect(v[21] == 502) catch @panic("test failure");
11620 expect(v[22] == 503) catch @panic("test failure");
11621 expect(v[23] == 504) catch @panic("test failure");
11622 expect(v[24] == 505) catch @panic("test failure");
11623 expect(v[25] == 506) catch @panic("test failure");
11624 expect(v[26] == 507) catch @panic("test failure");
11625 expect(v[27] == 508) catch @panic("test failure");
11626 expect(v[28] == 509) catch @panic("test failure");
11627 expect(v[29] == 510) catch @panic("test failure");
11628 expect(v[30] == 511) catch @panic("test failure");
11629 expect(v[31] == 512) catch @panic("test failure");
11630 expect(v[32] == 513) catch @panic("test failure");
11631 expect(v[33] == 514) catch @panic("test failure");
11632 expect(v[34] == 515) catch @panic("test failure");
11633 expect(v[35] == 516) catch @panic("test failure");
11634 expect(v[36] == 517) catch @panic("test failure");
11635 expect(v[37] == 518) catch @panic("test failure");
11636 expect(v[38] == 519) catch @panic("test failure");
11637 expect(v[39] == 520) catch @panic("test failure");
11638 expect(v[40] == 521) catch @panic("test failure");
11639 expect(v[41] == 522) catch @panic("test failure");
11640 expect(v[42] == 523) catch @panic("test failure");
11641 expect(v[43] == 524) catch @panic("test failure");
11642 expect(v[44] == 525) catch @panic("test failure");
11643 expect(v[45] == 526) catch @panic("test failure");
11644 expect(v[46] == 527) catch @panic("test failure");
11645 expect(v[47] == 528) catch @panic("test failure");
11646 expect(i == 48) catch @panic("test failure");
11647}
11648
11649extern fn c_ret_vector_48_u32() @Vector(48, u32);
11650extern fn c_vector_48_u32(@Vector(48, u32), usize) void;
11651extern fn c_test_vector_48_u32() void;
11652
11653test "@Vector(48, u32)" {
11654 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11655 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11656 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11657 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11658 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11659
11660 const v = c_ret_vector_48_u32();
11661 try expect(v[0] == 529);
11662 try expect(v[1] == 530);
11663 try expect(v[2] == 531);
11664 try expect(v[3] == 532);
11665 try expect(v[4] == 533);
11666 try expect(v[5] == 534);
11667 try expect(v[6] == 535);
11668 try expect(v[7] == 536);
11669 try expect(v[8] == 537);
11670 try expect(v[9] == 538);
11671 try expect(v[10] == 539);
11672 try expect(v[11] == 540);
11673 try expect(v[12] == 541);
11674 try expect(v[13] == 542);
11675 try expect(v[14] == 543);
11676 try expect(v[15] == 544);
11677 try expect(v[16] == 545);
11678 try expect(v[17] == 546);
11679 try expect(v[18] == 547);
11680 try expect(v[19] == 548);
11681 try expect(v[20] == 549);
11682 try expect(v[21] == 550);
11683 try expect(v[22] == 551);
11684 try expect(v[23] == 552);
11685 try expect(v[24] == 553);
11686 try expect(v[25] == 554);
11687 try expect(v[26] == 555);
11688 try expect(v[27] == 556);
11689 try expect(v[28] == 557);
11690 try expect(v[29] == 558);
11691 try expect(v[30] == 559);
11692 try expect(v[31] == 560);
11693 try expect(v[32] == 561);
11694 try expect(v[33] == 562);
11695 try expect(v[34] == 563);
11696 try expect(v[35] == 564);
11697 try expect(v[36] == 565);
11698 try expect(v[37] == 566);
11699 try expect(v[38] == 567);
11700 try expect(v[39] == 568);
11701 try expect(v[40] == 569);
11702 try expect(v[41] == 570);
11703 try expect(v[42] == 571);
11704 try expect(v[43] == 572);
11705 try expect(v[44] == 573);
11706 try expect(v[45] == 574);
11707 try expect(v[46] == 575);
11708 try expect(v[47] == 576);
11709 c_vector_48_u32(.{
11710 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592,
11711 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608,
11712 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624,
11713 }, 48);
11714 c_test_vector_48_u32();
11715}
11716
11717export fn zig_ret_vector_64_u32() @Vector(64, u32) {
11718 return .{
11719 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640,
11720 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656,
11721 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672,
11722 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688,
11723 };
11724}
11725export fn zig_vector_64_u32(v: @Vector(64, u32), i: usize) void {
11726 expect(v[0] == 689) catch @panic("test failure");
11727 expect(v[1] == 690) catch @panic("test failure");
11728 expect(v[2] == 691) catch @panic("test failure");
11729 expect(v[3] == 692) catch @panic("test failure");
11730 expect(v[4] == 693) catch @panic("test failure");
11731 expect(v[5] == 694) catch @panic("test failure");
11732 expect(v[6] == 695) catch @panic("test failure");
11733 expect(v[7] == 696) catch @panic("test failure");
11734 expect(v[8] == 697) catch @panic("test failure");
11735 expect(v[9] == 698) catch @panic("test failure");
11736 expect(v[10] == 699) catch @panic("test failure");
11737 expect(v[11] == 700) catch @panic("test failure");
11738 expect(v[12] == 701) catch @panic("test failure");
11739 expect(v[13] == 702) catch @panic("test failure");
11740 expect(v[14] == 703) catch @panic("test failure");
11741 expect(v[15] == 704) catch @panic("test failure");
11742 expect(v[16] == 705) catch @panic("test failure");
11743 expect(v[17] == 706) catch @panic("test failure");
11744 expect(v[18] == 707) catch @panic("test failure");
11745 expect(v[19] == 708) catch @panic("test failure");
11746 expect(v[20] == 709) catch @panic("test failure");
11747 expect(v[21] == 710) catch @panic("test failure");
11748 expect(v[22] == 711) catch @panic("test failure");
11749 expect(v[23] == 712) catch @panic("test failure");
11750 expect(v[24] == 713) catch @panic("test failure");
11751 expect(v[25] == 714) catch @panic("test failure");
11752 expect(v[26] == 715) catch @panic("test failure");
11753 expect(v[27] == 716) catch @panic("test failure");
11754 expect(v[28] == 717) catch @panic("test failure");
11755 expect(v[29] == 718) catch @panic("test failure");
11756 expect(v[30] == 719) catch @panic("test failure");
11757 expect(v[31] == 720) catch @panic("test failure");
11758 expect(v[32] == 721) catch @panic("test failure");
11759 expect(v[33] == 722) catch @panic("test failure");
11760 expect(v[34] == 723) catch @panic("test failure");
11761 expect(v[35] == 724) catch @panic("test failure");
11762 expect(v[36] == 725) catch @panic("test failure");
11763 expect(v[37] == 726) catch @panic("test failure");
11764 expect(v[38] == 727) catch @panic("test failure");
11765 expect(v[39] == 728) catch @panic("test failure");
11766 expect(v[40] == 729) catch @panic("test failure");
11767 expect(v[41] == 730) catch @panic("test failure");
11768 expect(v[42] == 731) catch @panic("test failure");
11769 expect(v[43] == 732) catch @panic("test failure");
11770 expect(v[44] == 733) catch @panic("test failure");
11771 expect(v[45] == 734) catch @panic("test failure");
11772 expect(v[46] == 735) catch @panic("test failure");
11773 expect(v[47] == 736) catch @panic("test failure");
11774 expect(v[48] == 737) catch @panic("test failure");
11775 expect(v[49] == 738) catch @panic("test failure");
11776 expect(v[50] == 739) catch @panic("test failure");
11777 expect(v[51] == 740) catch @panic("test failure");
11778 expect(v[52] == 741) catch @panic("test failure");
11779 expect(v[53] == 742) catch @panic("test failure");
11780 expect(v[54] == 743) catch @panic("test failure");
11781 expect(v[55] == 744) catch @panic("test failure");
11782 expect(v[56] == 745) catch @panic("test failure");
11783 expect(v[57] == 746) catch @panic("test failure");
11784 expect(v[58] == 747) catch @panic("test failure");
11785 expect(v[59] == 748) catch @panic("test failure");
11786 expect(v[60] == 749) catch @panic("test failure");
11787 expect(v[61] == 750) catch @panic("test failure");
11788 expect(v[62] == 751) catch @panic("test failure");
11789 expect(v[63] == 752) catch @panic("test failure");
11790 expect(i == 64) catch @panic("test failure");
11791}
11792
11793extern fn c_ret_vector_64_u32() @Vector(64, u32);
11794extern fn c_vector_64_u32(@Vector(64, u32), usize) void;
11795extern fn c_test_vector_64_u32() void;
11796
11797test "@Vector(64, u32)" {
11798 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11799 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11800 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
11801 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11802 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11803
11804 const v = c_ret_vector_64_u32();
11805 try expect(v[0] == 753);
11806 try expect(v[1] == 754);
11807 try expect(v[2] == 755);
11808 try expect(v[3] == 756);
11809 try expect(v[4] == 757);
11810 try expect(v[5] == 758);
11811 try expect(v[6] == 759);
11812 try expect(v[7] == 760);
11813 try expect(v[8] == 761);
11814 try expect(v[9] == 762);
11815 try expect(v[10] == 763);
11816 try expect(v[11] == 764);
11817 try expect(v[12] == 765);
11818 try expect(v[13] == 766);
11819 try expect(v[14] == 767);
11820 try expect(v[15] == 768);
11821 try expect(v[16] == 769);
11822 try expect(v[17] == 770);
11823 try expect(v[18] == 771);
11824 try expect(v[19] == 772);
11825 try expect(v[20] == 773);
11826 try expect(v[21] == 774);
11827 try expect(v[22] == 775);
11828 try expect(v[23] == 776);
11829 try expect(v[24] == 777);
11830 try expect(v[25] == 778);
11831 try expect(v[26] == 779);
11832 try expect(v[27] == 780);
11833 try expect(v[28] == 781);
11834 try expect(v[29] == 782);
11835 try expect(v[30] == 783);
11836 try expect(v[31] == 784);
11837 try expect(v[32] == 785);
11838 try expect(v[33] == 786);
11839 try expect(v[34] == 787);
11840 try expect(v[35] == 788);
11841 try expect(v[36] == 789);
11842 try expect(v[37] == 790);
11843 try expect(v[38] == 791);
11844 try expect(v[39] == 792);
11845 try expect(v[40] == 793);
11846 try expect(v[41] == 794);
11847 try expect(v[42] == 795);
11848 try expect(v[43] == 796);
11849 try expect(v[44] == 797);
11850 try expect(v[45] == 798);
11851 try expect(v[46] == 799);
11852 try expect(v[47] == 800);
11853 try expect(v[48] == 801);
11854 try expect(v[49] == 802);
11855 try expect(v[50] == 803);
11856 try expect(v[51] == 804);
11857 try expect(v[52] == 805);
11858 try expect(v[53] == 806);
11859 try expect(v[54] == 807);
11860 try expect(v[55] == 808);
11861 try expect(v[56] == 809);
11862 try expect(v[57] == 810);
11863 try expect(v[58] == 811);
11864 try expect(v[59] == 812);
11865 try expect(v[60] == 813);
11866 try expect(v[61] == 814);
11867 try expect(v[62] == 815);
11868 try expect(v[63] == 816);
11869 c_vector_64_u32(.{
11870 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832,
11871 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,
11872 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864,
11873 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880,
11874 }, 64);
11875 c_test_vector_64_u32();
11876}
11877
11878export fn zig_ret_vector_96_u32() @Vector(96, u32) {
11879 return .{
11880 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905,
11881 906, 907, 908, 909, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 920, 921,
11882 922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 933, 934, 935, 936, 937,
11883 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 952, 953,
11884 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 967, 968, 969,
11885 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 983, 984, 985,
11886 };
11887}
11888export fn zig_vector_96_u32(v: @Vector(96, u32), i: usize) void {
11889 expect(v[0] == 986) catch @panic("test failure");
11890 expect(v[1] == 987) catch @panic("test failure");
11891 expect(v[2] == 988) catch @panic("test failure");
11892 expect(v[3] == 989) catch @panic("test failure");
11893 expect(v[4] == 990) catch @panic("test failure");
11894 expect(v[5] == 991) catch @panic("test failure");
11895 expect(v[6] == 992) catch @panic("test failure");
11896 expect(v[7] == 993) catch @panic("test failure");
11897 expect(v[8] == 994) catch @panic("test failure");
11898 expect(v[9] == 995) catch @panic("test failure");
11899 expect(v[10] == 996) catch @panic("test failure");
11900 expect(v[11] == 997) catch @panic("test failure");
11901 expect(v[12] == 998) catch @panic("test failure");
11902 expect(v[13] == 999) catch @panic("test failure");
11903 expect(v[14] == 1000) catch @panic("test failure");
11904 expect(v[15] == 1001) catch @panic("test failure");
11905 expect(v[16] == 1002) catch @panic("test failure");
11906 expect(v[17] == 1003) catch @panic("test failure");
11907 expect(v[18] == 1004) catch @panic("test failure");
11908 expect(v[19] == 1005) catch @panic("test failure");
11909 expect(v[20] == 1006) catch @panic("test failure");
11910 expect(v[21] == 1007) catch @panic("test failure");
11911 expect(v[22] == 1008) catch @panic("test failure");
11912 expect(v[23] == 1009) catch @panic("test failure");
11913 expect(v[24] == 1010) catch @panic("test failure");
11914 expect(v[25] == 1011) catch @panic("test failure");
11915 expect(v[26] == 1012) catch @panic("test failure");
11916 expect(v[27] == 1013) catch @panic("test failure");
11917 expect(v[28] == 1014) catch @panic("test failure");
11918 expect(v[29] == 1015) catch @panic("test failure");
11919 expect(v[30] == 1016) catch @panic("test failure");
11920 expect(v[31] == 1017) catch @panic("test failure");
11921 expect(v[32] == 1018) catch @panic("test failure");
11922 expect(v[33] == 1019) catch @panic("test failure");
11923 expect(v[34] == 1020) catch @panic("test failure");
11924 expect(v[35] == 1021) catch @panic("test failure");
11925 expect(v[36] == 1022) catch @panic("test failure");
11926 expect(v[37] == 1023) catch @panic("test failure");
11927 expect(v[38] == 1024) catch @panic("test failure");
11928 expect(v[39] == 1025) catch @panic("test failure");
11929 expect(v[40] == 1026) catch @panic("test failure");
11930 expect(v[41] == 1027) catch @panic("test failure");
11931 expect(v[42] == 1028) catch @panic("test failure");
11932 expect(v[43] == 1029) catch @panic("test failure");
11933 expect(v[44] == 1030) catch @panic("test failure");
11934 expect(v[45] == 1031) catch @panic("test failure");
11935 expect(v[46] == 1032) catch @panic("test failure");
11936 expect(v[47] == 1033) catch @panic("test failure");
11937 expect(v[48] == 1034) catch @panic("test failure");
11938 expect(v[49] == 1035) catch @panic("test failure");
11939 expect(v[50] == 1036) catch @panic("test failure");
11940 expect(v[51] == 1037) catch @panic("test failure");
11941 expect(v[52] == 1038) catch @panic("test failure");
11942 expect(v[53] == 1039) catch @panic("test failure");
11943 expect(v[54] == 1040) catch @panic("test failure");
11944 expect(v[55] == 1041) catch @panic("test failure");
11945 expect(v[56] == 1042) catch @panic("test failure");
11946 expect(v[57] == 1043) catch @panic("test failure");
11947 expect(v[58] == 1044) catch @panic("test failure");
11948 expect(v[59] == 1045) catch @panic("test failure");
11949 expect(v[60] == 1046) catch @panic("test failure");
11950 expect(v[61] == 1047) catch @panic("test failure");
11951 expect(v[62] == 1048) catch @panic("test failure");
11952 expect(v[63] == 1049) catch @panic("test failure");
11953 expect(v[64] == 1050) catch @panic("test failure");
11954 expect(v[65] == 1051) catch @panic("test failure");
11955 expect(v[66] == 1052) catch @panic("test failure");
11956 expect(v[67] == 1053) catch @panic("test failure");
11957 expect(v[68] == 1054) catch @panic("test failure");
11958 expect(v[69] == 1055) catch @panic("test failure");
11959 expect(v[70] == 1056) catch @panic("test failure");
11960 expect(v[71] == 1057) catch @panic("test failure");
11961 expect(v[72] == 1058) catch @panic("test failure");
11962 expect(v[73] == 1059) catch @panic("test failure");
11963 expect(v[74] == 1060) catch @panic("test failure");
11964 expect(v[75] == 1061) catch @panic("test failure");
11965 expect(v[76] == 1062) catch @panic("test failure");
11966 expect(v[77] == 1063) catch @panic("test failure");
11967 expect(v[78] == 1064) catch @panic("test failure");
11968 expect(v[79] == 1065) catch @panic("test failure");
11969 expect(v[80] == 1066) catch @panic("test failure");
11970 expect(v[81] == 1067) catch @panic("test failure");
11971 expect(v[82] == 1068) catch @panic("test failure");
11972 expect(v[83] == 1069) catch @panic("test failure");
11973 expect(v[84] == 1070) catch @panic("test failure");
11974 expect(v[85] == 1071) catch @panic("test failure");
11975 expect(v[86] == 1072) catch @panic("test failure");
11976 expect(v[87] == 1073) catch @panic("test failure");
11977 expect(v[88] == 1074) catch @panic("test failure");
11978 expect(v[89] == 1075) catch @panic("test failure");
11979 expect(v[90] == 1076) catch @panic("test failure");
11980 expect(v[91] == 1077) catch @panic("test failure");
11981 expect(v[92] == 1078) catch @panic("test failure");
11982 expect(v[93] == 1079) catch @panic("test failure");
11983 expect(v[94] == 1080) catch @panic("test failure");
11984 expect(v[95] == 1081) catch @panic("test failure");
11985 expect(i == 96) catch @panic("test failure");
11986}
11987
11988extern fn c_ret_vector_96_u32() @Vector(96, u32);
11989extern fn c_vector_96_u32(@Vector(96, u32), usize) void;
11990extern fn c_test_vector_96_u32() void;
11991
11992test "@Vector(96, u32)" {
11993 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11994 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11995 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
11996 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11997 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
11998
11999 const v = c_ret_vector_96_u32();
12000 try expect(v[0] == 1082);
12001 try expect(v[1] == 1083);
12002 try expect(v[2] == 1084);
12003 try expect(v[3] == 1085);
12004 try expect(v[4] == 1086);
12005 try expect(v[5] == 1087);
12006 try expect(v[6] == 1088);
12007 try expect(v[7] == 1089);
12008 try expect(v[8] == 1090);
12009 try expect(v[9] == 1091);
12010 try expect(v[10] == 1092);
12011 try expect(v[11] == 1093);
12012 try expect(v[12] == 1094);
12013 try expect(v[13] == 1095);
12014 try expect(v[14] == 1096);
12015 try expect(v[15] == 1097);
12016 try expect(v[16] == 1098);
12017 try expect(v[17] == 1099);
12018 try expect(v[18] == 1100);
12019 try expect(v[19] == 1101);
12020 try expect(v[20] == 1102);
12021 try expect(v[21] == 1103);
12022 try expect(v[22] == 1104);
12023 try expect(v[23] == 1105);
12024 try expect(v[24] == 1106);
12025 try expect(v[25] == 1107);
12026 try expect(v[26] == 1108);
12027 try expect(v[27] == 1109);
12028 try expect(v[28] == 1110);
12029 try expect(v[29] == 1111);
12030 try expect(v[30] == 1112);
12031 try expect(v[31] == 1113);
12032 try expect(v[32] == 1114);
12033 try expect(v[33] == 1115);
12034 try expect(v[34] == 1116);
12035 try expect(v[35] == 1117);
12036 try expect(v[36] == 1118);
12037 try expect(v[37] == 1119);
12038 try expect(v[38] == 1120);
12039 try expect(v[39] == 1121);
12040 try expect(v[40] == 1122);
12041 try expect(v[41] == 1123);
12042 try expect(v[42] == 1124);
12043 try expect(v[43] == 1125);
12044 try expect(v[44] == 1126);
12045 try expect(v[45] == 1127);
12046 try expect(v[46] == 1128);
12047 try expect(v[47] == 1129);
12048 try expect(v[48] == 1130);
12049 try expect(v[49] == 1131);
12050 try expect(v[50] == 1132);
12051 try expect(v[51] == 1133);
12052 try expect(v[52] == 1134);
12053 try expect(v[53] == 1135);
12054 try expect(v[54] == 1136);
12055 try expect(v[55] == 1137);
12056 try expect(v[56] == 1138);
12057 try expect(v[57] == 1139);
12058 try expect(v[58] == 1140);
12059 try expect(v[59] == 1141);
12060 try expect(v[60] == 1142);
12061 try expect(v[61] == 1143);
12062 try expect(v[62] == 1144);
12063 try expect(v[63] == 1145);
12064 try expect(v[64] == 1146);
12065 try expect(v[65] == 1147);
12066 try expect(v[66] == 1148);
12067 try expect(v[67] == 1149);
12068 try expect(v[68] == 1150);
12069 try expect(v[69] == 1151);
12070 try expect(v[70] == 1152);
12071 try expect(v[71] == 1153);
12072 try expect(v[72] == 1154);
12073 try expect(v[73] == 1155);
12074 try expect(v[74] == 1156);
12075 try expect(v[75] == 1157);
12076 try expect(v[76] == 1158);
12077 try expect(v[77] == 1159);
12078 try expect(v[78] == 1160);
12079 try expect(v[79] == 1161);
12080 try expect(v[80] == 1162);
12081 try expect(v[81] == 1163);
12082 try expect(v[82] == 1164);
12083 try expect(v[83] == 1165);
12084 try expect(v[84] == 1166);
12085 try expect(v[85] == 1167);
12086 try expect(v[86] == 1168);
12087 try expect(v[87] == 1169);
12088 try expect(v[88] == 1170);
12089 try expect(v[89] == 1171);
12090 try expect(v[90] == 1172);
12091 try expect(v[91] == 1173);
12092 try expect(v[92] == 1174);
12093 try expect(v[93] == 1175);
12094 try expect(v[94] == 1176);
12095 try expect(v[95] == 1177);
12096 c_vector_96_u32(.{
12097 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1192, 1193,
12098 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209,
12099 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225,
12100 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241,
12101 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1256, 1257,
12102 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273,
12103 }, 96);
12104 c_test_vector_96_u32();
12105}
12106
12107export fn zig_ret_vector_128_u32() @Vector(128, u32) {
12108 return .{
12109 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289,
12110 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305,
12111 1306, 1307, 1308, 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321,
12112 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337,
12113 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353,
12114 1354, 1355, 1356, 1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369,
12115 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385,
12116 1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401,
12117 };
12118}
12119export fn zig_vector_128_u32(v: @Vector(128, u32), i: usize) void {
12120 expect(v[0] == 1402) catch @panic("test failure");
12121 expect(v[1] == 1403) catch @panic("test failure");
12122 expect(v[2] == 1404) catch @panic("test failure");
12123 expect(v[3] == 1405) catch @panic("test failure");
12124 expect(v[4] == 1406) catch @panic("test failure");
12125 expect(v[5] == 1407) catch @panic("test failure");
12126 expect(v[6] == 1408) catch @panic("test failure");
12127 expect(v[7] == 1409) catch @panic("test failure");
12128 expect(v[8] == 1410) catch @panic("test failure");
12129 expect(v[9] == 1411) catch @panic("test failure");
12130 expect(v[10] == 1412) catch @panic("test failure");
12131 expect(v[11] == 1413) catch @panic("test failure");
12132 expect(v[12] == 1414) catch @panic("test failure");
12133 expect(v[13] == 1415) catch @panic("test failure");
12134 expect(v[14] == 1416) catch @panic("test failure");
12135 expect(v[15] == 1417) catch @panic("test failure");
12136 expect(v[16] == 1418) catch @panic("test failure");
12137 expect(v[17] == 1419) catch @panic("test failure");
12138 expect(v[18] == 1420) catch @panic("test failure");
12139 expect(v[19] == 1421) catch @panic("test failure");
12140 expect(v[20] == 1422) catch @panic("test failure");
12141 expect(v[21] == 1423) catch @panic("test failure");
12142 expect(v[22] == 1424) catch @panic("test failure");
12143 expect(v[23] == 1425) catch @panic("test failure");
12144 expect(v[24] == 1426) catch @panic("test failure");
12145 expect(v[25] == 1427) catch @panic("test failure");
12146 expect(v[26] == 1428) catch @panic("test failure");
12147 expect(v[27] == 1429) catch @panic("test failure");
12148 expect(v[28] == 1430) catch @panic("test failure");
12149 expect(v[29] == 1431) catch @panic("test failure");
12150 expect(v[30] == 1432) catch @panic("test failure");
12151 expect(v[31] == 1433) catch @panic("test failure");
12152 expect(v[32] == 1434) catch @panic("test failure");
12153 expect(v[33] == 1435) catch @panic("test failure");
12154 expect(v[34] == 1436) catch @panic("test failure");
12155 expect(v[35] == 1437) catch @panic("test failure");
12156 expect(v[36] == 1438) catch @panic("test failure");
12157 expect(v[37] == 1439) catch @panic("test failure");
12158 expect(v[38] == 1440) catch @panic("test failure");
12159 expect(v[39] == 1441) catch @panic("test failure");
12160 expect(v[40] == 1442) catch @panic("test failure");
12161 expect(v[41] == 1443) catch @panic("test failure");
12162 expect(v[42] == 1444) catch @panic("test failure");
12163 expect(v[43] == 1445) catch @panic("test failure");
12164 expect(v[44] == 1446) catch @panic("test failure");
12165 expect(v[45] == 1447) catch @panic("test failure");
12166 expect(v[46] == 1448) catch @panic("test failure");
12167 expect(v[47] == 1449) catch @panic("test failure");
12168 expect(v[48] == 1450) catch @panic("test failure");
12169 expect(v[49] == 1451) catch @panic("test failure");
12170 expect(v[50] == 1452) catch @panic("test failure");
12171 expect(v[51] == 1453) catch @panic("test failure");
12172 expect(v[52] == 1454) catch @panic("test failure");
12173 expect(v[53] == 1455) catch @panic("test failure");
12174 expect(v[54] == 1456) catch @panic("test failure");
12175 expect(v[55] == 1457) catch @panic("test failure");
12176 expect(v[56] == 1458) catch @panic("test failure");
12177 expect(v[57] == 1459) catch @panic("test failure");
12178 expect(v[58] == 1460) catch @panic("test failure");
12179 expect(v[59] == 1461) catch @panic("test failure");
12180 expect(v[60] == 1462) catch @panic("test failure");
12181 expect(v[61] == 1463) catch @panic("test failure");
12182 expect(v[62] == 1464) catch @panic("test failure");
12183 expect(v[63] == 1465) catch @panic("test failure");
12184 expect(v[64] == 1466) catch @panic("test failure");
12185 expect(v[65] == 1467) catch @panic("test failure");
12186 expect(v[66] == 1468) catch @panic("test failure");
12187 expect(v[67] == 1469) catch @panic("test failure");
12188 expect(v[68] == 1470) catch @panic("test failure");
12189 expect(v[69] == 1471) catch @panic("test failure");
12190 expect(v[70] == 1472) catch @panic("test failure");
12191 expect(v[71] == 1473) catch @panic("test failure");
12192 expect(v[72] == 1474) catch @panic("test failure");
12193 expect(v[73] == 1475) catch @panic("test failure");
12194 expect(v[74] == 1476) catch @panic("test failure");
12195 expect(v[75] == 1477) catch @panic("test failure");
12196 expect(v[76] == 1478) catch @panic("test failure");
12197 expect(v[77] == 1479) catch @panic("test failure");
12198 expect(v[78] == 1480) catch @panic("test failure");
12199 expect(v[79] == 1481) catch @panic("test failure");
12200 expect(v[80] == 1482) catch @panic("test failure");
12201 expect(v[81] == 1483) catch @panic("test failure");
12202 expect(v[82] == 1484) catch @panic("test failure");
12203 expect(v[83] == 1485) catch @panic("test failure");
12204 expect(v[84] == 1486) catch @panic("test failure");
12205 expect(v[85] == 1487) catch @panic("test failure");
12206 expect(v[86] == 1488) catch @panic("test failure");
12207 expect(v[87] == 1489) catch @panic("test failure");
12208 expect(v[88] == 1490) catch @panic("test failure");
12209 expect(v[89] == 1491) catch @panic("test failure");
12210 expect(v[90] == 1492) catch @panic("test failure");
12211 expect(v[91] == 1493) catch @panic("test failure");
12212 expect(v[92] == 1494) catch @panic("test failure");
12213 expect(v[93] == 1495) catch @panic("test failure");
12214 expect(v[94] == 1496) catch @panic("test failure");
12215 expect(v[95] == 1497) catch @panic("test failure");
12216 expect(v[96] == 1498) catch @panic("test failure");
12217 expect(v[97] == 1499) catch @panic("test failure");
12218 expect(v[98] == 1500) catch @panic("test failure");
12219 expect(v[99] == 1501) catch @panic("test failure");
12220 expect(v[100] == 1502) catch @panic("test failure");
12221 expect(v[101] == 1503) catch @panic("test failure");
12222 expect(v[102] == 1504) catch @panic("test failure");
12223 expect(v[103] == 1505) catch @panic("test failure");
12224 expect(v[104] == 1506) catch @panic("test failure");
12225 expect(v[105] == 1507) catch @panic("test failure");
12226 expect(v[106] == 1508) catch @panic("test failure");
12227 expect(v[107] == 1509) catch @panic("test failure");
12228 expect(v[108] == 1510) catch @panic("test failure");
12229 expect(v[109] == 1511) catch @panic("test failure");
12230 expect(v[110] == 1512) catch @panic("test failure");
12231 expect(v[111] == 1513) catch @panic("test failure");
12232 expect(v[112] == 1514) catch @panic("test failure");
12233 expect(v[113] == 1515) catch @panic("test failure");
12234 expect(v[114] == 1516) catch @panic("test failure");
12235 expect(v[115] == 1517) catch @panic("test failure");
12236 expect(v[116] == 1518) catch @panic("test failure");
12237 expect(v[117] == 1519) catch @panic("test failure");
12238 expect(v[118] == 1520) catch @panic("test failure");
12239 expect(v[119] == 1521) catch @panic("test failure");
12240 expect(v[120] == 1522) catch @panic("test failure");
12241 expect(v[121] == 1523) catch @panic("test failure");
12242 expect(v[122] == 1524) catch @panic("test failure");
12243 expect(v[123] == 1525) catch @panic("test failure");
12244 expect(v[124] == 1526) catch @panic("test failure");
12245 expect(v[125] == 1527) catch @panic("test failure");
12246 expect(v[126] == 1528) catch @panic("test failure");
12247 expect(v[127] == 1529) catch @panic("test failure");
12248 expect(i == 128) catch @panic("test failure");
12249}
12250
12251extern fn c_ret_vector_128_u32() @Vector(128, u32);
12252extern fn c_vector_128_u32(@Vector(128, u32), usize) void;
12253extern fn c_test_vector_128_u32() void;
12254
12255test "@Vector(128, u32)" {
12256 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12257 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12258 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
12259 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12260 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12261
12262 const v = c_ret_vector_128_u32();
12263 try expect(v[0] == 1530);
12264 try expect(v[1] == 1531);
12265 try expect(v[2] == 1532);
12266 try expect(v[3] == 1533);
12267 try expect(v[4] == 1534);
12268 try expect(v[5] == 1535);
12269 try expect(v[6] == 1536);
12270 try expect(v[7] == 1537);
12271 try expect(v[8] == 1538);
12272 try expect(v[9] == 1539);
12273 try expect(v[10] == 1540);
12274 try expect(v[11] == 1541);
12275 try expect(v[12] == 1542);
12276 try expect(v[13] == 1543);
12277 try expect(v[14] == 1544);
12278 try expect(v[15] == 1545);
12279 try expect(v[16] == 1546);
12280 try expect(v[17] == 1547);
12281 try expect(v[18] == 1548);
12282 try expect(v[19] == 1549);
12283 try expect(v[20] == 1550);
12284 try expect(v[21] == 1551);
12285 try expect(v[22] == 1552);
12286 try expect(v[23] == 1553);
12287 try expect(v[24] == 1554);
12288 try expect(v[25] == 1555);
12289 try expect(v[26] == 1556);
12290 try expect(v[27] == 1557);
12291 try expect(v[28] == 1558);
12292 try expect(v[29] == 1559);
12293 try expect(v[30] == 1560);
12294 try expect(v[31] == 1561);
12295 try expect(v[32] == 1562);
12296 try expect(v[33] == 1563);
12297 try expect(v[34] == 1564);
12298 try expect(v[35] == 1565);
12299 try expect(v[36] == 1566);
12300 try expect(v[37] == 1567);
12301 try expect(v[38] == 1568);
12302 try expect(v[39] == 1569);
12303 try expect(v[40] == 1570);
12304 try expect(v[41] == 1571);
12305 try expect(v[42] == 1572);
12306 try expect(v[43] == 1573);
12307 try expect(v[44] == 1574);
12308 try expect(v[45] == 1575);
12309 try expect(v[46] == 1576);
12310 try expect(v[47] == 1577);
12311 try expect(v[48] == 1578);
12312 try expect(v[49] == 1579);
12313 try expect(v[50] == 1580);
12314 try expect(v[51] == 1581);
12315 try expect(v[52] == 1582);
12316 try expect(v[53] == 1583);
12317 try expect(v[54] == 1584);
12318 try expect(v[55] == 1585);
12319 try expect(v[56] == 1586);
12320 try expect(v[57] == 1587);
12321 try expect(v[58] == 1588);
12322 try expect(v[59] == 1589);
12323 try expect(v[60] == 1590);
12324 try expect(v[61] == 1591);
12325 try expect(v[62] == 1592);
12326 try expect(v[63] == 1593);
12327 try expect(v[64] == 1594);
12328 try expect(v[65] == 1595);
12329 try expect(v[66] == 1596);
12330 try expect(v[67] == 1597);
12331 try expect(v[68] == 1598);
12332 try expect(v[69] == 1599);
12333 try expect(v[70] == 1600);
12334 try expect(v[71] == 1601);
12335 try expect(v[72] == 1602);
12336 try expect(v[73] == 1603);
12337 try expect(v[74] == 1604);
12338 try expect(v[75] == 1605);
12339 try expect(v[76] == 1606);
12340 try expect(v[77] == 1607);
12341 try expect(v[78] == 1608);
12342 try expect(v[79] == 1609);
12343 try expect(v[80] == 1610);
12344 try expect(v[81] == 1611);
12345 try expect(v[82] == 1612);
12346 try expect(v[83] == 1613);
12347 try expect(v[84] == 1614);
12348 try expect(v[85] == 1615);
12349 try expect(v[86] == 1616);
12350 try expect(v[87] == 1617);
12351 try expect(v[88] == 1618);
12352 try expect(v[89] == 1619);
12353 try expect(v[90] == 1620);
12354 try expect(v[91] == 1621);
12355 try expect(v[92] == 1622);
12356 try expect(v[93] == 1623);
12357 try expect(v[94] == 1624);
12358 try expect(v[95] == 1625);
12359 try expect(v[96] == 1626);
12360 try expect(v[97] == 1627);
12361 try expect(v[98] == 1628);
12362 try expect(v[99] == 1629);
12363 try expect(v[100] == 1630);
12364 try expect(v[101] == 1631);
12365 try expect(v[102] == 1632);
12366 try expect(v[103] == 1633);
12367 try expect(v[104] == 1634);
12368 try expect(v[105] == 1635);
12369 try expect(v[106] == 1636);
12370 try expect(v[107] == 1637);
12371 try expect(v[108] == 1638);
12372 try expect(v[109] == 1639);
12373 try expect(v[110] == 1640);
12374 try expect(v[111] == 1641);
12375 try expect(v[112] == 1642);
12376 try expect(v[113] == 1643);
12377 try expect(v[114] == 1644);
12378 try expect(v[115] == 1645);
12379 try expect(v[116] == 1646);
12380 try expect(v[117] == 1647);
12381 try expect(v[118] == 1648);
12382 try expect(v[119] == 1649);
12383 try expect(v[120] == 1650);
12384 try expect(v[121] == 1651);
12385 try expect(v[122] == 1652);
12386 try expect(v[123] == 1653);
12387 try expect(v[124] == 1654);
12388 try expect(v[125] == 1655);
12389 try expect(v[126] == 1656);
12390 try expect(v[127] == 1657);
12391 c_vector_128_u32(.{
12392 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673,
12393 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1683, 1684, 1685, 1686, 1687, 1688, 1689,
12394 1690, 1691, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700, 1701, 1702, 1703, 1704, 1705,
12395 1706, 1707, 1708, 1709, 1710, 1711, 1712, 1713, 1714, 1715, 1716, 1717, 1718, 1719, 1720, 1721,
12396 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731, 1732, 1733, 1734, 1735, 1736, 1737,
12397 1738, 1739, 1740, 1741, 1742, 1743, 1744, 1745, 1746, 1747, 1748, 1749, 1750, 1751, 1752, 1753,
12398 1754, 1755, 1756, 1757, 1758, 1759, 1760, 1761, 1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769,
12399 1770, 1771, 1772, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785,
12400 }, 128);
12401 c_test_vector_128_u32();
12402}
12403
12404export fn zig_ret_vector_1_u64() @Vector(1, u64) {
12405 return .{1};
12406}
12407export fn zig_vector_1_u64(v: @Vector(1, u64), i: usize) void {
12408 expect(v[0] == 2) catch @panic("test failure");
12409 expect(i == 1) catch @panic("test failure");
12410}
12411
12412extern fn c_ret_vector_1_u64() @Vector(1, u64);
12413extern fn c_vector_1_u64(@Vector(1, u64), usize) void;
12414extern fn c_test_vector_1_u64() void;
12415
12416test "@Vector(1, u64)" {
12417 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag != .windows) return error.SkipZigTest;
12418
12419 const v = c_ret_vector_1_u64();
12420 try expect(v[0] == 3);
12421 c_vector_1_u64(.{4}, 1);
12422 c_test_vector_1_u64();
12423}
12424
12425export fn zig_ret_vector_2_u64() @Vector(2, u64) {
12426 return .{ 5, 6 };
12427}
12428export fn zig_vector_2_u64(v: @Vector(2, u64), i: usize) void {
12429 expect(v[0] == 7) catch @panic("test failure");
12430 expect(v[1] == 8) catch @panic("test failure");
12431 expect(i == 2) catch @panic("test failure");
12432}
12433
12434extern fn c_ret_vector_2_u64() @Vector(2, u64);
12435extern fn c_vector_2_u64(@Vector(2, u64), usize) void;
12436extern fn c_test_vector_2_u64() void;
12437
12438test "@Vector(2, u64)" {
12439 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12440
12441 const v = c_ret_vector_2_u64();
12442 try expect(v[0] == 9);
12443 try expect(v[1] == 10);
12444 c_vector_2_u64(.{ 11, 12 }, 2);
12445 c_test_vector_2_u64();
12446}
12447
12448export fn zig_ret_vector_3_u64() @Vector(3, u64) {
12449 return .{ 13, 14, 15 };
12450}
12451export fn zig_vector_3_u64(v: @Vector(3, u64), i: usize) void {
12452 expect(v[0] == 16) catch @panic("test failure");
12453 expect(v[1] == 17) catch @panic("test failure");
12454 expect(v[2] == 18) catch @panic("test failure");
12455 expect(i == 3) catch @panic("test failure");
12456}
12457
12458extern fn c_ret_vector_3_u64() @Vector(3, u64);
12459extern fn c_vector_3_u64(@Vector(3, u64), usize) void;
12460extern fn c_test_vector_3_u64() void;
12461
12462test "@Vector(3, u64)" {
12463 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12464 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12465 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
12466 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12467 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12468
12469 const v = c_ret_vector_3_u64();
12470 try expect(v[0] == 19);
12471 try expect(v[1] == 20);
12472 try expect(v[2] == 21);
12473 c_vector_3_u64(.{ 22, 23, 24 }, 3);
12474 c_test_vector_3_u64();
12475}
12476
12477export fn zig_ret_vector_4_u64() @Vector(4, u64) {
12478 return .{ 25, 26, 27, 28 };
12479}
12480export fn zig_vector_4_u64(v: @Vector(4, u64), i: usize) void {
12481 expect(v[0] == 29) catch @panic("test failure");
12482 expect(v[1] == 30) catch @panic("test failure");
12483 expect(v[2] == 31) catch @panic("test failure");
12484 expect(v[3] == 32) catch @panic("test failure");
12485 expect(i == 4) catch @panic("test failure");
12486}
12487
12488extern fn c_ret_vector_4_u64() @Vector(4, u64);
12489extern fn c_vector_4_u64(@Vector(4, u64), usize) void;
12490extern fn c_test_vector_4_u64() void;
12491
12492test "@Vector(4, u64)" {
12493 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12494 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12495 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12496 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12497
12498 const v = c_ret_vector_4_u64();
12499 try expect(v[0] == 33);
12500 try expect(v[1] == 34);
12501 try expect(v[2] == 35);
12502 try expect(v[3] == 36);
12503 c_vector_4_u64(.{ 37, 38, 39, 40 }, 4);
12504 c_test_vector_4_u64();
12505}
12506
12507export fn zig_ret_vector_6_u64() @Vector(6, u64) {
12508 return .{ 41, 42, 43, 44, 45, 46 };
12509}
12510export fn zig_vector_6_u64(v: @Vector(6, u64), i: usize) void {
12511 expect(v[0] == 47) catch @panic("test failure");
12512 expect(v[1] == 48) catch @panic("test failure");
12513 expect(v[2] == 49) catch @panic("test failure");
12514 expect(v[3] == 50) catch @panic("test failure");
12515 expect(v[4] == 51) catch @panic("test failure");
12516 expect(v[5] == 52) catch @panic("test failure");
12517 expect(i == 6) catch @panic("test failure");
12518}
12519
12520extern fn c_ret_vector_6_u64() @Vector(6, u64);
12521extern fn c_vector_6_u64(@Vector(6, u64), usize) void;
12522extern fn c_test_vector_6_u64() void;
12523
12524test "@Vector(6, u64)" {
12525 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12526 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
12527 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12528
12529 const v = c_ret_vector_6_u64();
12530 try expect(v[0] == 53);
12531 try expect(v[1] == 54);
12532 try expect(v[2] == 55);
12533 try expect(v[3] == 56);
12534 try expect(v[4] == 57);
12535 try expect(v[5] == 58);
12536 c_vector_6_u64(.{ 59, 60, 61, 62, 63, 64 }, 6);
12537 c_test_vector_6_u64();
12538}
12539
12540export fn zig_ret_vector_8_u64() @Vector(8, u64) {
12541 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
12542}
12543export fn zig_vector_8_u64(v: @Vector(8, u64), i: usize) void {
12544 expect(v[0] == 73) catch @panic("test failure");
12545 expect(v[1] == 74) catch @panic("test failure");
12546 expect(v[2] == 75) catch @panic("test failure");
12547 expect(v[3] == 76) catch @panic("test failure");
12548 expect(v[4] == 77) catch @panic("test failure");
12549 expect(v[5] == 78) catch @panic("test failure");
12550 expect(v[6] == 79) catch @panic("test failure");
12551 expect(v[7] == 80) catch @panic("test failure");
12552 expect(i == 8) catch @panic("test failure");
12553}
12554
12555extern fn c_ret_vector_8_u64() @Vector(8, u64);
12556extern fn c_vector_8_u64(@Vector(8, u64), usize) void;
12557extern fn c_test_vector_8_u64() void;
12558
12559test "@Vector(8, u64)" {
12560 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12561 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12562 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12563 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12564
12565 const v = c_ret_vector_8_u64();
12566 try expect(v[0] == 81);
12567 try expect(v[1] == 82);
12568 try expect(v[2] == 83);
12569 try expect(v[3] == 84);
12570 try expect(v[4] == 85);
12571 try expect(v[5] == 86);
12572 try expect(v[6] == 87);
12573 try expect(v[7] == 88);
12574 c_vector_8_u64(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
12575 c_test_vector_8_u64();
12576}
12577
12578export fn zig_ret_vector_12_u64() @Vector(12, u64) {
12579 return .{ 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108 };
12580}
12581export fn zig_vector_12_u64(v: @Vector(12, u64), i: usize) void {
12582 expect(v[0] == 109) catch @panic("test failure");
12583 expect(v[1] == 110) catch @panic("test failure");
12584 expect(v[2] == 111) catch @panic("test failure");
12585 expect(v[3] == 112) catch @panic("test failure");
12586 expect(v[4] == 113) catch @panic("test failure");
12587 expect(v[5] == 114) catch @panic("test failure");
12588 expect(v[6] == 115) catch @panic("test failure");
12589 expect(v[7] == 116) catch @panic("test failure");
12590 expect(v[8] == 117) catch @panic("test failure");
12591 expect(v[9] == 118) catch @panic("test failure");
12592 expect(v[10] == 119) catch @panic("test failure");
12593 expect(v[11] == 120) catch @panic("test failure");
12594 expect(i == 12) catch @panic("test failure");
12595}
12596
12597extern fn c_ret_vector_12_u64() @Vector(12, u64);
12598extern fn c_vector_12_u64(@Vector(12, u64), usize) void;
12599extern fn c_test_vector_12_u64() void;
12600
12601test "@Vector(12, u64)" {
12602 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12603 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
12604 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12605
12606 const v = c_ret_vector_12_u64();
12607 try expect(v[0] == 121);
12608 try expect(v[1] == 122);
12609 try expect(v[2] == 123);
12610 try expect(v[3] == 124);
12611 try expect(v[4] == 125);
12612 try expect(v[5] == 126);
12613 try expect(v[6] == 127);
12614 try expect(v[7] == 128);
12615 try expect(v[8] == 129);
12616 try expect(v[9] == 130);
12617 try expect(v[10] == 131);
12618 try expect(v[11] == 132);
12619 c_vector_12_u64(.{ 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 }, 12);
12620 c_test_vector_12_u64();
12621}
12622
12623export fn zig_ret_vector_16_u64() @Vector(16, u64) {
12624 return .{ 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160 };
12625}
12626export fn zig_vector_16_u64(v: @Vector(16, u64), i: usize) void {
12627 expect(v[0] == 161) catch @panic("test failure");
12628 expect(v[1] == 162) catch @panic("test failure");
12629 expect(v[2] == 163) catch @panic("test failure");
12630 expect(v[3] == 164) catch @panic("test failure");
12631 expect(v[4] == 165) catch @panic("test failure");
12632 expect(v[5] == 166) catch @panic("test failure");
12633 expect(v[6] == 167) catch @panic("test failure");
12634 expect(v[7] == 168) catch @panic("test failure");
12635 expect(v[8] == 169) catch @panic("test failure");
12636 expect(v[9] == 170) catch @panic("test failure");
12637 expect(v[10] == 171) catch @panic("test failure");
12638 expect(v[11] == 172) catch @panic("test failure");
12639 expect(v[12] == 173) catch @panic("test failure");
12640 expect(v[13] == 174) catch @panic("test failure");
12641 expect(v[14] == 175) catch @panic("test failure");
12642 expect(v[15] == 176) catch @panic("test failure");
12643 expect(i == 16) catch @panic("test failure");
12644}
12645
12646extern fn c_ret_vector_16_u64() @Vector(16, u64);
12647extern fn c_vector_16_u64(@Vector(16, u64), usize) void;
12648extern fn c_test_vector_16_u64() void;
12649
12650test "@Vector(16, u64)" {
12651 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12652 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12653 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
12654 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12655 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12656
12657 const v = c_ret_vector_16_u64();
12658 try expect(v[0] == 177);
12659 try expect(v[1] == 178);
12660 try expect(v[2] == 179);
12661 try expect(v[3] == 180);
12662 try expect(v[4] == 181);
12663 try expect(v[5] == 182);
12664 try expect(v[6] == 183);
12665 try expect(v[7] == 184);
12666 try expect(v[8] == 185);
12667 try expect(v[9] == 186);
12668 try expect(v[10] == 187);
12669 try expect(v[11] == 188);
12670 try expect(v[12] == 189);
12671 try expect(v[13] == 190);
12672 try expect(v[14] == 191);
12673 try expect(v[15] == 192);
12674 c_vector_16_u64(.{ 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208 }, 16);
12675 c_test_vector_16_u64();
12676}
12677
12678export fn zig_ret_vector_24_u64() @Vector(24, u64) {
12679 return .{
12680 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224,
12681 225, 226, 227, 228, 229, 230, 231, 232,
12682 };
12683}
12684export fn zig_vector_24_u64(v: @Vector(24, u64), i: usize) void {
12685 expect(v[0] == 233) catch @panic("test failure");
12686 expect(v[1] == 234) catch @panic("test failure");
12687 expect(v[2] == 235) catch @panic("test failure");
12688 expect(v[3] == 236) catch @panic("test failure");
12689 expect(v[4] == 237) catch @panic("test failure");
12690 expect(v[5] == 238) catch @panic("test failure");
12691 expect(v[6] == 239) catch @panic("test failure");
12692 expect(v[7] == 240) catch @panic("test failure");
12693 expect(v[8] == 241) catch @panic("test failure");
12694 expect(v[9] == 242) catch @panic("test failure");
12695 expect(v[10] == 243) catch @panic("test failure");
12696 expect(v[11] == 244) catch @panic("test failure");
12697 expect(v[12] == 245) catch @panic("test failure");
12698 expect(v[13] == 246) catch @panic("test failure");
12699 expect(v[14] == 247) catch @panic("test failure");
12700 expect(v[15] == 248) catch @panic("test failure");
12701 expect(v[16] == 249) catch @panic("test failure");
12702 expect(v[17] == 250) catch @panic("test failure");
12703 expect(v[18] == 251) catch @panic("test failure");
12704 expect(v[19] == 252) catch @panic("test failure");
12705 expect(v[20] == 253) catch @panic("test failure");
12706 expect(v[21] == 254) catch @panic("test failure");
12707 expect(v[22] == 255) catch @panic("test failure");
12708 expect(v[23] == 256) catch @panic("test failure");
12709 expect(i == 24) catch @panic("test failure");
12710}
12711
12712extern fn c_ret_vector_24_u64() @Vector(24, u64);
12713extern fn c_vector_24_u64(@Vector(24, u64), usize) void;
12714extern fn c_test_vector_24_u64() void;
12715
12716test "@Vector(24, u64)" {
12717 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12718 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
12719 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12720
12721 const v = c_ret_vector_24_u64();
12722 try expect(v[0] == 257);
12723 try expect(v[1] == 258);
12724 try expect(v[2] == 259);
12725 try expect(v[3] == 260);
12726 try expect(v[4] == 261);
12727 try expect(v[5] == 262);
12728 try expect(v[6] == 263);
12729 try expect(v[7] == 264);
12730 try expect(v[8] == 265);
12731 try expect(v[9] == 266);
12732 try expect(v[10] == 267);
12733 try expect(v[11] == 268);
12734 try expect(v[12] == 269);
12735 try expect(v[13] == 270);
12736 try expect(v[14] == 271);
12737 try expect(v[15] == 272);
12738 try expect(v[16] == 273);
12739 try expect(v[17] == 274);
12740 try expect(v[18] == 275);
12741 try expect(v[19] == 276);
12742 try expect(v[20] == 277);
12743 try expect(v[21] == 278);
12744 try expect(v[22] == 279);
12745 try expect(v[23] == 280);
12746 c_vector_24_u64(.{
12747 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296,
12748 297, 298, 299, 300, 301, 302, 303, 304,
12749 }, 24);
12750 c_test_vector_24_u64();
12751}
12752
12753export fn zig_ret_vector_32_u64() @Vector(32, u64) {
12754 return .{
12755 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320,
12756 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336,
12757 };
12758}
12759export fn zig_vector_32_u64(v: @Vector(32, u64), i: usize) void {
12760 expect(v[0] == 337) catch @panic("test failure");
12761 expect(v[1] == 338) catch @panic("test failure");
12762 expect(v[2] == 339) catch @panic("test failure");
12763 expect(v[3] == 340) catch @panic("test failure");
12764 expect(v[4] == 341) catch @panic("test failure");
12765 expect(v[5] == 342) catch @panic("test failure");
12766 expect(v[6] == 343) catch @panic("test failure");
12767 expect(v[7] == 344) catch @panic("test failure");
12768 expect(v[8] == 345) catch @panic("test failure");
12769 expect(v[9] == 346) catch @panic("test failure");
12770 expect(v[10] == 347) catch @panic("test failure");
12771 expect(v[11] == 348) catch @panic("test failure");
12772 expect(v[12] == 349) catch @panic("test failure");
12773 expect(v[13] == 350) catch @panic("test failure");
12774 expect(v[14] == 351) catch @panic("test failure");
12775 expect(v[15] == 352) catch @panic("test failure");
12776 expect(v[16] == 353) catch @panic("test failure");
12777 expect(v[17] == 354) catch @panic("test failure");
12778 expect(v[18] == 355) catch @panic("test failure");
12779 expect(v[19] == 356) catch @panic("test failure");
12780 expect(v[20] == 357) catch @panic("test failure");
12781 expect(v[21] == 358) catch @panic("test failure");
12782 expect(v[22] == 359) catch @panic("test failure");
12783 expect(v[23] == 360) catch @panic("test failure");
12784 expect(v[24] == 361) catch @panic("test failure");
12785 expect(v[25] == 362) catch @panic("test failure");
12786 expect(v[26] == 363) catch @panic("test failure");
12787 expect(v[27] == 364) catch @panic("test failure");
12788 expect(v[28] == 365) catch @panic("test failure");
12789 expect(v[29] == 366) catch @panic("test failure");
12790 expect(v[30] == 367) catch @panic("test failure");
12791 expect(v[31] == 368) catch @panic("test failure");
12792 expect(i == 32) catch @panic("test failure");
12793}
12794
12795extern fn c_ret_vector_32_u64() @Vector(32, u64);
12796extern fn c_vector_32_u64(@Vector(32, u64), usize) void;
12797extern fn c_test_vector_32_u64() void;
12798
12799test "@Vector(32, u64)" {
12800 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12801 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
12802 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
12803 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12804 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
12805
12806 const v = c_ret_vector_32_u64();
12807 try expect(v[0] == 369);
12808 try expect(v[1] == 370);
12809 try expect(v[2] == 371);
12810 try expect(v[3] == 372);
12811 try expect(v[4] == 373);
12812 try expect(v[5] == 374);
12813 try expect(v[6] == 375);
12814 try expect(v[7] == 376);
12815 try expect(v[8] == 377);
12816 try expect(v[9] == 378);
12817 try expect(v[10] == 379);
12818 try expect(v[11] == 380);
12819 try expect(v[12] == 381);
12820 try expect(v[13] == 382);
12821 try expect(v[14] == 383);
12822 try expect(v[15] == 384);
12823 try expect(v[16] == 385);
12824 try expect(v[17] == 386);
12825 try expect(v[18] == 387);
12826 try expect(v[19] == 388);
12827 try expect(v[20] == 389);
12828 try expect(v[21] == 390);
12829 try expect(v[22] == 391);
12830 try expect(v[23] == 392);
12831 try expect(v[24] == 393);
12832 try expect(v[25] == 394);
12833 try expect(v[26] == 395);
12834 try expect(v[27] == 396);
12835 try expect(v[28] == 397);
12836 try expect(v[29] == 398);
12837 try expect(v[30] == 399);
12838 try expect(v[31] == 400);
12839 c_vector_32_u64(.{
12840 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416,
12841 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432,
12842 }, 32);
12843 c_test_vector_32_u64();
12844}
12845
12846export fn zig_ret_vector_48_u64() @Vector(48, u64) {
12847 return .{
12848 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448,
12849 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464,
12850 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,
12851 };
12852}
12853export fn zig_vector_48_u64(v: @Vector(48, u64), i: usize) void {
12854 expect(v[0] == 481) catch @panic("test failure");
12855 expect(v[1] == 482) catch @panic("test failure");
12856 expect(v[2] == 483) catch @panic("test failure");
12857 expect(v[3] == 484) catch @panic("test failure");
12858 expect(v[4] == 485) catch @panic("test failure");
12859 expect(v[5] == 486) catch @panic("test failure");
12860 expect(v[6] == 487) catch @panic("test failure");
12861 expect(v[7] == 488) catch @panic("test failure");
12862 expect(v[8] == 489) catch @panic("test failure");
12863 expect(v[9] == 490) catch @panic("test failure");
12864 expect(v[10] == 491) catch @panic("test failure");
12865 expect(v[11] == 492) catch @panic("test failure");
12866 expect(v[12] == 493) catch @panic("test failure");
12867 expect(v[13] == 494) catch @panic("test failure");
12868 expect(v[14] == 495) catch @panic("test failure");
12869 expect(v[15] == 496) catch @panic("test failure");
12870 expect(v[16] == 497) catch @panic("test failure");
12871 expect(v[17] == 498) catch @panic("test failure");
12872 expect(v[18] == 499) catch @panic("test failure");
12873 expect(v[19] == 500) catch @panic("test failure");
12874 expect(v[20] == 501) catch @panic("test failure");
12875 expect(v[21] == 502) catch @panic("test failure");
12876 expect(v[22] == 503) catch @panic("test failure");
12877 expect(v[23] == 504) catch @panic("test failure");
12878 expect(v[24] == 505) catch @panic("test failure");
12879 expect(v[25] == 506) catch @panic("test failure");
12880 expect(v[26] == 507) catch @panic("test failure");
12881 expect(v[27] == 508) catch @panic("test failure");
12882 expect(v[28] == 509) catch @panic("test failure");
12883 expect(v[29] == 510) catch @panic("test failure");
12884 expect(v[30] == 511) catch @panic("test failure");
12885 expect(v[31] == 512) catch @panic("test failure");
12886 expect(v[32] == 513) catch @panic("test failure");
12887 expect(v[33] == 514) catch @panic("test failure");
12888 expect(v[34] == 515) catch @panic("test failure");
12889 expect(v[35] == 516) catch @panic("test failure");
12890 expect(v[36] == 517) catch @panic("test failure");
12891 expect(v[37] == 518) catch @panic("test failure");
12892 expect(v[38] == 519) catch @panic("test failure");
12893 expect(v[39] == 520) catch @panic("test failure");
12894 expect(v[40] == 521) catch @panic("test failure");
12895 expect(v[41] == 522) catch @panic("test failure");
12896 expect(v[42] == 523) catch @panic("test failure");
12897 expect(v[43] == 524) catch @panic("test failure");
12898 expect(v[44] == 525) catch @panic("test failure");
12899 expect(v[45] == 526) catch @panic("test failure");
12900 expect(v[46] == 527) catch @panic("test failure");
12901 expect(v[47] == 528) catch @panic("test failure");
12902 expect(i == 48) catch @panic("test failure");
12903}
12904
12905extern fn c_ret_vector_48_u64() @Vector(48, u64);
12906extern fn c_vector_48_u64(@Vector(48, u64), usize) void;
12907extern fn c_test_vector_48_u64() void;
12908
12909test "@Vector(48, u64)" {
12910 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
12911 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
12912 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12913
12914 const v = c_ret_vector_48_u64();
12915 try expect(v[0] == 529);
12916 try expect(v[1] == 530);
12917 try expect(v[2] == 531);
12918 try expect(v[3] == 532);
12919 try expect(v[4] == 533);
12920 try expect(v[5] == 534);
12921 try expect(v[6] == 535);
12922 try expect(v[7] == 536);
12923 try expect(v[8] == 537);
12924 try expect(v[9] == 538);
12925 try expect(v[10] == 539);
12926 try expect(v[11] == 540);
12927 try expect(v[12] == 541);
12928 try expect(v[13] == 542);
12929 try expect(v[14] == 543);
12930 try expect(v[15] == 544);
12931 try expect(v[16] == 545);
12932 try expect(v[17] == 546);
12933 try expect(v[18] == 547);
12934 try expect(v[19] == 548);
12935 try expect(v[20] == 549);
12936 try expect(v[21] == 550);
12937 try expect(v[22] == 551);
12938 try expect(v[23] == 552);
12939 try expect(v[24] == 553);
12940 try expect(v[25] == 554);
12941 try expect(v[26] == 555);
12942 try expect(v[27] == 556);
12943 try expect(v[28] == 557);
12944 try expect(v[29] == 558);
12945 try expect(v[30] == 559);
12946 try expect(v[31] == 560);
12947 try expect(v[32] == 561);
12948 try expect(v[33] == 562);
12949 try expect(v[34] == 563);
12950 try expect(v[35] == 564);
12951 try expect(v[36] == 565);
12952 try expect(v[37] == 566);
12953 try expect(v[38] == 567);
12954 try expect(v[39] == 568);
12955 try expect(v[40] == 569);
12956 try expect(v[41] == 570);
12957 try expect(v[42] == 571);
12958 try expect(v[43] == 572);
12959 try expect(v[44] == 573);
12960 try expect(v[45] == 574);
12961 try expect(v[46] == 575);
12962 try expect(v[47] == 576);
12963 c_vector_48_u64(.{
12964 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592,
12965 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608,
12966 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624,
12967 }, 48);
12968 c_test_vector_48_u64();
12969}
12970
12971export fn zig_ret_vector_64_u64() @Vector(64, u64) {
12972 return .{
12973 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640,
12974 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656,
12975 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672,
12976 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688,
12977 };
12978}
12979export fn zig_vector_64_u64(v: @Vector(64, u64), i: usize) void {
12980 expect(v[0] == 689) catch @panic("test failure");
12981 expect(v[1] == 690) catch @panic("test failure");
12982 expect(v[2] == 691) catch @panic("test failure");
12983 expect(v[3] == 692) catch @panic("test failure");
12984 expect(v[4] == 693) catch @panic("test failure");
12985 expect(v[5] == 694) catch @panic("test failure");
12986 expect(v[6] == 695) catch @panic("test failure");
12987 expect(v[7] == 696) catch @panic("test failure");
12988 expect(v[8] == 697) catch @panic("test failure");
12989 expect(v[9] == 698) catch @panic("test failure");
12990 expect(v[10] == 699) catch @panic("test failure");
12991 expect(v[11] == 700) catch @panic("test failure");
12992 expect(v[12] == 701) catch @panic("test failure");
12993 expect(v[13] == 702) catch @panic("test failure");
12994 expect(v[14] == 703) catch @panic("test failure");
12995 expect(v[15] == 704) catch @panic("test failure");
12996 expect(v[16] == 705) catch @panic("test failure");
12997 expect(v[17] == 706) catch @panic("test failure");
12998 expect(v[18] == 707) catch @panic("test failure");
12999 expect(v[19] == 708) catch @panic("test failure");
13000 expect(v[20] == 709) catch @panic("test failure");
13001 expect(v[21] == 710) catch @panic("test failure");
13002 expect(v[22] == 711) catch @panic("test failure");
13003 expect(v[23] == 712) catch @panic("test failure");
13004 expect(v[24] == 713) catch @panic("test failure");
13005 expect(v[25] == 714) catch @panic("test failure");
13006 expect(v[26] == 715) catch @panic("test failure");
13007 expect(v[27] == 716) catch @panic("test failure");
13008 expect(v[28] == 717) catch @panic("test failure");
13009 expect(v[29] == 718) catch @panic("test failure");
13010 expect(v[30] == 719) catch @panic("test failure");
13011 expect(v[31] == 720) catch @panic("test failure");
13012 expect(v[32] == 721) catch @panic("test failure");
13013 expect(v[33] == 722) catch @panic("test failure");
13014 expect(v[34] == 723) catch @panic("test failure");
13015 expect(v[35] == 724) catch @panic("test failure");
13016 expect(v[36] == 725) catch @panic("test failure");
13017 expect(v[37] == 726) catch @panic("test failure");
13018 expect(v[38] == 727) catch @panic("test failure");
13019 expect(v[39] == 728) catch @panic("test failure");
13020 expect(v[40] == 729) catch @panic("test failure");
13021 expect(v[41] == 730) catch @panic("test failure");
13022 expect(v[42] == 731) catch @panic("test failure");
13023 expect(v[43] == 732) catch @panic("test failure");
13024 expect(v[44] == 733) catch @panic("test failure");
13025 expect(v[45] == 734) catch @panic("test failure");
13026 expect(v[46] == 735) catch @panic("test failure");
13027 expect(v[47] == 736) catch @panic("test failure");
13028 expect(v[48] == 737) catch @panic("test failure");
13029 expect(v[49] == 738) catch @panic("test failure");
13030 expect(v[50] == 739) catch @panic("test failure");
13031 expect(v[51] == 740) catch @panic("test failure");
13032 expect(v[52] == 741) catch @panic("test failure");
13033 expect(v[53] == 742) catch @panic("test failure");
13034 expect(v[54] == 743) catch @panic("test failure");
13035 expect(v[55] == 744) catch @panic("test failure");
13036 expect(v[56] == 745) catch @panic("test failure");
13037 expect(v[57] == 746) catch @panic("test failure");
13038 expect(v[58] == 747) catch @panic("test failure");
13039 expect(v[59] == 748) catch @panic("test failure");
13040 expect(v[60] == 749) catch @panic("test failure");
13041 expect(v[61] == 750) catch @panic("test failure");
13042 expect(v[62] == 751) catch @panic("test failure");
13043 expect(v[63] == 752) catch @panic("test failure");
13044 expect(i == 64) catch @panic("test failure");
13045}
13046
13047extern fn c_ret_vector_64_u64() @Vector(64, u64);
13048extern fn c_vector_64_u64(@Vector(64, u64), usize) void;
13049extern fn c_test_vector_64_u64() void;
13050
13051test "@Vector(64, u64)" {
13052 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13053 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13054 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
13055 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13056 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13057
13058 const v = c_ret_vector_64_u64();
13059 try expect(v[0] == 753);
13060 try expect(v[1] == 754);
13061 try expect(v[2] == 755);
13062 try expect(v[3] == 756);
13063 try expect(v[4] == 757);
13064 try expect(v[5] == 758);
13065 try expect(v[6] == 759);
13066 try expect(v[7] == 760);
13067 try expect(v[8] == 761);
13068 try expect(v[9] == 762);
13069 try expect(v[10] == 763);
13070 try expect(v[11] == 764);
13071 try expect(v[12] == 765);
13072 try expect(v[13] == 766);
13073 try expect(v[14] == 767);
13074 try expect(v[15] == 768);
13075 try expect(v[16] == 769);
13076 try expect(v[17] == 770);
13077 try expect(v[18] == 771);
13078 try expect(v[19] == 772);
13079 try expect(v[20] == 773);
13080 try expect(v[21] == 774);
13081 try expect(v[22] == 775);
13082 try expect(v[23] == 776);
13083 try expect(v[24] == 777);
13084 try expect(v[25] == 778);
13085 try expect(v[26] == 779);
13086 try expect(v[27] == 780);
13087 try expect(v[28] == 781);
13088 try expect(v[29] == 782);
13089 try expect(v[30] == 783);
13090 try expect(v[31] == 784);
13091 try expect(v[32] == 785);
13092 try expect(v[33] == 786);
13093 try expect(v[34] == 787);
13094 try expect(v[35] == 788);
13095 try expect(v[36] == 789);
13096 try expect(v[37] == 790);
13097 try expect(v[38] == 791);
13098 try expect(v[39] == 792);
13099 try expect(v[40] == 793);
13100 try expect(v[41] == 794);
13101 try expect(v[42] == 795);
13102 try expect(v[43] == 796);
13103 try expect(v[44] == 797);
13104 try expect(v[45] == 798);
13105 try expect(v[46] == 799);
13106 try expect(v[47] == 800);
13107 try expect(v[48] == 801);
13108 try expect(v[49] == 802);
13109 try expect(v[50] == 803);
13110 try expect(v[51] == 804);
13111 try expect(v[52] == 805);
13112 try expect(v[53] == 806);
13113 try expect(v[54] == 807);
13114 try expect(v[55] == 808);
13115 try expect(v[56] == 809);
13116 try expect(v[57] == 810);
13117 try expect(v[58] == 811);
13118 try expect(v[59] == 812);
13119 try expect(v[60] == 813);
13120 try expect(v[61] == 814);
13121 try expect(v[62] == 815);
13122 try expect(v[63] == 816);
13123 c_vector_64_u64(.{
13124 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832,
13125 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,
13126 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864,
13127 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880,
13128 }, 64);
13129 c_test_vector_64_u64();
13130}
13131
13132export fn zig_ret_vector_1_f32() @Vector(1, f32) {
13133 return .{1};
13134}
13135export fn zig_vector_1_f32(v: @Vector(1, f32), i: usize) void {
13136 expect(v[0] == 2) catch @panic("test failure");
13137 expect(i == 1) catch @panic("test failure");
13138}
13139
13140extern fn c_ret_vector_1_f32() @Vector(1, f32);
13141extern fn c_vector_1_f32(@Vector(1, f32), usize) void;
13142extern fn c_test_vector_1_f32() void;
13143
13144test "@Vector(1, f32)" {
13145 if (builtin.cpu.arch.isAARCH64()) return error.SkipZigTest;
13146 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13147 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13148 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
13149 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13150 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag != .windows) return error.SkipZigTest;
13151
13152 const v = c_ret_vector_1_f32();
13153 try expect(v[0] == 3);
13154 c_vector_1_f32(.{4}, 1);
13155 c_test_vector_1_f32();
13156}
13157
13158export fn zig_ret_vector_2_f32() @Vector(2, f32) {
13159 return .{ 5, 6 };
13160}
13161export fn zig_vector_2_f32(v: @Vector(2, f32), i: usize) void {
13162 expect(v[0] == 7) catch @panic("test failure");
13163 expect(v[1] == 8) catch @panic("test failure");
13164 expect(i == 2) catch @panic("test failure");
13165}
13166
13167extern fn c_ret_vector_2_f32() @Vector(2, f32);
13168extern fn c_vector_2_f32(@Vector(2, f32), usize) void;
13169extern fn c_test_vector_2_f32() void;
13170
13171test "@Vector(2, f32)" {
13172 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13173 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13174 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .windows) return error.SkipZigTest;
13175
13176 const v = c_ret_vector_2_f32();
13177 try expect(v[0] == 9);
13178 try expect(v[1] == 10);
13179 c_vector_2_f32(.{ 11, 12 }, 2);
13180 c_test_vector_2_f32();
13181}
13182
13183export fn zig_ret_vector_3_f32() @Vector(3, f32) {
13184 return .{ 13, 14, 15 };
13185}
13186export fn zig_vector_3_f32(v: @Vector(3, f32), i: usize) void {
13187 expect(v[0] == 16) catch @panic("test failure");
13188 expect(v[1] == 17) catch @panic("test failure");
13189 expect(v[2] == 18) catch @panic("test failure");
13190 expect(i == 3) catch @panic("test failure");
13191}
13192
13193extern fn c_ret_vector_3_f32() @Vector(3, f32);
13194extern fn c_vector_3_f32(@Vector(3, f32), usize) void;
13195extern fn c_test_vector_3_f32() void;
13196
13197test "@Vector(3, f32)" {
13198 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
13199 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13200 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
13201
13202 const v = c_ret_vector_3_f32();
13203 try expect(v[0] == 19);
13204 try expect(v[1] == 20);
13205 try expect(v[2] == 21);
13206 c_vector_3_f32(.{ 22, 23, 24 }, 32);
13207 c_test_vector_3_f32();
13208}
13209
13210export fn zig_ret_vector_4_f32() @Vector(4, f32) {
13211 return .{ 25, 26, 27, 28 };
13212}
13213export fn zig_vector_4_f32(v: @Vector(4, f32), i: usize) void {
13214 expect(v[0] == 29) catch @panic("test failure");
13215 expect(v[1] == 30) catch @panic("test failure");
13216 expect(v[2] == 31) catch @panic("test failure");
13217 expect(v[3] == 32) catch @panic("test failure");
13218 expect(i == 4) catch @panic("test failure");
13219}
13220export fn zig_vector_4_f32_vector_4_f32(v0: @Vector(4, f32), v1: @Vector(4, f32), i: usize) void {
13221 expect(v0[0] == 33) catch @panic("test failure");
13222 expect(v0[1] == 34) catch @panic("test failure");
13223 expect(v0[2] == 35) catch @panic("test failure");
13224 expect(v0[3] == 36) catch @panic("test failure");
13225 expect(v1[0] == 37) catch @panic("test failure");
13226 expect(v1[1] == 38) catch @panic("test failure");
13227 expect(v1[2] == 39) catch @panic("test failure");
13228 expect(v1[3] == 40) catch @panic("test failure");
13229 expect(i == 8) catch @panic("test failure");
13230}
13231extern fn c_ret_vector_4_f32() @Vector(4, f32);
13232
13233extern fn c_vector_4_f32(@Vector(4, f32), usize) void;
13234extern fn c_vector_4_f32_vector_4_f32(@Vector(4, f32), @Vector(4, f32), usize) void;
13235extern fn c_test_vector_4_f32() void;
13236
13237test "@Vector(4, f32)" {
13238 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13239
13240 const v = c_ret_vector_4_f32();
13241 try expect(v[0] == 41);
13242 try expect(v[1] == 42);
13243 try expect(v[2] == 43);
13244 try expect(v[3] == 44);
13245 c_vector_4_f32(.{ 45, 46, 47, 48 }, 4);
13246 c_vector_4_f32_vector_4_f32(.{ 49, 50, 51, 52 }, .{ 53, 54, 55, 56 }, 8);
13247 c_test_vector_4_f32();
13248}
13249
13250export fn zig_ret_vector_6_f32() @Vector(6, f32) {
13251 return .{ 41, 42, 43, 44, 45, 46 };
13252}
13253export fn zig_vector_6_f32(v: @Vector(6, f32), i: usize) void {
13254 expect(v[0] == 47) catch @panic("test failure");
13255 expect(v[1] == 48) catch @panic("test failure");
13256 expect(v[2] == 49) catch @panic("test failure");
13257 expect(v[3] == 50) catch @panic("test failure");
13258 expect(v[4] == 51) catch @panic("test failure");
13259 expect(v[5] == 52) catch @panic("test failure");
13260 expect(i == 6) catch @panic("test failure");
13261}
13262
13263extern fn c_ret_vector_6_f32() @Vector(6, f32);
13264extern fn c_vector_6_f32(@Vector(6, f32), usize) void;
13265extern fn c_test_vector_6_f32() void;
13266
13267test "@Vector(6, f32)" {
13268 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13269 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13270 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
13271 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13272 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13273
13274 const v = c_ret_vector_6_f32();
13275 try expect(v[0] == 53);
13276 try expect(v[1] == 54);
13277 try expect(v[2] == 55);
13278 try expect(v[3] == 56);
13279 try expect(v[4] == 57);
13280 try expect(v[5] == 58);
13281 c_vector_6_f32(.{ 59, 60, 61, 62, 63, 64 }, 6);
13282 c_test_vector_6_f32();
13283}
13284
13285export fn zig_ret_vector_8_f32() @Vector(8, f32) {
13286 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
13287}
13288export fn zig_vector_8_f32(v: @Vector(8, f32), i: usize) void {
13289 expect(v[0] == 73) catch @panic("test failure");
13290 expect(v[1] == 74) catch @panic("test failure");
13291 expect(v[2] == 75) catch @panic("test failure");
13292 expect(v[3] == 76) catch @panic("test failure");
13293 expect(v[4] == 77) catch @panic("test failure");
13294 expect(v[5] == 78) catch @panic("test failure");
13295 expect(v[6] == 79) catch @panic("test failure");
13296 expect(v[7] == 80) catch @panic("test failure");
13297 expect(i == 8) catch @panic("test failure");
13298}
13299
13300extern fn c_ret_vector_8_f32() @Vector(8, f32);
13301extern fn c_vector_8_f32(@Vector(8, f32), usize) void;
13302extern fn c_test_vector_8_f32() void;
13303
13304test "@Vector(8, f32)" {
13305 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13306 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13307 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
13308 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13309 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13310
13311 const v = c_ret_vector_8_f32();
13312 try expect(v[0] == 81);
13313 try expect(v[1] == 82);
13314 try expect(v[2] == 83);
13315 try expect(v[3] == 84);
13316 try expect(v[4] == 85);
13317 try expect(v[5] == 86);
13318 try expect(v[6] == 87);
13319 try expect(v[7] == 88);
13320 c_vector_8_f32(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
13321 c_test_vector_8_f32();
13322}
13323
13324export fn zig_ret_vector_12_f32() @Vector(12, f32) {
13325 return .{ 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108 };
13326}
13327export fn zig_vector_12_f32(v: @Vector(12, f32), i: usize) void {
13328 expect(v[0] == 109) catch @panic("test failure");
13329 expect(v[1] == 110) catch @panic("test failure");
13330 expect(v[2] == 111) catch @panic("test failure");
13331 expect(v[3] == 112) catch @panic("test failure");
13332 expect(v[4] == 113) catch @panic("test failure");
13333 expect(v[5] == 114) catch @panic("test failure");
13334 expect(v[6] == 115) catch @panic("test failure");
13335 expect(v[7] == 116) catch @panic("test failure");
13336 expect(v[8] == 117) catch @panic("test failure");
13337 expect(v[9] == 118) catch @panic("test failure");
13338 expect(v[10] == 119) catch @panic("test failure");
13339 expect(v[11] == 120) catch @panic("test failure");
13340 expect(i == 12) catch @panic("test failure");
13341}
13342
13343extern fn c_ret_vector_12_f32() @Vector(12, f32);
13344extern fn c_vector_12_f32(@Vector(12, f32), usize) void;
13345extern fn c_test_vector_12_f32() void;
13346
13347test "@Vector(12, f32)" {
13348 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13349 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13350 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
13351 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13352 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13353
13354 const v = c_ret_vector_12_f32();
13355 try expect(v[0] == 121);
13356 try expect(v[1] == 122);
13357 try expect(v[2] == 123);
13358 try expect(v[3] == 124);
13359 try expect(v[4] == 125);
13360 try expect(v[5] == 126);
13361 try expect(v[6] == 127);
13362 try expect(v[7] == 128);
13363 try expect(v[8] == 129);
13364 try expect(v[9] == 130);
13365 try expect(v[10] == 131);
13366 try expect(v[11] == 132);
13367 c_vector_12_f32(.{ 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 }, 12);
13368 c_test_vector_12_f32();
13369}
13370
13371export fn zig_ret_vector_16_f32() @Vector(16, f32) {
13372 return .{ 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160 };
13373}
13374export fn zig_vector_16_f32(v: @Vector(16, f32), i: usize) void {
13375 expect(v[0] == 161) catch @panic("test failure");
13376 expect(v[1] == 162) catch @panic("test failure");
13377 expect(v[2] == 163) catch @panic("test failure");
13378 expect(v[3] == 164) catch @panic("test failure");
13379 expect(v[4] == 165) catch @panic("test failure");
13380 expect(v[5] == 166) catch @panic("test failure");
13381 expect(v[6] == 167) catch @panic("test failure");
13382 expect(v[7] == 168) catch @panic("test failure");
13383 expect(v[8] == 169) catch @panic("test failure");
13384 expect(v[9] == 170) catch @panic("test failure");
13385 expect(v[10] == 171) catch @panic("test failure");
13386 expect(v[11] == 172) catch @panic("test failure");
13387 expect(v[12] == 173) catch @panic("test failure");
13388 expect(v[13] == 174) catch @panic("test failure");
13389 expect(v[14] == 175) catch @panic("test failure");
13390 expect(v[15] == 176) catch @panic("test failure");
13391 expect(i == 16) catch @panic("test failure");
13392}
13393
13394extern fn c_ret_vector_16_f32() @Vector(16, f32);
13395extern fn c_vector_16_f32(@Vector(16, f32), usize) void;
13396extern fn c_test_vector_16_f32() void;
13397
13398test "@Vector(16, f32)" {
13399 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13400 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13401 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
13402 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13403 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13404
13405 const v = c_ret_vector_16_f32();
13406 try expect(v[0] == 177);
13407 try expect(v[1] == 178);
13408 try expect(v[2] == 179);
13409 try expect(v[3] == 180);
13410 try expect(v[4] == 181);
13411 try expect(v[5] == 182);
13412 try expect(v[6] == 183);
13413 try expect(v[7] == 184);
13414 try expect(v[8] == 185);
13415 try expect(v[9] == 186);
13416 try expect(v[10] == 187);
13417 try expect(v[11] == 188);
13418 try expect(v[12] == 189);
13419 try expect(v[13] == 190);
13420 try expect(v[14] == 191);
13421 try expect(v[15] == 192);
13422 c_vector_16_f32(.{ 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208 }, 16);
13423 c_test_vector_16_f32();
13424}
13425
13426export fn zig_ret_vector_24_f32() @Vector(24, f32) {
13427 return .{
13428 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224,
13429 225, 226, 227, 228, 229, 230, 231, 232,
13430 };
13431}
13432export fn zig_vector_24_f32(v: @Vector(24, f32), i: usize) void {
13433 expect(v[0] == 233) catch @panic("test failure");
13434 expect(v[1] == 234) catch @panic("test failure");
13435 expect(v[2] == 235) catch @panic("test failure");
13436 expect(v[3] == 236) catch @panic("test failure");
13437 expect(v[4] == 237) catch @panic("test failure");
13438 expect(v[5] == 238) catch @panic("test failure");
13439 expect(v[6] == 239) catch @panic("test failure");
13440 expect(v[7] == 240) catch @panic("test failure");
13441 expect(v[8] == 241) catch @panic("test failure");
13442 expect(v[9] == 242) catch @panic("test failure");
13443 expect(v[10] == 243) catch @panic("test failure");
13444 expect(v[11] == 244) catch @panic("test failure");
13445 expect(v[12] == 245) catch @panic("test failure");
13446 expect(v[13] == 246) catch @panic("test failure");
13447 expect(v[14] == 247) catch @panic("test failure");
13448 expect(v[15] == 248) catch @panic("test failure");
13449 expect(v[16] == 249) catch @panic("test failure");
13450 expect(v[17] == 250) catch @panic("test failure");
13451 expect(v[18] == 251) catch @panic("test failure");
13452 expect(v[19] == 252) catch @panic("test failure");
13453 expect(v[20] == 253) catch @panic("test failure");
13454 expect(v[21] == 254) catch @panic("test failure");
13455 expect(v[22] == 255) catch @panic("test failure");
13456 expect(v[23] == 256) catch @panic("test failure");
13457 expect(i == 24) catch @panic("test failure");
13458}
13459
13460extern fn c_ret_vector_24_f32() @Vector(24, f32);
13461extern fn c_vector_24_f32(@Vector(24, f32), usize) void;
13462extern fn c_test_vector_24_f32() void;
13463
13464test "@Vector(24, f32)" {
13465 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13466 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13467 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
13468 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13469 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13470
13471 const v = c_ret_vector_24_f32();
13472 try expect(v[0] == 257);
13473 try expect(v[1] == 258);
13474 try expect(v[2] == 259);
13475 try expect(v[3] == 260);
13476 try expect(v[4] == 261);
13477 try expect(v[5] == 262);
13478 try expect(v[6] == 263);
13479 try expect(v[7] == 264);
13480 try expect(v[8] == 265);
13481 try expect(v[9] == 266);
13482 try expect(v[10] == 267);
13483 try expect(v[11] == 268);
13484 try expect(v[12] == 269);
13485 try expect(v[13] == 270);
13486 try expect(v[14] == 271);
13487 try expect(v[15] == 272);
13488 try expect(v[16] == 273);
13489 try expect(v[17] == 274);
13490 try expect(v[18] == 275);
13491 try expect(v[19] == 276);
13492 try expect(v[20] == 277);
13493 try expect(v[21] == 278);
13494 try expect(v[22] == 279);
13495 try expect(v[23] == 280);
13496 c_vector_24_f32(.{
13497 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296,
13498 297, 298, 299, 300, 301, 302, 303, 304,
13499 }, 24);
13500 c_test_vector_24_f32();
13501}
13502
13503export fn zig_ret_vector_32_f32() @Vector(32, f32) {
13504 return .{
13505 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320,
13506 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336,
13507 };
13508}
13509export fn zig_vector_32_f32(v: @Vector(32, f32), i: usize) void {
13510 expect(v[0] == 337) catch @panic("test failure");
13511 expect(v[1] == 338) catch @panic("test failure");
13512 expect(v[2] == 339) catch @panic("test failure");
13513 expect(v[3] == 340) catch @panic("test failure");
13514 expect(v[4] == 341) catch @panic("test failure");
13515 expect(v[5] == 342) catch @panic("test failure");
13516 expect(v[6] == 343) catch @panic("test failure");
13517 expect(v[7] == 344) catch @panic("test failure");
13518 expect(v[8] == 345) catch @panic("test failure");
13519 expect(v[9] == 346) catch @panic("test failure");
13520 expect(v[10] == 347) catch @panic("test failure");
13521 expect(v[11] == 348) catch @panic("test failure");
13522 expect(v[12] == 349) catch @panic("test failure");
13523 expect(v[13] == 350) catch @panic("test failure");
13524 expect(v[14] == 351) catch @panic("test failure");
13525 expect(v[15] == 352) catch @panic("test failure");
13526 expect(v[16] == 353) catch @panic("test failure");
13527 expect(v[17] == 354) catch @panic("test failure");
13528 expect(v[18] == 355) catch @panic("test failure");
13529 expect(v[19] == 356) catch @panic("test failure");
13530 expect(v[20] == 357) catch @panic("test failure");
13531 expect(v[21] == 358) catch @panic("test failure");
13532 expect(v[22] == 359) catch @panic("test failure");
13533 expect(v[23] == 360) catch @panic("test failure");
13534 expect(v[24] == 361) catch @panic("test failure");
13535 expect(v[25] == 362) catch @panic("test failure");
13536 expect(v[26] == 363) catch @panic("test failure");
13537 expect(v[27] == 364) catch @panic("test failure");
13538 expect(v[28] == 365) catch @panic("test failure");
13539 expect(v[29] == 366) catch @panic("test failure");
13540 expect(v[30] == 367) catch @panic("test failure");
13541 expect(v[31] == 368) catch @panic("test failure");
13542 expect(i == 32) catch @panic("test failure");
13543}
13544
13545extern fn c_ret_vector_32_f32() @Vector(32, f32);
13546extern fn c_vector_32_f32(@Vector(32, f32), usize) void;
13547extern fn c_test_vector_32_f32() void;
13548
13549test "@Vector(32, f32)" {
13550 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13551 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13552 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
13553 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13554 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13555
13556 const v = c_ret_vector_32_f32();
13557 try expect(v[0] == 369);
13558 try expect(v[1] == 370);
13559 try expect(v[2] == 371);
13560 try expect(v[3] == 372);
13561 try expect(v[4] == 373);
13562 try expect(v[5] == 374);
13563 try expect(v[6] == 375);
13564 try expect(v[7] == 376);
13565 try expect(v[8] == 377);
13566 try expect(v[9] == 378);
13567 try expect(v[10] == 379);
13568 try expect(v[11] == 380);
13569 try expect(v[12] == 381);
13570 try expect(v[13] == 382);
13571 try expect(v[14] == 383);
13572 try expect(v[15] == 384);
13573 try expect(v[16] == 385);
13574 try expect(v[17] == 386);
13575 try expect(v[18] == 387);
13576 try expect(v[19] == 388);
13577 try expect(v[20] == 389);
13578 try expect(v[21] == 390);
13579 try expect(v[22] == 391);
13580 try expect(v[23] == 392);
13581 try expect(v[24] == 393);
13582 try expect(v[25] == 394);
13583 try expect(v[26] == 395);
13584 try expect(v[27] == 396);
13585 try expect(v[28] == 397);
13586 try expect(v[29] == 398);
13587 try expect(v[30] == 399);
13588 try expect(v[31] == 400);
13589 c_vector_32_f32(.{
13590 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416,
13591 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432,
13592 }, 32);
13593 c_test_vector_32_f32();
13594}
13595
13596export fn zig_ret_vector_48_f32() @Vector(48, f32) {
13597 return .{
13598 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448,
13599 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464,
13600 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,
13601 };
13602}
13603export fn zig_vector_48_f32(v: @Vector(48, f32), i: usize) void {
13604 expect(v[0] == 481) catch @panic("test failure");
13605 expect(v[1] == 482) catch @panic("test failure");
13606 expect(v[2] == 483) catch @panic("test failure");
13607 expect(v[3] == 484) catch @panic("test failure");
13608 expect(v[4] == 485) catch @panic("test failure");
13609 expect(v[5] == 486) catch @panic("test failure");
13610 expect(v[6] == 487) catch @panic("test failure");
13611 expect(v[7] == 488) catch @panic("test failure");
13612 expect(v[8] == 489) catch @panic("test failure");
13613 expect(v[9] == 490) catch @panic("test failure");
13614 expect(v[10] == 491) catch @panic("test failure");
13615 expect(v[11] == 492) catch @panic("test failure");
13616 expect(v[12] == 493) catch @panic("test failure");
13617 expect(v[13] == 494) catch @panic("test failure");
13618 expect(v[14] == 495) catch @panic("test failure");
13619 expect(v[15] == 496) catch @panic("test failure");
13620 expect(v[16] == 497) catch @panic("test failure");
13621 expect(v[17] == 498) catch @panic("test failure");
13622 expect(v[18] == 499) catch @panic("test failure");
13623 expect(v[19] == 500) catch @panic("test failure");
13624 expect(v[20] == 501) catch @panic("test failure");
13625 expect(v[21] == 502) catch @panic("test failure");
13626 expect(v[22] == 503) catch @panic("test failure");
13627 expect(v[23] == 504) catch @panic("test failure");
13628 expect(v[24] == 505) catch @panic("test failure");
13629 expect(v[25] == 506) catch @panic("test failure");
13630 expect(v[26] == 507) catch @panic("test failure");
13631 expect(v[27] == 508) catch @panic("test failure");
13632 expect(v[28] == 509) catch @panic("test failure");
13633 expect(v[29] == 510) catch @panic("test failure");
13634 expect(v[30] == 511) catch @panic("test failure");
13635 expect(v[31] == 512) catch @panic("test failure");
13636 expect(v[32] == 513) catch @panic("test failure");
13637 expect(v[33] == 514) catch @panic("test failure");
13638 expect(v[34] == 515) catch @panic("test failure");
13639 expect(v[35] == 516) catch @panic("test failure");
13640 expect(v[36] == 517) catch @panic("test failure");
13641 expect(v[37] == 518) catch @panic("test failure");
13642 expect(v[38] == 519) catch @panic("test failure");
13643 expect(v[39] == 520) catch @panic("test failure");
13644 expect(v[40] == 521) catch @panic("test failure");
13645 expect(v[41] == 522) catch @panic("test failure");
13646 expect(v[42] == 523) catch @panic("test failure");
13647 expect(v[43] == 524) catch @panic("test failure");
13648 expect(v[44] == 525) catch @panic("test failure");
13649 expect(v[45] == 526) catch @panic("test failure");
13650 expect(v[46] == 527) catch @panic("test failure");
13651 expect(v[47] == 528) catch @panic("test failure");
13652 expect(i == 48) catch @panic("test failure");
13653}
13654
13655extern fn c_ret_vector_48_f32() @Vector(48, f32);
13656extern fn c_vector_48_f32(@Vector(48, f32), usize) void;
13657extern fn c_test_vector_48_f32() void;
13658
13659test "@Vector(48, f32)" {
13660 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13661 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13662 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
13663 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13664 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13665
13666 const v = c_ret_vector_48_f32();
13667 try expect(v[0] == 529);
13668 try expect(v[1] == 530);
13669 try expect(v[2] == 531);
13670 try expect(v[3] == 532);
13671 try expect(v[4] == 533);
13672 try expect(v[5] == 534);
13673 try expect(v[6] == 535);
13674 try expect(v[7] == 536);
13675 try expect(v[8] == 537);
13676 try expect(v[9] == 538);
13677 try expect(v[10] == 539);
13678 try expect(v[11] == 540);
13679 try expect(v[12] == 541);
13680 try expect(v[13] == 542);
13681 try expect(v[14] == 543);
13682 try expect(v[15] == 544);
13683 try expect(v[16] == 545);
13684 try expect(v[17] == 546);
13685 try expect(v[18] == 547);
13686 try expect(v[19] == 548);
13687 try expect(v[20] == 549);
13688 try expect(v[21] == 550);
13689 try expect(v[22] == 551);
13690 try expect(v[23] == 552);
13691 try expect(v[24] == 553);
13692 try expect(v[25] == 554);
13693 try expect(v[26] == 555);
13694 try expect(v[27] == 556);
13695 try expect(v[28] == 557);
13696 try expect(v[29] == 558);
13697 try expect(v[30] == 559);
13698 try expect(v[31] == 560);
13699 try expect(v[32] == 561);
13700 try expect(v[33] == 562);
13701 try expect(v[34] == 563);
13702 try expect(v[35] == 564);
13703 try expect(v[36] == 565);
13704 try expect(v[37] == 566);
13705 try expect(v[38] == 567);
13706 try expect(v[39] == 568);
13707 try expect(v[40] == 569);
13708 try expect(v[41] == 570);
13709 try expect(v[42] == 571);
13710 try expect(v[43] == 572);
13711 try expect(v[44] == 573);
13712 try expect(v[45] == 574);
13713 try expect(v[46] == 575);
13714 try expect(v[47] == 576);
13715 c_vector_48_f32(.{
13716 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592,
13717 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608,
13718 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624,
13719 }, 48);
13720 c_test_vector_48_f32();
13721}
13722
13723export fn zig_ret_vector_64_f32() @Vector(64, f32) {
13724 return .{
13725 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640,
13726 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656,
13727 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672,
13728 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688,
13729 };
13730}
13731export fn zig_vector_64_f32(v: @Vector(64, f32), i: usize) void {
13732 expect(v[0] == 689) catch @panic("test failure");
13733 expect(v[1] == 690) catch @panic("test failure");
13734 expect(v[2] == 691) catch @panic("test failure");
13735 expect(v[3] == 692) catch @panic("test failure");
13736 expect(v[4] == 693) catch @panic("test failure");
13737 expect(v[5] == 694) catch @panic("test failure");
13738 expect(v[6] == 695) catch @panic("test failure");
13739 expect(v[7] == 696) catch @panic("test failure");
13740 expect(v[8] == 697) catch @panic("test failure");
13741 expect(v[9] == 698) catch @panic("test failure");
13742 expect(v[10] == 699) catch @panic("test failure");
13743 expect(v[11] == 700) catch @panic("test failure");
13744 expect(v[12] == 701) catch @panic("test failure");
13745 expect(v[13] == 702) catch @panic("test failure");
13746 expect(v[14] == 703) catch @panic("test failure");
13747 expect(v[15] == 704) catch @panic("test failure");
13748 expect(v[16] == 705) catch @panic("test failure");
13749 expect(v[17] == 706) catch @panic("test failure");
13750 expect(v[18] == 707) catch @panic("test failure");
13751 expect(v[19] == 708) catch @panic("test failure");
13752 expect(v[20] == 709) catch @panic("test failure");
13753 expect(v[21] == 710) catch @panic("test failure");
13754 expect(v[22] == 711) catch @panic("test failure");
13755 expect(v[23] == 712) catch @panic("test failure");
13756 expect(v[24] == 713) catch @panic("test failure");
13757 expect(v[25] == 714) catch @panic("test failure");
13758 expect(v[26] == 715) catch @panic("test failure");
13759 expect(v[27] == 716) catch @panic("test failure");
13760 expect(v[28] == 717) catch @panic("test failure");
13761 expect(v[29] == 718) catch @panic("test failure");
13762 expect(v[30] == 719) catch @panic("test failure");
13763 expect(v[31] == 720) catch @panic("test failure");
13764 expect(v[32] == 721) catch @panic("test failure");
13765 expect(v[33] == 722) catch @panic("test failure");
13766 expect(v[34] == 723) catch @panic("test failure");
13767 expect(v[35] == 724) catch @panic("test failure");
13768 expect(v[36] == 725) catch @panic("test failure");
13769 expect(v[37] == 726) catch @panic("test failure");
13770 expect(v[38] == 727) catch @panic("test failure");
13771 expect(v[39] == 728) catch @panic("test failure");
13772 expect(v[40] == 729) catch @panic("test failure");
13773 expect(v[41] == 730) catch @panic("test failure");
13774 expect(v[42] == 731) catch @panic("test failure");
13775 expect(v[43] == 732) catch @panic("test failure");
13776 expect(v[44] == 733) catch @panic("test failure");
13777 expect(v[45] == 734) catch @panic("test failure");
13778 expect(v[46] == 735) catch @panic("test failure");
13779 expect(v[47] == 736) catch @panic("test failure");
13780 expect(v[48] == 737) catch @panic("test failure");
13781 expect(v[49] == 738) catch @panic("test failure");
13782 expect(v[50] == 739) catch @panic("test failure");
13783 expect(v[51] == 740) catch @panic("test failure");
13784 expect(v[52] == 741) catch @panic("test failure");
13785 expect(v[53] == 742) catch @panic("test failure");
13786 expect(v[54] == 743) catch @panic("test failure");
13787 expect(v[55] == 744) catch @panic("test failure");
13788 expect(v[56] == 745) catch @panic("test failure");
13789 expect(v[57] == 746) catch @panic("test failure");
13790 expect(v[58] == 747) catch @panic("test failure");
13791 expect(v[59] == 748) catch @panic("test failure");
13792 expect(v[60] == 749) catch @panic("test failure");
13793 expect(v[61] == 750) catch @panic("test failure");
13794 expect(v[62] == 751) catch @panic("test failure");
13795 expect(v[63] == 752) catch @panic("test failure");
13796 expect(i == 64) catch @panic("test failure");
13797}
13798
13799extern fn c_ret_vector_64_f32() @Vector(64, f32);
13800extern fn c_vector_64_f32(@Vector(64, f32), usize) void;
13801extern fn c_test_vector_64_f32() void;
13802
13803test "@Vector(64, f32)" {
13804 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13805 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13806 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
13807 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13808 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
13809
13810 const v = c_ret_vector_64_f32();
13811 try expect(v[0] == 753);
13812 try expect(v[1] == 754);
13813 try expect(v[2] == 755);
13814 try expect(v[3] == 756);
13815 try expect(v[4] == 757);
13816 try expect(v[5] == 758);
13817 try expect(v[6] == 759);
13818 try expect(v[7] == 760);
13819 try expect(v[8] == 761);
13820 try expect(v[9] == 762);
13821 try expect(v[10] == 763);
13822 try expect(v[11] == 764);
13823 try expect(v[12] == 765);
13824 try expect(v[13] == 766);
13825 try expect(v[14] == 767);
13826 try expect(v[15] == 768);
13827 try expect(v[16] == 769);
13828 try expect(v[17] == 770);
13829 try expect(v[18] == 771);
13830 try expect(v[19] == 772);
13831 try expect(v[20] == 773);
13832 try expect(v[21] == 774);
13833 try expect(v[22] == 775);
13834 try expect(v[23] == 776);
13835 try expect(v[24] == 777);
13836 try expect(v[25] == 778);
13837 try expect(v[26] == 779);
13838 try expect(v[27] == 780);
13839 try expect(v[28] == 781);
13840 try expect(v[29] == 782);
13841 try expect(v[30] == 783);
13842 try expect(v[31] == 784);
13843 try expect(v[32] == 785);
13844 try expect(v[33] == 786);
13845 try expect(v[34] == 787);
13846 try expect(v[35] == 788);
13847 try expect(v[36] == 789);
13848 try expect(v[37] == 790);
13849 try expect(v[38] == 791);
13850 try expect(v[39] == 792);
13851 try expect(v[40] == 793);
13852 try expect(v[41] == 794);
13853 try expect(v[42] == 795);
13854 try expect(v[43] == 796);
13855 try expect(v[44] == 797);
13856 try expect(v[45] == 798);
13857 try expect(v[46] == 799);
13858 try expect(v[47] == 800);
13859 try expect(v[48] == 801);
13860 try expect(v[49] == 802);
13861 try expect(v[50] == 803);
13862 try expect(v[51] == 804);
13863 try expect(v[52] == 805);
13864 try expect(v[53] == 806);
13865 try expect(v[54] == 807);
13866 try expect(v[55] == 808);
13867 try expect(v[56] == 809);
13868 try expect(v[57] == 810);
13869 try expect(v[58] == 811);
13870 try expect(v[59] == 812);
13871 try expect(v[60] == 813);
13872 try expect(v[61] == 814);
13873 try expect(v[62] == 815);
13874 try expect(v[63] == 816);
13875 c_vector_64_f32(.{
13876 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832,
13877 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,
13878 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864,
13879 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880,
13880 }, 64);
13881 c_test_vector_64_f32();
13882}
13883
13884export fn zig_ret_vector_96_f32() @Vector(96, f32) {
13885 return .{
13886 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905,
13887 906, 907, 908, 909, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 920, 921,
13888 922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 933, 934, 935, 936, 937,
13889 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 952, 953,
13890 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 967, 968, 969,
13891 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 983, 984, 985,
13892 };
13893}
13894export fn zig_vector_96_f32(v: @Vector(96, f32), i: usize) void {
13895 expect(v[0] == 986) catch @panic("test failure");
13896 expect(v[1] == 987) catch @panic("test failure");
13897 expect(v[2] == 988) catch @panic("test failure");
13898 expect(v[3] == 989) catch @panic("test failure");
13899 expect(v[4] == 990) catch @panic("test failure");
13900 expect(v[5] == 991) catch @panic("test failure");
13901 expect(v[6] == 992) catch @panic("test failure");
13902 expect(v[7] == 993) catch @panic("test failure");
13903 expect(v[8] == 994) catch @panic("test failure");
13904 expect(v[9] == 995) catch @panic("test failure");
13905 expect(v[10] == 996) catch @panic("test failure");
13906 expect(v[11] == 997) catch @panic("test failure");
13907 expect(v[12] == 998) catch @panic("test failure");
13908 expect(v[13] == 999) catch @panic("test failure");
13909 expect(v[14] == 1000) catch @panic("test failure");
13910 expect(v[15] == 1001) catch @panic("test failure");
13911 expect(v[16] == 1002) catch @panic("test failure");
13912 expect(v[17] == 1003) catch @panic("test failure");
13913 expect(v[18] == 1004) catch @panic("test failure");
13914 expect(v[19] == 1005) catch @panic("test failure");
13915 expect(v[20] == 1006) catch @panic("test failure");
13916 expect(v[21] == 1007) catch @panic("test failure");
13917 expect(v[22] == 1008) catch @panic("test failure");
13918 expect(v[23] == 1009) catch @panic("test failure");
13919 expect(v[24] == 1010) catch @panic("test failure");
13920 expect(v[25] == 1011) catch @panic("test failure");
13921 expect(v[26] == 1012) catch @panic("test failure");
13922 expect(v[27] == 1013) catch @panic("test failure");
13923 expect(v[28] == 1014) catch @panic("test failure");
13924 expect(v[29] == 1015) catch @panic("test failure");
13925 expect(v[30] == 1016) catch @panic("test failure");
13926 expect(v[31] == 1017) catch @panic("test failure");
13927 expect(v[32] == 1018) catch @panic("test failure");
13928 expect(v[33] == 1019) catch @panic("test failure");
13929 expect(v[34] == 1020) catch @panic("test failure");
13930 expect(v[35] == 1021) catch @panic("test failure");
13931 expect(v[36] == 1022) catch @panic("test failure");
13932 expect(v[37] == 1023) catch @panic("test failure");
13933 expect(v[38] == 1024) catch @panic("test failure");
13934 expect(v[39] == 1025) catch @panic("test failure");
13935 expect(v[40] == 1026) catch @panic("test failure");
13936 expect(v[41] == 1027) catch @panic("test failure");
13937 expect(v[42] == 1028) catch @panic("test failure");
13938 expect(v[43] == 1029) catch @panic("test failure");
13939 expect(v[44] == 1030) catch @panic("test failure");
13940 expect(v[45] == 1031) catch @panic("test failure");
13941 expect(v[46] == 1032) catch @panic("test failure");
13942 expect(v[47] == 1033) catch @panic("test failure");
13943 expect(v[48] == 1034) catch @panic("test failure");
13944 expect(v[49] == 1035) catch @panic("test failure");
13945 expect(v[50] == 1036) catch @panic("test failure");
13946 expect(v[51] == 1037) catch @panic("test failure");
13947 expect(v[52] == 1038) catch @panic("test failure");
13948 expect(v[53] == 1039) catch @panic("test failure");
13949 expect(v[54] == 1040) catch @panic("test failure");
13950 expect(v[55] == 1041) catch @panic("test failure");
13951 expect(v[56] == 1042) catch @panic("test failure");
13952 expect(v[57] == 1043) catch @panic("test failure");
13953 expect(v[58] == 1044) catch @panic("test failure");
13954 expect(v[59] == 1045) catch @panic("test failure");
13955 expect(v[60] == 1046) catch @panic("test failure");
13956 expect(v[61] == 1047) catch @panic("test failure");
13957 expect(v[62] == 1048) catch @panic("test failure");
13958 expect(v[63] == 1049) catch @panic("test failure");
13959 expect(v[64] == 1050) catch @panic("test failure");
13960 expect(v[65] == 1051) catch @panic("test failure");
13961 expect(v[66] == 1052) catch @panic("test failure");
13962 expect(v[67] == 1053) catch @panic("test failure");
13963 expect(v[68] == 1054) catch @panic("test failure");
13964 expect(v[69] == 1055) catch @panic("test failure");
13965 expect(v[70] == 1056) catch @panic("test failure");
13966 expect(v[71] == 1057) catch @panic("test failure");
13967 expect(v[72] == 1058) catch @panic("test failure");
13968 expect(v[73] == 1059) catch @panic("test failure");
13969 expect(v[74] == 1060) catch @panic("test failure");
13970 expect(v[75] == 1061) catch @panic("test failure");
13971 expect(v[76] == 1062) catch @panic("test failure");
13972 expect(v[77] == 1063) catch @panic("test failure");
13973 expect(v[78] == 1064) catch @panic("test failure");
13974 expect(v[79] == 1065) catch @panic("test failure");
13975 expect(v[80] == 1066) catch @panic("test failure");
13976 expect(v[81] == 1067) catch @panic("test failure");
13977 expect(v[82] == 1068) catch @panic("test failure");
13978 expect(v[83] == 1069) catch @panic("test failure");
13979 expect(v[84] == 1070) catch @panic("test failure");
13980 expect(v[85] == 1071) catch @panic("test failure");
13981 expect(v[86] == 1072) catch @panic("test failure");
13982 expect(v[87] == 1073) catch @panic("test failure");
13983 expect(v[88] == 1074) catch @panic("test failure");
13984 expect(v[89] == 1075) catch @panic("test failure");
13985 expect(v[90] == 1076) catch @panic("test failure");
13986 expect(v[91] == 1077) catch @panic("test failure");
13987 expect(v[92] == 1078) catch @panic("test failure");
13988 expect(v[93] == 1079) catch @panic("test failure");
13989 expect(v[94] == 1080) catch @panic("test failure");
13990 expect(v[95] == 1081) catch @panic("test failure");
13991 expect(i == 96) catch @panic("test failure");
13992}
13993
13994extern fn c_ret_vector_96_f32() @Vector(96, f32);
13995extern fn c_vector_96_f32(@Vector(96, f32), usize) void;
13996extern fn c_test_vector_96_f32() void;
13997
13998test "@Vector(96, f32)" {
13999 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14000 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14001 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14002 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14003 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14004
14005 const v = c_ret_vector_96_f32();
14006 try expect(v[0] == 1082);
14007 try expect(v[1] == 1083);
14008 try expect(v[2] == 1084);
14009 try expect(v[3] == 1085);
14010 try expect(v[4] == 1086);
14011 try expect(v[5] == 1087);
14012 try expect(v[6] == 1088);
14013 try expect(v[7] == 1089);
14014 try expect(v[8] == 1090);
14015 try expect(v[9] == 1091);
14016 try expect(v[10] == 1092);
14017 try expect(v[11] == 1093);
14018 try expect(v[12] == 1094);
14019 try expect(v[13] == 1095);
14020 try expect(v[14] == 1096);
14021 try expect(v[15] == 1097);
14022 try expect(v[16] == 1098);
14023 try expect(v[17] == 1099);
14024 try expect(v[18] == 1100);
14025 try expect(v[19] == 1101);
14026 try expect(v[20] == 1102);
14027 try expect(v[21] == 1103);
14028 try expect(v[22] == 1104);
14029 try expect(v[23] == 1105);
14030 try expect(v[24] == 1106);
14031 try expect(v[25] == 1107);
14032 try expect(v[26] == 1108);
14033 try expect(v[27] == 1109);
14034 try expect(v[28] == 1110);
14035 try expect(v[29] == 1111);
14036 try expect(v[30] == 1112);
14037 try expect(v[31] == 1113);
14038 try expect(v[32] == 1114);
14039 try expect(v[33] == 1115);
14040 try expect(v[34] == 1116);
14041 try expect(v[35] == 1117);
14042 try expect(v[36] == 1118);
14043 try expect(v[37] == 1119);
14044 try expect(v[38] == 1120);
14045 try expect(v[39] == 1121);
14046 try expect(v[40] == 1122);
14047 try expect(v[41] == 1123);
14048 try expect(v[42] == 1124);
14049 try expect(v[43] == 1125);
14050 try expect(v[44] == 1126);
14051 try expect(v[45] == 1127);
14052 try expect(v[46] == 1128);
14053 try expect(v[47] == 1129);
14054 try expect(v[48] == 1130);
14055 try expect(v[49] == 1131);
14056 try expect(v[50] == 1132);
14057 try expect(v[51] == 1133);
14058 try expect(v[52] == 1134);
14059 try expect(v[53] == 1135);
14060 try expect(v[54] == 1136);
14061 try expect(v[55] == 1137);
14062 try expect(v[56] == 1138);
14063 try expect(v[57] == 1139);
14064 try expect(v[58] == 1140);
14065 try expect(v[59] == 1141);
14066 try expect(v[60] == 1142);
14067 try expect(v[61] == 1143);
14068 try expect(v[62] == 1144);
14069 try expect(v[63] == 1145);
14070 try expect(v[64] == 1146);
14071 try expect(v[65] == 1147);
14072 try expect(v[66] == 1148);
14073 try expect(v[67] == 1149);
14074 try expect(v[68] == 1150);
14075 try expect(v[69] == 1151);
14076 try expect(v[70] == 1152);
14077 try expect(v[71] == 1153);
14078 try expect(v[72] == 1154);
14079 try expect(v[73] == 1155);
14080 try expect(v[74] == 1156);
14081 try expect(v[75] == 1157);
14082 try expect(v[76] == 1158);
14083 try expect(v[77] == 1159);
14084 try expect(v[78] == 1160);
14085 try expect(v[79] == 1161);
14086 try expect(v[80] == 1162);
14087 try expect(v[81] == 1163);
14088 try expect(v[82] == 1164);
14089 try expect(v[83] == 1165);
14090 try expect(v[84] == 1166);
14091 try expect(v[85] == 1167);
14092 try expect(v[86] == 1168);
14093 try expect(v[87] == 1169);
14094 try expect(v[88] == 1170);
14095 try expect(v[89] == 1171);
14096 try expect(v[90] == 1172);
14097 try expect(v[91] == 1173);
14098 try expect(v[92] == 1174);
14099 try expect(v[93] == 1175);
14100 try expect(v[94] == 1176);
14101 try expect(v[95] == 1177);
14102 c_vector_96_f32(.{
14103 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1192, 1193,
14104 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209,
14105 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225,
14106 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241,
14107 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1256, 1257,
14108 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273,
14109 }, 96);
14110 c_test_vector_96_f32();
14111}
14112
14113export fn zig_ret_vector_128_f32() @Vector(128, f32) {
14114 return .{
14115 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289,
14116 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305,
14117 1306, 1307, 1308, 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321,
14118 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337,
14119 1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353,
14120 1354, 1355, 1356, 1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369,
14121 1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385,
14122 1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401,
14123 };
14124}
14125export fn zig_vector_128_f32(v: @Vector(128, f32), i: usize) void {
14126 expect(v[0] == 1402) catch @panic("test failure");
14127 expect(v[1] == 1403) catch @panic("test failure");
14128 expect(v[2] == 1404) catch @panic("test failure");
14129 expect(v[3] == 1405) catch @panic("test failure");
14130 expect(v[4] == 1406) catch @panic("test failure");
14131 expect(v[5] == 1407) catch @panic("test failure");
14132 expect(v[6] == 1408) catch @panic("test failure");
14133 expect(v[7] == 1409) catch @panic("test failure");
14134 expect(v[8] == 1410) catch @panic("test failure");
14135 expect(v[9] == 1411) catch @panic("test failure");
14136 expect(v[10] == 1412) catch @panic("test failure");
14137 expect(v[11] == 1413) catch @panic("test failure");
14138 expect(v[12] == 1414) catch @panic("test failure");
14139 expect(v[13] == 1415) catch @panic("test failure");
14140 expect(v[14] == 1416) catch @panic("test failure");
14141 expect(v[15] == 1417) catch @panic("test failure");
14142 expect(v[16] == 1418) catch @panic("test failure");
14143 expect(v[17] == 1419) catch @panic("test failure");
14144 expect(v[18] == 1420) catch @panic("test failure");
14145 expect(v[19] == 1421) catch @panic("test failure");
14146 expect(v[20] == 1422) catch @panic("test failure");
14147 expect(v[21] == 1423) catch @panic("test failure");
14148 expect(v[22] == 1424) catch @panic("test failure");
14149 expect(v[23] == 1425) catch @panic("test failure");
14150 expect(v[24] == 1426) catch @panic("test failure");
14151 expect(v[25] == 1427) catch @panic("test failure");
14152 expect(v[26] == 1428) catch @panic("test failure");
14153 expect(v[27] == 1429) catch @panic("test failure");
14154 expect(v[28] == 1430) catch @panic("test failure");
14155 expect(v[29] == 1431) catch @panic("test failure");
14156 expect(v[30] == 1432) catch @panic("test failure");
14157 expect(v[31] == 1433) catch @panic("test failure");
14158 expect(v[32] == 1434) catch @panic("test failure");
14159 expect(v[33] == 1435) catch @panic("test failure");
14160 expect(v[34] == 1436) catch @panic("test failure");
14161 expect(v[35] == 1437) catch @panic("test failure");
14162 expect(v[36] == 1438) catch @panic("test failure");
14163 expect(v[37] == 1439) catch @panic("test failure");
14164 expect(v[38] == 1440) catch @panic("test failure");
14165 expect(v[39] == 1441) catch @panic("test failure");
14166 expect(v[40] == 1442) catch @panic("test failure");
14167 expect(v[41] == 1443) catch @panic("test failure");
14168 expect(v[42] == 1444) catch @panic("test failure");
14169 expect(v[43] == 1445) catch @panic("test failure");
14170 expect(v[44] == 1446) catch @panic("test failure");
14171 expect(v[45] == 1447) catch @panic("test failure");
14172 expect(v[46] == 1448) catch @panic("test failure");
14173 expect(v[47] == 1449) catch @panic("test failure");
14174 expect(v[48] == 1450) catch @panic("test failure");
14175 expect(v[49] == 1451) catch @panic("test failure");
14176 expect(v[50] == 1452) catch @panic("test failure");
14177 expect(v[51] == 1453) catch @panic("test failure");
14178 expect(v[52] == 1454) catch @panic("test failure");
14179 expect(v[53] == 1455) catch @panic("test failure");
14180 expect(v[54] == 1456) catch @panic("test failure");
14181 expect(v[55] == 1457) catch @panic("test failure");
14182 expect(v[56] == 1458) catch @panic("test failure");
14183 expect(v[57] == 1459) catch @panic("test failure");
14184 expect(v[58] == 1460) catch @panic("test failure");
14185 expect(v[59] == 1461) catch @panic("test failure");
14186 expect(v[60] == 1462) catch @panic("test failure");
14187 expect(v[61] == 1463) catch @panic("test failure");
14188 expect(v[62] == 1464) catch @panic("test failure");
14189 expect(v[63] == 1465) catch @panic("test failure");
14190 expect(v[64] == 1466) catch @panic("test failure");
14191 expect(v[65] == 1467) catch @panic("test failure");
14192 expect(v[66] == 1468) catch @panic("test failure");
14193 expect(v[67] == 1469) catch @panic("test failure");
14194 expect(v[68] == 1470) catch @panic("test failure");
14195 expect(v[69] == 1471) catch @panic("test failure");
14196 expect(v[70] == 1472) catch @panic("test failure");
14197 expect(v[71] == 1473) catch @panic("test failure");
14198 expect(v[72] == 1474) catch @panic("test failure");
14199 expect(v[73] == 1475) catch @panic("test failure");
14200 expect(v[74] == 1476) catch @panic("test failure");
14201 expect(v[75] == 1477) catch @panic("test failure");
14202 expect(v[76] == 1478) catch @panic("test failure");
14203 expect(v[77] == 1479) catch @panic("test failure");
14204 expect(v[78] == 1480) catch @panic("test failure");
14205 expect(v[79] == 1481) catch @panic("test failure");
14206 expect(v[80] == 1482) catch @panic("test failure");
14207 expect(v[81] == 1483) catch @panic("test failure");
14208 expect(v[82] == 1484) catch @panic("test failure");
14209 expect(v[83] == 1485) catch @panic("test failure");
14210 expect(v[84] == 1486) catch @panic("test failure");
14211 expect(v[85] == 1487) catch @panic("test failure");
14212 expect(v[86] == 1488) catch @panic("test failure");
14213 expect(v[87] == 1489) catch @panic("test failure");
14214 expect(v[88] == 1490) catch @panic("test failure");
14215 expect(v[89] == 1491) catch @panic("test failure");
14216 expect(v[90] == 1492) catch @panic("test failure");
14217 expect(v[91] == 1493) catch @panic("test failure");
14218 expect(v[92] == 1494) catch @panic("test failure");
14219 expect(v[93] == 1495) catch @panic("test failure");
14220 expect(v[94] == 1496) catch @panic("test failure");
14221 expect(v[95] == 1497) catch @panic("test failure");
14222 expect(v[96] == 1498) catch @panic("test failure");
14223 expect(v[97] == 1499) catch @panic("test failure");
14224 expect(v[98] == 1500) catch @panic("test failure");
14225 expect(v[99] == 1501) catch @panic("test failure");
14226 expect(v[100] == 1502) catch @panic("test failure");
14227 expect(v[101] == 1503) catch @panic("test failure");
14228 expect(v[102] == 1504) catch @panic("test failure");
14229 expect(v[103] == 1505) catch @panic("test failure");
14230 expect(v[104] == 1506) catch @panic("test failure");
14231 expect(v[105] == 1507) catch @panic("test failure");
14232 expect(v[106] == 1508) catch @panic("test failure");
14233 expect(v[107] == 1509) catch @panic("test failure");
14234 expect(v[108] == 1510) catch @panic("test failure");
14235 expect(v[109] == 1511) catch @panic("test failure");
14236 expect(v[110] == 1512) catch @panic("test failure");
14237 expect(v[111] == 1513) catch @panic("test failure");
14238 expect(v[112] == 1514) catch @panic("test failure");
14239 expect(v[113] == 1515) catch @panic("test failure");
14240 expect(v[114] == 1516) catch @panic("test failure");
14241 expect(v[115] == 1517) catch @panic("test failure");
14242 expect(v[116] == 1518) catch @panic("test failure");
14243 expect(v[117] == 1519) catch @panic("test failure");
14244 expect(v[118] == 1520) catch @panic("test failure");
14245 expect(v[119] == 1521) catch @panic("test failure");
14246 expect(v[120] == 1522) catch @panic("test failure");
14247 expect(v[121] == 1523) catch @panic("test failure");
14248 expect(v[122] == 1524) catch @panic("test failure");
14249 expect(v[123] == 1525) catch @panic("test failure");
14250 expect(v[124] == 1526) catch @panic("test failure");
14251 expect(v[125] == 1527) catch @panic("test failure");
14252 expect(v[126] == 1528) catch @panic("test failure");
14253 expect(v[127] == 1529) catch @panic("test failure");
14254 expect(i == 128) catch @panic("test failure");
14255}
14256
14257extern fn c_ret_vector_128_f32() @Vector(128, f32);
14258extern fn c_vector_128_f32(@Vector(128, f32), usize) void;
14259extern fn c_test_vector_128_f32() void;
14260
14261test "@Vector(128, f32)" {
14262 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14263 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14264 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
14265 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14266 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14267
14268 const v = c_ret_vector_128_f32();
14269 try expect(v[0] == 1530);
14270 try expect(v[1] == 1531);
14271 try expect(v[2] == 1532);
14272 try expect(v[3] == 1533);
14273 try expect(v[4] == 1534);
14274 try expect(v[5] == 1535);
14275 try expect(v[6] == 1536);
14276 try expect(v[7] == 1537);
14277 try expect(v[8] == 1538);
14278 try expect(v[9] == 1539);
14279 try expect(v[10] == 1540);
14280 try expect(v[11] == 1541);
14281 try expect(v[12] == 1542);
14282 try expect(v[13] == 1543);
14283 try expect(v[14] == 1544);
14284 try expect(v[15] == 1545);
14285 try expect(v[16] == 1546);
14286 try expect(v[17] == 1547);
14287 try expect(v[18] == 1548);
14288 try expect(v[19] == 1549);
14289 try expect(v[20] == 1550);
14290 try expect(v[21] == 1551);
14291 try expect(v[22] == 1552);
14292 try expect(v[23] == 1553);
14293 try expect(v[24] == 1554);
14294 try expect(v[25] == 1555);
14295 try expect(v[26] == 1556);
14296 try expect(v[27] == 1557);
14297 try expect(v[28] == 1558);
14298 try expect(v[29] == 1559);
14299 try expect(v[30] == 1560);
14300 try expect(v[31] == 1561);
14301 try expect(v[32] == 1562);
14302 try expect(v[33] == 1563);
14303 try expect(v[34] == 1564);
14304 try expect(v[35] == 1565);
14305 try expect(v[36] == 1566);
14306 try expect(v[37] == 1567);
14307 try expect(v[38] == 1568);
14308 try expect(v[39] == 1569);
14309 try expect(v[40] == 1570);
14310 try expect(v[41] == 1571);
14311 try expect(v[42] == 1572);
14312 try expect(v[43] == 1573);
14313 try expect(v[44] == 1574);
14314 try expect(v[45] == 1575);
14315 try expect(v[46] == 1576);
14316 try expect(v[47] == 1577);
14317 try expect(v[48] == 1578);
14318 try expect(v[49] == 1579);
14319 try expect(v[50] == 1580);
14320 try expect(v[51] == 1581);
14321 try expect(v[52] == 1582);
14322 try expect(v[53] == 1583);
14323 try expect(v[54] == 1584);
14324 try expect(v[55] == 1585);
14325 try expect(v[56] == 1586);
14326 try expect(v[57] == 1587);
14327 try expect(v[58] == 1588);
14328 try expect(v[59] == 1589);
14329 try expect(v[60] == 1590);
14330 try expect(v[61] == 1591);
14331 try expect(v[62] == 1592);
14332 try expect(v[63] == 1593);
14333 try expect(v[64] == 1594);
14334 try expect(v[65] == 1595);
14335 try expect(v[66] == 1596);
14336 try expect(v[67] == 1597);
14337 try expect(v[68] == 1598);
14338 try expect(v[69] == 1599);
14339 try expect(v[70] == 1600);
14340 try expect(v[71] == 1601);
14341 try expect(v[72] == 1602);
14342 try expect(v[73] == 1603);
14343 try expect(v[74] == 1604);
14344 try expect(v[75] == 1605);
14345 try expect(v[76] == 1606);
14346 try expect(v[77] == 1607);
14347 try expect(v[78] == 1608);
14348 try expect(v[79] == 1609);
14349 try expect(v[80] == 1610);
14350 try expect(v[81] == 1611);
14351 try expect(v[82] == 1612);
14352 try expect(v[83] == 1613);
14353 try expect(v[84] == 1614);
14354 try expect(v[85] == 1615);
14355 try expect(v[86] == 1616);
14356 try expect(v[87] == 1617);
14357 try expect(v[88] == 1618);
14358 try expect(v[89] == 1619);
14359 try expect(v[90] == 1620);
14360 try expect(v[91] == 1621);
14361 try expect(v[92] == 1622);
14362 try expect(v[93] == 1623);
14363 try expect(v[94] == 1624);
14364 try expect(v[95] == 1625);
14365 try expect(v[96] == 1626);
14366 try expect(v[97] == 1627);
14367 try expect(v[98] == 1628);
14368 try expect(v[99] == 1629);
14369 try expect(v[100] == 1630);
14370 try expect(v[101] == 1631);
14371 try expect(v[102] == 1632);
14372 try expect(v[103] == 1633);
14373 try expect(v[104] == 1634);
14374 try expect(v[105] == 1635);
14375 try expect(v[106] == 1636);
14376 try expect(v[107] == 1637);
14377 try expect(v[108] == 1638);
14378 try expect(v[109] == 1639);
14379 try expect(v[110] == 1640);
14380 try expect(v[111] == 1641);
14381 try expect(v[112] == 1642);
14382 try expect(v[113] == 1643);
14383 try expect(v[114] == 1644);
14384 try expect(v[115] == 1645);
14385 try expect(v[116] == 1646);
14386 try expect(v[117] == 1647);
14387 try expect(v[118] == 1648);
14388 try expect(v[119] == 1649);
14389 try expect(v[120] == 1650);
14390 try expect(v[121] == 1651);
14391 try expect(v[122] == 1652);
14392 try expect(v[123] == 1653);
14393 try expect(v[124] == 1654);
14394 try expect(v[125] == 1655);
14395 try expect(v[126] == 1656);
14396 try expect(v[127] == 1657);
14397 c_vector_128_f32(.{
14398 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673,
14399 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1683, 1684, 1685, 1686, 1687, 1688, 1689,
14400 1690, 1691, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700, 1701, 1702, 1703, 1704, 1705,
14401 1706, 1707, 1708, 1709, 1710, 1711, 1712, 1713, 1714, 1715, 1716, 1717, 1718, 1719, 1720, 1721,
14402 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731, 1732, 1733, 1734, 1735, 1736, 1737,
14403 1738, 1739, 1740, 1741, 1742, 1743, 1744, 1745, 1746, 1747, 1748, 1749, 1750, 1751, 1752, 1753,
14404 1754, 1755, 1756, 1757, 1758, 1759, 1760, 1761, 1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769,
14405 1770, 1771, 1772, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785,
14406 }, 128);
14407 c_test_vector_128_f32();
14408}
14409
14410export fn zig_ret_vector_1_f64() @Vector(1, f64) {
14411 return .{1};
14412}
14413export fn zig_vector_1_f64(v: @Vector(1, f64), i: usize) void {
14414 expect(v[0] == 2) catch @panic("test failure");
14415 expect(i == 1) catch @panic("test failure");
14416}
14417
14418extern fn c_ret_vector_1_f64() @Vector(1, f64);
14419extern fn c_vector_1_f64(@Vector(1, f64), usize) void;
14420extern fn c_test_vector_1_f64() void;
14421
14422test "@Vector(1, f64)" {
14423 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14424 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14425
14426 const v = c_ret_vector_1_f64();
14427 try expect(v[0] == 3);
14428 c_vector_1_f64(.{4}, 1);
14429 c_test_vector_1_f64();
14430}
14431
14432export fn zig_ret_vector_2_f64() @Vector(2, f64) {
14433 return .{ 5, 6 };
14434}
14435export fn zig_vector_2_f64(v: @Vector(2, f64), i: usize) void {
14436 expect(v[0] == 7) catch @panic("test failure");
14437 expect(v[1] == 8) catch @panic("test failure");
14438 expect(i == 2) catch @panic("test failure");
14439}
14440
14441extern fn c_ret_vector_2_f64() @Vector(2, f64);
14442extern fn c_vector_2_f64(@Vector(2, f64), usize) void;
14443extern fn c_test_vector_2_f64() void;
14444
14445test "@Vector(2, f64)" {
14446 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14447
14448 const v = c_ret_vector_2_f64();
14449 try expect(v[0] == 9);
14450 try expect(v[1] == 10);
14451 c_vector_2_f64(.{ 11, 12 }, 2);
14452 c_test_vector_2_f64();
14453}
14454
14455export fn zig_ret_vector_3_f64() @Vector(3, f64) {
14456 return .{ 13, 14, 15 };
14457}
14458export fn zig_vector_3_f64(v: @Vector(3, f64), i: usize) void {
14459 expect(v[0] == 16) catch @panic("test failure");
14460 expect(v[1] == 17) catch @panic("test failure");
14461 expect(v[2] == 18) catch @panic("test failure");
14462 expect(i == 3) catch @panic("test failure");
14463}
14464
14465extern fn c_ret_vector_3_f64() @Vector(3, f64);
14466extern fn c_vector_3_f64(@Vector(3, f64), usize) void;
14467extern fn c_test_vector_3_f64() void;
14468
14469test "@Vector(3, f64)" {
14470 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14471 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14472 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14473 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14474 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14475
14476 const v = c_ret_vector_3_f64();
14477 try expect(v[0] == 19);
14478 try expect(v[1] == 20);
14479 try expect(v[2] == 21);
14480 c_vector_3_f64(.{ 22, 23, 24 }, 3);
14481 c_test_vector_3_f64();
14482}
14483
14484export fn zig_ret_vector_4_f64() @Vector(4, f64) {
14485 return .{ 25, 26, 27, 28 };
14486}
14487export fn zig_vector_4_f64(v: @Vector(4, f64), i: usize) void {
14488 expect(v[0] == 29) catch @panic("test failure");
14489 expect(v[1] == 30) catch @panic("test failure");
14490 expect(v[2] == 31) catch @panic("test failure");
14491 expect(v[3] == 32) catch @panic("test failure");
14492 expect(i == 4) catch @panic("test failure");
14493}
14494
14495extern fn c_ret_vector_4_f64() @Vector(4, f64);
14496extern fn c_vector_4_f64(@Vector(4, f64), usize) void;
14497extern fn c_test_vector_4_f64() void;
14498
14499test "@Vector(4, f64)" {
14500 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14501 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
14502 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14503 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14504
14505 const v = c_ret_vector_4_f64();
14506 try expect(v[0] == 33);
14507 try expect(v[1] == 34);
14508 try expect(v[2] == 35);
14509 try expect(v[3] == 36);
14510 c_vector_4_f64(.{ 37, 38, 39, 40 }, 4);
14511 c_test_vector_4_f64();
14512}
14513
14514export fn zig_ret_vector_6_f64() @Vector(6, f64) {
14515 return .{ 41, 42, 43, 44, 45, 46 };
14516}
14517export fn zig_vector_6_f64(v: @Vector(6, f64), i: usize) void {
14518 expect(v[0] == 47) catch @panic("test failure");
14519 expect(v[1] == 48) catch @panic("test failure");
14520 expect(v[2] == 49) catch @panic("test failure");
14521 expect(v[3] == 50) catch @panic("test failure");
14522 expect(v[4] == 51) catch @panic("test failure");
14523 expect(v[5] == 52) catch @panic("test failure");
14524 expect(i == 6) catch @panic("test failure");
14525}
14526
14527extern fn c_ret_vector_6_f64() @Vector(6, f64);
14528extern fn c_vector_6_f64(@Vector(6, f64), usize) void;
14529extern fn c_test_vector_6_f64() void;
14530
14531test "@Vector(6, f64)" {
14532 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14533 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14534 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14535 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14536 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14537
14538 const v = c_ret_vector_6_f64();
14539 try expect(v[0] == 53);
14540 try expect(v[1] == 54);
14541 try expect(v[2] == 55);
14542 try expect(v[3] == 56);
14543 try expect(v[4] == 57);
14544 try expect(v[5] == 58);
14545 c_vector_6_f64(.{ 59, 60, 61, 62, 63, 64 }, 6);
14546 c_test_vector_6_f64();
14547}
14548
14549export fn zig_ret_vector_8_f64() @Vector(8, f64) {
14550 return .{ 65, 66, 67, 68, 69, 70, 71, 72 };
14551}
14552export fn zig_vector_8_f64(v: @Vector(8, f64), i: usize) void {
14553 expect(v[0] == 73) catch @panic("test failure");
14554 expect(v[1] == 74) catch @panic("test failure");
14555 expect(v[2] == 75) catch @panic("test failure");
14556 expect(v[3] == 76) catch @panic("test failure");
14557 expect(v[4] == 77) catch @panic("test failure");
14558 expect(v[5] == 78) catch @panic("test failure");
14559 expect(v[6] == 79) catch @panic("test failure");
14560 expect(v[7] == 80) catch @panic("test failure");
14561 expect(i == 8) catch @panic("test failure");
14562}
14563
14564extern fn c_ret_vector_8_f64() @Vector(8, f64);
14565extern fn c_vector_8_f64(@Vector(8, f64), usize) void;
14566extern fn c_test_vector_8_f64() void;
14567
14568test "@Vector(8, f64)" {
14569 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14570 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
14571 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14572 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14573
14574 const v = c_ret_vector_8_f64();
14575 try expect(v[0] == 81);
14576 try expect(v[1] == 82);
14577 try expect(v[2] == 83);
14578 try expect(v[3] == 84);
14579 try expect(v[4] == 85);
14580 try expect(v[5] == 86);
14581 try expect(v[6] == 87);
14582 try expect(v[7] == 88);
14583 c_vector_8_f64(.{ 89, 90, 91, 92, 93, 94, 95, 96 }, 8);
14584 c_test_vector_8_f64();
14585}
14586
14587export fn zig_ret_vector_12_f64() @Vector(12, f64) {
14588 return .{ 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108 };
14589}
14590export fn zig_vector_12_f64(v: @Vector(12, f64), i: usize) void {
14591 expect(v[0] == 109) catch @panic("test failure");
14592 expect(v[1] == 110) catch @panic("test failure");
14593 expect(v[2] == 111) catch @panic("test failure");
14594 expect(v[3] == 112) catch @panic("test failure");
14595 expect(v[4] == 113) catch @panic("test failure");
14596 expect(v[5] == 114) catch @panic("test failure");
14597 expect(v[6] == 115) catch @panic("test failure");
14598 expect(v[7] == 116) catch @panic("test failure");
14599 expect(v[8] == 117) catch @panic("test failure");
14600 expect(v[9] == 118) catch @panic("test failure");
14601 expect(v[10] == 119) catch @panic("test failure");
14602 expect(v[11] == 120) catch @panic("test failure");
14603 expect(i == 12) catch @panic("test failure");
14604}
14605
14606extern fn c_ret_vector_12_f64() @Vector(12, f64);
14607extern fn c_vector_12_f64(@Vector(12, f64), usize) void;
14608extern fn c_test_vector_12_f64() void;
14609
14610test "@Vector(12, f64)" {
14611 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14612 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14613 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14614 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14615 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14616
14617 const v = c_ret_vector_12_f64();
14618 try expect(v[0] == 121);
14619 try expect(v[1] == 122);
14620 try expect(v[2] == 123);
14621 try expect(v[3] == 124);
14622 try expect(v[4] == 125);
14623 try expect(v[5] == 126);
14624 try expect(v[6] == 127);
14625 try expect(v[7] == 128);
14626 try expect(v[8] == 129);
14627 try expect(v[9] == 130);
14628 try expect(v[10] == 131);
14629 try expect(v[11] == 132);
14630 c_vector_12_f64(.{ 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144 }, 12);
14631 c_test_vector_12_f64();
14632}
14633
14634export fn zig_ret_vector_16_f64() @Vector(16, f64) {
14635 return .{ 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160 };
14636}
14637export fn zig_vector_16_f64(v: @Vector(16, f64), i: usize) void {
14638 expect(v[0] == 161) catch @panic("test failure");
14639 expect(v[1] == 162) catch @panic("test failure");
14640 expect(v[2] == 163) catch @panic("test failure");
14641 expect(v[3] == 164) catch @panic("test failure");
14642 expect(v[4] == 165) catch @panic("test failure");
14643 expect(v[5] == 166) catch @panic("test failure");
14644 expect(v[6] == 167) catch @panic("test failure");
14645 expect(v[7] == 168) catch @panic("test failure");
14646 expect(v[8] == 169) catch @panic("test failure");
14647 expect(v[9] == 170) catch @panic("test failure");
14648 expect(v[10] == 171) catch @panic("test failure");
14649 expect(v[11] == 172) catch @panic("test failure");
14650 expect(v[12] == 173) catch @panic("test failure");
14651 expect(v[13] == 174) catch @panic("test failure");
14652 expect(v[14] == 175) catch @panic("test failure");
14653 expect(v[15] == 176) catch @panic("test failure");
14654 expect(i == 16) catch @panic("test failure");
14655}
14656
14657extern fn c_ret_vector_16_f64() @Vector(16, f64);
14658extern fn c_vector_16_f64(@Vector(16, f64), usize) void;
14659extern fn c_test_vector_16_f64() void;
14660
14661test "@Vector(16, f64)" {
14662 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14663 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14664 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
14665 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14666 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14667
14668 const v = c_ret_vector_16_f64();
14669 try expect(v[0] == 177);
14670 try expect(v[1] == 178);
14671 try expect(v[2] == 179);
14672 try expect(v[3] == 180);
14673 try expect(v[4] == 181);
14674 try expect(v[5] == 182);
14675 try expect(v[6] == 183);
14676 try expect(v[7] == 184);
14677 try expect(v[8] == 185);
14678 try expect(v[9] == 186);
14679 try expect(v[10] == 187);
14680 try expect(v[11] == 188);
14681 try expect(v[12] == 189);
14682 try expect(v[13] == 190);
14683 try expect(v[14] == 191);
14684 try expect(v[15] == 192);
14685 c_vector_16_f64(.{ 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208 }, 16);
14686 c_test_vector_16_f64();
14687}
14688
14689export fn zig_ret_vector_24_f64() @Vector(24, f64) {
14690 return .{
14691 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224,
14692 225, 226, 227, 228, 229, 230, 231, 232,
14693 };
14694}
14695export fn zig_vector_24_f64(v: @Vector(24, f64), i: usize) void {
14696 expect(v[0] == 233) catch @panic("test failure");
14697 expect(v[1] == 234) catch @panic("test failure");
14698 expect(v[2] == 235) catch @panic("test failure");
14699 expect(v[3] == 236) catch @panic("test failure");
14700 expect(v[4] == 237) catch @panic("test failure");
14701 expect(v[5] == 238) catch @panic("test failure");
14702 expect(v[6] == 239) catch @panic("test failure");
14703 expect(v[7] == 240) catch @panic("test failure");
14704 expect(v[8] == 241) catch @panic("test failure");
14705 expect(v[9] == 242) catch @panic("test failure");
14706 expect(v[10] == 243) catch @panic("test failure");
14707 expect(v[11] == 244) catch @panic("test failure");
14708 expect(v[12] == 245) catch @panic("test failure");
14709 expect(v[13] == 246) catch @panic("test failure");
14710 expect(v[14] == 247) catch @panic("test failure");
14711 expect(v[15] == 248) catch @panic("test failure");
14712 expect(v[16] == 249) catch @panic("test failure");
14713 expect(v[17] == 250) catch @panic("test failure");
14714 expect(v[18] == 251) catch @panic("test failure");
14715 expect(v[19] == 252) catch @panic("test failure");
14716 expect(v[20] == 253) catch @panic("test failure");
14717 expect(v[21] == 254) catch @panic("test failure");
14718 expect(v[22] == 255) catch @panic("test failure");
14719 expect(v[23] == 256) catch @panic("test failure");
14720 expect(i == 24) catch @panic("test failure");
14721}
14722
14723extern fn c_ret_vector_24_f64() @Vector(24, f64);
14724extern fn c_vector_24_f64(@Vector(24, f64), usize) void;
14725extern fn c_test_vector_24_f64() void;
14726
14727test "@Vector(24, f64)" {
14728 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14729 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14730 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14731 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14732 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14733
14734 const v = c_ret_vector_24_f64();
14735 try expect(v[0] == 257);
14736 try expect(v[1] == 258);
14737 try expect(v[2] == 259);
14738 try expect(v[3] == 260);
14739 try expect(v[4] == 261);
14740 try expect(v[5] == 262);
14741 try expect(v[6] == 263);
14742 try expect(v[7] == 264);
14743 try expect(v[8] == 265);
14744 try expect(v[9] == 266);
14745 try expect(v[10] == 267);
14746 try expect(v[11] == 268);
14747 try expect(v[12] == 269);
14748 try expect(v[13] == 270);
14749 try expect(v[14] == 271);
14750 try expect(v[15] == 272);
14751 try expect(v[16] == 273);
14752 try expect(v[17] == 274);
14753 try expect(v[18] == 275);
14754 try expect(v[19] == 276);
14755 try expect(v[20] == 277);
14756 try expect(v[21] == 278);
14757 try expect(v[22] == 279);
14758 try expect(v[23] == 280);
14759 c_vector_24_f64(.{
14760 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296,
14761 297, 298, 299, 300, 301, 302, 303, 304,
14762 }, 24);
14763 c_test_vector_24_f64();
14764}
14765
14766export fn zig_ret_vector_32_f64() @Vector(32, f64) {
14767 return .{
14768 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320,
14769 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336,
14770 };
14771}
14772export fn zig_vector_32_f64(v: @Vector(32, f64), i: usize) void {
14773 expect(v[0] == 337) catch @panic("test failure");
14774 expect(v[1] == 338) catch @panic("test failure");
14775 expect(v[2] == 339) catch @panic("test failure");
14776 expect(v[3] == 340) catch @panic("test failure");
14777 expect(v[4] == 341) catch @panic("test failure");
14778 expect(v[5] == 342) catch @panic("test failure");
14779 expect(v[6] == 343) catch @panic("test failure");
14780 expect(v[7] == 344) catch @panic("test failure");
14781 expect(v[8] == 345) catch @panic("test failure");
14782 expect(v[9] == 346) catch @panic("test failure");
14783 expect(v[10] == 347) catch @panic("test failure");
14784 expect(v[11] == 348) catch @panic("test failure");
14785 expect(v[12] == 349) catch @panic("test failure");
14786 expect(v[13] == 350) catch @panic("test failure");
14787 expect(v[14] == 351) catch @panic("test failure");
14788 expect(v[15] == 352) catch @panic("test failure");
14789 expect(v[16] == 353) catch @panic("test failure");
14790 expect(v[17] == 354) catch @panic("test failure");
14791 expect(v[18] == 355) catch @panic("test failure");
14792 expect(v[19] == 356) catch @panic("test failure");
14793 expect(v[20] == 357) catch @panic("test failure");
14794 expect(v[21] == 358) catch @panic("test failure");
14795 expect(v[22] == 359) catch @panic("test failure");
14796 expect(v[23] == 360) catch @panic("test failure");
14797 expect(v[24] == 361) catch @panic("test failure");
14798 expect(v[25] == 362) catch @panic("test failure");
14799 expect(v[26] == 363) catch @panic("test failure");
14800 expect(v[27] == 364) catch @panic("test failure");
14801 expect(v[28] == 365) catch @panic("test failure");
14802 expect(v[29] == 366) catch @panic("test failure");
14803 expect(v[30] == 367) catch @panic("test failure");
14804 expect(v[31] == 368) catch @panic("test failure");
14805 expect(i == 32) catch @panic("test failure");
14806}
14807
14808extern fn c_ret_vector_32_f64() @Vector(32, f64);
14809extern fn c_vector_32_f64(@Vector(32, f64), usize) void;
14810extern fn c_test_vector_32_f64() void;
14811
14812test "@Vector(32, f64)" {
14813 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14814 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14815 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
14816 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14817 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14818
14819 const v = c_ret_vector_32_f64();
14820 try expect(v[0] == 369);
14821 try expect(v[1] == 370);
14822 try expect(v[2] == 371);
14823 try expect(v[3] == 372);
14824 try expect(v[4] == 373);
14825 try expect(v[5] == 374);
14826 try expect(v[6] == 375);
14827 try expect(v[7] == 376);
14828 try expect(v[8] == 377);
14829 try expect(v[9] == 378);
14830 try expect(v[10] == 379);
14831 try expect(v[11] == 380);
14832 try expect(v[12] == 381);
14833 try expect(v[13] == 382);
14834 try expect(v[14] == 383);
14835 try expect(v[15] == 384);
14836 try expect(v[16] == 385);
14837 try expect(v[17] == 386);
14838 try expect(v[18] == 387);
14839 try expect(v[19] == 388);
14840 try expect(v[20] == 389);
14841 try expect(v[21] == 390);
14842 try expect(v[22] == 391);
14843 try expect(v[23] == 392);
14844 try expect(v[24] == 393);
14845 try expect(v[25] == 394);
14846 try expect(v[26] == 395);
14847 try expect(v[27] == 396);
14848 try expect(v[28] == 397);
14849 try expect(v[29] == 398);
14850 try expect(v[30] == 399);
14851 try expect(v[31] == 400);
14852 c_vector_32_f64(.{
14853 401, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416,
14854 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432,
14855 }, 32);
14856 c_test_vector_32_f64();
14857}
14858
14859export fn zig_ret_vector_48_f64() @Vector(48, f64) {
14860 return .{
14861 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448,
14862 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464,
14863 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480,
14864 };
14865}
14866export fn zig_vector_48_f64(v: @Vector(48, f64), i: usize) void {
14867 expect(v[0] == 481) catch @panic("test failure");
14868 expect(v[1] == 482) catch @panic("test failure");
14869 expect(v[2] == 483) catch @panic("test failure");
14870 expect(v[3] == 484) catch @panic("test failure");
14871 expect(v[4] == 485) catch @panic("test failure");
14872 expect(v[5] == 486) catch @panic("test failure");
14873 expect(v[6] == 487) catch @panic("test failure");
14874 expect(v[7] == 488) catch @panic("test failure");
14875 expect(v[8] == 489) catch @panic("test failure");
14876 expect(v[9] == 490) catch @panic("test failure");
14877 expect(v[10] == 491) catch @panic("test failure");
14878 expect(v[11] == 492) catch @panic("test failure");
14879 expect(v[12] == 493) catch @panic("test failure");
14880 expect(v[13] == 494) catch @panic("test failure");
14881 expect(v[14] == 495) catch @panic("test failure");
14882 expect(v[15] == 496) catch @panic("test failure");
14883 expect(v[16] == 497) catch @panic("test failure");
14884 expect(v[17] == 498) catch @panic("test failure");
14885 expect(v[18] == 499) catch @panic("test failure");
14886 expect(v[19] == 500) catch @panic("test failure");
14887 expect(v[20] == 501) catch @panic("test failure");
14888 expect(v[21] == 502) catch @panic("test failure");
14889 expect(v[22] == 503) catch @panic("test failure");
14890 expect(v[23] == 504) catch @panic("test failure");
14891 expect(v[24] == 505) catch @panic("test failure");
14892 expect(v[25] == 506) catch @panic("test failure");
14893 expect(v[26] == 507) catch @panic("test failure");
14894 expect(v[27] == 508) catch @panic("test failure");
14895 expect(v[28] == 509) catch @panic("test failure");
14896 expect(v[29] == 510) catch @panic("test failure");
14897 expect(v[30] == 511) catch @panic("test failure");
14898 expect(v[31] == 512) catch @panic("test failure");
14899 expect(v[32] == 513) catch @panic("test failure");
14900 expect(v[33] == 514) catch @panic("test failure");
14901 expect(v[34] == 515) catch @panic("test failure");
14902 expect(v[35] == 516) catch @panic("test failure");
14903 expect(v[36] == 517) catch @panic("test failure");
14904 expect(v[37] == 518) catch @panic("test failure");
14905 expect(v[38] == 519) catch @panic("test failure");
14906 expect(v[39] == 520) catch @panic("test failure");
14907 expect(v[40] == 521) catch @panic("test failure");
14908 expect(v[41] == 522) catch @panic("test failure");
14909 expect(v[42] == 523) catch @panic("test failure");
14910 expect(v[43] == 524) catch @panic("test failure");
14911 expect(v[44] == 525) catch @panic("test failure");
14912 expect(v[45] == 526) catch @panic("test failure");
14913 expect(v[46] == 527) catch @panic("test failure");
14914 expect(v[47] == 528) catch @panic("test failure");
14915 expect(i == 48) catch @panic("test failure");
14916}
14917
14918extern fn c_ret_vector_48_f64() @Vector(48, f64);
14919extern fn c_vector_48_f64(@Vector(48, f64), usize) void;
14920extern fn c_test_vector_48_f64() void;
14921
14922test "@Vector(48, f64)" {
14923 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
14924 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
14925 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
14926 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14927 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
14928
14929 const v = c_ret_vector_48_f64();
14930 try expect(v[0] == 529);
14931 try expect(v[1] == 530);
14932 try expect(v[2] == 531);
14933 try expect(v[3] == 532);
14934 try expect(v[4] == 533);
14935 try expect(v[5] == 534);
14936 try expect(v[6] == 535);
14937 try expect(v[7] == 536);
14938 try expect(v[8] == 537);
14939 try expect(v[9] == 538);
14940 try expect(v[10] == 539);
14941 try expect(v[11] == 540);
14942 try expect(v[12] == 541);
14943 try expect(v[13] == 542);
14944 try expect(v[14] == 543);
14945 try expect(v[15] == 544);
14946 try expect(v[16] == 545);
14947 try expect(v[17] == 546);
14948 try expect(v[18] == 547);
14949 try expect(v[19] == 548);
14950 try expect(v[20] == 549);
14951 try expect(v[21] == 550);
14952 try expect(v[22] == 551);
14953 try expect(v[23] == 552);
14954 try expect(v[24] == 553);
14955 try expect(v[25] == 554);
14956 try expect(v[26] == 555);
14957 try expect(v[27] == 556);
14958 try expect(v[28] == 557);
14959 try expect(v[29] == 558);
14960 try expect(v[30] == 559);
14961 try expect(v[31] == 560);
14962 try expect(v[32] == 561);
14963 try expect(v[33] == 562);
14964 try expect(v[34] == 563);
14965 try expect(v[35] == 564);
14966 try expect(v[36] == 565);
14967 try expect(v[37] == 566);
14968 try expect(v[38] == 567);
14969 try expect(v[39] == 568);
14970 try expect(v[40] == 569);
14971 try expect(v[41] == 570);
14972 try expect(v[42] == 571);
14973 try expect(v[43] == 572);
14974 try expect(v[44] == 573);
14975 try expect(v[45] == 574);
14976 try expect(v[46] == 575);
14977 try expect(v[47] == 576);
14978 c_vector_48_f64(.{
14979 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592,
14980 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608,
14981 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624,
14982 }, 48);
14983 c_test_vector_48_f64();
14984}
14985
14986export fn zig_ret_vector_64_f64() @Vector(64, f64) {
14987 return .{
14988 625, 626, 627, 628, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640,
14989 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656,
14990 657, 658, 659, 660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672,
14991 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688,
14992 };
14993}
14994export fn zig_vector_64_f64(v: @Vector(64, f64), i: usize) void {
14995 expect(v[0] == 689) catch @panic("test failure");
14996 expect(v[1] == 690) catch @panic("test failure");
14997 expect(v[2] == 691) catch @panic("test failure");
14998 expect(v[3] == 692) catch @panic("test failure");
14999 expect(v[4] == 693) catch @panic("test failure");
15000 expect(v[5] == 694) catch @panic("test failure");
15001 expect(v[6] == 695) catch @panic("test failure");
15002 expect(v[7] == 696) catch @panic("test failure");
15003 expect(v[8] == 697) catch @panic("test failure");
15004 expect(v[9] == 698) catch @panic("test failure");
15005 expect(v[10] == 699) catch @panic("test failure");
15006 expect(v[11] == 700) catch @panic("test failure");
15007 expect(v[12] == 701) catch @panic("test failure");
15008 expect(v[13] == 702) catch @panic("test failure");
15009 expect(v[14] == 703) catch @panic("test failure");
15010 expect(v[15] == 704) catch @panic("test failure");
15011 expect(v[16] == 705) catch @panic("test failure");
15012 expect(v[17] == 706) catch @panic("test failure");
15013 expect(v[18] == 707) catch @panic("test failure");
15014 expect(v[19] == 708) catch @panic("test failure");
15015 expect(v[20] == 709) catch @panic("test failure");
15016 expect(v[21] == 710) catch @panic("test failure");
15017 expect(v[22] == 711) catch @panic("test failure");
15018 expect(v[23] == 712) catch @panic("test failure");
15019 expect(v[24] == 713) catch @panic("test failure");
15020 expect(v[25] == 714) catch @panic("test failure");
15021 expect(v[26] == 715) catch @panic("test failure");
15022 expect(v[27] == 716) catch @panic("test failure");
15023 expect(v[28] == 717) catch @panic("test failure");
15024 expect(v[29] == 718) catch @panic("test failure");
15025 expect(v[30] == 719) catch @panic("test failure");
15026 expect(v[31] == 720) catch @panic("test failure");
15027 expect(v[32] == 721) catch @panic("test failure");
15028 expect(v[33] == 722) catch @panic("test failure");
15029 expect(v[34] == 723) catch @panic("test failure");
15030 expect(v[35] == 724) catch @panic("test failure");
15031 expect(v[36] == 725) catch @panic("test failure");
15032 expect(v[37] == 726) catch @panic("test failure");
15033 expect(v[38] == 727) catch @panic("test failure");
15034 expect(v[39] == 728) catch @panic("test failure");
15035 expect(v[40] == 729) catch @panic("test failure");
15036 expect(v[41] == 730) catch @panic("test failure");
15037 expect(v[42] == 731) catch @panic("test failure");
15038 expect(v[43] == 732) catch @panic("test failure");
15039 expect(v[44] == 733) catch @panic("test failure");
15040 expect(v[45] == 734) catch @panic("test failure");
15041 expect(v[46] == 735) catch @panic("test failure");
15042 expect(v[47] == 736) catch @panic("test failure");
15043 expect(v[48] == 737) catch @panic("test failure");
15044 expect(v[49] == 738) catch @panic("test failure");
15045 expect(v[50] == 739) catch @panic("test failure");
15046 expect(v[51] == 740) catch @panic("test failure");
15047 expect(v[52] == 741) catch @panic("test failure");
15048 expect(v[53] == 742) catch @panic("test failure");
15049 expect(v[54] == 743) catch @panic("test failure");
15050 expect(v[55] == 744) catch @panic("test failure");
15051 expect(v[56] == 745) catch @panic("test failure");
15052 expect(v[57] == 746) catch @panic("test failure");
15053 expect(v[58] == 747) catch @panic("test failure");
15054 expect(v[59] == 748) catch @panic("test failure");
15055 expect(v[60] == 749) catch @panic("test failure");
15056 expect(v[61] == 750) catch @panic("test failure");
15057 expect(v[62] == 751) catch @panic("test failure");
15058 expect(v[63] == 752) catch @panic("test failure");
15059 expect(i == 64) catch @panic("test failure");
15060}
15061
15062extern fn c_ret_vector_64_f64() @Vector(64, f64);
15063extern fn c_vector_64_f64(@Vector(64, f64), usize) void;
15064extern fn c_test_vector_64_f64() void;
15065
15066test "@Vector(64, f64)" {
15067 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
15068 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15069 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
15070 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
15071 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15072
15073 const v = c_ret_vector_64_f64();
15074 try expect(v[0] == 753);
15075 try expect(v[1] == 754);
15076 try expect(v[2] == 755);
15077 try expect(v[3] == 756);
15078 try expect(v[4] == 757);
15079 try expect(v[5] == 758);
15080 try expect(v[6] == 759);
15081 try expect(v[7] == 760);
15082 try expect(v[8] == 761);
15083 try expect(v[9] == 762);
15084 try expect(v[10] == 763);
15085 try expect(v[11] == 764);
15086 try expect(v[12] == 765);
15087 try expect(v[13] == 766);
15088 try expect(v[14] == 767);
15089 try expect(v[15] == 768);
15090 try expect(v[16] == 769);
15091 try expect(v[17] == 770);
15092 try expect(v[18] == 771);
15093 try expect(v[19] == 772);
15094 try expect(v[20] == 773);
15095 try expect(v[21] == 774);
15096 try expect(v[22] == 775);
15097 try expect(v[23] == 776);
15098 try expect(v[24] == 777);
15099 try expect(v[25] == 778);
15100 try expect(v[26] == 779);
15101 try expect(v[27] == 780);
15102 try expect(v[28] == 781);
15103 try expect(v[29] == 782);
15104 try expect(v[30] == 783);
15105 try expect(v[31] == 784);
15106 try expect(v[32] == 785);
15107 try expect(v[33] == 786);
15108 try expect(v[34] == 787);
15109 try expect(v[35] == 788);
15110 try expect(v[36] == 789);
15111 try expect(v[37] == 790);
15112 try expect(v[38] == 791);
15113 try expect(v[39] == 792);
15114 try expect(v[40] == 793);
15115 try expect(v[41] == 794);
15116 try expect(v[42] == 795);
15117 try expect(v[43] == 796);
15118 try expect(v[44] == 797);
15119 try expect(v[45] == 798);
15120 try expect(v[46] == 799);
15121 try expect(v[47] == 800);
15122 try expect(v[48] == 801);
15123 try expect(v[49] == 802);
15124 try expect(v[50] == 803);
15125 try expect(v[51] == 804);
15126 try expect(v[52] == 805);
15127 try expect(v[53] == 806);
15128 try expect(v[54] == 807);
15129 try expect(v[55] == 808);
15130 try expect(v[56] == 809);
15131 try expect(v[57] == 810);
15132 try expect(v[58] == 811);
15133 try expect(v[59] == 812);
15134 try expect(v[60] == 813);
15135 try expect(v[61] == 814);
15136 try expect(v[62] == 815);
15137 try expect(v[63] == 816);
15138 c_vector_64_f64(.{
15139 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832,
15140 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848,
15141 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864,
15142 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880,
15143 }, 64);
15144 c_test_vector_64_f64();
15145}
15146
15147const Struct_u8 = extern struct {
15148 a: u8,
15149};
15150
15151export fn zig_ret_struct_u8() Struct_u8 {
15152 return .{ .a = 1 };
15153}
15154export fn zig_struct_u8(s: Struct_u8, i: usize) void {
15155 expect(s.a == 2) catch @panic("test failure");
15156 expect(i == 3) catch @panic("test failure");
15157}
15158
15159extern fn c_ret_struct_u8() Struct_u8;
15160extern fn c_struct_u8(Struct_u8, usize) void;
15161extern fn c_test_struct_u8() void;
15162
15163test "struct u8" {
15164 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15165 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15166 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15167 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15168
15169 const s = c_ret_struct_u8();
15170 try expect(s.a == 4);
15171 c_struct_u8(.{ .a = 5 }, 6);
15172 c_test_struct_u8();
15173}
15174
15175const Struct_u8_u8 = extern struct {
15176 a: u8,
15177 b: u8,
15178};
15179
15180export fn zig_ret_struct_u8_u8() Struct_u8_u8 {
15181 return .{ .a = 1, .b = 2 };
15182}
15183export fn zig_struct_u8_u8(s: Struct_u8_u8, i: usize) void {
15184 expect(s.a == 3) catch @panic("test failure");
15185 expect(s.b == 4) catch @panic("test failure");
15186 expect(i == 5) catch @panic("test failure");
15187}
15188
15189extern fn c_ret_struct_u8_u8() Struct_u8_u8;
15190extern fn c_struct_u8_u8(Struct_u8_u8, usize) void;
15191extern fn c_test_struct_u8_u8() void;
15192
15193test "struct u8, u8" {
15194 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15195 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15196 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15197 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15198 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15199 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15200
15201 const s = c_ret_struct_u8_u8();
15202 try expect(s.a == 6);
15203 try expect(s.b == 7);
15204 c_struct_u8_u8(.{ .a = 8, .b = 9 }, 10);
15205 c_test_struct_u8_u8();
15206}
15207
15208const Struct_u8_u8_u8 = extern struct {
15209 a: u8,
15210 b: u8,
15211 c: u8,
15212};
15213
15214export fn zig_ret_struct_u8_u8_u8() Struct_u8_u8_u8 {
15215 return .{ .a = 1, .b = 2, .c = 3 };
15216}
15217export fn zig_struct_u8_u8_u8(s: Struct_u8_u8_u8, i: usize) void {
15218 expect(s.a == 4) catch @panic("test failure");
15219 expect(s.b == 5) catch @panic("test failure");
15220 expect(s.c == 6) catch @panic("test failure");
15221 expect(i == 7) catch @panic("test failure");
15222}
15223
15224extern fn c_ret_struct_u8_u8_u8() Struct_u8_u8_u8;
15225extern fn c_struct_u8_u8_u8(Struct_u8_u8_u8, usize) void;
15226extern fn c_test_struct_u8_u8_u8() void;
15227
15228test "struct u8, u8, u8" {
15229 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15230 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15231 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15232 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15233 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15234 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15235
15236 const s = c_ret_struct_u8_u8_u8();
15237 try expect(s.a == 8);
15238 try expect(s.b == 9);
15239 try expect(s.c == 10);
15240 c_struct_u8_u8_u8(.{ .a = 11, .b = 12, .c = 13 }, 14);
15241 c_test_struct_u8_u8_u8();
15242}
15243
15244const Struct_u8_u8_u8_u8 = extern struct {
15245 a: u8,
15246 b: u8,
15247 c: u8,
15248 d: u8,
15249};
15250
15251export fn zig_ret_struct_u8_u8_u8_u8() Struct_u8_u8_u8_u8 {
15252 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
15253}
15254export fn zig_struct_u8_u8_u8_u8(s: Struct_u8_u8_u8_u8, i: usize) void {
15255 expect(s.a == 5) catch @panic("test failure");
15256 expect(s.b == 6) catch @panic("test failure");
15257 expect(s.c == 7) catch @panic("test failure");
15258 expect(s.d == 8) catch @panic("test failure");
15259 expect(i == 9) catch @panic("test failure");
15260}
15261
15262extern fn c_ret_struct_u8_u8_u8_u8() Struct_u8_u8_u8_u8;
15263extern fn c_struct_u8_u8_u8_u8(Struct_u8_u8_u8_u8, usize) void;
15264extern fn c_test_struct_u8_u8_u8_u8() void;
15265
15266test "struct u8, u8, u8, u8" {
15267 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15268 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15269 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15270 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15271 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15272 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15273
15274 const s = c_ret_struct_u8_u8_u8_u8();
15275 try expect(s.a == 10);
15276 try expect(s.b == 11);
15277 try expect(s.c == 12);
15278 try expect(s.d == 13);
15279 c_struct_u8_u8_u8_u8(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
15280 c_test_struct_u8_u8_u8_u8();
15281}
15282
15283const Struct_u16 = extern struct {
15284 a: u16,
15285};
15286
15287export fn zig_ret_struct_u16() Struct_u16 {
15288 return .{ .a = 1 };
15289}
15290export fn zig_struct_u16(s: Struct_u16, i: usize) void {
15291 expect(s.a == 2) catch @panic("test failure");
15292 expect(i == 3) catch @panic("test failure");
15293}
15294
15295extern fn c_ret_struct_u16() Struct_u16;
15296extern fn c_struct_u16(Struct_u16, usize) void;
15297extern fn c_test_struct_u16() void;
15298
15299test "struct u16" {
15300 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15301 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15302 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15303 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15304
15305 const s = c_ret_struct_u16();
15306 try expect(s.a == 4);
15307 c_struct_u16(.{ .a = 5 }, 6);
15308 c_test_struct_u16();
15309}
15310
15311const Struct_u16_u16 = extern struct {
15312 a: u16,
15313 b: u16,
15314};
15315
15316export fn zig_ret_struct_u16_u16() Struct_u16_u16 {
15317 return .{ .a = 1, .b = 2 };
15318}
15319export fn zig_struct_u16_u16(s: Struct_u16_u16, i: usize) void {
15320 expect(s.a == 3) catch @panic("test failure");
15321 expect(s.b == 4) catch @panic("test failure");
15322 expect(i == 5) catch @panic("test failure");
15323}
15324
15325extern fn c_ret_struct_u16_u16() Struct_u16_u16;
15326extern fn c_struct_u16_u16(Struct_u16_u16, usize) void;
15327extern fn c_test_struct_u16_u16() void;
15328
15329test "struct u16, u16" {
15330 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15331 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15332 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15333 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15334 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15335 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15336
15337 const s = c_ret_struct_u16_u16();
15338 try expect(s.a == 6);
15339 try expect(s.b == 7);
15340 c_struct_u16_u16(.{ .a = 8, .b = 9 }, 10);
15341 c_test_struct_u16_u16();
15342}
15343
15344const Struct_u16_u16_u16 = extern struct {
15345 a: u16,
15346 b: u16,
15347 c: u16,
15348};
15349
15350export fn zig_ret_struct_u16_u16_u16() Struct_u16_u16_u16 {
15351 return .{ .a = 1, .b = 2, .c = 3 };
15352}
15353export fn zig_struct_u16_u16_u16(s: Struct_u16_u16_u16, i: usize) void {
15354 expect(s.a == 4) catch @panic("test failure");
15355 expect(s.b == 5) catch @panic("test failure");
15356 expect(s.c == 6) catch @panic("test failure");
15357 expect(i == 7) catch @panic("test failure");
15358}
15359
15360extern fn c_ret_struct_u16_u16_u16() Struct_u16_u16_u16;
15361extern fn c_struct_u16_u16_u16(Struct_u16_u16_u16, usize) void;
15362extern fn c_test_struct_u16_u16_u16() void;
15363
15364test "struct u16, u16, u16" {
15365 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15366 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15367 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15368 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15369 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15370 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15371 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15372
15373 const s = c_ret_struct_u16_u16_u16();
15374 try expect(s.a == 8);
15375 try expect(s.b == 9);
15376 try expect(s.c == 10);
15377 c_struct_u16_u16_u16(.{ .a = 11, .b = 12, .c = 13 }, 14);
15378 c_test_struct_u16_u16_u16();
15379}
15380
15381const Struct_u16_u16_u16_u16 = extern struct {
15382 a: u16,
15383 b: u16,
15384 c: u16,
15385 d: u16,
15386};
15387
15388export fn zig_ret_struct_u16_u16_u16_u16() Struct_u16_u16_u16_u16 {
15389 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
15390}
15391export fn zig_struct_u16_u16_u16_u16(s: Struct_u16_u16_u16_u16, i: usize) void {
15392 expect(s.a == 5) catch @panic("test failure");
15393 expect(s.b == 6) catch @panic("test failure");
15394 expect(s.c == 7) catch @panic("test failure");
15395 expect(s.d == 8) catch @panic("test failure");
15396 expect(i == 9) catch @panic("test failure");
15397}
15398
15399extern fn c_ret_struct_u16_u16_u16_u16() Struct_u16_u16_u16_u16;
15400extern fn c_struct_u16_u16_u16_u16(Struct_u16_u16_u16_u16, usize) void;
15401extern fn c_test_struct_u16_u16_u16_u16() void;
15402
15403test "struct u16, u16, u16, u16" {
15404 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15405 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15406 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15407 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15408 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15409 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15410 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15411
15412 const s = c_ret_struct_u16_u16_u16_u16();
15413 try expect(s.a == 10);
15414 try expect(s.b == 11);
15415 try expect(s.c == 12);
15416 try expect(s.d == 13);
15417 c_struct_u16_u16_u16_u16(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
15418 c_test_struct_u16_u16_u16_u16();
15419}
15420
15421const Struct_u32 = extern struct {
15422 a: u32,
15423};
15424
15425export fn zig_ret_struct_u32() Struct_u32 {
15426 return .{ .a = 1 };
15427}
15428export fn zig_struct_u32(s: Struct_u32, i: usize) void {
15429 expect(s.a == 2) catch @panic("test failure");
15430 expect(i == 3) catch @panic("test failure");
15431}
15432
15433extern fn c_ret_struct_u32() Struct_u32;
15434extern fn c_struct_u32(Struct_u32, usize) void;
15435extern fn c_test_struct_u32() void;
15436
15437test "struct u32" {
15438 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15439 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15440 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15441 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15442
15443 const s = c_ret_struct_u32();
15444 try expect(s.a == 4);
15445 c_struct_u32(.{ .a = 5 }, 6);
15446 c_test_struct_u32();
15447}
15448
15449const Struct_u32_u32 = extern struct {
15450 a: u32,
15451 b: u32,
15452};
15453
15454export fn zig_ret_struct_u32_u32() Struct_u32_u32 {
15455 return .{ .a = 1, .b = 2 };
15456}
15457export fn zig_struct_u32_u32(s: Struct_u32_u32, i: usize) void {
15458 expect(s.a == 3) catch @panic("test failure");
15459 expect(s.b == 4) catch @panic("test failure");
15460 expect(i == 5) catch @panic("test failure");
15461}
15462
15463extern fn c_ret_struct_u32_u32() Struct_u32_u32;
15464extern fn c_struct_u32_u32(Struct_u32_u32, usize) void;
15465extern fn c_test_struct_u32_u32() void;
15466
15467test "struct u32, u32" {
15468 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15469 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15470 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15471 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15472 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15473 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15474
15475 const s = c_ret_struct_u32_u32();
15476 try expect(s.a == 6);
15477 try expect(s.b == 7);
15478 c_struct_u32_u32(.{ .a = 8, .b = 9 }, 10);
15479 c_test_struct_u32_u32();
15480}
15481
15482const Struct_u32_u32_u32 = extern struct {
15483 a: u32,
15484 b: u32,
15485 c: u32,
15486};
15487
15488export fn zig_ret_struct_u32_u32_u32() Struct_u32_u32_u32 {
15489 return .{ .a = 1, .b = 2, .c = 3 };
15490}
15491export fn zig_struct_u32_u32_u32(s: Struct_u32_u32_u32, i: usize) void {
15492 expect(s.a == 4) catch @panic("test failure");
15493 expect(s.b == 5) catch @panic("test failure");
15494 expect(s.c == 6) catch @panic("test failure");
15495 expect(i == 7) catch @panic("test failure");
15496}
15497
15498extern fn c_ret_struct_u32_u32_u32() Struct_u32_u32_u32;
15499extern fn c_struct_u32_u32_u32(Struct_u32_u32_u32, usize) void;
15500extern fn c_test_struct_u32_u32_u32() void;
15501
15502test "struct u32, u32, u32" {
15503 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15504 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15505 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15506 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15507 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15508
15509 const s = c_ret_struct_u32_u32_u32();
15510 try expect(s.a == 8);
15511 try expect(s.b == 9);
15512 try expect(s.c == 10);
15513 c_struct_u32_u32_u32(.{ .a = 11, .b = 12, .c = 13 }, 14);
15514 c_test_struct_u32_u32_u32();
15515}
15516
15517const Struct_u32_u32_u32_u32 = extern struct {
15518 a: u32,
15519 b: u32,
15520 c: u32,
15521 d: u32,
15522};
15523
15524export fn zig_ret_struct_u32_u32_u32_u32() Struct_u32_u32_u32_u32 {
15525 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
15526}
15527export fn zig_struct_u32_u32_u32_u32(s: Struct_u32_u32_u32_u32, i: usize) void {
15528 expect(s.a == 5) catch @panic("test failure");
15529 expect(s.b == 6) catch @panic("test failure");
15530 expect(s.c == 7) catch @panic("test failure");
15531 expect(s.d == 8) catch @panic("test failure");
15532 expect(i == 9) catch @panic("test failure");
15533}
15534
15535extern fn c_ret_struct_u32_u32_u32_u32() Struct_u32_u32_u32_u32;
15536extern fn c_struct_u32_u32_u32_u32(Struct_u32_u32_u32_u32, usize) void;
15537extern fn c_test_struct_u32_u32_u32_u32() void;
15538
15539test "struct u32, u32, u32, u32" {
15540 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15541 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15542 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15543 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15544 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15545
15546 const s = c_ret_struct_u32_u32_u32_u32();
15547 try expect(s.a == 10);
15548 try expect(s.b == 11);
15549 try expect(s.c == 12);
15550 try expect(s.d == 13);
15551 c_struct_u32_u32_u32_u32(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
15552 c_test_struct_u32_u32_u32_u32();
15553}
15554
15555const Struct_u64 = extern struct {
15556 a: u64,
15557};
15558
15559export fn zig_ret_struct_u64() Struct_u64 {
15560 return .{ .a = 1 };
15561}
15562export fn zig_struct_u64(s: Struct_u64, i: usize) void {
15563 expect(s.a == 2) catch @panic("test failure");
15564 expect(i == 3) catch @panic("test failure");
15565}
15566
15567extern fn c_ret_struct_u64() Struct_u64;
15568extern fn c_struct_u64(Struct_u64, usize) void;
15569extern fn c_test_struct_u64() void;
15570
15571test "struct u64" {
15572 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15573 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15574 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15575 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15576
15577 const s = c_ret_struct_u64();
15578 try expect(s.a == 4);
15579 c_struct_u64(.{ .a = 5 }, 6);
15580 c_test_struct_u64();
15581}
15582
15583const Struct_u64_u64 = extern struct {
15584 a: u64,
15585 b: u64,
15586};
15587
15588export fn zig_ret_struct_u64_u64() Struct_u64_u64 {
15589 return .{ .a = 1, .b = 2 };
15590}
15591export fn zig_struct_u64_u64(s: Struct_u64_u64, i: usize) void {
15592 expect(s.a == 3) catch @panic("test failure");
15593 expect(s.b == 4) catch @panic("test failure");
15594 expect(i == 1) catch @panic("test failure");
15595}
15596export fn zig_1_struct_u64_u64(_: usize, s: Struct_u64_u64, i: usize) void {
15597 expect(s.a == 5) catch @panic("test failure");
15598 expect(s.b == 6) catch @panic("test failure");
15599 expect(i == 2) catch @panic("test failure");
15600}
15601export fn zig_2_struct_u64_u64(_: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15602 expect(s.a == 7) catch @panic("test failure");
15603 expect(s.b == 8) catch @panic("test failure");
15604 expect(i == 3) catch @panic("test failure");
15605}
15606export fn zig_3_struct_u64_u64(_: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15607 expect(s.a == 9) catch @panic("test failure");
15608 expect(s.b == 10) catch @panic("test failure");
15609 expect(i == 4) catch @panic("test failure");
15610}
15611export fn zig_4_struct_u64_u64(_: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15612 expect(s.a == 11) catch @panic("test failure");
15613 expect(s.b == 12) catch @panic("test failure");
15614 expect(i == 5) catch @panic("test failure");
15615}
15616export fn zig_5_struct_u64_u64(_: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15617 expect(s.a == 13) catch @panic("test failure");
15618 expect(s.b == 14) catch @panic("test failure");
15619 expect(i == 6) catch @panic("test failure");
15620}
15621export fn zig_6_struct_u64_u64(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15622 expect(s.a == 15) catch @panic("test failure");
15623 expect(s.b == 16) catch @panic("test failure");
15624 expect(i == 7) catch @panic("test failure");
15625}
15626export fn zig_7_struct_u64_u64(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15627 expect(s.a == 17) catch @panic("test failure");
15628 expect(s.b == 18) catch @panic("test failure");
15629 expect(i == 8) catch @panic("test failure");
15630}
15631export fn zig_8_struct_u64_u64(_: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, _: usize, s: Struct_u64_u64, i: usize) void {
15632 expect(s.a == 19) catch @panic("test failure");
15633 expect(s.b == 20) catch @panic("test failure");
15634 expect(i == 9) catch @panic("test failure");
15635}
15636
15637extern fn c_ret_struct_u64_u64() Struct_u64_u64;
15638extern fn c_struct_u64_u64(Struct_u64_u64, usize) void;
15639extern fn c_1_struct_u64_u64(usize, Struct_u64_u64, usize) void;
15640extern fn c_2_struct_u64_u64(usize, usize, Struct_u64_u64, usize) void;
15641extern fn c_3_struct_u64_u64(usize, usize, usize, Struct_u64_u64, usize) void;
15642extern fn c_4_struct_u64_u64(usize, usize, usize, usize, Struct_u64_u64, usize) void;
15643extern fn c_5_struct_u64_u64(usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
15644extern fn c_6_struct_u64_u64(usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
15645extern fn c_7_struct_u64_u64(usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
15646extern fn c_8_struct_u64_u64(usize, usize, usize, usize, usize, usize, usize, usize, Struct_u64_u64, usize) void;
15647extern fn c_test_struct_u64_u64() void;
15648
15649test "struct u64, u64" {
15650 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15651 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15652 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15653
15654 const s = c_ret_struct_u64_u64();
15655 try expect(s.a == 21);
15656 try expect(s.b == 22);
15657 c_struct_u64_u64(.{ .a = 23, .b = 24 }, 1);
15658 c_1_struct_u64_u64(0, .{ .a = 25, .b = 26 }, 2);
15659 c_2_struct_u64_u64(0, 1, .{ .a = 27, .b = 28 }, 3);
15660 c_3_struct_u64_u64(0, 1, 2, .{ .a = 29, .b = 30 }, 4);
15661 c_4_struct_u64_u64(0, 1, 2, 3, .{ .a = 31, .b = 32 }, 5);
15662 c_5_struct_u64_u64(0, 1, 2, 3, 4, .{ .a = 33, .b = 34 }, 6);
15663 c_6_struct_u64_u64(0, 1, 2, 3, 4, 5, .{ .a = 35, .b = 36 }, 7);
15664 c_7_struct_u64_u64(0, 1, 2, 3, 4, 5, 6, .{ .a = 37, .b = 38 }, 8);
15665 c_8_struct_u64_u64(0, 1, 2, 3, 4, 5, 6, 7, .{ .a = 39, .b = 40 }, 9);
15666 c_test_struct_u64_u64();
15667}
15668
15669const Struct_u64_u64_u64 = extern struct {
15670 a: u64,
15671 b: u64,
15672 c: u64,
15673};
15674
15675export fn zig_ret_struct_u64_u64_u64() Struct_u64_u64_u64 {
15676 return .{ .a = 1, .b = 2, .c = 3 };
15677}
15678export fn zig_struct_u64_u64_u64(s: Struct_u64_u64_u64, i: usize) void {
15679 expect(s.a == 4) catch @panic("test failure");
15680 expect(s.b == 5) catch @panic("test failure");
15681 expect(s.c == 6) catch @panic("test failure");
15682 expect(i == 7) catch @panic("test failure");
15683}
15684
15685extern fn c_ret_struct_u64_u64_u64() Struct_u64_u64_u64;
15686extern fn c_struct_u64_u64_u64(Struct_u64_u64_u64, usize) void;
15687extern fn c_test_struct_u64_u64_u64() void;
15688
15689test "struct u64, u64, u64" {
15690 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15691 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15692 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15693 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15694
15695 const s = c_ret_struct_u64_u64_u64();
15696 try expect(s.a == 8);
15697 try expect(s.b == 9);
15698 try expect(s.c == 10);
15699 c_struct_u64_u64_u64(.{ .a = 11, .b = 12, .c = 13 }, 14);
15700 c_test_struct_u64_u64_u64();
15701}
15702
15703const Struct_u64_u64_u64_u64 = extern struct {
15704 a: u64,
15705 b: u64,
15706 c: u64,
15707 d: u64,
15708};
15709
15710export fn zig_ret_struct_u64_u64_u64_u64() Struct_u64_u64_u64_u64 {
15711 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
15712}
15713export fn zig_struct_u64_u64_u64_u64(s: Struct_u64_u64_u64_u64, i: usize) void {
15714 expect(s.a == 5) catch @panic("test failure");
15715 expect(s.b == 6) catch @panic("test failure");
15716 expect(s.c == 7) catch @panic("test failure");
15717 expect(s.d == 8) catch @panic("test failure");
15718 expect(i == 9) catch @panic("test failure");
15719}
15720
15721extern fn c_ret_struct_u64_u64_u64_u64() Struct_u64_u64_u64_u64;
15722extern fn c_struct_u64_u64_u64_u64(Struct_u64_u64_u64_u64, usize) void;
15723extern fn c_test_struct_u64_u64_u64_u64() void;
15724
15725test "struct u64, u64, u64, u64" {
15726 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15727 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15728 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15729 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15730
15731 const s = c_ret_struct_u64_u64_u64_u64();
15732 try expect(s.a == 10);
15733 try expect(s.b == 11);
15734 try expect(s.c == 12);
15735 try expect(s.d == 13);
15736 c_struct_u64_u64_u64_u64(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
15737 c_test_struct_u64_u64_u64_u64();
15738}
15739
15740const Struct_f32 = extern struct {
15741 a: f32,
15742};
15743
15744export fn zig_ret_struct_f32() Struct_f32 {
15745 return .{ .a = 1 };
15746}
15747export fn zig_struct_f32(s: Struct_f32, i: usize) void {
15748 expect(s.a == 2) catch @panic("test failure");
15749 expect(i == 3) catch @panic("test failure");
15750}
15751
15752extern fn c_ret_struct_f32() Struct_f32;
15753extern fn c_struct_f32(Struct_f32, usize) void;
15754extern fn c_test_struct_f32() void;
15755
15756test "struct f32" {
15757 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15758 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15759 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15760 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15761
15762 const s = c_ret_struct_f32();
15763 try expect(s.a == 4);
15764 c_struct_f32(.{ .a = 5 }, 6);
15765 c_test_struct_f32();
15766}
15767
15768const Struct_f32_f32 = extern struct {
15769 a: f32,
15770 b: f32,
15771};
15772
15773export fn zig_ret_struct_f32_f32() Struct_f32_f32 {
15774 return .{ .a = 1, .b = 2 };
15775}
15776export fn zig_struct_f32_f32(s: Struct_f32_f32, i: usize) void {
15777 expect(s.a == 3) catch @panic("test failure");
15778 expect(s.b == 4) catch @panic("test failure");
15779 expect(i == 5) catch @panic("test failure");
15780}
15781
15782extern fn c_ret_struct_f32_f32() Struct_f32_f32;
15783extern fn c_struct_f32_f32(Struct_f32_f32, usize) void;
15784extern fn c_test_struct_f32_f32() void;
15785
15786test "struct f32, f32" {
15787 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
15788 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15789 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15790 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15791 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15792 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15793 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
15794
15795 const s = c_ret_struct_f32_f32();
15796 try expect(s.a == 6);
15797 try expect(s.b == 7);
15798 c_struct_f32_f32(.{ .a = 8, .b = 9 }, 10);
15799 c_test_struct_f32_f32();
15800}
15801
15802const Struct_f32_f32_f32 = extern struct {
15803 a: f32,
15804 b: f32,
15805 c: f32,
15806};
15807
15808export fn zig_ret_struct_f32_f32_f32() Struct_f32_f32_f32 {
15809 return .{ .a = 1, .b = 2, .c = 3 };
15810}
15811export fn zig_struct_f32_f32_f32(s: Struct_f32_f32_f32, i: usize) void {
15812 expect(s.a == 4) catch @panic("test failure");
15813 expect(s.b == 5) catch @panic("test failure");
15814 expect(s.c == 6) catch @panic("test failure");
15815 expect(i == 7) catch @panic("test failure");
15816}
15817
15818extern fn c_ret_struct_f32_f32_f32() Struct_f32_f32_f32;
15819extern fn c_struct_f32_f32_f32(Struct_f32_f32_f32, usize) void;
15820extern fn c_test_struct_f32_f32_f32() void;
15821
15822test "struct f32, f32, f32" {
15823 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
15824 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15825 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15826 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15827 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15828 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15829
15830 const s = c_ret_struct_f32_f32_f32();
15831 try expect(s.a == 8);
15832 try expect(s.b == 9);
15833 try expect(s.c == 10);
15834 c_struct_f32_f32_f32(.{ .a = 11, .b = 12, .c = 13 }, 14);
15835 c_test_struct_f32_f32_f32();
15836}
15837
15838const Struct_f32_f32_f32_f32 = extern struct {
15839 a: f32,
15840 b: f32,
15841 c: f32,
15842 d: f32,
15843};
15844
15845export fn zig_ret_struct_f32_f32_f32_f32() Struct_f32_f32_f32_f32 {
15846 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
15847}
15848export fn zig_struct_f32_f32_f32_f32(s: Struct_f32_f32_f32_f32, i: usize) void {
15849 expect(s.a == 5) catch @panic("test failure");
15850 expect(s.b == 6) catch @panic("test failure");
15851 expect(s.c == 7) catch @panic("test failure");
15852 expect(s.d == 8) catch @panic("test failure");
15853 expect(i == 9) catch @panic("test failure");
15854}
15855
15856extern fn c_ret_struct_f32_f32_f32_f32() Struct_f32_f32_f32_f32;
15857extern fn c_struct_f32_f32_f32_f32(Struct_f32_f32_f32_f32, usize) void;
15858extern fn c_test_struct_f32_f32_f32_f32() void;
15859
15860test "struct f32, f32, f32, f32" {
15861 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
15862 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15863 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15864 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15865 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15866 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15867
15868 const s = c_ret_struct_f32_f32_f32_f32();
15869 try expect(s.a == 10);
15870 try expect(s.b == 11);
15871 try expect(s.c == 12);
15872 try expect(s.d == 13);
15873 c_struct_f32_f32_f32_f32(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
15874 c_test_struct_f32_f32_f32_f32();
15875}
15876
15877const Struct_f32_f32_f32_f32_f32 = extern struct {
15878 a: f32,
15879 b: f32,
15880 c: f32,
15881 d: f32,
15882 e: f32,
15883};
15884
15885export fn zig_ret_struct_f32_f32_f32_f32_f32() Struct_f32_f32_f32_f32_f32 {
15886 return .{ .a = 1, .b = 2, .c = 3, .d = 4, .e = 5 };
15887}
15888export fn zig_struct_f32_f32_f32_f32_f32(s: Struct_f32_f32_f32_f32_f32, i: usize) void {
15889 expect(s.a == 6) catch @panic("test failure");
15890 expect(s.b == 7) catch @panic("test failure");
15891 expect(s.c == 8) catch @panic("test failure");
15892 expect(s.d == 9) catch @panic("test failure");
15893 expect(s.e == 10) catch @panic("test failure");
15894 expect(i == 11) catch @panic("test failure");
15895}
15896
15897extern fn c_ret_struct_f32_f32_f32_f32_f32() Struct_f32_f32_f32_f32_f32;
15898extern fn c_struct_f32_f32_f32_f32_f32(Struct_f32_f32_f32_f32_f32, usize) void;
15899extern fn c_test_struct_f32_f32_f32_f32_f32() void;
15900
15901test "struct f32, f32, f32, f32, f32" {
15902 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15903 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15904 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15905 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15906 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15907
15908 const s = c_ret_struct_f32_f32_f32_f32_f32();
15909 try expect(s.a == 12);
15910 try expect(s.b == 13);
15911 try expect(s.c == 14);
15912 try expect(s.d == 15);
15913 try expect(s.e == 16);
15914 c_struct_f32_f32_f32_f32_f32(.{ .a = 17, .b = 18, .c = 19, .d = 20, .e = 21 }, 22);
15915 c_test_struct_f32_f32_f32_f32_f32();
15916}
15917
15918const Struct_f32a8 = extern struct {
15919 a: f32 align(8),
15920};
15921
15922export fn zig_ret_struct_f32a8() Struct_f32a8 {
15923 return .{ .a = 1.25 };
15924}
15925export fn zig_struct_f32a8(s: Struct_f32a8, f: f32) void {
15926 expect(s.a == 2.75) catch @panic("test failure");
15927 expect(f == 3.5) catch @panic("test failure");
15928}
15929
15930extern fn c_ret_struct_f32a8() Struct_f32a8;
15931extern fn c_struct_f32a8(Struct_f32a8, f32) void;
15932extern fn c_test_struct_f32a8() void;
15933
15934test "struct f32 align(8)" {
15935 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
15936 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15937 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15938 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15939 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15940 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15941 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15942 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15943
15944 const s = c_ret_struct_f32a8();
15945 try expect(s.a == 4.125);
15946 c_struct_f32a8(.{ .a = 5.375 }, 6.5);
15947 c_test_struct_f32a8();
15948}
15949
15950const Struct_f32a8_f32a8 = extern struct {
15951 a: f32 align(8),
15952 b: f32 align(8),
15953};
15954
15955export fn zig_ret_struct_f32a8_f32a8() Struct_f32a8_f32a8 {
15956 return .{ .a = 1.25, .b = 2.75 };
15957}
15958export fn zig_struct_f32a8_f32a8(s: Struct_f32a8_f32a8, f: f32) void {
15959 expect(s.a == 3.125) catch @panic("test failure");
15960 expect(s.b == 4.375) catch @panic("test failure");
15961 expect(f == 5.5) catch @panic("test failure");
15962}
15963
15964extern fn c_ret_struct_f32a8_f32a8() Struct_f32a8_f32a8;
15965extern fn c_struct_f32a8_f32a8(Struct_f32a8_f32a8, f32) void;
15966extern fn c_test_struct_f32a8_f32a8() void;
15967
15968test "struct f32 align(8), f32 align(8)" {
15969 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
15970 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
15971 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
15972 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
15973 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15974 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
15975 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
15976 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
15977
15978 const s = c_ret_struct_f32a8_f32a8();
15979 try expect(s.a == 6.625);
15980 try expect(s.b == 7.875);
15981 c_struct_f32a8_f32a8(.{ .a = 8.0625, .b = 9.1875 }, 10.5);
15982 c_test_struct_f32a8_f32a8();
15983}
15984
15985const Struct_f32f32_f32 = extern struct {
15986 a: extern struct { b: f32, c: f32 },
15987 d: f32,
15988};
15989
15990export fn zig_ret_struct_f32f32_f32() Struct_f32f32_f32 {
15991 return .{ .a = .{ .b = 1.0, .c = 2.0 }, .d = 3.0 };
15992}
15993export fn zig_struct_f32f32_f32(s: Struct_f32f32_f32) void {
15994 expect(s.a.b == 1.0) catch @panic("test failure");
15995 expect(s.a.c == 2.0) catch @panic("test failure");
15996 expect(s.d == 3.0) catch @panic("test failure");
15997}
15998
15999extern fn c_ret_struct_f32f32_f32() Struct_f32f32_f32;
16000extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
16001extern fn c_test_struct_f32f32_f32() void;
16002
16003test "struct {f32, f32}, f32" {
16004 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
16005 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16006 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16007 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16008 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16009 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16010
16011 const s = c_ret_struct_f32f32_f32();
16012 try expect(s.a.b == 1.0);
16013 try expect(s.a.c == 2.0);
16014 try expect(s.d == 3.0);
16015 c_struct_f32f32_f32(.{ .a = .{ .b = 1.0, .c = 2.0 }, .d = 3.0 });
16016 c_test_struct_f32f32_f32();
16017}
16018
16019const Struct_f32_f32f32 = extern struct {
16020 a: f32,
16021 b: extern struct { c: f32, d: f32 },
16022};
16023
16024export fn zig_ret_struct_f32_f32f32() Struct_f32_f32f32 {
16025 return .{ .a = 1.0, .b = .{ .c = 2.0, .d = 3.0 } };
16026}
16027export fn zig_struct_f32_f32f32(s: Struct_f32_f32f32) void {
16028 expect(s.a == 1.0) catch @panic("test failure");
16029 expect(s.b.c == 2.0) catch @panic("test failure");
16030 expect(s.b.d == 3.0) catch @panic("test failure");
16031}
16032
16033extern fn c_ret_struct_f32_f32f32() Struct_f32_f32f32;
16034extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
16035extern fn c_test_struct_f32_f32f32() void;
16036
16037test "struct f32, {f32, f32}" {
16038 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
16039 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16040 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16041 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16042 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16043 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16044
16045 const s = c_ret_struct_f32_f32f32();
16046 try expect(s.a == 1.0);
16047 try expect(s.b.c == 2.0);
16048 try expect(s.b.d == 3.0);
16049 c_struct_f32_f32f32(.{ .a = 1.0, .b = .{ .c = 2.0, .d = 3.0 } });
16050 c_test_struct_f32_f32f32();
16051}
16052
16053const Struct_f64 = extern struct {
16054 a: f64,
16055};
16056
16057export fn zig_ret_struct_f64() Struct_f64 {
16058 return .{ .a = 1 };
16059}
16060export fn zig_struct_f64(s: Struct_f64, i: usize) void {
16061 expect(s.a == 2) catch @panic("test failure");
16062 expect(i == 3) catch @panic("test failure");
16063}
16064
16065extern fn c_ret_struct_f64() Struct_f64;
16066extern fn c_struct_f64(Struct_f64, usize) void;
16067extern fn c_test_struct_f64() void;
16068
16069test "struct f64" {
16070 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
16071 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16072 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
16073 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16074 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
16075
16076 const s = c_ret_struct_f64();
16077 try expect(s.a == 4);
16078 c_struct_f64(.{ .a = 5 }, 6);
16079 c_test_struct_f64();
16080}
16081
16082const Struct_f64_f64 = extern struct {
16083 a: f64,
16084 b: f64,
16085};
16086
16087export fn zig_ret_struct_f64_f64() Struct_f64_f64 {
16088 return .{ .a = 1, .b = 2 };
16089}
16090export fn zig_struct_f64_f64(s: Struct_f64_f64, i: usize) void {
16091 expect(s.a == 3) catch @panic("test failure");
16092 expect(s.b == 4) catch @panic("test failure");
16093 expect(i == 5) catch @panic("test failure");
16094}
16095
16096extern fn c_ret_struct_f64_f64() Struct_f64_f64;
16097extern fn c_struct_f64_f64(Struct_f64_f64, usize) void;
16098extern fn c_test_struct_f64_f64() void;
16099
16100test "struct f64, f64" {
16101 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
16102 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16103 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16104 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16105
16106 const s = c_ret_struct_f64_f64();
16107 try expect(s.a == 6);
16108 try expect(s.b == 7);
16109 c_struct_f64_f64(.{ .a = 8, .b = 9 }, 10);
16110 c_test_struct_f64_f64();
16111}
16112
16113const Struct_f64_f64_f64 = extern struct {
16114 a: f64,
16115 b: f64,
16116 c: f64,
16117};
16118
16119export fn zig_ret_struct_f64_f64_f64() Struct_f64_f64_f64 {
16120 return .{ .a = 1, .b = 2, .c = 3 };
16121}
16122export fn zig_struct_f64_f64_f64(s: Struct_f64_f64_f64, i: usize) void {
16123 expect(s.a == 4) catch @panic("test failure");
16124 expect(s.b == 5) catch @panic("test failure");
16125 expect(s.c == 6) catch @panic("test failure");
16126 expect(i == 7) catch @panic("test failure");
16127}
16128
16129extern fn c_ret_struct_f64_f64_f64() Struct_f64_f64_f64;
16130extern fn c_struct_f64_f64_f64(Struct_f64_f64_f64, usize) void;
16131extern fn c_test_struct_f64_f64_f64() void;
16132
16133test "struct f64, f64, f64" {
16134 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16135 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16136 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16137 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16138
16139 const s = c_ret_struct_f64_f64_f64();
16140 try expect(s.a == 8);
16141 try expect(s.b == 9);
16142 try expect(s.c == 10);
16143 c_struct_f64_f64_f64(.{ .a = 11, .b = 12, .c = 13 }, 14);
16144 c_test_struct_f64_f64_f64();
16145}
16146
16147const Struct_f64_f64_f64_f64 = extern struct {
16148 a: f64,
16149 b: f64,
16150 c: f64,
16151 d: f64,
16152};
16153
16154export fn zig_ret_struct_f64_f64_f64_f64() Struct_f64_f64_f64_f64 {
16155 return .{ .a = 1, .b = 2, .c = 3, .d = 4 };
16156}
16157export fn zig_struct_f64_f64_f64_f64(s: Struct_f64_f64_f64_f64, i: usize) void {
16158 expect(s.a == 5) catch @panic("test failure");
16159 expect(s.b == 6) catch @panic("test failure");
16160 expect(s.c == 7) catch @panic("test failure");
16161 expect(s.d == 8) catch @panic("test failure");
16162 expect(i == 9) catch @panic("test failure");
16163}
16164
16165extern fn c_ret_struct_f64_f64_f64_f64() Struct_f64_f64_f64_f64;
16166extern fn c_struct_f64_f64_f64_f64(Struct_f64_f64_f64_f64, usize) void;
16167extern fn c_test_struct_f64_f64_f64_f64() void;
16168
16169test "struct f64, f64, f64, f64" {
16170 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16171 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16172 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16173 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16174
16175 const s = c_ret_struct_f64_f64_f64_f64();
16176 try expect(s.a == 10);
16177 try expect(s.b == 11);
16178 try expect(s.c == 12);
16179 try expect(s.d == 13);
16180 c_struct_f64_f64_f64_f64(.{ .a = 14, .b = 15, .c = 16, .d = 17 }, 18);
16181 c_test_struct_f64_f64_f64_f64();
16182}
16183
16184const Struct_f64_f64_f64_f64_f64 = extern struct {
16185 a: f64,
16186 b: f64,
16187 c: f64,
16188 d: f64,
16189 e: f64,
16190};
16191
16192export fn zig_ret_struct_f64_f64_f64_f64_f64() Struct_f64_f64_f64_f64_f64 {
16193 return .{ .a = 1, .b = 2, .c = 3, .d = 4, .e = 5 };
16194}
16195export fn zig_struct_f64_f64_f64_f64_f64(s: Struct_f64_f64_f64_f64_f64, i: usize) void {
16196 expect(s.a == 6) catch @panic("test failure");
16197 expect(s.b == 7) catch @panic("test failure");
16198 expect(s.c == 8) catch @panic("test failure");
16199 expect(s.d == 9) catch @panic("test failure");
16200 expect(s.e == 10) catch @panic("test failure");
16201 expect(i == 11) catch @panic("test failure");
16202}
16203
16204extern fn c_ret_struct_f64_f64_f64_f64_f64() Struct_f64_f64_f64_f64_f64;
16205extern fn c_struct_f64_f64_f64_f64_f64(Struct_f64_f64_f64_f64_f64, usize) void;
16206extern fn c_test_struct_f64_f64_f64_f64_f64() void;
16207
16208test "struct f64, f64, f64, f64, f64" {
16209 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16210 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16211 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16212 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16213
16214 const s = c_ret_struct_f64_f64_f64_f64_f64();
16215 try expect(s.a == 12);
16216 try expect(s.b == 13);
16217 try expect(s.c == 14);
16218 try expect(s.d == 15);
16219 try expect(s.e == 16);
16220 c_struct_f64_f64_f64_f64_f64(.{ .a = 17, .b = 18, .c = 19, .d = 20, .e = 21 }, 22);
16221 c_test_struct_f64_f64_f64_f64_f64();
16222}
16223
16224const Struct_u32_Union_u32_u32u32 = extern struct {
16225 a: u32,
16226 b: extern union {
16227 c: extern struct {
16228 d: u32,
16229 e: u32,
16230 },
16231 },
16232};
16233
16234export fn zig_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32 {
16235 return .{ .a = 1, .b = .{ .c = .{ .d = 2, .e = 3 } } };
16236}
16237export fn zig_struct_u32_union_u32_u32u32(s: Struct_u32_Union_u32_u32u32) void {
16238 expect(s.a == 1) catch @panic("test failure");
16239 expect(s.b.c.d == 2) catch @panic("test failure");
16240 expect(s.b.c.e == 3) catch @panic("test failure");
16241}
16242
16243extern fn c_ret_struct_u32_union_u32_u32u32() Struct_u32_Union_u32_u32u32;
16244extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
16245extern fn c_test_struct_u32_union_u32_u32u32() void;
16246
16247test "struct{u32,union{u32,struct{u32,u32}}}" {
16248 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16249 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
16250 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16251 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16252 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16253
16254 const s = c_ret_struct_u32_union_u32_u32u32();
16255 try expect(s.a == 1);
16256 try expect(s.b.c.d == 2);
16257 try expect(s.b.c.e == 3);
16258 c_struct_u32_union_u32_u32u32(.{ .a = 1, .b = .{ .c = .{ .d = 2, .e = 3 } } });
16259 c_test_struct_u32_union_u32_u32u32();
16260}
16261
16262const Struct_i32_i32 = extern struct {
16263 a: i32,
16264 b: i32,
16265};
16266extern fn c_mut_struct_i32_i32(Struct_i32_i32) Struct_i32_i32;
16267extern fn c_struct_i32_i32(Struct_i32_i32) void;
16268
16269test "struct i32 i32" {
16270 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16271 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16272 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
16273 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16274 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16275 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
16276
16277 const s: Struct_i32_i32 = .{
16278 .a = 1,
16279 .b = 2,
16280 };
16281 const mut_res = c_mut_struct_i32_i32(s);
16282 try expect(s.a == 1);
16283 try expect(s.b == 2);
16284 try expect(mut_res.a == 101);
16285 try expect(mut_res.b == 252);
16286 c_struct_i32_i32(s);
16287}
16288
16289export fn zig_struct_i32_i32(s: Struct_i32_i32) void {
16290 expect(s.a == 1) catch @panic("test failure: zig_struct_i32_i32 1");
16291 expect(s.b == 2) catch @panic("test failure: zig_struct_i32_i32 2");
16292}
16293
16294const BigStruct = extern struct {
16295 a: u64,
16296 b: u64,
16297 c: u64,
16298 d: u64,
16299 e: u8,
16300};
16301extern fn c_big_struct(BigStruct) void;
16302
16303test "big struct" {
16304 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16305 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16306 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16307 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16308 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16309
16310 const s = BigStruct{
16311 .a = 1,
16312 .b = 2,
16313 .c = 3,
16314 .d = 4,
16315 .e = 5,
16316 };
16317 c_big_struct(s);
16318}
16319
16320export fn zig_big_struct(x: BigStruct) void {
16321 expect(x.a == 1) catch @panic("test failure: zig_big_struct 1");
16322 expect(x.b == 2) catch @panic("test failure: zig_big_struct 2");
16323 expect(x.c == 3) catch @panic("test failure: zig_big_struct 3");
16324 expect(x.d == 4) catch @panic("test failure: zig_big_struct 4");
16325 expect(x.e == 5) catch @panic("test failure: zig_big_struct 5");
16326}
16327
16328const BigUnion = extern union {
16329 a: BigStruct,
16330};
16331extern fn c_big_union(BigUnion) void;
16332
16333test "big union" {
16334 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16335 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16336 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16337 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16338
16339 const x = BigUnion{
16340 .a = BigStruct{
16341 .a = 1,
16342 .b = 2,
16343 .c = 3,
16344 .d = 4,
16345 .e = 5,
16346 },
16347 };
16348 c_big_union(x);
16349}
16350
16351export fn zig_big_union(x: BigUnion) void {
16352 expect(x.a.a == 1) catch @panic("test failure: zig_big_union a");
16353 expect(x.a.b == 2) catch @panic("test failure: zig_big_union b");
16354 expect(x.a.c == 3) catch @panic("test failure: zig_big_union c");
16355 expect(x.a.d == 4) catch @panic("test failure: zig_big_union d");
16356 expect(x.a.e == 5) catch @panic("test failure: zig_big_union e");
16357}
16358
16359const MedStructMixed = extern struct {
16360 a: u32,
16361 b: f32,
16362 c: f32,
16363 d: u32 = 0,
16364};
16365extern fn c_med_struct_mixed(MedStructMixed) void;
16366extern fn c_ret_med_struct_mixed() MedStructMixed;
16367
16368test "medium struct of ints and floats" {
16369 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16370 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16371 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16372 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16373 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16374
16375 const s = MedStructMixed{
16376 .a = 1234,
16377 .b = 100.0,
16378 .c = 1337.0,
16379 };
16380 c_med_struct_mixed(s);
16381 const s2 = c_ret_med_struct_mixed();
16382 try expect(s2.a == 1234);
16383 try expect(s2.b == 100.0);
16384 try expect(s2.c == 1337.0);
16385}
16386
16387export fn zig_med_struct_mixed(x: MedStructMixed) void {
16388 expect(x.a == 1234) catch @panic("test failure");
16389 expect(x.b == 100.0) catch @panic("test failure");
16390 expect(x.c == 1337.0) catch @panic("test failure");
16391}
16392
16393const SmallPackedStruct = packed struct(u8) {
16394 a: u2,
16395 b: u2,
16396 c: u2,
16397 d: u2,
16398};
16399extern fn c_small_packed_struct(SmallPackedStruct) void;
16400extern fn c_ret_small_packed_struct() SmallPackedStruct;
16401
16402export fn zig_small_packed_struct(x: SmallPackedStruct) void {
16403 expect(x.a == 0) catch @panic("test failure");
16404 expect(x.b == 1) catch @panic("test failure");
16405 expect(x.c == 2) catch @panic("test failure");
16406 expect(x.d == 3) catch @panic("test failure");
16407}
16408
16409test "small packed struct" {
16410 const s = SmallPackedStruct{ .a = 0, .b = 1, .c = 2, .d = 3 };
16411 c_small_packed_struct(s);
16412 const s2 = c_ret_small_packed_struct();
16413 try expect(s2.a == 0);
16414 try expect(s2.b == 1);
16415 try expect(s2.c == 2);
16416 try expect(s2.d == 3);
16417}
16418
16419const BigPackedStruct = packed struct(u128) {
16420 a: u64,
16421 b: u64,
16422};
16423extern fn c_big_packed_struct(BigPackedStruct) void;
16424extern fn c_ret_big_packed_struct() BigPackedStruct;
16425
16426export fn zig_big_packed_struct(x: BigPackedStruct) void {
16427 expect(x.a == 1) catch @panic("test failure");
16428 expect(x.b == 2) catch @panic("test failure");
16429}
16430
16431test "big packed struct" {
16432 if (!have_i128) return error.SkipZigTest;
16433
16434 const s = BigPackedStruct{ .a = 1, .b = 2 };
16435 c_big_packed_struct(s);
16436 const s2 = c_ret_big_packed_struct();
16437 try expect(s2.a == 1);
16438 try expect(s2.b == 2);
16439}
16440
16441const SplitStructInt = extern struct {
16442 a: u64,
16443 b: u8,
16444 c: u32,
16445};
16446extern fn c_split_struct_ints(SplitStructInt) void;
16447
16448test "split struct of ints" {
16449 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
16450 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16451 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16452 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16453 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16454 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16455
16456 const s = SplitStructInt{
16457 .a = 1234,
16458 .b = 100,
16459 .c = 1337,
16460 };
16461 c_split_struct_ints(s);
16462}
16463
16464export fn zig_split_struct_ints(x: SplitStructInt) void {
16465 expect(x.a == 1234) catch @panic("test failure");
16466 expect(x.b == 100) catch @panic("test failure");
16467 expect(x.c == 1337) catch @panic("test failure");
16468}
16469
16470const SplitStructMixed = extern struct {
16471 a: u64,
16472 b: u8,
16473 c: f32,
16474};
16475extern fn c_split_struct_mixed(SplitStructMixed) void;
16476extern fn c_ret_split_struct_mixed() SplitStructMixed;
16477
16478test "split struct of ints and floats" {
16479 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
16480 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16481 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16482 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16483 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16484 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16485
16486 const s = SplitStructMixed{
16487 .a = 1234,
16488 .b = 100,
16489 .c = 1337.0,
16490 };
16491 c_split_struct_mixed(s);
16492 const s2 = c_ret_split_struct_mixed();
16493 try expect(s2.a == 1234);
16494 try expect(s2.b == 100);
16495 try expect(s2.c == 1337.0);
16496}
16497
16498export fn zig_split_struct_mixed(x: SplitStructMixed) void {
16499 expect(x.a == 1234) catch @panic("test failure");
16500 expect(x.b == 100) catch @panic("test failure");
16501 expect(x.c == 1337.0) catch @panic("test failure");
16502}
16503
16504extern fn c_big_struct_both(BigStruct) BigStruct;
16505
16506test "sret and byval together" {
16507 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16508 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16509 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16510 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16511 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16512
16513 const s = BigStruct{
16514 .a = 1,
16515 .b = 2,
16516 .c = 3,
16517 .d = 4,
16518 .e = 5,
16519 };
16520 const y = c_big_struct_both(s);
16521 try expect(y.a == 10);
16522 try expect(y.b == 11);
16523 try expect(y.c == 12);
16524 try expect(y.d == 13);
16525 try expect(y.e == 14);
16526}
16527
16528export fn zig_big_struct_both(x: BigStruct) BigStruct {
16529 expect(x.a == 30) catch @panic("test failure");
16530 expect(x.b == 31) catch @panic("test failure");
16531 expect(x.c == 32) catch @panic("test failure");
16532 expect(x.d == 33) catch @panic("test failure");
16533 expect(x.e == 34) catch @panic("test failure");
16534 const s = BigStruct{
16535 .a = 20,
16536 .b = 21,
16537 .c = 22,
16538 .d = 23,
16539 .e = 24,
16540 };
16541 return s;
16542}
16543
16544export fn zig_ret_bool() bool {
16545 return true;
16546}
16547export fn zig_ret_u8() u8 {
16548 return 0xff;
16549}
16550export fn zig_ret_u16() u16 {
16551 return 0xffff;
16552}
16553export fn zig_ret_u32() u32 {
16554 return 0xffffffff;
16555}
16556export fn zig_ret_u64() u64 {
16557 return 0xffffffffffffffff;
16558}
16559export fn zig_ret_i8() i8 {
16560 return -1;
16561}
16562export fn zig_ret_i16() i16 {
16563 return -1;
16564}
16565export fn zig_ret_i32() i32 {
16566 return -1;
16567}
16568export fn zig_ret_i64() i64 {
16569 return -1;
16570}
16571
16572export fn zig_ret_med_struct_mixed() MedStructMixed {
16573 return .{
16574 .a = 1234,
16575 .b = 100.0,
16576 .c = 1337.0,
16577 };
16578}
16579
16580export fn zig_ret_split_struct_mixed() SplitStructMixed {
16581 return .{
16582 .a = 1234,
16583 .b = 100,
16584 .c = 1337.0,
16585 };
16586}
16587
16588extern fn c_ret_bool() bool;
16589extern fn c_ret_u8() u8;
16590extern fn c_ret_u16() u16;
16591extern fn c_ret_u32() u32;
16592extern fn c_ret_u64() u64;
16593extern fn c_ret_i8() i8;
16594extern fn c_ret_i16() i16;
16595extern fn c_ret_i32() i32;
16596extern fn c_ret_i64() i64;
16597
16598test "integer return types" {
16599 try expect(c_ret_bool() == true);
16600
16601 try expect(c_ret_u8() == 0xff);
16602 try expect(c_ret_u16() == 0xffff);
16603 try expect(c_ret_u32() == 0xffffffff);
16604 try expect(c_ret_u64() == 0xffffffffffffffff);
16605
16606 try expect(c_ret_i8() == -1);
16607 try expect(c_ret_i16() == -1);
16608 try expect(c_ret_i32() == -1);
16609 try expect(c_ret_i64() == -1);
16610}
16611
16612const StructWithArray = extern struct {
16613 a: i32,
16614 padding: [4]u8,
16615 b: i64,
16616};
16617extern fn c_struct_with_array(StructWithArray) void;
16618extern fn c_ret_struct_with_array() StructWithArray;
16619
16620test "Struct with array as padding." {
16621 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
16622 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
16623 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16624 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16625 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16626 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
16627
16628 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
16629
16630 const x = c_ret_struct_with_array();
16631 try expect(x.a == 4);
16632 try expect(x.b == 155);
16633}
16634
16635const FloatArrayStruct = extern struct {
16636 origin: extern struct {
16637 x: f64,
16638 y: f64,
16639 },
16640 size: extern struct {
16641 width: f64,
16642 height: f64,
16643 },
16644};
568116645
5682extern fn c_ptr_size_float_struct(Vector2) void;
5683extern fn c_ret_ptr_size_float_struct() Vector2;
16646extern fn c_float_array_struct(FloatArrayStruct) void;
16647extern fn c_ret_float_array_struct() FloatArrayStruct;
568416648
5685test "C ABI pointer sized float struct" {
16649test "Float array like struct" {
568616650 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
568716651 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
5688 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
5689 if (builtin.cpu.arch.isLoongArch() and builtin.abi.float() == .soft) return error.SkipZigTest;
16652 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16653 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
569016654 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
5691 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
569216655
5693 c_ptr_size_float_struct(.{ .x = 1, .y = 2 });
16656 c_float_array_struct(.{
16657 .origin = .{
16658 .x = 5,
16659 .y = 6,
16660 },
16661 .size = .{
16662 .width = 7,
16663 .height = 8,
16664 },
16665 });
569416666
5695 const x = c_ret_ptr_size_float_struct();
5696 try expect(x.x == 3);
5697 try expect(x.y == 4);
16667 const x = c_ret_float_array_struct();
16668 try expect(x.origin.x == 1);
16669 try expect(x.origin.y == 2);
16670 try expect(x.size.width == 3);
16671 try expect(x.size.height == 4);
569816672}
569916673
570016674//=== Helpers for struct test ===//
......@@ -6161,9 +17135,7 @@ test "byval tail callsite attribute" {
616117135}
616217136
616317137test "x86 fastcall calling convention" {
6164 if (builtin.cpu.arch != .x86) return error.SkipZigTest;
6165 if (builtin.os.tag != .windows) return error.SkipZigTest;
6166 if (builtin.abi != .msvc) return error.SkipZigTest;
17138 if (builtin.cpu.arch != .x86 or builtin.os.tag != .windows or builtin.abi != .msvc) return error.SkipZigTest;
616717139
616817140 const static = struct {
616917141 const fastcall: std.builtin.CallingConvention = .{ .x86_fastcall = .{} };
......@@ -6273,9 +17245,7 @@ test "x86 fastcall calling convention" {
627317245}
627417246
627517247test "x86 vectorcall calling convention" {
6276 if (builtin.cpu.arch != .x86) return error.SkipZigTest;
6277 if (builtin.os.tag != .windows) return error.SkipZigTest;
6278 if (builtin.abi != .msvc) return error.SkipZigTest;
17248 if (builtin.cpu.arch != .x86 or builtin.os.tag != .windows or builtin.abi != .msvc) return error.SkipZigTest;
627917249
628017250 const static = struct {
628117251 extern fn c_vectorcall_check(a: c_int, b: f32, c: f64, d: *anyopaque, e: f32, f: f64, g: f64, h: f32, i: f32, j: c_int) callconv(.{ .x86_vectorcall = .{} }) void;
......@@ -6294,3 +17264,34 @@ test "x86 vectorcall calling convention" {
629417264 };
629517265 static.c_vectorcall_check(1, 2.0, 3.0, @ptrFromInt(4), 5.0, 6.0, 7.0, 8.0, 9.0, 10);
629617266}
17267
17268extern fn c_win64_varargs_u64_f64_u64_f64(...) void;
17269extern fn c_win64_varargs_f64_u64_f64_u64(...) void;
17270
17271test "win64 varargs" {
17272 if (builtin.cpu.arch != .x86_64 or builtin.os.tag != .windows) return error.SkipZigTest;
17273
17274 const Opv = extern struct {};
17275 c_win64_varargs_u64_f64_u64_f64(
17276 @as(Opv, .{}),
17277 @as(f32, 1),
17278 @as(Opv, .{}),
17279 @as(f32, 2.0),
17280 @as(Opv, .{}),
17281 @as(f64, 3),
17282 @as(Opv, .{}),
17283 @as(f64, 4.0),
17284 @as(Opv, .{}),
17285 );
17286 c_win64_varargs_f64_u64_f64_u64(
17287 @as(Opv, .{}),
17288 @as(f32, 5),
17289 @as(Opv, .{}),
17290 @as(f32, 6.0),
17291 @as(Opv, .{}),
17292 @as(f64, 7),
17293 @as(Opv, .{}),
17294 @as(f64, 8.0),
17295 @as(Opv, .{}),
17296 );
17297}
test/tests.zig+31
......@@ -2018,12 +2018,43 @@ const c_abi_targets = blk: {
20182018 .abi = .gnu,
20192019 },
20202020 },
2021
2022 //.{
2023 // .target = .{
2024 // .cpu_arch = .x86_64,
2025 // .os_tag = .windows,
2026 // .abi = .gnu,
2027 // },
2028 // .use_llvm = false,
2029 // .c_defines = &.{"ZIG_BACKEND_STAGE2_X86_64"},
2030 //},
2031 //.{
2032 // .target = .{
2033 // .cpu_arch = .x86_64,
2034 // .cpu_model = .{ .explicit = &std.Target.x86.cpu.x86_64_v2 },
2035 // .os_tag = .windows,
2036 // .abi = .gnu,
2037 // },
2038 // .use_llvm = false,
2039 // .c_defines = &.{"ZIG_BACKEND_STAGE2_X86_64"},
2040 //},
2041 //.{
2042 // .target = .{
2043 // .cpu_arch = .x86_64,
2044 // .cpu_model = .{ .explicit = &std.Target.x86.cpu.x86_64_v3 },
2045 // .os_tag = .windows,
2046 // .abi = .gnu,
2047 // },
2048 // .use_llvm = false,
2049 // .c_defines = &.{"ZIG_BACKEND_STAGE2_X86_64"},
2050 //},
20212051 .{
20222052 .target = .{
20232053 .cpu_arch = .x86_64,
20242054 .os_tag = .windows,
20252055 .abi = .gnu,
20262056 },
2057 .use_llvm = true,
20272058 },
20282059 };
20292060};