Commit bdca0f93c4b9527acba9a956e767be63b073280e | zig

author	taylor.fish <contact@taylor.fish> 2025-09-13 17:17:18-07:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2025-09-24 02:54:55+02:00
log	bdca0f93c4b9527acba9a956e767be63b073280e
tree	59391aeb67ace39209bf8e4f49dbbf469e666978
parent	ba137783ed4152ebe8d7b98dca855c551fc924a7

Fix PowerPC syscalls causing invalid code from CBE

Fixes #25209.

On PowerPC, some registers are both inputs to syscalls and clobbered by
them. An example is r0, which initially contains the syscall number, but
may be overwritten during execution of the syscall.

musl and glibc use a `+` (read-write) constraint to indicate this, which
isn't supported in Zig. The current implementation of PowerPC syscalls
in the Zig standard library instead lists these registers as both inputs
and clobbers, but this results in the C backend generating code that is
invalid for at least some C compilers, like GCC, which doesn't support
the specifying the same register as both an input and a clobber.

This PR changes the PowerPC syscall functions to list such registers as
inputs and outputs rather than inputs and clobbers. Thanks to jacobly0
who pointed out that it's possible to have multiple outputs; I had
gotten the wrong idea from the documentation.

2 files changed, 122 insertions(+), 14 deletions(-)

lib
- std
  - os
    linux
    powerpc.zig
    powerpc64.zig

lib/std/os/linux/powerpc.zig+61-7

...	...	@@ -15,84 +15,125 @@ const sockaddr = linux.sockaddr;
15	15	const timespec = linux.timespec;
16	16
17	17	pub fn syscall0(number: SYS) usize {
	18	// r0 is both an input register and a clobber. musl and glibc achieve this with
	19	// a "+" constraint, which isn't supported in Zig, so instead we separately list
	20	// r0 as both an input and an output. (Listing it as an input and a clobber would
	21	// cause the C backend to emit invalid code; see #25209.)
	22	var r0_out: usize = undefined;
18	23	return asm volatile (
19	24	\\ sc
20	25	\\ bns+ 1f
21	26	\\ neg 3, 3
22	27	\\ 1:
23	28	: [ret] "={r3}" (-> usize),
	29	[r0_out] "={r0}" (r0_out),
24	30	: [number] "{r0}" (@intFromEnum(number)),
25		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	31	: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
26	32	}
27	33
28	34	pub fn syscall1(number: SYS, arg1: usize) usize {
	35	// r0 is both an input and a clobber.
	36	var r0_out: usize = undefined;
29	37	return asm volatile (
30	38	\\ sc
31	39	\\ bns+ 1f
32	40	\\ neg 3, 3
33	41	\\ 1:
34	42	: [ret] "={r3}" (-> usize),
	43	[r0_out] "={r0}" (r0_out),
35	44	: [number] "{r0}" (@intFromEnum(number)),
36	45	[arg1] "{r3}" (arg1),
37		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	46	: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
38	47	}
39	48
40	49	pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
	50	// These registers are both inputs and clobbers.
	51	var r0_out: usize = undefined;
	52	var r4_out: usize = undefined;
41	53	return asm volatile (
42	54	\\ sc
43	55	\\ bns+ 1f
44	56	\\ neg 3, 3
45	57	\\ 1:
46	58	: [ret] "={r3}" (-> usize),
	59	[r0_out] "={r0}" (r0_out),
	60	[r4_out] "={r4}" (r4_out),
47	61	: [number] "{r0}" (@intFromEnum(number)),
48	62	[arg1] "{r3}" (arg1),
49	63	[arg2] "{r4}" (arg2),
50		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	64	: .{ .memory = true, .cr0 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
51	65	}
52	66
53	67	pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
	68	// These registers are both inputs and clobbers.
	69	var r0_out: usize = undefined;
	70	var r4_out: usize = undefined;
	71	var r5_out: usize = undefined;
54	72	return asm volatile (
55	73	\\ sc
56	74	\\ bns+ 1f
57	75	\\ neg 3, 3
58	76	\\ 1:
59	77	: [ret] "={r3}" (-> usize),
	78	[r0_out] "={r0}" (r0_out),
	79	[r4_out] "={r4}" (r4_out),
	80	[r5_out] "={r5}" (r5_out),
60	81	: [number] "{r0}" (@intFromEnum(number)),
61	82	[arg1] "{r3}" (arg1),
62	83	[arg2] "{r4}" (arg2),
63	84	[arg3] "{r5}" (arg3),
64		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	85	: .{ .memory = true, .cr0 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
65	86	}
66	87
67	88	pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
	89	// These registers are both inputs and clobbers.
	90	var r0_out: usize = undefined;
	91	var r4_out: usize = undefined;
	92	var r5_out: usize = undefined;
	93	var r6_out: usize = undefined;
68	94	return asm volatile (
69	95	\\ sc
70	96	\\ bns+ 1f
71	97	\\ neg 3, 3
72	98	\\ 1:
73	99	: [ret] "={r3}" (-> usize),
	100	[r0_out] "={r0}" (r0_out),
	101	[r4_out] "={r4}" (r4_out),
	102	[r5_out] "={r5}" (r5_out),
	103	[r6_out] "={r6}" (r6_out),
74	104	: [number] "{r0}" (@intFromEnum(number)),
75	105	[arg1] "{r3}" (arg1),
76	106	[arg2] "{r4}" (arg2),
77	107	[arg3] "{r5}" (arg3),
78	108	[arg4] "{r6}" (arg4),
79		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	109	: .{ .memory = true, .cr0 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
80	110	}
81	111
82	112	pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
	113	// These registers are both inputs and clobbers.
	114	var r0_out: usize = undefined;
	115	var r4_out: usize = undefined;
	116	var r5_out: usize = undefined;
	117	var r6_out: usize = undefined;
	118	var r7_out: usize = undefined;
83	119	return asm volatile (
84	120	\\ sc
85	121	\\ bns+ 1f
86	122	\\ neg 3, 3
87	123	\\ 1:
88	124	: [ret] "={r3}" (-> usize),
	125	[r0_out] "={r0}" (r0_out),
	126	[r4_out] "={r4}" (r4_out),
	127	[r5_out] "={r5}" (r5_out),
	128	[r6_out] "={r6}" (r6_out),
	129	[r7_out] "={r7}" (r7_out),
89	130	: [number] "{r0}" (@intFromEnum(number)),
90	131	[arg1] "{r3}" (arg1),
91	132	[arg2] "{r4}" (arg2),
92	133	[arg3] "{r5}" (arg3),
93	134	[arg4] "{r6}" (arg4),
94	135	[arg5] "{r7}" (arg5),
95		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	136	: .{ .memory = true, .cr0 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
96	137	}
97	138
98	139	pub fn syscall6(
...	...	@@ -104,12 +145,25 @@ pub fn syscall6(
104	145	arg5: usize,
105	146	arg6: usize,
106	147	) usize {
	148	// These registers are both inputs and clobbers.
	149	var r0_out: usize = undefined;
	150	var r4_out: usize = undefined;
	151	var r5_out: usize = undefined;
	152	var r6_out: usize = undefined;
	153	var r7_out: usize = undefined;
	154	var r8_out: usize = undefined;
107	155	return asm volatile (
108	156	\\ sc
109	157	\\ bns+ 1f
110	158	\\ neg 3, 3
111	159	\\ 1:
112	160	: [ret] "={r3}" (-> usize),
	161	[r0_out] "={r0}" (r0_out),
	162	[r4_out] "={r4}" (r4_out),
	163	[r5_out] "={r5}" (r5_out),
	164	[r6_out] "={r6}" (r6_out),
	165	[r7_out] "={r7}" (r7_out),
	166	[r8_out] "={r8}" (r8_out),
113	167	: [number] "{r0}" (@intFromEnum(number)),
114	168	[arg1] "{r3}" (arg1),
115	169	[arg2] "{r4}" (arg2),
...	...	@@ -117,7 +171,7 @@ pub fn syscall6(
117	171	[arg4] "{r6}" (arg4),
118	172	[arg5] "{r7}" (arg5),
119	173	[arg6] "{r8}" (arg6),
120		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	174	: .{ .memory = true, .cr0 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
121	175	}
122	176
123	177	pub fn clone() callconv(.naked) usize {

lib/std/os/linux/powerpc64.zig+61-7

...	...	@@ -15,84 +15,125 @@ const sockaddr = linux.sockaddr;
15	15	const timespec = linux.timespec;
16	16
17	17	pub fn syscall0(number: SYS) usize {
	18	// r0 is both an input register and a clobber. musl and glibc achieve this with
	19	// a "+" constraint, which isn't supported in Zig, so instead we separately list
	20	// r0 as both an input and an output. (Listing it as an input and a clobber would
	21	// cause the C backend to emit invalid code; see #25209.)
	22	var r0_out: usize = undefined;
18	23	return asm volatile (
19	24	\\ sc
20	25	\\ bns+ 1f
21	26	\\ neg 3, 3
22	27	\\ 1:
23	28	: [ret] "={r3}" (-> usize),
	29	[r0_out] "={r0}" (r0_out),
24	30	: [number] "{r0}" (@intFromEnum(number)),
25		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	31	: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
26	32	}
27	33
28	34	pub fn syscall1(number: SYS, arg1: usize) usize {
	35	// r0 is both an input and a clobber.
	36	var r0_out: usize = undefined;
29	37	return asm volatile (
30	38	\\ sc
31	39	\\ bns+ 1f
32	40	\\ neg 3, 3
33	41	\\ 1:
34	42	: [ret] "={r3}" (-> usize),
	43	[r0_out] "={r0}" (r0_out),
35	44	: [number] "{r0}" (@intFromEnum(number)),
36	45	[arg1] "{r3}" (arg1),
37		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	46	: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
38	47	}
39	48
40	49	pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
	50	// These registers are both inputs and clobbers.
	51	var r0_out: usize = undefined;
	52	var r4_out: usize = undefined;
41	53	return asm volatile (
42	54	\\ sc
43	55	\\ bns+ 1f
44	56	\\ neg 3, 3
45	57	\\ 1:
46	58	: [ret] "={r3}" (-> usize),
	59	[r0_out] "={r0}" (r0_out),
	60	[r4_out] "={r4}" (r4_out),
47	61	: [number] "{r0}" (@intFromEnum(number)),
48	62	[arg1] "{r3}" (arg1),
49	63	[arg2] "{r4}" (arg2),
50		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	64	: .{ .memory = true, .cr0 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
51	65	}
52	66
53	67	pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
	68	// These registers are both inputs and clobbers.
	69	var r0_out: usize = undefined;
	70	var r4_out: usize = undefined;
	71	var r5_out: usize = undefined;
54	72	return asm volatile (
55	73	\\ sc
56	74	\\ bns+ 1f
57	75	\\ neg 3, 3
58	76	\\ 1:
59	77	: [ret] "={r3}" (-> usize),
	78	[r0_out] "={r0}" (r0_out),
	79	[r4_out] "={r4}" (r4_out),
	80	[r5_out] "={r5}" (r5_out),
60	81	: [number] "{r0}" (@intFromEnum(number)),
61	82	[arg1] "{r3}" (arg1),
62	83	[arg2] "{r4}" (arg2),
63	84	[arg3] "{r5}" (arg3),
64		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	85	: .{ .memory = true, .cr0 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
65	86	}
66	87
67	88	pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
	89	// These registers are both inputs and clobbers.
	90	var r0_out: usize = undefined;
	91	var r4_out: usize = undefined;
	92	var r5_out: usize = undefined;
	93	var r6_out: usize = undefined;
68	94	return asm volatile (
69	95	\\ sc
70	96	\\ bns+ 1f
71	97	\\ neg 3, 3
72	98	\\ 1:
73	99	: [ret] "={r3}" (-> usize),
	100	[r0_out] "={r0}" (r0_out),
	101	[r4_out] "={r4}" (r4_out),
	102	[r5_out] "={r5}" (r5_out),
	103	[r6_out] "={r6}" (r6_out),
74	104	: [number] "{r0}" (@intFromEnum(number)),
75	105	[arg1] "{r3}" (arg1),
76	106	[arg2] "{r4}" (arg2),
77	107	[arg3] "{r5}" (arg3),
78	108	[arg4] "{r6}" (arg4),
79		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	109	: .{ .memory = true, .cr0 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
80	110	}
81	111
82	112	pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
	113	// These registers are both inputs and clobbers.
	114	var r0_out: usize = undefined;
	115	var r4_out: usize = undefined;
	116	var r5_out: usize = undefined;
	117	var r6_out: usize = undefined;
	118	var r7_out: usize = undefined;
83	119	return asm volatile (
84	120	\\ sc
85	121	\\ bns+ 1f
86	122	\\ neg 3, 3
87	123	\\ 1:
88	124	: [ret] "={r3}" (-> usize),
	125	[r0_out] "={r0}" (r0_out),
	126	[r4_out] "={r4}" (r4_out),
	127	[r5_out] "={r5}" (r5_out),
	128	[r6_out] "={r6}" (r6_out),
	129	[r7_out] "={r7}" (r7_out),
89	130	: [number] "{r0}" (@intFromEnum(number)),
90	131	[arg1] "{r3}" (arg1),
91	132	[arg2] "{r4}" (arg2),
92	133	[arg3] "{r5}" (arg3),
93	134	[arg4] "{r6}" (arg4),
94	135	[arg5] "{r7}" (arg5),
95		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	136	: .{ .memory = true, .cr0 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
96	137	}
97	138
98	139	pub fn syscall6(
...	...	@@ -104,12 +145,25 @@ pub fn syscall6(
104	145	arg5: usize,
105	146	arg6: usize,
106	147	) usize {
	148	// These registers are both inputs and clobbers.
	149	var r0_out: usize = undefined;
	150	var r4_out: usize = undefined;
	151	var r5_out: usize = undefined;
	152	var r6_out: usize = undefined;
	153	var r7_out: usize = undefined;
	154	var r8_out: usize = undefined;
107	155	return asm volatile (
108	156	\\ sc
109	157	\\ bns+ 1f
110	158	\\ neg 3, 3
111	159	\\ 1:
112	160	: [ret] "={r3}" (-> usize),
	161	[r0_out] "={r0}" (r0_out),
	162	[r4_out] "={r4}" (r4_out),
	163	[r5_out] "={r5}" (r5_out),
	164	[r6_out] "={r6}" (r6_out),
	165	[r7_out] "={r7}" (r7_out),
	166	[r8_out] "={r8}" (r8_out),
113	167	: [number] "{r0}" (@intFromEnum(number)),
114	168	[arg1] "{r3}" (arg1),
115	169	[arg2] "{r4}" (arg2),
...	...	@@ -117,7 +171,7 @@ pub fn syscall6(
117	171	[arg4] "{r6}" (arg4),
118	172	[arg5] "{r7}" (arg5),
119	173	[arg6] "{r8}" (arg6),
120		: .{ .memory = true, .cr0 = true, .r0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
	174	: .{ .memory = true, .cr0 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
121	175	}
122	176
123	177	pub fn clone() callconv(.naked) usize {