| author |  Robin Voetter <robin@voetter.nl> 2019-08-30 12:58:44+02:00 |
| committer | Robin Voetter <robin@voetter.nl> 2019-08-30 12:58:44+02:00 |
| log | c1f8b201a1419e1f86c116c67de2f5a8c58b9a84 |
| tree | f8db60e14e0a781781c8659186625bda27248247 |
| parent | 2323da3a680f48207d35db26f63ea0553e74d956 |
Improve comments near un-implemented functionality
2 files changed, 5 insertions(+), 4 deletions(-)
std- os
- linux
std/os/linux/arm-eabi.zig+2-1
| ... | ... | @@ -80,7 +80,8 @@ pub fn syscall6( |
| 80 | 80 | pub extern fn clone(func: extern fn (arg: usize) u8, stack: usize, flags: u32, arg: usize, ptid: *i32, tls: usize, ctid: *i32) usize; |
| 81 | 81 | |
| 82 | 82 | // LLVM calls this when the read-tp-hard feature is set to false. Currently, there is no way to pass |
| 83 | // that to llvm via zig. See https://github.com/ziglang/zig/issues/2883 | |
| 83 | // that to llvm via zig, see https://github.com/ziglang/zig/issues/2883. | |
| 84 | // LLVM expects libc to provide this function as __aeabi_read_tp, so it is exported if needed from special/c.zig. | |
| 84 | 85 | pub nakedcc fn getThreadPointer() usize { |
| 85 | 86 | return asm volatile("mrc p15, 0, %[ret], c13, c0, 3" |
| 86 | 87 | : [ret] "=r" (-> usize) |
std/os/linux/tls.zig+3-3
| ... | ... | @@ -150,9 +150,9 @@ pub fn initTLS() void { |
| 150 | 150 | if (builtin.arch == builtin.Arch.arm and builtin.os == .linux) { |
| 151 | 151 | if (at_hwcap & std.os.linux.HWCAP_TLS == 0) { |
| 152 | 152 | // If the CPU does not support TLS via a coprocessor register, |
| 153 | // it could be accessed via a kernel helper function | |
| 154 | // see musl/src/thread/arm/ for details | |
| 155 | @panic("cpu does not support TLS via coprocessor register"); | |
| 153 | // a kernel helper function can be used instead on certain linux kernels. | |
| 154 | // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c. | |
| 155 | @panic("TODO: Implement ARM fallback TLS functionality"); | |
| 156 | 156 | } |
| 157 | 157 | } |
| 158 | 158 |