Commit c5af4c75da81616eadce8cf866aac86fb9e4ba9d | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2026-07-06 12:32:14+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2026-07-06 12:32:14+02:00
log	c5af4c75da81616eadce8cf866aac86fb9e4ba9d
tree	222c7084e002e449b36412da3f28f8c1f1077da6
parent	c0f9b51d846e71f46f37ffa010152c7776d77991
parent	f0fdc9098919ff65daea48b5b54154406b88d107

Merge pull request '`std.debug.SelfInfo.Elf`: enable DWARF unwinding for ARM' (#36035) from alexrp/zig:arm-dwarf-unwind into master

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/36035
Reviewed-by: mlugg <mlugg@noreply.codeberg.org>

11 files changed, 35 insertions(+), 47 deletions(-)

lib
- libc
  - musl
    arch
    powerpc
    syscall_arch.h
    powerpc64
    syscall_arch.h
- std
  - debug
    SelfInfo
    Elf.zig
src
- Compilation.zig
- libs
test
- src
  - StackTrace.zig

lib/libc/musl/arch/powerpc/syscall_arch.h+7-7

...	...	@@ -9,7 +9,7 @@ static inline long __syscall0(long n)
9	9	register long r3 __asm__("r3");
10	10	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
11	11	: "+r"(r0), "=r"(r3)
12		:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	12	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
13	13	return r3;
14	14	}
15	15
...	...	@@ -19,7 +19,7 @@ static inline long __syscall1(long n, long a)
19	19	register long r3 __asm__("r3") = a;
20	20	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
21	21	: "+r"(r0), "+r"(r3)
22		:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	22	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
23	23	return r3;
24	24	}
25	25
...	...	@@ -30,7 +30,7 @@ static inline long __syscall2(long n, long a, long b)
30	30	register long r4 __asm__("r4") = b;
31	31	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
32	32	: "+r"(r0), "+r"(r3), "+r"(r4)
33		:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	33	:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
34	34	return r3;
35	35	}
36	36
...	...	@@ -42,7 +42,7 @@ static inline long __syscall3(long n, long a, long b, long c)
42	42	register long r5 __asm__("r5") = c;
43	43	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
44	44	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
45		:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	45	:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
46	46	return r3;
47	47	}
48	48
...	...	@@ -55,7 +55,7 @@ static inline long __syscall4(long n, long a, long b, long c, long d)
55	55	register long r6 __asm__("r6") = d;
56	56	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
57	57	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
58		:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
	58	:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
59	59	return r3;
60	60	}
61	61
...	...	@@ -69,7 +69,7 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e)
69	69	register long r7 __asm__("r7") = e;
70	70	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
71	71	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
72		:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
	72	:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
73	73	return r3;
74	74	}
75	75
...	...	@@ -84,7 +84,7 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo
84	84	register long r8 __asm__("r8") = f;
85	85	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
86	86	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
87		:: "memory", "cr0", "r9", "r10", "r11", "r12");
	87	:: "memory", "cr0", "r9", "r10", "r11", "r12", "ctr", "xer");
88	88	return r3;
89	89	}
90	90

lib/libc/musl/arch/powerpc64/syscall_arch.h+7-7

...	...	@@ -7,7 +7,7 @@ static inline long __syscall0(long n)
7	7	register long r3 __asm__("r3");
8	8	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
9	9	: "+r"(r0), "=r"(r3)
10		:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	10	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
11	11	return r3;
12	12	}
13	13
...	...	@@ -17,7 +17,7 @@ static inline long __syscall1(long n, long a)
17	17	register long r3 __asm__("r3") = a;
18	18	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
19	19	: "+r"(r0), "+r"(r3)
20		:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	20	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
21	21	return r3;
22	22	}
23	23
...	...	@@ -28,7 +28,7 @@ static inline long __syscall2(long n, long a, long b)
28	28	register long r4 __asm__("r4") = b;
29	29	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
30	30	: "+r"(r0), "+r"(r3), "+r"(r4)
31		:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	31	:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
32	32	return r3;
33	33	}
34	34
...	...	@@ -40,7 +40,7 @@ static inline long __syscall3(long n, long a, long b, long c)
40	40	register long r5 __asm__("r5") = c;
41	41	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
42	42	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
43		:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
	43	:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
44	44	return r3;
45	45	}
46	46
...	...	@@ -53,7 +53,7 @@ static inline long __syscall4(long n, long a, long b, long c, long d)
53	53	register long r6 __asm__("r6") = d;
54	54	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
55	55	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
56		:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
	56	:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
57	57	return r3;
58	58	}
59	59
...	...	@@ -67,7 +67,7 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e)
67	67	register long r7 __asm__("r7") = e;
68	68	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
69	69	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
70		:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
	70	:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
71	71	return r3;
72	72	}
73	73
...	...	@@ -82,7 +82,7 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo
82	82	register long r8 __asm__("r8") = f;
83	83	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
84	84	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
85		:: "memory", "cr0", "r9", "r10", "r11", "r12");
	85	:: "memory", "cr0", "r9", "r10", "r11", "r12", "ctr", "xer");
86	86	return r3;
87	87	}
88	88

lib/std/debug/SelfInfo/Elf.zig+12-7

...	...	@@ -92,12 +92,10 @@ pub fn getModuleSlide(si: *SelfInfo, io: Io, address: usize) Error!usize {
92	92	}
93	93
94	94	pub const can_unwind: bool = s: {
95		// Notably, we are yet to support unwinding on ARM. There, unwinding is not done through
96		// `.eh_frame`, but instead with the `.ARM.exidx` section, which has a different format.
97	95	const archs: []const std.Target.Cpu.Arch = switch (builtin.target.os.tag) {
98		// Not supported yet: arm
99	96	.haiku => &.{
100	97	.aarch64,
	98	.arm,
101	99	.riscv64,
102	100	.x86,
103	101	.x86_64,
...	...	@@ -106,12 +104,14 @@ pub const can_unwind: bool = s: {
106	104	.x86,
107	105	.x86_64,
108	106	},
109		// Not supported yet: arm/armeb/thumb/thumbeb, hppa, hppa64, microblaze/microblazeel
	107	// Not supported yet: hppa, hppa64, microblaze/microblazeel, sh/sheb
110	108	.linux => &.{
111	109	.aarch64,
112	110	.aarch64_be,
113	111	.alpha,
114	112	.arc,
	113	.arm,
	114	.armeb,
115	115	.csky,
116	116	.loongarch32,
117	117	.loongarch64,
...	...	@@ -124,6 +124,8 @@ pub const can_unwind: bool = s: {
124	124	.riscv32,
125	125	.riscv64,
126	126	.s390x,
	127	.thumb,
	128	.thumbeb,
127	129	.x86,
128	130	.x86_64,
129	131	},
...	...	@@ -136,18 +138,20 @@ pub const can_unwind: bool = s: {
136	138	.dragonfly => &.{
137	139	.x86_64,
138	140	},
139		// Not supported yet: arm
140	141	.freebsd => &.{
141	142	.aarch64,
	143	.arm,
142	144	.riscv64,
143	145	.x86,
144	146	.x86_64,
145	147	},
146		// Not supported yet: arm/armeb, hppa, mips64/mips64el, sh/sheb
	148	// Not supported yet: hppa, mips64/mips64el, sh/sheb
147	149	.netbsd => &.{
148	150	.aarch64,
149	151	.aarch64_be,
150	152	.alpha,
	153	.arm,
	154	.armeb,
151	155	.m68k,
152	156	.mips,
153	157	.mipsel,
...	...	@@ -156,9 +160,10 @@ pub const can_unwind: bool = s: {
156	160	.x86,
157	161	.x86_64,
158	162	},
159		// Not supported yet: arm, hppa, sh
	163	// Not supported yet: hppa, sh
160	164	.openbsd => &.{
161	165	.aarch64,
	166	.arm,
162	167	.m88k,
163	168	.mips64,
164	169	.mips64el,

src/Compilation.zig+3-7

...	...	@@ -7327,8 +7327,6 @@ fn buildOutputFromZig(
7327	7327	pub const CrtFileOptions = struct {
7328	7328	function_sections: bool = true,
7329	7329	data_sections: bool = true,
7330		omit_frame_pointer: ?bool = null,
7331		unwind_tables: ?std.lang.UnwindTables = null,
7332	7330	pic: ?bool = null,
7333	7331	no_builtin: ?bool = null,
7334	7332
...	...	@@ -7375,7 +7373,7 @@ pub fn build_crt_file(
7375	7373	.root_optimize_mode = comp.compilerRtOptMode(),
7376	7374	.root_strip = comp.compilerRtStrip(),
7377	7375	.link_libc = false,
7378		.any_unwind_tables = options.unwind_tables != .none,
	7376	.any_unwind_tables = comp.root_mod.unwind_tables != .none,
7379	7377	.lto = switch (output_mode) {
7380	7378	.Lib => if (options.allow_lto) comp.config.lto else .none,
7381	7379	.Obj, .Exe => .none,
...	...	@@ -7398,11 +7396,9 @@ pub fn build_crt_file(
7398	7396	.sanitize_c = .off,
7399	7397	.sanitize_thread = false,
7400	7398	.red_zone = comp.root_mod.red_zone,
7401		// Some libcs (e.g. musl) are opinionated about -fomit-frame-pointer.
7402		.omit_frame_pointer = options.omit_frame_pointer orelse comp.root_mod.omit_frame_pointer,
	7399	.omit_frame_pointer = comp.root_mod.omit_frame_pointer,
7403	7400	.valgrind = false,
7404		// Some libcs (e.g. MinGW) are opinionated about -funwind-tables.
7405		.unwind_tables = options.unwind_tables orelse .none,
	7401	.unwind_tables = comp.root_mod.unwind_tables,
7406	7402	// Some CRT objects (e.g. musl's rcrt1.o and Scrt1.o) are opinionated about PIC.
7407	7403	.pic = options.pic orelse comp.root_mod.pic,
7408	7404	.optimize_mode = comp.compilerRtOptMode(),

src/libs/freebsd.zig-1

...	...	@@ -242,7 +242,6 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
242	242	prog_node,
243	243	files,
244	244	.{
245		.omit_frame_pointer = false,
246	245	.pic = true,
247	246	},
248	247	);

src/libs/libcxx.zig+1-1

...	...	@@ -325,7 +325,7 @@ pub fn buildLibCxxAbi(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
325	325	// See the `-fno-exceptions` logic for WASI.
326	326	// The old 32-bit x86 variant of SEH doesn't use tables.
327	327	const unwind_tables: std.lang.UnwindTables =
328		if (target.os.tag == .wasi or (target.cpu.arch == .x86 and target.os.tag == .windows)) .none else .async;
	328	if (target.cpu.arch == .x86 and target.os.tag == .windows) .none else .async;
329	329
330	330	const config = Compilation.Config.resolve(.{
331	331	.output_mode = output_mode,

src/libs/libtsan.zig+1-1

...	...	@@ -96,7 +96,7 @@ pub fn buildTsan(comp: *Compilation, prog_node: std.Progress.Node) BuildError!vo
96	96	.sanitize_c = .off,
97	97	.sanitize_thread = false,
98	98	.red_zone = comp.root_mod.red_zone,
99		.omit_frame_pointer = optimize_mode != .Debug and !target.os.tag.isDarwin(),
	99	.omit_frame_pointer = comp.root_mod.omit_frame_pointer,
100	100	.valgrind = false,
101	101	.unwind_tables = unwind_tables,
102	102	.optimize_mode = optimize_mode,

src/libs/mingw.zig+1-8

...	...	@@ -39,9 +39,6 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
39	39	const arena = arena_allocator.allocator();
40	40	const target = comp.getTarget();
41	41
42		// The old 32-bit x86 variant of SEH doesn't use tables.
43		const unwind_tables: std.lang.UnwindTables = if (target.cpu.arch != .x86) .async else .none;
44
45	42	switch (crt_file) {
46	43	.crt2_o => {
47	44	var args = std.array_list.Managed([]const u8).init(arena);
...	...	@@ -60,7 +57,6 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
60	57	};
61	58	return comp.build_crt_file("crt2", .Obj, .@"mingw-w64 crt2.o", prog_node, &files, .{
62	59	.function_sections = false, // https://codeberg.org/ziglang/zig/issues/30702
63		.unwind_tables = unwind_tables,
64	60	});
65	61	},
66	62
...	...	@@ -76,9 +72,7 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
76	72	.owner = undefined,
77	73	},
78	74	};
79		return comp.build_crt_file("dllcrt2", .Obj, .@"mingw-w64 dllcrt2.o", prog_node, &files, .{
80		.unwind_tables = unwind_tables,
81		});
	75	return comp.build_crt_file("dllcrt2", .Obj, .@"mingw-w64 dllcrt2.o", prog_node, &files, .{});
82	76	},
83	77
84	78	.libmingw32_lib => {
...	...	@@ -157,7 +151,6 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
157	151	}
158	152
159	153	return comp.build_crt_file("libmingw32", .Lib, .@"mingw-w64 libmingw32.lib", prog_node, c_source_files.items, .{
160		.unwind_tables = unwind_tables,
161	154	// https://github.com/llvm/llvm-project/issues/43698#issuecomment-2542660611
162	155	.allow_lto = false,
163	156	});

src/libs/musl.zig-4

...	...	@@ -43,7 +43,6 @@ pub fn buildCrtFile(comp: *Compilation, in_crt_file: CrtFile, prog_node: std.Pro
43	43	},
44	44	};
45	45	return comp.build_crt_file("crt1", .Obj, .@"musl crt1.o", prog_node, &files, .{
46		.omit_frame_pointer = true,
47	46	.no_builtin = true,
48	47	});
49	48	},
...	...	@@ -61,7 +60,6 @@ pub fn buildCrtFile(comp: *Compilation, in_crt_file: CrtFile, prog_node: std.Pro
61	60	},
62	61	};
63	62	return comp.build_crt_file("rcrt1", .Obj, .@"musl rcrt1.o", prog_node, &files, .{
64		.omit_frame_pointer = true,
65	63	.pic = true,
66	64	.no_builtin = true,
67	65	});
...	...	@@ -80,7 +78,6 @@ pub fn buildCrtFile(comp: *Compilation, in_crt_file: CrtFile, prog_node: std.Pro
80	78	},
81	79	};
82	80	return comp.build_crt_file("Scrt1", .Obj, .@"musl Scrt1.o", prog_node, &files, .{
83		.omit_frame_pointer = true,
84	81	.pic = true,
85	82	.no_builtin = true,
86	83	});
...	...	@@ -166,7 +163,6 @@ pub fn buildCrtFile(comp: *Compilation, in_crt_file: CrtFile, prog_node: std.Pro
166	163	};
167	164	}
168	165	return comp.build_crt_file("c", .Lib, .@"musl libc.a", prog_node, c_source_files.items, .{
169		.omit_frame_pointer = true,
170	166	.no_builtin = true,
171	167	});
172	168	},

src/libs/openbsd.zig-2

...	...	@@ -125,8 +125,6 @@ pub fn buildCrtFile(comp: *Compilation, crt_file: CrtFile, prog_node: std.Progre
125	125	const files = files_buf[0..files_index];
126	126
127	127	return comp.build_crt_file("crt0", .Obj, .@"openbsd libc Scrt0.o", prog_node, files, .{
128		// Unclear why OpenBSD does this, but we'll do the same.
129		.omit_frame_pointer = if (target.cpu.arch.isX86()) false else null,
130	128	.pic = true,
131	129	});
132	130	},

test/src/StackTrace.zig+3-2

...	...	@@ -72,6 +72,8 @@ fn addCaseTarget(
72	72	.mips64el,
73	73	.sh,
74	74	.sheb,
	75	.xtensa,
	76	.xtensaeb,
75	77	=> .useless,
76	78	.hexagon,
77	79	.powerpc,
...	...	@@ -87,8 +89,7 @@ fn addCaseTarget(
87	89	const supports_unwind_tables = switch (target.result.os.tag) {
88	90	// x86-windows just has no way to do stack unwinding other then using frame pointers.
89	91	.windows => target.result.cpu.arch != .x86,
90		// We do not yet implement support for the AArch32 exception table section `.ARM.exidx`.
91		else => !target.result.cpu.arch.isArm(),
	92	else => true,
92	93	};
93	94
94	95	const use_llvm_vals: []const bool = if (both_backends) &.{ true, false } else &.{true};