From c9e67e71c146d9a9c217d3f47e75258a1ffeedd9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Thu, 3 Oct 2024 08:34:19 +0200 Subject: [PATCH] std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm(). The old isARM() function was a portability trap. With the name it had, it seemed like the obviously correct function to use, but it didn't include Thumb. In the vast majority of cases where someone wants to ask "is the target Arm?", Thumb *should* be included. There are exactly 3 cases in the codebase where we do actually need to exclude Thumb, although one of those is in Aro and mirrors a check in Clang that is itself likely a bug. These rare cases can just add an extra isThumb() check. --- lib/compiler/aro/aro/toolchains/Linux.zig | 2 +- lib/compiler_rt/arm.zig | 8 +++----- lib/compiler_rt/clzsi2_test.zig | 2 +- lib/compiler_rt/common.zig | 2 +- lib/std/Target.zig | 19 ++++++++----------- lib/std/math/gamma.zig | 2 +- lib/std/math/isnan.zig | 2 +- lib/std/os/linux.zig | 4 ++-- lib/std/simd.zig | 2 +- lib/std/start.zig | 2 +- lib/std/zig/system.zig | 2 +- src/codegen/c.zig | 2 +- src/codegen/llvm.zig | 6 +++--- src/glibc.zig | 4 ++-- src/libunwind.zig | 2 +- src/link/Coff.zig | 10 ++++------ src/link/Elf.zig | 2 +- test/behavior/cast.zig | 4 ++-- test/behavior/eval.zig | 2 +- test/behavior/floatop.zig | 14 +++++++------- test/behavior/math.zig | 14 +++++++------- test/behavior/maximum_minimum.zig | 2 +- test/behavior/muladd.zig | 8 ++++---- test/behavior/saturating_arithmetic.zig | 4 ++-- test/behavior/struct.zig | 6 +++--- test/behavior/vector.zig | 4 ++-- test/c_abi/main.zig | 6 +++--- 27 files changed, 65 insertions(+), 72 deletions(-) diff --git a/lib/compiler/aro/aro/toolchains/Linux.zig b/lib/compiler/aro/aro/toolchains/Linux.zig index 9666c8e3b062501e2f36de4221ba5d0bb58d367e..763222cc98bfb66c093e5cb3caf58fdaea876a0e 100644 --- a/lib/compiler/aro/aro/toolchains/Linux.zig +++ b/lib/compiler/aro/aro/toolchains/Linux.zig @@ -40,7 +40,7 @@ fn buildExtraOpts(self: *Linux, tc: *const Toolchain) !void { self.extra_opts.appendAssumeCapacity("relro"); } - if (target.cpu.arch.isARM() or target.cpu.arch.isAARCH64() or is_android) { + if ((target.cpu.arch.isArm() and !target.cpu.arch.isThumb()) or target.cpu.arch.isAARCH64() or is_android) { try self.extra_opts.ensureUnusedCapacity(gpa, 2); self.extra_opts.appendAssumeCapacity("-z"); self.extra_opts.appendAssumeCapacity("max-page-size=4096"); diff --git a/lib/compiler_rt/arm.zig b/lib/compiler_rt/arm.zig index e42694b2bfa94da3425baf3e0d0c605c7143f0e8..5a95e9da49089432a26faa2304af8a9a3cfb9886 100644 --- a/lib/compiler_rt/arm.zig +++ b/lib/compiler_rt/arm.zig @@ -10,7 +10,7 @@ pub const panic = common.panic; comptime { if (!builtin.is_test) { - if (arch.isArmOrThumb()) { + if (arch.isArm()) { @export(&__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = common.linkage, .visibility = common.visibility }); @export(&__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = common.linkage, .visibility = common.visibility }); @export(&__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = common.linkage, .visibility = common.visibility }); @@ -206,7 +206,7 @@ fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 { } test "__aeabi_frsub" { - if (!builtin.cpu.arch.isARM()) return error.SkipZigTest; + if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest; const inf32 = std.math.inf(f32); const maxf32 = std.math.floatMax(f32); const frsub_data = [_][3]f32{ @@ -226,14 +226,13 @@ test "__aeabi_frsub" { [_]f32{ maxf32, -maxf32, -inf32 }, [_]f32{ -maxf32, maxf32, inf32 }, }; - if (!builtin.cpu.arch.isARM()) return error.SkipZigTest; for (frsub_data) |data| { try std.testing.expectApproxEqAbs(data[2], __aeabi_frsub(data[0], data[1]), 0.001); } } test "__aeabi_drsub" { - if (!builtin.cpu.arch.isARM()) return error.SkipZigTest; + if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest; const inf64 = std.math.inf(f64); const maxf64 = std.math.floatMax(f64); const frsub_data = [_][3]f64{ @@ -253,7 +252,6 @@ test "__aeabi_drsub" { [_]f64{ maxf64, -maxf64, -inf64 }, [_]f64{ -maxf64, maxf64, inf64 }, }; - if (!builtin.cpu.arch.isARM()) return error.SkipZigTest; for (frsub_data) |data| { try std.testing.expectApproxEqAbs(data[2], __aeabi_drsub(data[0], data[1]), 0.000001); } diff --git a/lib/compiler_rt/clzsi2_test.zig b/lib/compiler_rt/clzsi2_test.zig index 4fd85edca56a22840938fd4eded31612eb53bf4a..188290e90b79d3271b71e05e20d48885f895d289 100644 --- a/lib/compiler_rt/clzsi2_test.zig +++ b/lib/compiler_rt/clzsi2_test.zig @@ -268,7 +268,7 @@ test "clzsi2" { try test__clzsi2(0xFE000000, 0); try test__clzsi2(0xFF000000, 0); // arm and thumb1 assume input a != 0 - if (!builtin.cpu.arch.isArmOrThumb()) + if (!builtin.cpu.arch.isArm()) try test__clzsi2(0x00000000, 32); try test__clzsi2(0x00000001, 31); try test__clzsi2(0x00000002, 30); diff --git a/lib/compiler_rt/common.zig b/lib/compiler_rt/common.zig index 3b1f93f1c288d6816947783a8becde9835a125bf..afc3a2e6d91ba70a2028aecf550f8314e2c34d03 100644 --- a/lib/compiler_rt/common.zig +++ b/lib/compiler_rt/common.zig @@ -29,7 +29,7 @@ pub const want_aeabi = switch (builtin.abi) { }, else => false, }; -pub const want_mingw_arm_abi = builtin.cpu.arch.isArmOrThumb() and builtin.target.isMinGW(); +pub const want_mingw_arm_abi = builtin.cpu.arch.isArm() and builtin.target.isMinGW(); pub const want_ppc_abi = builtin.cpu.arch.isPowerPC(); diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 4610d11c014744dc5d6b293670b3abcde0b15afd..2adbe8e185d4255f1a7dee53d3b1ffe26b441088 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -1379,17 +1379,11 @@ pub const Cpu = struct { }; } - pub inline fn isARM(arch: Arch) bool { + /// Note that this includes Thumb. + pub inline fn isArm(arch: Arch) bool { return switch (arch) { .arm, .armeb => true, - else => false, - }; - } - - pub inline fn isAARCH64(arch: Arch) bool { - return switch (arch) { - .aarch64, .aarch64_be => true, - else => false, + else => arch.isThumb(), }; } @@ -1400,8 +1394,11 @@ pub const Cpu = struct { }; } - pub inline fn isArmOrThumb(arch: Arch) bool { - return arch.isARM() or arch.isThumb(); + pub inline fn isAARCH64(arch: Arch) bool { + return switch (arch) { + .aarch64, .aarch64_be => true, + else => false, + }; } pub inline fn isWasm(arch: Arch) bool { diff --git a/lib/std/math/gamma.zig b/lib/std/math/gamma.zig index 5ac041e195dfdb49c0af2f74697a5ab3fc2ba949..aad2a104cc8bbbaf46df7f35d4d872cd0e37bf05 100644 --- a/lib/std/math/gamma.zig +++ b/lib/std/math/gamma.zig @@ -263,7 +263,7 @@ test gamma { } test "gamma.special" { - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 inline for (&.{ f32, f64 }) |T| { try expect(std.math.isNan(gamma(T, -std.math.nan(T)))); diff --git a/lib/std/math/isnan.zig b/lib/std/math/isnan.zig index a85100ba90f0f9e903a4325750329ac56e0f12f3..e05ce452dd63cc4134142dda4f4ec44a8fbb6048 100644 --- a/lib/std/math/isnan.zig +++ b/lib/std/math/isnan.zig @@ -32,7 +32,7 @@ test isSignalNan { // TODO: Signalling NaN values get converted to quiet NaN values in // some cases where they shouldn't such that this can fail. // See https://github.com/ziglang/zig/issues/14366 - if (!builtin.cpu.arch.isArmOrThumb() and + if (!builtin.cpu.arch.isArm() and !builtin.cpu.arch.isAARCH64() and !builtin.cpu.arch.isPowerPC() and builtin.zig_backend != .stage2_c) diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig index bccbba5aed19bca825a73adc2bfd3cc2adeea5cb..289027aea674de64269bd57e769cc0256b32cb08 100644 --- a/lib/std/os/linux.zig +++ b/lib/std/os/linux.zig @@ -506,7 +506,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize { const require_aligned_register_pair = builtin.cpu.arch.isPowerPC32() or builtin.cpu.arch.isMIPS32() or - builtin.cpu.arch.isArmOrThumb(); + builtin.cpu.arch.isArm(); // Split a 64bit value into a {LSB,MSB} pair. // The LE/BE variants specify the endianness to assume. @@ -2331,7 +2331,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const } pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize { - if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) { + if (comptime native_arch.isArm() or native_arch.isPowerPC32()) { // These architectures reorder the arguments so that a register is not skipped to align the // register number that `offset` is passed in. diff --git a/lib/std/simd.zig b/lib/std/simd.zig index c570c36615f7f263e16e1fa55de2aa80c7921c11..dc2686f4606ecf9637d640334a93adaf42d760c4 100644 --- a/lib/std/simd.zig +++ b/lib/std/simd.zig @@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu) if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256; if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128; if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64; - } else if (cpu.arch.isArmOrThumb()) { + } else if (cpu.arch.isArm()) { if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128; } else if (cpu.arch.isAARCH64()) { // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit diff --git a/lib/std/start.zig b/lib/std/start.zig index c5664cbf0fa998bef3aa23591deea69b0798365f..1d1e38654bc0254ccf9315cc67c9b158c74b34d8 100644 --- a/lib/std/start.zig +++ b/lib/std/start.zig @@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn { // ARMv6 targets (and earlier) have no support for TLS in hardware. // FIXME: Elide the check for targets >= ARMv7 when the target feature API // becomes less verbose (and more usable). - if (comptime native_arch.isArmOrThumb()) { + if (comptime native_arch.isArm()) { if (at_hwcap & std.os.linux.HWCAP.TLS == 0) { // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls // For the time being use a simple trap instead of a @panic call to diff --git a/lib/std/zig/system.zig b/lib/std/zig/system.zig index 15392d34f1d5992d1a3446add39ad4250bb6f2f7..10b00c0e97d4cced93ac2fd07eb96c51f657e7fd 100644 --- a/lib/std/zig/system.zig +++ b/lib/std/zig/system.zig @@ -401,7 +401,7 @@ pub fn resolveTargetQuery(query: Target.Query) DetectError!Target { } // https://github.com/llvm/llvm-project/issues/105978 - if (result.cpu.arch.isArmOrThumb() and result.floatAbi() == .soft) { + if (result.cpu.arch.isArm() and result.floatAbi() == .soft) { result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2)); } diff --git a/src/codegen/c.zig b/src/codegen/c.zig index 4d55637f27e58ca06d20561d80bad161478a7db1..41ec422959980bfee78232be73f2cad2952d0566 100644 --- a/src/codegen/c.zig +++ b/src/codegen/c.zig @@ -5190,7 +5190,7 @@ fn asmInputNeedsLocal(f: *Function, constraint: []const u8, value: CValue) bool return switch (constraint[0]) { '{' => true, 'i', 'r' => false, - 'I' => !target.cpu.arch.isArmOrThumb(), + 'I' => !target.cpu.arch.isArm(), else => switch (value) { .constant => |val| switch (dg.pt.zcu.intern_pool.indexToKey(val.toIntern())) { .ptr => |ptr| if (ptr.byte_offset == 0) switch (ptr.base_addr) { diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index fc7d26a815f8f0a9715c8c559b4e4c4889267993..85a4062ed38a48b4fbabc1b6fb17191e6b173894 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -494,7 +494,7 @@ const DataLayoutBuilder = struct { if (idx != size) try writer.print(":{d}", .{idx}); } } - if (self.target.cpu.arch.isArmOrThumb()) + if (self.target.cpu.arch.isArm()) try writer.writeAll("-Fi8") // for thumb interwork else if (self.target.cpu.arch == .powerpc64 and self.target.os.tag != .freebsd and @@ -761,7 +761,7 @@ const DataLayoutBuilder = struct { else => {}, } }, - .vector => if (self.target.cpu.arch.isArmOrThumb()) { + .vector => if (self.target.cpu.arch.isArm()) { switch (size) { 128 => abi = 64, else => {}, @@ -827,7 +827,7 @@ const DataLayoutBuilder = struct { else => {}, }, .aggregate => if (self.target.os.tag == .uefi or self.target.os.tag == .windows or - self.target.cpu.arch.isArmOrThumb()) + self.target.cpu.arch.isArm()) { pref = @min(pref, self.target.ptrBitWidth()); } else switch (self.target.cpu.arch) { diff --git a/src/glibc.zig b/src/glibc.zig index a7736a98274c7db78e8ebe107383a61dc096b823..9876308aee7ed8259350ef112d85d38e5925cb59 100644 --- a/src/glibc.zig +++ b/src/glibc.zig @@ -440,7 +440,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![ try result.appendSlice("sparc" ++ s ++ "sparc32"); } } - } else if (arch.isARM()) { + } else if (arch.isArm()) { try result.appendSlice("arm"); } else if (arch.isMIPS()) { if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) { @@ -604,7 +604,7 @@ fn add_include_dirs_arch( try args.append("-I"); try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" })); } - } else if (arch.isARM()) { + } else if (arch.isArm()) { if (opt_nptl) |nptl| { try args.append("-I"); try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl })); diff --git a/src/libunwind.zig b/src/libunwind.zig index fba604e725a7b201bcd652c69578668125c48f59..d7b22e206791fa6e3159b4d176d1e80aad7aaefe 100644 --- a/src/libunwind.zig +++ b/src/libunwind.zig @@ -136,7 +136,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr if (!comp.config.any_non_single_threaded) { try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS"); } - if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) { + if (target.cpu.arch.isArm() and target.abi.floatAbi() == .hard) { try cflags.append("-DCOMPILER_RT_ARMHF_TARGET"); } try cflags.append("-Wno-bitwise-conditional-parentheses"); diff --git a/src/link/Coff.zig b/src/link/Coff.zig index bc88f5fc4c77db6c30517b27d4781a39f20faf46..a52892409ac91991d99abcfaa991224582c5127e 100644 --- a/src/link/Coff.zig +++ b/src/link/Coff.zig @@ -1865,12 +1865,10 @@ fn linkWithLLD(coff: *Coff, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: try argv.append("-MACHINE:X86"); } else if (target.cpu.arch == .x86_64) { try argv.append("-MACHINE:X64"); - } else if (target.cpu.arch.isARM()) { - if (target.ptrBitWidth() == 32) { - try argv.append("-MACHINE:ARM"); - } else { - try argv.append("-MACHINE:ARM64"); - } + } else if (target.cpu.arch == .thumb) { + try argv.append("-MACHINE:ARM"); + } else if (target.cpu.arch == .aarch64) { + try argv.append("-MACHINE:ARM64"); } for (comp.force_undefined_symbols.keys()) |symbol| { diff --git a/src/link/Elf.zig b/src/link/Elf.zig index ccc9e24bf680269ffe5d035c5fef73ffd01f203f..1f560d74db983cccdefb7cd486cd0a6c0d93194a 100644 --- a/src/link/Elf.zig +++ b/src/link/Elf.zig @@ -1823,7 +1823,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s } if (link_mode == .static) { - if (target.cpu.arch.isArmOrThumb()) { + if (target.cpu.arch.isArm()) { try argv.append("-Bstatic"); } else { try argv.append("-static"); diff --git a/test/behavior/cast.zig b/test/behavior/cast.zig index efc7d4237fad203848bc337922ba36e89c11ec02..3a9b5157a49441b68e7e41f3b1a87baf84e313da 100644 --- a/test/behavior/cast.zig +++ b/test/behavior/cast.zig @@ -124,7 +124,7 @@ test "@floatFromInt(f80)" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -1362,7 +1362,7 @@ test "cast f16 to wider types" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; diff --git a/test/behavior/eval.zig b/test/behavior/eval.zig index 4085e4c47db78c4ecffc25e30dca81fbb41f7dd6..da39b06d92ac46fe1cb5903dbb71b38ee5c62f74 100644 --- a/test/behavior/eval.zig +++ b/test/behavior/eval.zig @@ -522,7 +522,7 @@ test "runtime 128 bit integer division" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; diff --git a/test/behavior/floatop.zig b/test/behavior/floatop.zig index 69dacb66fd5d09c1e13809a55c1d84bf93678561..72b773b76c3054d4909280a18093875aa54f295e 100644 --- a/test/behavior/floatop.zig +++ b/test/behavior/floatop.zig @@ -126,7 +126,7 @@ test "cmp f16" { if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 try testCmp(f16); try comptime testCmp(f16); @@ -135,7 +135,7 @@ test "cmp f16" { test "cmp f32/f64" { if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 try testCmp(f32); try comptime testCmp(f32); @@ -146,7 +146,7 @@ test "cmp f32/f64" { test "cmp f128" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -1009,7 +1009,7 @@ test "@abs f32/f64" { test "@abs f80/f128/c_longdouble" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO - if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; @@ -1134,7 +1134,7 @@ test "@floor f32/f64" { test "@floor f80/f128/c_longdouble" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; @@ -1232,7 +1232,7 @@ test "@ceil f32/f64" { test "@ceil f80/f128/c_longdouble" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; @@ -1330,7 +1330,7 @@ test "@trunc f32/f64" { test "@trunc f80/f128/c_longdouble" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; diff --git a/test/behavior/math.zig b/test/behavior/math.zig index 07dd133fe4a7b7a9bfd6254663b66d61b9bf93bd..21f09a877fcceddcd5717ea7d1cdcf275af2151d 100644 --- a/test/behavior/math.zig +++ b/test/behavior/math.zig @@ -780,7 +780,7 @@ test "128-bit multiplication" { if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; { @@ -1369,7 +1369,7 @@ test "remainder division" { if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) { @@ -1522,7 +1522,7 @@ test "@round f80" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -1535,7 +1535,7 @@ test "@round f128" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -1579,7 +1579,7 @@ test "NaN comparison" { if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 try testNanEqNan(f16); try testNanEqNan(f32); @@ -1735,7 +1735,7 @@ test "runtime comparison to NaN is comptime-known" { if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 const S = struct { fn doTheTest(comptime F: type, x: F) void { @@ -1766,7 +1766,7 @@ test "runtime int comparison to inf is comptime-known" { if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; - if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 + if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234 const S = struct { fn doTheTest(comptime F: type, x: u32) void { diff --git a/test/behavior/maximum_minimum.zig b/test/behavior/maximum_minimum.zig index 8994d9d18241f57e431a0b9140fddede72853fd0..d7d494a9adecfa421a48c6a7a1d6d9c0cd8ae09b 100644 --- a/test/behavior/maximum_minimum.zig +++ b/test/behavior/maximum_minimum.zig @@ -122,7 +122,7 @@ test "@min/max for floats" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; diff --git a/test/behavior/muladd.zig b/test/behavior/muladd.zig index 7b45cc9b727bf5019141c3977d2c7c3c7a0f48aa..ec07f203ec510fb5b90f674d576050e4384f3c20 100644 --- a/test/behavior/muladd.zig +++ b/test/behavior/muladd.zig @@ -58,7 +58,7 @@ test "@mulAdd f80" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -79,7 +79,7 @@ test "@mulAdd f128" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; @@ -189,7 +189,7 @@ test "vector f80" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; try comptime vector80(); @@ -216,7 +216,7 @@ test "vector f128" { if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; try comptime vector128(); diff --git a/test/behavior/saturating_arithmetic.zig b/test/behavior/saturating_arithmetic.zig index 3e41e2fa3fe08694f3242e8af398e1c9485d4c7c..ea3d51f3e6fe051c3e0198bb57024b894618a902 100644 --- a/test/behavior/saturating_arithmetic.zig +++ b/test/behavior/saturating_arithmetic.zig @@ -164,7 +164,7 @@ test "saturating multiplication <= 32 bits" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) { @@ -264,7 +264,7 @@ test "saturating multiplication" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) { diff --git a/test/behavior/struct.zig b/test/behavior/struct.zig index 283c8dbc4a676f2417917e628f858901369eff09..b45fa171cb0392a97085fa903b0818b60b2c81d2 100644 --- a/test/behavior/struct.zig +++ b/test/behavior/struct.zig @@ -419,7 +419,7 @@ test "packed struct 24bits" { if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.cpu.arch == .wasm32) return error.SkipZigTest; // TODO - if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO + if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; @@ -818,7 +818,7 @@ test "non-packed struct with u128 entry in union" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; const U = union(enum) { @@ -941,7 +941,7 @@ test "tuple assigned to variable" { test "comptime struct field" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO - if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO + if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO const T = struct { a: i32, diff --git a/test/behavior/vector.zig b/test/behavior/vector.zig index 666c45b7418eaf78ffa1e5cf0edc54684c587877..a2826617f8a6b99934974e436eb0134c323188e5 100644 --- a/test/behavior/vector.zig +++ b/test/behavior/vector.zig @@ -101,7 +101,7 @@ test "vector float operators" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .aarch64) { @@ -753,7 +753,7 @@ test "vector reduce operation" { if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; - if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; + if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21091 diff --git a/test/c_abi/main.zig b/test/c_abi/main.zig index 09b50116653b3fedab4e8f2d8b6279fc03f674f1..f18fa4b3d5ba1ef0b6fcc9ee14aaa19e748ba9a2 100644 --- a/test/c_abi/main.zig +++ b/test/c_abi/main.zig @@ -10,7 +10,7 @@ const builtin = @import("builtin"); const print = std.debug.print; const expect = std.testing.expect; const expectEqual = std.testing.expectEqual; -const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and +const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isArm() and !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32(); const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin(); @@ -181,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat; extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble; const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and - !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV(); + !builtin.cpu.arch.isArm() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV(); test "C ABI complex float" { if (!complex_abi_compatible) return error.SkipZigTest; @@ -5553,7 +5553,7 @@ extern fn c_f16_struct(f16_struct) f16_struct; test "f16 struct" { if (builtin.target.cpu.arch.isMIPS64()) return error.SkipZigTest; if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest; - if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest; + if (builtin.cpu.arch.isArm() and builtin.mode != .Debug) return error.SkipZigTest; const a = c_f16_struct(.{ .a = 12 }); try expect(a.a == 34); -- 2.54.0