authorgravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2020-09-25 22:19:40+02:00
committergravatar for joachim.schmidt557@outlook.comJoachim Schmidt <joachim.schmidt557@outlook.com> 2020-10-02 19:39:17+02:00
logcfe486e3887ee5ea622234439fc7bd41fb2774bc
tree7d1e7e0acd4c017bc3286027c1ce4e05f879b889
parent35b228630cf1972868fe820baeb41a09801f2fbb

stage2 ARM: Add push, pop alias instructions; non-leaf functions

Non-leaf functions now work. Combined with simple parameters and return types, this allows more complicated programs than Hello World to be correctly compiled.

2 files changed, 129 insertions(+), 20 deletions(-)

src/codegen.zig+10-4
...@@ -576,7 +576,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -576,7 +576,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
576 // push {fp, lr}576 // push {fp, lr}
577 // mov fp, sp577 // mov fp, sp
578 // sub sp, sp, #reloc578 // sub sp, sp, #reloc
579 // mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .fp, Instruction.Operand.reg(.sp, Instruction.Operand.Shift.none)).toU32());579 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.push(.al, .{ .fp, .lr }).toU32());
580 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .fp, Instruction.Operand.reg(.sp, Instruction.Operand.Shift.none)).toU32());
581 // TODO: prepare stack for local variables
580 // const backpatch_reloc = try self.code.addManyAsArray(4);582 // const backpatch_reloc = try self.code.addManyAsArray(4);
581583
582 try self.dbgSetPrologueEnd();584 try self.dbgSetPrologueEnd();
...@@ -592,7 +594,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -592,7 +594,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
592594
593 // mov sp, fp595 // mov sp, fp
594 // pop {fp, pc}596 // pop {fp, pc}
595 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .sp, Instruction.Operand.reg(.fp, Instruction.Operand.Shift.none)).toU32());597 // TODO: return by jumping to this code, use relocations
598 // mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .sp, Instruction.Operand.reg(.fp, Instruction.Operand.Shift.none)).toU32());
599 // mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.pop(.al, .{ .fp, .pc }).toU32());
596 } else {600 } else {
597 try self.dbgSetPrologueEnd();601 try self.dbgSetPrologueEnd();
598 try self.genBody(self.mod_fn.analysis.success);602 try self.genBody(self.mod_fn.analysis.success);
...@@ -1661,7 +1665,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -1661,7 +1665,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
1661 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.jalr(.zero, 0, .ra).toU32());1665 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.jalr(.zero, 0, .ra).toU32());
1662 },1666 },
1663 .arm => {1667 .arm => {
1664 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.bx(.al, .lr).toU32());1668 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .sp, Instruction.Operand.reg(.fp, Instruction.Operand.Shift.none)).toU32());
1669 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.pop(.al, .{ .fp, .pc }).toU32());
1670 // TODO: jump to the end with relocation
1665 // // Just add space for an instruction, patch this later1671 // // Just add space for an instruction, patch this later
1666 // try self.code.resize(self.code.items.len + 4);1672 // try self.code.resize(self.code.items.len + 4);
1667 // try self.exitlude_jump_relocs.append(self.gpa, self.code.items.len - 4);1673 // try self.exitlude_jump_relocs.append(self.gpa, self.code.items.len - 4);
...@@ -2316,7 +2322,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {...@@ -2316,7 +2322,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
2316 // The value is in memory at a hard-coded address.2322 // The value is in memory at a hard-coded address.
2317 // If the type is a pointer, it means the pointer address is at this memory location.2323 // If the type is a pointer, it means the pointer address is at this memory location.
2318 try self.genSetReg(src, reg, .{ .immediate = addr });2324 try self.genSetReg(src, reg, .{ .immediate = addr });
2319 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, reg, Instruction.Offset.none).toU32());2325 mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, reg, .{ .offset = Instruction.Offset.none }).toU32());
2320 },2326 },
2321 else => return self.fail(src, "TODO implement getSetReg for arm {}", .{mcv}),2327 else => return self.fail(src, "TODO implement getSetReg for arm {}", .{mcv}),
2322 },2328 },
src/codegen/arm.zig+119-16
...@@ -417,10 +417,10 @@ pub const Instruction = union(enum) {...@@ -417,10 +417,10 @@ pub const Instruction = union(enum) {
417 rd: Register,417 rd: Register,
418 rn: Register,418 rn: Register,
419 offset: Offset,419 offset: Offset,
420 pre_post: u1,420 pre_index: bool,
421 up_down: u1,421 positive: bool,
422 byte_word: u1,422 byte_word: u1,
423 write_back: u1,423 write_back: bool,
424 load_store: u1,424 load_store: u1,
425 ) Instruction {425 ) Instruction {
426 return Instruction{426 return Instruction{
...@@ -430,10 +430,10 @@ pub const Instruction = union(enum) {...@@ -430,10 +430,10 @@ pub const Instruction = union(enum) {
430 .rd = rd.id(),430 .rd = rd.id(),
431 .offset = offset.toU12(),431 .offset = offset.toU12(),
432 .load_store = load_store,432 .load_store = load_store,
433 .write_back = write_back,433 .write_back = if (write_back) 1 else 0,
434 .byte_word = byte_word,434 .byte_word = byte_word,
435 .up_down = up_down,435 .up_down = if (positive) 1 else 0,
436 .pre_post = pre_post,436 .pre_post = if (pre_index) 1 else 0,
437 .imm = if (offset == .Immediate) 0 else 1,437 .imm = if (offset == .Immediate) 0 else 1,
438 },438 },
439 };439 };
...@@ -626,20 +626,27 @@ pub const Instruction = union(enum) {...@@ -626,20 +626,27 @@ pub const Instruction = union(enum) {
626626
627 // Single data transfer627 // Single data transfer
628628
629 pub fn ldr(cond: Condition, rd: Register, rn: Register, offset: Offset) Instruction {629 pub const OffsetArgs = struct {
630 return singleDataTransfer(cond, rd, rn, offset, 1, 1, 0, 0, 1);630 pre_index: bool = true,
631 positive: bool = true,
632 offset: Offset,
633 write_back: bool = false,
634 };
635
636 pub fn ldr(cond: Condition, rd: Register, rn: Register, args: OffsetArgs) Instruction {
637 return singleDataTransfer(cond, rd, rn, args.offset, args.pre_index, args.positive, 0, args.write_back, 1);
631 }638 }
632639
633 pub fn ldrb(cond: Condition, rd: Register, rn: Register, offset: Offset) Instruction {640 pub fn ldrb(cond: Condition, rd: Register, rn: Register, args: OffsetArgs) Instruction {
634 return singleDataTransfer(cond, rd, rn, offset, 1, 1, 1, 0, 1);641 return singleDataTransfer(cond, rd, rn, args.offset, args.pre_index, args.positive, 1, args.write_back, 1);
635 }642 }
636643
637 pub fn str(cond: Condition, rd: Register, rn: Register, offset: Offset) Instruction {644 pub fn str(cond: Condition, rd: Register, rn: Register, args: OffsetArgs) Instruction {
638 return singleDataTransfer(cond, rd, rn, offset, 1, 1, 0, 0, 0);645 return singleDataTransfer(cond, rd, rn, args.offset, args.pre_index, args.positive, 0, args.write_back, 0);
639 }646 }
640647
641 pub fn strb(cond: Condition, rd: Register, rn: Register, offset: Offset) Instruction {648 pub fn strb(cond: Condition, rd: Register, rn: Register, args: OffsetArgs) Instruction {
642 return singleDataTransfer(cond, rd, rn, offset, 1, 1, 1, 0, 0);649 return singleDataTransfer(cond, rd, rn, args.offset, args.pre_index, args.positive, 1, args.write_back, 0);
643 }650 }
644651
645 // Block data transfer652 // Block data transfer
...@@ -721,6 +728,58 @@ pub const Instruction = union(enum) {...@@ -721,6 +728,58 @@ pub const Instruction = union(enum) {
721 pub fn bkpt(imm: u16) Instruction {728 pub fn bkpt(imm: u16) Instruction {
722 return breakpoint(imm);729 return breakpoint(imm);
723 }730 }
731
732 // Aliases
733
734 pub fn pop(cond: Condition, args: anytype) Instruction {
735 if (@typeInfo(@TypeOf(args)) != .Struct) {
736 @compileError("Expected tuple or struct argument, found " ++ @typeName(@TypeOf(args)));
737 }
738
739 if (args.len < 1) {
740 @compileError("Expected at least one register");
741 } else if (args.len == 1) {
742 const reg = args[0];
743 return ldr(cond, reg, .sp, .{
744 .pre_index = false,
745 .positive = true,
746 .offset = Offset.imm(4),
747 .write_back = false,
748 });
749 } else {
750 var register_list: u16 = 0;
751 inline for (args) |arg| {
752 const reg = @as(Register, arg);
753 register_list |= @as(u16, 1) << reg.id();
754 }
755 return ldm(cond, .sp, true, @bitCast(RegisterList, register_list));
756 }
757 }
758
759 pub fn push(cond: Condition, args: anytype) Instruction {
760 if (@typeInfo(@TypeOf(args)) != .Struct) {
761 @compileError("Expected tuple or struct argument, found " ++ @typeName(@TypeOf(args)));
762 }
763
764 if (args.len < 1) {
765 @compileError("Expected at least one register");
766 } else if (args.len == 1) {
767 const reg = args[0];
768 return str(cond, reg, .sp, .{
769 .pre_index = true,
770 .positive = false,
771 .offset = Offset.imm(4),
772 .write_back = true,
773 });
774 } else {
775 var register_list: u16 = 0;
776 inline for (args) |arg| {
777 const reg = @as(Register, arg);
778 register_list |= @as(u16, 1) << reg.id();
779 }
780 return stmdb(cond, .sp, true, @bitCast(RegisterList, register_list));
781 }
782 }
724};783};
725784
726test "serialize instructions" {785test "serialize instructions" {
...@@ -747,11 +806,15 @@ test "serialize instructions" {...@@ -747,11 +806,15 @@ test "serialize instructions" {
747 .expected = 0b1110_00010_0_001111_0101_000000000000,806 .expected = 0b1110_00010_0_001111_0101_000000000000,
748 },807 },
749 .{ // ldr r0, [r2, #42]808 .{ // ldr r0, [r2, #42]
750 .inst = Instruction.ldr(.al, .r0, .r2, Instruction.Offset.imm(42)),809 .inst = Instruction.ldr(.al, .r0, .r2, .{
810 .offset = Instruction.Offset.imm(42),
811 }),
751 .expected = 0b1110_01_0_1_1_0_0_1_0010_0000_000000101010,812 .expected = 0b1110_01_0_1_1_0_0_1_0010_0000_000000101010,
752 },813 },
753 .{ // str r0, [r3]814 .{ // str r0, [r3]
754 .inst = Instruction.str(.al, .r0, .r3, Instruction.Offset.none),815 .inst = Instruction.str(.al, .r0, .r3, .{
816 .offset = Instruction.Offset.none,
817 }),
755 .expected = 0b1110_01_0_1_1_0_0_0_0011_0000_000000000000,818 .expected = 0b1110_01_0_1_1_0_0_0_0011_0000_000000000000,
756 },819 },
757 .{ // b #12820 .{ // b #12
...@@ -789,3 +852,43 @@ test "serialize instructions" {...@@ -789,3 +852,43 @@ test "serialize instructions" {
789 testing.expectEqual(case.expected, actual);852 testing.expectEqual(case.expected, actual);
790 }853 }
791}854}
855
856test "aliases" {
857 const Testcase = struct {
858 expected: Instruction,
859 actual: Instruction,
860 };
861
862 const testcases = [_]Testcase{
863 .{ // pop { r6 }
864 .actual = Instruction.pop(.al, .{.r6}),
865 .expected = Instruction.ldr(.al, .r6, .sp, .{
866 .pre_index = false,
867 .positive = true,
868 .offset = Instruction.Offset.imm(4),
869 .write_back = false,
870 }),
871 },
872 .{ // pop { r1, r5 }
873 .actual = Instruction.pop(.al, .{ .r1, .r5 }),
874 .expected = Instruction.ldm(.al, .sp, true, .{ .r1 = true, .r5 = true }),
875 },
876 .{ // push { r3 }
877 .actual = Instruction.push(.al, .{.r3}),
878 .expected = Instruction.str(.al, .r3, .sp, .{
879 .pre_index = true,
880 .positive = false,
881 .offset = Instruction.Offset.imm(4),
882 .write_back = true,
883 }),
884 },
885 .{ // push { r0, r2 }
886 .actual = Instruction.push(.al, .{ .r0, .r2 }),
887 .expected = Instruction.stmdb(.al, .sp, true, .{ .r0 = true, .r2 = true }),
888 },
889 };
890
891 for (testcases) |case| {
892 testing.expectEqual(case.expected.toU32(), case.actual.toU32());
893 }
894}