Commit d1429a8fa98f85c9fb8d2bd99b7c31eb9de38b38 | zig

author	Jakub Konka <kubkon@jakubkonka.com> 2024-02-17 13:13:03+01:00
committer	Jakub Konka <kubkon@jakubkonka.com> 2024-02-17 13:13:03+01:00
log	d1429a8fa98f85c9fb8d2bd99b7c31eb9de38b38
tree	913955925f9976a200c9e72615cf06fc100a446a
parent	509c7149b9f30e3271f2f8ba7669b95d2d240b9b

lib/std/elf: refactor reloc enum values

5 files changed, 356 insertions(+), 357 deletions(-)

lib
- std
  - elf.zig
src
- arch
  - x86_64
    Emit.zig
- link
  - Elf
    Atom.zig
    eh_frame.zig
    relocation.zig

lib/std/elf.zig+235-235

...	...	@@ -1808,426 +1808,426 @@ pub const COMPRESS = enum(u32) {
1808	1808	/// AMD x86-64 relocations.
1809	1809	pub const R_X86_64 = enum(u32) {
1810	1810	/// No reloc
1811		R_X86_64_NONE = 0,
	1811	NONE = 0,
1812	1812	/// Direct 64 bit
1813		R_X86_64_64 = 1,
	1813	@"64" = 1,
1814	1814	/// PC relative 32 bit signed
1815		R_X86_64_PC32 = 2,
	1815	PC32 = 2,
1816	1816	/// 32 bit GOT entry
1817		R_X86_64_GOT32 = 3,
	1817	GOT32 = 3,
1818	1818	/// 32 bit PLT address
1819		R_X86_64_PLT32 = 4,
	1819	PLT32 = 4,
1820	1820	/// Copy symbol at runtime
1821		R_X86_64_COPY = 5,
	1821	COPY = 5,
1822	1822	/// Create GOT entry
1823		R_X86_64_GLOB_DAT = 6,
	1823	GLOB_DAT = 6,
1824	1824	/// Create PLT entry
1825		R_X86_64_JUMP_SLOT = 7,
	1825	JUMP_SLOT = 7,
1826	1826	/// Adjust by program base
1827		R_X86_64_RELATIVE = 8,
	1827	RELATIVE = 8,
1828	1828	/// 32 bit signed PC relative offset to GOT
1829		R_X86_64_GOTPCREL = 9,
	1829	GOTPCREL = 9,
1830	1830	/// Direct 32 bit zero extended
1831		R_X86_64_32 = 10,
	1831	@"32" = 10,
1832	1832	/// Direct 32 bit sign extended
1833		R_X86_64_32S = 11,
	1833	@"32S" = 11,
1834	1834	/// Direct 16 bit zero extended
1835		R_X86_64_16 = 12,
	1835	@"16" = 12,
1836	1836	/// 16 bit sign extended pc relative
1837		R_X86_64_PC16 = 13,
	1837	PC16 = 13,
1838	1838	/// Direct 8 bit sign extended
1839		R_X86_64_8 = 14,
	1839	@"8" = 14,
1840	1840	/// 8 bit sign extended pc relative
1841		R_X86_64_PC8 = 15,
	1841	PC8 = 15,
1842	1842	/// ID of module containing symbol
1843		R_X86_64_DTPMOD64 = 16,
	1843	DTPMOD64 = 16,
1844	1844	/// Offset in module's TLS block
1845		R_X86_64_DTPOFF64 = 17,
	1845	DTPOFF64 = 17,
1846	1846	/// Offset in initial TLS block
1847		R_X86_64_TPOFF64 = 18,
	1847	TPOFF64 = 18,
1848	1848	/// 32 bit signed PC relative offset to two GOT entries for GD symbol
1849		R_X86_64_TLSGD = 19,
	1849	TLSGD = 19,
1850	1850	/// 32 bit signed PC relative offset to two GOT entries for LD symbol
1851		R_X86_64_TLSLD = 20,
	1851	TLSLD = 20,
1852	1852	/// Offset in TLS block
1853		R_X86_64_DTPOFF32 = 21,
	1853	DTPOFF32 = 21,
1854	1854	/// 32 bit signed PC relative offset to GOT entry for IE symbol
1855		R_X86_64_GOTTPOFF = 22,
	1855	GOTTPOFF = 22,
1856	1856	/// Offset in initial TLS block
1857		R_X86_64_TPOFF32 = 23,
	1857	TPOFF32 = 23,
1858	1858	/// PC relative 64 bit
1859		R_X86_64_PC64 = 24,
	1859	PC64 = 24,
1860	1860	/// 64 bit offset to GOT
1861		R_X86_64_GOTOFF64 = 25,
	1861	GOTOFF64 = 25,
1862	1862	/// 32 bit signed pc relative offset to GOT
1863		R_X86_64_GOTPC32 = 26,
	1863	GOTPC32 = 26,
1864	1864	/// 64 bit GOT entry offset
1865		R_X86_64_GOT64 = 27,
	1865	GOT64 = 27,
1866	1866	/// 64 bit PC relative offset to GOT entry
1867		R_X86_64_GOTPCREL64 = 28,
	1867	GOTPCREL64 = 28,
1868	1868	/// 64 bit PC relative offset to GOT
1869		R_X86_64_GOTPC64 = 29,
	1869	GOTPC64 = 29,
1870	1870	/// Like GOT64, says PLT entry needed
1871		R_X86_64_GOTPLT64 = 30,
	1871	GOTPLT64 = 30,
1872	1872	/// 64-bit GOT relative offset to PLT entry
1873		R_X86_64_PLTOFF64 = 31,
	1873	PLTOFF64 = 31,
1874	1874	/// Size of symbol plus 32-bit addend
1875		R_X86_64_SIZE32 = 32,
	1875	SIZE32 = 32,
1876	1876	/// Size of symbol plus 64-bit addend
1877		R_X86_64_SIZE64 = 33,
	1877	SIZE64 = 33,
1878	1878	/// GOT offset for TLS descriptor
1879		R_X86_64_GOTPC32_TLSDESC = 34,
	1879	GOTPC32_TLSDESC = 34,
1880	1880	/// Marker for call through TLS descriptor
1881		R_X86_64_TLSDESC_CALL = 35,
	1881	TLSDESC_CALL = 35,
1882	1882	/// TLS descriptor
1883		R_X86_64_TLSDESC = 36,
	1883	TLSDESC = 36,
1884	1884	/// Adjust indirectly by program base
1885		R_X86_64_IRELATIVE = 37,
	1885	IRELATIVE = 37,
1886	1886	/// 64-bit adjust by program base
1887		R_X86_64_RELATIVE64 = 38,
1888		/// 39 Reserved was R_X86_64_PC32_BND
1889		/// 40 Reserved was R_X86_64_PLT32_BND
	1887	RELATIVE64 = 38,
	1888	/// 39 Reserved was PC32_BND
	1889	/// 40 Reserved was PLT32_BND
1890	1890	/// Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable
1891		R_X86_64_GOTPCRELX = 41,
	1891	GOTPCRELX = 41,
1892	1892	/// Load from 32 bit signed PC relative offset to GOT entry with REX prefix, relaxable
1893		R_X86_64_REX_GOTPCRELX = 42,
	1893	REX_GOTPCRELX = 42,
1894	1894	_,
1895	1895	};
1896	1896
1897	1897	/// AArch64 relocs.
1898	1898	pub const R_AARCH64 = enum(u32) {
1899	1899	/// No relocation.
1900		R_AARCH64_NONE = 0,
	1900	NONE = 0,
1901	1901	/// ILP32 AArch64 relocs.
1902	1902	/// Direct 32 bit.
1903		R_AARCH64_P32_ABS32 = 1,
	1903	P32_ABS32 = 1,
1904	1904	/// Copy symbol at runtime.
1905		R_AARCH64_P32_COPY = 180,
	1905	P32_COPY = 180,
1906	1906	/// Create GOT entry.
1907		R_AARCH64_P32_GLOB_DAT = 181,
	1907	P32_GLOB_DAT = 181,
1908	1908	/// Create PLT entry.
1909		R_AARCH64_P32_JUMP_SLOT = 182,
	1909	P32_JUMP_SLOT = 182,
1910	1910	/// Adjust by program base.
1911		R_AARCH64_P32_RELATIVE = 183,
	1911	P32_RELATIVE = 183,
1912	1912	/// Module number, 32 bit.
1913		R_AARCH64_P32_TLS_DTPMOD = 184,
	1913	P32_TLS_DTPMOD = 184,
1914	1914	/// Module-relative offset, 32 bit.
1915		R_AARCH64_P32_TLS_DTPREL = 185,
	1915	P32_TLS_DTPREL = 185,
1916	1916	/// TP-relative offset, 32 bit.
1917		R_AARCH64_P32_TLS_TPREL = 186,
	1917	P32_TLS_TPREL = 186,
1918	1918	/// TLS Descriptor.
1919		R_AARCH64_P32_TLSDESC = 187,
	1919	P32_TLSDESC = 187,
1920	1920	/// STT_GNU_IFUNC relocation.
1921		R_AARCH64_P32_IRELATIVE = 188,
	1921	P32_IRELATIVE = 188,
1922	1922	/// LP64 AArch64 relocs.
1923	1923	/// Direct 64 bit.
1924		R_AARCH64_ABS64 = 257,
	1924	ABS64 = 257,
1925	1925	/// Direct 32 bit.
1926		R_AARCH64_ABS32 = 258,
	1926	ABS32 = 258,
1927	1927	/// Direct 16-bit.
1928		R_AARCH64_ABS16 = 259,
	1928	ABS16 = 259,
1929	1929	/// PC-relative 64-bit.
1930		R_AARCH64_PREL64 = 260,
	1930	PREL64 = 260,
1931	1931	/// PC-relative 32-bit.
1932		R_AARCH64_PREL32 = 261,
	1932	PREL32 = 261,
1933	1933	/// PC-relative 16-bit.
1934		R_AARCH64_PREL16 = 262,
	1934	PREL16 = 262,
1935	1935	/// Dir. MOVZ imm. from bits 15:0.
1936		R_AARCH64_MOVW_UABS_G0 = 263,
	1936	MOVW_UABS_G0 = 263,
1937	1937	/// Likewise for MOVK; no check.
1938		R_AARCH64_MOVW_UABS_G0_NC = 264,
	1938	MOVW_UABS_G0_NC = 264,
1939	1939	/// Dir. MOVZ imm. from bits 31:16.
1940		R_AARCH64_MOVW_UABS_G1 = 265,
	1940	MOVW_UABS_G1 = 265,
1941	1941	/// Likewise for MOVK; no check.
1942		R_AARCH64_MOVW_UABS_G1_NC = 266,
	1942	MOVW_UABS_G1_NC = 266,
1943	1943	/// Dir. MOVZ imm. from bits 47:32.
1944		R_AARCH64_MOVW_UABS_G2 = 267,
	1944	MOVW_UABS_G2 = 267,
1945	1945	/// Likewise for MOVK; no check.
1946		R_AARCH64_MOVW_UABS_G2_NC = 268,
	1946	MOVW_UABS_G2_NC = 268,
1947	1947	/// Dir. MOV{K,Z} imm. from 63:48.
1948		R_AARCH64_MOVW_UABS_G3 = 269,
	1948	MOVW_UABS_G3 = 269,
1949	1949	/// Dir. MOV{N,Z} imm. from 15:0.
1950		R_AARCH64_MOVW_SABS_G0 = 270,
	1950	MOVW_SABS_G0 = 270,
1951	1951	/// Dir. MOV{N,Z} imm. from 31:16.
1952		R_AARCH64_MOVW_SABS_G1 = 271,
	1952	MOVW_SABS_G1 = 271,
1953	1953	/// Dir. MOV{N,Z} imm. from 47:32.
1954		R_AARCH64_MOVW_SABS_G2 = 272,
	1954	MOVW_SABS_G2 = 272,
1955	1955	/// PC-rel. LD imm. from bits 20:2.
1956		R_AARCH64_LD_PREL_LO19 = 273,
	1956	LD_PREL_LO19 = 273,
1957	1957	/// PC-rel. ADR imm. from bits 20:0.
1958		R_AARCH64_ADR_PREL_LO21 = 274,
	1958	ADR_PREL_LO21 = 274,
1959	1959	/// Page-rel. ADRP imm. from 32:12.
1960		R_AARCH64_ADR_PREL_PG_HI21 = 275,
	1960	ADR_PREL_PG_HI21 = 275,
1961	1961	/// Likewise; no overflow check.
1962		R_AARCH64_ADR_PREL_PG_HI21_NC = 276,
	1962	ADR_PREL_PG_HI21_NC = 276,
1963	1963	/// Dir. ADD imm. from bits 11:0.
1964		R_AARCH64_ADD_ABS_LO12_NC = 277,
	1964	ADD_ABS_LO12_NC = 277,
1965	1965	/// Likewise for LD/ST; no check.
1966		R_AARCH64_LDST8_ABS_LO12_NC = 278,
	1966	LDST8_ABS_LO12_NC = 278,
1967	1967	/// PC-rel. TBZ/TBNZ imm. from 15:2.
1968		R_AARCH64_TSTBR14 = 279,
	1968	TSTBR14 = 279,
1969	1969	/// PC-rel. cond. br. imm. from 20:2.
1970		R_AARCH64_CONDBR19 = 280,
	1970	CONDBR19 = 280,
1971	1971	/// PC-rel. B imm. from bits 27:2.
1972		R_AARCH64_JUMP26 = 282,
	1972	JUMP26 = 282,
1973	1973	/// Likewise for CALL.
1974		R_AARCH64_CALL26 = 283,
	1974	CALL26 = 283,
1975	1975	/// Dir. ADD imm. from bits 11:1.
1976		R_AARCH64_LDST16_ABS_LO12_NC = 284,
	1976	LDST16_ABS_LO12_NC = 284,
1977	1977	/// Likewise for bits 11:2.
1978		R_AARCH64_LDST32_ABS_LO12_NC = 285,
	1978	LDST32_ABS_LO12_NC = 285,
1979	1979	/// Likewise for bits 11:3.
1980		R_AARCH64_LDST64_ABS_LO12_NC = 286,
	1980	LDST64_ABS_LO12_NC = 286,
1981	1981	/// PC-rel. MOV{N,Z} imm. from 15:0.
1982		R_AARCH64_MOVW_PREL_G0 = 287,
	1982	MOVW_PREL_G0 = 287,
1983	1983	/// Likewise for MOVK; no check.
1984		R_AARCH64_MOVW_PREL_G0_NC = 288,
	1984	MOVW_PREL_G0_NC = 288,
1985	1985	/// PC-rel. MOV{N,Z} imm. from 31:16.
1986		R_AARCH64_MOVW_PREL_G1 = 289,
	1986	MOVW_PREL_G1 = 289,
1987	1987	/// Likewise for MOVK; no check.
1988		R_AARCH64_MOVW_PREL_G1_NC = 290,
	1988	MOVW_PREL_G1_NC = 290,
1989	1989	/// PC-rel. MOV{N,Z} imm. from 47:32.
1990		R_AARCH64_MOVW_PREL_G2 = 291,
	1990	MOVW_PREL_G2 = 291,
1991	1991	/// Likewise for MOVK; no check.
1992		R_AARCH64_MOVW_PREL_G2_NC = 292,
	1992	MOVW_PREL_G2_NC = 292,
1993	1993	/// PC-rel. MOV{N,Z} imm. from 63:48.
1994		R_AARCH64_MOVW_PREL_G3 = 293,
	1994	MOVW_PREL_G3 = 293,
1995	1995	/// Dir. ADD imm. from bits 11:4.
1996		R_AARCH64_LDST128_ABS_LO12_NC = 299,
	1996	LDST128_ABS_LO12_NC = 299,
1997	1997	/// GOT-rel. off. MOV{N,Z} imm. 15:0.
1998		R_AARCH64_MOVW_GOTOFF_G0 = 300,
	1998	MOVW_GOTOFF_G0 = 300,
1999	1999	/// Likewise for MOVK; no check.
2000		R_AARCH64_MOVW_GOTOFF_G0_NC = 301,
	2000	MOVW_GOTOFF_G0_NC = 301,
2001	2001	/// GOT-rel. o. MOV{N,Z} imm. 31:16.
2002		R_AARCH64_MOVW_GOTOFF_G1 = 302,
	2002	MOVW_GOTOFF_G1 = 302,
2003	2003	/// Likewise for MOVK; no check.
2004		R_AARCH64_MOVW_GOTOFF_G1_NC = 303,
	2004	MOVW_GOTOFF_G1_NC = 303,
2005	2005	/// GOT-rel. o. MOV{N,Z} imm. 47:32.
2006		R_AARCH64_MOVW_GOTOFF_G2 = 304,
	2006	MOVW_GOTOFF_G2 = 304,
2007	2007	/// Likewise for MOVK; no check.
2008		R_AARCH64_MOVW_GOTOFF_G2_NC = 305,
	2008	MOVW_GOTOFF_G2_NC = 305,
2009	2009	/// GOT-rel. o. MOV{N,Z} imm. 63:48.
2010		R_AARCH64_MOVW_GOTOFF_G3 = 306,
	2010	MOVW_GOTOFF_G3 = 306,
2011	2011	/// GOT-relative 64-bit.
2012		R_AARCH64_GOTREL64 = 307,
	2012	GOTREL64 = 307,
2013	2013	/// GOT-relative 32-bit.
2014		R_AARCH64_GOTREL32 = 308,
	2014	GOTREL32 = 308,
2015	2015	/// PC-rel. GOT off. load imm. 20:2.
2016		R_AARCH64_GOT_LD_PREL19 = 309,
	2016	GOT_LD_PREL19 = 309,
2017	2017	/// GOT-rel. off. LD/ST imm. 14:3.
2018		R_AARCH64_LD64_GOTOFF_LO15 = 310,
	2018	LD64_GOTOFF_LO15 = 310,
2019	2019	/// P-page-rel. GOT off. ADRP 32:12.
2020		R_AARCH64_ADR_GOT_PAGE = 311,
	2020	ADR_GOT_PAGE = 311,
2021	2021	/// Dir. GOT off. LD/ST imm. 11:3.
2022		R_AARCH64_LD64_GOT_LO12_NC = 312,
	2022	LD64_GOT_LO12_NC = 312,
2023	2023	/// GOT-page-rel. GOT off. LD/ST 14:3
2024		R_AARCH64_LD64_GOTPAGE_LO15 = 313,
	2024	LD64_GOTPAGE_LO15 = 313,
2025	2025	/// PC-relative ADR imm. 20:0.
2026		R_AARCH64_TLSGD_ADR_PREL21 = 512,
	2026	TLSGD_ADR_PREL21 = 512,
2027	2027	/// page-rel. ADRP imm. 32:12.
2028		R_AARCH64_TLSGD_ADR_PAGE21 = 513,
	2028	TLSGD_ADR_PAGE21 = 513,
2029	2029	/// direct ADD imm. from 11:0.
2030		R_AARCH64_TLSGD_ADD_LO12_NC = 514,
	2030	TLSGD_ADD_LO12_NC = 514,
2031	2031	/// GOT-rel. MOV{N,Z} 31:16.
2032		R_AARCH64_TLSGD_MOVW_G1 = 515,
	2032	TLSGD_MOVW_G1 = 515,
2033	2033	/// GOT-rel. MOVK imm. 15:0.
2034		R_AARCH64_TLSGD_MOVW_G0_NC = 516,
	2034	TLSGD_MOVW_G0_NC = 516,
2035	2035	/// Like 512; local dynamic model.
2036		R_AARCH64_TLSLD_ADR_PREL21 = 517,
	2036	TLSLD_ADR_PREL21 = 517,
2037	2037	/// Like 513; local dynamic model.
2038		R_AARCH64_TLSLD_ADR_PAGE21 = 518,
	2038	TLSLD_ADR_PAGE21 = 518,
2039	2039	/// Like 514; local dynamic model.
2040		R_AARCH64_TLSLD_ADD_LO12_NC = 519,
	2040	TLSLD_ADD_LO12_NC = 519,
2041	2041	/// Like 515; local dynamic model.
2042		R_AARCH64_TLSLD_MOVW_G1 = 520,
	2042	TLSLD_MOVW_G1 = 520,
2043	2043	/// Like 516; local dynamic model.
2044		R_AARCH64_TLSLD_MOVW_G0_NC = 521,
	2044	TLSLD_MOVW_G0_NC = 521,
2045	2045	/// TLS PC-rel. load imm. 20:2.
2046		R_AARCH64_TLSLD_LD_PREL19 = 522,
	2046	TLSLD_LD_PREL19 = 522,
2047	2047	/// TLS DTP-rel. MOV{N,Z} 47:32.
2048		R_AARCH64_TLSLD_MOVW_DTPREL_G2 = 523,
	2048	TLSLD_MOVW_DTPREL_G2 = 523,
2049	2049	/// TLS DTP-rel. MOV{N,Z} 31:16.
2050		R_AARCH64_TLSLD_MOVW_DTPREL_G1 = 524,
	2050	TLSLD_MOVW_DTPREL_G1 = 524,
2051	2051	/// Likewise; MOVK; no check.
2052		R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC = 525,
	2052	TLSLD_MOVW_DTPREL_G1_NC = 525,
2053	2053	/// TLS DTP-rel. MOV{N,Z} 15:0.
2054		R_AARCH64_TLSLD_MOVW_DTPREL_G0 = 526,
	2054	TLSLD_MOVW_DTPREL_G0 = 526,
2055	2055	/// Likewise; MOVK; no check.
2056		R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC = 527,
	2056	TLSLD_MOVW_DTPREL_G0_NC = 527,
2057	2057	/// DTP-rel. ADD imm. from 23:12.
2058		R_AARCH64_TLSLD_ADD_DTPREL_HI12 = 528,
	2058	TLSLD_ADD_DTPREL_HI12 = 528,
2059	2059	/// DTP-rel. ADD imm. from 11:0.
2060		R_AARCH64_TLSLD_ADD_DTPREL_LO12 = 529,
	2060	TLSLD_ADD_DTPREL_LO12 = 529,
2061	2061	/// Likewise; no ovfl. check.
2062		R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC = 530,
	2062	TLSLD_ADD_DTPREL_LO12_NC = 530,
2063	2063	/// DTP-rel. LD/ST imm. 11:0.
2064		R_AARCH64_TLSLD_LDST8_DTPREL_LO12 = 531,
	2064	TLSLD_LDST8_DTPREL_LO12 = 531,
2065	2065	/// Likewise; no check.
2066		R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC = 532,
	2066	TLSLD_LDST8_DTPREL_LO12_NC = 532,
2067	2067	/// DTP-rel. LD/ST imm. 11:1.
2068		R_AARCH64_TLSLD_LDST16_DTPREL_LO12 = 533,
	2068	TLSLD_LDST16_DTPREL_LO12 = 533,
2069	2069	/// Likewise; no check.
2070		R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC = 534,
	2070	TLSLD_LDST16_DTPREL_LO12_NC = 534,
2071	2071	/// DTP-rel. LD/ST imm. 11:2.
2072		R_AARCH64_TLSLD_LDST32_DTPREL_LO12 = 535,
	2072	TLSLD_LDST32_DTPREL_LO12 = 535,
2073	2073	/// Likewise; no check.
2074		R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC = 536,
	2074	TLSLD_LDST32_DTPREL_LO12_NC = 536,
2075	2075	/// DTP-rel. LD/ST imm. 11:3.
2076		R_AARCH64_TLSLD_LDST64_DTPREL_LO12 = 537,
	2076	TLSLD_LDST64_DTPREL_LO12 = 537,
2077	2077	/// Likewise; no check.
2078		R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC = 538,
	2078	TLSLD_LDST64_DTPREL_LO12_NC = 538,
2079	2079	/// GOT-rel. MOV{N,Z} 31:16.
2080		R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 = 539,
	2080	TLSIE_MOVW_GOTTPREL_G1 = 539,
2081	2081	/// GOT-rel. MOVK 15:0.
2082		R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC = 540,
	2082	TLSIE_MOVW_GOTTPREL_G0_NC = 540,
2083	2083	/// Page-rel. ADRP 32:12.
2084		R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 = 541,
	2084	TLSIE_ADR_GOTTPREL_PAGE21 = 541,
2085	2085	/// Direct LD off. 11:3.
2086		R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC = 542,
	2086	TLSIE_LD64_GOTTPREL_LO12_NC = 542,
2087	2087	/// PC-rel. load imm. 20:2.
2088		R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 = 543,
	2088	TLSIE_LD_GOTTPREL_PREL19 = 543,
2089	2089	/// TLS TP-rel. MOV{N,Z} 47:32.
2090		R_AARCH64_TLSLE_MOVW_TPREL_G2 = 544,
	2090	TLSLE_MOVW_TPREL_G2 = 544,
2091	2091	/// TLS TP-rel. MOV{N,Z} 31:16.
2092		R_AARCH64_TLSLE_MOVW_TPREL_G1 = 545,
	2092	TLSLE_MOVW_TPREL_G1 = 545,
2093	2093	/// Likewise; MOVK; no check.
2094		R_AARCH64_TLSLE_MOVW_TPREL_G1_NC = 546,
	2094	TLSLE_MOVW_TPREL_G1_NC = 546,
2095	2095	/// TLS TP-rel. MOV{N,Z} 15:0.
2096		R_AARCH64_TLSLE_MOVW_TPREL_G0 = 547,
	2096	TLSLE_MOVW_TPREL_G0 = 547,
2097	2097	/// Likewise; MOVK; no check.
2098		R_AARCH64_TLSLE_MOVW_TPREL_G0_NC = 548,
	2098	TLSLE_MOVW_TPREL_G0_NC = 548,
2099	2099	/// TP-rel. ADD imm. 23:12.
2100		R_AARCH64_TLSLE_ADD_TPREL_HI12 = 549,
	2100	TLSLE_ADD_TPREL_HI12 = 549,
2101	2101	/// TP-rel. ADD imm. 11:0.
2102		R_AARCH64_TLSLE_ADD_TPREL_LO12 = 550,
	2102	TLSLE_ADD_TPREL_LO12 = 550,
2103	2103	/// Likewise; no ovfl. check.
2104		R_AARCH64_TLSLE_ADD_TPREL_LO12_NC = 551,
	2104	TLSLE_ADD_TPREL_LO12_NC = 551,
2105	2105	/// TP-rel. LD/ST off. 11:0.
2106		R_AARCH64_TLSLE_LDST8_TPREL_LO12 = 552,
	2106	TLSLE_LDST8_TPREL_LO12 = 552,
2107	2107	/// Likewise; no ovfl. check.
2108		R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC = 553,
	2108	TLSLE_LDST8_TPREL_LO12_NC = 553,
2109	2109	/// TP-rel. LD/ST off. 11:1.
2110		R_AARCH64_TLSLE_LDST16_TPREL_LO12 = 554,
	2110	TLSLE_LDST16_TPREL_LO12 = 554,
2111	2111	/// Likewise; no check.
2112		R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC = 555,
	2112	TLSLE_LDST16_TPREL_LO12_NC = 555,
2113	2113	/// TP-rel. LD/ST off. 11:2.
2114		R_AARCH64_TLSLE_LDST32_TPREL_LO12 = 556,
	2114	TLSLE_LDST32_TPREL_LO12 = 556,
2115	2115	/// Likewise; no check.
2116		R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC = 557,
	2116	TLSLE_LDST32_TPREL_LO12_NC = 557,
2117	2117	/// TP-rel. LD/ST off. 11:3.
2118		R_AARCH64_TLSLE_LDST64_TPREL_LO12 = 558,
	2118	TLSLE_LDST64_TPREL_LO12 = 558,
2119	2119	/// Likewise; no check.
2120		R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC = 559,
	2120	TLSLE_LDST64_TPREL_LO12_NC = 559,
2121	2121	/// PC-rel. load immediate 20:2.
2122		R_AARCH64_TLSDESC_LD_PREL19 = 560,
	2122	TLSDESC_LD_PREL19 = 560,
2123	2123	/// PC-rel. ADR immediate 20:0.
2124		R_AARCH64_TLSDESC_ADR_PREL21 = 561,
	2124	TLSDESC_ADR_PREL21 = 561,
2125	2125	/// Page-rel. ADRP imm. 32:12.
2126		R_AARCH64_TLSDESC_ADR_PAGE21 = 562,
	2126	TLSDESC_ADR_PAGE21 = 562,
2127	2127	/// Direct LD off. from 11:3.
2128		R_AARCH64_TLSDESC_LD64_LO12 = 563,
	2128	TLSDESC_LD64_LO12 = 563,
2129	2129	/// Direct ADD imm. from 11:0.
2130		R_AARCH64_TLSDESC_ADD_LO12 = 564,
	2130	TLSDESC_ADD_LO12 = 564,
2131	2131	/// GOT-rel. MOV{N,Z} imm. 31:16.
2132		R_AARCH64_TLSDESC_OFF_G1 = 565,
	2132	TLSDESC_OFF_G1 = 565,
2133	2133	/// GOT-rel. MOVK imm. 15:0; no ck.
2134		R_AARCH64_TLSDESC_OFF_G0_NC = 566,
	2134	TLSDESC_OFF_G0_NC = 566,
2135	2135	/// Relax LDR.
2136		R_AARCH64_TLSDESC_LDR = 567,
	2136	TLSDESC_LDR = 567,
2137	2137	/// Relax ADD.
2138		R_AARCH64_TLSDESC_ADD = 568,
	2138	TLSDESC_ADD = 568,
2139	2139	/// Relax BLR.
2140		R_AARCH64_TLSDESC_CALL = 569,
	2140	TLSDESC_CALL = 569,
2141	2141	/// TP-rel. LD/ST off. 11:4.
2142		R_AARCH64_TLSLE_LDST128_TPREL_LO12 = 570,
	2142	TLSLE_LDST128_TPREL_LO12 = 570,
2143	2143	/// Likewise; no check.
2144		R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC = 571,
	2144	TLSLE_LDST128_TPREL_LO12_NC = 571,
2145	2145	/// DTP-rel. LD/ST imm. 11:4.
2146		R_AARCH64_TLSLD_LDST128_DTPREL_LO12 = 572,
	2146	TLSLD_LDST128_DTPREL_LO12 = 572,
2147	2147	/// Likewise; no check.
2148		R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC = 573,
	2148	TLSLD_LDST128_DTPREL_LO12_NC = 573,
2149	2149	/// Copy symbol at runtime.
2150		R_AARCH64_COPY = 1024,
	2150	COPY = 1024,
2151	2151	/// Create GOT entry.
2152		R_AARCH64_GLOB_DAT = 1025,
	2152	GLOB_DAT = 1025,
2153	2153	/// Create PLT entry.
2154		R_AARCH64_JUMP_SLOT = 1026,
	2154	JUMP_SLOT = 1026,
2155	2155	/// Adjust by program base.
2156		R_AARCH64_RELATIVE = 1027,
	2156	RELATIVE = 1027,
2157	2157	/// Module number, 64 bit.
2158		R_AARCH64_TLS_DTPMOD = 1028,
	2158	TLS_DTPMOD = 1028,
2159	2159	/// Module-relative offset, 64 bit.
2160		R_AARCH64_TLS_DTPREL = 1029,
	2160	TLS_DTPREL = 1029,
2161	2161	/// TP-relative offset, 64 bit.
2162		R_AARCH64_TLS_TPREL = 1030,
	2162	TLS_TPREL = 1030,
2163	2163	/// TLS Descriptor.
2164		R_AARCH64_TLSDESC = 1031,
	2164	TLSDESC = 1031,
2165	2165	/// STT_GNU_IFUNC relocation.
2166		R_AARCH64_IRELATIVE = 1032,
	2166	IRELATIVE = 1032,
2167	2167	_,
2168	2168	};
2169	2169
2170	2170	/// RISC-V relocations.
2171	2171	pub const R_RISCV = enum(u32) {
2172		R_RISCV_NONE = 0,
2173		R_RISCV_32 = 1,
2174		R_RISCV_64 = 2,
2175		R_RISCV_RELATIVE = 3,
2176		R_RISCV_COPY = 4,
2177		R_RISCV_JUMP_SLOT = 5,
2178		R_RISCV_TLS_DTPMOD32 = 6,
2179		R_RISCV_TLS_DTPMOD64 = 7,
2180		R_RISCV_TLS_DTPREL32 = 8,
2181		R_RISCV_TLS_DTPREL64 = 9,
2182		R_RISCV_TLS_TPREL32 = 10,
2183		R_RISCV_TLS_TPREL64 = 11,
2184		R_RISCV_TLSDESC = 12,
2185		R_RISCV_BRANCH = 16,
2186		R_RISCV_JAL = 17,
2187		R_RISCV_CALL = 18,
2188		R_RISCV_CALL_PLT = 19,
2189		R_RISCV_GOT_HI20 = 20,
2190		R_RISCV_TLS_GOT_HI20 = 21,
2191		R_RISCV_TLS_GD_HI20 = 22,
2192		R_RISCV_PCREL_HI20 = 23,
2193		R_RISCV_PCREL_LO12_I = 24,
2194		R_RISCV_PCREL_LO12_S = 25,
2195		R_RISCV_HI20 = 26,
2196		R_RISCV_LO12_I = 27,
2197		R_RISCV_LO12_S = 28,
2198		R_RISCV_TPREL_HI20 = 29,
2199		R_RISCV_TPREL_LO12_I = 30,
2200		R_RISCV_TPREL_LO12_S = 31,
2201		R_RISCV_TPREL_ADD = 32,
2202		R_RISCV_ADD8 = 33,
2203		R_RISCV_ADD16 = 34,
2204		R_RISCV_ADD32 = 35,
2205		R_RISCV_ADD64 = 36,
2206		R_RISCV_SUB8 = 37,
2207		R_RISCV_SUB16 = 38,
2208		R_RISCV_SUB32 = 39,
2209		R_RISCV_SUB64 = 40,
2210		R_RISCV_GNU_VTINHERIT = 41,
2211		R_RISCV_GNU_VTENTRY = 42,
2212		R_RISCV_ALIGN = 43,
2213		R_RISCV_RVC_BRANCH = 44,
2214		R_RISCV_RVC_JUMP = 45,
2215		R_RISCV_RVC_LUI = 46,
2216		R_RISCV_GPREL_I = 47,
2217		R_RISCV_GPREL_S = 48,
2218		R_RISCV_TPREL_I = 49,
2219		R_RISCV_TPREL_S = 50,
2220		R_RISCV_RELAX = 51,
2221		R_RISCV_SUB6 = 52,
2222		R_RISCV_SET6 = 53,
2223		R_RISCV_SET8 = 54,
2224		R_RISCV_SET16 = 55,
2225		R_RISCV_SET32 = 56,
2226		R_RISCV_32_PCREL = 57,
2227		R_RISCV_IRELATIVE = 58,
2228		R_RISCV_PLT32 = 59,
2229		R_RISCV_SET_ULEB128 = 60,
2230		R_RISCV_SUB_ULEB128 = 61,
	2172	NONE = 0,
	2173	@"32" = 1,
	2174	@"64" = 2,
	2175	RELATIVE = 3,
	2176	COPY = 4,
	2177	JUMP_SLOT = 5,
	2178	TLS_DTPMOD32 = 6,
	2179	TLS_DTPMOD64 = 7,
	2180	TLS_DTPREL32 = 8,
	2181	TLS_DTPREL64 = 9,
	2182	TLS_TPREL32 = 10,
	2183	TLS_TPREL64 = 11,
	2184	TLSDESC = 12,
	2185	BRANCH = 16,
	2186	JAL = 17,
	2187	CALL = 18,
	2188	CALL_PLT = 19,
	2189	GOT_HI20 = 20,
	2190	TLS_GOT_HI20 = 21,
	2191	TLS_GD_HI20 = 22,
	2192	PCREL_HI20 = 23,
	2193	PCREL_LO12_I = 24,
	2194	PCREL_LO12_S = 25,
	2195	HI20 = 26,
	2196	LO12_I = 27,
	2197	LO12_S = 28,
	2198	TPREL_HI20 = 29,
	2199	TPREL_LO12_I = 30,
	2200	TPREL_LO12_S = 31,
	2201	TPREL_ADD = 32,
	2202	ADD8 = 33,
	2203	ADD16 = 34,
	2204	ADD32 = 35,
	2205	ADD64 = 36,
	2206	SUB8 = 37,
	2207	SUB16 = 38,
	2208	SUB32 = 39,
	2209	SUB64 = 40,
	2210	GNU_VTINHERIT = 41,
	2211	GNU_VTENTRY = 42,
	2212	ALIGN = 43,
	2213	RVC_BRANCH = 44,
	2214	RVC_JUMP = 45,
	2215	RVC_LUI = 46,
	2216	GPREL_I = 47,
	2217	GPREL_S = 48,
	2218	TPREL_I = 49,
	2219	TPREL_S = 50,
	2220	RELAX = 51,
	2221	SUB6 = 52,
	2222	SET6 = 53,
	2223	SET8 = 54,
	2224	SET16 = 55,
	2225	SET32 = 56,
	2226	@"32_PCREL" = 57,
	2227	IRELATIVE = 58,
	2228	PLT32 = 59,
	2229	SET_ULEB128 = 60,
	2230	SUB_ULEB128 = 61,
2231	2231	_,
2232	2232	};
2233	2233

src/arch/x86_64/Emit.zig+9-9

...	...	@@ -43,7 +43,7 @@ pub fn emitMir(emit: *Emit) Error!void {
43	43	.linker_extern_fn => \|symbol\| if (emit.lower.bin_file.cast(link.File.Elf)) \|elf_file\| {
44	44	// Add relocation to the decl.
45	45	const atom_ptr = elf_file.symbol(symbol.atom_index).atom(elf_file).?;
46		const r_type = @intFromEnum(std.elf.R_X86_64.R_X86_64_PLT32);
	46	const r_type = @intFromEnum(std.elf.R_X86_64.PLT32);
47	47	try atom_ptr.addReloc(elf_file, .{
48	48	.r_offset = end_offset - 4,
49	49	.r_info = (@as(u64, @intCast(symbol.sym_index)) << 32) \| r_type,
...	...	@@ -89,7 +89,7 @@ pub fn emitMir(emit: *Emit) Error!void {
89	89	.linker_tlsld => \|data\| {
90	90	const elf_file = emit.lower.bin_file.cast(link.File.Elf).?;
91	91	const atom = elf_file.symbol(data.atom_index).atom(elf_file).?;
92		const r_type = @intFromEnum(std.elf.R_X86_64.R_X86_64_TLSLD);
	92	const r_type = @intFromEnum(std.elf.R_X86_64.TLSLD);
93	93	try atom.addReloc(elf_file, .{
94	94	.r_offset = end_offset - 4,
95	95	.r_info = (@as(u64, @intCast(data.sym_index)) << 32) \| r_type,
...	...	@@ -99,7 +99,7 @@ pub fn emitMir(emit: *Emit) Error!void {
99	99	.linker_dtpoff => \|data\| {
100	100	const elf_file = emit.lower.bin_file.cast(link.File.Elf).?;
101	101	const atom = elf_file.symbol(data.atom_index).atom(elf_file).?;
102		const r_type = @intFromEnum(std.elf.R_X86_64.R_X86_64_DTPOFF32);
	102	const r_type = @intFromEnum(std.elf.R_X86_64.DTPOFF32);
103	103	try atom.addReloc(elf_file, .{
104	104	.r_offset = end_offset - 4,
105	105	.r_info = (@as(u64, @intCast(data.sym_index)) << 32) \| r_type,
...	...	@@ -122,9 +122,9 @@ pub fn emitMir(emit: *Emit) Error!void {
122	122	const r_type: u32 = if (sym.flags.needs_zig_got and !is_obj_or_static_lib)
123	123	link.File.Elf.R_ZIG_GOTPCREL
124	124	else if (sym.flags.needs_got)
125		@intFromEnum(std.elf.R_X86_64.R_X86_64_GOTPCREL)
	125	@intFromEnum(std.elf.R_X86_64.GOTPCREL)
126	126	else
127		@intFromEnum(std.elf.R_X86_64.R_X86_64_PC32);
	127	@intFromEnum(std.elf.R_X86_64.PC32);
128	128	try atom.addReloc(elf_file, .{
129	129	.r_offset = end_offset - 4,
130	130	.r_info = (@as(u64, @intCast(data.sym_index)) << 32) \| r_type,
...	...	@@ -132,7 +132,7 @@ pub fn emitMir(emit: *Emit) Error!void {
132	132	});
133	133	} else {
134	134	if (lowered_inst.encoding.mnemonic == .call and sym.flags.needs_zig_got and is_obj_or_static_lib) {
135		const r_type = @intFromEnum(std.elf.R_X86_64.R_X86_64_PC32);
	135	const r_type = @intFromEnum(std.elf.R_X86_64.PC32);
136	136	try atom.addReloc(elf_file, .{
137	137	.r_offset = end_offset - 4,
138	138	.r_info = (@as(u64, @intCast(data.sym_index)) << 32) \| r_type,
...	...	@@ -142,11 +142,11 @@ pub fn emitMir(emit: *Emit) Error!void {
142	142	const r_type: u32 = if (sym.flags.needs_zig_got and !is_obj_or_static_lib)
143	143	link.File.Elf.R_ZIG_GOT32
144	144	else if (sym.flags.needs_got)
145		@intFromEnum(std.elf.R_X86_64.R_X86_64_GOT32)
	145	@intFromEnum(std.elf.R_X86_64.GOT32)
146	146	else if (sym.flags.is_tls)
147		@intFromEnum(std.elf.R_X86_64.R_X86_64_TPOFF32)
	147	@intFromEnum(std.elf.R_X86_64.TPOFF32)
148	148	else
149		@intFromEnum(std.elf.R_X86_64.R_X86_64_32);
	149	@intFromEnum(std.elf.R_X86_64.@"32");
150	150	try atom.addReloc(elf_file, .{
151	151	.r_offset = end_offset - 4,
152	152	.r_info = (@as(u64, @intCast(data.sym_index)) << 32) \| r_type,

src/link/Elf/Atom.zig+72-72

...	...	@@ -386,7 +386,7 @@ pub fn scanRelocsRequiresCode(self: Atom, elf_file: *Elf) bool {
386	386	switch (cpu_arch) {
387	387	.x86_64 => {
388	388	const r_type: elf.R_X86_64 = @enumFromInt(rel.r_type());
389		if (r_type == .R_X86_64_GOTTPOFF) return true;
	389	if (r_type == .GOTTPOFF) return true;
390	390	},
391	391	else => {},
392	392	}
...	...	@@ -841,7 +841,7 @@ const x86_64 = struct {
841	841	const rel = rels[i];
842	842	const r_type: elf.R_X86_64 = @enumFromInt(rel.r_type());
843	843
844		if (r_type == .R_X86_64_NONE) continue;
	844	if (r_type == .NONE) continue;
845	845
846	846	const r_offset = std.math.cast(usize, rel.r_offset) orelse return error.Overflow;
847	847
...	...	@@ -874,40 +874,40 @@ const x86_64 = struct {
874	874	// While traversing relocations, mark symbols that require special handling such as
875	875	// pointer indirection via GOT, or a stub trampoline via PLT.
876	876	switch (r_type) {
877		.R_X86_64_64 => {
	877	.@"64" => {
878	878	try atom.scanReloc(symbol, rel, dynAbsRelocAction(symbol, elf_file), elf_file);
879	879	},
880	880
881		.R_X86_64_32,
882		.R_X86_64_32S,
	881	.@"32",
	882	.@"32S",
883	883	=> {
884	884	try atom.scanReloc(symbol, rel, dynAbsRelocAction(symbol, elf_file), elf_file);
885	885	},
886	886
887		.R_X86_64_GOT32,
888		.R_X86_64_GOTPC32,
889		.R_X86_64_GOTPC64,
890		.R_X86_64_GOTPCREL,
891		.R_X86_64_GOTPCREL64,
892		.R_X86_64_GOTPCRELX,
893		.R_X86_64_REX_GOTPCRELX,
	887	.GOT32,
	888	.GOTPC32,
	889	.GOTPC64,
	890	.GOTPCREL,
	891	.GOTPCREL64,
	892	.GOTPCRELX,
	893	.REX_GOTPCRELX,
894	894	=> {
895	895	symbol.flags.needs_got = true;
896	896	},
897	897
898		.R_X86_64_PLT32,
899		.R_X86_64_PLTOFF64,
	898	.PLT32,
	899	.PLTOFF64,
900	900	=> {
901	901	if (symbol.flags.import) {
902	902	symbol.flags.needs_plt = true;
903	903	}
904	904	},
905	905
906		.R_X86_64_PC32 => {
	906	.PC32 => {
907	907	try atom.scanReloc(symbol, rel, pcRelocAction(symbol, elf_file), elf_file);
908	908	},
909	909
910		.R_X86_64_TLSGD => {
	910	.TLSGD => {
911	911	// TODO verify followed by appropriate relocation such as PLT32 __tls_get_addr
912	912
913	913	if (is_static or (!symbol.flags.import and !is_dyn_lib)) {
...	...	@@ -922,7 +922,7 @@ const x86_64 = struct {
922	922	}
923	923	},
924	924
925		.R_X86_64_TLSLD => {
	925	.TLSLD => {
926	926	// TODO verify followed by appropriate relocation such as PLT32 __tls_get_addr
927	927
928	928	if (is_static or !is_dyn_lib) {
...	...	@@ -934,7 +934,7 @@ const x86_64 = struct {
934	934	}
935	935	},
936	936
937		.R_X86_64_GOTTPOFF => {
	937	.GOTTPOFF => {
938	938	const should_relax = blk: {
939	939	if (is_dyn_lib or symbol.flags.import) break :blk false;
940	940	if (!x86_64.canRelaxGotTpOff(code.?[r_offset - 3 ..])) break :blk false;
...	...	@@ -945,25 +945,25 @@ const x86_64 = struct {
945	945	}
946	946	},
947	947
948		.R_X86_64_GOTPC32_TLSDESC => {
	948	.GOTPC32_TLSDESC => {
949	949	const should_relax = is_static or (!is_dyn_lib and !symbol.flags.import);
950	950	if (!should_relax) {
951	951	symbol.flags.needs_tlsdesc = true;
952	952	}
953	953	},
954	954
955		.R_X86_64_TPOFF32,
956		.R_X86_64_TPOFF64,
	955	.TPOFF32,
	956	.TPOFF64,
957	957	=> {
958	958	if (is_dyn_lib) try atom.reportPicError(symbol, rel, elf_file);
959	959	},
960	960
961		.R_X86_64_GOTOFF64,
962		.R_X86_64_DTPOFF32,
963		.R_X86_64_DTPOFF64,
964		.R_X86_64_SIZE32,
965		.R_X86_64_SIZE64,
966		.R_X86_64_TLSDESC_CALL,
	961	.GOTOFF64,
	962	.DTPOFF32,
	963	.DTPOFF64,
	964	.SIZE32,
	965	.SIZE64,
	966	.TLSDESC_CALL,
967	967	=> {},
968	968
969	969	else => \|x\| switch (@intFromEnum(x)) {
...	...	@@ -990,7 +990,7 @@ const x86_64 = struct {
990	990	while (i < rels.len) : (i += 1) {
991	991	const rel = rels[i];
992	992	const r_type: elf.R_X86_64 = @enumFromInt(rel.r_type());
993		if (r_type == .R_X86_64_NONE) continue;
	993	if (r_type == .NONE) continue;
994	994
995	995	const target = switch (file_ptr) {
996	996	.zig_object => \|x\| elf_file.symbol(x.symbol(rel.r_sym())),
...	...	@@ -1040,9 +1040,9 @@ const x86_64 = struct {
1040	1040	try stream.seekTo(r_offset);
1041	1041
1042	1042	switch (r_type) {
1043		.R_X86_64_NONE => unreachable,
	1043	.NONE => unreachable,
1044	1044
1045		.R_X86_64_64 => {
	1045	.@"64" => {
1046	1046	try atom.resolveDynAbsReloc(
1047	1047	target,
1048	1048	rel,
...	...	@@ -1052,15 +1052,15 @@ const x86_64 = struct {
1052	1052	);
1053	1053	},
1054	1054
1055		.R_X86_64_PLT32,
1056		.R_X86_64_PC32,
	1055	.PLT32,
	1056	.PC32,
1057	1057	=> try cwriter.writeInt(i32, @as(i32, @intCast(S + A - P)), .little),
1058	1058
1059		.R_X86_64_GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A - P)), .little),
1060		.R_X86_64_GOTPC32 => try cwriter.writeInt(i32, @as(i32, @intCast(GOT + A - P)), .little),
1061		.R_X86_64_GOTPC64 => try cwriter.writeInt(i64, GOT + A - P, .little),
	1059	.GOTPCREL => try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A - P)), .little),
	1060	.GOTPC32 => try cwriter.writeInt(i32, @as(i32, @intCast(GOT + A - P)), .little),
	1061	.GOTPC64 => try cwriter.writeInt(i64, GOT + A - P, .little),
1062	1062
1063		.R_X86_64_GOTPCRELX => {
	1063	.GOTPCRELX => {
1064	1064	if (!target.flags.import and !target.isIFunc(elf_file) and !target.isAbs(elf_file)) blk: {
1065	1065	x86_64.relaxGotpcrelx(code[r_offset - 2 ..]) catch break :blk;
1066	1066	try cwriter.writeInt(i32, @as(i32, @intCast(S + A - P)), .little);
...	...	@@ -1069,7 +1069,7 @@ const x86_64 = struct {
1069	1069	try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A - P)), .little);
1070	1070	},
1071	1071
1072		.R_X86_64_REX_GOTPCRELX => {
	1072	.REX_GOTPCRELX => {
1073	1073	if (!target.flags.import and !target.isIFunc(elf_file) and !target.isAbs(elf_file)) blk: {
1074	1074	x86_64.relaxRexGotpcrelx(code[r_offset - 3 ..]) catch break :blk;
1075	1075	try cwriter.writeInt(i32, @as(i32, @intCast(S + A - P)), .little);
...	...	@@ -1078,16 +1078,16 @@ const x86_64 = struct {
1078	1078	try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A - P)), .little);
1079	1079	},
1080	1080
1081		.R_X86_64_32 => try cwriter.writeInt(u32, @as(u32, @truncate(@as(u64, @intCast(S + A)))), .little),
1082		.R_X86_64_32S => try cwriter.writeInt(i32, @as(i32, @truncate(S + A)), .little),
	1081	.@"32" => try cwriter.writeInt(u32, @as(u32, @truncate(@as(u64, @intCast(S + A)))), .little),
	1082	.@"32S" => try cwriter.writeInt(i32, @as(i32, @truncate(S + A)), .little),
1083	1083
1084		.R_X86_64_TPOFF32 => try cwriter.writeInt(i32, @as(i32, @truncate(S + A - TP)), .little),
1085		.R_X86_64_TPOFF64 => try cwriter.writeInt(i64, S + A - TP, .little),
	1084	.TPOFF32 => try cwriter.writeInt(i32, @as(i32, @truncate(S + A - TP)), .little),
	1085	.TPOFF64 => try cwriter.writeInt(i64, S + A - TP, .little),
1086	1086
1087		.R_X86_64_DTPOFF32 => try cwriter.writeInt(i32, @as(i32, @truncate(S + A - DTP)), .little),
1088		.R_X86_64_DTPOFF64 => try cwriter.writeInt(i64, S + A - DTP, .little),
	1087	.DTPOFF32 => try cwriter.writeInt(i32, @as(i32, @truncate(S + A - DTP)), .little),
	1088	.DTPOFF64 => try cwriter.writeInt(i64, S + A - DTP, .little),
1089	1089
1090		.R_X86_64_TLSGD => {
	1090	.TLSGD => {
1091	1091	if (target.flags.has_tlsgd) {
1092	1092	const S_ = @as(i64, @intCast(target.tlsGdAddress(elf_file)));
1093	1093	try cwriter.writeInt(i32, @as(i32, @intCast(S_ + A - P)), .little);
...	...	@@ -1107,7 +1107,7 @@ const x86_64 = struct {
1107	1107	}
1108	1108	},
1109	1109
1110		.R_X86_64_TLSLD => {
	1110	.TLSLD => {
1111	1111	if (elf_file.got.tlsld_index) \|entry_index\| {
1112	1112	const tlsld_entry = elf_file.got.entries.items[entry_index];
1113	1113	const S_ = @as(i64, @intCast(tlsld_entry.address(elf_file)));
...	...	@@ -1124,7 +1124,7 @@ const x86_64 = struct {
1124	1124	}
1125	1125	},
1126	1126
1127		.R_X86_64_GOTPC32_TLSDESC => {
	1127	.GOTPC32_TLSDESC => {
1128	1128	if (target.flags.has_tlsdesc) {
1129	1129	const S_ = @as(i64, @intCast(target.tlsDescAddress(elf_file)));
1130	1130	try cwriter.writeInt(i32, @as(i32, @intCast(S_ + A - P)), .little);
...	...	@@ -1134,12 +1134,12 @@ const x86_64 = struct {
1134	1134	}
1135	1135	},
1136	1136
1137		.R_X86_64_TLSDESC_CALL => if (!target.flags.has_tlsdesc) {
	1137	.TLSDESC_CALL => if (!target.flags.has_tlsdesc) {
1138	1138	// call -> nop
1139	1139	try cwriter.writeAll(&.{ 0x66, 0x90 });
1140	1140	},
1141	1141
1142		.R_X86_64_GOTTPOFF => {
	1142	.GOTTPOFF => {
1143	1143	if (target.flags.has_gottp) {
1144	1144	const S_ = @as(i64, @intCast(target.gotTpAddress(elf_file)));
1145	1145	try cwriter.writeInt(i32, @as(i32, @intCast(S_ + A - P)), .little);
...	...	@@ -1149,7 +1149,7 @@ const x86_64 = struct {
1149	1149	}
1150	1150	},
1151	1151
1152		.R_X86_64_GOT32 => try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A)), .little),
	1152	.GOT32 => try cwriter.writeInt(i32, @as(i32, @intCast(G + GOT + A)), .little),
1153	1153
1154	1154	else => \|x\| switch (@intFromEnum(x)) {
1155	1155	// Zig custom relocations
...	...	@@ -1172,7 +1172,7 @@ const x86_64 = struct {
1172	1172	while (i < rels.len) : (i += 1) {
1173	1173	const rel = rels[i];
1174	1174	const r_type: elf.R_X86_64 = @enumFromInt(rel.r_type());
1175		if (r_type == .R_X86_64_NONE) continue;
	1175	if (r_type == .NONE) continue;
1176	1176
1177	1177	const r_offset = std.math.cast(usize, rel.r_offset) orelse return error.Overflow;
1178	1178
...	...	@@ -1229,21 +1229,21 @@ const x86_64 = struct {
1229	1229	try stream.seekTo(r_offset);
1230	1230
1231	1231	switch (r_type) {
1232		.R_X86_64_NONE => unreachable,
1233		.R_X86_64_8 => try cwriter.writeInt(u8, @as(u8, @bitCast(@as(i8, @intCast(S + A)))), .little),
1234		.R_X86_64_16 => try cwriter.writeInt(u16, @as(u16, @bitCast(@as(i16, @intCast(S + A)))), .little),
1235		.R_X86_64_32 => try cwriter.writeInt(u32, @as(u32, @bitCast(@as(i32, @intCast(S + A)))), .little),
1236		.R_X86_64_32S => try cwriter.writeInt(i32, @as(i32, @intCast(S + A)), .little),
1237		.R_X86_64_64 => try cwriter.writeInt(i64, S + A, .little),
1238		.R_X86_64_DTPOFF32 => try cwriter.writeInt(i32, @as(i32, @intCast(S + A - DTP)), .little),
1239		.R_X86_64_DTPOFF64 => try cwriter.writeInt(i64, S + A - DTP, .little),
1240		.R_X86_64_GOTOFF64 => try cwriter.writeInt(i64, S + A - GOT, .little),
1241		.R_X86_64_GOTPC64 => try cwriter.writeInt(i64, GOT + A, .little),
1242		.R_X86_64_SIZE32 => {
	1232	.NONE => unreachable,
	1233	.@"8" => try cwriter.writeInt(u8, @as(u8, @bitCast(@as(i8, @intCast(S + A)))), .little),
	1234	.@"16" => try cwriter.writeInt(u16, @as(u16, @bitCast(@as(i16, @intCast(S + A)))), .little),
	1235	.@"32" => try cwriter.writeInt(u32, @as(u32, @bitCast(@as(i32, @intCast(S + A)))), .little),
	1236	.@"32S" => try cwriter.writeInt(i32, @as(i32, @intCast(S + A)), .little),
	1237	.@"64" => try cwriter.writeInt(i64, S + A, .little),
	1238	.DTPOFF32 => try cwriter.writeInt(i32, @as(i32, @intCast(S + A - DTP)), .little),
	1239	.DTPOFF64 => try cwriter.writeInt(i64, S + A - DTP, .little),
	1240	.GOTOFF64 => try cwriter.writeInt(i64, S + A - GOT, .little),
	1241	.GOTPC64 => try cwriter.writeInt(i64, GOT + A, .little),
	1242	.SIZE32 => {
1243	1243	const size = @as(i64, @intCast(target.elfSym(elf_file).st_size));
1244	1244	try cwriter.writeInt(u32, @as(u32, @bitCast(@as(i32, @intCast(size + A)))), .little);
1245	1245	},
1246		.R_X86_64_SIZE64 => {
	1246	.SIZE64 => {
1247	1247	const size = @as(i64, @intCast(target.elfSym(elf_file).st_size));
1248	1248	try cwriter.writeInt(i64, @as(i64, @intCast(size + A)), .little);
1249	1249	},
...	...	@@ -1293,8 +1293,8 @@ const x86_64 = struct {
1293	1293	const writer = stream.writer();
1294	1294	const rel: elf.R_X86_64 = @enumFromInt(rels[1].r_type());
1295	1295	switch (rel) {
1296		.R_X86_64_PC32,
1297		.R_X86_64_PLT32,
	1296	.PC32,
	1297	.PLT32,
1298	1298	=> {
1299	1299	var insts = [_]u8{
1300	1300	0x64, 0x48, 0x8b, 0x04, 0x25, 0, 0, 0, 0, // movq %fs:0,%rax
...	...	@@ -1331,8 +1331,8 @@ const x86_64 = struct {
1331	1331	const writer = stream.writer();
1332	1332	const rel: elf.R_X86_64 = @enumFromInt(rels[1].r_type());
1333	1333	switch (rel) {
1334		.R_X86_64_PC32,
1335		.R_X86_64_PLT32,
	1334	.PC32,
	1335	.PLT32,
1336	1336	=> {
1337	1337	var insts = [_]u8{
1338	1338	0x31, 0xc0, // xor %eax, %eax
...	...	@@ -1344,8 +1344,8 @@ const x86_64 = struct {
1344	1344	try writer.writeAll(&insts);
1345	1345	},
1346	1346
1347		.R_X86_64_GOTPCREL,
1348		.R_X86_64_GOTPCRELX,
	1347	.GOTPCREL,
	1348	.GOTPCRELX,
1349	1349	=> {
1350	1350	var insts = [_]u8{
1351	1351	0x31, 0xc0, // xor %eax, %eax
...	...	@@ -1431,10 +1431,10 @@ const x86_64 = struct {
1431	1431	const writer = stream.writer();
1432	1432	const rel: elf.R_X86_64 = @enumFromInt(rels[1].r_type());
1433	1433	switch (rel) {
1434		.R_X86_64_PC32,
1435		.R_X86_64_PLT32,
1436		.R_X86_64_GOTPCREL,
1437		.R_X86_64_GOTPCRELX,
	1434	.PC32,
	1435	.PLT32,
	1436	.GOTPCREL,
	1437	.GOTPCRELX,
1438	1438	=> {
1439	1439	var insts = [_]u8{
1440	1440	0x64, 0x48, 0x8b, 0x04, 0x25, 0, 0, 0, 0, // movq %fs:0,%rax

src/link/Elf/eh_frame.zig+4-4

...	...	@@ -543,10 +543,10 @@ const x86_64 = struct {
543	543	fn resolveReloc(rel: elf.Elf64_Rela, source: i64, target: i64, data: []u8) void {
544	544	const r_type: elf.R_X86_64 = @enumFromInt(rel.r_type());
545	545	switch (r_type) {
546		.R_X86_64_32 => std.mem.writeInt(i32, data[0..4], @as(i32, @truncate(target)), .little),
547		.R_X86_64_64 => std.mem.writeInt(i64, data[0..8], target, .little),
548		.R_X86_64_PC32 => std.mem.writeInt(i32, data[0..4], @as(i32, @intCast(target - source)), .little),
549		.R_X86_64_PC64 => std.mem.writeInt(i64, data[0..8], target - source, .little),
	546	.@"32" => std.mem.writeInt(i32, data[0..4], @as(i32, @truncate(target)), .little),
	547	.@"64" => std.mem.writeInt(i64, data[0..8], target, .little),
	548	.PC32 => std.mem.writeInt(i32, data[0..4], @as(i32, @intCast(target - source)), .little),
	549	.PC64 => std.mem.writeInt(i64, data[0..8], target - source, .little),
550	550	else => unreachable,
551	551	}
552	552	}

src/link/Elf/relocation.zig+36-37

...	...	@@ -30,41 +30,41 @@ fn Table(comptime len: comptime_int, comptime RelType: type, comptime mapping: [
30	30	}
31	31
32	32	const x86_64_relocs = Table(10, elf.R_X86_64, .{
33		.{ .abs, .R_X86_64_64 },
34		.{ .copy, .R_X86_64_COPY },
35		.{ .rel, .R_X86_64_RELATIVE },
36		.{ .irel, .R_X86_64_IRELATIVE },
37		.{ .glob_dat, .R_X86_64_GLOB_DAT },
38		.{ .jump_slot, .R_X86_64_JUMP_SLOT },
39		.{ .dtpmod, .R_X86_64_DTPMOD64 },
40		.{ .dtpoff, .R_X86_64_DTPOFF64 },
41		.{ .tpoff, .R_X86_64_TPOFF64 },
42		.{ .tlsdesc, .R_X86_64_TLSDESC },
	33	.{ .abs, .@"64" },
	34	.{ .copy, .COPY },
	35	.{ .rel, .RELATIVE },
	36	.{ .irel, .IRELATIVE },
	37	.{ .glob_dat, .GLOB_DAT },
	38	.{ .jump_slot, .JUMP_SLOT },
	39	.{ .dtpmod, .DTPMOD64 },
	40	.{ .dtpoff, .DTPOFF64 },
	41	.{ .tpoff, .TPOFF64 },
	42	.{ .tlsdesc, .TLSDESC },
43	43	});
44	44
45	45	const aarch64_relocs = Table(10, elf.R_AARCH64, .{
46		.{ .abs, .R_AARCH64_ABS64 },
47		.{ .copy, .R_AARCH64_COPY },
48		.{ .rel, .R_AARCH64_RELATIVE },
49		.{ .irel, .R_AARCH64_IRELATIVE },
50		.{ .glob_dat, .R_AARCH64_GLOB_DAT },
51		.{ .jump_slot, .R_AARCH64_JUMP_SLOT },
52		.{ .dtpmod, .R_AARCH64_TLS_DTPMOD },
53		.{ .dtpoff, .R_AARCH64_TLS_DTPREL },
54		.{ .tpoff, .R_AARCH64_TLS_TPREL },
55		.{ .tlsdesc, .R_AARCH64_TLSDESC },
	46	.{ .abs, .ABS64 },
	47	.{ .copy, .COPY },
	48	.{ .rel, .RELATIVE },
	49	.{ .irel, .IRELATIVE },
	50	.{ .glob_dat, .GLOB_DAT },
	51	.{ .jump_slot, .JUMP_SLOT },
	52	.{ .dtpmod, .TLS_DTPMOD },
	53	.{ .dtpoff, .TLS_DTPREL },
	54	.{ .tpoff, .TLS_TPREL },
	55	.{ .tlsdesc, .TLSDESC },
56	56	});
57	57
58	58	const riscv64_relocs = Table(9, elf.R_RISCV, .{
59		.{ .abs, .R_RISCV_64 },
60		.{ .copy, .R_RISCV_COPY },
61		.{ .rel, .R_RISCV_RELATIVE },
62		.{ .irel, .R_RISCV_IRELATIVE },
63		.{ .jump_slot, .R_RISCV_JUMP_SLOT },
64		.{ .dtpmod, .R_RISCV_TLS_DTPMOD64 },
65		.{ .dtpoff, .R_RISCV_TLS_DTPREL64 },
66		.{ .tpoff, .R_RISCV_TLS_TPREL64 },
67		.{ .tlsdesc, .R_RISCV_TLSDESC },
	59	.{ .abs, .@"64" },
	60	.{ .copy, .COPY },
	61	.{ .rel, .RELATIVE },
	62	.{ .irel, .IRELATIVE },
	63	.{ .jump_slot, .JUMP_SLOT },
	64	.{ .dtpmod, .TLS_DTPMOD64 },
	65	.{ .dtpoff, .TLS_DTPREL64 },
	66	.{ .tpoff, .TLS_TPREL64 },
	67	.{ .tlsdesc, .TLSDESC },
68	68	});
69	69
70	70	pub fn decode(r_type: u32, cpu_arch: std.Target.Cpu.Arch) ?Kind {
...	...	@@ -106,17 +106,16 @@ fn formatRelocType(
106	106	_ = unused_fmt_string;
107	107	_ = options;
108	108	const r_type = ctx.r_type;
109		const str = switch (r_type) {
110		Elf.R_ZIG_GOT32 => "R_ZIG_GOT32",
111		Elf.R_ZIG_GOTPCREL => "R_ZIG_GOTPCREL",
	109	switch (r_type) {
	110	Elf.R_ZIG_GOT32 => try writer.writeAll("R_ZIG_GOT32"),
	111	Elf.R_ZIG_GOTPCREL => try writer.writeAll("R_ZIG_GOTPCREL"),
112	112	else => switch (ctx.cpu_arch) {
113		.x86_64 => @tagName(@as(elf.R_X86_64, @enumFromInt(r_type))),
114		.aarch64 => @tagName(@as(elf.R_AARCH64, @enumFromInt(r_type))),
115		.riscv64 => @tagName(@as(elf.R_RISCV, @enumFromInt(r_type))),
	113	.x86_64 => try writer.print("R_X86_64_{s}", .{@tagName(@as(elf.R_X86_64, @enumFromInt(r_type)))}),
	114	.aarch64 => try writer.print("R_AARCH64_{s}", .{@tagName(@as(elf.R_AARCH64, @enumFromInt(r_type)))}),
	115	.riscv64 => try writer.print("R_RISCV_{s}", .{@tagName(@as(elf.R_RISCV, @enumFromInt(r_type)))}),
116	116	else => unreachable,
117	117	},
118		};
119		try writer.print("{s}", .{str});
	118	}
120	119	}
121	120
122	121	const assert = std.debug.assert;