Commit e3b5e9187811e23fbf1565a9c8a14996f1aad659 | zig

author	Andrew Kelley <andrew@ziglang.org> 2020-01-19 20:22:31-05:00
committer	Andrew Kelley <andrew@ziglang.org> 2020-01-19 20:54:05-05:00
log	e3b5e9187811e23fbf1565a9c8a14996f1aad659
tree	50597f3c007812d3301f91dabbec9092359f45d8
parent	a313f153841df8caa3af8fc80966c8f61a856f51
signature	Commit is signed but in an unrecognized format.

do the x86 arch

4 files changed, 3440 insertions(+), 3398 deletions(-)

BRANCH_TODO
lib
- std
  - target.zig
  - target
    aarch64.zig
    x86.zig

BRANCH_TODO-15

...	@@ -1,8 +1,5 @@	...	@@ -1,8 +1,5 @@
1	Finish these thigns before merging teh branch	1	Finish these thigns before merging teh branch
2		2
3	* need to populate builtin.zig cpu_features, undefined is incorrect. I guess for zig0 it will be always baseline
4	* need to populate std.Target.current.cpu_features even for native target
5
6	* finish refactoring target/arch/*	3	* finish refactoring target/arch/*
7	* `zig builtin` integration	4	* `zig builtin` integration
8	* move target details to better location	5	* move target details to better location
...	@@ -29,18 +26,6 @@ const riscv64_default_features: []const std.target.Feature = &[_]const std.tar	...	@@ -29,18 +26,6 @@ const riscv64_default_features: []const std.target.Feature = &[_]const std.tar
29	&std.target.riscv.feature_relax,	26	&std.target.riscv.feature_relax,
30	};	27	};
31		28
32	const i386_default_features: []const std.target.Feature = &[_]const std.target.Feature{
33	&std.target.x86.feature_cmov,
34	&std.target.x86.feature_cx8,
35	&std.target.x86.feature_fxsr,
36	&std.target.x86.feature_mmx,
37	&std.target.x86.feature_nopl,
38	&std.target.x86.feature_sse,
39	&std.target.x86.feature_sse2,
40	&std.target.x86.feature_slowUnalignedMem16,
41	&std.target.x86.feature_x87,
42	};
43
44	// Same as above but without sse.	29	// Same as above but without sse.
45	const i386_default_features_freestanding: []const std.target.Feature = &[_]const std.target.Feature{	30	const i386_default_features_freestanding: []const std.target.Feature = &[_]const std.target.Feature{
46	&std.target.x86.feature_cmov,	31	&std.target.x86.feature_cmov,

lib/std/target.zig+51-34

lib/std/target/aarch64.zig+2-12

 @@ -123,21 +123,11 @@ pub const Feature = enum {
     zcz_gp,
 };
-pub fn featureSet(features: []const Feature) Cpu.Feature.Set {
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
-    var x: Cpu.Feature.Set = 0;
-    for (features) |feature| {
-        x |= 1 << @enumToInt(feature);
-    }
-    return x;
-}
-pub fn featureSetHas(set: Feature.Set, feature: Feature) bool {
-    return (set & (1 << @enumToInt(feature))) != 0;
-}
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Feature.Set).Int.bits);
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),

lib/std/target/x86.zig+3387-3337

...	@@ -1,3338 +1,3388 @@	...	@@ -1,3338 +1,3388 @@
1	const Feature = @import("std").target.Feature;	1	const std = @import("../std.zig");
2	const Cpu = @import("std").target.Cpu;	2	const Cpu = std.Target.Cpu;
3		3
4	pub const feature_dnow3 = Feature{	4	pub const Feature = enum {
5	.name = "dnow3",	5	@"16bit_mode",
6	.llvm_name = "3dnow",	6	@"32bit_mode",
7	.description = "Enable 3DNow! instructions",	7	@"3dnow",
8	.dependencies = &[_]*const Feature {	8	@"3dnowa",
9	&feature_mmx,	9	@"64bit",
10	},	10	@"64bit_mode",
11	};	11	adx,
12		12	aes,
13	pub const feature_dnowa3 = Feature{	13	avx,
14	.name = "dnowa3",	14	avx2,
15	.llvm_name = "3dnowa",	15	avx512bf16,
16	.description = "Enable 3DNow! Athlon instructions",	16	avx512bitalg,
17	.dependencies = &[_]*const Feature {	17	avx512bw,
18	&feature_mmx,	18	avx512cd,
19	},	19	avx512dq,
20	};	20	avx512er,
21		21	avx512f,
22	pub const feature_bit64 = Feature{	22	avx512ifma,
23	.name = "bit64",	23	avx512pf,
24	.llvm_name = "64bit",	24	avx512vbmi,
25	.description = "Support 64-bit instructions",	25	avx512vbmi2,
26	.dependencies = &[_]*const Feature {	26	avx512vl,
27	},	27	avx512vnni,
28	};	28	avx512vp2intersect,
29		29	avx512vpopcntdq,
30	pub const feature_adx = Feature{	30	bmi,
31	.name = "adx",	31	bmi2,
32	.llvm_name = "adx",	32	branchfusion,
33	.description = "Support ADX instructions",	33	cldemote,
34	.dependencies = &[_]*const Feature {	34	clflushopt,
35	},	35	clwb,
36	};	36	clzero,
37		37	cmov,
38	pub const feature_aes = Feature{	38	cx16,
39	.name = "aes",	39	cx8,
40	.llvm_name = "aes",	40	enqcmd,
41	.description = "Enable AES instructions",	41	ermsb,
42	.dependencies = &[_]*const Feature {	42	f16c,
43	&feature_sse,	43	false_deps_lzcnt_tzcnt,
44	},	44	false_deps_popcnt,
45	};	45	fast_11bytenop,
46		46	fast_15bytenop,
47	pub const feature_avx = Feature{	47	fast_bextr,
48	.name = "avx",	48	fast_gather,
49	.llvm_name = "avx",	49	fast_hops,
50	.description = "Enable AVX instructions",	50	fast_lzcnt,
51	.dependencies = &[_]*const Feature {	51	fast_partial_ymm_or_zmm_write,
52	&feature_sse,	52	fast_scalar_fsqrt,
53	},	53	fast_scalar_shift_masks,
54	};	54	fast_shld_rotate,
55		55	fast_variable_shuffle,
56	pub const feature_avx2 = Feature{	56	fast_vector_fsqrt,
57	.name = "avx2",	57	fast_vector_shift_masks,
58	.llvm_name = "avx2",	58	fma,
59	.description = "Enable AVX2 instructions",	59	fma4,
60	.dependencies = &[_]*const Feature {	60	fsgsbase,
61	&feature_sse,	61	fxsr,
62	},	62	gfni,
63	};	63	idivl_to_divb,
64		64	idivq_to_divl,
65	pub const feature_avx512f = Feature{	65	invpcid,
66	.name = "avx512f",	66	lea_sp,
67	.llvm_name = "avx512f",	67	lea_uses_ag,
68	.description = "Enable AVX-512 instructions",	68	lwp,
69	.dependencies = &[_]*const Feature {	69	lzcnt,
70	&feature_sse,	70	macrofusion,
71	},	71	merge_to_threeway_branch,
72	};	72	mmx,
73		73	movbe,
74	pub const feature_avx512bf16 = Feature{	74	movdir64b,
75	.name = "avx512bf16",	75	movdiri,
76	.llvm_name = "avx512bf16",	76	mpx,
77	.description = "Support bfloat16 floating point",	77	mwaitx,
78	.dependencies = &[_]*const Feature {	78	nopl,
79	&feature_sse,	79	pad_short_functions,
80	},	80	pclmul,
81	};	81	pconfig,
82		82	pku,
83	pub const feature_avx512bitalg = Feature{	83	popcnt,
84	.name = "avx512bitalg",	84	prefer_256_bit,
85	.llvm_name = "avx512bitalg",	85	prefetchwt1,
86	.description = "Enable AVX-512 Bit Algorithms",	86	prfchw,
87	.dependencies = &[_]*const Feature {	87	ptwrite,
88	&feature_sse,	88	rdpid,
89	},	89	rdrnd,
90	};	90	rdseed,
91		91	retpoline,
92	pub const feature_bmi = Feature{	92	retpoline_external_thunk,
93	.name = "bmi",	93	retpoline_indirect_branches,
94	.llvm_name = "bmi",	94	retpoline_indirect_calls,
95	.description = "Support BMI instructions",	95	rtm,
96	.dependencies = &[_]*const Feature {	96	sahf,
97	},	97	sgx,
98	};	98	sha,
99		99	shstk,
100	pub const feature_bmi2 = Feature{	100	slow_3ops_lea,
101	.name = "bmi2",	101	slow_incdec,
102	.llvm_name = "bmi2",	102	slow_lea,
103	.description = "Support BMI2 instructions",	103	slow_pmaddwd,
104	.dependencies = &[_]*const Feature {	104	slow_pmulld,
105	},	105	slow_shld,
106	};	106	slow_two_mem_ops,
107		107	slow_unaligned_mem_16,
108	pub const feature_avx512bw = Feature{	108	slow_unaligned_mem_32,
109	.name = "avx512bw",	109	soft_float,
110	.llvm_name = "avx512bw",	110	sse,
111	.description = "Enable AVX-512 Byte and Word Instructions",	111	sse2,
112	.dependencies = &[_]*const Feature {	112	sse3,
113	&feature_sse,	113	sse4_1,
114	},	114	sse4_2,
115	};	115	sse4a,
116		116	sse_unaligned_mem,
117	pub const feature_branchfusion = Feature{	117	ssse3,
118	.name = "branchfusion",	118	tbm,
119	.llvm_name = "branchfusion",	119	vaes,
120	.description = "CMP/TEST can be fused with conditional branches",	120	vpclmulqdq,
121	.dependencies = &[_]*const Feature {	121	waitpkg,
122	},	122	wbnoinvd,
123	};	123	x87,
124		124	xop,
125	pub const feature_avx512cd = Feature{	125	xsave,
126	.name = "avx512cd",	126	xsavec,
127	.llvm_name = "avx512cd",	127	xsaveopt,
128	.description = "Enable AVX-512 Conflict Detection Instructions",	128	xsaves,
129	.dependencies = &[_]*const Feature {	129	};
130	&feature_sse,	130
131	},	131	pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
132	};	132
133		133	pub const all_features = blk: {
134	pub const feature_cldemote = Feature{	134	const len = @typeInfo(Feature).Enum.fields.len;
135	.name = "cldemote",	135	std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
136	.llvm_name = "cldemote",	136	var result: [len]Cpu.Feature = undefined;
137	.description = "Enable Cache Demote",	137
138	.dependencies = &[_]*const Feature {	138	result[@enumToInt(Feature.@"16bit_mode")] = .{
139	},	139	.index = @enumToInt(Feature.@"16bit_mode"),
140	};	140	.name = @tagName(Feature.@"16bit_mode"),
141		141	.llvm_name = "16bit-mode",
142	pub const feature_clflushopt = Feature{	142	.description = "16-bit mode (i8086)",
143	.name = "clflushopt",	143	.dependencies = 0,
144	.llvm_name = "clflushopt",	144	};
145	.description = "Flush A Cache Line Optimized",	145
146	.dependencies = &[_]*const Feature {	146	result[@enumToInt(Feature.@"32bit_mode")] = .{
147	},	147	.index = @enumToInt(Feature.@"32bit_mode"),
148	};	148	.name = @tagName(Feature.@"32bit_mode"),
149		149	.llvm_name = "32bit-mode",
150	pub const feature_clwb = Feature{	150	.description = "32-bit mode (80386)",
151	.name = "clwb",	151	.dependencies = 0,
152	.llvm_name = "clwb",	152	};
153	.description = "Cache Line Write Back",	153
154	.dependencies = &[_]*const Feature {	154	result[@enumToInt(Feature.@"3dnow")] = .{
155	},	155	.index = @enumToInt(Feature.@"3dnow"),
156	};	156	.name = @tagName(Feature.@"3dnow"),
157		157	.llvm_name = "3dnow",
158	pub const feature_clzero = Feature{	158	.description = "Enable 3DNow! instructions",
159	.name = "clzero",	159	.dependencies = featureSet(&[_]Feature{
160	.llvm_name = "clzero",	160	.mmx,
161	.description = "Enable Cache Line Zero",	161	}),
162	.dependencies = &[_]*const Feature {	162	};
163	},	163
164	};	164	result[@enumToInt(Feature.@"3dnowa")] = .{
165		165	.index = @enumToInt(Feature.@"3dnowa"),
166	pub const feature_cmov = Feature{	166	.name = @tagName(Feature.@"3dnowa"),
167	.name = "cmov",	167	.llvm_name = "3dnowa",
168	.llvm_name = "cmov",	168	.description = "Enable 3DNow! Athlon instructions",
169	.description = "Enable conditional move instructions",	169	.dependencies = featureSet(&[_]Feature{
170	.dependencies = &[_]*const Feature {	170	.mmx,
171	},	171	}),
172	};	172	};
173		173
174	pub const feature_cx8 = Feature{	174	result[@enumToInt(Feature.@"64bit")] = .{
175	.name = "cx8",	175	.index = @enumToInt(Feature.@"64bit"),
176	.llvm_name = "cx8",	176	.name = @tagName(Feature.@"64bit"),
177	.description = "Support CMPXCHG8B instructions",	177	.llvm_name = "64bit",
178	.dependencies = &[_]*const Feature {	178	.description = "Support 64-bit instructions",
179	},	179	.dependencies = 0,
180	};	180	};
181		181
182	pub const feature_cx16 = Feature{	182	result[@enumToInt(Feature.@"64bit_mode")] = .{
183	.name = "cx16",	183	.index = @enumToInt(Feature.@"64bit_mode"),
184	.llvm_name = "cx16",	184	.name = @tagName(Feature.@"64bit_mode"),
185	.description = "64-bit with cmpxchg16b",	185	.llvm_name = "64bit-mode",
186	.dependencies = &[_]*const Feature {	186	.description = "64-bit mode (x86_64)",
187	&feature_cx8,	187	.dependencies = 0,
188	},	188	};
189	};	189
190		190	result[@enumToInt(Feature.adx)] = .{
191	pub const feature_avx512dq = Feature{	191	.index = @enumToInt(Feature.adx),
192	.name = "avx512dq",	192	.name = @tagName(Feature.adx),
193	.llvm_name = "avx512dq",	193	.llvm_name = "adx",
194	.description = "Enable AVX-512 Doubleword and Quadword Instructions",	194	.description = "Support ADX instructions",
195	.dependencies = &[_]*const Feature {	195	.dependencies = featureSet(&[_]Feature{}),
196	&feature_sse,	196	};
197	},	197
198	};	198	result[@enumToInt(Feature.aes)] = .{
199		199	.index = @enumToInt(Feature.aes),
200	pub const feature_enqcmd = Feature{	200	.name = @tagName(Feature.aes),
201	.name = "enqcmd",	201	.llvm_name = "aes",
202	.llvm_name = "enqcmd",	202	.description = "Enable AES instructions",
203	.description = "Has ENQCMD instructions",	203	.dependencies = featureSet(&[_]Feature{
204	.dependencies = &[_]*const Feature {	204	.sse,
205	},	205	}),
206	};	206	};
207		207
208	pub const feature_avx512er = Feature{	208	result[@enumToInt(Feature.avx)] = .{
209	.name = "avx512er",	209	.index = @enumToInt(Feature.avx),
210	.llvm_name = "avx512er",	210	.name = @tagName(Feature.avx),
211	.description = "Enable AVX-512 Exponential and Reciprocal Instructions",	211	.llvm_name = "avx",
212	.dependencies = &[_]*const Feature {	212	.description = "Enable AVX instructions",
213	&feature_sse,	213	.dependencies = featureSet(&[_]Feature{
214	},	214	.sse,
215	};	215	}),
216		216	};
217	pub const feature_ermsb = Feature{	217
218	.name = "ermsb",	218	result[@enumToInt(Feature.avx2)] = .{
219	.llvm_name = "ermsb",	219	.index = @enumToInt(Feature.avx2),
220	.description = "REP MOVS/STOS are fast",	220	.name = @tagName(Feature.avx2),
221	.dependencies = &[_]*const Feature {	221	.llvm_name = "avx2",
222	},	222	.description = "Enable AVX2 instructions",
223	};	223	.dependencies = featureSet(&[_]Feature{
224		224	.sse,
225	pub const feature_f16c = Feature{	225	}),
226	.name = "f16c",	226	};
227	.llvm_name = "f16c",	227
228	.description = "Support 16-bit floating point conversion instructions",	228	result[@enumToInt(Feature.avx512f)] = .{
229	.dependencies = &[_]*const Feature {	229	.index = @enumToInt(Feature.avx512f),
230	&feature_sse,	230	.name = @tagName(Feature.avx512f),
231	},	231	.llvm_name = "avx512f",
232	};	232	.description = "Enable AVX-512 instructions",
233		233	.dependencies = featureSet(&[_]Feature{
234	pub const feature_fma = Feature{	234	.sse,
235	.name = "fma",	235	}),
236	.llvm_name = "fma",	236	};
237	.description = "Enable three-operand fused multiple-add",	237
238	.dependencies = &[_]*const Feature {	238	result[@enumToInt(Feature.avx512bf16)] = .{
239	&feature_sse,	239	.index = @enumToInt(Feature.avx512bf16),
240	},	240	.name = @tagName(Feature.avx512bf16),
241	};	241	.llvm_name = "avx512bf16",
242		242	.description = "Support bfloat16 floating point",
243	pub const feature_fma4 = Feature{	243	.dependencies = featureSet(&[_]Feature{
244	.name = "fma4",	244	.sse,
245	.llvm_name = "fma4",	245	}),
246	.description = "Enable four-operand fused multiple-add",	246	};
247	.dependencies = &[_]*const Feature {	247
248	&feature_sse,	248	result[@enumToInt(Feature.avx512bitalg)] = .{
249	},	249	.index = @enumToInt(Feature.avx512bitalg),
250	};	250	.name = @tagName(Feature.avx512bitalg),
251		251	.llvm_name = "avx512bitalg",
252	pub const feature_fsgsbase = Feature{	252	.description = "Enable AVX-512 Bit Algorithms",
253	.name = "fsgsbase",	253	.dependencies = featureSet(&[_]Feature{
254	.llvm_name = "fsgsbase",	254	.sse,
255	.description = "Support FS/GS Base instructions",	255	}),
256	.dependencies = &[_]*const Feature {	256	};
257	},	257
258	};	258	result[@enumToInt(Feature.bmi)] = .{
259		259	.index = @enumToInt(Feature.bmi),
260	pub const feature_fxsr = Feature{	260	.name = @tagName(Feature.bmi),
261	.name = "fxsr",	261	.llvm_name = "bmi",
262	.llvm_name = "fxsr",	262	.description = "Support BMI instructions",
263	.description = "Support fxsave/fxrestore instructions",	263	.dependencies = featureSet(&[_]Feature{}),
264	.dependencies = &[_]*const Feature {	264	};
265	},	265
266	};	266	result[@enumToInt(Feature.bmi2)] = .{
267		267	.index = @enumToInt(Feature.bmi2),
268	pub const feature_fast11bytenop = Feature{	268	.name = @tagName(Feature.bmi2),
269	.name = "fast11bytenop",	269	.llvm_name = "bmi2",
270	.llvm_name = "fast-11bytenop",	270	.description = "Support BMI2 instructions",
271	.description = "Target can quickly decode up to 11 byte NOPs",	271	.dependencies = featureSet(&[_]Feature{}),
272	.dependencies = &[_]*const Feature {	272	};
273	},	273
274	};	274	result[@enumToInt(Feature.avx512bw)] = .{
275		275	.index = @enumToInt(Feature.avx512bw),
276	pub const feature_fast15bytenop = Feature{	276	.name = @tagName(Feature.avx512bw),
277	.name = "fast15bytenop",	277	.llvm_name = "avx512bw",
278	.llvm_name = "fast-15bytenop",	278	.description = "Enable AVX-512 Byte and Word Instructions",
279	.description = "Target can quickly decode up to 15 byte NOPs",	279	.dependencies = featureSet(&[_]Feature{
280	.dependencies = &[_]*const Feature {	280	.sse,
281	},	281	}),
282	};	282	};
283		283
284	pub const feature_fastBextr = Feature{	284	result[@enumToInt(Feature.branchfusion)] = .{
285	.name = "fastBextr",	285	.index = @enumToInt(Feature.branchfusion),
286	.llvm_name = "fast-bextr",	286	.name = @tagName(Feature.branchfusion),
287	.description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",	287	.llvm_name = "branchfusion",
288	.dependencies = &[_]*const Feature {	288	.description = "CMP/TEST can be fused with conditional branches",
289	},	289	.dependencies = featureSet(&[_]Feature{}),
290	};	290	};
291		291
292	pub const feature_fastHops = Feature{	292	result[@enumToInt(Feature.avx512cd)] = .{
293	.name = "fastHops",	293	.index = @enumToInt(Feature.avx512cd),
294	.llvm_name = "fast-hops",	294	.name = @tagName(Feature.avx512cd),
295	.description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",	295	.llvm_name = "avx512cd",
296	.dependencies = &[_]*const Feature {	296	.description = "Enable AVX-512 Conflict Detection Instructions",
297	&feature_sse,	297	.dependencies = featureSet(&[_]Feature{
298	},	298	.sse,
299	};	299	}),
300		300	};
301	pub const feature_fastLzcnt = Feature{	301
302	.name = "fastLzcnt",	302	result[@enumToInt(Feature.cldemote)] = .{
303	.llvm_name = "fast-lzcnt",	303	.index = @enumToInt(Feature.cldemote),
304	.description = "LZCNT instructions are as fast as most simple integer ops",	304	.name = @tagName(Feature.cldemote),
305	.dependencies = &[_]*const Feature {	305	.llvm_name = "cldemote",
306	},	306	.description = "Enable Cache Demote",
307	};	307	.dependencies = featureSet(&[_]Feature{}),
308		308	};
309	pub const feature_fastPartialYmmOrZmmWrite = Feature{	309
310	.name = "fastPartialYmmOrZmmWrite",	310	result[@enumToInt(Feature.clflushopt)] = .{
311	.llvm_name = "fast-partial-ymm-or-zmm-write",	311	.index = @enumToInt(Feature.clflushopt),
312	.description = "Partial writes to YMM/ZMM registers are fast",	312	.name = @tagName(Feature.clflushopt),
313	.dependencies = &[_]*const Feature {	313	.llvm_name = "clflushopt",
314	},	314	.description = "Flush A Cache Line Optimized",
315	};	315	.dependencies = featureSet(&[_]Feature{}),
316		316	};
317	pub const feature_fastShldRotate = Feature{	317
318	.name = "fastShldRotate",	318	result[@enumToInt(Feature.clwb)] = .{
319	.llvm_name = "fast-shld-rotate",	319	.index = @enumToInt(Feature.clwb),
320	.description = "SHLD can be used as a faster rotate",	320	.name = @tagName(Feature.clwb),
321	.dependencies = &[_]*const Feature {	321	.llvm_name = "clwb",
322	},	322	.description = "Cache Line Write Back",
323	};	323	.dependencies = featureSet(&[_]Feature{}),
324		324	};
325	pub const feature_fastScalarFsqrt = Feature{	325
326	.name = "fastScalarFsqrt",	326	result[@enumToInt(Feature.clzero)] = .{
327	.llvm_name = "fast-scalar-fsqrt",	327	.index = @enumToInt(Feature.clzero),
328	.description = "Scalar SQRT is fast (disable Newton-Raphson)",	328	.name = @tagName(Feature.clzero),
329	.dependencies = &[_]*const Feature {	329	.llvm_name = "clzero",
330	},	330	.description = "Enable Cache Line Zero",
331	};	331	.dependencies = featureSet(&[_]Feature{}),
332		332	};
333	pub const feature_fastScalarShiftMasks = Feature{	333
334	.name = "fastScalarShiftMasks",	334	result[@enumToInt(Feature.cmov)] = .{
335	.llvm_name = "fast-scalar-shift-masks",	335	.index = @enumToInt(Feature.cmov),
336	.description = "Prefer a left/right scalar logical shift pair over a shift+and pair",	336	.name = @tagName(Feature.cmov),
337	.dependencies = &[_]*const Feature {	337	.llvm_name = "cmov",
338	},	338	.description = "Enable conditional move instructions",
339	};	339	.dependencies = featureSet(&[_]Feature{}),
340		340	};
341	pub const feature_fastVariableShuffle = Feature{	341
342	.name = "fastVariableShuffle",	342	result[@enumToInt(Feature.cx8)] = .{
343	.llvm_name = "fast-variable-shuffle",	343	.index = @enumToInt(Feature.cx8),
344	.description = "Shuffles with variable masks are fast",	344	.name = @tagName(Feature.cx8),
345	.dependencies = &[_]*const Feature {	345	.llvm_name = "cx8",
346	},	346	.description = "Support CMPXCHG8B instructions",
347	};	347	.dependencies = featureSet(&[_]Feature{}),
348		348	};
349	pub const feature_fastVectorFsqrt = Feature{	349
350	.name = "fastVectorFsqrt",	350	result[@enumToInt(Feature.cx16)] = .{
351	.llvm_name = "fast-vector-fsqrt",	351	.index = @enumToInt(Feature.cx16),
352	.description = "Vector SQRT is fast (disable Newton-Raphson)",	352	.name = @tagName(Feature.cx16),
353	.dependencies = &[_]*const Feature {	353	.llvm_name = "cx16",
354	},	354	.description = "64-bit with cmpxchg16b",
355	};	355	.dependencies = featureSet(&[_]Feature{
356		356	.cx8,
357	pub const feature_fastVectorShiftMasks = Feature{	357	}),
358	.name = "fastVectorShiftMasks",	358	};
359	.llvm_name = "fast-vector-shift-masks",	359
360	.description = "Prefer a left/right vector logical shift pair over a shift+and pair",	360	result[@enumToInt(Feature.avx512dq)] = .{
361	.dependencies = &[_]*const Feature {	361	.index = @enumToInt(Feature.avx512dq),
362	},	362	.name = @tagName(Feature.avx512dq),
363	};	363	.llvm_name = "avx512dq",
364		364	.description = "Enable AVX-512 Doubleword and Quadword Instructions",
365	pub const feature_gfni = Feature{	365	.dependencies = featureSet(&[_]Feature{
366	.name = "gfni",	366	.sse,
367	.llvm_name = "gfni",	367	}),
368	.description = "Enable Galois Field Arithmetic Instructions",	368	};
369	.dependencies = &[_]*const Feature {	369
370	&feature_sse,	370	result[@enumToInt(Feature.enqcmd)] = .{
371	},	371	.index = @enumToInt(Feature.enqcmd),
372	};	372	.name = @tagName(Feature.enqcmd),
373		373	.llvm_name = "enqcmd",
374	pub const feature_fastGather = Feature{	374	.description = "Has ENQCMD instructions",
375	.name = "fastGather",	375	.dependencies = 0,
376	.llvm_name = "fast-gather",	376	};
377	.description = "Indicates if gather is reasonably fast",	377
378	.dependencies = &[_]*const Feature {	378	result[@enumToInt(Feature.avx512er)] = .{
379	},	379	.index = @enumToInt(Feature.avx512er),
380	};	380	.name = @tagName(Feature.avx512er),
381		381	.llvm_name = "avx512er",
382	pub const feature_avx512ifma = Feature{	382	.description = "Enable AVX-512 Exponential and Reciprocal Instructions",
383	.name = "avx512ifma",	383	.dependencies = featureSet(&[_]Feature{
384	.llvm_name = "avx512ifma",	384	.sse,
385	.description = "Enable AVX-512 Integer Fused Multiple-Add",	385	}),
386	.dependencies = &[_]*const Feature {	386	};
387	&feature_sse,	387
388	},	388	result[@enumToInt(Feature.ermsb)] = .{
389	};	389	.index = @enumToInt(Feature.ermsb),
390		390	.name = @tagName(Feature.ermsb),
391	pub const feature_invpcid = Feature{	391	.llvm_name = "ermsb",
392	.name = "invpcid",	392	.description = "REP MOVS/STOS are fast",
393	.llvm_name = "invpcid",	393	.dependencies = 0,
394	.description = "Invalidate Process-Context Identifier",	394	};
395	.dependencies = &[_]*const Feature {	395
396	},	396	result[@enumToInt(Feature.f16c)] = .{
397	};	397	.index = @enumToInt(Feature.f16c),
398		398	.name = @tagName(Feature.f16c),
399	pub const feature_sahf = Feature{	399	.llvm_name = "f16c",
400	.name = "sahf",	400	.description = "Support 16-bit floating point conversion instructions",
401	.llvm_name = "sahf",	401	.dependencies = featureSet(&[_]Feature{
402	.description = "Support LAHF and SAHF instructions",	402	.sse,
403	.dependencies = &[_]*const Feature {	403	}),
404	},	404	};
405	};	405
406		406	result[@enumToInt(Feature.fma)] = .{
407	pub const feature_leaSp = Feature{	407	.index = @enumToInt(Feature.fma),
408	.name = "leaSp",	408	.name = @tagName(Feature.fma),
409	.llvm_name = "lea-sp",	409	.llvm_name = "fma",
410	.description = "Use LEA for adjusting the stack pointer",	410	.description = "Enable three-operand fused multiple-add",
411	.dependencies = &[_]*const Feature {	411	.dependencies = featureSet(&[_]Feature{
412	},	412	.sse,
413	};	413	}),
414		414	};
415	pub const feature_leaUsesAg = Feature{	415
416	.name = "leaUsesAg",	416	result[@enumToInt(Feature.fma4)] = .{
417	.llvm_name = "lea-uses-ag",	417	.index = @enumToInt(Feature.fma4),
418	.description = "LEA instruction needs inputs at AG stage",	418	.name = @tagName(Feature.fma4),
419	.dependencies = &[_]*const Feature {	419	.llvm_name = "fma4",
420	},	420	.description = "Enable four-operand fused multiple-add",
421	};	421	.dependencies = featureSet(&[_]Feature{
422		422	.sse,
423	pub const feature_lwp = Feature{	423	}),
424	.name = "lwp",	424	};
425	.llvm_name = "lwp",	425
426	.description = "Enable LWP instructions",	426	result[@enumToInt(Feature.fsgsbase)] = .{
427	.dependencies = &[_]*const Feature {	427	.index = @enumToInt(Feature.fsgsbase),
428	},	428	.name = @tagName(Feature.fsgsbase),
429	};	429	.llvm_name = "fsgsbase",
430		430	.description = "Support FS/GS Base instructions",
431	pub const feature_lzcnt = Feature{	431	.dependencies = 0,
432	.name = "lzcnt",	432	};
433	.llvm_name = "lzcnt",	433
434	.description = "Support LZCNT instruction",	434	result[@enumToInt(Feature.fxsr)] = .{
435	.dependencies = &[_]*const Feature {	435	.index = @enumToInt(Feature.fxsr),
436	},	436	.name = @tagName(Feature.fxsr),
437	};	437	.llvm_name = "fxsr",
438		438	.description = "Support fxsave/fxrestore instructions",
439	pub const feature_falseDepsLzcntTzcnt = Feature{	439	.dependencies = 0,
440	.name = "falseDepsLzcntTzcnt",	440	};
441	.llvm_name = "false-deps-lzcnt-tzcnt",	441
442	.description = "LZCNT/TZCNT have a false dependency on dest register",	442	result[@enumToInt(Feature.fast_11bytenop)] = .{
443	.dependencies = &[_]*const Feature {	443	.index = @enumToInt(Feature.fast_11bytenop),
444	},	444	.name = @tagName(Feature.fast_11bytenop),
445	};	445	.llvm_name = "fast-11bytenop",
446		446	.description = "Target can quickly decode up to 11 byte NOPs",
447	pub const feature_mmx = Feature{	447	.dependencies = 0,
448	.name = "mmx",	448	};
449	.llvm_name = "mmx",	449
450	.description = "Enable MMX instructions",	450	result[@enumToInt(Feature.fast_15bytenop)] = .{
451	.dependencies = &[_]*const Feature {	451	.index = @enumToInt(Feature.fast_15bytenop),
452	},	452	.name = @tagName(Feature.fast_15bytenop),
453	};	453	.llvm_name = "fast-15bytenop",
454		454	.description = "Target can quickly decode up to 15 byte NOPs",
455	pub const feature_movbe = Feature{	455	.dependencies = 0,
456	.name = "movbe",	456	};
457	.llvm_name = "movbe",	457
458	.description = "Support MOVBE instruction",	458	result[@enumToInt(Feature.fast_bextr)] = .{
459	.dependencies = &[_]*const Feature {	459	.index = @enumToInt(Feature.fast_bextr),
460	},	460	.name = @tagName(Feature.fast_bextr),
461	};	461	.llvm_name = "fast-bextr",
462		462	.description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
463	pub const feature_movdir64b = Feature{	463	.dependencies = 0,
464	.name = "movdir64b",	464	};
465	.llvm_name = "movdir64b",	465
466	.description = "Support movdir64b instruction",	466	result[@enumToInt(Feature.fast_hops)] = .{
467	.dependencies = &[_]*const Feature {	467	.index = @enumToInt(Feature.fast_hops),
468	},	468	.name = @tagName(Feature.fast_hops),
469	};	469	.llvm_name = "fast-hops",
470		470	.description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
471	pub const feature_movdiri = Feature{	471	.dependencies = featureSet(&[_]Feature{
472	.name = "movdiri",	472	.sse,
473	.llvm_name = "movdiri",	473	}),
474	.description = "Support movdiri instruction",	474	};
475	.dependencies = &[_]*const Feature {	475
476	},	476	result[@enumToInt(Feature.fast_lzcnt)] = .{
477	};	477	.index = @enumToInt(Feature.fast_lzcnt),
478		478	.name = @tagName(Feature.fast_lzcnt),
479	pub const feature_mpx = Feature{	479	.llvm_name = "fast-lzcnt",
480	.name = "mpx",	480	.description = "LZCNT instructions are as fast as most simple integer ops",
481	.llvm_name = "mpx",	481	.dependencies = 0,
482	.description = "Support MPX instructions",	482	};
483	.dependencies = &[_]*const Feature {	483
484	},	484	result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
485	};	485	.index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write),
486		486	.name = @tagName(Feature.fast_partial_ymm_or_zmm_write),
487	pub const feature_mwaitx = Feature{	487	.llvm_name = "fast-partial-ymm-or-zmm-write",
488	.name = "mwaitx",	488	.description = "Partial writes to YMM/ZMM registers are fast",
489	.llvm_name = "mwaitx",	489	.dependencies = 0,
490	.description = "Enable MONITORX/MWAITX timer functionality",	490	};
491	.dependencies = &[_]*const Feature {	491
492	},	492	result[@enumToInt(Feature.fast_shld_rotate)] = .{
493	};	493	.index = @enumToInt(Feature.fast_shld_rotate),
494		494	.name = @tagName(Feature.fast_shld_rotate),
495	pub const feature_macrofusion = Feature{	495	.llvm_name = "fast-shld-rotate",
496	.name = "macrofusion",	496	.description = "SHLD can be used as a faster rotate",
497	.llvm_name = "macrofusion",	497	.dependencies = 0,
498	.description = "Various instructions can be fused with conditional branches",	498	};
499	.dependencies = &[_]*const Feature {	499
500	},	500	result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
501	};	501	.index = @enumToInt(Feature.fast_scalar_fsqrt),
502		502	.name = @tagName(Feature.fast_scalar_fsqrt),
503	pub const feature_mergeToThreewayBranch = Feature{	503	.llvm_name = "fast-scalar-fsqrt",
504	.name = "mergeToThreewayBranch",	504	.description = "Scalar SQRT is fast (disable Newton-Raphson)",
505	.llvm_name = "merge-to-threeway-branch",	505	.dependencies = 0,
506	.description = "Merge branches to a three-way conditional branch",	506	};
507	.dependencies = &[_]*const Feature {	507
508	},	508	result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
509	};	509	.index = @enumToInt(Feature.fast_scalar_shift_masks),
510		510	.name = @tagName(Feature.fast_scalar_shift_masks),
511	pub const feature_nopl = Feature{	511	.llvm_name = "fast-scalar-shift-masks",
512	.name = "nopl",	512	.description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
513	.llvm_name = "nopl",	513	.dependencies = 0,
514	.description = "Enable NOPL instruction",	514	};
515	.dependencies = &[_]*const Feature {	515
516	},	516	result[@enumToInt(Feature.fast_variable_shuffle)] = .{
517	};	517	.index = @enumToInt(Feature.fast_variable_shuffle),
518		518	.name = @tagName(Feature.fast_variable_shuffle),
519	pub const feature_pclmul = Feature{	519	.llvm_name = "fast-variable-shuffle",
520	.name = "pclmul",	520	.description = "Shuffles with variable masks are fast",
521	.llvm_name = "pclmul",	521	.dependencies = 0,
522	.description = "Enable packed carry-less multiplication instructions",	522	};
523	.dependencies = &[_]*const Feature {	523
524	&feature_sse,	524	result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
525	},	525	.index = @enumToInt(Feature.fast_vector_fsqrt),
526	};	526	.name = @tagName(Feature.fast_vector_fsqrt),
527		527	.llvm_name = "fast-vector-fsqrt",
528	pub const feature_pconfig = Feature{	528	.description = "Vector SQRT is fast (disable Newton-Raphson)",
529	.name = "pconfig",	529	.dependencies = 0,
530	.llvm_name = "pconfig",	530	};
531	.description = "platform configuration instruction",	531
532	.dependencies = &[_]*const Feature {	532	result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
533	},	533	.index = @enumToInt(Feature.fast_vector_shift_masks),
534	};	534	.name = @tagName(Feature.fast_vector_shift_masks),
535		535	.llvm_name = "fast-vector-shift-masks",
536	pub const feature_avx512pf = Feature{	536	.description = "Prefer a left/right vector logical shift pair over a shift+and pair",
537	.name = "avx512pf",	537	.dependencies = 0,
538	.llvm_name = "avx512pf",	538	};
539	.description = "Enable AVX-512 PreFetch Instructions",	539
540	.dependencies = &[_]*const Feature {	540	result[@enumToInt(Feature.gfni)] = .{
541	&feature_sse,	541	.index = @enumToInt(Feature.gfni),
542	},	542	.name = @tagName(Feature.gfni),
543	};	543	.llvm_name = "gfni",
544		544	.description = "Enable Galois Field Arithmetic Instructions",
545	pub const feature_pku = Feature{	545	.dependencies = featureSet(&[_]Feature{
546	.name = "pku",	546	.sse,
547	.llvm_name = "pku",	547	}),
548	.description = "Enable protection keys",	548	};
549	.dependencies = &[_]*const Feature {	549
550	},	550	result[@enumToInt(Feature.fast_gather)] = .{
551	};	551	.index = @enumToInt(Feature.fast_gather),
552		552	.name = @tagName(Feature.fast_gather),
553	pub const feature_popcnt = Feature{	553	.llvm_name = "fast-gather",
554	.name = "popcnt",	554	.description = "Indicates if gather is reasonably fast",
555	.llvm_name = "popcnt",	555	.dependencies = 0,
556	.description = "Support POPCNT instruction",	556	};
557	.dependencies = &[_]*const Feature {	557
558	},	558	result[@enumToInt(Feature.avx512ifma)] = .{
559	};	559	.index = @enumToInt(Feature.avx512ifma),
560		560	.name = @tagName(Feature.avx512ifma),
561	pub const feature_falseDepsPopcnt = Feature{	561	.llvm_name = "avx512ifma",
562	.name = "falseDepsPopcnt",	562	.description = "Enable AVX-512 Integer Fused Multiple-Add",
563	.llvm_name = "false-deps-popcnt",	563	.dependencies = featureSet(&[_]Feature{
564	.description = "POPCNT has a false dependency on dest register",	564	.sse,
565	.dependencies = &[_]*const Feature {	565	}),
566	},	566	};
567	};	567
568		568	result[@enumToInt(Feature.invpcid)] = .{
569	pub const feature_prefetchwt1 = Feature{	569	.index = @enumToInt(Feature.invpcid),
570	.name = "prefetchwt1",	570	.name = @tagName(Feature.invpcid),
571	.llvm_name = "prefetchwt1",	571	.llvm_name = "invpcid",
572	.description = "Prefetch with Intent to Write and T1 Hint",	572	.description = "Invalidate Process-Context Identifier",
573	.dependencies = &[_]*const Feature {	573	.dependencies = 0,
574	},	574	};
575	};	575
576		576	result[@enumToInt(Feature.sahf)] = .{
577	pub const feature_prfchw = Feature{	577	.index = @enumToInt(Feature.sahf),
578	.name = "prfchw",	578	.name = @tagName(Feature.sahf),
579	.llvm_name = "prfchw",	579	.llvm_name = "sahf",
580	.description = "Support PRFCHW instructions",	580	.description = "Support LAHF and SAHF instructions",
581	.dependencies = &[_]*const Feature {	581	.dependencies = 0,
582	},	582	};
583	};	583
584		584	result[@enumToInt(Feature.lea_sp)] = .{
585	pub const feature_ptwrite = Feature{	585	.index = @enumToInt(Feature.lea_sp),
586	.name = "ptwrite",	586	.name = @tagName(Feature.lea_sp),
587	.llvm_name = "ptwrite",	587	.llvm_name = "lea-sp",
588	.description = "Support ptwrite instruction",	588	.description = "Use LEA for adjusting the stack pointer",
589	.dependencies = &[_]*const Feature {	589	.dependencies = 0,
590	},	590	};
591	};	591
592		592	result[@enumToInt(Feature.lea_uses_ag)] = .{
593	pub const feature_padShortFunctions = Feature{	593	.index = @enumToInt(Feature.lea_uses_ag),
594	.name = "padShortFunctions",	594	.name = @tagName(Feature.lea_uses_ag),
595	.llvm_name = "pad-short-functions",	595	.llvm_name = "lea-uses-ag",
596	.description = "Pad short functions",	596	.description = "LEA instruction needs inputs at AG stage",
597	.dependencies = &[_]*const Feature {	597	.dependencies = 0,
598	},	598	};
599	};	599
600		600	result[@enumToInt(Feature.lwp)] = .{
601	pub const feature_prefer256Bit = Feature{	601	.index = @enumToInt(Feature.lwp),
602	.name = "prefer256Bit",	602	.name = @tagName(Feature.lwp),
603	.llvm_name = "prefer-256-bit",	603	.llvm_name = "lwp",
604	.description = "Prefer 256-bit AVX instructions",	604	.description = "Enable LWP instructions",
605	.dependencies = &[_]*const Feature {	605	.dependencies = 0,
606	},	606	};
607	};	607
608		608	result[@enumToInt(Feature.lzcnt)] = .{
609	pub const feature_rdpid = Feature{	609	.index = @enumToInt(Feature.lzcnt),
610	.name = "rdpid",	610	.name = @tagName(Feature.lzcnt),
611	.llvm_name = "rdpid",	611	.llvm_name = "lzcnt",
612	.description = "Support RDPID instructions",	612	.description = "Support LZCNT instruction",
613	.dependencies = &[_]*const Feature {	613	.dependencies = 0,
614	},	614	};
615	};	615
616		616	result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
617	pub const feature_rdrnd = Feature{	617	.index = @enumToInt(Feature.false_deps_lzcnt_tzcnt),
618	.name = "rdrnd",	618	.name = @tagName(Feature.false_deps_lzcnt_tzcnt),
619	.llvm_name = "rdrnd",	619	.llvm_name = "false-deps-lzcnt-tzcnt",
620	.description = "Support RDRAND instruction",	620	.description = "LZCNT/TZCNT have a false dependency on dest register",
621	.dependencies = &[_]*const Feature {	621	.dependencies = 0,
622	},	622	};
623	};	623
624		624	result[@enumToInt(Feature.mmx)] = .{
625	pub const feature_rdseed = Feature{	625	.index = @enumToInt(Feature.mmx),
626	.name = "rdseed",	626	.name = @tagName(Feature.mmx),
627	.llvm_name = "rdseed",	627	.llvm_name = "mmx",
628	.description = "Support RDSEED instruction",	628	.description = "Enable MMX instructions",
629	.dependencies = &[_]*const Feature {	629	.dependencies = 0,
630	},	630	};
631	};	631
632		632	result[@enumToInt(Feature.movbe)] = .{
633	pub const feature_rtm = Feature{	633	.index = @enumToInt(Feature.movbe),
634	.name = "rtm",	634	.name = @tagName(Feature.movbe),
635	.llvm_name = "rtm",	635	.llvm_name = "movbe",
636	.description = "Support RTM instructions",	636	.description = "Support MOVBE instruction",
637	.dependencies = &[_]*const Feature {	637	.dependencies = 0,
638	},	638	};
639	};	639
640		640	result[@enumToInt(Feature.movdir64b)] = .{
641	pub const feature_retpoline = Feature{	641	.index = @enumToInt(Feature.movdir64b),
642	.name = "retpoline",	642	.name = @tagName(Feature.movdir64b),
643	.llvm_name = "retpoline",	643	.llvm_name = "movdir64b",
644	.description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",	644	.description = "Support movdir64b instruction",
645	.dependencies = &[_]*const Feature {	645	.dependencies = 0,
646	&feature_retpolineIndirectCalls,	646	};
647	&feature_retpolineIndirectBranches,	647
648	},	648	result[@enumToInt(Feature.movdiri)] = .{
649	};	649	.index = @enumToInt(Feature.movdiri),
650		650	.name = @tagName(Feature.movdiri),
651	pub const feature_retpolineExternalThunk = Feature{	651	.llvm_name = "movdiri",
652	.name = "retpolineExternalThunk",	652	.description = "Support movdiri instruction",
653	.llvm_name = "retpoline-external-thunk",	653	.dependencies = 0,
654	.description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",	654	};
655	.dependencies = &[_]*const Feature {	655
656	&feature_retpolineIndirectCalls,	656	result[@enumToInt(Feature.mpx)] = .{
657	},	657	.index = @enumToInt(Feature.mpx),
658	};	658	.name = @tagName(Feature.mpx),
659		659	.llvm_name = "mpx",
660	pub const feature_retpolineIndirectBranches = Feature{	660	.description = "Support MPX instructions",
661	.name = "retpolineIndirectBranches",	661	.dependencies = 0,
662	.llvm_name = "retpoline-indirect-branches",	662	};
663	.description = "Remove speculation of indirect branches from the generated code",	663
664	.dependencies = &[_]*const Feature {	664	result[@enumToInt(Feature.mwaitx)] = .{
665	},	665	.index = @enumToInt(Feature.mwaitx),
666	};	666	.name = @tagName(Feature.mwaitx),
667		667	.llvm_name = "mwaitx",
668	pub const feature_retpolineIndirectCalls = Feature{	668	.description = "Enable MONITORX/MWAITX timer functionality",
669	.name = "retpolineIndirectCalls",	669	.dependencies = 0,
670	.llvm_name = "retpoline-indirect-calls",	670	};
671	.description = "Remove speculation of indirect calls from the generated code",	671
672	.dependencies = &[_]*const Feature {	672	result[@enumToInt(Feature.macrofusion)] = .{
673	},	673	.index = @enumToInt(Feature.macrofusion),
674	};	674	.name = @tagName(Feature.macrofusion),
675		675	.llvm_name = "macrofusion",
676	pub const feature_sgx = Feature{	676	.description = "Various instructions can be fused with conditional branches",
677	.name = "sgx",	677	.dependencies = 0,
678	.llvm_name = "sgx",	678	};
679	.description = "Enable Software Guard Extensions",	679
680	.dependencies = &[_]*const Feature {	680	result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
681	},	681	.index = @enumToInt(Feature.merge_to_threeway_branch),
682	};	682	.name = @tagName(Feature.merge_to_threeway_branch),
683		683	.llvm_name = "merge-to-threeway-branch",
684	pub const feature_sha = Feature{	684	.description = "Merge branches to a three-way conditional branch",
685	.name = "sha",	685	.dependencies = 0,
686	.llvm_name = "sha",	686	};
687	.description = "Enable SHA instructions",	687
688	.dependencies = &[_]*const Feature {	688	result[@enumToInt(Feature.nopl)] = .{
689	&feature_sse,	689	.index = @enumToInt(Feature.nopl),
690	},	690	.name = @tagName(Feature.nopl),
691	};	691	.llvm_name = "nopl",
692		692	.description = "Enable NOPL instruction",
693	pub const feature_shstk = Feature{	693	.dependencies = 0,
694	.name = "shstk",	694	};
695	.llvm_name = "shstk",	695
696	.description = "Support CET Shadow-Stack instructions",	696	result[@enumToInt(Feature.pclmul)] = .{
697	.dependencies = &[_]*const Feature {	697	.index = @enumToInt(Feature.pclmul),
698	},	698	.name = @tagName(Feature.pclmul),
699	};	699	.llvm_name = "pclmul",
700		700	.description = "Enable packed carry-less multiplication instructions",
701	pub const feature_sse = Feature{	701	.dependencies = featureSet(&[_]Feature{
702	.name = "sse",	702	.sse,
703	.llvm_name = "sse",	703	}),
704	.description = "Enable SSE instructions",	704	};
705	.dependencies = &[_]*const Feature {	705
706	},	706	result[@enumToInt(Feature.pconfig)] = .{
707	};	707	.index = @enumToInt(Feature.pconfig),
708		708	.name = @tagName(Feature.pconfig),
709	pub const feature_sse2 = Feature{	709	.llvm_name = "pconfig",
710	.name = "sse2",	710	.description = "platform configuration instruction",
711	.llvm_name = "sse2",	711	.dependencies = 0,
712	.description = "Enable SSE2 instructions",	712	};
713	.dependencies = &[_]*const Feature {	713
714	&feature_sse,	714	result[@enumToInt(Feature.avx512pf)] = .{
715	},	715	.index = @enumToInt(Feature.avx512pf),
716	};	716	.name = @tagName(Feature.avx512pf),
717		717	.llvm_name = "avx512pf",
718	pub const feature_sse3 = Feature{	718	.description = "Enable AVX-512 PreFetch Instructions",
719	.name = "sse3",	719	.dependencies = featureSet(&[_]Feature{
720	.llvm_name = "sse3",	720	.sse,
721	.description = "Enable SSE3 instructions",	721	}),
722	.dependencies = &[_]*const Feature {	722	};
723	&feature_sse,	723
724	},	724	result[@enumToInt(Feature.pku)] = .{
725	};	725	.index = @enumToInt(Feature.pku),
726		726	.name = @tagName(Feature.pku),
727	pub const feature_sse4a = Feature{	727	.llvm_name = "pku",
728	.name = "sse4a",	728	.description = "Enable protection keys",
729	.llvm_name = "sse4a",	729	.dependencies = 0,
730	.description = "Support SSE 4a instructions",	730	};
731	.dependencies = &[_]*const Feature {	731
732	&feature_sse,	732	result[@enumToInt(Feature.popcnt)] = .{
733	},	733	.index = @enumToInt(Feature.popcnt),
734	};	734	.name = @tagName(Feature.popcnt),
735		735	.llvm_name = "popcnt",
736	pub const feature_sse41 = Feature{	736	.description = "Support POPCNT instruction",
737	.name = "sse41",	737	.dependencies = 0,
738	.llvm_name = "sse4.1",	738	};
739	.description = "Enable SSE 4.1 instructions",	739
740	.dependencies = &[_]*const Feature {	740	result[@enumToInt(Feature.false_deps_popcnt)] = .{
741	&feature_sse,	741	.index = @enumToInt(Feature.false_deps_popcnt),
742	},	742	.name = @tagName(Feature.false_deps_popcnt),
743	};	743	.llvm_name = "false-deps-popcnt",
744		744	.description = "POPCNT has a false dependency on dest register",
745	pub const feature_sse42 = Feature{	745	.dependencies = 0,
746	.name = "sse42",	746	};
747	.llvm_name = "sse4.2",	747
748	.description = "Enable SSE 4.2 instructions",	748	result[@enumToInt(Feature.prefetchwt1)] = .{
749	.dependencies = &[_]*const Feature {	749	.index = @enumToInt(Feature.prefetchwt1),
750	&feature_sse,	750	.name = @tagName(Feature.prefetchwt1),
751	},	751	.llvm_name = "prefetchwt1",
752	};	752	.description = "Prefetch with Intent to Write and T1 Hint",
753		753	.dependencies = 0,
754	pub const feature_sseUnalignedMem = Feature{	754	};
755	.name = "sseUnalignedMem",	755
756	.llvm_name = "sse-unaligned-mem",	756	result[@enumToInt(Feature.prfchw)] = .{
757	.description = "Allow unaligned memory operands with SSE instructions",	757	.index = @enumToInt(Feature.prfchw),
758	.dependencies = &[_]*const Feature {	758	.name = @tagName(Feature.prfchw),
759	},	759	.llvm_name = "prfchw",
760	};	760	.description = "Support PRFCHW instructions",
761		761	.dependencies = 0,
762	pub const feature_ssse3 = Feature{	762	};
763	.name = "ssse3",	763
764	.llvm_name = "ssse3",	764	result[@enumToInt(Feature.ptwrite)] = .{
765	.description = "Enable SSSE3 instructions",	765	.index = @enumToInt(Feature.ptwrite),
766	.dependencies = &[_]*const Feature {	766	.name = @tagName(Feature.ptwrite),
767	&feature_sse,	767	.llvm_name = "ptwrite",
768	},	768	.description = "Support ptwrite instruction",
769	};	769	.dependencies = 0,
770		770	};
771	pub const feature_slow3opsLea = Feature{	771
772	.name = "slow3opsLea",	772	result[@enumToInt(Feature.pad_short_functions)] = .{
773	.llvm_name = "slow-3ops-lea",	773	.index = @enumToInt(Feature.pad_short_functions),
774	.description = "LEA instruction with 3 ops or certain registers is slow",	774	.name = @tagName(Feature.pad_short_functions),
775	.dependencies = &[_]*const Feature {	775	.llvm_name = "pad-short-functions",
776	},	776	.description = "Pad short functions",
777	};	777	.dependencies = 0,
778		778	};
779	pub const feature_idivlToDivb = Feature{	779
780	.name = "idivlToDivb",	780	result[@enumToInt(Feature.prefer_256_bit)] = .{
781	.llvm_name = "idivl-to-divb",	781	.index = @enumToInt(Feature.prefer_256_bit),
782	.description = "Use 8-bit divide for positive values less than 256",	782	.name = @tagName(Feature.prefer_256_bit),
783	.dependencies = &[_]*const Feature {	783	.llvm_name = "prefer-256-bit",
784	},	784	.description = "Prefer 256-bit AVX instructions",
785	};	785	.dependencies = 0,
786		786	};
787	pub const feature_idivqToDivl = Feature{	787
788	.name = "idivqToDivl",	788	result[@enumToInt(Feature.rdpid)] = .{
789	.llvm_name = "idivq-to-divl",	789	.index = @enumToInt(Feature.rdpid),
790	.description = "Use 32-bit divide for positive values less than 2^32",	790	.name = @tagName(Feature.rdpid),
791	.dependencies = &[_]*const Feature {	791	.llvm_name = "rdpid",
792	},	792	.description = "Support RDPID instructions",
793	};	793	.dependencies = 0,
794		794	};
795	pub const feature_slowIncdec = Feature{	795
796	.name = "slowIncdec",	796	result[@enumToInt(Feature.rdrnd)] = .{
797	.llvm_name = "slow-incdec",	797	.index = @enumToInt(Feature.rdrnd),
798	.description = "INC and DEC instructions are slower than ADD and SUB",	798	.name = @tagName(Feature.rdrnd),
799	.dependencies = &[_]*const Feature {	799	.llvm_name = "rdrnd",
800	},	800	.description = "Support RDRAND instruction",
801	};	801	.dependencies = 0,
802		802	};
803	pub const feature_slowLea = Feature{	803
804	.name = "slowLea",	804	result[@enumToInt(Feature.rdseed)] = .{
805	.llvm_name = "slow-lea",	805	.index = @enumToInt(Feature.rdseed),
806	.description = "LEA instruction with certain arguments is slow",	806	.name = @tagName(Feature.rdseed),
807	.dependencies = &[_]*const Feature {	807	.llvm_name = "rdseed",
808	},	808	.description = "Support RDSEED instruction",
809	};	809	.dependencies = 0,
810		810	};
811	pub const feature_slowPmaddwd = Feature{	811
812	.name = "slowPmaddwd",	812	result[@enumToInt(Feature.rtm)] = .{
813	.llvm_name = "slow-pmaddwd",	813	.index = @enumToInt(Feature.rtm),
814	.description = "PMADDWD is slower than PMULLD",	814	.name = @tagName(Feature.rtm),
815	.dependencies = &[_]*const Feature {	815	.llvm_name = "rtm",
816	},	816	.description = "Support RTM instructions",
817	};	817	.dependencies = 0,
818		818	};
819	pub const feature_slowPmulld = Feature{	819
820	.name = "slowPmulld",	820	result[@enumToInt(Feature.retpoline)] = .{
821	.llvm_name = "slow-pmulld",	821	.index = @enumToInt(Feature.retpoline),
822	.description = "PMULLD instruction is slow",	822	.name = @tagName(Feature.retpoline),
823	.dependencies = &[_]*const Feature {	823	.llvm_name = "retpoline",
824	},	824	.description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
825	};	825	.dependencies = featureSet(&[_]Feature{
826		826	.retpoline_indirect_calls,
827	pub const feature_slowShld = Feature{	827	.retpoline_indirect_branches,
828	.name = "slowShld",	828	}),
829	.llvm_name = "slow-shld",	829	};
830	.description = "SHLD instruction is slow",	830
831	.dependencies = &[_]*const Feature {	831	result[@enumToInt(Feature.retpoline_external_thunk)] = .{
832	},	832	.index = @enumToInt(Feature.retpoline_external_thunk),
833	};	833	.name = @tagName(Feature.retpoline_external_thunk),
834		834	.llvm_name = "retpoline-external-thunk",
835	pub const feature_slowTwoMemOps = Feature{	835	.description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
836	.name = "slowTwoMemOps",	836	.dependencies = featureSet(&[_]Feature{
837	.llvm_name = "slow-two-mem-ops",	837	.retpoline_indirect_calls,
838	.description = "Two memory operand instructions are slow",	838	}),
839	.dependencies = &[_]*const Feature {	839	};
840	},	840
841	};	841	result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
842		842	.index = @enumToInt(Feature.retpoline_indirect_branches),
843	pub const feature_slowUnalignedMem16 = Feature{	843	.name = @tagName(Feature.retpoline_indirect_branches),
844	.name = "slowUnalignedMem16",	844	.llvm_name = "retpoline-indirect-branches",
845	.llvm_name = "slow-unaligned-mem-16",	845	.description = "Remove speculation of indirect branches from the generated code",
846	.description = "Slow unaligned 16-byte memory access",	846	.dependencies = 0,
847	.dependencies = &[_]*const Feature {	847	};
848	},	848
849	};	849	result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
850		850	.index = @enumToInt(Feature.retpoline_indirect_calls),
851	pub const feature_slowUnalignedMem32 = Feature{	851	.name = @tagName(Feature.retpoline_indirect_calls),
852	.name = "slowUnalignedMem32",	852	.llvm_name = "retpoline-indirect-calls",
853	.llvm_name = "slow-unaligned-mem-32",	853	.description = "Remove speculation of indirect calls from the generated code",
854	.description = "Slow unaligned 32-byte memory access",	854	.dependencies = 0,
855	.dependencies = &[_]*const Feature {	855	};
856	},	856
857	};	857	result[@enumToInt(Feature.sgx)] = .{
858		858	.index = @enumToInt(Feature.sgx),
859	pub const feature_softFloat = Feature{	859	.name = @tagName(Feature.sgx),
860	.name = "softFloat",	860	.llvm_name = "sgx",
861	.llvm_name = "soft-float",	861	.description = "Enable Software Guard Extensions",
862	.description = "Use software floating point features",	862	.dependencies = 0,
863	.dependencies = &[_]*const Feature {	863	};
864	},	864
865	};	865	result[@enumToInt(Feature.sha)] = .{
866		866	.index = @enumToInt(Feature.sha),
867	pub const feature_tbm = Feature{	867	.name = @tagName(Feature.sha),
868	.name = "tbm",	868	.llvm_name = "sha",
869	.llvm_name = "tbm",	869	.description = "Enable SHA instructions",
870	.description = "Enable TBM instructions",	870	.dependencies = featureSet(&[_]Feature{
871	.dependencies = &[_]*const Feature {	871	.sse,
872	},	872	}),
873	};	873	};
874		874
875	pub const feature_vaes = Feature{	875	result[@enumToInt(Feature.shstk)] = .{
876	.name = "vaes",	876	.index = @enumToInt(Feature.shstk),
877	.llvm_name = "vaes",	877	.name = @tagName(Feature.shstk),
878	.description = "Promote selected AES instructions to AVX512/AVX registers",	878	.llvm_name = "shstk",
879	.dependencies = &[_]*const Feature {	879	.description = "Support CET Shadow-Stack instructions",
880	&feature_sse,	880	.dependencies = 0,
881	},	881	};
882	};	882
883		883	result[@enumToInt(Feature.sse)] = .{
884	pub const feature_avx512vbmi = Feature{	884	.index = @enumToInt(Feature.sse),
885	.name = "avx512vbmi",	885	.name = @tagName(Feature.sse),
886	.llvm_name = "avx512vbmi",	886	.llvm_name = "sse",
887	.description = "Enable AVX-512 Vector Byte Manipulation Instructions",	887	.description = "Enable SSE instructions",
888	.dependencies = &[_]*const Feature {	888	.dependencies = 0,
889	&feature_sse,	889	};
890	},	890
891	};	891	result[@enumToInt(Feature.sse2)] = .{
892		892	.index = @enumToInt(Feature.sse2),
893	pub const feature_avx512vbmi2 = Feature{	893	.name = @tagName(Feature.sse2),
894	.name = "avx512vbmi2",	894	.llvm_name = "sse2",
895	.llvm_name = "avx512vbmi2",	895	.description = "Enable SSE2 instructions",
896	.description = "Enable AVX-512 further Vector Byte Manipulation Instructions",	896	.dependencies = featureSet(&[_]Feature{
897	.dependencies = &[_]*const Feature {	897	.sse,
898	&feature_sse,	898	}),
899	},	899	};
900	};	900
901		901	result[@enumToInt(Feature.sse3)] = .{
902	pub const feature_avx512vl = Feature{	902	.index = @enumToInt(Feature.sse3),
903	.name = "avx512vl",	903	.name = @tagName(Feature.sse3),
904	.llvm_name = "avx512vl",	904	.llvm_name = "sse3",
905	.description = "Enable AVX-512 Vector Length eXtensions",	905	.description = "Enable SSE3 instructions",
906	.dependencies = &[_]*const Feature {	906	.dependencies = featureSet(&[_]Feature{
907	&feature_sse,	907	.sse,
908	},	908	}),
909	};	909	};
910		910
911	pub const feature_avx512vnni = Feature{	911	result[@enumToInt(Feature.sse4a)] = .{
912	.name = "avx512vnni",	912	.index = @enumToInt(Feature.sse4a),
913	.llvm_name = "avx512vnni",	913	.name = @tagName(Feature.sse4a),
914	.description = "Enable AVX-512 Vector Neural Network Instructions",	914	.llvm_name = "sse4a",
915	.dependencies = &[_]*const Feature {	915	.description = "Support SSE 4a instructions",
916	&feature_sse,	916	.dependencies = featureSet(&[_]Feature{
917	},	917	.sse,
918	};	918	}),
919		919	};
920	pub const feature_avx512vp2intersect = Feature{	920
921	.name = "avx512vp2intersect",	921	result[@enumToInt(Feature.sse4_1)] = .{
922	.llvm_name = "avx512vp2intersect",	922	.index = @enumToInt(Feature.sse4_1),
923	.description = "Enable AVX-512 vp2intersect",	923	.name = @tagName(Feature.sse4_1),
924	.dependencies = &[_]*const Feature {	924	.llvm_name = "sse4.1",
925	&feature_sse,	925	.description = "Enable SSE 4.1 instructions",
926	},	926	.dependencies = featureSet(&[_]Feature{
927	};	927	.sse,
928		928	}),
929	pub const feature_vpclmulqdq = Feature{	929	};
930	.name = "vpclmulqdq",	930
931	.llvm_name = "vpclmulqdq",	931	result[@enumToInt(Feature.sse4_2)] = .{
932	.description = "Enable vpclmulqdq instructions",	932	.index = @enumToInt(Feature.sse4_2),
933	.dependencies = &[_]*const Feature {	933	.name = @tagName(Feature.sse4_2),
934	&feature_sse,	934	.llvm_name = "sse4.2",
935	},	935	.description = "Enable SSE 4.2 instructions",
936	};	936	.dependencies = featureSet(&[_]Feature{
937		937	.sse,
938	pub const feature_avx512vpopcntdq = Feature{	938	}),
939	.name = "avx512vpopcntdq",	939	};
940	.llvm_name = "avx512vpopcntdq",	940
941	.description = "Enable AVX-512 Population Count Instructions",	941	result[@enumToInt(Feature.sse_unaligned_mem)] = .{
942	.dependencies = &[_]*const Feature {	942	.index = @enumToInt(Feature.sse_unaligned_mem),
943	&feature_sse,	943	.name = @tagName(Feature.sse_unaligned_mem),
944	},	944	.llvm_name = "sse-unaligned-mem",
945	};	945	.description = "Allow unaligned memory operands with SSE instructions",
946		946	.dependencies = 0,
947	pub const feature_waitpkg = Feature{	947	};
948	.name = "waitpkg",	948
949	.llvm_name = "waitpkg",	949	result[@enumToInt(Feature.ssse3)] = .{
950	.description = "Wait and pause enhancements",	950	.index = @enumToInt(Feature.ssse3),
951	.dependencies = &[_]*const Feature {	951	.name = @tagName(Feature.ssse3),
952	},	952	.llvm_name = "ssse3",
953	};	953	.description = "Enable SSSE3 instructions",
954		954	.dependencies = featureSet(&[_]Feature{
955	pub const feature_wbnoinvd = Feature{	955	.sse,
956	.name = "wbnoinvd",	956	}),
957	.llvm_name = "wbnoinvd",	957	};
958	.description = "Write Back No Invalidate",	958
959	.dependencies = &[_]*const Feature {	959	result[@enumToInt(Feature.slow_3ops_lea)] = .{
960	},	960	.index = @enumToInt(Feature.slow_3ops_lea),
961	};	961	.name = @tagName(Feature.slow_3ops_lea),
962		962	.llvm_name = "slow-3ops-lea",
963	pub const feature_x87 = Feature{	963	.description = "LEA instruction with 3 ops or certain registers is slow",
964	.name = "x87",	964	.dependencies = 0,
965	.llvm_name = "x87",	965	};
966	.description = "Enable X87 float instructions",	966
967	.dependencies = &[_]*const Feature {	967	result[@enumToInt(Feature.idivl_to_divb)] = .{
968	},	968	.index = @enumToInt(Feature.idivl_to_divb),
969	};	969	.name = @tagName(Feature.idivl_to_divb),
970		970	.llvm_name = "idivl-to-divb",
971	pub const feature_xop = Feature{	971	.description = "Use 8-bit divide for positive values less than 256",
972	.name = "xop",	972	.dependencies = 0,
973	.llvm_name = "xop",	973	};
974	.description = "Enable XOP instructions",	974
975	.dependencies = &[_]*const Feature {	975	result[@enumToInt(Feature.idivq_to_divl)] = .{
976	&feature_sse,	976	.index = @enumToInt(Feature.idivq_to_divl),
977	},	977	.name = @tagName(Feature.idivq_to_divl),
978	};	978	.llvm_name = "idivq-to-divl",
979		979	.description = "Use 32-bit divide for positive values less than 2^32",
980	pub const feature_xsave = Feature{	980	.dependencies = 0,
981	.name = "xsave",	981	};
982	.llvm_name = "xsave",	982
983	.description = "Support xsave instructions",	983	result[@enumToInt(Feature.slow_incdec)] = .{
984	.dependencies = &[_]*const Feature {	984	.index = @enumToInt(Feature.slow_incdec),
985	},	985	.name = @tagName(Feature.slow_incdec),
986	};	986	.llvm_name = "slow-incdec",
987		987	.description = "INC and DEC instructions are slower than ADD and SUB",
988	pub const feature_xsavec = Feature{	988	.dependencies = 0,
989	.name = "xsavec",	989	};
990	.llvm_name = "xsavec",	990
991	.description = "Support xsavec instructions",	991	result[@enumToInt(Feature.slow_lea)] = .{
992	.dependencies = &[_]*const Feature {	992	.index = @enumToInt(Feature.slow_lea),
993	},	993	.name = @tagName(Feature.slow_lea),
994	};	994	.llvm_name = "slow-lea",
995		995	.description = "LEA instruction with certain arguments is slow",
996	pub const feature_xsaveopt = Feature{	996	.dependencies = 0,
997	.name = "xsaveopt",	997	};
998	.llvm_name = "xsaveopt",	998
999	.description = "Support xsaveopt instructions",	999	result[@enumToInt(Feature.slow_pmaddwd)] = .{
1000	.dependencies = &[_]*const Feature {	1000	.index = @enumToInt(Feature.slow_pmaddwd),
1001	},	1001	.name = @tagName(Feature.slow_pmaddwd),
1002	};	1002	.llvm_name = "slow-pmaddwd",
1003		1003	.description = "PMADDWD is slower than PMULLD",
1004	pub const feature_xsaves = Feature{	1004	.dependencies = 0,
1005	.name = "xsaves",	1005	};
1006	.llvm_name = "xsaves",	1006
1007	.description = "Support xsaves instructions",	1007	result[@enumToInt(Feature.slow_pmulld)] = .{
1008	.dependencies = &[_]*const Feature {	1008	.index = @enumToInt(Feature.slow_pmulld),
1009	},	1009	.name = @tagName(Feature.slow_pmulld),
1010	};	1010	.llvm_name = "slow-pmulld",
1011		1011	.description = "PMULLD instruction is slow",
1012	pub const feature_bitMode16 = Feature{	1012	.dependencies = 0,
1013	.name = "bitMode16",	1013	};
1014	.llvm_name = "16bit-mode",	1014
1015	.description = "16-bit mode (i8086)",	1015	result[@enumToInt(Feature.slow_shld)] = .{
1016	.dependencies = &[_]*const Feature {	1016	.index = @enumToInt(Feature.slow_shld),
1017	},	1017	.name = @tagName(Feature.slow_shld),
1018	};	1018	.llvm_name = "slow-shld",
1019		1019	.description = "SHLD instruction is slow",
1020	pub const feature_bitMode32 = Feature{	1020	.dependencies = 0,
1021	.name = "bitMode32",	1021	};
1022	.llvm_name = "32bit-mode",	1022
1023	.description = "32-bit mode (80386)",	1023	result[@enumToInt(Feature.slow_two_mem_ops)] = .{
1024	.dependencies = &[_]*const Feature {	1024	.index = @enumToInt(Feature.slow_two_mem_ops),
1025	},	1025	.name = @tagName(Feature.slow_two_mem_ops),
1026	};	1026	.llvm_name = "slow-two-mem-ops",
1027		1027	.description = "Two memory operand instructions are slow",
1028	pub const feature_bitMode64 = Feature{	1028	.dependencies = 0,
1029	.name = "bitMode64",	1029	};
1030	.llvm_name = "64bit-mode",	1030
1031	.description = "64-bit mode (x86_64)",	1031	result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
1032	.dependencies = &[_]*const Feature {	1032	.index = @enumToInt(Feature.slow_unaligned_mem_16),
1033	},	1033	.name = @tagName(Feature.slow_unaligned_mem_16),
1034	};	1034	.llvm_name = "slow-unaligned-mem-16",
1035		1035	.description = "Slow unaligned 16-byte memory access",
1036	pub const features = &[_]*const Feature {	1036	.dependencies = 0,
1037	&feature_dnow3,	1037	};
1038	&feature_dnowa3,	1038
1039	&feature_bit64,	1039	result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
1040	&feature_adx,	1040	.index = @enumToInt(Feature.slow_unaligned_mem_32),
1041	&feature_aes,	1041	.name = @tagName(Feature.slow_unaligned_mem_32),
1042	&feature_avx,	1042	.llvm_name = "slow-unaligned-mem-32",
1043	&feature_avx2,	1043	.description = "Slow unaligned 32-byte memory access",
1044	&feature_avx512f,	1044	.dependencies = 0,
1045	&feature_avx512bf16,	1045	};
1046	&feature_avx512bitalg,	1046
1047	&feature_bmi,	1047	result[@enumToInt(Feature.soft_float)] = .{
1048	&feature_bmi2,	1048	.index = @enumToInt(Feature.soft_float),
1049	&feature_avx512bw,	1049	.name = @tagName(Feature.soft_float),
1050	&feature_branchfusion,	1050	.llvm_name = "soft-float",
1051	&feature_avx512cd,	1051	.description = "Use software floating point features",
1052	&feature_cldemote,	1052	.dependencies = 0,
1053	&feature_clflushopt,	1053	};
1054	&feature_clwb,	1054
1055	&feature_clzero,	1055	result[@enumToInt(Feature.tbm)] = .{
1056	&feature_cmov,	1056	.index = @enumToInt(Feature.tbm),
1057	&feature_cx8,	1057	.name = @tagName(Feature.tbm),
1058	&feature_cx16,	1058	.llvm_name = "tbm",
1059	&feature_avx512dq,	1059	.description = "Enable TBM instructions",
1060	&feature_enqcmd,	1060	.dependencies = 0,
1061	&feature_avx512er,	1061	};
1062	&feature_ermsb,	1062
1063	&feature_f16c,	1063	result[@enumToInt(Feature.vaes)] = .{
1064	&feature_fma,	1064	.index = @enumToInt(Feature.vaes),
1065	&feature_fma4,	1065	.name = @tagName(Feature.vaes),
1066	&feature_fsgsbase,	1066	.llvm_name = "vaes",
1067	&feature_fxsr,	1067	.description = "Promote selected AES instructions to AVX512/AVX registers",
1068	&feature_fast11bytenop,	1068	.dependencies = featureSet(&[_]Feature{
1069	&feature_fast15bytenop,	1069	.sse,
1070	&feature_fastBextr,	1070	}),
1071	&feature_fastHops,	1071	};
1072	&feature_fastLzcnt,	1072
1073	&feature_fastPartialYmmOrZmmWrite,	1073	result[@enumToInt(Feature.avx512vbmi)] = .{
1074	&feature_fastShldRotate,	1074	.index = @enumToInt(Feature.avx512vbmi),
1075	&feature_fastScalarFsqrt,	1075	.name = @tagName(Feature.avx512vbmi),
1076	&feature_fastScalarShiftMasks,	1076	.llvm_name = "avx512vbmi",
1077	&feature_fastVariableShuffle,	1077	.description = "Enable AVX-512 Vector Byte Manipulation Instructions",
1078	&feature_fastVectorFsqrt,	1078	.dependencies = featureSet(&[_]Feature{
1079	&feature_fastVectorShiftMasks,	1079	.sse,
1080	&feature_gfni,	1080	}),
1081	&feature_fastGather,	1081	};
1082	&feature_avx512ifma,	1082
1083	&feature_invpcid,	1083	result[@enumToInt(Feature.avx512vbmi2)] = .{
1084	&feature_sahf,	1084	.index = @enumToInt(Feature.avx512vbmi2),
1085	&feature_leaSp,	1085	.name = @tagName(Feature.avx512vbmi2),
1086	&feature_leaUsesAg,	1086	.llvm_name = "avx512vbmi2",
1087	&feature_lwp,	1087	.description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
1088	&feature_lzcnt,	1088	.dependencies = featureSet(&[_]Feature{
1089	&feature_falseDepsLzcntTzcnt,	1089	.sse,
1090	&feature_mmx,	1090	}),
1091	&feature_movbe,	1091	};
1092	&feature_movdir64b,	1092
1093	&feature_movdiri,	1093	result[@enumToInt(Feature.avx512vl)] = .{
1094	&feature_mpx,	1094	.index = @enumToInt(Feature.avx512vl),
1095	&feature_mwaitx,	1095	.name = @tagName(Feature.avx512vl),
1096	&feature_macrofusion,	1096	.llvm_name = "avx512vl",
1097	&feature_mergeToThreewayBranch,	1097	.description = "Enable AVX-512 Vector Length eXtensions",
1098	&feature_nopl,	1098	.dependencies = featureSet(&[_]Feature{
1099	&feature_pclmul,	1099	.sse,
1100	&feature_pconfig,	1100	}),
1101	&feature_avx512pf,	1101	};
1102	&feature_pku,	1102
1103	&feature_popcnt,	1103	result[@enumToInt(Feature.avx512vnni)] = .{
1104	&feature_falseDepsPopcnt,	1104	.index = @enumToInt(Feature.avx512vnni),
1105	&feature_prefetchwt1,	1105	.name = @tagName(Feature.avx512vnni),
1106	&feature_prfchw,	1106	.llvm_name = "avx512vnni",
1107	&feature_ptwrite,	1107	.description = "Enable AVX-512 Vector Neural Network Instructions",
1108	&feature_padShortFunctions,	1108	.dependencies = featureSet(&[_]Feature{
1109	&feature_prefer256Bit,	1109	.sse,
1110	&feature_rdpid,	1110	}),
1111	&feature_rdrnd,	1111	};
1112	&feature_rdseed,	1112
1113	&feature_rtm,	1113	result[@enumToInt(Feature.avx512vp2intersect)] = .{
1114	&feature_retpoline,	1114	.index = @enumToInt(Feature.avx512vp2intersect),
1115	&feature_retpolineExternalThunk,	1115	.name = @tagName(Feature.avx512vp2intersect),
1116	&feature_retpolineIndirectBranches,	1116	.llvm_name = "avx512vp2intersect",
1117	&feature_retpolineIndirectCalls,	1117	.description = "Enable AVX-512 vp2intersect",
1118	&feature_sgx,	1118	.dependencies = featureSet(&[_]Feature{
1119	&feature_sha,	1119	.sse,
1120	&feature_shstk,	1120	}),
1121	&feature_sse,	1121	};
1122	&feature_sse2,	1122
1123	&feature_sse3,	1123	result[@enumToInt(Feature.vpclmulqdq)] = .{
1124	&feature_sse4a,	1124	.index = @enumToInt(Feature.vpclmulqdq),
1125	&feature_sse41,	1125	.name = @tagName(Feature.vpclmulqdq),
1126	&feature_sse42,	1126	.llvm_name = "vpclmulqdq",
1127	&feature_sseUnalignedMem,	1127	.description = "Enable vpclmulqdq instructions",
1128	&feature_ssse3,	1128	.dependencies = featureSet(&[_]Feature{
1129	&feature_slow3opsLea,	1129	.sse,
1130	&feature_idivlToDivb,	1130	}),
1131	&feature_idivqToDivl,	1131	};
1132	&feature_slowIncdec,	1132
1133	&feature_slowLea,	1133	result[@enumToInt(Feature.avx512vpopcntdq)] = .{
1134	&feature_slowPmaddwd,	1134	.index = @enumToInt(Feature.avx512vpopcntdq),
1135	&feature_slowPmulld,	1135	.name = @tagName(Feature.avx512vpopcntdq),
1136	&feature_slowShld,	1136	.llvm_name = "avx512vpopcntdq",
1137	&feature_slowTwoMemOps,	1137	.description = "Enable AVX-512 Population Count Instructions",
1138	&feature_slowUnalignedMem16,	1138	.dependencies = featureSet(&[_]Feature{
1139	&feature_slowUnalignedMem32,	1139	.sse,
1140	&feature_softFloat,	1140	}),
1141	&feature_tbm,	1141	};
1142	&feature_vaes,	1142
1143	&feature_avx512vbmi,	1143	result[@enumToInt(Feature.waitpkg)] = .{
1144	&feature_avx512vbmi2,	1144	.index = @enumToInt(Feature.waitpkg),
1145	&feature_avx512vl,	1145	.name = @tagName(Feature.waitpkg),
1146	&feature_avx512vnni,	1146	.llvm_name = "waitpkg",
1147	&feature_avx512vp2intersect,	1147	.description = "Wait and pause enhancements",
1148	&feature_vpclmulqdq,	1148	.dependencies = 0,
1149	&feature_avx512vpopcntdq,	1149	};
1150	&feature_waitpkg,	1150
1151	&feature_wbnoinvd,	1151	result[@enumToInt(Feature.wbnoinvd)] = .{
1152	&feature_x87,	1152	.index = @enumToInt(Feature.wbnoinvd),
1153	&feature_xop,	1153	.name = @tagName(Feature.wbnoinvd),
1154	&feature_xsave,	1154	.llvm_name = "wbnoinvd",
1155	&feature_xsavec,	1155	.description = "Write Back No Invalidate",
1156	&feature_xsaveopt,	1156	.dependencies = 0,
1157	&feature_xsaves,	1157	};
1158	&feature_bitMode16,	1158
1159	&feature_bitMode32,	1159	result[@enumToInt(Feature.x87)] = .{
1160	&feature_bitMode64,	1160	.index = @enumToInt(Feature.x87),
1161	};	1161	.name = @tagName(Feature.x87),
1162		1162	.llvm_name = "x87",
1163	pub const cpu_amdfam10 = Cpu{	1163	.description = "Enable X87 float instructions",
1164	.name = "amdfam10",	1164	.dependencies = 0,
1165	.llvm_name = "amdfam10",	1165	};
1166	.dependencies = &[_]*const Feature {	1166
1167	&feature_mmx,	1167	result[@enumToInt(Feature.xop)] = .{
1168	&feature_dnowa3,	1168	.index = @enumToInt(Feature.xop),
1169	&feature_bit64,	1169	.name = @tagName(Feature.xop),
1170	&feature_cmov,	1170	.llvm_name = "xop",
1171	&feature_cx8,	1171	.description = "Enable XOP instructions",
1172	&feature_cx16,	1172	.dependencies = featureSet(&[_]Feature{
1173	&feature_fxsr,	1173	.sse,
1174	&feature_fastScalarShiftMasks,	1174	}),
1175	&feature_sahf,	1175	};
1176	&feature_lzcnt,	1176
1177	&feature_nopl,	1177	result[@enumToInt(Feature.xsave)] = .{
1178	&feature_popcnt,	1178	.index = @enumToInt(Feature.xsave),
1179	&feature_sse,	1179	.name = @tagName(Feature.xsave),
1180	&feature_sse4a,	1180	.llvm_name = "xsave",
1181	&feature_slowShld,	1181	.description = "Support xsave instructions",
1182	&feature_x87,	1182	.dependencies = 0,
1183	},	1183	};
1184	};	1184
1185		1185	result[@enumToInt(Feature.xsavec)] = .{
1186	pub const cpu_athlon = Cpu{	1186	.index = @enumToInt(Feature.xsavec),
1187	.name = "athlon",	1187	.name = @tagName(Feature.xsavec),
1188	.llvm_name = "athlon",	1188	.llvm_name = "xsavec",
1189	.dependencies = &[_]*const Feature {	1189	.description = "Support xsavec instructions",
1190	&feature_mmx,	1190	.dependencies = 0,
1191	&feature_dnowa3,	1191	};
1192	&feature_cmov,	1192
1193	&feature_cx8,	1193	result[@enumToInt(Feature.xsaveopt)] = .{
1194	&feature_nopl,	1194	.index = @enumToInt(Feature.xsaveopt),
1195	&feature_slowShld,	1195	.name = @tagName(Feature.xsaveopt),
1196	&feature_slowUnalignedMem16,	1196	.llvm_name = "xsaveopt",
1197	&feature_x87,	1197	.description = "Support xsaveopt instructions",
1198	},	1198	.dependencies = 0,
1199	};	1199	};
1200		1200
1201	pub const cpu_athlon4 = Cpu{	1201	result[@enumToInt(Feature.xsaves)] = .{
1202	.name = "athlon4",	1202	.index = @enumToInt(Feature.xsaves),
1203	.llvm_name = "athlon-4",	1203	.name = @tagName(Feature.xsaves),
1204	.dependencies = &[_]*const Feature {	1204	.llvm_name = "xsaves",
1205	&feature_mmx,	1205	.description = "Support xsaves instructions",
1206	&feature_dnowa3,	1206	.dependencies = 0,
1207	&feature_cmov,	1207	};
1208	&feature_cx8,	1208
1209	&feature_fxsr,	1209	break :blk result;
1210	&feature_nopl,	1210	};
1211	&feature_sse,	1211
1212	&feature_slowShld,	1212	pub const cpu = struct {
1213	&feature_slowUnalignedMem16,	1213	pub const amdfam10 = Cpu{
1214	&feature_x87,	1214	.name = "amdfam10",
1215	},	1215	.llvm_name = "amdfam10",
1216	};	1216	.dependencies = featureSet(&[_]Feature{
1217		1217	.mmx,
1218	pub const cpu_athlonFx = Cpu{	1218	.dnowa3,
1219	.name = "athlonFx",	1219	.bit64,
1220	.llvm_name = "athlon-fx",	1220	.cmov,
1221	.dependencies = &[_]*const Feature {	1221	.cx8,
1222	&feature_mmx,	1222	.cx16,
1223	&feature_dnowa3,	1223	.fxsr,
1224	&feature_bit64,	1224	.fast_scalar_shift_masks,
1225	&feature_cmov,	1225	.sahf,
1226	&feature_cx8,	1226	.lzcnt,
1227	&feature_fxsr,	1227	.nopl,
1228	&feature_fastScalarShiftMasks,	1228	.popcnt,
1229	&feature_nopl,	1229	.sse,
1230	&feature_sse,	1230	.sse4a,
1231	&feature_sse2,	1231	.slow_shld,
1232	&feature_slowShld,	1232	.x87,
1233	&feature_slowUnalignedMem16,	1233	}),
1234	&feature_x87,	1234	};
1235	},	1235
1236	};	1236	pub const athlon = Cpu{
1237		1237	.name = "athlon",
1238	pub const cpu_athlonMp = Cpu{	1238	.llvm_name = "athlon",
1239	.name = "athlonMp",	1239	.dependencies = featureSet(&[_]Feature{
1240	.llvm_name = "athlon-mp",	1240	.mmx,
1241	.dependencies = &[_]*const Feature {	1241	.dnowa3,
1242	&feature_mmx,	1242	.cmov,
1243	&feature_dnowa3,	1243	.cx8,
1244	&feature_cmov,	1244	.nopl,
1245	&feature_cx8,	1245	.slow_shld,
1246	&feature_fxsr,	1246	.slow_unaligned_mem_16,
1247	&feature_nopl,	1247	.x87,
1248	&feature_sse,	1248	}),
1249	&feature_slowShld,	1249	};
1250	&feature_slowUnalignedMem16,	1250
1251	&feature_x87,	1251	pub const athlon4 = Cpu{
1252	},	1252	.name = "athlon_4",
1253	};	1253	.llvm_name = "athlon-4",
1254		1254	.dependencies = featureSet(&[_]Feature{
1255	pub const cpu_athlonTbird = Cpu{	1255	.mmx,
1256	.name = "athlonTbird",	1256	.dnowa3,
1257	.llvm_name = "athlon-tbird",	1257	.cmov,
1258	.dependencies = &[_]*const Feature {	1258	.cx8,
1259	&feature_mmx,	1259	.fxsr,
1260	&feature_dnowa3,	1260	.nopl,
1261	&feature_cmov,	1261	.sse,
1262	&feature_cx8,	1262	.slow_shld,
1263	&feature_nopl,	1263	.slow_unaligned_mem_16,
1264	&feature_slowShld,	1264	.x87,
1265	&feature_slowUnalignedMem16,	1265	}),
1266	&feature_x87,	1266	};
1267	},	1267
1268	};	1268	pub const athlon_fx = Cpu{
1269		1269	.name = "athlon_fx",
1270	pub const cpu_athlonXp = Cpu{	1270	.llvm_name = "athlon-fx",
1271	.name = "athlonXp",	1271	.dependencies = featureSet(&[_]Feature{
1272	.llvm_name = "athlon-xp",	1272	.mmx,
1273	.dependencies = &[_]*const Feature {	1273	.dnowa3,
1274	&feature_mmx,	1274	.bit64,
1275	&feature_dnowa3,	1275	.cmov,
1276	&feature_cmov,	1276	.cx8,
1277	&feature_cx8,	1277	.fxsr,
1278	&feature_fxsr,	1278	.fast_scalar_shift_masks,
1279	&feature_nopl,	1279	.nopl,
1280	&feature_sse,	1280	.sse,
1281	&feature_slowShld,	1281	.sse2,
1282	&feature_slowUnalignedMem16,	1282	.slow_shld,
1283	&feature_x87,	1283	.slow_unaligned_mem_16,
1284	},	1284	.x87,
1285	};	1285	}),
1286		1286	};
1287	pub const cpu_athlon64 = Cpu{	1287
1288	.name = "athlon64",	1288	pub const athlon_mp = Cpu{
1289	.llvm_name = "athlon64",	1289	.name = "athlon_mp",
1290	.dependencies = &[_]*const Feature {	1290	.llvm_name = "athlon-mp",
1291	&feature_mmx,	1291	.dependencies = featureSet(&[_]Feature{
1292	&feature_dnowa3,	1292	.mmx,
1293	&feature_bit64,	1293	.dnowa3,
1294	&feature_cmov,	1294	.cmov,
1295	&feature_cx8,	1295	.cx8,
1296	&feature_fxsr,	1296	.fxsr,
1297	&feature_fastScalarShiftMasks,	1297	.nopl,
1298	&feature_nopl,	1298	.sse,
1299	&feature_sse,	1299	.slow_shld,
1300	&feature_sse2,	1300	.slow_unaligned_mem_16,
1301	&feature_slowShld,	1301	.x87,
1302	&feature_slowUnalignedMem16,	1302	}),
1303	&feature_x87,	1303	};
1304	},	1304
1305	};	1305	pub const athlon_tbird = Cpu{
1306		1306	.name = "athlon_tbird",
1307	pub const cpu_athlon64Sse3 = Cpu{	1307	.llvm_name = "athlon-tbird",
1308	.name = "athlon64Sse3",	1308	.dependencies = featureSet(&[_]Feature{
1309	.llvm_name = "athlon64-sse3",	1309	.mmx,
1310	.dependencies = &[_]*const Feature {	1310	.dnowa3,
1311	&feature_mmx,	1311	.cmov,
1312	&feature_dnowa3,	1312	.cx8,
1313	&feature_bit64,	1313	.nopl,
1314	&feature_cmov,	1314	.slow_shld,
1315	&feature_cx8,	1315	.slow_unaligned_mem_16,
1316	&feature_cx16,	1316	.x87,
1317	&feature_fxsr,	1317	}),
1318	&feature_fastScalarShiftMasks,	1318	};
1319	&feature_nopl,	1319
1320	&feature_sse,	1320	pub const athlon_xp = Cpu{
1321	&feature_sse3,	1321	.name = "athlon_xp",
1322	&feature_slowShld,	1322	.llvm_name = "athlon-xp",
1323	&feature_slowUnalignedMem16,	1323	.dependencies = featureSet(&[_]Feature{
1324	&feature_x87,	1324	.mmx,
1325	},	1325	.dnowa3,
1326	};	1326	.cmov,
1327		1327	.cx8,
1328	pub const cpu_atom = Cpu{	1328	.fxsr,
1329	.name = "atom",	1329	.nopl,
1330	.llvm_name = "atom",	1330	.sse,
1331	.dependencies = &[_]*const Feature {	1331	.slow_shld,
1332	&feature_bit64,	1332	.slow_unaligned_mem_16,
1333	&feature_cmov,	1333	.x87,
1334	&feature_cx8,	1334	}),
1335	&feature_cx16,	1335	};
1336	&feature_fxsr,	1336
1337	&feature_sahf,	1337	pub const athlon64 = Cpu{
1338	&feature_leaSp,	1338	.name = "athlon64",
1339	&feature_leaUsesAg,	1339	.llvm_name = "athlon64",
1340	&feature_mmx,	1340	.dependencies = featureSet(&[_]Feature{
1341	&feature_movbe,	1341	.mmx,
1342	&feature_nopl,	1342	.dnowa3,
1343	&feature_padShortFunctions,	1343	.bit64,
1344	&feature_sse,	1344	.cmov,
1345	&feature_ssse3,	1345	.cx8,
1346	&feature_idivlToDivb,	1346	.fxsr,
1347	&feature_idivqToDivl,	1347	.fast_scalar_shift_masks,
1348	&feature_slowTwoMemOps,	1348	.nopl,
1349	&feature_slowUnalignedMem16,	1349	.sse,
1350	&feature_x87,	1350	.sse2,
1351	},	1351	.slow_shld,
1352	};	1352	.slow_unaligned_mem_16,
1353		1353	.x87,
1354	pub const cpu_barcelona = Cpu{	1354	}),
1355	.name = "barcelona",	1355	};
1356	.llvm_name = "barcelona",	1356
1357	.dependencies = &[_]*const Feature {	1357	pub const athlon64_sse3 = Cpu{
1358	&feature_mmx,	1358	.name = "athlon64_sse3",
1359	&feature_dnowa3,	1359	.llvm_name = "athlon64-sse3",
1360	&feature_bit64,	1360	.dependencies = featureSet(&[_]Feature{
1361	&feature_cmov,	1361	.mmx,
1362	&feature_cx8,	1362	.dnowa3,
1363	&feature_cx16,	1363	.bit64,
1364	&feature_fxsr,	1364	.cmov,
1365	&feature_fastScalarShiftMasks,	1365	.cx8,
1366	&feature_sahf,	1366	.cx16,
1367	&feature_lzcnt,	1367	.fxsr,
1368	&feature_nopl,	1368	.fast_scalar_shift_masks,
1369	&feature_popcnt,	1369	.nopl,
1370	&feature_sse,	1370	.sse,
1371	&feature_sse4a,	1371	.sse3,
1372	&feature_slowShld,	1372	.slow_shld,
1373	&feature_x87,	1373	.slow_unaligned_mem_16,
1374	},	1374	.x87,
1375	};	1375	}),
1376		1376	};
1377	pub const cpu_bdver1 = Cpu{	1377
1378	.name = "bdver1",	1378	pub const atom = Cpu{
1379	.llvm_name = "bdver1",	1379	.name = "atom",
1380	.dependencies = &[_]*const Feature {	1380	.llvm_name = "atom",
1381	&feature_bit64,	1381	.dependencies = featureSet(&[_]Feature{
1382	&feature_sse,	1382	.bit64,
1383	&feature_aes,	1383	.cmov,
1384	&feature_branchfusion,	1384	.cx8,
1385	&feature_cmov,	1385	.cx16,
1386	&feature_cx8,	1386	.fxsr,
1387	&feature_cx16,	1387	.sahf,
1388	&feature_fxsr,	1388	.lea_sp,
1389	&feature_fast11bytenop,	1389	.lea_uses_ag,
1390	&feature_fastScalarShiftMasks,	1390	.mmx,
1391	&feature_sahf,	1391	.movbe,
1392	&feature_lwp,	1392	.nopl,
1393	&feature_lzcnt,	1393	.pad_short_functions,
1394	&feature_mmx,	1394	.sse,
1395	&feature_nopl,	1395	.ssse3,
1396	&feature_pclmul,	1396	.idivl_to_divb,
1397	&feature_popcnt,	1397	.idivq_to_divl,
1398	&feature_prfchw,	1398	.slow_two_mem_ops,
1399	&feature_slowShld,	1399	.slow_unaligned_mem_16,
1400	&feature_x87,	1400	.x87,
1401	&feature_xop,	1401	}),
1402	&feature_xsave,	1402	};
1403	},	1403
1404	};	1404	pub const barcelona = Cpu{
1405		1405	.name = "barcelona",
1406	pub const cpu_bdver2 = Cpu{	1406	.llvm_name = "barcelona",
1407	.name = "bdver2",	1407	.dependencies = featureSet(&[_]Feature{
1408	.llvm_name = "bdver2",	1408	.mmx,
1409	.dependencies = &[_]*const Feature {	1409	.dnowa3,
1410	&feature_bit64,	1410	.bit64,
1411	&feature_sse,	1411	.cmov,
1412	&feature_aes,	1412	.cx8,
1413	&feature_bmi,	1413	.cx16,
1414	&feature_branchfusion,	1414	.fxsr,
1415	&feature_cmov,	1415	.fast_scalar_shift_masks,
1416	&feature_cx8,	1416	.sahf,
1417	&feature_cx16,	1417	.lzcnt,
1418	&feature_f16c,	1418	.nopl,
1419	&feature_fma,	1419	.popcnt,
1420	&feature_fxsr,	1420	.sse,
1421	&feature_fast11bytenop,	1421	.sse4a,
1422	&feature_fastBextr,	1422	.slow_shld,
1423	&feature_fastScalarShiftMasks,	1423	.x87,
1424	&feature_sahf,	1424	}),
1425	&feature_lwp,	1425	};
1426	&feature_lzcnt,	1426
1427	&feature_mmx,	1427	pub const bdver1 = Cpu{
1428	&feature_nopl,	1428	.name = "bdver1",
1429	&feature_pclmul,	1429	.llvm_name = "bdver1",
1430	&feature_popcnt,	1430	.dependencies = featureSet(&[_]Feature{
1431	&feature_prfchw,	1431	.bit64,
1432	&feature_slowShld,	1432	.sse,
1433	&feature_tbm,	1433	.aes,
1434	&feature_x87,	1434	.branchfusion,
1435	&feature_xop,	1435	.cmov,
1436	&feature_xsave,	1436	.cx8,
1437	},	1437	.cx16,
1438	};	1438	.fxsr,
1439		1439	.fast11bytenop,
1440	pub const cpu_bdver3 = Cpu{	1440	.fast_scalar_shift_masks,
1441	.name = "bdver3",	1441	.sahf,
1442	.llvm_name = "bdver3",	1442	.lwp,
1443	.dependencies = &[_]*const Feature {	1443	.lzcnt,
1444	&feature_bit64,	1444	.mmx,
1445	&feature_sse,	1445	.nopl,
1446	&feature_aes,	1446	.pclmul,
1447	&feature_bmi,	1447	.popcnt,
1448	&feature_branchfusion,	1448	.prfchw,
1449	&feature_cmov,	1449	.slow_shld,
1450	&feature_cx8,	1450	.x87,
1451	&feature_cx16,	1451	.xop,
1452	&feature_f16c,	1452	.xsave,
1453	&feature_fma,	1453	}),
1454	&feature_fsgsbase,	1454	};
1455	&feature_fxsr,	1455
1456	&feature_fast11bytenop,	1456	pub const bdver2 = Cpu{
1457	&feature_fastBextr,	1457	.name = "bdver2",
1458	&feature_fastScalarShiftMasks,	1458	.llvm_name = "bdver2",
1459	&feature_sahf,	1459	.dependencies = featureSet(&[_]Feature{
1460	&feature_lwp,	1460	.bit64,
1461	&feature_lzcnt,	1461	.sse,
1462	&feature_mmx,	1462	.aes,
1463	&feature_nopl,	1463	.bmi,
1464	&feature_pclmul,	1464	.branchfusion,
1465	&feature_popcnt,	1465	.cmov,
1466	&feature_prfchw,	1466	.cx8,
1467	&feature_slowShld,	1467	.cx16,
1468	&feature_tbm,	1468	.f16c,
1469	&feature_x87,	1469	.fma,
1470	&feature_xop,	1470	.fxsr,
1471	&feature_xsave,	1471	.fast11bytenop,
1472	&feature_xsaveopt,	1472	.fast_bextr,
1473	},	1473	.fast_scalar_shift_masks,
1474	};	1474	.sahf,
1475		1475	.lwp,
1476	pub const cpu_bdver4 = Cpu{	1476	.lzcnt,
1477	.name = "bdver4",	1477	.mmx,
1478	.llvm_name = "bdver4",	1478	.nopl,
1479	.dependencies = &[_]*const Feature {	1479	.pclmul,
1480	&feature_bit64,	1480	.popcnt,
1481	&feature_sse,	1481	.prfchw,
1482	&feature_aes,	1482	.slow_shld,
1483	&feature_avx2,	1483	.tbm,
1484	&feature_bmi,	1484	.x87,
1485	&feature_bmi2,	1485	.xop,
1486	&feature_branchfusion,	1486	.xsave,
1487	&feature_cmov,	1487	}),
1488	&feature_cx8,	1488	};
1489	&feature_cx16,	1489
1490	&feature_f16c,	1490	pub const bdver3 = Cpu{
1491	&feature_fma,	1491	.name = "bdver3",
1492	&feature_fsgsbase,	1492	.llvm_name = "bdver3",
1493	&feature_fxsr,	1493	.dependencies = featureSet(&[_]Feature{
1494	&feature_fast11bytenop,	1494	.bit64,
1495	&feature_fastBextr,	1495	.sse,
1496	&feature_fastScalarShiftMasks,	1496	.aes,
1497	&feature_sahf,	1497	.bmi,
1498	&feature_lwp,	1498	.branchfusion,
1499	&feature_lzcnt,	1499	.cmov,
1500	&feature_mmx,	1500	.cx8,
1501	&feature_mwaitx,	1501	.cx16,
1502	&feature_nopl,	1502	.f16c,
1503	&feature_pclmul,	1503	.fma,
1504	&feature_popcnt,	1504	.fsgsbase,
1505	&feature_prfchw,	1505	.fxsr,
1506	&feature_slowShld,	1506	.fast11bytenop,
1507	&feature_tbm,	1507	.fast_bextr,
1508	&feature_x87,	1508	.fast_scalar_shift_masks,
1509	&feature_xop,	1509	.sahf,
1510	&feature_xsave,	1510	.lwp,
1511	&feature_xsaveopt,	1511	.lzcnt,
1512	},	1512	.mmx,
1513	};	1513	.nopl,
1514		1514	.pclmul,
1515	pub const cpu_bonnell = Cpu{	1515	.popcnt,
1516	.name = "bonnell",	1516	.prfchw,
1517	.llvm_name = "bonnell",	1517	.slow_shld,
1518	.dependencies = &[_]*const Feature {	1518	.tbm,
1519	&feature_bit64,	1519	.x87,
1520	&feature_cmov,	1520	.xop,
1521	&feature_cx8,	1521	.xsave,
1522	&feature_cx16,	1522	.xsaveopt,
1523	&feature_fxsr,	1523	}),
1524	&feature_sahf,	1524	};
1525	&feature_leaSp,	1525
1526	&feature_leaUsesAg,	1526	pub const bdver4 = Cpu{
1527	&feature_mmx,	1527	.name = "bdver4",
1528	&feature_movbe,	1528	.llvm_name = "bdver4",
1529	&feature_nopl,	1529	.dependencies = featureSet(&[_]Feature{
1530	&feature_padShortFunctions,	1530	.bit64,
1531	&feature_sse,	1531	.sse,
1532	&feature_ssse3,	1532	.aes,
1533	&feature_idivlToDivb,	1533	.avx2,
1534	&feature_idivqToDivl,	1534	.bmi,
1535	&feature_slowTwoMemOps,	1535	.bmi2,
1536	&feature_slowUnalignedMem16,	1536	.branchfusion,
1537	&feature_x87,	1537	.cmov,
1538	},	1538	.cx8,
1539	};	1539	.cx16,
1540		1540	.f16c,
1541	pub const cpu_broadwell = Cpu{	1541	.fma,
1542	.name = "broadwell",	1542	.fsgsbase,
1543	.llvm_name = "broadwell",	1543	.fxsr,
1544	.dependencies = &[_]*const Feature {	1544	.fast11bytenop,
1545	&feature_bit64,	1545	.fast_bextr,
1546	&feature_adx,	1546	.fast_scalar_shift_masks,
1547	&feature_sse,	1547	.sahf,
1548	&feature_avx,	1548	.lwp,
1549	&feature_avx2,	1549	.lzcnt,
1550	&feature_bmi,	1550	.mmx,
1551	&feature_bmi2,	1551	.mwaitx,
1552	&feature_cmov,	1552	.nopl,
1553	&feature_cx8,	1553	.pclmul,
1554	&feature_cx16,	1554	.popcnt,
1555	&feature_ermsb,	1555	.prfchw,
1556	&feature_f16c,	1556	.slow_shld,
1557	&feature_fma,	1557	.tbm,
1558	&feature_fsgsbase,	1558	.x87,
1559	&feature_fxsr,	1559	.xop,
1560	&feature_fastShldRotate,	1560	.xsave,
1561	&feature_fastScalarFsqrt,	1561	.xsaveopt,
1562	&feature_fastVariableShuffle,	1562	}),
1563	&feature_invpcid,	1563	};
1564	&feature_sahf,	1564
1565	&feature_lzcnt,	1565	pub const bonnell = Cpu{
1566	&feature_falseDepsLzcntTzcnt,	1566	.name = "bonnell",
1567	&feature_mmx,	1567	.llvm_name = "bonnell",
1568	&feature_movbe,	1568	.dependencies = featureSet(&[_]Feature{
1569	&feature_macrofusion,	1569	.bit64,
1570	&feature_mergeToThreewayBranch,	1570	.cmov,
1571	&feature_nopl,	1571	.cx8,
1572	&feature_pclmul,	1572	.cx16,
1573	&feature_popcnt,	1573	.fxsr,
1574	&feature_falseDepsPopcnt,	1574	.sahf,
1575	&feature_prfchw,	1575	.lea_sp,
1576	&feature_rdrnd,	1576	.lea_uses_ag,
1577	&feature_rdseed,	1577	.mmx,
1578	&feature_sse42,	1578	.movbe,
1579	&feature_slow3opsLea,	1579	.nopl,
1580	&feature_idivqToDivl,	1580	.pad_short_functions,
1581	&feature_x87,	1581	.sse,
1582	&feature_xsave,	1582	.ssse3,
1583	&feature_xsaveopt,	1583	.idivl_to_divb,
1584	},	1584	.idivq_to_divl,
1585	};	1585	.slow_two_mem_ops,
1586		1586	.slow_unaligned_mem_16,
1587	pub const cpu_btver1 = Cpu{	1587	.x87,
1588	.name = "btver1",	1588	}),
1589	.llvm_name = "btver1",	1589	};
1590	.dependencies = &[_]*const Feature {	1590
1591	&feature_bit64,	1591	pub const broadwell = Cpu{
1592	&feature_cmov,	1592	.name = "broadwell",
1593	&feature_cx8,	1593	.llvm_name = "broadwell",
1594	&feature_cx16,	1594	.dependencies = featureSet(&[_]Feature{
1595	&feature_fxsr,	1595	.bit64,
1596	&feature_fast15bytenop,	1596	.adx,
1597	&feature_fastScalarShiftMasks,	1597	.sse,
1598	&feature_fastVectorShiftMasks,	1598	.avx,
1599	&feature_sahf,	1599	.avx2,
1600	&feature_lzcnt,	1600	.bmi,
1601	&feature_mmx,	1601	.bmi2,
1602	&feature_nopl,	1602	.cmov,
1603	&feature_popcnt,	1603	.cx8,
1604	&feature_prfchw,	1604	.cx16,
1605	&feature_sse,	1605	.ermsb,
1606	&feature_sse4a,	1606	.f16c,
1607	&feature_ssse3,	1607	.fma,
1608	&feature_slowShld,	1608	.fsgsbase,
1609	&feature_x87,	1609	.fxsr,
1610	},	1610	.fast_shld_rotate,
1611	};	1611	.fast_scalar_fsqrt,
1612		1612	.fast_variable_shuffle,
1613	pub const cpu_btver2 = Cpu{	1613	.invpcid,
1614	.name = "btver2",	1614	.sahf,
1615	.llvm_name = "btver2",	1615	.lzcnt,
1616	.dependencies = &[_]*const Feature {	1616	.false_deps_lzcnt_tzcnt,
1617	&feature_bit64,	1617	.mmx,
1618	&feature_sse,	1618	.movbe,
1619	&feature_aes,	1619	.macrofusion,
1620	&feature_avx,	1620	.merge_to_threeway_branch,
1621	&feature_bmi,	1621	.nopl,
1622	&feature_cmov,	1622	.pclmul,
1623	&feature_cx8,	1623	.popcnt,
1624	&feature_cx16,	1624	.false_deps_popcnt,
1625	&feature_f16c,	1625	.prfchw,
1626	&feature_fxsr,	1626	.rdrnd,
1627	&feature_fast15bytenop,	1627	.rdseed,
1628	&feature_fastBextr,	1628	.sse42,
1629	&feature_fastHops,	1629	.slow_3ops_lea,
1630	&feature_fastLzcnt,	1630	.idivq_to_divl,
1631	&feature_fastPartialYmmOrZmmWrite,	1631	.x87,
1632	&feature_fastScalarShiftMasks,	1632	.xsave,
1633	&feature_fastVectorShiftMasks,	1633	.xsaveopt,
1634	&feature_sahf,	1634	}),
1635	&feature_lzcnt,	1635	};
1636	&feature_mmx,	1636
1637	&feature_movbe,	1637	pub const btver1 = Cpu{
1638	&feature_nopl,	1638	.name = "btver1",
1639	&feature_pclmul,	1639	.llvm_name = "btver1",
1640	&feature_popcnt,	1640	.dependencies = featureSet(&[_]Feature{
1641	&feature_prfchw,	1641	.bit64,
1642	&feature_sse4a,	1642	.cmov,
1643	&feature_ssse3,	1643	.cx8,
1644	&feature_slowShld,	1644	.cx16,
1645	&feature_x87,	1645	.fxsr,
1646	&feature_xsave,	1646	.fast15bytenop,
1647	&feature_xsaveopt,	1647	.fast_scalar_shift_masks,
1648	},	1648	.fast_vector_shift_masks,
1649	};	1649	.sahf,
1650		1650	.lzcnt,
1651	pub const cpu_c3 = Cpu{	1651	.mmx,
1652	.name = "c3",	1652	.nopl,
1653	.llvm_name = "c3",	1653	.popcnt,
1654	.dependencies = &[_]*const Feature {	1654	.prfchw,
1655	&feature_mmx,	1655	.sse,
1656	&feature_dnow3,	1656	.sse4a,
1657	&feature_slowUnalignedMem16,	1657	.ssse3,
1658	&feature_x87,	1658	.slow_shld,
1659	},	1659	.x87,
1660	};	1660	}),
1661		1661	};
1662	pub const cpu_c32 = Cpu{	1662
1663	.name = "c32",	1663	pub const btver2 = Cpu{
1664	.llvm_name = "c3-2",	1664	.name = "btver2",
1665	.dependencies = &[_]*const Feature {	1665	.llvm_name = "btver2",
1666	&feature_cmov,	1666	.dependencies = featureSet(&[_]Feature{
1667	&feature_cx8,	1667	.bit64,
1668	&feature_fxsr,	1668	.sse,
1669	&feature_mmx,	1669	.aes,
1670	&feature_sse,	1670	.avx,
1671	&feature_slowUnalignedMem16,	1671	.bmi,
1672	&feature_x87,	1672	.cmov,
1673	},	1673	.cx8,
1674	};	1674	.cx16,
1675		1675	.f16c,
1676	pub const cpu_cannonlake = Cpu{	1676	.fxsr,
1677	.name = "cannonlake",	1677	.fast15bytenop,
1678	.llvm_name = "cannonlake",	1678	.fast_bextr,
1679	.dependencies = &[_]*const Feature {	1679	.fast_hops,
1680	&feature_bit64,	1680	.fast_lzcnt,
1681	&feature_adx,	1681	.fast_partial_ymm_or_zmm_write,
1682	&feature_sse,	1682	.fast_scalar_shift_masks,
1683	&feature_aes,	1683	.fast_vector_shift_masks,
1684	&feature_avx,	1684	.sahf,
1685	&feature_avx2,	1685	.lzcnt,
1686	&feature_avx512f,	1686	.mmx,
1687	&feature_bmi,	1687	.movbe,
1688	&feature_bmi2,	1688	.nopl,
1689	&feature_avx512bw,	1689	.pclmul,
1690	&feature_avx512cd,	1690	.popcnt,
1691	&feature_clflushopt,	1691	.prfchw,
1692	&feature_cmov,	1692	.sse4a,
1693	&feature_cx8,	1693	.ssse3,
1694	&feature_cx16,	1694	.slow_shld,
1695	&feature_avx512dq,	1695	.x87,
1696	&feature_ermsb,	1696	.xsave,
1697	&feature_f16c,	1697	.xsaveopt,
1698	&feature_fma,	1698	}),
1699	&feature_fsgsbase,	1699	};
1700	&feature_fxsr,	1700
1701	&feature_fastShldRotate,	1701	pub const c3 = Cpu{
1702	&feature_fastScalarFsqrt,	1702	.name = "c3",
1703	&feature_fastVariableShuffle,	1703	.llvm_name = "c3",
1704	&feature_fastVectorFsqrt,	1704	.dependencies = featureSet(&[_]Feature{
1705	&feature_fastGather,	1705	.mmx,
1706	&feature_avx512ifma,	1706	.dnow3,
1707	&feature_invpcid,	1707	.slow_unaligned_mem_16,
1708	&feature_sahf,	1708	.x87,
1709	&feature_lzcnt,	1709	}),
1710	&feature_mmx,	1710	};
1711	&feature_movbe,	1711
1712	&feature_mpx,	1712	pub const c32 = Cpu{
1713	&feature_macrofusion,	1713	.name = "c3_2",
1714	&feature_mergeToThreewayBranch,	1714	.llvm_name = "c3-2",
1715	&feature_nopl,	1715	.dependencies = featureSet(&[_]Feature{
1716	&feature_pclmul,	1716	.cmov,
1717	&feature_pku,	1717	.cx8,
1718	&feature_popcnt,	1718	.fxsr,
1719	&feature_prfchw,	1719	.mmx,
1720	&feature_rdrnd,	1720	.sse,
1721	&feature_rdseed,	1721	.slow_unaligned_mem_16,
1722	&feature_sgx,	1722	.x87,
1723	&feature_sha,	1723	}),
1724	&feature_sse42,	1724	};
1725	&feature_slow3opsLea,	1725
1726	&feature_idivqToDivl,	1726	pub const cannonlake = Cpu{
1727	&feature_avx512vbmi,	1727	.name = "cannonlake",
1728	&feature_avx512vl,	1728	.llvm_name = "cannonlake",
1729	&feature_x87,	1729	.dependencies = featureSet(&[_]Feature{
1730	&feature_xsave,	1730	.bit64,
1731	&feature_xsavec,	1731	.adx,
1732	&feature_xsaveopt,	1732	.sse,
1733	&feature_xsaves,	1733	.aes,
1734	},	1734	.avx,
1735	};	1735	.avx2,
1736		1736	.avx512f,
1737	pub const cpu_cascadelake = Cpu{	1737	.bmi,
1738	.name = "cascadelake",	1738	.bmi2,
1739	.llvm_name = "cascadelake",	1739	.avx512bw,
1740	.dependencies = &[_]*const Feature {	1740	.avx512cd,
1741	&feature_bit64,	1741	.clflushopt,
1742	&feature_adx,	1742	.cmov,
1743	&feature_sse,	1743	.cx8,
1744	&feature_aes,	1744	.cx16,
1745	&feature_avx,	1745	.avx512dq,
1746	&feature_avx2,	1746	.ermsb,
1747	&feature_avx512f,	1747	.f16c,
1748	&feature_bmi,	1748	.fma,
1749	&feature_bmi2,	1749	.fsgsbase,
1750	&feature_avx512bw,	1750	.fxsr,
1751	&feature_avx512cd,	1751	.fast_shld_rotate,
1752	&feature_clflushopt,	1752	.fast_scalar_fsqrt,
1753	&feature_clwb,	1753	.fast_variable_shuffle,
1754	&feature_cmov,	1754	.fast_vector_fsqrt,
1755	&feature_cx8,	1755	.fast_gather,
1756	&feature_cx16,	1756	.avx512ifma,
1757	&feature_avx512dq,	1757	.invpcid,
1758	&feature_ermsb,	1758	.sahf,
1759	&feature_f16c,	1759	.lzcnt,
1760	&feature_fma,	1760	.mmx,
1761	&feature_fsgsbase,	1761	.movbe,
1762	&feature_fxsr,	1762	.mpx,
1763	&feature_fastShldRotate,	1763	.macrofusion,
1764	&feature_fastScalarFsqrt,	1764	.merge_to_threeway_branch,
1765	&feature_fastVariableShuffle,	1765	.nopl,
1766	&feature_fastVectorFsqrt,	1766	.pclmul,
1767	&feature_fastGather,	1767	.pku,
1768	&feature_invpcid,	1768	.popcnt,
1769	&feature_sahf,	1769	.prfchw,
1770	&feature_lzcnt,	1770	.rdrnd,
1771	&feature_mmx,	1771	.rdseed,
1772	&feature_movbe,	1772	.sgx,
1773	&feature_mpx,	1773	.sha,
1774	&feature_macrofusion,	1774	.sse42,
1775	&feature_mergeToThreewayBranch,	1775	.slow_3ops_lea,
1776	&feature_nopl,	1776	.idivq_to_divl,
1777	&feature_pclmul,	1777	.avx512vbmi,
1778	&feature_pku,	1778	.avx512vl,
1779	&feature_popcnt,	1779	.x87,
1780	&feature_falseDepsPopcnt,	1780	.xsave,
1781	&feature_prfchw,	1781	.xsavec,
1782	&feature_rdrnd,	1782	.xsaveopt,
1783	&feature_rdseed,	1783	.xsaves,
1784	&feature_sse42,	1784	}),
1785	&feature_slow3opsLea,	1785	};
1786	&feature_idivqToDivl,	1786
1787	&feature_avx512vl,	1787	pub const cascadelake = Cpu{
1788	&feature_avx512vnni,	1788	.name = "cascadelake",
1789	&feature_x87,	1789	.llvm_name = "cascadelake",
1790	&feature_xsave,	1790	.dependencies = featureSet(&[_]Feature{
1791	&feature_xsavec,	1791	.bit64,
1792	&feature_xsaveopt,	1792	.adx,
1793	&feature_xsaves,	1793	.sse,
1794	},	1794	.aes,
1795	};	1795	.avx,
1796		1796	.avx2,
1797	pub const cpu_cooperlake = Cpu{	1797	.avx512f,
1798	.name = "cooperlake",	1798	.bmi,
1799	.llvm_name = "cooperlake",	1799	.bmi2,
1800	.dependencies = &[_]*const Feature {	1800	.avx512bw,
1801	&feature_bit64,	1801	.avx512cd,
1802	&feature_adx,	1802	.clflushopt,
1803	&feature_sse,	1803	.clwb,
1804	&feature_aes,	1804	.cmov,
1805	&feature_avx,	1805	.cx8,
1806	&feature_avx2,	1806	.cx16,
1807	&feature_avx512f,	1807	.avx512dq,
1808	&feature_avx512bf16,	1808	.ermsb,
1809	&feature_bmi,	1809	.f16c,
1810	&feature_bmi2,	1810	.fma,
1811	&feature_avx512bw,	1811	.fsgsbase,
1812	&feature_avx512cd,	1812	.fxsr,
1813	&feature_clflushopt,	1813	.fast_shld_rotate,
1814	&feature_clwb,	1814	.fast_scalar_fsqrt,
1815	&feature_cmov,	1815	.fast_variable_shuffle,
1816	&feature_cx8,	1816	.fast_vector_fsqrt,
1817	&feature_cx16,	1817	.fast_gather,
1818	&feature_avx512dq,	1818	.invpcid,
1819	&feature_ermsb,	1819	.sahf,
1820	&feature_f16c,	1820	.lzcnt,
1821	&feature_fma,	1821	.mmx,
1822	&feature_fsgsbase,	1822	.movbe,
1823	&feature_fxsr,	1823	.mpx,
1824	&feature_fastShldRotate,	1824	.macrofusion,
1825	&feature_fastScalarFsqrt,	1825	.merge_to_threeway_branch,
1826	&feature_fastVariableShuffle,	1826	.nopl,
1827	&feature_fastVectorFsqrt,	1827	.pclmul,
1828	&feature_fastGather,	1828	.pku,
1829	&feature_invpcid,	1829	.popcnt,
1830	&feature_sahf,	1830	.false_deps_popcnt,
1831	&feature_lzcnt,	1831	.prfchw,
1832	&feature_mmx,	1832	.rdrnd,
1833	&feature_movbe,	1833	.rdseed,
1834	&feature_mpx,	1834	.sse42,
1835	&feature_macrofusion,	1835	.slow_3ops_lea,
1836	&feature_mergeToThreewayBranch,	1836	.idivq_to_divl,
1837	&feature_nopl,	1837	.avx512vl,
1838	&feature_pclmul,	1838	.avx512vnni,
1839	&feature_pku,	1839	.x87,
1840	&feature_popcnt,	1840	.xsave,
1841	&feature_falseDepsPopcnt,	1841	.xsavec,
1842	&feature_prfchw,	1842	.xsaveopt,
1843	&feature_rdrnd,	1843	.xsaves,
1844	&feature_rdseed,	1844	}),
1845	&feature_sse42,	1845	};
1846	&feature_slow3opsLea,	1846
1847	&feature_idivqToDivl,	1847	pub const cooperlake = Cpu{
1848	&feature_avx512vl,	1848	.name = "cooperlake",
1849	&feature_avx512vnni,	1849	.llvm_name = "cooperlake",
1850	&feature_x87,	1850	.dependencies = featureSet(&[_]Feature{
1851	&feature_xsave,	1851	.bit64,
1852	&feature_xsavec,	1852	.adx,
1853	&feature_xsaveopt,	1853	.sse,
1854	&feature_xsaves,	1854	.aes,
1855	},	1855	.avx,
1856	};	1856	.avx2,
1857		1857	.avx512f,
1858	pub const cpu_coreAvxI = Cpu{	1858	.avx512bf16,
1859	.name = "coreAvxI",	1859	.bmi,
1860	.llvm_name = "core-avx-i",	1860	.bmi2,
1861	.dependencies = &[_]*const Feature {	1861	.avx512bw,
1862	&feature_bit64,	1862	.avx512cd,
1863	&feature_sse,	1863	.clflushopt,
1864	&feature_avx,	1864	.clwb,
1865	&feature_cmov,	1865	.cmov,
1866	&feature_cx8,	1866	.cx8,
1867	&feature_cx16,	1867	.cx16,
1868	&feature_f16c,	1868	.avx512dq,
1869	&feature_fsgsbase,	1869	.ermsb,
1870	&feature_fxsr,	1870	.f16c,
1871	&feature_fastShldRotate,	1871	.fma,
1872	&feature_fastScalarFsqrt,	1872	.fsgsbase,
1873	&feature_sahf,	1873	.fxsr,
1874	&feature_mmx,	1874	.fast_shld_rotate,
1875	&feature_macrofusion,	1875	.fast_scalar_fsqrt,
1876	&feature_mergeToThreewayBranch,	1876	.fast_variable_shuffle,
1877	&feature_nopl,	1877	.fast_vector_fsqrt,
1878	&feature_pclmul,	1878	.fast_gather,
1879	&feature_popcnt,	1879	.invpcid,
1880	&feature_falseDepsPopcnt,	1880	.sahf,
1881	&feature_rdrnd,	1881	.lzcnt,
1882	&feature_sse42,	1882	.mmx,
1883	&feature_slow3opsLea,	1883	.movbe,
1884	&feature_idivqToDivl,	1884	.mpx,
1885	&feature_slowUnalignedMem32,	1885	.macrofusion,
1886	&feature_x87,	1886	.merge_to_threeway_branch,
1887	&feature_xsave,	1887	.nopl,
1888	&feature_xsaveopt,	1888	.pclmul,
1889	},	1889	.pku,
1890	};	1890	.popcnt,
1891		1891	.false_deps_popcnt,
1892	pub const cpu_coreAvx2 = Cpu{	1892	.prfchw,
1893	.name = "coreAvx2",	1893	.rdrnd,
1894	.llvm_name = "core-avx2",	1894	.rdseed,
1895	.dependencies = &[_]*const Feature {	1895	.sse42,
1896	&feature_bit64,	1896	.slow_3ops_lea,
1897	&feature_sse,	1897	.idivq_to_divl,
1898	&feature_avx,	1898	.avx512vl,
1899	&feature_avx2,	1899	.avx512vnni,
1900	&feature_bmi,	1900	.x87,
1901	&feature_bmi2,	1901	.xsave,
1902	&feature_cmov,	1902	.xsavec,
1903	&feature_cx8,	1903	.xsaveopt,
1904	&feature_cx16,	1904	.xsaves,
1905	&feature_ermsb,	1905	}),
1906	&feature_f16c,	1906	};
1907	&feature_fma,	1907
1908	&feature_fsgsbase,	1908	pub const core_avx_i = Cpu{
1909	&feature_fxsr,	1909	.name = "core_avx_i",
1910	&feature_fastShldRotate,	1910	.llvm_name = "core-avx-i",
1911	&feature_fastScalarFsqrt,	1911	.dependencies = featureSet(&[_]Feature{
1912	&feature_fastVariableShuffle,	1912	.bit64,
1913	&feature_invpcid,	1913	.sse,
1914	&feature_sahf,	1914	.avx,
1915	&feature_lzcnt,	1915	.cmov,
1916	&feature_falseDepsLzcntTzcnt,	1916	.cx8,
1917	&feature_mmx,	1917	.cx16,
1918	&feature_movbe,	1918	.f16c,
1919	&feature_macrofusion,	1919	.fsgsbase,
1920	&feature_mergeToThreewayBranch,	1920	.fxsr,
1921	&feature_nopl,	1921	.fast_shld_rotate,
1922	&feature_pclmul,	1922	.fast_scalar_fsqrt,
1923	&feature_popcnt,	1923	.sahf,
1924	&feature_falseDepsPopcnt,	1924	.mmx,
1925	&feature_rdrnd,	1925	.macrofusion,
1926	&feature_sse42,	1926	.merge_to_threeway_branch,
1927	&feature_slow3opsLea,	1927	.nopl,
1928	&feature_idivqToDivl,	1928	.pclmul,
1929	&feature_x87,	1929	.popcnt,
1930	&feature_xsave,	1930	.false_deps_popcnt,
1931	&feature_xsaveopt,	1931	.rdrnd,
1932	},	1932	.sse42,
1933	};	1933	.slow_3ops_lea,
1934		1934	.idivq_to_divl,
1935	pub const cpu_core2 = Cpu{	1935	.slow_unaligned_mem_32,
1936	.name = "core2",	1936	.x87,
1937	.llvm_name = "core2",	1937	.xsave,
1938	.dependencies = &[_]*const Feature {	1938	.xsaveopt,
1939	&feature_bit64,	1939	}),
1940	&feature_cmov,	1940	};
1941	&feature_cx8,	1941
1942	&feature_cx16,	1942	pub const core_avx2 = Cpu{
1943	&feature_fxsr,	1943	.name = "core_avx2",
1944	&feature_sahf,	1944	.llvm_name = "core-avx2",
1945	&feature_mmx,	1945	.dependencies = featureSet(&[_]Feature{
1946	&feature_macrofusion,	1946	.bit64,
1947	&feature_nopl,	1947	.sse,
1948	&feature_sse,	1948	.avx,
1949	&feature_ssse3,	1949	.avx2,
1950	&feature_slowUnalignedMem16,	1950	.bmi,
1951	&feature_x87,	1951	.bmi2,
1952	},	1952	.cmov,
1953	};	1953	.cx8,
1954		1954	.cx16,
1955	pub const cpu_corei7 = Cpu{	1955	.ermsb,
1956	.name = "corei7",	1956	.f16c,
1957	.llvm_name = "corei7",	1957	.fma,
1958	.dependencies = &[_]*const Feature {	1958	.fsgsbase,
1959	&feature_bit64,	1959	.fxsr,
1960	&feature_cmov,	1960	.fast_shld_rotate,
1961	&feature_cx8,	1961	.fast_scalar_fsqrt,
1962	&feature_cx16,	1962	.fast_variable_shuffle,
1963	&feature_fxsr,	1963	.invpcid,
1964	&feature_sahf,	1964	.sahf,
1965	&feature_mmx,	1965	.lzcnt,
1966	&feature_macrofusion,	1966	.false_deps_lzcnt_tzcnt,
1967	&feature_nopl,	1967	.mmx,
1968	&feature_popcnt,	1968	.movbe,
1969	&feature_sse,	1969	.macrofusion,
1970	&feature_sse42,	1970	.merge_to_threeway_branch,
1971	&feature_x87,	1971	.nopl,
1972	},	1972	.pclmul,
1973	};	1973	.popcnt,
1974		1974	.false_deps_popcnt,
1975	pub const cpu_corei7Avx = Cpu{	1975	.rdrnd,
1976	.name = "corei7Avx",	1976	.sse42,
1977	.llvm_name = "corei7-avx",	1977	.slow_3ops_lea,
1978	.dependencies = &[_]*const Feature {	1978	.idivq_to_divl,
1979	&feature_bit64,	1979	.x87,
1980	&feature_sse,	1980	.xsave,
1981	&feature_avx,	1981	.xsaveopt,
1982	&feature_cmov,	1982	}),
1983	&feature_cx8,	1983	};
1984	&feature_cx16,	1984
1985	&feature_fxsr,	1985	pub const core2 = Cpu{
1986	&feature_fastShldRotate,	1986	.name = "core2",
1987	&feature_fastScalarFsqrt,	1987	.llvm_name = "core2",
1988	&feature_sahf,	1988	.dependencies = featureSet(&[_]Feature{
1989	&feature_mmx,	1989	.bit64,
1990	&feature_macrofusion,	1990	.cmov,
1991	&feature_mergeToThreewayBranch,	1991	.cx8,
1992	&feature_nopl,	1992	.cx16,
1993	&feature_pclmul,	1993	.fxsr,
1994	&feature_popcnt,	1994	.sahf,
1995	&feature_falseDepsPopcnt,	1995	.mmx,
1996	&feature_sse42,	1996	.macrofusion,
1997	&feature_slow3opsLea,	1997	.nopl,
1998	&feature_idivqToDivl,	1998	.sse,
1999	&feature_slowUnalignedMem32,	1999	.ssse3,
2000	&feature_x87,	2000	.slow_unaligned_mem_16,
2001	&feature_xsave,	2001	.x87,
2002	&feature_xsaveopt,	2002	}),
2003	},	2003	};
2004	};	2004
2005		2005	pub const corei7 = Cpu{
2006	pub const cpu_generic = Cpu{	2006	.name = "corei7",
2007	.name = "generic",	2007	.llvm_name = "corei7",
2008	.llvm_name = "generic",	2008	.dependencies = featureSet(&[_]Feature{
2009	.dependencies = &[_]*const Feature {	2009	.bit64,
2010	&feature_cx8,	2010	.cmov,
2011	&feature_slowUnalignedMem16,	2011	.cx8,
2012	&feature_x87,	2012	.cx16,
2013	},	2013	.fxsr,
2014	};	2014	.sahf,
2015		2015	.mmx,
2016	pub const cpu_geode = Cpu{	2016	.macrofusion,
2017	.name = "geode",	2017	.nopl,
2018	.llvm_name = "geode",	2018	.popcnt,
2019	.dependencies = &[_]*const Feature {	2019	.sse,
2020	&feature_mmx,	2020	.sse42,
2021	&feature_dnowa3,	2021	.x87,
2022	&feature_cx8,	2022	}),
2023	&feature_slowUnalignedMem16,	2023	};
2024	&feature_x87,	2024
2025	},	2025	pub const corei7_avx = Cpu{
2026	};	2026	.name = "corei7_avx",
2027		2027	.llvm_name = "corei7-avx",
2028	pub const cpu_goldmont = Cpu{	2028	.dependencies = featureSet(&[_]Feature{
2029	.name = "goldmont",	2029	.bit64,
2030	.llvm_name = "goldmont",	2030	.sse,
2031	.dependencies = &[_]*const Feature {	2031	.avx,
2032	&feature_bit64,	2032	.cmov,
2033	&feature_sse,	2033	.cx8,
2034	&feature_aes,	2034	.cx16,
2035	&feature_clflushopt,	2035	.fxsr,
2036	&feature_cmov,	2036	.fast_shld_rotate,
2037	&feature_cx8,	2037	.fast_scalar_fsqrt,
2038	&feature_cx16,	2038	.sahf,
2039	&feature_fsgsbase,	2039	.mmx,
2040	&feature_fxsr,	2040	.macrofusion,
2041	&feature_sahf,	2041	.merge_to_threeway_branch,
2042	&feature_mmx,	2042	.nopl,
2043	&feature_movbe,	2043	.pclmul,
2044	&feature_mpx,	2044	.popcnt,
2045	&feature_nopl,	2045	.false_deps_popcnt,
2046	&feature_pclmul,	2046	.sse42,
2047	&feature_popcnt,	2047	.slow_3ops_lea,
2048	&feature_falseDepsPopcnt,	2048	.idivq_to_divl,
2049	&feature_prfchw,	2049	.slow_unaligned_mem_32,
2050	&feature_rdrnd,	2050	.x87,
2051	&feature_rdseed,	2051	.xsave,
2052	&feature_sha,	2052	.xsaveopt,
2053	&feature_sse42,	2053	}),
2054	&feature_ssse3,	2054	};
2055	&feature_slowIncdec,	2055
2056	&feature_slowLea,	2056	pub const generic = Cpu{
2057	&feature_slowTwoMemOps,	2057	.name = "generic",
2058	&feature_x87,	2058	.llvm_name = "generic",
2059	&feature_xsave,	2059	.dependencies = featureSet(&[_]Feature{
2060	&feature_xsavec,	2060	.cx8,
2061	&feature_xsaveopt,	2061	.slow_unaligned_mem_16,
2062	&feature_xsaves,	2062	.x87,
2063	},	2063	}),
2064	};	2064	};
2065		2065
2066	pub const cpu_goldmontPlus = Cpu{	2066	pub const geode = Cpu{
2067	.name = "goldmontPlus",	2067	.name = "geode",
2068	.llvm_name = "goldmont-plus",	2068	.llvm_name = "geode",
2069	.dependencies = &[_]*const Feature {	2069	.dependencies = featureSet(&[_]Feature{
2070	&feature_bit64,	2070	.mmx,
2071	&feature_sse,	2071	.dnowa3,
2072	&feature_aes,	2072	.cx8,
2073	&feature_clflushopt,	2073	.slow_unaligned_mem_16,
2074	&feature_cmov,	2074	.x87,
2075	&feature_cx8,	2075	}),
2076	&feature_cx16,	2076	};
2077	&feature_fsgsbase,	2077
2078	&feature_fxsr,	2078	pub const goldmont = Cpu{
2079	&feature_sahf,	2079	.name = "goldmont",
2080	&feature_mmx,	2080	.llvm_name = "goldmont",
2081	&feature_movbe,	2081	.dependencies = featureSet(&[_]Feature{
2082	&feature_mpx,	2082	.bit64,
2083	&feature_nopl,	2083	.sse,
2084	&feature_pclmul,	2084	.aes,
2085	&feature_popcnt,	2085	.clflushopt,
2086	&feature_prfchw,	2086	.cmov,
2087	&feature_ptwrite,	2087	.cx8,
2088	&feature_rdpid,	2088	.cx16,
2089	&feature_rdrnd,	2089	.fsgsbase,
2090	&feature_rdseed,	2090	.fxsr,
2091	&feature_sgx,	2091	.sahf,
2092	&feature_sha,	2092	.mmx,
2093	&feature_sse42,	2093	.movbe,
2094	&feature_ssse3,	2094	.mpx,
2095	&feature_slowIncdec,	2095	.nopl,
2096	&feature_slowLea,	2096	.pclmul,
2097	&feature_slowTwoMemOps,	2097	.popcnt,
2098	&feature_x87,	2098	.false_deps_popcnt,
2099	&feature_xsave,	2099	.prfchw,
2100	&feature_xsavec,	2100	.rdrnd,
2101	&feature_xsaveopt,	2101	.rdseed,
2102	&feature_xsaves,	2102	.sha,
2103	},	2103	.sse42,
2104	};	2104	.ssse3,
2105		2105	.slow_incdec,
2106	pub const cpu_haswell = Cpu{	2106	.slowLea,
2107	.name = "haswell",	2107	.slow_two_mem_ops,
2108	.llvm_name = "haswell",	2108	.x87,
2109	.dependencies = &[_]*const Feature {	2109	.xsave,
2110	&feature_bit64,	2110	.xsavec,
2111	&feature_sse,	2111	.xsaveopt,
2112	&feature_avx,	2112	.xsaves,
2113	&feature_avx2,	2113	}),
2114	&feature_bmi,	2114	};
2115	&feature_bmi2,	2115
2116	&feature_cmov,	2116	pub const goldmont_plus = Cpu{
2117	&feature_cx8,	2117	.name = "goldmont_plus",
2118	&feature_cx16,	2118	.llvm_name = "goldmont-plus",
2119	&feature_ermsb,	2119	.dependencies = featureSet(&[_]Feature{
2120	&feature_f16c,	2120	.bit64,
2121	&feature_fma,	2121	.sse,
2122	&feature_fsgsbase,	2122	.aes,
2123	&feature_fxsr,	2123	.clflushopt,
2124	&feature_fastShldRotate,	2124	.cmov,
2125	&feature_fastScalarFsqrt,	2125	.cx8,
2126	&feature_fastVariableShuffle,	2126	.cx16,
2127	&feature_invpcid,	2127	.fsgsbase,
2128	&feature_sahf,	2128	.fxsr,
2129	&feature_lzcnt,	2129	.sahf,
2130	&feature_falseDepsLzcntTzcnt,	2130	.mmx,
2131	&feature_mmx,	2131	.movbe,
2132	&feature_movbe,	2132	.mpx,
2133	&feature_macrofusion,	2133	.nopl,
2134	&feature_mergeToThreewayBranch,	2134	.pclmul,
2135	&feature_nopl,	2135	.popcnt,
2136	&feature_pclmul,	2136	.prfchw,
2137	&feature_popcnt,	2137	.ptwrite,
2138	&feature_falseDepsPopcnt,	2138	.rdpid,
2139	&feature_rdrnd,	2139	.rdrnd,
2140	&feature_sse42,	2140	.rdseed,
2141	&feature_slow3opsLea,	2141	.sgx,
2142	&feature_idivqToDivl,	2142	.sha,
2143	&feature_x87,	2143	.sse42,
2144	&feature_xsave,	2144	.ssse3,
2145	&feature_xsaveopt,	2145	.slow_incdec,
2146	},	2146	.slowLea,
2147	};	2147	.slow_two_mem_ops,
2148		2148	.x87,
2149	pub const cpu_i386 = Cpu{	2149	.xsave,
2150	.name = "i386",	2150	.xsavec,
2151	.llvm_name = "i386",	2151	.xsaveopt,
2152	.dependencies = &[_]*const Feature {	2152	.xsaves,
2153	&feature_slowUnalignedMem16,	2153	}),
2154	&feature_x87,	2154	};
2155	},	2155
2156	};	2156	pub const haswell = Cpu{
2157		2157	.name = "haswell",
2158	pub const cpu_i486 = Cpu{	2158	.llvm_name = "haswell",
2159	.name = "i486",	2159	.dependencies = featureSet(&[_]Feature{
2160	.llvm_name = "i486",	2160	.bit64,
2161	.dependencies = &[_]*const Feature {	2161	.sse,
2162	&feature_slowUnalignedMem16,	2162	.avx,
2163	&feature_x87,	2163	.avx2,
2164	},	2164	.bmi,
2165	};	2165	.bmi2,
2166		2166	.cmov,
2167	pub const cpu_i586 = Cpu{	2167	.cx8,
2168	.name = "i586",	2168	.cx16,
2169	.llvm_name = "i586",	2169	.ermsb,
2170	.dependencies = &[_]*const Feature {	2170	.f16c,
2171	&feature_cx8,	2171	.fma,
2172	&feature_slowUnalignedMem16,	2172	.fsgsbase,
2173	&feature_x87,	2173	.fxsr,
2174	},	2174	.fast_shld_rotate,
2175	};	2175	.fast_scalar_fsqrt,
2176		2176	.fast_variable_shuffle,
2177	pub const cpu_i686 = Cpu{	2177	.invpcid,
2178	.name = "i686",	2178	.sahf,
2179	.llvm_name = "i686",	2179	.lzcnt,
2180	.dependencies = &[_]*const Feature {	2180	.false_deps_lzcnt_tzcnt,
2181	&feature_cmov,	2181	.mmx,
2182	&feature_cx8,	2182	.movbe,
2183	&feature_slowUnalignedMem16,	2183	.macrofusion,
2184	&feature_x87,	2184	.merge_to_threeway_branch,
2185	},	2185	.nopl,
2186	};	2186	.pclmul,
2187		2187	.popcnt,
2188	pub const cpu_icelakeClient = Cpu{	2188	.false_deps_popcnt,
2189	.name = "icelakeClient",	2189	.rdrnd,
2190	.llvm_name = "icelake-client",	2190	.sse42,
2191	.dependencies = &[_]*const Feature {	2191	.slow_3ops_lea,
2192	&feature_bit64,	2192	.idivq_to_divl,
2193	&feature_adx,	2193	.x87,
2194	&feature_sse,	2194	.xsave,
2195	&feature_aes,	2195	.xsaveopt,
2196	&feature_avx,	2196	}),
2197	&feature_avx2,	2197	};
2198	&feature_avx512f,	2198
2199	&feature_avx512bitalg,	2199	pub const i386 = Cpu{
2200	&feature_bmi,	2200	.name = "i386",
2201	&feature_bmi2,	2201	.llvm_name = "i386",
2202	&feature_avx512bw,	2202	.dependencies = featureSet(&[_]Feature{
2203	&feature_avx512cd,	2203	.slow_unaligned_mem_16,
2204	&feature_clflushopt,	2204	.x87,
2205	&feature_clwb,	2205	}),
2206	&feature_cmov,	2206	};
2207	&feature_cx8,	2207
2208	&feature_cx16,	2208	pub const i486 = Cpu{
2209	&feature_avx512dq,	2209	.name = "i486",
2210	&feature_ermsb,	2210	.llvm_name = "i486",
2211	&feature_f16c,	2211	.dependencies = featureSet(&[_]Feature{
2212	&feature_fma,	2212	.slow_unaligned_mem_16,
2213	&feature_fsgsbase,	2213	.x87,
2214	&feature_fxsr,	2214	}),
2215	&feature_fastShldRotate,	2215	};
2216	&feature_fastScalarFsqrt,	2216
2217	&feature_fastVariableShuffle,	2217	pub const i586 = Cpu{
2218	&feature_fastVectorFsqrt,	2218	.name = "i586",
2219	&feature_gfni,	2219	.llvm_name = "i586",
2220	&feature_fastGather,	2220	.dependencies = featureSet(&[_]Feature{
2221	&feature_avx512ifma,	2221	.cx8,
2222	&feature_invpcid,	2222	.slow_unaligned_mem_16,
2223	&feature_sahf,	2223	.x87,
2224	&feature_lzcnt,	2224	}),
2225	&feature_mmx,	2225	};
2226	&feature_movbe,	2226
2227	&feature_mpx,	2227	pub const i686 = Cpu{
2228	&feature_macrofusion,	2228	.name = "i686",
2229	&feature_mergeToThreewayBranch,	2229	.llvm_name = "i686",
2230	&feature_nopl,	2230	.dependencies = featureSet(&[_]Feature{
2231	&feature_pclmul,	2231	.cmov,
2232	&feature_pku,	2232	.cx8,
2233	&feature_popcnt,	2233	.slow_unaligned_mem_16,
2234	&feature_prfchw,	2234	.x87,
2235	&feature_rdpid,	2235	}),
2236	&feature_rdrnd,	2236	};
2237	&feature_rdseed,	2237
2238	&feature_sgx,	2238	pub const icelake_client = Cpu{
2239	&feature_sha,	2239	.name = "icelake_client",
2240	&feature_sse42,	2240	.llvm_name = "icelake-client",
2241	&feature_slow3opsLea,	2241	.dependencies = featureSet(&[_]Feature{
2242	&feature_idivqToDivl,	2242	.bit64,
2243	&feature_vaes,	2243	.adx,
2244	&feature_avx512vbmi,	2244	.sse,
2245	&feature_avx512vbmi2,	2245	.aes,
2246	&feature_avx512vl,	2246	.avx,
2247	&feature_avx512vnni,	2247	.avx2,
2248	&feature_vpclmulqdq,	2248	.avx512f,
2249	&feature_avx512vpopcntdq,	2249	.avx512bitalg,
2250	&feature_x87,	2250	.bmi,
2251	&feature_xsave,	2251	.bmi2,
2252	&feature_xsavec,	2252	.avx512bw,
2253	&feature_xsaveopt,	2253	.avx512cd,
2254	&feature_xsaves,	2254	.clflushopt,
2255	},	2255	.clwb,
2256	};	2256	.cmov,
2257		2257	.cx8,
2258	pub const cpu_icelakeServer = Cpu{	2258	.cx16,
2259	.name = "icelakeServer",	2259	.avx512dq,
2260	.llvm_name = "icelake-server",	2260	.ermsb,
2261	.dependencies = &[_]*const Feature {	2261	.f16c,
2262	&feature_bit64,	2262	.fma,
2263	&feature_adx,	2263	.fsgsbase,
2264	&feature_sse,	2264	.fxsr,
2265	&feature_aes,	2265	.fast_shld_rotate,
2266	&feature_avx,	2266	.fast_scalar_fsqrt,
2267	&feature_avx2,	2267	.fast_variable_shuffle,
2268	&feature_avx512f,	2268	.fast_vector_fsqrt,
2269	&feature_avx512bitalg,	2269	.gfni,
2270	&feature_bmi,	2270	.fast_gather,
2271	&feature_bmi2,	2271	.avx512ifma,
2272	&feature_avx512bw,	2272	.invpcid,
2273	&feature_avx512cd,	2273	.sahf,
2274	&feature_clflushopt,	2274	.lzcnt,
2275	&feature_clwb,	2275	.mmx,
2276	&feature_cmov,	2276	.movbe,
2277	&feature_cx8,	2277	.mpx,
2278	&feature_cx16,	2278	.macrofusion,
2279	&feature_avx512dq,	2279	.merge_to_threeway_branch,
2280	&feature_ermsb,	2280	.nopl,
2281	&feature_f16c,	2281	.pclmul,
2282	&feature_fma,	2282	.pku,
2283	&feature_fsgsbase,	2283	.popcnt,
2284	&feature_fxsr,	2284	.prfchw,
2285	&feature_fastShldRotate,	2285	.rdpid,
2286	&feature_fastScalarFsqrt,	2286	.rdrnd,
2287	&feature_fastVariableShuffle,	2287	.rdseed,
2288	&feature_fastVectorFsqrt,	2288	.sgx,
2289	&feature_gfni,	2289	.sha,
2290	&feature_fastGather,	2290	.sse42,
2291	&feature_avx512ifma,	2291	.slow_3ops_lea,
2292	&feature_invpcid,	2292	.idivq_to_divl,
2293	&feature_sahf,	2293	.vaes,
2294	&feature_lzcnt,	2294	.avx512vbmi,
2295	&feature_mmx,	2295	.avx512vbmi2,
2296	&feature_movbe,	2296	.avx512vl,
2297	&feature_mpx,	2297	.avx512vnni,
2298	&feature_macrofusion,	2298	.vpclmulqdq,
2299	&feature_mergeToThreewayBranch,	2299	.avx512vpopcntdq,
2300	&feature_nopl,	2300	.x87,
2301	&feature_pclmul,	2301	.xsave,
2302	&feature_pconfig,	2302	.xsavec,
2303	&feature_pku,	2303	.xsaveopt,
2304	&feature_popcnt,	2304	.xsaves,
2305	&feature_prfchw,	2305	}),
2306	&feature_rdpid,	2306	};
2307	&feature_rdrnd,	2307
2308	&feature_rdseed,	2308	pub const icelake_server = Cpu{
2309	&feature_sgx,	2309	.name = "icelake_server",
2310	&feature_sha,	2310	.llvm_name = "icelake-server",
2311	&feature_sse42,	2311	.dependencies = featureSet(&[_]Feature{
2312	&feature_slow3opsLea,	2312	.bit64,
2313	&feature_idivqToDivl,	2313	.adx,
2314	&feature_vaes,	2314	.sse,
2315	&feature_avx512vbmi,	2315	.aes,
2316	&feature_avx512vbmi2,	2316	.avx,
2317	&feature_avx512vl,	2317	.avx2,
2318	&feature_avx512vnni,	2318	.avx512f,
2319	&feature_vpclmulqdq,	2319	.avx512bitalg,
2320	&feature_avx512vpopcntdq,	2320	.bmi,
2321	&feature_wbnoinvd,	2321	.bmi2,
2322	&feature_x87,	2322	.avx512bw,
2323	&feature_xsave,	2323	.avx512cd,
2324	&feature_xsavec,	2324	.clflushopt,
2325	&feature_xsaveopt,	2325	.clwb,
2326	&feature_xsaves,	2326	.cmov,
2327	},	2327	.cx8,
2328	};	2328	.cx16,
2329		2329	.avx512dq,
2330	pub const cpu_ivybridge = Cpu{	2330	.ermsb,
2331	.name = "ivybridge",	2331	.f16c,
2332	.llvm_name = "ivybridge",	2332	.fma,
2333	.dependencies = &[_]*const Feature {	2333	.fsgsbase,
2334	&feature_bit64,	2334	.fxsr,
2335	&feature_sse,	2335	.fast_shld_rotate,
2336	&feature_avx,	2336	.fast_scalar_fsqrt,
2337	&feature_cmov,	2337	.fast_variable_shuffle,
2338	&feature_cx8,	2338	.fast_vector_fsqrt,
2339	&feature_cx16,	2339	.gfni,
2340	&feature_f16c,	2340	.fast_gather,
2341	&feature_fsgsbase,	2341	.avx512ifma,
2342	&feature_fxsr,	2342	.invpcid,
2343	&feature_fastShldRotate,	2343	.sahf,
2344	&feature_fastScalarFsqrt,	2344	.lzcnt,
2345	&feature_sahf,	2345	.mmx,
2346	&feature_mmx,	2346	.movbe,
2347	&feature_macrofusion,	2347	.mpx,
2348	&feature_mergeToThreewayBranch,	2348	.macrofusion,
2349	&feature_nopl,	2349	.merge_to_threeway_branch,
2350	&feature_pclmul,	2350	.nopl,
2351	&feature_popcnt,	2351	.pclmul,
2352	&feature_falseDepsPopcnt,	2352	.pconfig,
2353	&feature_rdrnd,	2353	.pku,
2354	&feature_sse42,	2354	.popcnt,
2355	&feature_slow3opsLea,	2355	.prfchw,
2356	&feature_idivqToDivl,	2356	.rdpid,
2357	&feature_slowUnalignedMem32,	2357	.rdrnd,
2358	&feature_x87,	2358	.rdseed,
2359	&feature_xsave,	2359	.sgx,
2360	&feature_xsaveopt,	2360	.sha,
2361	},	2361	.sse42,
2362	};	2362	.slow_3ops_lea,
2363		2363	.idivq_to_divl,
2364	pub const cpu_k6 = Cpu{	2364	.vaes,
2365	.name = "k6",	2365	.avx512vbmi,
2366	.llvm_name = "k6",	2366	.avx512vbmi2,
2367	.dependencies = &[_]*const Feature {	2367	.avx512vl,
2368	&feature_cx8,	2368	.avx512vnni,
2369	&feature_mmx,	2369	.vpclmulqdq,
2370	&feature_slowUnalignedMem16,	2370	.avx512vpopcntdq,
2371	&feature_x87,	2371	.wbnoinvd,
2372	},	2372	.x87,
2373	};	2373	.xsave,
2374		2374	.xsavec,
2375	pub const cpu_k62 = Cpu{	2375	.xsaveopt,
2376	.name = "k62",	2376	.xsaves,
2377	.llvm_name = "k6-2",	2377	}),
2378	.dependencies = &[_]*const Feature {	2378	};
2379	&feature_mmx,	2379
2380	&feature_dnow3,	2380	pub const ivybridge = Cpu{
2381	&feature_cx8,	2381	.name = "ivybridge",
2382	&feature_slowUnalignedMem16,	2382	.llvm_name = "ivybridge",
2383	&feature_x87,	2383	.dependencies = featureSet(&[_]Feature{
2384	},	2384	.bit64,
2385	};	2385	.sse,
2386		2386	.avx,
2387	pub const cpu_k63 = Cpu{	2387	.cmov,
2388	.name = "k63",	2388	.cx8,
2389	.llvm_name = "k6-3",	2389	.cx16,
2390	.dependencies = &[_]*const Feature {	2390	.f16c,
2391	&feature_mmx,	2391	.fsgsbase,
2392	&feature_dnow3,	2392	.fxsr,
2393	&feature_cx8,	2393	.fast_shld_rotate,
2394	&feature_slowUnalignedMem16,	2394	.fast_scalar_fsqrt,
2395	&feature_x87,	2395	.sahf,
2396	},	2396	.mmx,
2397	};	2397	.macrofusion,
2398		2398	.merge_to_threeway_branch,
2399	pub const cpu_k8 = Cpu{	2399	.nopl,
2400	.name = "k8",	2400	.pclmul,
2401	.llvm_name = "k8",	2401	.popcnt,
2402	.dependencies = &[_]*const Feature {	2402	.false_deps_popcnt,
2403	&feature_mmx,	2403	.rdrnd,
2404	&feature_dnowa3,	2404	.sse42,
2405	&feature_bit64,	2405	.slow_3ops_lea,
2406	&feature_cmov,	2406	.idivq_to_divl,
2407	&feature_cx8,	2407	.slow_unaligned_mem_32,
2408	&feature_fxsr,	2408	.x87,
2409	&feature_fastScalarShiftMasks,	2409	.xsave,
2410	&feature_nopl,	2410	.xsaveopt,
2411	&feature_sse,	2411	}),
2412	&feature_sse2,	2412	};
2413	&feature_slowShld,	2413
2414	&feature_slowUnalignedMem16,	2414	pub const k6 = Cpu{
2415	&feature_x87,	2415	.name = "k6",
2416	},	2416	.llvm_name = "k6",
2417	};	2417	.dependencies = featureSet(&[_]Feature{
2418		2418	.cx8,
2419	pub const cpu_k8Sse3 = Cpu{	2419	.mmx,
2420	.name = "k8Sse3",	2420	.slow_unaligned_mem_16,
2421	.llvm_name = "k8-sse3",	2421	.x87,
2422	.dependencies = &[_]*const Feature {	2422	}),
2423	&feature_mmx,	2423	};
2424	&feature_dnowa3,	2424
2425	&feature_bit64,	2425	pub const k62 = Cpu{
2426	&feature_cmov,	2426	.name = "k6_2",
2427	&feature_cx8,	2427	.llvm_name = "k6-2",
2428	&feature_cx16,	2428	.dependencies = featureSet(&[_]Feature{
2429	&feature_fxsr,	2429	.mmx,
2430	&feature_fastScalarShiftMasks,	2430	.dnow3,
2431	&feature_nopl,	2431	.cx8,
2432	&feature_sse,	2432	.slow_unaligned_mem_16,
2433	&feature_sse3,	2433	.x87,
2434	&feature_slowShld,	2434	}),
2435	&feature_slowUnalignedMem16,	2435	};
2436	&feature_x87,	2436
2437	},	2437	pub const k63 = Cpu{
2438	};	2438	.name = "k6_3",
2439		2439	.llvm_name = "k6-3",
2440	pub const cpu_knl = Cpu{	2440	.dependencies = featureSet(&[_]Feature{
2441	.name = "knl",	2441	.mmx,
2442	.llvm_name = "knl",	2442	.dnow3,
2443	.dependencies = &[_]*const Feature {	2443	.cx8,
2444	&feature_bit64,	2444	.slow_unaligned_mem_16,
2445	&feature_adx,	2445	.x87,
2446	&feature_sse,	2446	}),
2447	&feature_aes,	2447	};
2448	&feature_avx512f,	2448
2449	&feature_bmi,	2449	pub const k8 = Cpu{
2450	&feature_bmi2,	2450	.name = "k8",
2451	&feature_avx512cd,	2451	.llvm_name = "k8",
2452	&feature_cmov,	2452	.dependencies = featureSet(&[_]Feature{
2453	&feature_cx8,	2453	.mmx,
2454	&feature_cx16,	2454	.dnowa3,
2455	&feature_avx512er,	2455	.bit64,
2456	&feature_f16c,	2456	.cmov,
2457	&feature_fma,	2457	.cx8,
2458	&feature_fsgsbase,	2458	.fxsr,
2459	&feature_fxsr,	2459	.fast_scalar_shift_masks,
2460	&feature_fastPartialYmmOrZmmWrite,	2460	.nopl,
2461	&feature_fastGather,	2461	.sse,
2462	&feature_sahf,	2462	.sse2,
2463	&feature_lzcnt,	2463	.slow_shld,
2464	&feature_mmx,	2464	.slow_unaligned_mem_16,
2465	&feature_movbe,	2465	.x87,
2466	&feature_nopl,	2466	}),
2467	&feature_pclmul,	2467	};
2468	&feature_avx512pf,	2468
2469	&feature_popcnt,	2469	pub const k8_sse3 = Cpu{
2470	&feature_prefetchwt1,	2470	.name = "k8_sse3",
2471	&feature_prfchw,	2471	.llvm_name = "k8-sse3",
2472	&feature_rdrnd,	2472	.dependencies = featureSet(&[_]Feature{
2473	&feature_rdseed,	2473	.mmx,
2474	&feature_slow3opsLea,	2474	.dnowa3,
2475	&feature_idivqToDivl,	2475	.bit64,
2476	&feature_slowIncdec,	2476	.cmov,
2477	&feature_slowPmaddwd,	2477	.cx8,
2478	&feature_slowTwoMemOps,	2478	.cx16,
2479	&feature_x87,	2479	.fxsr,
2480	&feature_xsave,	2480	.fast_scalar_shift_masks,
2481	&feature_xsaveopt,	2481	.nopl,
2482	},	2482	.sse,
2483	};	2483	.sse3,
2484		2484	.slow_shld,
2485	pub const cpu_knm = Cpu{	2485	.slow_unaligned_mem_16,
2486	.name = "knm",	2486	.x87,
2487	.llvm_name = "knm",	2487	}),
2488	.dependencies = &[_]*const Feature {	2488	};
2489	&feature_bit64,	2489
2490	&feature_adx,	2490	pub const knl = Cpu{
2491	&feature_sse,	2491	.name = "knl",
2492	&feature_aes,	2492	.llvm_name = "knl",
2493	&feature_avx512f,	2493	.dependencies = featureSet(&[_]Feature{
2494	&feature_bmi,	2494	.bit64,
2495	&feature_bmi2,	2495	.adx,
2496	&feature_avx512cd,	2496	.sse,
2497	&feature_cmov,	2497	.aes,
2498	&feature_cx8,	2498	.avx512f,
2499	&feature_cx16,	2499	.bmi,
2500	&feature_avx512er,	2500	.bmi2,
2501	&feature_f16c,	2501	.avx512cd,
2502	&feature_fma,	2502	.cmov,
2503	&feature_fsgsbase,	2503	.cx8,
2504	&feature_fxsr,	2504	.cx16,
2505	&feature_fastPartialYmmOrZmmWrite,	2505	.avx512er,
2506	&feature_fastGather,	2506	.f16c,
2507	&feature_sahf,	2507	.fma,
2508	&feature_lzcnt,	2508	.fsgsbase,
2509	&feature_mmx,	2509	.fxsr,
2510	&feature_movbe,	2510	.fast_partial_ymm_or_zmm_write,
2511	&feature_nopl,	2511	.fast_gather,
2512	&feature_pclmul,	2512	.sahf,
2513	&feature_avx512pf,	2513	.lzcnt,
2514	&feature_popcnt,	2514	.mmx,
2515	&feature_prefetchwt1,	2515	.movbe,
2516	&feature_prfchw,	2516	.nopl,
2517	&feature_rdrnd,	2517	.pclmul,
2518	&feature_rdseed,	2518	.avx512pf,
2519	&feature_slow3opsLea,	2519	.popcnt,
2520	&feature_idivqToDivl,	2520	.prefetchwt1,
2521	&feature_slowIncdec,	2521	.prfchw,
2522	&feature_slowPmaddwd,	2522	.rdrnd,
2523	&feature_slowTwoMemOps,	2523	.rdseed,
2524	&feature_avx512vpopcntdq,	2524	.slow_3ops_lea,
2525	&feature_x87,	2525	.idivq_to_divl,
2526	&feature_xsave,	2526	.slow_incdec,
2527	&feature_xsaveopt,	2527	.slow_pmaddwd,
2528	},	2528	.slow_two_mem_ops,
2529	};	2529	.x87,
2530		2530	.xsave,
2531	pub const cpu_lakemont = Cpu{	2531	.xsaveopt,
2532	.name = "lakemont",	2532	}),
2533	.llvm_name = "lakemont",	2533	};
2534	.dependencies = &[_]*const Feature {	2534
2535	},	2535	pub const knm = Cpu{
2536	};	2536	.name = "knm",
2537		2537	.llvm_name = "knm",
2538	pub const cpu_nehalem = Cpu{	2538	.dependencies = featureSet(&[_]Feature{
2539	.name = "nehalem",	2539	.bit64,
2540	.llvm_name = "nehalem",	2540	.adx,
2541	.dependencies = &[_]*const Feature {	2541	.sse,
2542	&feature_bit64,	2542	.aes,
2543	&feature_cmov,	2543	.avx512f,
2544	&feature_cx8,	2544	.bmi,
2545	&feature_cx16,	2545	.bmi2,
2546	&feature_fxsr,	2546	.avx512cd,
2547	&feature_sahf,	2547	.cmov,
2548	&feature_mmx,	2548	.cx8,
2549	&feature_macrofusion,	2549	.cx16,
2550	&feature_nopl,	2550	.avx512er,
2551	&feature_popcnt,	2551	.f16c,
2552	&feature_sse,	2552	.fma,
2553	&feature_sse42,	2553	.fsgsbase,
2554	&feature_x87,	2554	.fxsr,
2555	},	2555	.fast_partial_ymm_or_zmm_write,
2556	};	2556	.fast_gather,
2557		2557	.sahf,
2558	pub const cpu_nocona = Cpu{	2558	.lzcnt,
2559	.name = "nocona",	2559	.mmx,
2560	.llvm_name = "nocona",	2560	.movbe,
2561	.dependencies = &[_]*const Feature {	2561	.nopl,
2562	&feature_bit64,	2562	.pclmul,
2563	&feature_cmov,	2563	.avx512pf,
2564	&feature_cx8,	2564	.popcnt,
2565	&feature_cx16,	2565	.prefetchwt1,
2566	&feature_fxsr,	2566	.prfchw,
2567	&feature_mmx,	2567	.rdrnd,
2568	&feature_nopl,	2568	.rdseed,
2569	&feature_sse,	2569	.slow_3ops_lea,
2570	&feature_sse3,	2570	.idivq_to_divl,
2571	&feature_slowUnalignedMem16,	2571	.slow_incdec,
2572	&feature_x87,	2572	.slow_pmaddwd,
2573	},	2573	.slow_two_mem_ops,
2574	};	2574	.avx512vpopcntdq,
2575		2575	.x87,
2576	pub const cpu_opteron = Cpu{	2576	.xsave,
2577	.name = "opteron",	2577	.xsaveopt,
2578	.llvm_name = "opteron",	2578	}),
2579	.dependencies = &[_]*const Feature {	2579	};
2580	&feature_mmx,	2580
2581	&feature_dnowa3,	2581	pub const lakemont = Cpu{
2582	&feature_bit64,	2582	.name = "lakemont",
2583	&feature_cmov,	2583	.llvm_name = "lakemont",
2584	&feature_cx8,	2584	.dependencies = 0,
2585	&feature_fxsr,	2585	};
2586	&feature_fastScalarShiftMasks,	2586
2587	&feature_nopl,	2587	pub const nehalem = Cpu{
2588	&feature_sse,	2588	.name = "nehalem",
2589	&feature_sse2,	2589	.llvm_name = "nehalem",
2590	&feature_slowShld,	2590	.dependencies = featureSet(&[_]Feature{
2591	&feature_slowUnalignedMem16,	2591	.bit64,
2592	&feature_x87,	2592	.cmov,
2593	},	2593	.cx8,
2594	};	2594	.cx16,
2595		2595	.fxsr,
2596	pub const cpu_opteronSse3 = Cpu{	2596	.sahf,
2597	.name = "opteronSse3",	2597	.mmx,
2598	.llvm_name = "opteron-sse3",	2598	.macrofusion,
2599	.dependencies = &[_]*const Feature {	2599	.nopl,
2600	&feature_mmx,	2600	.popcnt,
2601	&feature_dnowa3,	2601	.sse,
2602	&feature_bit64,	2602	.sse42,
2603	&feature_cmov,	2603	.x87,
2604	&feature_cx8,	2604	}),
2605	&feature_cx16,	2605	};
2606	&feature_fxsr,	2606
2607	&feature_fastScalarShiftMasks,	2607	pub const nocona = Cpu{
2608	&feature_nopl,	2608	.name = "nocona",
2609	&feature_sse,	2609	.llvm_name = "nocona",
2610	&feature_sse3,	2610	.dependencies = featureSet(&[_]Feature{
2611	&feature_slowShld,	2611	.bit64,
2612	&feature_slowUnalignedMem16,	2612	.cmov,
2613	&feature_x87,	2613	.cx8,
2614	},	2614	.cx16,
2615	};	2615	.fxsr,
2616		2616	.mmx,
2617	pub const cpu_penryn = Cpu{	2617	.nopl,
2618	.name = "penryn",	2618	.sse,
2619	.llvm_name = "penryn",	2619	.sse3,
2620	.dependencies = &[_]*const Feature {	2620	.slow_unaligned_mem_16,
2621	&feature_bit64,	2621	.x87,
2622	&feature_cmov,	2622	}),
2623	&feature_cx8,	2623	};
2624	&feature_cx16,	2624
2625	&feature_fxsr,	2625	pub const opteron = Cpu{
2626	&feature_sahf,	2626	.name = "opteron",
2627	&feature_mmx,	2627	.llvm_name = "opteron",
2628	&feature_macrofusion,	2628	.dependencies = featureSet(&[_]Feature{
2629	&feature_nopl,	2629	.mmx,
2630	&feature_sse,	2630	.dnowa3,
2631	&feature_sse41,	2631	.bit64,
2632	&feature_slowUnalignedMem16,	2632	.cmov,
2633	&feature_x87,	2633	.cx8,
2634	},	2634	.fxsr,
2635	};	2635	.fast_scalar_shift_masks,
2636		2636	.nopl,
2637	pub const cpu_pentium = Cpu{	2637	.sse,
2638	.name = "pentium",	2638	.sse2,
2639	.llvm_name = "pentium",	2639	.slow_shld,
2640	.dependencies = &[_]*const Feature {	2640	.slow_unaligned_mem_16,
2641	&feature_cx8,	2641	.x87,
2642	&feature_slowUnalignedMem16,	2642	}),
2643	&feature_x87,	2643	};
2644	},	2644
2645	};	2645	pub const opteron_sse3 = Cpu{
2646		2646	.name = "opteron_sse3",
2647	pub const cpu_pentiumM = Cpu{	2647	.llvm_name = "opteron-sse3",
2648	.name = "pentiumM",	2648	.dependencies = featureSet(&[_]Feature{
2649	.llvm_name = "pentium-m",	2649	.mmx,
2650	.dependencies = &[_]*const Feature {	2650	.dnowa3,
2651	&feature_cmov,	2651	.bit64,
2652	&feature_cx8,	2652	.cmov,
2653	&feature_fxsr,	2653	.cx8,
2654	&feature_mmx,	2654	.cx16,
2655	&feature_nopl,	2655	.fxsr,
2656	&feature_sse,	2656	.fast_scalar_shift_masks,
2657	&feature_sse2,	2657	.nopl,
2658	&feature_slowUnalignedMem16,	2658	.sse,
2659	&feature_x87,	2659	.sse3,
2660	},	2660	.slow_shld,
2661	};	2661	.slow_unaligned_mem_16,
2662		2662	.x87,
2663	pub const cpu_pentiumMmx = Cpu{	2663	}),
2664	.name = "pentiumMmx",	2664	};
2665	.llvm_name = "pentium-mmx",	2665
2666	.dependencies = &[_]*const Feature {	2666	pub const penryn = Cpu{
2667	&feature_cx8,	2667	.name = "penryn",
2668	&feature_mmx,	2668	.llvm_name = "penryn",
2669	&feature_slowUnalignedMem16,	2669	.dependencies = featureSet(&[_]Feature{
2670	&feature_x87,	2670	.bit64,
2671	},	2671	.cmov,
2672	};	2672	.cx8,
2673		2673	.cx16,
2674	pub const cpu_pentium2 = Cpu{	2674	.fxsr,
2675	.name = "pentium2",	2675	.sahf,
2676	.llvm_name = "pentium2",	2676	.mmx,
2677	.dependencies = &[_]*const Feature {	2677	.macrofusion,
2678	&feature_cmov,	2678	.nopl,
2679	&feature_cx8,	2679	.sse,
2680	&feature_fxsr,	2680	.sse41,
2681	&feature_mmx,	2681	.slow_unaligned_mem_16,
2682	&feature_nopl,	2682	.x87,
2683	&feature_slowUnalignedMem16,	2683	}),
2684	&feature_x87,	2684	};
2685	},	2685
2686	};	2686	pub const pentium = Cpu{
2687		2687	.name = "pentium",
2688	pub const cpu_pentium3 = Cpu{	2688	.llvm_name = "pentium",
2689	.name = "pentium3",	2689	.dependencies = featureSet(&[_]Feature{
2690	.llvm_name = "pentium3",	2690	.cx8,
2691	.dependencies = &[_]*const Feature {	2691	.slow_unaligned_mem_16,
2692	&feature_cmov,	2692	.x87,
2693	&feature_cx8,	2693	}),
2694	&feature_fxsr,	2694	};
2695	&feature_mmx,	2695
2696	&feature_nopl,	2696	pub const pentium_m = Cpu{
2697	&feature_sse,	2697	.name = "pentium_m",
2698	&feature_slowUnalignedMem16,	2698	.llvm_name = "pentium-m",
2699	&feature_x87,	2699	.dependencies = featureSet(&[_]Feature{
2700	},	2700	.cmov,
2701	};	2701	.cx8,
2702		2702	.fxsr,
2703	pub const cpu_pentium3m = Cpu{	2703	.mmx,
2704	.name = "pentium3m",	2704	.nopl,
2705	.llvm_name = "pentium3m",	2705	.sse,
2706	.dependencies = &[_]*const Feature {	2706	.sse2,
2707	&feature_cmov,	2707	.slow_unaligned_mem_16,
2708	&feature_cx8,	2708	.x87,
2709	&feature_fxsr,	2709	}),
2710	&feature_mmx,	2710	};
2711	&feature_nopl,	2711
2712	&feature_sse,	2712	pub const pentium_mmx = Cpu{
2713	&feature_slowUnalignedMem16,	2713	.name = "pentium_mmx",
2714	&feature_x87,	2714	.llvm_name = "pentium-mmx",
2715	},	2715	.dependencies = featureSet(&[_]Feature{
2716	};	2716	.cx8,
2717		2717	.mmx,
2718	pub const cpu_pentium4 = Cpu{	2718	.slow_unaligned_mem_16,
2719	.name = "pentium4",	2719	.x87,
2720	.llvm_name = "pentium4",	2720	}),
2721	.dependencies = &[_]*const Feature {	2721	};
2722	&feature_cmov,	2722
2723	&feature_cx8,	2723	pub const pentium2 = Cpu{
2724	&feature_fxsr,	2724	.name = "pentium2",
2725	&feature_mmx,	2725	.llvm_name = "pentium2",
2726	&feature_nopl,	2726	.dependencies = featureSet(&[_]Feature{
2727	&feature_sse,	2727	.cmov,
2728	&feature_sse2,	2728	.cx8,
2729	&feature_slowUnalignedMem16,	2729	.fxsr,
2730	&feature_x87,	2730	.mmx,
2731	},	2731	.nopl,
2732	};	2732	.slow_unaligned_mem_16,
2733		2733	.x87,
2734	pub const cpu_pentium4m = Cpu{	2734	}),
2735	.name = "pentium4m",	2735	};
2736	.llvm_name = "pentium4m",	2736
2737	.dependencies = &[_]*const Feature {	2737	pub const pentium3 = Cpu{
2738	&feature_cmov,	2738	.name = "pentium3",
2739	&feature_cx8,	2739	.llvm_name = "pentium3",
2740	&feature_fxsr,	2740	.dependencies = featureSet(&[_]Feature{
2741	&feature_mmx,	2741	.cmov,
2742	&feature_nopl,	2742	.cx8,
2743	&feature_sse,	2743	.fxsr,
2744	&feature_sse2,	2744	.mmx,
2745	&feature_slowUnalignedMem16,	2745	.nopl,
2746	&feature_x87,	2746	.sse,
2747	},	2747	.slow_unaligned_mem_16,
2748	};	2748	.x87,
2749		2749	}),
2750	pub const cpu_pentiumpro = Cpu{	2750	};
2751	.name = "pentiumpro",	2751
2752	.llvm_name = "pentiumpro",	2752	pub const pentium3m = Cpu{
2753	.dependencies = &[_]*const Feature {	2753	.name = "pentium3m",
2754	&feature_cmov,	2754	.llvm_name = "pentium3m",
2755	&feature_cx8,	2755	.dependencies = featureSet(&[_]Feature{
2756	&feature_nopl,	2756	.cmov,
2757	&feature_slowUnalignedMem16,	2757	.cx8,
2758	&feature_x87,	2758	.fxsr,
2759	},	2759	.mmx,
2760	};	2760	.nopl,
2761		2761	.sse,
2762	pub const cpu_prescott = Cpu{	2762	.slow_unaligned_mem_16,
2763	.name = "prescott",	2763	.x87,
2764	.llvm_name = "prescott",	2764	}),
2765	.dependencies = &[_]*const Feature {	2765	};
2766	&feature_cmov,	2766
2767	&feature_cx8,	2767	pub const pentium4 = Cpu{
2768	&feature_fxsr,	2768	.name = "pentium4",
2769	&feature_mmx,	2769	.llvm_name = "pentium4",
2770	&feature_nopl,	2770	.dependencies = featureSet(&[_]Feature{
2771	&feature_sse,	2771	.cmov,
2772	&feature_sse3,	2772	.cx8,
2773	&feature_slowUnalignedMem16,	2773	.fxsr,
2774	&feature_x87,	2774	.mmx,
2775	},	2775	.nopl,
2776	};	2776	.sse,
2777		2777	.sse2,
2778	pub const cpu_sandybridge = Cpu{	2778	.slow_unaligned_mem_16,
2779	.name = "sandybridge",	2779	.x87,
2780	.llvm_name = "sandybridge",	2780	}),
2781	.dependencies = &[_]*const Feature {	2781	};
2782	&feature_bit64,	2782
2783	&feature_sse,	2783	pub const pentium4m = Cpu{
2784	&feature_avx,	2784	.name = "pentium4m",
2785	&feature_cmov,	2785	.llvm_name = "pentium4m",
2786	&feature_cx8,	2786	.dependencies = featureSet(&[_]Feature{
2787	&feature_cx16,	2787	.cmov,
2788	&feature_fxsr,	2788	.cx8,
2789	&feature_fastShldRotate,	2789	.fxsr,
2790	&feature_fastScalarFsqrt,	2790	.mmx,
2791	&feature_sahf,	2791	.nopl,
2792	&feature_mmx,	2792	.sse,
2793	&feature_macrofusion,	2793	.sse2,
2794	&feature_mergeToThreewayBranch,	2794	.slow_unaligned_mem_16,
2795	&feature_nopl,	2795	.x87,
2796	&feature_pclmul,	2796	}),
2797	&feature_popcnt,	2797	};
2798	&feature_falseDepsPopcnt,	2798
2799	&feature_sse42,	2799	pub const pentiumpro = Cpu{
2800	&feature_slow3opsLea,	2800	.name = "pentiumpro",
2801	&feature_idivqToDivl,	2801	.llvm_name = "pentiumpro",
2802	&feature_slowUnalignedMem32,	2802	.dependencies = featureSet(&[_]Feature{
2803	&feature_x87,	2803	.cmov,
2804	&feature_xsave,	2804	.cx8,
2805	&feature_xsaveopt,	2805	.nopl,
2806	},	2806	.slow_unaligned_mem_16,
2807	};	2807	.x87,
2808		2808	}),
2809	pub const cpu_silvermont = Cpu{	2809	};
2810	.name = "silvermont",	2810
2811	.llvm_name = "silvermont",	2811	pub const prescott = Cpu{
2812	.dependencies = &[_]*const Feature {	2812	.name = "prescott",
2813	&feature_bit64,	2813	.llvm_name = "prescott",
2814	&feature_cmov,	2814	.dependencies = featureSet(&[_]Feature{
2815	&feature_cx8,	2815	.cmov,
2816	&feature_cx16,	2816	.cx8,
2817	&feature_fxsr,	2817	.fxsr,
2818	&feature_sahf,	2818	.mmx,
2819	&feature_mmx,	2819	.nopl,
2820	&feature_movbe,	2820	.sse,
2821	&feature_nopl,	2821	.sse3,
2822	&feature_sse,	2822	.slow_unaligned_mem_16,
2823	&feature_pclmul,	2823	.x87,
2824	&feature_popcnt,	2824	}),
2825	&feature_falseDepsPopcnt,	2825	};
2826	&feature_prfchw,	2826
2827	&feature_rdrnd,	2827	pub const sandybridge = Cpu{
2828	&feature_sse42,	2828	.name = "sandybridge",
2829	&feature_ssse3,	2829	.llvm_name = "sandybridge",
2830	&feature_idivqToDivl,	2830	.dependencies = featureSet(&[_]Feature{
2831	&feature_slowIncdec,	2831	.bit64,
2832	&feature_slowLea,	2832	.sse,
2833	&feature_slowPmulld,	2833	.avx,
2834	&feature_slowTwoMemOps,	2834	.cmov,
2835	&feature_x87,	2835	.cx8,
2836	},	2836	.cx16,
2837	};	2837	.fxsr,
2838		2838	.fast_shld_rotate,
2839	pub const cpu_skx = Cpu{	2839	.fast_scalar_fsqrt,
2840	.name = "skx",	2840	.sahf,
2841	.llvm_name = "skx",	2841	.mmx,
2842	.dependencies = &[_]*const Feature {	2842	.macrofusion,
2843	&feature_bit64,	2843	.merge_to_threeway_branch,
2844	&feature_adx,	2844	.nopl,
2845	&feature_sse,	2845	.pclmul,
2846	&feature_aes,	2846	.popcnt,
2847	&feature_avx,	2847	.false_deps_popcnt,
2848	&feature_avx2,	2848	.sse42,
2849	&feature_avx512f,	2849	.slow_3ops_lea,
2850	&feature_bmi,	2850	.idivq_to_divl,
2851	&feature_bmi2,	2851	.slow_unaligned_mem_32,
2852	&feature_avx512bw,	2852	.x87,
2853	&feature_avx512cd,	2853	.xsave,
2854	&feature_clflushopt,	2854	.xsaveopt,
2855	&feature_clwb,	2855	}),
2856	&feature_cmov,	2856	};
2857	&feature_cx8,	2857
2858	&feature_cx16,	2858	pub const silvermont = Cpu{
2859	&feature_avx512dq,	2859	.name = "silvermont",
2860	&feature_ermsb,	2860	.llvm_name = "silvermont",
2861	&feature_f16c,	2861	.dependencies = featureSet(&[_]Feature{
2862	&feature_fma,	2862	.bit64,
2863	&feature_fsgsbase,	2863	.cmov,
2864	&feature_fxsr,	2864	.cx8,
2865	&feature_fastShldRotate,	2865	.cx16,
2866	&feature_fastScalarFsqrt,	2866	.fxsr,
2867	&feature_fastVariableShuffle,	2867	.sahf,
2868	&feature_fastVectorFsqrt,	2868	.mmx,
2869	&feature_fastGather,	2869	.movbe,
2870	&feature_invpcid,	2870	.nopl,
2871	&feature_sahf,	2871	.sse,
2872	&feature_lzcnt,	2872	.pclmul,
2873	&feature_mmx,	2873	.popcnt,
2874	&feature_movbe,	2874	.false_deps_popcnt,
2875	&feature_mpx,	2875	.prfchw,
2876	&feature_macrofusion,	2876	.rdrnd,
2877	&feature_mergeToThreewayBranch,	2877	.sse42,
2878	&feature_nopl,	2878	.ssse3,
2879	&feature_pclmul,	2879	.idivq_to_divl,
2880	&feature_pku,	2880	.slow_incdec,
2881	&feature_popcnt,	2881	.slowLea,
2882	&feature_falseDepsPopcnt,	2882	.slowPmulld,
2883	&feature_prfchw,	2883	.slow_two_mem_ops,
2884	&feature_rdrnd,	2884	.x87,
2885	&feature_rdseed,	2885	}),
2886	&feature_sse42,	2886	};
2887	&feature_slow3opsLea,	2887
2888	&feature_idivqToDivl,	2888	pub const skx = Cpu{
2889	&feature_avx512vl,	2889	.name = "skx",
2890	&feature_x87,	2890	.llvm_name = "skx",
2891	&feature_xsave,	2891	.dependencies = featureSet(&[_]Feature{
2892	&feature_xsavec,	2892	.bit64,
2893	&feature_xsaveopt,	2893	.adx,
2894	&feature_xsaves,	2894	.sse,
2895	},	2895	.aes,
2896	};	2896	.avx,
2897		2897	.avx2,
2898	pub const cpu_skylake = Cpu{	2898	.avx512f,
2899	.name = "skylake",	2899	.bmi,
2900	.llvm_name = "skylake",	2900	.bmi2,
2901	.dependencies = &[_]*const Feature {	2901	.avx512bw,
2902	&feature_bit64,	2902	.avx512cd,
2903	&feature_adx,	2903	.clflushopt,
2904	&feature_sse,	2904	.clwb,
2905	&feature_aes,	2905	.cmov,
2906	&feature_avx,	2906	.cx8,
2907	&feature_avx2,	2907	.cx16,
2908	&feature_bmi,	2908	.avx512dq,
2909	&feature_bmi2,	2909	.ermsb,
2910	&feature_clflushopt,	2910	.f16c,
2911	&feature_cmov,	2911	.fma,
2912	&feature_cx8,	2912	.fsgsbase,
2913	&feature_cx16,	2913	.fxsr,
2914	&feature_ermsb,	2914	.fast_shld_rotate,
2915	&feature_f16c,	2915	.fast_scalar_fsqrt,
2916	&feature_fma,	2916	.fast_variable_shuffle,
2917	&feature_fsgsbase,	2917	.fast_vector_fsqrt,
2918	&feature_fxsr,	2918	.fast_gather,
2919	&feature_fastShldRotate,	2919	.invpcid,
2920	&feature_fastScalarFsqrt,	2920	.sahf,
2921	&feature_fastVariableShuffle,	2921	.lzcnt,
2922	&feature_fastVectorFsqrt,	2922	.mmx,
2923	&feature_fastGather,	2923	.movbe,
2924	&feature_invpcid,	2924	.mpx,
2925	&feature_sahf,	2925	.macrofusion,
2926	&feature_lzcnt,	2926	.merge_to_threeway_branch,
2927	&feature_mmx,	2927	.nopl,
2928	&feature_movbe,	2928	.pclmul,
2929	&feature_mpx,	2929	.pku,
2930	&feature_macrofusion,	2930	.popcnt,
2931	&feature_mergeToThreewayBranch,	2931	.false_deps_popcnt,
2932	&feature_nopl,	2932	.prfchw,
2933	&feature_pclmul,	2933	.rdrnd,
2934	&feature_popcnt,	2934	.rdseed,
2935	&feature_falseDepsPopcnt,	2935	.sse42,
2936	&feature_prfchw,	2936	.slow_3ops_lea,
2937	&feature_rdrnd,	2937	.idivq_to_divl,
2938	&feature_rdseed,	2938	.avx512vl,
2939	&feature_sgx,	2939	.x87,
2940	&feature_sse42,	2940	.xsave,
2941	&feature_slow3opsLea,	2941	.xsavec,
2942	&feature_idivqToDivl,	2942	.xsaveopt,
2943	&feature_x87,	2943	.xsaves,
2944	&feature_xsave,	2944	}),
2945	&feature_xsavec,	2945	};
2946	&feature_xsaveopt,	2946
2947	&feature_xsaves,	2947	pub const skylake = Cpu{
2948	},	2948	.name = "skylake",
2949	};	2949	.llvm_name = "skylake",
2950		2950	.dependencies = featureSet(&[_]Feature{
2951	pub const cpu_skylakeAvx512 = Cpu{	2951	.bit64,
2952	.name = "skylakeAvx512",	2952	.adx,
2953	.llvm_name = "skylake-avx512",	2953	.sse,
2954	.dependencies = &[_]*const Feature {	2954	.aes,
2955	&feature_bit64,	2955	.avx,
2956	&feature_adx,	2956	.avx2,
2957	&feature_sse,	2957	.bmi,
2958	&feature_aes,	2958	.bmi2,
2959	&feature_avx,	2959	.clflushopt,
2960	&feature_avx2,	2960	.cmov,
2961	&feature_avx512f,	2961	.cx8,
2962	&feature_bmi,	2962	.cx16,
2963	&feature_bmi2,	2963	.ermsb,
2964	&feature_avx512bw,	2964	.f16c,
2965	&feature_avx512cd,	2965	.fma,
2966	&feature_clflushopt,	2966	.fsgsbase,
2967	&feature_clwb,	2967	.fxsr,
2968	&feature_cmov,	2968	.fast_shld_rotate,
2969	&feature_cx8,	2969	.fast_scalar_fsqrt,
2970	&feature_cx16,	2970	.fast_variable_shuffle,
2971	&feature_avx512dq,	2971	.fast_vector_fsqrt,
2972	&feature_ermsb,	2972	.fast_gather,
2973	&feature_f16c,	2973	.invpcid,
2974	&feature_fma,	2974	.sahf,
2975	&feature_fsgsbase,	2975	.lzcnt,
2976	&feature_fxsr,	2976	.mmx,
2977	&feature_fastShldRotate,	2977	.movbe,
2978	&feature_fastScalarFsqrt,	2978	.mpx,
2979	&feature_fastVariableShuffle,	2979	.macrofusion,
2980	&feature_fastVectorFsqrt,	2980	.merge_to_threeway_branch,
2981	&feature_fastGather,	2981	.nopl,
2982	&feature_invpcid,	2982	.pclmul,
2983	&feature_sahf,	2983	.popcnt,
2984	&feature_lzcnt,	2984	.false_deps_popcnt,
2985	&feature_mmx,	2985	.prfchw,
2986	&feature_movbe,	2986	.rdrnd,
2987	&feature_mpx,	2987	.rdseed,
2988	&feature_macrofusion,	2988	.sgx,
2989	&feature_mergeToThreewayBranch,	2989	.sse42,
2990	&feature_nopl,	2990	.slow_3ops_lea,
2991	&feature_pclmul,	2991	.idivq_to_divl,
2992	&feature_pku,	2992	.x87,
2993	&feature_popcnt,	2993	.xsave,
2994	&feature_falseDepsPopcnt,	2994	.xsavec,
2995	&feature_prfchw,	2995	.xsaveopt,
2996	&feature_rdrnd,	2996	.xsaves,
2997	&feature_rdseed,	2997	}),
2998	&feature_sse42,	2998	};
2999	&feature_slow3opsLea,	2999
3000	&feature_idivqToDivl,	3000	pub const skylake_avx512 = Cpu{
3001	&feature_avx512vl,	3001	.name = "skylake_avx512",
3002	&feature_x87,	3002	.llvm_name = "skylake-avx512",
3003	&feature_xsave,	3003	.dependencies = featureSet(&[_]Feature{
3004	&feature_xsavec,	3004	.bit64,
3005	&feature_xsaveopt,	3005	.adx,
3006	&feature_xsaves,	3006	.sse,
3007	},	3007	.aes,
3008	};	3008	.avx,
3009		3009	.avx2,
3010	pub const cpu_slm = Cpu{	3010	.avx512f,
3011	.name = "slm",	3011	.bmi,
3012	.llvm_name = "slm",	3012	.bmi2,
3013	.dependencies = &[_]*const Feature {	3013	.avx512bw,
3014	&feature_bit64,	3014	.avx512cd,
3015	&feature_cmov,	3015	.clflushopt,
3016	&feature_cx8,	3016	.clwb,
3017	&feature_cx16,	3017	.cmov,
3018	&feature_fxsr,	3018	.cx8,
3019	&feature_sahf,	3019	.cx16,
3020	&feature_mmx,	3020	.avx512dq,
3021	&feature_movbe,	3021	.ermsb,
3022	&feature_nopl,	3022	.f16c,
3023	&feature_sse,	3023	.fma,
3024	&feature_pclmul,	3024	.fsgsbase,
3025	&feature_popcnt,	3025	.fxsr,
3026	&feature_falseDepsPopcnt,	3026	.fast_shld_rotate,
3027	&feature_prfchw,	3027	.fast_scalar_fsqrt,
3028	&feature_rdrnd,	3028	.fast_variable_shuffle,
3029	&feature_sse42,	3029	.fast_vector_fsqrt,
3030	&feature_ssse3,	3030	.fast_gather,
3031	&feature_idivqToDivl,	3031	.invpcid,
3032	&feature_slowIncdec,	3032	.sahf,
3033	&feature_slowLea,	3033	.lzcnt,
3034	&feature_slowPmulld,	3034	.mmx,
3035	&feature_slowTwoMemOps,	3035	.movbe,
3036	&feature_x87,	3036	.mpx,
3037	},	3037	.macrofusion,
3038	};	3038	.merge_to_threeway_branch,
3039		3039	.nopl,
3040	pub const cpu_tremont = Cpu{	3040	.pclmul,
3041	.name = "tremont",	3041	.pku,
3042	.llvm_name = "tremont",	3042	.popcnt,
3043	.dependencies = &[_]*const Feature {	3043	.false_deps_popcnt,
3044	&feature_bit64,	3044	.prfchw,
3045	&feature_sse,	3045	.rdrnd,
3046	&feature_aes,	3046	.rdseed,
3047	&feature_cldemote,	3047	.sse42,
3048	&feature_clflushopt,	3048	.slow_3ops_lea,
3049	&feature_cmov,	3049	.idivq_to_divl,
3050	&feature_cx8,	3050	.avx512vl,
3051	&feature_cx16,	3051	.x87,
3052	&feature_fsgsbase,	3052	.xsave,
3053	&feature_fxsr,	3053	.xsavec,
3054	&feature_gfni,	3054	.xsaveopt,
3055	&feature_sahf,	3055	.xsaves,
3056	&feature_mmx,	3056	}),
3057	&feature_movbe,	3057	};
3058	&feature_movdir64b,	3058
3059	&feature_movdiri,	3059	pub const slm = Cpu{
3060	&feature_mpx,	3060	.name = "slm",
3061	&feature_nopl,	3061	.llvm_name = "slm",
3062	&feature_pclmul,	3062	.dependencies = featureSet(&[_]Feature{
3063	&feature_popcnt,	3063	.bit64,
3064	&feature_prfchw,	3064	.cmov,
3065	&feature_ptwrite,	3065	.cx8,
3066	&feature_rdpid,	3066	.cx16,
3067	&feature_rdrnd,	3067	.fxsr,
3068	&feature_rdseed,	3068	.sahf,
3069	&feature_sgx,	3069	.mmx,
3070	&feature_sha,	3070	.movbe,
3071	&feature_sse42,	3071	.nopl,
3072	&feature_ssse3,	3072	.sse,
3073	&feature_slowIncdec,	3073	.pclmul,
3074	&feature_slowLea,	3074	.popcnt,
3075	&feature_slowTwoMemOps,	3075	.false_deps_popcnt,
3076	&feature_waitpkg,	3076	.prfchw,
3077	&feature_x87,	3077	.rdrnd,
3078	&feature_xsave,	3078	.sse42,
3079	&feature_xsavec,	3079	.ssse3,
3080	&feature_xsaveopt,	3080	.idivq_to_divl,
3081	&feature_xsaves,	3081	.slow_incdec,
3082	},	3082	.slowLea,
3083	};	3083	.slowPmulld,
3084		3084	.slow_two_mem_ops,
3085	pub const cpu_westmere = Cpu{	3085	.x87,
3086	.name = "westmere",	3086	}),
3087	.llvm_name = "westmere",	3087	};
3088	.dependencies = &[_]*const Feature {	3088
3089	&feature_bit64,	3089	pub const tremont = Cpu{
3090	&feature_cmov,	3090	.name = "tremont",
3091	&feature_cx8,	3091	.llvm_name = "tremont",
3092	&feature_cx16,	3092	.dependencies = featureSet(&[_]Feature{
3093	&feature_fxsr,	3093	.bit64,
3094	&feature_sahf,	3094	.sse,
3095	&feature_mmx,	3095	.aes,
3096	&feature_macrofusion,	3096	.cldemote,
3097	&feature_nopl,	3097	.clflushopt,
3098	&feature_sse,	3098	.cmov,
3099	&feature_pclmul,	3099	.cx8,
3100	&feature_popcnt,	3100	.cx16,
3101	&feature_sse42,	3101	.fsgsbase,
3102	&feature_x87,	3102	.fxsr,
3103	},	3103	.gfni,
3104	};	3104	.sahf,
3105		3105	.mmx,
3106	pub const cpu_winchipC6 = Cpu{	3106	.movbe,
3107	.name = "winchipC6",	3107	.movdir64b,
3108	.llvm_name = "winchip-c6",	3108	.movdiri,
3109	.dependencies = &[_]*const Feature {	3109	.mpx,
3110	&feature_mmx,	3110	.nopl,
3111	&feature_slowUnalignedMem16,	3111	.pclmul,
3112	&feature_x87,	3112	.popcnt,
3113	},	3113	.prfchw,
3114	};	3114	.ptwrite,
3115		3115	.rdpid,
3116	pub const cpu_winchip2 = Cpu{	3116	.rdrnd,
3117	.name = "winchip2",	3117	.rdseed,
3118	.llvm_name = "winchip2",	3118	.sgx,
3119	.dependencies = &[_]*const Feature {	3119	.sha,
3120	&feature_mmx,	3120	.sse42,
3121	&feature_dnow3,	3121	.ssse3,
3122	&feature_slowUnalignedMem16,	3122	.slow_incdec,
3123	&feature_x87,	3123	.slowLea,
3124	},	3124	.slow_two_mem_ops,
3125	};	3125	.waitpkg,
3126		3126	.x87,
3127	pub const cpu_x8664 = Cpu{	3127	.xsave,
3128	.name = "x8664",	3128	.xsavec,
3129	.llvm_name = "x86-64",	3129	.xsaveopt,
3130	.dependencies = &[_]*const Feature {	3130	.xsaves,
3131	&feature_bit64,	3131	}),
3132	&feature_cmov,	3132	};
3133	&feature_cx8,	3133
3134	&feature_fxsr,	3134	pub const westmere = Cpu{
3135	&feature_mmx,	3135	.name = "westmere",
3136	&feature_macrofusion,	3136	.llvm_name = "westmere",
3137	&feature_nopl,	3137	.dependencies = featureSet(&[_]Feature{
3138	&feature_sse,	3138	.bit64,
3139	&feature_sse2,	3139	.cmov,
3140	&feature_slow3opsLea,	3140	.cx8,
3141	&feature_slowIncdec,	3141	.cx16,
3142	&feature_x87,	3142	.fxsr,
3143	},	3143	.sahf,
3144	};	3144	.mmx,
3145		3145	.macrofusion,
3146	pub const cpu_yonah = Cpu{	3146	.nopl,
3147	.name = "yonah",	3147	.sse,
3148	.llvm_name = "yonah",	3148	.pclmul,
3149	.dependencies = &[_]*const Feature {	3149	.popcnt,
3150	&feature_cmov,	3150	.sse42,
3151	&feature_cx8,	3151	.x87,
3152	&feature_fxsr,	3152	}),
3153	&feature_mmx,	3153	};
3154	&feature_nopl,	3154
3155	&feature_sse,	3155	pub const winchip_c6 = Cpu{
3156	&feature_sse3,	3156	.name = "winchip_c6",
3157	&feature_slowUnalignedMem16,	3157	.llvm_name = "winchip-c6",
3158	&feature_x87,	3158	.dependencies = featureSet(&[_]Feature{
3159	},	3159	.mmx,
3160	};	3160	.slow_unaligned_mem_16,
3161		3161	.x87,
3162	pub const cpu_znver1 = Cpu{	3162	}),
3163	.name = "znver1",	3163	};
3164	.llvm_name = "znver1",	3164
3165	.dependencies = &[_]*const Feature {	3165	pub const winchip2 = Cpu{
3166	&feature_bit64,	3166	.name = "winchip2",
3167	&feature_adx,	3167	.llvm_name = "winchip2",
3168	&feature_sse,	3168	.dependencies = featureSet(&[_]Feature{
3169	&feature_aes,	3169	.mmx,
3170	&feature_avx2,	3170	.dnow3,
3171	&feature_bmi,	3171	.slow_unaligned_mem_16,
3172	&feature_bmi2,	3172	.x87,
3173	&feature_branchfusion,	3173	}),
3174	&feature_clflushopt,	3174	};
3175	&feature_clzero,	3175
3176	&feature_cmov,	3176	pub const x86_64 = Cpu{
3177	&feature_cx8,	3177	.name = "x86_64",
3178	&feature_cx16,	3178	.llvm_name = "x86-64",
3179	&feature_f16c,	3179	.dependencies = featureSet(&[_]Feature{
3180	&feature_fma,	3180	.bit64,
3181	&feature_fsgsbase,	3181	.cmov,
3182	&feature_fxsr,	3182	.cx8,
3183	&feature_fast15bytenop,	3183	.fxsr,
3184	&feature_fastBextr,	3184	.mmx,
3185	&feature_fastLzcnt,	3185	.macrofusion,
3186	&feature_fastScalarShiftMasks,	3186	.nopl,
3187	&feature_sahf,	3187	.sse,
3188	&feature_lzcnt,	3188	.sse2,
3189	&feature_mmx,	3189	.slow_3ops_lea,
3190	&feature_movbe,	3190	.slow_incdec,
3191	&feature_mwaitx,	3191	.x87,
3192	&feature_nopl,	3192	}),
3193	&feature_pclmul,	3193	};
3194	&feature_popcnt,	3194
3195	&feature_prfchw,	3195	pub const yonah = Cpu{
3196	&feature_rdrnd,	3196	.name = "yonah",
3197	&feature_rdseed,	3197	.llvm_name = "yonah",
3198	&feature_sha,	3198	.dependencies = featureSet(&[_]Feature{
3199	&feature_sse4a,	3199	.cmov,
3200	&feature_slowShld,	3200	.cx8,
3201	&feature_x87,	3201	.fxsr,
3202	&feature_xsave,	3202	.mmx,
3203	&feature_xsavec,	3203	.nopl,
3204	&feature_xsaveopt,	3204	.sse,
3205	&feature_xsaves,	3205	.sse3,
3206	},	3206	.slow_unaligned_mem_16,
3207	};	3207	.x87,
3208		3208	}),
3209	pub const cpu_znver2 = Cpu{	3209	};
3210	.name = "znver2",	3210
3211	.llvm_name = "znver2",	3211	pub const znver1 = Cpu{
3212	.dependencies = &[_]*const Feature {	3212	.name = "znver1",
3213	&feature_bit64,	3213	.llvm_name = "znver1",
3214	&feature_adx,	3214	.dependencies = featureSet(&[_]Feature{
3215	&feature_sse,	3215	.bit64,
3216	&feature_aes,	3216	.adx,
3217	&feature_avx2,	3217	.sse,
3218	&feature_bmi,	3218	.aes,
3219	&feature_bmi2,	3219	.avx2,
3220	&feature_branchfusion,	3220	.bmi,
3221	&feature_clflushopt,	3221	.bmi2,
3222	&feature_clwb,	3222	.branchfusion,
3223	&feature_clzero,	3223	.clflushopt,
3224	&feature_cmov,	3224	.clzero,
3225	&feature_cx8,	3225	.cmov,
3226	&feature_cx16,	3226	.cx8,
3227	&feature_f16c,	3227	.cx16,
3228	&feature_fma,	3228	.f16c,
3229	&feature_fsgsbase,	3229	.fma,
3230	&feature_fxsr,	3230	.fsgsbase,
3231	&feature_fast15bytenop,	3231	.fxsr,
3232	&feature_fastBextr,	3232	.fast15bytenop,
3233	&feature_fastLzcnt,	3233	.fast_bextr,
3234	&feature_fastScalarShiftMasks,	3234	.fast_lzcnt,
3235	&feature_sahf,	3235	.fast_scalar_shift_masks,
3236	&feature_lzcnt,	3236	.sahf,
3237	&feature_mmx,	3237	.lzcnt,
3238	&feature_movbe,	3238	.mmx,
3239	&feature_mwaitx,	3239	.movbe,
3240	&feature_nopl,	3240	.mwaitx,
3241	&feature_pclmul,	3241	.nopl,
3242	&feature_popcnt,	3242	.pclmul,
3243	&feature_prfchw,	3243	.popcnt,
3244	&feature_rdpid,	3244	.prfchw,
3245	&feature_rdrnd,	3245	.rdrnd,
3246	&feature_rdseed,	3246	.rdseed,
3247	&feature_sha,	3247	.sha,
3248	&feature_sse4a,	3248	.sse4a,
3249	&feature_slowShld,	3249	.slow_shld,
3250	&feature_wbnoinvd,	3250	.x87,
3251	&feature_x87,	3251	.xsave,
3252	&feature_xsave,	3252	.xsavec,
3253	&feature_xsavec,	3253	.xsaveopt,
3254	&feature_xsaveopt,	3254	.xsaves,
3255	&feature_xsaves,	3255	}),
3256	},	3256	};
3257	};	3257
3258		3258	pub const znver2 = Cpu{
3259	pub const cpus = &[_]*const Cpu {	3259	.name = "znver2",
3260	&cpu_amdfam10,	3260	.llvm_name = "znver2",
3261	&cpu_athlon,	3261	.dependencies = featureSet(&[_]Feature{
3262	&cpu_athlon4,	3262	.bit64,
3263	&cpu_athlonFx,	3263	.adx,
3264	&cpu_athlonMp,	3264	.sse,
3265	&cpu_athlonTbird,	3265	.aes,
3266	&cpu_athlonXp,	3266	.avx2,
3267	&cpu_athlon64,	3267	.bmi,
3268	&cpu_athlon64Sse3,	3268	.bmi2,
3269	&cpu_atom,	3269	.branchfusion,
3270	&cpu_barcelona,	3270	.clflushopt,
3271	&cpu_bdver1,	3271	.clwb,
3272	&cpu_bdver2,	3272	.clzero,
3273	&cpu_bdver3,	3273	.cmov,
3274	&cpu_bdver4,	3274	.cx8,
3275	&cpu_bonnell,	3275	.cx16,
3276	&cpu_broadwell,	3276	.f16c,
3277	&cpu_btver1,	3277	.fma,
3278	&cpu_btver2,	3278	.fsgsbase,
3279	&cpu_c3,	3279	.fxsr,
3280	&cpu_c32,	3280	.fast15bytenop,
3281	&cpu_cannonlake,	3281	.fast_bextr,
3282	&cpu_cascadelake,	3282	.fast_lzcnt,
3283	&cpu_cooperlake,	3283	.fast_scalar_shift_masks,
3284	&cpu_coreAvxI,	3284	.sahf,
3285	&cpu_coreAvx2,	3285	.lzcnt,
3286	&cpu_core2,	3286	.mmx,
3287	&cpu_corei7,	3287	.movbe,
3288	&cpu_corei7Avx,	3288	.mwaitx,
3289	&cpu_generic,	3289	.nopl,
3290	&cpu_geode,	3290	.pclmul,
3291	&cpu_goldmont,	3291	.popcnt,
3292	&cpu_goldmontPlus,	3292	.prfchw,
3293	&cpu_haswell,	3293	.rdpid,
3294	&cpu_i386,	3294	.rdrnd,
3295	&cpu_i486,	3295	.rdseed,
3296	&cpu_i586,	3296	.sha,
3297	&cpu_i686,	3297	.sse4a,
3298	&cpu_icelakeClient,	3298	.slow_shld,
3299	&cpu_icelakeServer,	3299	.wbnoinvd,
3300	&cpu_ivybridge,	3300	.x87,
3301	&cpu_k6,	3301	.xsave,
3302	&cpu_k62,	3302	.xsavec,
3303	&cpu_k63,	3303	.xsaveopt,
3304	&cpu_k8,	3304	.xsaves,
3305	&cpu_k8Sse3,	3305	}),
3306	&cpu_knl,	3306	};
3307	&cpu_knm,	3307	};
3308	&cpu_lakemont,	3308
3309	&cpu_nehalem,	3309	pub const all_cpus = &[_]*const Cpu{
3310	&cpu_nocona,	3310	&cpu.amdfam10,
3311	&cpu_opteron,	3311	&cpu.athlon,
3312	&cpu_opteronSse3,	3312	&cpu.athlon4,
3313	&cpu_penryn,	3313	&cpu.athlon_fx,
3314	&cpu_pentium,	3314	&cpu.athlon_mp,
3315	&cpu_pentiumM,	3315	&cpu.athlon_tbird,
3316	&cpu_pentiumMmx,	3316	&cpu.athlon_xp,
3317	&cpu_pentium2,	3317	&cpu.athlon64,
3318	&cpu_pentium3,	3318	&cpu.athlon64_sse3,
3319	&cpu_pentium3m,	3319	&cpu.atom,
3320	&cpu_pentium4,	3320	&cpu.barcelona,
3321	&cpu_pentium4m,	3321	&cpu.bdver1,
3322	&cpu_pentiumpro,	3322	&cpu.bdver2,
3323	&cpu_prescott,	3323	&cpu.bdver3,
3324	&cpu_sandybridge,	3324	&cpu.bdver4,
3325	&cpu_silvermont,	3325	&cpu.bonnell,
3326	&cpu_skx,	3326	&cpu.broadwell,
3327	&cpu_skylake,	3327	&cpu.btver1,
3328	&cpu_skylakeAvx512,	3328	&cpu.btver2,
3329	&cpu_slm,	3329	&cpu.c3,
3330	&cpu_tremont,	3330	&cpu.c32,
3331	&cpu_westmere,	3331	&cpu.cannonlake,
3332	&cpu_winchipC6,	3332	&cpu.cascadelake,
3333	&cpu_winchip2,	3333	&cpu.cooperlake,
3334	&cpu_x8664,	3334	&cpu.core_avx_i,
3335	&cpu_yonah,	3335	&cpu.core_avx2,
3336	&cpu_znver1,	3336	&cpu.core2,
3337	&cpu_znver2,	3337	&cpu.corei7,
		3338	&cpu.corei7_avx,
		3339	&cpu.generic,
		3340	&cpu.geode,
		3341	&cpu.goldmont,
		3342	&cpu.goldmont_plus,
		3343	&cpu.haswell,
		3344	&cpu.i386,
		3345	&cpu.i486,
		3346	&cpu.i586,
		3347	&cpu.i686,
		3348	&cpu.icelake_client,
		3349	&cpu.icelake_server,
		3350	&cpu.ivybridge,
		3351	&cpu.k6,
		3352	&cpu.k62,
		3353	&cpu.k63,
		3354	&cpu.k8,
		3355	&cpu.k8_sse3,
		3356	&cpu.knl,
		3357	&cpu.knm,
		3358	&cpu.lakemont,
		3359	&cpu.nehalem,
		3360	&cpu.nocona,
		3361	&cpu.opteron,
		3362	&cpu.opteron_sse3,
		3363	&cpu.penryn,
		3364	&cpu.pentium,
		3365	&cpu.pentium_m,
		3366	&cpu.pentium_mmx,
		3367	&cpu.pentium2,
		3368	&cpu.pentium3,
		3369	&cpu.pentium3m,
		3370	&cpu.pentium4,
		3371	&cpu.pentium4m,
		3372	&cpu.pentiumpro,
		3373	&cpu.prescott,
		3374	&cpu.sandybridge,
		3375	&cpu.silvermont,
		3376	&cpu.skx,
		3377	&cpu.skylake,
		3378	&cpu.skylake_avx512,
		3379	&cpu.slm,
		3380	&cpu.tremont,
		3381	&cpu.westmere,
		3382	&cpu.winchip_c6,
		3383	&cpu.winchip2,
		3384	&cpu.x86_64,
		3385	&cpu.yonah,
		3386	&cpu.znver1,
		3387	&cpu.znver2,
3338	};	3388	};

...	@@ -401,25 +401,25 @@ pub const Target = union(enum) {	...	@@ -401,25 +401,25 @@ pub const Target = union(enum) {
401	}	401	}
402		402
403	/// All CPU features Zig is aware of, sorted lexicographically by name.	403	/// All CPU features Zig is aware of, sorted lexicographically by name.
404	pub fn allFeaturesList(arch: Arch) []const *const Cpu.Feature {	404	pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
405	return switch (arch) {	405	return switch (arch) {
406	.arm, .armeb, .thumb, .thumbeb => arm.all_features,	406	// TODO .arm, .armeb, .thumb, .thumbeb => arm.all_features,
407	.aarch64, .aarch64_be, .aarch64_32 => aarch64.all_features,	407	.aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
408	.avr => avr.all_features,	408	// TODO .avr => avr.all_features,
409	.bpfel, .bpfeb => bpf.all_features,	409	// TODO .bpfel, .bpfeb => bpf.all_features,
410	.hexagon => hexagon.all_features,	410	// TODO .hexagon => hexagon.all_features,
411	.mips, .mipsel, .mips64, .mips64el => mips.all_features,	411	// TODO .mips, .mipsel, .mips64, .mips64el => mips.all_features,
412	.msp430 => msp430.all_features,	412	// TODO .msp430 => msp430.all_features,
413	.powerpc, .powerpc64, .powerpc64le => powerpc.all_features,	413	// TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
414	.amdgcn => amdgpu.all_features,	414	// TODO .amdgcn => amdgpu.all_features,
415	.riscv32, .riscv64 => riscv.all_features,	415	// TODO .riscv32, .riscv64 => riscv.all_features,
416	.sparc, .sparcv9, .sparcel => sparc.all_features,	416	// TODO .sparc, .sparcv9, .sparcel => sparc.all_features,
417	.s390x => systemz.all_features,	417	// TODO .s390x => systemz.all_features,
418	.i386, .x86_64 => x86.all_features,	418	.i386, .x86_64 => &x86.all_features,
419	.nvptx, .nvptx64 => nvptx.all_features,	419	// TODO .nvptx, .nvptx64 => nvptx.all_features,
420	.wasm32, .wasm64 => wasm.all_features,	420	// TODO .wasm32, .wasm64 => wasm.all_features,
421		421
422	else => &[0]*const Cpu.Feature{},	422	else => &[0]Cpu.Feature{},
423	};	423	};
424	}	424	}
425		425
...	@@ -427,23 +427,24 @@ pub const Target = union(enum) {	...	@@ -427,23 +427,24 @@ pub const Target = union(enum) {
427	/// of features that is expected to be supported on most available hardware.	427	/// of features that is expected to be supported on most available hardware.
428	pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {	428	pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {
429	return switch (arch) {	429	return switch (arch) {
430	.arm, .armeb, .thumb, .thumbeb => arm.baseline_features,	430	// TODO .arm, .armeb, .thumb, .thumbeb => arm.baseline_features,
431	.aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,	431	.aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
432	.avr => avr.baseline_features,	432	// TODO .avr => avr.baseline_features,
433	.bpfel, .bpfeb => bpf.baseline_features,	433	// TODO .bpfel, .bpfeb => bpf.baseline_features,
434	.hexagon => hexagon.baseline_features,	434	// TODO .hexagon => hexagon.baseline_features,
435	.mips, .mipsel, .mips64, .mips64el => mips.baseline_features,	435	// TODO .mips, .mipsel, .mips64, .mips64el => mips.baseline_features,
436	.msp430 => msp430.baseline_features,	436	// TODO .msp430 => msp430.baseline_features,
437	.powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,	437	// TODO .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,
438	.amdgcn => amdgpu.baseline_features,	438	// TODO .amdgcn => amdgpu.baseline_features,
439	.riscv32, .riscv64 => riscv.baseline_features,	439	// TODO .riscv32, .riscv64 => riscv.baseline_features,
440	.sparc, .sparcv9, .sparcel => sparc.baseline_features,	440	// TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features,
441	.s390x => systemz.baseline_features,	441	// TODO .s390x => systemz.baseline_features,
442	.i386, .x86_64 => x86.baseline_features,	442	.i386 => x86.cpu.pentium4.features,
443	.nvptx, .nvptx64 => nvptx.baseline_features,	443	.x86_64 => x86.cpu.x8664.features,
444	.wasm32, .wasm64 => wasm.baseline_features,	444	// TODO .nvptx, .nvptx64 => nvptx.baseline_features,
445		445	// TODO .wasm32, .wasm64 => wasm.baseline_features,
446	else => &[0]*const Cpu.Feature{},	446
		447	else => 0,
447	};	448	};
448	}	449	}
449		450
...	@@ -515,6 +516,22 @@ pub const Target = union(enum) {	...	@@ -515,6 +516,22 @@ pub const Target = union(enum) {
515	pub fn isEnabled(set: Set, arch_feature_index: u7) bool {	516	pub fn isEnabled(set: Set, arch_feature_index: u7) bool {
516	return (set & (@as(Set, 1) << arch_feature_index)) != 0;	517	return (set & (@as(Set, 1) << arch_feature_index)) != 0;
517	}	518	}
		519
		520	pub fn feature_set_fns(comptime F: type) type {
		521	return struct {
		522	pub fn featureSet(features: []const F) Set {
		523	var x: Set = 0;
		524	for (features) \|feature\| {
		525	x \|= @as(Set, 1) << @enumToInt(feature);
		526	}
		527	return x;
		528	}
		529
		530	pub fn featureSetHas(set: Set, feature: F) bool {
		531	return (set & (@as(Set, 1) << @enumToInt(feature))) != 0;
		532	}
		533	};
		534	}
518	};	535	};
519	};	536	};
520		537