| author | |
| committer | |
| log | e76d52c74dbb7566af75baf7184b04f131d26d5f |
| tree | 3d8e3aeffa73854598e3aaa4ca95eb1ab46a43d2 |
| parent | ae201807f52077709b46ab7d2adfe5178ce138af |
3 files changed, 1 insertions(+), 38 deletions(-)
src/arch/sparcv9/CodeGen.zig-12| ... | ... | @@ -780,16 +780,6 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void { |
| 780 | 780 | // TODO Copy registers to the stack |
| 781 | 781 | const mcv = result; |
| 782 | 782 | |
| 783 | _ = try self.addInst(.{ | |
| 784 | .tag = .dbg_arg, | |
| 785 | .data = .{ | |
| 786 | .dbg_arg_info = .{ | |
| 787 | .air_inst = inst, | |
| 788 | .arg_index = arg_index, | |
| 789 | }, | |
| 790 | }, | |
| 791 | }); | |
| 792 | ||
| 793 | 783 | if (self.liveness.isUnused(inst)) |
| 794 | 784 | return self.finishAirBookkeeping(); |
| 795 | 785 | |
| ... | ... | @@ -1050,9 +1040,7 @@ fn airSwitch(self: *Self, inst: Air.Inst.Index) !void { |
| 1050 | 1040 | |
| 1051 | 1041 | fn addInst(self: *Self, inst: Mir.Inst) error{OutOfMemory}!Mir.Inst.Index { |
| 1052 | 1042 | const gpa = self.gpa; |
| 1053 | ||
| 1054 | 1043 | try self.mir_instructions.ensureUnusedCapacity(gpa, 1); |
| 1055 | ||
| 1056 | 1044 | const result_index = @intCast(Air.Inst.Index, self.mir_instructions.len); |
| 1057 | 1045 | self.mir_instructions.appendAssumeCapacity(inst); |
| 1058 | 1046 | return result_index; |
src/arch/sparcv9/Emit.zig-12| ... | ... | @@ -45,7 +45,6 @@ pub fn emitMir( |
| 45 | 45 | for (mir_tags) |tag, index| { |
| 46 | 46 | const inst = @intCast(u32, index); |
| 47 | 47 | switch (tag) { |
| 48 | .dbg_arg => try emit.mirDbgArg(inst), | |
| 49 | 48 | .dbg_line => try emit.mirDbgLine(inst), |
| 50 | 49 | .dbg_prologue_end => try emit.mirDebugPrologueEnd(), |
| 51 | 50 | .dbg_epilogue_begin => try emit.mirDebugEpilogueBegin(), |
| ... | ... | @@ -92,17 +91,6 @@ pub fn deinit(emit: *Emit) void { |
| 92 | 91 | emit.* = undefined; |
| 93 | 92 | } |
| 94 | 93 | |
| 95 | fn mirDbgArg(emit: *Emit, inst: Mir.Inst.Index) !void { | |
| 96 | const tag = emit.mir.instructions.items(.tag)[inst]; | |
| 97 | const dbg_arg_info = emit.mir.instructions.items(.data)[inst].dbg_arg_info; | |
| 98 | _ = dbg_arg_info; | |
| 99 | ||
| 100 | switch (tag) { | |
| 101 | .dbg_arg => {}, // TODO try emit.genArgDbgInfo(dbg_arg_info.air_inst, dbg_arg_info.arg_index), | |
| 102 | else => unreachable, | |
| 103 | } | |
| 104 | } | |
| 105 | ||
| 106 | 94 | fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void { |
| 107 | 95 | const tag = emit.mir.instructions.items(.tag)[inst]; |
| 108 | 96 | const dbg_line_column = emit.mir.instructions.items(.data)[inst].dbg_line_column; |
src/arch/sparcv9/Mir.zig+1-14| ... | ... | @@ -28,8 +28,6 @@ pub const Inst = struct { |
| 28 | 28 | data: Data, |
| 29 | 29 | |
| 30 | 30 | pub const Tag = enum(u16) { |
| 31 | /// Pseudo-instruction: Argument | |
| 32 | dbg_arg, | |
| 33 | 31 | /// Pseudo-instruction: End of prologue |
| 34 | 32 | dbg_prologue_end, |
| 35 | 33 | /// Pseudo-instruction: Beginning of epilogue |
| ... | ... | @@ -122,14 +120,6 @@ pub const Inst = struct { |
| 122 | 120 | /// how to interpret the data within. |
| 123 | 121 | // TODO this is a quick-n-dirty solution that needs to be cleaned up. |
| 124 | 122 | pub const Data = union { |
| 125 | /// Debug info: argument | |
| 126 | /// | |
| 127 | /// Used by e.g. dbg_arg | |
| 128 | dbg_arg_info: struct { | |
| 129 | air_inst: Air.Inst.Index, | |
| 130 | arg_index: usize, | |
| 131 | }, | |
| 132 | ||
| 133 | 123 | /// Debug info: line and column |
| 134 | 124 | /// |
| 135 | 125 | /// Used by e.g. dbg_line |
| ... | ... | @@ -234,10 +224,7 @@ pub const Inst = struct { |
| 234 | 224 | // Note that in Debug builds, Zig is allowed to insert a secret field for safety checks. |
| 235 | 225 | comptime { |
| 236 | 226 | if (builtin.mode != .Debug) { |
| 237 | // TODO clean up the definition of Data before enabling this. | |
| 238 | // I'll do that after the PoC backend can produce usable binaries. | |
| 239 | ||
| 240 | // assert(@sizeOf(Data) == 8); | |
| 227 | assert(@sizeOf(Data) == 8); | |
| 241 | 228 | } |
| 242 | 229 | } |
| 243 | 230 | }; |