authorgravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-13 03:01:19+03:30
committergravatar for alichraghi@proton.meAli Chraghi <alichraghi@proton.me> 2025-03-18 07:05:50+03:30
logee06b2ce760d927b62726de1e2e3cb33b48d4932
tree6046947d801d8c10b3dd1fd98d3ae8aba5da187a
parentd18eaf8586cf173d5605d5885fcbe26d64af00c5

spirv: require int8/int16 capabilities


4 files changed, 9 insertions(+), 20 deletions(-)

lib/std/Target/spirv.zig+1-13
......@@ -10,8 +10,6 @@ pub const Feature = enum {
1010 v1_4,
1111 v1_5,
1212 v1_6,
13 int8,
14 int16,
1513 int64,
1614 float16,
1715 float64,
......@@ -71,16 +69,6 @@ pub const all_features = blk: {
7169 .description = "Enable version 1.6",
7270 .dependencies = featureSet(&[_]Feature{.v1_5}),
7371 };
74 result[@intFromEnum(Feature.int8)] = .{
75 .llvm_name = null,
76 .description = "Enable Int8 capability",
77 .dependencies = featureSet(&[_]Feature{.v1_0}),
78 };
79 result[@intFromEnum(Feature.int16)] = .{
80 .llvm_name = null,
81 .description = "Enable Int16 capability",
82 .dependencies = featureSet(&[_]Feature{.v1_0}),
83 };
8472 result[@intFromEnum(Feature.int64)] = .{
8573 .llvm_name = null,
8674 .description = "Enable Int64 capability",
......@@ -109,7 +97,7 @@ pub const all_features = blk: {
10997 result[@intFromEnum(Feature.arbitrary_precision_integers)] = .{
11098 .llvm_name = null,
11199 .description = "Enable SPV_INTEL_arbitrary_precision_integers extension and the ArbitraryPrecisionIntegersINTEL capability",
112 .dependencies = featureSet(&[_]Feature{ .v1_5, .int8, .int16 }),
100 .dependencies = featureSet(&[_]Feature{.v1_5}),
113101 };
114102 result[@intFromEnum(Feature.kernel)] = .{
115103 .llvm_name = null,
src/codegen/spirv.zig+4-4
......@@ -588,11 +588,11 @@ const NavGen = struct {
588588
589589 if (self.spv.hasFeature(.arbitrary_precision_integers) and bits <= 32) return bits;
590590
591 // 8, 16 and 64-bit integers require the Int8, Int16 and Inr64 capabilities respectively.
591 // We require Int8 and Int16 capabilities and benefit Int64 when available.
592592 // 32-bit integers are always supported (see spec, 2.16.1, Data rules).
593593 const ints = [_]struct { bits: u16, feature: ?Target.spirv.Feature }{
594 .{ .bits = 8, .feature = .int8 },
595 .{ .bits = 16, .feature = .int16 },
594 .{ .bits = 8, .feature = null },
595 .{ .bits = 16, .feature = null },
596596 .{ .bits = 32, .feature = null },
597597 .{ .bits = 64, .feature = .int64 },
598598 };
......@@ -1373,7 +1373,7 @@ const NavGen = struct {
13731373 var member_types: [4]IdRef = undefined;
13741374 var member_names: [4][]const u8 = undefined;
13751375
1376 const u8_ty_id = try self.resolveType(Type.u8, .direct); // TODO: What if Int8Type is not enabled?
1376 const u8_ty_id = try self.resolveType(Type.u8, .direct);
13771377
13781378 if (layout.tag_size != 0) {
13791379 const tag_ty_id = try self.resolveType(Type.fromInterned(union_obj.enum_tag_ty), .indirect);
src/codegen/spirv/Module.zig+3-2
......@@ -333,8 +333,6 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {
333333 // Versions
334334 .v1_0, .v1_1, .v1_2, .v1_3, .v1_4, .v1_5, .v1_6 => {},
335335 // Features with no dependencies
336 .int8 => try self.addCapability(.Int8),
337 .int16 => try self.addCapability(.Int16),
338336 .int64 => try self.addCapability(.Int64),
339337 .float16 => try self.addCapability(.Float16),
340338 .float64 => try self.addCapability(.Float64),
......@@ -361,6 +359,9 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word {
361359 }
362360 }
363361 }
362 // These are well supported
363 try self.addCapability(.Int8);
364 try self.addCapability(.Int16);
364365
365366 // Emit memory model
366367 const addressing_model: spec.AddressingModel = blk: {
test/tests.zig+1-1
......@@ -143,7 +143,7 @@ const test_targets = blk: {
143143 .{
144144 .target = std.Target.Query.parse(.{
145145 .arch_os_abi = "spirv64-vulkan",
146 .cpu_features = "vulkan_v1_2+int8+int16+int64+float16+float64",
146 .cpu_features = "vulkan_v1_2+int64+float16+float64",
147147 }) catch unreachable,
148148 .use_llvm = false,
149149 .use_lld = false,