Commit f4317e4387925bfac93a517c1dbd28517740e021 | zig

lib/libunwind/include/__libunwind_config.h+11

 @@ -23,6 +23,7 @@
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K      32
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS      65
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC     31
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV     64
 #if defined(_LIBUNWIND_IS_NATIVE_ONLY)
 # if defined(__i386__)
 @@ -118,6 +119,15 @@
   #define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC
   #define _LIBUNWIND_CONTEXT_SIZE 16
   #define _LIBUNWIND_CURSOR_SIZE 23
+# elif defined(__riscv)
+#  if __riscv_xlen == 64
+#    define _LIBUNWIND_TARGET_RISCV 1
+#    define _LIBUNWIND_CONTEXT_SIZE 64
+#    define _LIBUNWIND_CURSOR_SIZE 76
+#  else
+#    error "Unsupported RISC-V ABI"
+#  endif
+# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV
 # else
 #  error "Unsupported architecture."
 # endif
 @@ -132,6 +142,7 @@
 # define _LIBUNWIND_TARGET_MIPS_O32 1
 # define _LIBUNWIND_TARGET_MIPS_NEWABI 1
 # define _LIBUNWIND_TARGET_SPARC 1
+# define _LIBUNWIND_TARGET_RISCV 1
 # define _LIBUNWIND_CONTEXT_SIZE 167
 # define _LIBUNWIND_CURSOR_SIZE 179
 # define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287

lib/libunwind/include/libunwind.h+71

...	@@ -832,4 +832,75 @@ enum {	...	@@ -832,4 +832,75 @@ enum {
832	UNW_SPARC_I7 = 31,	832	UNW_SPARC_I7 = 31,
833	};	833	};
834		834
		835	// RISC-V registers. These match the DWARF register numbers defined by section
		836	// 4 of the RISC-V ELF psABI specification, which can be found at:
		837	//
		838	// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
		839	enum {
		840	UNW_RISCV_X0 = 0,
		841	UNW_RISCV_X1 = 1,
		842	UNW_RISCV_X2 = 2,
		843	UNW_RISCV_X3 = 3,
		844	UNW_RISCV_X4 = 4,
		845	UNW_RISCV_X5 = 5,
		846	UNW_RISCV_X6 = 6,
		847	UNW_RISCV_X7 = 7,
		848	UNW_RISCV_X8 = 8,
		849	UNW_RISCV_X9 = 9,
		850	UNW_RISCV_X10 = 10,
		851	UNW_RISCV_X11 = 11,
		852	UNW_RISCV_X12 = 12,
		853	UNW_RISCV_X13 = 13,
		854	UNW_RISCV_X14 = 14,
		855	UNW_RISCV_X15 = 15,
		856	UNW_RISCV_X16 = 16,
		857	UNW_RISCV_X17 = 17,
		858	UNW_RISCV_X18 = 18,
		859	UNW_RISCV_X19 = 19,
		860	UNW_RISCV_X20 = 20,
		861	UNW_RISCV_X21 = 21,
		862	UNW_RISCV_X22 = 22,
		863	UNW_RISCV_X23 = 23,
		864	UNW_RISCV_X24 = 24,
		865	UNW_RISCV_X25 = 25,
		866	UNW_RISCV_X26 = 26,
		867	UNW_RISCV_X27 = 27,
		868	UNW_RISCV_X28 = 28,
		869	UNW_RISCV_X29 = 29,
		870	UNW_RISCV_X30 = 30,
		871	UNW_RISCV_X31 = 31,
		872	UNW_RISCV_F0 = 32,
		873	UNW_RISCV_F1 = 33,
		874	UNW_RISCV_F2 = 34,
		875	UNW_RISCV_F3 = 35,
		876	UNW_RISCV_F4 = 36,
		877	UNW_RISCV_F5 = 37,
		878	UNW_RISCV_F6 = 38,
		879	UNW_RISCV_F7 = 39,
		880	UNW_RISCV_F8 = 40,
		881	UNW_RISCV_F9 = 41,
		882	UNW_RISCV_F10 = 42,
		883	UNW_RISCV_F11 = 43,
		884	UNW_RISCV_F12 = 44,
		885	UNW_RISCV_F13 = 45,
		886	UNW_RISCV_F14 = 46,
		887	UNW_RISCV_F15 = 47,
		888	UNW_RISCV_F16 = 48,
		889	UNW_RISCV_F17 = 49,
		890	UNW_RISCV_F18 = 50,
		891	UNW_RISCV_F19 = 51,
		892	UNW_RISCV_F20 = 52,
		893	UNW_RISCV_F21 = 53,
		894	UNW_RISCV_F22 = 54,
		895	UNW_RISCV_F23 = 55,
		896	UNW_RISCV_F24 = 56,
		897	UNW_RISCV_F25 = 57,
		898	UNW_RISCV_F26 = 58,
		899	UNW_RISCV_F27 = 59,
		900	UNW_RISCV_F28 = 60,
		901	UNW_RISCV_F29 = 61,
		902	UNW_RISCV_F30 = 62,
		903	UNW_RISCV_F31 = 63,
		904	};
		905
835	#endif	906	#endif

lib/libunwind/src/AddressSpace.hpp+42-26

 @@ -27,11 +27,18 @@
 #if _LIBUNWIND_USE_DLADDR
 #include <dlfcn.h>
-#if defined(__unix__) &&  defined(__ELF__) && defined(_LIBUNWIND_HAS_COMMENT_LIB_PRAGMA)
+#if defined(__ELF__) && defined(_LIBUNWIND_LINK_DL_LIB)
 #pragma comment(lib, "dl")
 #endif
 #endif
+#if defined(_LIBUNWIND_ARM_EHABI)
+struct EHABIIndexEntry {
+  uint32_t functionOffset;
+  uint32_t data;
+};
+#endif
 #ifdef __APPLE__
 #include <mach-o/getsect.h>
 namespace libunwind {
 @@ -426,8 +433,12 @@ inline bool LocalAddressSpace::findUnwindSections(pint_t targetAddr,
   HANDLE process = GetCurrentProcess();
   DWORD needed;
-  if (!EnumProcessModules(process, mods, sizeof(mods), &needed))
+  if (!EnumProcessModules(process, mods, sizeof(mods), &needed)) {
+    DWORD err = GetLastError();
+    _LIBUNWIND_TRACE_UNWINDING("findUnwindSections: EnumProcessModules failed, "
+                               "returned error %d", (int)err);
     return false;
+  }
   for (unsigned i = 0; i < (needed / sizeof(HMODULE)); i++) {
     PIMAGE_DOS_HEADER pidh = (PIMAGE_DOS_HEADER)mods[i];
 @@ -462,12 +473,13 @@ inline bool LocalAddressSpace::findUnwindSections(pint_t targetAddr,
   (void)targetAddr;
   (void)info;
   return true;
-#elif defined(_LIBUNWIND_ARM_EHABI) && defined(__BIONIC__) &&                  \
+#elif defined(_LIBUNWIND_ARM_EHABI) && defined(__BIONIC__)
-    (__ANDROID_API__ < 21)
+  // For ARM EHABI, Bionic didn't implement dl_iterate_phdr until API 21. After
+  // API 21, dl_iterate_phdr exists, but dl_unwind_find_exidx is much faster.
   int length = 0;
   info.arm_section =
       (uintptr_t)dl_unwind_find_exidx((_Unwind_Ptr)targetAddr, &length);
-  info.arm_section_length = (uintptr_t)length;
+  info.arm_section_length = (uintptr_t)length * sizeof(EHABIIndexEntry);
   if (info.arm_section && info.arm_section_length)
     return true;
 #elif defined(_LIBUNWIND_ARM_EHABI) || defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 @@ -497,32 +509,40 @@ inline bool LocalAddressSpace::findUnwindSections(pint_t targetAddr,
 #if !defined(Elf_Phdr)
         typedef ElfW(Phdr) Elf_Phdr;
 #endif
-#if !defined(Elf_Addr) && defined(__ANDROID__)
+#if !defined(Elf_Addr)
         typedef ElfW(Addr) Elf_Addr;
 #endif
+        Elf_Addr image_base = pinfo->dlpi_addr;
+#if defined(__ANDROID__) && __ANDROID_API__ < 18
+        if (image_base == 0) {
+          // Normally, an image base of 0 indicates a non-PIE executable. On
+          // versions of Android prior to API 18, the dynamic linker reported a
+          // dlpi_addr of 0 for PIE executables. Compute the true image base
+          // using the PT_PHDR segment.
+          // See https://github.com/android/ndk/issues/505.
+          for (Elf_Half i = 0; i < pinfo->dlpi_phnum; i++) {
+            const Elf_Phdr *phdr = &pinfo->dlpi_phdr[i];
+            if (phdr->p_type == PT_PHDR) {
+              image_base = reinterpret_cast<Elf_Addr>(pinfo->dlpi_phdr) -
+                  phdr->p_vaddr;
+              break;
+            }
+          }
+        }
+#endif
  #if defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
   #if !defined(_LIBUNWIND_SUPPORT_DWARF_INDEX)
    #error "_LIBUNWIND_SUPPORT_DWARF_UNWIND requires _LIBUNWIND_SUPPORT_DWARF_INDEX on this platform."
   #endif
         size_t object_length;
-#if defined(__ANDROID__)
-        Elf_Addr image_base =
-            pinfo->dlpi_phnum
-                ? reinterpret_cast<Elf_Addr>(pinfo->dlpi_phdr) -
-                      reinterpret_cast<const Elf_Phdr *>(pinfo->dlpi_phdr)
-                          ->p_offset
-                : 0;
-#endif
         for (Elf_Half i = 0; i < pinfo->dlpi_phnum; i++) {
           const Elf_Phdr *phdr = &pinfo->dlpi_phdr[i];
           if (phdr->p_type == PT_LOAD) {
-            uintptr_t begin = pinfo->dlpi_addr + phdr->p_vaddr;
+            uintptr_t begin = image_base + phdr->p_vaddr;
-#if defined(__ANDROID__)
-            if (pinfo->dlpi_addr == 0 && phdr->p_vaddr < image_base)
-              begin = begin + image_base;
-#endif
             uintptr_t end = begin + phdr->p_memsz;
             if (cbdata->targetAddr >= begin && cbdata->targetAddr < end) {
               cbdata->sects->dso_base = begin;
 @@ -531,11 +551,7 @@ inline bool LocalAddressSpace::findUnwindSections(pint_t targetAddr,
             }
           } else if (phdr->p_type == PT_GNU_EH_FRAME) {
             EHHeaderParser<LocalAddressSpace>::EHHeaderInfo hdrInfo;
-            uintptr_t eh_frame_hdr_start = pinfo->dlpi_addr + phdr->p_vaddr;
+            uintptr_t eh_frame_hdr_start = image_base + phdr->p_vaddr;
-#if defined(__ANDROID__)
-            if (pinfo->dlpi_addr == 0 && phdr->p_vaddr < image_base)
-              eh_frame_hdr_start = eh_frame_hdr_start + image_base;
-#endif
             cbdata->sects->dwarf_index_section = eh_frame_hdr_start;
             cbdata->sects->dwarf_index_section_length = phdr->p_memsz;
             found_hdr = EHHeaderParser<LocalAddressSpace>::decodeEHHdr(
 @@ -556,12 +572,12 @@ inline bool LocalAddressSpace::findUnwindSections(pint_t targetAddr,
         for (Elf_Half i = 0; i < pinfo->dlpi_phnum; i++) {
           const Elf_Phdr *phdr = &pinfo->dlpi_phdr[i];
           if (phdr->p_type == PT_LOAD) {
-            uintptr_t begin = pinfo->dlpi_addr + phdr->p_vaddr;
+            uintptr_t begin = image_base + phdr->p_vaddr;
             uintptr_t end = begin + phdr->p_memsz;
             if (cbdata->targetAddr >= begin && cbdata->targetAddr < end)
               found_obj = true;
           } else if (phdr->p_type == PT_ARM_EXIDX) {
-            uintptr_t exidx_start = pinfo->dlpi_addr + phdr->p_vaddr;
+            uintptr_t exidx_start = image_base + phdr->p_vaddr;
             cbdata->sects->arm_section = exidx_start;
             cbdata->sects->arm_section_length = phdr->p_memsz;
             found_hdr = true;

lib/libunwind/src/DwarfInstructions.hpp+6-3

...	@@ -34,7 +34,7 @@ public:	...	@@ -34,7 +34,7 @@ public:
34	typedef typename A::sint_t sint_t;	34	typedef typename A::sint_t sint_t;
35		35
36	static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,	36	static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,
37	R &registers);	37	R &registers, bool &isSignalFrame);
38		38
39	private:	39	private:
40		40
...	@@ -150,7 +150,8 @@ v128 DwarfInstructions<A, R>::getSavedVectorRegister(	...	@@ -150,7 +150,8 @@ v128 DwarfInstructions<A, R>::getSavedVectorRegister(
150		150
151	template <typename A, typename R>	151	template <typename A, typename R>
152	int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,	152	int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
153	pint_t fdeStart, R &registers) {	153	pint_t fdeStart, R &registers,
		154	bool &isSignalFrame) {
154	FDE_Info fdeInfo;	155	FDE_Info fdeInfo;
155	CIE_Info cieInfo;	156	CIE_Info cieInfo;
156	if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,	157	if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
...	@@ -196,6 +197,8 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,	...	@@ -196,6 +197,8 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
196	// restoring SP means setting it to CFA.	197	// restoring SP means setting it to CFA.
197	newRegisters.setSP(cfa);	198	newRegisters.setSP(cfa);
198		199
		200	isSignalFrame = cieInfo.isSignalFrame;
		201
199	#if defined(_LIBUNWIND_TARGET_AARCH64)	202	#if defined(_LIBUNWIND_TARGET_AARCH64)
200	// If the target is aarch64 then the return address may have been signed	203	// If the target is aarch64 then the return address may have been signed
201	// using the v8.3 pointer authentication extensions. The original	204	// using the v8.3 pointer authentication extensions. The original
...	@@ -430,7 +433,7 @@ DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,	...	@@ -430,7 +433,7 @@ DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,
430	// pick from	433	// pick from
431	reg = addressSpace.get8(p);	434	reg = addressSpace.get8(p);
432	p += 1;	435	p += 1;
433	value = sp[-reg];	436	value = sp[-(int)reg];
434	*(++sp) = value;	437	*(++sp) = value;
435	if (log)	438	if (log)
436	fprintf(stderr, "duplicate %d in stack\n", reg);	439	fprintf(stderr, "duplicate %d in stack\n", reg);

lib/libunwind/src/RWMutex.hpp+1-1

...	@@ -17,7 +17,7 @@	...	@@ -17,7 +17,7 @@
17	#include <windows.h>	17	#include <windows.h>
18	#elif !defined(_LIBUNWIND_HAS_NO_THREADS)	18	#elif !defined(_LIBUNWIND_HAS_NO_THREADS)
19	#include <pthread.h>	19	#include <pthread.h>
20	#if defined(__unix__) && defined(__ELF__) && defined(_LIBUNWIND_HAS_COMMENT_LIB_PRAGMA)	20	#if defined(__ELF__) && defined(_LIBUNWIND_LINK_PTHREAD_LIB)
21	#pragma comment(lib, "pthread")	21	#pragma comment(lib, "pthread")
22	#endif	22	#endif
23	#endif	23	#endif

lib/libunwind/src/Registers.hpp+265

...	@@ -34,6 +34,7 @@ enum {	...	@@ -34,6 +34,7 @@ enum {
34	REGISTERS_MIPS_O32,	34	REGISTERS_MIPS_O32,
35	REGISTERS_MIPS_NEWABI,	35	REGISTERS_MIPS_NEWABI,
36	REGISTERS_SPARC,	36	REGISTERS_SPARC,
		37	REGISTERS_RISCV,
37	};	38	};
38		39
39	#if defined(_LIBUNWIND_TARGET_I386)	40	#if defined(_LIBUNWIND_TARGET_I386)
...	@@ -3517,6 +3518,270 @@ inline const char *Registers_sparc::getRegisterName(int regNum) {	...	@@ -3517,6 +3518,270 @@ inline const char *Registers_sparc::getRegisterName(int regNum) {
3517	}	3518	}
3518	#endif // _LIBUNWIND_TARGET_SPARC	3519	#endif // _LIBUNWIND_TARGET_SPARC
3519		3520
		3521	#if defined(_LIBUNWIND_TARGET_RISCV)
		3522	/// Registers_riscv holds the register state of a thread in a 64-bit RISC-V
		3523	/// process.
		3524	class _LIBUNWIND_HIDDEN Registers_riscv {
		3525	public:
		3526	Registers_riscv();
		3527	Registers_riscv(const void *registers);
		3528
		3529	bool validRegister(int num) const;
		3530	uint64_t getRegister(int num) const;
		3531	void setRegister(int num, uint64_t value);
		3532	bool validFloatRegister(int num) const;
		3533	double getFloatRegister(int num) const;
		3534	void setFloatRegister(int num, double value);
		3535	bool validVectorRegister(int num) const;
		3536	v128 getVectorRegister(int num) const;
		3537	void setVectorRegister(int num, v128 value);
		3538	static const char *getRegisterName(int num);
		3539	void jumpto();
		3540	static int lastDwarfRegNum() { return _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV; }
		3541	static int getArch() { return REGISTERS_RISCV; }
		3542
		3543	uint64_t getSP() const { return _registers[2]; }
		3544	void setSP(uint64_t value) { _registers[2] = value; }
		3545	uint64_t getIP() const { return _registers[1]; }
		3546	void setIP(uint64_t value) { _registers[1] = value; }
		3547
		3548	private:
		3549
		3550	uint64_t _registers[32];
		3551	double _floats[32];
		3552	};
		3553
		3554	inline Registers_riscv::Registers_riscv(const void *registers) {
		3555	static_assert((check_fit<Registers_riscv, unw_context_t>::does_fit),
		3556	"riscv registers do not fit into unw_context_t");
		3557	memcpy(&_registers, registers, sizeof(_registers));
		3558	static_assert(sizeof(_registers) == 0x100,
		3559	"expected float registers to be at offset 256");
		3560	memcpy(_floats,
		3561	static_cast<const uint8_t *>(registers) + sizeof(_registers),
		3562	sizeof(_floats));
		3563	}
		3564
		3565	inline Registers_riscv::Registers_riscv() {
		3566	memset(&_registers, 0, sizeof(_registers));
		3567	memset(&_floats, 0, sizeof(_floats));
		3568	}
		3569
		3570	inline bool Registers_riscv::validRegister(int regNum) const {
		3571	if (regNum == UNW_REG_IP)
		3572	return true;
		3573	if (regNum == UNW_REG_SP)
		3574	return true;
		3575	if (regNum < 0)
		3576	return false;
		3577	if (regNum > UNW_RISCV_F31)
		3578	return false;
		3579	return true;
		3580	}
		3581
		3582	inline uint64_t Registers_riscv::getRegister(int regNum) const {
		3583	if (regNum == UNW_REG_IP)
		3584	return _registers[1];
		3585	if (regNum == UNW_REG_SP)
		3586	return _registers[2];
		3587	if (regNum == UNW_RISCV_X0)
		3588	return 0;
		3589	if ((regNum > 0) && (regNum < 32))
		3590	return _registers[regNum];
		3591	_LIBUNWIND_ABORT("unsupported riscv register");
		3592	}
		3593
		3594	inline void Registers_riscv::setRegister(int regNum, uint64_t value) {
		3595	if (regNum == UNW_REG_IP)
		3596	_registers[1] = value;
		3597	else if (regNum == UNW_REG_SP)
		3598	_registers[2] = value;
		3599	else if (regNum == UNW_RISCV_X0)
		3600	/* x0 is hardwired to zero */
		3601	return;
		3602	else if ((regNum > 0) && (regNum < 32))
		3603	_registers[regNum] = value;
		3604	else
		3605	_LIBUNWIND_ABORT("unsupported riscv register");
		3606	}
		3607
		3608	inline const char *Registers_riscv::getRegisterName(int regNum) {
		3609	switch (regNum) {
		3610	case UNW_REG_IP:
		3611	return "pc";
		3612	case UNW_REG_SP:
		3613	return "sp";
		3614	case UNW_RISCV_X0:
		3615	return "zero";
		3616	case UNW_RISCV_X1:
		3617	return "ra";
		3618	case UNW_RISCV_X2:
		3619	return "sp";
		3620	case UNW_RISCV_X3:
		3621	return "gp";
		3622	case UNW_RISCV_X4:
		3623	return "tp";
		3624	case UNW_RISCV_X5:
		3625	return "t0";
		3626	case UNW_RISCV_X6:
		3627	return "t1";
		3628	case UNW_RISCV_X7:
		3629	return "t2";
		3630	case UNW_RISCV_X8:
		3631	return "s0";
		3632	case UNW_RISCV_X9:
		3633	return "s1";
		3634	case UNW_RISCV_X10:
		3635	return "a0";
		3636	case UNW_RISCV_X11:
		3637	return "a1";
		3638	case UNW_RISCV_X12:
		3639	return "a2";
		3640	case UNW_RISCV_X13:
		3641	return "a3";
		3642	case UNW_RISCV_X14:
		3643	return "a4";
		3644	case UNW_RISCV_X15:
		3645	return "a5";
		3646	case UNW_RISCV_X16:
		3647	return "a6";
		3648	case UNW_RISCV_X17:
		3649	return "a7";
		3650	case UNW_RISCV_X18:
		3651	return "s2";
		3652	case UNW_RISCV_X19:
		3653	return "s3";
		3654	case UNW_RISCV_X20:
		3655	return "s4";
		3656	case UNW_RISCV_X21:
		3657	return "s5";
		3658	case UNW_RISCV_X22:
		3659	return "s6";
		3660	case UNW_RISCV_X23:
		3661	return "s7";
		3662	case UNW_RISCV_X24:
		3663	return "s8";
		3664	case UNW_RISCV_X25:
		3665	return "s9";
		3666	case UNW_RISCV_X26:
		3667	return "s10";
		3668	case UNW_RISCV_X27:
		3669	return "s11";
		3670	case UNW_RISCV_X28:
		3671	return "t3";
		3672	case UNW_RISCV_X29:
		3673	return "t4";
		3674	case UNW_RISCV_X30:
		3675	return "t5";
		3676	case UNW_RISCV_X31:
		3677	return "t6";
		3678	case UNW_RISCV_F0:
		3679	return "ft0";
		3680	case UNW_RISCV_F1:
		3681	return "ft1";
		3682	case UNW_RISCV_F2:
		3683	return "ft2";
		3684	case UNW_RISCV_F3:
		3685	return "ft3";
		3686	case UNW_RISCV_F4:
		3687	return "ft4";
		3688	case UNW_RISCV_F5:
		3689	return "ft5";
		3690	case UNW_RISCV_F6:
		3691	return "ft6";
		3692	case UNW_RISCV_F7:
		3693	return "ft7";
		3694	case UNW_RISCV_F8:
		3695	return "fs0";
		3696	case UNW_RISCV_F9:
		3697	return "fs1";
		3698	case UNW_RISCV_F10:
		3699	return "fa0";
		3700	case UNW_RISCV_F11:
		3701	return "fa1";
		3702	case UNW_RISCV_F12:
		3703	return "fa2";
		3704	case UNW_RISCV_F13:
		3705	return "fa3";
		3706	case UNW_RISCV_F14:
		3707	return "fa4";
		3708	case UNW_RISCV_F15:
		3709	return "fa5";
		3710	case UNW_RISCV_F16:
		3711	return "fa6";
		3712	case UNW_RISCV_F17:
		3713	return "fa7";
		3714	case UNW_RISCV_F18:
		3715	return "fs2";
		3716	case UNW_RISCV_F19:
		3717	return "fs3";
		3718	case UNW_RISCV_F20:
		3719	return "fs4";
		3720	case UNW_RISCV_F21:
		3721	return "fs5";
		3722	case UNW_RISCV_F22:
		3723	return "fs6";
		3724	case UNW_RISCV_F23:
		3725	return "fs7";
		3726	case UNW_RISCV_F24:
		3727	return "fs8";
		3728	case UNW_RISCV_F25:
		3729	return "fs9";
		3730	case UNW_RISCV_F26:
		3731	return "fs10";
		3732	case UNW_RISCV_F27:
		3733	return "fs11";
		3734	case UNW_RISCV_F28:
		3735	return "ft8";
		3736	case UNW_RISCV_F29:
		3737	return "ft9";
		3738	case UNW_RISCV_F30:
		3739	return "ft10";
		3740	case UNW_RISCV_F31:
		3741	return "ft11";
		3742	default:
		3743	return "unknown register";
		3744	}
		3745	}
		3746
		3747	inline bool Registers_riscv::validFloatRegister(int regNum) const {
		3748	if (regNum < UNW_RISCV_F0)
		3749	return false;
		3750	if (regNum > UNW_RISCV_F31)
		3751	return false;
		3752	return true;
		3753	}
		3754
		3755	inline double Registers_riscv::getFloatRegister(int regNum) const {
		3756	#if defined(__riscv_flen) && __riscv_flen == 64
		3757	assert(validFloatRegister(regNum));
		3758	return _floats[regNum - UNW_RISCV_F0];
		3759	#else
		3760	_LIBUNWIND_ABORT("libunwind not built with float support");
		3761	#endif
		3762	}
		3763
		3764	inline void Registers_riscv::setFloatRegister(int regNum, double value) {
		3765	#if defined(__riscv_flen) && __riscv_flen == 64
		3766	assert(validFloatRegister(regNum));
		3767	_floats[regNum - UNW_RISCV_F0] = value;
		3768	#else
		3769	_LIBUNWIND_ABORT("libunwind not built with float support");
		3770	#endif
		3771	}
		3772
		3773	inline bool Registers_riscv::validVectorRegister(int) const {
		3774	return false;
		3775	}
		3776
		3777	inline v128 Registers_riscv::getVectorRegister(int) const {
		3778	_LIBUNWIND_ABORT("no riscv vector register support yet");
		3779	}
		3780
		3781	inline void Registers_riscv::setVectorRegister(int, v128) {
		3782	_LIBUNWIND_ABORT("no riscv vector register support yet");
		3783	}
		3784	#endif // _LIBUNWIND_TARGET_RISCV
3520	} // namespace libunwind	3785	} // namespace libunwind
3521		3786
3522	#endif // __REGISTERS_HPP__	3787	#endif // __REGISTERS_HPP__

lib/libunwind/src/Unwind-EHABI.cpp+7-2

 @@ -941,8 +941,13 @@ _Unwind_VRS_Pop(_Unwind_Context *context, _Unwind_VRS_RegClass regclass,
       // format 1", which is equivalent to FSTMD + a padding word.
       for (uint32_t i = first; i < end; ++i) {
         // SP is only 32-bit aligned so don't copy 64-bit at a time.
-        uint64_t value = *sp++;
+        uint64_t w0 = *sp++;
-        value |= ((uint64_t)(*sp++)) << 32;
+        uint64_t w1 = *sp++;
+#ifdef __LITTLE_ENDIAN__
+        uint64_t value = (w1 << 32) | w0;
+#else
+        uint64_t value = (w0 << 32) | w1;
+#endif
         if (_Unwind_VRS_Set(context, regclass, i, representation, &value) !=
             _UVRSR_OK)
           return _UVRSR_FAILED;

lib/libunwind/src/UnwindCursor.hpp+23-7

 @@ -929,7 +929,7 @@ private:
     return DwarfInstructions<A, R>::stepWithDwarf(_addressSpace,
                                               (pint_t)this->getReg(UNW_REG_IP),
                                               (pint_t)_info.unwind_info,
-                                              _registers);
+                                              _registers, _isSignalFrame);
   }
 #endif
 @@ -995,6 +995,12 @@ private:
   int stepWithCompactEncoding(Registers_sparc &) { return UNW_EINVAL; }
 #endif
+#if defined (_LIBUNWIND_TARGET_RISCV)
+  int stepWithCompactEncoding(Registers_riscv &) {
+    return UNW_EINVAL;
+  }
+#endif
   bool compactSaysUseDwarf(uint32_t *offset=NULL) const {
     R dummy;
     return compactSaysUseDwarf(dummy, offset);
 @@ -1061,6 +1067,12 @@ private:
   bool compactSaysUseDwarf(Registers_sparc &, uint32_t *) const { return true; }
 #endif
+#if defined (_LIBUNWIND_TARGET_RISCV)
+  bool compactSaysUseDwarf(Registers_riscv &, uint32_t *) const {
+    return true;
+  }
+#endif
 #endif // defined(_LIBUNWIND_SUPPORT_COMPACT_UNWIND)
 #if defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 @@ -1127,6 +1139,12 @@ private:
   compact_unwind_encoding_t dwarfEncoding(Registers_sparc &) const { return 0; }
 #endif
+#if defined (_LIBUNWIND_TARGET_RISCV)
+  compact_unwind_encoding_t dwarfEncoding(Registers_riscv &) const {
+    return 0;
+  }
+#endif
 #endif // defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 #if defined(_LIBUNWIND_SUPPORT_SEH_UNWIND)
 @@ -1222,11 +1240,6 @@ template <typename A, typename R> bool UnwindCursor<A, R>::isSignalFrame() {
 #endif // defined(_LIBUNWIND_SUPPORT_SEH_UNWIND)
 #if defined(_LIBUNWIND_ARM_EHABI)
-struct EHABIIndexEntry {
-  uint32_t functionOffset;
-  uint32_t data;
-};
 template<typename A>
 struct EHABISectionIterator {
   typedef EHABISectionIterator _Self;
 @@ -1991,7 +2004,10 @@ int UnwindCursor<A, R>::step() {
 template <typename A, typename R>
 void UnwindCursor<A, R>::getInfo(unw_proc_info_t *info) {
-  *info = _info;
+  if (_unwindInfoMissing)
+    memset(info, 0, sizeof(*info));
+  else
+    *info = _info;
 }
 template <typename A, typename R>

lib/libunwind/src/UnwindLevel1-gcc-ext.c+8-1

...	@@ -221,7 +221,14 @@ _LIBUNWIND_EXPORT uintptr_t _Unwind_GetCFA(struct _Unwind_Context *context) {	...	@@ -221,7 +221,14 @@ _LIBUNWIND_EXPORT uintptr_t _Unwind_GetCFA(struct _Unwind_Context *context) {
221	_LIBUNWIND_EXPORT uintptr_t _Unwind_GetIPInfo(struct _Unwind_Context *context,	221	_LIBUNWIND_EXPORT uintptr_t _Unwind_GetIPInfo(struct _Unwind_Context *context,
222	int *ipBefore) {	222	int *ipBefore) {
223	_LIBUNWIND_TRACE_API("_Unwind_GetIPInfo(context=%p)", (void *)context);	223	_LIBUNWIND_TRACE_API("_Unwind_GetIPInfo(context=%p)", (void *)context);
224	*ipBefore = 0;	224	int isSignalFrame = __unw_is_signal_frame((unw_cursor_t *)context);
		225	// Negative means some kind of error (probably UNW_ENOINFO), but we have no
		226	// good way to report that, and this maintains backward compatibility with the
		227	// implementation that hard-coded zero in every case, even signal frames.
		228	if (isSignalFrame <= 0)
		229	*ipBefore = 0;
		230	else
		231	*ipBefore = 1;
225	return _Unwind_GetIP(context);	232	return _Unwind_GetIP(context);
226	}	233	}
227		234

lib/libunwind/src/UnwindRegistersRestore.S+81

...	@@ -1029,6 +1029,87 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_sparc6jumptoEv)	...	@@ -1029,6 +1029,87 @@ DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_sparc6jumptoEv)
1029	jmp %o7	1029	jmp %o7
1030	nop	1030	nop
1031		1031
		1032	#elif defined(__riscv) && __riscv_xlen == 64
		1033
		1034	//
		1035	// void libunwind::Registers_riscv::jumpto()
		1036	//
		1037	// On entry:
		1038	// thread_state pointer is in a0
		1039	//
		1040	.p2align 2
		1041	DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv)
		1042	#if defined(__riscv_flen) && __riscv_flen == 64
		1043	fld f0, (8 * 32 + 8 * 0)(a0)
		1044	fld f1, (8 * 32 + 8 * 1)(a0)
		1045	fld f2, (8 * 32 + 8 * 2)(a0)
		1046	fld f3, (8 * 32 + 8 * 3)(a0)
		1047	fld f4, (8 * 32 + 8 * 4)(a0)
		1048	fld f5, (8 * 32 + 8 * 5)(a0)
		1049	fld f6, (8 * 32 + 8 * 6)(a0)
		1050	fld f7, (8 * 32 + 8 * 7)(a0)
		1051	fld f8, (8 * 32 + 8 * 8)(a0)
		1052	fld f9, (8 * 32 + 8 * 9)(a0)
		1053	fld f10, (8 * 32 + 8 * 10)(a0)
		1054	fld f11, (8 * 32 + 8 * 11)(a0)
		1055	fld f12, (8 * 32 + 8 * 12)(a0)
		1056	fld f13, (8 * 32 + 8 * 13)(a0)
		1057	fld f14, (8 * 32 + 8 * 14)(a0)
		1058	fld f15, (8 * 32 + 8 * 15)(a0)
		1059	fld f16, (8 * 32 + 8 * 16)(a0)
		1060	fld f17, (8 * 32 + 8 * 17)(a0)
		1061	fld f18, (8 * 32 + 8 * 18)(a0)
		1062	fld f19, (8 * 32 + 8 * 19)(a0)
		1063	fld f20, (8 * 32 + 8 * 20)(a0)
		1064	fld f21, (8 * 32 + 8 * 21)(a0)
		1065	fld f22, (8 * 32 + 8 * 22)(a0)
		1066	fld f23, (8 * 32 + 8 * 23)(a0)
		1067	fld f24, (8 * 32 + 8 * 24)(a0)
		1068	fld f25, (8 * 32 + 8 * 25)(a0)
		1069	fld f26, (8 * 32 + 8 * 26)(a0)
		1070	fld f27, (8 * 32 + 8 * 27)(a0)
		1071	fld f28, (8 * 32 + 8 * 28)(a0)
		1072	fld f29, (8 * 32 + 8 * 29)(a0)
		1073	fld f30, (8 * 32 + 8 * 30)(a0)
		1074	fld f31, (8 * 32 + 8 * 31)(a0)
		1075	#endif
		1076
		1077	// x0 is zero
		1078	ld x1, (8 * 1)(a0)
		1079	ld x2, (8 * 2)(a0)
		1080	ld x3, (8 * 3)(a0)
		1081	ld x4, (8 * 4)(a0)
		1082	ld x5, (8 * 5)(a0)
		1083	ld x6, (8 * 6)(a0)
		1084	ld x7, (8 * 7)(a0)
		1085	ld x8, (8 * 8)(a0)
		1086	ld x9, (8 * 9)(a0)
		1087	// skip a0 for now
		1088	ld x11, (8 * 11)(a0)
		1089	ld x12, (8 * 12)(a0)
		1090	ld x13, (8 * 13)(a0)
		1091	ld x14, (8 * 14)(a0)
		1092	ld x15, (8 * 15)(a0)
		1093	ld x16, (8 * 16)(a0)
		1094	ld x17, (8 * 17)(a0)
		1095	ld x18, (8 * 18)(a0)
		1096	ld x19, (8 * 19)(a0)
		1097	ld x20, (8 * 20)(a0)
		1098	ld x21, (8 * 21)(a0)
		1099	ld x22, (8 * 22)(a0)
		1100	ld x23, (8 * 23)(a0)
		1101	ld x24, (8 * 24)(a0)
		1102	ld x25, (8 * 25)(a0)
		1103	ld x26, (8 * 26)(a0)
		1104	ld x27, (8 * 27)(a0)
		1105	ld x28, (8 * 28)(a0)
		1106	ld x29, (8 * 29)(a0)
		1107	ld x30, (8 * 30)(a0)
		1108	ld x31, (8 * 31)(a0)
		1109	ld x10, (8 * 10)(a0) // restore a0
		1110
		1111	ret // jump to ra
		1112
1032	#endif	1113	#endif
1033		1114
1034	#endif /* !defined(__USING_SJLJ_EXCEPTIONS__) */	1115	#endif /* !defined(__USING_SJLJ_EXCEPTIONS__) */

lib/libunwind/src/UnwindRegistersSave.S+80

...	@@ -974,6 +974,86 @@ DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)	...	@@ -974,6 +974,86 @@ DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
974	std %i6, [%o0 + 120]	974	std %i6, [%o0 + 120]
975	jmp %o7	975	jmp %o7
976	clr %o0 // return UNW_ESUCCESS	976	clr %o0 // return UNW_ESUCCESS
		977
		978	#elif defined(__riscv) && __riscv_xlen == 64
		979
		980	#
		981	# extern int __unw_getcontext(unw_context_t* thread_state)
		982	#
		983	# On entry:
		984	# thread_state pointer is in a0
		985	#
		986	DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
		987	// x0 is zero
		988	sd x1, (8 * 1)(a0)
		989	sd x2, (8 * 2)(a0)
		990	sd x3, (8 * 3)(a0)
		991	sd x4, (8 * 4)(a0)
		992	sd x5, (8 * 5)(a0)
		993	sd x6, (8 * 6)(a0)
		994	sd x7, (8 * 7)(a0)
		995	sd x8, (8 * 8)(a0)
		996	sd x9, (8 * 9)(a0)
		997	sd x10, (8 * 10)(a0)
		998	sd x11, (8 * 11)(a0)
		999	sd x12, (8 * 12)(a0)
		1000	sd x13, (8 * 13)(a0)
		1001	sd x14, (8 * 14)(a0)
		1002	sd x15, (8 * 15)(a0)
		1003	sd x16, (8 * 16)(a0)
		1004	sd x17, (8 * 17)(a0)
		1005	sd x18, (8 * 18)(a0)
		1006	sd x19, (8 * 19)(a0)
		1007	sd x20, (8 * 20)(a0)
		1008	sd x21, (8 * 21)(a0)
		1009	sd x22, (8 * 22)(a0)
		1010	sd x23, (8 * 23)(a0)
		1011	sd x24, (8 * 24)(a0)
		1012	sd x25, (8 * 25)(a0)
		1013	sd x26, (8 * 26)(a0)
		1014	sd x27, (8 * 27)(a0)
		1015	sd x28, (8 * 28)(a0)
		1016	sd x29, (8 * 29)(a0)
		1017	sd x30, (8 * 30)(a0)
		1018	sd x31, (8 * 31)(a0)
		1019
		1020	#if defined(__riscv_flen) && __riscv_flen == 64
		1021	fsd f0, (8 * 32 + 8 * 0)(a0)
		1022	fsd f1, (8 * 32 + 8 * 1)(a0)
		1023	fsd f2, (8 * 32 + 8 * 2)(a0)
		1024	fsd f3, (8 * 32 + 8 * 3)(a0)
		1025	fsd f4, (8 * 32 + 8 * 4)(a0)
		1026	fsd f5, (8 * 32 + 8 * 5)(a0)
		1027	fsd f6, (8 * 32 + 8 * 6)(a0)
		1028	fsd f7, (8 * 32 + 8 * 7)(a0)
		1029	fsd f8, (8 * 32 + 8 * 8)(a0)
		1030	fsd f9, (8 * 32 + 8 * 9)(a0)
		1031	fsd f10, (8 * 32 + 8 * 10)(a0)
		1032	fsd f11, (8 * 32 + 8 * 11)(a0)
		1033	fsd f12, (8 * 32 + 8 * 12)(a0)
		1034	fsd f13, (8 * 32 + 8 * 13)(a0)
		1035	fsd f14, (8 * 32 + 8 * 14)(a0)
		1036	fsd f15, (8 * 32 + 8 * 15)(a0)
		1037	fsd f16, (8 * 32 + 8 * 16)(a0)
		1038	fsd f17, (8 * 32 + 8 * 17)(a0)
		1039	fsd f18, (8 * 32 + 8 * 18)(a0)
		1040	fsd f19, (8 * 32 + 8 * 19)(a0)
		1041	fsd f20, (8 * 32 + 8 * 20)(a0)
		1042	fsd f21, (8 * 32 + 8 * 21)(a0)
		1043	fsd f22, (8 * 32 + 8 * 22)(a0)
		1044	fsd f23, (8 * 32 + 8 * 23)(a0)
		1045	fsd f24, (8 * 32 + 8 * 24)(a0)
		1046	fsd f25, (8 * 32 + 8 * 25)(a0)
		1047	fsd f26, (8 * 32 + 8 * 26)(a0)
		1048	fsd f27, (8 * 32 + 8 * 27)(a0)
		1049	fsd f28, (8 * 32 + 8 * 28)(a0)
		1050	fsd f29, (8 * 32 + 8 * 29)(a0)
		1051	fsd f30, (8 * 32 + 8 * 30)(a0)
		1052	fsd f31, (8 * 32 + 8 * 31)(a0)
		1053	#endif
		1054
		1055	li a0, 0 // return UNW_ESUCCESS
		1056	ret // jump to ra
977	#endif	1057	#endif
978		1058
979	WEAK_ALIAS(__unw_getcontext, unw_getcontext)	1059	WEAK_ALIAS(__unw_getcontext, unw_getcontext)

lib/libunwind/src/config.h+2-1

...	@@ -103,7 +103,8 @@	...	@@ -103,7 +103,8 @@
103	defined(__ppc__) \|\| defined(__ppc64__) \|\| defined(__powerpc64__) \|\| \	103	defined(__ppc__) \|\| defined(__ppc64__) \|\| defined(__powerpc64__) \|\| \
104	(!defined(__APPLE__) && defined(__arm__)) \|\| \	104	(!defined(__APPLE__) && defined(__arm__)) \|\| \
105	(defined(__arm64__) \|\| defined(__aarch64__)) \|\| \	105	(defined(__arm64__) \|\| defined(__aarch64__)) \|\| \
106	defined(__mips__)	106	defined(__mips__) \|\| \
		107	defined(__riscv)
107	#if !defined(_LIBUNWIND_BUILD_SJLJ_APIS)	108	#if !defined(_LIBUNWIND_BUILD_SJLJ_APIS)
108	#define _LIBUNWIND_BUILD_ZERO_COST_APIS	109	#define _LIBUNWIND_BUILD_ZERO_COST_APIS
109	#endif	110	#endif

lib/libunwind/src/libunwind.cpp+4-4

...	@@ -58,6 +58,8 @@ _LIBUNWIND_HIDDEN int __unw_init_local(unw_cursor_t *cursor,	...	@@ -58,6 +58,8 @@ _LIBUNWIND_HIDDEN int __unw_init_local(unw_cursor_t *cursor,
58	# warning The MIPS architecture is not supported with this ABI and environment!	58	# warning The MIPS architecture is not supported with this ABI and environment!
59	#elif defined(__sparc__)	59	#elif defined(__sparc__)
60	# define REGISTER_KIND Registers_sparc	60	# define REGISTER_KIND Registers_sparc
		61	#elif defined(__riscv) && __riscv_xlen == 64
		62	# define REGISTER_KIND Registers_riscv
61	#else	63	#else
62	# error Architecture not supported	64	# error Architecture not supported
63	#endif	65	#endif
...	@@ -171,8 +173,7 @@ _LIBUNWIND_HIDDEN int __unw_get_proc_info(unw_cursor_t *cursor,	...	@@ -171,8 +173,7 @@ _LIBUNWIND_HIDDEN int __unw_get_proc_info(unw_cursor_t *cursor,
171	co->getInfo(info);	173	co->getInfo(info);
172	if (info->end_ip == 0)	174	if (info->end_ip == 0)
173	return UNW_ENOINFO;	175	return UNW_ENOINFO;
174	else	176	return UNW_ESUCCESS;
175	return UNW_ESUCCESS;
176	}	177	}
177	_LIBUNWIND_WEAK_ALIAS(__unw_get_proc_info, unw_get_proc_info)	178	_LIBUNWIND_WEAK_ALIAS(__unw_get_proc_info, unw_get_proc_info)
178		179
...	@@ -194,8 +195,7 @@ _LIBUNWIND_HIDDEN int __unw_get_proc_name(unw_cursor_t cursor, char buf,	...	@@ -194,8 +195,7 @@ _LIBUNWIND_HIDDEN int __unw_get_proc_name(unw_cursor_t cursor, char buf,
194	AbstractUnwindCursor co = (AbstractUnwindCursor )cursor;	195	AbstractUnwindCursor co = (AbstractUnwindCursor )cursor;
195	if (co->getFunctionName(buf, bufLen, offset))	196	if (co->getFunctionName(buf, bufLen, offset))
196	return UNW_ESUCCESS;	197	return UNW_ESUCCESS;
197	else	198	return UNW_EUNSPEC;
198	return UNW_EUNSPEC;
199	}	199	}
200	_LIBUNWIND_WEAK_ALIAS(__unw_get_proc_name, unw_get_proc_name)	200	_LIBUNWIND_WEAK_ALIAS(__unw_get_proc_name, unw_get_proc_name)
201		201

author	Andrew Kelley <andrew@ziglang.org> 2020-02-14 10:44:23-05:00
committer	Andrew Kelley <andrew@ziglang.org> 2020-02-14 10:44:23-05:00
log	f4317e4387925bfac93a517c1dbd28517740e021
tree	57cef5df38208e6db57e1c4d08c49c907d4c8b64
parent	2289036a40082eb5316e2a46fb2f3a78a8be0c7d
signature	Commit is signed but in an unrecognized format.

update libunwind to llvm10.0.0rc2