| author |  Alex Rønne Petersen <alex@alexrp.com> 2026-07-05 10:36:05+02:00 |
| committer | Alex Rønne Petersen <alex@alexrp.com> 2026-07-05 10:39:03+02:00 |
| log | 02efcc88c15ecd53ba9b6ddd05bf7e5b353c38fe |
| tree | 5353755d8b70a4eab530fcf0844c27234a6f5fa9 |
| parent | 67b05e521603be6bd276f26b30523b03a58cb0e0 |
| signature |  Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM |
musl: mark ctr and xer clobbered in syscalls on powerpc
Backport of musl commit f6944eb3c4ce1c97dc39dc36d32390dc9f70b67b.2 files changed, 14 insertions(+), 14 deletions(-)
lib- libc
- musl
- arch
- powerpc
- powerpc64
lib/libc/musl/arch/powerpc/syscall_arch.h+7-7
| ... | ... | @@ -9,7 +9,7 @@ static inline long __syscall0(long n) |
| 9 | 9 | register long r3 __asm__("r3"); |
| 10 | 10 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 11 | 11 | : "+r"(r0), "=r"(r3) |
| 12 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 12 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 13 | 13 | return r3; |
| 14 | 14 | } |
| 15 | 15 | |
| ... | ... | @@ -19,7 +19,7 @@ static inline long __syscall1(long n, long a) |
| 19 | 19 | register long r3 __asm__("r3") = a; |
| 20 | 20 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 21 | 21 | : "+r"(r0), "+r"(r3) |
| 22 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 22 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 23 | 23 | return r3; |
| 24 | 24 | } |
| 25 | 25 | |
| ... | ... | @@ -30,7 +30,7 @@ static inline long __syscall2(long n, long a, long b) |
| 30 | 30 | register long r4 __asm__("r4") = b; |
| 31 | 31 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 32 | 32 | : "+r"(r0), "+r"(r3), "+r"(r4) |
| 33 | :: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 33 | :: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 34 | 34 | return r3; |
| 35 | 35 | } |
| 36 | 36 | |
| ... | ... | @@ -42,7 +42,7 @@ static inline long __syscall3(long n, long a, long b, long c) |
| 42 | 42 | register long r5 __asm__("r5") = c; |
| 43 | 43 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 44 | 44 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5) |
| 45 | :: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 45 | :: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 46 | 46 | return r3; |
| 47 | 47 | } |
| 48 | 48 | |
| ... | ... | @@ -55,7 +55,7 @@ static inline long __syscall4(long n, long a, long b, long c, long d) |
| 55 | 55 | register long r6 __asm__("r6") = d; |
| 56 | 56 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 57 | 57 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6) |
| 58 | :: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 58 | :: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 59 | 59 | return r3; |
| 60 | 60 | } |
| 61 | 61 | |
| ... | ... | @@ -69,7 +69,7 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e) |
| 69 | 69 | register long r7 __asm__("r7") = e; |
| 70 | 70 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 71 | 71 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7) |
| 72 | :: "memory", "cr0", "r8", "r9", "r10", "r11", "r12"); | |
| 72 | :: "memory", "cr0", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 73 | 73 | return r3; |
| 74 | 74 | } |
| 75 | 75 | |
| ... | ... | @@ -84,7 +84,7 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo |
| 84 | 84 | register long r8 __asm__("r8") = f; |
| 85 | 85 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 86 | 86 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8) |
| 87 | :: "memory", "cr0", "r9", "r10", "r11", "r12"); | |
| 87 | :: "memory", "cr0", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 88 | 88 | return r3; |
| 89 | 89 | } |
| 90 | 90 |
lib/libc/musl/arch/powerpc64/syscall_arch.h+7-7
| ... | ... | @@ -7,7 +7,7 @@ static inline long __syscall0(long n) |
| 7 | 7 | register long r3 __asm__("r3"); |
| 8 | 8 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 9 | 9 | : "+r"(r0), "=r"(r3) |
| 10 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 10 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 11 | 11 | return r3; |
| 12 | 12 | } |
| 13 | 13 | |
| ... | ... | @@ -17,7 +17,7 @@ static inline long __syscall1(long n, long a) |
| 17 | 17 | register long r3 __asm__("r3") = a; |
| 18 | 18 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 19 | 19 | : "+r"(r0), "+r"(r3) |
| 20 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 20 | :: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 21 | 21 | return r3; |
| 22 | 22 | } |
| 23 | 23 | |
| ... | ... | @@ -28,7 +28,7 @@ static inline long __syscall2(long n, long a, long b) |
| 28 | 28 | register long r4 __asm__("r4") = b; |
| 29 | 29 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 30 | 30 | : "+r"(r0), "+r"(r3), "+r"(r4) |
| 31 | :: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 31 | :: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 32 | 32 | return r3; |
| 33 | 33 | } |
| 34 | 34 | |
| ... | ... | @@ -40,7 +40,7 @@ static inline long __syscall3(long n, long a, long b, long c) |
| 40 | 40 | register long r5 __asm__("r5") = c; |
| 41 | 41 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 42 | 42 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5) |
| 43 | :: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 43 | :: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 44 | 44 | return r3; |
| 45 | 45 | } |
| 46 | 46 | |
| ... | ... | @@ -53,7 +53,7 @@ static inline long __syscall4(long n, long a, long b, long c, long d) |
| 53 | 53 | register long r6 __asm__("r6") = d; |
| 54 | 54 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 55 | 55 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6) |
| 56 | :: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12"); | |
| 56 | :: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 57 | 57 | return r3; |
| 58 | 58 | } |
| 59 | 59 | |
| ... | ... | @@ -67,7 +67,7 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e) |
| 67 | 67 | register long r7 __asm__("r7") = e; |
| 68 | 68 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 69 | 69 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7) |
| 70 | :: "memory", "cr0", "r8", "r9", "r10", "r11", "r12"); | |
| 70 | :: "memory", "cr0", "r8", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 71 | 71 | return r3; |
| 72 | 72 | } |
| 73 | 73 | |
| ... | ... | @@ -82,7 +82,7 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo |
| 82 | 82 | register long r8 __asm__("r8") = f; |
| 83 | 83 | __asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:" |
| 84 | 84 | : "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8) |
| 85 | :: "memory", "cr0", "r9", "r10", "r11", "r12"); | |
| 85 | :: "memory", "cr0", "r9", "r10", "r11", "r12", "ctr", "xer"); | |
| 86 | 86 | return r3; |
| 87 | 87 | } |
| 88 | 88 |