authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2025-10-03 06:47:37-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2025-10-03 12:18:53-04:00
log07c3f9ef8e0a5a557dce70322334b0d1b49fe154
treecad27d4e914e9c4ef2f516731121f1bc1bc0ae65
parent12ed0ff1efa71d11f6220d9cf94202b888e177fc

x86_64: fix bool vector init register clobber

Closes #25439

2 files changed, 41 insertions(+), 9 deletions(-)

src/codegen/x86_64/CodeGen.zig+2
...@@ -181543,6 +181543,8 @@ fn airAggregateInit(self: *CodeGen, inst: Air.Inst.Index) !void {...@@ -181543,6 +181543,8 @@ fn airAggregateInit(self: *CodeGen, inst: Air.Inst.Index) !void {
181543 );181543 );
181544 const result_size: u32 = @intCast(result_ty.abiSize(zcu));181544 const result_size: u32 = @intCast(result_ty.abiSize(zcu));
181545 const dst_reg = try self.register_manager.allocReg(inst, abi.RegisterClass.gp);181545 const dst_reg = try self.register_manager.allocReg(inst, abi.RegisterClass.gp);
181546 const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
181547 defer self.register_manager.unlockReg(dst_lock);
181546 try self.asmRegisterRegister(181548 try self.asmRegisterRegister(
181547 .{ ._, .xor },181549 .{ ._, .xor },
181548 registerAlias(dst_reg, @min(result_size, 4)),181550 registerAlias(dst_reg, @min(result_size, 4)),
test/behavior/vector.zig+39-9
...@@ -7,16 +7,46 @@ const expect = std.testing.expect;...@@ -7,16 +7,46 @@ const expect = std.testing.expect;
7const expectEqual = std.testing.expectEqual;7const expectEqual = std.testing.expectEqual;
88
9test "implicit cast vector to array - bool" {9test "implicit cast vector to array - bool" {
10 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO10 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
11 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO11 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
12 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO12
13 if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;13 const S = struct {
14 fn doTheTest() !void {
15 {
16 var v: @Vector(4, bool) = undefined;
17 v = .{ true, false, true, false };
18 const a: [4]bool = v;
19 try expect(mem.eql(bool, &a, &.{ true, false, true, false }));
20 }
21 {
22 var v: @Vector(25, bool) = undefined;
23 v = .{ false, false, false, false, true, true, false, false, false, true, false, true, false, false, true, false, false, true, false, false, true, true, true, false, false };
24 const a: [25]bool = v;
25 try expect(mem.eql(bool, &a, &.{ false, false, false, false, true, true, false, false, false, true, false, true, false, false, true, false, false, true, false, false, true, true, true, false, false }));
26 }
27 }
28 };
29 try S.doTheTest();
30 try comptime S.doTheTest();
31}
32
33test "implicit cast array to vector - bool" {
34 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
1435
15 const S = struct {36 const S = struct {
16 fn doTheTest() !void {37 fn doTheTest() !void {
17 const a: @Vector(4, bool) = [_]bool{ true, false, true, false };38 {
18 const result_array: [4]bool = a;39 var a: [4]bool = undefined;
19 try expect(mem.eql(bool, &result_array, &[4]bool{ true, false, true, false }));40 a = .{ true, false, false, true };
41 const v: @Vector(4, bool) = a;
42 try expect(mem.eql(bool, &@as([4]bool, v), &.{ true, false, false, true }));
43 }
44 {
45 var a: [25]bool = undefined;
46 a = .{ true, false, false, true, false, false, false, false, false, true, true, true, true, false, false, false, false, true, false, false, false, true, true, true, false };
47 const v: @Vector(25, bool) = a;
48 try expect(mem.eql(bool, &@as([25]bool, v), &.{ true, false, false, true, false, false, false, false, false, true, true, true, true, false, false, false, false, true, false, false, false, true, true, true, false }));
49 }
20 }50 }
21 };51 };
22 try S.doTheTest();52 try S.doTheTest();
...@@ -606,7 +636,7 @@ test "vector bitwise not operator" {...@@ -606,7 +636,7 @@ test "vector bitwise not operator" {
606 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO636 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
607 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;637 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
608638
609 if (builtin.cpu.arch == .aarch64_be) {639 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) {
610 // https://github.com/ziglang/zig/issues/24061640 // https://github.com/ziglang/zig/issues/24061
611 return error.SkipZigTest;641 return error.SkipZigTest;
612 }642 }
...@@ -645,7 +675,7 @@ test "vector boolean not operator" {...@@ -645,7 +675,7 @@ test "vector boolean not operator" {
645 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO675 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
646 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;676 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
647677
648 if (builtin.cpu.arch == .aarch64_be) {678 if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) {
649 // https://github.com/ziglang/zig/issues/24061679 // https://github.com/ziglang/zig/issues/24061
650 return error.SkipZigTest;680 return error.SkipZigTest;
651 }681 }