authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-02-20 18:31:17-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-02-20 18:31:17-05:00
log0f016b368de2ac93a298ab771646931329062fb5
treea605eb2971c749b1dd983c3cec16c25fedb96ab2
parent33c69d5cb6fd555e164dd92e5b9dcfac37d82672
signaturelock-open Commit is signed but in an unrecognized format.

support -mcpu=baseline, both in stage1 and stage2

See e381a42de9c0f0c5439a926b0ac99026a0373f49 for more details. This is set up so that if we wish to make "baseline" depend on the OS in the future, it is possible to do that.

6 files changed, 44 insertions(+), 33 deletions(-)

lib/std/target.zig+18-14
......@@ -726,8 +726,7 @@ pub const Target = union(enum) {
726726 /// Looks like "name+a+b-c-d+e", where "name" is a CPU Model name, "a", "b", and "e"
727727 /// are examples of CPU features to add to the set, and "c" and "d" are examples of CPU features
728728 /// to remove from the set.
729 /// The default value of `null` means to use the "baseline" feature set.
730 cpu: ?[]const u8 = null,
729 cpu_features: []const u8 = "baseline",
731730 };
732731
733732 pub fn parse(args: ParseOptions) !Target {
......@@ -742,23 +741,29 @@ pub const Target = union(enum) {
742741 const abi = if (abi_name) |n| try Abi.parse(n) else Abi.default(arch, os);
743742
744743 const all_features = arch.allFeaturesList();
745 const cpu: Cpu = if (args.cpu) |cpu_text| blk: {
746 var index: usize = 0;
747 while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') {
748 index += 1;
749 }
750 const cpu_name = cpu_text[0..index];
744 var index: usize = 0;
745 while (index < args.cpu_features.len and
746 args.cpu_features[index] != '+' and
747 args.cpu_features[index] != '-')
748 {
749 index += 1;
750 }
751 const cpu_name = args.cpu_features[0..index];
752 const cpu: Cpu = if (mem.eql(u8, cpu_name, "baseline")) Cpu.baseline(arch) else blk: {
751753 const cpu_model = try arch.parseCpuModel(cpu_name);
752754
753755 var set = cpu_model.features;
754 while (index < cpu_text.len) {
755 const op = cpu_text[index];
756 while (index < args.cpu_features.len) {
757 const op = args.cpu_features[index];
756758 index += 1;
757759 const start = index;
758 while (index < cpu_text.len and cpu_text[index] != '+' and cpu_text[index] != '-') {
760 while (index < args.cpu_features.len and
761 args.cpu_features[index] != '+' and
762 args.cpu_features[index] != '-')
763 {
759764 index += 1;
760765 }
761 const feature_name = cpu_text[start..index];
766 const feature_name = args.cpu_features[start..index];
762767 for (all_features) |feature, feat_index_usize| {
763768 const feat_index = @intCast(Cpu.Feature.Set.Index, feat_index_usize);
764769 if (mem.eql(u8, feature_name, feature.name)) {
......@@ -779,8 +784,7 @@ pub const Target = union(enum) {
779784 .model = cpu_model,
780785 .features = set,
781786 };
782 } else Cpu.baseline(arch);
783
787 };
784788 var cross = Cross{
785789 .cpu = cpu,
786790 .os = os,
src-self-hosted/stage2.zig+2-2
......@@ -675,8 +675,8 @@ fn stage2TargetParse(
675675) !void {
676676 const target: Target = if (zig_triple_oz) |zig_triple_z| blk: {
677677 const zig_triple = mem.toSliceConst(u8, zig_triple_z);
678 const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else null;
679 break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu = mcpu });
678 const mcpu = if (mcpu_oz) |mcpu_z| mem.toSliceConst(u8, mcpu_z) else "baseline";
679 break :blk try Target.parse(.{ .arch_os_abi = zig_triple, .cpu_features = mcpu });
680680 } else Target.Native;
681681
682682 try stage1_target.fromTarget(target);
src/stage2.cpp+18-9
......@@ -97,10 +97,20 @@ Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, cons
9797 if (zig_triple == nullptr) {
9898 get_native_target(target);
9999
100 target->llvm_cpu_name = ZigLLVMGetHostCPUName();
101 target->llvm_cpu_features = ZigLLVMGetNativeFeatures();
102 target->builtin_str = "Target.Cpu.baseline(arch);\n";
103 target->cache_hash = "native\n\n";
100 if (mcpu == nullptr) {
101 target->llvm_cpu_name = ZigLLVMGetHostCPUName();
102 target->llvm_cpu_features = ZigLLVMGetNativeFeatures();
103 target->builtin_str = "Target.Cpu.baseline(arch);\n";
104 target->cache_hash = "native\n\n";
105 } else if (strcmp(mcpu, "baseline") == 0) {
106 target->llvm_cpu_name = "";
107 target->llvm_cpu_features = "";
108 target->builtin_str = "Target.Cpu.baseline(arch);\n";
109 target->cache_hash = "baseline\n\n";
110 } else {
111 const char *msg = "stage0 can't handle CPU/features in the target";
112 stage2_panic(msg, strlen(msg));
113 }
104114 } else {
105115 // first initialize all to zero
106116 *target = {};
......@@ -135,15 +145,14 @@ Error stage2_target_parse(struct ZigTarget *target, const char *zig_triple, cons
135145 target->abi = target_default_abi(target->arch, target->os);
136146 }
137147
148 if (mcpu != nullptr && strcmp(mcpu, "baseline") != 0) {
149 const char *msg = "stage0 can't handle CPU/features in the target";
150 stage2_panic(msg, strlen(msg));
151 }
138152 target->builtin_str = "Target.Cpu.baseline(arch);\n";
139153 target->cache_hash = "\n\n";
140154 }
141155
142 if (mcpu != nullptr) {
143 const char *msg = "stage0 can't handle CPU/features in the target";
144 stage2_panic(msg, strlen(msg));
145 }
146
147156 return ErrorNone;
148157}
149158
test/compile_errors.zig+1-2
......@@ -350,8 +350,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
350350 });
351351 tc.target = Target{
352352 .Cross = .{
353 .arch = .wasm32,
354 .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
353 .cpu = Target.Cpu.baseline(.wasm32),
355354 .os = .wasi,
356355 .abi = .none,
357356 },
test/tests.zig+4-4
......@@ -135,13 +135,13 @@ const test_targets = blk: {
135135 TestTarget{
136136 .target = Target.parse(.{
137137 .arch_os_abi = "arm-linux-none",
138 .cpu = "generic+v8a",
138 .cpu_features = "generic+v8a",
139139 }) catch unreachable,
140140 },
141141 TestTarget{
142142 .target = Target.parse(.{
143143 .arch_os_abi = "arm-linux-musleabihf",
144 .cpu = "generic+v8a",
144 .cpu_features = "generic+v8a",
145145 }) catch unreachable,
146146 .link_libc = true,
147147 },
......@@ -149,7 +149,7 @@ const test_targets = blk: {
149149 //TestTarget{
150150 // .target = Target.parse(.{
151151 // .arch_os_abi = "arm-linux-gnueabihf",
152 // .cpu = "generic+v8a",
152 // .cpu_features = "generic+v8a",
153153 // }) catch unreachable,
154154 // .link_libc = true,
155155 //},
......@@ -449,7 +449,7 @@ pub fn addPkgTests(
449449 const ArchTag = @TagType(builtin.Arch);
450450 if (test_target.disable_native and
451451 test_target.target.getOs() == builtin.os and
452 @as(ArchTag, test_target.target.getArch()) == @as(ArchTag, builtin.arch))
452 test_target.target.getArch() == builtin.arch)
453453 {
454454 continue;
455455 }
test/translate_c.zig+1-2
......@@ -1095,10 +1095,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10951095
10961096 cases.addWithTarget("Calling convention", tests.Target{
10971097 .Cross = .{
1098 .cpu = Target.Cpu.baseline(.i386),
10981099 .os = .linux,
1099 .arch = .i386,
11001100 .abi = .none,
1101 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
11021101 },
11031102 },
11041103 \\void __attribute__((fastcall)) foo1(float *a);