authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-12-05 17:48:54+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-12-05 22:35:07+01:00
log12e34e70377882363dbedf2a7afdc8737a7435c5
treec3e01b1a26a83062425af5fabaef8c0fc92092cf
parent97827d6d38ecd078fbbcff3d71a7e104341695cd

dwarf: pull out debug line program internals into DeclState helpers

7 files changed, 56 insertions(+), 97 deletions(-)

src/arch/aarch64/Emit.zig+3-17
...@@ -10,8 +10,6 @@ const link = @import("../../link.zig");...@@ -10,8 +10,6 @@ const link = @import("../../link.zig");
10const Module = @import("../../Module.zig");10const Module = @import("../../Module.zig");
11const ErrorMsg = Module.ErrorMsg;11const ErrorMsg = Module.ErrorMsg;
12const assert = std.debug.assert;12const assert = std.debug.assert;
13const DW = std.dwarf;
14const leb128 = std.leb;
15const Instruction = bits.Instruction;13const Instruction = bits.Instruction;
16const Register = bits.Register;14const Register = bits.Register;
17const log = std.log.scoped(.aarch64_emit);15const log = std.log.scoped(.aarch64_emit);
...@@ -440,19 +438,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {...@@ -440,19 +438,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
440 const delta_pc: usize = self.code.items.len - self.prev_di_pc;438 const delta_pc: usize = self.code.items.len - self.prev_di_pc;
441 switch (self.debug_output) {439 switch (self.debug_output) {
442 .dwarf => |dw| {440 .dwarf => |dw| {
443 // TODO Look into using the DWARF special opcodes to compress this data.441 try dw.advancePCAndLine(delta_line, delta_pc);
444 // It lets you emit single-byte opcodes that add different numbers to
445 // both the PC and the line number at the same time.
446 const dbg_line = &dw.dbg_line;
447 try dbg_line.ensureUnusedCapacity(11);
448 dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
449 leb128.writeULEB128(dbg_line.writer(), delta_pc) catch unreachable;
450 if (delta_line != 0) {
451 dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
452 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
453 }
454 dbg_line.appendAssumeCapacity(DW.LNS.copy);
455 self.prev_di_pc = self.code.items.len;
456 self.prev_di_line = line;442 self.prev_di_line = line;
457 self.prev_di_column = column;443 self.prev_di_column = column;
458 self.prev_di_pc = self.code.items.len;444 self.prev_di_pc = self.code.items.len;
...@@ -652,7 +638,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -652,7 +638,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
652fn mirDebugPrologueEnd(self: *Emit) !void {638fn mirDebugPrologueEnd(self: *Emit) !void {
653 switch (self.debug_output) {639 switch (self.debug_output) {
654 .dwarf => |dw| {640 .dwarf => |dw| {
655 try dw.dbg_line.append(DW.LNS.set_prologue_end);641 try dw.setPrologueEnd();
656 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);642 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
657 },643 },
658 .plan9 => {},644 .plan9 => {},
...@@ -663,7 +649,7 @@ fn mirDebugPrologueEnd(self: *Emit) !void {...@@ -663,7 +649,7 @@ fn mirDebugPrologueEnd(self: *Emit) !void {
663fn mirDebugEpilogueBegin(self: *Emit) !void {649fn mirDebugEpilogueBegin(self: *Emit) !void {
664 switch (self.debug_output) {650 switch (self.debug_output) {
665 .dwarf => |dw| {651 .dwarf => |dw| {
666 try dw.dbg_line.append(DW.LNS.set_epilogue_begin);652 try dw.setEpilogueBegin();
667 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);653 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
668 },654 },
669 .plan9 => {},655 .plan9 => {},
src/arch/arm/Emit.zig+3-17
...@@ -13,8 +13,6 @@ const Type = @import("../../type.zig").Type;...@@ -13,8 +13,6 @@ const Type = @import("../../type.zig").Type;
13const ErrorMsg = Module.ErrorMsg;13const ErrorMsg = Module.ErrorMsg;
14const Target = std.Target;14const Target = std.Target;
15const assert = std.debug.assert;15const assert = std.debug.assert;
16const DW = std.dwarf;
17const leb128 = std.leb;
18const Instruction = bits.Instruction;16const Instruction = bits.Instruction;
19const Register = bits.Register;17const Register = bits.Register;
20const log = std.log.scoped(.aarch64_emit);18const log = std.log.scoped(.aarch64_emit);
...@@ -356,19 +354,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {...@@ -356,19 +354,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
356 const delta_pc: usize = self.code.items.len - self.prev_di_pc;354 const delta_pc: usize = self.code.items.len - self.prev_di_pc;
357 switch (self.debug_output) {355 switch (self.debug_output) {
358 .dwarf => |dw| {356 .dwarf => |dw| {
359 // TODO Look into using the DWARF special opcodes to compress this data.357 try dw.advancePCAndLine(delta_line, delta_pc);
360 // It lets you emit single-byte opcodes that add different numbers to
361 // both the PC and the line number at the same time.
362 const dbg_line = &dw.dbg_line;
363 try dbg_line.ensureUnusedCapacity(11);
364 dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
365 leb128.writeULEB128(dbg_line.writer(), delta_pc) catch unreachable;
366 if (delta_line != 0) {
367 dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
368 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
369 }
370 dbg_line.appendAssumeCapacity(DW.LNS.copy);
371 self.prev_di_pc = self.code.items.len;
372 self.prev_di_line = line;358 self.prev_di_line = line;
373 self.prev_di_column = column;359 self.prev_di_column = column;
374 self.prev_di_pc = self.code.items.len;360 self.prev_di_pc = self.code.items.len;
...@@ -543,7 +529,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -543,7 +529,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
543fn mirDebugPrologueEnd(emit: *Emit) !void {529fn mirDebugPrologueEnd(emit: *Emit) !void {
544 switch (emit.debug_output) {530 switch (emit.debug_output) {
545 .dwarf => |dw| {531 .dwarf => |dw| {
546 try dw.dbg_line.append(DW.LNS.set_prologue_end);532 try dw.setPrologueEnd();
547 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);533 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
548 },534 },
549 .plan9 => {},535 .plan9 => {},
...@@ -554,7 +540,7 @@ fn mirDebugPrologueEnd(emit: *Emit) !void {...@@ -554,7 +540,7 @@ fn mirDebugPrologueEnd(emit: *Emit) !void {
554fn mirDebugEpilogueBegin(emit: *Emit) !void {540fn mirDebugEpilogueBegin(emit: *Emit) !void {
555 switch (emit.debug_output) {541 switch (emit.debug_output) {
556 .dwarf => |dw| {542 .dwarf => |dw| {
557 try dw.dbg_line.append(DW.LNS.set_epilogue_begin);543 try dw.setEpilogueBegin();
558 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);544 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
559 },545 },
560 .plan9 => {},546 .plan9 => {},
src/arch/riscv64/Emit.zig+3-17
...@@ -10,8 +10,6 @@ const link = @import("../../link.zig");...@@ -10,8 +10,6 @@ const link = @import("../../link.zig");
10const Module = @import("../../Module.zig");10const Module = @import("../../Module.zig");
11const ErrorMsg = Module.ErrorMsg;11const ErrorMsg = Module.ErrorMsg;
12const assert = std.debug.assert;12const assert = std.debug.assert;
13const DW = std.dwarf;
14const leb128 = std.leb;
15const Instruction = bits.Instruction;13const Instruction = bits.Instruction;
16const Register = bits.Register;14const Register = bits.Register;
17const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;15const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
...@@ -90,19 +88,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {...@@ -90,19 +88,7 @@ fn dbgAdvancePCAndLine(self: *Emit, line: u32, column: u32) !void {
90 const delta_pc: usize = self.code.items.len - self.prev_di_pc;88 const delta_pc: usize = self.code.items.len - self.prev_di_pc;
91 switch (self.debug_output) {89 switch (self.debug_output) {
92 .dwarf => |dw| {90 .dwarf => |dw| {
93 // TODO Look into using the DWARF special opcodes to compress this data.91 try dw.advancePCAndLine(delta_line, delta_pc);
94 // It lets you emit single-byte opcodes that add different numbers to
95 // both the PC and the line number at the same time.
96 const dbg_line = &dw.dbg_line;
97 try dbg_line.ensureUnusedCapacity(11);
98 dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
99 leb128.writeULEB128(dbg_line.writer(), delta_pc) catch unreachable;
100 if (delta_line != 0) {
101 dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
102 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
103 }
104 dbg_line.appendAssumeCapacity(DW.LNS.copy);
105 self.prev_di_pc = self.code.items.len;
106 self.prev_di_line = line;92 self.prev_di_line = line;
107 self.prev_di_column = column;93 self.prev_di_column = column;
108 self.prev_di_pc = self.code.items.len;94 self.prev_di_pc = self.code.items.len;
...@@ -184,7 +170,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -184,7 +170,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
184fn mirDebugPrologueEnd(self: *Emit) !void {170fn mirDebugPrologueEnd(self: *Emit) !void {
185 switch (self.debug_output) {171 switch (self.debug_output) {
186 .dwarf => |dw| {172 .dwarf => |dw| {
187 try dw.dbg_line.append(DW.LNS.set_prologue_end);173 try dw.setPrologueEnd();
188 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);174 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
189 },175 },
190 .plan9 => {},176 .plan9 => {},
...@@ -195,7 +181,7 @@ fn mirDebugPrologueEnd(self: *Emit) !void {...@@ -195,7 +181,7 @@ fn mirDebugPrologueEnd(self: *Emit) !void {
195fn mirDebugEpilogueBegin(self: *Emit) !void {181fn mirDebugEpilogueBegin(self: *Emit) !void {
196 switch (self.debug_output) {182 switch (self.debug_output) {
197 .dwarf => |dw| {183 .dwarf => |dw| {
198 try dw.dbg_line.append(DW.LNS.set_epilogue_begin);184 try dw.setEpilogueBegin();
199 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);185 try self.dbgAdvancePCAndLine(self.prev_di_line, self.prev_di_column);
200 },186 },
201 .plan9 => {},187 .plan9 => {},
src/arch/sparc64/Emit.zig+3-16
...@@ -10,8 +10,6 @@ const ErrorMsg = Module.ErrorMsg;...@@ -10,8 +10,6 @@ const ErrorMsg = Module.ErrorMsg;
10const Liveness = @import("../../Liveness.zig");10const Liveness = @import("../../Liveness.zig");
11const log = std.log.scoped(.sparcv9_emit);11const log = std.log.scoped(.sparcv9_emit);
12const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;12const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
13const DW = std.dwarf;
14const leb128 = std.leb;
1513
16const Emit = @This();14const Emit = @This();
17const Mir = @import("Mir.zig");15const Mir = @import("Mir.zig");
...@@ -168,7 +166,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -168,7 +166,7 @@ fn mirDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
168fn mirDebugPrologueEnd(emit: *Emit) !void {166fn mirDebugPrologueEnd(emit: *Emit) !void {
169 switch (emit.debug_output) {167 switch (emit.debug_output) {
170 .dwarf => |dbg_out| {168 .dwarf => |dbg_out| {
171 try dbg_out.dbg_line.append(DW.LNS.set_prologue_end);169 try dbg_out.setPrologueEnd();
172 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);170 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
173 },171 },
174 .plan9 => {},172 .plan9 => {},
...@@ -179,7 +177,7 @@ fn mirDebugPrologueEnd(emit: *Emit) !void {...@@ -179,7 +177,7 @@ fn mirDebugPrologueEnd(emit: *Emit) !void {
179fn mirDebugEpilogueBegin(emit: *Emit) !void {177fn mirDebugEpilogueBegin(emit: *Emit) !void {
180 switch (emit.debug_output) {178 switch (emit.debug_output) {
181 .dwarf => |dbg_out| {179 .dwarf => |dbg_out| {
182 try dbg_out.dbg_line.append(DW.LNS.set_epilogue_begin);180 try dbg_out.setEpilogueBegin();
183 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);181 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
184 },182 },
185 .plan9 => {},183 .plan9 => {},
...@@ -468,18 +466,7 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {...@@ -468,18 +466,7 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {
468 const delta_pc: usize = emit.code.items.len - emit.prev_di_pc;466 const delta_pc: usize = emit.code.items.len - emit.prev_di_pc;
469 switch (emit.debug_output) {467 switch (emit.debug_output) {
470 .dwarf => |dbg_out| {468 .dwarf => |dbg_out| {
471 // TODO Look into using the DWARF special opcodes to compress this data.469 try dbg_out.advancePCAndLine(delta_line, delta_pc);
472 // It lets you emit single-byte opcodes that add different numbers to
473 // both the PC and the line number at the same time.
474 try dbg_out.dbg_line.ensureUnusedCapacity(11);
475 dbg_out.dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
476 leb128.writeULEB128(dbg_out.dbg_line.writer(), delta_pc) catch unreachable;
477 if (delta_line != 0) {
478 dbg_out.dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
479 leb128.writeILEB128(dbg_out.dbg_line.writer(), delta_line) catch unreachable;
480 }
481 dbg_out.dbg_line.appendAssumeCapacity(DW.LNS.copy);
482 emit.prev_di_pc = emit.code.items.len;
483 emit.prev_di_line = line;470 emit.prev_di_line = line;
484 emit.prev_di_column = column;471 emit.prev_di_column = column;
485 emit.prev_di_pc = emit.code.items.len;472 emit.prev_di_pc = emit.code.items.len;
src/arch/wasm/Emit.zig+6-12
...@@ -444,18 +444,12 @@ fn emitDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {...@@ -444,18 +444,12 @@ fn emitDbgLine(emit: *Emit, inst: Mir.Inst.Index) !void {
444fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {444fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {
445 if (emit.dbg_output != .dwarf) return;445 if (emit.dbg_output != .dwarf) return;
446446
447 const dbg_line = &emit.dbg_output.dwarf.dbg_line;447 const delta_line = @intCast(i32, line) - @intCast(i32, emit.prev_di_line);
448 try dbg_line.ensureUnusedCapacity(11);448 const delta_pc = emit.offset() - emit.prev_di_offset;
449 dbg_line.appendAssumeCapacity(std.dwarf.LNS.advance_pc);
450 // TODO: This must emit a relocation to calculate the offset relative449 // TODO: This must emit a relocation to calculate the offset relative
451 // to the code section start.450 // to the code section start.
452 leb128.writeULEB128(dbg_line.writer(), emit.offset() - emit.prev_di_offset) catch unreachable;451 try emit.dbg_output.dwarf.advancePCAndLine(delta_line, delta_pc);
453 const delta_line = @intCast(i32, line) - @intCast(i32, emit.prev_di_line);452
454 if (delta_line != 0) {
455 dbg_line.appendAssumeCapacity(std.dwarf.LNS.advance_line);
456 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
457 }
458 dbg_line.appendAssumeCapacity(std.dwarf.LNS.copy);
459 emit.prev_di_line = line;453 emit.prev_di_line = line;
460 emit.prev_di_column = column;454 emit.prev_di_column = column;
461 emit.prev_di_offset = emit.offset();455 emit.prev_di_offset = emit.offset();
...@@ -464,13 +458,13 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {...@@ -464,13 +458,13 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) !void {
464fn emitDbgPrologueEnd(emit: *Emit) !void {458fn emitDbgPrologueEnd(emit: *Emit) !void {
465 if (emit.dbg_output != .dwarf) return;459 if (emit.dbg_output != .dwarf) return;
466460
467 try emit.dbg_output.dwarf.dbg_line.append(std.dwarf.LNS.set_prologue_end);461 try emit.dbg_output.dwarf.setPrologueEnd();
468 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);462 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
469}463}
470464
471fn emitDbgEpilogueBegin(emit: *Emit) !void {465fn emitDbgEpilogueBegin(emit: *Emit) !void {
472 if (emit.dbg_output != .dwarf) return;466 if (emit.dbg_output != .dwarf) return;
473467
474 try emit.dbg_output.dwarf.dbg_line.append(std.dwarf.LNS.set_epilogue_begin);468 try emit.dbg_output.dwarf.setEpilogueBegin();
475 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);469 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
476}470}
src/arch/x86_64/Emit.zig+11-18
...@@ -7,7 +7,6 @@ const std = @import("std");...@@ -7,7 +7,6 @@ const std = @import("std");
7const assert = std.debug.assert;7const assert = std.debug.assert;
8const bits = @import("bits.zig");8const bits = @import("bits.zig");
9const abi = @import("abi.zig");9const abi = @import("abi.zig");
10const leb128 = std.leb;
11const link = @import("../../link.zig");10const link = @import("../../link.zig");
12const log = std.log.scoped(.codegen);11const log = std.log.scoped(.codegen);
13const math = std.math;12const math = std.math;
...@@ -18,7 +17,6 @@ const Air = @import("../../Air.zig");...@@ -18,7 +17,6 @@ const Air = @import("../../Air.zig");
18const Allocator = mem.Allocator;17const Allocator = mem.Allocator;
19const CodeGen = @import("CodeGen.zig");18const CodeGen = @import("CodeGen.zig");
20const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;19const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
21const DW = std.dwarf;
22const Encoder = bits.Encoder;20const Encoder = bits.Encoder;
23const ErrorMsg = Module.ErrorMsg;21const ErrorMsg = Module.ErrorMsg;
24const MCValue = @import("CodeGen.zig").MCValue;22const MCValue = @import("CodeGen.zig").MCValue;
...@@ -1184,18 +1182,7 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) InnerError!void {...@@ -1184,18 +1182,7 @@ fn dbgAdvancePCAndLine(emit: *Emit, line: u32, column: u32) InnerError!void {
1184 log.debug(" (advance pc={d} and line={d})", .{ delta_line, delta_pc });1182 log.debug(" (advance pc={d} and line={d})", .{ delta_line, delta_pc });
1185 switch (emit.debug_output) {1183 switch (emit.debug_output) {
1186 .dwarf => |dw| {1184 .dwarf => |dw| {
1187 // TODO Look into using the DWARF special opcodes to compress this data.1185 try dw.advancePCAndLine(delta_line, delta_pc);
1188 // It lets you emit single-byte opcodes that add different numbers to
1189 // both the PC and the line number at the same time.
1190 const dbg_line = &dw.dbg_line;
1191 try dbg_line.ensureUnusedCapacity(11);
1192 dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
1193 leb128.writeULEB128(dbg_line.writer(), delta_pc) catch unreachable;
1194 if (delta_line != 0) {
1195 dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
1196 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
1197 }
1198 dbg_line.appendAssumeCapacity(DW.LNS.copy);
1199 emit.prev_di_line = line;1186 emit.prev_di_line = line;
1200 emit.prev_di_column = column;1187 emit.prev_di_column = column;
1201 emit.prev_di_pc = emit.code.items.len;1188 emit.prev_di_pc = emit.code.items.len;
...@@ -1244,8 +1231,11 @@ fn mirDbgPrologueEnd(emit: *Emit, inst: Mir.Inst.Index) InnerError!void {...@@ -1244,8 +1231,11 @@ fn mirDbgPrologueEnd(emit: *Emit, inst: Mir.Inst.Index) InnerError!void {
1244 assert(tag == .dbg_prologue_end);1231 assert(tag == .dbg_prologue_end);
1245 switch (emit.debug_output) {1232 switch (emit.debug_output) {
1246 .dwarf => |dw| {1233 .dwarf => |dw| {
1247 try dw.dbg_line.append(DW.LNS.set_prologue_end);1234 try dw.setPrologueEnd();
1248 log.debug("mirDbgPrologueEnd (line={d}, col={d})", .{ emit.prev_di_line, emit.prev_di_column });1235 log.debug("mirDbgPrologueEnd (line={d}, col={d})", .{
1236 emit.prev_di_line,
1237 emit.prev_di_column,
1238 });
1249 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);1239 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
1250 },1240 },
1251 .plan9 => {},1241 .plan9 => {},
...@@ -1258,8 +1248,11 @@ fn mirDbgEpilogueBegin(emit: *Emit, inst: Mir.Inst.Index) InnerError!void {...@@ -1258,8 +1248,11 @@ fn mirDbgEpilogueBegin(emit: *Emit, inst: Mir.Inst.Index) InnerError!void {
1258 assert(tag == .dbg_epilogue_begin);1248 assert(tag == .dbg_epilogue_begin);
1259 switch (emit.debug_output) {1249 switch (emit.debug_output) {
1260 .dwarf => |dw| {1250 .dwarf => |dw| {
1261 try dw.dbg_line.append(DW.LNS.set_epilogue_begin);1251 try dw.setEpilogueBegin();
1262 log.debug("mirDbgEpilogueBegin (line={d}, col={d})", .{ emit.prev_di_line, emit.prev_di_column });1252 log.debug("mirDbgEpilogueBegin (line={d}, col={d})", .{
1253 emit.prev_di_line,
1254 emit.prev_di_column,
1255 });
1263 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);1256 try emit.dbgAdvancePCAndLine(emit.prev_di_line, emit.prev_di_column);
1264 },1257 },
1265 .plan9 => {},1258 .plan9 => {},
src/link/Dwarf.zig+27
...@@ -778,6 +778,33 @@ pub const DeclState = struct {...@@ -778,6 +778,33 @@ pub const DeclState = struct {
778 try self.addTypeRelocGlobal(atom, child_ty, @intCast(u32, index));778 try self.addTypeRelocGlobal(atom, child_ty, @intCast(u32, index));
779 dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string779 dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
780 }780 }
781
782 pub fn advancePCAndLine(
783 self: *DeclState,
784 delta_line: i32,
785 delta_pc: usize,
786 ) error{OutOfMemory}!void {
787 // TODO Look into using the DWARF special opcodes to compress this data.
788 // It lets you emit single-byte opcodes that add different numbers to
789 // both the PC and the line number at the same time.
790 const dbg_line = &self.dbg_line;
791 try dbg_line.ensureUnusedCapacity(11);
792 dbg_line.appendAssumeCapacity(DW.LNS.advance_pc);
793 leb128.writeULEB128(dbg_line.writer(), delta_pc) catch unreachable;
794 if (delta_line != 0) {
795 dbg_line.appendAssumeCapacity(DW.LNS.advance_line);
796 leb128.writeILEB128(dbg_line.writer(), delta_line) catch unreachable;
797 }
798 dbg_line.appendAssumeCapacity(DW.LNS.copy);
799 }
800
801 pub fn setPrologueEnd(self: *DeclState) error{OutOfMemory}!void {
802 try self.dbg_line.append(DW.LNS.set_prologue_end);
803 }
804
805 pub fn setEpilogueBegin(self: *DeclState) error{OutOfMemory}!void {
806 try self.dbg_line.append(DW.LNS.set_epilogue_begin);
807 }
781};808};
782809
783pub const AbbrevEntry = struct {810pub const AbbrevEntry = struct {