| ... | @@ -351,6 +351,9 @@ def InstRef_SummaryProvider(value, _=None): | ... | @@ -351,6 +351,9 @@ def InstRef_SummaryProvider(value, _=None): |
| 351 | return value if any(value.unsigned == member.unsigned for member in value.type.enum_members) else ( | 351 | return value if any(value.unsigned == member.unsigned for member in value.type.enum_members) else ( |
| 352 | 'InternPool.Index(%d)' % value.unsigned if value.unsigned < 0x80000000 else 'instructions[%d]' % (value.unsigned - 0x80000000)) | 352 | 'InternPool.Index(%d)' % value.unsigned if value.unsigned < 0x80000000 else 'instructions[%d]' % (value.unsigned - 0x80000000)) |
| 353 | | 353 | |
| | 354 | def InstIndex_SummaryProvider(value, _=None): |
| | 355 | return 'instructions[%d]' % value.unsigned |
| | 356 | |
| 354 | class Module_Decl__Module_Decl_Index_SynthProvider: | 357 | class Module_Decl__Module_Decl_Index_SynthProvider: |
| 355 | def __init__(self, value, _=None): self.value = value | 358 | def __init__(self, value, _=None): self.value = value |
| 356 | def update(self): | 359 | def update(self): |
| ... | @@ -705,8 +708,10 @@ def __lldb_init_module(debugger, _=None): | ... | @@ -705,8 +708,10 @@ def __lldb_init_module(debugger, _=None): |
| 705 | add(debugger, category='zig.stage2', regex=True, type=MultiArrayList_Entry('Zir\\.Inst'), identifier='TagAndPayload', synth=True, inline_children=True, summary=True) | 708 | add(debugger, category='zig.stage2', regex=True, type=MultiArrayList_Entry('Zir\\.Inst'), identifier='TagAndPayload', synth=True, inline_children=True, summary=True) |
| 706 | add(debugger, category='zig.stage2', regex=True, type='^Zir\\.Inst\\.Data\\.Data__struct_[1-9][0-9]*$', inline_children=True, summary=True) | 709 | add(debugger, category='zig.stage2', regex=True, type='^Zir\\.Inst\\.Data\\.Data__struct_[1-9][0-9]*$', inline_children=True, summary=True) |
| 707 | add(debugger, category='zig.stage2', type='Zir.Inst::Zir.Inst.Ref', identifier='InstRef', summary=True) | 710 | add(debugger, category='zig.stage2', type='Zir.Inst::Zir.Inst.Ref', identifier='InstRef', summary=True) |
| | 711 | add(debugger, category='zig.stage2', type='Zir.Inst::Zir.Inst.Index', identifier='InstIndex', summary=True) |
| 708 | add(debugger, category='zig.stage2', type='Air.Inst', identifier='TagAndPayload', synth=True, inline_children=True, summary=True) | 712 | add(debugger, category='zig.stage2', type='Air.Inst', identifier='TagAndPayload', synth=True, inline_children=True, summary=True) |
| 709 | add(debugger, category='zig.stage2', type='Air.Inst::Air.Inst.Ref', identifier='InstRef', summary=True) | 713 | add(debugger, category='zig.stage2', type='Air.Inst::Air.Inst.Ref', identifier='InstRef', summary=True) |
| | 714 | add(debugger, category='zig.stage2', type='Air.Inst::Air.Inst.Index', identifier='InstIndex', summary=True) |
| 710 | add(debugger, category='zig.stage2', regex=True, type=MultiArrayList_Entry('Air\\.Inst'), identifier='TagAndPayload', synth=True, inline_children=True, summary=True) | 715 | add(debugger, category='zig.stage2', regex=True, type=MultiArrayList_Entry('Air\\.Inst'), identifier='TagAndPayload', synth=True, inline_children=True, summary=True) |
| 711 | add(debugger, category='zig.stage2', regex=True, type='^Air\\.Inst\\.Data\\.Data__struct_[1-9][0-9]*$', inline_children=True, summary=True) | 716 | add(debugger, category='zig.stage2', regex=True, type='^Air\\.Inst\\.Data\\.Data__struct_[1-9][0-9]*$', inline_children=True, summary=True) |
| 712 | add(debugger, category='zig.stage2', type='Module.Decl::Module.Decl.Index', synth=True) | 717 | add(debugger, category='zig.stage2', type='Module.Decl::Module.Decl.Index', synth=True) |