authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-03-25 21:26:12-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-03-25 21:26:18-04:00
log14c0b8c54863a4f88ffc0e6a740998bc0ebe89d5
tree3be5e5f1bd8e660a97618e0a193310afdb124167
parenta80be15cd494dbd25874db8ef63c1cbbcdfc732a

x86_64: remove unused Mir encodings

This also restores the size of Mir.Inst and simplifies logic in general.

3 files changed, 13 insertions(+), 38 deletions(-)

src/arch/x86_64/CodeGen.zig+3-12
...@@ -668,20 +668,11 @@ fn asmMemoryRegisterImmediate(...@@ -668,20 +668,11 @@ fn asmMemoryRegisterImmediate(
668 _ = try self.addInst(.{668 _ = try self.addInst(.{
669 .tag = tag,669 .tag = tag,
670 .ops = switch (m) {670 .ops = switch (m) {
671 .sib => switch (imm) {671 .sib => .mri_sib,
672 .signed => .mri_sib_s,672 .rip => .mri_rip,
673 .unsigned => .mri_sib_u,
674 },
675 .rip => switch (imm) {
676 .signed => .mri_rip_s,
677 .unsigned => .mri_sib_u,
678 },
679 else => unreachable,673 else => unreachable,
680 },674 },
681 .data = .{ .rix = .{ .r = reg, .i = switch (imm) {675 .data = .{ .rix = .{ .r = reg, .i = @intCast(u8, imm.unsigned), .payload = switch (m) {
682 .signed => |s| @bitCast(u32, s),
683 .unsigned => |u| @intCast(u32, u),
684 }, .payload = switch (m) {
685 .sib => try self.addExtra(Mir.MemorySib.encode(m)),676 .sib => try self.addExtra(Mir.MemorySib.encode(m)),
686 .rip => try self.addExtra(Mir.MemoryRip.encode(m)),677 .rip => try self.addExtra(Mir.MemoryRip.encode(m)),
687 else => unreachable,678 else => unreachable,
src/arch/x86_64/Emit.zig+4-14
...@@ -359,27 +359,17 @@ fn mirEncodeGeneric(emit: *Emit, tag: Mir.Inst.Tag, inst: Mir.Inst.Index) InnerE...@@ -359,27 +359,17 @@ fn mirEncodeGeneric(emit: *Emit, tag: Mir.Inst.Tag, inst: Mir.Inst.Index) InnerE
359 op2 = .{ .reg = data.rrx.r1 };359 op2 = .{ .reg = data.rrx.r1 };
360 op2 = .{ .reg = data.rrx.r2 };360 op2 = .{ .reg = data.rrx.r2 };
361 },361 },
362 .mri_sib_u, .mri_sib_s => {362 .mri_sib => {
363 const msib = emit.mir.extraData(Mir.MemorySib, data.rix.payload).data;363 const msib = emit.mir.extraData(Mir.MemorySib, data.rix.payload).data;
364 const imm = switch (ops) {
365 .mri_sib_s => Immediate.s(@bitCast(i32, data.rix.i)),
366 .mri_sib_u, .lock_mi_rip_u => Immediate.u(data.rix.i),
367 else => unreachable,
368 };
369 op1 = .{ .mem = Mir.MemorySib.decode(msib) };364 op1 = .{ .mem = Mir.MemorySib.decode(msib) };
370 op2 = .{ .reg = data.rix.r };365 op2 = .{ .reg = data.rix.r };
371 op3 = .{ .imm = imm };366 op3 = .{ .imm = Immediate.u(data.rix.i) };
372 },367 },
373 .mri_rip_u, .mri_rip_s => {368 .mri_rip => {
374 const mrip = emit.mir.extraData(Mir.MemoryRip, data.rix.payload).data;369 const mrip = emit.mir.extraData(Mir.MemoryRip, data.rix.payload).data;
375 const imm = switch (ops) {
376 .mri_rip_s => Immediate.s(@bitCast(i32, data.rix.i)),
377 .mri_rip_u, .lock_mi_rip_u => Immediate.u(data.rix.i),
378 else => unreachable,
379 };
380 op1 = .{ .mem = Mir.MemoryRip.decode(mrip) };370 op1 = .{ .mem = Mir.MemoryRip.decode(mrip) };
381 op2 = .{ .reg = data.rix.r };371 op2 = .{ .reg = data.rix.r };
382 op3 = .{ .imm = imm };372 op3 = .{ .imm = Immediate.u(data.rix.i) };
383 },373 },
384 else => return emit.fail("TODO handle generic encoding: {s}, {s}", .{374 else => return emit.fail("TODO handle generic encoding: {s}, {s}", .{
385 @tagName(mnemonic),375 @tagName(mnemonic),
src/arch/x86_64/Mir.zig+6-12
...@@ -343,18 +343,12 @@ pub const Inst = struct {...@@ -343,18 +343,12 @@ pub const Inst = struct {
343 /// Memory (RIP), register, register operands.343 /// Memory (RIP), register, register operands.
344 /// Uses `rrx` payload with extra data of type `MemoryRip`.344 /// Uses `rrx` payload with extra data of type `MemoryRip`.
345 mrr_rip,345 mrr_rip,
346 /// Memory (SIB), register, immediate (unsigned) operands.346 /// Memory (SIB), register, immediate (byte) operands.
347 /// Uses `rix` payload with extra data of type `MemorySib`.347 /// Uses `rix` payload with extra data of type `MemorySib`.
348 mri_sib_u,348 mri_sib,
349 /// Memory (RIP), register, immediate (unsigned) operands.349 /// Memory (RIP), register, immediate (byte) operands.
350 /// Uses `rix` payload with extra data of type `MemoryRip`.350 /// Uses `rix` payload with extra data of type `MemoryRip`.
351 mri_rip_u,351 mri_rip,
352 /// Memory (SIB), register, immediate (signed) operands.
353 /// Uses `rix` payload with extra data of type `MemorySib`.
354 mri_sib_s,
355 /// Memory (RIP), register, immediate (signed) operands.
356 /// Uses `rix` payload with extra data of type `MemoryRip`.
357 mri_rip_s,
358 /// Rax, Memory moffs.352 /// Rax, Memory moffs.
359 /// Uses `payload` with extra data of type `MemoryMoffs`.353 /// Uses `payload` with extra data of type `MemoryMoffs`.
360 rax_moffs,354 rax_moffs,
...@@ -481,10 +475,10 @@ pub const Inst = struct {...@@ -481,10 +475,10 @@ pub const Inst = struct {
481 r2: Register,475 r2: Register,
482 payload: u32,476 payload: u32,
483 },477 },
484 /// Register, immediate, followed by Custom payload found in extra.478 /// Register, byte immediate, followed by Custom payload found in extra.
485 rix: struct {479 rix: struct {
486 r: Register,480 r: Register,
487 i: u32,481 i: u8,
488 payload: u32,482 payload: u32,
489 },483 },
490 /// String instruction prefix and width.484 /// String instruction prefix and width.