authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-03-25 13:44:50-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2023-03-25 16:23:55-04:00
log1e080e505617b8a7961971630c059592f7366223
treea20ded8cf08eaddf48795549e649a3da0c622a6a
parent6d9bdc8733419ebfc9527d114b637c57d3fd8a42

x86_64: implement atomic loops

27 files changed, 250 insertions(+), 111 deletions(-)

src/arch/x86_64/CodeGen.zig+239-58
......@@ -1438,7 +1438,7 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void {
14381438 const min_abi_size = @min(dst_abi_size, src_abi_size);
14391439 const tag: Mir.Inst.Tag = switch (signedness) {
14401440 .signed => .movsx,
1441 .unsigned => if (min_abi_size == 4) .mov else .movzx,
1441 .unsigned => if (min_abi_size > 2) .mov else .movzx,
14421442 };
14431443 const dst_alias = switch (tag) {
14441444 .movsx => dst_reg.to64(),
......@@ -3889,10 +3889,10 @@ fn genUnOp(self: *Self, maybe_inst: ?Air.Inst.Index, tag: Air.Inst.Tag, src_air:
38893889 const src_ty = self.air.typeOf(src_air);
38903890 const src_mcv = try self.resolveInst(src_air);
38913891 if (src_ty.zigTypeTag() == .Vector) {
3892 return self.fail("TODO implement genBinOp for {}", .{src_ty.fmt(self.bin_file.options.module.?)});
3892 return self.fail("TODO implement genUnOp for {}", .{src_ty.fmt(self.bin_file.options.module.?)});
38933893 }
38943894 if (src_ty.abiSize(self.target.*) > 8) {
3895 return self.fail("TODO implement genBinOp for {}", .{src_ty.fmt(self.bin_file.options.module.?)});
3895 return self.fail("TODO implement genUnOp for {}", .{src_ty.fmt(self.bin_file.options.module.?)});
38963896 }
38973897
38983898 switch (src_mcv) {
......@@ -4192,7 +4192,7 @@ fn genShiftBinOp(
41924192 return self.fail("TODO implement genShiftBinOp for {}", .{lhs_ty.fmtDebug()});
41934193 }
41944194
4195 self.register_manager.getRegAssumeFree(.rcx, null);
4195 try self.register_manager.getReg(.rcx, null);
41964196 const rcx_lock = self.register_manager.lockRegAssumeUnused(.rcx);
41974197 defer self.register_manager.unlockReg(rcx_lock);
41984198
......@@ -4717,7 +4717,7 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MCValu
47174717 );
47184718 }
47194719 },
4720 else => return self.fail("TODO getBinOpMir implement large immediate ABI", .{}),
4720 else => return self.fail("TODO genBinOpMir implement large immediate ABI", .{}),
47214721 }
47224722 },
47234723 .memory,
......@@ -4798,28 +4798,28 @@ fn genBinOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MCValu
47984798 );
47994799 }
48004800 },
4801 else => return self.fail("TODO getBinOpMir implement large immediate ABI", .{}),
4801 else => return self.fail("TODO genBinOpMir implement large immediate ABI", .{}),
48024802 }
48034803 },
48044804 .memory,
48054805 .stack_offset,
48064806 .ptr_stack_offset,
48074807 => {
4808 return self.fail("TODO implement x86 ADD/SUB/CMP source memory", .{});
4808 return self.fail("TODO implement x86 genBinOpMir source memory", .{});
48094809 },
48104810 .linker_load => {
4811 return self.fail("TODO implement x86 ADD/SUB/CMP source symbol at index in linker", .{});
4811 return self.fail("TODO implement x86 genBinOpMir source symbol at index in linker", .{});
48124812 },
48134813 .eflags => {
4814 return self.fail("TODO implement x86 ADD/SUB/CMP source eflags", .{});
4814 return self.fail("TODO implement x86 genBinOpMir source eflags", .{});
48154815 },
48164816 }
48174817 },
48184818 .memory => {
4819 return self.fail("TODO implement x86 ADD/SUB/CMP destination memory", .{});
4819 return self.fail("TODO implement x86 genBinOpMir destination memory", .{});
48204820 },
48214821 .linker_load => {
4822 return self.fail("TODO implement x86 ADD/SUB/CMP destination symbol at index", .{});
4822 return self.fail("TODO implement x86 genBinOpMir destination symbol at index", .{});
48234823 },
48244824 }
48254825}
......@@ -7219,20 +7219,37 @@ fn airCmpxchg(self: *Self, inst: Air.Inst.Index) !void {
72197219 const ptr_ty = self.air.typeOf(extra.ptr);
72207220 const ptr_mcv = try self.resolveInst(extra.ptr);
72217221 const val_ty = self.air.typeOf(extra.expected_value);
7222 const val_abi_size = @intCast(u32, val_ty.abiSize(self.target.*));
7223
7224 try self.spillRegisters(&.{ .rax, .rdx, .rbx, .rcx });
7225 const regs_lock = self.register_manager.lockRegsAssumeUnused(4, .{ .rax, .rdx, .rbx, .rcx });
7226 for (regs_lock) |lock| self.register_manager.unlockReg(lock);
72227227
72237228 const exp_mcv = try self.resolveInst(extra.expected_value);
7224 try self.genSetReg(val_ty, .rax, exp_mcv);
7229 if (val_abi_size > 8) switch (exp_mcv) {
7230 .stack_offset => |exp_off| {
7231 try self.genSetReg(Type.usize, .rax, .{ .stack_offset = exp_off - 0 });
7232 try self.genSetReg(Type.usize, .rdx, .{ .stack_offset = exp_off - 8 });
7233 },
7234 else => return self.fail("TODO implement cmpxchg for {s}", .{@tagName(exp_mcv)}),
7235 } else try self.genSetReg(val_ty, .rax, exp_mcv);
72257236 const rax_lock = self.register_manager.lockRegAssumeUnused(.rax);
72267237 defer self.register_manager.unlockReg(rax_lock);
72277238
72287239 const new_mcv = try self.resolveInst(extra.new_value);
7229 const new_reg = try self.copyToTmpRegister(val_ty, new_mcv);
7240 const new_reg: Register = if (val_abi_size > 8) switch (new_mcv) {
7241 .stack_offset => |new_off| new: {
7242 try self.genSetReg(Type.usize, .rbx, .{ .stack_offset = new_off - 0 });
7243 try self.genSetReg(Type.usize, .rcx, .{ .stack_offset = new_off - 8 });
7244 break :new undefined;
7245 },
7246 else => return self.fail("TODO implement cmpxchg for {s}", .{@tagName(exp_mcv)}),
7247 } else try self.copyToTmpRegister(val_ty, new_mcv);
72307248 const new_lock = self.register_manager.lockRegAssumeUnused(new_reg);
72317249 defer self.register_manager.unlockReg(new_lock);
72327250
7233 const val_abi_size = @intCast(u32, val_ty.abiSize(self.target.*));
72347251 const ptr_size = Memory.PtrSize.fromSize(val_abi_size);
7235 const ptr_mem: Memory = switch (ptr_mcv) {
7252 const ptr_mem = switch (ptr_mcv) {
72367253 .register => |reg| Memory.sib(ptr_size, .{ .base = reg }),
72377254 .ptr_stack_offset => |off| Memory.sib(ptr_size, .{ .base = .rbp, .disp = -off }),
72387255 else => Memory.sib(ptr_size, .{ .base = try self.copyToTmpRegister(ptr_ty, ptr_mcv) }),
......@@ -7241,16 +7258,30 @@ fn airCmpxchg(self: *Self, inst: Air.Inst.Index) !void {
72417258 defer if (mem_lock) |lock| self.register_manager.unlockReg(lock);
72427259
72437260 try self.spillEflagsIfOccupied();
7244 _ = try self.addInst(.{ .tag = .cmpxchg, .ops = .lock_mr_sib, .data = .{ .rx = .{
7245 .r = registerAlias(new_reg, val_abi_size),
7246 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7247 } } });
7261 if (val_abi_size <= 8) {
7262 _ = try self.addInst(.{ .tag = .cmpxchg, .ops = .lock_mr_sib, .data = .{ .rx = .{
7263 .r = registerAlias(new_reg, val_abi_size),
7264 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7265 } } });
7266 } else {
7267 _ = try self.addInst(.{ .tag = .cmpxchgb, .ops = .lock_m_sib, .data = .{
7268 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7269 } });
7270 }
72487271
72497272 const result: MCValue = result: {
72507273 if (self.liveness.isUnused(inst)) break :result .dead;
72517274
7252 self.eflags_inst = inst;
7253 break :result .{ .register_overflow = .{ .reg = .rax, .eflags = .ne } };
7275 if (val_abi_size <= 8) {
7276 self.eflags_inst = inst;
7277 break :result .{ .register_overflow = .{ .reg = .rax, .eflags = .ne } };
7278 }
7279
7280 const dst_mcv = try self.allocRegOrMem(inst, false);
7281 try self.genSetStack(Type.bool, dst_mcv.stack_offset - 16, .{ .eflags = .ne }, .{});
7282 try self.genSetStack(Type.usize, dst_mcv.stack_offset - 8, .{ .register = .rdx }, .{});
7283 try self.genSetStack(Type.usize, dst_mcv.stack_offset - 0, .{ .register = .rax }, .{});
7284 break :result dst_mcv;
72547285 };
72557286 return self.finishAir(inst, result, .{ extra.ptr, extra.expected_value, extra.new_value });
72567287}
......@@ -7263,9 +7294,10 @@ fn atomicOp(
72637294 ptr_ty: Type,
72647295 val_ty: Type,
72657296 unused: bool,
7266 op: ?std.builtin.AtomicRmwOp,
7297 rmw_op: ?std.builtin.AtomicRmwOp,
72677298 order: std.builtin.AtomicOrder,
72687299) InnerError!void {
7300 const dst_mcv = MCValue{ .register = dst_reg };
72697301 const dst_lock = self.register_manager.lockReg(dst_reg);
72707302 defer if (dst_lock) |lock| self.register_manager.unlockReg(lock);
72717303
......@@ -7283,7 +7315,7 @@ fn atomicOp(
72837315
72847316 const val_abi_size = @intCast(u32, val_ty.abiSize(self.target.*));
72857317 const ptr_size = Memory.PtrSize.fromSize(val_abi_size);
7286 const ptr_mem: Memory = switch (ptr_mcv) {
7318 const ptr_mem = switch (ptr_mcv) {
72877319 .register => |reg| Memory.sib(ptr_size, .{ .base = reg }),
72887320 .ptr_stack_offset => |off| Memory.sib(ptr_size, .{ .base = .rbp, .disp = -off }),
72897321 else => Memory.sib(ptr_size, .{ .base = try self.copyToTmpRegister(ptr_ty, ptr_mcv) }),
......@@ -7291,48 +7323,197 @@ fn atomicOp(
72917323 const mem_lock = if (ptr_mem.base()) |reg| self.register_manager.lockReg(reg) else null;
72927324 defer if (mem_lock) |lock| self.register_manager.unlockReg(lock);
72937325
7294 try self.genSetReg(val_ty, dst_reg, val_mcv);
7295
7296 const need_loop = val_ty.isRuntimeFloat() or if (op) |rmw| switch (rmw) {
7297 .Xchg, .Add, .Sub => false,
7298 .And, .Or, .Xor => !unused,
7299 .Nand, .Max, .Min => true,
7300 } else false;
7301 if (!need_loop) {
7302 const tag: Mir.Inst.Tag = if (op) |rmw| switch (rmw) {
7303 .Xchg => if (unused) .mov else .xchg,
7304 .Add => if (unused) .add else .xadd,
7305 .Sub => if (unused) .sub else .xadd,
7306 .And => .@"and",
7307 .Or => .@"or",
7308 .Xor => .xor,
7309 else => unreachable,
7310 } else switch (order) {
7311 .Unordered, .Monotonic, .Release, .AcqRel => .mov,
7312 .Acquire => unreachable,
7313 .SeqCst => .xchg,
7314 };
7315 if (op == std.builtin.AtomicRmwOp.Sub and tag == .xadd) {
7316 try self.genUnOpMir(.neg, val_ty, .{ .register = dst_reg });
7317 }
7318 _ = try self.addInst(.{ .tag = tag, .ops = switch (tag) {
7319 .mov, .xchg => .mr_sib,
7320 .xadd, .add, .sub, .@"and", .@"or", .xor => .lock_mr_sib,
7321 else => unreachable,
7322 }, .data = .{ .rx = .{
7323 .r = registerAlias(dst_reg, val_abi_size),
7324 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7325 } } });
7326 return;
7327 }
7326 const method: enum { lock, loop, libcall } = if (val_ty.isRuntimeFloat())
7327 .loop
7328 else switch (rmw_op orelse .Xchg) {
7329 .Xchg,
7330 .Add,
7331 .Sub,
7332 => if (val_abi_size <= 8) .lock else if (val_abi_size <= 16) .loop else .libcall,
7333 .And,
7334 .Or,
7335 .Xor,
7336 => if (val_abi_size <= 8 and unused) .lock else if (val_abi_size <= 16) .loop else .libcall,
7337 .Nand,
7338 .Max,
7339 .Min,
7340 => if (val_abi_size <= 16) .loop else .libcall,
7341 };
7342 switch (method) {
7343 .lock => {
7344 const tag: Mir.Inst.Tag = if (rmw_op) |op| switch (op) {
7345 .Xchg => if (unused) .mov else .xchg,
7346 .Add => if (unused) .add else .xadd,
7347 .Sub => if (unused) .sub else .xadd,
7348 .And => .@"and",
7349 .Or => .@"or",
7350 .Xor => .xor,
7351 else => unreachable,
7352 } else switch (order) {
7353 .Unordered, .Monotonic, .Release, .AcqRel => .mov,
7354 .Acquire => unreachable,
7355 .SeqCst => .xchg,
7356 };
73287357
7329 return self.fail("TODO implement x86 atomic loop", .{});
7358 try self.genSetReg(val_ty, dst_reg, val_mcv);
7359 if (rmw_op == std.builtin.AtomicRmwOp.Sub and tag == .xadd) {
7360 try self.genUnOpMir(.neg, val_ty, .{ .register = dst_reg });
7361 }
7362 _ = try self.addInst(.{ .tag = tag, .ops = switch (tag) {
7363 .mov, .xchg => .mr_sib,
7364 .xadd, .add, .sub, .@"and", .@"or", .xor => .lock_mr_sib,
7365 else => unreachable,
7366 }, .data = .{ .rx = .{
7367 .r = registerAlias(dst_reg, val_abi_size),
7368 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7369 } } });
7370 },
7371 .loop => _ = try self.asmJccReloc(if (val_abi_size <= 8) loop: {
7372 try self.genSetReg(val_ty, dst_reg, val_mcv);
7373 try self.asmRegisterMemory(.mov, registerAlias(.rax, val_abi_size), ptr_mem);
7374 const loop = @intCast(u32, self.mir_instructions.len);
7375 if (rmw_op != std.builtin.AtomicRmwOp.Xchg) {
7376 try self.genSetReg(val_ty, dst_reg, .{ .register = .rax });
7377 }
7378 if (rmw_op) |op| switch (op) {
7379 .Xchg => try self.genSetReg(val_ty, dst_reg, val_mcv),
7380 .Add => try self.genBinOpMir(.add, val_ty, dst_mcv, val_mcv),
7381 .Sub => try self.genBinOpMir(.sub, val_ty, dst_mcv, val_mcv),
7382 .And => try self.genBinOpMir(.@"and", val_ty, dst_mcv, val_mcv),
7383 .Nand => {
7384 try self.genBinOpMir(.@"and", val_ty, dst_mcv, val_mcv);
7385 try self.genUnOpMir(.not, val_ty, dst_mcv);
7386 },
7387 .Or => try self.genBinOpMir(.@"or", val_ty, dst_mcv, val_mcv),
7388 .Xor => try self.genBinOpMir(.xor, val_ty, dst_mcv, val_mcv),
7389 .Min, .Max => {
7390 const cc: Condition = switch (if (val_ty.isAbiInt())
7391 val_ty.intInfo(self.target.*).signedness
7392 else
7393 .unsigned) {
7394 .unsigned => switch (op) {
7395 .Min => .a,
7396 .Max => .b,
7397 else => unreachable,
7398 },
7399 .signed => switch (op) {
7400 .Min => .g,
7401 .Max => .l,
7402 else => unreachable,
7403 },
7404 };
7405
7406 try self.genBinOpMir(.cmp, val_ty, dst_mcv, val_mcv);
7407 switch (val_mcv) {
7408 .register => |val_reg| try self.asmCmovccRegisterRegister(
7409 registerAlias(dst_reg, val_abi_size),
7410 registerAlias(val_reg, val_abi_size),
7411 cc,
7412 ),
7413 .stack_offset => |val_off| try self.asmCmovccRegisterMemory(
7414 registerAlias(dst_reg, val_abi_size),
7415 Memory.sib(
7416 Memory.PtrSize.fromSize(val_abi_size),
7417 .{ .base = .rbp, .disp = -val_off },
7418 ),
7419 cc,
7420 ),
7421 else => {
7422 const val_reg = try self.copyToTmpRegister(val_ty, val_mcv);
7423 try self.asmCmovccRegisterRegister(
7424 registerAlias(dst_reg, val_abi_size),
7425 registerAlias(val_reg, val_abi_size),
7426 cc,
7427 );
7428 },
7429 }
7430 },
7431 };
7432 _ = try self.addInst(.{ .tag = .cmpxchg, .ops = .lock_mr_sib, .data = .{ .rx = .{
7433 .r = registerAlias(dst_reg, val_abi_size),
7434 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7435 } } });
7436 break :loop loop;
7437 } else loop: {
7438 try self.asmRegisterMemory(.mov, .rax, Memory.sib(.qword, .{
7439 .base = ptr_mem.sib.base,
7440 .scale_index = ptr_mem.sib.scale_index,
7441 .disp = ptr_mem.sib.disp + 0,
7442 }));
7443 try self.asmRegisterMemory(.mov, .rdx, Memory.sib(.qword, .{
7444 .base = ptr_mem.sib.base,
7445 .scale_index = ptr_mem.sib.scale_index,
7446 .disp = ptr_mem.sib.disp + 8,
7447 }));
7448 const loop = @intCast(u32, self.mir_instructions.len);
7449 switch (val_mcv) {
7450 .stack_offset => |val_off| {
7451 const val_lo_mem = Memory.sib(.qword, .{ .base = .rbp, .disp = 0 - val_off });
7452 const val_hi_mem = Memory.sib(.qword, .{ .base = .rbp, .disp = 8 - val_off });
7453
7454 if (rmw_op != std.builtin.AtomicRmwOp.Xchg) {
7455 try self.asmRegisterRegister(.mov, .rbx, .rax);
7456 try self.asmRegisterRegister(.mov, .rcx, .rdx);
7457 }
7458 if (rmw_op) |op| switch (op) {
7459 .Xchg => {
7460 try self.asmRegisterMemory(.mov, .rbx, val_lo_mem);
7461 try self.asmRegisterMemory(.mov, .rcx, val_hi_mem);
7462 },
7463 .Add => {
7464 try self.asmRegisterMemory(.add, .rbx, val_lo_mem);
7465 try self.asmRegisterMemory(.adc, .rcx, val_hi_mem);
7466 },
7467 .Sub => {
7468 try self.asmRegisterMemory(.sub, .rbx, val_lo_mem);
7469 try self.asmRegisterMemory(.sbb, .rcx, val_hi_mem);
7470 },
7471 .And => {
7472 try self.asmRegisterMemory(.@"and", .rbx, val_lo_mem);
7473 try self.asmRegisterMemory(.@"and", .rcx, val_hi_mem);
7474 },
7475 .Nand => {
7476 try self.asmRegisterMemory(.@"and", .rbx, val_lo_mem);
7477 try self.asmRegisterMemory(.@"and", .rcx, val_hi_mem);
7478 try self.asmRegister(.not, .rbx);
7479 try self.asmRegister(.not, .rcx);
7480 },
7481 .Or => {
7482 try self.asmRegisterMemory(.@"or", .rbx, val_lo_mem);
7483 try self.asmRegisterMemory(.@"or", .rcx, val_hi_mem);
7484 },
7485 .Xor => {
7486 try self.asmRegisterMemory(.xor, .rbx, val_lo_mem);
7487 try self.asmRegisterMemory(.xor, .rcx, val_hi_mem);
7488 },
7489 else => return self.fail(
7490 "TODO implement x86 atomic loop for large abi {s}",
7491 .{@tagName(op)},
7492 ),
7493 };
7494 },
7495 else => return self.fail(
7496 "TODO implement x86 atomic loop for large abi {s}",
7497 .{@tagName(val_mcv)},
7498 ),
7499 }
7500 _ = try self.addInst(.{ .tag = .cmpxchgb, .ops = .lock_m_sib, .data = .{
7501 .payload = try self.addExtra(Mir.MemorySib.encode(ptr_mem)),
7502 } });
7503 break :loop loop;
7504 }, .ne),
7505 .libcall => return self.fail("TODO implement x86 atomic libcall", .{}),
7506 }
73307507}
73317508
73327509fn airAtomicRmw(self: *Self, inst: Air.Inst.Index) !void {
73337510 const pl_op = self.air.instructions.items(.data)[inst].pl_op;
73347511 const extra = self.air.extraData(Air.AtomicRmw, pl_op.payload).data;
73357512
7513 try self.spillRegisters(&.{ .rax, .rdx, .rbx, .rcx });
7514 const regs_lock = self.register_manager.lockRegsAssumeUnused(4, .{ .rax, .rdx, .rbx, .rcx });
7515 defer for (regs_lock) |lock| self.register_manager.unlockReg(lock);
7516
73367517 const unused = self.liveness.isUnused(inst);
73377518 const dst_reg = try self.register_manager.allocReg(if (unused) null else inst, gp);
73387519
src/arch/x86_64/bits.zig+11-12
......@@ -411,20 +411,17 @@ pub const Memory = union(enum) {
411411 dword,
412412 qword,
413413 tbyte,
414 dqword,
414415
415416 pub fn fromSize(size: u32) PtrSize {
416 return if (size <= 1)
417 .byte
418 else if (size <= 2)
419 .word
420 else if (size <= 4)
421 .dword
422 else if (size <= 8)
423 .qword
424 else if (size == 10)
425 .tbyte
426 else
427 unreachable;
417 return switch (size) {
418 1...1 => .byte,
419 2...2 => .word,
420 3...4 => .dword,
421 5...8 => .qword,
422 9...16 => .dqword,
423 else => unreachable,
424 };
428425 }
429426
430427 pub fn fromBitSize(bit_size: u64) PtrSize {
......@@ -434,6 +431,7 @@ pub const Memory = union(enum) {
434431 32 => .dword,
435432 64 => .qword,
436433 80 => .tbyte,
434 128 => .dqword,
437435 else => unreachable,
438436 };
439437 }
......@@ -445,6 +443,7 @@ pub const Memory = union(enum) {
445443 .dword => 32,
446444 .qword => 64,
447445 .tbyte => 80,
446 .dqword => 128,
448447 };
449448 }
450449 };
test/behavior/array.zig-2
......@@ -70,7 +70,6 @@ test "array concat with undefined" {
7070test "array concat with tuple" {
7171 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
7272 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
73 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
7473
7574 const array: [2]u8 = .{ 1, 2 };
7675 {
......@@ -641,7 +640,6 @@ test "tuple to array handles sentinel" {
641640}
642641
643642test "array init of container level array variable" {
644 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
645643 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
646644 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
647645 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/bugs/10684.zig-1
......@@ -4,7 +4,6 @@ const expectEqualStrings = std.testing.expectEqualStrings;
44
55test "slicing slices" {
66 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
7 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
87 if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
98 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
109 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
test/behavior/bugs/12051.zig-1
......@@ -3,7 +3,6 @@ const builtin = @import("builtin");
33
44test {
55 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
6 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
76 if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
87 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
98 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
test/behavior/bugs/12092.zig-1
......@@ -15,7 +15,6 @@ fn takeFoo(foo: *const Foo) !void {
1515
1616test {
1717 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
18 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1918 if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
2019 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2120 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
test/behavior/bugs/12142.zig-1
......@@ -20,7 +20,6 @@ fn letter(e: Letter) u8 {
2020
2121test {
2222 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
23 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
2423 if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
2524 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2625 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
test/behavior/bugs/6456.zig-1
......@@ -11,7 +11,6 @@ const text =
1111;
1212
1313test "issue 6456" {
14 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1514 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1615 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1716
test/behavior/bugs/8646.zig-1
......@@ -8,7 +8,6 @@ const array = [_][]const []const u8{
88
99test {
1010 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
11 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1211 if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
1312 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1413 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
test/behavior/empty_tuple_fields.zig-2
......@@ -3,7 +3,6 @@ const builtin = @import("builtin");
33
44test "empty file level struct" {
55 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
6 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
76 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
87
98 const T = @import("empty_file_level_struct.zig");
......@@ -15,7 +14,6 @@ test "empty file level struct" {
1514
1615test "empty file level union" {
1716 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
18 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
1917 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2018
2119 const T = @import("empty_file_level_union.zig");
test/behavior/lower_strlit_to_vector.zig-1
......@@ -2,7 +2,6 @@ const std = @import("std");
22const builtin = @import("builtin");
33
44test "strlit to vector" {
5 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
65 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
76 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
87 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/math.zig-1
......@@ -560,7 +560,6 @@ fn testUnsignedNegationWrappingEval(x: u16) !void {
560560test "negation wrapping" {
561561 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
562562 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
563 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
564563
565564 try expectEqual(@as(u1, 1), negateWrap(u1, 1));
566565}
test/behavior/optional.zig-1
......@@ -431,7 +431,6 @@ test "alignment of wrapping an optional payload" {
431431test "Optional slice size is optimized" {
432432 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
433433 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
434 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
435434 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
436435
437436 try expect(@sizeOf(?[]u8) == @sizeOf([]u8));
test/behavior/packed-struct.zig-2
......@@ -120,7 +120,6 @@ test "consistent size of packed structs" {
120120}
121121
122122test "correct sizeOf and offsets in packed structs" {
123 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
124123 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
125124 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
126125 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -188,7 +187,6 @@ test "correct sizeOf and offsets in packed structs" {
188187}
189188
190189test "nested packed structs" {
191 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
192190 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
193191 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
194192 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/packed_struct_explicit_backing_int.zig-1
......@@ -6,7 +6,6 @@ const native_endian = builtin.cpu.arch.endian();
66
77test "packed struct explicit backing integer" {
88 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
9 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
109 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1110 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1211 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/pointers.zig-2
......@@ -412,7 +412,6 @@ test "@ptrToInt on null optional at comptime" {
412412test "indexing array with sentinel returns correct type" {
413413 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
414414 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
415 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
416415 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
417416
418417 var s: [:0]const u8 = "abc";
......@@ -497,7 +496,6 @@ test "pointer to constant decl preserves alignment" {
497496test "ptrCast comptime known slice to C pointer" {
498497 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
499498 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
500 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
501499 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
502500
503501 const s: [:0]const u8 = "foo";
test/behavior/slice.zig-3
......@@ -688,7 +688,6 @@ test "slice field ptr var" {
688688test "global slice field access" {
689689 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
690690 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
691 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
692691 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
693692
694693 const S = struct {
......@@ -733,7 +732,6 @@ test "empty slice ptr is non null" {
733732test "slice decays to many pointer" {
734733 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
735734 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
736 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
737735
738736 var buf: [8]u8 = "abcdefg\x00".*;
739737 const p: [*:0]const u8 = buf[0..7 :0];
......@@ -744,7 +742,6 @@ test "write through pointer to optional slice arg" {
744742 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
745743 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
746744 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest;
747 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
748745
749746 const S = struct {
750747 fn bar(foo: *?[]const u8) !void {
test/behavior/struct.zig-1
......@@ -935,7 +935,6 @@ test "comptime struct field" {
935935}
936936
937937test "tuple element initialized with fn call" {
938 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
939938 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
940939 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
941940 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/switch.zig-1
......@@ -620,7 +620,6 @@ test "switch on error set with single else" {
620620}
621621
622622test "switch capture copies its payload" {
623 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
624623 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
625624 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
626625 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/threadlocal.zig-1
......@@ -21,7 +21,6 @@ test "thread local variable" {
2121
2222test "pointer to thread local array" {
2323 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
24 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
2524 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2625 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
2726 if (builtin.zig_backend == .stage2_llvm) switch (builtin.cpu.arch) {
test/behavior/translate_c_macros.zig-8
......@@ -23,7 +23,6 @@ test "casting to void with a macro" {
2323}
2424
2525test "initializer list expression" {
26 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
2726 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
2827 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
2928 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -52,7 +51,6 @@ test "reference to a struct type" {
5251
5352test "cast negative integer to pointer" {
5453 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
55 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
5654 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
5755 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
5856 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -98,7 +96,6 @@ test "casting or calling a value with a paren-surrounded macro" {
9896
9997test "nested comma operator" {
10098 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
101 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
10299 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
103100 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
104101 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -109,7 +106,6 @@ test "nested comma operator" {
109106
110107test "cast functions" {
111108 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
112 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
113109 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
114110 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
115111 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -123,7 +119,6 @@ test "cast functions" {
123119
124120test "large integer macro" {
125121 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
126 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
127122 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
128123 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
129124 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -133,7 +128,6 @@ test "large integer macro" {
133128
134129test "string literal macro with embedded tab character" {
135130 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
136 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
137131 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
138132 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
139133 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -143,7 +137,6 @@ test "string literal macro with embedded tab character" {
143137
144138test "string and char literals that are not UTF-8 encoded. Issue #12784" {
145139 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
146 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
147140 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
148141 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
149142 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -188,7 +181,6 @@ test "Macro that uses division operator. Issue #13162" {
188181
189182test "Macro that uses remainder operator. Issue #13346" {
190183 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
191 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
192184 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
193185 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
194186 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/tuple.zig-1
......@@ -381,7 +381,6 @@ test "tuple of struct concatenation and coercion to array" {
381381test "nested runtime conditionals in tuple initializer" {
382382 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
383383 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
384 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
385384
386385 var data: u8 = 0;
387386 const x = .{
test/behavior/tuple_declarations.zig-2
......@@ -7,7 +7,6 @@ const expectEqualStrings = testing.expectEqualStrings;
77test "tuple declaration type info" {
88 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
99 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
10 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
1110
1211 {
1312 const T = struct { comptime u32 align(2) = 1, []const u8 };
......@@ -57,7 +56,6 @@ test "tuple declaration type info" {
5756test "Tuple declaration usage" {
5857 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
5958 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
60 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
6159
6260 const T = struct { u32, []const u8 };
6361 var t: T = .{ 1, "foo" };
test/behavior/type.zig-2
......@@ -200,7 +200,6 @@ test "Type.ErrorUnion" {
200200
201201test "Type.Opaque" {
202202 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
203 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
204203 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
205204 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
206205 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -348,7 +347,6 @@ test "Type.Struct" {
348347}
349348
350349test "Type.Enum" {
351 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
352350 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
353351 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
354352
test/behavior/type_info.zig-1
......@@ -568,7 +568,6 @@ test "value from struct @typeInfo default_value can be loaded at comptime" {
568568test "@typeInfo decls and usingnamespace" {
569569 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
570570 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
571 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
572571
573572 const A = struct {
574573 const x = 5;
test/behavior/typename.zig-2
......@@ -64,7 +64,6 @@ test "anon field init" {
6464}
6565
6666test "basic" {
67 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
6867 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
6968 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
7069 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
......@@ -228,7 +227,6 @@ test "local variable" {
228227}
229228
230229test "comptime parameters not converted to anytype in function type" {
231 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
232230 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
233231 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
234232 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
test/behavior/vector.zig-1
......@@ -1267,7 +1267,6 @@ test "store to vector in slice" {
12671267test "addition of vectors represented as strings" {
12681268 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
12691269 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1270 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
12711270
12721271 const V = @Vector(3, u8);
12731272 const foo: V = "foo".*;