authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-21 05:14:04+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-23 09:27:17+02:00
log2b54437f243ef62a2e490350943bb313d5827639
tree7f06446ee72f6085b8f4c5c96664eb17cad84023
parentfb2c02929e9325d2912d7d0bab1eb501b747c496
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.pie: add sh support

1 files changed, 16 insertions(+), 0 deletions(-)

lib/std/pie.zig+16
...@@ -19,6 +19,7 @@ const R_OR1K_RELATIVE = 21;...@@ -19,6 +19,7 @@ const R_OR1K_RELATIVE = 21;
19const R_PPC_RELATIVE = 22;19const R_PPC_RELATIVE = 22;
20const R_RISCV_RELATIVE = 3;20const R_RISCV_RELATIVE = 3;
21const R_390_RELATIVE = 12;21const R_390_RELATIVE = 12;
22const R_SH_RELATIVE = 165;
22const R_SPARC_RELATIVE = 22;23const R_SPARC_RELATIVE = 22;
2324
24const R_RELATIVE = switch (builtin.cpu.arch) {25const R_RELATIVE = switch (builtin.cpu.arch) {
...@@ -38,6 +39,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {...@@ -38,6 +39,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
38 .powerpc, .powerpcle, .powerpc64, .powerpc64le => R_PPC_RELATIVE,39 .powerpc, .powerpcle, .powerpc64, .powerpc64le => R_PPC_RELATIVE,
39 .riscv32, .riscv32be, .riscv64, .riscv64be => R_RISCV_RELATIVE,40 .riscv32, .riscv32be, .riscv64, .riscv64be => R_RISCV_RELATIVE,
40 .s390x => R_390_RELATIVE,41 .s390x => R_390_RELATIVE,
42 .sh, .sheb => R_SH_RELATIVE,
41 .sparc, .sparc64 => R_SPARC_RELATIVE,43 .sparc, .sparc64 => R_SPARC_RELATIVE,
42 else => @compileError("Missing R_RELATIVE definition for this target"),44 else => @compileError("Missing R_RELATIVE definition for this target"),
43};45};
...@@ -223,6 +225,20 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {...@@ -223,6 +225,20 @@ inline fn getDynamicSymbol() [*]const elf.Dyn {
223 \\ 2:225 \\ 2:
224 : [ret] "=a" (-> [*]const elf.Dyn),226 : [ret] "=a" (-> [*]const elf.Dyn),
225 ),227 ),
228 .sh, .sheb => asm volatile (
229 \\ .weak _DYNAMIC
230 \\ .hidden _DYNAMIC
231 \\ mova 1f, r0
232 \\ mov.l 1f, %[ret]
233 \\ add r0, %[ret]
234 \\ bra 2f
235 \\1:
236 \\ .balign 4
237 \\ .long DYNAMIC - .
238 \\2:
239 : [ret] "=r" (-> [*]const elf.Dyn),
240 :
241 : .{ .r0 = true }),
226 // The compiler does not necessarily have any obligation to load the `l7` register (pointing242 // The compiler does not necessarily have any obligation to load the `l7` register (pointing
227 // to the GOT), so do it ourselves just in case.243 // to the GOT), so do it ourselves just in case.
228 .sparc, .sparc64 => asm volatile (244 .sparc, .sparc64 => asm volatile (