| ... | ... | @@ -1796,12 +1796,12 @@ pub const DwarfInfo = struct { |
| 1796 | 1796 | }; |
| 1797 | 1797 | |
| 1798 | 1798 | var update_tail: ?*RegisterUpdate = null; |
| 1799 | | var has_next_ip = false; |
| 1800 | 1799 | for (context.vm.rowColumns(row)) |column| { |
| 1801 | 1800 | if (column.register) |register| { |
| 1802 | 1801 | if (register == cie.return_address_register) { |
| 1803 | 1802 | has_next_ip = column.rule != .undefined; |
| 1804 | 1803 | } |
| 1804 | std.debug.print(" updated {}\n", .{register}); |
| 1805 | 1805 | |
| 1806 | 1806 | const old_value = try abi.regBytes(context.thread_context, register, context.reg_context); |
| 1807 | 1807 | const new_value = try update_allocator.alloc(u8, old_value.len); |
| ... | ... | @@ -1828,15 +1828,13 @@ pub const DwarfInfo = struct { |
| 1828 | 1828 | update_tail = tail.prev; |
| 1829 | 1829 | } |
| 1830 | 1830 | |
| 1831 | | if (has_next_ip) { |
| 1832 | | context.pc = abi.stripInstructionPtrAuthCode(mem.readIntSliceNative(usize, try abi.regBytes( |
| 1833 | | context.thread_context, |
| 1834 | | cie.return_address_register, |
| 1835 | | context.reg_context, |
| 1836 | | ))); |
| 1837 | | } else { |
| 1838 | | context.pc = 0; |
| 1839 | | } |
| 1831 | context.pc = abi.stripInstructionPtrAuthCode(mem.readIntSliceNative(usize, try abi.regBytes( |
| 1832 | context.thread_context, |
| 1833 | cie.return_address_register, |
| 1834 | context.reg_context, |
| 1835 | ))); |
| 1836 | (try abi.regValueNative(usize, context.thread_context, abi.ipRegNum(), context.reg_context)).* = context.pc; |
| 1837 | std.debug.print(" new context.pc: 0x{x}\n", .{context.pc}); |
| 1840 | 1838 | |
| 1841 | 1839 | (try abi.regValueNative(usize, context.thread_context, abi.spRegNum(context.reg_context), context.reg_context)).* = context.cfa.?; |
| 1842 | 1840 | |