authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-02-20 18:50:20-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-02-20 18:50:20-05:00
log2de7d0b10c29442f556654b61d0c5c4a53047a09
treea8a240d583ff470597a7de81af294487058f0cd5
parent903127f36cf995d251a474438d3ecc6c6e0e30d2
signaturelock-open Commit is signed but in an unrecognized format.

fix zig build, ABI ABI, and update tests to new Target layout

4 files changed, 24 insertions(+), 43 deletions(-)

lib/std/build.zig+13-23
......@@ -1909,43 +1909,33 @@ pub const LibExeObjStep = struct {
19091909 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
19101910
19111911 const all_features = self.target.getArch().allFeaturesList();
1912 var populated_cpu_features = cross.cpu_features.cpu.features;
1913 if (self.target.getArch().subArchFeature()) |sub_arch_index| {
1914 populated_cpu_features.addFeature(sub_arch_index);
1915 }
1912 var populated_cpu_features = cross.cpu.model.features;
19161913 populated_cpu_features.populateDependencies(all_features);
19171914
1918 if (populated_cpu_features.eql(cross.cpu_features.features)) {
1915 if (populated_cpu_features.eql(cross.cpu.features)) {
19191916 // The CPU name alone is sufficient.
19201917 // If it is the baseline CPU, no command line args are required.
1921 if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
1922 try zig_args.append("-target-cpu");
1923 try zig_args.append(cross.cpu_features.cpu.name);
1918 if (cross.cpu.model != Target.Cpu.baseline(self.target.getArch()).model) {
1919 try zig_args.append("-mcpu");
1920 try zig_args.append(cross.cpu.model.name);
19241921 }
19251922 } else {
1926 try zig_args.append("-target-cpu");
1927 try zig_args.append(cross.cpu_features.cpu.name);
1923 var mcpu_buffer = try std.Buffer.init(builder.allocator, "-mcpu=");
1924 try zig_args.append(cross.cpu.model.name);
19281925
1929 try zig_args.append("-target-feature");
1930 var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
19311926 for (all_features) |feature, i_usize| {
19321927 const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
19331928 const in_cpu_set = populated_cpu_features.isEnabled(i);
1934 const in_actual_set = cross.cpu_features.features.isEnabled(i);
1929 const in_actual_set = cross.cpu.features.isEnabled(i);
19351930 if (in_cpu_set and !in_actual_set) {
1936 try feature_str_buffer.appendByte('-');
1937 try feature_str_buffer.append(feature.name);
1938 try feature_str_buffer.appendByte(',');
1931 try mcpu_buffer.appendByte('-');
1932 try mcpu_buffer.append(feature.name);
19391933 } else if (!in_cpu_set and in_actual_set) {
1940 try feature_str_buffer.appendByte('+');
1941 try feature_str_buffer.append(feature.name);
1942 try feature_str_buffer.appendByte(',');
1934 try mcpu_buffer.appendByte('+');
1935 try mcpu_buffer.append(feature.name);
19431936 }
19441937 }
1945 if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
1946 feature_str_buffer.shrink(feature_str_buffer.len() - 1);
1947 }
1948 try zig_args.append(feature_str_buffer.toSliceConst());
1938 try zig_args.append(mcpu_buffer.toSliceConst());
19491939 }
19501940 },
19511941 }
src-self-hosted/stage2.zig+2-2
......@@ -930,7 +930,7 @@ const Stage2Target = extern struct {
930930 const in_arch = in_target.arch - 1; // skip over ZigLLVM_UnknownArch
931931 const in_sub_arch = in_target.sub_arch - 1; // skip over ZigLLVM_NoSubArch
932932 const in_os = in_target.os;
933 const in_abi = in_target.abi - 1; // skip over ZigLLVM_UnknownEnvironment
933 const in_abi = in_target.abi;
934934
935935 return .{
936936 .Cross = .{
......@@ -956,7 +956,7 @@ const Stage2Target = extern struct {
956956 self.sub_arch = 0;
957957 self.vendor = 0;
958958 self.os = @enumToInt(target.getOs());
959 self.abi = @enumToInt(target.getAbi()) + 1; // skip over ZigLLVM_UnknownEnvironment
959 self.abi = @enumToInt(target.getAbi());
960960 try initStage1TargetCpuFeatures(self, cpu);
961961 }
962962};
test/compile_errors.zig+1-2
......@@ -763,8 +763,7 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
763763 });
764764 tc.target = Target{
765765 .Cross = .{
766 .arch = .x86_64,
767 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
766 .cpu = Target.Cpu.baseline(.x86_64),
768767 .os = .linux,
769768 .abi = .gnu,
770769 },
test/translate_c.zig+8-16
......@@ -1113,14 +1113,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
11131113 \\pub fn foo5(a: [*c]f32) callconv(.Thiscall) void;
11141114 });
11151115
1116 cases.addWithTarget("Calling convention", tests.Target{
1117 .Cross = .{
1118 .os = .linux,
1119 .arch = .{ .arm = .v8_5a },
1120 .abi = .none,
1121 .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
1122 },
1123 },
1116 cases.addWithTarget("Calling convention", Target.parse(.{
1117 .arch_os_abi = "arm-linux-none",
1118 .cpu_features = "generic+v8_5a",
1119 }) catch unreachable,
11241120 \\void __attribute__((pcs("aapcs"))) foo1(float *a);
11251121 \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
11261122 , &[_][]const u8{
......@@ -1128,14 +1124,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
11281124 \\pub fn foo2(a: [*c]f32) callconv(.AAPCSVFP) void;
11291125 });
11301126
1131 cases.addWithTarget("Calling convention", tests.Target{
1132 .Cross = .{
1133 .os = .linux,
1134 .arch = .{ .aarch64 = .v8_5a },
1135 .abi = .none,
1136 .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
1137 },
1138 },
1127 cases.addWithTarget("Calling convention", Target.parse(.{
1128 .arch_os_abi = "aarch64-linux-none",
1129 .cpu_features = "generic+v8_5a",
1130 }) catch unreachable,
11391131 \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
11401132 , &[_][]const u8{
11411133 \\pub fn foo1(a: [*c]f32) callconv(.Vectorcall) void;