authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-20 03:43:48+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-23 09:27:17+02:00
log3c5502ed8def9f604bd4338c6276c1f858daecfe
tree6c046a1eb071cceb62aaa911ea93a1e302368ed6
parent493889d5ebd961dabcb53d90c0814f6c71700cff
signature Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.atomic: define cache line size for alpha, hppa, microblaze, sh

1 files changed, 10 insertions(+), 0 deletions(-)

lib/std/atomic.zig+10
......@@ -433,20 +433,29 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {
433433 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mipsle.go#L7
434434 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mips64x.go#L9
435435 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sparc/include/asm/cache.h#L14
436 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/microblaze/include/asm/cache.h#L15
437 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/sh/include/cpu-sh4/cpu/cache.h#L10
436438 .arm,
437439 .armeb,
438440 .thumb,
439441 .thumbeb,
442 .microblaze,
443 .microblazeel,
440444 .mips,
441445 .mipsel,
442446 .mips64,
443447 .mips64el,
448 .sh,
449 .sheb,
444450 .sparc,
445451 .sparc64,
446452 => 32,
447453
448454 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/m68k/include/asm/cache.h#L10
449455 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/openrisc/include/asm/cache.h#L24
456 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/parisc/include/asm/cache.h#L16
457 .hppa,
458 .hppa64,
450459 .m68k,
451460 .or1k,
452461 => 16,
......@@ -469,6 +478,7 @@ pub fn cacheLineForCpu(cpu: std.Target.Cpu) u16 {
469478 // - https://github.com/golang/go/blob/19e923182e590ae6568c2c714f20f32512aeb3e3/src/internal/cpu/cpu_riscv64.go#L7
470479 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/xtensa/variants/csp/include/variant/core.h#L209
471480 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/csky/Kconfig#L183
481 // - https://github.com/torvalds/linux/blob/3a7e02c040b130b5545e4b115aada7bacd80a2b6/arch/alpha/include/asm/cache.h#L11
472482 // - https://www.xmos.com/download/The-XMOS-XS3-Architecture.pdf
473483 else => 64,
474484 };