| ... | ... | @@ -177226,9 +177226,19 @@ fn airAsm(self: *CodeGen, inst: Air.Inst.Index) !void { |
| 177226 | 177226 | 'x' => abi.RegisterClass.sse, |
| 177227 | 177227 | else => unreachable, |
| 177228 | 177228 | }; |
| 177229 | | if (input_mcv.isRegister() and |
| 177230 | | rc.isSet(RegisterManager.indexOfRegIntoTracked(input_mcv.getReg().?).?)) |
| 177231 | | break :arg input_mcv; |
| 177229 | if (input_mcv.isRegister()) { |
| 177230 | const reg = input_mcv.getReg().?; |
| 177231 | if (rc.isSet(RegisterManager.indexOfRegIntoTracked(reg).?)) { |
| 177232 | const alias = registerAlias(reg, @intCast(ty.abiSize(zcu))); |
| 177233 | break :arg switch (input_mcv) { |
| 177234 | else => unreachable, |
| 177235 | .register => .{ .register = alias }, |
| 177236 | .register_offset => |reg_off| .{ |
| 177237 | .register_offset = .{ .reg = alias, .off = reg_off.off }, |
| 177238 | }, |
| 177239 | }; |
| 177240 | } |
| 177241 | } |
| 177232 | 177242 | const reg = try self.register_manager.allocReg(null, rc); |
| 177233 | 177243 | try self.genSetReg(reg, ty, input_mcv, .{}); |
| 177234 | 177244 | break :arg .{ .register = registerAlias(reg, @intCast(ty.abiSize(zcu))) }; |