| ... | ... | @@ -1011,7 +1011,7 @@ static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) |
| 1011 | 1011 | } |
| 1012 | 1012 | } |
| 1013 | 1013 | |
| 1014 | | static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) { |
| 1014 | static void ir_ref_inst_gen(IrInstGen *instruction) { |
| 1015 | 1015 | assert(instruction->id != IrInstGenIdInvalid); |
| 1016 | 1016 | instruction->base.ref_count += 1; |
| 1017 | 1017 | } |
| ... | ... | @@ -2038,7 +2038,7 @@ static IrInstGen *ir_build_cast(IrAnalyze *ira, IrInst *source_instr,ZigType *de |
| 2038 | 2038 | inst->value = value; |
| 2039 | 2039 | inst->cast_op = cast_op; |
| 2040 | 2040 | |
| 2041 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 2041 | ir_ref_inst_gen(value); |
| 2042 | 2042 | |
| 2043 | 2043 | return &inst->base; |
| 2044 | 2044 | } |
| ... | ... | @@ -2069,7 +2069,7 @@ static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrI |
| 2069 | 2069 | inst->then_block = then_block; |
| 2070 | 2070 | inst->else_block = else_block; |
| 2071 | 2071 | |
| 2072 | | ir_ref_inst_gen(condition, ira->new_irb.current_basic_block); |
| 2072 | ir_ref_inst_gen(condition); |
| 2073 | 2073 | |
| 2074 | 2074 | return &inst->base; |
| 2075 | 2075 | } |
| ... | ... | @@ -2089,7 +2089,7 @@ static IrInstGen *ir_build_return_gen(IrAnalyze *ira, IrInst *source_inst, IrIns |
| 2089 | 2089 | source_inst->scope, source_inst->source_node); |
| 2090 | 2090 | inst->operand = operand; |
| 2091 | 2091 | |
| 2092 | | if (operand != nullptr) ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 2092 | if (operand != nullptr) ir_ref_inst_gen(operand); |
| 2093 | 2093 | |
| 2094 | 2094 | return &inst->base; |
| 2095 | 2095 | } |
| ... | ... | @@ -2237,8 +2237,8 @@ static IrInstGen *ir_build_bin_op_gen(IrAnalyze *ira, IrInst *source_instr, ZigT |
| 2237 | 2237 | inst->op2 = op2; |
| 2238 | 2238 | inst->safety_check_on = safety_check_on; |
| 2239 | 2239 | |
| 2240 | | ir_ref_inst_gen(op1, ira->new_irb.current_basic_block); |
| 2241 | | ir_ref_inst_gen(op2, ira->new_irb.current_basic_block); |
| 2240 | ir_ref_inst_gen(op1); |
| 2241 | ir_ref_inst_gen(op2); |
| 2242 | 2242 | |
| 2243 | 2243 | return &inst->base; |
| 2244 | 2244 | } |
| ... | ... | @@ -2315,8 +2315,8 @@ static IrInstGen *ir_build_elem_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *s |
| 2315 | 2315 | instruction->elem_index = elem_index; |
| 2316 | 2316 | instruction->safety_check_on = safety_check_on; |
| 2317 | 2317 | |
| 2318 | | ir_ref_inst_gen(array_ptr, ira->new_irb.current_basic_block); |
| 2319 | | ir_ref_inst_gen(elem_index, ira->new_irb.current_basic_block); |
| 2318 | ir_ref_inst_gen(array_ptr); |
| 2319 | ir_ref_inst_gen(elem_index); |
| 2320 | 2320 | |
| 2321 | 2321 | return &instruction->base; |
| 2322 | 2322 | } |
| ... | ... | @@ -2371,7 +2371,7 @@ static IrInstGen *ir_build_struct_field_ptr(IrAnalyze *ira, IrInst *source_instr |
| 2371 | 2371 | inst->struct_ptr = struct_ptr; |
| 2372 | 2372 | inst->field = field; |
| 2373 | 2373 | |
| 2374 | | ir_ref_inst_gen(struct_ptr, ira->new_irb.current_basic_block); |
| 2374 | ir_ref_inst_gen(struct_ptr); |
| 2375 | 2375 | |
| 2376 | 2376 | return &inst->base; |
| 2377 | 2377 | } |
| ... | ... | @@ -2387,7 +2387,7 @@ static IrInstGen *ir_build_union_field_ptr(IrAnalyze *ira, IrInst *source_instr, |
| 2387 | 2387 | inst->union_ptr = union_ptr; |
| 2388 | 2388 | inst->field = field; |
| 2389 | 2389 | |
| 2390 | | ir_ref_inst_gen(union_ptr, ira->new_irb.current_basic_block); |
| 2390 | ir_ref_inst_gen(union_ptr); |
| 2391 | 2391 | |
| 2392 | 2392 | return &inst->base; |
| 2393 | 2393 | } |
| ... | ... | @@ -2469,11 +2469,11 @@ static IrInstGenCall *ir_build_call_gen(IrAnalyze *ira, IrInst *source_instructi |
| 2469 | 2469 | call_instruction->new_stack = new_stack; |
| 2470 | 2470 | call_instruction->result_loc = result_loc; |
| 2471 | 2471 | |
| 2472 | | if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref, ira->new_irb.current_basic_block); |
| 2472 | if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref); |
| 2473 | 2473 | for (size_t i = 0; i < arg_count; i += 1) |
| 2474 | | ir_ref_inst_gen(args[i], ira->new_irb.current_basic_block); |
| 2475 | | if (new_stack != nullptr) ir_ref_inst_gen(new_stack, ira->new_irb.current_basic_block); |
| 2476 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 2474 | ir_ref_inst_gen(args[i]); |
| 2475 | if (new_stack != nullptr) ir_ref_inst_gen(new_stack); |
| 2476 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 2477 | 2477 | |
| 2478 | 2478 | return call_instruction; |
| 2479 | 2479 | } |
| ... | ... | @@ -2513,7 +2513,7 @@ static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t |
| 2513 | 2513 | phi_instruction->incoming_values = incoming_values; |
| 2514 | 2514 | |
| 2515 | 2515 | for (size_t i = 0; i < incoming_count; i += 1) { |
| 2516 | | ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block); |
| 2516 | ir_ref_inst_gen(incoming_values[i]); |
| 2517 | 2517 | } |
| 2518 | 2518 | |
| 2519 | 2519 | return &phi_instruction->base; |
| ... | ... | @@ -2589,7 +2589,7 @@ static IrInstGen *ir_build_negation(IrAnalyze *ira, IrInst *source_instr, IrInst |
| 2589 | 2589 | instruction->base.value->type = expr_type; |
| 2590 | 2590 | instruction->operand = operand; |
| 2591 | 2591 | |
| 2592 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 2592 | ir_ref_inst_gen(operand); |
| 2593 | 2593 | |
| 2594 | 2594 | return &instruction->base; |
| 2595 | 2595 | } |
| ... | ... | @@ -2602,7 +2602,7 @@ static IrInstGen *ir_build_negation_wrapping(IrAnalyze *ira, IrInst *source_inst |
| 2602 | 2602 | instruction->base.value->type = expr_type; |
| 2603 | 2603 | instruction->operand = operand; |
| 2604 | 2604 | |
| 2605 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 2605 | ir_ref_inst_gen(operand); |
| 2606 | 2606 | |
| 2607 | 2607 | return &instruction->base; |
| 2608 | 2608 | } |
| ... | ... | @@ -2615,7 +2615,7 @@ static IrInstGen *ir_build_binary_not(IrAnalyze *ira, IrInst *source_instr, IrIn |
| 2615 | 2615 | instruction->base.value->type = expr_type; |
| 2616 | 2616 | instruction->operand = operand; |
| 2617 | 2617 | |
| 2618 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 2618 | ir_ref_inst_gen(operand); |
| 2619 | 2619 | |
| 2620 | 2620 | return &instruction->base; |
| 2621 | 2621 | } |
| ... | ... | @@ -2686,8 +2686,8 @@ static IrInstGen *ir_build_store_ptr_gen(IrAnalyze *ira, IrInst *source_instr, I |
| 2686 | 2686 | instruction->ptr = ptr; |
| 2687 | 2687 | instruction->value = value; |
| 2688 | 2688 | |
| 2689 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 2690 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 2689 | ir_ref_inst_gen(ptr); |
| 2690 | ir_ref_inst_gen(value); |
| 2691 | 2691 | |
| 2692 | 2692 | return &instruction->base; |
| 2693 | 2693 | } |
| ... | ... | @@ -2701,9 +2701,9 @@ static IrInstGen *ir_build_vector_store_elem(IrAnalyze *ira, IrInst *src_inst, |
| 2701 | 2701 | inst->index = index; |
| 2702 | 2702 | inst->value = value; |
| 2703 | 2703 | |
| 2704 | | ir_ref_inst_gen(vector_ptr, ira->new_irb.current_basic_block); |
| 2705 | | ir_ref_inst_gen(index, ira->new_irb.current_basic_block); |
| 2706 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 2704 | ir_ref_inst_gen(vector_ptr); |
| 2705 | ir_ref_inst_gen(index); |
| 2706 | ir_ref_inst_gen(value); |
| 2707 | 2707 | |
| 2708 | 2708 | return &inst->base; |
| 2709 | 2709 | } |
| ... | ... | @@ -2732,7 +2732,7 @@ static IrInstGen *ir_build_var_decl_gen(IrAnalyze *ira, IrInst *source_instructi |
| 2732 | 2732 | inst->var = var; |
| 2733 | 2733 | inst->var_ptr = var_ptr; |
| 2734 | 2734 | |
| 2735 | | ir_ref_inst_gen(var_ptr, ira->new_irb.current_basic_block); |
| 2735 | ir_ref_inst_gen(var_ptr); |
| 2736 | 2736 | |
| 2737 | 2737 | return &inst->base; |
| 2738 | 2738 | } |
| ... | ... | @@ -2769,8 +2769,8 @@ static IrInstGen *ir_build_load_ptr_gen(IrAnalyze *ira, IrInst *source_instructi |
| 2769 | 2769 | instruction->ptr = ptr; |
| 2770 | 2770 | instruction->result_loc = result_loc; |
| 2771 | 2771 | |
| 2772 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 2773 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 2772 | ir_ref_inst_gen(ptr); |
| 2773 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 2774 | 2774 | |
| 2775 | 2775 | return &instruction->base; |
| 2776 | 2776 | } |
| ... | ... | @@ -2921,12 +2921,12 @@ static IrInstGen *ir_build_asm_gen(IrAnalyze *ira, IrInst *source_instr, |
| 2921 | 2921 | assert(source_instr->source_node->type == NodeTypeAsmExpr); |
| 2922 | 2922 | for (size_t i = 0; i < source_instr->source_node->data.asm_expr.output_list.length; i += 1) { |
| 2923 | 2923 | IrInstGen *output_type = output_types[i]; |
| 2924 | | if (output_type) ir_ref_inst_gen(output_type, ira->new_irb.current_basic_block); |
| 2924 | if (output_type) ir_ref_inst_gen(output_type); |
| 2925 | 2925 | } |
| 2926 | 2926 | |
| 2927 | 2927 | for (size_t i = 0; i < source_instr->source_node->data.asm_expr.input_list.length; i += 1) { |
| 2928 | 2928 | IrInstGen *input_value = input_list[i]; |
| 2929 | | ir_ref_inst_gen(input_value, ira->new_irb.current_basic_block); |
| 2929 | ir_ref_inst_gen(input_value); |
| 2930 | 2930 | } |
| 2931 | 2931 | |
| 2932 | 2932 | return &instruction->base; |
| ... | ... | @@ -2961,7 +2961,7 @@ static IrInstGen *ir_build_test_non_null_gen(IrAnalyze *ira, IrInst *source_inst |
| 2961 | 2961 | inst->base.value->type = ira->codegen->builtin_types.entry_bool; |
| 2962 | 2962 | inst->value = value; |
| 2963 | 2963 | |
| 2964 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 2964 | ir_ref_inst_gen(value); |
| 2965 | 2965 | |
| 2966 | 2966 | return &inst->base; |
| 2967 | 2967 | } |
| ... | ... | @@ -2989,7 +2989,7 @@ static IrInstGen *ir_build_optional_unwrap_ptr_gen(IrAnalyze *ira, IrInst *sourc |
| 2989 | 2989 | inst->safety_check_on = safety_check_on; |
| 2990 | 2990 | inst->initializing = initializing; |
| 2991 | 2991 | |
| 2992 | | ir_ref_inst_gen(base_ptr, ira->new_irb.current_basic_block); |
| 2992 | ir_ref_inst_gen(base_ptr); |
| 2993 | 2993 | |
| 2994 | 2994 | return &inst->base; |
| 2995 | 2995 | } |
| ... | ... | @@ -3003,8 +3003,8 @@ static IrInstGen *ir_build_optional_wrap(IrAnalyze *ira, IrInst *source_instruct |
| 3003 | 3003 | instruction->operand = operand; |
| 3004 | 3004 | instruction->result_loc = result_loc; |
| 3005 | 3005 | |
| 3006 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 3007 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3006 | ir_ref_inst_gen(operand); |
| 3007 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3008 | 3008 | |
| 3009 | 3009 | return &instruction->base; |
| 3010 | 3010 | } |
| ... | ... | @@ -3018,8 +3018,8 @@ static IrInstGen *ir_build_err_wrap_payload(IrAnalyze *ira, IrInst *source_instr |
| 3018 | 3018 | instruction->operand = operand; |
| 3019 | 3019 | instruction->result_loc = result_loc; |
| 3020 | 3020 | |
| 3021 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 3022 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3021 | ir_ref_inst_gen(operand); |
| 3022 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3023 | 3023 | |
| 3024 | 3024 | return &instruction->base; |
| 3025 | 3025 | } |
| ... | ... | @@ -3033,8 +3033,8 @@ static IrInstGen *ir_build_err_wrap_code(IrAnalyze *ira, IrInst *source_instruct |
| 3033 | 3033 | instruction->operand = operand; |
| 3034 | 3034 | instruction->result_loc = result_loc; |
| 3035 | 3035 | |
| 3036 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 3037 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3036 | ir_ref_inst_gen(operand); |
| 3037 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3038 | 3038 | |
| 3039 | 3039 | return &instruction->base; |
| 3040 | 3040 | } |
| ... | ... | @@ -3058,7 +3058,7 @@ static IrInstGen *ir_build_clz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType |
| 3058 | 3058 | instruction->base.value->type = result_type; |
| 3059 | 3059 | instruction->op = op; |
| 3060 | 3060 | |
| 3061 | | ir_ref_inst_gen(op, ira->new_irb.current_basic_block); |
| 3061 | ir_ref_inst_gen(op); |
| 3062 | 3062 | |
| 3063 | 3063 | return &instruction->base; |
| 3064 | 3064 | } |
| ... | ... | @@ -3082,7 +3082,7 @@ static IrInstGen *ir_build_ctz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType |
| 3082 | 3082 | instruction->base.value->type = result_type; |
| 3083 | 3083 | instruction->op = op; |
| 3084 | 3084 | |
| 3085 | | ir_ref_inst_gen(op, ira->new_irb.current_basic_block); |
| 3085 | ir_ref_inst_gen(op); |
| 3086 | 3086 | |
| 3087 | 3087 | return &instruction->base; |
| 3088 | 3088 | } |
| ... | ... | @@ -3108,7 +3108,7 @@ static IrInstGen *ir_build_pop_count_gen(IrAnalyze *ira, IrInst *source_instr, Z |
| 3108 | 3108 | instruction->base.value->type = result_type; |
| 3109 | 3109 | instruction->op = op; |
| 3110 | 3110 | |
| 3111 | | ir_ref_inst_gen(op, ira->new_irb.current_basic_block); |
| 3111 | ir_ref_inst_gen(op); |
| 3112 | 3112 | |
| 3113 | 3113 | return &instruction->base; |
| 3114 | 3114 | } |
| ... | ... | @@ -3134,7 +3134,7 @@ static IrInstGen *ir_build_bswap_gen(IrAnalyze *ira, IrInst *source_instr, ZigTy |
| 3134 | 3134 | instruction->base.value->type = op_type; |
| 3135 | 3135 | instruction->op = op; |
| 3136 | 3136 | |
| 3137 | | ir_ref_inst_gen(op, ira->new_irb.current_basic_block); |
| 3137 | ir_ref_inst_gen(op); |
| 3138 | 3138 | |
| 3139 | 3139 | return &instruction->base; |
| 3140 | 3140 | } |
| ... | ... | @@ -3160,7 +3160,7 @@ static IrInstGen *ir_build_bit_reverse_gen(IrAnalyze *ira, IrInst *source_instr, |
| 3160 | 3160 | instruction->base.value->type = int_type; |
| 3161 | 3161 | instruction->op = op; |
| 3162 | 3162 | |
| 3163 | | ir_ref_inst_gen(op, ira->new_irb.current_basic_block); |
| 3163 | ir_ref_inst_gen(op); |
| 3164 | 3164 | |
| 3165 | 3165 | return &instruction->base; |
| 3166 | 3166 | } |
| ... | ... | @@ -3201,10 +3201,10 @@ static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_ |
| 3201 | 3201 | instruction->case_count = case_count; |
| 3202 | 3202 | instruction->cases = cases; |
| 3203 | 3203 | |
| 3204 | | ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block); |
| 3204 | ir_ref_inst_gen(target_value); |
| 3205 | 3205 | |
| 3206 | 3206 | for (size_t i = 0; i < case_count; i += 1) { |
| 3207 | | ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block); |
| 3207 | ir_ref_inst_gen(cases[i].value); |
| 3208 | 3208 | } |
| 3209 | 3209 | |
| 3210 | 3210 | return instruction; |
| ... | ... | @@ -3257,7 +3257,7 @@ static IrInstGen *ir_build_union_tag(IrAnalyze *ira, IrInst *source_instr, IrIns |
| 3257 | 3257 | instruction->value = value; |
| 3258 | 3258 | instruction->base.value->type = tag_type; |
| 3259 | 3259 | |
| 3260 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 3260 | ir_ref_inst_gen(value); |
| 3261 | 3261 | |
| 3262 | 3262 | return &instruction->base; |
| 3263 | 3263 | } |
| ... | ... | @@ -3289,8 +3289,8 @@ static IrInstGen *ir_build_ref_gen(IrAnalyze *ira, IrInst *source_instruction, Z |
| 3289 | 3289 | instruction->operand = operand; |
| 3290 | 3290 | instruction->result_loc = result_loc; |
| 3291 | 3291 | |
| 3292 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 3293 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3292 | ir_ref_inst_gen(operand); |
| 3293 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3294 | 3294 | |
| 3295 | 3295 | return &instruction->base; |
| 3296 | 3296 | } |
| ... | ... | @@ -3335,7 +3335,7 @@ static IrInstGen *ir_build_err_name_gen(IrAnalyze *ira, IrInst *source_instr, Ir |
| 3335 | 3335 | instruction->base.value->type = str_type; |
| 3336 | 3336 | instruction->value = value; |
| 3337 | 3337 | |
| 3338 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 3338 | ir_ref_inst_gen(value); |
| 3339 | 3339 | |
| 3340 | 3340 | return &instruction->base; |
| 3341 | 3341 | } |
| ... | ... | @@ -3422,10 +3422,10 @@ static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instructio |
| 3422 | 3422 | instruction->is_weak = is_weak; |
| 3423 | 3423 | instruction->result_loc = result_loc; |
| 3424 | 3424 | |
| 3425 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 3426 | | ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block); |
| 3427 | | ir_ref_inst_gen(new_value, ira->new_irb.current_basic_block); |
| 3428 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3425 | ir_ref_inst_gen(ptr); |
| 3426 | ir_ref_inst_gen(cmp_value); |
| 3427 | ir_ref_inst_gen(new_value); |
| 3428 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3429 | 3429 | |
| 3430 | 3430 | return &instruction->base; |
| 3431 | 3431 | } |
| ... | ... | @@ -3468,7 +3468,7 @@ static IrInstGen *ir_build_truncate_gen(IrAnalyze *ira, IrInst *source_instr, Zi |
| 3468 | 3468 | instruction->base.value->type = dest_type; |
| 3469 | 3469 | instruction->target = target; |
| 3470 | 3470 | |
| 3471 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 3471 | ir_ref_inst_gen(target); |
| 3472 | 3472 | |
| 3473 | 3473 | return &instruction->base; |
| 3474 | 3474 | } |
| ... | ... | @@ -3586,9 +3586,9 @@ static IrInstGen *ir_build_shuffle_vector_gen(IrAnalyze *ira, Scope *scope, AstN |
| 3586 | 3586 | inst->b = b; |
| 3587 | 3587 | inst->mask = mask; |
| 3588 | 3588 | |
| 3589 | | ir_ref_inst_gen(a, ira->new_irb.current_basic_block); |
| 3590 | | ir_ref_inst_gen(b, ira->new_irb.current_basic_block); |
| 3591 | | ir_ref_inst_gen(mask, ira->new_irb.current_basic_block); |
| 3589 | ir_ref_inst_gen(a); |
| 3590 | ir_ref_inst_gen(b); |
| 3591 | ir_ref_inst_gen(mask); |
| 3592 | 3592 | |
| 3593 | 3593 | return &inst->base; |
| 3594 | 3594 | } |
| ... | ... | @@ -3614,7 +3614,7 @@ static IrInstGen *ir_build_splat_gen(IrAnalyze *ira, IrInst *source_instruction, |
| 3614 | 3614 | instruction->base.value->type = result_type; |
| 3615 | 3615 | instruction->scalar = scalar; |
| 3616 | 3616 | |
| 3617 | | ir_ref_inst_gen(scalar, ira->new_irb.current_basic_block); |
| 3617 | ir_ref_inst_gen(scalar); |
| 3618 | 3618 | |
| 3619 | 3619 | return &instruction->base; |
| 3620 | 3620 | } |
| ... | ... | @@ -3634,7 +3634,7 @@ static IrInstGen *ir_build_bool_not_gen(IrAnalyze *ira, IrInst *source_instr, Ir |
| 3634 | 3634 | instruction->base.value->type = ira->codegen->builtin_types.entry_bool; |
| 3635 | 3635 | instruction->value = value; |
| 3636 | 3636 | |
| 3637 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 3637 | ir_ref_inst_gen(value); |
| 3638 | 3638 | |
| 3639 | 3639 | return &instruction->base; |
| 3640 | 3640 | } |
| ... | ... | @@ -3663,9 +3663,9 @@ static IrInstGen *ir_build_memset_gen(IrAnalyze *ira, IrInst *source_instr, |
| 3663 | 3663 | instruction->byte = byte; |
| 3664 | 3664 | instruction->count = count; |
| 3665 | 3665 | |
| 3666 | | ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block); |
| 3667 | | ir_ref_inst_gen(byte, ira->new_irb.current_basic_block); |
| 3668 | | ir_ref_inst_gen(count, ira->new_irb.current_basic_block); |
| 3666 | ir_ref_inst_gen(dest_ptr); |
| 3667 | ir_ref_inst_gen(byte); |
| 3668 | ir_ref_inst_gen(count); |
| 3669 | 3669 | |
| 3670 | 3670 | return &instruction->base; |
| 3671 | 3671 | } |
| ... | ... | @@ -3694,9 +3694,9 @@ static IrInstGen *ir_build_memcpy_gen(IrAnalyze *ira, IrInst *source_instr, |
| 3694 | 3694 | instruction->src_ptr = src_ptr; |
| 3695 | 3695 | instruction->count = count; |
| 3696 | 3696 | |
| 3697 | | ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block); |
| 3698 | | ir_ref_inst_gen(src_ptr, ira->new_irb.current_basic_block); |
| 3699 | | ir_ref_inst_gen(count, ira->new_irb.current_basic_block); |
| 3697 | ir_ref_inst_gen(dest_ptr); |
| 3698 | ir_ref_inst_gen(src_ptr); |
| 3699 | ir_ref_inst_gen(count); |
| 3700 | 3700 | |
| 3701 | 3701 | return &instruction->base; |
| 3702 | 3702 | } |
| ... | ... | @@ -3735,10 +3735,10 @@ static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, |
| 3735 | 3735 | instruction->result_loc = result_loc; |
| 3736 | 3736 | instruction->sentinel = sentinel; |
| 3737 | 3737 | |
| 3738 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 3739 | | ir_ref_inst_gen(start, ira->new_irb.current_basic_block); |
| 3740 | | if (end != nullptr) ir_ref_inst_gen(end, ira->new_irb.current_basic_block); |
| 3741 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 3738 | ir_ref_inst_gen(ptr); |
| 3739 | ir_ref_inst_gen(start); |
| 3740 | if (end != nullptr) ir_ref_inst_gen(end); |
| 3741 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 3742 | 3742 | |
| 3743 | 3743 | return &instruction->base; |
| 3744 | 3744 | } |
| ... | ... | @@ -3811,7 +3811,7 @@ static IrInstGen *ir_build_frame_size_gen(IrAnalyze *ira, IrInst *source_instr, |
| 3811 | 3811 | inst->base.value->type = ira->codegen->builtin_types.entry_usize; |
| 3812 | 3812 | inst->fn = fn; |
| 3813 | 3813 | |
| 3814 | | ir_ref_inst_gen(fn, ira->new_irb.current_basic_block); |
| 3814 | ir_ref_inst_gen(fn); |
| 3815 | 3815 | |
| 3816 | 3816 | return &inst->base; |
| 3817 | 3817 | } |
| ... | ... | @@ -3847,9 +3847,9 @@ static IrInstGen *ir_build_overflow_op_gen(IrAnalyze *ira, IrInst *source_instr, |
| 3847 | 3847 | instruction->result_ptr = result_ptr; |
| 3848 | 3848 | instruction->result_ptr_type = result_ptr_type; |
| 3849 | 3849 | |
| 3850 | | ir_ref_inst_gen(op1, ira->new_irb.current_basic_block); |
| 3851 | | ir_ref_inst_gen(op2, ira->new_irb.current_basic_block); |
| 3852 | | ir_ref_inst_gen(result_ptr, ira->new_irb.current_basic_block); |
| 3850 | ir_ref_inst_gen(op1); |
| 3851 | ir_ref_inst_gen(op2); |
| 3852 | ir_ref_inst_gen(result_ptr); |
| 3853 | 3853 | |
| 3854 | 3854 | return &instruction->base; |
| 3855 | 3855 | } |
| ... | ... | @@ -3875,7 +3875,7 @@ static IrInstGen *ir_build_float_op_gen(IrAnalyze *ira, IrInst *source_instr, Ir |
| 3875 | 3875 | instruction->operand = operand; |
| 3876 | 3876 | instruction->fn_id = fn_id; |
| 3877 | 3877 | |
| 3878 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 3878 | ir_ref_inst_gen(operand); |
| 3879 | 3879 | |
| 3880 | 3880 | return &instruction->base; |
| 3881 | 3881 | } |
| ... | ... | @@ -3907,9 +3907,9 @@ static IrInstGen *ir_build_mul_add_gen(IrAnalyze *ira, IrInst *source_instr, IrI |
| 3907 | 3907 | instruction->op2 = op2; |
| 3908 | 3908 | instruction->op3 = op3; |
| 3909 | 3909 | |
| 3910 | | ir_ref_inst_gen(op1, ira->new_irb.current_basic_block); |
| 3911 | | ir_ref_inst_gen(op2, ira->new_irb.current_basic_block); |
| 3912 | | ir_ref_inst_gen(op3, ira->new_irb.current_basic_block); |
| 3910 | ir_ref_inst_gen(op1); |
| 3911 | ir_ref_inst_gen(op2); |
| 3912 | ir_ref_inst_gen(op3); |
| 3913 | 3913 | |
| 3914 | 3914 | return &instruction->base; |
| 3915 | 3915 | } |
| ... | ... | @@ -3942,7 +3942,7 @@ static IrInstGen *ir_build_test_err_gen(IrAnalyze *ira, IrInst *source_instructi |
| 3942 | 3942 | instruction->base.value->type = ira->codegen->builtin_types.entry_bool; |
| 3943 | 3943 | instruction->err_union = err_union; |
| 3944 | 3944 | |
| 3945 | | ir_ref_inst_gen(err_union, ira->new_irb.current_basic_block); |
| 3945 | ir_ref_inst_gen(err_union); |
| 3946 | 3946 | |
| 3947 | 3947 | return &instruction->base; |
| 3948 | 3948 | } |
| ... | ... | @@ -3965,7 +3965,7 @@ static IrInstGen *ir_build_unwrap_err_code_gen(IrAnalyze *ira, Scope *scope, Ast |
| 3965 | 3965 | inst->base.value->type = result_type; |
| 3966 | 3966 | inst->err_union_ptr = err_union_ptr; |
| 3967 | 3967 | |
| 3968 | | ir_ref_inst_gen(err_union_ptr, ira->new_irb.current_basic_block); |
| 3968 | ir_ref_inst_gen(err_union_ptr); |
| 3969 | 3969 | |
| 3970 | 3970 | return &inst->base; |
| 3971 | 3971 | } |
| ... | ... | @@ -3992,7 +3992,7 @@ static IrInstGen *ir_build_unwrap_err_payload_gen(IrAnalyze *ira, Scope *scope, |
| 3992 | 3992 | inst->safety_check_on = safety_check_on; |
| 3993 | 3993 | inst->initializing = initializing; |
| 3994 | 3994 | |
| 3995 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 3995 | ir_ref_inst_gen(value); |
| 3996 | 3996 | |
| 3997 | 3997 | return &inst->base; |
| 3998 | 3998 | } |
| ... | ... | @@ -4054,7 +4054,7 @@ static IrInstGen *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInst *source_instructi |
| 4054 | 4054 | instruction->ptr = ptr; |
| 4055 | 4055 | instruction->safety_check_on = safety_check_on; |
| 4056 | 4056 | |
| 4057 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 4057 | ir_ref_inst_gen(ptr); |
| 4058 | 4058 | |
| 4059 | 4059 | return &instruction->base; |
| 4060 | 4060 | } |
| ... | ... | @@ -4091,7 +4091,7 @@ static IrInstGen *ir_build_bit_cast_gen(IrAnalyze *ira, IrInst *source_instructi |
| 4091 | 4091 | instruction->base.value->type = ty; |
| 4092 | 4092 | instruction->operand = operand; |
| 4093 | 4093 | |
| 4094 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 4094 | ir_ref_inst_gen(operand); |
| 4095 | 4095 | |
| 4096 | 4096 | return &instruction->base; |
| 4097 | 4097 | } |
| ... | ... | @@ -4103,7 +4103,7 @@ static IrInstGen *ir_build_widen_or_shorten(IrAnalyze *ira, Scope *scope, AstNod |
| 4103 | 4103 | inst->base.value->type = result_type; |
| 4104 | 4104 | inst->target = target; |
| 4105 | 4105 | |
| 4106 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4106 | ir_ref_inst_gen(target); |
| 4107 | 4107 | |
| 4108 | 4108 | return &inst->base; |
| 4109 | 4109 | } |
| ... | ... | @@ -4128,7 +4128,7 @@ static IrInstGen *ir_build_int_to_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode |
| 4128 | 4128 | instruction->base.value->type = ptr_type; |
| 4129 | 4129 | instruction->target = target; |
| 4130 | 4130 | |
| 4131 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4131 | ir_ref_inst_gen(target); |
| 4132 | 4132 | |
| 4133 | 4133 | return &instruction->base; |
| 4134 | 4134 | } |
| ... | ... | @@ -4149,7 +4149,7 @@ static IrInstGen *ir_build_ptr_to_int_gen(IrAnalyze *ira, IrInst *source_instr, |
| 4149 | 4149 | inst->base.value->type = ira->codegen->builtin_types.entry_usize; |
| 4150 | 4150 | inst->target = target; |
| 4151 | 4151 | |
| 4152 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4152 | ir_ref_inst_gen(target); |
| 4153 | 4153 | |
| 4154 | 4154 | return &inst->base; |
| 4155 | 4155 | } |
| ... | ... | @@ -4174,7 +4174,7 @@ static IrInstGen *ir_build_int_to_enum_gen(IrAnalyze *ira, Scope *scope, AstNode |
| 4174 | 4174 | instruction->base.value->type = dest_type; |
| 4175 | 4175 | instruction->target = target; |
| 4176 | 4176 | |
| 4177 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4177 | ir_ref_inst_gen(target); |
| 4178 | 4178 | |
| 4179 | 4179 | return &instruction->base; |
| 4180 | 4180 | } |
| ... | ... | @@ -4209,7 +4209,7 @@ static IrInstGen *ir_build_int_to_err_gen(IrAnalyze *ira, Scope *scope, AstNode |
| 4209 | 4209 | instruction->base.value->type = wanted_type; |
| 4210 | 4210 | instruction->target = target; |
| 4211 | 4211 | |
| 4212 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4212 | ir_ref_inst_gen(target); |
| 4213 | 4213 | |
| 4214 | 4214 | return &instruction->base; |
| 4215 | 4215 | } |
| ... | ... | @@ -4233,7 +4233,7 @@ static IrInstGen *ir_build_err_to_int_gen(IrAnalyze *ira, Scope *scope, AstNode |
| 4233 | 4233 | instruction->base.value->type = wanted_type; |
| 4234 | 4234 | instruction->target = target; |
| 4235 | 4235 | |
| 4236 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4236 | ir_ref_inst_gen(target); |
| 4237 | 4237 | |
| 4238 | 4238 | return &instruction->base; |
| 4239 | 4239 | } |
| ... | ... | @@ -4305,7 +4305,7 @@ static IrInstGen *ir_build_panic_gen(IrAnalyze *ira, IrInst *source_instr, IrIns |
| 4305 | 4305 | source_instr->scope, source_instr->source_node); |
| 4306 | 4306 | instruction->msg = msg; |
| 4307 | 4307 | |
| 4308 | | ir_ref_inst_gen(msg, ira->new_irb.current_basic_block); |
| 4308 | ir_ref_inst_gen(msg); |
| 4309 | 4309 | |
| 4310 | 4310 | return &instruction->base; |
| 4311 | 4311 | } |
| ... | ... | @@ -4327,7 +4327,7 @@ static IrInstGen *ir_build_tag_name_gen(IrAnalyze *ira, IrInst *source_instr, Ir |
| 4327 | 4327 | instruction->base.value->type = result_type; |
| 4328 | 4328 | instruction->target = target; |
| 4329 | 4329 | |
| 4330 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4330 | ir_ref_inst_gen(target); |
| 4331 | 4331 | |
| 4332 | 4332 | return &instruction->base; |
| 4333 | 4333 | } |
| ... | ... | @@ -4368,7 +4368,7 @@ static IrInstGen *ir_build_field_parent_ptr_gen(IrAnalyze *ira, IrInst *source_i |
| 4368 | 4368 | inst->field_ptr = field_ptr; |
| 4369 | 4369 | inst->field = field; |
| 4370 | 4370 | |
| 4371 | | ir_ref_inst_gen(field_ptr, ira->new_irb.current_basic_block); |
| 4371 | ir_ref_inst_gen(field_ptr); |
| 4372 | 4372 | |
| 4373 | 4373 | return &inst->base; |
| 4374 | 4374 | } |
| ... | ... | @@ -4448,7 +4448,7 @@ static IrInstGen *ir_build_align_cast_gen(IrAnalyze *ira, Scope *scope, AstNode |
| 4448 | 4448 | instruction->base.value->type = result_type; |
| 4449 | 4449 | instruction->target = target; |
| 4450 | 4450 | |
| 4451 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4451 | ir_ref_inst_gen(target); |
| 4452 | 4452 | |
| 4453 | 4453 | return &instruction->base; |
| 4454 | 4454 | } |
| ... | ... | @@ -4568,8 +4568,8 @@ static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr, |
| 4568 | 4568 | instruction->operand = operand; |
| 4569 | 4569 | instruction->ordering = ordering; |
| 4570 | 4570 | |
| 4571 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 4572 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 4571 | ir_ref_inst_gen(ptr); |
| 4572 | ir_ref_inst_gen(operand); |
| 4573 | 4573 | |
| 4574 | 4574 | return &instruction->base; |
| 4575 | 4575 | } |
| ... | ... | @@ -4598,7 +4598,7 @@ static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr, |
| 4598 | 4598 | instruction->ptr = ptr; |
| 4599 | 4599 | instruction->ordering = ordering; |
| 4600 | 4600 | |
| 4601 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 4601 | ir_ref_inst_gen(ptr); |
| 4602 | 4602 | |
| 4603 | 4603 | return &instruction->base; |
| 4604 | 4604 | } |
| ... | ... | @@ -4629,8 +4629,8 @@ static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr |
| 4629 | 4629 | instruction->value = value; |
| 4630 | 4630 | instruction->ordering = ordering; |
| 4631 | 4631 | |
| 4632 | | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 4633 | | ir_ref_inst_gen(value, ira->new_irb.current_basic_block); |
| 4632 | ir_ref_inst_gen(ptr); |
| 4633 | ir_ref_inst_gen(value); |
| 4634 | 4634 | |
| 4635 | 4635 | return &instruction->base; |
| 4636 | 4636 | } |
| ... | ... | @@ -4716,8 +4716,8 @@ static IrInstGen *ir_build_vector_to_array(IrAnalyze *ira, IrInst *source_instru |
| 4716 | 4716 | instruction->vector = vector; |
| 4717 | 4717 | instruction->result_loc = result_loc; |
| 4718 | 4718 | |
| 4719 | | ir_ref_inst_gen(vector, ira->new_irb.current_basic_block); |
| 4720 | | ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 4719 | ir_ref_inst_gen(vector); |
| 4720 | ir_ref_inst_gen(result_loc); |
| 4721 | 4721 | |
| 4722 | 4722 | return &instruction->base; |
| 4723 | 4723 | } |
| ... | ... | @@ -4731,8 +4731,8 @@ static IrInstGen *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInst *source_ |
| 4731 | 4731 | instruction->operand = operand; |
| 4732 | 4732 | instruction->result_loc = result_loc; |
| 4733 | 4733 | |
| 4734 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 4735 | | ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 4734 | ir_ref_inst_gen(operand); |
| 4735 | ir_ref_inst_gen(result_loc); |
| 4736 | 4736 | |
| 4737 | 4737 | return &instruction->base; |
| 4738 | 4738 | } |
| ... | ... | @@ -4745,7 +4745,7 @@ static IrInstGen *ir_build_array_to_vector(IrAnalyze *ira, IrInst *source_instru |
| 4745 | 4745 | instruction->base.value->type = result_type; |
| 4746 | 4746 | instruction->array = array; |
| 4747 | 4747 | |
| 4748 | | ir_ref_inst_gen(array, ira->new_irb.current_basic_block); |
| 4748 | ir_ref_inst_gen(array); |
| 4749 | 4749 | |
| 4750 | 4750 | return &instruction->base; |
| 4751 | 4751 | } |
| ... | ... | @@ -4758,7 +4758,7 @@ static IrInstGen *ir_build_assert_zero(IrAnalyze *ira, IrInst *source_instructio |
| 4758 | 4758 | instruction->base.value->type = ira->codegen->builtin_types.entry_void; |
| 4759 | 4759 | instruction->target = target; |
| 4760 | 4760 | |
| 4761 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4761 | ir_ref_inst_gen(target); |
| 4762 | 4762 | |
| 4763 | 4763 | return &instruction->base; |
| 4764 | 4764 | } |
| ... | ... | @@ -4771,7 +4771,7 @@ static IrInstGen *ir_build_assert_non_null(IrAnalyze *ira, IrInst *source_instru |
| 4771 | 4771 | instruction->base.value->type = ira->codegen->builtin_types.entry_void; |
| 4772 | 4772 | instruction->target = target; |
| 4773 | 4773 | |
| 4774 | | ir_ref_inst_gen(target, ira->new_irb.current_basic_block); |
| 4774 | ir_ref_inst_gen(target); |
| 4775 | 4775 | |
| 4776 | 4776 | return &instruction->base; |
| 4777 | 4777 | } |
| ... | ... | @@ -4841,7 +4841,7 @@ static IrInstGen *ir_build_suspend_finish_gen(IrAnalyze *ira, IrInst *source_ins |
| 4841 | 4841 | source_instr->scope, source_instr->source_node); |
| 4842 | 4842 | inst->begin = begin; |
| 4843 | 4843 | |
| 4844 | | ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block); |
| 4844 | ir_ref_inst_gen(&begin->base); |
| 4845 | 4845 | |
| 4846 | 4846 | return &inst->base; |
| 4847 | 4847 | } |
| ... | ... | @@ -4869,8 +4869,8 @@ static IrInstGenAwait *ir_build_await_gen(IrAnalyze *ira, IrInst *source_instruc |
| 4869 | 4869 | instruction->result_loc = result_loc; |
| 4870 | 4870 | instruction->is_noasync = is_noasync; |
| 4871 | 4871 | |
| 4872 | | ir_ref_inst_gen(frame, ira->new_irb.current_basic_block); |
| 4873 | | if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block); |
| 4872 | ir_ref_inst_gen(frame); |
| 4873 | if (result_loc != nullptr) ir_ref_inst_gen(result_loc); |
| 4874 | 4874 | |
| 4875 | 4875 | return instruction; |
| 4876 | 4876 | } |
| ... | ... | @@ -4889,7 +4889,7 @@ static IrInstGen *ir_build_resume_gen(IrAnalyze *ira, IrInst *source_instr, IrIn |
| 4889 | 4889 | source_instr->scope, source_instr->source_node); |
| 4890 | 4890 | instruction->frame = frame; |
| 4891 | 4891 | |
| 4892 | | ir_ref_inst_gen(frame, ira->new_irb.current_basic_block); |
| 4892 | ir_ref_inst_gen(frame); |
| 4893 | 4893 | |
| 4894 | 4894 | return &instruction->base; |
| 4895 | 4895 | } |
| ... | ... | @@ -4914,7 +4914,7 @@ static IrInstGen *ir_build_spill_begin_gen(IrAnalyze *ira, IrInst *source_instr, |
| 4914 | 4914 | instruction->operand = operand; |
| 4915 | 4915 | instruction->spill_id = spill_id; |
| 4916 | 4916 | |
| 4917 | | ir_ref_inst_gen(operand, ira->new_irb.current_basic_block); |
| 4917 | ir_ref_inst_gen(operand); |
| 4918 | 4918 | |
| 4919 | 4919 | return &instruction->base; |
| 4920 | 4920 | } |
| ... | ... | @@ -4938,7 +4938,7 @@ static IrInstGen *ir_build_spill_end_gen(IrAnalyze *ira, IrInst *source_instr, I |
| 4938 | 4938 | instruction->base.value->type = result_type; |
| 4939 | 4939 | instruction->begin = begin; |
| 4940 | 4940 | |
| 4941 | | ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block); |
| 4941 | ir_ref_inst_gen(&begin->base); |
| 4942 | 4942 | |
| 4943 | 4943 | return &instruction->base; |
| 4944 | 4944 | } |
| ... | ... | @@ -4952,8 +4952,8 @@ static IrInstGen *ir_build_vector_extract_elem(IrAnalyze *ira, IrInst *source_in |
| 4952 | 4952 | instruction->vector = vector; |
| 4953 | 4953 | instruction->index = index; |
| 4954 | 4954 | |
| 4955 | | ir_ref_inst_gen(vector, ira->new_irb.current_basic_block); |
| 4956 | | ir_ref_inst_gen(index, ira->new_irb.current_basic_block); |
| 4955 | ir_ref_inst_gen(vector); |
| 4956 | ir_ref_inst_gen(index); |
| 4957 | 4957 | |
| 4958 | 4958 | return &instruction->base; |
| 4959 | 4959 | } |