authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2022-01-10 01:48:49-05:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2022-01-10 01:48:49-05:00
log42ef95d79d9cb60fde8c83bfb2eef49969e7c8e3
treeeb7f1e0781b19b5671881912277681989a912aab
parentd66c97d0ef0434ce0814d1921877b9ffa877a645
parentb5f03b3b7a33a1c63855a609ea2bb224f4a76065
signaturebadge-question-mark Signed by PGP key 4AEE18F83AFDEB23

Merge pull request #10554 from joachimschmidt557/stage2-arm

stage2 ARM: refactor and pass 1 more behavior test file

6 files changed, 236 insertions(+), 263 deletions(-)

src/arch/aarch64/CodeGen.zig+3-4
......@@ -2104,17 +2104,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
21042104 // block results.
21052105 .mcv = MCValue{ .none = {} },
21062106 });
2107 const block_data = self.blocks.getPtr(inst).?;
2108 defer block_data.relocs.deinit(self.gpa);
2107 defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa);
21092108
21102109 const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
21112110 const extra = self.air.extraData(Air.Block, ty_pl.payload);
21122111 const body = self.air.extra[extra.end..][0..extra.data.body_len];
21132112 try self.genBody(body);
21142113
2115 for (block_data.relocs.items) |reloc| try self.performReloc(reloc);
2114 for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc);
21162115
2117 const result = @bitCast(MCValue, block_data.mcv);
2116 const result = self.blocks.getPtr(inst).?.mcv;
21182117 return self.finishAir(inst, result, .{ .none, .none, .none });
21192118}
21202119
src/arch/arm/CodeGen.zig+35-63
......@@ -338,7 +338,6 @@ fn addInst(self: *Self, inst: Mir.Inst) error{OutOfMemory}!Mir.Inst.Index {
338338fn addNop(self: *Self) error{OutOfMemory}!Mir.Inst.Index {
339339 return try self.addInst(.{
340340 .tag = .nop,
341 .cond = .al,
342341 .data = .{ .nop = {} },
343342 });
344343}
......@@ -371,7 +370,6 @@ fn gen(self: *Self) !void {
371370 // mov fp, sp
372371 _ = try self.addInst(.{
373372 .tag = .mov,
374 .cond = .al,
375373 .data = .{ .rr_op = .{
376374 .rd = .fp,
377375 .rn = .r0,
......@@ -405,7 +403,6 @@ fn gen(self: *Self) !void {
405403
406404 self.mir_instructions.set(push_reloc, .{
407405 .tag = .push,
408 .cond = .al,
409406 .data = .{ .register_list = saved_regs },
410407 });
411408
......@@ -416,7 +413,6 @@ fn gen(self: *Self) !void {
416413 if (Instruction.Operand.fromU32(stack_size)) |op| {
417414 self.mir_instructions.set(sub_reloc, .{
418415 .tag = .sub,
419 .cond = .al,
420416 .data = .{ .rr_op = .{ .rd = .sp, .rn = .sp, .op = op } },
421417 });
422418 } else {
......@@ -440,7 +436,6 @@ fn gen(self: *Self) !void {
440436 } else for (self.exitlude_jump_relocs.items) |jmp_reloc| {
441437 self.mir_instructions.set(jmp_reloc, .{
442438 .tag = .b,
443 .cond = .al,
444439 .data = .{ .inst = @intCast(u32, self.mir_instructions.len) },
445440 });
446441 }
......@@ -452,7 +447,6 @@ fn gen(self: *Self) !void {
452447 // mov sp, fp
453448 _ = try self.addInst(.{
454449 .tag = .mov,
455 .cond = .al,
456450 .data = .{ .rr_op = .{
457451 .rd = .sp,
458452 .rn = .r0,
......@@ -463,7 +457,6 @@ fn gen(self: *Self) !void {
463457 // pop {fp, pc}
464458 _ = try self.addInst(.{
465459 .tag = .pop,
466 .cond = .al,
467460 .data = .{ .register_list = saved_regs },
468461 });
469462 } else {
......@@ -1251,7 +1244,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
12511244
12521245 _ = try self.addInst(.{
12531246 .tag = tag,
1254 .cond = .al,
12551247 .data = .{ .rr_offset = .{
12561248 .rt = dst_reg,
12571249 .rn = base_mcv.register,
......@@ -1262,7 +1254,6 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
12621254 2 => {
12631255 _ = try self.addInst(.{
12641256 .tag = .ldrh,
1265 .cond = .al,
12661257 .data = .{ .rr_extra_offset = .{
12671258 .rt = dst_reg,
12681259 .rn = base_mcv.register,
......@@ -1406,7 +1397,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14061397 .register => |dst_reg| {
14071398 _ = try self.addInst(.{
14081399 .tag = .ldr,
1409 .cond = .al,
14101400 .data = .{ .rr_offset = .{
14111401 .rt = dst_reg,
14121402 .rn = reg,
......@@ -1430,7 +1420,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14301420 const tmp_regs = try self.register_manager.allocRegs(2, .{ null, null }, &.{reg});
14311421 _ = try self.addInst(.{
14321422 .tag = .ldr,
1433 .cond = .al,
14341423 .data = .{ .rr_offset = .{
14351424 .rt = tmp_regs[0],
14361425 .rn = reg,
......@@ -1439,7 +1428,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14391428 });
14401429 _ = try self.addInst(.{
14411430 .tag = .ldr,
1442 .cond = .al,
14431431 .data = .{ .rr_offset = .{
14441432 .rt = tmp_regs[1],
14451433 .rn = reg,
......@@ -1465,7 +1453,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14651453 };
14661454 _ = try self.addInst(.{
14671455 .tag = .sub,
1468 .cond = .al,
14691456 .data = .{ .rr_op = .{
14701457 .rd = dst_reg,
14711458 .rn = .fp,
......@@ -1479,7 +1466,6 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
14791466 };
14801467 _ = try self.addInst(.{
14811468 .tag = .mov,
1482 .cond = .al,
14831469 .data = .{ .rr_op = .{
14841470 .rd = len_reg,
14851471 .rn = .r0,
......@@ -1560,7 +1546,6 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
15601546 .register => |value_reg| {
15611547 _ = try self.addInst(.{
15621548 .tag = .str,
1563 .cond = .al,
15641549 .data = .{ .rr_offset = .{
15651550 .rt = value_reg,
15661551 .rn = addr_reg,
......@@ -1866,7 +1851,6 @@ fn genArmBinOpCode(
18661851
18671852 _ = try self.addInst(.{
18681853 .tag = tag,
1869 .cond = .al,
18701854 .data = .{ .rr_op = .{
18711855 .rd = dst_reg,
18721856 .rn = op1,
......@@ -1879,7 +1863,6 @@ fn genArmBinOpCode(
18791863
18801864 _ = try self.addInst(.{
18811865 .tag = tag,
1882 .cond = .al,
18831866 .data = .{ .rr_op = .{
18841867 .rd = dst_reg,
18851868 .rn = op1,
......@@ -1890,7 +1873,6 @@ fn genArmBinOpCode(
18901873 .cmp_eq => {
18911874 _ = try self.addInst(.{
18921875 .tag = .cmp,
1893 .cond = .al,
18941876 .data = .{ .rr_op = .{
18951877 .rd = .r0,
18961878 .rn = op1,
......@@ -1916,7 +1898,6 @@ fn genArmBinOpCode(
19161898
19171899 _ = try self.addInst(.{
19181900 .tag = tag,
1919 .cond = .al,
19201901 .data = .{ .rr_shift = .{
19211902 .rd = dst_reg,
19221903 .rm = op1,
......@@ -1993,7 +1974,6 @@ fn genArmMul(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: Ai
19931974
19941975 _ = try self.addInst(.{
19951976 .tag = .mul,
1996 .cond = .al,
19971977 .data = .{ .rrr = .{
19981978 .rd = dst_mcv.register,
19991979 .rn = lhs_mcv.register,
......@@ -2045,7 +2025,6 @@ fn genArmMulConstant(self: *Self, inst: Air.Inst.Index, op: Air.Inst.Ref, op_ind
20452025
20462026 _ = try self.addInst(.{
20472027 .tag = .mul,
2048 .cond = .al,
20492028 .data = .{ .rrr = .{
20502029 .rd = dst_mcv.register,
20512030 .rn = lhs_mcv.register,
......@@ -2066,7 +2045,6 @@ fn genArmInlineMemcpy(
20662045 // mov count, #0
20672046 _ = try self.addInst(.{
20682047 .tag = .mov,
2069 .cond = .al,
20702048 .data = .{ .rr_op = .{
20712049 .rd = count,
20722050 .rn = .r0,
......@@ -2078,7 +2056,6 @@ fn genArmInlineMemcpy(
20782056 // cmp count, len
20792057 _ = try self.addInst(.{
20802058 .tag = .cmp,
2081 .cond = .al,
20822059 .data = .{ .rr_op = .{
20832060 .rd = .r0,
20842061 .rn = count,
......@@ -2096,7 +2073,6 @@ fn genArmInlineMemcpy(
20962073 // ldrb tmp, [src, count]
20972074 _ = try self.addInst(.{
20982075 .tag = .ldrb,
2099 .cond = .al,
21002076 .data = .{ .rr_offset = .{
21012077 .rt = tmp,
21022078 .rn = src,
......@@ -2107,7 +2083,6 @@ fn genArmInlineMemcpy(
21072083 // strb tmp, [src, count]
21082084 _ = try self.addInst(.{
21092085 .tag = .strb,
2110 .cond = .al,
21112086 .data = .{ .rr_offset = .{
21122087 .rt = tmp,
21132088 .rn = dst,
......@@ -2118,7 +2093,6 @@ fn genArmInlineMemcpy(
21182093 // add count, count, #1
21192094 _ = try self.addInst(.{
21202095 .tag = .add,
2121 .cond = .al,
21222096 .data = .{ .rr_op = .{
21232097 .rd = count,
21242098 .rn = count,
......@@ -2129,7 +2103,6 @@ fn genArmInlineMemcpy(
21292103 // b loop
21302104 _ = try self.addInst(.{
21312105 .tag = .b,
2132 .cond = .al,
21332106 .data = .{ .inst = @intCast(u32, self.mir_instructions.len - 5) },
21342107 });
21352108
......@@ -2236,7 +2209,6 @@ fn airArg(self: *Self, inst: Air.Inst.Index) !void {
22362209fn airBreakpoint(self: *Self) !void {
22372210 _ = try self.addInst(.{
22382211 .tag = .bkpt,
2239 .cond = .al,
22402212 .data = .{ .imm16 = 0 },
22412213 });
22422214 return self.finishAirBookkeeping();
......@@ -2348,14 +2320,12 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
23482320 if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) {
23492321 _ = try self.addInst(.{
23502322 .tag = .blx,
2351 .cond = .al,
23522323 .data = .{ .reg = .lr },
23532324 });
23542325 } else {
23552326 return self.fail("TODO fix blx emulation for ARM <v5", .{});
23562327 // _ = try self.addInst(.{
23572328 // .tag = .mov,
2358 // .cond = .al,
23592329 // .data = .{ .rr_op = .{
23602330 // .rd = .lr,
23612331 // .rn = .r0,
......@@ -2364,7 +2334,6 @@ fn airCall(self: *Self, inst: Air.Inst.Index) !void {
23642334 // });
23652335 // _ = try self.addInst(.{
23662336 // .tag = .bx,
2367 // .cond = .al,
23682337 // .data = .{ .reg = .lr },
23692338 // });
23702339 }
......@@ -2535,6 +2504,8 @@ fn airCondBr(self: *Self, inst: Air.Inst.Index) !void {
25352504 break :blk condition.negate();
25362505 },
25372506 .register => |reg| blk: {
2507 try self.spillCompareFlagsIfOccupied();
2508
25382509 // cmp reg, 1
25392510 // bne ...
25402511 _ = try self.addInst(.{
......@@ -2549,6 +2520,26 @@ fn airCondBr(self: *Self, inst: Air.Inst.Index) !void {
25492520
25502521 break :blk .ne;
25512522 },
2523 .stack_offset,
2524 .memory,
2525 => blk: {
2526 try self.spillCompareFlagsIfOccupied();
2527
2528 const reg = try self.copyToTmpRegister(Type.initTag(.bool), cond);
2529
2530 // cmp reg, 1
2531 // bne ...
2532 _ = try self.addInst(.{
2533 .tag = .cmp,
2534 .data = .{ .rr_op = .{
2535 .rd = .r0,
2536 .rn = reg,
2537 .op = Instruction.Operand.imm(1, 0),
2538 } },
2539 });
2540
2541 break :blk .ne;
2542 },
25522543 else => return self.fail("TODO implement condbr {} when condition is {s}", .{ self.target.cpu.arch, @tagName(cond) }),
25532544 };
25542545
......@@ -2889,7 +2880,6 @@ fn airLoop(self: *Self, inst: Air.Inst.Index) !void {
28892880fn jump(self: *Self, inst: Mir.Inst.Index) !void {
28902881 _ = try self.addInst(.{
28912882 .tag = .b,
2892 .cond = .al,
28932883 .data = .{ .inst = inst },
28942884 });
28952885}
......@@ -2905,17 +2895,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
29052895 // block results.
29062896 .mcv = MCValue{ .none = {} },
29072897 });
2908 const block_data = self.blocks.getPtr(inst).?;
2909 defer block_data.relocs.deinit(self.gpa);
2898 defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa);
29102899
29112900 const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
29122901 const extra = self.air.extraData(Air.Block, ty_pl.payload);
29132902 const body = self.air.extra[extra.end..][0..extra.data.body_len];
29142903 try self.genBody(body);
29152904
2916 for (block_data.relocs.items) |reloc| try self.performReloc(reloc);
2905 for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc);
29172906
2918 const result = @bitCast(MCValue, block_data.mcv);
2907 const result = self.blocks.getPtr(inst).?.mcv;
29192908 return self.finishAir(inst, result, .{ .none, .none, .none });
29202909}
29212910
......@@ -2959,7 +2948,16 @@ fn br(self: *Self, block: Air.Inst.Index, operand: Air.Inst.Ref) !void {
29592948 const operand_mcv = try self.resolveInst(operand);
29602949 const block_mcv = block_data.mcv;
29612950 if (block_mcv == .none) {
2962 block_data.mcv = operand_mcv;
2951 block_data.mcv = switch (operand_mcv) {
2952 .none, .dead, .unreach => unreachable,
2953 .register, .stack_offset, .memory => operand_mcv,
2954 .immediate => blk: {
2955 const new_mcv = try self.allocRegOrMem(block, true);
2956 try self.setRegOrMem(self.air.typeOfIndex(block), new_mcv, operand_mcv);
2957 break :blk new_mcv;
2958 },
2959 else => return self.fail("TODO implement block_data.mcv = operand_mcv for {}", .{operand_mcv}),
2960 };
29632961 } else {
29642962 try self.setRegOrMem(self.air.typeOfIndex(block), block_mcv, operand_mcv);
29652963 }
......@@ -2973,7 +2971,6 @@ fn brVoid(self: *Self, block: Air.Inst.Index) !void {
29732971 // Emit a jump with a relocation. It will be patched up after the block ends.
29742972 try block_data.relocs.append(self.gpa, try self.addInst(.{
29752973 .tag = .b,
2976 .cond = .al,
29772974 .data = .{ .inst = undefined }, // populated later through performReloc
29782975 }));
29792976}
......@@ -3029,7 +3026,6 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
30293026 if (mem.eql(u8, asm_source, "svc #0")) {
30303027 _ = try self.addInst(.{
30313028 .tag = .svc,
3032 .cond = .al,
30333029 .data = .{ .imm24 = 0 },
30343030 });
30353031 } else {
......@@ -3135,7 +3131,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
31353131
31363132 _ = try self.addInst(.{
31373133 .tag = tag,
3138 .cond = .al,
31393134 .data = .{ .rr_offset = .{
31403135 .rt = reg,
31413136 .rn = .fp,
......@@ -3153,7 +3148,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
31533148
31543149 _ = try self.addInst(.{
31553150 .tag = .strh,
3156 .cond = .al,
31573151 .data = .{ .rr_extra_offset = .{
31583152 .rt = reg,
31593153 .rn = .fp,
......@@ -3200,7 +3194,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
32003194 };
32013195 _ = try self.addInst(.{
32023196 .tag = .sub,
3203 .cond = .al,
32043197 .data = .{ .rr_op = .{
32053198 .rd = src_reg,
32063199 .rn = .fp,
......@@ -3215,7 +3208,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
32153208 };
32163209 _ = try self.addInst(.{
32173210 .tag = .sub,
3218 .cond = .al,
32193211 .data = .{ .rr_op = .{
32203212 .rd = dst_reg,
32213213 .rn = .fp,
......@@ -3230,7 +3222,6 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerErro
32303222 };
32313223 _ = try self.addInst(.{
32323224 .tag = .mov,
3233 .cond = .al,
32343225 .data = .{ .rr_op = .{
32353226 .rd = len_reg,
32363227 .rn = .r0,
......@@ -3272,7 +3263,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
32723263 // mov reg, 0
32733264 _ = try self.addInst(.{
32743265 .tag = .mov,
3275 .cond = .al,
32763266 .data = .{ .rr_op = .{
32773267 .rd = reg,
32783268 .rn = .r0,
......@@ -3297,7 +3287,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
32973287 if (Instruction.Operand.fromU32(@intCast(u32, x))) |op| {
32983288 _ = try self.addInst(.{
32993289 .tag = .mov,
3300 .cond = .al,
33013290 .data = .{ .rr_op = .{
33023291 .rd = reg,
33033292 .rn = .r0,
......@@ -3307,7 +3296,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33073296 } else if (Instruction.Operand.fromU32(~@intCast(u32, x))) |op| {
33083297 _ = try self.addInst(.{
33093298 .tag = .mvn,
3310 .cond = .al,
33113299 .data = .{ .rr_op = .{
33123300 .rd = reg,
33133301 .rn = .r0,
......@@ -3318,7 +3306,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33183306 if (Target.arm.featureSetHas(self.target.cpu.features, .has_v7)) {
33193307 _ = try self.addInst(.{
33203308 .tag = .movw,
3321 .cond = .al,
33223309 .data = .{ .r_imm16 = .{
33233310 .rd = reg,
33243311 .imm16 = @intCast(u16, x),
......@@ -3327,7 +3314,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33273314 } else {
33283315 _ = try self.addInst(.{
33293316 .tag = .mov,
3330 .cond = .al,
33313317 .data = .{ .rr_op = .{
33323318 .rd = reg,
33333319 .rn = .r0,
......@@ -3336,7 +3322,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33363322 });
33373323 _ = try self.addInst(.{
33383324 .tag = .orr,
3339 .cond = .al,
33403325 .data = .{ .rr_op = .{
33413326 .rd = reg,
33423327 .rn = reg,
......@@ -3353,7 +3338,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33533338 // movt reg, #0xaaaa
33543339 _ = try self.addInst(.{
33553340 .tag = .movw,
3356 .cond = .al,
33573341 .data = .{ .r_imm16 = .{
33583342 .rd = reg,
33593343 .imm16 = @truncate(u16, x),
......@@ -3361,7 +3345,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33613345 });
33623346 _ = try self.addInst(.{
33633347 .tag = .movt,
3364 .cond = .al,
33653348 .data = .{ .r_imm16 = .{
33663349 .rd = reg,
33673350 .imm16 = @truncate(u16, x >> 16),
......@@ -3375,7 +3358,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33753358 // orr reg, reg, #0xdd, 8
33763359 _ = try self.addInst(.{
33773360 .tag = .mov,
3378 .cond = .al,
33793361 .data = .{ .rr_op = .{
33803362 .rd = reg,
33813363 .rn = .r0,
......@@ -3384,7 +3366,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33843366 });
33853367 _ = try self.addInst(.{
33863368 .tag = .orr,
3387 .cond = .al,
33883369 .data = .{ .rr_op = .{
33893370 .rd = reg,
33903371 .rn = reg,
......@@ -3393,7 +3374,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
33933374 });
33943375 _ = try self.addInst(.{
33953376 .tag = .orr,
3396 .cond = .al,
33973377 .data = .{ .rr_op = .{
33983378 .rd = reg,
33993379 .rn = reg,
......@@ -3402,7 +3382,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
34023382 });
34033383 _ = try self.addInst(.{
34043384 .tag = .orr,
3405 .cond = .al,
34063385 .data = .{ .rr_op = .{
34073386 .rd = reg,
34083387 .rn = reg,
......@@ -3420,7 +3399,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
34203399 // mov reg, src_reg
34213400 _ = try self.addInst(.{
34223401 .tag = .mov,
3423 .cond = .al,
34243402 .data = .{ .rr_op = .{
34253403 .rd = reg,
34263404 .rn = .r0,
......@@ -3434,7 +3412,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
34343412 try self.genSetReg(ty, reg, .{ .immediate = @intCast(u32, addr) });
34353413 _ = try self.addInst(.{
34363414 .tag = .ldr,
3437 .cond = .al,
34383415 .data = .{ .rr_offset = .{
34393416 .rt = reg,
34403417 .rn = reg,
......@@ -3461,7 +3438,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
34613438
34623439 _ = try self.addInst(.{
34633440 .tag = tag,
3464 .cond = .al,
34653441 .data = .{ .rr_offset = .{
34663442 .rt = reg,
34673443 .rn = .fp,
......@@ -3479,7 +3455,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
34793455
34803456 _ = try self.addInst(.{
34813457 .tag = .ldrh,
3482 .cond = .al,
34833458 .data = .{ .rr_extra_offset = .{
34843459 .rt = reg,
34853460 .rn = .fp,
......@@ -3507,7 +3482,6 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void
35073482
35083483 _ = try self.addInst(.{
35093484 .tag = tag,
3510 .cond = .al,
35113485 .data = .{ .r_stack_offset = .{
35123486 .rt = reg,
35133487 .stack_offset = @intCast(u32, adj_off),
......@@ -3551,7 +3525,6 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
35513525
35523526 _ = try self.addInst(.{
35533527 .tag = tag,
3554 .cond = .al,
35553528 .data = .{ .rr_offset = .{
35563529 .rt = reg,
35573530 .rn = .sp,
......@@ -3566,7 +3539,6 @@ fn genSetStackArgument(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) I
35663539
35673540 _ = try self.addInst(.{
35683541 .tag = .strh,
3569 .cond = .al,
35703542 .data = .{ .rr_extra_offset = .{
35713543 .rt = reg,
35723544 .rn = .sp,
src/arch/arm/Mir.zig+1-1
......@@ -20,7 +20,7 @@ extra: []const u32,
2020
2121pub const Inst = struct {
2222 tag: Tag,
23 cond: bits.Condition,
23 cond: bits.Condition = .al,
2424 /// The meaning of this depends on `tag`.
2525 data: Data,
2626
src/arch/riscv64/CodeGen.zig+3-4
......@@ -1720,17 +1720,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
17201720 // block results.
17211721 .mcv = MCValue{ .none = {} },
17221722 });
1723 const block_data = self.blocks.getPtr(inst).?;
1724 defer block_data.relocs.deinit(self.gpa);
1723 defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa);
17251724
17261725 const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
17271726 const extra = self.air.extraData(Air.Block, ty_pl.payload);
17281727 const body = self.air.extra[extra.end..][0..extra.data.body_len];
17291728 try self.genBody(body);
17301729
1731 for (block_data.relocs.items) |reloc| try self.performReloc(reloc);
1730 for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc);
17321731
1733 const result = @bitCast(MCValue, block_data.mcv);
1732 const result = self.blocks.getPtr(inst).?.mcv;
17341733 return self.finishAir(inst, result, .{ .none, .none, .none });
17351734}
17361735
src/arch/x86_64/CodeGen.zig+3-4
......@@ -2853,17 +2853,16 @@ fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
28532853 // block results.
28542854 .mcv = MCValue{ .none = {} },
28552855 });
2856 const block_data = self.blocks.getPtr(inst).?;
2857 defer block_data.relocs.deinit(self.gpa);
2856 defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa);
28582857
28592858 const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
28602859 const extra = self.air.extraData(Air.Block, ty_pl.payload);
28612860 const body = self.air.extra[extra.end..][0..extra.data.body_len];
28622861 try self.genBody(body);
28632862
2864 for (block_data.relocs.items) |reloc| try self.performReloc(reloc);
2863 for (self.blocks.getPtr(inst).?.relocs.items) |reloc| try self.performReloc(reloc);
28652864
2866 const result = @bitCast(MCValue, block_data.mcv);
2865 const result = self.blocks.getPtr(inst).?.mcv;
28672866 return self.finishAir(inst, result, .{ .none, .none, .none });
28682867}
28692868
test/behavior.zig+191-187
......@@ -14,198 +14,202 @@ test {
1414 _ = @import("behavior/type_info.zig");
1515 _ = @import("behavior/type.zig");
1616
17 if (builtin.zig_backend != .stage2_arm and builtin.zig_backend != .stage2_x86_64) {
18 // Tests that pass for stage1, llvm backend, C backend, wasm backend.
19 _ = @import("behavior/array.zig");
20 _ = @import("behavior/bugs/3586.zig");
21 _ = @import("behavior/basic.zig");
22 _ = @import("behavior/bitcast.zig");
17 if (builtin.zig_backend != .stage2_x86_64) {
18 // Tests that pass for stage1, llvm backend, C backend, wasm backend, and arm backend.
2319 _ = @import("behavior/bool.zig");
24 _ = @import("behavior/bugs/624.zig");
25 _ = @import("behavior/bugs/655.zig");
26 _ = @import("behavior/bugs/704.zig");
27 _ = @import("behavior/bugs/1486.zig");
28 _ = @import("behavior/bugs/2692.zig");
29 _ = @import("behavior/bugs/2889.zig");
30 _ = @import("behavior/bugs/3046.zig");
31 _ = @import("behavior/bugs/4560.zig");
32 _ = @import("behavior/bugs/4769_a.zig");
33 _ = @import("behavior/bugs/4769_b.zig");
34 _ = @import("behavior/bugs/4954.zig");
35 _ = @import("behavior/byval_arg_var.zig");
36 _ = @import("behavior/call.zig");
37 _ = @import("behavior/defer.zig");
38 _ = @import("behavior/enum.zig");
39 _ = @import("behavior/error.zig");
40 _ = @import("behavior/for.zig");
41 _ = @import("behavior/generics.zig");
42 _ = @import("behavior/if.zig");
43 _ = @import("behavior/import.zig");
44 _ = @import("behavior/incomplete_struct_param_tld.zig");
45 _ = @import("behavior/inttoptr.zig");
46 _ = @import("behavior/member_func.zig");
47 _ = @import("behavior/null.zig");
48 _ = @import("behavior/pointers.zig");
49 _ = @import("behavior/ptrcast.zig");
50 _ = @import("behavior/ref_var_in_if_after_if_2nd_switch_prong.zig");
51 _ = @import("behavior/struct.zig");
52 _ = @import("behavior/this.zig");
53 _ = @import("behavior/truncate.zig");
54 _ = @import("behavior/undefined.zig");
55 _ = @import("behavior/underscore.zig");
56 _ = @import("behavior/usingnamespace.zig");
57 _ = @import("behavior/void.zig");
58 _ = @import("behavior/while.zig");
5920
60 if (builtin.zig_backend != .stage2_wasm) {
61 // Tests that pass for stage1, llvm backend, C backend
62 _ = @import("behavior/align.zig");
63 _ = @import("behavior/cast.zig");
64 _ = @import("behavior/int128.zig");
65 _ = @import("behavior/optional.zig");
66 _ = @import("behavior/translate_c_macros.zig");
67 _ = @import("behavior/try.zig");
68 _ = @import("behavior/src.zig");
21 if (builtin.zig_backend != .stage2_arm and builtin.zig_backend != .stage2_x86_64) {
22 // Tests that pass for stage1, llvm backend, C backend, wasm backend.
23 _ = @import("behavior/array.zig");
24 _ = @import("behavior/bugs/3586.zig");
25 _ = @import("behavior/basic.zig");
26 _ = @import("behavior/bitcast.zig");
27 _ = @import("behavior/bugs/624.zig");
28 _ = @import("behavior/bugs/655.zig");
29 _ = @import("behavior/bugs/704.zig");
30 _ = @import("behavior/bugs/1486.zig");
31 _ = @import("behavior/bugs/2692.zig");
32 _ = @import("behavior/bugs/2889.zig");
33 _ = @import("behavior/bugs/3046.zig");
34 _ = @import("behavior/bugs/4560.zig");
35 _ = @import("behavior/bugs/4769_a.zig");
36 _ = @import("behavior/bugs/4769_b.zig");
37 _ = @import("behavior/bugs/4954.zig");
38 _ = @import("behavior/byval_arg_var.zig");
39 _ = @import("behavior/call.zig");
40 _ = @import("behavior/defer.zig");
41 _ = @import("behavior/enum.zig");
42 _ = @import("behavior/error.zig");
43 _ = @import("behavior/for.zig");
44 _ = @import("behavior/generics.zig");
45 _ = @import("behavior/if.zig");
46 _ = @import("behavior/import.zig");
47 _ = @import("behavior/incomplete_struct_param_tld.zig");
48 _ = @import("behavior/inttoptr.zig");
49 _ = @import("behavior/member_func.zig");
50 _ = @import("behavior/null.zig");
51 _ = @import("behavior/pointers.zig");
52 _ = @import("behavior/ptrcast.zig");
53 _ = @import("behavior/ref_var_in_if_after_if_2nd_switch_prong.zig");
54 _ = @import("behavior/struct.zig");
55 _ = @import("behavior/this.zig");
56 _ = @import("behavior/truncate.zig");
57 _ = @import("behavior/undefined.zig");
58 _ = @import("behavior/underscore.zig");
59 _ = @import("behavior/usingnamespace.zig");
60 _ = @import("behavior/void.zig");
61 _ = @import("behavior/while.zig");
6962
70 if (builtin.zig_backend != .stage2_c) {
71 // Tests that pass for stage1 and the llvm backend.
72 _ = @import("behavior/align_llvm.zig");
73 _ = @import("behavior/alignof.zig");
74 _ = @import("behavior/array_llvm.zig");
75 _ = @import("behavior/atomics.zig");
76 _ = @import("behavior/basic_llvm.zig");
77 _ = @import("behavior/bit_shifting.zig");
78 _ = @import("behavior/bugs/394.zig");
79 _ = @import("behavior/bugs/656.zig");
80 _ = @import("behavior/bugs/1277.zig");
81 _ = @import("behavior/bugs/1310.zig");
82 _ = @import("behavior/bugs/1381.zig");
83 _ = @import("behavior/bugs/1500.zig");
84 _ = @import("behavior/bugs/1735.zig");
85 _ = @import("behavior/bugs/1741.zig");
86 _ = @import("behavior/bugs/2006.zig");
87 _ = @import("behavior/bugs/2578.zig");
88 _ = @import("behavior/bugs/3007.zig");
89 _ = @import("behavior/bugs/3112.zig");
90 _ = @import("behavior/bugs/3367.zig");
91 _ = @import("behavior/bugs/7250.zig");
92 _ = @import("behavior/bugs/9584.zig");
93 _ = @import("behavior/cast_llvm.zig");
94 _ = @import("behavior/enum_llvm.zig");
95 _ = @import("behavior/error_llvm.zig");
96 _ = @import("behavior/eval.zig");
97 _ = @import("behavior/floatop.zig");
98 _ = @import("behavior/fn.zig");
99 _ = @import("behavior/generics_llvm.zig");
100 _ = @import("behavior/math.zig");
101 _ = @import("behavior/maximum_minimum.zig");
102 _ = @import("behavior/merge_error_sets.zig");
103 _ = @import("behavior/namespace_depends_on_compile_var.zig");
104 _ = @import("behavior/null_llvm.zig");
105 _ = @import("behavior/optional_llvm.zig");
106 _ = @import("behavior/popcount.zig");
107 _ = @import("behavior/saturating_arithmetic.zig");
108 _ = @import("behavior/sizeof_and_typeof.zig");
109 _ = @import("behavior/slice.zig");
110 _ = @import("behavior/struct_llvm.zig");
111 _ = @import("behavior/switch.zig");
112 _ = @import("behavior/union.zig");
113 _ = @import("behavior/widening.zig");
63 if (builtin.zig_backend != .stage2_wasm) {
64 // Tests that pass for stage1, llvm backend, C backend
65 _ = @import("behavior/align.zig");
66 _ = @import("behavior/cast.zig");
67 _ = @import("behavior/int128.zig");
68 _ = @import("behavior/optional.zig");
69 _ = @import("behavior/translate_c_macros.zig");
70 _ = @import("behavior/try.zig");
71 _ = @import("behavior/src.zig");
11472
115 if (builtin.zig_backend != .stage1) {
116 // When all comptime_memory.zig tests pass, #9646 can be closed.
117 // _ = @import("behavior/comptime_memory.zig");
118 _ = @import("behavior/slice_stage2.zig");
119 } else {
120 // Tests that only pass for the stage1 backend.
121 _ = @import("behavior/align_stage1.zig");
122 _ = @import("behavior/array_stage1.zig");
123 if (builtin.os.tag != .wasi) {
124 _ = @import("behavior/asm.zig");
125 _ = @import("behavior/async_fn.zig");
126 }
127 _ = @import("behavior/await_struct.zig");
128 _ = @import("behavior/bitcast_stage1.zig");
129 _ = @import("behavior/bitreverse.zig");
130 _ = @import("behavior/bugs/421.zig");
131 _ = @import("behavior/bugs/529.zig");
132 _ = @import("behavior/bugs/718.zig");
133 _ = @import("behavior/bugs/726.zig");
134 _ = @import("behavior/bugs/828.zig");
135 _ = @import("behavior/bugs/920.zig");
136 _ = @import("behavior/bugs/1025.zig");
137 _ = @import("behavior/bugs/1076.zig");
138 _ = @import("behavior/bugs/1120.zig");
139 _ = @import("behavior/bugs/1421.zig");
140 _ = @import("behavior/bugs/1442.zig");
141 _ = @import("behavior/bugs/1607.zig");
142 _ = @import("behavior/bugs/1851.zig");
143 _ = @import("behavior/bugs/1914.zig");
144 _ = @import("behavior/bugs/2114.zig");
145 _ = @import("behavior/bugs/3384.zig");
146 _ = @import("behavior/bugs/3742.zig");
147 _ = @import("behavior/bugs/3779.zig");
148 _ = @import("behavior/bugs/4328.zig");
149 _ = @import("behavior/bugs/5398.zig");
150 _ = @import("behavior/bugs/5413.zig");
151 _ = @import("behavior/bugs/5474.zig");
152 _ = @import("behavior/bugs/5487.zig");
153 _ = @import("behavior/bugs/6456.zig");
154 _ = @import("behavior/bugs/6781.zig");
155 _ = @import("behavior/bugs/7003.zig");
156 _ = @import("behavior/bugs/7027.zig");
157 _ = @import("behavior/bugs/7047.zig");
158 _ = @import("behavior/bugs/10147.zig");
159 _ = @import("behavior/byteswap.zig");
160 _ = @import("behavior/call_stage1.zig");
161 _ = @import("behavior/cast_stage1.zig");
162 _ = @import("behavior/const_slice_child.zig");
163 _ = @import("behavior/defer_stage1.zig");
164 _ = @import("behavior/enum_stage1.zig");
165 _ = @import("behavior/error_stage1.zig");
166 _ = @import("behavior/eval_stage1.zig");
167 _ = @import("behavior/field_parent_ptr.zig");
168 _ = @import("behavior/floatop_stage1.zig");
169 _ = @import("behavior/fn_stage1.zig");
170 _ = @import("behavior/fn_delegation.zig");
171 _ = @import("behavior/for_stage1.zig");
172 _ = @import("behavior/if_stage1.zig");
173 _ = @import("behavior/ir_block_deps.zig");
174 _ = @import("behavior/math_stage1.zig");
175 _ = @import("behavior/misc.zig");
176 _ = @import("behavior/muladd.zig");
177 _ = @import("behavior/null_stage1.zig");
178 _ = @import("behavior/optional_stage1.zig");
179 _ = @import("behavior/pointers_stage1.zig");
180 _ = @import("behavior/popcount_stage1.zig");
181 _ = @import("behavior/prefetch.zig");
182 _ = @import("behavior/ptrcast_stage1.zig");
183 _ = @import("behavior/reflection.zig");
184 _ = @import("behavior/saturating_arithmetic_stage1.zig");
185 _ = @import("behavior/select.zig");
186 _ = @import("behavior/shuffle.zig");
187 _ = @import("behavior/sizeof_and_typeof_stage1.zig");
188 _ = @import("behavior/slice_stage1.zig");
189 _ = @import("behavior/struct_contains_null_ptr_itself.zig");
190 _ = @import("behavior/struct_contains_slice_of_itself.zig");
191 _ = @import("behavior/struct_stage1.zig");
192 _ = @import("behavior/switch_prong_err_enum.zig");
193 _ = @import("behavior/switch_prong_implicit_cast.zig");
194 _ = @import("behavior/switch_stage1.zig");
195 _ = @import("behavior/truncate_stage1.zig");
196 _ = @import("behavior/tuple.zig");
197 _ = @import("behavior/type_stage1.zig");
198 _ = @import("behavior/type_info_stage1.zig");
199 _ = @import("behavior/typename.zig");
200 _ = @import("behavior/union_stage1.zig");
201 _ = @import("behavior/union_with_members.zig");
202 _ = @import("behavior/var_args.zig");
203 _ = @import("behavior/vector.zig");
204 if (builtin.target.cpu.arch == .wasm32) {
205 _ = @import("behavior/wasm.zig");
73 if (builtin.zig_backend != .stage2_c) {
74 // Tests that pass for stage1 and the llvm backend.
75 _ = @import("behavior/align_llvm.zig");
76 _ = @import("behavior/alignof.zig");
77 _ = @import("behavior/array_llvm.zig");
78 _ = @import("behavior/atomics.zig");
79 _ = @import("behavior/basic_llvm.zig");
80 _ = @import("behavior/bit_shifting.zig");
81 _ = @import("behavior/bugs/394.zig");
82 _ = @import("behavior/bugs/656.zig");
83 _ = @import("behavior/bugs/1277.zig");
84 _ = @import("behavior/bugs/1310.zig");
85 _ = @import("behavior/bugs/1381.zig");
86 _ = @import("behavior/bugs/1500.zig");
87 _ = @import("behavior/bugs/1735.zig");
88 _ = @import("behavior/bugs/1741.zig");
89 _ = @import("behavior/bugs/2006.zig");
90 _ = @import("behavior/bugs/2578.zig");
91 _ = @import("behavior/bugs/3007.zig");
92 _ = @import("behavior/bugs/3112.zig");
93 _ = @import("behavior/bugs/3367.zig");
94 _ = @import("behavior/bugs/7250.zig");
95 _ = @import("behavior/bugs/9584.zig");
96 _ = @import("behavior/cast_llvm.zig");
97 _ = @import("behavior/enum_llvm.zig");
98 _ = @import("behavior/error_llvm.zig");
99 _ = @import("behavior/eval.zig");
100 _ = @import("behavior/floatop.zig");
101 _ = @import("behavior/fn.zig");
102 _ = @import("behavior/generics_llvm.zig");
103 _ = @import("behavior/math.zig");
104 _ = @import("behavior/maximum_minimum.zig");
105 _ = @import("behavior/merge_error_sets.zig");
106 _ = @import("behavior/namespace_depends_on_compile_var.zig");
107 _ = @import("behavior/null_llvm.zig");
108 _ = @import("behavior/optional_llvm.zig");
109 _ = @import("behavior/popcount.zig");
110 _ = @import("behavior/saturating_arithmetic.zig");
111 _ = @import("behavior/sizeof_and_typeof.zig");
112 _ = @import("behavior/slice.zig");
113 _ = @import("behavior/struct_llvm.zig");
114 _ = @import("behavior/switch.zig");
115 _ = @import("behavior/union.zig");
116 _ = @import("behavior/widening.zig");
117
118 if (builtin.zig_backend != .stage1) {
119 // When all comptime_memory.zig tests pass, #9646 can be closed.
120 // _ = @import("behavior/comptime_memory.zig");
121 _ = @import("behavior/slice_stage2.zig");
122 } else {
123 // Tests that only pass for the stage1 backend.
124 _ = @import("behavior/align_stage1.zig");
125 _ = @import("behavior/array_stage1.zig");
126 if (builtin.os.tag != .wasi) {
127 _ = @import("behavior/asm.zig");
128 _ = @import("behavior/async_fn.zig");
129 }
130 _ = @import("behavior/await_struct.zig");
131 _ = @import("behavior/bitcast_stage1.zig");
132 _ = @import("behavior/bitreverse.zig");
133 _ = @import("behavior/bugs/421.zig");
134 _ = @import("behavior/bugs/529.zig");
135 _ = @import("behavior/bugs/718.zig");
136 _ = @import("behavior/bugs/726.zig");
137 _ = @import("behavior/bugs/828.zig");
138 _ = @import("behavior/bugs/920.zig");
139 _ = @import("behavior/bugs/1025.zig");
140 _ = @import("behavior/bugs/1076.zig");
141 _ = @import("behavior/bugs/1120.zig");
142 _ = @import("behavior/bugs/1421.zig");
143 _ = @import("behavior/bugs/1442.zig");
144 _ = @import("behavior/bugs/1607.zig");
145 _ = @import("behavior/bugs/1851.zig");
146 _ = @import("behavior/bugs/1914.zig");
147 _ = @import("behavior/bugs/2114.zig");
148 _ = @import("behavior/bugs/3384.zig");
149 _ = @import("behavior/bugs/3742.zig");
150 _ = @import("behavior/bugs/3779.zig");
151 _ = @import("behavior/bugs/4328.zig");
152 _ = @import("behavior/bugs/5398.zig");
153 _ = @import("behavior/bugs/5413.zig");
154 _ = @import("behavior/bugs/5474.zig");
155 _ = @import("behavior/bugs/5487.zig");
156 _ = @import("behavior/bugs/6456.zig");
157 _ = @import("behavior/bugs/6781.zig");
158 _ = @import("behavior/bugs/7003.zig");
159 _ = @import("behavior/bugs/7027.zig");
160 _ = @import("behavior/bugs/7047.zig");
161 _ = @import("behavior/bugs/10147.zig");
162 _ = @import("behavior/byteswap.zig");
163 _ = @import("behavior/call_stage1.zig");
164 _ = @import("behavior/cast_stage1.zig");
165 _ = @import("behavior/const_slice_child.zig");
166 _ = @import("behavior/defer_stage1.zig");
167 _ = @import("behavior/enum_stage1.zig");
168 _ = @import("behavior/error_stage1.zig");
169 _ = @import("behavior/eval_stage1.zig");
170 _ = @import("behavior/field_parent_ptr.zig");
171 _ = @import("behavior/floatop_stage1.zig");
172 _ = @import("behavior/fn_stage1.zig");
173 _ = @import("behavior/fn_delegation.zig");
174 _ = @import("behavior/for_stage1.zig");
175 _ = @import("behavior/if_stage1.zig");
176 _ = @import("behavior/ir_block_deps.zig");
177 _ = @import("behavior/math_stage1.zig");
178 _ = @import("behavior/misc.zig");
179 _ = @import("behavior/muladd.zig");
180 _ = @import("behavior/null_stage1.zig");
181 _ = @import("behavior/optional_stage1.zig");
182 _ = @import("behavior/pointers_stage1.zig");
183 _ = @import("behavior/popcount_stage1.zig");
184 _ = @import("behavior/prefetch.zig");
185 _ = @import("behavior/ptrcast_stage1.zig");
186 _ = @import("behavior/reflection.zig");
187 _ = @import("behavior/saturating_arithmetic_stage1.zig");
188 _ = @import("behavior/select.zig");
189 _ = @import("behavior/shuffle.zig");
190 _ = @import("behavior/sizeof_and_typeof_stage1.zig");
191 _ = @import("behavior/slice_stage1.zig");
192 _ = @import("behavior/struct_contains_null_ptr_itself.zig");
193 _ = @import("behavior/struct_contains_slice_of_itself.zig");
194 _ = @import("behavior/struct_stage1.zig");
195 _ = @import("behavior/switch_prong_err_enum.zig");
196 _ = @import("behavior/switch_prong_implicit_cast.zig");
197 _ = @import("behavior/switch_stage1.zig");
198 _ = @import("behavior/truncate_stage1.zig");
199 _ = @import("behavior/tuple.zig");
200 _ = @import("behavior/type_stage1.zig");
201 _ = @import("behavior/type_info_stage1.zig");
202 _ = @import("behavior/typename.zig");
203 _ = @import("behavior/union_stage1.zig");
204 _ = @import("behavior/union_with_members.zig");
205 _ = @import("behavior/var_args.zig");
206 _ = @import("behavior/vector.zig");
207 if (builtin.target.cpu.arch == .wasm32) {
208 _ = @import("behavior/wasm.zig");
209 }
210 _ = @import("behavior/while_stage1.zig");
211 _ = @import("behavior/translate_c_macros_stage1.zig");
206212 }
207 _ = @import("behavior/while_stage1.zig");
208 _ = @import("behavior/translate_c_macros_stage1.zig");
209213 }
210214 }
211215 }