| author | |
| committer | |
| log | 4606baee072f832ef794d86f428a7f27d91c6a11 |
| tree | 17ff3a599b689a99c674e23d8d7f015a35933d18 |
| parent | 2f4faf306d5d7a5b730b4dc6d426af713289bb51 |
| signature | Commit is signed but in an unrecognized format. |
the other changes in this commit are minor tidying up2 files changed, 8 insertions(+), 3 deletions(-)
src/codegen.cpp+5-1| ... | ... | @@ -8341,6 +8341,10 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa |
| 8341 | 8341 | args.append("-nostdinc"); |
| 8342 | 8342 | args.append("-fno-spell-checking"); |
| 8343 | 8343 | |
| 8344 | if (g->function_sections) { | |
| 8345 | args.append("-ffunction-sections"); | |
| 8346 | } | |
| 8347 | ||
| 8344 | 8348 | if (translate_c) { |
| 8345 | 8349 | // this gives us access to preprocessing entities, presumably at |
| 8346 | 8350 | // the cost of performance |
| ... | ... | @@ -8765,10 +8769,10 @@ Error create_c_object_cache(CodeGen *g, CacheHash **out_cache_hash, bool verbose |
| 8765 | 8769 | cache_int(cache_hash, g->build_mode); |
| 8766 | 8770 | cache_bool(cache_hash, g->have_pic); |
| 8767 | 8771 | cache_bool(cache_hash, want_valgrind_support(g)); |
| 8772 | cache_bool(cache_hash, g->function_sections); | |
| 8768 | 8773 | for (size_t arg_i = 0; arg_i < g->clang_argv_len; arg_i += 1) { |
| 8769 | 8774 | cache_str(cache_hash, g->clang_argv[arg_i]); |
| 8770 | 8775 | } |
| 8771 | cache_bool(cache_hash, g->function_sections); | |
| 8772 | 8776 | |
| 8773 | 8777 | *out_cache_hash = cache_hash; |
| 8774 | 8778 | return ErrorNone; |
src/zig_llvm.cpp+3-2| ... | ... | @@ -145,8 +145,9 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri |
| 145 | 145 | TargetOptions opt; |
| 146 | 146 | opt.FunctionSections = function_sections; |
| 147 | 147 | |
| 148 | return reinterpret_cast<LLVMTargetMachineRef>(const_cast<TargetMachine *>( | |
| 149 | reinterpret_cast<Target*>(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM, OL, JIT))); | |
| 148 | TargetMachine *TM = reinterpret_cast<Target*>(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM, | |
| 149 | OL, JIT); | |
| 150 | return reinterpret_cast<LLVMTargetMachineRef>(TM); | |
| 150 | 151 | } |
| 151 | 152 | |
| 152 | 153 | bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMModuleRef module_ref, |