authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2025-10-17 10:48:35+02:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2025-10-17 10:48:35+02:00
log54b508776050470b5124ff4d7aee9be0ef113bca
tree162e15774d4f2ebdb46b240343e1fff026a6aedd
parentf785e4745d85f7056ab670989c5739b62b0df265
parent92b555a4ed4e3c4aa90886b97105b407ea87c000
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #25607 from alexrp/hexagon

Some `hexagon-linux` fixes + enable std tests in CI

6 files changed, 33 insertions(+), 31 deletions(-)

lib/std/meta.zig+11-8
......@@ -1,3 +1,4 @@
1const builtin = @import("builtin");
12const std = @import("std.zig");
23const debug = std.debug;
34const mem = std.mem;
......@@ -810,14 +811,6 @@ test eql {
810811 try testing.expect(eql(EU.tst(false), EU.tst(false)));
811812 try testing.expect(!eql(EU.tst(false), EU.tst(true)));
812813
813 const V = @Vector(4, u32);
814 const v1: V = @splat(1);
815 const v2: V = @splat(1);
816 const v3: V = @splat(2);
817
818 try testing.expect(eql(v1, v2));
819 try testing.expect(!eql(v1, v3));
820
821814 const CU = union(enum) {
822815 a: void,
823816 b: void,
......@@ -826,6 +819,16 @@ test eql {
826819
827820 try testing.expect(eql(CU{ .a = {} }, .a));
828821 try testing.expect(!eql(CU{ .a = {} }, .b));
822
823 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
824
825 const V = @Vector(4, u32);
826 const v1: V = @splat(1);
827 const v2: V = @splat(1);
828 const v3: V = @splat(2);
829
830 try testing.expect(eql(v1, v2));
831 try testing.expect(!eql(v1, v3));
829832}
830833
831834/// Deprecated: use `std.enums.fromInt` instead and handle null.
lib/std/os/linux.zig+17-16
......@@ -533,9 +533,10 @@ fn getauxvalImpl(index: usize) callconv(.c) usize {
533533// Some architectures (and some syscalls) require 64bit parameters to be passed
534534// in a even-aligned register pair.
535535const require_aligned_register_pair =
536 builtin.cpu.arch.isPowerPC32() or
536 builtin.cpu.arch.isArm() or
537 builtin.cpu.arch == .hexagon or
537538 builtin.cpu.arch.isMIPS32() or
538 builtin.cpu.arch.isArm();
539 builtin.cpu.arch.isPowerPC32();
539540
540541// Split a 64bit value into a {LSB,MSB} pair.
541542// The LE/BE variants specify the endianness to assume.
......@@ -640,7 +641,7 @@ pub fn futimens(fd: i32, times: ?*const [2]timespec) usize {
640641
641642pub fn utimensat(dirfd: i32, path: ?[*:0]const u8, times: ?*const [2]timespec, flags: u32) usize {
642643 return syscall4(
643 if (@hasField(SYS, "utimensat")) .utimensat else .utimensat_time64,
644 if (@hasField(SYS, "utimensat") and native_arch != .hexagon) .utimensat else .utimensat_time64,
644645 @as(usize, @bitCast(@as(isize, dirfd))),
645646 @intFromPtr(path),
646647 @intFromPtr(times),
......@@ -688,7 +689,7 @@ pub const futex_param4 = extern union {
688689/// defines which of the subsequent paramters are relevant.
689690pub fn futex(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, val2timeout: futex_param4, uaddr2: ?*const anyopaque, val3: u32) usize {
690691 return syscall6(
691 if (@hasField(SYS, "futex")) .futex else .futex_time64,
692 if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
692693 @intFromPtr(uaddr),
693694 @as(u32, @bitCast(futex_op)),
694695 val,
......@@ -702,7 +703,7 @@ pub fn futex(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, val2timeout:
702703/// futex_op that ignores the remaining arguments (e.g., FUTUX_OP.WAKE).
703704pub fn futex_3arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32) usize {
704705 return syscall3(
705 if (@hasField(SYS, "futex")) .futex else .futex_time64,
706 if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
706707 @intFromPtr(uaddr),
707708 @as(u32, @bitCast(futex_op)),
708709 val,
......@@ -713,7 +714,7 @@ pub fn futex_3arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32) usize {
713714/// futex_op that ignores the remaining arguments (e.g., FUTEX_OP.WAIT).
714715pub fn futex_4arg(uaddr: *const anyopaque, futex_op: FUTEX_OP, val: u32, timeout: ?*const timespec) usize {
715716 return syscall4(
716 if (@hasField(SYS, "futex")) .futex else .futex_time64,
717 if (@hasField(SYS, "futex") and native_arch != .hexagon) .futex else .futex_time64,
717718 @intFromPtr(uaddr),
718719 @as(u32, @bitCast(futex_op)),
719720 val,
......@@ -1093,7 +1094,7 @@ pub fn poll(fds: [*]pollfd, n: nfds_t, timeout: i32) usize {
10931094
10941095pub fn ppoll(fds: [*]pollfd, n: nfds_t, timeout: ?*timespec, sigmask: ?*const sigset_t) usize {
10951096 return syscall5(
1096 if (@hasField(SYS, "ppoll")) .ppoll else .ppoll_time64,
1097 if (@hasField(SYS, "ppoll") and native_arch != .hexagon) .ppoll else .ppoll_time64,
10971098 @intFromPtr(fds),
10981099 n,
10991100 @intFromPtr(timeout),
......@@ -1627,7 +1628,7 @@ pub fn clock_gettime(clk_id: clockid_t, tp: *timespec) usize {
16271628 }
16281629 }
16291630 return syscall2(
1630 if (@hasField(SYS, "clock_gettime")) .clock_gettime else .clock_gettime64,
1631 if (@hasField(SYS, "clock_gettime") and native_arch != .hexagon) .clock_gettime else .clock_gettime64,
16311632 @intFromEnum(clk_id),
16321633 @intFromPtr(tp),
16331634 );
......@@ -1645,7 +1646,7 @@ fn init_vdso_clock_gettime(clk: clockid_t, ts: *timespec) callconv(.c) usize {
16451646
16461647pub fn clock_getres(clk_id: i32, tp: *timespec) usize {
16471648 return syscall2(
1648 if (@hasField(SYS, "clock_getres")) .clock_getres else .clock_getres_time64,
1649 if (@hasField(SYS, "clock_getres") and native_arch != .hexagon) .clock_getres else .clock_getres_time64,
16491650 @as(usize, @bitCast(@as(isize, clk_id))),
16501651 @intFromPtr(tp),
16511652 );
......@@ -1653,7 +1654,7 @@ pub fn clock_getres(clk_id: i32, tp: *timespec) usize {
16531654
16541655pub fn clock_settime(clk_id: i32, tp: *const timespec) usize {
16551656 return syscall2(
1656 if (@hasField(SYS, "clock_settime")) .clock_settime else .clock_settime64,
1657 if (@hasField(SYS, "clock_settime") and native_arch != .hexagon) .clock_settime else .clock_settime64,
16571658 @as(usize, @bitCast(@as(isize, clk_id))),
16581659 @intFromPtr(tp),
16591660 );
......@@ -1661,7 +1662,7 @@ pub fn clock_settime(clk_id: i32, tp: *const timespec) usize {
16611662
16621663pub fn clock_nanosleep(clockid: clockid_t, flags: TIMER, request: *const timespec, remain: ?*timespec) usize {
16631664 return syscall4(
1664 if (@hasField(SYS, "clock_nanosleep")) .clock_nanosleep else .clock_nanosleep_time64,
1665 if (@hasField(SYS, "clock_nanosleep") and native_arch != .hexagon) .clock_nanosleep else .clock_nanosleep_time64,
16651666 @intFromEnum(clockid),
16661667 @as(u32, @bitCast(flags)),
16671668 @intFromPtr(request),
......@@ -2071,7 +2072,7 @@ pub fn recvmsg(fd: i32, msg: *msghdr, flags: u32) usize {
20712072
20722073pub fn recvmmsg(fd: i32, msgvec: ?[*]mmsghdr, vlen: u32, flags: u32, timeout: ?*timespec) usize {
20732074 return syscall5(
2074 if (@hasField(SYS, "recvmmsg")) .recvmmsg else .recvmmsg_time64,
2075 if (@hasField(SYS, "recvmmsg") and native_arch != .hexagon) .recvmmsg else .recvmmsg_time64,
20752076 @as(usize, @bitCast(@as(isize, fd))),
20762077 @intFromPtr(msgvec),
20772078 vlen,
......@@ -2421,7 +2422,7 @@ pub const itimerspec = extern struct {
24212422
24222423pub fn timerfd_gettime(fd: i32, curr_value: *itimerspec) usize {
24232424 return syscall2(
2424 if (@hasField(SYS, "timerfd_gettime")) .timerfd_gettime else .timerfd_gettime64,
2425 if (@hasField(SYS, "timerfd_gettime") and native_arch != .hexagon) .timerfd_gettime else .timerfd_gettime64,
24252426 @bitCast(@as(isize, fd)),
24262427 @intFromPtr(curr_value),
24272428 );
......@@ -2429,7 +2430,7 @@ pub fn timerfd_gettime(fd: i32, curr_value: *itimerspec) usize {
24292430
24302431pub fn timerfd_settime(fd: i32, flags: TFD.TIMER, new_value: *const itimerspec, old_value: ?*itimerspec) usize {
24312432 return syscall4(
2432 if (@hasField(SYS, "timerfd_settime")) .timerfd_settime else .timerfd_settime64,
2433 if (@hasField(SYS, "timerfd_settime") and native_arch != .hexagon) .timerfd_settime else .timerfd_settime64,
24332434 @bitCast(@as(isize, fd)),
24342435 @as(u32, @bitCast(flags)),
24352436 @intFromPtr(new_value),
......@@ -2632,7 +2633,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
26322633}
26332634
26342635pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
2635 if (comptime native_arch.isArm() or native_arch.isPowerPC32()) {
2636 if (comptime native_arch.isArm() or native_arch == .hexagon or native_arch.isPowerPC32()) {
26362637 // These architectures reorder the arguments so that a register is not skipped to align the
26372638 // register number that `offset` is passed in.
26382639
......@@ -8367,7 +8368,7 @@ pub const kernel_timespec = extern struct {
83678368};
83688369
83698370// https://github.com/ziglang/zig/issues/4726#issuecomment-2190337877
8370pub const timespec = if (native_arch == .riscv32) kernel_timespec else extern struct {
8371pub const timespec = if (native_arch == .hexagon or native_arch == .riscv32) kernel_timespec else extern struct {
83718372 sec: isize,
83728373 nsec: isize,
83738374};
lib/std/os/linux/hexagon.zig+1-1
......@@ -170,7 +170,7 @@ pub const Flock = extern struct {
170170
171171pub const blksize_t = i32;
172172pub const nlink_t = u32;
173pub const time_t = i32;
173pub const time_t = i64;
174174pub const mode_t = u32;
175175pub const off_t = i64;
176176pub const ino_t = u64;
lib/std/posix/test.zig+2
......@@ -495,6 +495,8 @@ test "mmap" {
495495 }
496496 }
497497
498 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
499
498500 // Map the upper half of the file
499501 {
500502 const file = try tmp.dir.openFile(test_out_file, .{});
lib/std/simd.zig+2
......@@ -228,6 +228,8 @@ pub fn extract(
228228}
229229
230230test "vector patterns" {
231 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
232
231233 const base = @Vector(4, u32){ 10, 20, 30, 40 };
232234 const other_base = @Vector(4, u32){ 55, 66, 77, 88 };
233235
test/tests.zig-6
......@@ -388,8 +388,6 @@ const test_targets = blk: {
388388 .arch_os_abi = "hexagon-linux-none",
389389 .cpu_features = "baseline+long_calls",
390390 }) catch unreachable,
391 // https://github.com/llvm/llvm-project/pull/111217
392 .skip_modules = &.{"std"},
393391 },
394392 .{
395393 .target = std.Target.Query.parse(.{
......@@ -397,8 +395,6 @@ const test_targets = blk: {
397395 .cpu_features = "baseline+long_calls",
398396 }) catch unreachable,
399397 .link_libc = true,
400 // https://github.com/llvm/llvm-project/pull/111217
401 .skip_modules = &.{"std"},
402398 },
403399 // Currently crashes in qemu-hexagon.
404400 // .{
......@@ -408,8 +404,6 @@ const test_targets = blk: {
408404 // }) catch unreachable,
409405 // .linkage = .dynamic,
410406 // .link_libc = true,
411 // // https://github.com/llvm/llvm-project/pull/111217
412 // .skip_modules = &.{"std"},
413407 // .extra_target = true,
414408 // },
415409