Commit 5633767b20b1e2c9a650bdf6045c260ec4ce42ef | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2024-07-25 01:31:42+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2024-07-30 01:26:09+02:00
log	5633767b20b1e2c9a650bdf6045c260ec4ce42ef
tree	cfdcf0e162f2abd615672849023d3bda4a14fc93
parent	adfbd8a98b2525dbd5fa9891968794f7ace31cd6
signature	Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.os.linux.start_pie: Add powerpc and powerpc64 support.

Closes #20305.

1 files changed, 28 insertions(+), 0 deletions(-)

lib
- std
  - os
    linux
    start_pie.zig

lib/std/os/linux/start_pie.zig+28

...	@@ -13,6 +13,7 @@ const R_HEXAGON_RELATIVE = 35;	...	@@ -13,6 +13,7 @@ const R_HEXAGON_RELATIVE = 35;
13	const R_LARCH_RELATIVE = 3;	13	const R_LARCH_RELATIVE = 3;
14	const R_68K_RELATIVE = 22;	14	const R_68K_RELATIVE = 22;
15	const R_MIPS_RELATIVE = 128;	15	const R_MIPS_RELATIVE = 128;
		16	const R_PPC_RELATIVE = 22;
16	const R_RISCV_RELATIVE = 3;	17	const R_RISCV_RELATIVE = 3;
17	const R_390_RELATIVE = 12;	18	const R_390_RELATIVE = 12;
18	const R_SPARC_RELATIVE = 22;	19	const R_SPARC_RELATIVE = 22;
...	@@ -28,6 +29,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {	...	@@ -28,6 +29,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
28	.loongarch32, .loongarch64 => R_LARCH_RELATIVE,	29	.loongarch32, .loongarch64 => R_LARCH_RELATIVE,
29	.m68k => R_68K_RELATIVE,	30	.m68k => R_68K_RELATIVE,
30	.mips, .mipsel, .mips64, .mips64el => R_MIPS_RELATIVE,	31	.mips, .mipsel, .mips64, .mips64el => R_MIPS_RELATIVE,
		32	.powerpc, .powerpcle, .powerpc64, .powerpc64le => R_PPC_RELATIVE,
31	.riscv32, .riscv64 => R_RISCV_RELATIVE,	33	.riscv32, .riscv64 => R_RISCV_RELATIVE,
32	.s390x => R_390_RELATIVE,	34	.s390x => R_390_RELATIVE,
33	else => @compileError("Missing R_RELATIVE definition for this target"),	35	else => @compileError("Missing R_RELATIVE definition for this target"),
...	@@ -138,6 +140,32 @@ fn getDynamicSymbol() [*]elf.Dyn {	...	@@ -138,6 +140,32 @@ fn getDynamicSymbol() [*]elf.Dyn {
138	:	140	:
139	: "lr"	141	: "lr"
140	),	142	),
		143	.powerpc, .powerpcle => asm volatile (
		144	\\ .weak _DYNAMIC
		145	\\ .hidden _DYNAMIC
		146	\\ bl 1f
		147	\\ .long _DYNAMIC - .
		148	\\ 1:
		149	\\ mflr %[ret]
		150	\\ lwz 4, 0(%[ret])
		151	\\ add %[ret], 4, %[ret]
		152	: [ret] "=r" (-> [*]elf.Dyn),
		153	:
		154	: "lr", "r4"
		155	),
		156	.powerpc64, .powerpc64le => asm volatile (
		157	\\ .weak _DYNAMIC
		158	\\ .hidden _DYNAMIC
		159	\\ bl 1f
		160	\\ .quad _DYNAMIC - .
		161	\\ 1:
		162	\\ mflr %[ret]
		163	\\ ld 4, 0(%[ret])
		164	\\ add %[ret], 4, %[ret]
		165	: [ret] "=r" (-> [*]elf.Dyn),
		166	:
		167	: "lr", "r4"
		168	),
141	.riscv32, .riscv64 => asm volatile (	169	.riscv32, .riscv64 => asm volatile (
142	\\ .weak _DYNAMIC	170	\\ .weak _DYNAMIC
143	\\ .hidden _DYNAMIC	171	\\ .hidden _DYNAMIC