authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2024-08-12 17:40:41+02:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2024-08-13 13:30:24+02:00
log5fd53dc36fb019a0930a9be0700411bb04c688a1
tree24668025293c54d4207aeb1283adc095a5e4dde1
parentd7c5fbce92b0da1bb302db4c4adab21775f3d98b

x86_64: start converting away from .got.zig knowledge


2 files changed, 29 insertions(+), 20 deletions(-)

src/arch/x86_64/CodeGen.zig+28-20
...@@ -12311,25 +12311,33 @@ fn genCall(self: *Self, info: union(enum) {...@@ -12311,25 +12311,33 @@ fn genCall(self: *Self, info: union(enum) {
12311 const zo = elf_file.zigObjectPtr().?;12311 const zo = elf_file.zigObjectPtr().?;
12312 const sym_index = try zo.getOrCreateMetadataForNav(elf_file, func.owner_nav);12312 const sym_index = try zo.getOrCreateMetadataForNav(elf_file, func.owner_nav);
12313 if (self.mod.pic) {12313 if (self.mod.pic) {
12314 const callee_reg: Register = switch (resolved_cc) {12314 // const callee_reg: Register = switch (resolved_cc) {
12315 .SysV => callee: {12315 // .SysV => callee: {
12316 if (!fn_info.is_var_args) break :callee .rax;12316 // if (!fn_info.is_var_args) break :callee .rax;
12317 const param_regs = abi.getCAbiIntParamRegs(resolved_cc);12317 // const param_regs = abi.getCAbiIntParamRegs(resolved_cc);
12318 break :callee if (call_info.gp_count < param_regs.len)12318 // break :callee if (call_info.gp_count < param_regs.len)
12319 param_regs[call_info.gp_count]12319 // param_regs[call_info.gp_count]
12320 else12320 // else
12321 .r10;12321 // .r10;
12322 },12322 // },
12323 .Win64 => .rax,12323 // .Win64 => .rax,
12324 else => unreachable,12324 // else => unreachable,
12325 };12325 // };
12326 try self.genSetReg(12326 // TODO convert to near jump
12327 callee_reg,12327 try self.asmMemory(.{ ._, .call }, .{
12328 Type.usize,12328 .base = .{ .reloc = .{
12329 .{ .load_symbol = .{ .sym = sym_index } },12329 .atom_index = try self.owner.getSymbolIndex(self),
12330 .{},12330 .sym_index = sym_index,
12331 );12331 } },
12332 try self.asmRegister(.{ ._, .call }, callee_reg);12332 .mod = .{ .rm = .{ .size = .qword } },
12333 });
12334 // try self.genSetReg(
12335 // callee_reg,
12336 // Type.usize,
12337 // .{ .load_symbol = .{ .sym = sym_index } },
12338 // .{},
12339 // );
12340 // try self.asmRegister(.{ ._, .call }, callee_reg);
12333 } else try self.asmMemory(.{ ._, .call }, .{12341 } else try self.asmMemory(.{ ._, .call }, .{
12334 .base = .{ .reloc = .{12342 .base = .{ .reloc = .{
12335 .atom_index = try self.owner.getSymbolIndex(self),12343 .atom_index = try self.owner.getSymbolIndex(self),
...@@ -14097,7 +14105,7 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {...@@ -14097,7 +14105,7 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
14097 else14105 else
14098 return self.fail("invalid modifier: '{s}'", .{modifier}),14106 return self.fail("invalid modifier: '{s}'", .{modifier}),
14099 .load_symbol => |sym_off| if (mem.eql(u8, modifier, "P"))14107 .load_symbol => |sym_off| if (mem.eql(u8, modifier, "P"))
14100 .{ .reg = try self.copyToTmpRegister(Type.usize, .{ .load_symbol = sym_off }) }14108 .{ .reg = try self.copyToTmpRegister(Type.usize, .{ .lea_symbol = sym_off }) }
14101 else14109 else
14102 return self.fail("invalid modifier: '{s}'", .{modifier}),14110 return self.fail("invalid modifier: '{s}'", .{modifier}),
14103 else => return self.fail("invalid constraint: '{s}'", .{op_str}),14111 else => return self.fail("invalid constraint: '{s}'", .{op_str}),
src/arch/x86_64/Lower.zig+1
...@@ -398,6 +398,7 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand)...@@ -398,6 +398,7 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand)
398398
399 _ = lower.reloc(.{ .linker_reloc = sym });399 _ = lower.reloc(.{ .linker_reloc = sym });
400 break :op if (lower.pic) switch (mnemonic) {400 break :op if (lower.pic) switch (mnemonic) {
401 .call => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
401 .lea => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },402 .lea => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
402 .mov => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },403 .mov => break :op .{ .mem = Memory.rip(mem_op.sib.ptr_size, 0) },
403 else => unreachable,404 else => unreachable,