authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-08-11 20:23:28-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-08-11 20:23:28-07:00
log61dac74128b196726acb8cba07544c5e96e58f49
treec7d34a14f366163e2b94481fa0a5f41ad9ed810e
parent6316fd95351fb207d0680f396123a455a91ea4a2
parentbf47cb4379519b3af4610696cf25a7f325866d72
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20985 from alexrp/gpu-nonsense

Follow-up on `std.Target` GPU changes in #20960

2 files changed, 24 insertions(+), 14 deletions(-)

lib/std/Target.zig+15-12
......@@ -1898,12 +1898,12 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
18981898 .sparc,
18991899 .spirv32,
19001900 .loongarch32,
1901 .dxil,
19011902 .xtensa,
19021903 => 32,
19031904
19041905 .aarch64,
19051906 .aarch64_be,
1906 .dxil,
19071907 .mips64,
19081908 .mips64el,
19091909 .powerpc64,
......@@ -2302,15 +2302,18 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
23022302 .short, .ushort => return 16,
23032303 .int, .uint, .float => return 32,
23042304 .long, .ulong, .longlong, .ulonglong, .double => return 64,
2305 .longdouble => return 64,
2305 .longdouble => return 128,
23062306 },
23072307
23082308 .opencl, .vulkan => switch (c_type) {
23092309 .char => return 8,
23102310 .short, .ushort => return 16,
23112311 .int, .uint, .float => return 32,
2312 .long, .ulong, .longlong, .ulonglong, .double => return 64,
2313 .longdouble => return 64,
2312 .long, .ulong, .double => return 64,
2313 .longlong, .ulonglong => return 128,
2314 // Note: The OpenCL specification does not guarantee a particular size for long double,
2315 // but clang uses 128 bits.
2316 .longdouble => return 128,
23142317 },
23152318
23162319 .ps4, .ps5 => switch (c_type) {
......@@ -2385,6 +2388,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23852388 .csky,
23862389 .x86,
23872390 .xcore,
2391 .dxil,
23882392 .loongarch32,
23892393 .kalimba,
23902394 .spu_2,
......@@ -2394,7 +2398,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23942398 .amdgcn,
23952399 .bpfel,
23962400 .bpfeb,
2397 .dxil,
23982401 .hexagon,
23992402 .m68k,
24002403 .mips,
......@@ -2404,9 +2407,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
24042407 .nvptx,
24052408 .nvptx64,
24062409 .s390x,
2407 .spirv,
2408 .spirv32,
2409 .spirv64,
24102410 => 8,
24112411
24122412 .aarch64,
......@@ -2421,6 +2421,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
24212421 .riscv32,
24222422 .riscv64,
24232423 .sparc64,
2424 .spirv,
2425 .spirv32,
2426 .spirv64,
24242427 .x86_64,
24252428 .ve,
24262429 .wasm32,
......@@ -2489,6 +2492,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
24892492
24902493 .csky,
24912494 .xcore,
2495 .dxil,
24922496 .loongarch32,
24932497 .kalimba,
24942498 .spu_2,
......@@ -2504,7 +2508,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25042508 .amdgcn,
25052509 .bpfel,
25062510 .bpfeb,
2507 .dxil,
25082511 .hexagon,
25092512 .x86,
25102513 .m68k,
......@@ -2515,9 +2518,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25152518 .nvptx,
25162519 .nvptx64,
25172520 .s390x,
2518 .spirv,
2519 .spirv32,
2520 .spirv64,
25212521 => 8,
25222522
25232523 .aarch64,
......@@ -2532,6 +2532,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25322532 .riscv32,
25332533 .riscv64,
25342534 .sparc64,
2535 .spirv,
2536 .spirv32,
2537 .spirv64,
25352538 .x86_64,
25362539 .ve,
25372540 .wasm32,
src/codegen/llvm.zig+9-2
......@@ -91,7 +91,14 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
9191 => unreachable, // Gated by hasLlvmSupport().
9292 };
9393 try llvm_triple.appendSlice(llvm_arch);
94 try llvm_triple.appendSlice("-unknown-");
94
95 // Unlike CPU backends, GPU backends actually care about the vendor tag.
96 try llvm_triple.appendSlice(switch (target.cpu.arch) {
97 .amdgcn => if (target.os.tag == .mesa3d) "-mesa-" else "-amd-",
98 .nvptx, .nvptx64 => "-nvidia-",
99 .spirv64 => if (target.os.tag == .amdhsa) "-amd-" else "-unknown-",
100 else => "-unknown-",
101 });
95102
96103 const llvm_os = switch (target.os.tag) {
97104 .freestanding => "unknown",
......@@ -111,6 +118,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
111118 .cuda => "cuda",
112119 .nvcl => "nvcl",
113120 .amdhsa => "amdhsa",
121 .opencl => "unknown", // https://llvm.org/docs/SPIRVUsage.html#target-triples
114122 .ps4 => "ps4",
115123 .ps5 => "ps5",
116124 .elfiamcu => "elfiamcu",
......@@ -132,7 +140,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
132140 .serenity => "serenity",
133141 .vulkan => "vulkan",
134142
135 .opencl,
136143 .glsl450,
137144 .plan9,
138145 .minix,