authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-08-11 20:23:28-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-08-11 20:23:28-07:00
log61dac74128b196726acb8cba07544c5e96e58f49
treec7d34a14f366163e2b94481fa0a5f41ad9ed810e
parent6316fd95351fb207d0680f396123a455a91ea4a2
parentbf47cb4379519b3af4610696cf25a7f325866d72
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20985 from alexrp/gpu-nonsense

Follow-up on `std.Target` GPU changes in #20960

2 files changed, 24 insertions(+), 14 deletions(-)

lib/std/Target.zig+15-12
...@@ -1898,12 +1898,12 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1898,12 +1898,12 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1898 .sparc,1898 .sparc,
1899 .spirv32,1899 .spirv32,
1900 .loongarch32,1900 .loongarch32,
1901 .dxil,
1901 .xtensa,1902 .xtensa,
1902 => 32,1903 => 32,
19031904
1904 .aarch64,1905 .aarch64,
1905 .aarch64_be,1906 .aarch64_be,
1906 .dxil,
1907 .mips64,1907 .mips64,
1908 .mips64el,1908 .mips64el,
1909 .powerpc64,1909 .powerpc64,
...@@ -2302,15 +2302,18 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2302,15 +2302,18 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2302 .short, .ushort => return 16,2302 .short, .ushort => return 16,
2303 .int, .uint, .float => return 32,2303 .int, .uint, .float => return 32,
2304 .long, .ulong, .longlong, .ulonglong, .double => return 64,2304 .long, .ulong, .longlong, .ulonglong, .double => return 64,
2305 .longdouble => return 64,2305 .longdouble => return 128,
2306 },2306 },
23072307
2308 .opencl, .vulkan => switch (c_type) {2308 .opencl, .vulkan => switch (c_type) {
2309 .char => return 8,2309 .char => return 8,
2310 .short, .ushort => return 16,2310 .short, .ushort => return 16,
2311 .int, .uint, .float => return 32,2311 .int, .uint, .float => return 32,
2312 .long, .ulong, .longlong, .ulonglong, .double => return 64,2312 .long, .ulong, .double => return 64,
2313 .longdouble => return 64,2313 .longlong, .ulonglong => return 128,
2314 // Note: The OpenCL specification does not guarantee a particular size for long double,
2315 // but clang uses 128 bits.
2316 .longdouble => return 128,
2314 },2317 },
23152318
2316 .ps4, .ps5 => switch (c_type) {2319 .ps4, .ps5 => switch (c_type) {
...@@ -2385,6 +2388,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2385,6 +2388,7 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2385 .csky,2388 .csky,
2386 .x86,2389 .x86,
2387 .xcore,2390 .xcore,
2391 .dxil,
2388 .loongarch32,2392 .loongarch32,
2389 .kalimba,2393 .kalimba,
2390 .spu_2,2394 .spu_2,
...@@ -2394,7 +2398,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2394,7 +2398,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2394 .amdgcn,2398 .amdgcn,
2395 .bpfel,2399 .bpfel,
2396 .bpfeb,2400 .bpfeb,
2397 .dxil,
2398 .hexagon,2401 .hexagon,
2399 .m68k,2402 .m68k,
2400 .mips,2403 .mips,
...@@ -2404,9 +2407,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2404,9 +2407,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2404 .nvptx,2407 .nvptx,
2405 .nvptx64,2408 .nvptx64,
2406 .s390x,2409 .s390x,
2407 .spirv,
2408 .spirv32,
2409 .spirv64,
2410 => 8,2410 => 8,
24112411
2412 .aarch64,2412 .aarch64,
...@@ -2421,6 +2421,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2421,6 +2421,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2421 .riscv32,2421 .riscv32,
2422 .riscv64,2422 .riscv64,
2423 .sparc64,2423 .sparc64,
2424 .spirv,
2425 .spirv32,
2426 .spirv64,
2424 .x86_64,2427 .x86_64,
2425 .ve,2428 .ve,
2426 .wasm32,2429 .wasm32,
...@@ -2489,6 +2492,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2489,6 +2492,7 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
24892492
2490 .csky,2493 .csky,
2491 .xcore,2494 .xcore,
2495 .dxil,
2492 .loongarch32,2496 .loongarch32,
2493 .kalimba,2497 .kalimba,
2494 .spu_2,2498 .spu_2,
...@@ -2504,7 +2508,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2504,7 +2508,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2504 .amdgcn,2508 .amdgcn,
2505 .bpfel,2509 .bpfel,
2506 .bpfeb,2510 .bpfeb,
2507 .dxil,
2508 .hexagon,2511 .hexagon,
2509 .x86,2512 .x86,
2510 .m68k,2513 .m68k,
...@@ -2515,9 +2518,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2515,9 +2518,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2515 .nvptx,2518 .nvptx,
2516 .nvptx64,2519 .nvptx64,
2517 .s390x,2520 .s390x,
2518 .spirv,
2519 .spirv32,
2520 .spirv64,
2521 => 8,2521 => 8,
25222522
2523 .aarch64,2523 .aarch64,
...@@ -2532,6 +2532,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2532,6 +2532,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2532 .riscv32,2532 .riscv32,
2533 .riscv64,2533 .riscv64,
2534 .sparc64,2534 .sparc64,
2535 .spirv,
2536 .spirv32,
2537 .spirv64,
2535 .x86_64,2538 .x86_64,
2536 .ve,2539 .ve,
2537 .wasm32,2540 .wasm32,
src/codegen/llvm.zig+9-2
...@@ -91,7 +91,14 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -91,7 +91,14 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
91 => unreachable, // Gated by hasLlvmSupport().91 => unreachable, // Gated by hasLlvmSupport().
92 };92 };
93 try llvm_triple.appendSlice(llvm_arch);93 try llvm_triple.appendSlice(llvm_arch);
94 try llvm_triple.appendSlice("-unknown-");94
95 // Unlike CPU backends, GPU backends actually care about the vendor tag.
96 try llvm_triple.appendSlice(switch (target.cpu.arch) {
97 .amdgcn => if (target.os.tag == .mesa3d) "-mesa-" else "-amd-",
98 .nvptx, .nvptx64 => "-nvidia-",
99 .spirv64 => if (target.os.tag == .amdhsa) "-amd-" else "-unknown-",
100 else => "-unknown-",
101 });
95102
96 const llvm_os = switch (target.os.tag) {103 const llvm_os = switch (target.os.tag) {
97 .freestanding => "unknown",104 .freestanding => "unknown",
...@@ -111,6 +118,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -111,6 +118,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
111 .cuda => "cuda",118 .cuda => "cuda",
112 .nvcl => "nvcl",119 .nvcl => "nvcl",
113 .amdhsa => "amdhsa",120 .amdhsa => "amdhsa",
121 .opencl => "unknown", // https://llvm.org/docs/SPIRVUsage.html#target-triples
114 .ps4 => "ps4",122 .ps4 => "ps4",
115 .ps5 => "ps5",123 .ps5 => "ps5",
116 .elfiamcu => "elfiamcu",124 .elfiamcu => "elfiamcu",
...@@ -132,7 +140,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -132,7 +140,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
132 .serenity => "serenity",140 .serenity => "serenity",
133 .vulkan => "vulkan",141 .vulkan => "vulkan",
134142
135 .opencl,
136 .glsl450,143 .glsl450,
137 .plan9,144 .plan9,
138 .minix,145 .minix,