| ... | ... | @@ -40445,6 +40445,11 @@ __ai float32x4_t vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2 |
| 40445 | 40445 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40446 | 40446 | return __ret; |
| 40447 | 40447 | } |
| 40448 | __ai float32x4_t __noswap_vcmlaq_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40449 | float32x4_t __ret; |
| 40450 | __ret = (float32x4_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 40451 | return __ret; |
| 40452 | } |
| 40448 | 40453 | #endif |
| 40449 | 40454 | |
| 40450 | 40455 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40463,6 +40468,123 @@ __ai float32x2_t vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) |
| 40463 | 40468 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40464 | 40469 | return __ret; |
| 40465 | 40470 | } |
| 40471 | __ai float32x2_t __noswap_vcmla_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40472 | float32x2_t __ret; |
| 40473 | __ret = (float32x2_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40474 | return __ret; |
| 40475 | } |
| 40476 | #endif |
| 40477 | |
| 40478 | #ifdef __LITTLE_ENDIAN__ |
| 40479 | #define vcmla_lane_f32(__p0_169, __p1_169, __p2_169, __p3_169) __extension__ ({ \ |
| 40480 | float32x2_t __s0_169 = __p0_169; \ |
| 40481 | float32x2_t __s1_169 = __p1_169; \ |
| 40482 | float32x2_t __s2_169 = __p2_169; \ |
| 40483 | float32x2_t __ret_169; \ |
| 40484 | float32x2_t __reint_169 = __s2_169; \ |
| 40485 | uint64x1_t __reint1_169 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_169, __p3_169)}; \ |
| 40486 | __ret_169 = vcmla_f32(__s0_169, __s1_169, *(float32x2_t *) &__reint1_169); \ |
| 40487 | __ret_169; \ |
| 40488 | }) |
| 40489 | #else |
| 40490 | #define vcmla_lane_f32(__p0_170, __p1_170, __p2_170, __p3_170) __extension__ ({ \ |
| 40491 | float32x2_t __s0_170 = __p0_170; \ |
| 40492 | float32x2_t __s1_170 = __p1_170; \ |
| 40493 | float32x2_t __s2_170 = __p2_170; \ |
| 40494 | float32x2_t __rev0_170; __rev0_170 = __builtin_shufflevector(__s0_170, __s0_170, 1, 0); \ |
| 40495 | float32x2_t __rev1_170; __rev1_170 = __builtin_shufflevector(__s1_170, __s1_170, 1, 0); \ |
| 40496 | float32x2_t __rev2_170; __rev2_170 = __builtin_shufflevector(__s2_170, __s2_170, 1, 0); \ |
| 40497 | float32x2_t __ret_170; \ |
| 40498 | float32x2_t __reint_170 = __rev2_170; \ |
| 40499 | uint64x1_t __reint1_170 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_170, __p3_170)}; \ |
| 40500 | __ret_170 = __noswap_vcmla_f32(__rev0_170, __rev1_170, *(float32x2_t *) &__reint1_170); \ |
| 40501 | __ret_170 = __builtin_shufflevector(__ret_170, __ret_170, 1, 0); \ |
| 40502 | __ret_170; \ |
| 40503 | }) |
| 40504 | #endif |
| 40505 | |
| 40506 | #ifdef __LITTLE_ENDIAN__ |
| 40507 | #define vcmlaq_lane_f32(__p0_171, __p1_171, __p2_171, __p3_171) __extension__ ({ \ |
| 40508 | float32x4_t __s0_171 = __p0_171; \ |
| 40509 | float32x4_t __s1_171 = __p1_171; \ |
| 40510 | float32x2_t __s2_171 = __p2_171; \ |
| 40511 | float32x4_t __ret_171; \ |
| 40512 | float32x2_t __reint_171 = __s2_171; \ |
| 40513 | uint64x2_t __reint1_171 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_171, __p3_171), vget_lane_u64(*(uint64x1_t *) &__reint_171, __p3_171)}; \ |
| 40514 | __ret_171 = vcmlaq_f32(__s0_171, __s1_171, *(float32x4_t *) &__reint1_171); \ |
| 40515 | __ret_171; \ |
| 40516 | }) |
| 40517 | #else |
| 40518 | #define vcmlaq_lane_f32(__p0_172, __p1_172, __p2_172, __p3_172) __extension__ ({ \ |
| 40519 | float32x4_t __s0_172 = __p0_172; \ |
| 40520 | float32x4_t __s1_172 = __p1_172; \ |
| 40521 | float32x2_t __s2_172 = __p2_172; \ |
| 40522 | float32x4_t __rev0_172; __rev0_172 = __builtin_shufflevector(__s0_172, __s0_172, 3, 2, 1, 0); \ |
| 40523 | float32x4_t __rev1_172; __rev1_172 = __builtin_shufflevector(__s1_172, __s1_172, 3, 2, 1, 0); \ |
| 40524 | float32x2_t __rev2_172; __rev2_172 = __builtin_shufflevector(__s2_172, __s2_172, 1, 0); \ |
| 40525 | float32x4_t __ret_172; \ |
| 40526 | float32x2_t __reint_172 = __rev2_172; \ |
| 40527 | uint64x2_t __reint1_172 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_172, __p3_172), vget_lane_u64(*(uint64x1_t *) &__reint_172, __p3_172)}; \ |
| 40528 | __ret_172 = __noswap_vcmlaq_f32(__rev0_172, __rev1_172, *(float32x4_t *) &__reint1_172); \ |
| 40529 | __ret_172 = __builtin_shufflevector(__ret_172, __ret_172, 3, 2, 1, 0); \ |
| 40530 | __ret_172; \ |
| 40531 | }) |
| 40532 | #endif |
| 40533 | |
| 40534 | #ifdef __LITTLE_ENDIAN__ |
| 40535 | #define vcmla_laneq_f32(__p0_173, __p1_173, __p2_173, __p3_173) __extension__ ({ \ |
| 40536 | float32x2_t __s0_173 = __p0_173; \ |
| 40537 | float32x2_t __s1_173 = __p1_173; \ |
| 40538 | float32x4_t __s2_173 = __p2_173; \ |
| 40539 | float32x2_t __ret_173; \ |
| 40540 | float32x4_t __reint_173 = __s2_173; \ |
| 40541 | uint64x1_t __reint1_173 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_173, __p3_173)}; \ |
| 40542 | __ret_173 = vcmla_f32(__s0_173, __s1_173, *(float32x2_t *) &__reint1_173); \ |
| 40543 | __ret_173; \ |
| 40544 | }) |
| 40545 | #else |
| 40546 | #define vcmla_laneq_f32(__p0_174, __p1_174, __p2_174, __p3_174) __extension__ ({ \ |
| 40547 | float32x2_t __s0_174 = __p0_174; \ |
| 40548 | float32x2_t __s1_174 = __p1_174; \ |
| 40549 | float32x4_t __s2_174 = __p2_174; \ |
| 40550 | float32x2_t __rev0_174; __rev0_174 = __builtin_shufflevector(__s0_174, __s0_174, 1, 0); \ |
| 40551 | float32x2_t __rev1_174; __rev1_174 = __builtin_shufflevector(__s1_174, __s1_174, 1, 0); \ |
| 40552 | float32x4_t __rev2_174; __rev2_174 = __builtin_shufflevector(__s2_174, __s2_174, 3, 2, 1, 0); \ |
| 40553 | float32x2_t __ret_174; \ |
| 40554 | float32x4_t __reint_174 = __rev2_174; \ |
| 40555 | uint64x1_t __reint1_174 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_174, __p3_174)}; \ |
| 40556 | __ret_174 = __noswap_vcmla_f32(__rev0_174, __rev1_174, *(float32x2_t *) &__reint1_174); \ |
| 40557 | __ret_174 = __builtin_shufflevector(__ret_174, __ret_174, 1, 0); \ |
| 40558 | __ret_174; \ |
| 40559 | }) |
| 40560 | #endif |
| 40561 | |
| 40562 | #ifdef __LITTLE_ENDIAN__ |
| 40563 | #define vcmlaq_laneq_f32(__p0_175, __p1_175, __p2_175, __p3_175) __extension__ ({ \ |
| 40564 | float32x4_t __s0_175 = __p0_175; \ |
| 40565 | float32x4_t __s1_175 = __p1_175; \ |
| 40566 | float32x4_t __s2_175 = __p2_175; \ |
| 40567 | float32x4_t __ret_175; \ |
| 40568 | float32x4_t __reint_175 = __s2_175; \ |
| 40569 | uint64x2_t __reint1_175 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_175, __p3_175), vgetq_lane_u64(*(uint64x2_t *) &__reint_175, __p3_175)}; \ |
| 40570 | __ret_175 = vcmlaq_f32(__s0_175, __s1_175, *(float32x4_t *) &__reint1_175); \ |
| 40571 | __ret_175; \ |
| 40572 | }) |
| 40573 | #else |
| 40574 | #define vcmlaq_laneq_f32(__p0_176, __p1_176, __p2_176, __p3_176) __extension__ ({ \ |
| 40575 | float32x4_t __s0_176 = __p0_176; \ |
| 40576 | float32x4_t __s1_176 = __p1_176; \ |
| 40577 | float32x4_t __s2_176 = __p2_176; \ |
| 40578 | float32x4_t __rev0_176; __rev0_176 = __builtin_shufflevector(__s0_176, __s0_176, 3, 2, 1, 0); \ |
| 40579 | float32x4_t __rev1_176; __rev1_176 = __builtin_shufflevector(__s1_176, __s1_176, 3, 2, 1, 0); \ |
| 40580 | float32x4_t __rev2_176; __rev2_176 = __builtin_shufflevector(__s2_176, __s2_176, 3, 2, 1, 0); \ |
| 40581 | float32x4_t __ret_176; \ |
| 40582 | float32x4_t __reint_176 = __rev2_176; \ |
| 40583 | uint64x2_t __reint1_176 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_176, __p3_176), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_176, __p3_176)}; \ |
| 40584 | __ret_176 = __noswap_vcmlaq_f32(__rev0_176, __rev1_176, *(float32x4_t *) &__reint1_176); \ |
| 40585 | __ret_176 = __builtin_shufflevector(__ret_176, __ret_176, 3, 2, 1, 0); \ |
| 40586 | __ret_176; \ |
| 40587 | }) |
| 40466 | 40588 | #endif |
| 40467 | 40589 | |
| 40468 | 40590 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40481,6 +40603,11 @@ __ai float32x4_t vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4 |
| 40481 | 40603 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40482 | 40604 | return __ret; |
| 40483 | 40605 | } |
| 40606 | __ai float32x4_t __noswap_vcmlaq_rot180_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40607 | float32x4_t __ret; |
| 40608 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 40609 | return __ret; |
| 40610 | } |
| 40484 | 40611 | #endif |
| 40485 | 40612 | |
| 40486 | 40613 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40499,6 +40626,123 @@ __ai float32x2_t vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_ |
| 40499 | 40626 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40500 | 40627 | return __ret; |
| 40501 | 40628 | } |
| 40629 | __ai float32x2_t __noswap_vcmla_rot180_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40630 | float32x2_t __ret; |
| 40631 | __ret = (float32x2_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40632 | return __ret; |
| 40633 | } |
| 40634 | #endif |
| 40635 | |
| 40636 | #ifdef __LITTLE_ENDIAN__ |
| 40637 | #define vcmla_rot180_lane_f32(__p0_177, __p1_177, __p2_177, __p3_177) __extension__ ({ \ |
| 40638 | float32x2_t __s0_177 = __p0_177; \ |
| 40639 | float32x2_t __s1_177 = __p1_177; \ |
| 40640 | float32x2_t __s2_177 = __p2_177; \ |
| 40641 | float32x2_t __ret_177; \ |
| 40642 | float32x2_t __reint_177 = __s2_177; \ |
| 40643 | uint64x1_t __reint1_177 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_177, __p3_177)}; \ |
| 40644 | __ret_177 = vcmla_rot180_f32(__s0_177, __s1_177, *(float32x2_t *) &__reint1_177); \ |
| 40645 | __ret_177; \ |
| 40646 | }) |
| 40647 | #else |
| 40648 | #define vcmla_rot180_lane_f32(__p0_178, __p1_178, __p2_178, __p3_178) __extension__ ({ \ |
| 40649 | float32x2_t __s0_178 = __p0_178; \ |
| 40650 | float32x2_t __s1_178 = __p1_178; \ |
| 40651 | float32x2_t __s2_178 = __p2_178; \ |
| 40652 | float32x2_t __rev0_178; __rev0_178 = __builtin_shufflevector(__s0_178, __s0_178, 1, 0); \ |
| 40653 | float32x2_t __rev1_178; __rev1_178 = __builtin_shufflevector(__s1_178, __s1_178, 1, 0); \ |
| 40654 | float32x2_t __rev2_178; __rev2_178 = __builtin_shufflevector(__s2_178, __s2_178, 1, 0); \ |
| 40655 | float32x2_t __ret_178; \ |
| 40656 | float32x2_t __reint_178 = __rev2_178; \ |
| 40657 | uint64x1_t __reint1_178 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_178, __p3_178)}; \ |
| 40658 | __ret_178 = __noswap_vcmla_rot180_f32(__rev0_178, __rev1_178, *(float32x2_t *) &__reint1_178); \ |
| 40659 | __ret_178 = __builtin_shufflevector(__ret_178, __ret_178, 1, 0); \ |
| 40660 | __ret_178; \ |
| 40661 | }) |
| 40662 | #endif |
| 40663 | |
| 40664 | #ifdef __LITTLE_ENDIAN__ |
| 40665 | #define vcmlaq_rot180_lane_f32(__p0_179, __p1_179, __p2_179, __p3_179) __extension__ ({ \ |
| 40666 | float32x4_t __s0_179 = __p0_179; \ |
| 40667 | float32x4_t __s1_179 = __p1_179; \ |
| 40668 | float32x2_t __s2_179 = __p2_179; \ |
| 40669 | float32x4_t __ret_179; \ |
| 40670 | float32x2_t __reint_179 = __s2_179; \ |
| 40671 | uint64x2_t __reint1_179 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179), vget_lane_u64(*(uint64x1_t *) &__reint_179, __p3_179)}; \ |
| 40672 | __ret_179 = vcmlaq_rot180_f32(__s0_179, __s1_179, *(float32x4_t *) &__reint1_179); \ |
| 40673 | __ret_179; \ |
| 40674 | }) |
| 40675 | #else |
| 40676 | #define vcmlaq_rot180_lane_f32(__p0_180, __p1_180, __p2_180, __p3_180) __extension__ ({ \ |
| 40677 | float32x4_t __s0_180 = __p0_180; \ |
| 40678 | float32x4_t __s1_180 = __p1_180; \ |
| 40679 | float32x2_t __s2_180 = __p2_180; \ |
| 40680 | float32x4_t __rev0_180; __rev0_180 = __builtin_shufflevector(__s0_180, __s0_180, 3, 2, 1, 0); \ |
| 40681 | float32x4_t __rev1_180; __rev1_180 = __builtin_shufflevector(__s1_180, __s1_180, 3, 2, 1, 0); \ |
| 40682 | float32x2_t __rev2_180; __rev2_180 = __builtin_shufflevector(__s2_180, __s2_180, 1, 0); \ |
| 40683 | float32x4_t __ret_180; \ |
| 40684 | float32x2_t __reint_180 = __rev2_180; \ |
| 40685 | uint64x2_t __reint1_180 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180), vget_lane_u64(*(uint64x1_t *) &__reint_180, __p3_180)}; \ |
| 40686 | __ret_180 = __noswap_vcmlaq_rot180_f32(__rev0_180, __rev1_180, *(float32x4_t *) &__reint1_180); \ |
| 40687 | __ret_180 = __builtin_shufflevector(__ret_180, __ret_180, 3, 2, 1, 0); \ |
| 40688 | __ret_180; \ |
| 40689 | }) |
| 40690 | #endif |
| 40691 | |
| 40692 | #ifdef __LITTLE_ENDIAN__ |
| 40693 | #define vcmla_rot180_laneq_f32(__p0_181, __p1_181, __p2_181, __p3_181) __extension__ ({ \ |
| 40694 | float32x2_t __s0_181 = __p0_181; \ |
| 40695 | float32x2_t __s1_181 = __p1_181; \ |
| 40696 | float32x4_t __s2_181 = __p2_181; \ |
| 40697 | float32x2_t __ret_181; \ |
| 40698 | float32x4_t __reint_181 = __s2_181; \ |
| 40699 | uint64x1_t __reint1_181 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_181, __p3_181)}; \ |
| 40700 | __ret_181 = vcmla_rot180_f32(__s0_181, __s1_181, *(float32x2_t *) &__reint1_181); \ |
| 40701 | __ret_181; \ |
| 40702 | }) |
| 40703 | #else |
| 40704 | #define vcmla_rot180_laneq_f32(__p0_182, __p1_182, __p2_182, __p3_182) __extension__ ({ \ |
| 40705 | float32x2_t __s0_182 = __p0_182; \ |
| 40706 | float32x2_t __s1_182 = __p1_182; \ |
| 40707 | float32x4_t __s2_182 = __p2_182; \ |
| 40708 | float32x2_t __rev0_182; __rev0_182 = __builtin_shufflevector(__s0_182, __s0_182, 1, 0); \ |
| 40709 | float32x2_t __rev1_182; __rev1_182 = __builtin_shufflevector(__s1_182, __s1_182, 1, 0); \ |
| 40710 | float32x4_t __rev2_182; __rev2_182 = __builtin_shufflevector(__s2_182, __s2_182, 3, 2, 1, 0); \ |
| 40711 | float32x2_t __ret_182; \ |
| 40712 | float32x4_t __reint_182 = __rev2_182; \ |
| 40713 | uint64x1_t __reint1_182 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_182, __p3_182)}; \ |
| 40714 | __ret_182 = __noswap_vcmla_rot180_f32(__rev0_182, __rev1_182, *(float32x2_t *) &__reint1_182); \ |
| 40715 | __ret_182 = __builtin_shufflevector(__ret_182, __ret_182, 1, 0); \ |
| 40716 | __ret_182; \ |
| 40717 | }) |
| 40718 | #endif |
| 40719 | |
| 40720 | #ifdef __LITTLE_ENDIAN__ |
| 40721 | #define vcmlaq_rot180_laneq_f32(__p0_183, __p1_183, __p2_183, __p3_183) __extension__ ({ \ |
| 40722 | float32x4_t __s0_183 = __p0_183; \ |
| 40723 | float32x4_t __s1_183 = __p1_183; \ |
| 40724 | float32x4_t __s2_183 = __p2_183; \ |
| 40725 | float32x4_t __ret_183; \ |
| 40726 | float32x4_t __reint_183 = __s2_183; \ |
| 40727 | uint64x2_t __reint1_183 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183), vgetq_lane_u64(*(uint64x2_t *) &__reint_183, __p3_183)}; \ |
| 40728 | __ret_183 = vcmlaq_rot180_f32(__s0_183, __s1_183, *(float32x4_t *) &__reint1_183); \ |
| 40729 | __ret_183; \ |
| 40730 | }) |
| 40731 | #else |
| 40732 | #define vcmlaq_rot180_laneq_f32(__p0_184, __p1_184, __p2_184, __p3_184) __extension__ ({ \ |
| 40733 | float32x4_t __s0_184 = __p0_184; \ |
| 40734 | float32x4_t __s1_184 = __p1_184; \ |
| 40735 | float32x4_t __s2_184 = __p2_184; \ |
| 40736 | float32x4_t __rev0_184; __rev0_184 = __builtin_shufflevector(__s0_184, __s0_184, 3, 2, 1, 0); \ |
| 40737 | float32x4_t __rev1_184; __rev1_184 = __builtin_shufflevector(__s1_184, __s1_184, 3, 2, 1, 0); \ |
| 40738 | float32x4_t __rev2_184; __rev2_184 = __builtin_shufflevector(__s2_184, __s2_184, 3, 2, 1, 0); \ |
| 40739 | float32x4_t __ret_184; \ |
| 40740 | float32x4_t __reint_184 = __rev2_184; \ |
| 40741 | uint64x2_t __reint1_184 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_184, __p3_184)}; \ |
| 40742 | __ret_184 = __noswap_vcmlaq_rot180_f32(__rev0_184, __rev1_184, *(float32x4_t *) &__reint1_184); \ |
| 40743 | __ret_184 = __builtin_shufflevector(__ret_184, __ret_184, 3, 2, 1, 0); \ |
| 40744 | __ret_184; \ |
| 40745 | }) |
| 40502 | 40746 | #endif |
| 40503 | 40747 | |
| 40504 | 40748 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40517,6 +40761,11 @@ __ai float32x4_t vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4 |
| 40517 | 40761 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40518 | 40762 | return __ret; |
| 40519 | 40763 | } |
| 40764 | __ai float32x4_t __noswap_vcmlaq_rot270_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40765 | float32x4_t __ret; |
| 40766 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 40767 | return __ret; |
| 40768 | } |
| 40520 | 40769 | #endif |
| 40521 | 40770 | |
| 40522 | 40771 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40535,6 +40784,123 @@ __ai float32x2_t vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_ |
| 40535 | 40784 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40536 | 40785 | return __ret; |
| 40537 | 40786 | } |
| 40787 | __ai float32x2_t __noswap_vcmla_rot270_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40788 | float32x2_t __ret; |
| 40789 | __ret = (float32x2_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40790 | return __ret; |
| 40791 | } |
| 40792 | #endif |
| 40793 | |
| 40794 | #ifdef __LITTLE_ENDIAN__ |
| 40795 | #define vcmla_rot270_lane_f32(__p0_185, __p1_185, __p2_185, __p3_185) __extension__ ({ \ |
| 40796 | float32x2_t __s0_185 = __p0_185; \ |
| 40797 | float32x2_t __s1_185 = __p1_185; \ |
| 40798 | float32x2_t __s2_185 = __p2_185; \ |
| 40799 | float32x2_t __ret_185; \ |
| 40800 | float32x2_t __reint_185 = __s2_185; \ |
| 40801 | uint64x1_t __reint1_185 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_185, __p3_185)}; \ |
| 40802 | __ret_185 = vcmla_rot270_f32(__s0_185, __s1_185, *(float32x2_t *) &__reint1_185); \ |
| 40803 | __ret_185; \ |
| 40804 | }) |
| 40805 | #else |
| 40806 | #define vcmla_rot270_lane_f32(__p0_186, __p1_186, __p2_186, __p3_186) __extension__ ({ \ |
| 40807 | float32x2_t __s0_186 = __p0_186; \ |
| 40808 | float32x2_t __s1_186 = __p1_186; \ |
| 40809 | float32x2_t __s2_186 = __p2_186; \ |
| 40810 | float32x2_t __rev0_186; __rev0_186 = __builtin_shufflevector(__s0_186, __s0_186, 1, 0); \ |
| 40811 | float32x2_t __rev1_186; __rev1_186 = __builtin_shufflevector(__s1_186, __s1_186, 1, 0); \ |
| 40812 | float32x2_t __rev2_186; __rev2_186 = __builtin_shufflevector(__s2_186, __s2_186, 1, 0); \ |
| 40813 | float32x2_t __ret_186; \ |
| 40814 | float32x2_t __reint_186 = __rev2_186; \ |
| 40815 | uint64x1_t __reint1_186 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_186, __p3_186)}; \ |
| 40816 | __ret_186 = __noswap_vcmla_rot270_f32(__rev0_186, __rev1_186, *(float32x2_t *) &__reint1_186); \ |
| 40817 | __ret_186 = __builtin_shufflevector(__ret_186, __ret_186, 1, 0); \ |
| 40818 | __ret_186; \ |
| 40819 | }) |
| 40820 | #endif |
| 40821 | |
| 40822 | #ifdef __LITTLE_ENDIAN__ |
| 40823 | #define vcmlaq_rot270_lane_f32(__p0_187, __p1_187, __p2_187, __p3_187) __extension__ ({ \ |
| 40824 | float32x4_t __s0_187 = __p0_187; \ |
| 40825 | float32x4_t __s1_187 = __p1_187; \ |
| 40826 | float32x2_t __s2_187 = __p2_187; \ |
| 40827 | float32x4_t __ret_187; \ |
| 40828 | float32x2_t __reint_187 = __s2_187; \ |
| 40829 | uint64x2_t __reint1_187 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187), vget_lane_u64(*(uint64x1_t *) &__reint_187, __p3_187)}; \ |
| 40830 | __ret_187 = vcmlaq_rot270_f32(__s0_187, __s1_187, *(float32x4_t *) &__reint1_187); \ |
| 40831 | __ret_187; \ |
| 40832 | }) |
| 40833 | #else |
| 40834 | #define vcmlaq_rot270_lane_f32(__p0_188, __p1_188, __p2_188, __p3_188) __extension__ ({ \ |
| 40835 | float32x4_t __s0_188 = __p0_188; \ |
| 40836 | float32x4_t __s1_188 = __p1_188; \ |
| 40837 | float32x2_t __s2_188 = __p2_188; \ |
| 40838 | float32x4_t __rev0_188; __rev0_188 = __builtin_shufflevector(__s0_188, __s0_188, 3, 2, 1, 0); \ |
| 40839 | float32x4_t __rev1_188; __rev1_188 = __builtin_shufflevector(__s1_188, __s1_188, 3, 2, 1, 0); \ |
| 40840 | float32x2_t __rev2_188; __rev2_188 = __builtin_shufflevector(__s2_188, __s2_188, 1, 0); \ |
| 40841 | float32x4_t __ret_188; \ |
| 40842 | float32x2_t __reint_188 = __rev2_188; \ |
| 40843 | uint64x2_t __reint1_188 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188), vget_lane_u64(*(uint64x1_t *) &__reint_188, __p3_188)}; \ |
| 40844 | __ret_188 = __noswap_vcmlaq_rot270_f32(__rev0_188, __rev1_188, *(float32x4_t *) &__reint1_188); \ |
| 40845 | __ret_188 = __builtin_shufflevector(__ret_188, __ret_188, 3, 2, 1, 0); \ |
| 40846 | __ret_188; \ |
| 40847 | }) |
| 40848 | #endif |
| 40849 | |
| 40850 | #ifdef __LITTLE_ENDIAN__ |
| 40851 | #define vcmla_rot270_laneq_f32(__p0_189, __p1_189, __p2_189, __p3_189) __extension__ ({ \ |
| 40852 | float32x2_t __s0_189 = __p0_189; \ |
| 40853 | float32x2_t __s1_189 = __p1_189; \ |
| 40854 | float32x4_t __s2_189 = __p2_189; \ |
| 40855 | float32x2_t __ret_189; \ |
| 40856 | float32x4_t __reint_189 = __s2_189; \ |
| 40857 | uint64x1_t __reint1_189 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_189, __p3_189)}; \ |
| 40858 | __ret_189 = vcmla_rot270_f32(__s0_189, __s1_189, *(float32x2_t *) &__reint1_189); \ |
| 40859 | __ret_189; \ |
| 40860 | }) |
| 40861 | #else |
| 40862 | #define vcmla_rot270_laneq_f32(__p0_190, __p1_190, __p2_190, __p3_190) __extension__ ({ \ |
| 40863 | float32x2_t __s0_190 = __p0_190; \ |
| 40864 | float32x2_t __s1_190 = __p1_190; \ |
| 40865 | float32x4_t __s2_190 = __p2_190; \ |
| 40866 | float32x2_t __rev0_190; __rev0_190 = __builtin_shufflevector(__s0_190, __s0_190, 1, 0); \ |
| 40867 | float32x2_t __rev1_190; __rev1_190 = __builtin_shufflevector(__s1_190, __s1_190, 1, 0); \ |
| 40868 | float32x4_t __rev2_190; __rev2_190 = __builtin_shufflevector(__s2_190, __s2_190, 3, 2, 1, 0); \ |
| 40869 | float32x2_t __ret_190; \ |
| 40870 | float32x4_t __reint_190 = __rev2_190; \ |
| 40871 | uint64x1_t __reint1_190 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_190, __p3_190)}; \ |
| 40872 | __ret_190 = __noswap_vcmla_rot270_f32(__rev0_190, __rev1_190, *(float32x2_t *) &__reint1_190); \ |
| 40873 | __ret_190 = __builtin_shufflevector(__ret_190, __ret_190, 1, 0); \ |
| 40874 | __ret_190; \ |
| 40875 | }) |
| 40876 | #endif |
| 40877 | |
| 40878 | #ifdef __LITTLE_ENDIAN__ |
| 40879 | #define vcmlaq_rot270_laneq_f32(__p0_191, __p1_191, __p2_191, __p3_191) __extension__ ({ \ |
| 40880 | float32x4_t __s0_191 = __p0_191; \ |
| 40881 | float32x4_t __s1_191 = __p1_191; \ |
| 40882 | float32x4_t __s2_191 = __p2_191; \ |
| 40883 | float32x4_t __ret_191; \ |
| 40884 | float32x4_t __reint_191 = __s2_191; \ |
| 40885 | uint64x2_t __reint1_191 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191), vgetq_lane_u64(*(uint64x2_t *) &__reint_191, __p3_191)}; \ |
| 40886 | __ret_191 = vcmlaq_rot270_f32(__s0_191, __s1_191, *(float32x4_t *) &__reint1_191); \ |
| 40887 | __ret_191; \ |
| 40888 | }) |
| 40889 | #else |
| 40890 | #define vcmlaq_rot270_laneq_f32(__p0_192, __p1_192, __p2_192, __p3_192) __extension__ ({ \ |
| 40891 | float32x4_t __s0_192 = __p0_192; \ |
| 40892 | float32x4_t __s1_192 = __p1_192; \ |
| 40893 | float32x4_t __s2_192 = __p2_192; \ |
| 40894 | float32x4_t __rev0_192; __rev0_192 = __builtin_shufflevector(__s0_192, __s0_192, 3, 2, 1, 0); \ |
| 40895 | float32x4_t __rev1_192; __rev1_192 = __builtin_shufflevector(__s1_192, __s1_192, 3, 2, 1, 0); \ |
| 40896 | float32x4_t __rev2_192; __rev2_192 = __builtin_shufflevector(__s2_192, __s2_192, 3, 2, 1, 0); \ |
| 40897 | float32x4_t __ret_192; \ |
| 40898 | float32x4_t __reint_192 = __rev2_192; \ |
| 40899 | uint64x2_t __reint1_192 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_192, __p3_192)}; \ |
| 40900 | __ret_192 = __noswap_vcmlaq_rot270_f32(__rev0_192, __rev1_192, *(float32x4_t *) &__reint1_192); \ |
| 40901 | __ret_192 = __builtin_shufflevector(__ret_192, __ret_192, 3, 2, 1, 0); \ |
| 40902 | __ret_192; \ |
| 40903 | }) |
| 40538 | 40904 | #endif |
| 40539 | 40905 | |
| 40540 | 40906 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40553,6 +40919,11 @@ __ai float32x4_t vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_ |
| 40553 | 40919 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40554 | 40920 | return __ret; |
| 40555 | 40921 | } |
| 40922 | __ai float32x4_t __noswap_vcmlaq_rot90_f32(float32x4_t __p0, float32x4_t __p1, float32x4_t __p2) { |
| 40923 | float32x4_t __ret; |
| 40924 | __ret = (float32x4_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 41); |
| 40925 | return __ret; |
| 40926 | } |
| 40556 | 40927 | #endif |
| 40557 | 40928 | |
| 40558 | 40929 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40571,6 +40942,123 @@ __ai float32x2_t vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t |
| 40571 | 40942 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40572 | 40943 | return __ret; |
| 40573 | 40944 | } |
| 40945 | __ai float32x2_t __noswap_vcmla_rot90_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2) { |
| 40946 | float32x2_t __ret; |
| 40947 | __ret = (float32x2_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 9); |
| 40948 | return __ret; |
| 40949 | } |
| 40950 | #endif |
| 40951 | |
| 40952 | #ifdef __LITTLE_ENDIAN__ |
| 40953 | #define vcmla_rot90_lane_f32(__p0_193, __p1_193, __p2_193, __p3_193) __extension__ ({ \ |
| 40954 | float32x2_t __s0_193 = __p0_193; \ |
| 40955 | float32x2_t __s1_193 = __p1_193; \ |
| 40956 | float32x2_t __s2_193 = __p2_193; \ |
| 40957 | float32x2_t __ret_193; \ |
| 40958 | float32x2_t __reint_193 = __s2_193; \ |
| 40959 | uint64x1_t __reint1_193 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_193, __p3_193)}; \ |
| 40960 | __ret_193 = vcmla_rot90_f32(__s0_193, __s1_193, *(float32x2_t *) &__reint1_193); \ |
| 40961 | __ret_193; \ |
| 40962 | }) |
| 40963 | #else |
| 40964 | #define vcmla_rot90_lane_f32(__p0_194, __p1_194, __p2_194, __p3_194) __extension__ ({ \ |
| 40965 | float32x2_t __s0_194 = __p0_194; \ |
| 40966 | float32x2_t __s1_194 = __p1_194; \ |
| 40967 | float32x2_t __s2_194 = __p2_194; \ |
| 40968 | float32x2_t __rev0_194; __rev0_194 = __builtin_shufflevector(__s0_194, __s0_194, 1, 0); \ |
| 40969 | float32x2_t __rev1_194; __rev1_194 = __builtin_shufflevector(__s1_194, __s1_194, 1, 0); \ |
| 40970 | float32x2_t __rev2_194; __rev2_194 = __builtin_shufflevector(__s2_194, __s2_194, 1, 0); \ |
| 40971 | float32x2_t __ret_194; \ |
| 40972 | float32x2_t __reint_194 = __rev2_194; \ |
| 40973 | uint64x1_t __reint1_194 = (uint64x1_t) {vget_lane_u64(*(uint64x1_t *) &__reint_194, __p3_194)}; \ |
| 40974 | __ret_194 = __noswap_vcmla_rot90_f32(__rev0_194, __rev1_194, *(float32x2_t *) &__reint1_194); \ |
| 40975 | __ret_194 = __builtin_shufflevector(__ret_194, __ret_194, 1, 0); \ |
| 40976 | __ret_194; \ |
| 40977 | }) |
| 40978 | #endif |
| 40979 | |
| 40980 | #ifdef __LITTLE_ENDIAN__ |
| 40981 | #define vcmlaq_rot90_lane_f32(__p0_195, __p1_195, __p2_195, __p3_195) __extension__ ({ \ |
| 40982 | float32x4_t __s0_195 = __p0_195; \ |
| 40983 | float32x4_t __s1_195 = __p1_195; \ |
| 40984 | float32x2_t __s2_195 = __p2_195; \ |
| 40985 | float32x4_t __ret_195; \ |
| 40986 | float32x2_t __reint_195 = __s2_195; \ |
| 40987 | uint64x2_t __reint1_195 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195), vget_lane_u64(*(uint64x1_t *) &__reint_195, __p3_195)}; \ |
| 40988 | __ret_195 = vcmlaq_rot90_f32(__s0_195, __s1_195, *(float32x4_t *) &__reint1_195); \ |
| 40989 | __ret_195; \ |
| 40990 | }) |
| 40991 | #else |
| 40992 | #define vcmlaq_rot90_lane_f32(__p0_196, __p1_196, __p2_196, __p3_196) __extension__ ({ \ |
| 40993 | float32x4_t __s0_196 = __p0_196; \ |
| 40994 | float32x4_t __s1_196 = __p1_196; \ |
| 40995 | float32x2_t __s2_196 = __p2_196; \ |
| 40996 | float32x4_t __rev0_196; __rev0_196 = __builtin_shufflevector(__s0_196, __s0_196, 3, 2, 1, 0); \ |
| 40997 | float32x4_t __rev1_196; __rev1_196 = __builtin_shufflevector(__s1_196, __s1_196, 3, 2, 1, 0); \ |
| 40998 | float32x2_t __rev2_196; __rev2_196 = __builtin_shufflevector(__s2_196, __s2_196, 1, 0); \ |
| 40999 | float32x4_t __ret_196; \ |
| 41000 | float32x2_t __reint_196 = __rev2_196; \ |
| 41001 | uint64x2_t __reint1_196 = (uint64x2_t) {vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196), vget_lane_u64(*(uint64x1_t *) &__reint_196, __p3_196)}; \ |
| 41002 | __ret_196 = __noswap_vcmlaq_rot90_f32(__rev0_196, __rev1_196, *(float32x4_t *) &__reint1_196); \ |
| 41003 | __ret_196 = __builtin_shufflevector(__ret_196, __ret_196, 3, 2, 1, 0); \ |
| 41004 | __ret_196; \ |
| 41005 | }) |
| 41006 | #endif |
| 41007 | |
| 41008 | #ifdef __LITTLE_ENDIAN__ |
| 41009 | #define vcmla_rot90_laneq_f32(__p0_197, __p1_197, __p2_197, __p3_197) __extension__ ({ \ |
| 41010 | float32x2_t __s0_197 = __p0_197; \ |
| 41011 | float32x2_t __s1_197 = __p1_197; \ |
| 41012 | float32x4_t __s2_197 = __p2_197; \ |
| 41013 | float32x2_t __ret_197; \ |
| 41014 | float32x4_t __reint_197 = __s2_197; \ |
| 41015 | uint64x1_t __reint1_197 = (uint64x1_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_197, __p3_197)}; \ |
| 41016 | __ret_197 = vcmla_rot90_f32(__s0_197, __s1_197, *(float32x2_t *) &__reint1_197); \ |
| 41017 | __ret_197; \ |
| 41018 | }) |
| 41019 | #else |
| 41020 | #define vcmla_rot90_laneq_f32(__p0_198, __p1_198, __p2_198, __p3_198) __extension__ ({ \ |
| 41021 | float32x2_t __s0_198 = __p0_198; \ |
| 41022 | float32x2_t __s1_198 = __p1_198; \ |
| 41023 | float32x4_t __s2_198 = __p2_198; \ |
| 41024 | float32x2_t __rev0_198; __rev0_198 = __builtin_shufflevector(__s0_198, __s0_198, 1, 0); \ |
| 41025 | float32x2_t __rev1_198; __rev1_198 = __builtin_shufflevector(__s1_198, __s1_198, 1, 0); \ |
| 41026 | float32x4_t __rev2_198; __rev2_198 = __builtin_shufflevector(__s2_198, __s2_198, 3, 2, 1, 0); \ |
| 41027 | float32x2_t __ret_198; \ |
| 41028 | float32x4_t __reint_198 = __rev2_198; \ |
| 41029 | uint64x1_t __reint1_198 = (uint64x1_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_198, __p3_198)}; \ |
| 41030 | __ret_198 = __noswap_vcmla_rot90_f32(__rev0_198, __rev1_198, *(float32x2_t *) &__reint1_198); \ |
| 41031 | __ret_198 = __builtin_shufflevector(__ret_198, __ret_198, 1, 0); \ |
| 41032 | __ret_198; \ |
| 41033 | }) |
| 41034 | #endif |
| 41035 | |
| 41036 | #ifdef __LITTLE_ENDIAN__ |
| 41037 | #define vcmlaq_rot90_laneq_f32(__p0_199, __p1_199, __p2_199, __p3_199) __extension__ ({ \ |
| 41038 | float32x4_t __s0_199 = __p0_199; \ |
| 41039 | float32x4_t __s1_199 = __p1_199; \ |
| 41040 | float32x4_t __s2_199 = __p2_199; \ |
| 41041 | float32x4_t __ret_199; \ |
| 41042 | float32x4_t __reint_199 = __s2_199; \ |
| 41043 | uint64x2_t __reint1_199 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199), vgetq_lane_u64(*(uint64x2_t *) &__reint_199, __p3_199)}; \ |
| 41044 | __ret_199 = vcmlaq_rot90_f32(__s0_199, __s1_199, *(float32x4_t *) &__reint1_199); \ |
| 41045 | __ret_199; \ |
| 41046 | }) |
| 41047 | #else |
| 41048 | #define vcmlaq_rot90_laneq_f32(__p0_200, __p1_200, __p2_200, __p3_200) __extension__ ({ \ |
| 41049 | float32x4_t __s0_200 = __p0_200; \ |
| 41050 | float32x4_t __s1_200 = __p1_200; \ |
| 41051 | float32x4_t __s2_200 = __p2_200; \ |
| 41052 | float32x4_t __rev0_200; __rev0_200 = __builtin_shufflevector(__s0_200, __s0_200, 3, 2, 1, 0); \ |
| 41053 | float32x4_t __rev1_200; __rev1_200 = __builtin_shufflevector(__s1_200, __s1_200, 3, 2, 1, 0); \ |
| 41054 | float32x4_t __rev2_200; __rev2_200 = __builtin_shufflevector(__s2_200, __s2_200, 3, 2, 1, 0); \ |
| 41055 | float32x4_t __ret_200; \ |
| 41056 | float32x4_t __reint_200 = __rev2_200; \ |
| 41057 | uint64x2_t __reint1_200 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_200, __p3_200)}; \ |
| 41058 | __ret_200 = __noswap_vcmlaq_rot90_f32(__rev0_200, __rev1_200, *(float32x4_t *) &__reint1_200); \ |
| 41059 | __ret_200 = __builtin_shufflevector(__ret_200, __ret_200, 3, 2, 1, 0); \ |
| 41060 | __ret_200; \ |
| 41061 | }) |
| 40574 | 41062 | #endif |
| 40575 | 41063 | |
| 40576 | 41064 | #endif |
| ... | ... | @@ -40659,6 +41147,11 @@ __ai float16x8_t vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2 |
| 40659 | 41147 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40660 | 41148 | return __ret; |
| 40661 | 41149 | } |
| 41150 | __ai float16x8_t __noswap_vcmlaq_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 41151 | float16x8_t __ret; |
| 41152 | __ret = (float16x8_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 41153 | return __ret; |
| 41154 | } |
| 40662 | 41155 | #endif |
| 40663 | 41156 | |
| 40664 | 41157 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40677,6 +41170,123 @@ __ai float16x4_t vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) |
| 40677 | 41170 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40678 | 41171 | return __ret; |
| 40679 | 41172 | } |
| 41173 | __ai float16x4_t __noswap_vcmla_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 41174 | float16x4_t __ret; |
| 41175 | __ret = (float16x4_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 41176 | return __ret; |
| 41177 | } |
| 41178 | #endif |
| 41179 | |
| 41180 | #ifdef __LITTLE_ENDIAN__ |
| 41181 | #define vcmla_lane_f16(__p0_201, __p1_201, __p2_201, __p3_201) __extension__ ({ \ |
| 41182 | float16x4_t __s0_201 = __p0_201; \ |
| 41183 | float16x4_t __s1_201 = __p1_201; \ |
| 41184 | float16x4_t __s2_201 = __p2_201; \ |
| 41185 | float16x4_t __ret_201; \ |
| 41186 | float16x4_t __reint_201 = __s2_201; \ |
| 41187 | uint32x2_t __reint1_201 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_201, __p3_201), vget_lane_u32(*(uint32x2_t *) &__reint_201, __p3_201)}; \ |
| 41188 | __ret_201 = vcmla_f16(__s0_201, __s1_201, *(float16x4_t *) &__reint1_201); \ |
| 41189 | __ret_201; \ |
| 41190 | }) |
| 41191 | #else |
| 41192 | #define vcmla_lane_f16(__p0_202, __p1_202, __p2_202, __p3_202) __extension__ ({ \ |
| 41193 | float16x4_t __s0_202 = __p0_202; \ |
| 41194 | float16x4_t __s1_202 = __p1_202; \ |
| 41195 | float16x4_t __s2_202 = __p2_202; \ |
| 41196 | float16x4_t __rev0_202; __rev0_202 = __builtin_shufflevector(__s0_202, __s0_202, 3, 2, 1, 0); \ |
| 41197 | float16x4_t __rev1_202; __rev1_202 = __builtin_shufflevector(__s1_202, __s1_202, 3, 2, 1, 0); \ |
| 41198 | float16x4_t __rev2_202; __rev2_202 = __builtin_shufflevector(__s2_202, __s2_202, 3, 2, 1, 0); \ |
| 41199 | float16x4_t __ret_202; \ |
| 41200 | float16x4_t __reint_202 = __rev2_202; \ |
| 41201 | uint32x2_t __reint1_202 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_202, __p3_202), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_202, __p3_202)}; \ |
| 41202 | __ret_202 = __noswap_vcmla_f16(__rev0_202, __rev1_202, *(float16x4_t *) &__reint1_202); \ |
| 41203 | __ret_202 = __builtin_shufflevector(__ret_202, __ret_202, 3, 2, 1, 0); \ |
| 41204 | __ret_202; \ |
| 41205 | }) |
| 41206 | #endif |
| 41207 | |
| 41208 | #ifdef __LITTLE_ENDIAN__ |
| 41209 | #define vcmlaq_lane_f16(__p0_203, __p1_203, __p2_203, __p3_203) __extension__ ({ \ |
| 41210 | float16x8_t __s0_203 = __p0_203; \ |
| 41211 | float16x8_t __s1_203 = __p1_203; \ |
| 41212 | float16x4_t __s2_203 = __p2_203; \ |
| 41213 | float16x8_t __ret_203; \ |
| 41214 | float16x4_t __reint_203 = __s2_203; \ |
| 41215 | uint32x4_t __reint1_203 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203), vget_lane_u32(*(uint32x2_t *) &__reint_203, __p3_203)}; \ |
| 41216 | __ret_203 = vcmlaq_f16(__s0_203, __s1_203, *(float16x8_t *) &__reint1_203); \ |
| 41217 | __ret_203; \ |
| 41218 | }) |
| 41219 | #else |
| 41220 | #define vcmlaq_lane_f16(__p0_204, __p1_204, __p2_204, __p3_204) __extension__ ({ \ |
| 41221 | float16x8_t __s0_204 = __p0_204; \ |
| 41222 | float16x8_t __s1_204 = __p1_204; \ |
| 41223 | float16x4_t __s2_204 = __p2_204; \ |
| 41224 | float16x8_t __rev0_204; __rev0_204 = __builtin_shufflevector(__s0_204, __s0_204, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41225 | float16x8_t __rev1_204; __rev1_204 = __builtin_shufflevector(__s1_204, __s1_204, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41226 | float16x4_t __rev2_204; __rev2_204 = __builtin_shufflevector(__s2_204, __s2_204, 3, 2, 1, 0); \ |
| 41227 | float16x8_t __ret_204; \ |
| 41228 | float16x4_t __reint_204 = __rev2_204; \ |
| 41229 | uint32x4_t __reint1_204 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_204, __p3_204)}; \ |
| 41230 | __ret_204 = __noswap_vcmlaq_f16(__rev0_204, __rev1_204, *(float16x8_t *) &__reint1_204); \ |
| 41231 | __ret_204 = __builtin_shufflevector(__ret_204, __ret_204, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41232 | __ret_204; \ |
| 41233 | }) |
| 41234 | #endif |
| 41235 | |
| 41236 | #ifdef __LITTLE_ENDIAN__ |
| 41237 | #define vcmla_laneq_f16(__p0_205, __p1_205, __p2_205, __p3_205) __extension__ ({ \ |
| 41238 | float16x4_t __s0_205 = __p0_205; \ |
| 41239 | float16x4_t __s1_205 = __p1_205; \ |
| 41240 | float16x8_t __s2_205 = __p2_205; \ |
| 41241 | float16x4_t __ret_205; \ |
| 41242 | float16x8_t __reint_205 = __s2_205; \ |
| 41243 | uint32x2_t __reint1_205 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_205, __p3_205), vgetq_lane_u32(*(uint32x4_t *) &__reint_205, __p3_205)}; \ |
| 41244 | __ret_205 = vcmla_f16(__s0_205, __s1_205, *(float16x4_t *) &__reint1_205); \ |
| 41245 | __ret_205; \ |
| 41246 | }) |
| 41247 | #else |
| 41248 | #define vcmla_laneq_f16(__p0_206, __p1_206, __p2_206, __p3_206) __extension__ ({ \ |
| 41249 | float16x4_t __s0_206 = __p0_206; \ |
| 41250 | float16x4_t __s1_206 = __p1_206; \ |
| 41251 | float16x8_t __s2_206 = __p2_206; \ |
| 41252 | float16x4_t __rev0_206; __rev0_206 = __builtin_shufflevector(__s0_206, __s0_206, 3, 2, 1, 0); \ |
| 41253 | float16x4_t __rev1_206; __rev1_206 = __builtin_shufflevector(__s1_206, __s1_206, 3, 2, 1, 0); \ |
| 41254 | float16x8_t __rev2_206; __rev2_206 = __builtin_shufflevector(__s2_206, __s2_206, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41255 | float16x4_t __ret_206; \ |
| 41256 | float16x8_t __reint_206 = __rev2_206; \ |
| 41257 | uint32x2_t __reint1_206 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_206, __p3_206), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_206, __p3_206)}; \ |
| 41258 | __ret_206 = __noswap_vcmla_f16(__rev0_206, __rev1_206, *(float16x4_t *) &__reint1_206); \ |
| 41259 | __ret_206 = __builtin_shufflevector(__ret_206, __ret_206, 3, 2, 1, 0); \ |
| 41260 | __ret_206; \ |
| 41261 | }) |
| 41262 | #endif |
| 41263 | |
| 41264 | #ifdef __LITTLE_ENDIAN__ |
| 41265 | #define vcmlaq_laneq_f16(__p0_207, __p1_207, __p2_207, __p3_207) __extension__ ({ \ |
| 41266 | float16x8_t __s0_207 = __p0_207; \ |
| 41267 | float16x8_t __s1_207 = __p1_207; \ |
| 41268 | float16x8_t __s2_207 = __p2_207; \ |
| 41269 | float16x8_t __ret_207; \ |
| 41270 | float16x8_t __reint_207 = __s2_207; \ |
| 41271 | uint32x4_t __reint1_207 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207), vgetq_lane_u32(*(uint32x4_t *) &__reint_207, __p3_207)}; \ |
| 41272 | __ret_207 = vcmlaq_f16(__s0_207, __s1_207, *(float16x8_t *) &__reint1_207); \ |
| 41273 | __ret_207; \ |
| 41274 | }) |
| 41275 | #else |
| 41276 | #define vcmlaq_laneq_f16(__p0_208, __p1_208, __p2_208, __p3_208) __extension__ ({ \ |
| 41277 | float16x8_t __s0_208 = __p0_208; \ |
| 41278 | float16x8_t __s1_208 = __p1_208; \ |
| 41279 | float16x8_t __s2_208 = __p2_208; \ |
| 41280 | float16x8_t __rev0_208; __rev0_208 = __builtin_shufflevector(__s0_208, __s0_208, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41281 | float16x8_t __rev1_208; __rev1_208 = __builtin_shufflevector(__s1_208, __s1_208, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41282 | float16x8_t __rev2_208; __rev2_208 = __builtin_shufflevector(__s2_208, __s2_208, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41283 | float16x8_t __ret_208; \ |
| 41284 | float16x8_t __reint_208 = __rev2_208; \ |
| 41285 | uint32x4_t __reint1_208 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_208, __p3_208)}; \ |
| 41286 | __ret_208 = __noswap_vcmlaq_f16(__rev0_208, __rev1_208, *(float16x8_t *) &__reint1_208); \ |
| 41287 | __ret_208 = __builtin_shufflevector(__ret_208, __ret_208, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41288 | __ret_208; \ |
| 41289 | }) |
| 40680 | 41290 | #endif |
| 40681 | 41291 | |
| 40682 | 41292 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40695,6 +41305,11 @@ __ai float16x8_t vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8 |
| 40695 | 41305 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40696 | 41306 | return __ret; |
| 40697 | 41307 | } |
| 41308 | __ai float16x8_t __noswap_vcmlaq_rot180_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 41309 | float16x8_t __ret; |
| 41310 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 41311 | return __ret; |
| 41312 | } |
| 40698 | 41313 | #endif |
| 40699 | 41314 | |
| 40700 | 41315 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40713,6 +41328,123 @@ __ai float16x4_t vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_ |
| 40713 | 41328 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40714 | 41329 | return __ret; |
| 40715 | 41330 | } |
| 41331 | __ai float16x4_t __noswap_vcmla_rot180_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 41332 | float16x4_t __ret; |
| 41333 | __ret = (float16x4_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 41334 | return __ret; |
| 41335 | } |
| 41336 | #endif |
| 41337 | |
| 41338 | #ifdef __LITTLE_ENDIAN__ |
| 41339 | #define vcmla_rot180_lane_f16(__p0_209, __p1_209, __p2_209, __p3_209) __extension__ ({ \ |
| 41340 | float16x4_t __s0_209 = __p0_209; \ |
| 41341 | float16x4_t __s1_209 = __p1_209; \ |
| 41342 | float16x4_t __s2_209 = __p2_209; \ |
| 41343 | float16x4_t __ret_209; \ |
| 41344 | float16x4_t __reint_209 = __s2_209; \ |
| 41345 | uint32x2_t __reint1_209 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209), vget_lane_u32(*(uint32x2_t *) &__reint_209, __p3_209)}; \ |
| 41346 | __ret_209 = vcmla_rot180_f16(__s0_209, __s1_209, *(float16x4_t *) &__reint1_209); \ |
| 41347 | __ret_209; \ |
| 41348 | }) |
| 41349 | #else |
| 41350 | #define vcmla_rot180_lane_f16(__p0_210, __p1_210, __p2_210, __p3_210) __extension__ ({ \ |
| 41351 | float16x4_t __s0_210 = __p0_210; \ |
| 41352 | float16x4_t __s1_210 = __p1_210; \ |
| 41353 | float16x4_t __s2_210 = __p2_210; \ |
| 41354 | float16x4_t __rev0_210; __rev0_210 = __builtin_shufflevector(__s0_210, __s0_210, 3, 2, 1, 0); \ |
| 41355 | float16x4_t __rev1_210; __rev1_210 = __builtin_shufflevector(__s1_210, __s1_210, 3, 2, 1, 0); \ |
| 41356 | float16x4_t __rev2_210; __rev2_210 = __builtin_shufflevector(__s2_210, __s2_210, 3, 2, 1, 0); \ |
| 41357 | float16x4_t __ret_210; \ |
| 41358 | float16x4_t __reint_210 = __rev2_210; \ |
| 41359 | uint32x2_t __reint1_210 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_210, __p3_210)}; \ |
| 41360 | __ret_210 = __noswap_vcmla_rot180_f16(__rev0_210, __rev1_210, *(float16x4_t *) &__reint1_210); \ |
| 41361 | __ret_210 = __builtin_shufflevector(__ret_210, __ret_210, 3, 2, 1, 0); \ |
| 41362 | __ret_210; \ |
| 41363 | }) |
| 41364 | #endif |
| 41365 | |
| 41366 | #ifdef __LITTLE_ENDIAN__ |
| 41367 | #define vcmlaq_rot180_lane_f16(__p0_211, __p1_211, __p2_211, __p3_211) __extension__ ({ \ |
| 41368 | float16x8_t __s0_211 = __p0_211; \ |
| 41369 | float16x8_t __s1_211 = __p1_211; \ |
| 41370 | float16x4_t __s2_211 = __p2_211; \ |
| 41371 | float16x8_t __ret_211; \ |
| 41372 | float16x4_t __reint_211 = __s2_211; \ |
| 41373 | uint32x4_t __reint1_211 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211), vget_lane_u32(*(uint32x2_t *) &__reint_211, __p3_211)}; \ |
| 41374 | __ret_211 = vcmlaq_rot180_f16(__s0_211, __s1_211, *(float16x8_t *) &__reint1_211); \ |
| 41375 | __ret_211; \ |
| 41376 | }) |
| 41377 | #else |
| 41378 | #define vcmlaq_rot180_lane_f16(__p0_212, __p1_212, __p2_212, __p3_212) __extension__ ({ \ |
| 41379 | float16x8_t __s0_212 = __p0_212; \ |
| 41380 | float16x8_t __s1_212 = __p1_212; \ |
| 41381 | float16x4_t __s2_212 = __p2_212; \ |
| 41382 | float16x8_t __rev0_212; __rev0_212 = __builtin_shufflevector(__s0_212, __s0_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41383 | float16x8_t __rev1_212; __rev1_212 = __builtin_shufflevector(__s1_212, __s1_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41384 | float16x4_t __rev2_212; __rev2_212 = __builtin_shufflevector(__s2_212, __s2_212, 3, 2, 1, 0); \ |
| 41385 | float16x8_t __ret_212; \ |
| 41386 | float16x4_t __reint_212 = __rev2_212; \ |
| 41387 | uint32x4_t __reint1_212 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_212, __p3_212)}; \ |
| 41388 | __ret_212 = __noswap_vcmlaq_rot180_f16(__rev0_212, __rev1_212, *(float16x8_t *) &__reint1_212); \ |
| 41389 | __ret_212 = __builtin_shufflevector(__ret_212, __ret_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41390 | __ret_212; \ |
| 41391 | }) |
| 41392 | #endif |
| 41393 | |
| 41394 | #ifdef __LITTLE_ENDIAN__ |
| 41395 | #define vcmla_rot180_laneq_f16(__p0_213, __p1_213, __p2_213, __p3_213) __extension__ ({ \ |
| 41396 | float16x4_t __s0_213 = __p0_213; \ |
| 41397 | float16x4_t __s1_213 = __p1_213; \ |
| 41398 | float16x8_t __s2_213 = __p2_213; \ |
| 41399 | float16x4_t __ret_213; \ |
| 41400 | float16x8_t __reint_213 = __s2_213; \ |
| 41401 | uint32x2_t __reint1_213 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213), vgetq_lane_u32(*(uint32x4_t *) &__reint_213, __p3_213)}; \ |
| 41402 | __ret_213 = vcmla_rot180_f16(__s0_213, __s1_213, *(float16x4_t *) &__reint1_213); \ |
| 41403 | __ret_213; \ |
| 41404 | }) |
| 41405 | #else |
| 41406 | #define vcmla_rot180_laneq_f16(__p0_214, __p1_214, __p2_214, __p3_214) __extension__ ({ \ |
| 41407 | float16x4_t __s0_214 = __p0_214; \ |
| 41408 | float16x4_t __s1_214 = __p1_214; \ |
| 41409 | float16x8_t __s2_214 = __p2_214; \ |
| 41410 | float16x4_t __rev0_214; __rev0_214 = __builtin_shufflevector(__s0_214, __s0_214, 3, 2, 1, 0); \ |
| 41411 | float16x4_t __rev1_214; __rev1_214 = __builtin_shufflevector(__s1_214, __s1_214, 3, 2, 1, 0); \ |
| 41412 | float16x8_t __rev2_214; __rev2_214 = __builtin_shufflevector(__s2_214, __s2_214, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41413 | float16x4_t __ret_214; \ |
| 41414 | float16x8_t __reint_214 = __rev2_214; \ |
| 41415 | uint32x2_t __reint1_214 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_214, __p3_214)}; \ |
| 41416 | __ret_214 = __noswap_vcmla_rot180_f16(__rev0_214, __rev1_214, *(float16x4_t *) &__reint1_214); \ |
| 41417 | __ret_214 = __builtin_shufflevector(__ret_214, __ret_214, 3, 2, 1, 0); \ |
| 41418 | __ret_214; \ |
| 41419 | }) |
| 41420 | #endif |
| 41421 | |
| 41422 | #ifdef __LITTLE_ENDIAN__ |
| 41423 | #define vcmlaq_rot180_laneq_f16(__p0_215, __p1_215, __p2_215, __p3_215) __extension__ ({ \ |
| 41424 | float16x8_t __s0_215 = __p0_215; \ |
| 41425 | float16x8_t __s1_215 = __p1_215; \ |
| 41426 | float16x8_t __s2_215 = __p2_215; \ |
| 41427 | float16x8_t __ret_215; \ |
| 41428 | float16x8_t __reint_215 = __s2_215; \ |
| 41429 | uint32x4_t __reint1_215 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215), vgetq_lane_u32(*(uint32x4_t *) &__reint_215, __p3_215)}; \ |
| 41430 | __ret_215 = vcmlaq_rot180_f16(__s0_215, __s1_215, *(float16x8_t *) &__reint1_215); \ |
| 41431 | __ret_215; \ |
| 41432 | }) |
| 41433 | #else |
| 41434 | #define vcmlaq_rot180_laneq_f16(__p0_216, __p1_216, __p2_216, __p3_216) __extension__ ({ \ |
| 41435 | float16x8_t __s0_216 = __p0_216; \ |
| 41436 | float16x8_t __s1_216 = __p1_216; \ |
| 41437 | float16x8_t __s2_216 = __p2_216; \ |
| 41438 | float16x8_t __rev0_216; __rev0_216 = __builtin_shufflevector(__s0_216, __s0_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41439 | float16x8_t __rev1_216; __rev1_216 = __builtin_shufflevector(__s1_216, __s1_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41440 | float16x8_t __rev2_216; __rev2_216 = __builtin_shufflevector(__s2_216, __s2_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41441 | float16x8_t __ret_216; \ |
| 41442 | float16x8_t __reint_216 = __rev2_216; \ |
| 41443 | uint32x4_t __reint1_216 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_216, __p3_216)}; \ |
| 41444 | __ret_216 = __noswap_vcmlaq_rot180_f16(__rev0_216, __rev1_216, *(float16x8_t *) &__reint1_216); \ |
| 41445 | __ret_216 = __builtin_shufflevector(__ret_216, __ret_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41446 | __ret_216; \ |
| 41447 | }) |
| 40716 | 41448 | #endif |
| 40717 | 41449 | |
| 40718 | 41450 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40731,6 +41463,11 @@ __ai float16x8_t vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8 |
| 40731 | 41463 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40732 | 41464 | return __ret; |
| 40733 | 41465 | } |
| 41466 | __ai float16x8_t __noswap_vcmlaq_rot270_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 41467 | float16x8_t __ret; |
| 41468 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 41469 | return __ret; |
| 41470 | } |
| 40734 | 41471 | #endif |
| 40735 | 41472 | |
| 40736 | 41473 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40749,6 +41486,123 @@ __ai float16x4_t vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_ |
| 40749 | 41486 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40750 | 41487 | return __ret; |
| 40751 | 41488 | } |
| 41489 | __ai float16x4_t __noswap_vcmla_rot270_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 41490 | float16x4_t __ret; |
| 41491 | __ret = (float16x4_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 41492 | return __ret; |
| 41493 | } |
| 41494 | #endif |
| 41495 | |
| 41496 | #ifdef __LITTLE_ENDIAN__ |
| 41497 | #define vcmla_rot270_lane_f16(__p0_217, __p1_217, __p2_217, __p3_217) __extension__ ({ \ |
| 41498 | float16x4_t __s0_217 = __p0_217; \ |
| 41499 | float16x4_t __s1_217 = __p1_217; \ |
| 41500 | float16x4_t __s2_217 = __p2_217; \ |
| 41501 | float16x4_t __ret_217; \ |
| 41502 | float16x4_t __reint_217 = __s2_217; \ |
| 41503 | uint32x2_t __reint1_217 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217), vget_lane_u32(*(uint32x2_t *) &__reint_217, __p3_217)}; \ |
| 41504 | __ret_217 = vcmla_rot270_f16(__s0_217, __s1_217, *(float16x4_t *) &__reint1_217); \ |
| 41505 | __ret_217; \ |
| 41506 | }) |
| 41507 | #else |
| 41508 | #define vcmla_rot270_lane_f16(__p0_218, __p1_218, __p2_218, __p3_218) __extension__ ({ \ |
| 41509 | float16x4_t __s0_218 = __p0_218; \ |
| 41510 | float16x4_t __s1_218 = __p1_218; \ |
| 41511 | float16x4_t __s2_218 = __p2_218; \ |
| 41512 | float16x4_t __rev0_218; __rev0_218 = __builtin_shufflevector(__s0_218, __s0_218, 3, 2, 1, 0); \ |
| 41513 | float16x4_t __rev1_218; __rev1_218 = __builtin_shufflevector(__s1_218, __s1_218, 3, 2, 1, 0); \ |
| 41514 | float16x4_t __rev2_218; __rev2_218 = __builtin_shufflevector(__s2_218, __s2_218, 3, 2, 1, 0); \ |
| 41515 | float16x4_t __ret_218; \ |
| 41516 | float16x4_t __reint_218 = __rev2_218; \ |
| 41517 | uint32x2_t __reint1_218 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_218, __p3_218)}; \ |
| 41518 | __ret_218 = __noswap_vcmla_rot270_f16(__rev0_218, __rev1_218, *(float16x4_t *) &__reint1_218); \ |
| 41519 | __ret_218 = __builtin_shufflevector(__ret_218, __ret_218, 3, 2, 1, 0); \ |
| 41520 | __ret_218; \ |
| 41521 | }) |
| 41522 | #endif |
| 41523 | |
| 41524 | #ifdef __LITTLE_ENDIAN__ |
| 41525 | #define vcmlaq_rot270_lane_f16(__p0_219, __p1_219, __p2_219, __p3_219) __extension__ ({ \ |
| 41526 | float16x8_t __s0_219 = __p0_219; \ |
| 41527 | float16x8_t __s1_219 = __p1_219; \ |
| 41528 | float16x4_t __s2_219 = __p2_219; \ |
| 41529 | float16x8_t __ret_219; \ |
| 41530 | float16x4_t __reint_219 = __s2_219; \ |
| 41531 | uint32x4_t __reint1_219 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219), vget_lane_u32(*(uint32x2_t *) &__reint_219, __p3_219)}; \ |
| 41532 | __ret_219 = vcmlaq_rot270_f16(__s0_219, __s1_219, *(float16x8_t *) &__reint1_219); \ |
| 41533 | __ret_219; \ |
| 41534 | }) |
| 41535 | #else |
| 41536 | #define vcmlaq_rot270_lane_f16(__p0_220, __p1_220, __p2_220, __p3_220) __extension__ ({ \ |
| 41537 | float16x8_t __s0_220 = __p0_220; \ |
| 41538 | float16x8_t __s1_220 = __p1_220; \ |
| 41539 | float16x4_t __s2_220 = __p2_220; \ |
| 41540 | float16x8_t __rev0_220; __rev0_220 = __builtin_shufflevector(__s0_220, __s0_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41541 | float16x8_t __rev1_220; __rev1_220 = __builtin_shufflevector(__s1_220, __s1_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41542 | float16x4_t __rev2_220; __rev2_220 = __builtin_shufflevector(__s2_220, __s2_220, 3, 2, 1, 0); \ |
| 41543 | float16x8_t __ret_220; \ |
| 41544 | float16x4_t __reint_220 = __rev2_220; \ |
| 41545 | uint32x4_t __reint1_220 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_220, __p3_220)}; \ |
| 41546 | __ret_220 = __noswap_vcmlaq_rot270_f16(__rev0_220, __rev1_220, *(float16x8_t *) &__reint1_220); \ |
| 41547 | __ret_220 = __builtin_shufflevector(__ret_220, __ret_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41548 | __ret_220; \ |
| 41549 | }) |
| 41550 | #endif |
| 41551 | |
| 41552 | #ifdef __LITTLE_ENDIAN__ |
| 41553 | #define vcmla_rot270_laneq_f16(__p0_221, __p1_221, __p2_221, __p3_221) __extension__ ({ \ |
| 41554 | float16x4_t __s0_221 = __p0_221; \ |
| 41555 | float16x4_t __s1_221 = __p1_221; \ |
| 41556 | float16x8_t __s2_221 = __p2_221; \ |
| 41557 | float16x4_t __ret_221; \ |
| 41558 | float16x8_t __reint_221 = __s2_221; \ |
| 41559 | uint32x2_t __reint1_221 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221), vgetq_lane_u32(*(uint32x4_t *) &__reint_221, __p3_221)}; \ |
| 41560 | __ret_221 = vcmla_rot270_f16(__s0_221, __s1_221, *(float16x4_t *) &__reint1_221); \ |
| 41561 | __ret_221; \ |
| 41562 | }) |
| 41563 | #else |
| 41564 | #define vcmla_rot270_laneq_f16(__p0_222, __p1_222, __p2_222, __p3_222) __extension__ ({ \ |
| 41565 | float16x4_t __s0_222 = __p0_222; \ |
| 41566 | float16x4_t __s1_222 = __p1_222; \ |
| 41567 | float16x8_t __s2_222 = __p2_222; \ |
| 41568 | float16x4_t __rev0_222; __rev0_222 = __builtin_shufflevector(__s0_222, __s0_222, 3, 2, 1, 0); \ |
| 41569 | float16x4_t __rev1_222; __rev1_222 = __builtin_shufflevector(__s1_222, __s1_222, 3, 2, 1, 0); \ |
| 41570 | float16x8_t __rev2_222; __rev2_222 = __builtin_shufflevector(__s2_222, __s2_222, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41571 | float16x4_t __ret_222; \ |
| 41572 | float16x8_t __reint_222 = __rev2_222; \ |
| 41573 | uint32x2_t __reint1_222 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_222, __p3_222)}; \ |
| 41574 | __ret_222 = __noswap_vcmla_rot270_f16(__rev0_222, __rev1_222, *(float16x4_t *) &__reint1_222); \ |
| 41575 | __ret_222 = __builtin_shufflevector(__ret_222, __ret_222, 3, 2, 1, 0); \ |
| 41576 | __ret_222; \ |
| 41577 | }) |
| 41578 | #endif |
| 41579 | |
| 41580 | #ifdef __LITTLE_ENDIAN__ |
| 41581 | #define vcmlaq_rot270_laneq_f16(__p0_223, __p1_223, __p2_223, __p3_223) __extension__ ({ \ |
| 41582 | float16x8_t __s0_223 = __p0_223; \ |
| 41583 | float16x8_t __s1_223 = __p1_223; \ |
| 41584 | float16x8_t __s2_223 = __p2_223; \ |
| 41585 | float16x8_t __ret_223; \ |
| 41586 | float16x8_t __reint_223 = __s2_223; \ |
| 41587 | uint32x4_t __reint1_223 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223), vgetq_lane_u32(*(uint32x4_t *) &__reint_223, __p3_223)}; \ |
| 41588 | __ret_223 = vcmlaq_rot270_f16(__s0_223, __s1_223, *(float16x8_t *) &__reint1_223); \ |
| 41589 | __ret_223; \ |
| 41590 | }) |
| 41591 | #else |
| 41592 | #define vcmlaq_rot270_laneq_f16(__p0_224, __p1_224, __p2_224, __p3_224) __extension__ ({ \ |
| 41593 | float16x8_t __s0_224 = __p0_224; \ |
| 41594 | float16x8_t __s1_224 = __p1_224; \ |
| 41595 | float16x8_t __s2_224 = __p2_224; \ |
| 41596 | float16x8_t __rev0_224; __rev0_224 = __builtin_shufflevector(__s0_224, __s0_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41597 | float16x8_t __rev1_224; __rev1_224 = __builtin_shufflevector(__s1_224, __s1_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41598 | float16x8_t __rev2_224; __rev2_224 = __builtin_shufflevector(__s2_224, __s2_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41599 | float16x8_t __ret_224; \ |
| 41600 | float16x8_t __reint_224 = __rev2_224; \ |
| 41601 | uint32x4_t __reint1_224 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_224, __p3_224)}; \ |
| 41602 | __ret_224 = __noswap_vcmlaq_rot270_f16(__rev0_224, __rev1_224, *(float16x8_t *) &__reint1_224); \ |
| 41603 | __ret_224 = __builtin_shufflevector(__ret_224, __ret_224, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41604 | __ret_224; \ |
| 41605 | }) |
| 40752 | 41606 | #endif |
| 40753 | 41607 | |
| 40754 | 41608 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40767,6 +41621,11 @@ __ai float16x8_t vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_ |
| 40767 | 41621 | __ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0); |
| 40768 | 41622 | return __ret; |
| 40769 | 41623 | } |
| 41624 | __ai float16x8_t __noswap_vcmlaq_rot90_f16(float16x8_t __p0, float16x8_t __p1, float16x8_t __p2) { |
| 41625 | float16x8_t __ret; |
| 41626 | __ret = (float16x8_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 40); |
| 41627 | return __ret; |
| 41628 | } |
| 40770 | 41629 | #endif |
| 40771 | 41630 | |
| 40772 | 41631 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -40776,15 +41635,132 @@ __ai float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t |
| 40776 | 41635 | return __ret; |
| 40777 | 41636 | } |
| 40778 | 41637 | #else |
| 40779 | | __ai float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 40780 | | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 40781 | | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 40782 | | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 40783 | | float16x4_t __ret; |
| 40784 | | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 40785 | | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 40786 | | return __ret; |
| 40787 | | } |
| 41638 | __ai float16x4_t vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 41639 | float16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0); |
| 41640 | float16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0); |
| 41641 | float16x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0); |
| 41642 | float16x4_t __ret; |
| 41643 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__rev0, (int8x8_t)__rev1, (int8x8_t)__rev2, 8); |
| 41644 | __ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); |
| 41645 | return __ret; |
| 41646 | } |
| 41647 | __ai float16x4_t __noswap_vcmla_rot90_f16(float16x4_t __p0, float16x4_t __p1, float16x4_t __p2) { |
| 41648 | float16x4_t __ret; |
| 41649 | __ret = (float16x4_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 8); |
| 41650 | return __ret; |
| 41651 | } |
| 41652 | #endif |
| 41653 | |
| 41654 | #ifdef __LITTLE_ENDIAN__ |
| 41655 | #define vcmla_rot90_lane_f16(__p0_225, __p1_225, __p2_225, __p3_225) __extension__ ({ \ |
| 41656 | float16x4_t __s0_225 = __p0_225; \ |
| 41657 | float16x4_t __s1_225 = __p1_225; \ |
| 41658 | float16x4_t __s2_225 = __p2_225; \ |
| 41659 | float16x4_t __ret_225; \ |
| 41660 | float16x4_t __reint_225 = __s2_225; \ |
| 41661 | uint32x2_t __reint1_225 = (uint32x2_t) {vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225), vget_lane_u32(*(uint32x2_t *) &__reint_225, __p3_225)}; \ |
| 41662 | __ret_225 = vcmla_rot90_f16(__s0_225, __s1_225, *(float16x4_t *) &__reint1_225); \ |
| 41663 | __ret_225; \ |
| 41664 | }) |
| 41665 | #else |
| 41666 | #define vcmla_rot90_lane_f16(__p0_226, __p1_226, __p2_226, __p3_226) __extension__ ({ \ |
| 41667 | float16x4_t __s0_226 = __p0_226; \ |
| 41668 | float16x4_t __s1_226 = __p1_226; \ |
| 41669 | float16x4_t __s2_226 = __p2_226; \ |
| 41670 | float16x4_t __rev0_226; __rev0_226 = __builtin_shufflevector(__s0_226, __s0_226, 3, 2, 1, 0); \ |
| 41671 | float16x4_t __rev1_226; __rev1_226 = __builtin_shufflevector(__s1_226, __s1_226, 3, 2, 1, 0); \ |
| 41672 | float16x4_t __rev2_226; __rev2_226 = __builtin_shufflevector(__s2_226, __s2_226, 3, 2, 1, 0); \ |
| 41673 | float16x4_t __ret_226; \ |
| 41674 | float16x4_t __reint_226 = __rev2_226; \ |
| 41675 | uint32x2_t __reint1_226 = (uint32x2_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_226, __p3_226)}; \ |
| 41676 | __ret_226 = __noswap_vcmla_rot90_f16(__rev0_226, __rev1_226, *(float16x4_t *) &__reint1_226); \ |
| 41677 | __ret_226 = __builtin_shufflevector(__ret_226, __ret_226, 3, 2, 1, 0); \ |
| 41678 | __ret_226; \ |
| 41679 | }) |
| 41680 | #endif |
| 41681 | |
| 41682 | #ifdef __LITTLE_ENDIAN__ |
| 41683 | #define vcmlaq_rot90_lane_f16(__p0_227, __p1_227, __p2_227, __p3_227) __extension__ ({ \ |
| 41684 | float16x8_t __s0_227 = __p0_227; \ |
| 41685 | float16x8_t __s1_227 = __p1_227; \ |
| 41686 | float16x4_t __s2_227 = __p2_227; \ |
| 41687 | float16x8_t __ret_227; \ |
| 41688 | float16x4_t __reint_227 = __s2_227; \ |
| 41689 | uint32x4_t __reint1_227 = (uint32x4_t) {vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227), vget_lane_u32(*(uint32x2_t *) &__reint_227, __p3_227)}; \ |
| 41690 | __ret_227 = vcmlaq_rot90_f16(__s0_227, __s1_227, *(float16x8_t *) &__reint1_227); \ |
| 41691 | __ret_227; \ |
| 41692 | }) |
| 41693 | #else |
| 41694 | #define vcmlaq_rot90_lane_f16(__p0_228, __p1_228, __p2_228, __p3_228) __extension__ ({ \ |
| 41695 | float16x8_t __s0_228 = __p0_228; \ |
| 41696 | float16x8_t __s1_228 = __p1_228; \ |
| 41697 | float16x4_t __s2_228 = __p2_228; \ |
| 41698 | float16x8_t __rev0_228; __rev0_228 = __builtin_shufflevector(__s0_228, __s0_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41699 | float16x8_t __rev1_228; __rev1_228 = __builtin_shufflevector(__s1_228, __s1_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41700 | float16x4_t __rev2_228; __rev2_228 = __builtin_shufflevector(__s2_228, __s2_228, 3, 2, 1, 0); \ |
| 41701 | float16x8_t __ret_228; \ |
| 41702 | float16x4_t __reint_228 = __rev2_228; \ |
| 41703 | uint32x4_t __reint1_228 = (uint32x4_t) {__noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228), __noswap_vget_lane_u32(*(uint32x2_t *) &__reint_228, __p3_228)}; \ |
| 41704 | __ret_228 = __noswap_vcmlaq_rot90_f16(__rev0_228, __rev1_228, *(float16x8_t *) &__reint1_228); \ |
| 41705 | __ret_228 = __builtin_shufflevector(__ret_228, __ret_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41706 | __ret_228; \ |
| 41707 | }) |
| 41708 | #endif |
| 41709 | |
| 41710 | #ifdef __LITTLE_ENDIAN__ |
| 41711 | #define vcmla_rot90_laneq_f16(__p0_229, __p1_229, __p2_229, __p3_229) __extension__ ({ \ |
| 41712 | float16x4_t __s0_229 = __p0_229; \ |
| 41713 | float16x4_t __s1_229 = __p1_229; \ |
| 41714 | float16x8_t __s2_229 = __p2_229; \ |
| 41715 | float16x4_t __ret_229; \ |
| 41716 | float16x8_t __reint_229 = __s2_229; \ |
| 41717 | uint32x2_t __reint1_229 = (uint32x2_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229), vgetq_lane_u32(*(uint32x4_t *) &__reint_229, __p3_229)}; \ |
| 41718 | __ret_229 = vcmla_rot90_f16(__s0_229, __s1_229, *(float16x4_t *) &__reint1_229); \ |
| 41719 | __ret_229; \ |
| 41720 | }) |
| 41721 | #else |
| 41722 | #define vcmla_rot90_laneq_f16(__p0_230, __p1_230, __p2_230, __p3_230) __extension__ ({ \ |
| 41723 | float16x4_t __s0_230 = __p0_230; \ |
| 41724 | float16x4_t __s1_230 = __p1_230; \ |
| 41725 | float16x8_t __s2_230 = __p2_230; \ |
| 41726 | float16x4_t __rev0_230; __rev0_230 = __builtin_shufflevector(__s0_230, __s0_230, 3, 2, 1, 0); \ |
| 41727 | float16x4_t __rev1_230; __rev1_230 = __builtin_shufflevector(__s1_230, __s1_230, 3, 2, 1, 0); \ |
| 41728 | float16x8_t __rev2_230; __rev2_230 = __builtin_shufflevector(__s2_230, __s2_230, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41729 | float16x4_t __ret_230; \ |
| 41730 | float16x8_t __reint_230 = __rev2_230; \ |
| 41731 | uint32x2_t __reint1_230 = (uint32x2_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_230, __p3_230)}; \ |
| 41732 | __ret_230 = __noswap_vcmla_rot90_f16(__rev0_230, __rev1_230, *(float16x4_t *) &__reint1_230); \ |
| 41733 | __ret_230 = __builtin_shufflevector(__ret_230, __ret_230, 3, 2, 1, 0); \ |
| 41734 | __ret_230; \ |
| 41735 | }) |
| 41736 | #endif |
| 41737 | |
| 41738 | #ifdef __LITTLE_ENDIAN__ |
| 41739 | #define vcmlaq_rot90_laneq_f16(__p0_231, __p1_231, __p2_231, __p3_231) __extension__ ({ \ |
| 41740 | float16x8_t __s0_231 = __p0_231; \ |
| 41741 | float16x8_t __s1_231 = __p1_231; \ |
| 41742 | float16x8_t __s2_231 = __p2_231; \ |
| 41743 | float16x8_t __ret_231; \ |
| 41744 | float16x8_t __reint_231 = __s2_231; \ |
| 41745 | uint32x4_t __reint1_231 = (uint32x4_t) {vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231), vgetq_lane_u32(*(uint32x4_t *) &__reint_231, __p3_231)}; \ |
| 41746 | __ret_231 = vcmlaq_rot90_f16(__s0_231, __s1_231, *(float16x8_t *) &__reint1_231); \ |
| 41747 | __ret_231; \ |
| 41748 | }) |
| 41749 | #else |
| 41750 | #define vcmlaq_rot90_laneq_f16(__p0_232, __p1_232, __p2_232, __p3_232) __extension__ ({ \ |
| 41751 | float16x8_t __s0_232 = __p0_232; \ |
| 41752 | float16x8_t __s1_232 = __p1_232; \ |
| 41753 | float16x8_t __s2_232 = __p2_232; \ |
| 41754 | float16x8_t __rev0_232; __rev0_232 = __builtin_shufflevector(__s0_232, __s0_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41755 | float16x8_t __rev1_232; __rev1_232 = __builtin_shufflevector(__s1_232, __s1_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41756 | float16x8_t __rev2_232; __rev2_232 = __builtin_shufflevector(__s2_232, __s2_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41757 | float16x8_t __ret_232; \ |
| 41758 | float16x8_t __reint_232 = __rev2_232; \ |
| 41759 | uint32x4_t __reint1_232 = (uint32x4_t) {__noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232), __noswap_vgetq_lane_u32(*(uint32x4_t *) &__reint_232, __p3_232)}; \ |
| 41760 | __ret_232 = __noswap_vcmlaq_rot90_f16(__rev0_232, __rev1_232, *(float16x8_t *) &__reint1_232); \ |
| 41761 | __ret_232 = __builtin_shufflevector(__ret_232, __ret_232, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41762 | __ret_232; \ |
| 41763 | }) |
| 40788 | 41764 | #endif |
| 40789 | 41765 | |
| 40790 | 41766 | #endif |
| ... | ... | @@ -40839,6 +41815,11 @@ __ai float64x2_t vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2 |
| 40839 | 41815 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40840 | 41816 | return __ret; |
| 40841 | 41817 | } |
| 41818 | __ai float64x2_t __noswap_vcmlaq_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 41819 | float64x2_t __ret; |
| 41820 | __ret = (float64x2_t) __builtin_neon_vcmlaq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 41821 | return __ret; |
| 41822 | } |
| 40842 | 41823 | #endif |
| 40843 | 41824 | |
| 40844 | 41825 | __ai float64x1_t vcmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| ... | ... | @@ -40846,6 +41827,96 @@ __ai float64x1_t vcmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) |
| 40846 | 41827 | __ret = (float64x1_t) __builtin_neon_vcmla_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 40847 | 41828 | return __ret; |
| 40848 | 41829 | } |
| 41830 | #define vcmla_lane_f64(__p0_233, __p1_233, __p2_233, __p3_233) __extension__ ({ \ |
| 41831 | float64x1_t __s0_233 = __p0_233; \ |
| 41832 | float64x1_t __s1_233 = __p1_233; \ |
| 41833 | float64x1_t __s2_233 = __p2_233; \ |
| 41834 | float64x1_t __ret_233; \ |
| 41835 | float64x1_t __reint_233 = __s2_233; \ |
| 41836 | uint64x2_t __reint1_233 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_233, __p3_233), vgetq_lane_u64(*(uint64x2_t *) &__reint_233, __p3_233)}; \ |
| 41837 | __ret_233 = vcmla_f64(__s0_233, __s1_233, *(float64x1_t *) &__reint1_233); \ |
| 41838 | __ret_233; \ |
| 41839 | }) |
| 41840 | #ifdef __LITTLE_ENDIAN__ |
| 41841 | #define vcmlaq_lane_f64(__p0_234, __p1_234, __p2_234, __p3_234) __extension__ ({ \ |
| 41842 | float64x2_t __s0_234 = __p0_234; \ |
| 41843 | float64x2_t __s1_234 = __p1_234; \ |
| 41844 | float64x1_t __s2_234 = __p2_234; \ |
| 41845 | float64x2_t __ret_234; \ |
| 41846 | float64x1_t __reint_234 = __s2_234; \ |
| 41847 | uint64x2_t __reint1_234 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_234, __p3_234), vgetq_lane_u64(*(uint64x2_t *) &__reint_234, __p3_234)}; \ |
| 41848 | __ret_234 = vcmlaq_f64(__s0_234, __s1_234, *(float64x2_t *) &__reint1_234); \ |
| 41849 | __ret_234; \ |
| 41850 | }) |
| 41851 | #else |
| 41852 | #define vcmlaq_lane_f64(__p0_235, __p1_235, __p2_235, __p3_235) __extension__ ({ \ |
| 41853 | float64x2_t __s0_235 = __p0_235; \ |
| 41854 | float64x2_t __s1_235 = __p1_235; \ |
| 41855 | float64x1_t __s2_235 = __p2_235; \ |
| 41856 | float64x2_t __rev0_235; __rev0_235 = __builtin_shufflevector(__s0_235, __s0_235, 1, 0); \ |
| 41857 | float64x2_t __rev1_235; __rev1_235 = __builtin_shufflevector(__s1_235, __s1_235, 1, 0); \ |
| 41858 | float64x2_t __ret_235; \ |
| 41859 | float64x1_t __reint_235 = __s2_235; \ |
| 41860 | uint64x2_t __reint1_235 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_235, __p3_235), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_235, __p3_235)}; \ |
| 41861 | __ret_235 = __noswap_vcmlaq_f64(__rev0_235, __rev1_235, *(float64x2_t *) &__reint1_235); \ |
| 41862 | __ret_235 = __builtin_shufflevector(__ret_235, __ret_235, 1, 0); \ |
| 41863 | __ret_235; \ |
| 41864 | }) |
| 41865 | #endif |
| 41866 | |
| 41867 | #ifdef __LITTLE_ENDIAN__ |
| 41868 | #define vcmla_laneq_f64(__p0_236, __p1_236, __p2_236, __p3_236) __extension__ ({ \ |
| 41869 | float64x1_t __s0_236 = __p0_236; \ |
| 41870 | float64x1_t __s1_236 = __p1_236; \ |
| 41871 | float64x2_t __s2_236 = __p2_236; \ |
| 41872 | float64x1_t __ret_236; \ |
| 41873 | float64x2_t __reint_236 = __s2_236; \ |
| 41874 | uint64x2_t __reint1_236 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_236, __p3_236), vgetq_lane_u64(*(uint64x2_t *) &__reint_236, __p3_236)}; \ |
| 41875 | __ret_236 = vcmla_f64(__s0_236, __s1_236, *(float64x1_t *) &__reint1_236); \ |
| 41876 | __ret_236; \ |
| 41877 | }) |
| 41878 | #else |
| 41879 | #define vcmla_laneq_f64(__p0_237, __p1_237, __p2_237, __p3_237) __extension__ ({ \ |
| 41880 | float64x1_t __s0_237 = __p0_237; \ |
| 41881 | float64x1_t __s1_237 = __p1_237; \ |
| 41882 | float64x2_t __s2_237 = __p2_237; \ |
| 41883 | float64x2_t __rev2_237; __rev2_237 = __builtin_shufflevector(__s2_237, __s2_237, 1, 0); \ |
| 41884 | float64x1_t __ret_237; \ |
| 41885 | float64x2_t __reint_237 = __rev2_237; \ |
| 41886 | uint64x2_t __reint1_237 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_237, __p3_237), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_237, __p3_237)}; \ |
| 41887 | __ret_237 = vcmla_f64(__s0_237, __s1_237, *(float64x1_t *) &__reint1_237); \ |
| 41888 | __ret_237; \ |
| 41889 | }) |
| 41890 | #endif |
| 41891 | |
| 41892 | #ifdef __LITTLE_ENDIAN__ |
| 41893 | #define vcmlaq_laneq_f64(__p0_238, __p1_238, __p2_238, __p3_238) __extension__ ({ \ |
| 41894 | float64x2_t __s0_238 = __p0_238; \ |
| 41895 | float64x2_t __s1_238 = __p1_238; \ |
| 41896 | float64x2_t __s2_238 = __p2_238; \ |
| 41897 | float64x2_t __ret_238; \ |
| 41898 | float64x2_t __reint_238 = __s2_238; \ |
| 41899 | uint64x2_t __reint1_238 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_238, __p3_238), vgetq_lane_u64(*(uint64x2_t *) &__reint_238, __p3_238)}; \ |
| 41900 | __ret_238 = vcmlaq_f64(__s0_238, __s1_238, *(float64x2_t *) &__reint1_238); \ |
| 41901 | __ret_238; \ |
| 41902 | }) |
| 41903 | #else |
| 41904 | #define vcmlaq_laneq_f64(__p0_239, __p1_239, __p2_239, __p3_239) __extension__ ({ \ |
| 41905 | float64x2_t __s0_239 = __p0_239; \ |
| 41906 | float64x2_t __s1_239 = __p1_239; \ |
| 41907 | float64x2_t __s2_239 = __p2_239; \ |
| 41908 | float64x2_t __rev0_239; __rev0_239 = __builtin_shufflevector(__s0_239, __s0_239, 1, 0); \ |
| 41909 | float64x2_t __rev1_239; __rev1_239 = __builtin_shufflevector(__s1_239, __s1_239, 1, 0); \ |
| 41910 | float64x2_t __rev2_239; __rev2_239 = __builtin_shufflevector(__s2_239, __s2_239, 1, 0); \ |
| 41911 | float64x2_t __ret_239; \ |
| 41912 | float64x2_t __reint_239 = __rev2_239; \ |
| 41913 | uint64x2_t __reint1_239 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_239, __p3_239), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_239, __p3_239)}; \ |
| 41914 | __ret_239 = __noswap_vcmlaq_f64(__rev0_239, __rev1_239, *(float64x2_t *) &__reint1_239); \ |
| 41915 | __ret_239 = __builtin_shufflevector(__ret_239, __ret_239, 1, 0); \ |
| 41916 | __ret_239; \ |
| 41917 | }) |
| 41918 | #endif |
| 41919 | |
| 40849 | 41920 | #ifdef __LITTLE_ENDIAN__ |
| 40850 | 41921 | __ai float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 40851 | 41922 | float64x2_t __ret; |
| ... | ... | @@ -40862,6 +41933,11 @@ __ai float64x2_t vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2 |
| 40862 | 41933 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40863 | 41934 | return __ret; |
| 40864 | 41935 | } |
| 41936 | __ai float64x2_t __noswap_vcmlaq_rot180_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 41937 | float64x2_t __ret; |
| 41938 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot180_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 41939 | return __ret; |
| 41940 | } |
| 40865 | 41941 | #endif |
| 40866 | 41942 | |
| 40867 | 41943 | __ai float64x1_t vcmla_rot180_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| ... | ... | @@ -40869,6 +41945,96 @@ __ai float64x1_t vcmla_rot180_f64(float64x1_t __p0, float64x1_t __p1, float64x1_ |
| 40869 | 41945 | __ret = (float64x1_t) __builtin_neon_vcmla_rot180_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 40870 | 41946 | return __ret; |
| 40871 | 41947 | } |
| 41948 | #define vcmla_rot180_lane_f64(__p0_240, __p1_240, __p2_240, __p3_240) __extension__ ({ \ |
| 41949 | float64x1_t __s0_240 = __p0_240; \ |
| 41950 | float64x1_t __s1_240 = __p1_240; \ |
| 41951 | float64x1_t __s2_240 = __p2_240; \ |
| 41952 | float64x1_t __ret_240; \ |
| 41953 | float64x1_t __reint_240 = __s2_240; \ |
| 41954 | uint64x2_t __reint1_240 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_240, __p3_240), vgetq_lane_u64(*(uint64x2_t *) &__reint_240, __p3_240)}; \ |
| 41955 | __ret_240 = vcmla_rot180_f64(__s0_240, __s1_240, *(float64x1_t *) &__reint1_240); \ |
| 41956 | __ret_240; \ |
| 41957 | }) |
| 41958 | #ifdef __LITTLE_ENDIAN__ |
| 41959 | #define vcmlaq_rot180_lane_f64(__p0_241, __p1_241, __p2_241, __p3_241) __extension__ ({ \ |
| 41960 | float64x2_t __s0_241 = __p0_241; \ |
| 41961 | float64x2_t __s1_241 = __p1_241; \ |
| 41962 | float64x1_t __s2_241 = __p2_241; \ |
| 41963 | float64x2_t __ret_241; \ |
| 41964 | float64x1_t __reint_241 = __s2_241; \ |
| 41965 | uint64x2_t __reint1_241 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_241, __p3_241), vgetq_lane_u64(*(uint64x2_t *) &__reint_241, __p3_241)}; \ |
| 41966 | __ret_241 = vcmlaq_rot180_f64(__s0_241, __s1_241, *(float64x2_t *) &__reint1_241); \ |
| 41967 | __ret_241; \ |
| 41968 | }) |
| 41969 | #else |
| 41970 | #define vcmlaq_rot180_lane_f64(__p0_242, __p1_242, __p2_242, __p3_242) __extension__ ({ \ |
| 41971 | float64x2_t __s0_242 = __p0_242; \ |
| 41972 | float64x2_t __s1_242 = __p1_242; \ |
| 41973 | float64x1_t __s2_242 = __p2_242; \ |
| 41974 | float64x2_t __rev0_242; __rev0_242 = __builtin_shufflevector(__s0_242, __s0_242, 1, 0); \ |
| 41975 | float64x2_t __rev1_242; __rev1_242 = __builtin_shufflevector(__s1_242, __s1_242, 1, 0); \ |
| 41976 | float64x2_t __ret_242; \ |
| 41977 | float64x1_t __reint_242 = __s2_242; \ |
| 41978 | uint64x2_t __reint1_242 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_242, __p3_242), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_242, __p3_242)}; \ |
| 41979 | __ret_242 = __noswap_vcmlaq_rot180_f64(__rev0_242, __rev1_242, *(float64x2_t *) &__reint1_242); \ |
| 41980 | __ret_242 = __builtin_shufflevector(__ret_242, __ret_242, 1, 0); \ |
| 41981 | __ret_242; \ |
| 41982 | }) |
| 41983 | #endif |
| 41984 | |
| 41985 | #ifdef __LITTLE_ENDIAN__ |
| 41986 | #define vcmla_rot180_laneq_f64(__p0_243, __p1_243, __p2_243, __p3_243) __extension__ ({ \ |
| 41987 | float64x1_t __s0_243 = __p0_243; \ |
| 41988 | float64x1_t __s1_243 = __p1_243; \ |
| 41989 | float64x2_t __s2_243 = __p2_243; \ |
| 41990 | float64x1_t __ret_243; \ |
| 41991 | float64x2_t __reint_243 = __s2_243; \ |
| 41992 | uint64x2_t __reint1_243 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_243, __p3_243), vgetq_lane_u64(*(uint64x2_t *) &__reint_243, __p3_243)}; \ |
| 41993 | __ret_243 = vcmla_rot180_f64(__s0_243, __s1_243, *(float64x1_t *) &__reint1_243); \ |
| 41994 | __ret_243; \ |
| 41995 | }) |
| 41996 | #else |
| 41997 | #define vcmla_rot180_laneq_f64(__p0_244, __p1_244, __p2_244, __p3_244) __extension__ ({ \ |
| 41998 | float64x1_t __s0_244 = __p0_244; \ |
| 41999 | float64x1_t __s1_244 = __p1_244; \ |
| 42000 | float64x2_t __s2_244 = __p2_244; \ |
| 42001 | float64x2_t __rev2_244; __rev2_244 = __builtin_shufflevector(__s2_244, __s2_244, 1, 0); \ |
| 42002 | float64x1_t __ret_244; \ |
| 42003 | float64x2_t __reint_244 = __rev2_244; \ |
| 42004 | uint64x2_t __reint1_244 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_244, __p3_244), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_244, __p3_244)}; \ |
| 42005 | __ret_244 = vcmla_rot180_f64(__s0_244, __s1_244, *(float64x1_t *) &__reint1_244); \ |
| 42006 | __ret_244; \ |
| 42007 | }) |
| 42008 | #endif |
| 42009 | |
| 42010 | #ifdef __LITTLE_ENDIAN__ |
| 42011 | #define vcmlaq_rot180_laneq_f64(__p0_245, __p1_245, __p2_245, __p3_245) __extension__ ({ \ |
| 42012 | float64x2_t __s0_245 = __p0_245; \ |
| 42013 | float64x2_t __s1_245 = __p1_245; \ |
| 42014 | float64x2_t __s2_245 = __p2_245; \ |
| 42015 | float64x2_t __ret_245; \ |
| 42016 | float64x2_t __reint_245 = __s2_245; \ |
| 42017 | uint64x2_t __reint1_245 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_245, __p3_245), vgetq_lane_u64(*(uint64x2_t *) &__reint_245, __p3_245)}; \ |
| 42018 | __ret_245 = vcmlaq_rot180_f64(__s0_245, __s1_245, *(float64x2_t *) &__reint1_245); \ |
| 42019 | __ret_245; \ |
| 42020 | }) |
| 42021 | #else |
| 42022 | #define vcmlaq_rot180_laneq_f64(__p0_246, __p1_246, __p2_246, __p3_246) __extension__ ({ \ |
| 42023 | float64x2_t __s0_246 = __p0_246; \ |
| 42024 | float64x2_t __s1_246 = __p1_246; \ |
| 42025 | float64x2_t __s2_246 = __p2_246; \ |
| 42026 | float64x2_t __rev0_246; __rev0_246 = __builtin_shufflevector(__s0_246, __s0_246, 1, 0); \ |
| 42027 | float64x2_t __rev1_246; __rev1_246 = __builtin_shufflevector(__s1_246, __s1_246, 1, 0); \ |
| 42028 | float64x2_t __rev2_246; __rev2_246 = __builtin_shufflevector(__s2_246, __s2_246, 1, 0); \ |
| 42029 | float64x2_t __ret_246; \ |
| 42030 | float64x2_t __reint_246 = __rev2_246; \ |
| 42031 | uint64x2_t __reint1_246 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_246, __p3_246), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_246, __p3_246)}; \ |
| 42032 | __ret_246 = __noswap_vcmlaq_rot180_f64(__rev0_246, __rev1_246, *(float64x2_t *) &__reint1_246); \ |
| 42033 | __ret_246 = __builtin_shufflevector(__ret_246, __ret_246, 1, 0); \ |
| 42034 | __ret_246; \ |
| 42035 | }) |
| 42036 | #endif |
| 42037 | |
| 40872 | 42038 | #ifdef __LITTLE_ENDIAN__ |
| 40873 | 42039 | __ai float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 40874 | 42040 | float64x2_t __ret; |
| ... | ... | @@ -40885,6 +42051,11 @@ __ai float64x2_t vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2 |
| 40885 | 42051 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40886 | 42052 | return __ret; |
| 40887 | 42053 | } |
| 42054 | __ai float64x2_t __noswap_vcmlaq_rot270_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 42055 | float64x2_t __ret; |
| 42056 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot270_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 42057 | return __ret; |
| 42058 | } |
| 40888 | 42059 | #endif |
| 40889 | 42060 | |
| 40890 | 42061 | __ai float64x1_t vcmla_rot270_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| ... | ... | @@ -40892,6 +42063,96 @@ __ai float64x1_t vcmla_rot270_f64(float64x1_t __p0, float64x1_t __p1, float64x1_ |
| 40892 | 42063 | __ret = (float64x1_t) __builtin_neon_vcmla_rot270_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 40893 | 42064 | return __ret; |
| 40894 | 42065 | } |
| 42066 | #define vcmla_rot270_lane_f64(__p0_247, __p1_247, __p2_247, __p3_247) __extension__ ({ \ |
| 42067 | float64x1_t __s0_247 = __p0_247; \ |
| 42068 | float64x1_t __s1_247 = __p1_247; \ |
| 42069 | float64x1_t __s2_247 = __p2_247; \ |
| 42070 | float64x1_t __ret_247; \ |
| 42071 | float64x1_t __reint_247 = __s2_247; \ |
| 42072 | uint64x2_t __reint1_247 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_247, __p3_247), vgetq_lane_u64(*(uint64x2_t *) &__reint_247, __p3_247)}; \ |
| 42073 | __ret_247 = vcmla_rot270_f64(__s0_247, __s1_247, *(float64x1_t *) &__reint1_247); \ |
| 42074 | __ret_247; \ |
| 42075 | }) |
| 42076 | #ifdef __LITTLE_ENDIAN__ |
| 42077 | #define vcmlaq_rot270_lane_f64(__p0_248, __p1_248, __p2_248, __p3_248) __extension__ ({ \ |
| 42078 | float64x2_t __s0_248 = __p0_248; \ |
| 42079 | float64x2_t __s1_248 = __p1_248; \ |
| 42080 | float64x1_t __s2_248 = __p2_248; \ |
| 42081 | float64x2_t __ret_248; \ |
| 42082 | float64x1_t __reint_248 = __s2_248; \ |
| 42083 | uint64x2_t __reint1_248 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_248, __p3_248), vgetq_lane_u64(*(uint64x2_t *) &__reint_248, __p3_248)}; \ |
| 42084 | __ret_248 = vcmlaq_rot270_f64(__s0_248, __s1_248, *(float64x2_t *) &__reint1_248); \ |
| 42085 | __ret_248; \ |
| 42086 | }) |
| 42087 | #else |
| 42088 | #define vcmlaq_rot270_lane_f64(__p0_249, __p1_249, __p2_249, __p3_249) __extension__ ({ \ |
| 42089 | float64x2_t __s0_249 = __p0_249; \ |
| 42090 | float64x2_t __s1_249 = __p1_249; \ |
| 42091 | float64x1_t __s2_249 = __p2_249; \ |
| 42092 | float64x2_t __rev0_249; __rev0_249 = __builtin_shufflevector(__s0_249, __s0_249, 1, 0); \ |
| 42093 | float64x2_t __rev1_249; __rev1_249 = __builtin_shufflevector(__s1_249, __s1_249, 1, 0); \ |
| 42094 | float64x2_t __ret_249; \ |
| 42095 | float64x1_t __reint_249 = __s2_249; \ |
| 42096 | uint64x2_t __reint1_249 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_249, __p3_249), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_249, __p3_249)}; \ |
| 42097 | __ret_249 = __noswap_vcmlaq_rot270_f64(__rev0_249, __rev1_249, *(float64x2_t *) &__reint1_249); \ |
| 42098 | __ret_249 = __builtin_shufflevector(__ret_249, __ret_249, 1, 0); \ |
| 42099 | __ret_249; \ |
| 42100 | }) |
| 42101 | #endif |
| 42102 | |
| 42103 | #ifdef __LITTLE_ENDIAN__ |
| 42104 | #define vcmla_rot270_laneq_f64(__p0_250, __p1_250, __p2_250, __p3_250) __extension__ ({ \ |
| 42105 | float64x1_t __s0_250 = __p0_250; \ |
| 42106 | float64x1_t __s1_250 = __p1_250; \ |
| 42107 | float64x2_t __s2_250 = __p2_250; \ |
| 42108 | float64x1_t __ret_250; \ |
| 42109 | float64x2_t __reint_250 = __s2_250; \ |
| 42110 | uint64x2_t __reint1_250 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_250, __p3_250), vgetq_lane_u64(*(uint64x2_t *) &__reint_250, __p3_250)}; \ |
| 42111 | __ret_250 = vcmla_rot270_f64(__s0_250, __s1_250, *(float64x1_t *) &__reint1_250); \ |
| 42112 | __ret_250; \ |
| 42113 | }) |
| 42114 | #else |
| 42115 | #define vcmla_rot270_laneq_f64(__p0_251, __p1_251, __p2_251, __p3_251) __extension__ ({ \ |
| 42116 | float64x1_t __s0_251 = __p0_251; \ |
| 42117 | float64x1_t __s1_251 = __p1_251; \ |
| 42118 | float64x2_t __s2_251 = __p2_251; \ |
| 42119 | float64x2_t __rev2_251; __rev2_251 = __builtin_shufflevector(__s2_251, __s2_251, 1, 0); \ |
| 42120 | float64x1_t __ret_251; \ |
| 42121 | float64x2_t __reint_251 = __rev2_251; \ |
| 42122 | uint64x2_t __reint1_251 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_251, __p3_251), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_251, __p3_251)}; \ |
| 42123 | __ret_251 = vcmla_rot270_f64(__s0_251, __s1_251, *(float64x1_t *) &__reint1_251); \ |
| 42124 | __ret_251; \ |
| 42125 | }) |
| 42126 | #endif |
| 42127 | |
| 42128 | #ifdef __LITTLE_ENDIAN__ |
| 42129 | #define vcmlaq_rot270_laneq_f64(__p0_252, __p1_252, __p2_252, __p3_252) __extension__ ({ \ |
| 42130 | float64x2_t __s0_252 = __p0_252; \ |
| 42131 | float64x2_t __s1_252 = __p1_252; \ |
| 42132 | float64x2_t __s2_252 = __p2_252; \ |
| 42133 | float64x2_t __ret_252; \ |
| 42134 | float64x2_t __reint_252 = __s2_252; \ |
| 42135 | uint64x2_t __reint1_252 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_252, __p3_252), vgetq_lane_u64(*(uint64x2_t *) &__reint_252, __p3_252)}; \ |
| 42136 | __ret_252 = vcmlaq_rot270_f64(__s0_252, __s1_252, *(float64x2_t *) &__reint1_252); \ |
| 42137 | __ret_252; \ |
| 42138 | }) |
| 42139 | #else |
| 42140 | #define vcmlaq_rot270_laneq_f64(__p0_253, __p1_253, __p2_253, __p3_253) __extension__ ({ \ |
| 42141 | float64x2_t __s0_253 = __p0_253; \ |
| 42142 | float64x2_t __s1_253 = __p1_253; \ |
| 42143 | float64x2_t __s2_253 = __p2_253; \ |
| 42144 | float64x2_t __rev0_253; __rev0_253 = __builtin_shufflevector(__s0_253, __s0_253, 1, 0); \ |
| 42145 | float64x2_t __rev1_253; __rev1_253 = __builtin_shufflevector(__s1_253, __s1_253, 1, 0); \ |
| 42146 | float64x2_t __rev2_253; __rev2_253 = __builtin_shufflevector(__s2_253, __s2_253, 1, 0); \ |
| 42147 | float64x2_t __ret_253; \ |
| 42148 | float64x2_t __reint_253 = __rev2_253; \ |
| 42149 | uint64x2_t __reint1_253 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_253, __p3_253), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_253, __p3_253)}; \ |
| 42150 | __ret_253 = __noswap_vcmlaq_rot270_f64(__rev0_253, __rev1_253, *(float64x2_t *) &__reint1_253); \ |
| 42151 | __ret_253 = __builtin_shufflevector(__ret_253, __ret_253, 1, 0); \ |
| 42152 | __ret_253; \ |
| 42153 | }) |
| 42154 | #endif |
| 42155 | |
| 40895 | 42156 | #ifdef __LITTLE_ENDIAN__ |
| 40896 | 42157 | __ai float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 40897 | 42158 | float64x2_t __ret; |
| ... | ... | @@ -40908,6 +42169,11 @@ __ai float64x2_t vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_ |
| 40908 | 42169 | __ret = __builtin_shufflevector(__ret, __ret, 1, 0); |
| 40909 | 42170 | return __ret; |
| 40910 | 42171 | } |
| 42172 | __ai float64x2_t __noswap_vcmlaq_rot90_f64(float64x2_t __p0, float64x2_t __p1, float64x2_t __p2) { |
| 42173 | float64x2_t __ret; |
| 42174 | __ret = (float64x2_t) __builtin_neon_vcmlaq_rot90_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 42); |
| 42175 | return __ret; |
| 42176 | } |
| 40911 | 42177 | #endif |
| 40912 | 42178 | |
| 40913 | 42179 | __ai float64x1_t vcmla_rot90_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) { |
| ... | ... | @@ -40915,6 +42181,96 @@ __ai float64x1_t vcmla_rot90_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t |
| 40915 | 42181 | __ret = (float64x1_t) __builtin_neon_vcmla_rot90_v((int8x8_t)__p0, (int8x8_t)__p1, (int8x8_t)__p2, 10); |
| 40916 | 42182 | return __ret; |
| 40917 | 42183 | } |
| 42184 | #define vcmla_rot90_lane_f64(__p0_254, __p1_254, __p2_254, __p3_254) __extension__ ({ \ |
| 42185 | float64x1_t __s0_254 = __p0_254; \ |
| 42186 | float64x1_t __s1_254 = __p1_254; \ |
| 42187 | float64x1_t __s2_254 = __p2_254; \ |
| 42188 | float64x1_t __ret_254; \ |
| 42189 | float64x1_t __reint_254 = __s2_254; \ |
| 42190 | uint64x2_t __reint1_254 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_254, __p3_254), vgetq_lane_u64(*(uint64x2_t *) &__reint_254, __p3_254)}; \ |
| 42191 | __ret_254 = vcmla_rot90_f64(__s0_254, __s1_254, *(float64x1_t *) &__reint1_254); \ |
| 42192 | __ret_254; \ |
| 42193 | }) |
| 42194 | #ifdef __LITTLE_ENDIAN__ |
| 42195 | #define vcmlaq_rot90_lane_f64(__p0_255, __p1_255, __p2_255, __p3_255) __extension__ ({ \ |
| 42196 | float64x2_t __s0_255 = __p0_255; \ |
| 42197 | float64x2_t __s1_255 = __p1_255; \ |
| 42198 | float64x1_t __s2_255 = __p2_255; \ |
| 42199 | float64x2_t __ret_255; \ |
| 42200 | float64x1_t __reint_255 = __s2_255; \ |
| 42201 | uint64x2_t __reint1_255 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_255, __p3_255), vgetq_lane_u64(*(uint64x2_t *) &__reint_255, __p3_255)}; \ |
| 42202 | __ret_255 = vcmlaq_rot90_f64(__s0_255, __s1_255, *(float64x2_t *) &__reint1_255); \ |
| 42203 | __ret_255; \ |
| 42204 | }) |
| 42205 | #else |
| 42206 | #define vcmlaq_rot90_lane_f64(__p0_256, __p1_256, __p2_256, __p3_256) __extension__ ({ \ |
| 42207 | float64x2_t __s0_256 = __p0_256; \ |
| 42208 | float64x2_t __s1_256 = __p1_256; \ |
| 42209 | float64x1_t __s2_256 = __p2_256; \ |
| 42210 | float64x2_t __rev0_256; __rev0_256 = __builtin_shufflevector(__s0_256, __s0_256, 1, 0); \ |
| 42211 | float64x2_t __rev1_256; __rev1_256 = __builtin_shufflevector(__s1_256, __s1_256, 1, 0); \ |
| 42212 | float64x2_t __ret_256; \ |
| 42213 | float64x1_t __reint_256 = __s2_256; \ |
| 42214 | uint64x2_t __reint1_256 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_256, __p3_256), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_256, __p3_256)}; \ |
| 42215 | __ret_256 = __noswap_vcmlaq_rot90_f64(__rev0_256, __rev1_256, *(float64x2_t *) &__reint1_256); \ |
| 42216 | __ret_256 = __builtin_shufflevector(__ret_256, __ret_256, 1, 0); \ |
| 42217 | __ret_256; \ |
| 42218 | }) |
| 42219 | #endif |
| 42220 | |
| 42221 | #ifdef __LITTLE_ENDIAN__ |
| 42222 | #define vcmla_rot90_laneq_f64(__p0_257, __p1_257, __p2_257, __p3_257) __extension__ ({ \ |
| 42223 | float64x1_t __s0_257 = __p0_257; \ |
| 42224 | float64x1_t __s1_257 = __p1_257; \ |
| 42225 | float64x2_t __s2_257 = __p2_257; \ |
| 42226 | float64x1_t __ret_257; \ |
| 42227 | float64x2_t __reint_257 = __s2_257; \ |
| 42228 | uint64x2_t __reint1_257 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_257, __p3_257), vgetq_lane_u64(*(uint64x2_t *) &__reint_257, __p3_257)}; \ |
| 42229 | __ret_257 = vcmla_rot90_f64(__s0_257, __s1_257, *(float64x1_t *) &__reint1_257); \ |
| 42230 | __ret_257; \ |
| 42231 | }) |
| 42232 | #else |
| 42233 | #define vcmla_rot90_laneq_f64(__p0_258, __p1_258, __p2_258, __p3_258) __extension__ ({ \ |
| 42234 | float64x1_t __s0_258 = __p0_258; \ |
| 42235 | float64x1_t __s1_258 = __p1_258; \ |
| 42236 | float64x2_t __s2_258 = __p2_258; \ |
| 42237 | float64x2_t __rev2_258; __rev2_258 = __builtin_shufflevector(__s2_258, __s2_258, 1, 0); \ |
| 42238 | float64x1_t __ret_258; \ |
| 42239 | float64x2_t __reint_258 = __rev2_258; \ |
| 42240 | uint64x2_t __reint1_258 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_258, __p3_258), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_258, __p3_258)}; \ |
| 42241 | __ret_258 = vcmla_rot90_f64(__s0_258, __s1_258, *(float64x1_t *) &__reint1_258); \ |
| 42242 | __ret_258; \ |
| 42243 | }) |
| 42244 | #endif |
| 42245 | |
| 42246 | #ifdef __LITTLE_ENDIAN__ |
| 42247 | #define vcmlaq_rot90_laneq_f64(__p0_259, __p1_259, __p2_259, __p3_259) __extension__ ({ \ |
| 42248 | float64x2_t __s0_259 = __p0_259; \ |
| 42249 | float64x2_t __s1_259 = __p1_259; \ |
| 42250 | float64x2_t __s2_259 = __p2_259; \ |
| 42251 | float64x2_t __ret_259; \ |
| 42252 | float64x2_t __reint_259 = __s2_259; \ |
| 42253 | uint64x2_t __reint1_259 = (uint64x2_t) {vgetq_lane_u64(*(uint64x2_t *) &__reint_259, __p3_259), vgetq_lane_u64(*(uint64x2_t *) &__reint_259, __p3_259)}; \ |
| 42254 | __ret_259 = vcmlaq_rot90_f64(__s0_259, __s1_259, *(float64x2_t *) &__reint1_259); \ |
| 42255 | __ret_259; \ |
| 42256 | }) |
| 42257 | #else |
| 42258 | #define vcmlaq_rot90_laneq_f64(__p0_260, __p1_260, __p2_260, __p3_260) __extension__ ({ \ |
| 42259 | float64x2_t __s0_260 = __p0_260; \ |
| 42260 | float64x2_t __s1_260 = __p1_260; \ |
| 42261 | float64x2_t __s2_260 = __p2_260; \ |
| 42262 | float64x2_t __rev0_260; __rev0_260 = __builtin_shufflevector(__s0_260, __s0_260, 1, 0); \ |
| 42263 | float64x2_t __rev1_260; __rev1_260 = __builtin_shufflevector(__s1_260, __s1_260, 1, 0); \ |
| 42264 | float64x2_t __rev2_260; __rev2_260 = __builtin_shufflevector(__s2_260, __s2_260, 1, 0); \ |
| 42265 | float64x2_t __ret_260; \ |
| 42266 | float64x2_t __reint_260 = __rev2_260; \ |
| 42267 | uint64x2_t __reint1_260 = (uint64x2_t) {__noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_260, __p3_260), __noswap_vgetq_lane_u64(*(uint64x2_t *) &__reint_260, __p3_260)}; \ |
| 42268 | __ret_260 = __noswap_vcmlaq_rot90_f64(__rev0_260, __rev1_260, *(float64x2_t *) &__reint1_260); \ |
| 42269 | __ret_260 = __builtin_shufflevector(__ret_260, __ret_260, 1, 0); \ |
| 42270 | __ret_260; \ |
| 42271 | }) |
| 42272 | #endif |
| 42273 | |
| 40918 | 42274 | #endif |
| 40919 | 42275 | #if defined(__ARM_FEATURE_DOTPROD) |
| 40920 | 42276 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -41010,228 +42366,228 @@ __ai int32x2_t __noswap_vdot_s32(int32x2_t __p0, int8x8_t __p1, int8x8_t __p2) { |
| 41010 | 42366 | #endif |
| 41011 | 42367 | |
| 41012 | 42368 | #ifdef __LITTLE_ENDIAN__ |
| 41013 | | #define vdotq_lane_u32(__p0_169, __p1_169, __p2_169, __p3_169) __extension__ ({ \ |
| 41014 | | uint32x4_t __s0_169 = __p0_169; \ |
| 41015 | | uint8x16_t __s1_169 = __p1_169; \ |
| 41016 | | uint8x8_t __s2_169 = __p2_169; \ |
| 41017 | | uint32x4_t __ret_169; \ |
| 41018 | | uint8x8_t __reint_169 = __s2_169; \ |
| 41019 | | uint32x4_t __reint1_169 = splatq_lane_u32(*(uint32x2_t *) &__reint_169, __p3_169); \ |
| 41020 | | __ret_169 = vdotq_u32(__s0_169, __s1_169, *(uint8x16_t *) &__reint1_169); \ |
| 41021 | | __ret_169; \ |
| 42369 | #define vdotq_lane_u32(__p0_261, __p1_261, __p2_261, __p3_261) __extension__ ({ \ |
| 42370 | uint32x4_t __s0_261 = __p0_261; \ |
| 42371 | uint8x16_t __s1_261 = __p1_261; \ |
| 42372 | uint8x8_t __s2_261 = __p2_261; \ |
| 42373 | uint32x4_t __ret_261; \ |
| 42374 | uint8x8_t __reint_261 = __s2_261; \ |
| 42375 | uint32x4_t __reint1_261 = splatq_lane_u32(*(uint32x2_t *) &__reint_261, __p3_261); \ |
| 42376 | __ret_261 = vdotq_u32(__s0_261, __s1_261, *(uint8x16_t *) &__reint1_261); \ |
| 42377 | __ret_261; \ |
| 41022 | 42378 | }) |
| 41023 | 42379 | #else |
| 41024 | | #define vdotq_lane_u32(__p0_170, __p1_170, __p2_170, __p3_170) __extension__ ({ \ |
| 41025 | | uint32x4_t __s0_170 = __p0_170; \ |
| 41026 | | uint8x16_t __s1_170 = __p1_170; \ |
| 41027 | | uint8x8_t __s2_170 = __p2_170; \ |
| 41028 | | uint32x4_t __rev0_170; __rev0_170 = __builtin_shufflevector(__s0_170, __s0_170, 3, 2, 1, 0); \ |
| 41029 | | uint8x16_t __rev1_170; __rev1_170 = __builtin_shufflevector(__s1_170, __s1_170, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41030 | | uint8x8_t __rev2_170; __rev2_170 = __builtin_shufflevector(__s2_170, __s2_170, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41031 | | uint32x4_t __ret_170; \ |
| 41032 | | uint8x8_t __reint_170 = __rev2_170; \ |
| 41033 | | uint32x4_t __reint1_170 = __noswap_splatq_lane_u32(*(uint32x2_t *) &__reint_170, __p3_170); \ |
| 41034 | | __ret_170 = __noswap_vdotq_u32(__rev0_170, __rev1_170, *(uint8x16_t *) &__reint1_170); \ |
| 41035 | | __ret_170 = __builtin_shufflevector(__ret_170, __ret_170, 3, 2, 1, 0); \ |
| 41036 | | __ret_170; \ |
| 42380 | #define vdotq_lane_u32(__p0_262, __p1_262, __p2_262, __p3_262) __extension__ ({ \ |
| 42381 | uint32x4_t __s0_262 = __p0_262; \ |
| 42382 | uint8x16_t __s1_262 = __p1_262; \ |
| 42383 | uint8x8_t __s2_262 = __p2_262; \ |
| 42384 | uint32x4_t __rev0_262; __rev0_262 = __builtin_shufflevector(__s0_262, __s0_262, 3, 2, 1, 0); \ |
| 42385 | uint8x16_t __rev1_262; __rev1_262 = __builtin_shufflevector(__s1_262, __s1_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42386 | uint8x8_t __rev2_262; __rev2_262 = __builtin_shufflevector(__s2_262, __s2_262, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42387 | uint32x4_t __ret_262; \ |
| 42388 | uint8x8_t __reint_262 = __rev2_262; \ |
| 42389 | uint32x4_t __reint1_262 = __noswap_splatq_lane_u32(*(uint32x2_t *) &__reint_262, __p3_262); \ |
| 42390 | __ret_262 = __noswap_vdotq_u32(__rev0_262, __rev1_262, *(uint8x16_t *) &__reint1_262); \ |
| 42391 | __ret_262 = __builtin_shufflevector(__ret_262, __ret_262, 3, 2, 1, 0); \ |
| 42392 | __ret_262; \ |
| 41037 | 42393 | }) |
| 41038 | 42394 | #endif |
| 41039 | 42395 | |
| 41040 | 42396 | #ifdef __LITTLE_ENDIAN__ |
| 41041 | | #define vdotq_lane_s32(__p0_171, __p1_171, __p2_171, __p3_171) __extension__ ({ \ |
| 41042 | | int32x4_t __s0_171 = __p0_171; \ |
| 41043 | | int8x16_t __s1_171 = __p1_171; \ |
| 41044 | | int8x8_t __s2_171 = __p2_171; \ |
| 41045 | | int32x4_t __ret_171; \ |
| 41046 | | int8x8_t __reint_171 = __s2_171; \ |
| 41047 | | int32x4_t __reint1_171 = splatq_lane_s32(*(int32x2_t *) &__reint_171, __p3_171); \ |
| 41048 | | __ret_171 = vdotq_s32(__s0_171, __s1_171, *(int8x16_t *) &__reint1_171); \ |
| 41049 | | __ret_171; \ |
| 42397 | #define vdotq_lane_s32(__p0_263, __p1_263, __p2_263, __p3_263) __extension__ ({ \ |
| 42398 | int32x4_t __s0_263 = __p0_263; \ |
| 42399 | int8x16_t __s1_263 = __p1_263; \ |
| 42400 | int8x8_t __s2_263 = __p2_263; \ |
| 42401 | int32x4_t __ret_263; \ |
| 42402 | int8x8_t __reint_263 = __s2_263; \ |
| 42403 | int32x4_t __reint1_263 = splatq_lane_s32(*(int32x2_t *) &__reint_263, __p3_263); \ |
| 42404 | __ret_263 = vdotq_s32(__s0_263, __s1_263, *(int8x16_t *) &__reint1_263); \ |
| 42405 | __ret_263; \ |
| 41050 | 42406 | }) |
| 41051 | 42407 | #else |
| 41052 | | #define vdotq_lane_s32(__p0_172, __p1_172, __p2_172, __p3_172) __extension__ ({ \ |
| 41053 | | int32x4_t __s0_172 = __p0_172; \ |
| 41054 | | int8x16_t __s1_172 = __p1_172; \ |
| 41055 | | int8x8_t __s2_172 = __p2_172; \ |
| 41056 | | int32x4_t __rev0_172; __rev0_172 = __builtin_shufflevector(__s0_172, __s0_172, 3, 2, 1, 0); \ |
| 41057 | | int8x16_t __rev1_172; __rev1_172 = __builtin_shufflevector(__s1_172, __s1_172, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41058 | | int8x8_t __rev2_172; __rev2_172 = __builtin_shufflevector(__s2_172, __s2_172, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41059 | | int32x4_t __ret_172; \ |
| 41060 | | int8x8_t __reint_172 = __rev2_172; \ |
| 41061 | | int32x4_t __reint1_172 = __noswap_splatq_lane_s32(*(int32x2_t *) &__reint_172, __p3_172); \ |
| 41062 | | __ret_172 = __noswap_vdotq_s32(__rev0_172, __rev1_172, *(int8x16_t *) &__reint1_172); \ |
| 41063 | | __ret_172 = __builtin_shufflevector(__ret_172, __ret_172, 3, 2, 1, 0); \ |
| 41064 | | __ret_172; \ |
| 42408 | #define vdotq_lane_s32(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ |
| 42409 | int32x4_t __s0_264 = __p0_264; \ |
| 42410 | int8x16_t __s1_264 = __p1_264; \ |
| 42411 | int8x8_t __s2_264 = __p2_264; \ |
| 42412 | int32x4_t __rev0_264; __rev0_264 = __builtin_shufflevector(__s0_264, __s0_264, 3, 2, 1, 0); \ |
| 42413 | int8x16_t __rev1_264; __rev1_264 = __builtin_shufflevector(__s1_264, __s1_264, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42414 | int8x8_t __rev2_264; __rev2_264 = __builtin_shufflevector(__s2_264, __s2_264, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42415 | int32x4_t __ret_264; \ |
| 42416 | int8x8_t __reint_264 = __rev2_264; \ |
| 42417 | int32x4_t __reint1_264 = __noswap_splatq_lane_s32(*(int32x2_t *) &__reint_264, __p3_264); \ |
| 42418 | __ret_264 = __noswap_vdotq_s32(__rev0_264, __rev1_264, *(int8x16_t *) &__reint1_264); \ |
| 42419 | __ret_264 = __builtin_shufflevector(__ret_264, __ret_264, 3, 2, 1, 0); \ |
| 42420 | __ret_264; \ |
| 41065 | 42421 | }) |
| 41066 | 42422 | #endif |
| 41067 | 42423 | |
| 41068 | 42424 | #ifdef __LITTLE_ENDIAN__ |
| 41069 | | #define vdot_lane_u32(__p0_173, __p1_173, __p2_173, __p3_173) __extension__ ({ \ |
| 41070 | | uint32x2_t __s0_173 = __p0_173; \ |
| 41071 | | uint8x8_t __s1_173 = __p1_173; \ |
| 41072 | | uint8x8_t __s2_173 = __p2_173; \ |
| 41073 | | uint32x2_t __ret_173; \ |
| 41074 | | uint8x8_t __reint_173 = __s2_173; \ |
| 41075 | | uint32x2_t __reint1_173 = splat_lane_u32(*(uint32x2_t *) &__reint_173, __p3_173); \ |
| 41076 | | __ret_173 = vdot_u32(__s0_173, __s1_173, *(uint8x8_t *) &__reint1_173); \ |
| 41077 | | __ret_173; \ |
| 42425 | #define vdot_lane_u32(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ |
| 42426 | uint32x2_t __s0_265 = __p0_265; \ |
| 42427 | uint8x8_t __s1_265 = __p1_265; \ |
| 42428 | uint8x8_t __s2_265 = __p2_265; \ |
| 42429 | uint32x2_t __ret_265; \ |
| 42430 | uint8x8_t __reint_265 = __s2_265; \ |
| 42431 | uint32x2_t __reint1_265 = splat_lane_u32(*(uint32x2_t *) &__reint_265, __p3_265); \ |
| 42432 | __ret_265 = vdot_u32(__s0_265, __s1_265, *(uint8x8_t *) &__reint1_265); \ |
| 42433 | __ret_265; \ |
| 41078 | 42434 | }) |
| 41079 | 42435 | #else |
| 41080 | | #define vdot_lane_u32(__p0_174, __p1_174, __p2_174, __p3_174) __extension__ ({ \ |
| 41081 | | uint32x2_t __s0_174 = __p0_174; \ |
| 41082 | | uint8x8_t __s1_174 = __p1_174; \ |
| 41083 | | uint8x8_t __s2_174 = __p2_174; \ |
| 41084 | | uint32x2_t __rev0_174; __rev0_174 = __builtin_shufflevector(__s0_174, __s0_174, 1, 0); \ |
| 41085 | | uint8x8_t __rev1_174; __rev1_174 = __builtin_shufflevector(__s1_174, __s1_174, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41086 | | uint8x8_t __rev2_174; __rev2_174 = __builtin_shufflevector(__s2_174, __s2_174, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41087 | | uint32x2_t __ret_174; \ |
| 41088 | | uint8x8_t __reint_174 = __rev2_174; \ |
| 41089 | | uint32x2_t __reint1_174 = __noswap_splat_lane_u32(*(uint32x2_t *) &__reint_174, __p3_174); \ |
| 41090 | | __ret_174 = __noswap_vdot_u32(__rev0_174, __rev1_174, *(uint8x8_t *) &__reint1_174); \ |
| 41091 | | __ret_174 = __builtin_shufflevector(__ret_174, __ret_174, 1, 0); \ |
| 41092 | | __ret_174; \ |
| 42436 | #define vdot_lane_u32(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ |
| 42437 | uint32x2_t __s0_266 = __p0_266; \ |
| 42438 | uint8x8_t __s1_266 = __p1_266; \ |
| 42439 | uint8x8_t __s2_266 = __p2_266; \ |
| 42440 | uint32x2_t __rev0_266; __rev0_266 = __builtin_shufflevector(__s0_266, __s0_266, 1, 0); \ |
| 42441 | uint8x8_t __rev1_266; __rev1_266 = __builtin_shufflevector(__s1_266, __s1_266, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42442 | uint8x8_t __rev2_266; __rev2_266 = __builtin_shufflevector(__s2_266, __s2_266, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42443 | uint32x2_t __ret_266; \ |
| 42444 | uint8x8_t __reint_266 = __rev2_266; \ |
| 42445 | uint32x2_t __reint1_266 = __noswap_splat_lane_u32(*(uint32x2_t *) &__reint_266, __p3_266); \ |
| 42446 | __ret_266 = __noswap_vdot_u32(__rev0_266, __rev1_266, *(uint8x8_t *) &__reint1_266); \ |
| 42447 | __ret_266 = __builtin_shufflevector(__ret_266, __ret_266, 1, 0); \ |
| 42448 | __ret_266; \ |
| 41093 | 42449 | }) |
| 41094 | 42450 | #endif |
| 41095 | 42451 | |
| 41096 | 42452 | #ifdef __LITTLE_ENDIAN__ |
| 41097 | | #define vdot_lane_s32(__p0_175, __p1_175, __p2_175, __p3_175) __extension__ ({ \ |
| 41098 | | int32x2_t __s0_175 = __p0_175; \ |
| 41099 | | int8x8_t __s1_175 = __p1_175; \ |
| 41100 | | int8x8_t __s2_175 = __p2_175; \ |
| 41101 | | int32x2_t __ret_175; \ |
| 41102 | | int8x8_t __reint_175 = __s2_175; \ |
| 41103 | | int32x2_t __reint1_175 = splat_lane_s32(*(int32x2_t *) &__reint_175, __p3_175); \ |
| 41104 | | __ret_175 = vdot_s32(__s0_175, __s1_175, *(int8x8_t *) &__reint1_175); \ |
| 41105 | | __ret_175; \ |
| 42453 | #define vdot_lane_s32(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ |
| 42454 | int32x2_t __s0_267 = __p0_267; \ |
| 42455 | int8x8_t __s1_267 = __p1_267; \ |
| 42456 | int8x8_t __s2_267 = __p2_267; \ |
| 42457 | int32x2_t __ret_267; \ |
| 42458 | int8x8_t __reint_267 = __s2_267; \ |
| 42459 | int32x2_t __reint1_267 = splat_lane_s32(*(int32x2_t *) &__reint_267, __p3_267); \ |
| 42460 | __ret_267 = vdot_s32(__s0_267, __s1_267, *(int8x8_t *) &__reint1_267); \ |
| 42461 | __ret_267; \ |
| 41106 | 42462 | }) |
| 41107 | 42463 | #else |
| 41108 | | #define vdot_lane_s32(__p0_176, __p1_176, __p2_176, __p3_176) __extension__ ({ \ |
| 41109 | | int32x2_t __s0_176 = __p0_176; \ |
| 41110 | | int8x8_t __s1_176 = __p1_176; \ |
| 41111 | | int8x8_t __s2_176 = __p2_176; \ |
| 41112 | | int32x2_t __rev0_176; __rev0_176 = __builtin_shufflevector(__s0_176, __s0_176, 1, 0); \ |
| 41113 | | int8x8_t __rev1_176; __rev1_176 = __builtin_shufflevector(__s1_176, __s1_176, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41114 | | int8x8_t __rev2_176; __rev2_176 = __builtin_shufflevector(__s2_176, __s2_176, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41115 | | int32x2_t __ret_176; \ |
| 41116 | | int8x8_t __reint_176 = __rev2_176; \ |
| 41117 | | int32x2_t __reint1_176 = __noswap_splat_lane_s32(*(int32x2_t *) &__reint_176, __p3_176); \ |
| 41118 | | __ret_176 = __noswap_vdot_s32(__rev0_176, __rev1_176, *(int8x8_t *) &__reint1_176); \ |
| 41119 | | __ret_176 = __builtin_shufflevector(__ret_176, __ret_176, 1, 0); \ |
| 41120 | | __ret_176; \ |
| 42464 | #define vdot_lane_s32(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ |
| 42465 | int32x2_t __s0_268 = __p0_268; \ |
| 42466 | int8x8_t __s1_268 = __p1_268; \ |
| 42467 | int8x8_t __s2_268 = __p2_268; \ |
| 42468 | int32x2_t __rev0_268; __rev0_268 = __builtin_shufflevector(__s0_268, __s0_268, 1, 0); \ |
| 42469 | int8x8_t __rev1_268; __rev1_268 = __builtin_shufflevector(__s1_268, __s1_268, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42470 | int8x8_t __rev2_268; __rev2_268 = __builtin_shufflevector(__s2_268, __s2_268, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42471 | int32x2_t __ret_268; \ |
| 42472 | int8x8_t __reint_268 = __rev2_268; \ |
| 42473 | int32x2_t __reint1_268 = __noswap_splat_lane_s32(*(int32x2_t *) &__reint_268, __p3_268); \ |
| 42474 | __ret_268 = __noswap_vdot_s32(__rev0_268, __rev1_268, *(int8x8_t *) &__reint1_268); \ |
| 42475 | __ret_268 = __builtin_shufflevector(__ret_268, __ret_268, 1, 0); \ |
| 42476 | __ret_268; \ |
| 41121 | 42477 | }) |
| 41122 | 42478 | #endif |
| 41123 | 42479 | |
| 41124 | 42480 | #endif |
| 41125 | 42481 | #if defined(__ARM_FEATURE_DOTPROD) && defined(__aarch64__) |
| 41126 | 42482 | #ifdef __LITTLE_ENDIAN__ |
| 41127 | | #define vdotq_laneq_u32(__p0_177, __p1_177, __p2_177, __p3_177) __extension__ ({ \ |
| 41128 | | uint32x4_t __s0_177 = __p0_177; \ |
| 41129 | | uint8x16_t __s1_177 = __p1_177; \ |
| 41130 | | uint8x16_t __s2_177 = __p2_177; \ |
| 41131 | | uint32x4_t __ret_177; \ |
| 41132 | | uint8x16_t __reint_177 = __s2_177; \ |
| 41133 | | uint32x4_t __reint1_177 = splatq_laneq_u32(*(uint32x4_t *) &__reint_177, __p3_177); \ |
| 41134 | | __ret_177 = vdotq_u32(__s0_177, __s1_177, *(uint8x16_t *) &__reint1_177); \ |
| 41135 | | __ret_177; \ |
| 42483 | #define vdotq_laneq_u32(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ |
| 42484 | uint32x4_t __s0_269 = __p0_269; \ |
| 42485 | uint8x16_t __s1_269 = __p1_269; \ |
| 42486 | uint8x16_t __s2_269 = __p2_269; \ |
| 42487 | uint32x4_t __ret_269; \ |
| 42488 | uint8x16_t __reint_269 = __s2_269; \ |
| 42489 | uint32x4_t __reint1_269 = splatq_laneq_u32(*(uint32x4_t *) &__reint_269, __p3_269); \ |
| 42490 | __ret_269 = vdotq_u32(__s0_269, __s1_269, *(uint8x16_t *) &__reint1_269); \ |
| 42491 | __ret_269; \ |
| 41136 | 42492 | }) |
| 41137 | 42493 | #else |
| 41138 | | #define vdotq_laneq_u32(__p0_178, __p1_178, __p2_178, __p3_178) __extension__ ({ \ |
| 41139 | | uint32x4_t __s0_178 = __p0_178; \ |
| 41140 | | uint8x16_t __s1_178 = __p1_178; \ |
| 41141 | | uint8x16_t __s2_178 = __p2_178; \ |
| 41142 | | uint32x4_t __rev0_178; __rev0_178 = __builtin_shufflevector(__s0_178, __s0_178, 3, 2, 1, 0); \ |
| 41143 | | uint8x16_t __rev1_178; __rev1_178 = __builtin_shufflevector(__s1_178, __s1_178, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41144 | | uint8x16_t __rev2_178; __rev2_178 = __builtin_shufflevector(__s2_178, __s2_178, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41145 | | uint32x4_t __ret_178; \ |
| 41146 | | uint8x16_t __reint_178 = __rev2_178; \ |
| 41147 | | uint32x4_t __reint1_178 = __noswap_splatq_laneq_u32(*(uint32x4_t *) &__reint_178, __p3_178); \ |
| 41148 | | __ret_178 = __noswap_vdotq_u32(__rev0_178, __rev1_178, *(uint8x16_t *) &__reint1_178); \ |
| 41149 | | __ret_178 = __builtin_shufflevector(__ret_178, __ret_178, 3, 2, 1, 0); \ |
| 41150 | | __ret_178; \ |
| 42494 | #define vdotq_laneq_u32(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ |
| 42495 | uint32x4_t __s0_270 = __p0_270; \ |
| 42496 | uint8x16_t __s1_270 = __p1_270; \ |
| 42497 | uint8x16_t __s2_270 = __p2_270; \ |
| 42498 | uint32x4_t __rev0_270; __rev0_270 = __builtin_shufflevector(__s0_270, __s0_270, 3, 2, 1, 0); \ |
| 42499 | uint8x16_t __rev1_270; __rev1_270 = __builtin_shufflevector(__s1_270, __s1_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42500 | uint8x16_t __rev2_270; __rev2_270 = __builtin_shufflevector(__s2_270, __s2_270, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42501 | uint32x4_t __ret_270; \ |
| 42502 | uint8x16_t __reint_270 = __rev2_270; \ |
| 42503 | uint32x4_t __reint1_270 = __noswap_splatq_laneq_u32(*(uint32x4_t *) &__reint_270, __p3_270); \ |
| 42504 | __ret_270 = __noswap_vdotq_u32(__rev0_270, __rev1_270, *(uint8x16_t *) &__reint1_270); \ |
| 42505 | __ret_270 = __builtin_shufflevector(__ret_270, __ret_270, 3, 2, 1, 0); \ |
| 42506 | __ret_270; \ |
| 41151 | 42507 | }) |
| 41152 | 42508 | #endif |
| 41153 | 42509 | |
| 41154 | 42510 | #ifdef __LITTLE_ENDIAN__ |
| 41155 | | #define vdotq_laneq_s32(__p0_179, __p1_179, __p2_179, __p3_179) __extension__ ({ \ |
| 41156 | | int32x4_t __s0_179 = __p0_179; \ |
| 41157 | | int8x16_t __s1_179 = __p1_179; \ |
| 41158 | | int8x16_t __s2_179 = __p2_179; \ |
| 41159 | | int32x4_t __ret_179; \ |
| 41160 | | int8x16_t __reint_179 = __s2_179; \ |
| 41161 | | int32x4_t __reint1_179 = splatq_laneq_s32(*(int32x4_t *) &__reint_179, __p3_179); \ |
| 41162 | | __ret_179 = vdotq_s32(__s0_179, __s1_179, *(int8x16_t *) &__reint1_179); \ |
| 41163 | | __ret_179; \ |
| 42511 | #define vdotq_laneq_s32(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ |
| 42512 | int32x4_t __s0_271 = __p0_271; \ |
| 42513 | int8x16_t __s1_271 = __p1_271; \ |
| 42514 | int8x16_t __s2_271 = __p2_271; \ |
| 42515 | int32x4_t __ret_271; \ |
| 42516 | int8x16_t __reint_271 = __s2_271; \ |
| 42517 | int32x4_t __reint1_271 = splatq_laneq_s32(*(int32x4_t *) &__reint_271, __p3_271); \ |
| 42518 | __ret_271 = vdotq_s32(__s0_271, __s1_271, *(int8x16_t *) &__reint1_271); \ |
| 42519 | __ret_271; \ |
| 41164 | 42520 | }) |
| 41165 | 42521 | #else |
| 41166 | | #define vdotq_laneq_s32(__p0_180, __p1_180, __p2_180, __p3_180) __extension__ ({ \ |
| 41167 | | int32x4_t __s0_180 = __p0_180; \ |
| 41168 | | int8x16_t __s1_180 = __p1_180; \ |
| 41169 | | int8x16_t __s2_180 = __p2_180; \ |
| 41170 | | int32x4_t __rev0_180; __rev0_180 = __builtin_shufflevector(__s0_180, __s0_180, 3, 2, 1, 0); \ |
| 41171 | | int8x16_t __rev1_180; __rev1_180 = __builtin_shufflevector(__s1_180, __s1_180, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41172 | | int8x16_t __rev2_180; __rev2_180 = __builtin_shufflevector(__s2_180, __s2_180, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41173 | | int32x4_t __ret_180; \ |
| 41174 | | int8x16_t __reint_180 = __rev2_180; \ |
| 41175 | | int32x4_t __reint1_180 = __noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_180, __p3_180); \ |
| 41176 | | __ret_180 = __noswap_vdotq_s32(__rev0_180, __rev1_180, *(int8x16_t *) &__reint1_180); \ |
| 41177 | | __ret_180 = __builtin_shufflevector(__ret_180, __ret_180, 3, 2, 1, 0); \ |
| 41178 | | __ret_180; \ |
| 42522 | #define vdotq_laneq_s32(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ |
| 42523 | int32x4_t __s0_272 = __p0_272; \ |
| 42524 | int8x16_t __s1_272 = __p1_272; \ |
| 42525 | int8x16_t __s2_272 = __p2_272; \ |
| 42526 | int32x4_t __rev0_272; __rev0_272 = __builtin_shufflevector(__s0_272, __s0_272, 3, 2, 1, 0); \ |
| 42527 | int8x16_t __rev1_272; __rev1_272 = __builtin_shufflevector(__s1_272, __s1_272, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42528 | int8x16_t __rev2_272; __rev2_272 = __builtin_shufflevector(__s2_272, __s2_272, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42529 | int32x4_t __ret_272; \ |
| 42530 | int8x16_t __reint_272 = __rev2_272; \ |
| 42531 | int32x4_t __reint1_272 = __noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_272, __p3_272); \ |
| 42532 | __ret_272 = __noswap_vdotq_s32(__rev0_272, __rev1_272, *(int8x16_t *) &__reint1_272); \ |
| 42533 | __ret_272 = __builtin_shufflevector(__ret_272, __ret_272, 3, 2, 1, 0); \ |
| 42534 | __ret_272; \ |
| 41179 | 42535 | }) |
| 41180 | 42536 | #endif |
| 41181 | 42537 | |
| 41182 | 42538 | #ifdef __LITTLE_ENDIAN__ |
| 41183 | | #define vdot_laneq_u32(__p0_181, __p1_181, __p2_181, __p3_181) __extension__ ({ \ |
| 41184 | | uint32x2_t __s0_181 = __p0_181; \ |
| 41185 | | uint8x8_t __s1_181 = __p1_181; \ |
| 41186 | | uint8x16_t __s2_181 = __p2_181; \ |
| 41187 | | uint32x2_t __ret_181; \ |
| 41188 | | uint8x16_t __reint_181 = __s2_181; \ |
| 41189 | | uint32x2_t __reint1_181 = splat_laneq_u32(*(uint32x4_t *) &__reint_181, __p3_181); \ |
| 41190 | | __ret_181 = vdot_u32(__s0_181, __s1_181, *(uint8x8_t *) &__reint1_181); \ |
| 41191 | | __ret_181; \ |
| 42539 | #define vdot_laneq_u32(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ |
| 42540 | uint32x2_t __s0_273 = __p0_273; \ |
| 42541 | uint8x8_t __s1_273 = __p1_273; \ |
| 42542 | uint8x16_t __s2_273 = __p2_273; \ |
| 42543 | uint32x2_t __ret_273; \ |
| 42544 | uint8x16_t __reint_273 = __s2_273; \ |
| 42545 | uint32x2_t __reint1_273 = splat_laneq_u32(*(uint32x4_t *) &__reint_273, __p3_273); \ |
| 42546 | __ret_273 = vdot_u32(__s0_273, __s1_273, *(uint8x8_t *) &__reint1_273); \ |
| 42547 | __ret_273; \ |
| 41192 | 42548 | }) |
| 41193 | 42549 | #else |
| 41194 | | #define vdot_laneq_u32(__p0_182, __p1_182, __p2_182, __p3_182) __extension__ ({ \ |
| 41195 | | uint32x2_t __s0_182 = __p0_182; \ |
| 41196 | | uint8x8_t __s1_182 = __p1_182; \ |
| 41197 | | uint8x16_t __s2_182 = __p2_182; \ |
| 41198 | | uint32x2_t __rev0_182; __rev0_182 = __builtin_shufflevector(__s0_182, __s0_182, 1, 0); \ |
| 41199 | | uint8x8_t __rev1_182; __rev1_182 = __builtin_shufflevector(__s1_182, __s1_182, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41200 | | uint8x16_t __rev2_182; __rev2_182 = __builtin_shufflevector(__s2_182, __s2_182, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41201 | | uint32x2_t __ret_182; \ |
| 41202 | | uint8x16_t __reint_182 = __rev2_182; \ |
| 41203 | | uint32x2_t __reint1_182 = __noswap_splat_laneq_u32(*(uint32x4_t *) &__reint_182, __p3_182); \ |
| 41204 | | __ret_182 = __noswap_vdot_u32(__rev0_182, __rev1_182, *(uint8x8_t *) &__reint1_182); \ |
| 41205 | | __ret_182 = __builtin_shufflevector(__ret_182, __ret_182, 1, 0); \ |
| 41206 | | __ret_182; \ |
| 42550 | #define vdot_laneq_u32(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ |
| 42551 | uint32x2_t __s0_274 = __p0_274; \ |
| 42552 | uint8x8_t __s1_274 = __p1_274; \ |
| 42553 | uint8x16_t __s2_274 = __p2_274; \ |
| 42554 | uint32x2_t __rev0_274; __rev0_274 = __builtin_shufflevector(__s0_274, __s0_274, 1, 0); \ |
| 42555 | uint8x8_t __rev1_274; __rev1_274 = __builtin_shufflevector(__s1_274, __s1_274, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42556 | uint8x16_t __rev2_274; __rev2_274 = __builtin_shufflevector(__s2_274, __s2_274, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42557 | uint32x2_t __ret_274; \ |
| 42558 | uint8x16_t __reint_274 = __rev2_274; \ |
| 42559 | uint32x2_t __reint1_274 = __noswap_splat_laneq_u32(*(uint32x4_t *) &__reint_274, __p3_274); \ |
| 42560 | __ret_274 = __noswap_vdot_u32(__rev0_274, __rev1_274, *(uint8x8_t *) &__reint1_274); \ |
| 42561 | __ret_274 = __builtin_shufflevector(__ret_274, __ret_274, 1, 0); \ |
| 42562 | __ret_274; \ |
| 41207 | 42563 | }) |
| 41208 | 42564 | #endif |
| 41209 | 42565 | |
| 41210 | 42566 | #ifdef __LITTLE_ENDIAN__ |
| 41211 | | #define vdot_laneq_s32(__p0_183, __p1_183, __p2_183, __p3_183) __extension__ ({ \ |
| 41212 | | int32x2_t __s0_183 = __p0_183; \ |
| 41213 | | int8x8_t __s1_183 = __p1_183; \ |
| 41214 | | int8x16_t __s2_183 = __p2_183; \ |
| 41215 | | int32x2_t __ret_183; \ |
| 41216 | | int8x16_t __reint_183 = __s2_183; \ |
| 41217 | | int32x2_t __reint1_183 = splat_laneq_s32(*(int32x4_t *) &__reint_183, __p3_183); \ |
| 41218 | | __ret_183 = vdot_s32(__s0_183, __s1_183, *(int8x8_t *) &__reint1_183); \ |
| 41219 | | __ret_183; \ |
| 42567 | #define vdot_laneq_s32(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ |
| 42568 | int32x2_t __s0_275 = __p0_275; \ |
| 42569 | int8x8_t __s1_275 = __p1_275; \ |
| 42570 | int8x16_t __s2_275 = __p2_275; \ |
| 42571 | int32x2_t __ret_275; \ |
| 42572 | int8x16_t __reint_275 = __s2_275; \ |
| 42573 | int32x2_t __reint1_275 = splat_laneq_s32(*(int32x4_t *) &__reint_275, __p3_275); \ |
| 42574 | __ret_275 = vdot_s32(__s0_275, __s1_275, *(int8x8_t *) &__reint1_275); \ |
| 42575 | __ret_275; \ |
| 41220 | 42576 | }) |
| 41221 | 42577 | #else |
| 41222 | | #define vdot_laneq_s32(__p0_184, __p1_184, __p2_184, __p3_184) __extension__ ({ \ |
| 41223 | | int32x2_t __s0_184 = __p0_184; \ |
| 41224 | | int8x8_t __s1_184 = __p1_184; \ |
| 41225 | | int8x16_t __s2_184 = __p2_184; \ |
| 41226 | | int32x2_t __rev0_184; __rev0_184 = __builtin_shufflevector(__s0_184, __s0_184, 1, 0); \ |
| 41227 | | int8x8_t __rev1_184; __rev1_184 = __builtin_shufflevector(__s1_184, __s1_184, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41228 | | int8x16_t __rev2_184; __rev2_184 = __builtin_shufflevector(__s2_184, __s2_184, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 41229 | | int32x2_t __ret_184; \ |
| 41230 | | int8x16_t __reint_184 = __rev2_184; \ |
| 41231 | | int32x2_t __reint1_184 = __noswap_splat_laneq_s32(*(int32x4_t *) &__reint_184, __p3_184); \ |
| 41232 | | __ret_184 = __noswap_vdot_s32(__rev0_184, __rev1_184, *(int8x8_t *) &__reint1_184); \ |
| 41233 | | __ret_184 = __builtin_shufflevector(__ret_184, __ret_184, 1, 0); \ |
| 41234 | | __ret_184; \ |
| 42578 | #define vdot_laneq_s32(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ |
| 42579 | int32x2_t __s0_276 = __p0_276; \ |
| 42580 | int8x8_t __s1_276 = __p1_276; \ |
| 42581 | int8x16_t __s2_276 = __p2_276; \ |
| 42582 | int32x2_t __rev0_276; __rev0_276 = __builtin_shufflevector(__s0_276, __s0_276, 1, 0); \ |
| 42583 | int8x8_t __rev1_276; __rev1_276 = __builtin_shufflevector(__s1_276, __s1_276, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42584 | int8x16_t __rev2_276; __rev2_276 = __builtin_shufflevector(__s2_276, __s2_276, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42585 | int32x2_t __ret_276; \ |
| 42586 | int8x16_t __reint_276 = __rev2_276; \ |
| 42587 | int32x2_t __reint1_276 = __noswap_splat_laneq_s32(*(int32x4_t *) &__reint_276, __p3_276); \ |
| 42588 | __ret_276 = __noswap_vdot_s32(__rev0_276, __rev1_276, *(int8x8_t *) &__reint1_276); \ |
| 42589 | __ret_276 = __builtin_shufflevector(__ret_276, __ret_276, 1, 0); \ |
| 42590 | __ret_276; \ |
| 41235 | 42591 | }) |
| 41236 | 42592 | #endif |
| 41237 | 42593 | |
| ... | ... | @@ -42898,44 +44254,44 @@ __ai float16x4_t vmul_f16(float16x4_t __p0, float16x4_t __p1) { |
| 42898 | 44254 | #endif |
| 42899 | 44255 | |
| 42900 | 44256 | #ifdef __LITTLE_ENDIAN__ |
| 42901 | | #define vmulq_lane_f16(__p0_185, __p1_185, __p2_185) __extension__ ({ \ |
| 42902 | | float16x8_t __s0_185 = __p0_185; \ |
| 42903 | | float16x4_t __s1_185 = __p1_185; \ |
| 42904 | | float16x8_t __ret_185; \ |
| 42905 | | __ret_185 = __s0_185 * splatq_lane_f16(__s1_185, __p2_185); \ |
| 42906 | | __ret_185; \ |
| 44257 | #define vmulq_lane_f16(__p0_277, __p1_277, __p2_277) __extension__ ({ \ |
| 44258 | float16x8_t __s0_277 = __p0_277; \ |
| 44259 | float16x4_t __s1_277 = __p1_277; \ |
| 44260 | float16x8_t __ret_277; \ |
| 44261 | __ret_277 = __s0_277 * splatq_lane_f16(__s1_277, __p2_277); \ |
| 44262 | __ret_277; \ |
| 42907 | 44263 | }) |
| 42908 | 44264 | #else |
| 42909 | | #define vmulq_lane_f16(__p0_186, __p1_186, __p2_186) __extension__ ({ \ |
| 42910 | | float16x8_t __s0_186 = __p0_186; \ |
| 42911 | | float16x4_t __s1_186 = __p1_186; \ |
| 42912 | | float16x8_t __rev0_186; __rev0_186 = __builtin_shufflevector(__s0_186, __s0_186, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42913 | | float16x4_t __rev1_186; __rev1_186 = __builtin_shufflevector(__s1_186, __s1_186, 3, 2, 1, 0); \ |
| 42914 | | float16x8_t __ret_186; \ |
| 42915 | | __ret_186 = __rev0_186 * __noswap_splatq_lane_f16(__rev1_186, __p2_186); \ |
| 42916 | | __ret_186 = __builtin_shufflevector(__ret_186, __ret_186, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 42917 | | __ret_186; \ |
| 44265 | #define vmulq_lane_f16(__p0_278, __p1_278, __p2_278) __extension__ ({ \ |
| 44266 | float16x8_t __s0_278 = __p0_278; \ |
| 44267 | float16x4_t __s1_278 = __p1_278; \ |
| 44268 | float16x8_t __rev0_278; __rev0_278 = __builtin_shufflevector(__s0_278, __s0_278, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44269 | float16x4_t __rev1_278; __rev1_278 = __builtin_shufflevector(__s1_278, __s1_278, 3, 2, 1, 0); \ |
| 44270 | float16x8_t __ret_278; \ |
| 44271 | __ret_278 = __rev0_278 * __noswap_splatq_lane_f16(__rev1_278, __p2_278); \ |
| 44272 | __ret_278 = __builtin_shufflevector(__ret_278, __ret_278, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44273 | __ret_278; \ |
| 42918 | 44274 | }) |
| 42919 | 44275 | #endif |
| 42920 | 44276 | |
| 42921 | 44277 | #ifdef __LITTLE_ENDIAN__ |
| 42922 | | #define vmul_lane_f16(__p0_187, __p1_187, __p2_187) __extension__ ({ \ |
| 42923 | | float16x4_t __s0_187 = __p0_187; \ |
| 42924 | | float16x4_t __s1_187 = __p1_187; \ |
| 42925 | | float16x4_t __ret_187; \ |
| 42926 | | __ret_187 = __s0_187 * splat_lane_f16(__s1_187, __p2_187); \ |
| 42927 | | __ret_187; \ |
| 44278 | #define vmul_lane_f16(__p0_279, __p1_279, __p2_279) __extension__ ({ \ |
| 44279 | float16x4_t __s0_279 = __p0_279; \ |
| 44280 | float16x4_t __s1_279 = __p1_279; \ |
| 44281 | float16x4_t __ret_279; \ |
| 44282 | __ret_279 = __s0_279 * splat_lane_f16(__s1_279, __p2_279); \ |
| 44283 | __ret_279; \ |
| 42928 | 44284 | }) |
| 42929 | 44285 | #else |
| 42930 | | #define vmul_lane_f16(__p0_188, __p1_188, __p2_188) __extension__ ({ \ |
| 42931 | | float16x4_t __s0_188 = __p0_188; \ |
| 42932 | | float16x4_t __s1_188 = __p1_188; \ |
| 42933 | | float16x4_t __rev0_188; __rev0_188 = __builtin_shufflevector(__s0_188, __s0_188, 3, 2, 1, 0); \ |
| 42934 | | float16x4_t __rev1_188; __rev1_188 = __builtin_shufflevector(__s1_188, __s1_188, 3, 2, 1, 0); \ |
| 42935 | | float16x4_t __ret_188; \ |
| 42936 | | __ret_188 = __rev0_188 * __noswap_splat_lane_f16(__rev1_188, __p2_188); \ |
| 42937 | | __ret_188 = __builtin_shufflevector(__ret_188, __ret_188, 3, 2, 1, 0); \ |
| 42938 | | __ret_188; \ |
| 44286 | #define vmul_lane_f16(__p0_280, __p1_280, __p2_280) __extension__ ({ \ |
| 44287 | float16x4_t __s0_280 = __p0_280; \ |
| 44288 | float16x4_t __s1_280 = __p1_280; \ |
| 44289 | float16x4_t __rev0_280; __rev0_280 = __builtin_shufflevector(__s0_280, __s0_280, 3, 2, 1, 0); \ |
| 44290 | float16x4_t __rev1_280; __rev1_280 = __builtin_shufflevector(__s1_280, __s1_280, 3, 2, 1, 0); \ |
| 44291 | float16x4_t __ret_280; \ |
| 44292 | __ret_280 = __rev0_280 * __noswap_splat_lane_f16(__rev1_280, __p2_280); \ |
| 44293 | __ret_280 = __builtin_shufflevector(__ret_280, __ret_280, 3, 2, 1, 0); \ |
| 44294 | __ret_280; \ |
| 42939 | 44295 | }) |
| 42940 | 44296 | #endif |
| 42941 | 44297 | |
| ... | ... | @@ -43677,140 +45033,140 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 43677 | 45033 | #endif |
| 43678 | 45034 | |
| 43679 | 45035 | #ifdef __LITTLE_ENDIAN__ |
| 43680 | | #define vfmsh_lane_f16(__p0_189, __p1_189, __p2_189, __p3_189) __extension__ ({ \ |
| 43681 | | float16_t __s0_189 = __p0_189; \ |
| 43682 | | float16_t __s1_189 = __p1_189; \ |
| 43683 | | float16x4_t __s2_189 = __p2_189; \ |
| 43684 | | float16_t __ret_189; \ |
| 43685 | | __ret_189 = vfmah_lane_f16(__s0_189, -__s1_189, __s2_189, __p3_189); \ |
| 43686 | | __ret_189; \ |
| 45036 | #define vfmsh_lane_f16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ |
| 45037 | float16_t __s0_281 = __p0_281; \ |
| 45038 | float16_t __s1_281 = __p1_281; \ |
| 45039 | float16x4_t __s2_281 = __p2_281; \ |
| 45040 | float16_t __ret_281; \ |
| 45041 | __ret_281 = vfmah_lane_f16(__s0_281, -__s1_281, __s2_281, __p3_281); \ |
| 45042 | __ret_281; \ |
| 43687 | 45043 | }) |
| 43688 | 45044 | #else |
| 43689 | | #define vfmsh_lane_f16(__p0_190, __p1_190, __p2_190, __p3_190) __extension__ ({ \ |
| 43690 | | float16_t __s0_190 = __p0_190; \ |
| 43691 | | float16_t __s1_190 = __p1_190; \ |
| 43692 | | float16x4_t __s2_190 = __p2_190; \ |
| 43693 | | float16x4_t __rev2_190; __rev2_190 = __builtin_shufflevector(__s2_190, __s2_190, 3, 2, 1, 0); \ |
| 43694 | | float16_t __ret_190; \ |
| 43695 | | __ret_190 = __noswap_vfmah_lane_f16(__s0_190, -__s1_190, __rev2_190, __p3_190); \ |
| 43696 | | __ret_190; \ |
| 45045 | #define vfmsh_lane_f16(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ |
| 45046 | float16_t __s0_282 = __p0_282; \ |
| 45047 | float16_t __s1_282 = __p1_282; \ |
| 45048 | float16x4_t __s2_282 = __p2_282; \ |
| 45049 | float16x4_t __rev2_282; __rev2_282 = __builtin_shufflevector(__s2_282, __s2_282, 3, 2, 1, 0); \ |
| 45050 | float16_t __ret_282; \ |
| 45051 | __ret_282 = __noswap_vfmah_lane_f16(__s0_282, -__s1_282, __rev2_282, __p3_282); \ |
| 45052 | __ret_282; \ |
| 43697 | 45053 | }) |
| 43698 | 45054 | #endif |
| 43699 | 45055 | |
| 43700 | 45056 | #ifdef __LITTLE_ENDIAN__ |
| 43701 | | #define vfmsq_lane_f16(__p0_191, __p1_191, __p2_191, __p3_191) __extension__ ({ \ |
| 43702 | | float16x8_t __s0_191 = __p0_191; \ |
| 43703 | | float16x8_t __s1_191 = __p1_191; \ |
| 43704 | | float16x4_t __s2_191 = __p2_191; \ |
| 43705 | | float16x8_t __ret_191; \ |
| 43706 | | __ret_191 = vfmaq_lane_f16(__s0_191, -__s1_191, __s2_191, __p3_191); \ |
| 43707 | | __ret_191; \ |
| 45057 | #define vfmsq_lane_f16(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ |
| 45058 | float16x8_t __s0_283 = __p0_283; \ |
| 45059 | float16x8_t __s1_283 = __p1_283; \ |
| 45060 | float16x4_t __s2_283 = __p2_283; \ |
| 45061 | float16x8_t __ret_283; \ |
| 45062 | __ret_283 = vfmaq_lane_f16(__s0_283, -__s1_283, __s2_283, __p3_283); \ |
| 45063 | __ret_283; \ |
| 43708 | 45064 | }) |
| 43709 | 45065 | #else |
| 43710 | | #define vfmsq_lane_f16(__p0_192, __p1_192, __p2_192, __p3_192) __extension__ ({ \ |
| 43711 | | float16x8_t __s0_192 = __p0_192; \ |
| 43712 | | float16x8_t __s1_192 = __p1_192; \ |
| 43713 | | float16x4_t __s2_192 = __p2_192; \ |
| 43714 | | float16x8_t __rev0_192; __rev0_192 = __builtin_shufflevector(__s0_192, __s0_192, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43715 | | float16x8_t __rev1_192; __rev1_192 = __builtin_shufflevector(__s1_192, __s1_192, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43716 | | float16x4_t __rev2_192; __rev2_192 = __builtin_shufflevector(__s2_192, __s2_192, 3, 2, 1, 0); \ |
| 43717 | | float16x8_t __ret_192; \ |
| 43718 | | __ret_192 = __noswap_vfmaq_lane_f16(__rev0_192, -__rev1_192, __rev2_192, __p3_192); \ |
| 43719 | | __ret_192 = __builtin_shufflevector(__ret_192, __ret_192, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43720 | | __ret_192; \ |
| 45066 | #define vfmsq_lane_f16(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ |
| 45067 | float16x8_t __s0_284 = __p0_284; \ |
| 45068 | float16x8_t __s1_284 = __p1_284; \ |
| 45069 | float16x4_t __s2_284 = __p2_284; \ |
| 45070 | float16x8_t __rev0_284; __rev0_284 = __builtin_shufflevector(__s0_284, __s0_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45071 | float16x8_t __rev1_284; __rev1_284 = __builtin_shufflevector(__s1_284, __s1_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45072 | float16x4_t __rev2_284; __rev2_284 = __builtin_shufflevector(__s2_284, __s2_284, 3, 2, 1, 0); \ |
| 45073 | float16x8_t __ret_284; \ |
| 45074 | __ret_284 = __noswap_vfmaq_lane_f16(__rev0_284, -__rev1_284, __rev2_284, __p3_284); \ |
| 45075 | __ret_284 = __builtin_shufflevector(__ret_284, __ret_284, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45076 | __ret_284; \ |
| 43721 | 45077 | }) |
| 43722 | 45078 | #endif |
| 43723 | 45079 | |
| 43724 | 45080 | #ifdef __LITTLE_ENDIAN__ |
| 43725 | | #define vfms_lane_f16(__p0_193, __p1_193, __p2_193, __p3_193) __extension__ ({ \ |
| 43726 | | float16x4_t __s0_193 = __p0_193; \ |
| 43727 | | float16x4_t __s1_193 = __p1_193; \ |
| 43728 | | float16x4_t __s2_193 = __p2_193; \ |
| 43729 | | float16x4_t __ret_193; \ |
| 43730 | | __ret_193 = vfma_lane_f16(__s0_193, -__s1_193, __s2_193, __p3_193); \ |
| 43731 | | __ret_193; \ |
| 45081 | #define vfms_lane_f16(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ |
| 45082 | float16x4_t __s0_285 = __p0_285; \ |
| 45083 | float16x4_t __s1_285 = __p1_285; \ |
| 45084 | float16x4_t __s2_285 = __p2_285; \ |
| 45085 | float16x4_t __ret_285; \ |
| 45086 | __ret_285 = vfma_lane_f16(__s0_285, -__s1_285, __s2_285, __p3_285); \ |
| 45087 | __ret_285; \ |
| 43732 | 45088 | }) |
| 43733 | 45089 | #else |
| 43734 | | #define vfms_lane_f16(__p0_194, __p1_194, __p2_194, __p3_194) __extension__ ({ \ |
| 43735 | | float16x4_t __s0_194 = __p0_194; \ |
| 43736 | | float16x4_t __s1_194 = __p1_194; \ |
| 43737 | | float16x4_t __s2_194 = __p2_194; \ |
| 43738 | | float16x4_t __rev0_194; __rev0_194 = __builtin_shufflevector(__s0_194, __s0_194, 3, 2, 1, 0); \ |
| 43739 | | float16x4_t __rev1_194; __rev1_194 = __builtin_shufflevector(__s1_194, __s1_194, 3, 2, 1, 0); \ |
| 43740 | | float16x4_t __rev2_194; __rev2_194 = __builtin_shufflevector(__s2_194, __s2_194, 3, 2, 1, 0); \ |
| 43741 | | float16x4_t __ret_194; \ |
| 43742 | | __ret_194 = __noswap_vfma_lane_f16(__rev0_194, -__rev1_194, __rev2_194, __p3_194); \ |
| 43743 | | __ret_194 = __builtin_shufflevector(__ret_194, __ret_194, 3, 2, 1, 0); \ |
| 43744 | | __ret_194; \ |
| 45090 | #define vfms_lane_f16(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ |
| 45091 | float16x4_t __s0_286 = __p0_286; \ |
| 45092 | float16x4_t __s1_286 = __p1_286; \ |
| 45093 | float16x4_t __s2_286 = __p2_286; \ |
| 45094 | float16x4_t __rev0_286; __rev0_286 = __builtin_shufflevector(__s0_286, __s0_286, 3, 2, 1, 0); \ |
| 45095 | float16x4_t __rev1_286; __rev1_286 = __builtin_shufflevector(__s1_286, __s1_286, 3, 2, 1, 0); \ |
| 45096 | float16x4_t __rev2_286; __rev2_286 = __builtin_shufflevector(__s2_286, __s2_286, 3, 2, 1, 0); \ |
| 45097 | float16x4_t __ret_286; \ |
| 45098 | __ret_286 = __noswap_vfma_lane_f16(__rev0_286, -__rev1_286, __rev2_286, __p3_286); \ |
| 45099 | __ret_286 = __builtin_shufflevector(__ret_286, __ret_286, 3, 2, 1, 0); \ |
| 45100 | __ret_286; \ |
| 43745 | 45101 | }) |
| 43746 | 45102 | #endif |
| 43747 | 45103 | |
| 43748 | 45104 | #ifdef __LITTLE_ENDIAN__ |
| 43749 | | #define vfmsh_laneq_f16(__p0_195, __p1_195, __p2_195, __p3_195) __extension__ ({ \ |
| 43750 | | float16_t __s0_195 = __p0_195; \ |
| 43751 | | float16_t __s1_195 = __p1_195; \ |
| 43752 | | float16x8_t __s2_195 = __p2_195; \ |
| 43753 | | float16_t __ret_195; \ |
| 43754 | | __ret_195 = vfmah_laneq_f16(__s0_195, -__s1_195, __s2_195, __p3_195); \ |
| 43755 | | __ret_195; \ |
| 45105 | #define vfmsh_laneq_f16(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ |
| 45106 | float16_t __s0_287 = __p0_287; \ |
| 45107 | float16_t __s1_287 = __p1_287; \ |
| 45108 | float16x8_t __s2_287 = __p2_287; \ |
| 45109 | float16_t __ret_287; \ |
| 45110 | __ret_287 = vfmah_laneq_f16(__s0_287, -__s1_287, __s2_287, __p3_287); \ |
| 45111 | __ret_287; \ |
| 43756 | 45112 | }) |
| 43757 | 45113 | #else |
| 43758 | | #define vfmsh_laneq_f16(__p0_196, __p1_196, __p2_196, __p3_196) __extension__ ({ \ |
| 43759 | | float16_t __s0_196 = __p0_196; \ |
| 43760 | | float16_t __s1_196 = __p1_196; \ |
| 43761 | | float16x8_t __s2_196 = __p2_196; \ |
| 43762 | | float16x8_t __rev2_196; __rev2_196 = __builtin_shufflevector(__s2_196, __s2_196, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43763 | | float16_t __ret_196; \ |
| 43764 | | __ret_196 = __noswap_vfmah_laneq_f16(__s0_196, -__s1_196, __rev2_196, __p3_196); \ |
| 43765 | | __ret_196; \ |
| 45114 | #define vfmsh_laneq_f16(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ |
| 45115 | float16_t __s0_288 = __p0_288; \ |
| 45116 | float16_t __s1_288 = __p1_288; \ |
| 45117 | float16x8_t __s2_288 = __p2_288; \ |
| 45118 | float16x8_t __rev2_288; __rev2_288 = __builtin_shufflevector(__s2_288, __s2_288, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45119 | float16_t __ret_288; \ |
| 45120 | __ret_288 = __noswap_vfmah_laneq_f16(__s0_288, -__s1_288, __rev2_288, __p3_288); \ |
| 45121 | __ret_288; \ |
| 43766 | 45122 | }) |
| 43767 | 45123 | #endif |
| 43768 | 45124 | |
| 43769 | 45125 | #ifdef __LITTLE_ENDIAN__ |
| 43770 | | #define vfmsq_laneq_f16(__p0_197, __p1_197, __p2_197, __p3_197) __extension__ ({ \ |
| 43771 | | float16x8_t __s0_197 = __p0_197; \ |
| 43772 | | float16x8_t __s1_197 = __p1_197; \ |
| 43773 | | float16x8_t __s2_197 = __p2_197; \ |
| 43774 | | float16x8_t __ret_197; \ |
| 43775 | | __ret_197 = vfmaq_laneq_f16(__s0_197, -__s1_197, __s2_197, __p3_197); \ |
| 43776 | | __ret_197; \ |
| 45126 | #define vfmsq_laneq_f16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ |
| 45127 | float16x8_t __s0_289 = __p0_289; \ |
| 45128 | float16x8_t __s1_289 = __p1_289; \ |
| 45129 | float16x8_t __s2_289 = __p2_289; \ |
| 45130 | float16x8_t __ret_289; \ |
| 45131 | __ret_289 = vfmaq_laneq_f16(__s0_289, -__s1_289, __s2_289, __p3_289); \ |
| 45132 | __ret_289; \ |
| 43777 | 45133 | }) |
| 43778 | 45134 | #else |
| 43779 | | #define vfmsq_laneq_f16(__p0_198, __p1_198, __p2_198, __p3_198) __extension__ ({ \ |
| 43780 | | float16x8_t __s0_198 = __p0_198; \ |
| 43781 | | float16x8_t __s1_198 = __p1_198; \ |
| 43782 | | float16x8_t __s2_198 = __p2_198; \ |
| 43783 | | float16x8_t __rev0_198; __rev0_198 = __builtin_shufflevector(__s0_198, __s0_198, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43784 | | float16x8_t __rev1_198; __rev1_198 = __builtin_shufflevector(__s1_198, __s1_198, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43785 | | float16x8_t __rev2_198; __rev2_198 = __builtin_shufflevector(__s2_198, __s2_198, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43786 | | float16x8_t __ret_198; \ |
| 43787 | | __ret_198 = __noswap_vfmaq_laneq_f16(__rev0_198, -__rev1_198, __rev2_198, __p3_198); \ |
| 43788 | | __ret_198 = __builtin_shufflevector(__ret_198, __ret_198, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43789 | | __ret_198; \ |
| 45135 | #define vfmsq_laneq_f16(__p0_290, __p1_290, __p2_290, __p3_290) __extension__ ({ \ |
| 45136 | float16x8_t __s0_290 = __p0_290; \ |
| 45137 | float16x8_t __s1_290 = __p1_290; \ |
| 45138 | float16x8_t __s2_290 = __p2_290; \ |
| 45139 | float16x8_t __rev0_290; __rev0_290 = __builtin_shufflevector(__s0_290, __s0_290, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45140 | float16x8_t __rev1_290; __rev1_290 = __builtin_shufflevector(__s1_290, __s1_290, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45141 | float16x8_t __rev2_290; __rev2_290 = __builtin_shufflevector(__s2_290, __s2_290, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45142 | float16x8_t __ret_290; \ |
| 45143 | __ret_290 = __noswap_vfmaq_laneq_f16(__rev0_290, -__rev1_290, __rev2_290, __p3_290); \ |
| 45144 | __ret_290 = __builtin_shufflevector(__ret_290, __ret_290, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45145 | __ret_290; \ |
| 43790 | 45146 | }) |
| 43791 | 45147 | #endif |
| 43792 | 45148 | |
| 43793 | 45149 | #ifdef __LITTLE_ENDIAN__ |
| 43794 | | #define vfms_laneq_f16(__p0_199, __p1_199, __p2_199, __p3_199) __extension__ ({ \ |
| 43795 | | float16x4_t __s0_199 = __p0_199; \ |
| 43796 | | float16x4_t __s1_199 = __p1_199; \ |
| 43797 | | float16x8_t __s2_199 = __p2_199; \ |
| 43798 | | float16x4_t __ret_199; \ |
| 43799 | | __ret_199 = vfma_laneq_f16(__s0_199, -__s1_199, __s2_199, __p3_199); \ |
| 43800 | | __ret_199; \ |
| 45150 | #define vfms_laneq_f16(__p0_291, __p1_291, __p2_291, __p3_291) __extension__ ({ \ |
| 45151 | float16x4_t __s0_291 = __p0_291; \ |
| 45152 | float16x4_t __s1_291 = __p1_291; \ |
| 45153 | float16x8_t __s2_291 = __p2_291; \ |
| 45154 | float16x4_t __ret_291; \ |
| 45155 | __ret_291 = vfma_laneq_f16(__s0_291, -__s1_291, __s2_291, __p3_291); \ |
| 45156 | __ret_291; \ |
| 43801 | 45157 | }) |
| 43802 | 45158 | #else |
| 43803 | | #define vfms_laneq_f16(__p0_200, __p1_200, __p2_200, __p3_200) __extension__ ({ \ |
| 43804 | | float16x4_t __s0_200 = __p0_200; \ |
| 43805 | | float16x4_t __s1_200 = __p1_200; \ |
| 43806 | | float16x8_t __s2_200 = __p2_200; \ |
| 43807 | | float16x4_t __rev0_200; __rev0_200 = __builtin_shufflevector(__s0_200, __s0_200, 3, 2, 1, 0); \ |
| 43808 | | float16x4_t __rev1_200; __rev1_200 = __builtin_shufflevector(__s1_200, __s1_200, 3, 2, 1, 0); \ |
| 43809 | | float16x8_t __rev2_200; __rev2_200 = __builtin_shufflevector(__s2_200, __s2_200, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 43810 | | float16x4_t __ret_200; \ |
| 43811 | | __ret_200 = __noswap_vfma_laneq_f16(__rev0_200, -__rev1_200, __rev2_200, __p3_200); \ |
| 43812 | | __ret_200 = __builtin_shufflevector(__ret_200, __ret_200, 3, 2, 1, 0); \ |
| 43813 | | __ret_200; \ |
| 45159 | #define vfms_laneq_f16(__p0_292, __p1_292, __p2_292, __p3_292) __extension__ ({ \ |
| 45160 | float16x4_t __s0_292 = __p0_292; \ |
| 45161 | float16x4_t __s1_292 = __p1_292; \ |
| 45162 | float16x8_t __s2_292 = __p2_292; \ |
| 45163 | float16x4_t __rev0_292; __rev0_292 = __builtin_shufflevector(__s0_292, __s0_292, 3, 2, 1, 0); \ |
| 45164 | float16x4_t __rev1_292; __rev1_292 = __builtin_shufflevector(__s1_292, __s1_292, 3, 2, 1, 0); \ |
| 45165 | float16x8_t __rev2_292; __rev2_292 = __builtin_shufflevector(__s2_292, __s2_292, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45166 | float16x4_t __ret_292; \ |
| 45167 | __ret_292 = __noswap_vfma_laneq_f16(__rev0_292, -__rev1_292, __rev2_292, __p3_292); \ |
| 45168 | __ret_292 = __builtin_shufflevector(__ret_292, __ret_292, 3, 2, 1, 0); \ |
| 45169 | __ret_292; \ |
| 43814 | 45170 | }) |
| 43815 | 45171 | #endif |
| 43816 | 45172 | |
| ... | ... | @@ -43997,44 +45353,44 @@ __ai float16x4_t vdiv_f16(float16x4_t __p0, float16x4_t __p1) { |
| 43997 | 45353 | #endif |
| 43998 | 45354 | |
| 43999 | 45355 | #ifdef __LITTLE_ENDIAN__ |
| 44000 | | #define vmulq_laneq_f16(__p0_201, __p1_201, __p2_201) __extension__ ({ \ |
| 44001 | | float16x8_t __s0_201 = __p0_201; \ |
| 44002 | | float16x8_t __s1_201 = __p1_201; \ |
| 44003 | | float16x8_t __ret_201; \ |
| 44004 | | __ret_201 = __s0_201 * splatq_laneq_f16(__s1_201, __p2_201); \ |
| 44005 | | __ret_201; \ |
| 45356 | #define vmulq_laneq_f16(__p0_293, __p1_293, __p2_293) __extension__ ({ \ |
| 45357 | float16x8_t __s0_293 = __p0_293; \ |
| 45358 | float16x8_t __s1_293 = __p1_293; \ |
| 45359 | float16x8_t __ret_293; \ |
| 45360 | __ret_293 = __s0_293 * splatq_laneq_f16(__s1_293, __p2_293); \ |
| 45361 | __ret_293; \ |
| 44006 | 45362 | }) |
| 44007 | 45363 | #else |
| 44008 | | #define vmulq_laneq_f16(__p0_202, __p1_202, __p2_202) __extension__ ({ \ |
| 44009 | | float16x8_t __s0_202 = __p0_202; \ |
| 44010 | | float16x8_t __s1_202 = __p1_202; \ |
| 44011 | | float16x8_t __rev0_202; __rev0_202 = __builtin_shufflevector(__s0_202, __s0_202, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44012 | | float16x8_t __rev1_202; __rev1_202 = __builtin_shufflevector(__s1_202, __s1_202, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44013 | | float16x8_t __ret_202; \ |
| 44014 | | __ret_202 = __rev0_202 * __noswap_splatq_laneq_f16(__rev1_202, __p2_202); \ |
| 44015 | | __ret_202 = __builtin_shufflevector(__ret_202, __ret_202, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44016 | | __ret_202; \ |
| 45364 | #define vmulq_laneq_f16(__p0_294, __p1_294, __p2_294) __extension__ ({ \ |
| 45365 | float16x8_t __s0_294 = __p0_294; \ |
| 45366 | float16x8_t __s1_294 = __p1_294; \ |
| 45367 | float16x8_t __rev0_294; __rev0_294 = __builtin_shufflevector(__s0_294, __s0_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45368 | float16x8_t __rev1_294; __rev1_294 = __builtin_shufflevector(__s1_294, __s1_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45369 | float16x8_t __ret_294; \ |
| 45370 | __ret_294 = __rev0_294 * __noswap_splatq_laneq_f16(__rev1_294, __p2_294); \ |
| 45371 | __ret_294 = __builtin_shufflevector(__ret_294, __ret_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45372 | __ret_294; \ |
| 44017 | 45373 | }) |
| 44018 | 45374 | #endif |
| 44019 | 45375 | |
| 44020 | 45376 | #ifdef __LITTLE_ENDIAN__ |
| 44021 | | #define vmul_laneq_f16(__p0_203, __p1_203, __p2_203) __extension__ ({ \ |
| 44022 | | float16x4_t __s0_203 = __p0_203; \ |
| 44023 | | float16x8_t __s1_203 = __p1_203; \ |
| 44024 | | float16x4_t __ret_203; \ |
| 44025 | | __ret_203 = __s0_203 * splat_laneq_f16(__s1_203, __p2_203); \ |
| 44026 | | __ret_203; \ |
| 45377 | #define vmul_laneq_f16(__p0_295, __p1_295, __p2_295) __extension__ ({ \ |
| 45378 | float16x4_t __s0_295 = __p0_295; \ |
| 45379 | float16x8_t __s1_295 = __p1_295; \ |
| 45380 | float16x4_t __ret_295; \ |
| 45381 | __ret_295 = __s0_295 * splat_laneq_f16(__s1_295, __p2_295); \ |
| 45382 | __ret_295; \ |
| 44027 | 45383 | }) |
| 44028 | 45384 | #else |
| 44029 | | #define vmul_laneq_f16(__p0_204, __p1_204, __p2_204) __extension__ ({ \ |
| 44030 | | float16x4_t __s0_204 = __p0_204; \ |
| 44031 | | float16x8_t __s1_204 = __p1_204; \ |
| 44032 | | float16x4_t __rev0_204; __rev0_204 = __builtin_shufflevector(__s0_204, __s0_204, 3, 2, 1, 0); \ |
| 44033 | | float16x8_t __rev1_204; __rev1_204 = __builtin_shufflevector(__s1_204, __s1_204, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44034 | | float16x4_t __ret_204; \ |
| 44035 | | __ret_204 = __rev0_204 * __noswap_splat_laneq_f16(__rev1_204, __p2_204); \ |
| 44036 | | __ret_204 = __builtin_shufflevector(__ret_204, __ret_204, 3, 2, 1, 0); \ |
| 44037 | | __ret_204; \ |
| 45385 | #define vmul_laneq_f16(__p0_296, __p1_296, __p2_296) __extension__ ({ \ |
| 45386 | float16x4_t __s0_296 = __p0_296; \ |
| 45387 | float16x8_t __s1_296 = __p1_296; \ |
| 45388 | float16x4_t __rev0_296; __rev0_296 = __builtin_shufflevector(__s0_296, __s0_296, 3, 2, 1, 0); \ |
| 45389 | float16x8_t __rev1_296; __rev1_296 = __builtin_shufflevector(__s1_296, __s1_296, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45390 | float16x4_t __ret_296; \ |
| 45391 | __ret_296 = __rev0_296 * __noswap_splat_laneq_f16(__rev1_296, __p2_296); \ |
| 45392 | __ret_296 = __builtin_shufflevector(__ret_296, __ret_296, 3, 2, 1, 0); \ |
| 45393 | __ret_296; \ |
| 44038 | 45394 | }) |
| 44039 | 45395 | #endif |
| 44040 | 45396 | |
| ... | ... | @@ -44102,44 +45458,44 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 44102 | 45458 | #endif |
| 44103 | 45459 | |
| 44104 | 45460 | #ifdef __LITTLE_ENDIAN__ |
| 44105 | | #define vmulxq_lane_f16(__p0_205, __p1_205, __p2_205) __extension__ ({ \ |
| 44106 | | float16x8_t __s0_205 = __p0_205; \ |
| 44107 | | float16x4_t __s1_205 = __p1_205; \ |
| 44108 | | float16x8_t __ret_205; \ |
| 44109 | | __ret_205 = vmulxq_f16(__s0_205, splatq_lane_f16(__s1_205, __p2_205)); \ |
| 44110 | | __ret_205; \ |
| 45461 | #define vmulxq_lane_f16(__p0_297, __p1_297, __p2_297) __extension__ ({ \ |
| 45462 | float16x8_t __s0_297 = __p0_297; \ |
| 45463 | float16x4_t __s1_297 = __p1_297; \ |
| 45464 | float16x8_t __ret_297; \ |
| 45465 | __ret_297 = vmulxq_f16(__s0_297, splatq_lane_f16(__s1_297, __p2_297)); \ |
| 45466 | __ret_297; \ |
| 44111 | 45467 | }) |
| 44112 | 45468 | #else |
| 44113 | | #define vmulxq_lane_f16(__p0_206, __p1_206, __p2_206) __extension__ ({ \ |
| 44114 | | float16x8_t __s0_206 = __p0_206; \ |
| 44115 | | float16x4_t __s1_206 = __p1_206; \ |
| 44116 | | float16x8_t __rev0_206; __rev0_206 = __builtin_shufflevector(__s0_206, __s0_206, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44117 | | float16x4_t __rev1_206; __rev1_206 = __builtin_shufflevector(__s1_206, __s1_206, 3, 2, 1, 0); \ |
| 44118 | | float16x8_t __ret_206; \ |
| 44119 | | __ret_206 = __noswap_vmulxq_f16(__rev0_206, __noswap_splatq_lane_f16(__rev1_206, __p2_206)); \ |
| 44120 | | __ret_206 = __builtin_shufflevector(__ret_206, __ret_206, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44121 | | __ret_206; \ |
| 45469 | #define vmulxq_lane_f16(__p0_298, __p1_298, __p2_298) __extension__ ({ \ |
| 45470 | float16x8_t __s0_298 = __p0_298; \ |
| 45471 | float16x4_t __s1_298 = __p1_298; \ |
| 45472 | float16x8_t __rev0_298; __rev0_298 = __builtin_shufflevector(__s0_298, __s0_298, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45473 | float16x4_t __rev1_298; __rev1_298 = __builtin_shufflevector(__s1_298, __s1_298, 3, 2, 1, 0); \ |
| 45474 | float16x8_t __ret_298; \ |
| 45475 | __ret_298 = __noswap_vmulxq_f16(__rev0_298, __noswap_splatq_lane_f16(__rev1_298, __p2_298)); \ |
| 45476 | __ret_298 = __builtin_shufflevector(__ret_298, __ret_298, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45477 | __ret_298; \ |
| 44122 | 45478 | }) |
| 44123 | 45479 | #endif |
| 44124 | 45480 | |
| 44125 | 45481 | #ifdef __LITTLE_ENDIAN__ |
| 44126 | | #define vmulx_lane_f16(__p0_207, __p1_207, __p2_207) __extension__ ({ \ |
| 44127 | | float16x4_t __s0_207 = __p0_207; \ |
| 44128 | | float16x4_t __s1_207 = __p1_207; \ |
| 44129 | | float16x4_t __ret_207; \ |
| 44130 | | __ret_207 = vmulx_f16(__s0_207, splat_lane_f16(__s1_207, __p2_207)); \ |
| 44131 | | __ret_207; \ |
| 45482 | #define vmulx_lane_f16(__p0_299, __p1_299, __p2_299) __extension__ ({ \ |
| 45483 | float16x4_t __s0_299 = __p0_299; \ |
| 45484 | float16x4_t __s1_299 = __p1_299; \ |
| 45485 | float16x4_t __ret_299; \ |
| 45486 | __ret_299 = vmulx_f16(__s0_299, splat_lane_f16(__s1_299, __p2_299)); \ |
| 45487 | __ret_299; \ |
| 44132 | 45488 | }) |
| 44133 | 45489 | #else |
| 44134 | | #define vmulx_lane_f16(__p0_208, __p1_208, __p2_208) __extension__ ({ \ |
| 44135 | | float16x4_t __s0_208 = __p0_208; \ |
| 44136 | | float16x4_t __s1_208 = __p1_208; \ |
| 44137 | | float16x4_t __rev0_208; __rev0_208 = __builtin_shufflevector(__s0_208, __s0_208, 3, 2, 1, 0); \ |
| 44138 | | float16x4_t __rev1_208; __rev1_208 = __builtin_shufflevector(__s1_208, __s1_208, 3, 2, 1, 0); \ |
| 44139 | | float16x4_t __ret_208; \ |
| 44140 | | __ret_208 = __noswap_vmulx_f16(__rev0_208, __noswap_splat_lane_f16(__rev1_208, __p2_208)); \ |
| 44141 | | __ret_208 = __builtin_shufflevector(__ret_208, __ret_208, 3, 2, 1, 0); \ |
| 44142 | | __ret_208; \ |
| 45490 | #define vmulx_lane_f16(__p0_300, __p1_300, __p2_300) __extension__ ({ \ |
| 45491 | float16x4_t __s0_300 = __p0_300; \ |
| 45492 | float16x4_t __s1_300 = __p1_300; \ |
| 45493 | float16x4_t __rev0_300; __rev0_300 = __builtin_shufflevector(__s0_300, __s0_300, 3, 2, 1, 0); \ |
| 45494 | float16x4_t __rev1_300; __rev1_300 = __builtin_shufflevector(__s1_300, __s1_300, 3, 2, 1, 0); \ |
| 45495 | float16x4_t __ret_300; \ |
| 45496 | __ret_300 = __noswap_vmulx_f16(__rev0_300, __noswap_splat_lane_f16(__rev1_300, __p2_300)); \ |
| 45497 | __ret_300 = __builtin_shufflevector(__ret_300, __ret_300, 3, 2, 1, 0); \ |
| 45498 | __ret_300; \ |
| 44143 | 45499 | }) |
| 44144 | 45500 | #endif |
| 44145 | 45501 | |
| ... | ... | @@ -44163,44 +45519,44 @@ __ai float16x4_t __noswap_vmulx_f16(float16x4_t __p0, float16x4_t __p1) { |
| 44163 | 45519 | #endif |
| 44164 | 45520 | |
| 44165 | 45521 | #ifdef __LITTLE_ENDIAN__ |
| 44166 | | #define vmulxq_laneq_f16(__p0_209, __p1_209, __p2_209) __extension__ ({ \ |
| 44167 | | float16x8_t __s0_209 = __p0_209; \ |
| 44168 | | float16x8_t __s1_209 = __p1_209; \ |
| 44169 | | float16x8_t __ret_209; \ |
| 44170 | | __ret_209 = vmulxq_f16(__s0_209, splatq_laneq_f16(__s1_209, __p2_209)); \ |
| 44171 | | __ret_209; \ |
| 45522 | #define vmulxq_laneq_f16(__p0_301, __p1_301, __p2_301) __extension__ ({ \ |
| 45523 | float16x8_t __s0_301 = __p0_301; \ |
| 45524 | float16x8_t __s1_301 = __p1_301; \ |
| 45525 | float16x8_t __ret_301; \ |
| 45526 | __ret_301 = vmulxq_f16(__s0_301, splatq_laneq_f16(__s1_301, __p2_301)); \ |
| 45527 | __ret_301; \ |
| 44172 | 45528 | }) |
| 44173 | 45529 | #else |
| 44174 | | #define vmulxq_laneq_f16(__p0_210, __p1_210, __p2_210) __extension__ ({ \ |
| 44175 | | float16x8_t __s0_210 = __p0_210; \ |
| 44176 | | float16x8_t __s1_210 = __p1_210; \ |
| 44177 | | float16x8_t __rev0_210; __rev0_210 = __builtin_shufflevector(__s0_210, __s0_210, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44178 | | float16x8_t __rev1_210; __rev1_210 = __builtin_shufflevector(__s1_210, __s1_210, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44179 | | float16x8_t __ret_210; \ |
| 44180 | | __ret_210 = __noswap_vmulxq_f16(__rev0_210, __noswap_splatq_laneq_f16(__rev1_210, __p2_210)); \ |
| 44181 | | __ret_210 = __builtin_shufflevector(__ret_210, __ret_210, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44182 | | __ret_210; \ |
| 45530 | #define vmulxq_laneq_f16(__p0_302, __p1_302, __p2_302) __extension__ ({ \ |
| 45531 | float16x8_t __s0_302 = __p0_302; \ |
| 45532 | float16x8_t __s1_302 = __p1_302; \ |
| 45533 | float16x8_t __rev0_302; __rev0_302 = __builtin_shufflevector(__s0_302, __s0_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45534 | float16x8_t __rev1_302; __rev1_302 = __builtin_shufflevector(__s1_302, __s1_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45535 | float16x8_t __ret_302; \ |
| 45536 | __ret_302 = __noswap_vmulxq_f16(__rev0_302, __noswap_splatq_laneq_f16(__rev1_302, __p2_302)); \ |
| 45537 | __ret_302 = __builtin_shufflevector(__ret_302, __ret_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45538 | __ret_302; \ |
| 44183 | 45539 | }) |
| 44184 | 45540 | #endif |
| 44185 | 45541 | |
| 44186 | 45542 | #ifdef __LITTLE_ENDIAN__ |
| 44187 | | #define vmulx_laneq_f16(__p0_211, __p1_211, __p2_211) __extension__ ({ \ |
| 44188 | | float16x4_t __s0_211 = __p0_211; \ |
| 44189 | | float16x8_t __s1_211 = __p1_211; \ |
| 44190 | | float16x4_t __ret_211; \ |
| 44191 | | __ret_211 = vmulx_f16(__s0_211, splat_laneq_f16(__s1_211, __p2_211)); \ |
| 44192 | | __ret_211; \ |
| 45543 | #define vmulx_laneq_f16(__p0_303, __p1_303, __p2_303) __extension__ ({ \ |
| 45544 | float16x4_t __s0_303 = __p0_303; \ |
| 45545 | float16x8_t __s1_303 = __p1_303; \ |
| 45546 | float16x4_t __ret_303; \ |
| 45547 | __ret_303 = vmulx_f16(__s0_303, splat_laneq_f16(__s1_303, __p2_303)); \ |
| 45548 | __ret_303; \ |
| 44193 | 45549 | }) |
| 44194 | 45550 | #else |
| 44195 | | #define vmulx_laneq_f16(__p0_212, __p1_212, __p2_212) __extension__ ({ \ |
| 44196 | | float16x4_t __s0_212 = __p0_212; \ |
| 44197 | | float16x8_t __s1_212 = __p1_212; \ |
| 44198 | | float16x4_t __rev0_212; __rev0_212 = __builtin_shufflevector(__s0_212, __s0_212, 3, 2, 1, 0); \ |
| 44199 | | float16x8_t __rev1_212; __rev1_212 = __builtin_shufflevector(__s1_212, __s1_212, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44200 | | float16x4_t __ret_212; \ |
| 44201 | | __ret_212 = __noswap_vmulx_f16(__rev0_212, __noswap_splat_laneq_f16(__rev1_212, __p2_212)); \ |
| 44202 | | __ret_212 = __builtin_shufflevector(__ret_212, __ret_212, 3, 2, 1, 0); \ |
| 44203 | | __ret_212; \ |
| 45551 | #define vmulx_laneq_f16(__p0_304, __p1_304, __p2_304) __extension__ ({ \ |
| 45552 | float16x4_t __s0_304 = __p0_304; \ |
| 45553 | float16x8_t __s1_304 = __p1_304; \ |
| 45554 | float16x4_t __rev0_304; __rev0_304 = __builtin_shufflevector(__s0_304, __s0_304, 3, 2, 1, 0); \ |
| 45555 | float16x8_t __rev1_304; __rev1_304 = __builtin_shufflevector(__s1_304, __s1_304, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45556 | float16x4_t __ret_304; \ |
| 45557 | __ret_304 = __noswap_vmulx_f16(__rev0_304, __noswap_splat_laneq_f16(__rev1_304, __p2_304)); \ |
| 45558 | __ret_304 = __builtin_shufflevector(__ret_304, __ret_304, 3, 2, 1, 0); \ |
| 45559 | __ret_304; \ |
| 44204 | 45560 | }) |
| 44205 | 45561 | #endif |
| 44206 | 45562 | |
| ... | ... | @@ -44716,54 +46072,54 @@ __ai int32x2_t __noswap_vusdot_s32(int32x2_t __p0, uint8x8_t __p1, int8x8_t __p2 |
| 44716 | 46072 | #endif |
| 44717 | 46073 | |
| 44718 | 46074 | #ifdef __LITTLE_ENDIAN__ |
| 44719 | | #define vusdotq_lane_s32(__p0_213, __p1_213, __p2_213, __p3_213) __extension__ ({ \ |
| 44720 | | int32x4_t __s0_213 = __p0_213; \ |
| 44721 | | uint8x16_t __s1_213 = __p1_213; \ |
| 44722 | | int8x8_t __s2_213 = __p2_213; \ |
| 44723 | | int32x4_t __ret_213; \ |
| 44724 | | int8x8_t __reint_213 = __s2_213; \ |
| 44725 | | __ret_213 = vusdotq_s32(__s0_213, __s1_213, (int8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_213, __p3_213))); \ |
| 44726 | | __ret_213; \ |
| 46075 | #define vusdotq_lane_s32(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ |
| 46076 | int32x4_t __s0_305 = __p0_305; \ |
| 46077 | uint8x16_t __s1_305 = __p1_305; \ |
| 46078 | int8x8_t __s2_305 = __p2_305; \ |
| 46079 | int32x4_t __ret_305; \ |
| 46080 | int8x8_t __reint_305 = __s2_305; \ |
| 46081 | __ret_305 = vusdotq_s32(__s0_305, __s1_305, (int8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_305, __p3_305))); \ |
| 46082 | __ret_305; \ |
| 44727 | 46083 | }) |
| 44728 | 46084 | #else |
| 44729 | | #define vusdotq_lane_s32(__p0_214, __p1_214, __p2_214, __p3_214) __extension__ ({ \ |
| 44730 | | int32x4_t __s0_214 = __p0_214; \ |
| 44731 | | uint8x16_t __s1_214 = __p1_214; \ |
| 44732 | | int8x8_t __s2_214 = __p2_214; \ |
| 44733 | | int32x4_t __rev0_214; __rev0_214 = __builtin_shufflevector(__s0_214, __s0_214, 3, 2, 1, 0); \ |
| 44734 | | uint8x16_t __rev1_214; __rev1_214 = __builtin_shufflevector(__s1_214, __s1_214, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44735 | | int8x8_t __rev2_214; __rev2_214 = __builtin_shufflevector(__s2_214, __s2_214, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44736 | | int32x4_t __ret_214; \ |
| 44737 | | int8x8_t __reint_214 = __rev2_214; \ |
| 44738 | | __ret_214 = __noswap_vusdotq_s32(__rev0_214, __rev1_214, (int8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_214, __p3_214))); \ |
| 44739 | | __ret_214 = __builtin_shufflevector(__ret_214, __ret_214, 3, 2, 1, 0); \ |
| 44740 | | __ret_214; \ |
| 46085 | #define vusdotq_lane_s32(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ |
| 46086 | int32x4_t __s0_306 = __p0_306; \ |
| 46087 | uint8x16_t __s1_306 = __p1_306; \ |
| 46088 | int8x8_t __s2_306 = __p2_306; \ |
| 46089 | int32x4_t __rev0_306; __rev0_306 = __builtin_shufflevector(__s0_306, __s0_306, 3, 2, 1, 0); \ |
| 46090 | uint8x16_t __rev1_306; __rev1_306 = __builtin_shufflevector(__s1_306, __s1_306, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46091 | int8x8_t __rev2_306; __rev2_306 = __builtin_shufflevector(__s2_306, __s2_306, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46092 | int32x4_t __ret_306; \ |
| 46093 | int8x8_t __reint_306 = __rev2_306; \ |
| 46094 | __ret_306 = __noswap_vusdotq_s32(__rev0_306, __rev1_306, (int8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_306, __p3_306))); \ |
| 46095 | __ret_306 = __builtin_shufflevector(__ret_306, __ret_306, 3, 2, 1, 0); \ |
| 46096 | __ret_306; \ |
| 44741 | 46097 | }) |
| 44742 | 46098 | #endif |
| 44743 | 46099 | |
| 44744 | 46100 | #ifdef __LITTLE_ENDIAN__ |
| 44745 | | #define vusdot_lane_s32(__p0_215, __p1_215, __p2_215, __p3_215) __extension__ ({ \ |
| 44746 | | int32x2_t __s0_215 = __p0_215; \ |
| 44747 | | uint8x8_t __s1_215 = __p1_215; \ |
| 44748 | | int8x8_t __s2_215 = __p2_215; \ |
| 44749 | | int32x2_t __ret_215; \ |
| 44750 | | int8x8_t __reint_215 = __s2_215; \ |
| 44751 | | __ret_215 = vusdot_s32(__s0_215, __s1_215, (int8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_215, __p3_215))); \ |
| 44752 | | __ret_215; \ |
| 46101 | #define vusdot_lane_s32(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ |
| 46102 | int32x2_t __s0_307 = __p0_307; \ |
| 46103 | uint8x8_t __s1_307 = __p1_307; \ |
| 46104 | int8x8_t __s2_307 = __p2_307; \ |
| 46105 | int32x2_t __ret_307; \ |
| 46106 | int8x8_t __reint_307 = __s2_307; \ |
| 46107 | __ret_307 = vusdot_s32(__s0_307, __s1_307, (int8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_307, __p3_307))); \ |
| 46108 | __ret_307; \ |
| 44753 | 46109 | }) |
| 44754 | 46110 | #else |
| 44755 | | #define vusdot_lane_s32(__p0_216, __p1_216, __p2_216, __p3_216) __extension__ ({ \ |
| 44756 | | int32x2_t __s0_216 = __p0_216; \ |
| 44757 | | uint8x8_t __s1_216 = __p1_216; \ |
| 44758 | | int8x8_t __s2_216 = __p2_216; \ |
| 44759 | | int32x2_t __rev0_216; __rev0_216 = __builtin_shufflevector(__s0_216, __s0_216, 1, 0); \ |
| 44760 | | uint8x8_t __rev1_216; __rev1_216 = __builtin_shufflevector(__s1_216, __s1_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44761 | | int8x8_t __rev2_216; __rev2_216 = __builtin_shufflevector(__s2_216, __s2_216, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44762 | | int32x2_t __ret_216; \ |
| 44763 | | int8x8_t __reint_216 = __rev2_216; \ |
| 44764 | | __ret_216 = __noswap_vusdot_s32(__rev0_216, __rev1_216, (int8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_216, __p3_216))); \ |
| 44765 | | __ret_216 = __builtin_shufflevector(__ret_216, __ret_216, 1, 0); \ |
| 44766 | | __ret_216; \ |
| 46111 | #define vusdot_lane_s32(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ |
| 46112 | int32x2_t __s0_308 = __p0_308; \ |
| 46113 | uint8x8_t __s1_308 = __p1_308; \ |
| 46114 | int8x8_t __s2_308 = __p2_308; \ |
| 46115 | int32x2_t __rev0_308; __rev0_308 = __builtin_shufflevector(__s0_308, __s0_308, 1, 0); \ |
| 46116 | uint8x8_t __rev1_308; __rev1_308 = __builtin_shufflevector(__s1_308, __s1_308, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46117 | int8x8_t __rev2_308; __rev2_308 = __builtin_shufflevector(__s2_308, __s2_308, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46118 | int32x2_t __ret_308; \ |
| 46119 | int8x8_t __reint_308 = __rev2_308; \ |
| 46120 | __ret_308 = __noswap_vusdot_s32(__rev0_308, __rev1_308, (int8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_308, __p3_308))); \ |
| 46121 | __ret_308 = __builtin_shufflevector(__ret_308, __ret_308, 1, 0); \ |
| 46122 | __ret_308; \ |
| 44767 | 46123 | }) |
| 44768 | 46124 | #endif |
| 44769 | 46125 | |
| ... | ... | @@ -44860,98 +46216,98 @@ __ai int16x4_t vqrdmlah_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 44860 | 46216 | #endif |
| 44861 | 46217 | |
| 44862 | 46218 | #ifdef __LITTLE_ENDIAN__ |
| 44863 | | #define vqrdmlahq_lane_s32(__p0_217, __p1_217, __p2_217, __p3_217) __extension__ ({ \ |
| 44864 | | int32x4_t __s0_217 = __p0_217; \ |
| 44865 | | int32x4_t __s1_217 = __p1_217; \ |
| 44866 | | int32x2_t __s2_217 = __p2_217; \ |
| 44867 | | int32x4_t __ret_217; \ |
| 44868 | | __ret_217 = vqaddq_s32(__s0_217, vqrdmulhq_s32(__s1_217, splatq_lane_s32(__s2_217, __p3_217))); \ |
| 44869 | | __ret_217; \ |
| 46219 | #define vqrdmlahq_lane_s32(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ |
| 46220 | int32x4_t __s0_309 = __p0_309; \ |
| 46221 | int32x4_t __s1_309 = __p1_309; \ |
| 46222 | int32x2_t __s2_309 = __p2_309; \ |
| 46223 | int32x4_t __ret_309; \ |
| 46224 | __ret_309 = vqaddq_s32(__s0_309, vqrdmulhq_s32(__s1_309, splatq_lane_s32(__s2_309, __p3_309))); \ |
| 46225 | __ret_309; \ |
| 44870 | 46226 | }) |
| 44871 | 46227 | #else |
| 44872 | | #define vqrdmlahq_lane_s32(__p0_218, __p1_218, __p2_218, __p3_218) __extension__ ({ \ |
| 44873 | | int32x4_t __s0_218 = __p0_218; \ |
| 44874 | | int32x4_t __s1_218 = __p1_218; \ |
| 44875 | | int32x2_t __s2_218 = __p2_218; \ |
| 44876 | | int32x4_t __rev0_218; __rev0_218 = __builtin_shufflevector(__s0_218, __s0_218, 3, 2, 1, 0); \ |
| 44877 | | int32x4_t __rev1_218; __rev1_218 = __builtin_shufflevector(__s1_218, __s1_218, 3, 2, 1, 0); \ |
| 44878 | | int32x2_t __rev2_218; __rev2_218 = __builtin_shufflevector(__s2_218, __s2_218, 1, 0); \ |
| 44879 | | int32x4_t __ret_218; \ |
| 44880 | | __ret_218 = __noswap_vqaddq_s32(__rev0_218, __noswap_vqrdmulhq_s32(__rev1_218, __noswap_splatq_lane_s32(__rev2_218, __p3_218))); \ |
| 44881 | | __ret_218 = __builtin_shufflevector(__ret_218, __ret_218, 3, 2, 1, 0); \ |
| 44882 | | __ret_218; \ |
| 46228 | #define vqrdmlahq_lane_s32(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ |
| 46229 | int32x4_t __s0_310 = __p0_310; \ |
| 46230 | int32x4_t __s1_310 = __p1_310; \ |
| 46231 | int32x2_t __s2_310 = __p2_310; \ |
| 46232 | int32x4_t __rev0_310; __rev0_310 = __builtin_shufflevector(__s0_310, __s0_310, 3, 2, 1, 0); \ |
| 46233 | int32x4_t __rev1_310; __rev1_310 = __builtin_shufflevector(__s1_310, __s1_310, 3, 2, 1, 0); \ |
| 46234 | int32x2_t __rev2_310; __rev2_310 = __builtin_shufflevector(__s2_310, __s2_310, 1, 0); \ |
| 46235 | int32x4_t __ret_310; \ |
| 46236 | __ret_310 = __noswap_vqaddq_s32(__rev0_310, __noswap_vqrdmulhq_s32(__rev1_310, __noswap_splatq_lane_s32(__rev2_310, __p3_310))); \ |
| 46237 | __ret_310 = __builtin_shufflevector(__ret_310, __ret_310, 3, 2, 1, 0); \ |
| 46238 | __ret_310; \ |
| 44883 | 46239 | }) |
| 44884 | 46240 | #endif |
| 44885 | 46241 | |
| 44886 | 46242 | #ifdef __LITTLE_ENDIAN__ |
| 44887 | | #define vqrdmlahq_lane_s16(__p0_219, __p1_219, __p2_219, __p3_219) __extension__ ({ \ |
| 44888 | | int16x8_t __s0_219 = __p0_219; \ |
| 44889 | | int16x8_t __s1_219 = __p1_219; \ |
| 44890 | | int16x4_t __s2_219 = __p2_219; \ |
| 44891 | | int16x8_t __ret_219; \ |
| 44892 | | __ret_219 = vqaddq_s16(__s0_219, vqrdmulhq_s16(__s1_219, splatq_lane_s16(__s2_219, __p3_219))); \ |
| 44893 | | __ret_219; \ |
| 46243 | #define vqrdmlahq_lane_s16(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ |
| 46244 | int16x8_t __s0_311 = __p0_311; \ |
| 46245 | int16x8_t __s1_311 = __p1_311; \ |
| 46246 | int16x4_t __s2_311 = __p2_311; \ |
| 46247 | int16x8_t __ret_311; \ |
| 46248 | __ret_311 = vqaddq_s16(__s0_311, vqrdmulhq_s16(__s1_311, splatq_lane_s16(__s2_311, __p3_311))); \ |
| 46249 | __ret_311; \ |
| 44894 | 46250 | }) |
| 44895 | 46251 | #else |
| 44896 | | #define vqrdmlahq_lane_s16(__p0_220, __p1_220, __p2_220, __p3_220) __extension__ ({ \ |
| 44897 | | int16x8_t __s0_220 = __p0_220; \ |
| 44898 | | int16x8_t __s1_220 = __p1_220; \ |
| 44899 | | int16x4_t __s2_220 = __p2_220; \ |
| 44900 | | int16x8_t __rev0_220; __rev0_220 = __builtin_shufflevector(__s0_220, __s0_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44901 | | int16x8_t __rev1_220; __rev1_220 = __builtin_shufflevector(__s1_220, __s1_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44902 | | int16x4_t __rev2_220; __rev2_220 = __builtin_shufflevector(__s2_220, __s2_220, 3, 2, 1, 0); \ |
| 44903 | | int16x8_t __ret_220; \ |
| 44904 | | __ret_220 = __noswap_vqaddq_s16(__rev0_220, __noswap_vqrdmulhq_s16(__rev1_220, __noswap_splatq_lane_s16(__rev2_220, __p3_220))); \ |
| 44905 | | __ret_220 = __builtin_shufflevector(__ret_220, __ret_220, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 44906 | | __ret_220; \ |
| 46252 | #define vqrdmlahq_lane_s16(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ |
| 46253 | int16x8_t __s0_312 = __p0_312; \ |
| 46254 | int16x8_t __s1_312 = __p1_312; \ |
| 46255 | int16x4_t __s2_312 = __p2_312; \ |
| 46256 | int16x8_t __rev0_312; __rev0_312 = __builtin_shufflevector(__s0_312, __s0_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46257 | int16x8_t __rev1_312; __rev1_312 = __builtin_shufflevector(__s1_312, __s1_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46258 | int16x4_t __rev2_312; __rev2_312 = __builtin_shufflevector(__s2_312, __s2_312, 3, 2, 1, 0); \ |
| 46259 | int16x8_t __ret_312; \ |
| 46260 | __ret_312 = __noswap_vqaddq_s16(__rev0_312, __noswap_vqrdmulhq_s16(__rev1_312, __noswap_splatq_lane_s16(__rev2_312, __p3_312))); \ |
| 46261 | __ret_312 = __builtin_shufflevector(__ret_312, __ret_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46262 | __ret_312; \ |
| 44907 | 46263 | }) |
| 44908 | 46264 | #endif |
| 44909 | 46265 | |
| 44910 | 46266 | #ifdef __LITTLE_ENDIAN__ |
| 44911 | | #define vqrdmlah_lane_s32(__p0_221, __p1_221, __p2_221, __p3_221) __extension__ ({ \ |
| 44912 | | int32x2_t __s0_221 = __p0_221; \ |
| 44913 | | int32x2_t __s1_221 = __p1_221; \ |
| 44914 | | int32x2_t __s2_221 = __p2_221; \ |
| 44915 | | int32x2_t __ret_221; \ |
| 44916 | | __ret_221 = vqadd_s32(__s0_221, vqrdmulh_s32(__s1_221, splat_lane_s32(__s2_221, __p3_221))); \ |
| 44917 | | __ret_221; \ |
| 46267 | #define vqrdmlah_lane_s32(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ |
| 46268 | int32x2_t __s0_313 = __p0_313; \ |
| 46269 | int32x2_t __s1_313 = __p1_313; \ |
| 46270 | int32x2_t __s2_313 = __p2_313; \ |
| 46271 | int32x2_t __ret_313; \ |
| 46272 | __ret_313 = vqadd_s32(__s0_313, vqrdmulh_s32(__s1_313, splat_lane_s32(__s2_313, __p3_313))); \ |
| 46273 | __ret_313; \ |
| 44918 | 46274 | }) |
| 44919 | 46275 | #else |
| 44920 | | #define vqrdmlah_lane_s32(__p0_222, __p1_222, __p2_222, __p3_222) __extension__ ({ \ |
| 44921 | | int32x2_t __s0_222 = __p0_222; \ |
| 44922 | | int32x2_t __s1_222 = __p1_222; \ |
| 44923 | | int32x2_t __s2_222 = __p2_222; \ |
| 44924 | | int32x2_t __rev0_222; __rev0_222 = __builtin_shufflevector(__s0_222, __s0_222, 1, 0); \ |
| 44925 | | int32x2_t __rev1_222; __rev1_222 = __builtin_shufflevector(__s1_222, __s1_222, 1, 0); \ |
| 44926 | | int32x2_t __rev2_222; __rev2_222 = __builtin_shufflevector(__s2_222, __s2_222, 1, 0); \ |
| 44927 | | int32x2_t __ret_222; \ |
| 44928 | | __ret_222 = __noswap_vqadd_s32(__rev0_222, __noswap_vqrdmulh_s32(__rev1_222, __noswap_splat_lane_s32(__rev2_222, __p3_222))); \ |
| 44929 | | __ret_222 = __builtin_shufflevector(__ret_222, __ret_222, 1, 0); \ |
| 44930 | | __ret_222; \ |
| 46276 | #define vqrdmlah_lane_s32(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ |
| 46277 | int32x2_t __s0_314 = __p0_314; \ |
| 46278 | int32x2_t __s1_314 = __p1_314; \ |
| 46279 | int32x2_t __s2_314 = __p2_314; \ |
| 46280 | int32x2_t __rev0_314; __rev0_314 = __builtin_shufflevector(__s0_314, __s0_314, 1, 0); \ |
| 46281 | int32x2_t __rev1_314; __rev1_314 = __builtin_shufflevector(__s1_314, __s1_314, 1, 0); \ |
| 46282 | int32x2_t __rev2_314; __rev2_314 = __builtin_shufflevector(__s2_314, __s2_314, 1, 0); \ |
| 46283 | int32x2_t __ret_314; \ |
| 46284 | __ret_314 = __noswap_vqadd_s32(__rev0_314, __noswap_vqrdmulh_s32(__rev1_314, __noswap_splat_lane_s32(__rev2_314, __p3_314))); \ |
| 46285 | __ret_314 = __builtin_shufflevector(__ret_314, __ret_314, 1, 0); \ |
| 46286 | __ret_314; \ |
| 44931 | 46287 | }) |
| 44932 | 46288 | #endif |
| 44933 | 46289 | |
| 44934 | 46290 | #ifdef __LITTLE_ENDIAN__ |
| 44935 | | #define vqrdmlah_lane_s16(__p0_223, __p1_223, __p2_223, __p3_223) __extension__ ({ \ |
| 44936 | | int16x4_t __s0_223 = __p0_223; \ |
| 44937 | | int16x4_t __s1_223 = __p1_223; \ |
| 44938 | | int16x4_t __s2_223 = __p2_223; \ |
| 44939 | | int16x4_t __ret_223; \ |
| 44940 | | __ret_223 = vqadd_s16(__s0_223, vqrdmulh_s16(__s1_223, splat_lane_s16(__s2_223, __p3_223))); \ |
| 44941 | | __ret_223; \ |
| 46291 | #define vqrdmlah_lane_s16(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ |
| 46292 | int16x4_t __s0_315 = __p0_315; \ |
| 46293 | int16x4_t __s1_315 = __p1_315; \ |
| 46294 | int16x4_t __s2_315 = __p2_315; \ |
| 46295 | int16x4_t __ret_315; \ |
| 46296 | __ret_315 = vqadd_s16(__s0_315, vqrdmulh_s16(__s1_315, splat_lane_s16(__s2_315, __p3_315))); \ |
| 46297 | __ret_315; \ |
| 44942 | 46298 | }) |
| 44943 | 46299 | #else |
| 44944 | | #define vqrdmlah_lane_s16(__p0_224, __p1_224, __p2_224, __p3_224) __extension__ ({ \ |
| 44945 | | int16x4_t __s0_224 = __p0_224; \ |
| 44946 | | int16x4_t __s1_224 = __p1_224; \ |
| 44947 | | int16x4_t __s2_224 = __p2_224; \ |
| 44948 | | int16x4_t __rev0_224; __rev0_224 = __builtin_shufflevector(__s0_224, __s0_224, 3, 2, 1, 0); \ |
| 44949 | | int16x4_t __rev1_224; __rev1_224 = __builtin_shufflevector(__s1_224, __s1_224, 3, 2, 1, 0); \ |
| 44950 | | int16x4_t __rev2_224; __rev2_224 = __builtin_shufflevector(__s2_224, __s2_224, 3, 2, 1, 0); \ |
| 44951 | | int16x4_t __ret_224; \ |
| 44952 | | __ret_224 = __noswap_vqadd_s16(__rev0_224, __noswap_vqrdmulh_s16(__rev1_224, __noswap_splat_lane_s16(__rev2_224, __p3_224))); \ |
| 44953 | | __ret_224 = __builtin_shufflevector(__ret_224, __ret_224, 3, 2, 1, 0); \ |
| 44954 | | __ret_224; \ |
| 46300 | #define vqrdmlah_lane_s16(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ |
| 46301 | int16x4_t __s0_316 = __p0_316; \ |
| 46302 | int16x4_t __s1_316 = __p1_316; \ |
| 46303 | int16x4_t __s2_316 = __p2_316; \ |
| 46304 | int16x4_t __rev0_316; __rev0_316 = __builtin_shufflevector(__s0_316, __s0_316, 3, 2, 1, 0); \ |
| 46305 | int16x4_t __rev1_316; __rev1_316 = __builtin_shufflevector(__s1_316, __s1_316, 3, 2, 1, 0); \ |
| 46306 | int16x4_t __rev2_316; __rev2_316 = __builtin_shufflevector(__s2_316, __s2_316, 3, 2, 1, 0); \ |
| 46307 | int16x4_t __ret_316; \ |
| 46308 | __ret_316 = __noswap_vqadd_s16(__rev0_316, __noswap_vqrdmulh_s16(__rev1_316, __noswap_splat_lane_s16(__rev2_316, __p3_316))); \ |
| 46309 | __ret_316 = __builtin_shufflevector(__ret_316, __ret_316, 3, 2, 1, 0); \ |
| 46310 | __ret_316; \ |
| 44955 | 46311 | }) |
| 44956 | 46312 | #endif |
| 44957 | 46313 | |
| ... | ... | @@ -45028,292 +46384,292 @@ __ai int16x4_t vqrdmlsh_s16(int16x4_t __p0, int16x4_t __p1, int16x4_t __p2) { |
| 45028 | 46384 | #endif |
| 45029 | 46385 | |
| 45030 | 46386 | #ifdef __LITTLE_ENDIAN__ |
| 45031 | | #define vqrdmlshq_lane_s32(__p0_225, __p1_225, __p2_225, __p3_225) __extension__ ({ \ |
| 45032 | | int32x4_t __s0_225 = __p0_225; \ |
| 45033 | | int32x4_t __s1_225 = __p1_225; \ |
| 45034 | | int32x2_t __s2_225 = __p2_225; \ |
| 45035 | | int32x4_t __ret_225; \ |
| 45036 | | __ret_225 = vqsubq_s32(__s0_225, vqrdmulhq_s32(__s1_225, splatq_lane_s32(__s2_225, __p3_225))); \ |
| 45037 | | __ret_225; \ |
| 46387 | #define vqrdmlshq_lane_s32(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ |
| 46388 | int32x4_t __s0_317 = __p0_317; \ |
| 46389 | int32x4_t __s1_317 = __p1_317; \ |
| 46390 | int32x2_t __s2_317 = __p2_317; \ |
| 46391 | int32x4_t __ret_317; \ |
| 46392 | __ret_317 = vqsubq_s32(__s0_317, vqrdmulhq_s32(__s1_317, splatq_lane_s32(__s2_317, __p3_317))); \ |
| 46393 | __ret_317; \ |
| 45038 | 46394 | }) |
| 45039 | 46395 | #else |
| 45040 | | #define vqrdmlshq_lane_s32(__p0_226, __p1_226, __p2_226, __p3_226) __extension__ ({ \ |
| 45041 | | int32x4_t __s0_226 = __p0_226; \ |
| 45042 | | int32x4_t __s1_226 = __p1_226; \ |
| 45043 | | int32x2_t __s2_226 = __p2_226; \ |
| 45044 | | int32x4_t __rev0_226; __rev0_226 = __builtin_shufflevector(__s0_226, __s0_226, 3, 2, 1, 0); \ |
| 45045 | | int32x4_t __rev1_226; __rev1_226 = __builtin_shufflevector(__s1_226, __s1_226, 3, 2, 1, 0); \ |
| 45046 | | int32x2_t __rev2_226; __rev2_226 = __builtin_shufflevector(__s2_226, __s2_226, 1, 0); \ |
| 45047 | | int32x4_t __ret_226; \ |
| 45048 | | __ret_226 = __noswap_vqsubq_s32(__rev0_226, __noswap_vqrdmulhq_s32(__rev1_226, __noswap_splatq_lane_s32(__rev2_226, __p3_226))); \ |
| 45049 | | __ret_226 = __builtin_shufflevector(__ret_226, __ret_226, 3, 2, 1, 0); \ |
| 45050 | | __ret_226; \ |
| 46396 | #define vqrdmlshq_lane_s32(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ |
| 46397 | int32x4_t __s0_318 = __p0_318; \ |
| 46398 | int32x4_t __s1_318 = __p1_318; \ |
| 46399 | int32x2_t __s2_318 = __p2_318; \ |
| 46400 | int32x4_t __rev0_318; __rev0_318 = __builtin_shufflevector(__s0_318, __s0_318, 3, 2, 1, 0); \ |
| 46401 | int32x4_t __rev1_318; __rev1_318 = __builtin_shufflevector(__s1_318, __s1_318, 3, 2, 1, 0); \ |
| 46402 | int32x2_t __rev2_318; __rev2_318 = __builtin_shufflevector(__s2_318, __s2_318, 1, 0); \ |
| 46403 | int32x4_t __ret_318; \ |
| 46404 | __ret_318 = __noswap_vqsubq_s32(__rev0_318, __noswap_vqrdmulhq_s32(__rev1_318, __noswap_splatq_lane_s32(__rev2_318, __p3_318))); \ |
| 46405 | __ret_318 = __builtin_shufflevector(__ret_318, __ret_318, 3, 2, 1, 0); \ |
| 46406 | __ret_318; \ |
| 45051 | 46407 | }) |
| 45052 | 46408 | #endif |
| 45053 | 46409 | |
| 45054 | 46410 | #ifdef __LITTLE_ENDIAN__ |
| 45055 | | #define vqrdmlshq_lane_s16(__p0_227, __p1_227, __p2_227, __p3_227) __extension__ ({ \ |
| 45056 | | int16x8_t __s0_227 = __p0_227; \ |
| 45057 | | int16x8_t __s1_227 = __p1_227; \ |
| 45058 | | int16x4_t __s2_227 = __p2_227; \ |
| 45059 | | int16x8_t __ret_227; \ |
| 45060 | | __ret_227 = vqsubq_s16(__s0_227, vqrdmulhq_s16(__s1_227, splatq_lane_s16(__s2_227, __p3_227))); \ |
| 45061 | | __ret_227; \ |
| 46411 | #define vqrdmlshq_lane_s16(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ |
| 46412 | int16x8_t __s0_319 = __p0_319; \ |
| 46413 | int16x8_t __s1_319 = __p1_319; \ |
| 46414 | int16x4_t __s2_319 = __p2_319; \ |
| 46415 | int16x8_t __ret_319; \ |
| 46416 | __ret_319 = vqsubq_s16(__s0_319, vqrdmulhq_s16(__s1_319, splatq_lane_s16(__s2_319, __p3_319))); \ |
| 46417 | __ret_319; \ |
| 45062 | 46418 | }) |
| 45063 | 46419 | #else |
| 45064 | | #define vqrdmlshq_lane_s16(__p0_228, __p1_228, __p2_228, __p3_228) __extension__ ({ \ |
| 45065 | | int16x8_t __s0_228 = __p0_228; \ |
| 45066 | | int16x8_t __s1_228 = __p1_228; \ |
| 45067 | | int16x4_t __s2_228 = __p2_228; \ |
| 45068 | | int16x8_t __rev0_228; __rev0_228 = __builtin_shufflevector(__s0_228, __s0_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45069 | | int16x8_t __rev1_228; __rev1_228 = __builtin_shufflevector(__s1_228, __s1_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45070 | | int16x4_t __rev2_228; __rev2_228 = __builtin_shufflevector(__s2_228, __s2_228, 3, 2, 1, 0); \ |
| 45071 | | int16x8_t __ret_228; \ |
| 45072 | | __ret_228 = __noswap_vqsubq_s16(__rev0_228, __noswap_vqrdmulhq_s16(__rev1_228, __noswap_splatq_lane_s16(__rev2_228, __p3_228))); \ |
| 45073 | | __ret_228 = __builtin_shufflevector(__ret_228, __ret_228, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45074 | | __ret_228; \ |
| 46420 | #define vqrdmlshq_lane_s16(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ |
| 46421 | int16x8_t __s0_320 = __p0_320; \ |
| 46422 | int16x8_t __s1_320 = __p1_320; \ |
| 46423 | int16x4_t __s2_320 = __p2_320; \ |
| 46424 | int16x8_t __rev0_320; __rev0_320 = __builtin_shufflevector(__s0_320, __s0_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46425 | int16x8_t __rev1_320; __rev1_320 = __builtin_shufflevector(__s1_320, __s1_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46426 | int16x4_t __rev2_320; __rev2_320 = __builtin_shufflevector(__s2_320, __s2_320, 3, 2, 1, 0); \ |
| 46427 | int16x8_t __ret_320; \ |
| 46428 | __ret_320 = __noswap_vqsubq_s16(__rev0_320, __noswap_vqrdmulhq_s16(__rev1_320, __noswap_splatq_lane_s16(__rev2_320, __p3_320))); \ |
| 46429 | __ret_320 = __builtin_shufflevector(__ret_320, __ret_320, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46430 | __ret_320; \ |
| 45075 | 46431 | }) |
| 45076 | 46432 | #endif |
| 45077 | 46433 | |
| 45078 | 46434 | #ifdef __LITTLE_ENDIAN__ |
| 45079 | | #define vqrdmlsh_lane_s32(__p0_229, __p1_229, __p2_229, __p3_229) __extension__ ({ \ |
| 45080 | | int32x2_t __s0_229 = __p0_229; \ |
| 45081 | | int32x2_t __s1_229 = __p1_229; \ |
| 45082 | | int32x2_t __s2_229 = __p2_229; \ |
| 45083 | | int32x2_t __ret_229; \ |
| 45084 | | __ret_229 = vqsub_s32(__s0_229, vqrdmulh_s32(__s1_229, splat_lane_s32(__s2_229, __p3_229))); \ |
| 45085 | | __ret_229; \ |
| 46435 | #define vqrdmlsh_lane_s32(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ |
| 46436 | int32x2_t __s0_321 = __p0_321; \ |
| 46437 | int32x2_t __s1_321 = __p1_321; \ |
| 46438 | int32x2_t __s2_321 = __p2_321; \ |
| 46439 | int32x2_t __ret_321; \ |
| 46440 | __ret_321 = vqsub_s32(__s0_321, vqrdmulh_s32(__s1_321, splat_lane_s32(__s2_321, __p3_321))); \ |
| 46441 | __ret_321; \ |
| 45086 | 46442 | }) |
| 45087 | 46443 | #else |
| 45088 | | #define vqrdmlsh_lane_s32(__p0_230, __p1_230, __p2_230, __p3_230) __extension__ ({ \ |
| 45089 | | int32x2_t __s0_230 = __p0_230; \ |
| 45090 | | int32x2_t __s1_230 = __p1_230; \ |
| 45091 | | int32x2_t __s2_230 = __p2_230; \ |
| 45092 | | int32x2_t __rev0_230; __rev0_230 = __builtin_shufflevector(__s0_230, __s0_230, 1, 0); \ |
| 45093 | | int32x2_t __rev1_230; __rev1_230 = __builtin_shufflevector(__s1_230, __s1_230, 1, 0); \ |
| 45094 | | int32x2_t __rev2_230; __rev2_230 = __builtin_shufflevector(__s2_230, __s2_230, 1, 0); \ |
| 45095 | | int32x2_t __ret_230; \ |
| 45096 | | __ret_230 = __noswap_vqsub_s32(__rev0_230, __noswap_vqrdmulh_s32(__rev1_230, __noswap_splat_lane_s32(__rev2_230, __p3_230))); \ |
| 45097 | | __ret_230 = __builtin_shufflevector(__ret_230, __ret_230, 1, 0); \ |
| 45098 | | __ret_230; \ |
| 46444 | #define vqrdmlsh_lane_s32(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ |
| 46445 | int32x2_t __s0_322 = __p0_322; \ |
| 46446 | int32x2_t __s1_322 = __p1_322; \ |
| 46447 | int32x2_t __s2_322 = __p2_322; \ |
| 46448 | int32x2_t __rev0_322; __rev0_322 = __builtin_shufflevector(__s0_322, __s0_322, 1, 0); \ |
| 46449 | int32x2_t __rev1_322; __rev1_322 = __builtin_shufflevector(__s1_322, __s1_322, 1, 0); \ |
| 46450 | int32x2_t __rev2_322; __rev2_322 = __builtin_shufflevector(__s2_322, __s2_322, 1, 0); \ |
| 46451 | int32x2_t __ret_322; \ |
| 46452 | __ret_322 = __noswap_vqsub_s32(__rev0_322, __noswap_vqrdmulh_s32(__rev1_322, __noswap_splat_lane_s32(__rev2_322, __p3_322))); \ |
| 46453 | __ret_322 = __builtin_shufflevector(__ret_322, __ret_322, 1, 0); \ |
| 46454 | __ret_322; \ |
| 45099 | 46455 | }) |
| 45100 | 46456 | #endif |
| 45101 | 46457 | |
| 45102 | 46458 | #ifdef __LITTLE_ENDIAN__ |
| 45103 | | #define vqrdmlsh_lane_s16(__p0_231, __p1_231, __p2_231, __p3_231) __extension__ ({ \ |
| 45104 | | int16x4_t __s0_231 = __p0_231; \ |
| 45105 | | int16x4_t __s1_231 = __p1_231; \ |
| 45106 | | int16x4_t __s2_231 = __p2_231; \ |
| 45107 | | int16x4_t __ret_231; \ |
| 45108 | | __ret_231 = vqsub_s16(__s0_231, vqrdmulh_s16(__s1_231, splat_lane_s16(__s2_231, __p3_231))); \ |
| 45109 | | __ret_231; \ |
| 46459 | #define vqrdmlsh_lane_s16(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ |
| 46460 | int16x4_t __s0_323 = __p0_323; \ |
| 46461 | int16x4_t __s1_323 = __p1_323; \ |
| 46462 | int16x4_t __s2_323 = __p2_323; \ |
| 46463 | int16x4_t __ret_323; \ |
| 46464 | __ret_323 = vqsub_s16(__s0_323, vqrdmulh_s16(__s1_323, splat_lane_s16(__s2_323, __p3_323))); \ |
| 46465 | __ret_323; \ |
| 45110 | 46466 | }) |
| 45111 | 46467 | #else |
| 45112 | | #define vqrdmlsh_lane_s16(__p0_232, __p1_232, __p2_232, __p3_232) __extension__ ({ \ |
| 45113 | | int16x4_t __s0_232 = __p0_232; \ |
| 45114 | | int16x4_t __s1_232 = __p1_232; \ |
| 45115 | | int16x4_t __s2_232 = __p2_232; \ |
| 45116 | | int16x4_t __rev0_232; __rev0_232 = __builtin_shufflevector(__s0_232, __s0_232, 3, 2, 1, 0); \ |
| 45117 | | int16x4_t __rev1_232; __rev1_232 = __builtin_shufflevector(__s1_232, __s1_232, 3, 2, 1, 0); \ |
| 45118 | | int16x4_t __rev2_232; __rev2_232 = __builtin_shufflevector(__s2_232, __s2_232, 3, 2, 1, 0); \ |
| 45119 | | int16x4_t __ret_232; \ |
| 45120 | | __ret_232 = __noswap_vqsub_s16(__rev0_232, __noswap_vqrdmulh_s16(__rev1_232, __noswap_splat_lane_s16(__rev2_232, __p3_232))); \ |
| 45121 | | __ret_232 = __builtin_shufflevector(__ret_232, __ret_232, 3, 2, 1, 0); \ |
| 45122 | | __ret_232; \ |
| 46468 | #define vqrdmlsh_lane_s16(__p0_324, __p1_324, __p2_324, __p3_324) __extension__ ({ \ |
| 46469 | int16x4_t __s0_324 = __p0_324; \ |
| 46470 | int16x4_t __s1_324 = __p1_324; \ |
| 46471 | int16x4_t __s2_324 = __p2_324; \ |
| 46472 | int16x4_t __rev0_324; __rev0_324 = __builtin_shufflevector(__s0_324, __s0_324, 3, 2, 1, 0); \ |
| 46473 | int16x4_t __rev1_324; __rev1_324 = __builtin_shufflevector(__s1_324, __s1_324, 3, 2, 1, 0); \ |
| 46474 | int16x4_t __rev2_324; __rev2_324 = __builtin_shufflevector(__s2_324, __s2_324, 3, 2, 1, 0); \ |
| 46475 | int16x4_t __ret_324; \ |
| 46476 | __ret_324 = __noswap_vqsub_s16(__rev0_324, __noswap_vqrdmulh_s16(__rev1_324, __noswap_splat_lane_s16(__rev2_324, __p3_324))); \ |
| 46477 | __ret_324 = __builtin_shufflevector(__ret_324, __ret_324, 3, 2, 1, 0); \ |
| 46478 | __ret_324; \ |
| 45123 | 46479 | }) |
| 45124 | 46480 | #endif |
| 45125 | 46481 | |
| 45126 | 46482 | #endif |
| 45127 | 46483 | #if defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__) |
| 45128 | 46484 | #ifdef __LITTLE_ENDIAN__ |
| 45129 | | #define vqrdmlahq_laneq_s32(__p0_233, __p1_233, __p2_233, __p3_233) __extension__ ({ \ |
| 45130 | | int32x4_t __s0_233 = __p0_233; \ |
| 45131 | | int32x4_t __s1_233 = __p1_233; \ |
| 45132 | | int32x4_t __s2_233 = __p2_233; \ |
| 45133 | | int32x4_t __ret_233; \ |
| 45134 | | __ret_233 = vqaddq_s32(__s0_233, vqrdmulhq_s32(__s1_233, splatq_laneq_s32(__s2_233, __p3_233))); \ |
| 45135 | | __ret_233; \ |
| 46485 | #define vqrdmlahq_laneq_s32(__p0_325, __p1_325, __p2_325, __p3_325) __extension__ ({ \ |
| 46486 | int32x4_t __s0_325 = __p0_325; \ |
| 46487 | int32x4_t __s1_325 = __p1_325; \ |
| 46488 | int32x4_t __s2_325 = __p2_325; \ |
| 46489 | int32x4_t __ret_325; \ |
| 46490 | __ret_325 = vqaddq_s32(__s0_325, vqrdmulhq_s32(__s1_325, splatq_laneq_s32(__s2_325, __p3_325))); \ |
| 46491 | __ret_325; \ |
| 45136 | 46492 | }) |
| 45137 | 46493 | #else |
| 45138 | | #define vqrdmlahq_laneq_s32(__p0_234, __p1_234, __p2_234, __p3_234) __extension__ ({ \ |
| 45139 | | int32x4_t __s0_234 = __p0_234; \ |
| 45140 | | int32x4_t __s1_234 = __p1_234; \ |
| 45141 | | int32x4_t __s2_234 = __p2_234; \ |
| 45142 | | int32x4_t __rev0_234; __rev0_234 = __builtin_shufflevector(__s0_234, __s0_234, 3, 2, 1, 0); \ |
| 45143 | | int32x4_t __rev1_234; __rev1_234 = __builtin_shufflevector(__s1_234, __s1_234, 3, 2, 1, 0); \ |
| 45144 | | int32x4_t __rev2_234; __rev2_234 = __builtin_shufflevector(__s2_234, __s2_234, 3, 2, 1, 0); \ |
| 45145 | | int32x4_t __ret_234; \ |
| 45146 | | __ret_234 = __noswap_vqaddq_s32(__rev0_234, __noswap_vqrdmulhq_s32(__rev1_234, __noswap_splatq_laneq_s32(__rev2_234, __p3_234))); \ |
| 45147 | | __ret_234 = __builtin_shufflevector(__ret_234, __ret_234, 3, 2, 1, 0); \ |
| 45148 | | __ret_234; \ |
| 46494 | #define vqrdmlahq_laneq_s32(__p0_326, __p1_326, __p2_326, __p3_326) __extension__ ({ \ |
| 46495 | int32x4_t __s0_326 = __p0_326; \ |
| 46496 | int32x4_t __s1_326 = __p1_326; \ |
| 46497 | int32x4_t __s2_326 = __p2_326; \ |
| 46498 | int32x4_t __rev0_326; __rev0_326 = __builtin_shufflevector(__s0_326, __s0_326, 3, 2, 1, 0); \ |
| 46499 | int32x4_t __rev1_326; __rev1_326 = __builtin_shufflevector(__s1_326, __s1_326, 3, 2, 1, 0); \ |
| 46500 | int32x4_t __rev2_326; __rev2_326 = __builtin_shufflevector(__s2_326, __s2_326, 3, 2, 1, 0); \ |
| 46501 | int32x4_t __ret_326; \ |
| 46502 | __ret_326 = __noswap_vqaddq_s32(__rev0_326, __noswap_vqrdmulhq_s32(__rev1_326, __noswap_splatq_laneq_s32(__rev2_326, __p3_326))); \ |
| 46503 | __ret_326 = __builtin_shufflevector(__ret_326, __ret_326, 3, 2, 1, 0); \ |
| 46504 | __ret_326; \ |
| 45149 | 46505 | }) |
| 45150 | 46506 | #endif |
| 45151 | 46507 | |
| 45152 | 46508 | #ifdef __LITTLE_ENDIAN__ |
| 45153 | | #define vqrdmlahq_laneq_s16(__p0_235, __p1_235, __p2_235, __p3_235) __extension__ ({ \ |
| 45154 | | int16x8_t __s0_235 = __p0_235; \ |
| 45155 | | int16x8_t __s1_235 = __p1_235; \ |
| 45156 | | int16x8_t __s2_235 = __p2_235; \ |
| 45157 | | int16x8_t __ret_235; \ |
| 45158 | | __ret_235 = vqaddq_s16(__s0_235, vqrdmulhq_s16(__s1_235, splatq_laneq_s16(__s2_235, __p3_235))); \ |
| 45159 | | __ret_235; \ |
| 46509 | #define vqrdmlahq_laneq_s16(__p0_327, __p1_327, __p2_327, __p3_327) __extension__ ({ \ |
| 46510 | int16x8_t __s0_327 = __p0_327; \ |
| 46511 | int16x8_t __s1_327 = __p1_327; \ |
| 46512 | int16x8_t __s2_327 = __p2_327; \ |
| 46513 | int16x8_t __ret_327; \ |
| 46514 | __ret_327 = vqaddq_s16(__s0_327, vqrdmulhq_s16(__s1_327, splatq_laneq_s16(__s2_327, __p3_327))); \ |
| 46515 | __ret_327; \ |
| 45160 | 46516 | }) |
| 45161 | 46517 | #else |
| 45162 | | #define vqrdmlahq_laneq_s16(__p0_236, __p1_236, __p2_236, __p3_236) __extension__ ({ \ |
| 45163 | | int16x8_t __s0_236 = __p0_236; \ |
| 45164 | | int16x8_t __s1_236 = __p1_236; \ |
| 45165 | | int16x8_t __s2_236 = __p2_236; \ |
| 45166 | | int16x8_t __rev0_236; __rev0_236 = __builtin_shufflevector(__s0_236, __s0_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45167 | | int16x8_t __rev1_236; __rev1_236 = __builtin_shufflevector(__s1_236, __s1_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45168 | | int16x8_t __rev2_236; __rev2_236 = __builtin_shufflevector(__s2_236, __s2_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45169 | | int16x8_t __ret_236; \ |
| 45170 | | __ret_236 = __noswap_vqaddq_s16(__rev0_236, __noswap_vqrdmulhq_s16(__rev1_236, __noswap_splatq_laneq_s16(__rev2_236, __p3_236))); \ |
| 45171 | | __ret_236 = __builtin_shufflevector(__ret_236, __ret_236, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45172 | | __ret_236; \ |
| 46518 | #define vqrdmlahq_laneq_s16(__p0_328, __p1_328, __p2_328, __p3_328) __extension__ ({ \ |
| 46519 | int16x8_t __s0_328 = __p0_328; \ |
| 46520 | int16x8_t __s1_328 = __p1_328; \ |
| 46521 | int16x8_t __s2_328 = __p2_328; \ |
| 46522 | int16x8_t __rev0_328; __rev0_328 = __builtin_shufflevector(__s0_328, __s0_328, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46523 | int16x8_t __rev1_328; __rev1_328 = __builtin_shufflevector(__s1_328, __s1_328, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46524 | int16x8_t __rev2_328; __rev2_328 = __builtin_shufflevector(__s2_328, __s2_328, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46525 | int16x8_t __ret_328; \ |
| 46526 | __ret_328 = __noswap_vqaddq_s16(__rev0_328, __noswap_vqrdmulhq_s16(__rev1_328, __noswap_splatq_laneq_s16(__rev2_328, __p3_328))); \ |
| 46527 | __ret_328 = __builtin_shufflevector(__ret_328, __ret_328, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46528 | __ret_328; \ |
| 45173 | 46529 | }) |
| 45174 | 46530 | #endif |
| 45175 | 46531 | |
| 45176 | 46532 | #ifdef __LITTLE_ENDIAN__ |
| 45177 | | #define vqrdmlah_laneq_s32(__p0_237, __p1_237, __p2_237, __p3_237) __extension__ ({ \ |
| 45178 | | int32x2_t __s0_237 = __p0_237; \ |
| 45179 | | int32x2_t __s1_237 = __p1_237; \ |
| 45180 | | int32x4_t __s2_237 = __p2_237; \ |
| 45181 | | int32x2_t __ret_237; \ |
| 45182 | | __ret_237 = vqadd_s32(__s0_237, vqrdmulh_s32(__s1_237, splat_laneq_s32(__s2_237, __p3_237))); \ |
| 45183 | | __ret_237; \ |
| 46533 | #define vqrdmlah_laneq_s32(__p0_329, __p1_329, __p2_329, __p3_329) __extension__ ({ \ |
| 46534 | int32x2_t __s0_329 = __p0_329; \ |
| 46535 | int32x2_t __s1_329 = __p1_329; \ |
| 46536 | int32x4_t __s2_329 = __p2_329; \ |
| 46537 | int32x2_t __ret_329; \ |
| 46538 | __ret_329 = vqadd_s32(__s0_329, vqrdmulh_s32(__s1_329, splat_laneq_s32(__s2_329, __p3_329))); \ |
| 46539 | __ret_329; \ |
| 45184 | 46540 | }) |
| 45185 | 46541 | #else |
| 45186 | | #define vqrdmlah_laneq_s32(__p0_238, __p1_238, __p2_238, __p3_238) __extension__ ({ \ |
| 45187 | | int32x2_t __s0_238 = __p0_238; \ |
| 45188 | | int32x2_t __s1_238 = __p1_238; \ |
| 45189 | | int32x4_t __s2_238 = __p2_238; \ |
| 45190 | | int32x2_t __rev0_238; __rev0_238 = __builtin_shufflevector(__s0_238, __s0_238, 1, 0); \ |
| 45191 | | int32x2_t __rev1_238; __rev1_238 = __builtin_shufflevector(__s1_238, __s1_238, 1, 0); \ |
| 45192 | | int32x4_t __rev2_238; __rev2_238 = __builtin_shufflevector(__s2_238, __s2_238, 3, 2, 1, 0); \ |
| 45193 | | int32x2_t __ret_238; \ |
| 45194 | | __ret_238 = __noswap_vqadd_s32(__rev0_238, __noswap_vqrdmulh_s32(__rev1_238, __noswap_splat_laneq_s32(__rev2_238, __p3_238))); \ |
| 45195 | | __ret_238 = __builtin_shufflevector(__ret_238, __ret_238, 1, 0); \ |
| 45196 | | __ret_238; \ |
| 46542 | #define vqrdmlah_laneq_s32(__p0_330, __p1_330, __p2_330, __p3_330) __extension__ ({ \ |
| 46543 | int32x2_t __s0_330 = __p0_330; \ |
| 46544 | int32x2_t __s1_330 = __p1_330; \ |
| 46545 | int32x4_t __s2_330 = __p2_330; \ |
| 46546 | int32x2_t __rev0_330; __rev0_330 = __builtin_shufflevector(__s0_330, __s0_330, 1, 0); \ |
| 46547 | int32x2_t __rev1_330; __rev1_330 = __builtin_shufflevector(__s1_330, __s1_330, 1, 0); \ |
| 46548 | int32x4_t __rev2_330; __rev2_330 = __builtin_shufflevector(__s2_330, __s2_330, 3, 2, 1, 0); \ |
| 46549 | int32x2_t __ret_330; \ |
| 46550 | __ret_330 = __noswap_vqadd_s32(__rev0_330, __noswap_vqrdmulh_s32(__rev1_330, __noswap_splat_laneq_s32(__rev2_330, __p3_330))); \ |
| 46551 | __ret_330 = __builtin_shufflevector(__ret_330, __ret_330, 1, 0); \ |
| 46552 | __ret_330; \ |
| 45197 | 46553 | }) |
| 45198 | 46554 | #endif |
| 45199 | 46555 | |
| 45200 | 46556 | #ifdef __LITTLE_ENDIAN__ |
| 45201 | | #define vqrdmlah_laneq_s16(__p0_239, __p1_239, __p2_239, __p3_239) __extension__ ({ \ |
| 45202 | | int16x4_t __s0_239 = __p0_239; \ |
| 45203 | | int16x4_t __s1_239 = __p1_239; \ |
| 45204 | | int16x8_t __s2_239 = __p2_239; \ |
| 45205 | | int16x4_t __ret_239; \ |
| 45206 | | __ret_239 = vqadd_s16(__s0_239, vqrdmulh_s16(__s1_239, splat_laneq_s16(__s2_239, __p3_239))); \ |
| 45207 | | __ret_239; \ |
| 46557 | #define vqrdmlah_laneq_s16(__p0_331, __p1_331, __p2_331, __p3_331) __extension__ ({ \ |
| 46558 | int16x4_t __s0_331 = __p0_331; \ |
| 46559 | int16x4_t __s1_331 = __p1_331; \ |
| 46560 | int16x8_t __s2_331 = __p2_331; \ |
| 46561 | int16x4_t __ret_331; \ |
| 46562 | __ret_331 = vqadd_s16(__s0_331, vqrdmulh_s16(__s1_331, splat_laneq_s16(__s2_331, __p3_331))); \ |
| 46563 | __ret_331; \ |
| 45208 | 46564 | }) |
| 45209 | 46565 | #else |
| 45210 | | #define vqrdmlah_laneq_s16(__p0_240, __p1_240, __p2_240, __p3_240) __extension__ ({ \ |
| 45211 | | int16x4_t __s0_240 = __p0_240; \ |
| 45212 | | int16x4_t __s1_240 = __p1_240; \ |
| 45213 | | int16x8_t __s2_240 = __p2_240; \ |
| 45214 | | int16x4_t __rev0_240; __rev0_240 = __builtin_shufflevector(__s0_240, __s0_240, 3, 2, 1, 0); \ |
| 45215 | | int16x4_t __rev1_240; __rev1_240 = __builtin_shufflevector(__s1_240, __s1_240, 3, 2, 1, 0); \ |
| 45216 | | int16x8_t __rev2_240; __rev2_240 = __builtin_shufflevector(__s2_240, __s2_240, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45217 | | int16x4_t __ret_240; \ |
| 45218 | | __ret_240 = __noswap_vqadd_s16(__rev0_240, __noswap_vqrdmulh_s16(__rev1_240, __noswap_splat_laneq_s16(__rev2_240, __p3_240))); \ |
| 45219 | | __ret_240 = __builtin_shufflevector(__ret_240, __ret_240, 3, 2, 1, 0); \ |
| 45220 | | __ret_240; \ |
| 46566 | #define vqrdmlah_laneq_s16(__p0_332, __p1_332, __p2_332, __p3_332) __extension__ ({ \ |
| 46567 | int16x4_t __s0_332 = __p0_332; \ |
| 46568 | int16x4_t __s1_332 = __p1_332; \ |
| 46569 | int16x8_t __s2_332 = __p2_332; \ |
| 46570 | int16x4_t __rev0_332; __rev0_332 = __builtin_shufflevector(__s0_332, __s0_332, 3, 2, 1, 0); \ |
| 46571 | int16x4_t __rev1_332; __rev1_332 = __builtin_shufflevector(__s1_332, __s1_332, 3, 2, 1, 0); \ |
| 46572 | int16x8_t __rev2_332; __rev2_332 = __builtin_shufflevector(__s2_332, __s2_332, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46573 | int16x4_t __ret_332; \ |
| 46574 | __ret_332 = __noswap_vqadd_s16(__rev0_332, __noswap_vqrdmulh_s16(__rev1_332, __noswap_splat_laneq_s16(__rev2_332, __p3_332))); \ |
| 46575 | __ret_332 = __builtin_shufflevector(__ret_332, __ret_332, 3, 2, 1, 0); \ |
| 46576 | __ret_332; \ |
| 45221 | 46577 | }) |
| 45222 | 46578 | #endif |
| 45223 | 46579 | |
| 45224 | 46580 | #ifdef __LITTLE_ENDIAN__ |
| 45225 | | #define vqrdmlshq_laneq_s32(__p0_241, __p1_241, __p2_241, __p3_241) __extension__ ({ \ |
| 45226 | | int32x4_t __s0_241 = __p0_241; \ |
| 45227 | | int32x4_t __s1_241 = __p1_241; \ |
| 45228 | | int32x4_t __s2_241 = __p2_241; \ |
| 45229 | | int32x4_t __ret_241; \ |
| 45230 | | __ret_241 = vqsubq_s32(__s0_241, vqrdmulhq_s32(__s1_241, splatq_laneq_s32(__s2_241, __p3_241))); \ |
| 45231 | | __ret_241; \ |
| 46581 | #define vqrdmlshq_laneq_s32(__p0_333, __p1_333, __p2_333, __p3_333) __extension__ ({ \ |
| 46582 | int32x4_t __s0_333 = __p0_333; \ |
| 46583 | int32x4_t __s1_333 = __p1_333; \ |
| 46584 | int32x4_t __s2_333 = __p2_333; \ |
| 46585 | int32x4_t __ret_333; \ |
| 46586 | __ret_333 = vqsubq_s32(__s0_333, vqrdmulhq_s32(__s1_333, splatq_laneq_s32(__s2_333, __p3_333))); \ |
| 46587 | __ret_333; \ |
| 45232 | 46588 | }) |
| 45233 | 46589 | #else |
| 45234 | | #define vqrdmlshq_laneq_s32(__p0_242, __p1_242, __p2_242, __p3_242) __extension__ ({ \ |
| 45235 | | int32x4_t __s0_242 = __p0_242; \ |
| 45236 | | int32x4_t __s1_242 = __p1_242; \ |
| 45237 | | int32x4_t __s2_242 = __p2_242; \ |
| 45238 | | int32x4_t __rev0_242; __rev0_242 = __builtin_shufflevector(__s0_242, __s0_242, 3, 2, 1, 0); \ |
| 45239 | | int32x4_t __rev1_242; __rev1_242 = __builtin_shufflevector(__s1_242, __s1_242, 3, 2, 1, 0); \ |
| 45240 | | int32x4_t __rev2_242; __rev2_242 = __builtin_shufflevector(__s2_242, __s2_242, 3, 2, 1, 0); \ |
| 45241 | | int32x4_t __ret_242; \ |
| 45242 | | __ret_242 = __noswap_vqsubq_s32(__rev0_242, __noswap_vqrdmulhq_s32(__rev1_242, __noswap_splatq_laneq_s32(__rev2_242, __p3_242))); \ |
| 45243 | | __ret_242 = __builtin_shufflevector(__ret_242, __ret_242, 3, 2, 1, 0); \ |
| 45244 | | __ret_242; \ |
| 46590 | #define vqrdmlshq_laneq_s32(__p0_334, __p1_334, __p2_334, __p3_334) __extension__ ({ \ |
| 46591 | int32x4_t __s0_334 = __p0_334; \ |
| 46592 | int32x4_t __s1_334 = __p1_334; \ |
| 46593 | int32x4_t __s2_334 = __p2_334; \ |
| 46594 | int32x4_t __rev0_334; __rev0_334 = __builtin_shufflevector(__s0_334, __s0_334, 3, 2, 1, 0); \ |
| 46595 | int32x4_t __rev1_334; __rev1_334 = __builtin_shufflevector(__s1_334, __s1_334, 3, 2, 1, 0); \ |
| 46596 | int32x4_t __rev2_334; __rev2_334 = __builtin_shufflevector(__s2_334, __s2_334, 3, 2, 1, 0); \ |
| 46597 | int32x4_t __ret_334; \ |
| 46598 | __ret_334 = __noswap_vqsubq_s32(__rev0_334, __noswap_vqrdmulhq_s32(__rev1_334, __noswap_splatq_laneq_s32(__rev2_334, __p3_334))); \ |
| 46599 | __ret_334 = __builtin_shufflevector(__ret_334, __ret_334, 3, 2, 1, 0); \ |
| 46600 | __ret_334; \ |
| 45245 | 46601 | }) |
| 45246 | 46602 | #endif |
| 45247 | 46603 | |
| 45248 | 46604 | #ifdef __LITTLE_ENDIAN__ |
| 45249 | | #define vqrdmlshq_laneq_s16(__p0_243, __p1_243, __p2_243, __p3_243) __extension__ ({ \ |
| 45250 | | int16x8_t __s0_243 = __p0_243; \ |
| 45251 | | int16x8_t __s1_243 = __p1_243; \ |
| 45252 | | int16x8_t __s2_243 = __p2_243; \ |
| 45253 | | int16x8_t __ret_243; \ |
| 45254 | | __ret_243 = vqsubq_s16(__s0_243, vqrdmulhq_s16(__s1_243, splatq_laneq_s16(__s2_243, __p3_243))); \ |
| 45255 | | __ret_243; \ |
| 46605 | #define vqrdmlshq_laneq_s16(__p0_335, __p1_335, __p2_335, __p3_335) __extension__ ({ \ |
| 46606 | int16x8_t __s0_335 = __p0_335; \ |
| 46607 | int16x8_t __s1_335 = __p1_335; \ |
| 46608 | int16x8_t __s2_335 = __p2_335; \ |
| 46609 | int16x8_t __ret_335; \ |
| 46610 | __ret_335 = vqsubq_s16(__s0_335, vqrdmulhq_s16(__s1_335, splatq_laneq_s16(__s2_335, __p3_335))); \ |
| 46611 | __ret_335; \ |
| 45256 | 46612 | }) |
| 45257 | 46613 | #else |
| 45258 | | #define vqrdmlshq_laneq_s16(__p0_244, __p1_244, __p2_244, __p3_244) __extension__ ({ \ |
| 45259 | | int16x8_t __s0_244 = __p0_244; \ |
| 45260 | | int16x8_t __s1_244 = __p1_244; \ |
| 45261 | | int16x8_t __s2_244 = __p2_244; \ |
| 45262 | | int16x8_t __rev0_244; __rev0_244 = __builtin_shufflevector(__s0_244, __s0_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45263 | | int16x8_t __rev1_244; __rev1_244 = __builtin_shufflevector(__s1_244, __s1_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45264 | | int16x8_t __rev2_244; __rev2_244 = __builtin_shufflevector(__s2_244, __s2_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45265 | | int16x8_t __ret_244; \ |
| 45266 | | __ret_244 = __noswap_vqsubq_s16(__rev0_244, __noswap_vqrdmulhq_s16(__rev1_244, __noswap_splatq_laneq_s16(__rev2_244, __p3_244))); \ |
| 45267 | | __ret_244 = __builtin_shufflevector(__ret_244, __ret_244, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45268 | | __ret_244; \ |
| 46614 | #define vqrdmlshq_laneq_s16(__p0_336, __p1_336, __p2_336, __p3_336) __extension__ ({ \ |
| 46615 | int16x8_t __s0_336 = __p0_336; \ |
| 46616 | int16x8_t __s1_336 = __p1_336; \ |
| 46617 | int16x8_t __s2_336 = __p2_336; \ |
| 46618 | int16x8_t __rev0_336; __rev0_336 = __builtin_shufflevector(__s0_336, __s0_336, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46619 | int16x8_t __rev1_336; __rev1_336 = __builtin_shufflevector(__s1_336, __s1_336, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46620 | int16x8_t __rev2_336; __rev2_336 = __builtin_shufflevector(__s2_336, __s2_336, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46621 | int16x8_t __ret_336; \ |
| 46622 | __ret_336 = __noswap_vqsubq_s16(__rev0_336, __noswap_vqrdmulhq_s16(__rev1_336, __noswap_splatq_laneq_s16(__rev2_336, __p3_336))); \ |
| 46623 | __ret_336 = __builtin_shufflevector(__ret_336, __ret_336, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46624 | __ret_336; \ |
| 45269 | 46625 | }) |
| 45270 | 46626 | #endif |
| 45271 | 46627 | |
| 45272 | 46628 | #ifdef __LITTLE_ENDIAN__ |
| 45273 | | #define vqrdmlsh_laneq_s32(__p0_245, __p1_245, __p2_245, __p3_245) __extension__ ({ \ |
| 45274 | | int32x2_t __s0_245 = __p0_245; \ |
| 45275 | | int32x2_t __s1_245 = __p1_245; \ |
| 45276 | | int32x4_t __s2_245 = __p2_245; \ |
| 45277 | | int32x2_t __ret_245; \ |
| 45278 | | __ret_245 = vqsub_s32(__s0_245, vqrdmulh_s32(__s1_245, splat_laneq_s32(__s2_245, __p3_245))); \ |
| 45279 | | __ret_245; \ |
| 46629 | #define vqrdmlsh_laneq_s32(__p0_337, __p1_337, __p2_337, __p3_337) __extension__ ({ \ |
| 46630 | int32x2_t __s0_337 = __p0_337; \ |
| 46631 | int32x2_t __s1_337 = __p1_337; \ |
| 46632 | int32x4_t __s2_337 = __p2_337; \ |
| 46633 | int32x2_t __ret_337; \ |
| 46634 | __ret_337 = vqsub_s32(__s0_337, vqrdmulh_s32(__s1_337, splat_laneq_s32(__s2_337, __p3_337))); \ |
| 46635 | __ret_337; \ |
| 45280 | 46636 | }) |
| 45281 | 46637 | #else |
| 45282 | | #define vqrdmlsh_laneq_s32(__p0_246, __p1_246, __p2_246, __p3_246) __extension__ ({ \ |
| 45283 | | int32x2_t __s0_246 = __p0_246; \ |
| 45284 | | int32x2_t __s1_246 = __p1_246; \ |
| 45285 | | int32x4_t __s2_246 = __p2_246; \ |
| 45286 | | int32x2_t __rev0_246; __rev0_246 = __builtin_shufflevector(__s0_246, __s0_246, 1, 0); \ |
| 45287 | | int32x2_t __rev1_246; __rev1_246 = __builtin_shufflevector(__s1_246, __s1_246, 1, 0); \ |
| 45288 | | int32x4_t __rev2_246; __rev2_246 = __builtin_shufflevector(__s2_246, __s2_246, 3, 2, 1, 0); \ |
| 45289 | | int32x2_t __ret_246; \ |
| 45290 | | __ret_246 = __noswap_vqsub_s32(__rev0_246, __noswap_vqrdmulh_s32(__rev1_246, __noswap_splat_laneq_s32(__rev2_246, __p3_246))); \ |
| 45291 | | __ret_246 = __builtin_shufflevector(__ret_246, __ret_246, 1, 0); \ |
| 45292 | | __ret_246; \ |
| 46638 | #define vqrdmlsh_laneq_s32(__p0_338, __p1_338, __p2_338, __p3_338) __extension__ ({ \ |
| 46639 | int32x2_t __s0_338 = __p0_338; \ |
| 46640 | int32x2_t __s1_338 = __p1_338; \ |
| 46641 | int32x4_t __s2_338 = __p2_338; \ |
| 46642 | int32x2_t __rev0_338; __rev0_338 = __builtin_shufflevector(__s0_338, __s0_338, 1, 0); \ |
| 46643 | int32x2_t __rev1_338; __rev1_338 = __builtin_shufflevector(__s1_338, __s1_338, 1, 0); \ |
| 46644 | int32x4_t __rev2_338; __rev2_338 = __builtin_shufflevector(__s2_338, __s2_338, 3, 2, 1, 0); \ |
| 46645 | int32x2_t __ret_338; \ |
| 46646 | __ret_338 = __noswap_vqsub_s32(__rev0_338, __noswap_vqrdmulh_s32(__rev1_338, __noswap_splat_laneq_s32(__rev2_338, __p3_338))); \ |
| 46647 | __ret_338 = __builtin_shufflevector(__ret_338, __ret_338, 1, 0); \ |
| 46648 | __ret_338; \ |
| 45293 | 46649 | }) |
| 45294 | 46650 | #endif |
| 45295 | 46651 | |
| 45296 | 46652 | #ifdef __LITTLE_ENDIAN__ |
| 45297 | | #define vqrdmlsh_laneq_s16(__p0_247, __p1_247, __p2_247, __p3_247) __extension__ ({ \ |
| 45298 | | int16x4_t __s0_247 = __p0_247; \ |
| 45299 | | int16x4_t __s1_247 = __p1_247; \ |
| 45300 | | int16x8_t __s2_247 = __p2_247; \ |
| 45301 | | int16x4_t __ret_247; \ |
| 45302 | | __ret_247 = vqsub_s16(__s0_247, vqrdmulh_s16(__s1_247, splat_laneq_s16(__s2_247, __p3_247))); \ |
| 45303 | | __ret_247; \ |
| 46653 | #define vqrdmlsh_laneq_s16(__p0_339, __p1_339, __p2_339, __p3_339) __extension__ ({ \ |
| 46654 | int16x4_t __s0_339 = __p0_339; \ |
| 46655 | int16x4_t __s1_339 = __p1_339; \ |
| 46656 | int16x8_t __s2_339 = __p2_339; \ |
| 46657 | int16x4_t __ret_339; \ |
| 46658 | __ret_339 = vqsub_s16(__s0_339, vqrdmulh_s16(__s1_339, splat_laneq_s16(__s2_339, __p3_339))); \ |
| 46659 | __ret_339; \ |
| 45304 | 46660 | }) |
| 45305 | 46661 | #else |
| 45306 | | #define vqrdmlsh_laneq_s16(__p0_248, __p1_248, __p2_248, __p3_248) __extension__ ({ \ |
| 45307 | | int16x4_t __s0_248 = __p0_248; \ |
| 45308 | | int16x4_t __s1_248 = __p1_248; \ |
| 45309 | | int16x8_t __s2_248 = __p2_248; \ |
| 45310 | | int16x4_t __rev0_248; __rev0_248 = __builtin_shufflevector(__s0_248, __s0_248, 3, 2, 1, 0); \ |
| 45311 | | int16x4_t __rev1_248; __rev1_248 = __builtin_shufflevector(__s1_248, __s1_248, 3, 2, 1, 0); \ |
| 45312 | | int16x8_t __rev2_248; __rev2_248 = __builtin_shufflevector(__s2_248, __s2_248, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 45313 | | int16x4_t __ret_248; \ |
| 45314 | | __ret_248 = __noswap_vqsub_s16(__rev0_248, __noswap_vqrdmulh_s16(__rev1_248, __noswap_splat_laneq_s16(__rev2_248, __p3_248))); \ |
| 45315 | | __ret_248 = __builtin_shufflevector(__ret_248, __ret_248, 3, 2, 1, 0); \ |
| 45316 | | __ret_248; \ |
| 46662 | #define vqrdmlsh_laneq_s16(__p0_340, __p1_340, __p2_340, __p3_340) __extension__ ({ \ |
| 46663 | int16x4_t __s0_340 = __p0_340; \ |
| 46664 | int16x4_t __s1_340 = __p1_340; \ |
| 46665 | int16x8_t __s2_340 = __p2_340; \ |
| 46666 | int16x4_t __rev0_340; __rev0_340 = __builtin_shufflevector(__s0_340, __s0_340, 3, 2, 1, 0); \ |
| 46667 | int16x4_t __rev1_340; __rev1_340 = __builtin_shufflevector(__s1_340, __s1_340, 3, 2, 1, 0); \ |
| 46668 | int16x8_t __rev2_340; __rev2_340 = __builtin_shufflevector(__s2_340, __s2_340, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 46669 | int16x4_t __ret_340; \ |
| 46670 | __ret_340 = __noswap_vqsub_s16(__rev0_340, __noswap_vqrdmulh_s16(__rev1_340, __noswap_splat_laneq_s16(__rev2_340, __p3_340))); \ |
| 46671 | __ret_340 = __builtin_shufflevector(__ret_340, __ret_340, 3, 2, 1, 0); \ |
| 46672 | __ret_340; \ |
| 45317 | 46673 | }) |
| 45318 | 46674 | #endif |
| 45319 | 46675 | |
| ... | ... | @@ -47730,892 +49086,892 @@ __ai float64x2_t vcombine_f64(float64x1_t __p0, float64x1_t __p1) { |
| 47730 | 49086 | #endif |
| 47731 | 49087 | |
| 47732 | 49088 | #ifdef __LITTLE_ENDIAN__ |
| 47733 | | #define vcopyq_lane_p8(__p0_249, __p1_249, __p2_249, __p3_249) __extension__ ({ \ |
| 47734 | | poly8x16_t __s0_249 = __p0_249; \ |
| 47735 | | poly8x8_t __s2_249 = __p2_249; \ |
| 47736 | | poly8x16_t __ret_249; \ |
| 47737 | | __ret_249 = vsetq_lane_p8(vget_lane_p8(__s2_249, __p3_249), __s0_249, __p1_249); \ |
| 47738 | | __ret_249; \ |
| 49089 | #define vcopyq_lane_p8(__p0_341, __p1_341, __p2_341, __p3_341) __extension__ ({ \ |
| 49090 | poly8x16_t __s0_341 = __p0_341; \ |
| 49091 | poly8x8_t __s2_341 = __p2_341; \ |
| 49092 | poly8x16_t __ret_341; \ |
| 49093 | __ret_341 = vsetq_lane_p8(vget_lane_p8(__s2_341, __p3_341), __s0_341, __p1_341); \ |
| 49094 | __ret_341; \ |
| 47739 | 49095 | }) |
| 47740 | 49096 | #else |
| 47741 | | #define vcopyq_lane_p8(__p0_250, __p1_250, __p2_250, __p3_250) __extension__ ({ \ |
| 47742 | | poly8x16_t __s0_250 = __p0_250; \ |
| 47743 | | poly8x8_t __s2_250 = __p2_250; \ |
| 47744 | | poly8x16_t __rev0_250; __rev0_250 = __builtin_shufflevector(__s0_250, __s0_250, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47745 | | poly8x8_t __rev2_250; __rev2_250 = __builtin_shufflevector(__s2_250, __s2_250, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47746 | | poly8x16_t __ret_250; \ |
| 47747 | | __ret_250 = __noswap_vsetq_lane_p8(__noswap_vget_lane_p8(__rev2_250, __p3_250), __rev0_250, __p1_250); \ |
| 47748 | | __ret_250 = __builtin_shufflevector(__ret_250, __ret_250, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47749 | | __ret_250; \ |
| 49097 | #define vcopyq_lane_p8(__p0_342, __p1_342, __p2_342, __p3_342) __extension__ ({ \ |
| 49098 | poly8x16_t __s0_342 = __p0_342; \ |
| 49099 | poly8x8_t __s2_342 = __p2_342; \ |
| 49100 | poly8x16_t __rev0_342; __rev0_342 = __builtin_shufflevector(__s0_342, __s0_342, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49101 | poly8x8_t __rev2_342; __rev2_342 = __builtin_shufflevector(__s2_342, __s2_342, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49102 | poly8x16_t __ret_342; \ |
| 49103 | __ret_342 = __noswap_vsetq_lane_p8(__noswap_vget_lane_p8(__rev2_342, __p3_342), __rev0_342, __p1_342); \ |
| 49104 | __ret_342 = __builtin_shufflevector(__ret_342, __ret_342, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49105 | __ret_342; \ |
| 47750 | 49106 | }) |
| 47751 | 49107 | #endif |
| 47752 | 49108 | |
| 47753 | 49109 | #ifdef __LITTLE_ENDIAN__ |
| 47754 | | #define vcopyq_lane_p16(__p0_251, __p1_251, __p2_251, __p3_251) __extension__ ({ \ |
| 47755 | | poly16x8_t __s0_251 = __p0_251; \ |
| 47756 | | poly16x4_t __s2_251 = __p2_251; \ |
| 47757 | | poly16x8_t __ret_251; \ |
| 47758 | | __ret_251 = vsetq_lane_p16(vget_lane_p16(__s2_251, __p3_251), __s0_251, __p1_251); \ |
| 47759 | | __ret_251; \ |
| 49110 | #define vcopyq_lane_p16(__p0_343, __p1_343, __p2_343, __p3_343) __extension__ ({ \ |
| 49111 | poly16x8_t __s0_343 = __p0_343; \ |
| 49112 | poly16x4_t __s2_343 = __p2_343; \ |
| 49113 | poly16x8_t __ret_343; \ |
| 49114 | __ret_343 = vsetq_lane_p16(vget_lane_p16(__s2_343, __p3_343), __s0_343, __p1_343); \ |
| 49115 | __ret_343; \ |
| 47760 | 49116 | }) |
| 47761 | 49117 | #else |
| 47762 | | #define vcopyq_lane_p16(__p0_252, __p1_252, __p2_252, __p3_252) __extension__ ({ \ |
| 47763 | | poly16x8_t __s0_252 = __p0_252; \ |
| 47764 | | poly16x4_t __s2_252 = __p2_252; \ |
| 47765 | | poly16x8_t __rev0_252; __rev0_252 = __builtin_shufflevector(__s0_252, __s0_252, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47766 | | poly16x4_t __rev2_252; __rev2_252 = __builtin_shufflevector(__s2_252, __s2_252, 3, 2, 1, 0); \ |
| 47767 | | poly16x8_t __ret_252; \ |
| 47768 | | __ret_252 = __noswap_vsetq_lane_p16(__noswap_vget_lane_p16(__rev2_252, __p3_252), __rev0_252, __p1_252); \ |
| 47769 | | __ret_252 = __builtin_shufflevector(__ret_252, __ret_252, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47770 | | __ret_252; \ |
| 49118 | #define vcopyq_lane_p16(__p0_344, __p1_344, __p2_344, __p3_344) __extension__ ({ \ |
| 49119 | poly16x8_t __s0_344 = __p0_344; \ |
| 49120 | poly16x4_t __s2_344 = __p2_344; \ |
| 49121 | poly16x8_t __rev0_344; __rev0_344 = __builtin_shufflevector(__s0_344, __s0_344, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49122 | poly16x4_t __rev2_344; __rev2_344 = __builtin_shufflevector(__s2_344, __s2_344, 3, 2, 1, 0); \ |
| 49123 | poly16x8_t __ret_344; \ |
| 49124 | __ret_344 = __noswap_vsetq_lane_p16(__noswap_vget_lane_p16(__rev2_344, __p3_344), __rev0_344, __p1_344); \ |
| 49125 | __ret_344 = __builtin_shufflevector(__ret_344, __ret_344, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49126 | __ret_344; \ |
| 47771 | 49127 | }) |
| 47772 | 49128 | #endif |
| 47773 | 49129 | |
| 47774 | 49130 | #ifdef __LITTLE_ENDIAN__ |
| 47775 | | #define vcopyq_lane_u8(__p0_253, __p1_253, __p2_253, __p3_253) __extension__ ({ \ |
| 47776 | | uint8x16_t __s0_253 = __p0_253; \ |
| 47777 | | uint8x8_t __s2_253 = __p2_253; \ |
| 47778 | | uint8x16_t __ret_253; \ |
| 47779 | | __ret_253 = vsetq_lane_u8(vget_lane_u8(__s2_253, __p3_253), __s0_253, __p1_253); \ |
| 47780 | | __ret_253; \ |
| 49131 | #define vcopyq_lane_u8(__p0_345, __p1_345, __p2_345, __p3_345) __extension__ ({ \ |
| 49132 | uint8x16_t __s0_345 = __p0_345; \ |
| 49133 | uint8x8_t __s2_345 = __p2_345; \ |
| 49134 | uint8x16_t __ret_345; \ |
| 49135 | __ret_345 = vsetq_lane_u8(vget_lane_u8(__s2_345, __p3_345), __s0_345, __p1_345); \ |
| 49136 | __ret_345; \ |
| 47781 | 49137 | }) |
| 47782 | 49138 | #else |
| 47783 | | #define vcopyq_lane_u8(__p0_254, __p1_254, __p2_254, __p3_254) __extension__ ({ \ |
| 47784 | | uint8x16_t __s0_254 = __p0_254; \ |
| 47785 | | uint8x8_t __s2_254 = __p2_254; \ |
| 47786 | | uint8x16_t __rev0_254; __rev0_254 = __builtin_shufflevector(__s0_254, __s0_254, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47787 | | uint8x8_t __rev2_254; __rev2_254 = __builtin_shufflevector(__s2_254, __s2_254, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47788 | | uint8x16_t __ret_254; \ |
| 47789 | | __ret_254 = __noswap_vsetq_lane_u8(__noswap_vget_lane_u8(__rev2_254, __p3_254), __rev0_254, __p1_254); \ |
| 47790 | | __ret_254 = __builtin_shufflevector(__ret_254, __ret_254, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47791 | | __ret_254; \ |
| 49139 | #define vcopyq_lane_u8(__p0_346, __p1_346, __p2_346, __p3_346) __extension__ ({ \ |
| 49140 | uint8x16_t __s0_346 = __p0_346; \ |
| 49141 | uint8x8_t __s2_346 = __p2_346; \ |
| 49142 | uint8x16_t __rev0_346; __rev0_346 = __builtin_shufflevector(__s0_346, __s0_346, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49143 | uint8x8_t __rev2_346; __rev2_346 = __builtin_shufflevector(__s2_346, __s2_346, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49144 | uint8x16_t __ret_346; \ |
| 49145 | __ret_346 = __noswap_vsetq_lane_u8(__noswap_vget_lane_u8(__rev2_346, __p3_346), __rev0_346, __p1_346); \ |
| 49146 | __ret_346 = __builtin_shufflevector(__ret_346, __ret_346, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49147 | __ret_346; \ |
| 47792 | 49148 | }) |
| 47793 | 49149 | #endif |
| 47794 | 49150 | |
| 47795 | 49151 | #ifdef __LITTLE_ENDIAN__ |
| 47796 | | #define vcopyq_lane_u32(__p0_255, __p1_255, __p2_255, __p3_255) __extension__ ({ \ |
| 47797 | | uint32x4_t __s0_255 = __p0_255; \ |
| 47798 | | uint32x2_t __s2_255 = __p2_255; \ |
| 47799 | | uint32x4_t __ret_255; \ |
| 47800 | | __ret_255 = vsetq_lane_u32(vget_lane_u32(__s2_255, __p3_255), __s0_255, __p1_255); \ |
| 47801 | | __ret_255; \ |
| 49152 | #define vcopyq_lane_u32(__p0_347, __p1_347, __p2_347, __p3_347) __extension__ ({ \ |
| 49153 | uint32x4_t __s0_347 = __p0_347; \ |
| 49154 | uint32x2_t __s2_347 = __p2_347; \ |
| 49155 | uint32x4_t __ret_347; \ |
| 49156 | __ret_347 = vsetq_lane_u32(vget_lane_u32(__s2_347, __p3_347), __s0_347, __p1_347); \ |
| 49157 | __ret_347; \ |
| 47802 | 49158 | }) |
| 47803 | 49159 | #else |
| 47804 | | #define vcopyq_lane_u32(__p0_256, __p1_256, __p2_256, __p3_256) __extension__ ({ \ |
| 47805 | | uint32x4_t __s0_256 = __p0_256; \ |
| 47806 | | uint32x2_t __s2_256 = __p2_256; \ |
| 47807 | | uint32x4_t __rev0_256; __rev0_256 = __builtin_shufflevector(__s0_256, __s0_256, 3, 2, 1, 0); \ |
| 47808 | | uint32x2_t __rev2_256; __rev2_256 = __builtin_shufflevector(__s2_256, __s2_256, 1, 0); \ |
| 47809 | | uint32x4_t __ret_256; \ |
| 47810 | | __ret_256 = __noswap_vsetq_lane_u32(__noswap_vget_lane_u32(__rev2_256, __p3_256), __rev0_256, __p1_256); \ |
| 47811 | | __ret_256 = __builtin_shufflevector(__ret_256, __ret_256, 3, 2, 1, 0); \ |
| 47812 | | __ret_256; \ |
| 49160 | #define vcopyq_lane_u32(__p0_348, __p1_348, __p2_348, __p3_348) __extension__ ({ \ |
| 49161 | uint32x4_t __s0_348 = __p0_348; \ |
| 49162 | uint32x2_t __s2_348 = __p2_348; \ |
| 49163 | uint32x4_t __rev0_348; __rev0_348 = __builtin_shufflevector(__s0_348, __s0_348, 3, 2, 1, 0); \ |
| 49164 | uint32x2_t __rev2_348; __rev2_348 = __builtin_shufflevector(__s2_348, __s2_348, 1, 0); \ |
| 49165 | uint32x4_t __ret_348; \ |
| 49166 | __ret_348 = __noswap_vsetq_lane_u32(__noswap_vget_lane_u32(__rev2_348, __p3_348), __rev0_348, __p1_348); \ |
| 49167 | __ret_348 = __builtin_shufflevector(__ret_348, __ret_348, 3, 2, 1, 0); \ |
| 49168 | __ret_348; \ |
| 47813 | 49169 | }) |
| 47814 | 49170 | #endif |
| 47815 | 49171 | |
| 47816 | 49172 | #ifdef __LITTLE_ENDIAN__ |
| 47817 | | #define vcopyq_lane_u64(__p0_257, __p1_257, __p2_257, __p3_257) __extension__ ({ \ |
| 47818 | | uint64x2_t __s0_257 = __p0_257; \ |
| 47819 | | uint64x1_t __s2_257 = __p2_257; \ |
| 47820 | | uint64x2_t __ret_257; \ |
| 47821 | | __ret_257 = vsetq_lane_u64(vget_lane_u64(__s2_257, __p3_257), __s0_257, __p1_257); \ |
| 47822 | | __ret_257; \ |
| 49173 | #define vcopyq_lane_u64(__p0_349, __p1_349, __p2_349, __p3_349) __extension__ ({ \ |
| 49174 | uint64x2_t __s0_349 = __p0_349; \ |
| 49175 | uint64x1_t __s2_349 = __p2_349; \ |
| 49176 | uint64x2_t __ret_349; \ |
| 49177 | __ret_349 = vsetq_lane_u64(vget_lane_u64(__s2_349, __p3_349), __s0_349, __p1_349); \ |
| 49178 | __ret_349; \ |
| 47823 | 49179 | }) |
| 47824 | 49180 | #else |
| 47825 | | #define vcopyq_lane_u64(__p0_258, __p1_258, __p2_258, __p3_258) __extension__ ({ \ |
| 47826 | | uint64x2_t __s0_258 = __p0_258; \ |
| 47827 | | uint64x1_t __s2_258 = __p2_258; \ |
| 47828 | | uint64x2_t __rev0_258; __rev0_258 = __builtin_shufflevector(__s0_258, __s0_258, 1, 0); \ |
| 47829 | | uint64x2_t __ret_258; \ |
| 47830 | | __ret_258 = __noswap_vsetq_lane_u64(vget_lane_u64(__s2_258, __p3_258), __rev0_258, __p1_258); \ |
| 47831 | | __ret_258 = __builtin_shufflevector(__ret_258, __ret_258, 1, 0); \ |
| 47832 | | __ret_258; \ |
| 49181 | #define vcopyq_lane_u64(__p0_350, __p1_350, __p2_350, __p3_350) __extension__ ({ \ |
| 49182 | uint64x2_t __s0_350 = __p0_350; \ |
| 49183 | uint64x1_t __s2_350 = __p2_350; \ |
| 49184 | uint64x2_t __rev0_350; __rev0_350 = __builtin_shufflevector(__s0_350, __s0_350, 1, 0); \ |
| 49185 | uint64x2_t __ret_350; \ |
| 49186 | __ret_350 = __noswap_vsetq_lane_u64(vget_lane_u64(__s2_350, __p3_350), __rev0_350, __p1_350); \ |
| 49187 | __ret_350 = __builtin_shufflevector(__ret_350, __ret_350, 1, 0); \ |
| 49188 | __ret_350; \ |
| 47833 | 49189 | }) |
| 47834 | 49190 | #endif |
| 47835 | 49191 | |
| 47836 | 49192 | #ifdef __LITTLE_ENDIAN__ |
| 47837 | | #define vcopyq_lane_u16(__p0_259, __p1_259, __p2_259, __p3_259) __extension__ ({ \ |
| 47838 | | uint16x8_t __s0_259 = __p0_259; \ |
| 47839 | | uint16x4_t __s2_259 = __p2_259; \ |
| 47840 | | uint16x8_t __ret_259; \ |
| 47841 | | __ret_259 = vsetq_lane_u16(vget_lane_u16(__s2_259, __p3_259), __s0_259, __p1_259); \ |
| 47842 | | __ret_259; \ |
| 49193 | #define vcopyq_lane_u16(__p0_351, __p1_351, __p2_351, __p3_351) __extension__ ({ \ |
| 49194 | uint16x8_t __s0_351 = __p0_351; \ |
| 49195 | uint16x4_t __s2_351 = __p2_351; \ |
| 49196 | uint16x8_t __ret_351; \ |
| 49197 | __ret_351 = vsetq_lane_u16(vget_lane_u16(__s2_351, __p3_351), __s0_351, __p1_351); \ |
| 49198 | __ret_351; \ |
| 47843 | 49199 | }) |
| 47844 | 49200 | #else |
| 47845 | | #define vcopyq_lane_u16(__p0_260, __p1_260, __p2_260, __p3_260) __extension__ ({ \ |
| 47846 | | uint16x8_t __s0_260 = __p0_260; \ |
| 47847 | | uint16x4_t __s2_260 = __p2_260; \ |
| 47848 | | uint16x8_t __rev0_260; __rev0_260 = __builtin_shufflevector(__s0_260, __s0_260, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47849 | | uint16x4_t __rev2_260; __rev2_260 = __builtin_shufflevector(__s2_260, __s2_260, 3, 2, 1, 0); \ |
| 47850 | | uint16x8_t __ret_260; \ |
| 47851 | | __ret_260 = __noswap_vsetq_lane_u16(__noswap_vget_lane_u16(__rev2_260, __p3_260), __rev0_260, __p1_260); \ |
| 47852 | | __ret_260 = __builtin_shufflevector(__ret_260, __ret_260, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47853 | | __ret_260; \ |
| 49201 | #define vcopyq_lane_u16(__p0_352, __p1_352, __p2_352, __p3_352) __extension__ ({ \ |
| 49202 | uint16x8_t __s0_352 = __p0_352; \ |
| 49203 | uint16x4_t __s2_352 = __p2_352; \ |
| 49204 | uint16x8_t __rev0_352; __rev0_352 = __builtin_shufflevector(__s0_352, __s0_352, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49205 | uint16x4_t __rev2_352; __rev2_352 = __builtin_shufflevector(__s2_352, __s2_352, 3, 2, 1, 0); \ |
| 49206 | uint16x8_t __ret_352; \ |
| 49207 | __ret_352 = __noswap_vsetq_lane_u16(__noswap_vget_lane_u16(__rev2_352, __p3_352), __rev0_352, __p1_352); \ |
| 49208 | __ret_352 = __builtin_shufflevector(__ret_352, __ret_352, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49209 | __ret_352; \ |
| 47854 | 49210 | }) |
| 47855 | 49211 | #endif |
| 47856 | 49212 | |
| 47857 | 49213 | #ifdef __LITTLE_ENDIAN__ |
| 47858 | | #define vcopyq_lane_s8(__p0_261, __p1_261, __p2_261, __p3_261) __extension__ ({ \ |
| 47859 | | int8x16_t __s0_261 = __p0_261; \ |
| 47860 | | int8x8_t __s2_261 = __p2_261; \ |
| 47861 | | int8x16_t __ret_261; \ |
| 47862 | | __ret_261 = vsetq_lane_s8(vget_lane_s8(__s2_261, __p3_261), __s0_261, __p1_261); \ |
| 47863 | | __ret_261; \ |
| 49214 | #define vcopyq_lane_s8(__p0_353, __p1_353, __p2_353, __p3_353) __extension__ ({ \ |
| 49215 | int8x16_t __s0_353 = __p0_353; \ |
| 49216 | int8x8_t __s2_353 = __p2_353; \ |
| 49217 | int8x16_t __ret_353; \ |
| 49218 | __ret_353 = vsetq_lane_s8(vget_lane_s8(__s2_353, __p3_353), __s0_353, __p1_353); \ |
| 49219 | __ret_353; \ |
| 47864 | 49220 | }) |
| 47865 | 49221 | #else |
| 47866 | | #define vcopyq_lane_s8(__p0_262, __p1_262, __p2_262, __p3_262) __extension__ ({ \ |
| 47867 | | int8x16_t __s0_262 = __p0_262; \ |
| 47868 | | int8x8_t __s2_262 = __p2_262; \ |
| 47869 | | int8x16_t __rev0_262; __rev0_262 = __builtin_shufflevector(__s0_262, __s0_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47870 | | int8x8_t __rev2_262; __rev2_262 = __builtin_shufflevector(__s2_262, __s2_262, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47871 | | int8x16_t __ret_262; \ |
| 47872 | | __ret_262 = __noswap_vsetq_lane_s8(__noswap_vget_lane_s8(__rev2_262, __p3_262), __rev0_262, __p1_262); \ |
| 47873 | | __ret_262 = __builtin_shufflevector(__ret_262, __ret_262, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47874 | | __ret_262; \ |
| 49222 | #define vcopyq_lane_s8(__p0_354, __p1_354, __p2_354, __p3_354) __extension__ ({ \ |
| 49223 | int8x16_t __s0_354 = __p0_354; \ |
| 49224 | int8x8_t __s2_354 = __p2_354; \ |
| 49225 | int8x16_t __rev0_354; __rev0_354 = __builtin_shufflevector(__s0_354, __s0_354, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49226 | int8x8_t __rev2_354; __rev2_354 = __builtin_shufflevector(__s2_354, __s2_354, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49227 | int8x16_t __ret_354; \ |
| 49228 | __ret_354 = __noswap_vsetq_lane_s8(__noswap_vget_lane_s8(__rev2_354, __p3_354), __rev0_354, __p1_354); \ |
| 49229 | __ret_354 = __builtin_shufflevector(__ret_354, __ret_354, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49230 | __ret_354; \ |
| 47875 | 49231 | }) |
| 47876 | 49232 | #endif |
| 47877 | 49233 | |
| 47878 | 49234 | #ifdef __LITTLE_ENDIAN__ |
| 47879 | | #define vcopyq_lane_f32(__p0_263, __p1_263, __p2_263, __p3_263) __extension__ ({ \ |
| 47880 | | float32x4_t __s0_263 = __p0_263; \ |
| 47881 | | float32x2_t __s2_263 = __p2_263; \ |
| 47882 | | float32x4_t __ret_263; \ |
| 47883 | | __ret_263 = vsetq_lane_f32(vget_lane_f32(__s2_263, __p3_263), __s0_263, __p1_263); \ |
| 47884 | | __ret_263; \ |
| 49235 | #define vcopyq_lane_f32(__p0_355, __p1_355, __p2_355, __p3_355) __extension__ ({ \ |
| 49236 | float32x4_t __s0_355 = __p0_355; \ |
| 49237 | float32x2_t __s2_355 = __p2_355; \ |
| 49238 | float32x4_t __ret_355; \ |
| 49239 | __ret_355 = vsetq_lane_f32(vget_lane_f32(__s2_355, __p3_355), __s0_355, __p1_355); \ |
| 49240 | __ret_355; \ |
| 47885 | 49241 | }) |
| 47886 | 49242 | #else |
| 47887 | | #define vcopyq_lane_f32(__p0_264, __p1_264, __p2_264, __p3_264) __extension__ ({ \ |
| 47888 | | float32x4_t __s0_264 = __p0_264; \ |
| 47889 | | float32x2_t __s2_264 = __p2_264; \ |
| 47890 | | float32x4_t __rev0_264; __rev0_264 = __builtin_shufflevector(__s0_264, __s0_264, 3, 2, 1, 0); \ |
| 47891 | | float32x2_t __rev2_264; __rev2_264 = __builtin_shufflevector(__s2_264, __s2_264, 1, 0); \ |
| 47892 | | float32x4_t __ret_264; \ |
| 47893 | | __ret_264 = __noswap_vsetq_lane_f32(__noswap_vget_lane_f32(__rev2_264, __p3_264), __rev0_264, __p1_264); \ |
| 47894 | | __ret_264 = __builtin_shufflevector(__ret_264, __ret_264, 3, 2, 1, 0); \ |
| 47895 | | __ret_264; \ |
| 49243 | #define vcopyq_lane_f32(__p0_356, __p1_356, __p2_356, __p3_356) __extension__ ({ \ |
| 49244 | float32x4_t __s0_356 = __p0_356; \ |
| 49245 | float32x2_t __s2_356 = __p2_356; \ |
| 49246 | float32x4_t __rev0_356; __rev0_356 = __builtin_shufflevector(__s0_356, __s0_356, 3, 2, 1, 0); \ |
| 49247 | float32x2_t __rev2_356; __rev2_356 = __builtin_shufflevector(__s2_356, __s2_356, 1, 0); \ |
| 49248 | float32x4_t __ret_356; \ |
| 49249 | __ret_356 = __noswap_vsetq_lane_f32(__noswap_vget_lane_f32(__rev2_356, __p3_356), __rev0_356, __p1_356); \ |
| 49250 | __ret_356 = __builtin_shufflevector(__ret_356, __ret_356, 3, 2, 1, 0); \ |
| 49251 | __ret_356; \ |
| 47896 | 49252 | }) |
| 47897 | 49253 | #endif |
| 47898 | 49254 | |
| 47899 | 49255 | #ifdef __LITTLE_ENDIAN__ |
| 47900 | | #define vcopyq_lane_s32(__p0_265, __p1_265, __p2_265, __p3_265) __extension__ ({ \ |
| 47901 | | int32x4_t __s0_265 = __p0_265; \ |
| 47902 | | int32x2_t __s2_265 = __p2_265; \ |
| 47903 | | int32x4_t __ret_265; \ |
| 47904 | | __ret_265 = vsetq_lane_s32(vget_lane_s32(__s2_265, __p3_265), __s0_265, __p1_265); \ |
| 47905 | | __ret_265; \ |
| 49256 | #define vcopyq_lane_s32(__p0_357, __p1_357, __p2_357, __p3_357) __extension__ ({ \ |
| 49257 | int32x4_t __s0_357 = __p0_357; \ |
| 49258 | int32x2_t __s2_357 = __p2_357; \ |
| 49259 | int32x4_t __ret_357; \ |
| 49260 | __ret_357 = vsetq_lane_s32(vget_lane_s32(__s2_357, __p3_357), __s0_357, __p1_357); \ |
| 49261 | __ret_357; \ |
| 47906 | 49262 | }) |
| 47907 | 49263 | #else |
| 47908 | | #define vcopyq_lane_s32(__p0_266, __p1_266, __p2_266, __p3_266) __extension__ ({ \ |
| 47909 | | int32x4_t __s0_266 = __p0_266; \ |
| 47910 | | int32x2_t __s2_266 = __p2_266; \ |
| 47911 | | int32x4_t __rev0_266; __rev0_266 = __builtin_shufflevector(__s0_266, __s0_266, 3, 2, 1, 0); \ |
| 47912 | | int32x2_t __rev2_266; __rev2_266 = __builtin_shufflevector(__s2_266, __s2_266, 1, 0); \ |
| 47913 | | int32x4_t __ret_266; \ |
| 47914 | | __ret_266 = __noswap_vsetq_lane_s32(__noswap_vget_lane_s32(__rev2_266, __p3_266), __rev0_266, __p1_266); \ |
| 47915 | | __ret_266 = __builtin_shufflevector(__ret_266, __ret_266, 3, 2, 1, 0); \ |
| 47916 | | __ret_266; \ |
| 49264 | #define vcopyq_lane_s32(__p0_358, __p1_358, __p2_358, __p3_358) __extension__ ({ \ |
| 49265 | int32x4_t __s0_358 = __p0_358; \ |
| 49266 | int32x2_t __s2_358 = __p2_358; \ |
| 49267 | int32x4_t __rev0_358; __rev0_358 = __builtin_shufflevector(__s0_358, __s0_358, 3, 2, 1, 0); \ |
| 49268 | int32x2_t __rev2_358; __rev2_358 = __builtin_shufflevector(__s2_358, __s2_358, 1, 0); \ |
| 49269 | int32x4_t __ret_358; \ |
| 49270 | __ret_358 = __noswap_vsetq_lane_s32(__noswap_vget_lane_s32(__rev2_358, __p3_358), __rev0_358, __p1_358); \ |
| 49271 | __ret_358 = __builtin_shufflevector(__ret_358, __ret_358, 3, 2, 1, 0); \ |
| 49272 | __ret_358; \ |
| 47917 | 49273 | }) |
| 47918 | 49274 | #endif |
| 47919 | 49275 | |
| 47920 | 49276 | #ifdef __LITTLE_ENDIAN__ |
| 47921 | | #define vcopyq_lane_s64(__p0_267, __p1_267, __p2_267, __p3_267) __extension__ ({ \ |
| 47922 | | int64x2_t __s0_267 = __p0_267; \ |
| 47923 | | int64x1_t __s2_267 = __p2_267; \ |
| 47924 | | int64x2_t __ret_267; \ |
| 47925 | | __ret_267 = vsetq_lane_s64(vget_lane_s64(__s2_267, __p3_267), __s0_267, __p1_267); \ |
| 47926 | | __ret_267; \ |
| 49277 | #define vcopyq_lane_s64(__p0_359, __p1_359, __p2_359, __p3_359) __extension__ ({ \ |
| 49278 | int64x2_t __s0_359 = __p0_359; \ |
| 49279 | int64x1_t __s2_359 = __p2_359; \ |
| 49280 | int64x2_t __ret_359; \ |
| 49281 | __ret_359 = vsetq_lane_s64(vget_lane_s64(__s2_359, __p3_359), __s0_359, __p1_359); \ |
| 49282 | __ret_359; \ |
| 47927 | 49283 | }) |
| 47928 | 49284 | #else |
| 47929 | | #define vcopyq_lane_s64(__p0_268, __p1_268, __p2_268, __p3_268) __extension__ ({ \ |
| 47930 | | int64x2_t __s0_268 = __p0_268; \ |
| 47931 | | int64x1_t __s2_268 = __p2_268; \ |
| 47932 | | int64x2_t __rev0_268; __rev0_268 = __builtin_shufflevector(__s0_268, __s0_268, 1, 0); \ |
| 47933 | | int64x2_t __ret_268; \ |
| 47934 | | __ret_268 = __noswap_vsetq_lane_s64(vget_lane_s64(__s2_268, __p3_268), __rev0_268, __p1_268); \ |
| 47935 | | __ret_268 = __builtin_shufflevector(__ret_268, __ret_268, 1, 0); \ |
| 47936 | | __ret_268; \ |
| 49285 | #define vcopyq_lane_s64(__p0_360, __p1_360, __p2_360, __p3_360) __extension__ ({ \ |
| 49286 | int64x2_t __s0_360 = __p0_360; \ |
| 49287 | int64x1_t __s2_360 = __p2_360; \ |
| 49288 | int64x2_t __rev0_360; __rev0_360 = __builtin_shufflevector(__s0_360, __s0_360, 1, 0); \ |
| 49289 | int64x2_t __ret_360; \ |
| 49290 | __ret_360 = __noswap_vsetq_lane_s64(vget_lane_s64(__s2_360, __p3_360), __rev0_360, __p1_360); \ |
| 49291 | __ret_360 = __builtin_shufflevector(__ret_360, __ret_360, 1, 0); \ |
| 49292 | __ret_360; \ |
| 47937 | 49293 | }) |
| 47938 | 49294 | #endif |
| 47939 | 49295 | |
| 47940 | 49296 | #ifdef __LITTLE_ENDIAN__ |
| 47941 | | #define vcopyq_lane_s16(__p0_269, __p1_269, __p2_269, __p3_269) __extension__ ({ \ |
| 47942 | | int16x8_t __s0_269 = __p0_269; \ |
| 47943 | | int16x4_t __s2_269 = __p2_269; \ |
| 47944 | | int16x8_t __ret_269; \ |
| 47945 | | __ret_269 = vsetq_lane_s16(vget_lane_s16(__s2_269, __p3_269), __s0_269, __p1_269); \ |
| 47946 | | __ret_269; \ |
| 49297 | #define vcopyq_lane_s16(__p0_361, __p1_361, __p2_361, __p3_361) __extension__ ({ \ |
| 49298 | int16x8_t __s0_361 = __p0_361; \ |
| 49299 | int16x4_t __s2_361 = __p2_361; \ |
| 49300 | int16x8_t __ret_361; \ |
| 49301 | __ret_361 = vsetq_lane_s16(vget_lane_s16(__s2_361, __p3_361), __s0_361, __p1_361); \ |
| 49302 | __ret_361; \ |
| 47947 | 49303 | }) |
| 47948 | 49304 | #else |
| 47949 | | #define vcopyq_lane_s16(__p0_270, __p1_270, __p2_270, __p3_270) __extension__ ({ \ |
| 47950 | | int16x8_t __s0_270 = __p0_270; \ |
| 47951 | | int16x4_t __s2_270 = __p2_270; \ |
| 47952 | | int16x8_t __rev0_270; __rev0_270 = __builtin_shufflevector(__s0_270, __s0_270, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47953 | | int16x4_t __rev2_270; __rev2_270 = __builtin_shufflevector(__s2_270, __s2_270, 3, 2, 1, 0); \ |
| 47954 | | int16x8_t __ret_270; \ |
| 47955 | | __ret_270 = __noswap_vsetq_lane_s16(__noswap_vget_lane_s16(__rev2_270, __p3_270), __rev0_270, __p1_270); \ |
| 47956 | | __ret_270 = __builtin_shufflevector(__ret_270, __ret_270, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47957 | | __ret_270; \ |
| 49305 | #define vcopyq_lane_s16(__p0_362, __p1_362, __p2_362, __p3_362) __extension__ ({ \ |
| 49306 | int16x8_t __s0_362 = __p0_362; \ |
| 49307 | int16x4_t __s2_362 = __p2_362; \ |
| 49308 | int16x8_t __rev0_362; __rev0_362 = __builtin_shufflevector(__s0_362, __s0_362, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49309 | int16x4_t __rev2_362; __rev2_362 = __builtin_shufflevector(__s2_362, __s2_362, 3, 2, 1, 0); \ |
| 49310 | int16x8_t __ret_362; \ |
| 49311 | __ret_362 = __noswap_vsetq_lane_s16(__noswap_vget_lane_s16(__rev2_362, __p3_362), __rev0_362, __p1_362); \ |
| 49312 | __ret_362 = __builtin_shufflevector(__ret_362, __ret_362, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49313 | __ret_362; \ |
| 47958 | 49314 | }) |
| 47959 | 49315 | #endif |
| 47960 | 49316 | |
| 47961 | 49317 | #ifdef __LITTLE_ENDIAN__ |
| 47962 | | #define vcopy_lane_p8(__p0_271, __p1_271, __p2_271, __p3_271) __extension__ ({ \ |
| 47963 | | poly8x8_t __s0_271 = __p0_271; \ |
| 47964 | | poly8x8_t __s2_271 = __p2_271; \ |
| 47965 | | poly8x8_t __ret_271; \ |
| 47966 | | __ret_271 = vset_lane_p8(vget_lane_p8(__s2_271, __p3_271), __s0_271, __p1_271); \ |
| 47967 | | __ret_271; \ |
| 49318 | #define vcopy_lane_p8(__p0_363, __p1_363, __p2_363, __p3_363) __extension__ ({ \ |
| 49319 | poly8x8_t __s0_363 = __p0_363; \ |
| 49320 | poly8x8_t __s2_363 = __p2_363; \ |
| 49321 | poly8x8_t __ret_363; \ |
| 49322 | __ret_363 = vset_lane_p8(vget_lane_p8(__s2_363, __p3_363), __s0_363, __p1_363); \ |
| 49323 | __ret_363; \ |
| 47968 | 49324 | }) |
| 47969 | 49325 | #else |
| 47970 | | #define vcopy_lane_p8(__p0_272, __p1_272, __p2_272, __p3_272) __extension__ ({ \ |
| 47971 | | poly8x8_t __s0_272 = __p0_272; \ |
| 47972 | | poly8x8_t __s2_272 = __p2_272; \ |
| 47973 | | poly8x8_t __rev0_272; __rev0_272 = __builtin_shufflevector(__s0_272, __s0_272, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47974 | | poly8x8_t __rev2_272; __rev2_272 = __builtin_shufflevector(__s2_272, __s2_272, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47975 | | poly8x8_t __ret_272; \ |
| 47976 | | __ret_272 = __noswap_vset_lane_p8(__noswap_vget_lane_p8(__rev2_272, __p3_272), __rev0_272, __p1_272); \ |
| 47977 | | __ret_272 = __builtin_shufflevector(__ret_272, __ret_272, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 47978 | | __ret_272; \ |
| 49326 | #define vcopy_lane_p8(__p0_364, __p1_364, __p2_364, __p3_364) __extension__ ({ \ |
| 49327 | poly8x8_t __s0_364 = __p0_364; \ |
| 49328 | poly8x8_t __s2_364 = __p2_364; \ |
| 49329 | poly8x8_t __rev0_364; __rev0_364 = __builtin_shufflevector(__s0_364, __s0_364, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49330 | poly8x8_t __rev2_364; __rev2_364 = __builtin_shufflevector(__s2_364, __s2_364, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49331 | poly8x8_t __ret_364; \ |
| 49332 | __ret_364 = __noswap_vset_lane_p8(__noswap_vget_lane_p8(__rev2_364, __p3_364), __rev0_364, __p1_364); \ |
| 49333 | __ret_364 = __builtin_shufflevector(__ret_364, __ret_364, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49334 | __ret_364; \ |
| 47979 | 49335 | }) |
| 47980 | 49336 | #endif |
| 47981 | 49337 | |
| 47982 | 49338 | #ifdef __LITTLE_ENDIAN__ |
| 47983 | | #define vcopy_lane_p16(__p0_273, __p1_273, __p2_273, __p3_273) __extension__ ({ \ |
| 47984 | | poly16x4_t __s0_273 = __p0_273; \ |
| 47985 | | poly16x4_t __s2_273 = __p2_273; \ |
| 47986 | | poly16x4_t __ret_273; \ |
| 47987 | | __ret_273 = vset_lane_p16(vget_lane_p16(__s2_273, __p3_273), __s0_273, __p1_273); \ |
| 47988 | | __ret_273; \ |
| 49339 | #define vcopy_lane_p16(__p0_365, __p1_365, __p2_365, __p3_365) __extension__ ({ \ |
| 49340 | poly16x4_t __s0_365 = __p0_365; \ |
| 49341 | poly16x4_t __s2_365 = __p2_365; \ |
| 49342 | poly16x4_t __ret_365; \ |
| 49343 | __ret_365 = vset_lane_p16(vget_lane_p16(__s2_365, __p3_365), __s0_365, __p1_365); \ |
| 49344 | __ret_365; \ |
| 47989 | 49345 | }) |
| 47990 | 49346 | #else |
| 47991 | | #define vcopy_lane_p16(__p0_274, __p1_274, __p2_274, __p3_274) __extension__ ({ \ |
| 47992 | | poly16x4_t __s0_274 = __p0_274; \ |
| 47993 | | poly16x4_t __s2_274 = __p2_274; \ |
| 47994 | | poly16x4_t __rev0_274; __rev0_274 = __builtin_shufflevector(__s0_274, __s0_274, 3, 2, 1, 0); \ |
| 47995 | | poly16x4_t __rev2_274; __rev2_274 = __builtin_shufflevector(__s2_274, __s2_274, 3, 2, 1, 0); \ |
| 47996 | | poly16x4_t __ret_274; \ |
| 47997 | | __ret_274 = __noswap_vset_lane_p16(__noswap_vget_lane_p16(__rev2_274, __p3_274), __rev0_274, __p1_274); \ |
| 47998 | | __ret_274 = __builtin_shufflevector(__ret_274, __ret_274, 3, 2, 1, 0); \ |
| 47999 | | __ret_274; \ |
| 49347 | #define vcopy_lane_p16(__p0_366, __p1_366, __p2_366, __p3_366) __extension__ ({ \ |
| 49348 | poly16x4_t __s0_366 = __p0_366; \ |
| 49349 | poly16x4_t __s2_366 = __p2_366; \ |
| 49350 | poly16x4_t __rev0_366; __rev0_366 = __builtin_shufflevector(__s0_366, __s0_366, 3, 2, 1, 0); \ |
| 49351 | poly16x4_t __rev2_366; __rev2_366 = __builtin_shufflevector(__s2_366, __s2_366, 3, 2, 1, 0); \ |
| 49352 | poly16x4_t __ret_366; \ |
| 49353 | __ret_366 = __noswap_vset_lane_p16(__noswap_vget_lane_p16(__rev2_366, __p3_366), __rev0_366, __p1_366); \ |
| 49354 | __ret_366 = __builtin_shufflevector(__ret_366, __ret_366, 3, 2, 1, 0); \ |
| 49355 | __ret_366; \ |
| 48000 | 49356 | }) |
| 48001 | 49357 | #endif |
| 48002 | 49358 | |
| 48003 | 49359 | #ifdef __LITTLE_ENDIAN__ |
| 48004 | | #define vcopy_lane_u8(__p0_275, __p1_275, __p2_275, __p3_275) __extension__ ({ \ |
| 48005 | | uint8x8_t __s0_275 = __p0_275; \ |
| 48006 | | uint8x8_t __s2_275 = __p2_275; \ |
| 48007 | | uint8x8_t __ret_275; \ |
| 48008 | | __ret_275 = vset_lane_u8(vget_lane_u8(__s2_275, __p3_275), __s0_275, __p1_275); \ |
| 48009 | | __ret_275; \ |
| 49360 | #define vcopy_lane_u8(__p0_367, __p1_367, __p2_367, __p3_367) __extension__ ({ \ |
| 49361 | uint8x8_t __s0_367 = __p0_367; \ |
| 49362 | uint8x8_t __s2_367 = __p2_367; \ |
| 49363 | uint8x8_t __ret_367; \ |
| 49364 | __ret_367 = vset_lane_u8(vget_lane_u8(__s2_367, __p3_367), __s0_367, __p1_367); \ |
| 49365 | __ret_367; \ |
| 48010 | 49366 | }) |
| 48011 | 49367 | #else |
| 48012 | | #define vcopy_lane_u8(__p0_276, __p1_276, __p2_276, __p3_276) __extension__ ({ \ |
| 48013 | | uint8x8_t __s0_276 = __p0_276; \ |
| 48014 | | uint8x8_t __s2_276 = __p2_276; \ |
| 48015 | | uint8x8_t __rev0_276; __rev0_276 = __builtin_shufflevector(__s0_276, __s0_276, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48016 | | uint8x8_t __rev2_276; __rev2_276 = __builtin_shufflevector(__s2_276, __s2_276, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48017 | | uint8x8_t __ret_276; \ |
| 48018 | | __ret_276 = __noswap_vset_lane_u8(__noswap_vget_lane_u8(__rev2_276, __p3_276), __rev0_276, __p1_276); \ |
| 48019 | | __ret_276 = __builtin_shufflevector(__ret_276, __ret_276, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48020 | | __ret_276; \ |
| 49368 | #define vcopy_lane_u8(__p0_368, __p1_368, __p2_368, __p3_368) __extension__ ({ \ |
| 49369 | uint8x8_t __s0_368 = __p0_368; \ |
| 49370 | uint8x8_t __s2_368 = __p2_368; \ |
| 49371 | uint8x8_t __rev0_368; __rev0_368 = __builtin_shufflevector(__s0_368, __s0_368, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49372 | uint8x8_t __rev2_368; __rev2_368 = __builtin_shufflevector(__s2_368, __s2_368, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49373 | uint8x8_t __ret_368; \ |
| 49374 | __ret_368 = __noswap_vset_lane_u8(__noswap_vget_lane_u8(__rev2_368, __p3_368), __rev0_368, __p1_368); \ |
| 49375 | __ret_368 = __builtin_shufflevector(__ret_368, __ret_368, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49376 | __ret_368; \ |
| 48021 | 49377 | }) |
| 48022 | 49378 | #endif |
| 48023 | 49379 | |
| 48024 | 49380 | #ifdef __LITTLE_ENDIAN__ |
| 48025 | | #define vcopy_lane_u32(__p0_277, __p1_277, __p2_277, __p3_277) __extension__ ({ \ |
| 48026 | | uint32x2_t __s0_277 = __p0_277; \ |
| 48027 | | uint32x2_t __s2_277 = __p2_277; \ |
| 48028 | | uint32x2_t __ret_277; \ |
| 48029 | | __ret_277 = vset_lane_u32(vget_lane_u32(__s2_277, __p3_277), __s0_277, __p1_277); \ |
| 48030 | | __ret_277; \ |
| 49381 | #define vcopy_lane_u32(__p0_369, __p1_369, __p2_369, __p3_369) __extension__ ({ \ |
| 49382 | uint32x2_t __s0_369 = __p0_369; \ |
| 49383 | uint32x2_t __s2_369 = __p2_369; \ |
| 49384 | uint32x2_t __ret_369; \ |
| 49385 | __ret_369 = vset_lane_u32(vget_lane_u32(__s2_369, __p3_369), __s0_369, __p1_369); \ |
| 49386 | __ret_369; \ |
| 48031 | 49387 | }) |
| 48032 | 49388 | #else |
| 48033 | | #define vcopy_lane_u32(__p0_278, __p1_278, __p2_278, __p3_278) __extension__ ({ \ |
| 48034 | | uint32x2_t __s0_278 = __p0_278; \ |
| 48035 | | uint32x2_t __s2_278 = __p2_278; \ |
| 48036 | | uint32x2_t __rev0_278; __rev0_278 = __builtin_shufflevector(__s0_278, __s0_278, 1, 0); \ |
| 48037 | | uint32x2_t __rev2_278; __rev2_278 = __builtin_shufflevector(__s2_278, __s2_278, 1, 0); \ |
| 48038 | | uint32x2_t __ret_278; \ |
| 48039 | | __ret_278 = __noswap_vset_lane_u32(__noswap_vget_lane_u32(__rev2_278, __p3_278), __rev0_278, __p1_278); \ |
| 48040 | | __ret_278 = __builtin_shufflevector(__ret_278, __ret_278, 1, 0); \ |
| 48041 | | __ret_278; \ |
| 49389 | #define vcopy_lane_u32(__p0_370, __p1_370, __p2_370, __p3_370) __extension__ ({ \ |
| 49390 | uint32x2_t __s0_370 = __p0_370; \ |
| 49391 | uint32x2_t __s2_370 = __p2_370; \ |
| 49392 | uint32x2_t __rev0_370; __rev0_370 = __builtin_shufflevector(__s0_370, __s0_370, 1, 0); \ |
| 49393 | uint32x2_t __rev2_370; __rev2_370 = __builtin_shufflevector(__s2_370, __s2_370, 1, 0); \ |
| 49394 | uint32x2_t __ret_370; \ |
| 49395 | __ret_370 = __noswap_vset_lane_u32(__noswap_vget_lane_u32(__rev2_370, __p3_370), __rev0_370, __p1_370); \ |
| 49396 | __ret_370 = __builtin_shufflevector(__ret_370, __ret_370, 1, 0); \ |
| 49397 | __ret_370; \ |
| 48042 | 49398 | }) |
| 48043 | 49399 | #endif |
| 48044 | 49400 | |
| 48045 | | #define vcopy_lane_u64(__p0_279, __p1_279, __p2_279, __p3_279) __extension__ ({ \ |
| 48046 | | uint64x1_t __s0_279 = __p0_279; \ |
| 48047 | | uint64x1_t __s2_279 = __p2_279; \ |
| 48048 | | uint64x1_t __ret_279; \ |
| 48049 | | __ret_279 = vset_lane_u64(vget_lane_u64(__s2_279, __p3_279), __s0_279, __p1_279); \ |
| 48050 | | __ret_279; \ |
| 49401 | #define vcopy_lane_u64(__p0_371, __p1_371, __p2_371, __p3_371) __extension__ ({ \ |
| 49402 | uint64x1_t __s0_371 = __p0_371; \ |
| 49403 | uint64x1_t __s2_371 = __p2_371; \ |
| 49404 | uint64x1_t __ret_371; \ |
| 49405 | __ret_371 = vset_lane_u64(vget_lane_u64(__s2_371, __p3_371), __s0_371, __p1_371); \ |
| 49406 | __ret_371; \ |
| 48051 | 49407 | }) |
| 48052 | 49408 | #ifdef __LITTLE_ENDIAN__ |
| 48053 | | #define vcopy_lane_u16(__p0_280, __p1_280, __p2_280, __p3_280) __extension__ ({ \ |
| 48054 | | uint16x4_t __s0_280 = __p0_280; \ |
| 48055 | | uint16x4_t __s2_280 = __p2_280; \ |
| 48056 | | uint16x4_t __ret_280; \ |
| 48057 | | __ret_280 = vset_lane_u16(vget_lane_u16(__s2_280, __p3_280), __s0_280, __p1_280); \ |
| 48058 | | __ret_280; \ |
| 49409 | #define vcopy_lane_u16(__p0_372, __p1_372, __p2_372, __p3_372) __extension__ ({ \ |
| 49410 | uint16x4_t __s0_372 = __p0_372; \ |
| 49411 | uint16x4_t __s2_372 = __p2_372; \ |
| 49412 | uint16x4_t __ret_372; \ |
| 49413 | __ret_372 = vset_lane_u16(vget_lane_u16(__s2_372, __p3_372), __s0_372, __p1_372); \ |
| 49414 | __ret_372; \ |
| 48059 | 49415 | }) |
| 48060 | 49416 | #else |
| 48061 | | #define vcopy_lane_u16(__p0_281, __p1_281, __p2_281, __p3_281) __extension__ ({ \ |
| 48062 | | uint16x4_t __s0_281 = __p0_281; \ |
| 48063 | | uint16x4_t __s2_281 = __p2_281; \ |
| 48064 | | uint16x4_t __rev0_281; __rev0_281 = __builtin_shufflevector(__s0_281, __s0_281, 3, 2, 1, 0); \ |
| 48065 | | uint16x4_t __rev2_281; __rev2_281 = __builtin_shufflevector(__s2_281, __s2_281, 3, 2, 1, 0); \ |
| 48066 | | uint16x4_t __ret_281; \ |
| 48067 | | __ret_281 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_281, __p3_281), __rev0_281, __p1_281); \ |
| 48068 | | __ret_281 = __builtin_shufflevector(__ret_281, __ret_281, 3, 2, 1, 0); \ |
| 48069 | | __ret_281; \ |
| 49417 | #define vcopy_lane_u16(__p0_373, __p1_373, __p2_373, __p3_373) __extension__ ({ \ |
| 49418 | uint16x4_t __s0_373 = __p0_373; \ |
| 49419 | uint16x4_t __s2_373 = __p2_373; \ |
| 49420 | uint16x4_t __rev0_373; __rev0_373 = __builtin_shufflevector(__s0_373, __s0_373, 3, 2, 1, 0); \ |
| 49421 | uint16x4_t __rev2_373; __rev2_373 = __builtin_shufflevector(__s2_373, __s2_373, 3, 2, 1, 0); \ |
| 49422 | uint16x4_t __ret_373; \ |
| 49423 | __ret_373 = __noswap_vset_lane_u16(__noswap_vget_lane_u16(__rev2_373, __p3_373), __rev0_373, __p1_373); \ |
| 49424 | __ret_373 = __builtin_shufflevector(__ret_373, __ret_373, 3, 2, 1, 0); \ |
| 49425 | __ret_373; \ |
| 48070 | 49426 | }) |
| 48071 | 49427 | #endif |
| 48072 | 49428 | |
| 48073 | 49429 | #ifdef __LITTLE_ENDIAN__ |
| 48074 | | #define vcopy_lane_s8(__p0_282, __p1_282, __p2_282, __p3_282) __extension__ ({ \ |
| 48075 | | int8x8_t __s0_282 = __p0_282; \ |
| 48076 | | int8x8_t __s2_282 = __p2_282; \ |
| 48077 | | int8x8_t __ret_282; \ |
| 48078 | | __ret_282 = vset_lane_s8(vget_lane_s8(__s2_282, __p3_282), __s0_282, __p1_282); \ |
| 48079 | | __ret_282; \ |
| 49430 | #define vcopy_lane_s8(__p0_374, __p1_374, __p2_374, __p3_374) __extension__ ({ \ |
| 49431 | int8x8_t __s0_374 = __p0_374; \ |
| 49432 | int8x8_t __s2_374 = __p2_374; \ |
| 49433 | int8x8_t __ret_374; \ |
| 49434 | __ret_374 = vset_lane_s8(vget_lane_s8(__s2_374, __p3_374), __s0_374, __p1_374); \ |
| 49435 | __ret_374; \ |
| 48080 | 49436 | }) |
| 48081 | 49437 | #else |
| 48082 | | #define vcopy_lane_s8(__p0_283, __p1_283, __p2_283, __p3_283) __extension__ ({ \ |
| 48083 | | int8x8_t __s0_283 = __p0_283; \ |
| 48084 | | int8x8_t __s2_283 = __p2_283; \ |
| 48085 | | int8x8_t __rev0_283; __rev0_283 = __builtin_shufflevector(__s0_283, __s0_283, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48086 | | int8x8_t __rev2_283; __rev2_283 = __builtin_shufflevector(__s2_283, __s2_283, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48087 | | int8x8_t __ret_283; \ |
| 48088 | | __ret_283 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_283, __p3_283), __rev0_283, __p1_283); \ |
| 48089 | | __ret_283 = __builtin_shufflevector(__ret_283, __ret_283, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48090 | | __ret_283; \ |
| 49438 | #define vcopy_lane_s8(__p0_375, __p1_375, __p2_375, __p3_375) __extension__ ({ \ |
| 49439 | int8x8_t __s0_375 = __p0_375; \ |
| 49440 | int8x8_t __s2_375 = __p2_375; \ |
| 49441 | int8x8_t __rev0_375; __rev0_375 = __builtin_shufflevector(__s0_375, __s0_375, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49442 | int8x8_t __rev2_375; __rev2_375 = __builtin_shufflevector(__s2_375, __s2_375, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49443 | int8x8_t __ret_375; \ |
| 49444 | __ret_375 = __noswap_vset_lane_s8(__noswap_vget_lane_s8(__rev2_375, __p3_375), __rev0_375, __p1_375); \ |
| 49445 | __ret_375 = __builtin_shufflevector(__ret_375, __ret_375, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49446 | __ret_375; \ |
| 48091 | 49447 | }) |
| 48092 | 49448 | #endif |
| 48093 | 49449 | |
| 48094 | 49450 | #ifdef __LITTLE_ENDIAN__ |
| 48095 | | #define vcopy_lane_f32(__p0_284, __p1_284, __p2_284, __p3_284) __extension__ ({ \ |
| 48096 | | float32x2_t __s0_284 = __p0_284; \ |
| 48097 | | float32x2_t __s2_284 = __p2_284; \ |
| 48098 | | float32x2_t __ret_284; \ |
| 48099 | | __ret_284 = vset_lane_f32(vget_lane_f32(__s2_284, __p3_284), __s0_284, __p1_284); \ |
| 48100 | | __ret_284; \ |
| 49451 | #define vcopy_lane_f32(__p0_376, __p1_376, __p2_376, __p3_376) __extension__ ({ \ |
| 49452 | float32x2_t __s0_376 = __p0_376; \ |
| 49453 | float32x2_t __s2_376 = __p2_376; \ |
| 49454 | float32x2_t __ret_376; \ |
| 49455 | __ret_376 = vset_lane_f32(vget_lane_f32(__s2_376, __p3_376), __s0_376, __p1_376); \ |
| 49456 | __ret_376; \ |
| 48101 | 49457 | }) |
| 48102 | 49458 | #else |
| 48103 | | #define vcopy_lane_f32(__p0_285, __p1_285, __p2_285, __p3_285) __extension__ ({ \ |
| 48104 | | float32x2_t __s0_285 = __p0_285; \ |
| 48105 | | float32x2_t __s2_285 = __p2_285; \ |
| 48106 | | float32x2_t __rev0_285; __rev0_285 = __builtin_shufflevector(__s0_285, __s0_285, 1, 0); \ |
| 48107 | | float32x2_t __rev2_285; __rev2_285 = __builtin_shufflevector(__s2_285, __s2_285, 1, 0); \ |
| 48108 | | float32x2_t __ret_285; \ |
| 48109 | | __ret_285 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_285, __p3_285), __rev0_285, __p1_285); \ |
| 48110 | | __ret_285 = __builtin_shufflevector(__ret_285, __ret_285, 1, 0); \ |
| 48111 | | __ret_285; \ |
| 49459 | #define vcopy_lane_f32(__p0_377, __p1_377, __p2_377, __p3_377) __extension__ ({ \ |
| 49460 | float32x2_t __s0_377 = __p0_377; \ |
| 49461 | float32x2_t __s2_377 = __p2_377; \ |
| 49462 | float32x2_t __rev0_377; __rev0_377 = __builtin_shufflevector(__s0_377, __s0_377, 1, 0); \ |
| 49463 | float32x2_t __rev2_377; __rev2_377 = __builtin_shufflevector(__s2_377, __s2_377, 1, 0); \ |
| 49464 | float32x2_t __ret_377; \ |
| 49465 | __ret_377 = __noswap_vset_lane_f32(__noswap_vget_lane_f32(__rev2_377, __p3_377), __rev0_377, __p1_377); \ |
| 49466 | __ret_377 = __builtin_shufflevector(__ret_377, __ret_377, 1, 0); \ |
| 49467 | __ret_377; \ |
| 48112 | 49468 | }) |
| 48113 | 49469 | #endif |
| 48114 | 49470 | |
| 48115 | 49471 | #ifdef __LITTLE_ENDIAN__ |
| 48116 | | #define vcopy_lane_s32(__p0_286, __p1_286, __p2_286, __p3_286) __extension__ ({ \ |
| 48117 | | int32x2_t __s0_286 = __p0_286; \ |
| 48118 | | int32x2_t __s2_286 = __p2_286; \ |
| 48119 | | int32x2_t __ret_286; \ |
| 48120 | | __ret_286 = vset_lane_s32(vget_lane_s32(__s2_286, __p3_286), __s0_286, __p1_286); \ |
| 48121 | | __ret_286; \ |
| 49472 | #define vcopy_lane_s32(__p0_378, __p1_378, __p2_378, __p3_378) __extension__ ({ \ |
| 49473 | int32x2_t __s0_378 = __p0_378; \ |
| 49474 | int32x2_t __s2_378 = __p2_378; \ |
| 49475 | int32x2_t __ret_378; \ |
| 49476 | __ret_378 = vset_lane_s32(vget_lane_s32(__s2_378, __p3_378), __s0_378, __p1_378); \ |
| 49477 | __ret_378; \ |
| 48122 | 49478 | }) |
| 48123 | 49479 | #else |
| 48124 | | #define vcopy_lane_s32(__p0_287, __p1_287, __p2_287, __p3_287) __extension__ ({ \ |
| 48125 | | int32x2_t __s0_287 = __p0_287; \ |
| 48126 | | int32x2_t __s2_287 = __p2_287; \ |
| 48127 | | int32x2_t __rev0_287; __rev0_287 = __builtin_shufflevector(__s0_287, __s0_287, 1, 0); \ |
| 48128 | | int32x2_t __rev2_287; __rev2_287 = __builtin_shufflevector(__s2_287, __s2_287, 1, 0); \ |
| 48129 | | int32x2_t __ret_287; \ |
| 48130 | | __ret_287 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_287, __p3_287), __rev0_287, __p1_287); \ |
| 48131 | | __ret_287 = __builtin_shufflevector(__ret_287, __ret_287, 1, 0); \ |
| 48132 | | __ret_287; \ |
| 49480 | #define vcopy_lane_s32(__p0_379, __p1_379, __p2_379, __p3_379) __extension__ ({ \ |
| 49481 | int32x2_t __s0_379 = __p0_379; \ |
| 49482 | int32x2_t __s2_379 = __p2_379; \ |
| 49483 | int32x2_t __rev0_379; __rev0_379 = __builtin_shufflevector(__s0_379, __s0_379, 1, 0); \ |
| 49484 | int32x2_t __rev2_379; __rev2_379 = __builtin_shufflevector(__s2_379, __s2_379, 1, 0); \ |
| 49485 | int32x2_t __ret_379; \ |
| 49486 | __ret_379 = __noswap_vset_lane_s32(__noswap_vget_lane_s32(__rev2_379, __p3_379), __rev0_379, __p1_379); \ |
| 49487 | __ret_379 = __builtin_shufflevector(__ret_379, __ret_379, 1, 0); \ |
| 49488 | __ret_379; \ |
| 48133 | 49489 | }) |
| 48134 | 49490 | #endif |
| 48135 | 49491 | |
| 48136 | | #define vcopy_lane_s64(__p0_288, __p1_288, __p2_288, __p3_288) __extension__ ({ \ |
| 48137 | | int64x1_t __s0_288 = __p0_288; \ |
| 48138 | | int64x1_t __s2_288 = __p2_288; \ |
| 48139 | | int64x1_t __ret_288; \ |
| 48140 | | __ret_288 = vset_lane_s64(vget_lane_s64(__s2_288, __p3_288), __s0_288, __p1_288); \ |
| 48141 | | __ret_288; \ |
| 49492 | #define vcopy_lane_s64(__p0_380, __p1_380, __p2_380, __p3_380) __extension__ ({ \ |
| 49493 | int64x1_t __s0_380 = __p0_380; \ |
| 49494 | int64x1_t __s2_380 = __p2_380; \ |
| 49495 | int64x1_t __ret_380; \ |
| 49496 | __ret_380 = vset_lane_s64(vget_lane_s64(__s2_380, __p3_380), __s0_380, __p1_380); \ |
| 49497 | __ret_380; \ |
| 48142 | 49498 | }) |
| 48143 | 49499 | #ifdef __LITTLE_ENDIAN__ |
| 48144 | | #define vcopy_lane_s16(__p0_289, __p1_289, __p2_289, __p3_289) __extension__ ({ \ |
| 48145 | | int16x4_t __s0_289 = __p0_289; \ |
| 48146 | | int16x4_t __s2_289 = __p2_289; \ |
| 48147 | | int16x4_t __ret_289; \ |
| 48148 | | __ret_289 = vset_lane_s16(vget_lane_s16(__s2_289, __p3_289), __s0_289, __p1_289); \ |
| 48149 | | __ret_289; \ |
| 49500 | #define vcopy_lane_s16(__p0_381, __p1_381, __p2_381, __p3_381) __extension__ ({ \ |
| 49501 | int16x4_t __s0_381 = __p0_381; \ |
| 49502 | int16x4_t __s2_381 = __p2_381; \ |
| 49503 | int16x4_t __ret_381; \ |
| 49504 | __ret_381 = vset_lane_s16(vget_lane_s16(__s2_381, __p3_381), __s0_381, __p1_381); \ |
| 49505 | __ret_381; \ |
| 48150 | 49506 | }) |
| 48151 | 49507 | #else |
| 48152 | | #define vcopy_lane_s16(__p0_290, __p1_290, __p2_290, __p3_290) __extension__ ({ \ |
| 48153 | | int16x4_t __s0_290 = __p0_290; \ |
| 48154 | | int16x4_t __s2_290 = __p2_290; \ |
| 48155 | | int16x4_t __rev0_290; __rev0_290 = __builtin_shufflevector(__s0_290, __s0_290, 3, 2, 1, 0); \ |
| 48156 | | int16x4_t __rev2_290; __rev2_290 = __builtin_shufflevector(__s2_290, __s2_290, 3, 2, 1, 0); \ |
| 48157 | | int16x4_t __ret_290; \ |
| 48158 | | __ret_290 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_290, __p3_290), __rev0_290, __p1_290); \ |
| 48159 | | __ret_290 = __builtin_shufflevector(__ret_290, __ret_290, 3, 2, 1, 0); \ |
| 48160 | | __ret_290; \ |
| 49508 | #define vcopy_lane_s16(__p0_382, __p1_382, __p2_382, __p3_382) __extension__ ({ \ |
| 49509 | int16x4_t __s0_382 = __p0_382; \ |
| 49510 | int16x4_t __s2_382 = __p2_382; \ |
| 49511 | int16x4_t __rev0_382; __rev0_382 = __builtin_shufflevector(__s0_382, __s0_382, 3, 2, 1, 0); \ |
| 49512 | int16x4_t __rev2_382; __rev2_382 = __builtin_shufflevector(__s2_382, __s2_382, 3, 2, 1, 0); \ |
| 49513 | int16x4_t __ret_382; \ |
| 49514 | __ret_382 = __noswap_vset_lane_s16(__noswap_vget_lane_s16(__rev2_382, __p3_382), __rev0_382, __p1_382); \ |
| 49515 | __ret_382 = __builtin_shufflevector(__ret_382, __ret_382, 3, 2, 1, 0); \ |
| 49516 | __ret_382; \ |
| 48161 | 49517 | }) |
| 48162 | 49518 | #endif |
| 48163 | 49519 | |
| 48164 | 49520 | #ifdef __LITTLE_ENDIAN__ |
| 48165 | | #define vcopyq_laneq_p8(__p0_291, __p1_291, __p2_291, __p3_291) __extension__ ({ \ |
| 48166 | | poly8x16_t __s0_291 = __p0_291; \ |
| 48167 | | poly8x16_t __s2_291 = __p2_291; \ |
| 48168 | | poly8x16_t __ret_291; \ |
| 48169 | | __ret_291 = vsetq_lane_p8(vgetq_lane_p8(__s2_291, __p3_291), __s0_291, __p1_291); \ |
| 48170 | | __ret_291; \ |
| 49521 | #define vcopyq_laneq_p8(__p0_383, __p1_383, __p2_383, __p3_383) __extension__ ({ \ |
| 49522 | poly8x16_t __s0_383 = __p0_383; \ |
| 49523 | poly8x16_t __s2_383 = __p2_383; \ |
| 49524 | poly8x16_t __ret_383; \ |
| 49525 | __ret_383 = vsetq_lane_p8(vgetq_lane_p8(__s2_383, __p3_383), __s0_383, __p1_383); \ |
| 49526 | __ret_383; \ |
| 48171 | 49527 | }) |
| 48172 | 49528 | #else |
| 48173 | | #define vcopyq_laneq_p8(__p0_292, __p1_292, __p2_292, __p3_292) __extension__ ({ \ |
| 48174 | | poly8x16_t __s0_292 = __p0_292; \ |
| 48175 | | poly8x16_t __s2_292 = __p2_292; \ |
| 48176 | | poly8x16_t __rev0_292; __rev0_292 = __builtin_shufflevector(__s0_292, __s0_292, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48177 | | poly8x16_t __rev2_292; __rev2_292 = __builtin_shufflevector(__s2_292, __s2_292, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48178 | | poly8x16_t __ret_292; \ |
| 48179 | | __ret_292 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_292, __p3_292), __rev0_292, __p1_292); \ |
| 48180 | | __ret_292 = __builtin_shufflevector(__ret_292, __ret_292, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48181 | | __ret_292; \ |
| 49529 | #define vcopyq_laneq_p8(__p0_384, __p1_384, __p2_384, __p3_384) __extension__ ({ \ |
| 49530 | poly8x16_t __s0_384 = __p0_384; \ |
| 49531 | poly8x16_t __s2_384 = __p2_384; \ |
| 49532 | poly8x16_t __rev0_384; __rev0_384 = __builtin_shufflevector(__s0_384, __s0_384, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49533 | poly8x16_t __rev2_384; __rev2_384 = __builtin_shufflevector(__s2_384, __s2_384, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49534 | poly8x16_t __ret_384; \ |
| 49535 | __ret_384 = __noswap_vsetq_lane_p8(__noswap_vgetq_lane_p8(__rev2_384, __p3_384), __rev0_384, __p1_384); \ |
| 49536 | __ret_384 = __builtin_shufflevector(__ret_384, __ret_384, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49537 | __ret_384; \ |
| 48182 | 49538 | }) |
| 48183 | 49539 | #endif |
| 48184 | 49540 | |
| 48185 | 49541 | #ifdef __LITTLE_ENDIAN__ |
| 48186 | | #define vcopyq_laneq_p16(__p0_293, __p1_293, __p2_293, __p3_293) __extension__ ({ \ |
| 48187 | | poly16x8_t __s0_293 = __p0_293; \ |
| 48188 | | poly16x8_t __s2_293 = __p2_293; \ |
| 48189 | | poly16x8_t __ret_293; \ |
| 48190 | | __ret_293 = vsetq_lane_p16(vgetq_lane_p16(__s2_293, __p3_293), __s0_293, __p1_293); \ |
| 48191 | | __ret_293; \ |
| 49542 | #define vcopyq_laneq_p16(__p0_385, __p1_385, __p2_385, __p3_385) __extension__ ({ \ |
| 49543 | poly16x8_t __s0_385 = __p0_385; \ |
| 49544 | poly16x8_t __s2_385 = __p2_385; \ |
| 49545 | poly16x8_t __ret_385; \ |
| 49546 | __ret_385 = vsetq_lane_p16(vgetq_lane_p16(__s2_385, __p3_385), __s0_385, __p1_385); \ |
| 49547 | __ret_385; \ |
| 48192 | 49548 | }) |
| 48193 | 49549 | #else |
| 48194 | | #define vcopyq_laneq_p16(__p0_294, __p1_294, __p2_294, __p3_294) __extension__ ({ \ |
| 48195 | | poly16x8_t __s0_294 = __p0_294; \ |
| 48196 | | poly16x8_t __s2_294 = __p2_294; \ |
| 48197 | | poly16x8_t __rev0_294; __rev0_294 = __builtin_shufflevector(__s0_294, __s0_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48198 | | poly16x8_t __rev2_294; __rev2_294 = __builtin_shufflevector(__s2_294, __s2_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48199 | | poly16x8_t __ret_294; \ |
| 48200 | | __ret_294 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_294, __p3_294), __rev0_294, __p1_294); \ |
| 48201 | | __ret_294 = __builtin_shufflevector(__ret_294, __ret_294, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48202 | | __ret_294; \ |
| 49550 | #define vcopyq_laneq_p16(__p0_386, __p1_386, __p2_386, __p3_386) __extension__ ({ \ |
| 49551 | poly16x8_t __s0_386 = __p0_386; \ |
| 49552 | poly16x8_t __s2_386 = __p2_386; \ |
| 49553 | poly16x8_t __rev0_386; __rev0_386 = __builtin_shufflevector(__s0_386, __s0_386, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49554 | poly16x8_t __rev2_386; __rev2_386 = __builtin_shufflevector(__s2_386, __s2_386, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49555 | poly16x8_t __ret_386; \ |
| 49556 | __ret_386 = __noswap_vsetq_lane_p16(__noswap_vgetq_lane_p16(__rev2_386, __p3_386), __rev0_386, __p1_386); \ |
| 49557 | __ret_386 = __builtin_shufflevector(__ret_386, __ret_386, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49558 | __ret_386; \ |
| 48203 | 49559 | }) |
| 48204 | 49560 | #endif |
| 48205 | 49561 | |
| 48206 | 49562 | #ifdef __LITTLE_ENDIAN__ |
| 48207 | | #define vcopyq_laneq_u8(__p0_295, __p1_295, __p2_295, __p3_295) __extension__ ({ \ |
| 48208 | | uint8x16_t __s0_295 = __p0_295; \ |
| 48209 | | uint8x16_t __s2_295 = __p2_295; \ |
| 48210 | | uint8x16_t __ret_295; \ |
| 48211 | | __ret_295 = vsetq_lane_u8(vgetq_lane_u8(__s2_295, __p3_295), __s0_295, __p1_295); \ |
| 48212 | | __ret_295; \ |
| 49563 | #define vcopyq_laneq_u8(__p0_387, __p1_387, __p2_387, __p3_387) __extension__ ({ \ |
| 49564 | uint8x16_t __s0_387 = __p0_387; \ |
| 49565 | uint8x16_t __s2_387 = __p2_387; \ |
| 49566 | uint8x16_t __ret_387; \ |
| 49567 | __ret_387 = vsetq_lane_u8(vgetq_lane_u8(__s2_387, __p3_387), __s0_387, __p1_387); \ |
| 49568 | __ret_387; \ |
| 48213 | 49569 | }) |
| 48214 | 49570 | #else |
| 48215 | | #define vcopyq_laneq_u8(__p0_296, __p1_296, __p2_296, __p3_296) __extension__ ({ \ |
| 48216 | | uint8x16_t __s0_296 = __p0_296; \ |
| 48217 | | uint8x16_t __s2_296 = __p2_296; \ |
| 48218 | | uint8x16_t __rev0_296; __rev0_296 = __builtin_shufflevector(__s0_296, __s0_296, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48219 | | uint8x16_t __rev2_296; __rev2_296 = __builtin_shufflevector(__s2_296, __s2_296, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48220 | | uint8x16_t __ret_296; \ |
| 48221 | | __ret_296 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_296, __p3_296), __rev0_296, __p1_296); \ |
| 48222 | | __ret_296 = __builtin_shufflevector(__ret_296, __ret_296, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48223 | | __ret_296; \ |
| 49571 | #define vcopyq_laneq_u8(__p0_388, __p1_388, __p2_388, __p3_388) __extension__ ({ \ |
| 49572 | uint8x16_t __s0_388 = __p0_388; \ |
| 49573 | uint8x16_t __s2_388 = __p2_388; \ |
| 49574 | uint8x16_t __rev0_388; __rev0_388 = __builtin_shufflevector(__s0_388, __s0_388, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49575 | uint8x16_t __rev2_388; __rev2_388 = __builtin_shufflevector(__s2_388, __s2_388, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49576 | uint8x16_t __ret_388; \ |
| 49577 | __ret_388 = __noswap_vsetq_lane_u8(__noswap_vgetq_lane_u8(__rev2_388, __p3_388), __rev0_388, __p1_388); \ |
| 49578 | __ret_388 = __builtin_shufflevector(__ret_388, __ret_388, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49579 | __ret_388; \ |
| 48224 | 49580 | }) |
| 48225 | 49581 | #endif |
| 48226 | 49582 | |
| 48227 | 49583 | #ifdef __LITTLE_ENDIAN__ |
| 48228 | | #define vcopyq_laneq_u32(__p0_297, __p1_297, __p2_297, __p3_297) __extension__ ({ \ |
| 48229 | | uint32x4_t __s0_297 = __p0_297; \ |
| 48230 | | uint32x4_t __s2_297 = __p2_297; \ |
| 48231 | | uint32x4_t __ret_297; \ |
| 48232 | | __ret_297 = vsetq_lane_u32(vgetq_lane_u32(__s2_297, __p3_297), __s0_297, __p1_297); \ |
| 48233 | | __ret_297; \ |
| 49584 | #define vcopyq_laneq_u32(__p0_389, __p1_389, __p2_389, __p3_389) __extension__ ({ \ |
| 49585 | uint32x4_t __s0_389 = __p0_389; \ |
| 49586 | uint32x4_t __s2_389 = __p2_389; \ |
| 49587 | uint32x4_t __ret_389; \ |
| 49588 | __ret_389 = vsetq_lane_u32(vgetq_lane_u32(__s2_389, __p3_389), __s0_389, __p1_389); \ |
| 49589 | __ret_389; \ |
| 48234 | 49590 | }) |
| 48235 | 49591 | #else |
| 48236 | | #define vcopyq_laneq_u32(__p0_298, __p1_298, __p2_298, __p3_298) __extension__ ({ \ |
| 48237 | | uint32x4_t __s0_298 = __p0_298; \ |
| 48238 | | uint32x4_t __s2_298 = __p2_298; \ |
| 48239 | | uint32x4_t __rev0_298; __rev0_298 = __builtin_shufflevector(__s0_298, __s0_298, 3, 2, 1, 0); \ |
| 48240 | | uint32x4_t __rev2_298; __rev2_298 = __builtin_shufflevector(__s2_298, __s2_298, 3, 2, 1, 0); \ |
| 48241 | | uint32x4_t __ret_298; \ |
| 48242 | | __ret_298 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_298, __p3_298), __rev0_298, __p1_298); \ |
| 48243 | | __ret_298 = __builtin_shufflevector(__ret_298, __ret_298, 3, 2, 1, 0); \ |
| 48244 | | __ret_298; \ |
| 49592 | #define vcopyq_laneq_u32(__p0_390, __p1_390, __p2_390, __p3_390) __extension__ ({ \ |
| 49593 | uint32x4_t __s0_390 = __p0_390; \ |
| 49594 | uint32x4_t __s2_390 = __p2_390; \ |
| 49595 | uint32x4_t __rev0_390; __rev0_390 = __builtin_shufflevector(__s0_390, __s0_390, 3, 2, 1, 0); \ |
| 49596 | uint32x4_t __rev2_390; __rev2_390 = __builtin_shufflevector(__s2_390, __s2_390, 3, 2, 1, 0); \ |
| 49597 | uint32x4_t __ret_390; \ |
| 49598 | __ret_390 = __noswap_vsetq_lane_u32(__noswap_vgetq_lane_u32(__rev2_390, __p3_390), __rev0_390, __p1_390); \ |
| 49599 | __ret_390 = __builtin_shufflevector(__ret_390, __ret_390, 3, 2, 1, 0); \ |
| 49600 | __ret_390; \ |
| 48245 | 49601 | }) |
| 48246 | 49602 | #endif |
| 48247 | 49603 | |
| 48248 | 49604 | #ifdef __LITTLE_ENDIAN__ |
| 48249 | | #define vcopyq_laneq_u64(__p0_299, __p1_299, __p2_299, __p3_299) __extension__ ({ \ |
| 48250 | | uint64x2_t __s0_299 = __p0_299; \ |
| 48251 | | uint64x2_t __s2_299 = __p2_299; \ |
| 48252 | | uint64x2_t __ret_299; \ |
| 48253 | | __ret_299 = vsetq_lane_u64(vgetq_lane_u64(__s2_299, __p3_299), __s0_299, __p1_299); \ |
| 48254 | | __ret_299; \ |
| 49605 | #define vcopyq_laneq_u64(__p0_391, __p1_391, __p2_391, __p3_391) __extension__ ({ \ |
| 49606 | uint64x2_t __s0_391 = __p0_391; \ |
| 49607 | uint64x2_t __s2_391 = __p2_391; \ |
| 49608 | uint64x2_t __ret_391; \ |
| 49609 | __ret_391 = vsetq_lane_u64(vgetq_lane_u64(__s2_391, __p3_391), __s0_391, __p1_391); \ |
| 49610 | __ret_391; \ |
| 48255 | 49611 | }) |
| 48256 | 49612 | #else |
| 48257 | | #define vcopyq_laneq_u64(__p0_300, __p1_300, __p2_300, __p3_300) __extension__ ({ \ |
| 48258 | | uint64x2_t __s0_300 = __p0_300; \ |
| 48259 | | uint64x2_t __s2_300 = __p2_300; \ |
| 48260 | | uint64x2_t __rev0_300; __rev0_300 = __builtin_shufflevector(__s0_300, __s0_300, 1, 0); \ |
| 48261 | | uint64x2_t __rev2_300; __rev2_300 = __builtin_shufflevector(__s2_300, __s2_300, 1, 0); \ |
| 48262 | | uint64x2_t __ret_300; \ |
| 48263 | | __ret_300 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_300, __p3_300), __rev0_300, __p1_300); \ |
| 48264 | | __ret_300 = __builtin_shufflevector(__ret_300, __ret_300, 1, 0); \ |
| 48265 | | __ret_300; \ |
| 49613 | #define vcopyq_laneq_u64(__p0_392, __p1_392, __p2_392, __p3_392) __extension__ ({ \ |
| 49614 | uint64x2_t __s0_392 = __p0_392; \ |
| 49615 | uint64x2_t __s2_392 = __p2_392; \ |
| 49616 | uint64x2_t __rev0_392; __rev0_392 = __builtin_shufflevector(__s0_392, __s0_392, 1, 0); \ |
| 49617 | uint64x2_t __rev2_392; __rev2_392 = __builtin_shufflevector(__s2_392, __s2_392, 1, 0); \ |
| 49618 | uint64x2_t __ret_392; \ |
| 49619 | __ret_392 = __noswap_vsetq_lane_u64(__noswap_vgetq_lane_u64(__rev2_392, __p3_392), __rev0_392, __p1_392); \ |
| 49620 | __ret_392 = __builtin_shufflevector(__ret_392, __ret_392, 1, 0); \ |
| 49621 | __ret_392; \ |
| 48266 | 49622 | }) |
| 48267 | 49623 | #endif |
| 48268 | 49624 | |
| 48269 | 49625 | #ifdef __LITTLE_ENDIAN__ |
| 48270 | | #define vcopyq_laneq_u16(__p0_301, __p1_301, __p2_301, __p3_301) __extension__ ({ \ |
| 48271 | | uint16x8_t __s0_301 = __p0_301; \ |
| 48272 | | uint16x8_t __s2_301 = __p2_301; \ |
| 48273 | | uint16x8_t __ret_301; \ |
| 48274 | | __ret_301 = vsetq_lane_u16(vgetq_lane_u16(__s2_301, __p3_301), __s0_301, __p1_301); \ |
| 48275 | | __ret_301; \ |
| 49626 | #define vcopyq_laneq_u16(__p0_393, __p1_393, __p2_393, __p3_393) __extension__ ({ \ |
| 49627 | uint16x8_t __s0_393 = __p0_393; \ |
| 49628 | uint16x8_t __s2_393 = __p2_393; \ |
| 49629 | uint16x8_t __ret_393; \ |
| 49630 | __ret_393 = vsetq_lane_u16(vgetq_lane_u16(__s2_393, __p3_393), __s0_393, __p1_393); \ |
| 49631 | __ret_393; \ |
| 48276 | 49632 | }) |
| 48277 | 49633 | #else |
| 48278 | | #define vcopyq_laneq_u16(__p0_302, __p1_302, __p2_302, __p3_302) __extension__ ({ \ |
| 48279 | | uint16x8_t __s0_302 = __p0_302; \ |
| 48280 | | uint16x8_t __s2_302 = __p2_302; \ |
| 48281 | | uint16x8_t __rev0_302; __rev0_302 = __builtin_shufflevector(__s0_302, __s0_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48282 | | uint16x8_t __rev2_302; __rev2_302 = __builtin_shufflevector(__s2_302, __s2_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48283 | | uint16x8_t __ret_302; \ |
| 48284 | | __ret_302 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_302, __p3_302), __rev0_302, __p1_302); \ |
| 48285 | | __ret_302 = __builtin_shufflevector(__ret_302, __ret_302, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48286 | | __ret_302; \ |
| 49634 | #define vcopyq_laneq_u16(__p0_394, __p1_394, __p2_394, __p3_394) __extension__ ({ \ |
| 49635 | uint16x8_t __s0_394 = __p0_394; \ |
| 49636 | uint16x8_t __s2_394 = __p2_394; \ |
| 49637 | uint16x8_t __rev0_394; __rev0_394 = __builtin_shufflevector(__s0_394, __s0_394, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49638 | uint16x8_t __rev2_394; __rev2_394 = __builtin_shufflevector(__s2_394, __s2_394, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49639 | uint16x8_t __ret_394; \ |
| 49640 | __ret_394 = __noswap_vsetq_lane_u16(__noswap_vgetq_lane_u16(__rev2_394, __p3_394), __rev0_394, __p1_394); \ |
| 49641 | __ret_394 = __builtin_shufflevector(__ret_394, __ret_394, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49642 | __ret_394; \ |
| 48287 | 49643 | }) |
| 48288 | 49644 | #endif |
| 48289 | 49645 | |
| 48290 | 49646 | #ifdef __LITTLE_ENDIAN__ |
| 48291 | | #define vcopyq_laneq_s8(__p0_303, __p1_303, __p2_303, __p3_303) __extension__ ({ \ |
| 48292 | | int8x16_t __s0_303 = __p0_303; \ |
| 48293 | | int8x16_t __s2_303 = __p2_303; \ |
| 48294 | | int8x16_t __ret_303; \ |
| 48295 | | __ret_303 = vsetq_lane_s8(vgetq_lane_s8(__s2_303, __p3_303), __s0_303, __p1_303); \ |
| 48296 | | __ret_303; \ |
| 49647 | #define vcopyq_laneq_s8(__p0_395, __p1_395, __p2_395, __p3_395) __extension__ ({ \ |
| 49648 | int8x16_t __s0_395 = __p0_395; \ |
| 49649 | int8x16_t __s2_395 = __p2_395; \ |
| 49650 | int8x16_t __ret_395; \ |
| 49651 | __ret_395 = vsetq_lane_s8(vgetq_lane_s8(__s2_395, __p3_395), __s0_395, __p1_395); \ |
| 49652 | __ret_395; \ |
| 48297 | 49653 | }) |
| 48298 | 49654 | #else |
| 48299 | | #define vcopyq_laneq_s8(__p0_304, __p1_304, __p2_304, __p3_304) __extension__ ({ \ |
| 48300 | | int8x16_t __s0_304 = __p0_304; \ |
| 48301 | | int8x16_t __s2_304 = __p2_304; \ |
| 48302 | | int8x16_t __rev0_304; __rev0_304 = __builtin_shufflevector(__s0_304, __s0_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48303 | | int8x16_t __rev2_304; __rev2_304 = __builtin_shufflevector(__s2_304, __s2_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48304 | | int8x16_t __ret_304; \ |
| 48305 | | __ret_304 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_304, __p3_304), __rev0_304, __p1_304); \ |
| 48306 | | __ret_304 = __builtin_shufflevector(__ret_304, __ret_304, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48307 | | __ret_304; \ |
| 49655 | #define vcopyq_laneq_s8(__p0_396, __p1_396, __p2_396, __p3_396) __extension__ ({ \ |
| 49656 | int8x16_t __s0_396 = __p0_396; \ |
| 49657 | int8x16_t __s2_396 = __p2_396; \ |
| 49658 | int8x16_t __rev0_396; __rev0_396 = __builtin_shufflevector(__s0_396, __s0_396, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49659 | int8x16_t __rev2_396; __rev2_396 = __builtin_shufflevector(__s2_396, __s2_396, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49660 | int8x16_t __ret_396; \ |
| 49661 | __ret_396 = __noswap_vsetq_lane_s8(__noswap_vgetq_lane_s8(__rev2_396, __p3_396), __rev0_396, __p1_396); \ |
| 49662 | __ret_396 = __builtin_shufflevector(__ret_396, __ret_396, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49663 | __ret_396; \ |
| 48308 | 49664 | }) |
| 48309 | 49665 | #endif |
| 48310 | 49666 | |
| 48311 | 49667 | #ifdef __LITTLE_ENDIAN__ |
| 48312 | | #define vcopyq_laneq_f32(__p0_305, __p1_305, __p2_305, __p3_305) __extension__ ({ \ |
| 48313 | | float32x4_t __s0_305 = __p0_305; \ |
| 48314 | | float32x4_t __s2_305 = __p2_305; \ |
| 48315 | | float32x4_t __ret_305; \ |
| 48316 | | __ret_305 = vsetq_lane_f32(vgetq_lane_f32(__s2_305, __p3_305), __s0_305, __p1_305); \ |
| 48317 | | __ret_305; \ |
| 49668 | #define vcopyq_laneq_f32(__p0_397, __p1_397, __p2_397, __p3_397) __extension__ ({ \ |
| 49669 | float32x4_t __s0_397 = __p0_397; \ |
| 49670 | float32x4_t __s2_397 = __p2_397; \ |
| 49671 | float32x4_t __ret_397; \ |
| 49672 | __ret_397 = vsetq_lane_f32(vgetq_lane_f32(__s2_397, __p3_397), __s0_397, __p1_397); \ |
| 49673 | __ret_397; \ |
| 48318 | 49674 | }) |
| 48319 | 49675 | #else |
| 48320 | | #define vcopyq_laneq_f32(__p0_306, __p1_306, __p2_306, __p3_306) __extension__ ({ \ |
| 48321 | | float32x4_t __s0_306 = __p0_306; \ |
| 48322 | | float32x4_t __s2_306 = __p2_306; \ |
| 48323 | | float32x4_t __rev0_306; __rev0_306 = __builtin_shufflevector(__s0_306, __s0_306, 3, 2, 1, 0); \ |
| 48324 | | float32x4_t __rev2_306; __rev2_306 = __builtin_shufflevector(__s2_306, __s2_306, 3, 2, 1, 0); \ |
| 48325 | | float32x4_t __ret_306; \ |
| 48326 | | __ret_306 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_306, __p3_306), __rev0_306, __p1_306); \ |
| 48327 | | __ret_306 = __builtin_shufflevector(__ret_306, __ret_306, 3, 2, 1, 0); \ |
| 48328 | | __ret_306; \ |
| 49676 | #define vcopyq_laneq_f32(__p0_398, __p1_398, __p2_398, __p3_398) __extension__ ({ \ |
| 49677 | float32x4_t __s0_398 = __p0_398; \ |
| 49678 | float32x4_t __s2_398 = __p2_398; \ |
| 49679 | float32x4_t __rev0_398; __rev0_398 = __builtin_shufflevector(__s0_398, __s0_398, 3, 2, 1, 0); \ |
| 49680 | float32x4_t __rev2_398; __rev2_398 = __builtin_shufflevector(__s2_398, __s2_398, 3, 2, 1, 0); \ |
| 49681 | float32x4_t __ret_398; \ |
| 49682 | __ret_398 = __noswap_vsetq_lane_f32(__noswap_vgetq_lane_f32(__rev2_398, __p3_398), __rev0_398, __p1_398); \ |
| 49683 | __ret_398 = __builtin_shufflevector(__ret_398, __ret_398, 3, 2, 1, 0); \ |
| 49684 | __ret_398; \ |
| 48329 | 49685 | }) |
| 48330 | 49686 | #endif |
| 48331 | 49687 | |
| 48332 | 49688 | #ifdef __LITTLE_ENDIAN__ |
| 48333 | | #define vcopyq_laneq_s32(__p0_307, __p1_307, __p2_307, __p3_307) __extension__ ({ \ |
| 48334 | | int32x4_t __s0_307 = __p0_307; \ |
| 48335 | | int32x4_t __s2_307 = __p2_307; \ |
| 48336 | | int32x4_t __ret_307; \ |
| 48337 | | __ret_307 = vsetq_lane_s32(vgetq_lane_s32(__s2_307, __p3_307), __s0_307, __p1_307); \ |
| 48338 | | __ret_307; \ |
| 49689 | #define vcopyq_laneq_s32(__p0_399, __p1_399, __p2_399, __p3_399) __extension__ ({ \ |
| 49690 | int32x4_t __s0_399 = __p0_399; \ |
| 49691 | int32x4_t __s2_399 = __p2_399; \ |
| 49692 | int32x4_t __ret_399; \ |
| 49693 | __ret_399 = vsetq_lane_s32(vgetq_lane_s32(__s2_399, __p3_399), __s0_399, __p1_399); \ |
| 49694 | __ret_399; \ |
| 48339 | 49695 | }) |
| 48340 | 49696 | #else |
| 48341 | | #define vcopyq_laneq_s32(__p0_308, __p1_308, __p2_308, __p3_308) __extension__ ({ \ |
| 48342 | | int32x4_t __s0_308 = __p0_308; \ |
| 48343 | | int32x4_t __s2_308 = __p2_308; \ |
| 48344 | | int32x4_t __rev0_308; __rev0_308 = __builtin_shufflevector(__s0_308, __s0_308, 3, 2, 1, 0); \ |
| 48345 | | int32x4_t __rev2_308; __rev2_308 = __builtin_shufflevector(__s2_308, __s2_308, 3, 2, 1, 0); \ |
| 48346 | | int32x4_t __ret_308; \ |
| 48347 | | __ret_308 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_308, __p3_308), __rev0_308, __p1_308); \ |
| 48348 | | __ret_308 = __builtin_shufflevector(__ret_308, __ret_308, 3, 2, 1, 0); \ |
| 48349 | | __ret_308; \ |
| 49697 | #define vcopyq_laneq_s32(__p0_400, __p1_400, __p2_400, __p3_400) __extension__ ({ \ |
| 49698 | int32x4_t __s0_400 = __p0_400; \ |
| 49699 | int32x4_t __s2_400 = __p2_400; \ |
| 49700 | int32x4_t __rev0_400; __rev0_400 = __builtin_shufflevector(__s0_400, __s0_400, 3, 2, 1, 0); \ |
| 49701 | int32x4_t __rev2_400; __rev2_400 = __builtin_shufflevector(__s2_400, __s2_400, 3, 2, 1, 0); \ |
| 49702 | int32x4_t __ret_400; \ |
| 49703 | __ret_400 = __noswap_vsetq_lane_s32(__noswap_vgetq_lane_s32(__rev2_400, __p3_400), __rev0_400, __p1_400); \ |
| 49704 | __ret_400 = __builtin_shufflevector(__ret_400, __ret_400, 3, 2, 1, 0); \ |
| 49705 | __ret_400; \ |
| 48350 | 49706 | }) |
| 48351 | 49707 | #endif |
| 48352 | 49708 | |
| 48353 | 49709 | #ifdef __LITTLE_ENDIAN__ |
| 48354 | | #define vcopyq_laneq_s64(__p0_309, __p1_309, __p2_309, __p3_309) __extension__ ({ \ |
| 48355 | | int64x2_t __s0_309 = __p0_309; \ |
| 48356 | | int64x2_t __s2_309 = __p2_309; \ |
| 48357 | | int64x2_t __ret_309; \ |
| 48358 | | __ret_309 = vsetq_lane_s64(vgetq_lane_s64(__s2_309, __p3_309), __s0_309, __p1_309); \ |
| 48359 | | __ret_309; \ |
| 49710 | #define vcopyq_laneq_s64(__p0_401, __p1_401, __p2_401, __p3_401) __extension__ ({ \ |
| 49711 | int64x2_t __s0_401 = __p0_401; \ |
| 49712 | int64x2_t __s2_401 = __p2_401; \ |
| 49713 | int64x2_t __ret_401; \ |
| 49714 | __ret_401 = vsetq_lane_s64(vgetq_lane_s64(__s2_401, __p3_401), __s0_401, __p1_401); \ |
| 49715 | __ret_401; \ |
| 48360 | 49716 | }) |
| 48361 | 49717 | #else |
| 48362 | | #define vcopyq_laneq_s64(__p0_310, __p1_310, __p2_310, __p3_310) __extension__ ({ \ |
| 48363 | | int64x2_t __s0_310 = __p0_310; \ |
| 48364 | | int64x2_t __s2_310 = __p2_310; \ |
| 48365 | | int64x2_t __rev0_310; __rev0_310 = __builtin_shufflevector(__s0_310, __s0_310, 1, 0); \ |
| 48366 | | int64x2_t __rev2_310; __rev2_310 = __builtin_shufflevector(__s2_310, __s2_310, 1, 0); \ |
| 48367 | | int64x2_t __ret_310; \ |
| 48368 | | __ret_310 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_310, __p3_310), __rev0_310, __p1_310); \ |
| 48369 | | __ret_310 = __builtin_shufflevector(__ret_310, __ret_310, 1, 0); \ |
| 48370 | | __ret_310; \ |
| 49718 | #define vcopyq_laneq_s64(__p0_402, __p1_402, __p2_402, __p3_402) __extension__ ({ \ |
| 49719 | int64x2_t __s0_402 = __p0_402; \ |
| 49720 | int64x2_t __s2_402 = __p2_402; \ |
| 49721 | int64x2_t __rev0_402; __rev0_402 = __builtin_shufflevector(__s0_402, __s0_402, 1, 0); \ |
| 49722 | int64x2_t __rev2_402; __rev2_402 = __builtin_shufflevector(__s2_402, __s2_402, 1, 0); \ |
| 49723 | int64x2_t __ret_402; \ |
| 49724 | __ret_402 = __noswap_vsetq_lane_s64(__noswap_vgetq_lane_s64(__rev2_402, __p3_402), __rev0_402, __p1_402); \ |
| 49725 | __ret_402 = __builtin_shufflevector(__ret_402, __ret_402, 1, 0); \ |
| 49726 | __ret_402; \ |
| 48371 | 49727 | }) |
| 48372 | 49728 | #endif |
| 48373 | 49729 | |
| 48374 | 49730 | #ifdef __LITTLE_ENDIAN__ |
| 48375 | | #define vcopyq_laneq_s16(__p0_311, __p1_311, __p2_311, __p3_311) __extension__ ({ \ |
| 48376 | | int16x8_t __s0_311 = __p0_311; \ |
| 48377 | | int16x8_t __s2_311 = __p2_311; \ |
| 48378 | | int16x8_t __ret_311; \ |
| 48379 | | __ret_311 = vsetq_lane_s16(vgetq_lane_s16(__s2_311, __p3_311), __s0_311, __p1_311); \ |
| 48380 | | __ret_311; \ |
| 49731 | #define vcopyq_laneq_s16(__p0_403, __p1_403, __p2_403, __p3_403) __extension__ ({ \ |
| 49732 | int16x8_t __s0_403 = __p0_403; \ |
| 49733 | int16x8_t __s2_403 = __p2_403; \ |
| 49734 | int16x8_t __ret_403; \ |
| 49735 | __ret_403 = vsetq_lane_s16(vgetq_lane_s16(__s2_403, __p3_403), __s0_403, __p1_403); \ |
| 49736 | __ret_403; \ |
| 48381 | 49737 | }) |
| 48382 | 49738 | #else |
| 48383 | | #define vcopyq_laneq_s16(__p0_312, __p1_312, __p2_312, __p3_312) __extension__ ({ \ |
| 48384 | | int16x8_t __s0_312 = __p0_312; \ |
| 48385 | | int16x8_t __s2_312 = __p2_312; \ |
| 48386 | | int16x8_t __rev0_312; __rev0_312 = __builtin_shufflevector(__s0_312, __s0_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48387 | | int16x8_t __rev2_312; __rev2_312 = __builtin_shufflevector(__s2_312, __s2_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48388 | | int16x8_t __ret_312; \ |
| 48389 | | __ret_312 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_312, __p3_312), __rev0_312, __p1_312); \ |
| 48390 | | __ret_312 = __builtin_shufflevector(__ret_312, __ret_312, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48391 | | __ret_312; \ |
| 49739 | #define vcopyq_laneq_s16(__p0_404, __p1_404, __p2_404, __p3_404) __extension__ ({ \ |
| 49740 | int16x8_t __s0_404 = __p0_404; \ |
| 49741 | int16x8_t __s2_404 = __p2_404; \ |
| 49742 | int16x8_t __rev0_404; __rev0_404 = __builtin_shufflevector(__s0_404, __s0_404, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49743 | int16x8_t __rev2_404; __rev2_404 = __builtin_shufflevector(__s2_404, __s2_404, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49744 | int16x8_t __ret_404; \ |
| 49745 | __ret_404 = __noswap_vsetq_lane_s16(__noswap_vgetq_lane_s16(__rev2_404, __p3_404), __rev0_404, __p1_404); \ |
| 49746 | __ret_404 = __builtin_shufflevector(__ret_404, __ret_404, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49747 | __ret_404; \ |
| 48392 | 49748 | }) |
| 48393 | 49749 | #endif |
| 48394 | 49750 | |
| 48395 | 49751 | #ifdef __LITTLE_ENDIAN__ |
| 48396 | | #define vcopy_laneq_p8(__p0_313, __p1_313, __p2_313, __p3_313) __extension__ ({ \ |
| 48397 | | poly8x8_t __s0_313 = __p0_313; \ |
| 48398 | | poly8x16_t __s2_313 = __p2_313; \ |
| 48399 | | poly8x8_t __ret_313; \ |
| 48400 | | __ret_313 = vset_lane_p8(vgetq_lane_p8(__s2_313, __p3_313), __s0_313, __p1_313); \ |
| 48401 | | __ret_313; \ |
| 49752 | #define vcopy_laneq_p8(__p0_405, __p1_405, __p2_405, __p3_405) __extension__ ({ \ |
| 49753 | poly8x8_t __s0_405 = __p0_405; \ |
| 49754 | poly8x16_t __s2_405 = __p2_405; \ |
| 49755 | poly8x8_t __ret_405; \ |
| 49756 | __ret_405 = vset_lane_p8(vgetq_lane_p8(__s2_405, __p3_405), __s0_405, __p1_405); \ |
| 49757 | __ret_405; \ |
| 48402 | 49758 | }) |
| 48403 | 49759 | #else |
| 48404 | | #define vcopy_laneq_p8(__p0_314, __p1_314, __p2_314, __p3_314) __extension__ ({ \ |
| 48405 | | poly8x8_t __s0_314 = __p0_314; \ |
| 48406 | | poly8x16_t __s2_314 = __p2_314; \ |
| 48407 | | poly8x8_t __rev0_314; __rev0_314 = __builtin_shufflevector(__s0_314, __s0_314, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48408 | | poly8x16_t __rev2_314; __rev2_314 = __builtin_shufflevector(__s2_314, __s2_314, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48409 | | poly8x8_t __ret_314; \ |
| 48410 | | __ret_314 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_314, __p3_314), __rev0_314, __p1_314); \ |
| 48411 | | __ret_314 = __builtin_shufflevector(__ret_314, __ret_314, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48412 | | __ret_314; \ |
| 49760 | #define vcopy_laneq_p8(__p0_406, __p1_406, __p2_406, __p3_406) __extension__ ({ \ |
| 49761 | poly8x8_t __s0_406 = __p0_406; \ |
| 49762 | poly8x16_t __s2_406 = __p2_406; \ |
| 49763 | poly8x8_t __rev0_406; __rev0_406 = __builtin_shufflevector(__s0_406, __s0_406, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49764 | poly8x16_t __rev2_406; __rev2_406 = __builtin_shufflevector(__s2_406, __s2_406, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49765 | poly8x8_t __ret_406; \ |
| 49766 | __ret_406 = __noswap_vset_lane_p8(__noswap_vgetq_lane_p8(__rev2_406, __p3_406), __rev0_406, __p1_406); \ |
| 49767 | __ret_406 = __builtin_shufflevector(__ret_406, __ret_406, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49768 | __ret_406; \ |
| 48413 | 49769 | }) |
| 48414 | 49770 | #endif |
| 48415 | 49771 | |
| 48416 | 49772 | #ifdef __LITTLE_ENDIAN__ |
| 48417 | | #define vcopy_laneq_p16(__p0_315, __p1_315, __p2_315, __p3_315) __extension__ ({ \ |
| 48418 | | poly16x4_t __s0_315 = __p0_315; \ |
| 48419 | | poly16x8_t __s2_315 = __p2_315; \ |
| 48420 | | poly16x4_t __ret_315; \ |
| 48421 | | __ret_315 = vset_lane_p16(vgetq_lane_p16(__s2_315, __p3_315), __s0_315, __p1_315); \ |
| 48422 | | __ret_315; \ |
| 49773 | #define vcopy_laneq_p16(__p0_407, __p1_407, __p2_407, __p3_407) __extension__ ({ \ |
| 49774 | poly16x4_t __s0_407 = __p0_407; \ |
| 49775 | poly16x8_t __s2_407 = __p2_407; \ |
| 49776 | poly16x4_t __ret_407; \ |
| 49777 | __ret_407 = vset_lane_p16(vgetq_lane_p16(__s2_407, __p3_407), __s0_407, __p1_407); \ |
| 49778 | __ret_407; \ |
| 48423 | 49779 | }) |
| 48424 | 49780 | #else |
| 48425 | | #define vcopy_laneq_p16(__p0_316, __p1_316, __p2_316, __p3_316) __extension__ ({ \ |
| 48426 | | poly16x4_t __s0_316 = __p0_316; \ |
| 48427 | | poly16x8_t __s2_316 = __p2_316; \ |
| 48428 | | poly16x4_t __rev0_316; __rev0_316 = __builtin_shufflevector(__s0_316, __s0_316, 3, 2, 1, 0); \ |
| 48429 | | poly16x8_t __rev2_316; __rev2_316 = __builtin_shufflevector(__s2_316, __s2_316, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48430 | | poly16x4_t __ret_316; \ |
| 48431 | | __ret_316 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_316, __p3_316), __rev0_316, __p1_316); \ |
| 48432 | | __ret_316 = __builtin_shufflevector(__ret_316, __ret_316, 3, 2, 1, 0); \ |
| 48433 | | __ret_316; \ |
| 49781 | #define vcopy_laneq_p16(__p0_408, __p1_408, __p2_408, __p3_408) __extension__ ({ \ |
| 49782 | poly16x4_t __s0_408 = __p0_408; \ |
| 49783 | poly16x8_t __s2_408 = __p2_408; \ |
| 49784 | poly16x4_t __rev0_408; __rev0_408 = __builtin_shufflevector(__s0_408, __s0_408, 3, 2, 1, 0); \ |
| 49785 | poly16x8_t __rev2_408; __rev2_408 = __builtin_shufflevector(__s2_408, __s2_408, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49786 | poly16x4_t __ret_408; \ |
| 49787 | __ret_408 = __noswap_vset_lane_p16(__noswap_vgetq_lane_p16(__rev2_408, __p3_408), __rev0_408, __p1_408); \ |
| 49788 | __ret_408 = __builtin_shufflevector(__ret_408, __ret_408, 3, 2, 1, 0); \ |
| 49789 | __ret_408; \ |
| 48434 | 49790 | }) |
| 48435 | 49791 | #endif |
| 48436 | 49792 | |
| 48437 | 49793 | #ifdef __LITTLE_ENDIAN__ |
| 48438 | | #define vcopy_laneq_u8(__p0_317, __p1_317, __p2_317, __p3_317) __extension__ ({ \ |
| 48439 | | uint8x8_t __s0_317 = __p0_317; \ |
| 48440 | | uint8x16_t __s2_317 = __p2_317; \ |
| 48441 | | uint8x8_t __ret_317; \ |
| 48442 | | __ret_317 = vset_lane_u8(vgetq_lane_u8(__s2_317, __p3_317), __s0_317, __p1_317); \ |
| 48443 | | __ret_317; \ |
| 49794 | #define vcopy_laneq_u8(__p0_409, __p1_409, __p2_409, __p3_409) __extension__ ({ \ |
| 49795 | uint8x8_t __s0_409 = __p0_409; \ |
| 49796 | uint8x16_t __s2_409 = __p2_409; \ |
| 49797 | uint8x8_t __ret_409; \ |
| 49798 | __ret_409 = vset_lane_u8(vgetq_lane_u8(__s2_409, __p3_409), __s0_409, __p1_409); \ |
| 49799 | __ret_409; \ |
| 48444 | 49800 | }) |
| 48445 | 49801 | #else |
| 48446 | | #define vcopy_laneq_u8(__p0_318, __p1_318, __p2_318, __p3_318) __extension__ ({ \ |
| 48447 | | uint8x8_t __s0_318 = __p0_318; \ |
| 48448 | | uint8x16_t __s2_318 = __p2_318; \ |
| 48449 | | uint8x8_t __rev0_318; __rev0_318 = __builtin_shufflevector(__s0_318, __s0_318, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48450 | | uint8x16_t __rev2_318; __rev2_318 = __builtin_shufflevector(__s2_318, __s2_318, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48451 | | uint8x8_t __ret_318; \ |
| 48452 | | __ret_318 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_318, __p3_318), __rev0_318, __p1_318); \ |
| 48453 | | __ret_318 = __builtin_shufflevector(__ret_318, __ret_318, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48454 | | __ret_318; \ |
| 49802 | #define vcopy_laneq_u8(__p0_410, __p1_410, __p2_410, __p3_410) __extension__ ({ \ |
| 49803 | uint8x8_t __s0_410 = __p0_410; \ |
| 49804 | uint8x16_t __s2_410 = __p2_410; \ |
| 49805 | uint8x8_t __rev0_410; __rev0_410 = __builtin_shufflevector(__s0_410, __s0_410, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49806 | uint8x16_t __rev2_410; __rev2_410 = __builtin_shufflevector(__s2_410, __s2_410, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49807 | uint8x8_t __ret_410; \ |
| 49808 | __ret_410 = __noswap_vset_lane_u8(__noswap_vgetq_lane_u8(__rev2_410, __p3_410), __rev0_410, __p1_410); \ |
| 49809 | __ret_410 = __builtin_shufflevector(__ret_410, __ret_410, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49810 | __ret_410; \ |
| 48455 | 49811 | }) |
| 48456 | 49812 | #endif |
| 48457 | 49813 | |
| 48458 | 49814 | #ifdef __LITTLE_ENDIAN__ |
| 48459 | | #define vcopy_laneq_u32(__p0_319, __p1_319, __p2_319, __p3_319) __extension__ ({ \ |
| 48460 | | uint32x2_t __s0_319 = __p0_319; \ |
| 48461 | | uint32x4_t __s2_319 = __p2_319; \ |
| 48462 | | uint32x2_t __ret_319; \ |
| 48463 | | __ret_319 = vset_lane_u32(vgetq_lane_u32(__s2_319, __p3_319), __s0_319, __p1_319); \ |
| 48464 | | __ret_319; \ |
| 49815 | #define vcopy_laneq_u32(__p0_411, __p1_411, __p2_411, __p3_411) __extension__ ({ \ |
| 49816 | uint32x2_t __s0_411 = __p0_411; \ |
| 49817 | uint32x4_t __s2_411 = __p2_411; \ |
| 49818 | uint32x2_t __ret_411; \ |
| 49819 | __ret_411 = vset_lane_u32(vgetq_lane_u32(__s2_411, __p3_411), __s0_411, __p1_411); \ |
| 49820 | __ret_411; \ |
| 48465 | 49821 | }) |
| 48466 | 49822 | #else |
| 48467 | | #define vcopy_laneq_u32(__p0_320, __p1_320, __p2_320, __p3_320) __extension__ ({ \ |
| 48468 | | uint32x2_t __s0_320 = __p0_320; \ |
| 48469 | | uint32x4_t __s2_320 = __p2_320; \ |
| 48470 | | uint32x2_t __rev0_320; __rev0_320 = __builtin_shufflevector(__s0_320, __s0_320, 1, 0); \ |
| 48471 | | uint32x4_t __rev2_320; __rev2_320 = __builtin_shufflevector(__s2_320, __s2_320, 3, 2, 1, 0); \ |
| 48472 | | uint32x2_t __ret_320; \ |
| 48473 | | __ret_320 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_320, __p3_320), __rev0_320, __p1_320); \ |
| 48474 | | __ret_320 = __builtin_shufflevector(__ret_320, __ret_320, 1, 0); \ |
| 48475 | | __ret_320; \ |
| 49823 | #define vcopy_laneq_u32(__p0_412, __p1_412, __p2_412, __p3_412) __extension__ ({ \ |
| 49824 | uint32x2_t __s0_412 = __p0_412; \ |
| 49825 | uint32x4_t __s2_412 = __p2_412; \ |
| 49826 | uint32x2_t __rev0_412; __rev0_412 = __builtin_shufflevector(__s0_412, __s0_412, 1, 0); \ |
| 49827 | uint32x4_t __rev2_412; __rev2_412 = __builtin_shufflevector(__s2_412, __s2_412, 3, 2, 1, 0); \ |
| 49828 | uint32x2_t __ret_412; \ |
| 49829 | __ret_412 = __noswap_vset_lane_u32(__noswap_vgetq_lane_u32(__rev2_412, __p3_412), __rev0_412, __p1_412); \ |
| 49830 | __ret_412 = __builtin_shufflevector(__ret_412, __ret_412, 1, 0); \ |
| 49831 | __ret_412; \ |
| 48476 | 49832 | }) |
| 48477 | 49833 | #endif |
| 48478 | 49834 | |
| 48479 | 49835 | #ifdef __LITTLE_ENDIAN__ |
| 48480 | | #define vcopy_laneq_u64(__p0_321, __p1_321, __p2_321, __p3_321) __extension__ ({ \ |
| 48481 | | uint64x1_t __s0_321 = __p0_321; \ |
| 48482 | | uint64x2_t __s2_321 = __p2_321; \ |
| 48483 | | uint64x1_t __ret_321; \ |
| 48484 | | __ret_321 = vset_lane_u64(vgetq_lane_u64(__s2_321, __p3_321), __s0_321, __p1_321); \ |
| 48485 | | __ret_321; \ |
| 49836 | #define vcopy_laneq_u64(__p0_413, __p1_413, __p2_413, __p3_413) __extension__ ({ \ |
| 49837 | uint64x1_t __s0_413 = __p0_413; \ |
| 49838 | uint64x2_t __s2_413 = __p2_413; \ |
| 49839 | uint64x1_t __ret_413; \ |
| 49840 | __ret_413 = vset_lane_u64(vgetq_lane_u64(__s2_413, __p3_413), __s0_413, __p1_413); \ |
| 49841 | __ret_413; \ |
| 48486 | 49842 | }) |
| 48487 | 49843 | #else |
| 48488 | | #define vcopy_laneq_u64(__p0_322, __p1_322, __p2_322, __p3_322) __extension__ ({ \ |
| 48489 | | uint64x1_t __s0_322 = __p0_322; \ |
| 48490 | | uint64x2_t __s2_322 = __p2_322; \ |
| 48491 | | uint64x2_t __rev2_322; __rev2_322 = __builtin_shufflevector(__s2_322, __s2_322, 1, 0); \ |
| 48492 | | uint64x1_t __ret_322; \ |
| 48493 | | __ret_322 = vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_322, __p3_322), __s0_322, __p1_322); \ |
| 48494 | | __ret_322; \ |
| 49844 | #define vcopy_laneq_u64(__p0_414, __p1_414, __p2_414, __p3_414) __extension__ ({ \ |
| 49845 | uint64x1_t __s0_414 = __p0_414; \ |
| 49846 | uint64x2_t __s2_414 = __p2_414; \ |
| 49847 | uint64x2_t __rev2_414; __rev2_414 = __builtin_shufflevector(__s2_414, __s2_414, 1, 0); \ |
| 49848 | uint64x1_t __ret_414; \ |
| 49849 | __ret_414 = vset_lane_u64(__noswap_vgetq_lane_u64(__rev2_414, __p3_414), __s0_414, __p1_414); \ |
| 49850 | __ret_414; \ |
| 48495 | 49851 | }) |
| 48496 | 49852 | #endif |
| 48497 | 49853 | |
| 48498 | 49854 | #ifdef __LITTLE_ENDIAN__ |
| 48499 | | #define vcopy_laneq_u16(__p0_323, __p1_323, __p2_323, __p3_323) __extension__ ({ \ |
| 48500 | | uint16x4_t __s0_323 = __p0_323; \ |
| 48501 | | uint16x8_t __s2_323 = __p2_323; \ |
| 48502 | | uint16x4_t __ret_323; \ |
| 48503 | | __ret_323 = vset_lane_u16(vgetq_lane_u16(__s2_323, __p3_323), __s0_323, __p1_323); \ |
| 48504 | | __ret_323; \ |
| 49855 | #define vcopy_laneq_u16(__p0_415, __p1_415, __p2_415, __p3_415) __extension__ ({ \ |
| 49856 | uint16x4_t __s0_415 = __p0_415; \ |
| 49857 | uint16x8_t __s2_415 = __p2_415; \ |
| 49858 | uint16x4_t __ret_415; \ |
| 49859 | __ret_415 = vset_lane_u16(vgetq_lane_u16(__s2_415, __p3_415), __s0_415, __p1_415); \ |
| 49860 | __ret_415; \ |
| 48505 | 49861 | }) |
| 48506 | 49862 | #else |
| 48507 | | #define vcopy_laneq_u16(__p0_324, __p1_324, __p2_324, __p3_324) __extension__ ({ \ |
| 48508 | | uint16x4_t __s0_324 = __p0_324; \ |
| 48509 | | uint16x8_t __s2_324 = __p2_324; \ |
| 48510 | | uint16x4_t __rev0_324; __rev0_324 = __builtin_shufflevector(__s0_324, __s0_324, 3, 2, 1, 0); \ |
| 48511 | | uint16x8_t __rev2_324; __rev2_324 = __builtin_shufflevector(__s2_324, __s2_324, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48512 | | uint16x4_t __ret_324; \ |
| 48513 | | __ret_324 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_324, __p3_324), __rev0_324, __p1_324); \ |
| 48514 | | __ret_324 = __builtin_shufflevector(__ret_324, __ret_324, 3, 2, 1, 0); \ |
| 48515 | | __ret_324; \ |
| 49863 | #define vcopy_laneq_u16(__p0_416, __p1_416, __p2_416, __p3_416) __extension__ ({ \ |
| 49864 | uint16x4_t __s0_416 = __p0_416; \ |
| 49865 | uint16x8_t __s2_416 = __p2_416; \ |
| 49866 | uint16x4_t __rev0_416; __rev0_416 = __builtin_shufflevector(__s0_416, __s0_416, 3, 2, 1, 0); \ |
| 49867 | uint16x8_t __rev2_416; __rev2_416 = __builtin_shufflevector(__s2_416, __s2_416, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49868 | uint16x4_t __ret_416; \ |
| 49869 | __ret_416 = __noswap_vset_lane_u16(__noswap_vgetq_lane_u16(__rev2_416, __p3_416), __rev0_416, __p1_416); \ |
| 49870 | __ret_416 = __builtin_shufflevector(__ret_416, __ret_416, 3, 2, 1, 0); \ |
| 49871 | __ret_416; \ |
| 48516 | 49872 | }) |
| 48517 | 49873 | #endif |
| 48518 | 49874 | |
| 48519 | 49875 | #ifdef __LITTLE_ENDIAN__ |
| 48520 | | #define vcopy_laneq_s8(__p0_325, __p1_325, __p2_325, __p3_325) __extension__ ({ \ |
| 48521 | | int8x8_t __s0_325 = __p0_325; \ |
| 48522 | | int8x16_t __s2_325 = __p2_325; \ |
| 48523 | | int8x8_t __ret_325; \ |
| 48524 | | __ret_325 = vset_lane_s8(vgetq_lane_s8(__s2_325, __p3_325), __s0_325, __p1_325); \ |
| 48525 | | __ret_325; \ |
| 49876 | #define vcopy_laneq_s8(__p0_417, __p1_417, __p2_417, __p3_417) __extension__ ({ \ |
| 49877 | int8x8_t __s0_417 = __p0_417; \ |
| 49878 | int8x16_t __s2_417 = __p2_417; \ |
| 49879 | int8x8_t __ret_417; \ |
| 49880 | __ret_417 = vset_lane_s8(vgetq_lane_s8(__s2_417, __p3_417), __s0_417, __p1_417); \ |
| 49881 | __ret_417; \ |
| 48526 | 49882 | }) |
| 48527 | 49883 | #else |
| 48528 | | #define vcopy_laneq_s8(__p0_326, __p1_326, __p2_326, __p3_326) __extension__ ({ \ |
| 48529 | | int8x8_t __s0_326 = __p0_326; \ |
| 48530 | | int8x16_t __s2_326 = __p2_326; \ |
| 48531 | | int8x8_t __rev0_326; __rev0_326 = __builtin_shufflevector(__s0_326, __s0_326, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48532 | | int8x16_t __rev2_326; __rev2_326 = __builtin_shufflevector(__s2_326, __s2_326, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48533 | | int8x8_t __ret_326; \ |
| 48534 | | __ret_326 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_326, __p3_326), __rev0_326, __p1_326); \ |
| 48535 | | __ret_326 = __builtin_shufflevector(__ret_326, __ret_326, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48536 | | __ret_326; \ |
| 49884 | #define vcopy_laneq_s8(__p0_418, __p1_418, __p2_418, __p3_418) __extension__ ({ \ |
| 49885 | int8x8_t __s0_418 = __p0_418; \ |
| 49886 | int8x16_t __s2_418 = __p2_418; \ |
| 49887 | int8x8_t __rev0_418; __rev0_418 = __builtin_shufflevector(__s0_418, __s0_418, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49888 | int8x16_t __rev2_418; __rev2_418 = __builtin_shufflevector(__s2_418, __s2_418, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49889 | int8x8_t __ret_418; \ |
| 49890 | __ret_418 = __noswap_vset_lane_s8(__noswap_vgetq_lane_s8(__rev2_418, __p3_418), __rev0_418, __p1_418); \ |
| 49891 | __ret_418 = __builtin_shufflevector(__ret_418, __ret_418, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49892 | __ret_418; \ |
| 48537 | 49893 | }) |
| 48538 | 49894 | #endif |
| 48539 | 49895 | |
| 48540 | 49896 | #ifdef __LITTLE_ENDIAN__ |
| 48541 | | #define vcopy_laneq_f32(__p0_327, __p1_327, __p2_327, __p3_327) __extension__ ({ \ |
| 48542 | | float32x2_t __s0_327 = __p0_327; \ |
| 48543 | | float32x4_t __s2_327 = __p2_327; \ |
| 48544 | | float32x2_t __ret_327; \ |
| 48545 | | __ret_327 = vset_lane_f32(vgetq_lane_f32(__s2_327, __p3_327), __s0_327, __p1_327); \ |
| 48546 | | __ret_327; \ |
| 49897 | #define vcopy_laneq_f32(__p0_419, __p1_419, __p2_419, __p3_419) __extension__ ({ \ |
| 49898 | float32x2_t __s0_419 = __p0_419; \ |
| 49899 | float32x4_t __s2_419 = __p2_419; \ |
| 49900 | float32x2_t __ret_419; \ |
| 49901 | __ret_419 = vset_lane_f32(vgetq_lane_f32(__s2_419, __p3_419), __s0_419, __p1_419); \ |
| 49902 | __ret_419; \ |
| 48547 | 49903 | }) |
| 48548 | 49904 | #else |
| 48549 | | #define vcopy_laneq_f32(__p0_328, __p1_328, __p2_328, __p3_328) __extension__ ({ \ |
| 48550 | | float32x2_t __s0_328 = __p0_328; \ |
| 48551 | | float32x4_t __s2_328 = __p2_328; \ |
| 48552 | | float32x2_t __rev0_328; __rev0_328 = __builtin_shufflevector(__s0_328, __s0_328, 1, 0); \ |
| 48553 | | float32x4_t __rev2_328; __rev2_328 = __builtin_shufflevector(__s2_328, __s2_328, 3, 2, 1, 0); \ |
| 48554 | | float32x2_t __ret_328; \ |
| 48555 | | __ret_328 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_328, __p3_328), __rev0_328, __p1_328); \ |
| 48556 | | __ret_328 = __builtin_shufflevector(__ret_328, __ret_328, 1, 0); \ |
| 48557 | | __ret_328; \ |
| 49905 | #define vcopy_laneq_f32(__p0_420, __p1_420, __p2_420, __p3_420) __extension__ ({ \ |
| 49906 | float32x2_t __s0_420 = __p0_420; \ |
| 49907 | float32x4_t __s2_420 = __p2_420; \ |
| 49908 | float32x2_t __rev0_420; __rev0_420 = __builtin_shufflevector(__s0_420, __s0_420, 1, 0); \ |
| 49909 | float32x4_t __rev2_420; __rev2_420 = __builtin_shufflevector(__s2_420, __s2_420, 3, 2, 1, 0); \ |
| 49910 | float32x2_t __ret_420; \ |
| 49911 | __ret_420 = __noswap_vset_lane_f32(__noswap_vgetq_lane_f32(__rev2_420, __p3_420), __rev0_420, __p1_420); \ |
| 49912 | __ret_420 = __builtin_shufflevector(__ret_420, __ret_420, 1, 0); \ |
| 49913 | __ret_420; \ |
| 48558 | 49914 | }) |
| 48559 | 49915 | #endif |
| 48560 | 49916 | |
| 48561 | 49917 | #ifdef __LITTLE_ENDIAN__ |
| 48562 | | #define vcopy_laneq_s32(__p0_329, __p1_329, __p2_329, __p3_329) __extension__ ({ \ |
| 48563 | | int32x2_t __s0_329 = __p0_329; \ |
| 48564 | | int32x4_t __s2_329 = __p2_329; \ |
| 48565 | | int32x2_t __ret_329; \ |
| 48566 | | __ret_329 = vset_lane_s32(vgetq_lane_s32(__s2_329, __p3_329), __s0_329, __p1_329); \ |
| 48567 | | __ret_329; \ |
| 49918 | #define vcopy_laneq_s32(__p0_421, __p1_421, __p2_421, __p3_421) __extension__ ({ \ |
| 49919 | int32x2_t __s0_421 = __p0_421; \ |
| 49920 | int32x4_t __s2_421 = __p2_421; \ |
| 49921 | int32x2_t __ret_421; \ |
| 49922 | __ret_421 = vset_lane_s32(vgetq_lane_s32(__s2_421, __p3_421), __s0_421, __p1_421); \ |
| 49923 | __ret_421; \ |
| 48568 | 49924 | }) |
| 48569 | 49925 | #else |
| 48570 | | #define vcopy_laneq_s32(__p0_330, __p1_330, __p2_330, __p3_330) __extension__ ({ \ |
| 48571 | | int32x2_t __s0_330 = __p0_330; \ |
| 48572 | | int32x4_t __s2_330 = __p2_330; \ |
| 48573 | | int32x2_t __rev0_330; __rev0_330 = __builtin_shufflevector(__s0_330, __s0_330, 1, 0); \ |
| 48574 | | int32x4_t __rev2_330; __rev2_330 = __builtin_shufflevector(__s2_330, __s2_330, 3, 2, 1, 0); \ |
| 48575 | | int32x2_t __ret_330; \ |
| 48576 | | __ret_330 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_330, __p3_330), __rev0_330, __p1_330); \ |
| 48577 | | __ret_330 = __builtin_shufflevector(__ret_330, __ret_330, 1, 0); \ |
| 48578 | | __ret_330; \ |
| 49926 | #define vcopy_laneq_s32(__p0_422, __p1_422, __p2_422, __p3_422) __extension__ ({ \ |
| 49927 | int32x2_t __s0_422 = __p0_422; \ |
| 49928 | int32x4_t __s2_422 = __p2_422; \ |
| 49929 | int32x2_t __rev0_422; __rev0_422 = __builtin_shufflevector(__s0_422, __s0_422, 1, 0); \ |
| 49930 | int32x4_t __rev2_422; __rev2_422 = __builtin_shufflevector(__s2_422, __s2_422, 3, 2, 1, 0); \ |
| 49931 | int32x2_t __ret_422; \ |
| 49932 | __ret_422 = __noswap_vset_lane_s32(__noswap_vgetq_lane_s32(__rev2_422, __p3_422), __rev0_422, __p1_422); \ |
| 49933 | __ret_422 = __builtin_shufflevector(__ret_422, __ret_422, 1, 0); \ |
| 49934 | __ret_422; \ |
| 48579 | 49935 | }) |
| 48580 | 49936 | #endif |
| 48581 | 49937 | |
| 48582 | 49938 | #ifdef __LITTLE_ENDIAN__ |
| 48583 | | #define vcopy_laneq_s64(__p0_331, __p1_331, __p2_331, __p3_331) __extension__ ({ \ |
| 48584 | | int64x1_t __s0_331 = __p0_331; \ |
| 48585 | | int64x2_t __s2_331 = __p2_331; \ |
| 48586 | | int64x1_t __ret_331; \ |
| 48587 | | __ret_331 = vset_lane_s64(vgetq_lane_s64(__s2_331, __p3_331), __s0_331, __p1_331); \ |
| 48588 | | __ret_331; \ |
| 49939 | #define vcopy_laneq_s64(__p0_423, __p1_423, __p2_423, __p3_423) __extension__ ({ \ |
| 49940 | int64x1_t __s0_423 = __p0_423; \ |
| 49941 | int64x2_t __s2_423 = __p2_423; \ |
| 49942 | int64x1_t __ret_423; \ |
| 49943 | __ret_423 = vset_lane_s64(vgetq_lane_s64(__s2_423, __p3_423), __s0_423, __p1_423); \ |
| 49944 | __ret_423; \ |
| 48589 | 49945 | }) |
| 48590 | 49946 | #else |
| 48591 | | #define vcopy_laneq_s64(__p0_332, __p1_332, __p2_332, __p3_332) __extension__ ({ \ |
| 48592 | | int64x1_t __s0_332 = __p0_332; \ |
| 48593 | | int64x2_t __s2_332 = __p2_332; \ |
| 48594 | | int64x2_t __rev2_332; __rev2_332 = __builtin_shufflevector(__s2_332, __s2_332, 1, 0); \ |
| 48595 | | int64x1_t __ret_332; \ |
| 48596 | | __ret_332 = vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_332, __p3_332), __s0_332, __p1_332); \ |
| 48597 | | __ret_332; \ |
| 49947 | #define vcopy_laneq_s64(__p0_424, __p1_424, __p2_424, __p3_424) __extension__ ({ \ |
| 49948 | int64x1_t __s0_424 = __p0_424; \ |
| 49949 | int64x2_t __s2_424 = __p2_424; \ |
| 49950 | int64x2_t __rev2_424; __rev2_424 = __builtin_shufflevector(__s2_424, __s2_424, 1, 0); \ |
| 49951 | int64x1_t __ret_424; \ |
| 49952 | __ret_424 = vset_lane_s64(__noswap_vgetq_lane_s64(__rev2_424, __p3_424), __s0_424, __p1_424); \ |
| 49953 | __ret_424; \ |
| 48598 | 49954 | }) |
| 48599 | 49955 | #endif |
| 48600 | 49956 | |
| 48601 | 49957 | #ifdef __LITTLE_ENDIAN__ |
| 48602 | | #define vcopy_laneq_s16(__p0_333, __p1_333, __p2_333, __p3_333) __extension__ ({ \ |
| 48603 | | int16x4_t __s0_333 = __p0_333; \ |
| 48604 | | int16x8_t __s2_333 = __p2_333; \ |
| 48605 | | int16x4_t __ret_333; \ |
| 48606 | | __ret_333 = vset_lane_s16(vgetq_lane_s16(__s2_333, __p3_333), __s0_333, __p1_333); \ |
| 48607 | | __ret_333; \ |
| 49958 | #define vcopy_laneq_s16(__p0_425, __p1_425, __p2_425, __p3_425) __extension__ ({ \ |
| 49959 | int16x4_t __s0_425 = __p0_425; \ |
| 49960 | int16x8_t __s2_425 = __p2_425; \ |
| 49961 | int16x4_t __ret_425; \ |
| 49962 | __ret_425 = vset_lane_s16(vgetq_lane_s16(__s2_425, __p3_425), __s0_425, __p1_425); \ |
| 49963 | __ret_425; \ |
| 48608 | 49964 | }) |
| 48609 | 49965 | #else |
| 48610 | | #define vcopy_laneq_s16(__p0_334, __p1_334, __p2_334, __p3_334) __extension__ ({ \ |
| 48611 | | int16x4_t __s0_334 = __p0_334; \ |
| 48612 | | int16x8_t __s2_334 = __p2_334; \ |
| 48613 | | int16x4_t __rev0_334; __rev0_334 = __builtin_shufflevector(__s0_334, __s0_334, 3, 2, 1, 0); \ |
| 48614 | | int16x8_t __rev2_334; __rev2_334 = __builtin_shufflevector(__s2_334, __s2_334, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 48615 | | int16x4_t __ret_334; \ |
| 48616 | | __ret_334 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_334, __p3_334), __rev0_334, __p1_334); \ |
| 48617 | | __ret_334 = __builtin_shufflevector(__ret_334, __ret_334, 3, 2, 1, 0); \ |
| 48618 | | __ret_334; \ |
| 49966 | #define vcopy_laneq_s16(__p0_426, __p1_426, __p2_426, __p3_426) __extension__ ({ \ |
| 49967 | int16x4_t __s0_426 = __p0_426; \ |
| 49968 | int16x8_t __s2_426 = __p2_426; \ |
| 49969 | int16x4_t __rev0_426; __rev0_426 = __builtin_shufflevector(__s0_426, __s0_426, 3, 2, 1, 0); \ |
| 49970 | int16x8_t __rev2_426; __rev2_426 = __builtin_shufflevector(__s2_426, __s2_426, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49971 | int16x4_t __ret_426; \ |
| 49972 | __ret_426 = __noswap_vset_lane_s16(__noswap_vgetq_lane_s16(__rev2_426, __p3_426), __rev0_426, __p1_426); \ |
| 49973 | __ret_426 = __builtin_shufflevector(__ret_426, __ret_426, 3, 2, 1, 0); \ |
| 49974 | __ret_426; \ |
| 48619 | 49975 | }) |
| 48620 | 49976 | #endif |
| 48621 | 49977 | |
| ... | ... | @@ -49357,85 +50713,85 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 49357 | 50713 | }) |
| 49358 | 50714 | #endif |
| 49359 | 50715 | |
| 49360 | | #define vdup_lane_p64(__p0_335, __p1_335) __extension__ ({ \ |
| 49361 | | poly64x1_t __s0_335 = __p0_335; \ |
| 49362 | | poly64x1_t __ret_335; \ |
| 49363 | | __ret_335 = splat_lane_p64(__s0_335, __p1_335); \ |
| 49364 | | __ret_335; \ |
| 50716 | #define vdup_lane_p64(__p0_427, __p1_427) __extension__ ({ \ |
| 50717 | poly64x1_t __s0_427 = __p0_427; \ |
| 50718 | poly64x1_t __ret_427; \ |
| 50719 | __ret_427 = splat_lane_p64(__s0_427, __p1_427); \ |
| 50720 | __ret_427; \ |
| 49365 | 50721 | }) |
| 49366 | 50722 | #ifdef __LITTLE_ENDIAN__ |
| 49367 | | #define vdupq_lane_p64(__p0_336, __p1_336) __extension__ ({ \ |
| 49368 | | poly64x1_t __s0_336 = __p0_336; \ |
| 49369 | | poly64x2_t __ret_336; \ |
| 49370 | | __ret_336 = splatq_lane_p64(__s0_336, __p1_336); \ |
| 49371 | | __ret_336; \ |
| 50723 | #define vdupq_lane_p64(__p0_428, __p1_428) __extension__ ({ \ |
| 50724 | poly64x1_t __s0_428 = __p0_428; \ |
| 50725 | poly64x2_t __ret_428; \ |
| 50726 | __ret_428 = splatq_lane_p64(__s0_428, __p1_428); \ |
| 50727 | __ret_428; \ |
| 49372 | 50728 | }) |
| 49373 | 50729 | #else |
| 49374 | | #define vdupq_lane_p64(__p0_337, __p1_337) __extension__ ({ \ |
| 49375 | | poly64x1_t __s0_337 = __p0_337; \ |
| 49376 | | poly64x2_t __ret_337; \ |
| 49377 | | __ret_337 = __noswap_splatq_lane_p64(__s0_337, __p1_337); \ |
| 49378 | | __ret_337 = __builtin_shufflevector(__ret_337, __ret_337, 1, 0); \ |
| 49379 | | __ret_337; \ |
| 50730 | #define vdupq_lane_p64(__p0_429, __p1_429) __extension__ ({ \ |
| 50731 | poly64x1_t __s0_429 = __p0_429; \ |
| 50732 | poly64x2_t __ret_429; \ |
| 50733 | __ret_429 = __noswap_splatq_lane_p64(__s0_429, __p1_429); \ |
| 50734 | __ret_429 = __builtin_shufflevector(__ret_429, __ret_429, 1, 0); \ |
| 50735 | __ret_429; \ |
| 49380 | 50736 | }) |
| 49381 | 50737 | #endif |
| 49382 | 50738 | |
| 49383 | 50739 | #ifdef __LITTLE_ENDIAN__ |
| 49384 | | #define vdupq_lane_f64(__p0_338, __p1_338) __extension__ ({ \ |
| 49385 | | float64x1_t __s0_338 = __p0_338; \ |
| 49386 | | float64x2_t __ret_338; \ |
| 49387 | | __ret_338 = splatq_lane_f64(__s0_338, __p1_338); \ |
| 49388 | | __ret_338; \ |
| 50740 | #define vdupq_lane_f64(__p0_430, __p1_430) __extension__ ({ \ |
| 50741 | float64x1_t __s0_430 = __p0_430; \ |
| 50742 | float64x2_t __ret_430; \ |
| 50743 | __ret_430 = splatq_lane_f64(__s0_430, __p1_430); \ |
| 50744 | __ret_430; \ |
| 49389 | 50745 | }) |
| 49390 | 50746 | #else |
| 49391 | | #define vdupq_lane_f64(__p0_339, __p1_339) __extension__ ({ \ |
| 49392 | | float64x1_t __s0_339 = __p0_339; \ |
| 49393 | | float64x2_t __ret_339; \ |
| 49394 | | __ret_339 = __noswap_splatq_lane_f64(__s0_339, __p1_339); \ |
| 49395 | | __ret_339 = __builtin_shufflevector(__ret_339, __ret_339, 1, 0); \ |
| 49396 | | __ret_339; \ |
| 50747 | #define vdupq_lane_f64(__p0_431, __p1_431) __extension__ ({ \ |
| 50748 | float64x1_t __s0_431 = __p0_431; \ |
| 50749 | float64x2_t __ret_431; \ |
| 50750 | __ret_431 = __noswap_splatq_lane_f64(__s0_431, __p1_431); \ |
| 50751 | __ret_431 = __builtin_shufflevector(__ret_431, __ret_431, 1, 0); \ |
| 50752 | __ret_431; \ |
| 49397 | 50753 | }) |
| 49398 | 50754 | #endif |
| 49399 | 50755 | |
| 49400 | 50756 | #ifdef __LITTLE_ENDIAN__ |
| 49401 | | #define vdupq_lane_f16(__p0_340, __p1_340) __extension__ ({ \ |
| 49402 | | float16x4_t __s0_340 = __p0_340; \ |
| 49403 | | float16x8_t __ret_340; \ |
| 49404 | | __ret_340 = splatq_lane_f16(__s0_340, __p1_340); \ |
| 49405 | | __ret_340; \ |
| 50757 | #define vdupq_lane_f16(__p0_432, __p1_432) __extension__ ({ \ |
| 50758 | float16x4_t __s0_432 = __p0_432; \ |
| 50759 | float16x8_t __ret_432; \ |
| 50760 | __ret_432 = splatq_lane_f16(__s0_432, __p1_432); \ |
| 50761 | __ret_432; \ |
| 49406 | 50762 | }) |
| 49407 | 50763 | #else |
| 49408 | | #define vdupq_lane_f16(__p0_341, __p1_341) __extension__ ({ \ |
| 49409 | | float16x4_t __s0_341 = __p0_341; \ |
| 49410 | | float16x4_t __rev0_341; __rev0_341 = __builtin_shufflevector(__s0_341, __s0_341, 3, 2, 1, 0); \ |
| 49411 | | float16x8_t __ret_341; \ |
| 49412 | | __ret_341 = __noswap_splatq_lane_f16(__rev0_341, __p1_341); \ |
| 49413 | | __ret_341 = __builtin_shufflevector(__ret_341, __ret_341, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49414 | | __ret_341; \ |
| 50764 | #define vdupq_lane_f16(__p0_433, __p1_433) __extension__ ({ \ |
| 50765 | float16x4_t __s0_433 = __p0_433; \ |
| 50766 | float16x4_t __rev0_433; __rev0_433 = __builtin_shufflevector(__s0_433, __s0_433, 3, 2, 1, 0); \ |
| 50767 | float16x8_t __ret_433; \ |
| 50768 | __ret_433 = __noswap_splatq_lane_f16(__rev0_433, __p1_433); \ |
| 50769 | __ret_433 = __builtin_shufflevector(__ret_433, __ret_433, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50770 | __ret_433; \ |
| 49415 | 50771 | }) |
| 49416 | 50772 | #endif |
| 49417 | 50773 | |
| 49418 | | #define vdup_lane_f64(__p0_342, __p1_342) __extension__ ({ \ |
| 49419 | | float64x1_t __s0_342 = __p0_342; \ |
| 49420 | | float64x1_t __ret_342; \ |
| 49421 | | __ret_342 = splat_lane_f64(__s0_342, __p1_342); \ |
| 49422 | | __ret_342; \ |
| 50774 | #define vdup_lane_f64(__p0_434, __p1_434) __extension__ ({ \ |
| 50775 | float64x1_t __s0_434 = __p0_434; \ |
| 50776 | float64x1_t __ret_434; \ |
| 50777 | __ret_434 = splat_lane_f64(__s0_434, __p1_434); \ |
| 50778 | __ret_434; \ |
| 49423 | 50779 | }) |
| 49424 | 50780 | #ifdef __LITTLE_ENDIAN__ |
| 49425 | | #define vdup_lane_f16(__p0_343, __p1_343) __extension__ ({ \ |
| 49426 | | float16x4_t __s0_343 = __p0_343; \ |
| 49427 | | float16x4_t __ret_343; \ |
| 49428 | | __ret_343 = splat_lane_f16(__s0_343, __p1_343); \ |
| 49429 | | __ret_343; \ |
| 50781 | #define vdup_lane_f16(__p0_435, __p1_435) __extension__ ({ \ |
| 50782 | float16x4_t __s0_435 = __p0_435; \ |
| 50783 | float16x4_t __ret_435; \ |
| 50784 | __ret_435 = splat_lane_f16(__s0_435, __p1_435); \ |
| 50785 | __ret_435; \ |
| 49430 | 50786 | }) |
| 49431 | 50787 | #else |
| 49432 | | #define vdup_lane_f16(__p0_344, __p1_344) __extension__ ({ \ |
| 49433 | | float16x4_t __s0_344 = __p0_344; \ |
| 49434 | | float16x4_t __rev0_344; __rev0_344 = __builtin_shufflevector(__s0_344, __s0_344, 3, 2, 1, 0); \ |
| 49435 | | float16x4_t __ret_344; \ |
| 49436 | | __ret_344 = __noswap_splat_lane_f16(__rev0_344, __p1_344); \ |
| 49437 | | __ret_344 = __builtin_shufflevector(__ret_344, __ret_344, 3, 2, 1, 0); \ |
| 49438 | | __ret_344; \ |
| 50788 | #define vdup_lane_f16(__p0_436, __p1_436) __extension__ ({ \ |
| 50789 | float16x4_t __s0_436 = __p0_436; \ |
| 50790 | float16x4_t __rev0_436; __rev0_436 = __builtin_shufflevector(__s0_436, __s0_436, 3, 2, 1, 0); \ |
| 50791 | float16x4_t __ret_436; \ |
| 50792 | __ret_436 = __noswap_splat_lane_f16(__rev0_436, __p1_436); \ |
| 50793 | __ret_436 = __builtin_shufflevector(__ret_436, __ret_436, 3, 2, 1, 0); \ |
| 50794 | __ret_436; \ |
| 49439 | 50795 | }) |
| 49440 | 50796 | #endif |
| 49441 | 50797 | |
| ... | ... | @@ -49644,502 +51000,502 @@ __ai float32x2_t vdiv_f32(float32x2_t __p0, float32x2_t __p1) { |
| 49644 | 51000 | #endif |
| 49645 | 51001 | |
| 49646 | 51002 | #ifdef __LITTLE_ENDIAN__ |
| 49647 | | #define vdup_laneq_p8(__p0_345, __p1_345) __extension__ ({ \ |
| 49648 | | poly8x16_t __s0_345 = __p0_345; \ |
| 49649 | | poly8x8_t __ret_345; \ |
| 49650 | | __ret_345 = splat_laneq_p8(__s0_345, __p1_345); \ |
| 49651 | | __ret_345; \ |
| 51003 | #define vdup_laneq_p8(__p0_437, __p1_437) __extension__ ({ \ |
| 51004 | poly8x16_t __s0_437 = __p0_437; \ |
| 51005 | poly8x8_t __ret_437; \ |
| 51006 | __ret_437 = splat_laneq_p8(__s0_437, __p1_437); \ |
| 51007 | __ret_437; \ |
| 49652 | 51008 | }) |
| 49653 | 51009 | #else |
| 49654 | | #define vdup_laneq_p8(__p0_346, __p1_346) __extension__ ({ \ |
| 49655 | | poly8x16_t __s0_346 = __p0_346; \ |
| 49656 | | poly8x16_t __rev0_346; __rev0_346 = __builtin_shufflevector(__s0_346, __s0_346, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49657 | | poly8x8_t __ret_346; \ |
| 49658 | | __ret_346 = __noswap_splat_laneq_p8(__rev0_346, __p1_346); \ |
| 49659 | | __ret_346 = __builtin_shufflevector(__ret_346, __ret_346, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49660 | | __ret_346; \ |
| 51010 | #define vdup_laneq_p8(__p0_438, __p1_438) __extension__ ({ \ |
| 51011 | poly8x16_t __s0_438 = __p0_438; \ |
| 51012 | poly8x16_t __rev0_438; __rev0_438 = __builtin_shufflevector(__s0_438, __s0_438, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51013 | poly8x8_t __ret_438; \ |
| 51014 | __ret_438 = __noswap_splat_laneq_p8(__rev0_438, __p1_438); \ |
| 51015 | __ret_438 = __builtin_shufflevector(__ret_438, __ret_438, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51016 | __ret_438; \ |
| 49661 | 51017 | }) |
| 49662 | 51018 | #endif |
| 49663 | 51019 | |
| 49664 | 51020 | #ifdef __LITTLE_ENDIAN__ |
| 49665 | | #define vdup_laneq_p64(__p0_347, __p1_347) __extension__ ({ \ |
| 49666 | | poly64x2_t __s0_347 = __p0_347; \ |
| 49667 | | poly64x1_t __ret_347; \ |
| 49668 | | __ret_347 = splat_laneq_p64(__s0_347, __p1_347); \ |
| 49669 | | __ret_347; \ |
| 51021 | #define vdup_laneq_p64(__p0_439, __p1_439) __extension__ ({ \ |
| 51022 | poly64x2_t __s0_439 = __p0_439; \ |
| 51023 | poly64x1_t __ret_439; \ |
| 51024 | __ret_439 = splat_laneq_p64(__s0_439, __p1_439); \ |
| 51025 | __ret_439; \ |
| 49670 | 51026 | }) |
| 49671 | 51027 | #else |
| 49672 | | #define vdup_laneq_p64(__p0_348, __p1_348) __extension__ ({ \ |
| 49673 | | poly64x2_t __s0_348 = __p0_348; \ |
| 49674 | | poly64x2_t __rev0_348; __rev0_348 = __builtin_shufflevector(__s0_348, __s0_348, 1, 0); \ |
| 49675 | | poly64x1_t __ret_348; \ |
| 49676 | | __ret_348 = __noswap_splat_laneq_p64(__rev0_348, __p1_348); \ |
| 49677 | | __ret_348; \ |
| 51028 | #define vdup_laneq_p64(__p0_440, __p1_440) __extension__ ({ \ |
| 51029 | poly64x2_t __s0_440 = __p0_440; \ |
| 51030 | poly64x2_t __rev0_440; __rev0_440 = __builtin_shufflevector(__s0_440, __s0_440, 1, 0); \ |
| 51031 | poly64x1_t __ret_440; \ |
| 51032 | __ret_440 = __noswap_splat_laneq_p64(__rev0_440, __p1_440); \ |
| 51033 | __ret_440; \ |
| 49678 | 51034 | }) |
| 49679 | 51035 | #endif |
| 49680 | 51036 | |
| 49681 | 51037 | #ifdef __LITTLE_ENDIAN__ |
| 49682 | | #define vdup_laneq_p16(__p0_349, __p1_349) __extension__ ({ \ |
| 49683 | | poly16x8_t __s0_349 = __p0_349; \ |
| 49684 | | poly16x4_t __ret_349; \ |
| 49685 | | __ret_349 = splat_laneq_p16(__s0_349, __p1_349); \ |
| 49686 | | __ret_349; \ |
| 51038 | #define vdup_laneq_p16(__p0_441, __p1_441) __extension__ ({ \ |
| 51039 | poly16x8_t __s0_441 = __p0_441; \ |
| 51040 | poly16x4_t __ret_441; \ |
| 51041 | __ret_441 = splat_laneq_p16(__s0_441, __p1_441); \ |
| 51042 | __ret_441; \ |
| 49687 | 51043 | }) |
| 49688 | 51044 | #else |
| 49689 | | #define vdup_laneq_p16(__p0_350, __p1_350) __extension__ ({ \ |
| 49690 | | poly16x8_t __s0_350 = __p0_350; \ |
| 49691 | | poly16x8_t __rev0_350; __rev0_350 = __builtin_shufflevector(__s0_350, __s0_350, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49692 | | poly16x4_t __ret_350; \ |
| 49693 | | __ret_350 = __noswap_splat_laneq_p16(__rev0_350, __p1_350); \ |
| 49694 | | __ret_350 = __builtin_shufflevector(__ret_350, __ret_350, 3, 2, 1, 0); \ |
| 49695 | | __ret_350; \ |
| 51045 | #define vdup_laneq_p16(__p0_442, __p1_442) __extension__ ({ \ |
| 51046 | poly16x8_t __s0_442 = __p0_442; \ |
| 51047 | poly16x8_t __rev0_442; __rev0_442 = __builtin_shufflevector(__s0_442, __s0_442, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51048 | poly16x4_t __ret_442; \ |
| 51049 | __ret_442 = __noswap_splat_laneq_p16(__rev0_442, __p1_442); \ |
| 51050 | __ret_442 = __builtin_shufflevector(__ret_442, __ret_442, 3, 2, 1, 0); \ |
| 51051 | __ret_442; \ |
| 49696 | 51052 | }) |
| 49697 | 51053 | #endif |
| 49698 | 51054 | |
| 49699 | 51055 | #ifdef __LITTLE_ENDIAN__ |
| 49700 | | #define vdupq_laneq_p8(__p0_351, __p1_351) __extension__ ({ \ |
| 49701 | | poly8x16_t __s0_351 = __p0_351; \ |
| 49702 | | poly8x16_t __ret_351; \ |
| 49703 | | __ret_351 = splatq_laneq_p8(__s0_351, __p1_351); \ |
| 49704 | | __ret_351; \ |
| 51056 | #define vdupq_laneq_p8(__p0_443, __p1_443) __extension__ ({ \ |
| 51057 | poly8x16_t __s0_443 = __p0_443; \ |
| 51058 | poly8x16_t __ret_443; \ |
| 51059 | __ret_443 = splatq_laneq_p8(__s0_443, __p1_443); \ |
| 51060 | __ret_443; \ |
| 49705 | 51061 | }) |
| 49706 | 51062 | #else |
| 49707 | | #define vdupq_laneq_p8(__p0_352, __p1_352) __extension__ ({ \ |
| 49708 | | poly8x16_t __s0_352 = __p0_352; \ |
| 49709 | | poly8x16_t __rev0_352; __rev0_352 = __builtin_shufflevector(__s0_352, __s0_352, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49710 | | poly8x16_t __ret_352; \ |
| 49711 | | __ret_352 = __noswap_splatq_laneq_p8(__rev0_352, __p1_352); \ |
| 49712 | | __ret_352 = __builtin_shufflevector(__ret_352, __ret_352, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49713 | | __ret_352; \ |
| 51063 | #define vdupq_laneq_p8(__p0_444, __p1_444) __extension__ ({ \ |
| 51064 | poly8x16_t __s0_444 = __p0_444; \ |
| 51065 | poly8x16_t __rev0_444; __rev0_444 = __builtin_shufflevector(__s0_444, __s0_444, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51066 | poly8x16_t __ret_444; \ |
| 51067 | __ret_444 = __noswap_splatq_laneq_p8(__rev0_444, __p1_444); \ |
| 51068 | __ret_444 = __builtin_shufflevector(__ret_444, __ret_444, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51069 | __ret_444; \ |
| 49714 | 51070 | }) |
| 49715 | 51071 | #endif |
| 49716 | 51072 | |
| 49717 | 51073 | #ifdef __LITTLE_ENDIAN__ |
| 49718 | | #define vdupq_laneq_p64(__p0_353, __p1_353) __extension__ ({ \ |
| 49719 | | poly64x2_t __s0_353 = __p0_353; \ |
| 49720 | | poly64x2_t __ret_353; \ |
| 49721 | | __ret_353 = splatq_laneq_p64(__s0_353, __p1_353); \ |
| 49722 | | __ret_353; \ |
| 51074 | #define vdupq_laneq_p64(__p0_445, __p1_445) __extension__ ({ \ |
| 51075 | poly64x2_t __s0_445 = __p0_445; \ |
| 51076 | poly64x2_t __ret_445; \ |
| 51077 | __ret_445 = splatq_laneq_p64(__s0_445, __p1_445); \ |
| 51078 | __ret_445; \ |
| 49723 | 51079 | }) |
| 49724 | 51080 | #else |
| 49725 | | #define vdupq_laneq_p64(__p0_354, __p1_354) __extension__ ({ \ |
| 49726 | | poly64x2_t __s0_354 = __p0_354; \ |
| 49727 | | poly64x2_t __rev0_354; __rev0_354 = __builtin_shufflevector(__s0_354, __s0_354, 1, 0); \ |
| 49728 | | poly64x2_t __ret_354; \ |
| 49729 | | __ret_354 = __noswap_splatq_laneq_p64(__rev0_354, __p1_354); \ |
| 49730 | | __ret_354 = __builtin_shufflevector(__ret_354, __ret_354, 1, 0); \ |
| 49731 | | __ret_354; \ |
| 51081 | #define vdupq_laneq_p64(__p0_446, __p1_446) __extension__ ({ \ |
| 51082 | poly64x2_t __s0_446 = __p0_446; \ |
| 51083 | poly64x2_t __rev0_446; __rev0_446 = __builtin_shufflevector(__s0_446, __s0_446, 1, 0); \ |
| 51084 | poly64x2_t __ret_446; \ |
| 51085 | __ret_446 = __noswap_splatq_laneq_p64(__rev0_446, __p1_446); \ |
| 51086 | __ret_446 = __builtin_shufflevector(__ret_446, __ret_446, 1, 0); \ |
| 51087 | __ret_446; \ |
| 49732 | 51088 | }) |
| 49733 | 51089 | #endif |
| 49734 | 51090 | |
| 49735 | 51091 | #ifdef __LITTLE_ENDIAN__ |
| 49736 | | #define vdupq_laneq_p16(__p0_355, __p1_355) __extension__ ({ \ |
| 49737 | | poly16x8_t __s0_355 = __p0_355; \ |
| 49738 | | poly16x8_t __ret_355; \ |
| 49739 | | __ret_355 = splatq_laneq_p16(__s0_355, __p1_355); \ |
| 49740 | | __ret_355; \ |
| 51092 | #define vdupq_laneq_p16(__p0_447, __p1_447) __extension__ ({ \ |
| 51093 | poly16x8_t __s0_447 = __p0_447; \ |
| 51094 | poly16x8_t __ret_447; \ |
| 51095 | __ret_447 = splatq_laneq_p16(__s0_447, __p1_447); \ |
| 51096 | __ret_447; \ |
| 49741 | 51097 | }) |
| 49742 | 51098 | #else |
| 49743 | | #define vdupq_laneq_p16(__p0_356, __p1_356) __extension__ ({ \ |
| 49744 | | poly16x8_t __s0_356 = __p0_356; \ |
| 49745 | | poly16x8_t __rev0_356; __rev0_356 = __builtin_shufflevector(__s0_356, __s0_356, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49746 | | poly16x8_t __ret_356; \ |
| 49747 | | __ret_356 = __noswap_splatq_laneq_p16(__rev0_356, __p1_356); \ |
| 49748 | | __ret_356 = __builtin_shufflevector(__ret_356, __ret_356, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49749 | | __ret_356; \ |
| 51099 | #define vdupq_laneq_p16(__p0_448, __p1_448) __extension__ ({ \ |
| 51100 | poly16x8_t __s0_448 = __p0_448; \ |
| 51101 | poly16x8_t __rev0_448; __rev0_448 = __builtin_shufflevector(__s0_448, __s0_448, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51102 | poly16x8_t __ret_448; \ |
| 51103 | __ret_448 = __noswap_splatq_laneq_p16(__rev0_448, __p1_448); \ |
| 51104 | __ret_448 = __builtin_shufflevector(__ret_448, __ret_448, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51105 | __ret_448; \ |
| 49750 | 51106 | }) |
| 49751 | 51107 | #endif |
| 49752 | 51108 | |
| 49753 | 51109 | #ifdef __LITTLE_ENDIAN__ |
| 49754 | | #define vdupq_laneq_u8(__p0_357, __p1_357) __extension__ ({ \ |
| 49755 | | uint8x16_t __s0_357 = __p0_357; \ |
| 49756 | | uint8x16_t __ret_357; \ |
| 49757 | | __ret_357 = splatq_laneq_u8(__s0_357, __p1_357); \ |
| 49758 | | __ret_357; \ |
| 51110 | #define vdupq_laneq_u8(__p0_449, __p1_449) __extension__ ({ \ |
| 51111 | uint8x16_t __s0_449 = __p0_449; \ |
| 51112 | uint8x16_t __ret_449; \ |
| 51113 | __ret_449 = splatq_laneq_u8(__s0_449, __p1_449); \ |
| 51114 | __ret_449; \ |
| 49759 | 51115 | }) |
| 49760 | 51116 | #else |
| 49761 | | #define vdupq_laneq_u8(__p0_358, __p1_358) __extension__ ({ \ |
| 49762 | | uint8x16_t __s0_358 = __p0_358; \ |
| 49763 | | uint8x16_t __rev0_358; __rev0_358 = __builtin_shufflevector(__s0_358, __s0_358, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49764 | | uint8x16_t __ret_358; \ |
| 49765 | | __ret_358 = __noswap_splatq_laneq_u8(__rev0_358, __p1_358); \ |
| 49766 | | __ret_358 = __builtin_shufflevector(__ret_358, __ret_358, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49767 | | __ret_358; \ |
| 51117 | #define vdupq_laneq_u8(__p0_450, __p1_450) __extension__ ({ \ |
| 51118 | uint8x16_t __s0_450 = __p0_450; \ |
| 51119 | uint8x16_t __rev0_450; __rev0_450 = __builtin_shufflevector(__s0_450, __s0_450, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51120 | uint8x16_t __ret_450; \ |
| 51121 | __ret_450 = __noswap_splatq_laneq_u8(__rev0_450, __p1_450); \ |
| 51122 | __ret_450 = __builtin_shufflevector(__ret_450, __ret_450, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51123 | __ret_450; \ |
| 49768 | 51124 | }) |
| 49769 | 51125 | #endif |
| 49770 | 51126 | |
| 49771 | 51127 | #ifdef __LITTLE_ENDIAN__ |
| 49772 | | #define vdupq_laneq_u32(__p0_359, __p1_359) __extension__ ({ \ |
| 49773 | | uint32x4_t __s0_359 = __p0_359; \ |
| 49774 | | uint32x4_t __ret_359; \ |
| 49775 | | __ret_359 = splatq_laneq_u32(__s0_359, __p1_359); \ |
| 49776 | | __ret_359; \ |
| 51128 | #define vdupq_laneq_u32(__p0_451, __p1_451) __extension__ ({ \ |
| 51129 | uint32x4_t __s0_451 = __p0_451; \ |
| 51130 | uint32x4_t __ret_451; \ |
| 51131 | __ret_451 = splatq_laneq_u32(__s0_451, __p1_451); \ |
| 51132 | __ret_451; \ |
| 49777 | 51133 | }) |
| 49778 | 51134 | #else |
| 49779 | | #define vdupq_laneq_u32(__p0_360, __p1_360) __extension__ ({ \ |
| 49780 | | uint32x4_t __s0_360 = __p0_360; \ |
| 49781 | | uint32x4_t __rev0_360; __rev0_360 = __builtin_shufflevector(__s0_360, __s0_360, 3, 2, 1, 0); \ |
| 49782 | | uint32x4_t __ret_360; \ |
| 49783 | | __ret_360 = __noswap_splatq_laneq_u32(__rev0_360, __p1_360); \ |
| 49784 | | __ret_360 = __builtin_shufflevector(__ret_360, __ret_360, 3, 2, 1, 0); \ |
| 49785 | | __ret_360; \ |
| 51135 | #define vdupq_laneq_u32(__p0_452, __p1_452) __extension__ ({ \ |
| 51136 | uint32x4_t __s0_452 = __p0_452; \ |
| 51137 | uint32x4_t __rev0_452; __rev0_452 = __builtin_shufflevector(__s0_452, __s0_452, 3, 2, 1, 0); \ |
| 51138 | uint32x4_t __ret_452; \ |
| 51139 | __ret_452 = __noswap_splatq_laneq_u32(__rev0_452, __p1_452); \ |
| 51140 | __ret_452 = __builtin_shufflevector(__ret_452, __ret_452, 3, 2, 1, 0); \ |
| 51141 | __ret_452; \ |
| 49786 | 51142 | }) |
| 49787 | 51143 | #endif |
| 49788 | 51144 | |
| 49789 | 51145 | #ifdef __LITTLE_ENDIAN__ |
| 49790 | | #define vdupq_laneq_u64(__p0_361, __p1_361) __extension__ ({ \ |
| 49791 | | uint64x2_t __s0_361 = __p0_361; \ |
| 49792 | | uint64x2_t __ret_361; \ |
| 49793 | | __ret_361 = splatq_laneq_u64(__s0_361, __p1_361); \ |
| 49794 | | __ret_361; \ |
| 51146 | #define vdupq_laneq_u64(__p0_453, __p1_453) __extension__ ({ \ |
| 51147 | uint64x2_t __s0_453 = __p0_453; \ |
| 51148 | uint64x2_t __ret_453; \ |
| 51149 | __ret_453 = splatq_laneq_u64(__s0_453, __p1_453); \ |
| 51150 | __ret_453; \ |
| 49795 | 51151 | }) |
| 49796 | 51152 | #else |
| 49797 | | #define vdupq_laneq_u64(__p0_362, __p1_362) __extension__ ({ \ |
| 49798 | | uint64x2_t __s0_362 = __p0_362; \ |
| 49799 | | uint64x2_t __rev0_362; __rev0_362 = __builtin_shufflevector(__s0_362, __s0_362, 1, 0); \ |
| 49800 | | uint64x2_t __ret_362; \ |
| 49801 | | __ret_362 = __noswap_splatq_laneq_u64(__rev0_362, __p1_362); \ |
| 49802 | | __ret_362 = __builtin_shufflevector(__ret_362, __ret_362, 1, 0); \ |
| 49803 | | __ret_362; \ |
| 51153 | #define vdupq_laneq_u64(__p0_454, __p1_454) __extension__ ({ \ |
| 51154 | uint64x2_t __s0_454 = __p0_454; \ |
| 51155 | uint64x2_t __rev0_454; __rev0_454 = __builtin_shufflevector(__s0_454, __s0_454, 1, 0); \ |
| 51156 | uint64x2_t __ret_454; \ |
| 51157 | __ret_454 = __noswap_splatq_laneq_u64(__rev0_454, __p1_454); \ |
| 51158 | __ret_454 = __builtin_shufflevector(__ret_454, __ret_454, 1, 0); \ |
| 51159 | __ret_454; \ |
| 49804 | 51160 | }) |
| 49805 | 51161 | #endif |
| 49806 | 51162 | |
| 49807 | 51163 | #ifdef __LITTLE_ENDIAN__ |
| 49808 | | #define vdupq_laneq_u16(__p0_363, __p1_363) __extension__ ({ \ |
| 49809 | | uint16x8_t __s0_363 = __p0_363; \ |
| 49810 | | uint16x8_t __ret_363; \ |
| 49811 | | __ret_363 = splatq_laneq_u16(__s0_363, __p1_363); \ |
| 49812 | | __ret_363; \ |
| 51164 | #define vdupq_laneq_u16(__p0_455, __p1_455) __extension__ ({ \ |
| 51165 | uint16x8_t __s0_455 = __p0_455; \ |
| 51166 | uint16x8_t __ret_455; \ |
| 51167 | __ret_455 = splatq_laneq_u16(__s0_455, __p1_455); \ |
| 51168 | __ret_455; \ |
| 49813 | 51169 | }) |
| 49814 | 51170 | #else |
| 49815 | | #define vdupq_laneq_u16(__p0_364, __p1_364) __extension__ ({ \ |
| 49816 | | uint16x8_t __s0_364 = __p0_364; \ |
| 49817 | | uint16x8_t __rev0_364; __rev0_364 = __builtin_shufflevector(__s0_364, __s0_364, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49818 | | uint16x8_t __ret_364; \ |
| 49819 | | __ret_364 = __noswap_splatq_laneq_u16(__rev0_364, __p1_364); \ |
| 49820 | | __ret_364 = __builtin_shufflevector(__ret_364, __ret_364, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49821 | | __ret_364; \ |
| 51171 | #define vdupq_laneq_u16(__p0_456, __p1_456) __extension__ ({ \ |
| 51172 | uint16x8_t __s0_456 = __p0_456; \ |
| 51173 | uint16x8_t __rev0_456; __rev0_456 = __builtin_shufflevector(__s0_456, __s0_456, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51174 | uint16x8_t __ret_456; \ |
| 51175 | __ret_456 = __noswap_splatq_laneq_u16(__rev0_456, __p1_456); \ |
| 51176 | __ret_456 = __builtin_shufflevector(__ret_456, __ret_456, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51177 | __ret_456; \ |
| 49822 | 51178 | }) |
| 49823 | 51179 | #endif |
| 49824 | 51180 | |
| 49825 | 51181 | #ifdef __LITTLE_ENDIAN__ |
| 49826 | | #define vdupq_laneq_s8(__p0_365, __p1_365) __extension__ ({ \ |
| 49827 | | int8x16_t __s0_365 = __p0_365; \ |
| 49828 | | int8x16_t __ret_365; \ |
| 49829 | | __ret_365 = splatq_laneq_s8(__s0_365, __p1_365); \ |
| 49830 | | __ret_365; \ |
| 51182 | #define vdupq_laneq_s8(__p0_457, __p1_457) __extension__ ({ \ |
| 51183 | int8x16_t __s0_457 = __p0_457; \ |
| 51184 | int8x16_t __ret_457; \ |
| 51185 | __ret_457 = splatq_laneq_s8(__s0_457, __p1_457); \ |
| 51186 | __ret_457; \ |
| 49831 | 51187 | }) |
| 49832 | 51188 | #else |
| 49833 | | #define vdupq_laneq_s8(__p0_366, __p1_366) __extension__ ({ \ |
| 49834 | | int8x16_t __s0_366 = __p0_366; \ |
| 49835 | | int8x16_t __rev0_366; __rev0_366 = __builtin_shufflevector(__s0_366, __s0_366, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49836 | | int8x16_t __ret_366; \ |
| 49837 | | __ret_366 = __noswap_splatq_laneq_s8(__rev0_366, __p1_366); \ |
| 49838 | | __ret_366 = __builtin_shufflevector(__ret_366, __ret_366, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49839 | | __ret_366; \ |
| 51189 | #define vdupq_laneq_s8(__p0_458, __p1_458) __extension__ ({ \ |
| 51190 | int8x16_t __s0_458 = __p0_458; \ |
| 51191 | int8x16_t __rev0_458; __rev0_458 = __builtin_shufflevector(__s0_458, __s0_458, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51192 | int8x16_t __ret_458; \ |
| 51193 | __ret_458 = __noswap_splatq_laneq_s8(__rev0_458, __p1_458); \ |
| 51194 | __ret_458 = __builtin_shufflevector(__ret_458, __ret_458, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51195 | __ret_458; \ |
| 49840 | 51196 | }) |
| 49841 | 51197 | #endif |
| 49842 | 51198 | |
| 49843 | 51199 | #ifdef __LITTLE_ENDIAN__ |
| 49844 | | #define vdupq_laneq_f64(__p0_367, __p1_367) __extension__ ({ \ |
| 49845 | | float64x2_t __s0_367 = __p0_367; \ |
| 49846 | | float64x2_t __ret_367; \ |
| 49847 | | __ret_367 = splatq_laneq_f64(__s0_367, __p1_367); \ |
| 49848 | | __ret_367; \ |
| 51200 | #define vdupq_laneq_f64(__p0_459, __p1_459) __extension__ ({ \ |
| 51201 | float64x2_t __s0_459 = __p0_459; \ |
| 51202 | float64x2_t __ret_459; \ |
| 51203 | __ret_459 = splatq_laneq_f64(__s0_459, __p1_459); \ |
| 51204 | __ret_459; \ |
| 49849 | 51205 | }) |
| 49850 | 51206 | #else |
| 49851 | | #define vdupq_laneq_f64(__p0_368, __p1_368) __extension__ ({ \ |
| 49852 | | float64x2_t __s0_368 = __p0_368; \ |
| 49853 | | float64x2_t __rev0_368; __rev0_368 = __builtin_shufflevector(__s0_368, __s0_368, 1, 0); \ |
| 49854 | | float64x2_t __ret_368; \ |
| 49855 | | __ret_368 = __noswap_splatq_laneq_f64(__rev0_368, __p1_368); \ |
| 49856 | | __ret_368 = __builtin_shufflevector(__ret_368, __ret_368, 1, 0); \ |
| 49857 | | __ret_368; \ |
| 51207 | #define vdupq_laneq_f64(__p0_460, __p1_460) __extension__ ({ \ |
| 51208 | float64x2_t __s0_460 = __p0_460; \ |
| 51209 | float64x2_t __rev0_460; __rev0_460 = __builtin_shufflevector(__s0_460, __s0_460, 1, 0); \ |
| 51210 | float64x2_t __ret_460; \ |
| 51211 | __ret_460 = __noswap_splatq_laneq_f64(__rev0_460, __p1_460); \ |
| 51212 | __ret_460 = __builtin_shufflevector(__ret_460, __ret_460, 1, 0); \ |
| 51213 | __ret_460; \ |
| 49858 | 51214 | }) |
| 49859 | 51215 | #endif |
| 49860 | 51216 | |
| 49861 | 51217 | #ifdef __LITTLE_ENDIAN__ |
| 49862 | | #define vdupq_laneq_f32(__p0_369, __p1_369) __extension__ ({ \ |
| 49863 | | float32x4_t __s0_369 = __p0_369; \ |
| 49864 | | float32x4_t __ret_369; \ |
| 49865 | | __ret_369 = splatq_laneq_f32(__s0_369, __p1_369); \ |
| 49866 | | __ret_369; \ |
| 51218 | #define vdupq_laneq_f32(__p0_461, __p1_461) __extension__ ({ \ |
| 51219 | float32x4_t __s0_461 = __p0_461; \ |
| 51220 | float32x4_t __ret_461; \ |
| 51221 | __ret_461 = splatq_laneq_f32(__s0_461, __p1_461); \ |
| 51222 | __ret_461; \ |
| 49867 | 51223 | }) |
| 49868 | 51224 | #else |
| 49869 | | #define vdupq_laneq_f32(__p0_370, __p1_370) __extension__ ({ \ |
| 49870 | | float32x4_t __s0_370 = __p0_370; \ |
| 49871 | | float32x4_t __rev0_370; __rev0_370 = __builtin_shufflevector(__s0_370, __s0_370, 3, 2, 1, 0); \ |
| 49872 | | float32x4_t __ret_370; \ |
| 49873 | | __ret_370 = __noswap_splatq_laneq_f32(__rev0_370, __p1_370); \ |
| 49874 | | __ret_370 = __builtin_shufflevector(__ret_370, __ret_370, 3, 2, 1, 0); \ |
| 49875 | | __ret_370; \ |
| 51225 | #define vdupq_laneq_f32(__p0_462, __p1_462) __extension__ ({ \ |
| 51226 | float32x4_t __s0_462 = __p0_462; \ |
| 51227 | float32x4_t __rev0_462; __rev0_462 = __builtin_shufflevector(__s0_462, __s0_462, 3, 2, 1, 0); \ |
| 51228 | float32x4_t __ret_462; \ |
| 51229 | __ret_462 = __noswap_splatq_laneq_f32(__rev0_462, __p1_462); \ |
| 51230 | __ret_462 = __builtin_shufflevector(__ret_462, __ret_462, 3, 2, 1, 0); \ |
| 51231 | __ret_462; \ |
| 49876 | 51232 | }) |
| 49877 | 51233 | #endif |
| 49878 | 51234 | |
| 49879 | 51235 | #ifdef __LITTLE_ENDIAN__ |
| 49880 | | #define vdupq_laneq_f16(__p0_371, __p1_371) __extension__ ({ \ |
| 49881 | | float16x8_t __s0_371 = __p0_371; \ |
| 49882 | | float16x8_t __ret_371; \ |
| 49883 | | __ret_371 = splatq_laneq_f16(__s0_371, __p1_371); \ |
| 49884 | | __ret_371; \ |
| 51236 | #define vdupq_laneq_f16(__p0_463, __p1_463) __extension__ ({ \ |
| 51237 | float16x8_t __s0_463 = __p0_463; \ |
| 51238 | float16x8_t __ret_463; \ |
| 51239 | __ret_463 = splatq_laneq_f16(__s0_463, __p1_463); \ |
| 51240 | __ret_463; \ |
| 49885 | 51241 | }) |
| 49886 | 51242 | #else |
| 49887 | | #define vdupq_laneq_f16(__p0_372, __p1_372) __extension__ ({ \ |
| 49888 | | float16x8_t __s0_372 = __p0_372; \ |
| 49889 | | float16x8_t __rev0_372; __rev0_372 = __builtin_shufflevector(__s0_372, __s0_372, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49890 | | float16x8_t __ret_372; \ |
| 49891 | | __ret_372 = __noswap_splatq_laneq_f16(__rev0_372, __p1_372); \ |
| 49892 | | __ret_372 = __builtin_shufflevector(__ret_372, __ret_372, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49893 | | __ret_372; \ |
| 51243 | #define vdupq_laneq_f16(__p0_464, __p1_464) __extension__ ({ \ |
| 51244 | float16x8_t __s0_464 = __p0_464; \ |
| 51245 | float16x8_t __rev0_464; __rev0_464 = __builtin_shufflevector(__s0_464, __s0_464, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51246 | float16x8_t __ret_464; \ |
| 51247 | __ret_464 = __noswap_splatq_laneq_f16(__rev0_464, __p1_464); \ |
| 51248 | __ret_464 = __builtin_shufflevector(__ret_464, __ret_464, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51249 | __ret_464; \ |
| 49894 | 51250 | }) |
| 49895 | 51251 | #endif |
| 49896 | 51252 | |
| 49897 | 51253 | #ifdef __LITTLE_ENDIAN__ |
| 49898 | | #define vdupq_laneq_s32(__p0_373, __p1_373) __extension__ ({ \ |
| 49899 | | int32x4_t __s0_373 = __p0_373; \ |
| 49900 | | int32x4_t __ret_373; \ |
| 49901 | | __ret_373 = splatq_laneq_s32(__s0_373, __p1_373); \ |
| 49902 | | __ret_373; \ |
| 51254 | #define vdupq_laneq_s32(__p0_465, __p1_465) __extension__ ({ \ |
| 51255 | int32x4_t __s0_465 = __p0_465; \ |
| 51256 | int32x4_t __ret_465; \ |
| 51257 | __ret_465 = splatq_laneq_s32(__s0_465, __p1_465); \ |
| 51258 | __ret_465; \ |
| 49903 | 51259 | }) |
| 49904 | 51260 | #else |
| 49905 | | #define vdupq_laneq_s32(__p0_374, __p1_374) __extension__ ({ \ |
| 49906 | | int32x4_t __s0_374 = __p0_374; \ |
| 49907 | | int32x4_t __rev0_374; __rev0_374 = __builtin_shufflevector(__s0_374, __s0_374, 3, 2, 1, 0); \ |
| 49908 | | int32x4_t __ret_374; \ |
| 49909 | | __ret_374 = __noswap_splatq_laneq_s32(__rev0_374, __p1_374); \ |
| 49910 | | __ret_374 = __builtin_shufflevector(__ret_374, __ret_374, 3, 2, 1, 0); \ |
| 49911 | | __ret_374; \ |
| 51261 | #define vdupq_laneq_s32(__p0_466, __p1_466) __extension__ ({ \ |
| 51262 | int32x4_t __s0_466 = __p0_466; \ |
| 51263 | int32x4_t __rev0_466; __rev0_466 = __builtin_shufflevector(__s0_466, __s0_466, 3, 2, 1, 0); \ |
| 51264 | int32x4_t __ret_466; \ |
| 51265 | __ret_466 = __noswap_splatq_laneq_s32(__rev0_466, __p1_466); \ |
| 51266 | __ret_466 = __builtin_shufflevector(__ret_466, __ret_466, 3, 2, 1, 0); \ |
| 51267 | __ret_466; \ |
| 49912 | 51268 | }) |
| 49913 | 51269 | #endif |
| 49914 | 51270 | |
| 49915 | 51271 | #ifdef __LITTLE_ENDIAN__ |
| 49916 | | #define vdupq_laneq_s64(__p0_375, __p1_375) __extension__ ({ \ |
| 49917 | | int64x2_t __s0_375 = __p0_375; \ |
| 49918 | | int64x2_t __ret_375; \ |
| 49919 | | __ret_375 = splatq_laneq_s64(__s0_375, __p1_375); \ |
| 49920 | | __ret_375; \ |
| 51272 | #define vdupq_laneq_s64(__p0_467, __p1_467) __extension__ ({ \ |
| 51273 | int64x2_t __s0_467 = __p0_467; \ |
| 51274 | int64x2_t __ret_467; \ |
| 51275 | __ret_467 = splatq_laneq_s64(__s0_467, __p1_467); \ |
| 51276 | __ret_467; \ |
| 49921 | 51277 | }) |
| 49922 | 51278 | #else |
| 49923 | | #define vdupq_laneq_s64(__p0_376, __p1_376) __extension__ ({ \ |
| 49924 | | int64x2_t __s0_376 = __p0_376; \ |
| 49925 | | int64x2_t __rev0_376; __rev0_376 = __builtin_shufflevector(__s0_376, __s0_376, 1, 0); \ |
| 49926 | | int64x2_t __ret_376; \ |
| 49927 | | __ret_376 = __noswap_splatq_laneq_s64(__rev0_376, __p1_376); \ |
| 49928 | | __ret_376 = __builtin_shufflevector(__ret_376, __ret_376, 1, 0); \ |
| 49929 | | __ret_376; \ |
| 51279 | #define vdupq_laneq_s64(__p0_468, __p1_468) __extension__ ({ \ |
| 51280 | int64x2_t __s0_468 = __p0_468; \ |
| 51281 | int64x2_t __rev0_468; __rev0_468 = __builtin_shufflevector(__s0_468, __s0_468, 1, 0); \ |
| 51282 | int64x2_t __ret_468; \ |
| 51283 | __ret_468 = __noswap_splatq_laneq_s64(__rev0_468, __p1_468); \ |
| 51284 | __ret_468 = __builtin_shufflevector(__ret_468, __ret_468, 1, 0); \ |
| 51285 | __ret_468; \ |
| 49930 | 51286 | }) |
| 49931 | 51287 | #endif |
| 49932 | 51288 | |
| 49933 | 51289 | #ifdef __LITTLE_ENDIAN__ |
| 49934 | | #define vdupq_laneq_s16(__p0_377, __p1_377) __extension__ ({ \ |
| 49935 | | int16x8_t __s0_377 = __p0_377; \ |
| 49936 | | int16x8_t __ret_377; \ |
| 49937 | | __ret_377 = splatq_laneq_s16(__s0_377, __p1_377); \ |
| 49938 | | __ret_377; \ |
| 51290 | #define vdupq_laneq_s16(__p0_469, __p1_469) __extension__ ({ \ |
| 51291 | int16x8_t __s0_469 = __p0_469; \ |
| 51292 | int16x8_t __ret_469; \ |
| 51293 | __ret_469 = splatq_laneq_s16(__s0_469, __p1_469); \ |
| 51294 | __ret_469; \ |
| 49939 | 51295 | }) |
| 49940 | 51296 | #else |
| 49941 | | #define vdupq_laneq_s16(__p0_378, __p1_378) __extension__ ({ \ |
| 49942 | | int16x8_t __s0_378 = __p0_378; \ |
| 49943 | | int16x8_t __rev0_378; __rev0_378 = __builtin_shufflevector(__s0_378, __s0_378, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49944 | | int16x8_t __ret_378; \ |
| 49945 | | __ret_378 = __noswap_splatq_laneq_s16(__rev0_378, __p1_378); \ |
| 49946 | | __ret_378 = __builtin_shufflevector(__ret_378, __ret_378, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49947 | | __ret_378; \ |
| 51297 | #define vdupq_laneq_s16(__p0_470, __p1_470) __extension__ ({ \ |
| 51298 | int16x8_t __s0_470 = __p0_470; \ |
| 51299 | int16x8_t __rev0_470; __rev0_470 = __builtin_shufflevector(__s0_470, __s0_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51300 | int16x8_t __ret_470; \ |
| 51301 | __ret_470 = __noswap_splatq_laneq_s16(__rev0_470, __p1_470); \ |
| 51302 | __ret_470 = __builtin_shufflevector(__ret_470, __ret_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51303 | __ret_470; \ |
| 49948 | 51304 | }) |
| 49949 | 51305 | #endif |
| 49950 | 51306 | |
| 49951 | 51307 | #ifdef __LITTLE_ENDIAN__ |
| 49952 | | #define vdup_laneq_u8(__p0_379, __p1_379) __extension__ ({ \ |
| 49953 | | uint8x16_t __s0_379 = __p0_379; \ |
| 49954 | | uint8x8_t __ret_379; \ |
| 49955 | | __ret_379 = splat_laneq_u8(__s0_379, __p1_379); \ |
| 49956 | | __ret_379; \ |
| 51308 | #define vdup_laneq_u8(__p0_471, __p1_471) __extension__ ({ \ |
| 51309 | uint8x16_t __s0_471 = __p0_471; \ |
| 51310 | uint8x8_t __ret_471; \ |
| 51311 | __ret_471 = splat_laneq_u8(__s0_471, __p1_471); \ |
| 51312 | __ret_471; \ |
| 49957 | 51313 | }) |
| 49958 | 51314 | #else |
| 49959 | | #define vdup_laneq_u8(__p0_380, __p1_380) __extension__ ({ \ |
| 49960 | | uint8x16_t __s0_380 = __p0_380; \ |
| 49961 | | uint8x16_t __rev0_380; __rev0_380 = __builtin_shufflevector(__s0_380, __s0_380, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49962 | | uint8x8_t __ret_380; \ |
| 49963 | | __ret_380 = __noswap_splat_laneq_u8(__rev0_380, __p1_380); \ |
| 49964 | | __ret_380 = __builtin_shufflevector(__ret_380, __ret_380, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 49965 | | __ret_380; \ |
| 51315 | #define vdup_laneq_u8(__p0_472, __p1_472) __extension__ ({ \ |
| 51316 | uint8x16_t __s0_472 = __p0_472; \ |
| 51317 | uint8x16_t __rev0_472; __rev0_472 = __builtin_shufflevector(__s0_472, __s0_472, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51318 | uint8x8_t __ret_472; \ |
| 51319 | __ret_472 = __noswap_splat_laneq_u8(__rev0_472, __p1_472); \ |
| 51320 | __ret_472 = __builtin_shufflevector(__ret_472, __ret_472, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51321 | __ret_472; \ |
| 49966 | 51322 | }) |
| 49967 | 51323 | #endif |
| 49968 | 51324 | |
| 49969 | 51325 | #ifdef __LITTLE_ENDIAN__ |
| 49970 | | #define vdup_laneq_u32(__p0_381, __p1_381) __extension__ ({ \ |
| 49971 | | uint32x4_t __s0_381 = __p0_381; \ |
| 49972 | | uint32x2_t __ret_381; \ |
| 49973 | | __ret_381 = splat_laneq_u32(__s0_381, __p1_381); \ |
| 49974 | | __ret_381; \ |
| 51326 | #define vdup_laneq_u32(__p0_473, __p1_473) __extension__ ({ \ |
| 51327 | uint32x4_t __s0_473 = __p0_473; \ |
| 51328 | uint32x2_t __ret_473; \ |
| 51329 | __ret_473 = splat_laneq_u32(__s0_473, __p1_473); \ |
| 51330 | __ret_473; \ |
| 49975 | 51331 | }) |
| 49976 | 51332 | #else |
| 49977 | | #define vdup_laneq_u32(__p0_382, __p1_382) __extension__ ({ \ |
| 49978 | | uint32x4_t __s0_382 = __p0_382; \ |
| 49979 | | uint32x4_t __rev0_382; __rev0_382 = __builtin_shufflevector(__s0_382, __s0_382, 3, 2, 1, 0); \ |
| 49980 | | uint32x2_t __ret_382; \ |
| 49981 | | __ret_382 = __noswap_splat_laneq_u32(__rev0_382, __p1_382); \ |
| 49982 | | __ret_382 = __builtin_shufflevector(__ret_382, __ret_382, 1, 0); \ |
| 49983 | | __ret_382; \ |
| 51333 | #define vdup_laneq_u32(__p0_474, __p1_474) __extension__ ({ \ |
| 51334 | uint32x4_t __s0_474 = __p0_474; \ |
| 51335 | uint32x4_t __rev0_474; __rev0_474 = __builtin_shufflevector(__s0_474, __s0_474, 3, 2, 1, 0); \ |
| 51336 | uint32x2_t __ret_474; \ |
| 51337 | __ret_474 = __noswap_splat_laneq_u32(__rev0_474, __p1_474); \ |
| 51338 | __ret_474 = __builtin_shufflevector(__ret_474, __ret_474, 1, 0); \ |
| 51339 | __ret_474; \ |
| 49984 | 51340 | }) |
| 49985 | 51341 | #endif |
| 49986 | 51342 | |
| 49987 | 51343 | #ifdef __LITTLE_ENDIAN__ |
| 49988 | | #define vdup_laneq_u64(__p0_383, __p1_383) __extension__ ({ \ |
| 49989 | | uint64x2_t __s0_383 = __p0_383; \ |
| 49990 | | uint64x1_t __ret_383; \ |
| 49991 | | __ret_383 = splat_laneq_u64(__s0_383, __p1_383); \ |
| 49992 | | __ret_383; \ |
| 51344 | #define vdup_laneq_u64(__p0_475, __p1_475) __extension__ ({ \ |
| 51345 | uint64x2_t __s0_475 = __p0_475; \ |
| 51346 | uint64x1_t __ret_475; \ |
| 51347 | __ret_475 = splat_laneq_u64(__s0_475, __p1_475); \ |
| 51348 | __ret_475; \ |
| 49993 | 51349 | }) |
| 49994 | 51350 | #else |
| 49995 | | #define vdup_laneq_u64(__p0_384, __p1_384) __extension__ ({ \ |
| 49996 | | uint64x2_t __s0_384 = __p0_384; \ |
| 49997 | | uint64x2_t __rev0_384; __rev0_384 = __builtin_shufflevector(__s0_384, __s0_384, 1, 0); \ |
| 49998 | | uint64x1_t __ret_384; \ |
| 49999 | | __ret_384 = __noswap_splat_laneq_u64(__rev0_384, __p1_384); \ |
| 50000 | | __ret_384; \ |
| 51351 | #define vdup_laneq_u64(__p0_476, __p1_476) __extension__ ({ \ |
| 51352 | uint64x2_t __s0_476 = __p0_476; \ |
| 51353 | uint64x2_t __rev0_476; __rev0_476 = __builtin_shufflevector(__s0_476, __s0_476, 1, 0); \ |
| 51354 | uint64x1_t __ret_476; \ |
| 51355 | __ret_476 = __noswap_splat_laneq_u64(__rev0_476, __p1_476); \ |
| 51356 | __ret_476; \ |
| 50001 | 51357 | }) |
| 50002 | 51358 | #endif |
| 50003 | 51359 | |
| 50004 | 51360 | #ifdef __LITTLE_ENDIAN__ |
| 50005 | | #define vdup_laneq_u16(__p0_385, __p1_385) __extension__ ({ \ |
| 50006 | | uint16x8_t __s0_385 = __p0_385; \ |
| 50007 | | uint16x4_t __ret_385; \ |
| 50008 | | __ret_385 = splat_laneq_u16(__s0_385, __p1_385); \ |
| 50009 | | __ret_385; \ |
| 51361 | #define vdup_laneq_u16(__p0_477, __p1_477) __extension__ ({ \ |
| 51362 | uint16x8_t __s0_477 = __p0_477; \ |
| 51363 | uint16x4_t __ret_477; \ |
| 51364 | __ret_477 = splat_laneq_u16(__s0_477, __p1_477); \ |
| 51365 | __ret_477; \ |
| 50010 | 51366 | }) |
| 50011 | 51367 | #else |
| 50012 | | #define vdup_laneq_u16(__p0_386, __p1_386) __extension__ ({ \ |
| 50013 | | uint16x8_t __s0_386 = __p0_386; \ |
| 50014 | | uint16x8_t __rev0_386; __rev0_386 = __builtin_shufflevector(__s0_386, __s0_386, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50015 | | uint16x4_t __ret_386; \ |
| 50016 | | __ret_386 = __noswap_splat_laneq_u16(__rev0_386, __p1_386); \ |
| 50017 | | __ret_386 = __builtin_shufflevector(__ret_386, __ret_386, 3, 2, 1, 0); \ |
| 50018 | | __ret_386; \ |
| 51368 | #define vdup_laneq_u16(__p0_478, __p1_478) __extension__ ({ \ |
| 51369 | uint16x8_t __s0_478 = __p0_478; \ |
| 51370 | uint16x8_t __rev0_478; __rev0_478 = __builtin_shufflevector(__s0_478, __s0_478, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51371 | uint16x4_t __ret_478; \ |
| 51372 | __ret_478 = __noswap_splat_laneq_u16(__rev0_478, __p1_478); \ |
| 51373 | __ret_478 = __builtin_shufflevector(__ret_478, __ret_478, 3, 2, 1, 0); \ |
| 51374 | __ret_478; \ |
| 50019 | 51375 | }) |
| 50020 | 51376 | #endif |
| 50021 | 51377 | |
| 50022 | 51378 | #ifdef __LITTLE_ENDIAN__ |
| 50023 | | #define vdup_laneq_s8(__p0_387, __p1_387) __extension__ ({ \ |
| 50024 | | int8x16_t __s0_387 = __p0_387; \ |
| 50025 | | int8x8_t __ret_387; \ |
| 50026 | | __ret_387 = splat_laneq_s8(__s0_387, __p1_387); \ |
| 50027 | | __ret_387; \ |
| 51379 | #define vdup_laneq_s8(__p0_479, __p1_479) __extension__ ({ \ |
| 51380 | int8x16_t __s0_479 = __p0_479; \ |
| 51381 | int8x8_t __ret_479; \ |
| 51382 | __ret_479 = splat_laneq_s8(__s0_479, __p1_479); \ |
| 51383 | __ret_479; \ |
| 50028 | 51384 | }) |
| 50029 | 51385 | #else |
| 50030 | | #define vdup_laneq_s8(__p0_388, __p1_388) __extension__ ({ \ |
| 50031 | | int8x16_t __s0_388 = __p0_388; \ |
| 50032 | | int8x16_t __rev0_388; __rev0_388 = __builtin_shufflevector(__s0_388, __s0_388, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50033 | | int8x8_t __ret_388; \ |
| 50034 | | __ret_388 = __noswap_splat_laneq_s8(__rev0_388, __p1_388); \ |
| 50035 | | __ret_388 = __builtin_shufflevector(__ret_388, __ret_388, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50036 | | __ret_388; \ |
| 51386 | #define vdup_laneq_s8(__p0_480, __p1_480) __extension__ ({ \ |
| 51387 | int8x16_t __s0_480 = __p0_480; \ |
| 51388 | int8x16_t __rev0_480; __rev0_480 = __builtin_shufflevector(__s0_480, __s0_480, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51389 | int8x8_t __ret_480; \ |
| 51390 | __ret_480 = __noswap_splat_laneq_s8(__rev0_480, __p1_480); \ |
| 51391 | __ret_480 = __builtin_shufflevector(__ret_480, __ret_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51392 | __ret_480; \ |
| 50037 | 51393 | }) |
| 50038 | 51394 | #endif |
| 50039 | 51395 | |
| 50040 | 51396 | #ifdef __LITTLE_ENDIAN__ |
| 50041 | | #define vdup_laneq_f64(__p0_389, __p1_389) __extension__ ({ \ |
| 50042 | | float64x2_t __s0_389 = __p0_389; \ |
| 50043 | | float64x1_t __ret_389; \ |
| 50044 | | __ret_389 = splat_laneq_f64(__s0_389, __p1_389); \ |
| 50045 | | __ret_389; \ |
| 51397 | #define vdup_laneq_f64(__p0_481, __p1_481) __extension__ ({ \ |
| 51398 | float64x2_t __s0_481 = __p0_481; \ |
| 51399 | float64x1_t __ret_481; \ |
| 51400 | __ret_481 = splat_laneq_f64(__s0_481, __p1_481); \ |
| 51401 | __ret_481; \ |
| 50046 | 51402 | }) |
| 50047 | 51403 | #else |
| 50048 | | #define vdup_laneq_f64(__p0_390, __p1_390) __extension__ ({ \ |
| 50049 | | float64x2_t __s0_390 = __p0_390; \ |
| 50050 | | float64x2_t __rev0_390; __rev0_390 = __builtin_shufflevector(__s0_390, __s0_390, 1, 0); \ |
| 50051 | | float64x1_t __ret_390; \ |
| 50052 | | __ret_390 = __noswap_splat_laneq_f64(__rev0_390, __p1_390); \ |
| 50053 | | __ret_390; \ |
| 51404 | #define vdup_laneq_f64(__p0_482, __p1_482) __extension__ ({ \ |
| 51405 | float64x2_t __s0_482 = __p0_482; \ |
| 51406 | float64x2_t __rev0_482; __rev0_482 = __builtin_shufflevector(__s0_482, __s0_482, 1, 0); \ |
| 51407 | float64x1_t __ret_482; \ |
| 51408 | __ret_482 = __noswap_splat_laneq_f64(__rev0_482, __p1_482); \ |
| 51409 | __ret_482; \ |
| 50054 | 51410 | }) |
| 50055 | 51411 | #endif |
| 50056 | 51412 | |
| 50057 | 51413 | #ifdef __LITTLE_ENDIAN__ |
| 50058 | | #define vdup_laneq_f32(__p0_391, __p1_391) __extension__ ({ \ |
| 50059 | | float32x4_t __s0_391 = __p0_391; \ |
| 50060 | | float32x2_t __ret_391; \ |
| 50061 | | __ret_391 = splat_laneq_f32(__s0_391, __p1_391); \ |
| 50062 | | __ret_391; \ |
| 51414 | #define vdup_laneq_f32(__p0_483, __p1_483) __extension__ ({ \ |
| 51415 | float32x4_t __s0_483 = __p0_483; \ |
| 51416 | float32x2_t __ret_483; \ |
| 51417 | __ret_483 = splat_laneq_f32(__s0_483, __p1_483); \ |
| 51418 | __ret_483; \ |
| 50063 | 51419 | }) |
| 50064 | 51420 | #else |
| 50065 | | #define vdup_laneq_f32(__p0_392, __p1_392) __extension__ ({ \ |
| 50066 | | float32x4_t __s0_392 = __p0_392; \ |
| 50067 | | float32x4_t __rev0_392; __rev0_392 = __builtin_shufflevector(__s0_392, __s0_392, 3, 2, 1, 0); \ |
| 50068 | | float32x2_t __ret_392; \ |
| 50069 | | __ret_392 = __noswap_splat_laneq_f32(__rev0_392, __p1_392); \ |
| 50070 | | __ret_392 = __builtin_shufflevector(__ret_392, __ret_392, 1, 0); \ |
| 50071 | | __ret_392; \ |
| 51421 | #define vdup_laneq_f32(__p0_484, __p1_484) __extension__ ({ \ |
| 51422 | float32x4_t __s0_484 = __p0_484; \ |
| 51423 | float32x4_t __rev0_484; __rev0_484 = __builtin_shufflevector(__s0_484, __s0_484, 3, 2, 1, 0); \ |
| 51424 | float32x2_t __ret_484; \ |
| 51425 | __ret_484 = __noswap_splat_laneq_f32(__rev0_484, __p1_484); \ |
| 51426 | __ret_484 = __builtin_shufflevector(__ret_484, __ret_484, 1, 0); \ |
| 51427 | __ret_484; \ |
| 50072 | 51428 | }) |
| 50073 | 51429 | #endif |
| 50074 | 51430 | |
| 50075 | 51431 | #ifdef __LITTLE_ENDIAN__ |
| 50076 | | #define vdup_laneq_f16(__p0_393, __p1_393) __extension__ ({ \ |
| 50077 | | float16x8_t __s0_393 = __p0_393; \ |
| 50078 | | float16x4_t __ret_393; \ |
| 50079 | | __ret_393 = splat_laneq_f16(__s0_393, __p1_393); \ |
| 50080 | | __ret_393; \ |
| 51432 | #define vdup_laneq_f16(__p0_485, __p1_485) __extension__ ({ \ |
| 51433 | float16x8_t __s0_485 = __p0_485; \ |
| 51434 | float16x4_t __ret_485; \ |
| 51435 | __ret_485 = splat_laneq_f16(__s0_485, __p1_485); \ |
| 51436 | __ret_485; \ |
| 50081 | 51437 | }) |
| 50082 | 51438 | #else |
| 50083 | | #define vdup_laneq_f16(__p0_394, __p1_394) __extension__ ({ \ |
| 50084 | | float16x8_t __s0_394 = __p0_394; \ |
| 50085 | | float16x8_t __rev0_394; __rev0_394 = __builtin_shufflevector(__s0_394, __s0_394, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50086 | | float16x4_t __ret_394; \ |
| 50087 | | __ret_394 = __noswap_splat_laneq_f16(__rev0_394, __p1_394); \ |
| 50088 | | __ret_394 = __builtin_shufflevector(__ret_394, __ret_394, 3, 2, 1, 0); \ |
| 50089 | | __ret_394; \ |
| 51439 | #define vdup_laneq_f16(__p0_486, __p1_486) __extension__ ({ \ |
| 51440 | float16x8_t __s0_486 = __p0_486; \ |
| 51441 | float16x8_t __rev0_486; __rev0_486 = __builtin_shufflevector(__s0_486, __s0_486, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51442 | float16x4_t __ret_486; \ |
| 51443 | __ret_486 = __noswap_splat_laneq_f16(__rev0_486, __p1_486); \ |
| 51444 | __ret_486 = __builtin_shufflevector(__ret_486, __ret_486, 3, 2, 1, 0); \ |
| 51445 | __ret_486; \ |
| 50090 | 51446 | }) |
| 50091 | 51447 | #endif |
| 50092 | 51448 | |
| 50093 | 51449 | #ifdef __LITTLE_ENDIAN__ |
| 50094 | | #define vdup_laneq_s32(__p0_395, __p1_395) __extension__ ({ \ |
| 50095 | | int32x4_t __s0_395 = __p0_395; \ |
| 50096 | | int32x2_t __ret_395; \ |
| 50097 | | __ret_395 = splat_laneq_s32(__s0_395, __p1_395); \ |
| 50098 | | __ret_395; \ |
| 51450 | #define vdup_laneq_s32(__p0_487, __p1_487) __extension__ ({ \ |
| 51451 | int32x4_t __s0_487 = __p0_487; \ |
| 51452 | int32x2_t __ret_487; \ |
| 51453 | __ret_487 = splat_laneq_s32(__s0_487, __p1_487); \ |
| 51454 | __ret_487; \ |
| 50099 | 51455 | }) |
| 50100 | 51456 | #else |
| 50101 | | #define vdup_laneq_s32(__p0_396, __p1_396) __extension__ ({ \ |
| 50102 | | int32x4_t __s0_396 = __p0_396; \ |
| 50103 | | int32x4_t __rev0_396; __rev0_396 = __builtin_shufflevector(__s0_396, __s0_396, 3, 2, 1, 0); \ |
| 50104 | | int32x2_t __ret_396; \ |
| 50105 | | __ret_396 = __noswap_splat_laneq_s32(__rev0_396, __p1_396); \ |
| 50106 | | __ret_396 = __builtin_shufflevector(__ret_396, __ret_396, 1, 0); \ |
| 50107 | | __ret_396; \ |
| 51457 | #define vdup_laneq_s32(__p0_488, __p1_488) __extension__ ({ \ |
| 51458 | int32x4_t __s0_488 = __p0_488; \ |
| 51459 | int32x4_t __rev0_488; __rev0_488 = __builtin_shufflevector(__s0_488, __s0_488, 3, 2, 1, 0); \ |
| 51460 | int32x2_t __ret_488; \ |
| 51461 | __ret_488 = __noswap_splat_laneq_s32(__rev0_488, __p1_488); \ |
| 51462 | __ret_488 = __builtin_shufflevector(__ret_488, __ret_488, 1, 0); \ |
| 51463 | __ret_488; \ |
| 50108 | 51464 | }) |
| 50109 | 51465 | #endif |
| 50110 | 51466 | |
| 50111 | 51467 | #ifdef __LITTLE_ENDIAN__ |
| 50112 | | #define vdup_laneq_s64(__p0_397, __p1_397) __extension__ ({ \ |
| 50113 | | int64x2_t __s0_397 = __p0_397; \ |
| 50114 | | int64x1_t __ret_397; \ |
| 50115 | | __ret_397 = splat_laneq_s64(__s0_397, __p1_397); \ |
| 50116 | | __ret_397; \ |
| 51468 | #define vdup_laneq_s64(__p0_489, __p1_489) __extension__ ({ \ |
| 51469 | int64x2_t __s0_489 = __p0_489; \ |
| 51470 | int64x1_t __ret_489; \ |
| 51471 | __ret_489 = splat_laneq_s64(__s0_489, __p1_489); \ |
| 51472 | __ret_489; \ |
| 50117 | 51473 | }) |
| 50118 | 51474 | #else |
| 50119 | | #define vdup_laneq_s64(__p0_398, __p1_398) __extension__ ({ \ |
| 50120 | | int64x2_t __s0_398 = __p0_398; \ |
| 50121 | | int64x2_t __rev0_398; __rev0_398 = __builtin_shufflevector(__s0_398, __s0_398, 1, 0); \ |
| 50122 | | int64x1_t __ret_398; \ |
| 50123 | | __ret_398 = __noswap_splat_laneq_s64(__rev0_398, __p1_398); \ |
| 50124 | | __ret_398; \ |
| 51475 | #define vdup_laneq_s64(__p0_490, __p1_490) __extension__ ({ \ |
| 51476 | int64x2_t __s0_490 = __p0_490; \ |
| 51477 | int64x2_t __rev0_490; __rev0_490 = __builtin_shufflevector(__s0_490, __s0_490, 1, 0); \ |
| 51478 | int64x1_t __ret_490; \ |
| 51479 | __ret_490 = __noswap_splat_laneq_s64(__rev0_490, __p1_490); \ |
| 51480 | __ret_490; \ |
| 50125 | 51481 | }) |
| 50126 | 51482 | #endif |
| 50127 | 51483 | |
| 50128 | 51484 | #ifdef __LITTLE_ENDIAN__ |
| 50129 | | #define vdup_laneq_s16(__p0_399, __p1_399) __extension__ ({ \ |
| 50130 | | int16x8_t __s0_399 = __p0_399; \ |
| 50131 | | int16x4_t __ret_399; \ |
| 50132 | | __ret_399 = splat_laneq_s16(__s0_399, __p1_399); \ |
| 50133 | | __ret_399; \ |
| 51485 | #define vdup_laneq_s16(__p0_491, __p1_491) __extension__ ({ \ |
| 51486 | int16x8_t __s0_491 = __p0_491; \ |
| 51487 | int16x4_t __ret_491; \ |
| 51488 | __ret_491 = splat_laneq_s16(__s0_491, __p1_491); \ |
| 51489 | __ret_491; \ |
| 50134 | 51490 | }) |
| 50135 | 51491 | #else |
| 50136 | | #define vdup_laneq_s16(__p0_400, __p1_400) __extension__ ({ \ |
| 50137 | | int16x8_t __s0_400 = __p0_400; \ |
| 50138 | | int16x8_t __rev0_400; __rev0_400 = __builtin_shufflevector(__s0_400, __s0_400, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 50139 | | int16x4_t __ret_400; \ |
| 50140 | | __ret_400 = __noswap_splat_laneq_s16(__rev0_400, __p1_400); \ |
| 50141 | | __ret_400 = __builtin_shufflevector(__ret_400, __ret_400, 3, 2, 1, 0); \ |
| 50142 | | __ret_400; \ |
| 51492 | #define vdup_laneq_s16(__p0_492, __p1_492) __extension__ ({ \ |
| 51493 | int16x8_t __s0_492 = __p0_492; \ |
| 51494 | int16x8_t __rev0_492; __rev0_492 = __builtin_shufflevector(__s0_492, __s0_492, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 51495 | int16x4_t __ret_492; \ |
| 51496 | __ret_492 = __noswap_splat_laneq_s16(__rev0_492, __p1_492); \ |
| 51497 | __ret_492 = __builtin_shufflevector(__ret_492, __ret_492, 3, 2, 1, 0); \ |
| 51498 | __ret_492; \ |
| 50143 | 51499 | }) |
| 50144 | 51500 | #endif |
| 50145 | 51501 | |
| ... | ... | @@ -50635,246 +51991,246 @@ __ai float64x1_t vfms_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) |
| 50635 | 51991 | __ret = vfma_f64(__p0, -__p1, __p2); |
| 50636 | 51992 | return __ret; |
| 50637 | 51993 | } |
| 50638 | | #define vfmsd_lane_f64(__p0_401, __p1_401, __p2_401, __p3_401) __extension__ ({ \ |
| 50639 | | float64_t __s0_401 = __p0_401; \ |
| 50640 | | float64_t __s1_401 = __p1_401; \ |
| 50641 | | float64x1_t __s2_401 = __p2_401; \ |
| 50642 | | float64_t __ret_401; \ |
| 50643 | | __ret_401 = vfmad_lane_f64(__s0_401, -__s1_401, __s2_401, __p3_401); \ |
| 50644 | | __ret_401; \ |
| 51994 | #define vfmsd_lane_f64(__p0_493, __p1_493, __p2_493, __p3_493) __extension__ ({ \ |
| 51995 | float64_t __s0_493 = __p0_493; \ |
| 51996 | float64_t __s1_493 = __p1_493; \ |
| 51997 | float64x1_t __s2_493 = __p2_493; \ |
| 51998 | float64_t __ret_493; \ |
| 51999 | __ret_493 = vfmad_lane_f64(__s0_493, -__s1_493, __s2_493, __p3_493); \ |
| 52000 | __ret_493; \ |
| 50645 | 52001 | }) |
| 50646 | 52002 | #ifdef __LITTLE_ENDIAN__ |
| 50647 | | #define vfmss_lane_f32(__p0_402, __p1_402, __p2_402, __p3_402) __extension__ ({ \ |
| 50648 | | float32_t __s0_402 = __p0_402; \ |
| 50649 | | float32_t __s1_402 = __p1_402; \ |
| 50650 | | float32x2_t __s2_402 = __p2_402; \ |
| 50651 | | float32_t __ret_402; \ |
| 50652 | | __ret_402 = vfmas_lane_f32(__s0_402, -__s1_402, __s2_402, __p3_402); \ |
| 50653 | | __ret_402; \ |
| 52003 | #define vfmss_lane_f32(__p0_494, __p1_494, __p2_494, __p3_494) __extension__ ({ \ |
| 52004 | float32_t __s0_494 = __p0_494; \ |
| 52005 | float32_t __s1_494 = __p1_494; \ |
| 52006 | float32x2_t __s2_494 = __p2_494; \ |
| 52007 | float32_t __ret_494; \ |
| 52008 | __ret_494 = vfmas_lane_f32(__s0_494, -__s1_494, __s2_494, __p3_494); \ |
| 52009 | __ret_494; \ |
| 50654 | 52010 | }) |
| 50655 | 52011 | #else |
| 50656 | | #define vfmss_lane_f32(__p0_403, __p1_403, __p2_403, __p3_403) __extension__ ({ \ |
| 50657 | | float32_t __s0_403 = __p0_403; \ |
| 50658 | | float32_t __s1_403 = __p1_403; \ |
| 50659 | | float32x2_t __s2_403 = __p2_403; \ |
| 50660 | | float32x2_t __rev2_403; __rev2_403 = __builtin_shufflevector(__s2_403, __s2_403, 1, 0); \ |
| 50661 | | float32_t __ret_403; \ |
| 50662 | | __ret_403 = __noswap_vfmas_lane_f32(__s0_403, -__s1_403, __rev2_403, __p3_403); \ |
| 50663 | | __ret_403; \ |
| 52012 | #define vfmss_lane_f32(__p0_495, __p1_495, __p2_495, __p3_495) __extension__ ({ \ |
| 52013 | float32_t __s0_495 = __p0_495; \ |
| 52014 | float32_t __s1_495 = __p1_495; \ |
| 52015 | float32x2_t __s2_495 = __p2_495; \ |
| 52016 | float32x2_t __rev2_495; __rev2_495 = __builtin_shufflevector(__s2_495, __s2_495, 1, 0); \ |
| 52017 | float32_t __ret_495; \ |
| 52018 | __ret_495 = __noswap_vfmas_lane_f32(__s0_495, -__s1_495, __rev2_495, __p3_495); \ |
| 52019 | __ret_495; \ |
| 50664 | 52020 | }) |
| 50665 | 52021 | #endif |
| 50666 | 52022 | |
| 50667 | 52023 | #ifdef __LITTLE_ENDIAN__ |
| 50668 | | #define vfmsq_lane_f64(__p0_404, __p1_404, __p2_404, __p3_404) __extension__ ({ \ |
| 50669 | | float64x2_t __s0_404 = __p0_404; \ |
| 50670 | | float64x2_t __s1_404 = __p1_404; \ |
| 50671 | | float64x1_t __s2_404 = __p2_404; \ |
| 50672 | | float64x2_t __ret_404; \ |
| 50673 | | __ret_404 = vfmaq_lane_f64(__s0_404, -__s1_404, __s2_404, __p3_404); \ |
| 50674 | | __ret_404; \ |
| 52024 | #define vfmsq_lane_f64(__p0_496, __p1_496, __p2_496, __p3_496) __extension__ ({ \ |
| 52025 | float64x2_t __s0_496 = __p0_496; \ |
| 52026 | float64x2_t __s1_496 = __p1_496; \ |
| 52027 | float64x1_t __s2_496 = __p2_496; \ |
| 52028 | float64x2_t __ret_496; \ |
| 52029 | __ret_496 = vfmaq_lane_f64(__s0_496, -__s1_496, __s2_496, __p3_496); \ |
| 52030 | __ret_496; \ |
| 50675 | 52031 | }) |
| 50676 | 52032 | #else |
| 50677 | | #define vfmsq_lane_f64(__p0_405, __p1_405, __p2_405, __p3_405) __extension__ ({ \ |
| 50678 | | float64x2_t __s0_405 = __p0_405; \ |
| 50679 | | float64x2_t __s1_405 = __p1_405; \ |
| 50680 | | float64x1_t __s2_405 = __p2_405; \ |
| 50681 | | float64x2_t __rev0_405; __rev0_405 = __builtin_shufflevector(__s0_405, __s0_405, 1, 0); \ |
| 50682 | | float64x2_t __rev1_405; __rev1_405 = __builtin_shufflevector(__s1_405, __s1_405, 1, 0); \ |
| 50683 | | float64x2_t __ret_405; \ |
| 50684 | | __ret_405 = __noswap_vfmaq_lane_f64(__rev0_405, -__rev1_405, __s2_405, __p3_405); \ |
| 50685 | | __ret_405 = __builtin_shufflevector(__ret_405, __ret_405, 1, 0); \ |
| 50686 | | __ret_405; \ |
| 52033 | #define vfmsq_lane_f64(__p0_497, __p1_497, __p2_497, __p3_497) __extension__ ({ \ |
| 52034 | float64x2_t __s0_497 = __p0_497; \ |
| 52035 | float64x2_t __s1_497 = __p1_497; \ |
| 52036 | float64x1_t __s2_497 = __p2_497; \ |
| 52037 | float64x2_t __rev0_497; __rev0_497 = __builtin_shufflevector(__s0_497, __s0_497, 1, 0); \ |
| 52038 | float64x2_t __rev1_497; __rev1_497 = __builtin_shufflevector(__s1_497, __s1_497, 1, 0); \ |
| 52039 | float64x2_t __ret_497; \ |
| 52040 | __ret_497 = __noswap_vfmaq_lane_f64(__rev0_497, -__rev1_497, __s2_497, __p3_497); \ |
| 52041 | __ret_497 = __builtin_shufflevector(__ret_497, __ret_497, 1, 0); \ |
| 52042 | __ret_497; \ |
| 50687 | 52043 | }) |
| 50688 | 52044 | #endif |
| 50689 | 52045 | |
| 50690 | 52046 | #ifdef __LITTLE_ENDIAN__ |
| 50691 | | #define vfmsq_lane_f32(__p0_406, __p1_406, __p2_406, __p3_406) __extension__ ({ \ |
| 50692 | | float32x4_t __s0_406 = __p0_406; \ |
| 50693 | | float32x4_t __s1_406 = __p1_406; \ |
| 50694 | | float32x2_t __s2_406 = __p2_406; \ |
| 50695 | | float32x4_t __ret_406; \ |
| 50696 | | __ret_406 = vfmaq_lane_f32(__s0_406, -__s1_406, __s2_406, __p3_406); \ |
| 50697 | | __ret_406; \ |
| 52047 | #define vfmsq_lane_f32(__p0_498, __p1_498, __p2_498, __p3_498) __extension__ ({ \ |
| 52048 | float32x4_t __s0_498 = __p0_498; \ |
| 52049 | float32x4_t __s1_498 = __p1_498; \ |
| 52050 | float32x2_t __s2_498 = __p2_498; \ |
| 52051 | float32x4_t __ret_498; \ |
| 52052 | __ret_498 = vfmaq_lane_f32(__s0_498, -__s1_498, __s2_498, __p3_498); \ |
| 52053 | __ret_498; \ |
| 50698 | 52054 | }) |
| 50699 | 52055 | #else |
| 50700 | | #define vfmsq_lane_f32(__p0_407, __p1_407, __p2_407, __p3_407) __extension__ ({ \ |
| 50701 | | float32x4_t __s0_407 = __p0_407; \ |
| 50702 | | float32x4_t __s1_407 = __p1_407; \ |
| 50703 | | float32x2_t __s2_407 = __p2_407; \ |
| 50704 | | float32x4_t __rev0_407; __rev0_407 = __builtin_shufflevector(__s0_407, __s0_407, 3, 2, 1, 0); \ |
| 50705 | | float32x4_t __rev1_407; __rev1_407 = __builtin_shufflevector(__s1_407, __s1_407, 3, 2, 1, 0); \ |
| 50706 | | float32x2_t __rev2_407; __rev2_407 = __builtin_shufflevector(__s2_407, __s2_407, 1, 0); \ |
| 50707 | | float32x4_t __ret_407; \ |
| 50708 | | __ret_407 = __noswap_vfmaq_lane_f32(__rev0_407, -__rev1_407, __rev2_407, __p3_407); \ |
| 50709 | | __ret_407 = __builtin_shufflevector(__ret_407, __ret_407, 3, 2, 1, 0); \ |
| 50710 | | __ret_407; \ |
| 52056 | #define vfmsq_lane_f32(__p0_499, __p1_499, __p2_499, __p3_499) __extension__ ({ \ |
| 52057 | float32x4_t __s0_499 = __p0_499; \ |
| 52058 | float32x4_t __s1_499 = __p1_499; \ |
| 52059 | float32x2_t __s2_499 = __p2_499; \ |
| 52060 | float32x4_t __rev0_499; __rev0_499 = __builtin_shufflevector(__s0_499, __s0_499, 3, 2, 1, 0); \ |
| 52061 | float32x4_t __rev1_499; __rev1_499 = __builtin_shufflevector(__s1_499, __s1_499, 3, 2, 1, 0); \ |
| 52062 | float32x2_t __rev2_499; __rev2_499 = __builtin_shufflevector(__s2_499, __s2_499, 1, 0); \ |
| 52063 | float32x4_t __ret_499; \ |
| 52064 | __ret_499 = __noswap_vfmaq_lane_f32(__rev0_499, -__rev1_499, __rev2_499, __p3_499); \ |
| 52065 | __ret_499 = __builtin_shufflevector(__ret_499, __ret_499, 3, 2, 1, 0); \ |
| 52066 | __ret_499; \ |
| 50711 | 52067 | }) |
| 50712 | 52068 | #endif |
| 50713 | 52069 | |
| 50714 | | #define vfms_lane_f64(__p0_408, __p1_408, __p2_408, __p3_408) __extension__ ({ \ |
| 50715 | | float64x1_t __s0_408 = __p0_408; \ |
| 50716 | | float64x1_t __s1_408 = __p1_408; \ |
| 50717 | | float64x1_t __s2_408 = __p2_408; \ |
| 50718 | | float64x1_t __ret_408; \ |
| 50719 | | __ret_408 = vfma_lane_f64(__s0_408, -__s1_408, __s2_408, __p3_408); \ |
| 50720 | | __ret_408; \ |
| 52070 | #define vfms_lane_f64(__p0_500, __p1_500, __p2_500, __p3_500) __extension__ ({ \ |
| 52071 | float64x1_t __s0_500 = __p0_500; \ |
| 52072 | float64x1_t __s1_500 = __p1_500; \ |
| 52073 | float64x1_t __s2_500 = __p2_500; \ |
| 52074 | float64x1_t __ret_500; \ |
| 52075 | __ret_500 = vfma_lane_f64(__s0_500, -__s1_500, __s2_500, __p3_500); \ |
| 52076 | __ret_500; \ |
| 50721 | 52077 | }) |
| 50722 | 52078 | #ifdef __LITTLE_ENDIAN__ |
| 50723 | | #define vfms_lane_f32(__p0_409, __p1_409, __p2_409, __p3_409) __extension__ ({ \ |
| 50724 | | float32x2_t __s0_409 = __p0_409; \ |
| 50725 | | float32x2_t __s1_409 = __p1_409; \ |
| 50726 | | float32x2_t __s2_409 = __p2_409; \ |
| 50727 | | float32x2_t __ret_409; \ |
| 50728 | | __ret_409 = vfma_lane_f32(__s0_409, -__s1_409, __s2_409, __p3_409); \ |
| 50729 | | __ret_409; \ |
| 52079 | #define vfms_lane_f32(__p0_501, __p1_501, __p2_501, __p3_501) __extension__ ({ \ |
| 52080 | float32x2_t __s0_501 = __p0_501; \ |
| 52081 | float32x2_t __s1_501 = __p1_501; \ |
| 52082 | float32x2_t __s2_501 = __p2_501; \ |
| 52083 | float32x2_t __ret_501; \ |
| 52084 | __ret_501 = vfma_lane_f32(__s0_501, -__s1_501, __s2_501, __p3_501); \ |
| 52085 | __ret_501; \ |
| 50730 | 52086 | }) |
| 50731 | 52087 | #else |
| 50732 | | #define vfms_lane_f32(__p0_410, __p1_410, __p2_410, __p3_410) __extension__ ({ \ |
| 50733 | | float32x2_t __s0_410 = __p0_410; \ |
| 50734 | | float32x2_t __s1_410 = __p1_410; \ |
| 50735 | | float32x2_t __s2_410 = __p2_410; \ |
| 50736 | | float32x2_t __rev0_410; __rev0_410 = __builtin_shufflevector(__s0_410, __s0_410, 1, 0); \ |
| 50737 | | float32x2_t __rev1_410; __rev1_410 = __builtin_shufflevector(__s1_410, __s1_410, 1, 0); \ |
| 50738 | | float32x2_t __rev2_410; __rev2_410 = __builtin_shufflevector(__s2_410, __s2_410, 1, 0); \ |
| 50739 | | float32x2_t __ret_410; \ |
| 50740 | | __ret_410 = __noswap_vfma_lane_f32(__rev0_410, -__rev1_410, __rev2_410, __p3_410); \ |
| 50741 | | __ret_410 = __builtin_shufflevector(__ret_410, __ret_410, 1, 0); \ |
| 50742 | | __ret_410; \ |
| 52088 | #define vfms_lane_f32(__p0_502, __p1_502, __p2_502, __p3_502) __extension__ ({ \ |
| 52089 | float32x2_t __s0_502 = __p0_502; \ |
| 52090 | float32x2_t __s1_502 = __p1_502; \ |
| 52091 | float32x2_t __s2_502 = __p2_502; \ |
| 52092 | float32x2_t __rev0_502; __rev0_502 = __builtin_shufflevector(__s0_502, __s0_502, 1, 0); \ |
| 52093 | float32x2_t __rev1_502; __rev1_502 = __builtin_shufflevector(__s1_502, __s1_502, 1, 0); \ |
| 52094 | float32x2_t __rev2_502; __rev2_502 = __builtin_shufflevector(__s2_502, __s2_502, 1, 0); \ |
| 52095 | float32x2_t __ret_502; \ |
| 52096 | __ret_502 = __noswap_vfma_lane_f32(__rev0_502, -__rev1_502, __rev2_502, __p3_502); \ |
| 52097 | __ret_502 = __builtin_shufflevector(__ret_502, __ret_502, 1, 0); \ |
| 52098 | __ret_502; \ |
| 50743 | 52099 | }) |
| 50744 | 52100 | #endif |
| 50745 | 52101 | |
| 50746 | 52102 | #ifdef __LITTLE_ENDIAN__ |
| 50747 | | #define vfmsd_laneq_f64(__p0_411, __p1_411, __p2_411, __p3_411) __extension__ ({ \ |
| 50748 | | float64_t __s0_411 = __p0_411; \ |
| 50749 | | float64_t __s1_411 = __p1_411; \ |
| 50750 | | float64x2_t __s2_411 = __p2_411; \ |
| 50751 | | float64_t __ret_411; \ |
| 50752 | | __ret_411 = vfmad_laneq_f64(__s0_411, -__s1_411, __s2_411, __p3_411); \ |
| 50753 | | __ret_411; \ |
| 52103 | #define vfmsd_laneq_f64(__p0_503, __p1_503, __p2_503, __p3_503) __extension__ ({ \ |
| 52104 | float64_t __s0_503 = __p0_503; \ |
| 52105 | float64_t __s1_503 = __p1_503; \ |
| 52106 | float64x2_t __s2_503 = __p2_503; \ |
| 52107 | float64_t __ret_503; \ |
| 52108 | __ret_503 = vfmad_laneq_f64(__s0_503, -__s1_503, __s2_503, __p3_503); \ |
| 52109 | __ret_503; \ |
| 50754 | 52110 | }) |
| 50755 | 52111 | #else |
| 50756 | | #define vfmsd_laneq_f64(__p0_412, __p1_412, __p2_412, __p3_412) __extension__ ({ \ |
| 50757 | | float64_t __s0_412 = __p0_412; \ |
| 50758 | | float64_t __s1_412 = __p1_412; \ |
| 50759 | | float64x2_t __s2_412 = __p2_412; \ |
| 50760 | | float64x2_t __rev2_412; __rev2_412 = __builtin_shufflevector(__s2_412, __s2_412, 1, 0); \ |
| 50761 | | float64_t __ret_412; \ |
| 50762 | | __ret_412 = __noswap_vfmad_laneq_f64(__s0_412, -__s1_412, __rev2_412, __p3_412); \ |
| 50763 | | __ret_412; \ |
| 52112 | #define vfmsd_laneq_f64(__p0_504, __p1_504, __p2_504, __p3_504) __extension__ ({ \ |
| 52113 | float64_t __s0_504 = __p0_504; \ |
| 52114 | float64_t __s1_504 = __p1_504; \ |
| 52115 | float64x2_t __s2_504 = __p2_504; \ |
| 52116 | float64x2_t __rev2_504; __rev2_504 = __builtin_shufflevector(__s2_504, __s2_504, 1, 0); \ |
| 52117 | float64_t __ret_504; \ |
| 52118 | __ret_504 = __noswap_vfmad_laneq_f64(__s0_504, -__s1_504, __rev2_504, __p3_504); \ |
| 52119 | __ret_504; \ |
| 50764 | 52120 | }) |
| 50765 | 52121 | #endif |
| 50766 | 52122 | |
| 50767 | 52123 | #ifdef __LITTLE_ENDIAN__ |
| 50768 | | #define vfmss_laneq_f32(__p0_413, __p1_413, __p2_413, __p3_413) __extension__ ({ \ |
| 50769 | | float32_t __s0_413 = __p0_413; \ |
| 50770 | | float32_t __s1_413 = __p1_413; \ |
| 50771 | | float32x4_t __s2_413 = __p2_413; \ |
| 50772 | | float32_t __ret_413; \ |
| 50773 | | __ret_413 = vfmas_laneq_f32(__s0_413, -__s1_413, __s2_413, __p3_413); \ |
| 50774 | | __ret_413; \ |
| 52124 | #define vfmss_laneq_f32(__p0_505, __p1_505, __p2_505, __p3_505) __extension__ ({ \ |
| 52125 | float32_t __s0_505 = __p0_505; \ |
| 52126 | float32_t __s1_505 = __p1_505; \ |
| 52127 | float32x4_t __s2_505 = __p2_505; \ |
| 52128 | float32_t __ret_505; \ |
| 52129 | __ret_505 = vfmas_laneq_f32(__s0_505, -__s1_505, __s2_505, __p3_505); \ |
| 52130 | __ret_505; \ |
| 50775 | 52131 | }) |
| 50776 | 52132 | #else |
| 50777 | | #define vfmss_laneq_f32(__p0_414, __p1_414, __p2_414, __p3_414) __extension__ ({ \ |
| 50778 | | float32_t __s0_414 = __p0_414; \ |
| 50779 | | float32_t __s1_414 = __p1_414; \ |
| 50780 | | float32x4_t __s2_414 = __p2_414; \ |
| 50781 | | float32x4_t __rev2_414; __rev2_414 = __builtin_shufflevector(__s2_414, __s2_414, 3, 2, 1, 0); \ |
| 50782 | | float32_t __ret_414; \ |
| 50783 | | __ret_414 = __noswap_vfmas_laneq_f32(__s0_414, -__s1_414, __rev2_414, __p3_414); \ |
| 50784 | | __ret_414; \ |
| 52133 | #define vfmss_laneq_f32(__p0_506, __p1_506, __p2_506, __p3_506) __extension__ ({ \ |
| 52134 | float32_t __s0_506 = __p0_506; \ |
| 52135 | float32_t __s1_506 = __p1_506; \ |
| 52136 | float32x4_t __s2_506 = __p2_506; \ |
| 52137 | float32x4_t __rev2_506; __rev2_506 = __builtin_shufflevector(__s2_506, __s2_506, 3, 2, 1, 0); \ |
| 52138 | float32_t __ret_506; \ |
| 52139 | __ret_506 = __noswap_vfmas_laneq_f32(__s0_506, -__s1_506, __rev2_506, __p3_506); \ |
| 52140 | __ret_506; \ |
| 50785 | 52141 | }) |
| 50786 | 52142 | #endif |
| 50787 | 52143 | |
| 50788 | 52144 | #ifdef __LITTLE_ENDIAN__ |
| 50789 | | #define vfmsq_laneq_f64(__p0_415, __p1_415, __p2_415, __p3_415) __extension__ ({ \ |
| 50790 | | float64x2_t __s0_415 = __p0_415; \ |
| 50791 | | float64x2_t __s1_415 = __p1_415; \ |
| 50792 | | float64x2_t __s2_415 = __p2_415; \ |
| 50793 | | float64x2_t __ret_415; \ |
| 50794 | | __ret_415 = vfmaq_laneq_f64(__s0_415, -__s1_415, __s2_415, __p3_415); \ |
| 50795 | | __ret_415; \ |
| 52145 | #define vfmsq_laneq_f64(__p0_507, __p1_507, __p2_507, __p3_507) __extension__ ({ \ |
| 52146 | float64x2_t __s0_507 = __p0_507; \ |
| 52147 | float64x2_t __s1_507 = __p1_507; \ |
| 52148 | float64x2_t __s2_507 = __p2_507; \ |
| 52149 | float64x2_t __ret_507; \ |
| 52150 | __ret_507 = vfmaq_laneq_f64(__s0_507, -__s1_507, __s2_507, __p3_507); \ |
| 52151 | __ret_507; \ |
| 50796 | 52152 | }) |
| 50797 | 52153 | #else |
| 50798 | | #define vfmsq_laneq_f64(__p0_416, __p1_416, __p2_416, __p3_416) __extension__ ({ \ |
| 50799 | | float64x2_t __s0_416 = __p0_416; \ |
| 50800 | | float64x2_t __s1_416 = __p1_416; \ |
| 50801 | | float64x2_t __s2_416 = __p2_416; \ |
| 50802 | | float64x2_t __rev0_416; __rev0_416 = __builtin_shufflevector(__s0_416, __s0_416, 1, 0); \ |
| 50803 | | float64x2_t __rev1_416; __rev1_416 = __builtin_shufflevector(__s1_416, __s1_416, 1, 0); \ |
| 50804 | | float64x2_t __rev2_416; __rev2_416 = __builtin_shufflevector(__s2_416, __s2_416, 1, 0); \ |
| 50805 | | float64x2_t __ret_416; \ |
| 50806 | | __ret_416 = __noswap_vfmaq_laneq_f64(__rev0_416, -__rev1_416, __rev2_416, __p3_416); \ |
| 50807 | | __ret_416 = __builtin_shufflevector(__ret_416, __ret_416, 1, 0); \ |
| 50808 | | __ret_416; \ |
| 52154 | #define vfmsq_laneq_f64(__p0_508, __p1_508, __p2_508, __p3_508) __extension__ ({ \ |
| 52155 | float64x2_t __s0_508 = __p0_508; \ |
| 52156 | float64x2_t __s1_508 = __p1_508; \ |
| 52157 | float64x2_t __s2_508 = __p2_508; \ |
| 52158 | float64x2_t __rev0_508; __rev0_508 = __builtin_shufflevector(__s0_508, __s0_508, 1, 0); \ |
| 52159 | float64x2_t __rev1_508; __rev1_508 = __builtin_shufflevector(__s1_508, __s1_508, 1, 0); \ |
| 52160 | float64x2_t __rev2_508; __rev2_508 = __builtin_shufflevector(__s2_508, __s2_508, 1, 0); \ |
| 52161 | float64x2_t __ret_508; \ |
| 52162 | __ret_508 = __noswap_vfmaq_laneq_f64(__rev0_508, -__rev1_508, __rev2_508, __p3_508); \ |
| 52163 | __ret_508 = __builtin_shufflevector(__ret_508, __ret_508, 1, 0); \ |
| 52164 | __ret_508; \ |
| 50809 | 52165 | }) |
| 50810 | 52166 | #endif |
| 50811 | 52167 | |
| 50812 | 52168 | #ifdef __LITTLE_ENDIAN__ |
| 50813 | | #define vfmsq_laneq_f32(__p0_417, __p1_417, __p2_417, __p3_417) __extension__ ({ \ |
| 50814 | | float32x4_t __s0_417 = __p0_417; \ |
| 50815 | | float32x4_t __s1_417 = __p1_417; \ |
| 50816 | | float32x4_t __s2_417 = __p2_417; \ |
| 50817 | | float32x4_t __ret_417; \ |
| 50818 | | __ret_417 = vfmaq_laneq_f32(__s0_417, -__s1_417, __s2_417, __p3_417); \ |
| 50819 | | __ret_417; \ |
| 52169 | #define vfmsq_laneq_f32(__p0_509, __p1_509, __p2_509, __p3_509) __extension__ ({ \ |
| 52170 | float32x4_t __s0_509 = __p0_509; \ |
| 52171 | float32x4_t __s1_509 = __p1_509; \ |
| 52172 | float32x4_t __s2_509 = __p2_509; \ |
| 52173 | float32x4_t __ret_509; \ |
| 52174 | __ret_509 = vfmaq_laneq_f32(__s0_509, -__s1_509, __s2_509, __p3_509); \ |
| 52175 | __ret_509; \ |
| 50820 | 52176 | }) |
| 50821 | 52177 | #else |
| 50822 | | #define vfmsq_laneq_f32(__p0_418, __p1_418, __p2_418, __p3_418) __extension__ ({ \ |
| 50823 | | float32x4_t __s0_418 = __p0_418; \ |
| 50824 | | float32x4_t __s1_418 = __p1_418; \ |
| 50825 | | float32x4_t __s2_418 = __p2_418; \ |
| 50826 | | float32x4_t __rev0_418; __rev0_418 = __builtin_shufflevector(__s0_418, __s0_418, 3, 2, 1, 0); \ |
| 50827 | | float32x4_t __rev1_418; __rev1_418 = __builtin_shufflevector(__s1_418, __s1_418, 3, 2, 1, 0); \ |
| 50828 | | float32x4_t __rev2_418; __rev2_418 = __builtin_shufflevector(__s2_418, __s2_418, 3, 2, 1, 0); \ |
| 50829 | | float32x4_t __ret_418; \ |
| 50830 | | __ret_418 = __noswap_vfmaq_laneq_f32(__rev0_418, -__rev1_418, __rev2_418, __p3_418); \ |
| 50831 | | __ret_418 = __builtin_shufflevector(__ret_418, __ret_418, 3, 2, 1, 0); \ |
| 50832 | | __ret_418; \ |
| 52178 | #define vfmsq_laneq_f32(__p0_510, __p1_510, __p2_510, __p3_510) __extension__ ({ \ |
| 52179 | float32x4_t __s0_510 = __p0_510; \ |
| 52180 | float32x4_t __s1_510 = __p1_510; \ |
| 52181 | float32x4_t __s2_510 = __p2_510; \ |
| 52182 | float32x4_t __rev0_510; __rev0_510 = __builtin_shufflevector(__s0_510, __s0_510, 3, 2, 1, 0); \ |
| 52183 | float32x4_t __rev1_510; __rev1_510 = __builtin_shufflevector(__s1_510, __s1_510, 3, 2, 1, 0); \ |
| 52184 | float32x4_t __rev2_510; __rev2_510 = __builtin_shufflevector(__s2_510, __s2_510, 3, 2, 1, 0); \ |
| 52185 | float32x4_t __ret_510; \ |
| 52186 | __ret_510 = __noswap_vfmaq_laneq_f32(__rev0_510, -__rev1_510, __rev2_510, __p3_510); \ |
| 52187 | __ret_510 = __builtin_shufflevector(__ret_510, __ret_510, 3, 2, 1, 0); \ |
| 52188 | __ret_510; \ |
| 50833 | 52189 | }) |
| 50834 | 52190 | #endif |
| 50835 | 52191 | |
| 50836 | 52192 | #ifdef __LITTLE_ENDIAN__ |
| 50837 | | #define vfms_laneq_f64(__p0_419, __p1_419, __p2_419, __p3_419) __extension__ ({ \ |
| 50838 | | float64x1_t __s0_419 = __p0_419; \ |
| 50839 | | float64x1_t __s1_419 = __p1_419; \ |
| 50840 | | float64x2_t __s2_419 = __p2_419; \ |
| 50841 | | float64x1_t __ret_419; \ |
| 50842 | | __ret_419 = vfma_laneq_f64(__s0_419, -__s1_419, __s2_419, __p3_419); \ |
| 50843 | | __ret_419; \ |
| 52193 | #define vfms_laneq_f64(__p0_511, __p1_511, __p2_511, __p3_511) __extension__ ({ \ |
| 52194 | float64x1_t __s0_511 = __p0_511; \ |
| 52195 | float64x1_t __s1_511 = __p1_511; \ |
| 52196 | float64x2_t __s2_511 = __p2_511; \ |
| 52197 | float64x1_t __ret_511; \ |
| 52198 | __ret_511 = vfma_laneq_f64(__s0_511, -__s1_511, __s2_511, __p3_511); \ |
| 52199 | __ret_511; \ |
| 50844 | 52200 | }) |
| 50845 | 52201 | #else |
| 50846 | | #define vfms_laneq_f64(__p0_420, __p1_420, __p2_420, __p3_420) __extension__ ({ \ |
| 50847 | | float64x1_t __s0_420 = __p0_420; \ |
| 50848 | | float64x1_t __s1_420 = __p1_420; \ |
| 50849 | | float64x2_t __s2_420 = __p2_420; \ |
| 50850 | | float64x2_t __rev2_420; __rev2_420 = __builtin_shufflevector(__s2_420, __s2_420, 1, 0); \ |
| 50851 | | float64x1_t __ret_420; \ |
| 50852 | | __ret_420 = __noswap_vfma_laneq_f64(__s0_420, -__s1_420, __rev2_420, __p3_420); \ |
| 50853 | | __ret_420; \ |
| 52202 | #define vfms_laneq_f64(__p0_512, __p1_512, __p2_512, __p3_512) __extension__ ({ \ |
| 52203 | float64x1_t __s0_512 = __p0_512; \ |
| 52204 | float64x1_t __s1_512 = __p1_512; \ |
| 52205 | float64x2_t __s2_512 = __p2_512; \ |
| 52206 | float64x2_t __rev2_512; __rev2_512 = __builtin_shufflevector(__s2_512, __s2_512, 1, 0); \ |
| 52207 | float64x1_t __ret_512; \ |
| 52208 | __ret_512 = __noswap_vfma_laneq_f64(__s0_512, -__s1_512, __rev2_512, __p3_512); \ |
| 52209 | __ret_512; \ |
| 50854 | 52210 | }) |
| 50855 | 52211 | #endif |
| 50856 | 52212 | |
| 50857 | 52213 | #ifdef __LITTLE_ENDIAN__ |
| 50858 | | #define vfms_laneq_f32(__p0_421, __p1_421, __p2_421, __p3_421) __extension__ ({ \ |
| 50859 | | float32x2_t __s0_421 = __p0_421; \ |
| 50860 | | float32x2_t __s1_421 = __p1_421; \ |
| 50861 | | float32x4_t __s2_421 = __p2_421; \ |
| 50862 | | float32x2_t __ret_421; \ |
| 50863 | | __ret_421 = vfma_laneq_f32(__s0_421, -__s1_421, __s2_421, __p3_421); \ |
| 50864 | | __ret_421; \ |
| 52214 | #define vfms_laneq_f32(__p0_513, __p1_513, __p2_513, __p3_513) __extension__ ({ \ |
| 52215 | float32x2_t __s0_513 = __p0_513; \ |
| 52216 | float32x2_t __s1_513 = __p1_513; \ |
| 52217 | float32x4_t __s2_513 = __p2_513; \ |
| 52218 | float32x2_t __ret_513; \ |
| 52219 | __ret_513 = vfma_laneq_f32(__s0_513, -__s1_513, __s2_513, __p3_513); \ |
| 52220 | __ret_513; \ |
| 50865 | 52221 | }) |
| 50866 | 52222 | #else |
| 50867 | | #define vfms_laneq_f32(__p0_422, __p1_422, __p2_422, __p3_422) __extension__ ({ \ |
| 50868 | | float32x2_t __s0_422 = __p0_422; \ |
| 50869 | | float32x2_t __s1_422 = __p1_422; \ |
| 50870 | | float32x4_t __s2_422 = __p2_422; \ |
| 50871 | | float32x2_t __rev0_422; __rev0_422 = __builtin_shufflevector(__s0_422, __s0_422, 1, 0); \ |
| 50872 | | float32x2_t __rev1_422; __rev1_422 = __builtin_shufflevector(__s1_422, __s1_422, 1, 0); \ |
| 50873 | | float32x4_t __rev2_422; __rev2_422 = __builtin_shufflevector(__s2_422, __s2_422, 3, 2, 1, 0); \ |
| 50874 | | float32x2_t __ret_422; \ |
| 50875 | | __ret_422 = __noswap_vfma_laneq_f32(__rev0_422, -__rev1_422, __rev2_422, __p3_422); \ |
| 50876 | | __ret_422 = __builtin_shufflevector(__ret_422, __ret_422, 1, 0); \ |
| 50877 | | __ret_422; \ |
| 52223 | #define vfms_laneq_f32(__p0_514, __p1_514, __p2_514, __p3_514) __extension__ ({ \ |
| 52224 | float32x2_t __s0_514 = __p0_514; \ |
| 52225 | float32x2_t __s1_514 = __p1_514; \ |
| 52226 | float32x4_t __s2_514 = __p2_514; \ |
| 52227 | float32x2_t __rev0_514; __rev0_514 = __builtin_shufflevector(__s0_514, __s0_514, 1, 0); \ |
| 52228 | float32x2_t __rev1_514; __rev1_514 = __builtin_shufflevector(__s1_514, __s1_514, 1, 0); \ |
| 52229 | float32x4_t __rev2_514; __rev2_514 = __builtin_shufflevector(__s2_514, __s2_514, 3, 2, 1, 0); \ |
| 52230 | float32x2_t __ret_514; \ |
| 52231 | __ret_514 = __noswap_vfma_laneq_f32(__rev0_514, -__rev1_514, __rev2_514, __p3_514); \ |
| 52232 | __ret_514 = __builtin_shufflevector(__ret_514, __ret_514, 1, 0); \ |
| 52233 | __ret_514; \ |
| 50878 | 52234 | }) |
| 50879 | 52235 | #endif |
| 50880 | 52236 | |
| ... | ... | @@ -52896,530 +54252,530 @@ __ai float64x1_t vmla_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) |
| 52896 | 54252 | return __ret; |
| 52897 | 54253 | } |
| 52898 | 54254 | #ifdef __LITTLE_ENDIAN__ |
| 52899 | | #define vmlaq_laneq_u32(__p0_423, __p1_423, __p2_423, __p3_423) __extension__ ({ \ |
| 52900 | | uint32x4_t __s0_423 = __p0_423; \ |
| 52901 | | uint32x4_t __s1_423 = __p1_423; \ |
| 52902 | | uint32x4_t __s2_423 = __p2_423; \ |
| 52903 | | uint32x4_t __ret_423; \ |
| 52904 | | __ret_423 = __s0_423 + __s1_423 * splatq_laneq_u32(__s2_423, __p3_423); \ |
| 52905 | | __ret_423; \ |
| 54255 | #define vmlaq_laneq_u32(__p0_515, __p1_515, __p2_515, __p3_515) __extension__ ({ \ |
| 54256 | uint32x4_t __s0_515 = __p0_515; \ |
| 54257 | uint32x4_t __s1_515 = __p1_515; \ |
| 54258 | uint32x4_t __s2_515 = __p2_515; \ |
| 54259 | uint32x4_t __ret_515; \ |
| 54260 | __ret_515 = __s0_515 + __s1_515 * splatq_laneq_u32(__s2_515, __p3_515); \ |
| 54261 | __ret_515; \ |
| 52906 | 54262 | }) |
| 52907 | 54263 | #else |
| 52908 | | #define vmlaq_laneq_u32(__p0_424, __p1_424, __p2_424, __p3_424) __extension__ ({ \ |
| 52909 | | uint32x4_t __s0_424 = __p0_424; \ |
| 52910 | | uint32x4_t __s1_424 = __p1_424; \ |
| 52911 | | uint32x4_t __s2_424 = __p2_424; \ |
| 52912 | | uint32x4_t __rev0_424; __rev0_424 = __builtin_shufflevector(__s0_424, __s0_424, 3, 2, 1, 0); \ |
| 52913 | | uint32x4_t __rev1_424; __rev1_424 = __builtin_shufflevector(__s1_424, __s1_424, 3, 2, 1, 0); \ |
| 52914 | | uint32x4_t __rev2_424; __rev2_424 = __builtin_shufflevector(__s2_424, __s2_424, 3, 2, 1, 0); \ |
| 52915 | | uint32x4_t __ret_424; \ |
| 52916 | | __ret_424 = __rev0_424 + __rev1_424 * __noswap_splatq_laneq_u32(__rev2_424, __p3_424); \ |
| 52917 | | __ret_424 = __builtin_shufflevector(__ret_424, __ret_424, 3, 2, 1, 0); \ |
| 52918 | | __ret_424; \ |
| 54264 | #define vmlaq_laneq_u32(__p0_516, __p1_516, __p2_516, __p3_516) __extension__ ({ \ |
| 54265 | uint32x4_t __s0_516 = __p0_516; \ |
| 54266 | uint32x4_t __s1_516 = __p1_516; \ |
| 54267 | uint32x4_t __s2_516 = __p2_516; \ |
| 54268 | uint32x4_t __rev0_516; __rev0_516 = __builtin_shufflevector(__s0_516, __s0_516, 3, 2, 1, 0); \ |
| 54269 | uint32x4_t __rev1_516; __rev1_516 = __builtin_shufflevector(__s1_516, __s1_516, 3, 2, 1, 0); \ |
| 54270 | uint32x4_t __rev2_516; __rev2_516 = __builtin_shufflevector(__s2_516, __s2_516, 3, 2, 1, 0); \ |
| 54271 | uint32x4_t __ret_516; \ |
| 54272 | __ret_516 = __rev0_516 + __rev1_516 * __noswap_splatq_laneq_u32(__rev2_516, __p3_516); \ |
| 54273 | __ret_516 = __builtin_shufflevector(__ret_516, __ret_516, 3, 2, 1, 0); \ |
| 54274 | __ret_516; \ |
| 52919 | 54275 | }) |
| 52920 | 54276 | #endif |
| 52921 | 54277 | |
| 52922 | 54278 | #ifdef __LITTLE_ENDIAN__ |
| 52923 | | #define vmlaq_laneq_u16(__p0_425, __p1_425, __p2_425, __p3_425) __extension__ ({ \ |
| 52924 | | uint16x8_t __s0_425 = __p0_425; \ |
| 52925 | | uint16x8_t __s1_425 = __p1_425; \ |
| 52926 | | uint16x8_t __s2_425 = __p2_425; \ |
| 52927 | | uint16x8_t __ret_425; \ |
| 52928 | | __ret_425 = __s0_425 + __s1_425 * splatq_laneq_u16(__s2_425, __p3_425); \ |
| 52929 | | __ret_425; \ |
| 54279 | #define vmlaq_laneq_u16(__p0_517, __p1_517, __p2_517, __p3_517) __extension__ ({ \ |
| 54280 | uint16x8_t __s0_517 = __p0_517; \ |
| 54281 | uint16x8_t __s1_517 = __p1_517; \ |
| 54282 | uint16x8_t __s2_517 = __p2_517; \ |
| 54283 | uint16x8_t __ret_517; \ |
| 54284 | __ret_517 = __s0_517 + __s1_517 * splatq_laneq_u16(__s2_517, __p3_517); \ |
| 54285 | __ret_517; \ |
| 52930 | 54286 | }) |
| 52931 | 54287 | #else |
| 52932 | | #define vmlaq_laneq_u16(__p0_426, __p1_426, __p2_426, __p3_426) __extension__ ({ \ |
| 52933 | | uint16x8_t __s0_426 = __p0_426; \ |
| 52934 | | uint16x8_t __s1_426 = __p1_426; \ |
| 52935 | | uint16x8_t __s2_426 = __p2_426; \ |
| 52936 | | uint16x8_t __rev0_426; __rev0_426 = __builtin_shufflevector(__s0_426, __s0_426, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52937 | | uint16x8_t __rev1_426; __rev1_426 = __builtin_shufflevector(__s1_426, __s1_426, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52938 | | uint16x8_t __rev2_426; __rev2_426 = __builtin_shufflevector(__s2_426, __s2_426, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52939 | | uint16x8_t __ret_426; \ |
| 52940 | | __ret_426 = __rev0_426 + __rev1_426 * __noswap_splatq_laneq_u16(__rev2_426, __p3_426); \ |
| 52941 | | __ret_426 = __builtin_shufflevector(__ret_426, __ret_426, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 52942 | | __ret_426; \ |
| 54288 | #define vmlaq_laneq_u16(__p0_518, __p1_518, __p2_518, __p3_518) __extension__ ({ \ |
| 54289 | uint16x8_t __s0_518 = __p0_518; \ |
| 54290 | uint16x8_t __s1_518 = __p1_518; \ |
| 54291 | uint16x8_t __s2_518 = __p2_518; \ |
| 54292 | uint16x8_t __rev0_518; __rev0_518 = __builtin_shufflevector(__s0_518, __s0_518, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54293 | uint16x8_t __rev1_518; __rev1_518 = __builtin_shufflevector(__s1_518, __s1_518, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54294 | uint16x8_t __rev2_518; __rev2_518 = __builtin_shufflevector(__s2_518, __s2_518, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54295 | uint16x8_t __ret_518; \ |
| 54296 | __ret_518 = __rev0_518 + __rev1_518 * __noswap_splatq_laneq_u16(__rev2_518, __p3_518); \ |
| 54297 | __ret_518 = __builtin_shufflevector(__ret_518, __ret_518, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54298 | __ret_518; \ |
| 52943 | 54299 | }) |
| 52944 | 54300 | #endif |
| 52945 | 54301 | |
| 52946 | 54302 | #ifdef __LITTLE_ENDIAN__ |
| 52947 | | #define vmlaq_laneq_f32(__p0_427, __p1_427, __p2_427, __p3_427) __extension__ ({ \ |
| 52948 | | float32x4_t __s0_427 = __p0_427; \ |
| 52949 | | float32x4_t __s1_427 = __p1_427; \ |
| 52950 | | float32x4_t __s2_427 = __p2_427; \ |
| 52951 | | float32x4_t __ret_427; \ |
| 52952 | | __ret_427 = __s0_427 + __s1_427 * splatq_laneq_f32(__s2_427, __p3_427); \ |
| 52953 | | __ret_427; \ |
| 54303 | #define vmlaq_laneq_f32(__p0_519, __p1_519, __p2_519, __p3_519) __extension__ ({ \ |
| 54304 | float32x4_t __s0_519 = __p0_519; \ |
| 54305 | float32x4_t __s1_519 = __p1_519; \ |
| 54306 | float32x4_t __s2_519 = __p2_519; \ |
| 54307 | float32x4_t __ret_519; \ |
| 54308 | __ret_519 = __s0_519 + __s1_519 * splatq_laneq_f32(__s2_519, __p3_519); \ |
| 54309 | __ret_519; \ |
| 52954 | 54310 | }) |
| 52955 | 54311 | #else |
| 52956 | | #define vmlaq_laneq_f32(__p0_428, __p1_428, __p2_428, __p3_428) __extension__ ({ \ |
| 52957 | | float32x4_t __s0_428 = __p0_428; \ |
| 52958 | | float32x4_t __s1_428 = __p1_428; \ |
| 52959 | | float32x4_t __s2_428 = __p2_428; \ |
| 52960 | | float32x4_t __rev0_428; __rev0_428 = __builtin_shufflevector(__s0_428, __s0_428, 3, 2, 1, 0); \ |
| 52961 | | float32x4_t __rev1_428; __rev1_428 = __builtin_shufflevector(__s1_428, __s1_428, 3, 2, 1, 0); \ |
| 52962 | | float32x4_t __rev2_428; __rev2_428 = __builtin_shufflevector(__s2_428, __s2_428, 3, 2, 1, 0); \ |
| 52963 | | float32x4_t __ret_428; \ |
| 52964 | | __ret_428 = __rev0_428 + __rev1_428 * __noswap_splatq_laneq_f32(__rev2_428, __p3_428); \ |
| 52965 | | __ret_428 = __builtin_shufflevector(__ret_428, __ret_428, 3, 2, 1, 0); \ |
| 52966 | | __ret_428; \ |
| 54312 | #define vmlaq_laneq_f32(__p0_520, __p1_520, __p2_520, __p3_520) __extension__ ({ \ |
| 54313 | float32x4_t __s0_520 = __p0_520; \ |
| 54314 | float32x4_t __s1_520 = __p1_520; \ |
| 54315 | float32x4_t __s2_520 = __p2_520; \ |
| 54316 | float32x4_t __rev0_520; __rev0_520 = __builtin_shufflevector(__s0_520, __s0_520, 3, 2, 1, 0); \ |
| 54317 | float32x4_t __rev1_520; __rev1_520 = __builtin_shufflevector(__s1_520, __s1_520, 3, 2, 1, 0); \ |
| 54318 | float32x4_t __rev2_520; __rev2_520 = __builtin_shufflevector(__s2_520, __s2_520, 3, 2, 1, 0); \ |
| 54319 | float32x4_t __ret_520; \ |
| 54320 | __ret_520 = __rev0_520 + __rev1_520 * __noswap_splatq_laneq_f32(__rev2_520, __p3_520); \ |
| 54321 | __ret_520 = __builtin_shufflevector(__ret_520, __ret_520, 3, 2, 1, 0); \ |
| 54322 | __ret_520; \ |
| 52967 | 54323 | }) |
| 52968 | 54324 | #endif |
| 52969 | 54325 | |
| 52970 | 54326 | #ifdef __LITTLE_ENDIAN__ |
| 52971 | | #define vmlaq_laneq_s32(__p0_429, __p1_429, __p2_429, __p3_429) __extension__ ({ \ |
| 52972 | | int32x4_t __s0_429 = __p0_429; \ |
| 52973 | | int32x4_t __s1_429 = __p1_429; \ |
| 52974 | | int32x4_t __s2_429 = __p2_429; \ |
| 52975 | | int32x4_t __ret_429; \ |
| 52976 | | __ret_429 = __s0_429 + __s1_429 * splatq_laneq_s32(__s2_429, __p3_429); \ |
| 52977 | | __ret_429; \ |
| 54327 | #define vmlaq_laneq_s32(__p0_521, __p1_521, __p2_521, __p3_521) __extension__ ({ \ |
| 54328 | int32x4_t __s0_521 = __p0_521; \ |
| 54329 | int32x4_t __s1_521 = __p1_521; \ |
| 54330 | int32x4_t __s2_521 = __p2_521; \ |
| 54331 | int32x4_t __ret_521; \ |
| 54332 | __ret_521 = __s0_521 + __s1_521 * splatq_laneq_s32(__s2_521, __p3_521); \ |
| 54333 | __ret_521; \ |
| 52978 | 54334 | }) |
| 52979 | 54335 | #else |
| 52980 | | #define vmlaq_laneq_s32(__p0_430, __p1_430, __p2_430, __p3_430) __extension__ ({ \ |
| 52981 | | int32x4_t __s0_430 = __p0_430; \ |
| 52982 | | int32x4_t __s1_430 = __p1_430; \ |
| 52983 | | int32x4_t __s2_430 = __p2_430; \ |
| 52984 | | int32x4_t __rev0_430; __rev0_430 = __builtin_shufflevector(__s0_430, __s0_430, 3, 2, 1, 0); \ |
| 52985 | | int32x4_t __rev1_430; __rev1_430 = __builtin_shufflevector(__s1_430, __s1_430, 3, 2, 1, 0); \ |
| 52986 | | int32x4_t __rev2_430; __rev2_430 = __builtin_shufflevector(__s2_430, __s2_430, 3, 2, 1, 0); \ |
| 52987 | | int32x4_t __ret_430; \ |
| 52988 | | __ret_430 = __rev0_430 + __rev1_430 * __noswap_splatq_laneq_s32(__rev2_430, __p3_430); \ |
| 52989 | | __ret_430 = __builtin_shufflevector(__ret_430, __ret_430, 3, 2, 1, 0); \ |
| 52990 | | __ret_430; \ |
| 54336 | #define vmlaq_laneq_s32(__p0_522, __p1_522, __p2_522, __p3_522) __extension__ ({ \ |
| 54337 | int32x4_t __s0_522 = __p0_522; \ |
| 54338 | int32x4_t __s1_522 = __p1_522; \ |
| 54339 | int32x4_t __s2_522 = __p2_522; \ |
| 54340 | int32x4_t __rev0_522; __rev0_522 = __builtin_shufflevector(__s0_522, __s0_522, 3, 2, 1, 0); \ |
| 54341 | int32x4_t __rev1_522; __rev1_522 = __builtin_shufflevector(__s1_522, __s1_522, 3, 2, 1, 0); \ |
| 54342 | int32x4_t __rev2_522; __rev2_522 = __builtin_shufflevector(__s2_522, __s2_522, 3, 2, 1, 0); \ |
| 54343 | int32x4_t __ret_522; \ |
| 54344 | __ret_522 = __rev0_522 + __rev1_522 * __noswap_splatq_laneq_s32(__rev2_522, __p3_522); \ |
| 54345 | __ret_522 = __builtin_shufflevector(__ret_522, __ret_522, 3, 2, 1, 0); \ |
| 54346 | __ret_522; \ |
| 52991 | 54347 | }) |
| 52992 | 54348 | #endif |
| 52993 | 54349 | |
| 52994 | 54350 | #ifdef __LITTLE_ENDIAN__ |
| 52995 | | #define vmlaq_laneq_s16(__p0_431, __p1_431, __p2_431, __p3_431) __extension__ ({ \ |
| 52996 | | int16x8_t __s0_431 = __p0_431; \ |
| 52997 | | int16x8_t __s1_431 = __p1_431; \ |
| 52998 | | int16x8_t __s2_431 = __p2_431; \ |
| 52999 | | int16x8_t __ret_431; \ |
| 53000 | | __ret_431 = __s0_431 + __s1_431 * splatq_laneq_s16(__s2_431, __p3_431); \ |
| 53001 | | __ret_431; \ |
| 54351 | #define vmlaq_laneq_s16(__p0_523, __p1_523, __p2_523, __p3_523) __extension__ ({ \ |
| 54352 | int16x8_t __s0_523 = __p0_523; \ |
| 54353 | int16x8_t __s1_523 = __p1_523; \ |
| 54354 | int16x8_t __s2_523 = __p2_523; \ |
| 54355 | int16x8_t __ret_523; \ |
| 54356 | __ret_523 = __s0_523 + __s1_523 * splatq_laneq_s16(__s2_523, __p3_523); \ |
| 54357 | __ret_523; \ |
| 53002 | 54358 | }) |
| 53003 | 54359 | #else |
| 53004 | | #define vmlaq_laneq_s16(__p0_432, __p1_432, __p2_432, __p3_432) __extension__ ({ \ |
| 53005 | | int16x8_t __s0_432 = __p0_432; \ |
| 53006 | | int16x8_t __s1_432 = __p1_432; \ |
| 53007 | | int16x8_t __s2_432 = __p2_432; \ |
| 53008 | | int16x8_t __rev0_432; __rev0_432 = __builtin_shufflevector(__s0_432, __s0_432, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53009 | | int16x8_t __rev1_432; __rev1_432 = __builtin_shufflevector(__s1_432, __s1_432, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53010 | | int16x8_t __rev2_432; __rev2_432 = __builtin_shufflevector(__s2_432, __s2_432, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53011 | | int16x8_t __ret_432; \ |
| 53012 | | __ret_432 = __rev0_432 + __rev1_432 * __noswap_splatq_laneq_s16(__rev2_432, __p3_432); \ |
| 53013 | | __ret_432 = __builtin_shufflevector(__ret_432, __ret_432, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53014 | | __ret_432; \ |
| 54360 | #define vmlaq_laneq_s16(__p0_524, __p1_524, __p2_524, __p3_524) __extension__ ({ \ |
| 54361 | int16x8_t __s0_524 = __p0_524; \ |
| 54362 | int16x8_t __s1_524 = __p1_524; \ |
| 54363 | int16x8_t __s2_524 = __p2_524; \ |
| 54364 | int16x8_t __rev0_524; __rev0_524 = __builtin_shufflevector(__s0_524, __s0_524, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54365 | int16x8_t __rev1_524; __rev1_524 = __builtin_shufflevector(__s1_524, __s1_524, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54366 | int16x8_t __rev2_524; __rev2_524 = __builtin_shufflevector(__s2_524, __s2_524, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54367 | int16x8_t __ret_524; \ |
| 54368 | __ret_524 = __rev0_524 + __rev1_524 * __noswap_splatq_laneq_s16(__rev2_524, __p3_524); \ |
| 54369 | __ret_524 = __builtin_shufflevector(__ret_524, __ret_524, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54370 | __ret_524; \ |
| 53015 | 54371 | }) |
| 53016 | 54372 | #endif |
| 53017 | 54373 | |
| 53018 | 54374 | #ifdef __LITTLE_ENDIAN__ |
| 53019 | | #define vmla_laneq_u32(__p0_433, __p1_433, __p2_433, __p3_433) __extension__ ({ \ |
| 53020 | | uint32x2_t __s0_433 = __p0_433; \ |
| 53021 | | uint32x2_t __s1_433 = __p1_433; \ |
| 53022 | | uint32x4_t __s2_433 = __p2_433; \ |
| 53023 | | uint32x2_t __ret_433; \ |
| 53024 | | __ret_433 = __s0_433 + __s1_433 * splat_laneq_u32(__s2_433, __p3_433); \ |
| 53025 | | __ret_433; \ |
| 54375 | #define vmla_laneq_u32(__p0_525, __p1_525, __p2_525, __p3_525) __extension__ ({ \ |
| 54376 | uint32x2_t __s0_525 = __p0_525; \ |
| 54377 | uint32x2_t __s1_525 = __p1_525; \ |
| 54378 | uint32x4_t __s2_525 = __p2_525; \ |
| 54379 | uint32x2_t __ret_525; \ |
| 54380 | __ret_525 = __s0_525 + __s1_525 * splat_laneq_u32(__s2_525, __p3_525); \ |
| 54381 | __ret_525; \ |
| 53026 | 54382 | }) |
| 53027 | 54383 | #else |
| 53028 | | #define vmla_laneq_u32(__p0_434, __p1_434, __p2_434, __p3_434) __extension__ ({ \ |
| 53029 | | uint32x2_t __s0_434 = __p0_434; \ |
| 53030 | | uint32x2_t __s1_434 = __p1_434; \ |
| 53031 | | uint32x4_t __s2_434 = __p2_434; \ |
| 53032 | | uint32x2_t __rev0_434; __rev0_434 = __builtin_shufflevector(__s0_434, __s0_434, 1, 0); \ |
| 53033 | | uint32x2_t __rev1_434; __rev1_434 = __builtin_shufflevector(__s1_434, __s1_434, 1, 0); \ |
| 53034 | | uint32x4_t __rev2_434; __rev2_434 = __builtin_shufflevector(__s2_434, __s2_434, 3, 2, 1, 0); \ |
| 53035 | | uint32x2_t __ret_434; \ |
| 53036 | | __ret_434 = __rev0_434 + __rev1_434 * __noswap_splat_laneq_u32(__rev2_434, __p3_434); \ |
| 53037 | | __ret_434 = __builtin_shufflevector(__ret_434, __ret_434, 1, 0); \ |
| 53038 | | __ret_434; \ |
| 54384 | #define vmla_laneq_u32(__p0_526, __p1_526, __p2_526, __p3_526) __extension__ ({ \ |
| 54385 | uint32x2_t __s0_526 = __p0_526; \ |
| 54386 | uint32x2_t __s1_526 = __p1_526; \ |
| 54387 | uint32x4_t __s2_526 = __p2_526; \ |
| 54388 | uint32x2_t __rev0_526; __rev0_526 = __builtin_shufflevector(__s0_526, __s0_526, 1, 0); \ |
| 54389 | uint32x2_t __rev1_526; __rev1_526 = __builtin_shufflevector(__s1_526, __s1_526, 1, 0); \ |
| 54390 | uint32x4_t __rev2_526; __rev2_526 = __builtin_shufflevector(__s2_526, __s2_526, 3, 2, 1, 0); \ |
| 54391 | uint32x2_t __ret_526; \ |
| 54392 | __ret_526 = __rev0_526 + __rev1_526 * __noswap_splat_laneq_u32(__rev2_526, __p3_526); \ |
| 54393 | __ret_526 = __builtin_shufflevector(__ret_526, __ret_526, 1, 0); \ |
| 54394 | __ret_526; \ |
| 53039 | 54395 | }) |
| 53040 | 54396 | #endif |
| 53041 | 54397 | |
| 53042 | 54398 | #ifdef __LITTLE_ENDIAN__ |
| 53043 | | #define vmla_laneq_u16(__p0_435, __p1_435, __p2_435, __p3_435) __extension__ ({ \ |
| 53044 | | uint16x4_t __s0_435 = __p0_435; \ |
| 53045 | | uint16x4_t __s1_435 = __p1_435; \ |
| 53046 | | uint16x8_t __s2_435 = __p2_435; \ |
| 53047 | | uint16x4_t __ret_435; \ |
| 53048 | | __ret_435 = __s0_435 + __s1_435 * splat_laneq_u16(__s2_435, __p3_435); \ |
| 53049 | | __ret_435; \ |
| 54399 | #define vmla_laneq_u16(__p0_527, __p1_527, __p2_527, __p3_527) __extension__ ({ \ |
| 54400 | uint16x4_t __s0_527 = __p0_527; \ |
| 54401 | uint16x4_t __s1_527 = __p1_527; \ |
| 54402 | uint16x8_t __s2_527 = __p2_527; \ |
| 54403 | uint16x4_t __ret_527; \ |
| 54404 | __ret_527 = __s0_527 + __s1_527 * splat_laneq_u16(__s2_527, __p3_527); \ |
| 54405 | __ret_527; \ |
| 53050 | 54406 | }) |
| 53051 | 54407 | #else |
| 53052 | | #define vmla_laneq_u16(__p0_436, __p1_436, __p2_436, __p3_436) __extension__ ({ \ |
| 53053 | | uint16x4_t __s0_436 = __p0_436; \ |
| 53054 | | uint16x4_t __s1_436 = __p1_436; \ |
| 53055 | | uint16x8_t __s2_436 = __p2_436; \ |
| 53056 | | uint16x4_t __rev0_436; __rev0_436 = __builtin_shufflevector(__s0_436, __s0_436, 3, 2, 1, 0); \ |
| 53057 | | uint16x4_t __rev1_436; __rev1_436 = __builtin_shufflevector(__s1_436, __s1_436, 3, 2, 1, 0); \ |
| 53058 | | uint16x8_t __rev2_436; __rev2_436 = __builtin_shufflevector(__s2_436, __s2_436, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53059 | | uint16x4_t __ret_436; \ |
| 53060 | | __ret_436 = __rev0_436 + __rev1_436 * __noswap_splat_laneq_u16(__rev2_436, __p3_436); \ |
| 53061 | | __ret_436 = __builtin_shufflevector(__ret_436, __ret_436, 3, 2, 1, 0); \ |
| 53062 | | __ret_436; \ |
| 54408 | #define vmla_laneq_u16(__p0_528, __p1_528, __p2_528, __p3_528) __extension__ ({ \ |
| 54409 | uint16x4_t __s0_528 = __p0_528; \ |
| 54410 | uint16x4_t __s1_528 = __p1_528; \ |
| 54411 | uint16x8_t __s2_528 = __p2_528; \ |
| 54412 | uint16x4_t __rev0_528; __rev0_528 = __builtin_shufflevector(__s0_528, __s0_528, 3, 2, 1, 0); \ |
| 54413 | uint16x4_t __rev1_528; __rev1_528 = __builtin_shufflevector(__s1_528, __s1_528, 3, 2, 1, 0); \ |
| 54414 | uint16x8_t __rev2_528; __rev2_528 = __builtin_shufflevector(__s2_528, __s2_528, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54415 | uint16x4_t __ret_528; \ |
| 54416 | __ret_528 = __rev0_528 + __rev1_528 * __noswap_splat_laneq_u16(__rev2_528, __p3_528); \ |
| 54417 | __ret_528 = __builtin_shufflevector(__ret_528, __ret_528, 3, 2, 1, 0); \ |
| 54418 | __ret_528; \ |
| 53063 | 54419 | }) |
| 53064 | 54420 | #endif |
| 53065 | 54421 | |
| 53066 | 54422 | #ifdef __LITTLE_ENDIAN__ |
| 53067 | | #define vmla_laneq_f32(__p0_437, __p1_437, __p2_437, __p3_437) __extension__ ({ \ |
| 53068 | | float32x2_t __s0_437 = __p0_437; \ |
| 53069 | | float32x2_t __s1_437 = __p1_437; \ |
| 53070 | | float32x4_t __s2_437 = __p2_437; \ |
| 53071 | | float32x2_t __ret_437; \ |
| 53072 | | __ret_437 = __s0_437 + __s1_437 * splat_laneq_f32(__s2_437, __p3_437); \ |
| 53073 | | __ret_437; \ |
| 54423 | #define vmla_laneq_f32(__p0_529, __p1_529, __p2_529, __p3_529) __extension__ ({ \ |
| 54424 | float32x2_t __s0_529 = __p0_529; \ |
| 54425 | float32x2_t __s1_529 = __p1_529; \ |
| 54426 | float32x4_t __s2_529 = __p2_529; \ |
| 54427 | float32x2_t __ret_529; \ |
| 54428 | __ret_529 = __s0_529 + __s1_529 * splat_laneq_f32(__s2_529, __p3_529); \ |
| 54429 | __ret_529; \ |
| 53074 | 54430 | }) |
| 53075 | 54431 | #else |
| 53076 | | #define vmla_laneq_f32(__p0_438, __p1_438, __p2_438, __p3_438) __extension__ ({ \ |
| 53077 | | float32x2_t __s0_438 = __p0_438; \ |
| 53078 | | float32x2_t __s1_438 = __p1_438; \ |
| 53079 | | float32x4_t __s2_438 = __p2_438; \ |
| 53080 | | float32x2_t __rev0_438; __rev0_438 = __builtin_shufflevector(__s0_438, __s0_438, 1, 0); \ |
| 53081 | | float32x2_t __rev1_438; __rev1_438 = __builtin_shufflevector(__s1_438, __s1_438, 1, 0); \ |
| 53082 | | float32x4_t __rev2_438; __rev2_438 = __builtin_shufflevector(__s2_438, __s2_438, 3, 2, 1, 0); \ |
| 53083 | | float32x2_t __ret_438; \ |
| 53084 | | __ret_438 = __rev0_438 + __rev1_438 * __noswap_splat_laneq_f32(__rev2_438, __p3_438); \ |
| 53085 | | __ret_438 = __builtin_shufflevector(__ret_438, __ret_438, 1, 0); \ |
| 53086 | | __ret_438; \ |
| 54432 | #define vmla_laneq_f32(__p0_530, __p1_530, __p2_530, __p3_530) __extension__ ({ \ |
| 54433 | float32x2_t __s0_530 = __p0_530; \ |
| 54434 | float32x2_t __s1_530 = __p1_530; \ |
| 54435 | float32x4_t __s2_530 = __p2_530; \ |
| 54436 | float32x2_t __rev0_530; __rev0_530 = __builtin_shufflevector(__s0_530, __s0_530, 1, 0); \ |
| 54437 | float32x2_t __rev1_530; __rev1_530 = __builtin_shufflevector(__s1_530, __s1_530, 1, 0); \ |
| 54438 | float32x4_t __rev2_530; __rev2_530 = __builtin_shufflevector(__s2_530, __s2_530, 3, 2, 1, 0); \ |
| 54439 | float32x2_t __ret_530; \ |
| 54440 | __ret_530 = __rev0_530 + __rev1_530 * __noswap_splat_laneq_f32(__rev2_530, __p3_530); \ |
| 54441 | __ret_530 = __builtin_shufflevector(__ret_530, __ret_530, 1, 0); \ |
| 54442 | __ret_530; \ |
| 53087 | 54443 | }) |
| 53088 | 54444 | #endif |
| 53089 | 54445 | |
| 53090 | 54446 | #ifdef __LITTLE_ENDIAN__ |
| 53091 | | #define vmla_laneq_s32(__p0_439, __p1_439, __p2_439, __p3_439) __extension__ ({ \ |
| 53092 | | int32x2_t __s0_439 = __p0_439; \ |
| 53093 | | int32x2_t __s1_439 = __p1_439; \ |
| 53094 | | int32x4_t __s2_439 = __p2_439; \ |
| 53095 | | int32x2_t __ret_439; \ |
| 53096 | | __ret_439 = __s0_439 + __s1_439 * splat_laneq_s32(__s2_439, __p3_439); \ |
| 53097 | | __ret_439; \ |
| 54447 | #define vmla_laneq_s32(__p0_531, __p1_531, __p2_531, __p3_531) __extension__ ({ \ |
| 54448 | int32x2_t __s0_531 = __p0_531; \ |
| 54449 | int32x2_t __s1_531 = __p1_531; \ |
| 54450 | int32x4_t __s2_531 = __p2_531; \ |
| 54451 | int32x2_t __ret_531; \ |
| 54452 | __ret_531 = __s0_531 + __s1_531 * splat_laneq_s32(__s2_531, __p3_531); \ |
| 54453 | __ret_531; \ |
| 53098 | 54454 | }) |
| 53099 | 54455 | #else |
| 53100 | | #define vmla_laneq_s32(__p0_440, __p1_440, __p2_440, __p3_440) __extension__ ({ \ |
| 53101 | | int32x2_t __s0_440 = __p0_440; \ |
| 53102 | | int32x2_t __s1_440 = __p1_440; \ |
| 53103 | | int32x4_t __s2_440 = __p2_440; \ |
| 53104 | | int32x2_t __rev0_440; __rev0_440 = __builtin_shufflevector(__s0_440, __s0_440, 1, 0); \ |
| 53105 | | int32x2_t __rev1_440; __rev1_440 = __builtin_shufflevector(__s1_440, __s1_440, 1, 0); \ |
| 53106 | | int32x4_t __rev2_440; __rev2_440 = __builtin_shufflevector(__s2_440, __s2_440, 3, 2, 1, 0); \ |
| 53107 | | int32x2_t __ret_440; \ |
| 53108 | | __ret_440 = __rev0_440 + __rev1_440 * __noswap_splat_laneq_s32(__rev2_440, __p3_440); \ |
| 53109 | | __ret_440 = __builtin_shufflevector(__ret_440, __ret_440, 1, 0); \ |
| 53110 | | __ret_440; \ |
| 54456 | #define vmla_laneq_s32(__p0_532, __p1_532, __p2_532, __p3_532) __extension__ ({ \ |
| 54457 | int32x2_t __s0_532 = __p0_532; \ |
| 54458 | int32x2_t __s1_532 = __p1_532; \ |
| 54459 | int32x4_t __s2_532 = __p2_532; \ |
| 54460 | int32x2_t __rev0_532; __rev0_532 = __builtin_shufflevector(__s0_532, __s0_532, 1, 0); \ |
| 54461 | int32x2_t __rev1_532; __rev1_532 = __builtin_shufflevector(__s1_532, __s1_532, 1, 0); \ |
| 54462 | int32x4_t __rev2_532; __rev2_532 = __builtin_shufflevector(__s2_532, __s2_532, 3, 2, 1, 0); \ |
| 54463 | int32x2_t __ret_532; \ |
| 54464 | __ret_532 = __rev0_532 + __rev1_532 * __noswap_splat_laneq_s32(__rev2_532, __p3_532); \ |
| 54465 | __ret_532 = __builtin_shufflevector(__ret_532, __ret_532, 1, 0); \ |
| 54466 | __ret_532; \ |
| 53111 | 54467 | }) |
| 53112 | 54468 | #endif |
| 53113 | 54469 | |
| 53114 | 54470 | #ifdef __LITTLE_ENDIAN__ |
| 53115 | | #define vmla_laneq_s16(__p0_441, __p1_441, __p2_441, __p3_441) __extension__ ({ \ |
| 53116 | | int16x4_t __s0_441 = __p0_441; \ |
| 53117 | | int16x4_t __s1_441 = __p1_441; \ |
| 53118 | | int16x8_t __s2_441 = __p2_441; \ |
| 53119 | | int16x4_t __ret_441; \ |
| 53120 | | __ret_441 = __s0_441 + __s1_441 * splat_laneq_s16(__s2_441, __p3_441); \ |
| 53121 | | __ret_441; \ |
| 54471 | #define vmla_laneq_s16(__p0_533, __p1_533, __p2_533, __p3_533) __extension__ ({ \ |
| 54472 | int16x4_t __s0_533 = __p0_533; \ |
| 54473 | int16x4_t __s1_533 = __p1_533; \ |
| 54474 | int16x8_t __s2_533 = __p2_533; \ |
| 54475 | int16x4_t __ret_533; \ |
| 54476 | __ret_533 = __s0_533 + __s1_533 * splat_laneq_s16(__s2_533, __p3_533); \ |
| 54477 | __ret_533; \ |
| 53122 | 54478 | }) |
| 53123 | 54479 | #else |
| 53124 | | #define vmla_laneq_s16(__p0_442, __p1_442, __p2_442, __p3_442) __extension__ ({ \ |
| 53125 | | int16x4_t __s0_442 = __p0_442; \ |
| 53126 | | int16x4_t __s1_442 = __p1_442; \ |
| 53127 | | int16x8_t __s2_442 = __p2_442; \ |
| 53128 | | int16x4_t __rev0_442; __rev0_442 = __builtin_shufflevector(__s0_442, __s0_442, 3, 2, 1, 0); \ |
| 53129 | | int16x4_t __rev1_442; __rev1_442 = __builtin_shufflevector(__s1_442, __s1_442, 3, 2, 1, 0); \ |
| 53130 | | int16x8_t __rev2_442; __rev2_442 = __builtin_shufflevector(__s2_442, __s2_442, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53131 | | int16x4_t __ret_442; \ |
| 53132 | | __ret_442 = __rev0_442 + __rev1_442 * __noswap_splat_laneq_s16(__rev2_442, __p3_442); \ |
| 53133 | | __ret_442 = __builtin_shufflevector(__ret_442, __ret_442, 3, 2, 1, 0); \ |
| 53134 | | __ret_442; \ |
| 54480 | #define vmla_laneq_s16(__p0_534, __p1_534, __p2_534, __p3_534) __extension__ ({ \ |
| 54481 | int16x4_t __s0_534 = __p0_534; \ |
| 54482 | int16x4_t __s1_534 = __p1_534; \ |
| 54483 | int16x8_t __s2_534 = __p2_534; \ |
| 54484 | int16x4_t __rev0_534; __rev0_534 = __builtin_shufflevector(__s0_534, __s0_534, 3, 2, 1, 0); \ |
| 54485 | int16x4_t __rev1_534; __rev1_534 = __builtin_shufflevector(__s1_534, __s1_534, 3, 2, 1, 0); \ |
| 54486 | int16x8_t __rev2_534; __rev2_534 = __builtin_shufflevector(__s2_534, __s2_534, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54487 | int16x4_t __ret_534; \ |
| 54488 | __ret_534 = __rev0_534 + __rev1_534 * __noswap_splat_laneq_s16(__rev2_534, __p3_534); \ |
| 54489 | __ret_534 = __builtin_shufflevector(__ret_534, __ret_534, 3, 2, 1, 0); \ |
| 54490 | __ret_534; \ |
| 53135 | 54491 | }) |
| 53136 | 54492 | #endif |
| 53137 | 54493 | |
| 53138 | 54494 | #ifdef __LITTLE_ENDIAN__ |
| 53139 | | #define vmlal_high_lane_u32(__p0_443, __p1_443, __p2_443, __p3_443) __extension__ ({ \ |
| 53140 | | uint64x2_t __s0_443 = __p0_443; \ |
| 53141 | | uint32x4_t __s1_443 = __p1_443; \ |
| 53142 | | uint32x2_t __s2_443 = __p2_443; \ |
| 53143 | | uint64x2_t __ret_443; \ |
| 53144 | | __ret_443 = __s0_443 + vmull_u32(vget_high_u32(__s1_443), splat_lane_u32(__s2_443, __p3_443)); \ |
| 53145 | | __ret_443; \ |
| 54495 | #define vmlal_high_lane_u32(__p0_535, __p1_535, __p2_535, __p3_535) __extension__ ({ \ |
| 54496 | uint64x2_t __s0_535 = __p0_535; \ |
| 54497 | uint32x4_t __s1_535 = __p1_535; \ |
| 54498 | uint32x2_t __s2_535 = __p2_535; \ |
| 54499 | uint64x2_t __ret_535; \ |
| 54500 | __ret_535 = __s0_535 + vmull_u32(vget_high_u32(__s1_535), splat_lane_u32(__s2_535, __p3_535)); \ |
| 54501 | __ret_535; \ |
| 53146 | 54502 | }) |
| 53147 | 54503 | #else |
| 53148 | | #define vmlal_high_lane_u32(__p0_444, __p1_444, __p2_444, __p3_444) __extension__ ({ \ |
| 53149 | | uint64x2_t __s0_444 = __p0_444; \ |
| 53150 | | uint32x4_t __s1_444 = __p1_444; \ |
| 53151 | | uint32x2_t __s2_444 = __p2_444; \ |
| 53152 | | uint64x2_t __rev0_444; __rev0_444 = __builtin_shufflevector(__s0_444, __s0_444, 1, 0); \ |
| 53153 | | uint32x4_t __rev1_444; __rev1_444 = __builtin_shufflevector(__s1_444, __s1_444, 3, 2, 1, 0); \ |
| 53154 | | uint32x2_t __rev2_444; __rev2_444 = __builtin_shufflevector(__s2_444, __s2_444, 1, 0); \ |
| 53155 | | uint64x2_t __ret_444; \ |
| 53156 | | __ret_444 = __rev0_444 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_444), __noswap_splat_lane_u32(__rev2_444, __p3_444)); \ |
| 53157 | | __ret_444 = __builtin_shufflevector(__ret_444, __ret_444, 1, 0); \ |
| 53158 | | __ret_444; \ |
| 54504 | #define vmlal_high_lane_u32(__p0_536, __p1_536, __p2_536, __p3_536) __extension__ ({ \ |
| 54505 | uint64x2_t __s0_536 = __p0_536; \ |
| 54506 | uint32x4_t __s1_536 = __p1_536; \ |
| 54507 | uint32x2_t __s2_536 = __p2_536; \ |
| 54508 | uint64x2_t __rev0_536; __rev0_536 = __builtin_shufflevector(__s0_536, __s0_536, 1, 0); \ |
| 54509 | uint32x4_t __rev1_536; __rev1_536 = __builtin_shufflevector(__s1_536, __s1_536, 3, 2, 1, 0); \ |
| 54510 | uint32x2_t __rev2_536; __rev2_536 = __builtin_shufflevector(__s2_536, __s2_536, 1, 0); \ |
| 54511 | uint64x2_t __ret_536; \ |
| 54512 | __ret_536 = __rev0_536 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_536), __noswap_splat_lane_u32(__rev2_536, __p3_536)); \ |
| 54513 | __ret_536 = __builtin_shufflevector(__ret_536, __ret_536, 1, 0); \ |
| 54514 | __ret_536; \ |
| 53159 | 54515 | }) |
| 53160 | 54516 | #endif |
| 53161 | 54517 | |
| 53162 | 54518 | #ifdef __LITTLE_ENDIAN__ |
| 53163 | | #define vmlal_high_lane_u16(__p0_445, __p1_445, __p2_445, __p3_445) __extension__ ({ \ |
| 53164 | | uint32x4_t __s0_445 = __p0_445; \ |
| 53165 | | uint16x8_t __s1_445 = __p1_445; \ |
| 53166 | | uint16x4_t __s2_445 = __p2_445; \ |
| 53167 | | uint32x4_t __ret_445; \ |
| 53168 | | __ret_445 = __s0_445 + vmull_u16(vget_high_u16(__s1_445), splat_lane_u16(__s2_445, __p3_445)); \ |
| 53169 | | __ret_445; \ |
| 54519 | #define vmlal_high_lane_u16(__p0_537, __p1_537, __p2_537, __p3_537) __extension__ ({ \ |
| 54520 | uint32x4_t __s0_537 = __p0_537; \ |
| 54521 | uint16x8_t __s1_537 = __p1_537; \ |
| 54522 | uint16x4_t __s2_537 = __p2_537; \ |
| 54523 | uint32x4_t __ret_537; \ |
| 54524 | __ret_537 = __s0_537 + vmull_u16(vget_high_u16(__s1_537), splat_lane_u16(__s2_537, __p3_537)); \ |
| 54525 | __ret_537; \ |
| 53170 | 54526 | }) |
| 53171 | 54527 | #else |
| 53172 | | #define vmlal_high_lane_u16(__p0_446, __p1_446, __p2_446, __p3_446) __extension__ ({ \ |
| 53173 | | uint32x4_t __s0_446 = __p0_446; \ |
| 53174 | | uint16x8_t __s1_446 = __p1_446; \ |
| 53175 | | uint16x4_t __s2_446 = __p2_446; \ |
| 53176 | | uint32x4_t __rev0_446; __rev0_446 = __builtin_shufflevector(__s0_446, __s0_446, 3, 2, 1, 0); \ |
| 53177 | | uint16x8_t __rev1_446; __rev1_446 = __builtin_shufflevector(__s1_446, __s1_446, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53178 | | uint16x4_t __rev2_446; __rev2_446 = __builtin_shufflevector(__s2_446, __s2_446, 3, 2, 1, 0); \ |
| 53179 | | uint32x4_t __ret_446; \ |
| 53180 | | __ret_446 = __rev0_446 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_446), __noswap_splat_lane_u16(__rev2_446, __p3_446)); \ |
| 53181 | | __ret_446 = __builtin_shufflevector(__ret_446, __ret_446, 3, 2, 1, 0); \ |
| 53182 | | __ret_446; \ |
| 54528 | #define vmlal_high_lane_u16(__p0_538, __p1_538, __p2_538, __p3_538) __extension__ ({ \ |
| 54529 | uint32x4_t __s0_538 = __p0_538; \ |
| 54530 | uint16x8_t __s1_538 = __p1_538; \ |
| 54531 | uint16x4_t __s2_538 = __p2_538; \ |
| 54532 | uint32x4_t __rev0_538; __rev0_538 = __builtin_shufflevector(__s0_538, __s0_538, 3, 2, 1, 0); \ |
| 54533 | uint16x8_t __rev1_538; __rev1_538 = __builtin_shufflevector(__s1_538, __s1_538, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54534 | uint16x4_t __rev2_538; __rev2_538 = __builtin_shufflevector(__s2_538, __s2_538, 3, 2, 1, 0); \ |
| 54535 | uint32x4_t __ret_538; \ |
| 54536 | __ret_538 = __rev0_538 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_538), __noswap_splat_lane_u16(__rev2_538, __p3_538)); \ |
| 54537 | __ret_538 = __builtin_shufflevector(__ret_538, __ret_538, 3, 2, 1, 0); \ |
| 54538 | __ret_538; \ |
| 53183 | 54539 | }) |
| 53184 | 54540 | #endif |
| 53185 | 54541 | |
| 53186 | 54542 | #ifdef __LITTLE_ENDIAN__ |
| 53187 | | #define vmlal_high_lane_s32(__p0_447, __p1_447, __p2_447, __p3_447) __extension__ ({ \ |
| 53188 | | int64x2_t __s0_447 = __p0_447; \ |
| 53189 | | int32x4_t __s1_447 = __p1_447; \ |
| 53190 | | int32x2_t __s2_447 = __p2_447; \ |
| 53191 | | int64x2_t __ret_447; \ |
| 53192 | | __ret_447 = __s0_447 + vmull_s32(vget_high_s32(__s1_447), splat_lane_s32(__s2_447, __p3_447)); \ |
| 53193 | | __ret_447; \ |
| 54543 | #define vmlal_high_lane_s32(__p0_539, __p1_539, __p2_539, __p3_539) __extension__ ({ \ |
| 54544 | int64x2_t __s0_539 = __p0_539; \ |
| 54545 | int32x4_t __s1_539 = __p1_539; \ |
| 54546 | int32x2_t __s2_539 = __p2_539; \ |
| 54547 | int64x2_t __ret_539; \ |
| 54548 | __ret_539 = __s0_539 + vmull_s32(vget_high_s32(__s1_539), splat_lane_s32(__s2_539, __p3_539)); \ |
| 54549 | __ret_539; \ |
| 53194 | 54550 | }) |
| 53195 | 54551 | #else |
| 53196 | | #define vmlal_high_lane_s32(__p0_448, __p1_448, __p2_448, __p3_448) __extension__ ({ \ |
| 53197 | | int64x2_t __s0_448 = __p0_448; \ |
| 53198 | | int32x4_t __s1_448 = __p1_448; \ |
| 53199 | | int32x2_t __s2_448 = __p2_448; \ |
| 53200 | | int64x2_t __rev0_448; __rev0_448 = __builtin_shufflevector(__s0_448, __s0_448, 1, 0); \ |
| 53201 | | int32x4_t __rev1_448; __rev1_448 = __builtin_shufflevector(__s1_448, __s1_448, 3, 2, 1, 0); \ |
| 53202 | | int32x2_t __rev2_448; __rev2_448 = __builtin_shufflevector(__s2_448, __s2_448, 1, 0); \ |
| 53203 | | int64x2_t __ret_448; \ |
| 53204 | | __ret_448 = __rev0_448 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_448), __noswap_splat_lane_s32(__rev2_448, __p3_448)); \ |
| 53205 | | __ret_448 = __builtin_shufflevector(__ret_448, __ret_448, 1, 0); \ |
| 53206 | | __ret_448; \ |
| 54552 | #define vmlal_high_lane_s32(__p0_540, __p1_540, __p2_540, __p3_540) __extension__ ({ \ |
| 54553 | int64x2_t __s0_540 = __p0_540; \ |
| 54554 | int32x4_t __s1_540 = __p1_540; \ |
| 54555 | int32x2_t __s2_540 = __p2_540; \ |
| 54556 | int64x2_t __rev0_540; __rev0_540 = __builtin_shufflevector(__s0_540, __s0_540, 1, 0); \ |
| 54557 | int32x4_t __rev1_540; __rev1_540 = __builtin_shufflevector(__s1_540, __s1_540, 3, 2, 1, 0); \ |
| 54558 | int32x2_t __rev2_540; __rev2_540 = __builtin_shufflevector(__s2_540, __s2_540, 1, 0); \ |
| 54559 | int64x2_t __ret_540; \ |
| 54560 | __ret_540 = __rev0_540 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_540), __noswap_splat_lane_s32(__rev2_540, __p3_540)); \ |
| 54561 | __ret_540 = __builtin_shufflevector(__ret_540, __ret_540, 1, 0); \ |
| 54562 | __ret_540; \ |
| 53207 | 54563 | }) |
| 53208 | 54564 | #endif |
| 53209 | 54565 | |
| 53210 | 54566 | #ifdef __LITTLE_ENDIAN__ |
| 53211 | | #define vmlal_high_lane_s16(__p0_449, __p1_449, __p2_449, __p3_449) __extension__ ({ \ |
| 53212 | | int32x4_t __s0_449 = __p0_449; \ |
| 53213 | | int16x8_t __s1_449 = __p1_449; \ |
| 53214 | | int16x4_t __s2_449 = __p2_449; \ |
| 53215 | | int32x4_t __ret_449; \ |
| 53216 | | __ret_449 = __s0_449 + vmull_s16(vget_high_s16(__s1_449), splat_lane_s16(__s2_449, __p3_449)); \ |
| 53217 | | __ret_449; \ |
| 54567 | #define vmlal_high_lane_s16(__p0_541, __p1_541, __p2_541, __p3_541) __extension__ ({ \ |
| 54568 | int32x4_t __s0_541 = __p0_541; \ |
| 54569 | int16x8_t __s1_541 = __p1_541; \ |
| 54570 | int16x4_t __s2_541 = __p2_541; \ |
| 54571 | int32x4_t __ret_541; \ |
| 54572 | __ret_541 = __s0_541 + vmull_s16(vget_high_s16(__s1_541), splat_lane_s16(__s2_541, __p3_541)); \ |
| 54573 | __ret_541; \ |
| 53218 | 54574 | }) |
| 53219 | 54575 | #else |
| 53220 | | #define vmlal_high_lane_s16(__p0_450, __p1_450, __p2_450, __p3_450) __extension__ ({ \ |
| 53221 | | int32x4_t __s0_450 = __p0_450; \ |
| 53222 | | int16x8_t __s1_450 = __p1_450; \ |
| 53223 | | int16x4_t __s2_450 = __p2_450; \ |
| 53224 | | int32x4_t __rev0_450; __rev0_450 = __builtin_shufflevector(__s0_450, __s0_450, 3, 2, 1, 0); \ |
| 53225 | | int16x8_t __rev1_450; __rev1_450 = __builtin_shufflevector(__s1_450, __s1_450, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53226 | | int16x4_t __rev2_450; __rev2_450 = __builtin_shufflevector(__s2_450, __s2_450, 3, 2, 1, 0); \ |
| 53227 | | int32x4_t __ret_450; \ |
| 53228 | | __ret_450 = __rev0_450 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_450), __noswap_splat_lane_s16(__rev2_450, __p3_450)); \ |
| 53229 | | __ret_450 = __builtin_shufflevector(__ret_450, __ret_450, 3, 2, 1, 0); \ |
| 53230 | | __ret_450; \ |
| 54576 | #define vmlal_high_lane_s16(__p0_542, __p1_542, __p2_542, __p3_542) __extension__ ({ \ |
| 54577 | int32x4_t __s0_542 = __p0_542; \ |
| 54578 | int16x8_t __s1_542 = __p1_542; \ |
| 54579 | int16x4_t __s2_542 = __p2_542; \ |
| 54580 | int32x4_t __rev0_542; __rev0_542 = __builtin_shufflevector(__s0_542, __s0_542, 3, 2, 1, 0); \ |
| 54581 | int16x8_t __rev1_542; __rev1_542 = __builtin_shufflevector(__s1_542, __s1_542, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54582 | int16x4_t __rev2_542; __rev2_542 = __builtin_shufflevector(__s2_542, __s2_542, 3, 2, 1, 0); \ |
| 54583 | int32x4_t __ret_542; \ |
| 54584 | __ret_542 = __rev0_542 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_542), __noswap_splat_lane_s16(__rev2_542, __p3_542)); \ |
| 54585 | __ret_542 = __builtin_shufflevector(__ret_542, __ret_542, 3, 2, 1, 0); \ |
| 54586 | __ret_542; \ |
| 53231 | 54587 | }) |
| 53232 | 54588 | #endif |
| 53233 | 54589 | |
| 53234 | 54590 | #ifdef __LITTLE_ENDIAN__ |
| 53235 | | #define vmlal_high_laneq_u32(__p0_451, __p1_451, __p2_451, __p3_451) __extension__ ({ \ |
| 53236 | | uint64x2_t __s0_451 = __p0_451; \ |
| 53237 | | uint32x4_t __s1_451 = __p1_451; \ |
| 53238 | | uint32x4_t __s2_451 = __p2_451; \ |
| 53239 | | uint64x2_t __ret_451; \ |
| 53240 | | __ret_451 = __s0_451 + vmull_u32(vget_high_u32(__s1_451), splat_laneq_u32(__s2_451, __p3_451)); \ |
| 53241 | | __ret_451; \ |
| 54591 | #define vmlal_high_laneq_u32(__p0_543, __p1_543, __p2_543, __p3_543) __extension__ ({ \ |
| 54592 | uint64x2_t __s0_543 = __p0_543; \ |
| 54593 | uint32x4_t __s1_543 = __p1_543; \ |
| 54594 | uint32x4_t __s2_543 = __p2_543; \ |
| 54595 | uint64x2_t __ret_543; \ |
| 54596 | __ret_543 = __s0_543 + vmull_u32(vget_high_u32(__s1_543), splat_laneq_u32(__s2_543, __p3_543)); \ |
| 54597 | __ret_543; \ |
| 53242 | 54598 | }) |
| 53243 | 54599 | #else |
| 53244 | | #define vmlal_high_laneq_u32(__p0_452, __p1_452, __p2_452, __p3_452) __extension__ ({ \ |
| 53245 | | uint64x2_t __s0_452 = __p0_452; \ |
| 53246 | | uint32x4_t __s1_452 = __p1_452; \ |
| 53247 | | uint32x4_t __s2_452 = __p2_452; \ |
| 53248 | | uint64x2_t __rev0_452; __rev0_452 = __builtin_shufflevector(__s0_452, __s0_452, 1, 0); \ |
| 53249 | | uint32x4_t __rev1_452; __rev1_452 = __builtin_shufflevector(__s1_452, __s1_452, 3, 2, 1, 0); \ |
| 53250 | | uint32x4_t __rev2_452; __rev2_452 = __builtin_shufflevector(__s2_452, __s2_452, 3, 2, 1, 0); \ |
| 53251 | | uint64x2_t __ret_452; \ |
| 53252 | | __ret_452 = __rev0_452 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_452), __noswap_splat_laneq_u32(__rev2_452, __p3_452)); \ |
| 53253 | | __ret_452 = __builtin_shufflevector(__ret_452, __ret_452, 1, 0); \ |
| 53254 | | __ret_452; \ |
| 54600 | #define vmlal_high_laneq_u32(__p0_544, __p1_544, __p2_544, __p3_544) __extension__ ({ \ |
| 54601 | uint64x2_t __s0_544 = __p0_544; \ |
| 54602 | uint32x4_t __s1_544 = __p1_544; \ |
| 54603 | uint32x4_t __s2_544 = __p2_544; \ |
| 54604 | uint64x2_t __rev0_544; __rev0_544 = __builtin_shufflevector(__s0_544, __s0_544, 1, 0); \ |
| 54605 | uint32x4_t __rev1_544; __rev1_544 = __builtin_shufflevector(__s1_544, __s1_544, 3, 2, 1, 0); \ |
| 54606 | uint32x4_t __rev2_544; __rev2_544 = __builtin_shufflevector(__s2_544, __s2_544, 3, 2, 1, 0); \ |
| 54607 | uint64x2_t __ret_544; \ |
| 54608 | __ret_544 = __rev0_544 + __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_544), __noswap_splat_laneq_u32(__rev2_544, __p3_544)); \ |
| 54609 | __ret_544 = __builtin_shufflevector(__ret_544, __ret_544, 1, 0); \ |
| 54610 | __ret_544; \ |
| 53255 | 54611 | }) |
| 53256 | 54612 | #endif |
| 53257 | 54613 | |
| 53258 | 54614 | #ifdef __LITTLE_ENDIAN__ |
| 53259 | | #define vmlal_high_laneq_u16(__p0_453, __p1_453, __p2_453, __p3_453) __extension__ ({ \ |
| 53260 | | uint32x4_t __s0_453 = __p0_453; \ |
| 53261 | | uint16x8_t __s1_453 = __p1_453; \ |
| 53262 | | uint16x8_t __s2_453 = __p2_453; \ |
| 53263 | | uint32x4_t __ret_453; \ |
| 53264 | | __ret_453 = __s0_453 + vmull_u16(vget_high_u16(__s1_453), splat_laneq_u16(__s2_453, __p3_453)); \ |
| 53265 | | __ret_453; \ |
| 54615 | #define vmlal_high_laneq_u16(__p0_545, __p1_545, __p2_545, __p3_545) __extension__ ({ \ |
| 54616 | uint32x4_t __s0_545 = __p0_545; \ |
| 54617 | uint16x8_t __s1_545 = __p1_545; \ |
| 54618 | uint16x8_t __s2_545 = __p2_545; \ |
| 54619 | uint32x4_t __ret_545; \ |
| 54620 | __ret_545 = __s0_545 + vmull_u16(vget_high_u16(__s1_545), splat_laneq_u16(__s2_545, __p3_545)); \ |
| 54621 | __ret_545; \ |
| 53266 | 54622 | }) |
| 53267 | 54623 | #else |
| 53268 | | #define vmlal_high_laneq_u16(__p0_454, __p1_454, __p2_454, __p3_454) __extension__ ({ \ |
| 53269 | | uint32x4_t __s0_454 = __p0_454; \ |
| 53270 | | uint16x8_t __s1_454 = __p1_454; \ |
| 53271 | | uint16x8_t __s2_454 = __p2_454; \ |
| 53272 | | uint32x4_t __rev0_454; __rev0_454 = __builtin_shufflevector(__s0_454, __s0_454, 3, 2, 1, 0); \ |
| 53273 | | uint16x8_t __rev1_454; __rev1_454 = __builtin_shufflevector(__s1_454, __s1_454, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53274 | | uint16x8_t __rev2_454; __rev2_454 = __builtin_shufflevector(__s2_454, __s2_454, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53275 | | uint32x4_t __ret_454; \ |
| 53276 | | __ret_454 = __rev0_454 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_454), __noswap_splat_laneq_u16(__rev2_454, __p3_454)); \ |
| 53277 | | __ret_454 = __builtin_shufflevector(__ret_454, __ret_454, 3, 2, 1, 0); \ |
| 53278 | | __ret_454; \ |
| 54624 | #define vmlal_high_laneq_u16(__p0_546, __p1_546, __p2_546, __p3_546) __extension__ ({ \ |
| 54625 | uint32x4_t __s0_546 = __p0_546; \ |
| 54626 | uint16x8_t __s1_546 = __p1_546; \ |
| 54627 | uint16x8_t __s2_546 = __p2_546; \ |
| 54628 | uint32x4_t __rev0_546; __rev0_546 = __builtin_shufflevector(__s0_546, __s0_546, 3, 2, 1, 0); \ |
| 54629 | uint16x8_t __rev1_546; __rev1_546 = __builtin_shufflevector(__s1_546, __s1_546, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54630 | uint16x8_t __rev2_546; __rev2_546 = __builtin_shufflevector(__s2_546, __s2_546, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54631 | uint32x4_t __ret_546; \ |
| 54632 | __ret_546 = __rev0_546 + __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_546), __noswap_splat_laneq_u16(__rev2_546, __p3_546)); \ |
| 54633 | __ret_546 = __builtin_shufflevector(__ret_546, __ret_546, 3, 2, 1, 0); \ |
| 54634 | __ret_546; \ |
| 53279 | 54635 | }) |
| 53280 | 54636 | #endif |
| 53281 | 54637 | |
| 53282 | 54638 | #ifdef __LITTLE_ENDIAN__ |
| 53283 | | #define vmlal_high_laneq_s32(__p0_455, __p1_455, __p2_455, __p3_455) __extension__ ({ \ |
| 53284 | | int64x2_t __s0_455 = __p0_455; \ |
| 53285 | | int32x4_t __s1_455 = __p1_455; \ |
| 53286 | | int32x4_t __s2_455 = __p2_455; \ |
| 53287 | | int64x2_t __ret_455; \ |
| 53288 | | __ret_455 = __s0_455 + vmull_s32(vget_high_s32(__s1_455), splat_laneq_s32(__s2_455, __p3_455)); \ |
| 53289 | | __ret_455; \ |
| 54639 | #define vmlal_high_laneq_s32(__p0_547, __p1_547, __p2_547, __p3_547) __extension__ ({ \ |
| 54640 | int64x2_t __s0_547 = __p0_547; \ |
| 54641 | int32x4_t __s1_547 = __p1_547; \ |
| 54642 | int32x4_t __s2_547 = __p2_547; \ |
| 54643 | int64x2_t __ret_547; \ |
| 54644 | __ret_547 = __s0_547 + vmull_s32(vget_high_s32(__s1_547), splat_laneq_s32(__s2_547, __p3_547)); \ |
| 54645 | __ret_547; \ |
| 53290 | 54646 | }) |
| 53291 | 54647 | #else |
| 53292 | | #define vmlal_high_laneq_s32(__p0_456, __p1_456, __p2_456, __p3_456) __extension__ ({ \ |
| 53293 | | int64x2_t __s0_456 = __p0_456; \ |
| 53294 | | int32x4_t __s1_456 = __p1_456; \ |
| 53295 | | int32x4_t __s2_456 = __p2_456; \ |
| 53296 | | int64x2_t __rev0_456; __rev0_456 = __builtin_shufflevector(__s0_456, __s0_456, 1, 0); \ |
| 53297 | | int32x4_t __rev1_456; __rev1_456 = __builtin_shufflevector(__s1_456, __s1_456, 3, 2, 1, 0); \ |
| 53298 | | int32x4_t __rev2_456; __rev2_456 = __builtin_shufflevector(__s2_456, __s2_456, 3, 2, 1, 0); \ |
| 53299 | | int64x2_t __ret_456; \ |
| 53300 | | __ret_456 = __rev0_456 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_456), __noswap_splat_laneq_s32(__rev2_456, __p3_456)); \ |
| 53301 | | __ret_456 = __builtin_shufflevector(__ret_456, __ret_456, 1, 0); \ |
| 53302 | | __ret_456; \ |
| 54648 | #define vmlal_high_laneq_s32(__p0_548, __p1_548, __p2_548, __p3_548) __extension__ ({ \ |
| 54649 | int64x2_t __s0_548 = __p0_548; \ |
| 54650 | int32x4_t __s1_548 = __p1_548; \ |
| 54651 | int32x4_t __s2_548 = __p2_548; \ |
| 54652 | int64x2_t __rev0_548; __rev0_548 = __builtin_shufflevector(__s0_548, __s0_548, 1, 0); \ |
| 54653 | int32x4_t __rev1_548; __rev1_548 = __builtin_shufflevector(__s1_548, __s1_548, 3, 2, 1, 0); \ |
| 54654 | int32x4_t __rev2_548; __rev2_548 = __builtin_shufflevector(__s2_548, __s2_548, 3, 2, 1, 0); \ |
| 54655 | int64x2_t __ret_548; \ |
| 54656 | __ret_548 = __rev0_548 + __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_548), __noswap_splat_laneq_s32(__rev2_548, __p3_548)); \ |
| 54657 | __ret_548 = __builtin_shufflevector(__ret_548, __ret_548, 1, 0); \ |
| 54658 | __ret_548; \ |
| 53303 | 54659 | }) |
| 53304 | 54660 | #endif |
| 53305 | 54661 | |
| 53306 | 54662 | #ifdef __LITTLE_ENDIAN__ |
| 53307 | | #define vmlal_high_laneq_s16(__p0_457, __p1_457, __p2_457, __p3_457) __extension__ ({ \ |
| 53308 | | int32x4_t __s0_457 = __p0_457; \ |
| 53309 | | int16x8_t __s1_457 = __p1_457; \ |
| 53310 | | int16x8_t __s2_457 = __p2_457; \ |
| 53311 | | int32x4_t __ret_457; \ |
| 53312 | | __ret_457 = __s0_457 + vmull_s16(vget_high_s16(__s1_457), splat_laneq_s16(__s2_457, __p3_457)); \ |
| 53313 | | __ret_457; \ |
| 54663 | #define vmlal_high_laneq_s16(__p0_549, __p1_549, __p2_549, __p3_549) __extension__ ({ \ |
| 54664 | int32x4_t __s0_549 = __p0_549; \ |
| 54665 | int16x8_t __s1_549 = __p1_549; \ |
| 54666 | int16x8_t __s2_549 = __p2_549; \ |
| 54667 | int32x4_t __ret_549; \ |
| 54668 | __ret_549 = __s0_549 + vmull_s16(vget_high_s16(__s1_549), splat_laneq_s16(__s2_549, __p3_549)); \ |
| 54669 | __ret_549; \ |
| 53314 | 54670 | }) |
| 53315 | 54671 | #else |
| 53316 | | #define vmlal_high_laneq_s16(__p0_458, __p1_458, __p2_458, __p3_458) __extension__ ({ \ |
| 53317 | | int32x4_t __s0_458 = __p0_458; \ |
| 53318 | | int16x8_t __s1_458 = __p1_458; \ |
| 53319 | | int16x8_t __s2_458 = __p2_458; \ |
| 53320 | | int32x4_t __rev0_458; __rev0_458 = __builtin_shufflevector(__s0_458, __s0_458, 3, 2, 1, 0); \ |
| 53321 | | int16x8_t __rev1_458; __rev1_458 = __builtin_shufflevector(__s1_458, __s1_458, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53322 | | int16x8_t __rev2_458; __rev2_458 = __builtin_shufflevector(__s2_458, __s2_458, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53323 | | int32x4_t __ret_458; \ |
| 53324 | | __ret_458 = __rev0_458 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_458), __noswap_splat_laneq_s16(__rev2_458, __p3_458)); \ |
| 53325 | | __ret_458 = __builtin_shufflevector(__ret_458, __ret_458, 3, 2, 1, 0); \ |
| 53326 | | __ret_458; \ |
| 54672 | #define vmlal_high_laneq_s16(__p0_550, __p1_550, __p2_550, __p3_550) __extension__ ({ \ |
| 54673 | int32x4_t __s0_550 = __p0_550; \ |
| 54674 | int16x8_t __s1_550 = __p1_550; \ |
| 54675 | int16x8_t __s2_550 = __p2_550; \ |
| 54676 | int32x4_t __rev0_550; __rev0_550 = __builtin_shufflevector(__s0_550, __s0_550, 3, 2, 1, 0); \ |
| 54677 | int16x8_t __rev1_550; __rev1_550 = __builtin_shufflevector(__s1_550, __s1_550, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54678 | int16x8_t __rev2_550; __rev2_550 = __builtin_shufflevector(__s2_550, __s2_550, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54679 | int32x4_t __ret_550; \ |
| 54680 | __ret_550 = __rev0_550 + __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_550), __noswap_splat_laneq_s16(__rev2_550, __p3_550)); \ |
| 54681 | __ret_550 = __builtin_shufflevector(__ret_550, __ret_550, 3, 2, 1, 0); \ |
| 54682 | __ret_550; \ |
| 53327 | 54683 | }) |
| 53328 | 54684 | #endif |
| 53329 | 54685 | |
| 53330 | 54686 | #ifdef __LITTLE_ENDIAN__ |
| 53331 | | #define vmlal_laneq_u32(__p0_459, __p1_459, __p2_459, __p3_459) __extension__ ({ \ |
| 53332 | | uint64x2_t __s0_459 = __p0_459; \ |
| 53333 | | uint32x2_t __s1_459 = __p1_459; \ |
| 53334 | | uint32x4_t __s2_459 = __p2_459; \ |
| 53335 | | uint64x2_t __ret_459; \ |
| 53336 | | __ret_459 = __s0_459 + vmull_u32(__s1_459, splat_laneq_u32(__s2_459, __p3_459)); \ |
| 53337 | | __ret_459; \ |
| 54687 | #define vmlal_laneq_u32(__p0_551, __p1_551, __p2_551, __p3_551) __extension__ ({ \ |
| 54688 | uint64x2_t __s0_551 = __p0_551; \ |
| 54689 | uint32x2_t __s1_551 = __p1_551; \ |
| 54690 | uint32x4_t __s2_551 = __p2_551; \ |
| 54691 | uint64x2_t __ret_551; \ |
| 54692 | __ret_551 = __s0_551 + vmull_u32(__s1_551, splat_laneq_u32(__s2_551, __p3_551)); \ |
| 54693 | __ret_551; \ |
| 53338 | 54694 | }) |
| 53339 | 54695 | #else |
| 53340 | | #define vmlal_laneq_u32(__p0_460, __p1_460, __p2_460, __p3_460) __extension__ ({ \ |
| 53341 | | uint64x2_t __s0_460 = __p0_460; \ |
| 53342 | | uint32x2_t __s1_460 = __p1_460; \ |
| 53343 | | uint32x4_t __s2_460 = __p2_460; \ |
| 53344 | | uint64x2_t __rev0_460; __rev0_460 = __builtin_shufflevector(__s0_460, __s0_460, 1, 0); \ |
| 53345 | | uint32x2_t __rev1_460; __rev1_460 = __builtin_shufflevector(__s1_460, __s1_460, 1, 0); \ |
| 53346 | | uint32x4_t __rev2_460; __rev2_460 = __builtin_shufflevector(__s2_460, __s2_460, 3, 2, 1, 0); \ |
| 53347 | | uint64x2_t __ret_460; \ |
| 53348 | | __ret_460 = __rev0_460 + __noswap_vmull_u32(__rev1_460, __noswap_splat_laneq_u32(__rev2_460, __p3_460)); \ |
| 53349 | | __ret_460 = __builtin_shufflevector(__ret_460, __ret_460, 1, 0); \ |
| 53350 | | __ret_460; \ |
| 54696 | #define vmlal_laneq_u32(__p0_552, __p1_552, __p2_552, __p3_552) __extension__ ({ \ |
| 54697 | uint64x2_t __s0_552 = __p0_552; \ |
| 54698 | uint32x2_t __s1_552 = __p1_552; \ |
| 54699 | uint32x4_t __s2_552 = __p2_552; \ |
| 54700 | uint64x2_t __rev0_552; __rev0_552 = __builtin_shufflevector(__s0_552, __s0_552, 1, 0); \ |
| 54701 | uint32x2_t __rev1_552; __rev1_552 = __builtin_shufflevector(__s1_552, __s1_552, 1, 0); \ |
| 54702 | uint32x4_t __rev2_552; __rev2_552 = __builtin_shufflevector(__s2_552, __s2_552, 3, 2, 1, 0); \ |
| 54703 | uint64x2_t __ret_552; \ |
| 54704 | __ret_552 = __rev0_552 + __noswap_vmull_u32(__rev1_552, __noswap_splat_laneq_u32(__rev2_552, __p3_552)); \ |
| 54705 | __ret_552 = __builtin_shufflevector(__ret_552, __ret_552, 1, 0); \ |
| 54706 | __ret_552; \ |
| 53351 | 54707 | }) |
| 53352 | 54708 | #endif |
| 53353 | 54709 | |
| 53354 | 54710 | #ifdef __LITTLE_ENDIAN__ |
| 53355 | | #define vmlal_laneq_u16(__p0_461, __p1_461, __p2_461, __p3_461) __extension__ ({ \ |
| 53356 | | uint32x4_t __s0_461 = __p0_461; \ |
| 53357 | | uint16x4_t __s1_461 = __p1_461; \ |
| 53358 | | uint16x8_t __s2_461 = __p2_461; \ |
| 53359 | | uint32x4_t __ret_461; \ |
| 53360 | | __ret_461 = __s0_461 + vmull_u16(__s1_461, splat_laneq_u16(__s2_461, __p3_461)); \ |
| 53361 | | __ret_461; \ |
| 54711 | #define vmlal_laneq_u16(__p0_553, __p1_553, __p2_553, __p3_553) __extension__ ({ \ |
| 54712 | uint32x4_t __s0_553 = __p0_553; \ |
| 54713 | uint16x4_t __s1_553 = __p1_553; \ |
| 54714 | uint16x8_t __s2_553 = __p2_553; \ |
| 54715 | uint32x4_t __ret_553; \ |
| 54716 | __ret_553 = __s0_553 + vmull_u16(__s1_553, splat_laneq_u16(__s2_553, __p3_553)); \ |
| 54717 | __ret_553; \ |
| 53362 | 54718 | }) |
| 53363 | 54719 | #else |
| 53364 | | #define vmlal_laneq_u16(__p0_462, __p1_462, __p2_462, __p3_462) __extension__ ({ \ |
| 53365 | | uint32x4_t __s0_462 = __p0_462; \ |
| 53366 | | uint16x4_t __s1_462 = __p1_462; \ |
| 53367 | | uint16x8_t __s2_462 = __p2_462; \ |
| 53368 | | uint32x4_t __rev0_462; __rev0_462 = __builtin_shufflevector(__s0_462, __s0_462, 3, 2, 1, 0); \ |
| 53369 | | uint16x4_t __rev1_462; __rev1_462 = __builtin_shufflevector(__s1_462, __s1_462, 3, 2, 1, 0); \ |
| 53370 | | uint16x8_t __rev2_462; __rev2_462 = __builtin_shufflevector(__s2_462, __s2_462, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53371 | | uint32x4_t __ret_462; \ |
| 53372 | | __ret_462 = __rev0_462 + __noswap_vmull_u16(__rev1_462, __noswap_splat_laneq_u16(__rev2_462, __p3_462)); \ |
| 53373 | | __ret_462 = __builtin_shufflevector(__ret_462, __ret_462, 3, 2, 1, 0); \ |
| 53374 | | __ret_462; \ |
| 54720 | #define vmlal_laneq_u16(__p0_554, __p1_554, __p2_554, __p3_554) __extension__ ({ \ |
| 54721 | uint32x4_t __s0_554 = __p0_554; \ |
| 54722 | uint16x4_t __s1_554 = __p1_554; \ |
| 54723 | uint16x8_t __s2_554 = __p2_554; \ |
| 54724 | uint32x4_t __rev0_554; __rev0_554 = __builtin_shufflevector(__s0_554, __s0_554, 3, 2, 1, 0); \ |
| 54725 | uint16x4_t __rev1_554; __rev1_554 = __builtin_shufflevector(__s1_554, __s1_554, 3, 2, 1, 0); \ |
| 54726 | uint16x8_t __rev2_554; __rev2_554 = __builtin_shufflevector(__s2_554, __s2_554, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54727 | uint32x4_t __ret_554; \ |
| 54728 | __ret_554 = __rev0_554 + __noswap_vmull_u16(__rev1_554, __noswap_splat_laneq_u16(__rev2_554, __p3_554)); \ |
| 54729 | __ret_554 = __builtin_shufflevector(__ret_554, __ret_554, 3, 2, 1, 0); \ |
| 54730 | __ret_554; \ |
| 53375 | 54731 | }) |
| 53376 | 54732 | #endif |
| 53377 | 54733 | |
| 53378 | 54734 | #ifdef __LITTLE_ENDIAN__ |
| 53379 | | #define vmlal_laneq_s32(__p0_463, __p1_463, __p2_463, __p3_463) __extension__ ({ \ |
| 53380 | | int64x2_t __s0_463 = __p0_463; \ |
| 53381 | | int32x2_t __s1_463 = __p1_463; \ |
| 53382 | | int32x4_t __s2_463 = __p2_463; \ |
| 53383 | | int64x2_t __ret_463; \ |
| 53384 | | __ret_463 = __s0_463 + vmull_s32(__s1_463, splat_laneq_s32(__s2_463, __p3_463)); \ |
| 53385 | | __ret_463; \ |
| 54735 | #define vmlal_laneq_s32(__p0_555, __p1_555, __p2_555, __p3_555) __extension__ ({ \ |
| 54736 | int64x2_t __s0_555 = __p0_555; \ |
| 54737 | int32x2_t __s1_555 = __p1_555; \ |
| 54738 | int32x4_t __s2_555 = __p2_555; \ |
| 54739 | int64x2_t __ret_555; \ |
| 54740 | __ret_555 = __s0_555 + vmull_s32(__s1_555, splat_laneq_s32(__s2_555, __p3_555)); \ |
| 54741 | __ret_555; \ |
| 53386 | 54742 | }) |
| 53387 | 54743 | #else |
| 53388 | | #define vmlal_laneq_s32(__p0_464, __p1_464, __p2_464, __p3_464) __extension__ ({ \ |
| 53389 | | int64x2_t __s0_464 = __p0_464; \ |
| 53390 | | int32x2_t __s1_464 = __p1_464; \ |
| 53391 | | int32x4_t __s2_464 = __p2_464; \ |
| 53392 | | int64x2_t __rev0_464; __rev0_464 = __builtin_shufflevector(__s0_464, __s0_464, 1, 0); \ |
| 53393 | | int32x2_t __rev1_464; __rev1_464 = __builtin_shufflevector(__s1_464, __s1_464, 1, 0); \ |
| 53394 | | int32x4_t __rev2_464; __rev2_464 = __builtin_shufflevector(__s2_464, __s2_464, 3, 2, 1, 0); \ |
| 53395 | | int64x2_t __ret_464; \ |
| 53396 | | __ret_464 = __rev0_464 + __noswap_vmull_s32(__rev1_464, __noswap_splat_laneq_s32(__rev2_464, __p3_464)); \ |
| 53397 | | __ret_464 = __builtin_shufflevector(__ret_464, __ret_464, 1, 0); \ |
| 53398 | | __ret_464; \ |
| 54744 | #define vmlal_laneq_s32(__p0_556, __p1_556, __p2_556, __p3_556) __extension__ ({ \ |
| 54745 | int64x2_t __s0_556 = __p0_556; \ |
| 54746 | int32x2_t __s1_556 = __p1_556; \ |
| 54747 | int32x4_t __s2_556 = __p2_556; \ |
| 54748 | int64x2_t __rev0_556; __rev0_556 = __builtin_shufflevector(__s0_556, __s0_556, 1, 0); \ |
| 54749 | int32x2_t __rev1_556; __rev1_556 = __builtin_shufflevector(__s1_556, __s1_556, 1, 0); \ |
| 54750 | int32x4_t __rev2_556; __rev2_556 = __builtin_shufflevector(__s2_556, __s2_556, 3, 2, 1, 0); \ |
| 54751 | int64x2_t __ret_556; \ |
| 54752 | __ret_556 = __rev0_556 + __noswap_vmull_s32(__rev1_556, __noswap_splat_laneq_s32(__rev2_556, __p3_556)); \ |
| 54753 | __ret_556 = __builtin_shufflevector(__ret_556, __ret_556, 1, 0); \ |
| 54754 | __ret_556; \ |
| 53399 | 54755 | }) |
| 53400 | 54756 | #endif |
| 53401 | 54757 | |
| 53402 | 54758 | #ifdef __LITTLE_ENDIAN__ |
| 53403 | | #define vmlal_laneq_s16(__p0_465, __p1_465, __p2_465, __p3_465) __extension__ ({ \ |
| 53404 | | int32x4_t __s0_465 = __p0_465; \ |
| 53405 | | int16x4_t __s1_465 = __p1_465; \ |
| 53406 | | int16x8_t __s2_465 = __p2_465; \ |
| 53407 | | int32x4_t __ret_465; \ |
| 53408 | | __ret_465 = __s0_465 + vmull_s16(__s1_465, splat_laneq_s16(__s2_465, __p3_465)); \ |
| 53409 | | __ret_465; \ |
| 54759 | #define vmlal_laneq_s16(__p0_557, __p1_557, __p2_557, __p3_557) __extension__ ({ \ |
| 54760 | int32x4_t __s0_557 = __p0_557; \ |
| 54761 | int16x4_t __s1_557 = __p1_557; \ |
| 54762 | int16x8_t __s2_557 = __p2_557; \ |
| 54763 | int32x4_t __ret_557; \ |
| 54764 | __ret_557 = __s0_557 + vmull_s16(__s1_557, splat_laneq_s16(__s2_557, __p3_557)); \ |
| 54765 | __ret_557; \ |
| 53410 | 54766 | }) |
| 53411 | 54767 | #else |
| 53412 | | #define vmlal_laneq_s16(__p0_466, __p1_466, __p2_466, __p3_466) __extension__ ({ \ |
| 53413 | | int32x4_t __s0_466 = __p0_466; \ |
| 53414 | | int16x4_t __s1_466 = __p1_466; \ |
| 53415 | | int16x8_t __s2_466 = __p2_466; \ |
| 53416 | | int32x4_t __rev0_466; __rev0_466 = __builtin_shufflevector(__s0_466, __s0_466, 3, 2, 1, 0); \ |
| 53417 | | int16x4_t __rev1_466; __rev1_466 = __builtin_shufflevector(__s1_466, __s1_466, 3, 2, 1, 0); \ |
| 53418 | | int16x8_t __rev2_466; __rev2_466 = __builtin_shufflevector(__s2_466, __s2_466, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53419 | | int32x4_t __ret_466; \ |
| 53420 | | __ret_466 = __rev0_466 + __noswap_vmull_s16(__rev1_466, __noswap_splat_laneq_s16(__rev2_466, __p3_466)); \ |
| 53421 | | __ret_466 = __builtin_shufflevector(__ret_466, __ret_466, 3, 2, 1, 0); \ |
| 53422 | | __ret_466; \ |
| 54768 | #define vmlal_laneq_s16(__p0_558, __p1_558, __p2_558, __p3_558) __extension__ ({ \ |
| 54769 | int32x4_t __s0_558 = __p0_558; \ |
| 54770 | int16x4_t __s1_558 = __p1_558; \ |
| 54771 | int16x8_t __s2_558 = __p2_558; \ |
| 54772 | int32x4_t __rev0_558; __rev0_558 = __builtin_shufflevector(__s0_558, __s0_558, 3, 2, 1, 0); \ |
| 54773 | int16x4_t __rev1_558; __rev1_558 = __builtin_shufflevector(__s1_558, __s1_558, 3, 2, 1, 0); \ |
| 54774 | int16x8_t __rev2_558; __rev2_558 = __builtin_shufflevector(__s2_558, __s2_558, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54775 | int32x4_t __ret_558; \ |
| 54776 | __ret_558 = __rev0_558 + __noswap_vmull_s16(__rev1_558, __noswap_splat_laneq_s16(__rev2_558, __p3_558)); \ |
| 54777 | __ret_558 = __builtin_shufflevector(__ret_558, __ret_558, 3, 2, 1, 0); \ |
| 54778 | __ret_558; \ |
| 53423 | 54779 | }) |
| 53424 | 54780 | #endif |
| 53425 | 54781 | |
| ... | ... | @@ -53447,530 +54803,530 @@ __ai float64x1_t vmls_f64(float64x1_t __p0, float64x1_t __p1, float64x1_t __p2) |
| 53447 | 54803 | return __ret; |
| 53448 | 54804 | } |
| 53449 | 54805 | #ifdef __LITTLE_ENDIAN__ |
| 53450 | | #define vmlsq_laneq_u32(__p0_467, __p1_467, __p2_467, __p3_467) __extension__ ({ \ |
| 53451 | | uint32x4_t __s0_467 = __p0_467; \ |
| 53452 | | uint32x4_t __s1_467 = __p1_467; \ |
| 53453 | | uint32x4_t __s2_467 = __p2_467; \ |
| 53454 | | uint32x4_t __ret_467; \ |
| 53455 | | __ret_467 = __s0_467 - __s1_467 * splatq_laneq_u32(__s2_467, __p3_467); \ |
| 53456 | | __ret_467; \ |
| 54806 | #define vmlsq_laneq_u32(__p0_559, __p1_559, __p2_559, __p3_559) __extension__ ({ \ |
| 54807 | uint32x4_t __s0_559 = __p0_559; \ |
| 54808 | uint32x4_t __s1_559 = __p1_559; \ |
| 54809 | uint32x4_t __s2_559 = __p2_559; \ |
| 54810 | uint32x4_t __ret_559; \ |
| 54811 | __ret_559 = __s0_559 - __s1_559 * splatq_laneq_u32(__s2_559, __p3_559); \ |
| 54812 | __ret_559; \ |
| 53457 | 54813 | }) |
| 53458 | 54814 | #else |
| 53459 | | #define vmlsq_laneq_u32(__p0_468, __p1_468, __p2_468, __p3_468) __extension__ ({ \ |
| 53460 | | uint32x4_t __s0_468 = __p0_468; \ |
| 53461 | | uint32x4_t __s1_468 = __p1_468; \ |
| 53462 | | uint32x4_t __s2_468 = __p2_468; \ |
| 53463 | | uint32x4_t __rev0_468; __rev0_468 = __builtin_shufflevector(__s0_468, __s0_468, 3, 2, 1, 0); \ |
| 53464 | | uint32x4_t __rev1_468; __rev1_468 = __builtin_shufflevector(__s1_468, __s1_468, 3, 2, 1, 0); \ |
| 53465 | | uint32x4_t __rev2_468; __rev2_468 = __builtin_shufflevector(__s2_468, __s2_468, 3, 2, 1, 0); \ |
| 53466 | | uint32x4_t __ret_468; \ |
| 53467 | | __ret_468 = __rev0_468 - __rev1_468 * __noswap_splatq_laneq_u32(__rev2_468, __p3_468); \ |
| 53468 | | __ret_468 = __builtin_shufflevector(__ret_468, __ret_468, 3, 2, 1, 0); \ |
| 53469 | | __ret_468; \ |
| 54815 | #define vmlsq_laneq_u32(__p0_560, __p1_560, __p2_560, __p3_560) __extension__ ({ \ |
| 54816 | uint32x4_t __s0_560 = __p0_560; \ |
| 54817 | uint32x4_t __s1_560 = __p1_560; \ |
| 54818 | uint32x4_t __s2_560 = __p2_560; \ |
| 54819 | uint32x4_t __rev0_560; __rev0_560 = __builtin_shufflevector(__s0_560, __s0_560, 3, 2, 1, 0); \ |
| 54820 | uint32x4_t __rev1_560; __rev1_560 = __builtin_shufflevector(__s1_560, __s1_560, 3, 2, 1, 0); \ |
| 54821 | uint32x4_t __rev2_560; __rev2_560 = __builtin_shufflevector(__s2_560, __s2_560, 3, 2, 1, 0); \ |
| 54822 | uint32x4_t __ret_560; \ |
| 54823 | __ret_560 = __rev0_560 - __rev1_560 * __noswap_splatq_laneq_u32(__rev2_560, __p3_560); \ |
| 54824 | __ret_560 = __builtin_shufflevector(__ret_560, __ret_560, 3, 2, 1, 0); \ |
| 54825 | __ret_560; \ |
| 53470 | 54826 | }) |
| 53471 | 54827 | #endif |
| 53472 | 54828 | |
| 53473 | 54829 | #ifdef __LITTLE_ENDIAN__ |
| 53474 | | #define vmlsq_laneq_u16(__p0_469, __p1_469, __p2_469, __p3_469) __extension__ ({ \ |
| 53475 | | uint16x8_t __s0_469 = __p0_469; \ |
| 53476 | | uint16x8_t __s1_469 = __p1_469; \ |
| 53477 | | uint16x8_t __s2_469 = __p2_469; \ |
| 53478 | | uint16x8_t __ret_469; \ |
| 53479 | | __ret_469 = __s0_469 - __s1_469 * splatq_laneq_u16(__s2_469, __p3_469); \ |
| 53480 | | __ret_469; \ |
| 54830 | #define vmlsq_laneq_u16(__p0_561, __p1_561, __p2_561, __p3_561) __extension__ ({ \ |
| 54831 | uint16x8_t __s0_561 = __p0_561; \ |
| 54832 | uint16x8_t __s1_561 = __p1_561; \ |
| 54833 | uint16x8_t __s2_561 = __p2_561; \ |
| 54834 | uint16x8_t __ret_561; \ |
| 54835 | __ret_561 = __s0_561 - __s1_561 * splatq_laneq_u16(__s2_561, __p3_561); \ |
| 54836 | __ret_561; \ |
| 53481 | 54837 | }) |
| 53482 | 54838 | #else |
| 53483 | | #define vmlsq_laneq_u16(__p0_470, __p1_470, __p2_470, __p3_470) __extension__ ({ \ |
| 53484 | | uint16x8_t __s0_470 = __p0_470; \ |
| 53485 | | uint16x8_t __s1_470 = __p1_470; \ |
| 53486 | | uint16x8_t __s2_470 = __p2_470; \ |
| 53487 | | uint16x8_t __rev0_470; __rev0_470 = __builtin_shufflevector(__s0_470, __s0_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53488 | | uint16x8_t __rev1_470; __rev1_470 = __builtin_shufflevector(__s1_470, __s1_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53489 | | uint16x8_t __rev2_470; __rev2_470 = __builtin_shufflevector(__s2_470, __s2_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53490 | | uint16x8_t __ret_470; \ |
| 53491 | | __ret_470 = __rev0_470 - __rev1_470 * __noswap_splatq_laneq_u16(__rev2_470, __p3_470); \ |
| 53492 | | __ret_470 = __builtin_shufflevector(__ret_470, __ret_470, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53493 | | __ret_470; \ |
| 54839 | #define vmlsq_laneq_u16(__p0_562, __p1_562, __p2_562, __p3_562) __extension__ ({ \ |
| 54840 | uint16x8_t __s0_562 = __p0_562; \ |
| 54841 | uint16x8_t __s1_562 = __p1_562; \ |
| 54842 | uint16x8_t __s2_562 = __p2_562; \ |
| 54843 | uint16x8_t __rev0_562; __rev0_562 = __builtin_shufflevector(__s0_562, __s0_562, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54844 | uint16x8_t __rev1_562; __rev1_562 = __builtin_shufflevector(__s1_562, __s1_562, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54845 | uint16x8_t __rev2_562; __rev2_562 = __builtin_shufflevector(__s2_562, __s2_562, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54846 | uint16x8_t __ret_562; \ |
| 54847 | __ret_562 = __rev0_562 - __rev1_562 * __noswap_splatq_laneq_u16(__rev2_562, __p3_562); \ |
| 54848 | __ret_562 = __builtin_shufflevector(__ret_562, __ret_562, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54849 | __ret_562; \ |
| 53494 | 54850 | }) |
| 53495 | 54851 | #endif |
| 53496 | 54852 | |
| 53497 | 54853 | #ifdef __LITTLE_ENDIAN__ |
| 53498 | | #define vmlsq_laneq_f32(__p0_471, __p1_471, __p2_471, __p3_471) __extension__ ({ \ |
| 53499 | | float32x4_t __s0_471 = __p0_471; \ |
| 53500 | | float32x4_t __s1_471 = __p1_471; \ |
| 53501 | | float32x4_t __s2_471 = __p2_471; \ |
| 53502 | | float32x4_t __ret_471; \ |
| 53503 | | __ret_471 = __s0_471 - __s1_471 * splatq_laneq_f32(__s2_471, __p3_471); \ |
| 53504 | | __ret_471; \ |
| 54854 | #define vmlsq_laneq_f32(__p0_563, __p1_563, __p2_563, __p3_563) __extension__ ({ \ |
| 54855 | float32x4_t __s0_563 = __p0_563; \ |
| 54856 | float32x4_t __s1_563 = __p1_563; \ |
| 54857 | float32x4_t __s2_563 = __p2_563; \ |
| 54858 | float32x4_t __ret_563; \ |
| 54859 | __ret_563 = __s0_563 - __s1_563 * splatq_laneq_f32(__s2_563, __p3_563); \ |
| 54860 | __ret_563; \ |
| 53505 | 54861 | }) |
| 53506 | 54862 | #else |
| 53507 | | #define vmlsq_laneq_f32(__p0_472, __p1_472, __p2_472, __p3_472) __extension__ ({ \ |
| 53508 | | float32x4_t __s0_472 = __p0_472; \ |
| 53509 | | float32x4_t __s1_472 = __p1_472; \ |
| 53510 | | float32x4_t __s2_472 = __p2_472; \ |
| 53511 | | float32x4_t __rev0_472; __rev0_472 = __builtin_shufflevector(__s0_472, __s0_472, 3, 2, 1, 0); \ |
| 53512 | | float32x4_t __rev1_472; __rev1_472 = __builtin_shufflevector(__s1_472, __s1_472, 3, 2, 1, 0); \ |
| 53513 | | float32x4_t __rev2_472; __rev2_472 = __builtin_shufflevector(__s2_472, __s2_472, 3, 2, 1, 0); \ |
| 53514 | | float32x4_t __ret_472; \ |
| 53515 | | __ret_472 = __rev0_472 - __rev1_472 * __noswap_splatq_laneq_f32(__rev2_472, __p3_472); \ |
| 53516 | | __ret_472 = __builtin_shufflevector(__ret_472, __ret_472, 3, 2, 1, 0); \ |
| 53517 | | __ret_472; \ |
| 54863 | #define vmlsq_laneq_f32(__p0_564, __p1_564, __p2_564, __p3_564) __extension__ ({ \ |
| 54864 | float32x4_t __s0_564 = __p0_564; \ |
| 54865 | float32x4_t __s1_564 = __p1_564; \ |
| 54866 | float32x4_t __s2_564 = __p2_564; \ |
| 54867 | float32x4_t __rev0_564; __rev0_564 = __builtin_shufflevector(__s0_564, __s0_564, 3, 2, 1, 0); \ |
| 54868 | float32x4_t __rev1_564; __rev1_564 = __builtin_shufflevector(__s1_564, __s1_564, 3, 2, 1, 0); \ |
| 54869 | float32x4_t __rev2_564; __rev2_564 = __builtin_shufflevector(__s2_564, __s2_564, 3, 2, 1, 0); \ |
| 54870 | float32x4_t __ret_564; \ |
| 54871 | __ret_564 = __rev0_564 - __rev1_564 * __noswap_splatq_laneq_f32(__rev2_564, __p3_564); \ |
| 54872 | __ret_564 = __builtin_shufflevector(__ret_564, __ret_564, 3, 2, 1, 0); \ |
| 54873 | __ret_564; \ |
| 53518 | 54874 | }) |
| 53519 | 54875 | #endif |
| 53520 | 54876 | |
| 53521 | 54877 | #ifdef __LITTLE_ENDIAN__ |
| 53522 | | #define vmlsq_laneq_s32(__p0_473, __p1_473, __p2_473, __p3_473) __extension__ ({ \ |
| 53523 | | int32x4_t __s0_473 = __p0_473; \ |
| 53524 | | int32x4_t __s1_473 = __p1_473; \ |
| 53525 | | int32x4_t __s2_473 = __p2_473; \ |
| 53526 | | int32x4_t __ret_473; \ |
| 53527 | | __ret_473 = __s0_473 - __s1_473 * splatq_laneq_s32(__s2_473, __p3_473); \ |
| 53528 | | __ret_473; \ |
| 54878 | #define vmlsq_laneq_s32(__p0_565, __p1_565, __p2_565, __p3_565) __extension__ ({ \ |
| 54879 | int32x4_t __s0_565 = __p0_565; \ |
| 54880 | int32x4_t __s1_565 = __p1_565; \ |
| 54881 | int32x4_t __s2_565 = __p2_565; \ |
| 54882 | int32x4_t __ret_565; \ |
| 54883 | __ret_565 = __s0_565 - __s1_565 * splatq_laneq_s32(__s2_565, __p3_565); \ |
| 54884 | __ret_565; \ |
| 53529 | 54885 | }) |
| 53530 | 54886 | #else |
| 53531 | | #define vmlsq_laneq_s32(__p0_474, __p1_474, __p2_474, __p3_474) __extension__ ({ \ |
| 53532 | | int32x4_t __s0_474 = __p0_474; \ |
| 53533 | | int32x4_t __s1_474 = __p1_474; \ |
| 53534 | | int32x4_t __s2_474 = __p2_474; \ |
| 53535 | | int32x4_t __rev0_474; __rev0_474 = __builtin_shufflevector(__s0_474, __s0_474, 3, 2, 1, 0); \ |
| 53536 | | int32x4_t __rev1_474; __rev1_474 = __builtin_shufflevector(__s1_474, __s1_474, 3, 2, 1, 0); \ |
| 53537 | | int32x4_t __rev2_474; __rev2_474 = __builtin_shufflevector(__s2_474, __s2_474, 3, 2, 1, 0); \ |
| 53538 | | int32x4_t __ret_474; \ |
| 53539 | | __ret_474 = __rev0_474 - __rev1_474 * __noswap_splatq_laneq_s32(__rev2_474, __p3_474); \ |
| 53540 | | __ret_474 = __builtin_shufflevector(__ret_474, __ret_474, 3, 2, 1, 0); \ |
| 53541 | | __ret_474; \ |
| 54887 | #define vmlsq_laneq_s32(__p0_566, __p1_566, __p2_566, __p3_566) __extension__ ({ \ |
| 54888 | int32x4_t __s0_566 = __p0_566; \ |
| 54889 | int32x4_t __s1_566 = __p1_566; \ |
| 54890 | int32x4_t __s2_566 = __p2_566; \ |
| 54891 | int32x4_t __rev0_566; __rev0_566 = __builtin_shufflevector(__s0_566, __s0_566, 3, 2, 1, 0); \ |
| 54892 | int32x4_t __rev1_566; __rev1_566 = __builtin_shufflevector(__s1_566, __s1_566, 3, 2, 1, 0); \ |
| 54893 | int32x4_t __rev2_566; __rev2_566 = __builtin_shufflevector(__s2_566, __s2_566, 3, 2, 1, 0); \ |
| 54894 | int32x4_t __ret_566; \ |
| 54895 | __ret_566 = __rev0_566 - __rev1_566 * __noswap_splatq_laneq_s32(__rev2_566, __p3_566); \ |
| 54896 | __ret_566 = __builtin_shufflevector(__ret_566, __ret_566, 3, 2, 1, 0); \ |
| 54897 | __ret_566; \ |
| 53542 | 54898 | }) |
| 53543 | 54899 | #endif |
| 53544 | 54900 | |
| 53545 | 54901 | #ifdef __LITTLE_ENDIAN__ |
| 53546 | | #define vmlsq_laneq_s16(__p0_475, __p1_475, __p2_475, __p3_475) __extension__ ({ \ |
| 53547 | | int16x8_t __s0_475 = __p0_475; \ |
| 53548 | | int16x8_t __s1_475 = __p1_475; \ |
| 53549 | | int16x8_t __s2_475 = __p2_475; \ |
| 53550 | | int16x8_t __ret_475; \ |
| 53551 | | __ret_475 = __s0_475 - __s1_475 * splatq_laneq_s16(__s2_475, __p3_475); \ |
| 53552 | | __ret_475; \ |
| 54902 | #define vmlsq_laneq_s16(__p0_567, __p1_567, __p2_567, __p3_567) __extension__ ({ \ |
| 54903 | int16x8_t __s0_567 = __p0_567; \ |
| 54904 | int16x8_t __s1_567 = __p1_567; \ |
| 54905 | int16x8_t __s2_567 = __p2_567; \ |
| 54906 | int16x8_t __ret_567; \ |
| 54907 | __ret_567 = __s0_567 - __s1_567 * splatq_laneq_s16(__s2_567, __p3_567); \ |
| 54908 | __ret_567; \ |
| 53553 | 54909 | }) |
| 53554 | 54910 | #else |
| 53555 | | #define vmlsq_laneq_s16(__p0_476, __p1_476, __p2_476, __p3_476) __extension__ ({ \ |
| 53556 | | int16x8_t __s0_476 = __p0_476; \ |
| 53557 | | int16x8_t __s1_476 = __p1_476; \ |
| 53558 | | int16x8_t __s2_476 = __p2_476; \ |
| 53559 | | int16x8_t __rev0_476; __rev0_476 = __builtin_shufflevector(__s0_476, __s0_476, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53560 | | int16x8_t __rev1_476; __rev1_476 = __builtin_shufflevector(__s1_476, __s1_476, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53561 | | int16x8_t __rev2_476; __rev2_476 = __builtin_shufflevector(__s2_476, __s2_476, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53562 | | int16x8_t __ret_476; \ |
| 53563 | | __ret_476 = __rev0_476 - __rev1_476 * __noswap_splatq_laneq_s16(__rev2_476, __p3_476); \ |
| 53564 | | __ret_476 = __builtin_shufflevector(__ret_476, __ret_476, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53565 | | __ret_476; \ |
| 54911 | #define vmlsq_laneq_s16(__p0_568, __p1_568, __p2_568, __p3_568) __extension__ ({ \ |
| 54912 | int16x8_t __s0_568 = __p0_568; \ |
| 54913 | int16x8_t __s1_568 = __p1_568; \ |
| 54914 | int16x8_t __s2_568 = __p2_568; \ |
| 54915 | int16x8_t __rev0_568; __rev0_568 = __builtin_shufflevector(__s0_568, __s0_568, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54916 | int16x8_t __rev1_568; __rev1_568 = __builtin_shufflevector(__s1_568, __s1_568, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54917 | int16x8_t __rev2_568; __rev2_568 = __builtin_shufflevector(__s2_568, __s2_568, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54918 | int16x8_t __ret_568; \ |
| 54919 | __ret_568 = __rev0_568 - __rev1_568 * __noswap_splatq_laneq_s16(__rev2_568, __p3_568); \ |
| 54920 | __ret_568 = __builtin_shufflevector(__ret_568, __ret_568, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54921 | __ret_568; \ |
| 53566 | 54922 | }) |
| 53567 | 54923 | #endif |
| 53568 | 54924 | |
| 53569 | 54925 | #ifdef __LITTLE_ENDIAN__ |
| 53570 | | #define vmls_laneq_u32(__p0_477, __p1_477, __p2_477, __p3_477) __extension__ ({ \ |
| 53571 | | uint32x2_t __s0_477 = __p0_477; \ |
| 53572 | | uint32x2_t __s1_477 = __p1_477; \ |
| 53573 | | uint32x4_t __s2_477 = __p2_477; \ |
| 53574 | | uint32x2_t __ret_477; \ |
| 53575 | | __ret_477 = __s0_477 - __s1_477 * splat_laneq_u32(__s2_477, __p3_477); \ |
| 53576 | | __ret_477; \ |
| 54926 | #define vmls_laneq_u32(__p0_569, __p1_569, __p2_569, __p3_569) __extension__ ({ \ |
| 54927 | uint32x2_t __s0_569 = __p0_569; \ |
| 54928 | uint32x2_t __s1_569 = __p1_569; \ |
| 54929 | uint32x4_t __s2_569 = __p2_569; \ |
| 54930 | uint32x2_t __ret_569; \ |
| 54931 | __ret_569 = __s0_569 - __s1_569 * splat_laneq_u32(__s2_569, __p3_569); \ |
| 54932 | __ret_569; \ |
| 53577 | 54933 | }) |
| 53578 | 54934 | #else |
| 53579 | | #define vmls_laneq_u32(__p0_478, __p1_478, __p2_478, __p3_478) __extension__ ({ \ |
| 53580 | | uint32x2_t __s0_478 = __p0_478; \ |
| 53581 | | uint32x2_t __s1_478 = __p1_478; \ |
| 53582 | | uint32x4_t __s2_478 = __p2_478; \ |
| 53583 | | uint32x2_t __rev0_478; __rev0_478 = __builtin_shufflevector(__s0_478, __s0_478, 1, 0); \ |
| 53584 | | uint32x2_t __rev1_478; __rev1_478 = __builtin_shufflevector(__s1_478, __s1_478, 1, 0); \ |
| 53585 | | uint32x4_t __rev2_478; __rev2_478 = __builtin_shufflevector(__s2_478, __s2_478, 3, 2, 1, 0); \ |
| 53586 | | uint32x2_t __ret_478; \ |
| 53587 | | __ret_478 = __rev0_478 - __rev1_478 * __noswap_splat_laneq_u32(__rev2_478, __p3_478); \ |
| 53588 | | __ret_478 = __builtin_shufflevector(__ret_478, __ret_478, 1, 0); \ |
| 53589 | | __ret_478; \ |
| 54935 | #define vmls_laneq_u32(__p0_570, __p1_570, __p2_570, __p3_570) __extension__ ({ \ |
| 54936 | uint32x2_t __s0_570 = __p0_570; \ |
| 54937 | uint32x2_t __s1_570 = __p1_570; \ |
| 54938 | uint32x4_t __s2_570 = __p2_570; \ |
| 54939 | uint32x2_t __rev0_570; __rev0_570 = __builtin_shufflevector(__s0_570, __s0_570, 1, 0); \ |
| 54940 | uint32x2_t __rev1_570; __rev1_570 = __builtin_shufflevector(__s1_570, __s1_570, 1, 0); \ |
| 54941 | uint32x4_t __rev2_570; __rev2_570 = __builtin_shufflevector(__s2_570, __s2_570, 3, 2, 1, 0); \ |
| 54942 | uint32x2_t __ret_570; \ |
| 54943 | __ret_570 = __rev0_570 - __rev1_570 * __noswap_splat_laneq_u32(__rev2_570, __p3_570); \ |
| 54944 | __ret_570 = __builtin_shufflevector(__ret_570, __ret_570, 1, 0); \ |
| 54945 | __ret_570; \ |
| 53590 | 54946 | }) |
| 53591 | 54947 | #endif |
| 53592 | 54948 | |
| 53593 | 54949 | #ifdef __LITTLE_ENDIAN__ |
| 53594 | | #define vmls_laneq_u16(__p0_479, __p1_479, __p2_479, __p3_479) __extension__ ({ \ |
| 53595 | | uint16x4_t __s0_479 = __p0_479; \ |
| 53596 | | uint16x4_t __s1_479 = __p1_479; \ |
| 53597 | | uint16x8_t __s2_479 = __p2_479; \ |
| 53598 | | uint16x4_t __ret_479; \ |
| 53599 | | __ret_479 = __s0_479 - __s1_479 * splat_laneq_u16(__s2_479, __p3_479); \ |
| 53600 | | __ret_479; \ |
| 54950 | #define vmls_laneq_u16(__p0_571, __p1_571, __p2_571, __p3_571) __extension__ ({ \ |
| 54951 | uint16x4_t __s0_571 = __p0_571; \ |
| 54952 | uint16x4_t __s1_571 = __p1_571; \ |
| 54953 | uint16x8_t __s2_571 = __p2_571; \ |
| 54954 | uint16x4_t __ret_571; \ |
| 54955 | __ret_571 = __s0_571 - __s1_571 * splat_laneq_u16(__s2_571, __p3_571); \ |
| 54956 | __ret_571; \ |
| 53601 | 54957 | }) |
| 53602 | 54958 | #else |
| 53603 | | #define vmls_laneq_u16(__p0_480, __p1_480, __p2_480, __p3_480) __extension__ ({ \ |
| 53604 | | uint16x4_t __s0_480 = __p0_480; \ |
| 53605 | | uint16x4_t __s1_480 = __p1_480; \ |
| 53606 | | uint16x8_t __s2_480 = __p2_480; \ |
| 53607 | | uint16x4_t __rev0_480; __rev0_480 = __builtin_shufflevector(__s0_480, __s0_480, 3, 2, 1, 0); \ |
| 53608 | | uint16x4_t __rev1_480; __rev1_480 = __builtin_shufflevector(__s1_480, __s1_480, 3, 2, 1, 0); \ |
| 53609 | | uint16x8_t __rev2_480; __rev2_480 = __builtin_shufflevector(__s2_480, __s2_480, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53610 | | uint16x4_t __ret_480; \ |
| 53611 | | __ret_480 = __rev0_480 - __rev1_480 * __noswap_splat_laneq_u16(__rev2_480, __p3_480); \ |
| 53612 | | __ret_480 = __builtin_shufflevector(__ret_480, __ret_480, 3, 2, 1, 0); \ |
| 53613 | | __ret_480; \ |
| 54959 | #define vmls_laneq_u16(__p0_572, __p1_572, __p2_572, __p3_572) __extension__ ({ \ |
| 54960 | uint16x4_t __s0_572 = __p0_572; \ |
| 54961 | uint16x4_t __s1_572 = __p1_572; \ |
| 54962 | uint16x8_t __s2_572 = __p2_572; \ |
| 54963 | uint16x4_t __rev0_572; __rev0_572 = __builtin_shufflevector(__s0_572, __s0_572, 3, 2, 1, 0); \ |
| 54964 | uint16x4_t __rev1_572; __rev1_572 = __builtin_shufflevector(__s1_572, __s1_572, 3, 2, 1, 0); \ |
| 54965 | uint16x8_t __rev2_572; __rev2_572 = __builtin_shufflevector(__s2_572, __s2_572, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54966 | uint16x4_t __ret_572; \ |
| 54967 | __ret_572 = __rev0_572 - __rev1_572 * __noswap_splat_laneq_u16(__rev2_572, __p3_572); \ |
| 54968 | __ret_572 = __builtin_shufflevector(__ret_572, __ret_572, 3, 2, 1, 0); \ |
| 54969 | __ret_572; \ |
| 53614 | 54970 | }) |
| 53615 | 54971 | #endif |
| 53616 | 54972 | |
| 53617 | 54973 | #ifdef __LITTLE_ENDIAN__ |
| 53618 | | #define vmls_laneq_f32(__p0_481, __p1_481, __p2_481, __p3_481) __extension__ ({ \ |
| 53619 | | float32x2_t __s0_481 = __p0_481; \ |
| 53620 | | float32x2_t __s1_481 = __p1_481; \ |
| 53621 | | float32x4_t __s2_481 = __p2_481; \ |
| 53622 | | float32x2_t __ret_481; \ |
| 53623 | | __ret_481 = __s0_481 - __s1_481 * splat_laneq_f32(__s2_481, __p3_481); \ |
| 53624 | | __ret_481; \ |
| 54974 | #define vmls_laneq_f32(__p0_573, __p1_573, __p2_573, __p3_573) __extension__ ({ \ |
| 54975 | float32x2_t __s0_573 = __p0_573; \ |
| 54976 | float32x2_t __s1_573 = __p1_573; \ |
| 54977 | float32x4_t __s2_573 = __p2_573; \ |
| 54978 | float32x2_t __ret_573; \ |
| 54979 | __ret_573 = __s0_573 - __s1_573 * splat_laneq_f32(__s2_573, __p3_573); \ |
| 54980 | __ret_573; \ |
| 53625 | 54981 | }) |
| 53626 | 54982 | #else |
| 53627 | | #define vmls_laneq_f32(__p0_482, __p1_482, __p2_482, __p3_482) __extension__ ({ \ |
| 53628 | | float32x2_t __s0_482 = __p0_482; \ |
| 53629 | | float32x2_t __s1_482 = __p1_482; \ |
| 53630 | | float32x4_t __s2_482 = __p2_482; \ |
| 53631 | | float32x2_t __rev0_482; __rev0_482 = __builtin_shufflevector(__s0_482, __s0_482, 1, 0); \ |
| 53632 | | float32x2_t __rev1_482; __rev1_482 = __builtin_shufflevector(__s1_482, __s1_482, 1, 0); \ |
| 53633 | | float32x4_t __rev2_482; __rev2_482 = __builtin_shufflevector(__s2_482, __s2_482, 3, 2, 1, 0); \ |
| 53634 | | float32x2_t __ret_482; \ |
| 53635 | | __ret_482 = __rev0_482 - __rev1_482 * __noswap_splat_laneq_f32(__rev2_482, __p3_482); \ |
| 53636 | | __ret_482 = __builtin_shufflevector(__ret_482, __ret_482, 1, 0); \ |
| 53637 | | __ret_482; \ |
| 54983 | #define vmls_laneq_f32(__p0_574, __p1_574, __p2_574, __p3_574) __extension__ ({ \ |
| 54984 | float32x2_t __s0_574 = __p0_574; \ |
| 54985 | float32x2_t __s1_574 = __p1_574; \ |
| 54986 | float32x4_t __s2_574 = __p2_574; \ |
| 54987 | float32x2_t __rev0_574; __rev0_574 = __builtin_shufflevector(__s0_574, __s0_574, 1, 0); \ |
| 54988 | float32x2_t __rev1_574; __rev1_574 = __builtin_shufflevector(__s1_574, __s1_574, 1, 0); \ |
| 54989 | float32x4_t __rev2_574; __rev2_574 = __builtin_shufflevector(__s2_574, __s2_574, 3, 2, 1, 0); \ |
| 54990 | float32x2_t __ret_574; \ |
| 54991 | __ret_574 = __rev0_574 - __rev1_574 * __noswap_splat_laneq_f32(__rev2_574, __p3_574); \ |
| 54992 | __ret_574 = __builtin_shufflevector(__ret_574, __ret_574, 1, 0); \ |
| 54993 | __ret_574; \ |
| 53638 | 54994 | }) |
| 53639 | 54995 | #endif |
| 53640 | 54996 | |
| 53641 | 54997 | #ifdef __LITTLE_ENDIAN__ |
| 53642 | | #define vmls_laneq_s32(__p0_483, __p1_483, __p2_483, __p3_483) __extension__ ({ \ |
| 53643 | | int32x2_t __s0_483 = __p0_483; \ |
| 53644 | | int32x2_t __s1_483 = __p1_483; \ |
| 53645 | | int32x4_t __s2_483 = __p2_483; \ |
| 53646 | | int32x2_t __ret_483; \ |
| 53647 | | __ret_483 = __s0_483 - __s1_483 * splat_laneq_s32(__s2_483, __p3_483); \ |
| 53648 | | __ret_483; \ |
| 54998 | #define vmls_laneq_s32(__p0_575, __p1_575, __p2_575, __p3_575) __extension__ ({ \ |
| 54999 | int32x2_t __s0_575 = __p0_575; \ |
| 55000 | int32x2_t __s1_575 = __p1_575; \ |
| 55001 | int32x4_t __s2_575 = __p2_575; \ |
| 55002 | int32x2_t __ret_575; \ |
| 55003 | __ret_575 = __s0_575 - __s1_575 * splat_laneq_s32(__s2_575, __p3_575); \ |
| 55004 | __ret_575; \ |
| 53649 | 55005 | }) |
| 53650 | 55006 | #else |
| 53651 | | #define vmls_laneq_s32(__p0_484, __p1_484, __p2_484, __p3_484) __extension__ ({ \ |
| 53652 | | int32x2_t __s0_484 = __p0_484; \ |
| 53653 | | int32x2_t __s1_484 = __p1_484; \ |
| 53654 | | int32x4_t __s2_484 = __p2_484; \ |
| 53655 | | int32x2_t __rev0_484; __rev0_484 = __builtin_shufflevector(__s0_484, __s0_484, 1, 0); \ |
| 53656 | | int32x2_t __rev1_484; __rev1_484 = __builtin_shufflevector(__s1_484, __s1_484, 1, 0); \ |
| 53657 | | int32x4_t __rev2_484; __rev2_484 = __builtin_shufflevector(__s2_484, __s2_484, 3, 2, 1, 0); \ |
| 53658 | | int32x2_t __ret_484; \ |
| 53659 | | __ret_484 = __rev0_484 - __rev1_484 * __noswap_splat_laneq_s32(__rev2_484, __p3_484); \ |
| 53660 | | __ret_484 = __builtin_shufflevector(__ret_484, __ret_484, 1, 0); \ |
| 53661 | | __ret_484; \ |
| 55007 | #define vmls_laneq_s32(__p0_576, __p1_576, __p2_576, __p3_576) __extension__ ({ \ |
| 55008 | int32x2_t __s0_576 = __p0_576; \ |
| 55009 | int32x2_t __s1_576 = __p1_576; \ |
| 55010 | int32x4_t __s2_576 = __p2_576; \ |
| 55011 | int32x2_t __rev0_576; __rev0_576 = __builtin_shufflevector(__s0_576, __s0_576, 1, 0); \ |
| 55012 | int32x2_t __rev1_576; __rev1_576 = __builtin_shufflevector(__s1_576, __s1_576, 1, 0); \ |
| 55013 | int32x4_t __rev2_576; __rev2_576 = __builtin_shufflevector(__s2_576, __s2_576, 3, 2, 1, 0); \ |
| 55014 | int32x2_t __ret_576; \ |
| 55015 | __ret_576 = __rev0_576 - __rev1_576 * __noswap_splat_laneq_s32(__rev2_576, __p3_576); \ |
| 55016 | __ret_576 = __builtin_shufflevector(__ret_576, __ret_576, 1, 0); \ |
| 55017 | __ret_576; \ |
| 53662 | 55018 | }) |
| 53663 | 55019 | #endif |
| 53664 | 55020 | |
| 53665 | 55021 | #ifdef __LITTLE_ENDIAN__ |
| 53666 | | #define vmls_laneq_s16(__p0_485, __p1_485, __p2_485, __p3_485) __extension__ ({ \ |
| 53667 | | int16x4_t __s0_485 = __p0_485; \ |
| 53668 | | int16x4_t __s1_485 = __p1_485; \ |
| 53669 | | int16x8_t __s2_485 = __p2_485; \ |
| 53670 | | int16x4_t __ret_485; \ |
| 53671 | | __ret_485 = __s0_485 - __s1_485 * splat_laneq_s16(__s2_485, __p3_485); \ |
| 53672 | | __ret_485; \ |
| 55022 | #define vmls_laneq_s16(__p0_577, __p1_577, __p2_577, __p3_577) __extension__ ({ \ |
| 55023 | int16x4_t __s0_577 = __p0_577; \ |
| 55024 | int16x4_t __s1_577 = __p1_577; \ |
| 55025 | int16x8_t __s2_577 = __p2_577; \ |
| 55026 | int16x4_t __ret_577; \ |
| 55027 | __ret_577 = __s0_577 - __s1_577 * splat_laneq_s16(__s2_577, __p3_577); \ |
| 55028 | __ret_577; \ |
| 53673 | 55029 | }) |
| 53674 | 55030 | #else |
| 53675 | | #define vmls_laneq_s16(__p0_486, __p1_486, __p2_486, __p3_486) __extension__ ({ \ |
| 53676 | | int16x4_t __s0_486 = __p0_486; \ |
| 53677 | | int16x4_t __s1_486 = __p1_486; \ |
| 53678 | | int16x8_t __s2_486 = __p2_486; \ |
| 53679 | | int16x4_t __rev0_486; __rev0_486 = __builtin_shufflevector(__s0_486, __s0_486, 3, 2, 1, 0); \ |
| 53680 | | int16x4_t __rev1_486; __rev1_486 = __builtin_shufflevector(__s1_486, __s1_486, 3, 2, 1, 0); \ |
| 53681 | | int16x8_t __rev2_486; __rev2_486 = __builtin_shufflevector(__s2_486, __s2_486, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53682 | | int16x4_t __ret_486; \ |
| 53683 | | __ret_486 = __rev0_486 - __rev1_486 * __noswap_splat_laneq_s16(__rev2_486, __p3_486); \ |
| 53684 | | __ret_486 = __builtin_shufflevector(__ret_486, __ret_486, 3, 2, 1, 0); \ |
| 53685 | | __ret_486; \ |
| 55031 | #define vmls_laneq_s16(__p0_578, __p1_578, __p2_578, __p3_578) __extension__ ({ \ |
| 55032 | int16x4_t __s0_578 = __p0_578; \ |
| 55033 | int16x4_t __s1_578 = __p1_578; \ |
| 55034 | int16x8_t __s2_578 = __p2_578; \ |
| 55035 | int16x4_t __rev0_578; __rev0_578 = __builtin_shufflevector(__s0_578, __s0_578, 3, 2, 1, 0); \ |
| 55036 | int16x4_t __rev1_578; __rev1_578 = __builtin_shufflevector(__s1_578, __s1_578, 3, 2, 1, 0); \ |
| 55037 | int16x8_t __rev2_578; __rev2_578 = __builtin_shufflevector(__s2_578, __s2_578, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55038 | int16x4_t __ret_578; \ |
| 55039 | __ret_578 = __rev0_578 - __rev1_578 * __noswap_splat_laneq_s16(__rev2_578, __p3_578); \ |
| 55040 | __ret_578 = __builtin_shufflevector(__ret_578, __ret_578, 3, 2, 1, 0); \ |
| 55041 | __ret_578; \ |
| 53686 | 55042 | }) |
| 53687 | 55043 | #endif |
| 53688 | 55044 | |
| 53689 | 55045 | #ifdef __LITTLE_ENDIAN__ |
| 53690 | | #define vmlsl_high_lane_u32(__p0_487, __p1_487, __p2_487, __p3_487) __extension__ ({ \ |
| 53691 | | uint64x2_t __s0_487 = __p0_487; \ |
| 53692 | | uint32x4_t __s1_487 = __p1_487; \ |
| 53693 | | uint32x2_t __s2_487 = __p2_487; \ |
| 53694 | | uint64x2_t __ret_487; \ |
| 53695 | | __ret_487 = __s0_487 - vmull_u32(vget_high_u32(__s1_487), splat_lane_u32(__s2_487, __p3_487)); \ |
| 53696 | | __ret_487; \ |
| 55046 | #define vmlsl_high_lane_u32(__p0_579, __p1_579, __p2_579, __p3_579) __extension__ ({ \ |
| 55047 | uint64x2_t __s0_579 = __p0_579; \ |
| 55048 | uint32x4_t __s1_579 = __p1_579; \ |
| 55049 | uint32x2_t __s2_579 = __p2_579; \ |
| 55050 | uint64x2_t __ret_579; \ |
| 55051 | __ret_579 = __s0_579 - vmull_u32(vget_high_u32(__s1_579), splat_lane_u32(__s2_579, __p3_579)); \ |
| 55052 | __ret_579; \ |
| 53697 | 55053 | }) |
| 53698 | 55054 | #else |
| 53699 | | #define vmlsl_high_lane_u32(__p0_488, __p1_488, __p2_488, __p3_488) __extension__ ({ \ |
| 53700 | | uint64x2_t __s0_488 = __p0_488; \ |
| 53701 | | uint32x4_t __s1_488 = __p1_488; \ |
| 53702 | | uint32x2_t __s2_488 = __p2_488; \ |
| 53703 | | uint64x2_t __rev0_488; __rev0_488 = __builtin_shufflevector(__s0_488, __s0_488, 1, 0); \ |
| 53704 | | uint32x4_t __rev1_488; __rev1_488 = __builtin_shufflevector(__s1_488, __s1_488, 3, 2, 1, 0); \ |
| 53705 | | uint32x2_t __rev2_488; __rev2_488 = __builtin_shufflevector(__s2_488, __s2_488, 1, 0); \ |
| 53706 | | uint64x2_t __ret_488; \ |
| 53707 | | __ret_488 = __rev0_488 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_488), __noswap_splat_lane_u32(__rev2_488, __p3_488)); \ |
| 53708 | | __ret_488 = __builtin_shufflevector(__ret_488, __ret_488, 1, 0); \ |
| 53709 | | __ret_488; \ |
| 55055 | #define vmlsl_high_lane_u32(__p0_580, __p1_580, __p2_580, __p3_580) __extension__ ({ \ |
| 55056 | uint64x2_t __s0_580 = __p0_580; \ |
| 55057 | uint32x4_t __s1_580 = __p1_580; \ |
| 55058 | uint32x2_t __s2_580 = __p2_580; \ |
| 55059 | uint64x2_t __rev0_580; __rev0_580 = __builtin_shufflevector(__s0_580, __s0_580, 1, 0); \ |
| 55060 | uint32x4_t __rev1_580; __rev1_580 = __builtin_shufflevector(__s1_580, __s1_580, 3, 2, 1, 0); \ |
| 55061 | uint32x2_t __rev2_580; __rev2_580 = __builtin_shufflevector(__s2_580, __s2_580, 1, 0); \ |
| 55062 | uint64x2_t __ret_580; \ |
| 55063 | __ret_580 = __rev0_580 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_580), __noswap_splat_lane_u32(__rev2_580, __p3_580)); \ |
| 55064 | __ret_580 = __builtin_shufflevector(__ret_580, __ret_580, 1, 0); \ |
| 55065 | __ret_580; \ |
| 53710 | 55066 | }) |
| 53711 | 55067 | #endif |
| 53712 | 55068 | |
| 53713 | 55069 | #ifdef __LITTLE_ENDIAN__ |
| 53714 | | #define vmlsl_high_lane_u16(__p0_489, __p1_489, __p2_489, __p3_489) __extension__ ({ \ |
| 53715 | | uint32x4_t __s0_489 = __p0_489; \ |
| 53716 | | uint16x8_t __s1_489 = __p1_489; \ |
| 53717 | | uint16x4_t __s2_489 = __p2_489; \ |
| 53718 | | uint32x4_t __ret_489; \ |
| 53719 | | __ret_489 = __s0_489 - vmull_u16(vget_high_u16(__s1_489), splat_lane_u16(__s2_489, __p3_489)); \ |
| 53720 | | __ret_489; \ |
| 55070 | #define vmlsl_high_lane_u16(__p0_581, __p1_581, __p2_581, __p3_581) __extension__ ({ \ |
| 55071 | uint32x4_t __s0_581 = __p0_581; \ |
| 55072 | uint16x8_t __s1_581 = __p1_581; \ |
| 55073 | uint16x4_t __s2_581 = __p2_581; \ |
| 55074 | uint32x4_t __ret_581; \ |
| 55075 | __ret_581 = __s0_581 - vmull_u16(vget_high_u16(__s1_581), splat_lane_u16(__s2_581, __p3_581)); \ |
| 55076 | __ret_581; \ |
| 53721 | 55077 | }) |
| 53722 | 55078 | #else |
| 53723 | | #define vmlsl_high_lane_u16(__p0_490, __p1_490, __p2_490, __p3_490) __extension__ ({ \ |
| 53724 | | uint32x4_t __s0_490 = __p0_490; \ |
| 53725 | | uint16x8_t __s1_490 = __p1_490; \ |
| 53726 | | uint16x4_t __s2_490 = __p2_490; \ |
| 53727 | | uint32x4_t __rev0_490; __rev0_490 = __builtin_shufflevector(__s0_490, __s0_490, 3, 2, 1, 0); \ |
| 53728 | | uint16x8_t __rev1_490; __rev1_490 = __builtin_shufflevector(__s1_490, __s1_490, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53729 | | uint16x4_t __rev2_490; __rev2_490 = __builtin_shufflevector(__s2_490, __s2_490, 3, 2, 1, 0); \ |
| 53730 | | uint32x4_t __ret_490; \ |
| 53731 | | __ret_490 = __rev0_490 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_490), __noswap_splat_lane_u16(__rev2_490, __p3_490)); \ |
| 53732 | | __ret_490 = __builtin_shufflevector(__ret_490, __ret_490, 3, 2, 1, 0); \ |
| 53733 | | __ret_490; \ |
| 55079 | #define vmlsl_high_lane_u16(__p0_582, __p1_582, __p2_582, __p3_582) __extension__ ({ \ |
| 55080 | uint32x4_t __s0_582 = __p0_582; \ |
| 55081 | uint16x8_t __s1_582 = __p1_582; \ |
| 55082 | uint16x4_t __s2_582 = __p2_582; \ |
| 55083 | uint32x4_t __rev0_582; __rev0_582 = __builtin_shufflevector(__s0_582, __s0_582, 3, 2, 1, 0); \ |
| 55084 | uint16x8_t __rev1_582; __rev1_582 = __builtin_shufflevector(__s1_582, __s1_582, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55085 | uint16x4_t __rev2_582; __rev2_582 = __builtin_shufflevector(__s2_582, __s2_582, 3, 2, 1, 0); \ |
| 55086 | uint32x4_t __ret_582; \ |
| 55087 | __ret_582 = __rev0_582 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_582), __noswap_splat_lane_u16(__rev2_582, __p3_582)); \ |
| 55088 | __ret_582 = __builtin_shufflevector(__ret_582, __ret_582, 3, 2, 1, 0); \ |
| 55089 | __ret_582; \ |
| 53734 | 55090 | }) |
| 53735 | 55091 | #endif |
| 53736 | 55092 | |
| 53737 | 55093 | #ifdef __LITTLE_ENDIAN__ |
| 53738 | | #define vmlsl_high_lane_s32(__p0_491, __p1_491, __p2_491, __p3_491) __extension__ ({ \ |
| 53739 | | int64x2_t __s0_491 = __p0_491; \ |
| 53740 | | int32x4_t __s1_491 = __p1_491; \ |
| 53741 | | int32x2_t __s2_491 = __p2_491; \ |
| 53742 | | int64x2_t __ret_491; \ |
| 53743 | | __ret_491 = __s0_491 - vmull_s32(vget_high_s32(__s1_491), splat_lane_s32(__s2_491, __p3_491)); \ |
| 53744 | | __ret_491; \ |
| 55094 | #define vmlsl_high_lane_s32(__p0_583, __p1_583, __p2_583, __p3_583) __extension__ ({ \ |
| 55095 | int64x2_t __s0_583 = __p0_583; \ |
| 55096 | int32x4_t __s1_583 = __p1_583; \ |
| 55097 | int32x2_t __s2_583 = __p2_583; \ |
| 55098 | int64x2_t __ret_583; \ |
| 55099 | __ret_583 = __s0_583 - vmull_s32(vget_high_s32(__s1_583), splat_lane_s32(__s2_583, __p3_583)); \ |
| 55100 | __ret_583; \ |
| 53745 | 55101 | }) |
| 53746 | 55102 | #else |
| 53747 | | #define vmlsl_high_lane_s32(__p0_492, __p1_492, __p2_492, __p3_492) __extension__ ({ \ |
| 53748 | | int64x2_t __s0_492 = __p0_492; \ |
| 53749 | | int32x4_t __s1_492 = __p1_492; \ |
| 53750 | | int32x2_t __s2_492 = __p2_492; \ |
| 53751 | | int64x2_t __rev0_492; __rev0_492 = __builtin_shufflevector(__s0_492, __s0_492, 1, 0); \ |
| 53752 | | int32x4_t __rev1_492; __rev1_492 = __builtin_shufflevector(__s1_492, __s1_492, 3, 2, 1, 0); \ |
| 53753 | | int32x2_t __rev2_492; __rev2_492 = __builtin_shufflevector(__s2_492, __s2_492, 1, 0); \ |
| 53754 | | int64x2_t __ret_492; \ |
| 53755 | | __ret_492 = __rev0_492 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_492), __noswap_splat_lane_s32(__rev2_492, __p3_492)); \ |
| 53756 | | __ret_492 = __builtin_shufflevector(__ret_492, __ret_492, 1, 0); \ |
| 53757 | | __ret_492; \ |
| 55103 | #define vmlsl_high_lane_s32(__p0_584, __p1_584, __p2_584, __p3_584) __extension__ ({ \ |
| 55104 | int64x2_t __s0_584 = __p0_584; \ |
| 55105 | int32x4_t __s1_584 = __p1_584; \ |
| 55106 | int32x2_t __s2_584 = __p2_584; \ |
| 55107 | int64x2_t __rev0_584; __rev0_584 = __builtin_shufflevector(__s0_584, __s0_584, 1, 0); \ |
| 55108 | int32x4_t __rev1_584; __rev1_584 = __builtin_shufflevector(__s1_584, __s1_584, 3, 2, 1, 0); \ |
| 55109 | int32x2_t __rev2_584; __rev2_584 = __builtin_shufflevector(__s2_584, __s2_584, 1, 0); \ |
| 55110 | int64x2_t __ret_584; \ |
| 55111 | __ret_584 = __rev0_584 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_584), __noswap_splat_lane_s32(__rev2_584, __p3_584)); \ |
| 55112 | __ret_584 = __builtin_shufflevector(__ret_584, __ret_584, 1, 0); \ |
| 55113 | __ret_584; \ |
| 53758 | 55114 | }) |
| 53759 | 55115 | #endif |
| 53760 | 55116 | |
| 53761 | 55117 | #ifdef __LITTLE_ENDIAN__ |
| 53762 | | #define vmlsl_high_lane_s16(__p0_493, __p1_493, __p2_493, __p3_493) __extension__ ({ \ |
| 53763 | | int32x4_t __s0_493 = __p0_493; \ |
| 53764 | | int16x8_t __s1_493 = __p1_493; \ |
| 53765 | | int16x4_t __s2_493 = __p2_493; \ |
| 53766 | | int32x4_t __ret_493; \ |
| 53767 | | __ret_493 = __s0_493 - vmull_s16(vget_high_s16(__s1_493), splat_lane_s16(__s2_493, __p3_493)); \ |
| 53768 | | __ret_493; \ |
| 55118 | #define vmlsl_high_lane_s16(__p0_585, __p1_585, __p2_585, __p3_585) __extension__ ({ \ |
| 55119 | int32x4_t __s0_585 = __p0_585; \ |
| 55120 | int16x8_t __s1_585 = __p1_585; \ |
| 55121 | int16x4_t __s2_585 = __p2_585; \ |
| 55122 | int32x4_t __ret_585; \ |
| 55123 | __ret_585 = __s0_585 - vmull_s16(vget_high_s16(__s1_585), splat_lane_s16(__s2_585, __p3_585)); \ |
| 55124 | __ret_585; \ |
| 53769 | 55125 | }) |
| 53770 | 55126 | #else |
| 53771 | | #define vmlsl_high_lane_s16(__p0_494, __p1_494, __p2_494, __p3_494) __extension__ ({ \ |
| 53772 | | int32x4_t __s0_494 = __p0_494; \ |
| 53773 | | int16x8_t __s1_494 = __p1_494; \ |
| 53774 | | int16x4_t __s2_494 = __p2_494; \ |
| 53775 | | int32x4_t __rev0_494; __rev0_494 = __builtin_shufflevector(__s0_494, __s0_494, 3, 2, 1, 0); \ |
| 53776 | | int16x8_t __rev1_494; __rev1_494 = __builtin_shufflevector(__s1_494, __s1_494, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53777 | | int16x4_t __rev2_494; __rev2_494 = __builtin_shufflevector(__s2_494, __s2_494, 3, 2, 1, 0); \ |
| 53778 | | int32x4_t __ret_494; \ |
| 53779 | | __ret_494 = __rev0_494 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_494), __noswap_splat_lane_s16(__rev2_494, __p3_494)); \ |
| 53780 | | __ret_494 = __builtin_shufflevector(__ret_494, __ret_494, 3, 2, 1, 0); \ |
| 53781 | | __ret_494; \ |
| 55127 | #define vmlsl_high_lane_s16(__p0_586, __p1_586, __p2_586, __p3_586) __extension__ ({ \ |
| 55128 | int32x4_t __s0_586 = __p0_586; \ |
| 55129 | int16x8_t __s1_586 = __p1_586; \ |
| 55130 | int16x4_t __s2_586 = __p2_586; \ |
| 55131 | int32x4_t __rev0_586; __rev0_586 = __builtin_shufflevector(__s0_586, __s0_586, 3, 2, 1, 0); \ |
| 55132 | int16x8_t __rev1_586; __rev1_586 = __builtin_shufflevector(__s1_586, __s1_586, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55133 | int16x4_t __rev2_586; __rev2_586 = __builtin_shufflevector(__s2_586, __s2_586, 3, 2, 1, 0); \ |
| 55134 | int32x4_t __ret_586; \ |
| 55135 | __ret_586 = __rev0_586 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_586), __noswap_splat_lane_s16(__rev2_586, __p3_586)); \ |
| 55136 | __ret_586 = __builtin_shufflevector(__ret_586, __ret_586, 3, 2, 1, 0); \ |
| 55137 | __ret_586; \ |
| 53782 | 55138 | }) |
| 53783 | 55139 | #endif |
| 53784 | 55140 | |
| 53785 | 55141 | #ifdef __LITTLE_ENDIAN__ |
| 53786 | | #define vmlsl_high_laneq_u32(__p0_495, __p1_495, __p2_495, __p3_495) __extension__ ({ \ |
| 53787 | | uint64x2_t __s0_495 = __p0_495; \ |
| 53788 | | uint32x4_t __s1_495 = __p1_495; \ |
| 53789 | | uint32x4_t __s2_495 = __p2_495; \ |
| 53790 | | uint64x2_t __ret_495; \ |
| 53791 | | __ret_495 = __s0_495 - vmull_u32(vget_high_u32(__s1_495), splat_laneq_u32(__s2_495, __p3_495)); \ |
| 53792 | | __ret_495; \ |
| 55142 | #define vmlsl_high_laneq_u32(__p0_587, __p1_587, __p2_587, __p3_587) __extension__ ({ \ |
| 55143 | uint64x2_t __s0_587 = __p0_587; \ |
| 55144 | uint32x4_t __s1_587 = __p1_587; \ |
| 55145 | uint32x4_t __s2_587 = __p2_587; \ |
| 55146 | uint64x2_t __ret_587; \ |
| 55147 | __ret_587 = __s0_587 - vmull_u32(vget_high_u32(__s1_587), splat_laneq_u32(__s2_587, __p3_587)); \ |
| 55148 | __ret_587; \ |
| 53793 | 55149 | }) |
| 53794 | 55150 | #else |
| 53795 | | #define vmlsl_high_laneq_u32(__p0_496, __p1_496, __p2_496, __p3_496) __extension__ ({ \ |
| 53796 | | uint64x2_t __s0_496 = __p0_496; \ |
| 53797 | | uint32x4_t __s1_496 = __p1_496; \ |
| 53798 | | uint32x4_t __s2_496 = __p2_496; \ |
| 53799 | | uint64x2_t __rev0_496; __rev0_496 = __builtin_shufflevector(__s0_496, __s0_496, 1, 0); \ |
| 53800 | | uint32x4_t __rev1_496; __rev1_496 = __builtin_shufflevector(__s1_496, __s1_496, 3, 2, 1, 0); \ |
| 53801 | | uint32x4_t __rev2_496; __rev2_496 = __builtin_shufflevector(__s2_496, __s2_496, 3, 2, 1, 0); \ |
| 53802 | | uint64x2_t __ret_496; \ |
| 53803 | | __ret_496 = __rev0_496 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_496), __noswap_splat_laneq_u32(__rev2_496, __p3_496)); \ |
| 53804 | | __ret_496 = __builtin_shufflevector(__ret_496, __ret_496, 1, 0); \ |
| 53805 | | __ret_496; \ |
| 55151 | #define vmlsl_high_laneq_u32(__p0_588, __p1_588, __p2_588, __p3_588) __extension__ ({ \ |
| 55152 | uint64x2_t __s0_588 = __p0_588; \ |
| 55153 | uint32x4_t __s1_588 = __p1_588; \ |
| 55154 | uint32x4_t __s2_588 = __p2_588; \ |
| 55155 | uint64x2_t __rev0_588; __rev0_588 = __builtin_shufflevector(__s0_588, __s0_588, 1, 0); \ |
| 55156 | uint32x4_t __rev1_588; __rev1_588 = __builtin_shufflevector(__s1_588, __s1_588, 3, 2, 1, 0); \ |
| 55157 | uint32x4_t __rev2_588; __rev2_588 = __builtin_shufflevector(__s2_588, __s2_588, 3, 2, 1, 0); \ |
| 55158 | uint64x2_t __ret_588; \ |
| 55159 | __ret_588 = __rev0_588 - __noswap_vmull_u32(__noswap_vget_high_u32(__rev1_588), __noswap_splat_laneq_u32(__rev2_588, __p3_588)); \ |
| 55160 | __ret_588 = __builtin_shufflevector(__ret_588, __ret_588, 1, 0); \ |
| 55161 | __ret_588; \ |
| 53806 | 55162 | }) |
| 53807 | 55163 | #endif |
| 53808 | 55164 | |
| 53809 | 55165 | #ifdef __LITTLE_ENDIAN__ |
| 53810 | | #define vmlsl_high_laneq_u16(__p0_497, __p1_497, __p2_497, __p3_497) __extension__ ({ \ |
| 53811 | | uint32x4_t __s0_497 = __p0_497; \ |
| 53812 | | uint16x8_t __s1_497 = __p1_497; \ |
| 53813 | | uint16x8_t __s2_497 = __p2_497; \ |
| 53814 | | uint32x4_t __ret_497; \ |
| 53815 | | __ret_497 = __s0_497 - vmull_u16(vget_high_u16(__s1_497), splat_laneq_u16(__s2_497, __p3_497)); \ |
| 53816 | | __ret_497; \ |
| 55166 | #define vmlsl_high_laneq_u16(__p0_589, __p1_589, __p2_589, __p3_589) __extension__ ({ \ |
| 55167 | uint32x4_t __s0_589 = __p0_589; \ |
| 55168 | uint16x8_t __s1_589 = __p1_589; \ |
| 55169 | uint16x8_t __s2_589 = __p2_589; \ |
| 55170 | uint32x4_t __ret_589; \ |
| 55171 | __ret_589 = __s0_589 - vmull_u16(vget_high_u16(__s1_589), splat_laneq_u16(__s2_589, __p3_589)); \ |
| 55172 | __ret_589; \ |
| 53817 | 55173 | }) |
| 53818 | 55174 | #else |
| 53819 | | #define vmlsl_high_laneq_u16(__p0_498, __p1_498, __p2_498, __p3_498) __extension__ ({ \ |
| 53820 | | uint32x4_t __s0_498 = __p0_498; \ |
| 53821 | | uint16x8_t __s1_498 = __p1_498; \ |
| 53822 | | uint16x8_t __s2_498 = __p2_498; \ |
| 53823 | | uint32x4_t __rev0_498; __rev0_498 = __builtin_shufflevector(__s0_498, __s0_498, 3, 2, 1, 0); \ |
| 53824 | | uint16x8_t __rev1_498; __rev1_498 = __builtin_shufflevector(__s1_498, __s1_498, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53825 | | uint16x8_t __rev2_498; __rev2_498 = __builtin_shufflevector(__s2_498, __s2_498, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53826 | | uint32x4_t __ret_498; \ |
| 53827 | | __ret_498 = __rev0_498 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_498), __noswap_splat_laneq_u16(__rev2_498, __p3_498)); \ |
| 53828 | | __ret_498 = __builtin_shufflevector(__ret_498, __ret_498, 3, 2, 1, 0); \ |
| 53829 | | __ret_498; \ |
| 55175 | #define vmlsl_high_laneq_u16(__p0_590, __p1_590, __p2_590, __p3_590) __extension__ ({ \ |
| 55176 | uint32x4_t __s0_590 = __p0_590; \ |
| 55177 | uint16x8_t __s1_590 = __p1_590; \ |
| 55178 | uint16x8_t __s2_590 = __p2_590; \ |
| 55179 | uint32x4_t __rev0_590; __rev0_590 = __builtin_shufflevector(__s0_590, __s0_590, 3, 2, 1, 0); \ |
| 55180 | uint16x8_t __rev1_590; __rev1_590 = __builtin_shufflevector(__s1_590, __s1_590, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55181 | uint16x8_t __rev2_590; __rev2_590 = __builtin_shufflevector(__s2_590, __s2_590, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55182 | uint32x4_t __ret_590; \ |
| 55183 | __ret_590 = __rev0_590 - __noswap_vmull_u16(__noswap_vget_high_u16(__rev1_590), __noswap_splat_laneq_u16(__rev2_590, __p3_590)); \ |
| 55184 | __ret_590 = __builtin_shufflevector(__ret_590, __ret_590, 3, 2, 1, 0); \ |
| 55185 | __ret_590; \ |
| 53830 | 55186 | }) |
| 53831 | 55187 | #endif |
| 53832 | 55188 | |
| 53833 | 55189 | #ifdef __LITTLE_ENDIAN__ |
| 53834 | | #define vmlsl_high_laneq_s32(__p0_499, __p1_499, __p2_499, __p3_499) __extension__ ({ \ |
| 53835 | | int64x2_t __s0_499 = __p0_499; \ |
| 53836 | | int32x4_t __s1_499 = __p1_499; \ |
| 53837 | | int32x4_t __s2_499 = __p2_499; \ |
| 53838 | | int64x2_t __ret_499; \ |
| 53839 | | __ret_499 = __s0_499 - vmull_s32(vget_high_s32(__s1_499), splat_laneq_s32(__s2_499, __p3_499)); \ |
| 53840 | | __ret_499; \ |
| 55190 | #define vmlsl_high_laneq_s32(__p0_591, __p1_591, __p2_591, __p3_591) __extension__ ({ \ |
| 55191 | int64x2_t __s0_591 = __p0_591; \ |
| 55192 | int32x4_t __s1_591 = __p1_591; \ |
| 55193 | int32x4_t __s2_591 = __p2_591; \ |
| 55194 | int64x2_t __ret_591; \ |
| 55195 | __ret_591 = __s0_591 - vmull_s32(vget_high_s32(__s1_591), splat_laneq_s32(__s2_591, __p3_591)); \ |
| 55196 | __ret_591; \ |
| 53841 | 55197 | }) |
| 53842 | 55198 | #else |
| 53843 | | #define vmlsl_high_laneq_s32(__p0_500, __p1_500, __p2_500, __p3_500) __extension__ ({ \ |
| 53844 | | int64x2_t __s0_500 = __p0_500; \ |
| 53845 | | int32x4_t __s1_500 = __p1_500; \ |
| 53846 | | int32x4_t __s2_500 = __p2_500; \ |
| 53847 | | int64x2_t __rev0_500; __rev0_500 = __builtin_shufflevector(__s0_500, __s0_500, 1, 0); \ |
| 53848 | | int32x4_t __rev1_500; __rev1_500 = __builtin_shufflevector(__s1_500, __s1_500, 3, 2, 1, 0); \ |
| 53849 | | int32x4_t __rev2_500; __rev2_500 = __builtin_shufflevector(__s2_500, __s2_500, 3, 2, 1, 0); \ |
| 53850 | | int64x2_t __ret_500; \ |
| 53851 | | __ret_500 = __rev0_500 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_500), __noswap_splat_laneq_s32(__rev2_500, __p3_500)); \ |
| 53852 | | __ret_500 = __builtin_shufflevector(__ret_500, __ret_500, 1, 0); \ |
| 53853 | | __ret_500; \ |
| 55199 | #define vmlsl_high_laneq_s32(__p0_592, __p1_592, __p2_592, __p3_592) __extension__ ({ \ |
| 55200 | int64x2_t __s0_592 = __p0_592; \ |
| 55201 | int32x4_t __s1_592 = __p1_592; \ |
| 55202 | int32x4_t __s2_592 = __p2_592; \ |
| 55203 | int64x2_t __rev0_592; __rev0_592 = __builtin_shufflevector(__s0_592, __s0_592, 1, 0); \ |
| 55204 | int32x4_t __rev1_592; __rev1_592 = __builtin_shufflevector(__s1_592, __s1_592, 3, 2, 1, 0); \ |
| 55205 | int32x4_t __rev2_592; __rev2_592 = __builtin_shufflevector(__s2_592, __s2_592, 3, 2, 1, 0); \ |
| 55206 | int64x2_t __ret_592; \ |
| 55207 | __ret_592 = __rev0_592 - __noswap_vmull_s32(__noswap_vget_high_s32(__rev1_592), __noswap_splat_laneq_s32(__rev2_592, __p3_592)); \ |
| 55208 | __ret_592 = __builtin_shufflevector(__ret_592, __ret_592, 1, 0); \ |
| 55209 | __ret_592; \ |
| 53854 | 55210 | }) |
| 53855 | 55211 | #endif |
| 53856 | 55212 | |
| 53857 | 55213 | #ifdef __LITTLE_ENDIAN__ |
| 53858 | | #define vmlsl_high_laneq_s16(__p0_501, __p1_501, __p2_501, __p3_501) __extension__ ({ \ |
| 53859 | | int32x4_t __s0_501 = __p0_501; \ |
| 53860 | | int16x8_t __s1_501 = __p1_501; \ |
| 53861 | | int16x8_t __s2_501 = __p2_501; \ |
| 53862 | | int32x4_t __ret_501; \ |
| 53863 | | __ret_501 = __s0_501 - vmull_s16(vget_high_s16(__s1_501), splat_laneq_s16(__s2_501, __p3_501)); \ |
| 53864 | | __ret_501; \ |
| 55214 | #define vmlsl_high_laneq_s16(__p0_593, __p1_593, __p2_593, __p3_593) __extension__ ({ \ |
| 55215 | int32x4_t __s0_593 = __p0_593; \ |
| 55216 | int16x8_t __s1_593 = __p1_593; \ |
| 55217 | int16x8_t __s2_593 = __p2_593; \ |
| 55218 | int32x4_t __ret_593; \ |
| 55219 | __ret_593 = __s0_593 - vmull_s16(vget_high_s16(__s1_593), splat_laneq_s16(__s2_593, __p3_593)); \ |
| 55220 | __ret_593; \ |
| 53865 | 55221 | }) |
| 53866 | 55222 | #else |
| 53867 | | #define vmlsl_high_laneq_s16(__p0_502, __p1_502, __p2_502, __p3_502) __extension__ ({ \ |
| 53868 | | int32x4_t __s0_502 = __p0_502; \ |
| 53869 | | int16x8_t __s1_502 = __p1_502; \ |
| 53870 | | int16x8_t __s2_502 = __p2_502; \ |
| 53871 | | int32x4_t __rev0_502; __rev0_502 = __builtin_shufflevector(__s0_502, __s0_502, 3, 2, 1, 0); \ |
| 53872 | | int16x8_t __rev1_502; __rev1_502 = __builtin_shufflevector(__s1_502, __s1_502, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53873 | | int16x8_t __rev2_502; __rev2_502 = __builtin_shufflevector(__s2_502, __s2_502, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53874 | | int32x4_t __ret_502; \ |
| 53875 | | __ret_502 = __rev0_502 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_502), __noswap_splat_laneq_s16(__rev2_502, __p3_502)); \ |
| 53876 | | __ret_502 = __builtin_shufflevector(__ret_502, __ret_502, 3, 2, 1, 0); \ |
| 53877 | | __ret_502; \ |
| 55223 | #define vmlsl_high_laneq_s16(__p0_594, __p1_594, __p2_594, __p3_594) __extension__ ({ \ |
| 55224 | int32x4_t __s0_594 = __p0_594; \ |
| 55225 | int16x8_t __s1_594 = __p1_594; \ |
| 55226 | int16x8_t __s2_594 = __p2_594; \ |
| 55227 | int32x4_t __rev0_594; __rev0_594 = __builtin_shufflevector(__s0_594, __s0_594, 3, 2, 1, 0); \ |
| 55228 | int16x8_t __rev1_594; __rev1_594 = __builtin_shufflevector(__s1_594, __s1_594, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55229 | int16x8_t __rev2_594; __rev2_594 = __builtin_shufflevector(__s2_594, __s2_594, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55230 | int32x4_t __ret_594; \ |
| 55231 | __ret_594 = __rev0_594 - __noswap_vmull_s16(__noswap_vget_high_s16(__rev1_594), __noswap_splat_laneq_s16(__rev2_594, __p3_594)); \ |
| 55232 | __ret_594 = __builtin_shufflevector(__ret_594, __ret_594, 3, 2, 1, 0); \ |
| 55233 | __ret_594; \ |
| 53878 | 55234 | }) |
| 53879 | 55235 | #endif |
| 53880 | 55236 | |
| 53881 | 55237 | #ifdef __LITTLE_ENDIAN__ |
| 53882 | | #define vmlsl_laneq_u32(__p0_503, __p1_503, __p2_503, __p3_503) __extension__ ({ \ |
| 53883 | | uint64x2_t __s0_503 = __p0_503; \ |
| 53884 | | uint32x2_t __s1_503 = __p1_503; \ |
| 53885 | | uint32x4_t __s2_503 = __p2_503; \ |
| 53886 | | uint64x2_t __ret_503; \ |
| 53887 | | __ret_503 = __s0_503 - vmull_u32(__s1_503, splat_laneq_u32(__s2_503, __p3_503)); \ |
| 53888 | | __ret_503; \ |
| 55238 | #define vmlsl_laneq_u32(__p0_595, __p1_595, __p2_595, __p3_595) __extension__ ({ \ |
| 55239 | uint64x2_t __s0_595 = __p0_595; \ |
| 55240 | uint32x2_t __s1_595 = __p1_595; \ |
| 55241 | uint32x4_t __s2_595 = __p2_595; \ |
| 55242 | uint64x2_t __ret_595; \ |
| 55243 | __ret_595 = __s0_595 - vmull_u32(__s1_595, splat_laneq_u32(__s2_595, __p3_595)); \ |
| 55244 | __ret_595; \ |
| 53889 | 55245 | }) |
| 53890 | 55246 | #else |
| 53891 | | #define vmlsl_laneq_u32(__p0_504, __p1_504, __p2_504, __p3_504) __extension__ ({ \ |
| 53892 | | uint64x2_t __s0_504 = __p0_504; \ |
| 53893 | | uint32x2_t __s1_504 = __p1_504; \ |
| 53894 | | uint32x4_t __s2_504 = __p2_504; \ |
| 53895 | | uint64x2_t __rev0_504; __rev0_504 = __builtin_shufflevector(__s0_504, __s0_504, 1, 0); \ |
| 53896 | | uint32x2_t __rev1_504; __rev1_504 = __builtin_shufflevector(__s1_504, __s1_504, 1, 0); \ |
| 53897 | | uint32x4_t __rev2_504; __rev2_504 = __builtin_shufflevector(__s2_504, __s2_504, 3, 2, 1, 0); \ |
| 53898 | | uint64x2_t __ret_504; \ |
| 53899 | | __ret_504 = __rev0_504 - __noswap_vmull_u32(__rev1_504, __noswap_splat_laneq_u32(__rev2_504, __p3_504)); \ |
| 53900 | | __ret_504 = __builtin_shufflevector(__ret_504, __ret_504, 1, 0); \ |
| 53901 | | __ret_504; \ |
| 55247 | #define vmlsl_laneq_u32(__p0_596, __p1_596, __p2_596, __p3_596) __extension__ ({ \ |
| 55248 | uint64x2_t __s0_596 = __p0_596; \ |
| 55249 | uint32x2_t __s1_596 = __p1_596; \ |
| 55250 | uint32x4_t __s2_596 = __p2_596; \ |
| 55251 | uint64x2_t __rev0_596; __rev0_596 = __builtin_shufflevector(__s0_596, __s0_596, 1, 0); \ |
| 55252 | uint32x2_t __rev1_596; __rev1_596 = __builtin_shufflevector(__s1_596, __s1_596, 1, 0); \ |
| 55253 | uint32x4_t __rev2_596; __rev2_596 = __builtin_shufflevector(__s2_596, __s2_596, 3, 2, 1, 0); \ |
| 55254 | uint64x2_t __ret_596; \ |
| 55255 | __ret_596 = __rev0_596 - __noswap_vmull_u32(__rev1_596, __noswap_splat_laneq_u32(__rev2_596, __p3_596)); \ |
| 55256 | __ret_596 = __builtin_shufflevector(__ret_596, __ret_596, 1, 0); \ |
| 55257 | __ret_596; \ |
| 53902 | 55258 | }) |
| 53903 | 55259 | #endif |
| 53904 | 55260 | |
| 53905 | 55261 | #ifdef __LITTLE_ENDIAN__ |
| 53906 | | #define vmlsl_laneq_u16(__p0_505, __p1_505, __p2_505, __p3_505) __extension__ ({ \ |
| 53907 | | uint32x4_t __s0_505 = __p0_505; \ |
| 53908 | | uint16x4_t __s1_505 = __p1_505; \ |
| 53909 | | uint16x8_t __s2_505 = __p2_505; \ |
| 53910 | | uint32x4_t __ret_505; \ |
| 53911 | | __ret_505 = __s0_505 - vmull_u16(__s1_505, splat_laneq_u16(__s2_505, __p3_505)); \ |
| 53912 | | __ret_505; \ |
| 55262 | #define vmlsl_laneq_u16(__p0_597, __p1_597, __p2_597, __p3_597) __extension__ ({ \ |
| 55263 | uint32x4_t __s0_597 = __p0_597; \ |
| 55264 | uint16x4_t __s1_597 = __p1_597; \ |
| 55265 | uint16x8_t __s2_597 = __p2_597; \ |
| 55266 | uint32x4_t __ret_597; \ |
| 55267 | __ret_597 = __s0_597 - vmull_u16(__s1_597, splat_laneq_u16(__s2_597, __p3_597)); \ |
| 55268 | __ret_597; \ |
| 53913 | 55269 | }) |
| 53914 | 55270 | #else |
| 53915 | | #define vmlsl_laneq_u16(__p0_506, __p1_506, __p2_506, __p3_506) __extension__ ({ \ |
| 53916 | | uint32x4_t __s0_506 = __p0_506; \ |
| 53917 | | uint16x4_t __s1_506 = __p1_506; \ |
| 53918 | | uint16x8_t __s2_506 = __p2_506; \ |
| 53919 | | uint32x4_t __rev0_506; __rev0_506 = __builtin_shufflevector(__s0_506, __s0_506, 3, 2, 1, 0); \ |
| 53920 | | uint16x4_t __rev1_506; __rev1_506 = __builtin_shufflevector(__s1_506, __s1_506, 3, 2, 1, 0); \ |
| 53921 | | uint16x8_t __rev2_506; __rev2_506 = __builtin_shufflevector(__s2_506, __s2_506, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53922 | | uint32x4_t __ret_506; \ |
| 53923 | | __ret_506 = __rev0_506 - __noswap_vmull_u16(__rev1_506, __noswap_splat_laneq_u16(__rev2_506, __p3_506)); \ |
| 53924 | | __ret_506 = __builtin_shufflevector(__ret_506, __ret_506, 3, 2, 1, 0); \ |
| 53925 | | __ret_506; \ |
| 55271 | #define vmlsl_laneq_u16(__p0_598, __p1_598, __p2_598, __p3_598) __extension__ ({ \ |
| 55272 | uint32x4_t __s0_598 = __p0_598; \ |
| 55273 | uint16x4_t __s1_598 = __p1_598; \ |
| 55274 | uint16x8_t __s2_598 = __p2_598; \ |
| 55275 | uint32x4_t __rev0_598; __rev0_598 = __builtin_shufflevector(__s0_598, __s0_598, 3, 2, 1, 0); \ |
| 55276 | uint16x4_t __rev1_598; __rev1_598 = __builtin_shufflevector(__s1_598, __s1_598, 3, 2, 1, 0); \ |
| 55277 | uint16x8_t __rev2_598; __rev2_598 = __builtin_shufflevector(__s2_598, __s2_598, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55278 | uint32x4_t __ret_598; \ |
| 55279 | __ret_598 = __rev0_598 - __noswap_vmull_u16(__rev1_598, __noswap_splat_laneq_u16(__rev2_598, __p3_598)); \ |
| 55280 | __ret_598 = __builtin_shufflevector(__ret_598, __ret_598, 3, 2, 1, 0); \ |
| 55281 | __ret_598; \ |
| 53926 | 55282 | }) |
| 53927 | 55283 | #endif |
| 53928 | 55284 | |
| 53929 | 55285 | #ifdef __LITTLE_ENDIAN__ |
| 53930 | | #define vmlsl_laneq_s32(__p0_507, __p1_507, __p2_507, __p3_507) __extension__ ({ \ |
| 53931 | | int64x2_t __s0_507 = __p0_507; \ |
| 53932 | | int32x2_t __s1_507 = __p1_507; \ |
| 53933 | | int32x4_t __s2_507 = __p2_507; \ |
| 53934 | | int64x2_t __ret_507; \ |
| 53935 | | __ret_507 = __s0_507 - vmull_s32(__s1_507, splat_laneq_s32(__s2_507, __p3_507)); \ |
| 53936 | | __ret_507; \ |
| 55286 | #define vmlsl_laneq_s32(__p0_599, __p1_599, __p2_599, __p3_599) __extension__ ({ \ |
| 55287 | int64x2_t __s0_599 = __p0_599; \ |
| 55288 | int32x2_t __s1_599 = __p1_599; \ |
| 55289 | int32x4_t __s2_599 = __p2_599; \ |
| 55290 | int64x2_t __ret_599; \ |
| 55291 | __ret_599 = __s0_599 - vmull_s32(__s1_599, splat_laneq_s32(__s2_599, __p3_599)); \ |
| 55292 | __ret_599; \ |
| 53937 | 55293 | }) |
| 53938 | 55294 | #else |
| 53939 | | #define vmlsl_laneq_s32(__p0_508, __p1_508, __p2_508, __p3_508) __extension__ ({ \ |
| 53940 | | int64x2_t __s0_508 = __p0_508; \ |
| 53941 | | int32x2_t __s1_508 = __p1_508; \ |
| 53942 | | int32x4_t __s2_508 = __p2_508; \ |
| 53943 | | int64x2_t __rev0_508; __rev0_508 = __builtin_shufflevector(__s0_508, __s0_508, 1, 0); \ |
| 53944 | | int32x2_t __rev1_508; __rev1_508 = __builtin_shufflevector(__s1_508, __s1_508, 1, 0); \ |
| 53945 | | int32x4_t __rev2_508; __rev2_508 = __builtin_shufflevector(__s2_508, __s2_508, 3, 2, 1, 0); \ |
| 53946 | | int64x2_t __ret_508; \ |
| 53947 | | __ret_508 = __rev0_508 - __noswap_vmull_s32(__rev1_508, __noswap_splat_laneq_s32(__rev2_508, __p3_508)); \ |
| 53948 | | __ret_508 = __builtin_shufflevector(__ret_508, __ret_508, 1, 0); \ |
| 53949 | | __ret_508; \ |
| 55295 | #define vmlsl_laneq_s32(__p0_600, __p1_600, __p2_600, __p3_600) __extension__ ({ \ |
| 55296 | int64x2_t __s0_600 = __p0_600; \ |
| 55297 | int32x2_t __s1_600 = __p1_600; \ |
| 55298 | int32x4_t __s2_600 = __p2_600; \ |
| 55299 | int64x2_t __rev0_600; __rev0_600 = __builtin_shufflevector(__s0_600, __s0_600, 1, 0); \ |
| 55300 | int32x2_t __rev1_600; __rev1_600 = __builtin_shufflevector(__s1_600, __s1_600, 1, 0); \ |
| 55301 | int32x4_t __rev2_600; __rev2_600 = __builtin_shufflevector(__s2_600, __s2_600, 3, 2, 1, 0); \ |
| 55302 | int64x2_t __ret_600; \ |
| 55303 | __ret_600 = __rev0_600 - __noswap_vmull_s32(__rev1_600, __noswap_splat_laneq_s32(__rev2_600, __p3_600)); \ |
| 55304 | __ret_600 = __builtin_shufflevector(__ret_600, __ret_600, 1, 0); \ |
| 55305 | __ret_600; \ |
| 53950 | 55306 | }) |
| 53951 | 55307 | #endif |
| 53952 | 55308 | |
| 53953 | 55309 | #ifdef __LITTLE_ENDIAN__ |
| 53954 | | #define vmlsl_laneq_s16(__p0_509, __p1_509, __p2_509, __p3_509) __extension__ ({ \ |
| 53955 | | int32x4_t __s0_509 = __p0_509; \ |
| 53956 | | int16x4_t __s1_509 = __p1_509; \ |
| 53957 | | int16x8_t __s2_509 = __p2_509; \ |
| 53958 | | int32x4_t __ret_509; \ |
| 53959 | | __ret_509 = __s0_509 - vmull_s16(__s1_509, splat_laneq_s16(__s2_509, __p3_509)); \ |
| 53960 | | __ret_509; \ |
| 55310 | #define vmlsl_laneq_s16(__p0_601, __p1_601, __p2_601, __p3_601) __extension__ ({ \ |
| 55311 | int32x4_t __s0_601 = __p0_601; \ |
| 55312 | int16x4_t __s1_601 = __p1_601; \ |
| 55313 | int16x8_t __s2_601 = __p2_601; \ |
| 55314 | int32x4_t __ret_601; \ |
| 55315 | __ret_601 = __s0_601 - vmull_s16(__s1_601, splat_laneq_s16(__s2_601, __p3_601)); \ |
| 55316 | __ret_601; \ |
| 53961 | 55317 | }) |
| 53962 | 55318 | #else |
| 53963 | | #define vmlsl_laneq_s16(__p0_510, __p1_510, __p2_510, __p3_510) __extension__ ({ \ |
| 53964 | | int32x4_t __s0_510 = __p0_510; \ |
| 53965 | | int16x4_t __s1_510 = __p1_510; \ |
| 53966 | | int16x8_t __s2_510 = __p2_510; \ |
| 53967 | | int32x4_t __rev0_510; __rev0_510 = __builtin_shufflevector(__s0_510, __s0_510, 3, 2, 1, 0); \ |
| 53968 | | int16x4_t __rev1_510; __rev1_510 = __builtin_shufflevector(__s1_510, __s1_510, 3, 2, 1, 0); \ |
| 53969 | | int16x8_t __rev2_510; __rev2_510 = __builtin_shufflevector(__s2_510, __s2_510, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 53970 | | int32x4_t __ret_510; \ |
| 53971 | | __ret_510 = __rev0_510 - __noswap_vmull_s16(__rev1_510, __noswap_splat_laneq_s16(__rev2_510, __p3_510)); \ |
| 53972 | | __ret_510 = __builtin_shufflevector(__ret_510, __ret_510, 3, 2, 1, 0); \ |
| 53973 | | __ret_510; \ |
| 55319 | #define vmlsl_laneq_s16(__p0_602, __p1_602, __p2_602, __p3_602) __extension__ ({ \ |
| 55320 | int32x4_t __s0_602 = __p0_602; \ |
| 55321 | int16x4_t __s1_602 = __p1_602; \ |
| 55322 | int16x8_t __s2_602 = __p2_602; \ |
| 55323 | int32x4_t __rev0_602; __rev0_602 = __builtin_shufflevector(__s0_602, __s0_602, 3, 2, 1, 0); \ |
| 55324 | int16x4_t __rev1_602; __rev1_602 = __builtin_shufflevector(__s1_602, __s1_602, 3, 2, 1, 0); \ |
| 55325 | int16x8_t __rev2_602; __rev2_602 = __builtin_shufflevector(__s2_602, __s2_602, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55326 | int32x4_t __ret_602; \ |
| 55327 | __ret_602 = __rev0_602 - __noswap_vmull_s16(__rev1_602, __noswap_splat_laneq_s16(__rev2_602, __p3_602)); \ |
| 55328 | __ret_602 = __builtin_shufflevector(__ret_602, __ret_602, 3, 2, 1, 0); \ |
| 55329 | __ret_602; \ |
| 53974 | 55330 | }) |
| 53975 | 55331 | #endif |
| 53976 | 55332 | |
| ... | ... | @@ -54015,146 +55371,146 @@ __ai float64x1_t vmov_n_f64(float64_t __p0) { |
| 54015 | 55371 | return __ret; |
| 54016 | 55372 | } |
| 54017 | 55373 | #ifdef __LITTLE_ENDIAN__ |
| 54018 | | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_511) { |
| 54019 | | uint16x8_t __ret_511; |
| 54020 | | uint8x8_t __a1_511 = vget_high_u8(__p0_511); |
| 54021 | | __ret_511 = (uint16x8_t)(vshll_n_u8(__a1_511, 0)); |
| 54022 | | return __ret_511; |
| 55374 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_603) { |
| 55375 | uint16x8_t __ret_603; |
| 55376 | uint8x8_t __a1_603 = vget_high_u8(__p0_603); |
| 55377 | __ret_603 = (uint16x8_t)(vshll_n_u8(__a1_603, 0)); |
| 55378 | return __ret_603; |
| 54023 | 55379 | } |
| 54024 | 55380 | #else |
| 54025 | | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_512) { |
| 54026 | | uint8x16_t __rev0_512; __rev0_512 = __builtin_shufflevector(__p0_512, __p0_512, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54027 | | uint16x8_t __ret_512; |
| 54028 | | uint8x8_t __a1_512 = __noswap_vget_high_u8(__rev0_512); |
| 54029 | | __ret_512 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_512, 0)); |
| 54030 | | __ret_512 = __builtin_shufflevector(__ret_512, __ret_512, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54031 | | return __ret_512; |
| 55381 | __ai uint16x8_t vmovl_high_u8(uint8x16_t __p0_604) { |
| 55382 | uint8x16_t __rev0_604; __rev0_604 = __builtin_shufflevector(__p0_604, __p0_604, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55383 | uint16x8_t __ret_604; |
| 55384 | uint8x8_t __a1_604 = __noswap_vget_high_u8(__rev0_604); |
| 55385 | __ret_604 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_604, 0)); |
| 55386 | __ret_604 = __builtin_shufflevector(__ret_604, __ret_604, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55387 | return __ret_604; |
| 54032 | 55388 | } |
| 54033 | | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_513) { |
| 54034 | | uint16x8_t __ret_513; |
| 54035 | | uint8x8_t __a1_513 = __noswap_vget_high_u8(__p0_513); |
| 54036 | | __ret_513 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_513, 0)); |
| 54037 | | return __ret_513; |
| 55389 | __ai uint16x8_t __noswap_vmovl_high_u8(uint8x16_t __p0_605) { |
| 55390 | uint16x8_t __ret_605; |
| 55391 | uint8x8_t __a1_605 = __noswap_vget_high_u8(__p0_605); |
| 55392 | __ret_605 = (uint16x8_t)(__noswap_vshll_n_u8(__a1_605, 0)); |
| 55393 | return __ret_605; |
| 54038 | 55394 | } |
| 54039 | 55395 | #endif |
| 54040 | 55396 | |
| 54041 | 55397 | #ifdef __LITTLE_ENDIAN__ |
| 54042 | | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_514) { |
| 54043 | | uint64x2_t __ret_514; |
| 54044 | | uint32x2_t __a1_514 = vget_high_u32(__p0_514); |
| 54045 | | __ret_514 = (uint64x2_t)(vshll_n_u32(__a1_514, 0)); |
| 54046 | | return __ret_514; |
| 55398 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_606) { |
| 55399 | uint64x2_t __ret_606; |
| 55400 | uint32x2_t __a1_606 = vget_high_u32(__p0_606); |
| 55401 | __ret_606 = (uint64x2_t)(vshll_n_u32(__a1_606, 0)); |
| 55402 | return __ret_606; |
| 54047 | 55403 | } |
| 54048 | 55404 | #else |
| 54049 | | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_515) { |
| 54050 | | uint32x4_t __rev0_515; __rev0_515 = __builtin_shufflevector(__p0_515, __p0_515, 3, 2, 1, 0); |
| 54051 | | uint64x2_t __ret_515; |
| 54052 | | uint32x2_t __a1_515 = __noswap_vget_high_u32(__rev0_515); |
| 54053 | | __ret_515 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_515, 0)); |
| 54054 | | __ret_515 = __builtin_shufflevector(__ret_515, __ret_515, 1, 0); |
| 54055 | | return __ret_515; |
| 55405 | __ai uint64x2_t vmovl_high_u32(uint32x4_t __p0_607) { |
| 55406 | uint32x4_t __rev0_607; __rev0_607 = __builtin_shufflevector(__p0_607, __p0_607, 3, 2, 1, 0); |
| 55407 | uint64x2_t __ret_607; |
| 55408 | uint32x2_t __a1_607 = __noswap_vget_high_u32(__rev0_607); |
| 55409 | __ret_607 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_607, 0)); |
| 55410 | __ret_607 = __builtin_shufflevector(__ret_607, __ret_607, 1, 0); |
| 55411 | return __ret_607; |
| 54056 | 55412 | } |
| 54057 | | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_516) { |
| 54058 | | uint64x2_t __ret_516; |
| 54059 | | uint32x2_t __a1_516 = __noswap_vget_high_u32(__p0_516); |
| 54060 | | __ret_516 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_516, 0)); |
| 54061 | | return __ret_516; |
| 55413 | __ai uint64x2_t __noswap_vmovl_high_u32(uint32x4_t __p0_608) { |
| 55414 | uint64x2_t __ret_608; |
| 55415 | uint32x2_t __a1_608 = __noswap_vget_high_u32(__p0_608); |
| 55416 | __ret_608 = (uint64x2_t)(__noswap_vshll_n_u32(__a1_608, 0)); |
| 55417 | return __ret_608; |
| 54062 | 55418 | } |
| 54063 | 55419 | #endif |
| 54064 | 55420 | |
| 54065 | 55421 | #ifdef __LITTLE_ENDIAN__ |
| 54066 | | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_517) { |
| 54067 | | uint32x4_t __ret_517; |
| 54068 | | uint16x4_t __a1_517 = vget_high_u16(__p0_517); |
| 54069 | | __ret_517 = (uint32x4_t)(vshll_n_u16(__a1_517, 0)); |
| 54070 | | return __ret_517; |
| 55422 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_609) { |
| 55423 | uint32x4_t __ret_609; |
| 55424 | uint16x4_t __a1_609 = vget_high_u16(__p0_609); |
| 55425 | __ret_609 = (uint32x4_t)(vshll_n_u16(__a1_609, 0)); |
| 55426 | return __ret_609; |
| 54071 | 55427 | } |
| 54072 | 55428 | #else |
| 54073 | | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_518) { |
| 54074 | | uint16x8_t __rev0_518; __rev0_518 = __builtin_shufflevector(__p0_518, __p0_518, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54075 | | uint32x4_t __ret_518; |
| 54076 | | uint16x4_t __a1_518 = __noswap_vget_high_u16(__rev0_518); |
| 54077 | | __ret_518 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_518, 0)); |
| 54078 | | __ret_518 = __builtin_shufflevector(__ret_518, __ret_518, 3, 2, 1, 0); |
| 54079 | | return __ret_518; |
| 55429 | __ai uint32x4_t vmovl_high_u16(uint16x8_t __p0_610) { |
| 55430 | uint16x8_t __rev0_610; __rev0_610 = __builtin_shufflevector(__p0_610, __p0_610, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55431 | uint32x4_t __ret_610; |
| 55432 | uint16x4_t __a1_610 = __noswap_vget_high_u16(__rev0_610); |
| 55433 | __ret_610 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_610, 0)); |
| 55434 | __ret_610 = __builtin_shufflevector(__ret_610, __ret_610, 3, 2, 1, 0); |
| 55435 | return __ret_610; |
| 54080 | 55436 | } |
| 54081 | | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_519) { |
| 54082 | | uint32x4_t __ret_519; |
| 54083 | | uint16x4_t __a1_519 = __noswap_vget_high_u16(__p0_519); |
| 54084 | | __ret_519 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_519, 0)); |
| 54085 | | return __ret_519; |
| 55437 | __ai uint32x4_t __noswap_vmovl_high_u16(uint16x8_t __p0_611) { |
| 55438 | uint32x4_t __ret_611; |
| 55439 | uint16x4_t __a1_611 = __noswap_vget_high_u16(__p0_611); |
| 55440 | __ret_611 = (uint32x4_t)(__noswap_vshll_n_u16(__a1_611, 0)); |
| 55441 | return __ret_611; |
| 54086 | 55442 | } |
| 54087 | 55443 | #endif |
| 54088 | 55444 | |
| 54089 | 55445 | #ifdef __LITTLE_ENDIAN__ |
| 54090 | | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_520) { |
| 54091 | | int16x8_t __ret_520; |
| 54092 | | int8x8_t __a1_520 = vget_high_s8(__p0_520); |
| 54093 | | __ret_520 = (int16x8_t)(vshll_n_s8(__a1_520, 0)); |
| 54094 | | return __ret_520; |
| 55446 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_612) { |
| 55447 | int16x8_t __ret_612; |
| 55448 | int8x8_t __a1_612 = vget_high_s8(__p0_612); |
| 55449 | __ret_612 = (int16x8_t)(vshll_n_s8(__a1_612, 0)); |
| 55450 | return __ret_612; |
| 54095 | 55451 | } |
| 54096 | 55452 | #else |
| 54097 | | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_521) { |
| 54098 | | int8x16_t __rev0_521; __rev0_521 = __builtin_shufflevector(__p0_521, __p0_521, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54099 | | int16x8_t __ret_521; |
| 54100 | | int8x8_t __a1_521 = __noswap_vget_high_s8(__rev0_521); |
| 54101 | | __ret_521 = (int16x8_t)(__noswap_vshll_n_s8(__a1_521, 0)); |
| 54102 | | __ret_521 = __builtin_shufflevector(__ret_521, __ret_521, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54103 | | return __ret_521; |
| 55453 | __ai int16x8_t vmovl_high_s8(int8x16_t __p0_613) { |
| 55454 | int8x16_t __rev0_613; __rev0_613 = __builtin_shufflevector(__p0_613, __p0_613, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55455 | int16x8_t __ret_613; |
| 55456 | int8x8_t __a1_613 = __noswap_vget_high_s8(__rev0_613); |
| 55457 | __ret_613 = (int16x8_t)(__noswap_vshll_n_s8(__a1_613, 0)); |
| 55458 | __ret_613 = __builtin_shufflevector(__ret_613, __ret_613, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55459 | return __ret_613; |
| 54104 | 55460 | } |
| 54105 | | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_522) { |
| 54106 | | int16x8_t __ret_522; |
| 54107 | | int8x8_t __a1_522 = __noswap_vget_high_s8(__p0_522); |
| 54108 | | __ret_522 = (int16x8_t)(__noswap_vshll_n_s8(__a1_522, 0)); |
| 54109 | | return __ret_522; |
| 55461 | __ai int16x8_t __noswap_vmovl_high_s8(int8x16_t __p0_614) { |
| 55462 | int16x8_t __ret_614; |
| 55463 | int8x8_t __a1_614 = __noswap_vget_high_s8(__p0_614); |
| 55464 | __ret_614 = (int16x8_t)(__noswap_vshll_n_s8(__a1_614, 0)); |
| 55465 | return __ret_614; |
| 54110 | 55466 | } |
| 54111 | 55467 | #endif |
| 54112 | 55468 | |
| 54113 | 55469 | #ifdef __LITTLE_ENDIAN__ |
| 54114 | | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_523) { |
| 54115 | | int64x2_t __ret_523; |
| 54116 | | int32x2_t __a1_523 = vget_high_s32(__p0_523); |
| 54117 | | __ret_523 = (int64x2_t)(vshll_n_s32(__a1_523, 0)); |
| 54118 | | return __ret_523; |
| 55470 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_615) { |
| 55471 | int64x2_t __ret_615; |
| 55472 | int32x2_t __a1_615 = vget_high_s32(__p0_615); |
| 55473 | __ret_615 = (int64x2_t)(vshll_n_s32(__a1_615, 0)); |
| 55474 | return __ret_615; |
| 54119 | 55475 | } |
| 54120 | 55476 | #else |
| 54121 | | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_524) { |
| 54122 | | int32x4_t __rev0_524; __rev0_524 = __builtin_shufflevector(__p0_524, __p0_524, 3, 2, 1, 0); |
| 54123 | | int64x2_t __ret_524; |
| 54124 | | int32x2_t __a1_524 = __noswap_vget_high_s32(__rev0_524); |
| 54125 | | __ret_524 = (int64x2_t)(__noswap_vshll_n_s32(__a1_524, 0)); |
| 54126 | | __ret_524 = __builtin_shufflevector(__ret_524, __ret_524, 1, 0); |
| 54127 | | return __ret_524; |
| 55477 | __ai int64x2_t vmovl_high_s32(int32x4_t __p0_616) { |
| 55478 | int32x4_t __rev0_616; __rev0_616 = __builtin_shufflevector(__p0_616, __p0_616, 3, 2, 1, 0); |
| 55479 | int64x2_t __ret_616; |
| 55480 | int32x2_t __a1_616 = __noswap_vget_high_s32(__rev0_616); |
| 55481 | __ret_616 = (int64x2_t)(__noswap_vshll_n_s32(__a1_616, 0)); |
| 55482 | __ret_616 = __builtin_shufflevector(__ret_616, __ret_616, 1, 0); |
| 55483 | return __ret_616; |
| 54128 | 55484 | } |
| 54129 | | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_525) { |
| 54130 | | int64x2_t __ret_525; |
| 54131 | | int32x2_t __a1_525 = __noswap_vget_high_s32(__p0_525); |
| 54132 | | __ret_525 = (int64x2_t)(__noswap_vshll_n_s32(__a1_525, 0)); |
| 54133 | | return __ret_525; |
| 55485 | __ai int64x2_t __noswap_vmovl_high_s32(int32x4_t __p0_617) { |
| 55486 | int64x2_t __ret_617; |
| 55487 | int32x2_t __a1_617 = __noswap_vget_high_s32(__p0_617); |
| 55488 | __ret_617 = (int64x2_t)(__noswap_vshll_n_s32(__a1_617, 0)); |
| 55489 | return __ret_617; |
| 54134 | 55490 | } |
| 54135 | 55491 | #endif |
| 54136 | 55492 | |
| 54137 | 55493 | #ifdef __LITTLE_ENDIAN__ |
| 54138 | | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_526) { |
| 54139 | | int32x4_t __ret_526; |
| 54140 | | int16x4_t __a1_526 = vget_high_s16(__p0_526); |
| 54141 | | __ret_526 = (int32x4_t)(vshll_n_s16(__a1_526, 0)); |
| 54142 | | return __ret_526; |
| 55494 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_618) { |
| 55495 | int32x4_t __ret_618; |
| 55496 | int16x4_t __a1_618 = vget_high_s16(__p0_618); |
| 55497 | __ret_618 = (int32x4_t)(vshll_n_s16(__a1_618, 0)); |
| 55498 | return __ret_618; |
| 54143 | 55499 | } |
| 54144 | 55500 | #else |
| 54145 | | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_527) { |
| 54146 | | int16x8_t __rev0_527; __rev0_527 = __builtin_shufflevector(__p0_527, __p0_527, 7, 6, 5, 4, 3, 2, 1, 0); |
| 54147 | | int32x4_t __ret_527; |
| 54148 | | int16x4_t __a1_527 = __noswap_vget_high_s16(__rev0_527); |
| 54149 | | __ret_527 = (int32x4_t)(__noswap_vshll_n_s16(__a1_527, 0)); |
| 54150 | | __ret_527 = __builtin_shufflevector(__ret_527, __ret_527, 3, 2, 1, 0); |
| 54151 | | return __ret_527; |
| 55501 | __ai int32x4_t vmovl_high_s16(int16x8_t __p0_619) { |
| 55502 | int16x8_t __rev0_619; __rev0_619 = __builtin_shufflevector(__p0_619, __p0_619, 7, 6, 5, 4, 3, 2, 1, 0); |
| 55503 | int32x4_t __ret_619; |
| 55504 | int16x4_t __a1_619 = __noswap_vget_high_s16(__rev0_619); |
| 55505 | __ret_619 = (int32x4_t)(__noswap_vshll_n_s16(__a1_619, 0)); |
| 55506 | __ret_619 = __builtin_shufflevector(__ret_619, __ret_619, 3, 2, 1, 0); |
| 55507 | return __ret_619; |
| 54152 | 55508 | } |
| 54153 | | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_528) { |
| 54154 | | int32x4_t __ret_528; |
| 54155 | | int16x4_t __a1_528 = __noswap_vget_high_s16(__p0_528); |
| 54156 | | __ret_528 = (int32x4_t)(__noswap_vshll_n_s16(__a1_528, 0)); |
| 54157 | | return __ret_528; |
| 55509 | __ai int32x4_t __noswap_vmovl_high_s16(int16x8_t __p0_620) { |
| 55510 | int32x4_t __ret_620; |
| 55511 | int16x4_t __a1_620 = __noswap_vget_high_s16(__p0_620); |
| 55512 | __ret_620 = (int32x4_t)(__noswap_vshll_n_s16(__a1_620, 0)); |
| 55513 | return __ret_620; |
| 54158 | 55514 | } |
| 54159 | 55515 | #endif |
| 54160 | 55516 | |
| ... | ... | @@ -54282,29 +55638,29 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 54282 | 55638 | __ret = __p0 * __p1; |
| 54283 | 55639 | return __ret; |
| 54284 | 55640 | } |
| 54285 | | #define vmuld_lane_f64(__p0_529, __p1_529, __p2_529) __extension__ ({ \ |
| 54286 | | float64_t __s0_529 = __p0_529; \ |
| 54287 | | float64x1_t __s1_529 = __p1_529; \ |
| 54288 | | float64_t __ret_529; \ |
| 54289 | | __ret_529 = __s0_529 * vget_lane_f64(__s1_529, __p2_529); \ |
| 54290 | | __ret_529; \ |
| 55641 | #define vmuld_lane_f64(__p0_621, __p1_621, __p2_621) __extension__ ({ \ |
| 55642 | float64_t __s0_621 = __p0_621; \ |
| 55643 | float64x1_t __s1_621 = __p1_621; \ |
| 55644 | float64_t __ret_621; \ |
| 55645 | __ret_621 = __s0_621 * vget_lane_f64(__s1_621, __p2_621); \ |
| 55646 | __ret_621; \ |
| 54291 | 55647 | }) |
| 54292 | 55648 | #ifdef __LITTLE_ENDIAN__ |
| 54293 | | #define vmuls_lane_f32(__p0_530, __p1_530, __p2_530) __extension__ ({ \ |
| 54294 | | float32_t __s0_530 = __p0_530; \ |
| 54295 | | float32x2_t __s1_530 = __p1_530; \ |
| 54296 | | float32_t __ret_530; \ |
| 54297 | | __ret_530 = __s0_530 * vget_lane_f32(__s1_530, __p2_530); \ |
| 54298 | | __ret_530; \ |
| 55649 | #define vmuls_lane_f32(__p0_622, __p1_622, __p2_622) __extension__ ({ \ |
| 55650 | float32_t __s0_622 = __p0_622; \ |
| 55651 | float32x2_t __s1_622 = __p1_622; \ |
| 55652 | float32_t __ret_622; \ |
| 55653 | __ret_622 = __s0_622 * vget_lane_f32(__s1_622, __p2_622); \ |
| 55654 | __ret_622; \ |
| 54299 | 55655 | }) |
| 54300 | 55656 | #else |
| 54301 | | #define vmuls_lane_f32(__p0_531, __p1_531, __p2_531) __extension__ ({ \ |
| 54302 | | float32_t __s0_531 = __p0_531; \ |
| 54303 | | float32x2_t __s1_531 = __p1_531; \ |
| 54304 | | float32x2_t __rev1_531; __rev1_531 = __builtin_shufflevector(__s1_531, __s1_531, 1, 0); \ |
| 54305 | | float32_t __ret_531; \ |
| 54306 | | __ret_531 = __s0_531 * __noswap_vget_lane_f32(__rev1_531, __p2_531); \ |
| 54307 | | __ret_531; \ |
| 55657 | #define vmuls_lane_f32(__p0_623, __p1_623, __p2_623) __extension__ ({ \ |
| 55658 | float32_t __s0_623 = __p0_623; \ |
| 55659 | float32x2_t __s1_623 = __p1_623; \ |
| 55660 | float32x2_t __rev1_623; __rev1_623 = __builtin_shufflevector(__s1_623, __s1_623, 1, 0); \ |
| 55661 | float32_t __ret_623; \ |
| 55662 | __ret_623 = __s0_623 * __noswap_vget_lane_f32(__rev1_623, __p2_623); \ |
| 55663 | __ret_623; \ |
| 54308 | 55664 | }) |
| 54309 | 55665 | #endif |
| 54310 | 55666 | |
| ... | ... | @@ -54316,60 +55672,60 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 54316 | 55672 | __ret; \ |
| 54317 | 55673 | }) |
| 54318 | 55674 | #ifdef __LITTLE_ENDIAN__ |
| 54319 | | #define vmulq_lane_f64(__p0_532, __p1_532, __p2_532) __extension__ ({ \ |
| 54320 | | float64x2_t __s0_532 = __p0_532; \ |
| 54321 | | float64x1_t __s1_532 = __p1_532; \ |
| 54322 | | float64x2_t __ret_532; \ |
| 54323 | | __ret_532 = __s0_532 * splatq_lane_f64(__s1_532, __p2_532); \ |
| 54324 | | __ret_532; \ |
| 55675 | #define vmulq_lane_f64(__p0_624, __p1_624, __p2_624) __extension__ ({ \ |
| 55676 | float64x2_t __s0_624 = __p0_624; \ |
| 55677 | float64x1_t __s1_624 = __p1_624; \ |
| 55678 | float64x2_t __ret_624; \ |
| 55679 | __ret_624 = __s0_624 * splatq_lane_f64(__s1_624, __p2_624); \ |
| 55680 | __ret_624; \ |
| 54325 | 55681 | }) |
| 54326 | 55682 | #else |
| 54327 | | #define vmulq_lane_f64(__p0_533, __p1_533, __p2_533) __extension__ ({ \ |
| 54328 | | float64x2_t __s0_533 = __p0_533; \ |
| 54329 | | float64x1_t __s1_533 = __p1_533; \ |
| 54330 | | float64x2_t __rev0_533; __rev0_533 = __builtin_shufflevector(__s0_533, __s0_533, 1, 0); \ |
| 54331 | | float64x2_t __ret_533; \ |
| 54332 | | __ret_533 = __rev0_533 * __noswap_splatq_lane_f64(__s1_533, __p2_533); \ |
| 54333 | | __ret_533 = __builtin_shufflevector(__ret_533, __ret_533, 1, 0); \ |
| 54334 | | __ret_533; \ |
| 55683 | #define vmulq_lane_f64(__p0_625, __p1_625, __p2_625) __extension__ ({ \ |
| 55684 | float64x2_t __s0_625 = __p0_625; \ |
| 55685 | float64x1_t __s1_625 = __p1_625; \ |
| 55686 | float64x2_t __rev0_625; __rev0_625 = __builtin_shufflevector(__s0_625, __s0_625, 1, 0); \ |
| 55687 | float64x2_t __ret_625; \ |
| 55688 | __ret_625 = __rev0_625 * __noswap_splatq_lane_f64(__s1_625, __p2_625); \ |
| 55689 | __ret_625 = __builtin_shufflevector(__ret_625, __ret_625, 1, 0); \ |
| 55690 | __ret_625; \ |
| 54335 | 55691 | }) |
| 54336 | 55692 | #endif |
| 54337 | 55693 | |
| 54338 | 55694 | #ifdef __LITTLE_ENDIAN__ |
| 54339 | | #define vmuld_laneq_f64(__p0_534, __p1_534, __p2_534) __extension__ ({ \ |
| 54340 | | float64_t __s0_534 = __p0_534; \ |
| 54341 | | float64x2_t __s1_534 = __p1_534; \ |
| 54342 | | float64_t __ret_534; \ |
| 54343 | | __ret_534 = __s0_534 * vgetq_lane_f64(__s1_534, __p2_534); \ |
| 54344 | | __ret_534; \ |
| 55695 | #define vmuld_laneq_f64(__p0_626, __p1_626, __p2_626) __extension__ ({ \ |
| 55696 | float64_t __s0_626 = __p0_626; \ |
| 55697 | float64x2_t __s1_626 = __p1_626; \ |
| 55698 | float64_t __ret_626; \ |
| 55699 | __ret_626 = __s0_626 * vgetq_lane_f64(__s1_626, __p2_626); \ |
| 55700 | __ret_626; \ |
| 54345 | 55701 | }) |
| 54346 | 55702 | #else |
| 54347 | | #define vmuld_laneq_f64(__p0_535, __p1_535, __p2_535) __extension__ ({ \ |
| 54348 | | float64_t __s0_535 = __p0_535; \ |
| 54349 | | float64x2_t __s1_535 = __p1_535; \ |
| 54350 | | float64x2_t __rev1_535; __rev1_535 = __builtin_shufflevector(__s1_535, __s1_535, 1, 0); \ |
| 54351 | | float64_t __ret_535; \ |
| 54352 | | __ret_535 = __s0_535 * __noswap_vgetq_lane_f64(__rev1_535, __p2_535); \ |
| 54353 | | __ret_535; \ |
| 55703 | #define vmuld_laneq_f64(__p0_627, __p1_627, __p2_627) __extension__ ({ \ |
| 55704 | float64_t __s0_627 = __p0_627; \ |
| 55705 | float64x2_t __s1_627 = __p1_627; \ |
| 55706 | float64x2_t __rev1_627; __rev1_627 = __builtin_shufflevector(__s1_627, __s1_627, 1, 0); \ |
| 55707 | float64_t __ret_627; \ |
| 55708 | __ret_627 = __s0_627 * __noswap_vgetq_lane_f64(__rev1_627, __p2_627); \ |
| 55709 | __ret_627; \ |
| 54354 | 55710 | }) |
| 54355 | 55711 | #endif |
| 54356 | 55712 | |
| 54357 | 55713 | #ifdef __LITTLE_ENDIAN__ |
| 54358 | | #define vmuls_laneq_f32(__p0_536, __p1_536, __p2_536) __extension__ ({ \ |
| 54359 | | float32_t __s0_536 = __p0_536; \ |
| 54360 | | float32x4_t __s1_536 = __p1_536; \ |
| 54361 | | float32_t __ret_536; \ |
| 54362 | | __ret_536 = __s0_536 * vgetq_lane_f32(__s1_536, __p2_536); \ |
| 54363 | | __ret_536; \ |
| 55714 | #define vmuls_laneq_f32(__p0_628, __p1_628, __p2_628) __extension__ ({ \ |
| 55715 | float32_t __s0_628 = __p0_628; \ |
| 55716 | float32x4_t __s1_628 = __p1_628; \ |
| 55717 | float32_t __ret_628; \ |
| 55718 | __ret_628 = __s0_628 * vgetq_lane_f32(__s1_628, __p2_628); \ |
| 55719 | __ret_628; \ |
| 54364 | 55720 | }) |
| 54365 | 55721 | #else |
| 54366 | | #define vmuls_laneq_f32(__p0_537, __p1_537, __p2_537) __extension__ ({ \ |
| 54367 | | float32_t __s0_537 = __p0_537; \ |
| 54368 | | float32x4_t __s1_537 = __p1_537; \ |
| 54369 | | float32x4_t __rev1_537; __rev1_537 = __builtin_shufflevector(__s1_537, __s1_537, 3, 2, 1, 0); \ |
| 54370 | | float32_t __ret_537; \ |
| 54371 | | __ret_537 = __s0_537 * __noswap_vgetq_lane_f32(__rev1_537, __p2_537); \ |
| 54372 | | __ret_537; \ |
| 55722 | #define vmuls_laneq_f32(__p0_629, __p1_629, __p2_629) __extension__ ({ \ |
| 55723 | float32_t __s0_629 = __p0_629; \ |
| 55724 | float32x4_t __s1_629 = __p1_629; \ |
| 55725 | float32x4_t __rev1_629; __rev1_629 = __builtin_shufflevector(__s1_629, __s1_629, 3, 2, 1, 0); \ |
| 55726 | float32_t __ret_629; \ |
| 55727 | __ret_629 = __s0_629 * __noswap_vgetq_lane_f32(__rev1_629, __p2_629); \ |
| 55728 | __ret_629; \ |
| 54373 | 55729 | }) |
| 54374 | 55730 | #endif |
| 54375 | 55731 | |
| ... | ... | @@ -54393,233 +55749,233 @@ __ai float64x1_t vmul_f64(float64x1_t __p0, float64x1_t __p1) { |
| 54393 | 55749 | #endif |
| 54394 | 55750 | |
| 54395 | 55751 | #ifdef __LITTLE_ENDIAN__ |
| 54396 | | #define vmulq_laneq_u32(__p0_538, __p1_538, __p2_538) __extension__ ({ \ |
| 54397 | | uint32x4_t __s0_538 = __p0_538; \ |
| 54398 | | uint32x4_t __s1_538 = __p1_538; \ |
| 54399 | | uint32x4_t __ret_538; \ |
| 54400 | | __ret_538 = __s0_538 * splatq_laneq_u32(__s1_538, __p2_538); \ |
| 54401 | | __ret_538; \ |
| 55752 | #define vmulq_laneq_u32(__p0_630, __p1_630, __p2_630) __extension__ ({ \ |
| 55753 | uint32x4_t __s0_630 = __p0_630; \ |
| 55754 | uint32x4_t __s1_630 = __p1_630; \ |
| 55755 | uint32x4_t __ret_630; \ |
| 55756 | __ret_630 = __s0_630 * splatq_laneq_u32(__s1_630, __p2_630); \ |
| 55757 | __ret_630; \ |
| 54402 | 55758 | }) |
| 54403 | 55759 | #else |
| 54404 | | #define vmulq_laneq_u32(__p0_539, __p1_539, __p2_539) __extension__ ({ \ |
| 54405 | | uint32x4_t __s0_539 = __p0_539; \ |
| 54406 | | uint32x4_t __s1_539 = __p1_539; \ |
| 54407 | | uint32x4_t __rev0_539; __rev0_539 = __builtin_shufflevector(__s0_539, __s0_539, 3, 2, 1, 0); \ |
| 54408 | | uint32x4_t __rev1_539; __rev1_539 = __builtin_shufflevector(__s1_539, __s1_539, 3, 2, 1, 0); \ |
| 54409 | | uint32x4_t __ret_539; \ |
| 54410 | | __ret_539 = __rev0_539 * __noswap_splatq_laneq_u32(__rev1_539, __p2_539); \ |
| 54411 | | __ret_539 = __builtin_shufflevector(__ret_539, __ret_539, 3, 2, 1, 0); \ |
| 54412 | | __ret_539; \ |
| 55760 | #define vmulq_laneq_u32(__p0_631, __p1_631, __p2_631) __extension__ ({ \ |
| 55761 | uint32x4_t __s0_631 = __p0_631; \ |
| 55762 | uint32x4_t __s1_631 = __p1_631; \ |
| 55763 | uint32x4_t __rev0_631; __rev0_631 = __builtin_shufflevector(__s0_631, __s0_631, 3, 2, 1, 0); \ |
| 55764 | uint32x4_t __rev1_631; __rev1_631 = __builtin_shufflevector(__s1_631, __s1_631, 3, 2, 1, 0); \ |
| 55765 | uint32x4_t __ret_631; \ |
| 55766 | __ret_631 = __rev0_631 * __noswap_splatq_laneq_u32(__rev1_631, __p2_631); \ |
| 55767 | __ret_631 = __builtin_shufflevector(__ret_631, __ret_631, 3, 2, 1, 0); \ |
| 55768 | __ret_631; \ |
| 54413 | 55769 | }) |
| 54414 | 55770 | #endif |
| 54415 | 55771 | |
| 54416 | 55772 | #ifdef __LITTLE_ENDIAN__ |
| 54417 | | #define vmulq_laneq_u16(__p0_540, __p1_540, __p2_540) __extension__ ({ \ |
| 54418 | | uint16x8_t __s0_540 = __p0_540; \ |
| 54419 | | uint16x8_t __s1_540 = __p1_540; \ |
| 54420 | | uint16x8_t __ret_540; \ |
| 54421 | | __ret_540 = __s0_540 * splatq_laneq_u16(__s1_540, __p2_540); \ |
| 54422 | | __ret_540; \ |
| 55773 | #define vmulq_laneq_u16(__p0_632, __p1_632, __p2_632) __extension__ ({ \ |
| 55774 | uint16x8_t __s0_632 = __p0_632; \ |
| 55775 | uint16x8_t __s1_632 = __p1_632; \ |
| 55776 | uint16x8_t __ret_632; \ |
| 55777 | __ret_632 = __s0_632 * splatq_laneq_u16(__s1_632, __p2_632); \ |
| 55778 | __ret_632; \ |
| 54423 | 55779 | }) |
| 54424 | 55780 | #else |
| 54425 | | #define vmulq_laneq_u16(__p0_541, __p1_541, __p2_541) __extension__ ({ \ |
| 54426 | | uint16x8_t __s0_541 = __p0_541; \ |
| 54427 | | uint16x8_t __s1_541 = __p1_541; \ |
| 54428 | | uint16x8_t __rev0_541; __rev0_541 = __builtin_shufflevector(__s0_541, __s0_541, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54429 | | uint16x8_t __rev1_541; __rev1_541 = __builtin_shufflevector(__s1_541, __s1_541, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54430 | | uint16x8_t __ret_541; \ |
| 54431 | | __ret_541 = __rev0_541 * __noswap_splatq_laneq_u16(__rev1_541, __p2_541); \ |
| 54432 | | __ret_541 = __builtin_shufflevector(__ret_541, __ret_541, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54433 | | __ret_541; \ |
| 55781 | #define vmulq_laneq_u16(__p0_633, __p1_633, __p2_633) __extension__ ({ \ |
| 55782 | uint16x8_t __s0_633 = __p0_633; \ |
| 55783 | uint16x8_t __s1_633 = __p1_633; \ |
| 55784 | uint16x8_t __rev0_633; __rev0_633 = __builtin_shufflevector(__s0_633, __s0_633, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55785 | uint16x8_t __rev1_633; __rev1_633 = __builtin_shufflevector(__s1_633, __s1_633, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55786 | uint16x8_t __ret_633; \ |
| 55787 | __ret_633 = __rev0_633 * __noswap_splatq_laneq_u16(__rev1_633, __p2_633); \ |
| 55788 | __ret_633 = __builtin_shufflevector(__ret_633, __ret_633, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55789 | __ret_633; \ |
| 54434 | 55790 | }) |
| 54435 | 55791 | #endif |
| 54436 | 55792 | |
| 54437 | 55793 | #ifdef __LITTLE_ENDIAN__ |
| 54438 | | #define vmulq_laneq_f64(__p0_542, __p1_542, __p2_542) __extension__ ({ \ |
| 54439 | | float64x2_t __s0_542 = __p0_542; \ |
| 54440 | | float64x2_t __s1_542 = __p1_542; \ |
| 54441 | | float64x2_t __ret_542; \ |
| 54442 | | __ret_542 = __s0_542 * splatq_laneq_f64(__s1_542, __p2_542); \ |
| 54443 | | __ret_542; \ |
| 55794 | #define vmulq_laneq_f64(__p0_634, __p1_634, __p2_634) __extension__ ({ \ |
| 55795 | float64x2_t __s0_634 = __p0_634; \ |
| 55796 | float64x2_t __s1_634 = __p1_634; \ |
| 55797 | float64x2_t __ret_634; \ |
| 55798 | __ret_634 = __s0_634 * splatq_laneq_f64(__s1_634, __p2_634); \ |
| 55799 | __ret_634; \ |
| 54444 | 55800 | }) |
| 54445 | 55801 | #else |
| 54446 | | #define vmulq_laneq_f64(__p0_543, __p1_543, __p2_543) __extension__ ({ \ |
| 54447 | | float64x2_t __s0_543 = __p0_543; \ |
| 54448 | | float64x2_t __s1_543 = __p1_543; \ |
| 54449 | | float64x2_t __rev0_543; __rev0_543 = __builtin_shufflevector(__s0_543, __s0_543, 1, 0); \ |
| 54450 | | float64x2_t __rev1_543; __rev1_543 = __builtin_shufflevector(__s1_543, __s1_543, 1, 0); \ |
| 54451 | | float64x2_t __ret_543; \ |
| 54452 | | __ret_543 = __rev0_543 * __noswap_splatq_laneq_f64(__rev1_543, __p2_543); \ |
| 54453 | | __ret_543 = __builtin_shufflevector(__ret_543, __ret_543, 1, 0); \ |
| 54454 | | __ret_543; \ |
| 55802 | #define vmulq_laneq_f64(__p0_635, __p1_635, __p2_635) __extension__ ({ \ |
| 55803 | float64x2_t __s0_635 = __p0_635; \ |
| 55804 | float64x2_t __s1_635 = __p1_635; \ |
| 55805 | float64x2_t __rev0_635; __rev0_635 = __builtin_shufflevector(__s0_635, __s0_635, 1, 0); \ |
| 55806 | float64x2_t __rev1_635; __rev1_635 = __builtin_shufflevector(__s1_635, __s1_635, 1, 0); \ |
| 55807 | float64x2_t __ret_635; \ |
| 55808 | __ret_635 = __rev0_635 * __noswap_splatq_laneq_f64(__rev1_635, __p2_635); \ |
| 55809 | __ret_635 = __builtin_shufflevector(__ret_635, __ret_635, 1, 0); \ |
| 55810 | __ret_635; \ |
| 54455 | 55811 | }) |
| 54456 | 55812 | #endif |
| 54457 | 55813 | |
| 54458 | 55814 | #ifdef __LITTLE_ENDIAN__ |
| 54459 | | #define vmulq_laneq_f32(__p0_544, __p1_544, __p2_544) __extension__ ({ \ |
| 54460 | | float32x4_t __s0_544 = __p0_544; \ |
| 54461 | | float32x4_t __s1_544 = __p1_544; \ |
| 54462 | | float32x4_t __ret_544; \ |
| 54463 | | __ret_544 = __s0_544 * splatq_laneq_f32(__s1_544, __p2_544); \ |
| 54464 | | __ret_544; \ |
| 55815 | #define vmulq_laneq_f32(__p0_636, __p1_636, __p2_636) __extension__ ({ \ |
| 55816 | float32x4_t __s0_636 = __p0_636; \ |
| 55817 | float32x4_t __s1_636 = __p1_636; \ |
| 55818 | float32x4_t __ret_636; \ |
| 55819 | __ret_636 = __s0_636 * splatq_laneq_f32(__s1_636, __p2_636); \ |
| 55820 | __ret_636; \ |
| 54465 | 55821 | }) |
| 54466 | 55822 | #else |
| 54467 | | #define vmulq_laneq_f32(__p0_545, __p1_545, __p2_545) __extension__ ({ \ |
| 54468 | | float32x4_t __s0_545 = __p0_545; \ |
| 54469 | | float32x4_t __s1_545 = __p1_545; \ |
| 54470 | | float32x4_t __rev0_545; __rev0_545 = __builtin_shufflevector(__s0_545, __s0_545, 3, 2, 1, 0); \ |
| 54471 | | float32x4_t __rev1_545; __rev1_545 = __builtin_shufflevector(__s1_545, __s1_545, 3, 2, 1, 0); \ |
| 54472 | | float32x4_t __ret_545; \ |
| 54473 | | __ret_545 = __rev0_545 * __noswap_splatq_laneq_f32(__rev1_545, __p2_545); \ |
| 54474 | | __ret_545 = __builtin_shufflevector(__ret_545, __ret_545, 3, 2, 1, 0); \ |
| 54475 | | __ret_545; \ |
| 55823 | #define vmulq_laneq_f32(__p0_637, __p1_637, __p2_637) __extension__ ({ \ |
| 55824 | float32x4_t __s0_637 = __p0_637; \ |
| 55825 | float32x4_t __s1_637 = __p1_637; \ |
| 55826 | float32x4_t __rev0_637; __rev0_637 = __builtin_shufflevector(__s0_637, __s0_637, 3, 2, 1, 0); \ |
| 55827 | float32x4_t __rev1_637; __rev1_637 = __builtin_shufflevector(__s1_637, __s1_637, 3, 2, 1, 0); \ |
| 55828 | float32x4_t __ret_637; \ |
| 55829 | __ret_637 = __rev0_637 * __noswap_splatq_laneq_f32(__rev1_637, __p2_637); \ |
| 55830 | __ret_637 = __builtin_shufflevector(__ret_637, __ret_637, 3, 2, 1, 0); \ |
| 55831 | __ret_637; \ |
| 54476 | 55832 | }) |
| 54477 | 55833 | #endif |
| 54478 | 55834 | |
| 54479 | 55835 | #ifdef __LITTLE_ENDIAN__ |
| 54480 | | #define vmulq_laneq_s32(__p0_546, __p1_546, __p2_546) __extension__ ({ \ |
| 54481 | | int32x4_t __s0_546 = __p0_546; \ |
| 54482 | | int32x4_t __s1_546 = __p1_546; \ |
| 54483 | | int32x4_t __ret_546; \ |
| 54484 | | __ret_546 = __s0_546 * splatq_laneq_s32(__s1_546, __p2_546); \ |
| 54485 | | __ret_546; \ |
| 55836 | #define vmulq_laneq_s32(__p0_638, __p1_638, __p2_638) __extension__ ({ \ |
| 55837 | int32x4_t __s0_638 = __p0_638; \ |
| 55838 | int32x4_t __s1_638 = __p1_638; \ |
| 55839 | int32x4_t __ret_638; \ |
| 55840 | __ret_638 = __s0_638 * splatq_laneq_s32(__s1_638, __p2_638); \ |
| 55841 | __ret_638; \ |
| 54486 | 55842 | }) |
| 54487 | 55843 | #else |
| 54488 | | #define vmulq_laneq_s32(__p0_547, __p1_547, __p2_547) __extension__ ({ \ |
| 54489 | | int32x4_t __s0_547 = __p0_547; \ |
| 54490 | | int32x4_t __s1_547 = __p1_547; \ |
| 54491 | | int32x4_t __rev0_547; __rev0_547 = __builtin_shufflevector(__s0_547, __s0_547, 3, 2, 1, 0); \ |
| 54492 | | int32x4_t __rev1_547; __rev1_547 = __builtin_shufflevector(__s1_547, __s1_547, 3, 2, 1, 0); \ |
| 54493 | | int32x4_t __ret_547; \ |
| 54494 | | __ret_547 = __rev0_547 * __noswap_splatq_laneq_s32(__rev1_547, __p2_547); \ |
| 54495 | | __ret_547 = __builtin_shufflevector(__ret_547, __ret_547, 3, 2, 1, 0); \ |
| 54496 | | __ret_547; \ |
| 55844 | #define vmulq_laneq_s32(__p0_639, __p1_639, __p2_639) __extension__ ({ \ |
| 55845 | int32x4_t __s0_639 = __p0_639; \ |
| 55846 | int32x4_t __s1_639 = __p1_639; \ |
| 55847 | int32x4_t __rev0_639; __rev0_639 = __builtin_shufflevector(__s0_639, __s0_639, 3, 2, 1, 0); \ |
| 55848 | int32x4_t __rev1_639; __rev1_639 = __builtin_shufflevector(__s1_639, __s1_639, 3, 2, 1, 0); \ |
| 55849 | int32x4_t __ret_639; \ |
| 55850 | __ret_639 = __rev0_639 * __noswap_splatq_laneq_s32(__rev1_639, __p2_639); \ |
| 55851 | __ret_639 = __builtin_shufflevector(__ret_639, __ret_639, 3, 2, 1, 0); \ |
| 55852 | __ret_639; \ |
| 54497 | 55853 | }) |
| 54498 | 55854 | #endif |
| 54499 | 55855 | |
| 54500 | 55856 | #ifdef __LITTLE_ENDIAN__ |
| 54501 | | #define vmulq_laneq_s16(__p0_548, __p1_548, __p2_548) __extension__ ({ \ |
| 54502 | | int16x8_t __s0_548 = __p0_548; \ |
| 54503 | | int16x8_t __s1_548 = __p1_548; \ |
| 54504 | | int16x8_t __ret_548; \ |
| 54505 | | __ret_548 = __s0_548 * splatq_laneq_s16(__s1_548, __p2_548); \ |
| 54506 | | __ret_548; \ |
| 55857 | #define vmulq_laneq_s16(__p0_640, __p1_640, __p2_640) __extension__ ({ \ |
| 55858 | int16x8_t __s0_640 = __p0_640; \ |
| 55859 | int16x8_t __s1_640 = __p1_640; \ |
| 55860 | int16x8_t __ret_640; \ |
| 55861 | __ret_640 = __s0_640 * splatq_laneq_s16(__s1_640, __p2_640); \ |
| 55862 | __ret_640; \ |
| 54507 | 55863 | }) |
| 54508 | 55864 | #else |
| 54509 | | #define vmulq_laneq_s16(__p0_549, __p1_549, __p2_549) __extension__ ({ \ |
| 54510 | | int16x8_t __s0_549 = __p0_549; \ |
| 54511 | | int16x8_t __s1_549 = __p1_549; \ |
| 54512 | | int16x8_t __rev0_549; __rev0_549 = __builtin_shufflevector(__s0_549, __s0_549, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54513 | | int16x8_t __rev1_549; __rev1_549 = __builtin_shufflevector(__s1_549, __s1_549, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54514 | | int16x8_t __ret_549; \ |
| 54515 | | __ret_549 = __rev0_549 * __noswap_splatq_laneq_s16(__rev1_549, __p2_549); \ |
| 54516 | | __ret_549 = __builtin_shufflevector(__ret_549, __ret_549, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54517 | | __ret_549; \ |
| 55865 | #define vmulq_laneq_s16(__p0_641, __p1_641, __p2_641) __extension__ ({ \ |
| 55866 | int16x8_t __s0_641 = __p0_641; \ |
| 55867 | int16x8_t __s1_641 = __p1_641; \ |
| 55868 | int16x8_t __rev0_641; __rev0_641 = __builtin_shufflevector(__s0_641, __s0_641, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55869 | int16x8_t __rev1_641; __rev1_641 = __builtin_shufflevector(__s1_641, __s1_641, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55870 | int16x8_t __ret_641; \ |
| 55871 | __ret_641 = __rev0_641 * __noswap_splatq_laneq_s16(__rev1_641, __p2_641); \ |
| 55872 | __ret_641 = __builtin_shufflevector(__ret_641, __ret_641, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55873 | __ret_641; \ |
| 54518 | 55874 | }) |
| 54519 | 55875 | #endif |
| 54520 | 55876 | |
| 54521 | 55877 | #ifdef __LITTLE_ENDIAN__ |
| 54522 | | #define vmul_laneq_u32(__p0_550, __p1_550, __p2_550) __extension__ ({ \ |
| 54523 | | uint32x2_t __s0_550 = __p0_550; \ |
| 54524 | | uint32x4_t __s1_550 = __p1_550; \ |
| 54525 | | uint32x2_t __ret_550; \ |
| 54526 | | __ret_550 = __s0_550 * splat_laneq_u32(__s1_550, __p2_550); \ |
| 54527 | | __ret_550; \ |
| 55878 | #define vmul_laneq_u32(__p0_642, __p1_642, __p2_642) __extension__ ({ \ |
| 55879 | uint32x2_t __s0_642 = __p0_642; \ |
| 55880 | uint32x4_t __s1_642 = __p1_642; \ |
| 55881 | uint32x2_t __ret_642; \ |
| 55882 | __ret_642 = __s0_642 * splat_laneq_u32(__s1_642, __p2_642); \ |
| 55883 | __ret_642; \ |
| 54528 | 55884 | }) |
| 54529 | 55885 | #else |
| 54530 | | #define vmul_laneq_u32(__p0_551, __p1_551, __p2_551) __extension__ ({ \ |
| 54531 | | uint32x2_t __s0_551 = __p0_551; \ |
| 54532 | | uint32x4_t __s1_551 = __p1_551; \ |
| 54533 | | uint32x2_t __rev0_551; __rev0_551 = __builtin_shufflevector(__s0_551, __s0_551, 1, 0); \ |
| 54534 | | uint32x4_t __rev1_551; __rev1_551 = __builtin_shufflevector(__s1_551, __s1_551, 3, 2, 1, 0); \ |
| 54535 | | uint32x2_t __ret_551; \ |
| 54536 | | __ret_551 = __rev0_551 * __noswap_splat_laneq_u32(__rev1_551, __p2_551); \ |
| 54537 | | __ret_551 = __builtin_shufflevector(__ret_551, __ret_551, 1, 0); \ |
| 54538 | | __ret_551; \ |
| 55886 | #define vmul_laneq_u32(__p0_643, __p1_643, __p2_643) __extension__ ({ \ |
| 55887 | uint32x2_t __s0_643 = __p0_643; \ |
| 55888 | uint32x4_t __s1_643 = __p1_643; \ |
| 55889 | uint32x2_t __rev0_643; __rev0_643 = __builtin_shufflevector(__s0_643, __s0_643, 1, 0); \ |
| 55890 | uint32x4_t __rev1_643; __rev1_643 = __builtin_shufflevector(__s1_643, __s1_643, 3, 2, 1, 0); \ |
| 55891 | uint32x2_t __ret_643; \ |
| 55892 | __ret_643 = __rev0_643 * __noswap_splat_laneq_u32(__rev1_643, __p2_643); \ |
| 55893 | __ret_643 = __builtin_shufflevector(__ret_643, __ret_643, 1, 0); \ |
| 55894 | __ret_643; \ |
| 54539 | 55895 | }) |
| 54540 | 55896 | #endif |
| 54541 | 55897 | |
| 54542 | 55898 | #ifdef __LITTLE_ENDIAN__ |
| 54543 | | #define vmul_laneq_u16(__p0_552, __p1_552, __p2_552) __extension__ ({ \ |
| 54544 | | uint16x4_t __s0_552 = __p0_552; \ |
| 54545 | | uint16x8_t __s1_552 = __p1_552; \ |
| 54546 | | uint16x4_t __ret_552; \ |
| 54547 | | __ret_552 = __s0_552 * splat_laneq_u16(__s1_552, __p2_552); \ |
| 54548 | | __ret_552; \ |
| 55899 | #define vmul_laneq_u16(__p0_644, __p1_644, __p2_644) __extension__ ({ \ |
| 55900 | uint16x4_t __s0_644 = __p0_644; \ |
| 55901 | uint16x8_t __s1_644 = __p1_644; \ |
| 55902 | uint16x4_t __ret_644; \ |
| 55903 | __ret_644 = __s0_644 * splat_laneq_u16(__s1_644, __p2_644); \ |
| 55904 | __ret_644; \ |
| 54549 | 55905 | }) |
| 54550 | 55906 | #else |
| 54551 | | #define vmul_laneq_u16(__p0_553, __p1_553, __p2_553) __extension__ ({ \ |
| 54552 | | uint16x4_t __s0_553 = __p0_553; \ |
| 54553 | | uint16x8_t __s1_553 = __p1_553; \ |
| 54554 | | uint16x4_t __rev0_553; __rev0_553 = __builtin_shufflevector(__s0_553, __s0_553, 3, 2, 1, 0); \ |
| 54555 | | uint16x8_t __rev1_553; __rev1_553 = __builtin_shufflevector(__s1_553, __s1_553, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54556 | | uint16x4_t __ret_553; \ |
| 54557 | | __ret_553 = __rev0_553 * __noswap_splat_laneq_u16(__rev1_553, __p2_553); \ |
| 54558 | | __ret_553 = __builtin_shufflevector(__ret_553, __ret_553, 3, 2, 1, 0); \ |
| 54559 | | __ret_553; \ |
| 55907 | #define vmul_laneq_u16(__p0_645, __p1_645, __p2_645) __extension__ ({ \ |
| 55908 | uint16x4_t __s0_645 = __p0_645; \ |
| 55909 | uint16x8_t __s1_645 = __p1_645; \ |
| 55910 | uint16x4_t __rev0_645; __rev0_645 = __builtin_shufflevector(__s0_645, __s0_645, 3, 2, 1, 0); \ |
| 55911 | uint16x8_t __rev1_645; __rev1_645 = __builtin_shufflevector(__s1_645, __s1_645, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55912 | uint16x4_t __ret_645; \ |
| 55913 | __ret_645 = __rev0_645 * __noswap_splat_laneq_u16(__rev1_645, __p2_645); \ |
| 55914 | __ret_645 = __builtin_shufflevector(__ret_645, __ret_645, 3, 2, 1, 0); \ |
| 55915 | __ret_645; \ |
| 54560 | 55916 | }) |
| 54561 | 55917 | #endif |
| 54562 | 55918 | |
| 54563 | 55919 | #ifdef __LITTLE_ENDIAN__ |
| 54564 | | #define vmul_laneq_f32(__p0_554, __p1_554, __p2_554) __extension__ ({ \ |
| 54565 | | float32x2_t __s0_554 = __p0_554; \ |
| 54566 | | float32x4_t __s1_554 = __p1_554; \ |
| 54567 | | float32x2_t __ret_554; \ |
| 54568 | | __ret_554 = __s0_554 * splat_laneq_f32(__s1_554, __p2_554); \ |
| 54569 | | __ret_554; \ |
| 55920 | #define vmul_laneq_f32(__p0_646, __p1_646, __p2_646) __extension__ ({ \ |
| 55921 | float32x2_t __s0_646 = __p0_646; \ |
| 55922 | float32x4_t __s1_646 = __p1_646; \ |
| 55923 | float32x2_t __ret_646; \ |
| 55924 | __ret_646 = __s0_646 * splat_laneq_f32(__s1_646, __p2_646); \ |
| 55925 | __ret_646; \ |
| 54570 | 55926 | }) |
| 54571 | 55927 | #else |
| 54572 | | #define vmul_laneq_f32(__p0_555, __p1_555, __p2_555) __extension__ ({ \ |
| 54573 | | float32x2_t __s0_555 = __p0_555; \ |
| 54574 | | float32x4_t __s1_555 = __p1_555; \ |
| 54575 | | float32x2_t __rev0_555; __rev0_555 = __builtin_shufflevector(__s0_555, __s0_555, 1, 0); \ |
| 54576 | | float32x4_t __rev1_555; __rev1_555 = __builtin_shufflevector(__s1_555, __s1_555, 3, 2, 1, 0); \ |
| 54577 | | float32x2_t __ret_555; \ |
| 54578 | | __ret_555 = __rev0_555 * __noswap_splat_laneq_f32(__rev1_555, __p2_555); \ |
| 54579 | | __ret_555 = __builtin_shufflevector(__ret_555, __ret_555, 1, 0); \ |
| 54580 | | __ret_555; \ |
| 55928 | #define vmul_laneq_f32(__p0_647, __p1_647, __p2_647) __extension__ ({ \ |
| 55929 | float32x2_t __s0_647 = __p0_647; \ |
| 55930 | float32x4_t __s1_647 = __p1_647; \ |
| 55931 | float32x2_t __rev0_647; __rev0_647 = __builtin_shufflevector(__s0_647, __s0_647, 1, 0); \ |
| 55932 | float32x4_t __rev1_647; __rev1_647 = __builtin_shufflevector(__s1_647, __s1_647, 3, 2, 1, 0); \ |
| 55933 | float32x2_t __ret_647; \ |
| 55934 | __ret_647 = __rev0_647 * __noswap_splat_laneq_f32(__rev1_647, __p2_647); \ |
| 55935 | __ret_647 = __builtin_shufflevector(__ret_647, __ret_647, 1, 0); \ |
| 55936 | __ret_647; \ |
| 54581 | 55937 | }) |
| 54582 | 55938 | #endif |
| 54583 | 55939 | |
| 54584 | 55940 | #ifdef __LITTLE_ENDIAN__ |
| 54585 | | #define vmul_laneq_s32(__p0_556, __p1_556, __p2_556) __extension__ ({ \ |
| 54586 | | int32x2_t __s0_556 = __p0_556; \ |
| 54587 | | int32x4_t __s1_556 = __p1_556; \ |
| 54588 | | int32x2_t __ret_556; \ |
| 54589 | | __ret_556 = __s0_556 * splat_laneq_s32(__s1_556, __p2_556); \ |
| 54590 | | __ret_556; \ |
| 55941 | #define vmul_laneq_s32(__p0_648, __p1_648, __p2_648) __extension__ ({ \ |
| 55942 | int32x2_t __s0_648 = __p0_648; \ |
| 55943 | int32x4_t __s1_648 = __p1_648; \ |
| 55944 | int32x2_t __ret_648; \ |
| 55945 | __ret_648 = __s0_648 * splat_laneq_s32(__s1_648, __p2_648); \ |
| 55946 | __ret_648; \ |
| 54591 | 55947 | }) |
| 54592 | 55948 | #else |
| 54593 | | #define vmul_laneq_s32(__p0_557, __p1_557, __p2_557) __extension__ ({ \ |
| 54594 | | int32x2_t __s0_557 = __p0_557; \ |
| 54595 | | int32x4_t __s1_557 = __p1_557; \ |
| 54596 | | int32x2_t __rev0_557; __rev0_557 = __builtin_shufflevector(__s0_557, __s0_557, 1, 0); \ |
| 54597 | | int32x4_t __rev1_557; __rev1_557 = __builtin_shufflevector(__s1_557, __s1_557, 3, 2, 1, 0); \ |
| 54598 | | int32x2_t __ret_557; \ |
| 54599 | | __ret_557 = __rev0_557 * __noswap_splat_laneq_s32(__rev1_557, __p2_557); \ |
| 54600 | | __ret_557 = __builtin_shufflevector(__ret_557, __ret_557, 1, 0); \ |
| 54601 | | __ret_557; \ |
| 55949 | #define vmul_laneq_s32(__p0_649, __p1_649, __p2_649) __extension__ ({ \ |
| 55950 | int32x2_t __s0_649 = __p0_649; \ |
| 55951 | int32x4_t __s1_649 = __p1_649; \ |
| 55952 | int32x2_t __rev0_649; __rev0_649 = __builtin_shufflevector(__s0_649, __s0_649, 1, 0); \ |
| 55953 | int32x4_t __rev1_649; __rev1_649 = __builtin_shufflevector(__s1_649, __s1_649, 3, 2, 1, 0); \ |
| 55954 | int32x2_t __ret_649; \ |
| 55955 | __ret_649 = __rev0_649 * __noswap_splat_laneq_s32(__rev1_649, __p2_649); \ |
| 55956 | __ret_649 = __builtin_shufflevector(__ret_649, __ret_649, 1, 0); \ |
| 55957 | __ret_649; \ |
| 54602 | 55958 | }) |
| 54603 | 55959 | #endif |
| 54604 | 55960 | |
| 54605 | 55961 | #ifdef __LITTLE_ENDIAN__ |
| 54606 | | #define vmul_laneq_s16(__p0_558, __p1_558, __p2_558) __extension__ ({ \ |
| 54607 | | int16x4_t __s0_558 = __p0_558; \ |
| 54608 | | int16x8_t __s1_558 = __p1_558; \ |
| 54609 | | int16x4_t __ret_558; \ |
| 54610 | | __ret_558 = __s0_558 * splat_laneq_s16(__s1_558, __p2_558); \ |
| 54611 | | __ret_558; \ |
| 55962 | #define vmul_laneq_s16(__p0_650, __p1_650, __p2_650) __extension__ ({ \ |
| 55963 | int16x4_t __s0_650 = __p0_650; \ |
| 55964 | int16x8_t __s1_650 = __p1_650; \ |
| 55965 | int16x4_t __ret_650; \ |
| 55966 | __ret_650 = __s0_650 * splat_laneq_s16(__s1_650, __p2_650); \ |
| 55967 | __ret_650; \ |
| 54612 | 55968 | }) |
| 54613 | 55969 | #else |
| 54614 | | #define vmul_laneq_s16(__p0_559, __p1_559, __p2_559) __extension__ ({ \ |
| 54615 | | int16x4_t __s0_559 = __p0_559; \ |
| 54616 | | int16x8_t __s1_559 = __p1_559; \ |
| 54617 | | int16x4_t __rev0_559; __rev0_559 = __builtin_shufflevector(__s0_559, __s0_559, 3, 2, 1, 0); \ |
| 54618 | | int16x8_t __rev1_559; __rev1_559 = __builtin_shufflevector(__s1_559, __s1_559, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54619 | | int16x4_t __ret_559; \ |
| 54620 | | __ret_559 = __rev0_559 * __noswap_splat_laneq_s16(__rev1_559, __p2_559); \ |
| 54621 | | __ret_559 = __builtin_shufflevector(__ret_559, __ret_559, 3, 2, 1, 0); \ |
| 54622 | | __ret_559; \ |
| 55970 | #define vmul_laneq_s16(__p0_651, __p1_651, __p2_651) __extension__ ({ \ |
| 55971 | int16x4_t __s0_651 = __p0_651; \ |
| 55972 | int16x8_t __s1_651 = __p1_651; \ |
| 55973 | int16x4_t __rev0_651; __rev0_651 = __builtin_shufflevector(__s0_651, __s0_651, 3, 2, 1, 0); \ |
| 55974 | int16x8_t __rev1_651; __rev1_651 = __builtin_shufflevector(__s1_651, __s1_651, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55975 | int16x4_t __ret_651; \ |
| 55976 | __ret_651 = __rev0_651 * __noswap_splat_laneq_s16(__rev1_651, __p2_651); \ |
| 55977 | __ret_651 = __builtin_shufflevector(__ret_651, __ret_651, 3, 2, 1, 0); \ |
| 55978 | __ret_651; \ |
| 54623 | 55979 | }) |
| 54624 | 55980 | #endif |
| 54625 | 55981 | |
| ... | ... | @@ -54785,170 +56141,170 @@ __ai poly128_t vmull_high_p64(poly64x2_t __p0, poly64x2_t __p1) { |
| 54785 | 56141 | #endif |
| 54786 | 56142 | |
| 54787 | 56143 | #ifdef __LITTLE_ENDIAN__ |
| 54788 | | #define vmull_high_lane_u32(__p0_560, __p1_560, __p2_560) __extension__ ({ \ |
| 54789 | | uint32x4_t __s0_560 = __p0_560; \ |
| 54790 | | uint32x2_t __s1_560 = __p1_560; \ |
| 54791 | | uint64x2_t __ret_560; \ |
| 54792 | | __ret_560 = vmull_u32(vget_high_u32(__s0_560), splat_lane_u32(__s1_560, __p2_560)); \ |
| 54793 | | __ret_560; \ |
| 56144 | #define vmull_high_lane_u32(__p0_652, __p1_652, __p2_652) __extension__ ({ \ |
| 56145 | uint32x4_t __s0_652 = __p0_652; \ |
| 56146 | uint32x2_t __s1_652 = __p1_652; \ |
| 56147 | uint64x2_t __ret_652; \ |
| 56148 | __ret_652 = vmull_u32(vget_high_u32(__s0_652), splat_lane_u32(__s1_652, __p2_652)); \ |
| 56149 | __ret_652; \ |
| 54794 | 56150 | }) |
| 54795 | 56151 | #else |
| 54796 | | #define vmull_high_lane_u32(__p0_561, __p1_561, __p2_561) __extension__ ({ \ |
| 54797 | | uint32x4_t __s0_561 = __p0_561; \ |
| 54798 | | uint32x2_t __s1_561 = __p1_561; \ |
| 54799 | | uint32x4_t __rev0_561; __rev0_561 = __builtin_shufflevector(__s0_561, __s0_561, 3, 2, 1, 0); \ |
| 54800 | | uint32x2_t __rev1_561; __rev1_561 = __builtin_shufflevector(__s1_561, __s1_561, 1, 0); \ |
| 54801 | | uint64x2_t __ret_561; \ |
| 54802 | | __ret_561 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_561), __noswap_splat_lane_u32(__rev1_561, __p2_561)); \ |
| 54803 | | __ret_561 = __builtin_shufflevector(__ret_561, __ret_561, 1, 0); \ |
| 54804 | | __ret_561; \ |
| 56152 | #define vmull_high_lane_u32(__p0_653, __p1_653, __p2_653) __extension__ ({ \ |
| 56153 | uint32x4_t __s0_653 = __p0_653; \ |
| 56154 | uint32x2_t __s1_653 = __p1_653; \ |
| 56155 | uint32x4_t __rev0_653; __rev0_653 = __builtin_shufflevector(__s0_653, __s0_653, 3, 2, 1, 0); \ |
| 56156 | uint32x2_t __rev1_653; __rev1_653 = __builtin_shufflevector(__s1_653, __s1_653, 1, 0); \ |
| 56157 | uint64x2_t __ret_653; \ |
| 56158 | __ret_653 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_653), __noswap_splat_lane_u32(__rev1_653, __p2_653)); \ |
| 56159 | __ret_653 = __builtin_shufflevector(__ret_653, __ret_653, 1, 0); \ |
| 56160 | __ret_653; \ |
| 54805 | 56161 | }) |
| 54806 | 56162 | #endif |
| 54807 | 56163 | |
| 54808 | 56164 | #ifdef __LITTLE_ENDIAN__ |
| 54809 | | #define vmull_high_lane_u16(__p0_562, __p1_562, __p2_562) __extension__ ({ \ |
| 54810 | | uint16x8_t __s0_562 = __p0_562; \ |
| 54811 | | uint16x4_t __s1_562 = __p1_562; \ |
| 54812 | | uint32x4_t __ret_562; \ |
| 54813 | | __ret_562 = vmull_u16(vget_high_u16(__s0_562), splat_lane_u16(__s1_562, __p2_562)); \ |
| 54814 | | __ret_562; \ |
| 56165 | #define vmull_high_lane_u16(__p0_654, __p1_654, __p2_654) __extension__ ({ \ |
| 56166 | uint16x8_t __s0_654 = __p0_654; \ |
| 56167 | uint16x4_t __s1_654 = __p1_654; \ |
| 56168 | uint32x4_t __ret_654; \ |
| 56169 | __ret_654 = vmull_u16(vget_high_u16(__s0_654), splat_lane_u16(__s1_654, __p2_654)); \ |
| 56170 | __ret_654; \ |
| 54815 | 56171 | }) |
| 54816 | 56172 | #else |
| 54817 | | #define vmull_high_lane_u16(__p0_563, __p1_563, __p2_563) __extension__ ({ \ |
| 54818 | | uint16x8_t __s0_563 = __p0_563; \ |
| 54819 | | uint16x4_t __s1_563 = __p1_563; \ |
| 54820 | | uint16x8_t __rev0_563; __rev0_563 = __builtin_shufflevector(__s0_563, __s0_563, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54821 | | uint16x4_t __rev1_563; __rev1_563 = __builtin_shufflevector(__s1_563, __s1_563, 3, 2, 1, 0); \ |
| 54822 | | uint32x4_t __ret_563; \ |
| 54823 | | __ret_563 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_563), __noswap_splat_lane_u16(__rev1_563, __p2_563)); \ |
| 54824 | | __ret_563 = __builtin_shufflevector(__ret_563, __ret_563, 3, 2, 1, 0); \ |
| 54825 | | __ret_563; \ |
| 56173 | #define vmull_high_lane_u16(__p0_655, __p1_655, __p2_655) __extension__ ({ \ |
| 56174 | uint16x8_t __s0_655 = __p0_655; \ |
| 56175 | uint16x4_t __s1_655 = __p1_655; \ |
| 56176 | uint16x8_t __rev0_655; __rev0_655 = __builtin_shufflevector(__s0_655, __s0_655, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56177 | uint16x4_t __rev1_655; __rev1_655 = __builtin_shufflevector(__s1_655, __s1_655, 3, 2, 1, 0); \ |
| 56178 | uint32x4_t __ret_655; \ |
| 56179 | __ret_655 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_655), __noswap_splat_lane_u16(__rev1_655, __p2_655)); \ |
| 56180 | __ret_655 = __builtin_shufflevector(__ret_655, __ret_655, 3, 2, 1, 0); \ |
| 56181 | __ret_655; \ |
| 54826 | 56182 | }) |
| 54827 | 56183 | #endif |
| 54828 | 56184 | |
| 54829 | 56185 | #ifdef __LITTLE_ENDIAN__ |
| 54830 | | #define vmull_high_lane_s32(__p0_564, __p1_564, __p2_564) __extension__ ({ \ |
| 54831 | | int32x4_t __s0_564 = __p0_564; \ |
| 54832 | | int32x2_t __s1_564 = __p1_564; \ |
| 54833 | | int64x2_t __ret_564; \ |
| 54834 | | __ret_564 = vmull_s32(vget_high_s32(__s0_564), splat_lane_s32(__s1_564, __p2_564)); \ |
| 54835 | | __ret_564; \ |
| 56186 | #define vmull_high_lane_s32(__p0_656, __p1_656, __p2_656) __extension__ ({ \ |
| 56187 | int32x4_t __s0_656 = __p0_656; \ |
| 56188 | int32x2_t __s1_656 = __p1_656; \ |
| 56189 | int64x2_t __ret_656; \ |
| 56190 | __ret_656 = vmull_s32(vget_high_s32(__s0_656), splat_lane_s32(__s1_656, __p2_656)); \ |
| 56191 | __ret_656; \ |
| 54836 | 56192 | }) |
| 54837 | 56193 | #else |
| 54838 | | #define vmull_high_lane_s32(__p0_565, __p1_565, __p2_565) __extension__ ({ \ |
| 54839 | | int32x4_t __s0_565 = __p0_565; \ |
| 54840 | | int32x2_t __s1_565 = __p1_565; \ |
| 54841 | | int32x4_t __rev0_565; __rev0_565 = __builtin_shufflevector(__s0_565, __s0_565, 3, 2, 1, 0); \ |
| 54842 | | int32x2_t __rev1_565; __rev1_565 = __builtin_shufflevector(__s1_565, __s1_565, 1, 0); \ |
| 54843 | | int64x2_t __ret_565; \ |
| 54844 | | __ret_565 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_565), __noswap_splat_lane_s32(__rev1_565, __p2_565)); \ |
| 54845 | | __ret_565 = __builtin_shufflevector(__ret_565, __ret_565, 1, 0); \ |
| 54846 | | __ret_565; \ |
| 56194 | #define vmull_high_lane_s32(__p0_657, __p1_657, __p2_657) __extension__ ({ \ |
| 56195 | int32x4_t __s0_657 = __p0_657; \ |
| 56196 | int32x2_t __s1_657 = __p1_657; \ |
| 56197 | int32x4_t __rev0_657; __rev0_657 = __builtin_shufflevector(__s0_657, __s0_657, 3, 2, 1, 0); \ |
| 56198 | int32x2_t __rev1_657; __rev1_657 = __builtin_shufflevector(__s1_657, __s1_657, 1, 0); \ |
| 56199 | int64x2_t __ret_657; \ |
| 56200 | __ret_657 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_657), __noswap_splat_lane_s32(__rev1_657, __p2_657)); \ |
| 56201 | __ret_657 = __builtin_shufflevector(__ret_657, __ret_657, 1, 0); \ |
| 56202 | __ret_657; \ |
| 54847 | 56203 | }) |
| 54848 | 56204 | #endif |
| 54849 | 56205 | |
| 54850 | 56206 | #ifdef __LITTLE_ENDIAN__ |
| 54851 | | #define vmull_high_lane_s16(__p0_566, __p1_566, __p2_566) __extension__ ({ \ |
| 54852 | | int16x8_t __s0_566 = __p0_566; \ |
| 54853 | | int16x4_t __s1_566 = __p1_566; \ |
| 54854 | | int32x4_t __ret_566; \ |
| 54855 | | __ret_566 = vmull_s16(vget_high_s16(__s0_566), splat_lane_s16(__s1_566, __p2_566)); \ |
| 54856 | | __ret_566; \ |
| 56207 | #define vmull_high_lane_s16(__p0_658, __p1_658, __p2_658) __extension__ ({ \ |
| 56208 | int16x8_t __s0_658 = __p0_658; \ |
| 56209 | int16x4_t __s1_658 = __p1_658; \ |
| 56210 | int32x4_t __ret_658; \ |
| 56211 | __ret_658 = vmull_s16(vget_high_s16(__s0_658), splat_lane_s16(__s1_658, __p2_658)); \ |
| 56212 | __ret_658; \ |
| 54857 | 56213 | }) |
| 54858 | 56214 | #else |
| 54859 | | #define vmull_high_lane_s16(__p0_567, __p1_567, __p2_567) __extension__ ({ \ |
| 54860 | | int16x8_t __s0_567 = __p0_567; \ |
| 54861 | | int16x4_t __s1_567 = __p1_567; \ |
| 54862 | | int16x8_t __rev0_567; __rev0_567 = __builtin_shufflevector(__s0_567, __s0_567, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54863 | | int16x4_t __rev1_567; __rev1_567 = __builtin_shufflevector(__s1_567, __s1_567, 3, 2, 1, 0); \ |
| 54864 | | int32x4_t __ret_567; \ |
| 54865 | | __ret_567 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_567), __noswap_splat_lane_s16(__rev1_567, __p2_567)); \ |
| 54866 | | __ret_567 = __builtin_shufflevector(__ret_567, __ret_567, 3, 2, 1, 0); \ |
| 54867 | | __ret_567; \ |
| 56215 | #define vmull_high_lane_s16(__p0_659, __p1_659, __p2_659) __extension__ ({ \ |
| 56216 | int16x8_t __s0_659 = __p0_659; \ |
| 56217 | int16x4_t __s1_659 = __p1_659; \ |
| 56218 | int16x8_t __rev0_659; __rev0_659 = __builtin_shufflevector(__s0_659, __s0_659, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56219 | int16x4_t __rev1_659; __rev1_659 = __builtin_shufflevector(__s1_659, __s1_659, 3, 2, 1, 0); \ |
| 56220 | int32x4_t __ret_659; \ |
| 56221 | __ret_659 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_659), __noswap_splat_lane_s16(__rev1_659, __p2_659)); \ |
| 56222 | __ret_659 = __builtin_shufflevector(__ret_659, __ret_659, 3, 2, 1, 0); \ |
| 56223 | __ret_659; \ |
| 54868 | 56224 | }) |
| 54869 | 56225 | #endif |
| 54870 | 56226 | |
| 54871 | 56227 | #ifdef __LITTLE_ENDIAN__ |
| 54872 | | #define vmull_high_laneq_u32(__p0_568, __p1_568, __p2_568) __extension__ ({ \ |
| 54873 | | uint32x4_t __s0_568 = __p0_568; \ |
| 54874 | | uint32x4_t __s1_568 = __p1_568; \ |
| 54875 | | uint64x2_t __ret_568; \ |
| 54876 | | __ret_568 = vmull_u32(vget_high_u32(__s0_568), splat_laneq_u32(__s1_568, __p2_568)); \ |
| 54877 | | __ret_568; \ |
| 56228 | #define vmull_high_laneq_u32(__p0_660, __p1_660, __p2_660) __extension__ ({ \ |
| 56229 | uint32x4_t __s0_660 = __p0_660; \ |
| 56230 | uint32x4_t __s1_660 = __p1_660; \ |
| 56231 | uint64x2_t __ret_660; \ |
| 56232 | __ret_660 = vmull_u32(vget_high_u32(__s0_660), splat_laneq_u32(__s1_660, __p2_660)); \ |
| 56233 | __ret_660; \ |
| 54878 | 56234 | }) |
| 54879 | 56235 | #else |
| 54880 | | #define vmull_high_laneq_u32(__p0_569, __p1_569, __p2_569) __extension__ ({ \ |
| 54881 | | uint32x4_t __s0_569 = __p0_569; \ |
| 54882 | | uint32x4_t __s1_569 = __p1_569; \ |
| 54883 | | uint32x4_t __rev0_569; __rev0_569 = __builtin_shufflevector(__s0_569, __s0_569, 3, 2, 1, 0); \ |
| 54884 | | uint32x4_t __rev1_569; __rev1_569 = __builtin_shufflevector(__s1_569, __s1_569, 3, 2, 1, 0); \ |
| 54885 | | uint64x2_t __ret_569; \ |
| 54886 | | __ret_569 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_569), __noswap_splat_laneq_u32(__rev1_569, __p2_569)); \ |
| 54887 | | __ret_569 = __builtin_shufflevector(__ret_569, __ret_569, 1, 0); \ |
| 54888 | | __ret_569; \ |
| 56236 | #define vmull_high_laneq_u32(__p0_661, __p1_661, __p2_661) __extension__ ({ \ |
| 56237 | uint32x4_t __s0_661 = __p0_661; \ |
| 56238 | uint32x4_t __s1_661 = __p1_661; \ |
| 56239 | uint32x4_t __rev0_661; __rev0_661 = __builtin_shufflevector(__s0_661, __s0_661, 3, 2, 1, 0); \ |
| 56240 | uint32x4_t __rev1_661; __rev1_661 = __builtin_shufflevector(__s1_661, __s1_661, 3, 2, 1, 0); \ |
| 56241 | uint64x2_t __ret_661; \ |
| 56242 | __ret_661 = __noswap_vmull_u32(__noswap_vget_high_u32(__rev0_661), __noswap_splat_laneq_u32(__rev1_661, __p2_661)); \ |
| 56243 | __ret_661 = __builtin_shufflevector(__ret_661, __ret_661, 1, 0); \ |
| 56244 | __ret_661; \ |
| 54889 | 56245 | }) |
| 54890 | 56246 | #endif |
| 54891 | 56247 | |
| 54892 | 56248 | #ifdef __LITTLE_ENDIAN__ |
| 54893 | | #define vmull_high_laneq_u16(__p0_570, __p1_570, __p2_570) __extension__ ({ \ |
| 54894 | | uint16x8_t __s0_570 = __p0_570; \ |
| 54895 | | uint16x8_t __s1_570 = __p1_570; \ |
| 54896 | | uint32x4_t __ret_570; \ |
| 54897 | | __ret_570 = vmull_u16(vget_high_u16(__s0_570), splat_laneq_u16(__s1_570, __p2_570)); \ |
| 54898 | | __ret_570; \ |
| 56249 | #define vmull_high_laneq_u16(__p0_662, __p1_662, __p2_662) __extension__ ({ \ |
| 56250 | uint16x8_t __s0_662 = __p0_662; \ |
| 56251 | uint16x8_t __s1_662 = __p1_662; \ |
| 56252 | uint32x4_t __ret_662; \ |
| 56253 | __ret_662 = vmull_u16(vget_high_u16(__s0_662), splat_laneq_u16(__s1_662, __p2_662)); \ |
| 56254 | __ret_662; \ |
| 54899 | 56255 | }) |
| 54900 | 56256 | #else |
| 54901 | | #define vmull_high_laneq_u16(__p0_571, __p1_571, __p2_571) __extension__ ({ \ |
| 54902 | | uint16x8_t __s0_571 = __p0_571; \ |
| 54903 | | uint16x8_t __s1_571 = __p1_571; \ |
| 54904 | | uint16x8_t __rev0_571; __rev0_571 = __builtin_shufflevector(__s0_571, __s0_571, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54905 | | uint16x8_t __rev1_571; __rev1_571 = __builtin_shufflevector(__s1_571, __s1_571, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54906 | | uint32x4_t __ret_571; \ |
| 54907 | | __ret_571 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_571), __noswap_splat_laneq_u16(__rev1_571, __p2_571)); \ |
| 54908 | | __ret_571 = __builtin_shufflevector(__ret_571, __ret_571, 3, 2, 1, 0); \ |
| 54909 | | __ret_571; \ |
| 56257 | #define vmull_high_laneq_u16(__p0_663, __p1_663, __p2_663) __extension__ ({ \ |
| 56258 | uint16x8_t __s0_663 = __p0_663; \ |
| 56259 | uint16x8_t __s1_663 = __p1_663; \ |
| 56260 | uint16x8_t __rev0_663; __rev0_663 = __builtin_shufflevector(__s0_663, __s0_663, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56261 | uint16x8_t __rev1_663; __rev1_663 = __builtin_shufflevector(__s1_663, __s1_663, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56262 | uint32x4_t __ret_663; \ |
| 56263 | __ret_663 = __noswap_vmull_u16(__noswap_vget_high_u16(__rev0_663), __noswap_splat_laneq_u16(__rev1_663, __p2_663)); \ |
| 56264 | __ret_663 = __builtin_shufflevector(__ret_663, __ret_663, 3, 2, 1, 0); \ |
| 56265 | __ret_663; \ |
| 54910 | 56266 | }) |
| 54911 | 56267 | #endif |
| 54912 | 56268 | |
| 54913 | 56269 | #ifdef __LITTLE_ENDIAN__ |
| 54914 | | #define vmull_high_laneq_s32(__p0_572, __p1_572, __p2_572) __extension__ ({ \ |
| 54915 | | int32x4_t __s0_572 = __p0_572; \ |
| 54916 | | int32x4_t __s1_572 = __p1_572; \ |
| 54917 | | int64x2_t __ret_572; \ |
| 54918 | | __ret_572 = vmull_s32(vget_high_s32(__s0_572), splat_laneq_s32(__s1_572, __p2_572)); \ |
| 54919 | | __ret_572; \ |
| 56270 | #define vmull_high_laneq_s32(__p0_664, __p1_664, __p2_664) __extension__ ({ \ |
| 56271 | int32x4_t __s0_664 = __p0_664; \ |
| 56272 | int32x4_t __s1_664 = __p1_664; \ |
| 56273 | int64x2_t __ret_664; \ |
| 56274 | __ret_664 = vmull_s32(vget_high_s32(__s0_664), splat_laneq_s32(__s1_664, __p2_664)); \ |
| 56275 | __ret_664; \ |
| 54920 | 56276 | }) |
| 54921 | 56277 | #else |
| 54922 | | #define vmull_high_laneq_s32(__p0_573, __p1_573, __p2_573) __extension__ ({ \ |
| 54923 | | int32x4_t __s0_573 = __p0_573; \ |
| 54924 | | int32x4_t __s1_573 = __p1_573; \ |
| 54925 | | int32x4_t __rev0_573; __rev0_573 = __builtin_shufflevector(__s0_573, __s0_573, 3, 2, 1, 0); \ |
| 54926 | | int32x4_t __rev1_573; __rev1_573 = __builtin_shufflevector(__s1_573, __s1_573, 3, 2, 1, 0); \ |
| 54927 | | int64x2_t __ret_573; \ |
| 54928 | | __ret_573 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_573), __noswap_splat_laneq_s32(__rev1_573, __p2_573)); \ |
| 54929 | | __ret_573 = __builtin_shufflevector(__ret_573, __ret_573, 1, 0); \ |
| 54930 | | __ret_573; \ |
| 56278 | #define vmull_high_laneq_s32(__p0_665, __p1_665, __p2_665) __extension__ ({ \ |
| 56279 | int32x4_t __s0_665 = __p0_665; \ |
| 56280 | int32x4_t __s1_665 = __p1_665; \ |
| 56281 | int32x4_t __rev0_665; __rev0_665 = __builtin_shufflevector(__s0_665, __s0_665, 3, 2, 1, 0); \ |
| 56282 | int32x4_t __rev1_665; __rev1_665 = __builtin_shufflevector(__s1_665, __s1_665, 3, 2, 1, 0); \ |
| 56283 | int64x2_t __ret_665; \ |
| 56284 | __ret_665 = __noswap_vmull_s32(__noswap_vget_high_s32(__rev0_665), __noswap_splat_laneq_s32(__rev1_665, __p2_665)); \ |
| 56285 | __ret_665 = __builtin_shufflevector(__ret_665, __ret_665, 1, 0); \ |
| 56286 | __ret_665; \ |
| 54931 | 56287 | }) |
| 54932 | 56288 | #endif |
| 54933 | 56289 | |
| 54934 | 56290 | #ifdef __LITTLE_ENDIAN__ |
| 54935 | | #define vmull_high_laneq_s16(__p0_574, __p1_574, __p2_574) __extension__ ({ \ |
| 54936 | | int16x8_t __s0_574 = __p0_574; \ |
| 54937 | | int16x8_t __s1_574 = __p1_574; \ |
| 54938 | | int32x4_t __ret_574; \ |
| 54939 | | __ret_574 = vmull_s16(vget_high_s16(__s0_574), splat_laneq_s16(__s1_574, __p2_574)); \ |
| 54940 | | __ret_574; \ |
| 56291 | #define vmull_high_laneq_s16(__p0_666, __p1_666, __p2_666) __extension__ ({ \ |
| 56292 | int16x8_t __s0_666 = __p0_666; \ |
| 56293 | int16x8_t __s1_666 = __p1_666; \ |
| 56294 | int32x4_t __ret_666; \ |
| 56295 | __ret_666 = vmull_s16(vget_high_s16(__s0_666), splat_laneq_s16(__s1_666, __p2_666)); \ |
| 56296 | __ret_666; \ |
| 54941 | 56297 | }) |
| 54942 | 56298 | #else |
| 54943 | | #define vmull_high_laneq_s16(__p0_575, __p1_575, __p2_575) __extension__ ({ \ |
| 54944 | | int16x8_t __s0_575 = __p0_575; \ |
| 54945 | | int16x8_t __s1_575 = __p1_575; \ |
| 54946 | | int16x8_t __rev0_575; __rev0_575 = __builtin_shufflevector(__s0_575, __s0_575, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54947 | | int16x8_t __rev1_575; __rev1_575 = __builtin_shufflevector(__s1_575, __s1_575, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 54948 | | int32x4_t __ret_575; \ |
| 54949 | | __ret_575 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_575), __noswap_splat_laneq_s16(__rev1_575, __p2_575)); \ |
| 54950 | | __ret_575 = __builtin_shufflevector(__ret_575, __ret_575, 3, 2, 1, 0); \ |
| 54951 | | __ret_575; \ |
| 56299 | #define vmull_high_laneq_s16(__p0_667, __p1_667, __p2_667) __extension__ ({ \ |
| 56300 | int16x8_t __s0_667 = __p0_667; \ |
| 56301 | int16x8_t __s1_667 = __p1_667; \ |
| 56302 | int16x8_t __rev0_667; __rev0_667 = __builtin_shufflevector(__s0_667, __s0_667, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56303 | int16x8_t __rev1_667; __rev1_667 = __builtin_shufflevector(__s1_667, __s1_667, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56304 | int32x4_t __ret_667; \ |
| 56305 | __ret_667 = __noswap_vmull_s16(__noswap_vget_high_s16(__rev0_667), __noswap_splat_laneq_s16(__rev1_667, __p2_667)); \ |
| 56306 | __ret_667 = __builtin_shufflevector(__ret_667, __ret_667, 3, 2, 1, 0); \ |
| 56307 | __ret_667; \ |
| 54952 | 56308 | }) |
| 54953 | 56309 | #endif |
| 54954 | 56310 | |
| ... | ... | @@ -55017,86 +56373,86 @@ __ai int32x4_t vmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 55017 | 56373 | #endif |
| 55018 | 56374 | |
| 55019 | 56375 | #ifdef __LITTLE_ENDIAN__ |
| 55020 | | #define vmull_laneq_u32(__p0_576, __p1_576, __p2_576) __extension__ ({ \ |
| 55021 | | uint32x2_t __s0_576 = __p0_576; \ |
| 55022 | | uint32x4_t __s1_576 = __p1_576; \ |
| 55023 | | uint64x2_t __ret_576; \ |
| 55024 | | __ret_576 = vmull_u32(__s0_576, splat_laneq_u32(__s1_576, __p2_576)); \ |
| 55025 | | __ret_576; \ |
| 56376 | #define vmull_laneq_u32(__p0_668, __p1_668, __p2_668) __extension__ ({ \ |
| 56377 | uint32x2_t __s0_668 = __p0_668; \ |
| 56378 | uint32x4_t __s1_668 = __p1_668; \ |
| 56379 | uint64x2_t __ret_668; \ |
| 56380 | __ret_668 = vmull_u32(__s0_668, splat_laneq_u32(__s1_668, __p2_668)); \ |
| 56381 | __ret_668; \ |
| 55026 | 56382 | }) |
| 55027 | 56383 | #else |
| 55028 | | #define vmull_laneq_u32(__p0_577, __p1_577, __p2_577) __extension__ ({ \ |
| 55029 | | uint32x2_t __s0_577 = __p0_577; \ |
| 55030 | | uint32x4_t __s1_577 = __p1_577; \ |
| 55031 | | uint32x2_t __rev0_577; __rev0_577 = __builtin_shufflevector(__s0_577, __s0_577, 1, 0); \ |
| 55032 | | uint32x4_t __rev1_577; __rev1_577 = __builtin_shufflevector(__s1_577, __s1_577, 3, 2, 1, 0); \ |
| 55033 | | uint64x2_t __ret_577; \ |
| 55034 | | __ret_577 = __noswap_vmull_u32(__rev0_577, __noswap_splat_laneq_u32(__rev1_577, __p2_577)); \ |
| 55035 | | __ret_577 = __builtin_shufflevector(__ret_577, __ret_577, 1, 0); \ |
| 55036 | | __ret_577; \ |
| 56384 | #define vmull_laneq_u32(__p0_669, __p1_669, __p2_669) __extension__ ({ \ |
| 56385 | uint32x2_t __s0_669 = __p0_669; \ |
| 56386 | uint32x4_t __s1_669 = __p1_669; \ |
| 56387 | uint32x2_t __rev0_669; __rev0_669 = __builtin_shufflevector(__s0_669, __s0_669, 1, 0); \ |
| 56388 | uint32x4_t __rev1_669; __rev1_669 = __builtin_shufflevector(__s1_669, __s1_669, 3, 2, 1, 0); \ |
| 56389 | uint64x2_t __ret_669; \ |
| 56390 | __ret_669 = __noswap_vmull_u32(__rev0_669, __noswap_splat_laneq_u32(__rev1_669, __p2_669)); \ |
| 56391 | __ret_669 = __builtin_shufflevector(__ret_669, __ret_669, 1, 0); \ |
| 56392 | __ret_669; \ |
| 55037 | 56393 | }) |
| 55038 | 56394 | #endif |
| 55039 | 56395 | |
| 55040 | 56396 | #ifdef __LITTLE_ENDIAN__ |
| 55041 | | #define vmull_laneq_u16(__p0_578, __p1_578, __p2_578) __extension__ ({ \ |
| 55042 | | uint16x4_t __s0_578 = __p0_578; \ |
| 55043 | | uint16x8_t __s1_578 = __p1_578; \ |
| 55044 | | uint32x4_t __ret_578; \ |
| 55045 | | __ret_578 = vmull_u16(__s0_578, splat_laneq_u16(__s1_578, __p2_578)); \ |
| 55046 | | __ret_578; \ |
| 56397 | #define vmull_laneq_u16(__p0_670, __p1_670, __p2_670) __extension__ ({ \ |
| 56398 | uint16x4_t __s0_670 = __p0_670; \ |
| 56399 | uint16x8_t __s1_670 = __p1_670; \ |
| 56400 | uint32x4_t __ret_670; \ |
| 56401 | __ret_670 = vmull_u16(__s0_670, splat_laneq_u16(__s1_670, __p2_670)); \ |
| 56402 | __ret_670; \ |
| 55047 | 56403 | }) |
| 55048 | 56404 | #else |
| 55049 | | #define vmull_laneq_u16(__p0_579, __p1_579, __p2_579) __extension__ ({ \ |
| 55050 | | uint16x4_t __s0_579 = __p0_579; \ |
| 55051 | | uint16x8_t __s1_579 = __p1_579; \ |
| 55052 | | uint16x4_t __rev0_579; __rev0_579 = __builtin_shufflevector(__s0_579, __s0_579, 3, 2, 1, 0); \ |
| 55053 | | uint16x8_t __rev1_579; __rev1_579 = __builtin_shufflevector(__s1_579, __s1_579, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55054 | | uint32x4_t __ret_579; \ |
| 55055 | | __ret_579 = __noswap_vmull_u16(__rev0_579, __noswap_splat_laneq_u16(__rev1_579, __p2_579)); \ |
| 55056 | | __ret_579 = __builtin_shufflevector(__ret_579, __ret_579, 3, 2, 1, 0); \ |
| 55057 | | __ret_579; \ |
| 56405 | #define vmull_laneq_u16(__p0_671, __p1_671, __p2_671) __extension__ ({ \ |
| 56406 | uint16x4_t __s0_671 = __p0_671; \ |
| 56407 | uint16x8_t __s1_671 = __p1_671; \ |
| 56408 | uint16x4_t __rev0_671; __rev0_671 = __builtin_shufflevector(__s0_671, __s0_671, 3, 2, 1, 0); \ |
| 56409 | uint16x8_t __rev1_671; __rev1_671 = __builtin_shufflevector(__s1_671, __s1_671, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56410 | uint32x4_t __ret_671; \ |
| 56411 | __ret_671 = __noswap_vmull_u16(__rev0_671, __noswap_splat_laneq_u16(__rev1_671, __p2_671)); \ |
| 56412 | __ret_671 = __builtin_shufflevector(__ret_671, __ret_671, 3, 2, 1, 0); \ |
| 56413 | __ret_671; \ |
| 55058 | 56414 | }) |
| 55059 | 56415 | #endif |
| 55060 | 56416 | |
| 55061 | 56417 | #ifdef __LITTLE_ENDIAN__ |
| 55062 | | #define vmull_laneq_s32(__p0_580, __p1_580, __p2_580) __extension__ ({ \ |
| 55063 | | int32x2_t __s0_580 = __p0_580; \ |
| 55064 | | int32x4_t __s1_580 = __p1_580; \ |
| 55065 | | int64x2_t __ret_580; \ |
| 55066 | | __ret_580 = vmull_s32(__s0_580, splat_laneq_s32(__s1_580, __p2_580)); \ |
| 55067 | | __ret_580; \ |
| 56418 | #define vmull_laneq_s32(__p0_672, __p1_672, __p2_672) __extension__ ({ \ |
| 56419 | int32x2_t __s0_672 = __p0_672; \ |
| 56420 | int32x4_t __s1_672 = __p1_672; \ |
| 56421 | int64x2_t __ret_672; \ |
| 56422 | __ret_672 = vmull_s32(__s0_672, splat_laneq_s32(__s1_672, __p2_672)); \ |
| 56423 | __ret_672; \ |
| 55068 | 56424 | }) |
| 55069 | 56425 | #else |
| 55070 | | #define vmull_laneq_s32(__p0_581, __p1_581, __p2_581) __extension__ ({ \ |
| 55071 | | int32x2_t __s0_581 = __p0_581; \ |
| 55072 | | int32x4_t __s1_581 = __p1_581; \ |
| 55073 | | int32x2_t __rev0_581; __rev0_581 = __builtin_shufflevector(__s0_581, __s0_581, 1, 0); \ |
| 55074 | | int32x4_t __rev1_581; __rev1_581 = __builtin_shufflevector(__s1_581, __s1_581, 3, 2, 1, 0); \ |
| 55075 | | int64x2_t __ret_581; \ |
| 55076 | | __ret_581 = __noswap_vmull_s32(__rev0_581, __noswap_splat_laneq_s32(__rev1_581, __p2_581)); \ |
| 55077 | | __ret_581 = __builtin_shufflevector(__ret_581, __ret_581, 1, 0); \ |
| 55078 | | __ret_581; \ |
| 56426 | #define vmull_laneq_s32(__p0_673, __p1_673, __p2_673) __extension__ ({ \ |
| 56427 | int32x2_t __s0_673 = __p0_673; \ |
| 56428 | int32x4_t __s1_673 = __p1_673; \ |
| 56429 | int32x2_t __rev0_673; __rev0_673 = __builtin_shufflevector(__s0_673, __s0_673, 1, 0); \ |
| 56430 | int32x4_t __rev1_673; __rev1_673 = __builtin_shufflevector(__s1_673, __s1_673, 3, 2, 1, 0); \ |
| 56431 | int64x2_t __ret_673; \ |
| 56432 | __ret_673 = __noswap_vmull_s32(__rev0_673, __noswap_splat_laneq_s32(__rev1_673, __p2_673)); \ |
| 56433 | __ret_673 = __builtin_shufflevector(__ret_673, __ret_673, 1, 0); \ |
| 56434 | __ret_673; \ |
| 55079 | 56435 | }) |
| 55080 | 56436 | #endif |
| 55081 | 56437 | |
| 55082 | 56438 | #ifdef __LITTLE_ENDIAN__ |
| 55083 | | #define vmull_laneq_s16(__p0_582, __p1_582, __p2_582) __extension__ ({ \ |
| 55084 | | int16x4_t __s0_582 = __p0_582; \ |
| 55085 | | int16x8_t __s1_582 = __p1_582; \ |
| 55086 | | int32x4_t __ret_582; \ |
| 55087 | | __ret_582 = vmull_s16(__s0_582, splat_laneq_s16(__s1_582, __p2_582)); \ |
| 55088 | | __ret_582; \ |
| 56439 | #define vmull_laneq_s16(__p0_674, __p1_674, __p2_674) __extension__ ({ \ |
| 56440 | int16x4_t __s0_674 = __p0_674; \ |
| 56441 | int16x8_t __s1_674 = __p1_674; \ |
| 56442 | int32x4_t __ret_674; \ |
| 56443 | __ret_674 = vmull_s16(__s0_674, splat_laneq_s16(__s1_674, __p2_674)); \ |
| 56444 | __ret_674; \ |
| 55089 | 56445 | }) |
| 55090 | 56446 | #else |
| 55091 | | #define vmull_laneq_s16(__p0_583, __p1_583, __p2_583) __extension__ ({ \ |
| 55092 | | int16x4_t __s0_583 = __p0_583; \ |
| 55093 | | int16x8_t __s1_583 = __p1_583; \ |
| 55094 | | int16x4_t __rev0_583; __rev0_583 = __builtin_shufflevector(__s0_583, __s0_583, 3, 2, 1, 0); \ |
| 55095 | | int16x8_t __rev1_583; __rev1_583 = __builtin_shufflevector(__s1_583, __s1_583, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 55096 | | int32x4_t __ret_583; \ |
| 55097 | | __ret_583 = __noswap_vmull_s16(__rev0_583, __noswap_splat_laneq_s16(__rev1_583, __p2_583)); \ |
| 55098 | | __ret_583 = __builtin_shufflevector(__ret_583, __ret_583, 3, 2, 1, 0); \ |
| 55099 | | __ret_583; \ |
| 56447 | #define vmull_laneq_s16(__p0_675, __p1_675, __p2_675) __extension__ ({ \ |
| 56448 | int16x4_t __s0_675 = __p0_675; \ |
| 56449 | int16x8_t __s1_675 = __p1_675; \ |
| 56450 | int16x4_t __rev0_675; __rev0_675 = __builtin_shufflevector(__s0_675, __s0_675, 3, 2, 1, 0); \ |
| 56451 | int16x8_t __rev1_675; __rev1_675 = __builtin_shufflevector(__s1_675, __s1_675, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56452 | int32x4_t __ret_675; \ |
| 56453 | __ret_675 = __noswap_vmull_s16(__rev0_675, __noswap_splat_laneq_s16(__rev1_675, __p2_675)); \ |
| 56454 | __ret_675 = __builtin_shufflevector(__ret_675, __ret_675, 3, 2, 1, 0); \ |
| 56455 | __ret_675; \ |
| 55100 | 56456 | }) |
| 55101 | 56457 | #endif |
| 55102 | 56458 | |
| ... | ... | @@ -55181,192 +56537,192 @@ __ai float32_t vmulxs_f32(float32_t __p0, float32_t __p1) { |
| 55181 | 56537 | __ret = (float32_t) __builtin_neon_vmulxs_f32(__p0, __p1); |
| 55182 | 56538 | return __ret; |
| 55183 | 56539 | } |
| 55184 | | #define vmulxd_lane_f64(__p0_584, __p1_584, __p2_584) __extension__ ({ \ |
| 55185 | | float64_t __s0_584 = __p0_584; \ |
| 55186 | | float64x1_t __s1_584 = __p1_584; \ |
| 55187 | | float64_t __ret_584; \ |
| 55188 | | __ret_584 = vmulxd_f64(__s0_584, vget_lane_f64(__s1_584, __p2_584)); \ |
| 55189 | | __ret_584; \ |
| 56540 | #define vmulxd_lane_f64(__p0_676, __p1_676, __p2_676) __extension__ ({ \ |
| 56541 | float64_t __s0_676 = __p0_676; \ |
| 56542 | float64x1_t __s1_676 = __p1_676; \ |
| 56543 | float64_t __ret_676; \ |
| 56544 | __ret_676 = vmulxd_f64(__s0_676, vget_lane_f64(__s1_676, __p2_676)); \ |
| 56545 | __ret_676; \ |
| 55190 | 56546 | }) |
| 55191 | 56547 | #ifdef __LITTLE_ENDIAN__ |
| 55192 | | #define vmulxs_lane_f32(__p0_585, __p1_585, __p2_585) __extension__ ({ \ |
| 55193 | | float32_t __s0_585 = __p0_585; \ |
| 55194 | | float32x2_t __s1_585 = __p1_585; \ |
| 55195 | | float32_t __ret_585; \ |
| 55196 | | __ret_585 = vmulxs_f32(__s0_585, vget_lane_f32(__s1_585, __p2_585)); \ |
| 55197 | | __ret_585; \ |
| 56548 | #define vmulxs_lane_f32(__p0_677, __p1_677, __p2_677) __extension__ ({ \ |
| 56549 | float32_t __s0_677 = __p0_677; \ |
| 56550 | float32x2_t __s1_677 = __p1_677; \ |
| 56551 | float32_t __ret_677; \ |
| 56552 | __ret_677 = vmulxs_f32(__s0_677, vget_lane_f32(__s1_677, __p2_677)); \ |
| 56553 | __ret_677; \ |
| 55198 | 56554 | }) |
| 55199 | 56555 | #else |
| 55200 | | #define vmulxs_lane_f32(__p0_586, __p1_586, __p2_586) __extension__ ({ \ |
| 55201 | | float32_t __s0_586 = __p0_586; \ |
| 55202 | | float32x2_t __s1_586 = __p1_586; \ |
| 55203 | | float32x2_t __rev1_586; __rev1_586 = __builtin_shufflevector(__s1_586, __s1_586, 1, 0); \ |
| 55204 | | float32_t __ret_586; \ |
| 55205 | | __ret_586 = vmulxs_f32(__s0_586, __noswap_vget_lane_f32(__rev1_586, __p2_586)); \ |
| 55206 | | __ret_586; \ |
| 56556 | #define vmulxs_lane_f32(__p0_678, __p1_678, __p2_678) __extension__ ({ \ |
| 56557 | float32_t __s0_678 = __p0_678; \ |
| 56558 | float32x2_t __s1_678 = __p1_678; \ |
| 56559 | float32x2_t __rev1_678; __rev1_678 = __builtin_shufflevector(__s1_678, __s1_678, 1, 0); \ |
| 56560 | float32_t __ret_678; \ |
| 56561 | __ret_678 = vmulxs_f32(__s0_678, __noswap_vget_lane_f32(__rev1_678, __p2_678)); \ |
| 56562 | __ret_678; \ |
| 55207 | 56563 | }) |
| 55208 | 56564 | #endif |
| 55209 | 56565 | |
| 55210 | 56566 | #ifdef __LITTLE_ENDIAN__ |
| 55211 | | #define vmulxq_lane_f64(__p0_587, __p1_587, __p2_587) __extension__ ({ \ |
| 55212 | | float64x2_t __s0_587 = __p0_587; \ |
| 55213 | | float64x1_t __s1_587 = __p1_587; \ |
| 55214 | | float64x2_t __ret_587; \ |
| 55215 | | __ret_587 = vmulxq_f64(__s0_587, splatq_lane_f64(__s1_587, __p2_587)); \ |
| 55216 | | __ret_587; \ |
| 56567 | #define vmulxq_lane_f64(__p0_679, __p1_679, __p2_679) __extension__ ({ \ |
| 56568 | float64x2_t __s0_679 = __p0_679; \ |
| 56569 | float64x1_t __s1_679 = __p1_679; \ |
| 56570 | float64x2_t __ret_679; \ |
| 56571 | __ret_679 = vmulxq_f64(__s0_679, splatq_lane_f64(__s1_679, __p2_679)); \ |
| 56572 | __ret_679; \ |
| 55217 | 56573 | }) |
| 55218 | 56574 | #else |
| 55219 | | #define vmulxq_lane_f64(__p0_588, __p1_588, __p2_588) __extension__ ({ \ |
| 55220 | | float64x2_t __s0_588 = __p0_588; \ |
| 55221 | | float64x1_t __s1_588 = __p1_588; \ |
| 55222 | | float64x2_t __rev0_588; __rev0_588 = __builtin_shufflevector(__s0_588, __s0_588, 1, 0); \ |
| 55223 | | float64x2_t __ret_588; \ |
| 55224 | | __ret_588 = __noswap_vmulxq_f64(__rev0_588, __noswap_splatq_lane_f64(__s1_588, __p2_588)); \ |
| 55225 | | __ret_588 = __builtin_shufflevector(__ret_588, __ret_588, 1, 0); \ |
| 55226 | | __ret_588; \ |
| 56575 | #define vmulxq_lane_f64(__p0_680, __p1_680, __p2_680) __extension__ ({ \ |
| 56576 | float64x2_t __s0_680 = __p0_680; \ |
| 56577 | float64x1_t __s1_680 = __p1_680; \ |
| 56578 | float64x2_t __rev0_680; __rev0_680 = __builtin_shufflevector(__s0_680, __s0_680, 1, 0); \ |
| 56579 | float64x2_t __ret_680; \ |
| 56580 | __ret_680 = __noswap_vmulxq_f64(__rev0_680, __noswap_splatq_lane_f64(__s1_680, __p2_680)); \ |
| 56581 | __ret_680 = __builtin_shufflevector(__ret_680, __ret_680, 1, 0); \ |
| 56582 | __ret_680; \ |
| 55227 | 56583 | }) |
| 55228 | 56584 | #endif |
| 55229 | 56585 | |
| 55230 | 56586 | #ifdef __LITTLE_ENDIAN__ |
| 55231 | | #define vmulxq_lane_f32(__p0_589, __p1_589, __p2_589) __extension__ ({ \ |
| 55232 | | float32x4_t __s0_589 = __p0_589; \ |
| 55233 | | float32x2_t __s1_589 = __p1_589; \ |
| 55234 | | float32x4_t __ret_589; \ |
| 55235 | | __ret_589 = vmulxq_f32(__s0_589, splatq_lane_f32(__s1_589, __p2_589)); \ |
| 55236 | | __ret_589; \ |
| 56587 | #define vmulxq_lane_f32(__p0_681, __p1_681, __p2_681) __extension__ ({ \ |
| 56588 | float32x4_t __s0_681 = __p0_681; \ |
| 56589 | float32x2_t __s1_681 = __p1_681; \ |
| 56590 | float32x4_t __ret_681; \ |
| 56591 | __ret_681 = vmulxq_f32(__s0_681, splatq_lane_f32(__s1_681, __p2_681)); \ |
| 56592 | __ret_681; \ |
| 55237 | 56593 | }) |
| 55238 | 56594 | #else |
| 55239 | | #define vmulxq_lane_f32(__p0_590, __p1_590, __p2_590) __extension__ ({ \ |
| 55240 | | float32x4_t __s0_590 = __p0_590; \ |
| 55241 | | float32x2_t __s1_590 = __p1_590; \ |
| 55242 | | float32x4_t __rev0_590; __rev0_590 = __builtin_shufflevector(__s0_590, __s0_590, 3, 2, 1, 0); \ |
| 55243 | | float32x2_t __rev1_590; __rev1_590 = __builtin_shufflevector(__s1_590, __s1_590, 1, 0); \ |
| 55244 | | float32x4_t __ret_590; \ |
| 55245 | | __ret_590 = __noswap_vmulxq_f32(__rev0_590, __noswap_splatq_lane_f32(__rev1_590, __p2_590)); \ |
| 55246 | | __ret_590 = __builtin_shufflevector(__ret_590, __ret_590, 3, 2, 1, 0); \ |
| 55247 | | __ret_590; \ |
| 56595 | #define vmulxq_lane_f32(__p0_682, __p1_682, __p2_682) __extension__ ({ \ |
| 56596 | float32x4_t __s0_682 = __p0_682; \ |
| 56597 | float32x2_t __s1_682 = __p1_682; \ |
| 56598 | float32x4_t __rev0_682; __rev0_682 = __builtin_shufflevector(__s0_682, __s0_682, 3, 2, 1, 0); \ |
| 56599 | float32x2_t __rev1_682; __rev1_682 = __builtin_shufflevector(__s1_682, __s1_682, 1, 0); \ |
| 56600 | float32x4_t __ret_682; \ |
| 56601 | __ret_682 = __noswap_vmulxq_f32(__rev0_682, __noswap_splatq_lane_f32(__rev1_682, __p2_682)); \ |
| 56602 | __ret_682 = __builtin_shufflevector(__ret_682, __ret_682, 3, 2, 1, 0); \ |
| 56603 | __ret_682; \ |
| 55248 | 56604 | }) |
| 55249 | 56605 | #endif |
| 55250 | 56606 | |
| 55251 | 56607 | #ifdef __LITTLE_ENDIAN__ |
| 55252 | | #define vmulx_lane_f32(__p0_591, __p1_591, __p2_591) __extension__ ({ \ |
| 55253 | | float32x2_t __s0_591 = __p0_591; \ |
| 55254 | | float32x2_t __s1_591 = __p1_591; \ |
| 55255 | | float32x2_t __ret_591; \ |
| 55256 | | __ret_591 = vmulx_f32(__s0_591, splat_lane_f32(__s1_591, __p2_591)); \ |
| 55257 | | __ret_591; \ |
| 56608 | #define vmulx_lane_f32(__p0_683, __p1_683, __p2_683) __extension__ ({ \ |
| 56609 | float32x2_t __s0_683 = __p0_683; \ |
| 56610 | float32x2_t __s1_683 = __p1_683; \ |
| 56611 | float32x2_t __ret_683; \ |
| 56612 | __ret_683 = vmulx_f32(__s0_683, splat_lane_f32(__s1_683, __p2_683)); \ |
| 56613 | __ret_683; \ |
| 55258 | 56614 | }) |
| 55259 | 56615 | #else |
| 55260 | | #define vmulx_lane_f32(__p0_592, __p1_592, __p2_592) __extension__ ({ \ |
| 55261 | | float32x2_t __s0_592 = __p0_592; \ |
| 55262 | | float32x2_t __s1_592 = __p1_592; \ |
| 55263 | | float32x2_t __rev0_592; __rev0_592 = __builtin_shufflevector(__s0_592, __s0_592, 1, 0); \ |
| 55264 | | float32x2_t __rev1_592; __rev1_592 = __builtin_shufflevector(__s1_592, __s1_592, 1, 0); \ |
| 55265 | | float32x2_t __ret_592; \ |
| 55266 | | __ret_592 = __noswap_vmulx_f32(__rev0_592, __noswap_splat_lane_f32(__rev1_592, __p2_592)); \ |
| 55267 | | __ret_592 = __builtin_shufflevector(__ret_592, __ret_592, 1, 0); \ |
| 55268 | | __ret_592; \ |
| 56616 | #define vmulx_lane_f32(__p0_684, __p1_684, __p2_684) __extension__ ({ \ |
| 56617 | float32x2_t __s0_684 = __p0_684; \ |
| 56618 | float32x2_t __s1_684 = __p1_684; \ |
| 56619 | float32x2_t __rev0_684; __rev0_684 = __builtin_shufflevector(__s0_684, __s0_684, 1, 0); \ |
| 56620 | float32x2_t __rev1_684; __rev1_684 = __builtin_shufflevector(__s1_684, __s1_684, 1, 0); \ |
| 56621 | float32x2_t __ret_684; \ |
| 56622 | __ret_684 = __noswap_vmulx_f32(__rev0_684, __noswap_splat_lane_f32(__rev1_684, __p2_684)); \ |
| 56623 | __ret_684 = __builtin_shufflevector(__ret_684, __ret_684, 1, 0); \ |
| 56624 | __ret_684; \ |
| 55269 | 56625 | }) |
| 55270 | 56626 | #endif |
| 55271 | 56627 | |
| 55272 | 56628 | #ifdef __LITTLE_ENDIAN__ |
| 55273 | | #define vmulxd_laneq_f64(__p0_593, __p1_593, __p2_593) __extension__ ({ \ |
| 55274 | | float64_t __s0_593 = __p0_593; \ |
| 55275 | | float64x2_t __s1_593 = __p1_593; \ |
| 55276 | | float64_t __ret_593; \ |
| 55277 | | __ret_593 = vmulxd_f64(__s0_593, vgetq_lane_f64(__s1_593, __p2_593)); \ |
| 55278 | | __ret_593; \ |
| 56629 | #define vmulxd_laneq_f64(__p0_685, __p1_685, __p2_685) __extension__ ({ \ |
| 56630 | float64_t __s0_685 = __p0_685; \ |
| 56631 | float64x2_t __s1_685 = __p1_685; \ |
| 56632 | float64_t __ret_685; \ |
| 56633 | __ret_685 = vmulxd_f64(__s0_685, vgetq_lane_f64(__s1_685, __p2_685)); \ |
| 56634 | __ret_685; \ |
| 55279 | 56635 | }) |
| 55280 | 56636 | #else |
| 55281 | | #define vmulxd_laneq_f64(__p0_594, __p1_594, __p2_594) __extension__ ({ \ |
| 55282 | | float64_t __s0_594 = __p0_594; \ |
| 55283 | | float64x2_t __s1_594 = __p1_594; \ |
| 55284 | | float64x2_t __rev1_594; __rev1_594 = __builtin_shufflevector(__s1_594, __s1_594, 1, 0); \ |
| 55285 | | float64_t __ret_594; \ |
| 55286 | | __ret_594 = vmulxd_f64(__s0_594, __noswap_vgetq_lane_f64(__rev1_594, __p2_594)); \ |
| 55287 | | __ret_594; \ |
| 56637 | #define vmulxd_laneq_f64(__p0_686, __p1_686, __p2_686) __extension__ ({ \ |
| 56638 | float64_t __s0_686 = __p0_686; \ |
| 56639 | float64x2_t __s1_686 = __p1_686; \ |
| 56640 | float64x2_t __rev1_686; __rev1_686 = __builtin_shufflevector(__s1_686, __s1_686, 1, 0); \ |
| 56641 | float64_t __ret_686; \ |
| 56642 | __ret_686 = vmulxd_f64(__s0_686, __noswap_vgetq_lane_f64(__rev1_686, __p2_686)); \ |
| 56643 | __ret_686; \ |
| 55288 | 56644 | }) |
| 55289 | 56645 | #endif |
| 55290 | 56646 | |
| 55291 | 56647 | #ifdef __LITTLE_ENDIAN__ |
| 55292 | | #define vmulxs_laneq_f32(__p0_595, __p1_595, __p2_595) __extension__ ({ \ |
| 55293 | | float32_t __s0_595 = __p0_595; \ |
| 55294 | | float32x4_t __s1_595 = __p1_595; \ |
| 55295 | | float32_t __ret_595; \ |
| 55296 | | __ret_595 = vmulxs_f32(__s0_595, vgetq_lane_f32(__s1_595, __p2_595)); \ |
| 55297 | | __ret_595; \ |
| 56648 | #define vmulxs_laneq_f32(__p0_687, __p1_687, __p2_687) __extension__ ({ \ |
| 56649 | float32_t __s0_687 = __p0_687; \ |
| 56650 | float32x4_t __s1_687 = __p1_687; \ |
| 56651 | float32_t __ret_687; \ |
| 56652 | __ret_687 = vmulxs_f32(__s0_687, vgetq_lane_f32(__s1_687, __p2_687)); \ |
| 56653 | __ret_687; \ |
| 55298 | 56654 | }) |
| 55299 | 56655 | #else |
| 55300 | | #define vmulxs_laneq_f32(__p0_596, __p1_596, __p2_596) __extension__ ({ \ |
| 55301 | | float32_t __s0_596 = __p0_596; \ |
| 55302 | | float32x4_t __s1_596 = __p1_596; \ |
| 55303 | | float32x4_t __rev1_596; __rev1_596 = __builtin_shufflevector(__s1_596, __s1_596, 3, 2, 1, 0); \ |
| 55304 | | float32_t __ret_596; \ |
| 55305 | | __ret_596 = vmulxs_f32(__s0_596, __noswap_vgetq_lane_f32(__rev1_596, __p2_596)); \ |
| 55306 | | __ret_596; \ |
| 56656 | #define vmulxs_laneq_f32(__p0_688, __p1_688, __p2_688) __extension__ ({ \ |
| 56657 | float32_t __s0_688 = __p0_688; \ |
| 56658 | float32x4_t __s1_688 = __p1_688; \ |
| 56659 | float32x4_t __rev1_688; __rev1_688 = __builtin_shufflevector(__s1_688, __s1_688, 3, 2, 1, 0); \ |
| 56660 | float32_t __ret_688; \ |
| 56661 | __ret_688 = vmulxs_f32(__s0_688, __noswap_vgetq_lane_f32(__rev1_688, __p2_688)); \ |
| 56662 | __ret_688; \ |
| 55307 | 56663 | }) |
| 55308 | 56664 | #endif |
| 55309 | 56665 | |
| 55310 | 56666 | #ifdef __LITTLE_ENDIAN__ |
| 55311 | | #define vmulxq_laneq_f64(__p0_597, __p1_597, __p2_597) __extension__ ({ \ |
| 55312 | | float64x2_t __s0_597 = __p0_597; \ |
| 55313 | | float64x2_t __s1_597 = __p1_597; \ |
| 55314 | | float64x2_t __ret_597; \ |
| 55315 | | __ret_597 = vmulxq_f64(__s0_597, splatq_laneq_f64(__s1_597, __p2_597)); \ |
| 55316 | | __ret_597; \ |
| 56667 | #define vmulxq_laneq_f64(__p0_689, __p1_689, __p2_689) __extension__ ({ \ |
| 56668 | float64x2_t __s0_689 = __p0_689; \ |
| 56669 | float64x2_t __s1_689 = __p1_689; \ |
| 56670 | float64x2_t __ret_689; \ |
| 56671 | __ret_689 = vmulxq_f64(__s0_689, splatq_laneq_f64(__s1_689, __p2_689)); \ |
| 56672 | __ret_689; \ |
| 55317 | 56673 | }) |
| 55318 | 56674 | #else |
| 55319 | | #define vmulxq_laneq_f64(__p0_598, __p1_598, __p2_598) __extension__ ({ \ |
| 55320 | | float64x2_t __s0_598 = __p0_598; \ |
| 55321 | | float64x2_t __s1_598 = __p1_598; \ |
| 55322 | | float64x2_t __rev0_598; __rev0_598 = __builtin_shufflevector(__s0_598, __s0_598, 1, 0); \ |
| 55323 | | float64x2_t __rev1_598; __rev1_598 = __builtin_shufflevector(__s1_598, __s1_598, 1, 0); \ |
| 55324 | | float64x2_t __ret_598; \ |
| 55325 | | __ret_598 = __noswap_vmulxq_f64(__rev0_598, __noswap_splatq_laneq_f64(__rev1_598, __p2_598)); \ |
| 55326 | | __ret_598 = __builtin_shufflevector(__ret_598, __ret_598, 1, 0); \ |
| 55327 | | __ret_598; \ |
| 56675 | #define vmulxq_laneq_f64(__p0_690, __p1_690, __p2_690) __extension__ ({ \ |
| 56676 | float64x2_t __s0_690 = __p0_690; \ |
| 56677 | float64x2_t __s1_690 = __p1_690; \ |
| 56678 | float64x2_t __rev0_690; __rev0_690 = __builtin_shufflevector(__s0_690, __s0_690, 1, 0); \ |
| 56679 | float64x2_t __rev1_690; __rev1_690 = __builtin_shufflevector(__s1_690, __s1_690, 1, 0); \ |
| 56680 | float64x2_t __ret_690; \ |
| 56681 | __ret_690 = __noswap_vmulxq_f64(__rev0_690, __noswap_splatq_laneq_f64(__rev1_690, __p2_690)); \ |
| 56682 | __ret_690 = __builtin_shufflevector(__ret_690, __ret_690, 1, 0); \ |
| 56683 | __ret_690; \ |
| 55328 | 56684 | }) |
| 55329 | 56685 | #endif |
| 55330 | 56686 | |
| 55331 | 56687 | #ifdef __LITTLE_ENDIAN__ |
| 55332 | | #define vmulxq_laneq_f32(__p0_599, __p1_599, __p2_599) __extension__ ({ \ |
| 55333 | | float32x4_t __s0_599 = __p0_599; \ |
| 55334 | | float32x4_t __s1_599 = __p1_599; \ |
| 55335 | | float32x4_t __ret_599; \ |
| 55336 | | __ret_599 = vmulxq_f32(__s0_599, splatq_laneq_f32(__s1_599, __p2_599)); \ |
| 55337 | | __ret_599; \ |
| 56688 | #define vmulxq_laneq_f32(__p0_691, __p1_691, __p2_691) __extension__ ({ \ |
| 56689 | float32x4_t __s0_691 = __p0_691; \ |
| 56690 | float32x4_t __s1_691 = __p1_691; \ |
| 56691 | float32x4_t __ret_691; \ |
| 56692 | __ret_691 = vmulxq_f32(__s0_691, splatq_laneq_f32(__s1_691, __p2_691)); \ |
| 56693 | __ret_691; \ |
| 55338 | 56694 | }) |
| 55339 | 56695 | #else |
| 55340 | | #define vmulxq_laneq_f32(__p0_600, __p1_600, __p2_600) __extension__ ({ \ |
| 55341 | | float32x4_t __s0_600 = __p0_600; \ |
| 55342 | | float32x4_t __s1_600 = __p1_600; \ |
| 55343 | | float32x4_t __rev0_600; __rev0_600 = __builtin_shufflevector(__s0_600, __s0_600, 3, 2, 1, 0); \ |
| 55344 | | float32x4_t __rev1_600; __rev1_600 = __builtin_shufflevector(__s1_600, __s1_600, 3, 2, 1, 0); \ |
| 55345 | | float32x4_t __ret_600; \ |
| 55346 | | __ret_600 = __noswap_vmulxq_f32(__rev0_600, __noswap_splatq_laneq_f32(__rev1_600, __p2_600)); \ |
| 55347 | | __ret_600 = __builtin_shufflevector(__ret_600, __ret_600, 3, 2, 1, 0); \ |
| 55348 | | __ret_600; \ |
| 56696 | #define vmulxq_laneq_f32(__p0_692, __p1_692, __p2_692) __extension__ ({ \ |
| 56697 | float32x4_t __s0_692 = __p0_692; \ |
| 56698 | float32x4_t __s1_692 = __p1_692; \ |
| 56699 | float32x4_t __rev0_692; __rev0_692 = __builtin_shufflevector(__s0_692, __s0_692, 3, 2, 1, 0); \ |
| 56700 | float32x4_t __rev1_692; __rev1_692 = __builtin_shufflevector(__s1_692, __s1_692, 3, 2, 1, 0); \ |
| 56701 | float32x4_t __ret_692; \ |
| 56702 | __ret_692 = __noswap_vmulxq_f32(__rev0_692, __noswap_splatq_laneq_f32(__rev1_692, __p2_692)); \ |
| 56703 | __ret_692 = __builtin_shufflevector(__ret_692, __ret_692, 3, 2, 1, 0); \ |
| 56704 | __ret_692; \ |
| 55349 | 56705 | }) |
| 55350 | 56706 | #endif |
| 55351 | 56707 | |
| 55352 | 56708 | #ifdef __LITTLE_ENDIAN__ |
| 55353 | | #define vmulx_laneq_f32(__p0_601, __p1_601, __p2_601) __extension__ ({ \ |
| 55354 | | float32x2_t __s0_601 = __p0_601; \ |
| 55355 | | float32x4_t __s1_601 = __p1_601; \ |
| 55356 | | float32x2_t __ret_601; \ |
| 55357 | | __ret_601 = vmulx_f32(__s0_601, splat_laneq_f32(__s1_601, __p2_601)); \ |
| 55358 | | __ret_601; \ |
| 56709 | #define vmulx_laneq_f32(__p0_693, __p1_693, __p2_693) __extension__ ({ \ |
| 56710 | float32x2_t __s0_693 = __p0_693; \ |
| 56711 | float32x4_t __s1_693 = __p1_693; \ |
| 56712 | float32x2_t __ret_693; \ |
| 56713 | __ret_693 = vmulx_f32(__s0_693, splat_laneq_f32(__s1_693, __p2_693)); \ |
| 56714 | __ret_693; \ |
| 55359 | 56715 | }) |
| 55360 | 56716 | #else |
| 55361 | | #define vmulx_laneq_f32(__p0_602, __p1_602, __p2_602) __extension__ ({ \ |
| 55362 | | float32x2_t __s0_602 = __p0_602; \ |
| 55363 | | float32x4_t __s1_602 = __p1_602; \ |
| 55364 | | float32x2_t __rev0_602; __rev0_602 = __builtin_shufflevector(__s0_602, __s0_602, 1, 0); \ |
| 55365 | | float32x4_t __rev1_602; __rev1_602 = __builtin_shufflevector(__s1_602, __s1_602, 3, 2, 1, 0); \ |
| 55366 | | float32x2_t __ret_602; \ |
| 55367 | | __ret_602 = __noswap_vmulx_f32(__rev0_602, __noswap_splat_laneq_f32(__rev1_602, __p2_602)); \ |
| 55368 | | __ret_602 = __builtin_shufflevector(__ret_602, __ret_602, 1, 0); \ |
| 55369 | | __ret_602; \ |
| 56717 | #define vmulx_laneq_f32(__p0_694, __p1_694, __p2_694) __extension__ ({ \ |
| 56718 | float32x2_t __s0_694 = __p0_694; \ |
| 56719 | float32x4_t __s1_694 = __p1_694; \ |
| 56720 | float32x2_t __rev0_694; __rev0_694 = __builtin_shufflevector(__s0_694, __s0_694, 1, 0); \ |
| 56721 | float32x4_t __rev1_694; __rev1_694 = __builtin_shufflevector(__s1_694, __s1_694, 3, 2, 1, 0); \ |
| 56722 | float32x2_t __ret_694; \ |
| 56723 | __ret_694 = __noswap_vmulx_f32(__rev0_694, __noswap_splat_laneq_f32(__rev1_694, __p2_694)); \ |
| 56724 | __ret_694 = __builtin_shufflevector(__ret_694, __ret_694, 1, 0); \ |
| 56725 | __ret_694; \ |
| 55370 | 56726 | }) |
| 55371 | 56727 | #endif |
| 55372 | 56728 | |
| ... | ... | @@ -56269,98 +57625,98 @@ __ai int32x4_t vqdmlal_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) |
| 56269 | 57625 | #endif |
| 56270 | 57626 | |
| 56271 | 57627 | #ifdef __LITTLE_ENDIAN__ |
| 56272 | | #define vqdmlal_high_lane_s32(__p0_603, __p1_603, __p2_603, __p3_603) __extension__ ({ \ |
| 56273 | | int64x2_t __s0_603 = __p0_603; \ |
| 56274 | | int32x4_t __s1_603 = __p1_603; \ |
| 56275 | | int32x2_t __s2_603 = __p2_603; \ |
| 56276 | | int64x2_t __ret_603; \ |
| 56277 | | __ret_603 = vqdmlal_s32(__s0_603, vget_high_s32(__s1_603), splat_lane_s32(__s2_603, __p3_603)); \ |
| 56278 | | __ret_603; \ |
| 57628 | #define vqdmlal_high_lane_s32(__p0_695, __p1_695, __p2_695, __p3_695) __extension__ ({ \ |
| 57629 | int64x2_t __s0_695 = __p0_695; \ |
| 57630 | int32x4_t __s1_695 = __p1_695; \ |
| 57631 | int32x2_t __s2_695 = __p2_695; \ |
| 57632 | int64x2_t __ret_695; \ |
| 57633 | __ret_695 = vqdmlal_s32(__s0_695, vget_high_s32(__s1_695), splat_lane_s32(__s2_695, __p3_695)); \ |
| 57634 | __ret_695; \ |
| 56279 | 57635 | }) |
| 56280 | 57636 | #else |
| 56281 | | #define vqdmlal_high_lane_s32(__p0_604, __p1_604, __p2_604, __p3_604) __extension__ ({ \ |
| 56282 | | int64x2_t __s0_604 = __p0_604; \ |
| 56283 | | int32x4_t __s1_604 = __p1_604; \ |
| 56284 | | int32x2_t __s2_604 = __p2_604; \ |
| 56285 | | int64x2_t __rev0_604; __rev0_604 = __builtin_shufflevector(__s0_604, __s0_604, 1, 0); \ |
| 56286 | | int32x4_t __rev1_604; __rev1_604 = __builtin_shufflevector(__s1_604, __s1_604, 3, 2, 1, 0); \ |
| 56287 | | int32x2_t __rev2_604; __rev2_604 = __builtin_shufflevector(__s2_604, __s2_604, 1, 0); \ |
| 56288 | | int64x2_t __ret_604; \ |
| 56289 | | __ret_604 = __noswap_vqdmlal_s32(__rev0_604, __noswap_vget_high_s32(__rev1_604), __noswap_splat_lane_s32(__rev2_604, __p3_604)); \ |
| 56290 | | __ret_604 = __builtin_shufflevector(__ret_604, __ret_604, 1, 0); \ |
| 56291 | | __ret_604; \ |
| 57637 | #define vqdmlal_high_lane_s32(__p0_696, __p1_696, __p2_696, __p3_696) __extension__ ({ \ |
| 57638 | int64x2_t __s0_696 = __p0_696; \ |
| 57639 | int32x4_t __s1_696 = __p1_696; \ |
| 57640 | int32x2_t __s2_696 = __p2_696; \ |
| 57641 | int64x2_t __rev0_696; __rev0_696 = __builtin_shufflevector(__s0_696, __s0_696, 1, 0); \ |
| 57642 | int32x4_t __rev1_696; __rev1_696 = __builtin_shufflevector(__s1_696, __s1_696, 3, 2, 1, 0); \ |
| 57643 | int32x2_t __rev2_696; __rev2_696 = __builtin_shufflevector(__s2_696, __s2_696, 1, 0); \ |
| 57644 | int64x2_t __ret_696; \ |
| 57645 | __ret_696 = __noswap_vqdmlal_s32(__rev0_696, __noswap_vget_high_s32(__rev1_696), __noswap_splat_lane_s32(__rev2_696, __p3_696)); \ |
| 57646 | __ret_696 = __builtin_shufflevector(__ret_696, __ret_696, 1, 0); \ |
| 57647 | __ret_696; \ |
| 56292 | 57648 | }) |
| 56293 | 57649 | #endif |
| 56294 | 57650 | |
| 56295 | 57651 | #ifdef __LITTLE_ENDIAN__ |
| 56296 | | #define vqdmlal_high_lane_s16(__p0_605, __p1_605, __p2_605, __p3_605) __extension__ ({ \ |
| 56297 | | int32x4_t __s0_605 = __p0_605; \ |
| 56298 | | int16x8_t __s1_605 = __p1_605; \ |
| 56299 | | int16x4_t __s2_605 = __p2_605; \ |
| 56300 | | int32x4_t __ret_605; \ |
| 56301 | | __ret_605 = vqdmlal_s16(__s0_605, vget_high_s16(__s1_605), splat_lane_s16(__s2_605, __p3_605)); \ |
| 56302 | | __ret_605; \ |
| 57652 | #define vqdmlal_high_lane_s16(__p0_697, __p1_697, __p2_697, __p3_697) __extension__ ({ \ |
| 57653 | int32x4_t __s0_697 = __p0_697; \ |
| 57654 | int16x8_t __s1_697 = __p1_697; \ |
| 57655 | int16x4_t __s2_697 = __p2_697; \ |
| 57656 | int32x4_t __ret_697; \ |
| 57657 | __ret_697 = vqdmlal_s16(__s0_697, vget_high_s16(__s1_697), splat_lane_s16(__s2_697, __p3_697)); \ |
| 57658 | __ret_697; \ |
| 56303 | 57659 | }) |
| 56304 | 57660 | #else |
| 56305 | | #define vqdmlal_high_lane_s16(__p0_606, __p1_606, __p2_606, __p3_606) __extension__ ({ \ |
| 56306 | | int32x4_t __s0_606 = __p0_606; \ |
| 56307 | | int16x8_t __s1_606 = __p1_606; \ |
| 56308 | | int16x4_t __s2_606 = __p2_606; \ |
| 56309 | | int32x4_t __rev0_606; __rev0_606 = __builtin_shufflevector(__s0_606, __s0_606, 3, 2, 1, 0); \ |
| 56310 | | int16x8_t __rev1_606; __rev1_606 = __builtin_shufflevector(__s1_606, __s1_606, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56311 | | int16x4_t __rev2_606; __rev2_606 = __builtin_shufflevector(__s2_606, __s2_606, 3, 2, 1, 0); \ |
| 56312 | | int32x4_t __ret_606; \ |
| 56313 | | __ret_606 = __noswap_vqdmlal_s16(__rev0_606, __noswap_vget_high_s16(__rev1_606), __noswap_splat_lane_s16(__rev2_606, __p3_606)); \ |
| 56314 | | __ret_606 = __builtin_shufflevector(__ret_606, __ret_606, 3, 2, 1, 0); \ |
| 56315 | | __ret_606; \ |
| 57661 | #define vqdmlal_high_lane_s16(__p0_698, __p1_698, __p2_698, __p3_698) __extension__ ({ \ |
| 57662 | int32x4_t __s0_698 = __p0_698; \ |
| 57663 | int16x8_t __s1_698 = __p1_698; \ |
| 57664 | int16x4_t __s2_698 = __p2_698; \ |
| 57665 | int32x4_t __rev0_698; __rev0_698 = __builtin_shufflevector(__s0_698, __s0_698, 3, 2, 1, 0); \ |
| 57666 | int16x8_t __rev1_698; __rev1_698 = __builtin_shufflevector(__s1_698, __s1_698, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57667 | int16x4_t __rev2_698; __rev2_698 = __builtin_shufflevector(__s2_698, __s2_698, 3, 2, 1, 0); \ |
| 57668 | int32x4_t __ret_698; \ |
| 57669 | __ret_698 = __noswap_vqdmlal_s16(__rev0_698, __noswap_vget_high_s16(__rev1_698), __noswap_splat_lane_s16(__rev2_698, __p3_698)); \ |
| 57670 | __ret_698 = __builtin_shufflevector(__ret_698, __ret_698, 3, 2, 1, 0); \ |
| 57671 | __ret_698; \ |
| 56316 | 57672 | }) |
| 56317 | 57673 | #endif |
| 56318 | 57674 | |
| 56319 | 57675 | #ifdef __LITTLE_ENDIAN__ |
| 56320 | | #define vqdmlal_high_laneq_s32(__p0_607, __p1_607, __p2_607, __p3_607) __extension__ ({ \ |
| 56321 | | int64x2_t __s0_607 = __p0_607; \ |
| 56322 | | int32x4_t __s1_607 = __p1_607; \ |
| 56323 | | int32x4_t __s2_607 = __p2_607; \ |
| 56324 | | int64x2_t __ret_607; \ |
| 56325 | | __ret_607 = vqdmlal_s32(__s0_607, vget_high_s32(__s1_607), splat_laneq_s32(__s2_607, __p3_607)); \ |
| 56326 | | __ret_607; \ |
| 57676 | #define vqdmlal_high_laneq_s32(__p0_699, __p1_699, __p2_699, __p3_699) __extension__ ({ \ |
| 57677 | int64x2_t __s0_699 = __p0_699; \ |
| 57678 | int32x4_t __s1_699 = __p1_699; \ |
| 57679 | int32x4_t __s2_699 = __p2_699; \ |
| 57680 | int64x2_t __ret_699; \ |
| 57681 | __ret_699 = vqdmlal_s32(__s0_699, vget_high_s32(__s1_699), splat_laneq_s32(__s2_699, __p3_699)); \ |
| 57682 | __ret_699; \ |
| 56327 | 57683 | }) |
| 56328 | 57684 | #else |
| 56329 | | #define vqdmlal_high_laneq_s32(__p0_608, __p1_608, __p2_608, __p3_608) __extension__ ({ \ |
| 56330 | | int64x2_t __s0_608 = __p0_608; \ |
| 56331 | | int32x4_t __s1_608 = __p1_608; \ |
| 56332 | | int32x4_t __s2_608 = __p2_608; \ |
| 56333 | | int64x2_t __rev0_608; __rev0_608 = __builtin_shufflevector(__s0_608, __s0_608, 1, 0); \ |
| 56334 | | int32x4_t __rev1_608; __rev1_608 = __builtin_shufflevector(__s1_608, __s1_608, 3, 2, 1, 0); \ |
| 56335 | | int32x4_t __rev2_608; __rev2_608 = __builtin_shufflevector(__s2_608, __s2_608, 3, 2, 1, 0); \ |
| 56336 | | int64x2_t __ret_608; \ |
| 56337 | | __ret_608 = __noswap_vqdmlal_s32(__rev0_608, __noswap_vget_high_s32(__rev1_608), __noswap_splat_laneq_s32(__rev2_608, __p3_608)); \ |
| 56338 | | __ret_608 = __builtin_shufflevector(__ret_608, __ret_608, 1, 0); \ |
| 56339 | | __ret_608; \ |
| 57685 | #define vqdmlal_high_laneq_s32(__p0_700, __p1_700, __p2_700, __p3_700) __extension__ ({ \ |
| 57686 | int64x2_t __s0_700 = __p0_700; \ |
| 57687 | int32x4_t __s1_700 = __p1_700; \ |
| 57688 | int32x4_t __s2_700 = __p2_700; \ |
| 57689 | int64x2_t __rev0_700; __rev0_700 = __builtin_shufflevector(__s0_700, __s0_700, 1, 0); \ |
| 57690 | int32x4_t __rev1_700; __rev1_700 = __builtin_shufflevector(__s1_700, __s1_700, 3, 2, 1, 0); \ |
| 57691 | int32x4_t __rev2_700; __rev2_700 = __builtin_shufflevector(__s2_700, __s2_700, 3, 2, 1, 0); \ |
| 57692 | int64x2_t __ret_700; \ |
| 57693 | __ret_700 = __noswap_vqdmlal_s32(__rev0_700, __noswap_vget_high_s32(__rev1_700), __noswap_splat_laneq_s32(__rev2_700, __p3_700)); \ |
| 57694 | __ret_700 = __builtin_shufflevector(__ret_700, __ret_700, 1, 0); \ |
| 57695 | __ret_700; \ |
| 56340 | 57696 | }) |
| 56341 | 57697 | #endif |
| 56342 | 57698 | |
| 56343 | 57699 | #ifdef __LITTLE_ENDIAN__ |
| 56344 | | #define vqdmlal_high_laneq_s16(__p0_609, __p1_609, __p2_609, __p3_609) __extension__ ({ \ |
| 56345 | | int32x4_t __s0_609 = __p0_609; \ |
| 56346 | | int16x8_t __s1_609 = __p1_609; \ |
| 56347 | | int16x8_t __s2_609 = __p2_609; \ |
| 56348 | | int32x4_t __ret_609; \ |
| 56349 | | __ret_609 = vqdmlal_s16(__s0_609, vget_high_s16(__s1_609), splat_laneq_s16(__s2_609, __p3_609)); \ |
| 56350 | | __ret_609; \ |
| 57700 | #define vqdmlal_high_laneq_s16(__p0_701, __p1_701, __p2_701, __p3_701) __extension__ ({ \ |
| 57701 | int32x4_t __s0_701 = __p0_701; \ |
| 57702 | int16x8_t __s1_701 = __p1_701; \ |
| 57703 | int16x8_t __s2_701 = __p2_701; \ |
| 57704 | int32x4_t __ret_701; \ |
| 57705 | __ret_701 = vqdmlal_s16(__s0_701, vget_high_s16(__s1_701), splat_laneq_s16(__s2_701, __p3_701)); \ |
| 57706 | __ret_701; \ |
| 56351 | 57707 | }) |
| 56352 | 57708 | #else |
| 56353 | | #define vqdmlal_high_laneq_s16(__p0_610, __p1_610, __p2_610, __p3_610) __extension__ ({ \ |
| 56354 | | int32x4_t __s0_610 = __p0_610; \ |
| 56355 | | int16x8_t __s1_610 = __p1_610; \ |
| 56356 | | int16x8_t __s2_610 = __p2_610; \ |
| 56357 | | int32x4_t __rev0_610; __rev0_610 = __builtin_shufflevector(__s0_610, __s0_610, 3, 2, 1, 0); \ |
| 56358 | | int16x8_t __rev1_610; __rev1_610 = __builtin_shufflevector(__s1_610, __s1_610, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56359 | | int16x8_t __rev2_610; __rev2_610 = __builtin_shufflevector(__s2_610, __s2_610, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56360 | | int32x4_t __ret_610; \ |
| 56361 | | __ret_610 = __noswap_vqdmlal_s16(__rev0_610, __noswap_vget_high_s16(__rev1_610), __noswap_splat_laneq_s16(__rev2_610, __p3_610)); \ |
| 56362 | | __ret_610 = __builtin_shufflevector(__ret_610, __ret_610, 3, 2, 1, 0); \ |
| 56363 | | __ret_610; \ |
| 57709 | #define vqdmlal_high_laneq_s16(__p0_702, __p1_702, __p2_702, __p3_702) __extension__ ({ \ |
| 57710 | int32x4_t __s0_702 = __p0_702; \ |
| 57711 | int16x8_t __s1_702 = __p1_702; \ |
| 57712 | int16x8_t __s2_702 = __p2_702; \ |
| 57713 | int32x4_t __rev0_702; __rev0_702 = __builtin_shufflevector(__s0_702, __s0_702, 3, 2, 1, 0); \ |
| 57714 | int16x8_t __rev1_702; __rev1_702 = __builtin_shufflevector(__s1_702, __s1_702, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57715 | int16x8_t __rev2_702; __rev2_702 = __builtin_shufflevector(__s2_702, __s2_702, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57716 | int32x4_t __ret_702; \ |
| 57717 | __ret_702 = __noswap_vqdmlal_s16(__rev0_702, __noswap_vget_high_s16(__rev1_702), __noswap_splat_laneq_s16(__rev2_702, __p3_702)); \ |
| 57718 | __ret_702 = __builtin_shufflevector(__ret_702, __ret_702, 3, 2, 1, 0); \ |
| 57719 | __ret_702; \ |
| 56364 | 57720 | }) |
| 56365 | 57721 | #endif |
| 56366 | 57722 | |
| ... | ... | @@ -56483,50 +57839,50 @@ __ai int32x4_t vqdmlal_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 56483 | 57839 | #endif |
| 56484 | 57840 | |
| 56485 | 57841 | #ifdef __LITTLE_ENDIAN__ |
| 56486 | | #define vqdmlal_laneq_s32(__p0_611, __p1_611, __p2_611, __p3_611) __extension__ ({ \ |
| 56487 | | int64x2_t __s0_611 = __p0_611; \ |
| 56488 | | int32x2_t __s1_611 = __p1_611; \ |
| 56489 | | int32x4_t __s2_611 = __p2_611; \ |
| 56490 | | int64x2_t __ret_611; \ |
| 56491 | | __ret_611 = vqdmlal_s32(__s0_611, __s1_611, splat_laneq_s32(__s2_611, __p3_611)); \ |
| 56492 | | __ret_611; \ |
| 57842 | #define vqdmlal_laneq_s32(__p0_703, __p1_703, __p2_703, __p3_703) __extension__ ({ \ |
| 57843 | int64x2_t __s0_703 = __p0_703; \ |
| 57844 | int32x2_t __s1_703 = __p1_703; \ |
| 57845 | int32x4_t __s2_703 = __p2_703; \ |
| 57846 | int64x2_t __ret_703; \ |
| 57847 | __ret_703 = vqdmlal_s32(__s0_703, __s1_703, splat_laneq_s32(__s2_703, __p3_703)); \ |
| 57848 | __ret_703; \ |
| 56493 | 57849 | }) |
| 56494 | 57850 | #else |
| 56495 | | #define vqdmlal_laneq_s32(__p0_612, __p1_612, __p2_612, __p3_612) __extension__ ({ \ |
| 56496 | | int64x2_t __s0_612 = __p0_612; \ |
| 56497 | | int32x2_t __s1_612 = __p1_612; \ |
| 56498 | | int32x4_t __s2_612 = __p2_612; \ |
| 56499 | | int64x2_t __rev0_612; __rev0_612 = __builtin_shufflevector(__s0_612, __s0_612, 1, 0); \ |
| 56500 | | int32x2_t __rev1_612; __rev1_612 = __builtin_shufflevector(__s1_612, __s1_612, 1, 0); \ |
| 56501 | | int32x4_t __rev2_612; __rev2_612 = __builtin_shufflevector(__s2_612, __s2_612, 3, 2, 1, 0); \ |
| 56502 | | int64x2_t __ret_612; \ |
| 56503 | | __ret_612 = __noswap_vqdmlal_s32(__rev0_612, __rev1_612, __noswap_splat_laneq_s32(__rev2_612, __p3_612)); \ |
| 56504 | | __ret_612 = __builtin_shufflevector(__ret_612, __ret_612, 1, 0); \ |
| 56505 | | __ret_612; \ |
| 57851 | #define vqdmlal_laneq_s32(__p0_704, __p1_704, __p2_704, __p3_704) __extension__ ({ \ |
| 57852 | int64x2_t __s0_704 = __p0_704; \ |
| 57853 | int32x2_t __s1_704 = __p1_704; \ |
| 57854 | int32x4_t __s2_704 = __p2_704; \ |
| 57855 | int64x2_t __rev0_704; __rev0_704 = __builtin_shufflevector(__s0_704, __s0_704, 1, 0); \ |
| 57856 | int32x2_t __rev1_704; __rev1_704 = __builtin_shufflevector(__s1_704, __s1_704, 1, 0); \ |
| 57857 | int32x4_t __rev2_704; __rev2_704 = __builtin_shufflevector(__s2_704, __s2_704, 3, 2, 1, 0); \ |
| 57858 | int64x2_t __ret_704; \ |
| 57859 | __ret_704 = __noswap_vqdmlal_s32(__rev0_704, __rev1_704, __noswap_splat_laneq_s32(__rev2_704, __p3_704)); \ |
| 57860 | __ret_704 = __builtin_shufflevector(__ret_704, __ret_704, 1, 0); \ |
| 57861 | __ret_704; \ |
| 56506 | 57862 | }) |
| 56507 | 57863 | #endif |
| 56508 | 57864 | |
| 56509 | 57865 | #ifdef __LITTLE_ENDIAN__ |
| 56510 | | #define vqdmlal_laneq_s16(__p0_613, __p1_613, __p2_613, __p3_613) __extension__ ({ \ |
| 56511 | | int32x4_t __s0_613 = __p0_613; \ |
| 56512 | | int16x4_t __s1_613 = __p1_613; \ |
| 56513 | | int16x8_t __s2_613 = __p2_613; \ |
| 56514 | | int32x4_t __ret_613; \ |
| 56515 | | __ret_613 = vqdmlal_s16(__s0_613, __s1_613, splat_laneq_s16(__s2_613, __p3_613)); \ |
| 56516 | | __ret_613; \ |
| 57866 | #define vqdmlal_laneq_s16(__p0_705, __p1_705, __p2_705, __p3_705) __extension__ ({ \ |
| 57867 | int32x4_t __s0_705 = __p0_705; \ |
| 57868 | int16x4_t __s1_705 = __p1_705; \ |
| 57869 | int16x8_t __s2_705 = __p2_705; \ |
| 57870 | int32x4_t __ret_705; \ |
| 57871 | __ret_705 = vqdmlal_s16(__s0_705, __s1_705, splat_laneq_s16(__s2_705, __p3_705)); \ |
| 57872 | __ret_705; \ |
| 56517 | 57873 | }) |
| 56518 | 57874 | #else |
| 56519 | | #define vqdmlal_laneq_s16(__p0_614, __p1_614, __p2_614, __p3_614) __extension__ ({ \ |
| 56520 | | int32x4_t __s0_614 = __p0_614; \ |
| 56521 | | int16x4_t __s1_614 = __p1_614; \ |
| 56522 | | int16x8_t __s2_614 = __p2_614; \ |
| 56523 | | int32x4_t __rev0_614; __rev0_614 = __builtin_shufflevector(__s0_614, __s0_614, 3, 2, 1, 0); \ |
| 56524 | | int16x4_t __rev1_614; __rev1_614 = __builtin_shufflevector(__s1_614, __s1_614, 3, 2, 1, 0); \ |
| 56525 | | int16x8_t __rev2_614; __rev2_614 = __builtin_shufflevector(__s2_614, __s2_614, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56526 | | int32x4_t __ret_614; \ |
| 56527 | | __ret_614 = __noswap_vqdmlal_s16(__rev0_614, __rev1_614, __noswap_splat_laneq_s16(__rev2_614, __p3_614)); \ |
| 56528 | | __ret_614 = __builtin_shufflevector(__ret_614, __ret_614, 3, 2, 1, 0); \ |
| 56529 | | __ret_614; \ |
| 57875 | #define vqdmlal_laneq_s16(__p0_706, __p1_706, __p2_706, __p3_706) __extension__ ({ \ |
| 57876 | int32x4_t __s0_706 = __p0_706; \ |
| 57877 | int16x4_t __s1_706 = __p1_706; \ |
| 57878 | int16x8_t __s2_706 = __p2_706; \ |
| 57879 | int32x4_t __rev0_706; __rev0_706 = __builtin_shufflevector(__s0_706, __s0_706, 3, 2, 1, 0); \ |
| 57880 | int16x4_t __rev1_706; __rev1_706 = __builtin_shufflevector(__s1_706, __s1_706, 3, 2, 1, 0); \ |
| 57881 | int16x8_t __rev2_706; __rev2_706 = __builtin_shufflevector(__s2_706, __s2_706, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57882 | int32x4_t __ret_706; \ |
| 57883 | __ret_706 = __noswap_vqdmlal_s16(__rev0_706, __rev1_706, __noswap_splat_laneq_s16(__rev2_706, __p3_706)); \ |
| 57884 | __ret_706 = __builtin_shufflevector(__ret_706, __ret_706, 3, 2, 1, 0); \ |
| 57885 | __ret_706; \ |
| 56530 | 57886 | }) |
| 56531 | 57887 | #endif |
| 56532 | 57888 | |
| ... | ... | @@ -56577,98 +57933,98 @@ __ai int32x4_t vqdmlsl_high_s16(int32x4_t __p0, int16x8_t __p1, int16x8_t __p2) |
| 56577 | 57933 | #endif |
| 56578 | 57934 | |
| 56579 | 57935 | #ifdef __LITTLE_ENDIAN__ |
| 56580 | | #define vqdmlsl_high_lane_s32(__p0_615, __p1_615, __p2_615, __p3_615) __extension__ ({ \ |
| 56581 | | int64x2_t __s0_615 = __p0_615; \ |
| 56582 | | int32x4_t __s1_615 = __p1_615; \ |
| 56583 | | int32x2_t __s2_615 = __p2_615; \ |
| 56584 | | int64x2_t __ret_615; \ |
| 56585 | | __ret_615 = vqdmlsl_s32(__s0_615, vget_high_s32(__s1_615), splat_lane_s32(__s2_615, __p3_615)); \ |
| 56586 | | __ret_615; \ |
| 57936 | #define vqdmlsl_high_lane_s32(__p0_707, __p1_707, __p2_707, __p3_707) __extension__ ({ \ |
| 57937 | int64x2_t __s0_707 = __p0_707; \ |
| 57938 | int32x4_t __s1_707 = __p1_707; \ |
| 57939 | int32x2_t __s2_707 = __p2_707; \ |
| 57940 | int64x2_t __ret_707; \ |
| 57941 | __ret_707 = vqdmlsl_s32(__s0_707, vget_high_s32(__s1_707), splat_lane_s32(__s2_707, __p3_707)); \ |
| 57942 | __ret_707; \ |
| 56587 | 57943 | }) |
| 56588 | 57944 | #else |
| 56589 | | #define vqdmlsl_high_lane_s32(__p0_616, __p1_616, __p2_616, __p3_616) __extension__ ({ \ |
| 56590 | | int64x2_t __s0_616 = __p0_616; \ |
| 56591 | | int32x4_t __s1_616 = __p1_616; \ |
| 56592 | | int32x2_t __s2_616 = __p2_616; \ |
| 56593 | | int64x2_t __rev0_616; __rev0_616 = __builtin_shufflevector(__s0_616, __s0_616, 1, 0); \ |
| 56594 | | int32x4_t __rev1_616; __rev1_616 = __builtin_shufflevector(__s1_616, __s1_616, 3, 2, 1, 0); \ |
| 56595 | | int32x2_t __rev2_616; __rev2_616 = __builtin_shufflevector(__s2_616, __s2_616, 1, 0); \ |
| 56596 | | int64x2_t __ret_616; \ |
| 56597 | | __ret_616 = __noswap_vqdmlsl_s32(__rev0_616, __noswap_vget_high_s32(__rev1_616), __noswap_splat_lane_s32(__rev2_616, __p3_616)); \ |
| 56598 | | __ret_616 = __builtin_shufflevector(__ret_616, __ret_616, 1, 0); \ |
| 56599 | | __ret_616; \ |
| 57945 | #define vqdmlsl_high_lane_s32(__p0_708, __p1_708, __p2_708, __p3_708) __extension__ ({ \ |
| 57946 | int64x2_t __s0_708 = __p0_708; \ |
| 57947 | int32x4_t __s1_708 = __p1_708; \ |
| 57948 | int32x2_t __s2_708 = __p2_708; \ |
| 57949 | int64x2_t __rev0_708; __rev0_708 = __builtin_shufflevector(__s0_708, __s0_708, 1, 0); \ |
| 57950 | int32x4_t __rev1_708; __rev1_708 = __builtin_shufflevector(__s1_708, __s1_708, 3, 2, 1, 0); \ |
| 57951 | int32x2_t __rev2_708; __rev2_708 = __builtin_shufflevector(__s2_708, __s2_708, 1, 0); \ |
| 57952 | int64x2_t __ret_708; \ |
| 57953 | __ret_708 = __noswap_vqdmlsl_s32(__rev0_708, __noswap_vget_high_s32(__rev1_708), __noswap_splat_lane_s32(__rev2_708, __p3_708)); \ |
| 57954 | __ret_708 = __builtin_shufflevector(__ret_708, __ret_708, 1, 0); \ |
| 57955 | __ret_708; \ |
| 56600 | 57956 | }) |
| 56601 | 57957 | #endif |
| 56602 | 57958 | |
| 56603 | 57959 | #ifdef __LITTLE_ENDIAN__ |
| 56604 | | #define vqdmlsl_high_lane_s16(__p0_617, __p1_617, __p2_617, __p3_617) __extension__ ({ \ |
| 56605 | | int32x4_t __s0_617 = __p0_617; \ |
| 56606 | | int16x8_t __s1_617 = __p1_617; \ |
| 56607 | | int16x4_t __s2_617 = __p2_617; \ |
| 56608 | | int32x4_t __ret_617; \ |
| 56609 | | __ret_617 = vqdmlsl_s16(__s0_617, vget_high_s16(__s1_617), splat_lane_s16(__s2_617, __p3_617)); \ |
| 56610 | | __ret_617; \ |
| 57960 | #define vqdmlsl_high_lane_s16(__p0_709, __p1_709, __p2_709, __p3_709) __extension__ ({ \ |
| 57961 | int32x4_t __s0_709 = __p0_709; \ |
| 57962 | int16x8_t __s1_709 = __p1_709; \ |
| 57963 | int16x4_t __s2_709 = __p2_709; \ |
| 57964 | int32x4_t __ret_709; \ |
| 57965 | __ret_709 = vqdmlsl_s16(__s0_709, vget_high_s16(__s1_709), splat_lane_s16(__s2_709, __p3_709)); \ |
| 57966 | __ret_709; \ |
| 56611 | 57967 | }) |
| 56612 | 57968 | #else |
| 56613 | | #define vqdmlsl_high_lane_s16(__p0_618, __p1_618, __p2_618, __p3_618) __extension__ ({ \ |
| 56614 | | int32x4_t __s0_618 = __p0_618; \ |
| 56615 | | int16x8_t __s1_618 = __p1_618; \ |
| 56616 | | int16x4_t __s2_618 = __p2_618; \ |
| 56617 | | int32x4_t __rev0_618; __rev0_618 = __builtin_shufflevector(__s0_618, __s0_618, 3, 2, 1, 0); \ |
| 56618 | | int16x8_t __rev1_618; __rev1_618 = __builtin_shufflevector(__s1_618, __s1_618, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56619 | | int16x4_t __rev2_618; __rev2_618 = __builtin_shufflevector(__s2_618, __s2_618, 3, 2, 1, 0); \ |
| 56620 | | int32x4_t __ret_618; \ |
| 56621 | | __ret_618 = __noswap_vqdmlsl_s16(__rev0_618, __noswap_vget_high_s16(__rev1_618), __noswap_splat_lane_s16(__rev2_618, __p3_618)); \ |
| 56622 | | __ret_618 = __builtin_shufflevector(__ret_618, __ret_618, 3, 2, 1, 0); \ |
| 56623 | | __ret_618; \ |
| 57969 | #define vqdmlsl_high_lane_s16(__p0_710, __p1_710, __p2_710, __p3_710) __extension__ ({ \ |
| 57970 | int32x4_t __s0_710 = __p0_710; \ |
| 57971 | int16x8_t __s1_710 = __p1_710; \ |
| 57972 | int16x4_t __s2_710 = __p2_710; \ |
| 57973 | int32x4_t __rev0_710; __rev0_710 = __builtin_shufflevector(__s0_710, __s0_710, 3, 2, 1, 0); \ |
| 57974 | int16x8_t __rev1_710; __rev1_710 = __builtin_shufflevector(__s1_710, __s1_710, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57975 | int16x4_t __rev2_710; __rev2_710 = __builtin_shufflevector(__s2_710, __s2_710, 3, 2, 1, 0); \ |
| 57976 | int32x4_t __ret_710; \ |
| 57977 | __ret_710 = __noswap_vqdmlsl_s16(__rev0_710, __noswap_vget_high_s16(__rev1_710), __noswap_splat_lane_s16(__rev2_710, __p3_710)); \ |
| 57978 | __ret_710 = __builtin_shufflevector(__ret_710, __ret_710, 3, 2, 1, 0); \ |
| 57979 | __ret_710; \ |
| 56624 | 57980 | }) |
| 56625 | 57981 | #endif |
| 56626 | 57982 | |
| 56627 | 57983 | #ifdef __LITTLE_ENDIAN__ |
| 56628 | | #define vqdmlsl_high_laneq_s32(__p0_619, __p1_619, __p2_619, __p3_619) __extension__ ({ \ |
| 56629 | | int64x2_t __s0_619 = __p0_619; \ |
| 56630 | | int32x4_t __s1_619 = __p1_619; \ |
| 56631 | | int32x4_t __s2_619 = __p2_619; \ |
| 56632 | | int64x2_t __ret_619; \ |
| 56633 | | __ret_619 = vqdmlsl_s32(__s0_619, vget_high_s32(__s1_619), splat_laneq_s32(__s2_619, __p3_619)); \ |
| 56634 | | __ret_619; \ |
| 57984 | #define vqdmlsl_high_laneq_s32(__p0_711, __p1_711, __p2_711, __p3_711) __extension__ ({ \ |
| 57985 | int64x2_t __s0_711 = __p0_711; \ |
| 57986 | int32x4_t __s1_711 = __p1_711; \ |
| 57987 | int32x4_t __s2_711 = __p2_711; \ |
| 57988 | int64x2_t __ret_711; \ |
| 57989 | __ret_711 = vqdmlsl_s32(__s0_711, vget_high_s32(__s1_711), splat_laneq_s32(__s2_711, __p3_711)); \ |
| 57990 | __ret_711; \ |
| 56635 | 57991 | }) |
| 56636 | 57992 | #else |
| 56637 | | #define vqdmlsl_high_laneq_s32(__p0_620, __p1_620, __p2_620, __p3_620) __extension__ ({ \ |
| 56638 | | int64x2_t __s0_620 = __p0_620; \ |
| 56639 | | int32x4_t __s1_620 = __p1_620; \ |
| 56640 | | int32x4_t __s2_620 = __p2_620; \ |
| 56641 | | int64x2_t __rev0_620; __rev0_620 = __builtin_shufflevector(__s0_620, __s0_620, 1, 0); \ |
| 56642 | | int32x4_t __rev1_620; __rev1_620 = __builtin_shufflevector(__s1_620, __s1_620, 3, 2, 1, 0); \ |
| 56643 | | int32x4_t __rev2_620; __rev2_620 = __builtin_shufflevector(__s2_620, __s2_620, 3, 2, 1, 0); \ |
| 56644 | | int64x2_t __ret_620; \ |
| 56645 | | __ret_620 = __noswap_vqdmlsl_s32(__rev0_620, __noswap_vget_high_s32(__rev1_620), __noswap_splat_laneq_s32(__rev2_620, __p3_620)); \ |
| 56646 | | __ret_620 = __builtin_shufflevector(__ret_620, __ret_620, 1, 0); \ |
| 56647 | | __ret_620; \ |
| 57993 | #define vqdmlsl_high_laneq_s32(__p0_712, __p1_712, __p2_712, __p3_712) __extension__ ({ \ |
| 57994 | int64x2_t __s0_712 = __p0_712; \ |
| 57995 | int32x4_t __s1_712 = __p1_712; \ |
| 57996 | int32x4_t __s2_712 = __p2_712; \ |
| 57997 | int64x2_t __rev0_712; __rev0_712 = __builtin_shufflevector(__s0_712, __s0_712, 1, 0); \ |
| 57998 | int32x4_t __rev1_712; __rev1_712 = __builtin_shufflevector(__s1_712, __s1_712, 3, 2, 1, 0); \ |
| 57999 | int32x4_t __rev2_712; __rev2_712 = __builtin_shufflevector(__s2_712, __s2_712, 3, 2, 1, 0); \ |
| 58000 | int64x2_t __ret_712; \ |
| 58001 | __ret_712 = __noswap_vqdmlsl_s32(__rev0_712, __noswap_vget_high_s32(__rev1_712), __noswap_splat_laneq_s32(__rev2_712, __p3_712)); \ |
| 58002 | __ret_712 = __builtin_shufflevector(__ret_712, __ret_712, 1, 0); \ |
| 58003 | __ret_712; \ |
| 56648 | 58004 | }) |
| 56649 | 58005 | #endif |
| 56650 | 58006 | |
| 56651 | 58007 | #ifdef __LITTLE_ENDIAN__ |
| 56652 | | #define vqdmlsl_high_laneq_s16(__p0_621, __p1_621, __p2_621, __p3_621) __extension__ ({ \ |
| 56653 | | int32x4_t __s0_621 = __p0_621; \ |
| 56654 | | int16x8_t __s1_621 = __p1_621; \ |
| 56655 | | int16x8_t __s2_621 = __p2_621; \ |
| 56656 | | int32x4_t __ret_621; \ |
| 56657 | | __ret_621 = vqdmlsl_s16(__s0_621, vget_high_s16(__s1_621), splat_laneq_s16(__s2_621, __p3_621)); \ |
| 56658 | | __ret_621; \ |
| 58008 | #define vqdmlsl_high_laneq_s16(__p0_713, __p1_713, __p2_713, __p3_713) __extension__ ({ \ |
| 58009 | int32x4_t __s0_713 = __p0_713; \ |
| 58010 | int16x8_t __s1_713 = __p1_713; \ |
| 58011 | int16x8_t __s2_713 = __p2_713; \ |
| 58012 | int32x4_t __ret_713; \ |
| 58013 | __ret_713 = vqdmlsl_s16(__s0_713, vget_high_s16(__s1_713), splat_laneq_s16(__s2_713, __p3_713)); \ |
| 58014 | __ret_713; \ |
| 56659 | 58015 | }) |
| 56660 | 58016 | #else |
| 56661 | | #define vqdmlsl_high_laneq_s16(__p0_622, __p1_622, __p2_622, __p3_622) __extension__ ({ \ |
| 56662 | | int32x4_t __s0_622 = __p0_622; \ |
| 56663 | | int16x8_t __s1_622 = __p1_622; \ |
| 56664 | | int16x8_t __s2_622 = __p2_622; \ |
| 56665 | | int32x4_t __rev0_622; __rev0_622 = __builtin_shufflevector(__s0_622, __s0_622, 3, 2, 1, 0); \ |
| 56666 | | int16x8_t __rev1_622; __rev1_622 = __builtin_shufflevector(__s1_622, __s1_622, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56667 | | int16x8_t __rev2_622; __rev2_622 = __builtin_shufflevector(__s2_622, __s2_622, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56668 | | int32x4_t __ret_622; \ |
| 56669 | | __ret_622 = __noswap_vqdmlsl_s16(__rev0_622, __noswap_vget_high_s16(__rev1_622), __noswap_splat_laneq_s16(__rev2_622, __p3_622)); \ |
| 56670 | | __ret_622 = __builtin_shufflevector(__ret_622, __ret_622, 3, 2, 1, 0); \ |
| 56671 | | __ret_622; \ |
| 58017 | #define vqdmlsl_high_laneq_s16(__p0_714, __p1_714, __p2_714, __p3_714) __extension__ ({ \ |
| 58018 | int32x4_t __s0_714 = __p0_714; \ |
| 58019 | int16x8_t __s1_714 = __p1_714; \ |
| 58020 | int16x8_t __s2_714 = __p2_714; \ |
| 58021 | int32x4_t __rev0_714; __rev0_714 = __builtin_shufflevector(__s0_714, __s0_714, 3, 2, 1, 0); \ |
| 58022 | int16x8_t __rev1_714; __rev1_714 = __builtin_shufflevector(__s1_714, __s1_714, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58023 | int16x8_t __rev2_714; __rev2_714 = __builtin_shufflevector(__s2_714, __s2_714, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58024 | int32x4_t __ret_714; \ |
| 58025 | __ret_714 = __noswap_vqdmlsl_s16(__rev0_714, __noswap_vget_high_s16(__rev1_714), __noswap_splat_laneq_s16(__rev2_714, __p3_714)); \ |
| 58026 | __ret_714 = __builtin_shufflevector(__ret_714, __ret_714, 3, 2, 1, 0); \ |
| 58027 | __ret_714; \ |
| 56672 | 58028 | }) |
| 56673 | 58029 | #endif |
| 56674 | 58030 | |
| ... | ... | @@ -56791,50 +58147,50 @@ __ai int32x4_t vqdmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) |
| 56791 | 58147 | #endif |
| 56792 | 58148 | |
| 56793 | 58149 | #ifdef __LITTLE_ENDIAN__ |
| 56794 | | #define vqdmlsl_laneq_s32(__p0_623, __p1_623, __p2_623, __p3_623) __extension__ ({ \ |
| 56795 | | int64x2_t __s0_623 = __p0_623; \ |
| 56796 | | int32x2_t __s1_623 = __p1_623; \ |
| 56797 | | int32x4_t __s2_623 = __p2_623; \ |
| 56798 | | int64x2_t __ret_623; \ |
| 56799 | | __ret_623 = vqdmlsl_s32(__s0_623, __s1_623, splat_laneq_s32(__s2_623, __p3_623)); \ |
| 56800 | | __ret_623; \ |
| 58150 | #define vqdmlsl_laneq_s32(__p0_715, __p1_715, __p2_715, __p3_715) __extension__ ({ \ |
| 58151 | int64x2_t __s0_715 = __p0_715; \ |
| 58152 | int32x2_t __s1_715 = __p1_715; \ |
| 58153 | int32x4_t __s2_715 = __p2_715; \ |
| 58154 | int64x2_t __ret_715; \ |
| 58155 | __ret_715 = vqdmlsl_s32(__s0_715, __s1_715, splat_laneq_s32(__s2_715, __p3_715)); \ |
| 58156 | __ret_715; \ |
| 56801 | 58157 | }) |
| 56802 | 58158 | #else |
| 56803 | | #define vqdmlsl_laneq_s32(__p0_624, __p1_624, __p2_624, __p3_624) __extension__ ({ \ |
| 56804 | | int64x2_t __s0_624 = __p0_624; \ |
| 56805 | | int32x2_t __s1_624 = __p1_624; \ |
| 56806 | | int32x4_t __s2_624 = __p2_624; \ |
| 56807 | | int64x2_t __rev0_624; __rev0_624 = __builtin_shufflevector(__s0_624, __s0_624, 1, 0); \ |
| 56808 | | int32x2_t __rev1_624; __rev1_624 = __builtin_shufflevector(__s1_624, __s1_624, 1, 0); \ |
| 56809 | | int32x4_t __rev2_624; __rev2_624 = __builtin_shufflevector(__s2_624, __s2_624, 3, 2, 1, 0); \ |
| 56810 | | int64x2_t __ret_624; \ |
| 56811 | | __ret_624 = __noswap_vqdmlsl_s32(__rev0_624, __rev1_624, __noswap_splat_laneq_s32(__rev2_624, __p3_624)); \ |
| 56812 | | __ret_624 = __builtin_shufflevector(__ret_624, __ret_624, 1, 0); \ |
| 56813 | | __ret_624; \ |
| 58159 | #define vqdmlsl_laneq_s32(__p0_716, __p1_716, __p2_716, __p3_716) __extension__ ({ \ |
| 58160 | int64x2_t __s0_716 = __p0_716; \ |
| 58161 | int32x2_t __s1_716 = __p1_716; \ |
| 58162 | int32x4_t __s2_716 = __p2_716; \ |
| 58163 | int64x2_t __rev0_716; __rev0_716 = __builtin_shufflevector(__s0_716, __s0_716, 1, 0); \ |
| 58164 | int32x2_t __rev1_716; __rev1_716 = __builtin_shufflevector(__s1_716, __s1_716, 1, 0); \ |
| 58165 | int32x4_t __rev2_716; __rev2_716 = __builtin_shufflevector(__s2_716, __s2_716, 3, 2, 1, 0); \ |
| 58166 | int64x2_t __ret_716; \ |
| 58167 | __ret_716 = __noswap_vqdmlsl_s32(__rev0_716, __rev1_716, __noswap_splat_laneq_s32(__rev2_716, __p3_716)); \ |
| 58168 | __ret_716 = __builtin_shufflevector(__ret_716, __ret_716, 1, 0); \ |
| 58169 | __ret_716; \ |
| 56814 | 58170 | }) |
| 56815 | 58171 | #endif |
| 56816 | 58172 | |
| 56817 | 58173 | #ifdef __LITTLE_ENDIAN__ |
| 56818 | | #define vqdmlsl_laneq_s16(__p0_625, __p1_625, __p2_625, __p3_625) __extension__ ({ \ |
| 56819 | | int32x4_t __s0_625 = __p0_625; \ |
| 56820 | | int16x4_t __s1_625 = __p1_625; \ |
| 56821 | | int16x8_t __s2_625 = __p2_625; \ |
| 56822 | | int32x4_t __ret_625; \ |
| 56823 | | __ret_625 = vqdmlsl_s16(__s0_625, __s1_625, splat_laneq_s16(__s2_625, __p3_625)); \ |
| 56824 | | __ret_625; \ |
| 58174 | #define vqdmlsl_laneq_s16(__p0_717, __p1_717, __p2_717, __p3_717) __extension__ ({ \ |
| 58175 | int32x4_t __s0_717 = __p0_717; \ |
| 58176 | int16x4_t __s1_717 = __p1_717; \ |
| 58177 | int16x8_t __s2_717 = __p2_717; \ |
| 58178 | int32x4_t __ret_717; \ |
| 58179 | __ret_717 = vqdmlsl_s16(__s0_717, __s1_717, splat_laneq_s16(__s2_717, __p3_717)); \ |
| 58180 | __ret_717; \ |
| 56825 | 58181 | }) |
| 56826 | 58182 | #else |
| 56827 | | #define vqdmlsl_laneq_s16(__p0_626, __p1_626, __p2_626, __p3_626) __extension__ ({ \ |
| 56828 | | int32x4_t __s0_626 = __p0_626; \ |
| 56829 | | int16x4_t __s1_626 = __p1_626; \ |
| 56830 | | int16x8_t __s2_626 = __p2_626; \ |
| 56831 | | int32x4_t __rev0_626; __rev0_626 = __builtin_shufflevector(__s0_626, __s0_626, 3, 2, 1, 0); \ |
| 56832 | | int16x4_t __rev1_626; __rev1_626 = __builtin_shufflevector(__s1_626, __s1_626, 3, 2, 1, 0); \ |
| 56833 | | int16x8_t __rev2_626; __rev2_626 = __builtin_shufflevector(__s2_626, __s2_626, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 56834 | | int32x4_t __ret_626; \ |
| 56835 | | __ret_626 = __noswap_vqdmlsl_s16(__rev0_626, __rev1_626, __noswap_splat_laneq_s16(__rev2_626, __p3_626)); \ |
| 56836 | | __ret_626 = __builtin_shufflevector(__ret_626, __ret_626, 3, 2, 1, 0); \ |
| 56837 | | __ret_626; \ |
| 58183 | #define vqdmlsl_laneq_s16(__p0_718, __p1_718, __p2_718, __p3_718) __extension__ ({ \ |
| 58184 | int32x4_t __s0_718 = __p0_718; \ |
| 58185 | int16x4_t __s1_718 = __p1_718; \ |
| 58186 | int16x8_t __s2_718 = __p2_718; \ |
| 58187 | int32x4_t __rev0_718; __rev0_718 = __builtin_shufflevector(__s0_718, __s0_718, 3, 2, 1, 0); \ |
| 58188 | int16x4_t __rev1_718; __rev1_718 = __builtin_shufflevector(__s1_718, __s1_718, 3, 2, 1, 0); \ |
| 58189 | int16x8_t __rev2_718; __rev2_718 = __builtin_shufflevector(__s2_718, __s2_718, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58190 | int32x4_t __ret_718; \ |
| 58191 | __ret_718 = __noswap_vqdmlsl_s16(__rev0_718, __rev1_718, __noswap_splat_laneq_s16(__rev2_718, __p3_718)); \ |
| 58192 | __ret_718 = __builtin_shufflevector(__ret_718, __ret_718, 3, 2, 1, 0); \ |
| 58193 | __ret_718; \ |
| 56838 | 58194 | }) |
| 56839 | 58195 | #endif |
| 56840 | 58196 | |
| ... | ... | @@ -56933,78 +58289,78 @@ __ai int16_t vqdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 56933 | 58289 | #endif |
| 56934 | 58290 | |
| 56935 | 58291 | #ifdef __LITTLE_ENDIAN__ |
| 56936 | | #define vqdmulhs_lane_s32(__p0_627, __p1_627, __p2_627) __extension__ ({ \ |
| 56937 | | int32_t __s0_627 = __p0_627; \ |
| 56938 | | int32x2_t __s1_627 = __p1_627; \ |
| 56939 | | int32_t __ret_627; \ |
| 56940 | | __ret_627 = vqdmulhs_s32(__s0_627, vget_lane_s32(__s1_627, __p2_627)); \ |
| 56941 | | __ret_627; \ |
| 58292 | #define vqdmulhs_lane_s32(__p0_719, __p1_719, __p2_719) __extension__ ({ \ |
| 58293 | int32_t __s0_719 = __p0_719; \ |
| 58294 | int32x2_t __s1_719 = __p1_719; \ |
| 58295 | int32_t __ret_719; \ |
| 58296 | __ret_719 = vqdmulhs_s32(__s0_719, vget_lane_s32(__s1_719, __p2_719)); \ |
| 58297 | __ret_719; \ |
| 56942 | 58298 | }) |
| 56943 | 58299 | #else |
| 56944 | | #define vqdmulhs_lane_s32(__p0_628, __p1_628, __p2_628) __extension__ ({ \ |
| 56945 | | int32_t __s0_628 = __p0_628; \ |
| 56946 | | int32x2_t __s1_628 = __p1_628; \ |
| 56947 | | int32x2_t __rev1_628; __rev1_628 = __builtin_shufflevector(__s1_628, __s1_628, 1, 0); \ |
| 56948 | | int32_t __ret_628; \ |
| 56949 | | __ret_628 = vqdmulhs_s32(__s0_628, __noswap_vget_lane_s32(__rev1_628, __p2_628)); \ |
| 56950 | | __ret_628; \ |
| 58300 | #define vqdmulhs_lane_s32(__p0_720, __p1_720, __p2_720) __extension__ ({ \ |
| 58301 | int32_t __s0_720 = __p0_720; \ |
| 58302 | int32x2_t __s1_720 = __p1_720; \ |
| 58303 | int32x2_t __rev1_720; __rev1_720 = __builtin_shufflevector(__s1_720, __s1_720, 1, 0); \ |
| 58304 | int32_t __ret_720; \ |
| 58305 | __ret_720 = vqdmulhs_s32(__s0_720, __noswap_vget_lane_s32(__rev1_720, __p2_720)); \ |
| 58306 | __ret_720; \ |
| 56951 | 58307 | }) |
| 56952 | 58308 | #endif |
| 56953 | 58309 | |
| 56954 | 58310 | #ifdef __LITTLE_ENDIAN__ |
| 56955 | | #define vqdmulhh_lane_s16(__p0_629, __p1_629, __p2_629) __extension__ ({ \ |
| 56956 | | int16_t __s0_629 = __p0_629; \ |
| 56957 | | int16x4_t __s1_629 = __p1_629; \ |
| 56958 | | int16_t __ret_629; \ |
| 56959 | | __ret_629 = vqdmulhh_s16(__s0_629, vget_lane_s16(__s1_629, __p2_629)); \ |
| 56960 | | __ret_629; \ |
| 58311 | #define vqdmulhh_lane_s16(__p0_721, __p1_721, __p2_721) __extension__ ({ \ |
| 58312 | int16_t __s0_721 = __p0_721; \ |
| 58313 | int16x4_t __s1_721 = __p1_721; \ |
| 58314 | int16_t __ret_721; \ |
| 58315 | __ret_721 = vqdmulhh_s16(__s0_721, vget_lane_s16(__s1_721, __p2_721)); \ |
| 58316 | __ret_721; \ |
| 56961 | 58317 | }) |
| 56962 | 58318 | #else |
| 56963 | | #define vqdmulhh_lane_s16(__p0_630, __p1_630, __p2_630) __extension__ ({ \ |
| 56964 | | int16_t __s0_630 = __p0_630; \ |
| 56965 | | int16x4_t __s1_630 = __p1_630; \ |
| 56966 | | int16x4_t __rev1_630; __rev1_630 = __builtin_shufflevector(__s1_630, __s1_630, 3, 2, 1, 0); \ |
| 56967 | | int16_t __ret_630; \ |
| 56968 | | __ret_630 = vqdmulhh_s16(__s0_630, __noswap_vget_lane_s16(__rev1_630, __p2_630)); \ |
| 56969 | | __ret_630; \ |
| 58319 | #define vqdmulhh_lane_s16(__p0_722, __p1_722, __p2_722) __extension__ ({ \ |
| 58320 | int16_t __s0_722 = __p0_722; \ |
| 58321 | int16x4_t __s1_722 = __p1_722; \ |
| 58322 | int16x4_t __rev1_722; __rev1_722 = __builtin_shufflevector(__s1_722, __s1_722, 3, 2, 1, 0); \ |
| 58323 | int16_t __ret_722; \ |
| 58324 | __ret_722 = vqdmulhh_s16(__s0_722, __noswap_vget_lane_s16(__rev1_722, __p2_722)); \ |
| 58325 | __ret_722; \ |
| 56970 | 58326 | }) |
| 56971 | 58327 | #endif |
| 56972 | 58328 | |
| 56973 | 58329 | #ifdef __LITTLE_ENDIAN__ |
| 56974 | | #define vqdmulhs_laneq_s32(__p0_631, __p1_631, __p2_631) __extension__ ({ \ |
| 56975 | | int32_t __s0_631 = __p0_631; \ |
| 56976 | | int32x4_t __s1_631 = __p1_631; \ |
| 56977 | | int32_t __ret_631; \ |
| 56978 | | __ret_631 = vqdmulhs_s32(__s0_631, vgetq_lane_s32(__s1_631, __p2_631)); \ |
| 56979 | | __ret_631; \ |
| 58330 | #define vqdmulhs_laneq_s32(__p0_723, __p1_723, __p2_723) __extension__ ({ \ |
| 58331 | int32_t __s0_723 = __p0_723; \ |
| 58332 | int32x4_t __s1_723 = __p1_723; \ |
| 58333 | int32_t __ret_723; \ |
| 58334 | __ret_723 = vqdmulhs_s32(__s0_723, vgetq_lane_s32(__s1_723, __p2_723)); \ |
| 58335 | __ret_723; \ |
| 56980 | 58336 | }) |
| 56981 | 58337 | #else |
| 56982 | | #define vqdmulhs_laneq_s32(__p0_632, __p1_632, __p2_632) __extension__ ({ \ |
| 56983 | | int32_t __s0_632 = __p0_632; \ |
| 56984 | | int32x4_t __s1_632 = __p1_632; \ |
| 56985 | | int32x4_t __rev1_632; __rev1_632 = __builtin_shufflevector(__s1_632, __s1_632, 3, 2, 1, 0); \ |
| 56986 | | int32_t __ret_632; \ |
| 56987 | | __ret_632 = vqdmulhs_s32(__s0_632, __noswap_vgetq_lane_s32(__rev1_632, __p2_632)); \ |
| 56988 | | __ret_632; \ |
| 58338 | #define vqdmulhs_laneq_s32(__p0_724, __p1_724, __p2_724) __extension__ ({ \ |
| 58339 | int32_t __s0_724 = __p0_724; \ |
| 58340 | int32x4_t __s1_724 = __p1_724; \ |
| 58341 | int32x4_t __rev1_724; __rev1_724 = __builtin_shufflevector(__s1_724, __s1_724, 3, 2, 1, 0); \ |
| 58342 | int32_t __ret_724; \ |
| 58343 | __ret_724 = vqdmulhs_s32(__s0_724, __noswap_vgetq_lane_s32(__rev1_724, __p2_724)); \ |
| 58344 | __ret_724; \ |
| 56989 | 58345 | }) |
| 56990 | 58346 | #endif |
| 56991 | 58347 | |
| 56992 | 58348 | #ifdef __LITTLE_ENDIAN__ |
| 56993 | | #define vqdmulhh_laneq_s16(__p0_633, __p1_633, __p2_633) __extension__ ({ \ |
| 56994 | | int16_t __s0_633 = __p0_633; \ |
| 56995 | | int16x8_t __s1_633 = __p1_633; \ |
| 56996 | | int16_t __ret_633; \ |
| 56997 | | __ret_633 = vqdmulhh_s16(__s0_633, vgetq_lane_s16(__s1_633, __p2_633)); \ |
| 56998 | | __ret_633; \ |
| 58349 | #define vqdmulhh_laneq_s16(__p0_725, __p1_725, __p2_725) __extension__ ({ \ |
| 58350 | int16_t __s0_725 = __p0_725; \ |
| 58351 | int16x8_t __s1_725 = __p1_725; \ |
| 58352 | int16_t __ret_725; \ |
| 58353 | __ret_725 = vqdmulhh_s16(__s0_725, vgetq_lane_s16(__s1_725, __p2_725)); \ |
| 58354 | __ret_725; \ |
| 56999 | 58355 | }) |
| 57000 | 58356 | #else |
| 57001 | | #define vqdmulhh_laneq_s16(__p0_634, __p1_634, __p2_634) __extension__ ({ \ |
| 57002 | | int16_t __s0_634 = __p0_634; \ |
| 57003 | | int16x8_t __s1_634 = __p1_634; \ |
| 57004 | | int16x8_t __rev1_634; __rev1_634 = __builtin_shufflevector(__s1_634, __s1_634, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57005 | | int16_t __ret_634; \ |
| 57006 | | __ret_634 = vqdmulhh_s16(__s0_634, __noswap_vgetq_lane_s16(__rev1_634, __p2_634)); \ |
| 57007 | | __ret_634; \ |
| 58357 | #define vqdmulhh_laneq_s16(__p0_726, __p1_726, __p2_726) __extension__ ({ \ |
| 58358 | int16_t __s0_726 = __p0_726; \ |
| 58359 | int16x8_t __s1_726 = __p1_726; \ |
| 58360 | int16x8_t __rev1_726; __rev1_726 = __builtin_shufflevector(__s1_726, __s1_726, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58361 | int16_t __ret_726; \ |
| 58362 | __ret_726 = vqdmulhh_s16(__s0_726, __noswap_vgetq_lane_s16(__rev1_726, __p2_726)); \ |
| 58363 | __ret_726; \ |
| 57008 | 58364 | }) |
| 57009 | 58365 | #endif |
| 57010 | 58366 | |
| ... | ... | @@ -57137,86 +58493,86 @@ __ai int32x4_t vqdmull_high_s16(int16x8_t __p0, int16x8_t __p1) { |
| 57137 | 58493 | #endif |
| 57138 | 58494 | |
| 57139 | 58495 | #ifdef __LITTLE_ENDIAN__ |
| 57140 | | #define vqdmull_high_lane_s32(__p0_635, __p1_635, __p2_635) __extension__ ({ \ |
| 57141 | | int32x4_t __s0_635 = __p0_635; \ |
| 57142 | | int32x2_t __s1_635 = __p1_635; \ |
| 57143 | | int64x2_t __ret_635; \ |
| 57144 | | __ret_635 = vqdmull_s32(vget_high_s32(__s0_635), splat_lane_s32(__s1_635, __p2_635)); \ |
| 57145 | | __ret_635; \ |
| 58496 | #define vqdmull_high_lane_s32(__p0_727, __p1_727, __p2_727) __extension__ ({ \ |
| 58497 | int32x4_t __s0_727 = __p0_727; \ |
| 58498 | int32x2_t __s1_727 = __p1_727; \ |
| 58499 | int64x2_t __ret_727; \ |
| 58500 | __ret_727 = vqdmull_s32(vget_high_s32(__s0_727), splat_lane_s32(__s1_727, __p2_727)); \ |
| 58501 | __ret_727; \ |
| 57146 | 58502 | }) |
| 57147 | 58503 | #else |
| 57148 | | #define vqdmull_high_lane_s32(__p0_636, __p1_636, __p2_636) __extension__ ({ \ |
| 57149 | | int32x4_t __s0_636 = __p0_636; \ |
| 57150 | | int32x2_t __s1_636 = __p1_636; \ |
| 57151 | | int32x4_t __rev0_636; __rev0_636 = __builtin_shufflevector(__s0_636, __s0_636, 3, 2, 1, 0); \ |
| 57152 | | int32x2_t __rev1_636; __rev1_636 = __builtin_shufflevector(__s1_636, __s1_636, 1, 0); \ |
| 57153 | | int64x2_t __ret_636; \ |
| 57154 | | __ret_636 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_636), __noswap_splat_lane_s32(__rev1_636, __p2_636)); \ |
| 57155 | | __ret_636 = __builtin_shufflevector(__ret_636, __ret_636, 1, 0); \ |
| 57156 | | __ret_636; \ |
| 58504 | #define vqdmull_high_lane_s32(__p0_728, __p1_728, __p2_728) __extension__ ({ \ |
| 58505 | int32x4_t __s0_728 = __p0_728; \ |
| 58506 | int32x2_t __s1_728 = __p1_728; \ |
| 58507 | int32x4_t __rev0_728; __rev0_728 = __builtin_shufflevector(__s0_728, __s0_728, 3, 2, 1, 0); \ |
| 58508 | int32x2_t __rev1_728; __rev1_728 = __builtin_shufflevector(__s1_728, __s1_728, 1, 0); \ |
| 58509 | int64x2_t __ret_728; \ |
| 58510 | __ret_728 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_728), __noswap_splat_lane_s32(__rev1_728, __p2_728)); \ |
| 58511 | __ret_728 = __builtin_shufflevector(__ret_728, __ret_728, 1, 0); \ |
| 58512 | __ret_728; \ |
| 57157 | 58513 | }) |
| 57158 | 58514 | #endif |
| 57159 | 58515 | |
| 57160 | 58516 | #ifdef __LITTLE_ENDIAN__ |
| 57161 | | #define vqdmull_high_lane_s16(__p0_637, __p1_637, __p2_637) __extension__ ({ \ |
| 57162 | | int16x8_t __s0_637 = __p0_637; \ |
| 57163 | | int16x4_t __s1_637 = __p1_637; \ |
| 57164 | | int32x4_t __ret_637; \ |
| 57165 | | __ret_637 = vqdmull_s16(vget_high_s16(__s0_637), splat_lane_s16(__s1_637, __p2_637)); \ |
| 57166 | | __ret_637; \ |
| 58517 | #define vqdmull_high_lane_s16(__p0_729, __p1_729, __p2_729) __extension__ ({ \ |
| 58518 | int16x8_t __s0_729 = __p0_729; \ |
| 58519 | int16x4_t __s1_729 = __p1_729; \ |
| 58520 | int32x4_t __ret_729; \ |
| 58521 | __ret_729 = vqdmull_s16(vget_high_s16(__s0_729), splat_lane_s16(__s1_729, __p2_729)); \ |
| 58522 | __ret_729; \ |
| 57167 | 58523 | }) |
| 57168 | 58524 | #else |
| 57169 | | #define vqdmull_high_lane_s16(__p0_638, __p1_638, __p2_638) __extension__ ({ \ |
| 57170 | | int16x8_t __s0_638 = __p0_638; \ |
| 57171 | | int16x4_t __s1_638 = __p1_638; \ |
| 57172 | | int16x8_t __rev0_638; __rev0_638 = __builtin_shufflevector(__s0_638, __s0_638, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57173 | | int16x4_t __rev1_638; __rev1_638 = __builtin_shufflevector(__s1_638, __s1_638, 3, 2, 1, 0); \ |
| 57174 | | int32x4_t __ret_638; \ |
| 57175 | | __ret_638 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_638), __noswap_splat_lane_s16(__rev1_638, __p2_638)); \ |
| 57176 | | __ret_638 = __builtin_shufflevector(__ret_638, __ret_638, 3, 2, 1, 0); \ |
| 57177 | | __ret_638; \ |
| 58525 | #define vqdmull_high_lane_s16(__p0_730, __p1_730, __p2_730) __extension__ ({ \ |
| 58526 | int16x8_t __s0_730 = __p0_730; \ |
| 58527 | int16x4_t __s1_730 = __p1_730; \ |
| 58528 | int16x8_t __rev0_730; __rev0_730 = __builtin_shufflevector(__s0_730, __s0_730, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58529 | int16x4_t __rev1_730; __rev1_730 = __builtin_shufflevector(__s1_730, __s1_730, 3, 2, 1, 0); \ |
| 58530 | int32x4_t __ret_730; \ |
| 58531 | __ret_730 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_730), __noswap_splat_lane_s16(__rev1_730, __p2_730)); \ |
| 58532 | __ret_730 = __builtin_shufflevector(__ret_730, __ret_730, 3, 2, 1, 0); \ |
| 58533 | __ret_730; \ |
| 57178 | 58534 | }) |
| 57179 | 58535 | #endif |
| 57180 | 58536 | |
| 57181 | 58537 | #ifdef __LITTLE_ENDIAN__ |
| 57182 | | #define vqdmull_high_laneq_s32(__p0_639, __p1_639, __p2_639) __extension__ ({ \ |
| 57183 | | int32x4_t __s0_639 = __p0_639; \ |
| 57184 | | int32x4_t __s1_639 = __p1_639; \ |
| 57185 | | int64x2_t __ret_639; \ |
| 57186 | | __ret_639 = vqdmull_s32(vget_high_s32(__s0_639), splat_laneq_s32(__s1_639, __p2_639)); \ |
| 57187 | | __ret_639; \ |
| 58538 | #define vqdmull_high_laneq_s32(__p0_731, __p1_731, __p2_731) __extension__ ({ \ |
| 58539 | int32x4_t __s0_731 = __p0_731; \ |
| 58540 | int32x4_t __s1_731 = __p1_731; \ |
| 58541 | int64x2_t __ret_731; \ |
| 58542 | __ret_731 = vqdmull_s32(vget_high_s32(__s0_731), splat_laneq_s32(__s1_731, __p2_731)); \ |
| 58543 | __ret_731; \ |
| 57188 | 58544 | }) |
| 57189 | 58545 | #else |
| 57190 | | #define vqdmull_high_laneq_s32(__p0_640, __p1_640, __p2_640) __extension__ ({ \ |
| 57191 | | int32x4_t __s0_640 = __p0_640; \ |
| 57192 | | int32x4_t __s1_640 = __p1_640; \ |
| 57193 | | int32x4_t __rev0_640; __rev0_640 = __builtin_shufflevector(__s0_640, __s0_640, 3, 2, 1, 0); \ |
| 57194 | | int32x4_t __rev1_640; __rev1_640 = __builtin_shufflevector(__s1_640, __s1_640, 3, 2, 1, 0); \ |
| 57195 | | int64x2_t __ret_640; \ |
| 57196 | | __ret_640 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_640), __noswap_splat_laneq_s32(__rev1_640, __p2_640)); \ |
| 57197 | | __ret_640 = __builtin_shufflevector(__ret_640, __ret_640, 1, 0); \ |
| 57198 | | __ret_640; \ |
| 58546 | #define vqdmull_high_laneq_s32(__p0_732, __p1_732, __p2_732) __extension__ ({ \ |
| 58547 | int32x4_t __s0_732 = __p0_732; \ |
| 58548 | int32x4_t __s1_732 = __p1_732; \ |
| 58549 | int32x4_t __rev0_732; __rev0_732 = __builtin_shufflevector(__s0_732, __s0_732, 3, 2, 1, 0); \ |
| 58550 | int32x4_t __rev1_732; __rev1_732 = __builtin_shufflevector(__s1_732, __s1_732, 3, 2, 1, 0); \ |
| 58551 | int64x2_t __ret_732; \ |
| 58552 | __ret_732 = __noswap_vqdmull_s32(__noswap_vget_high_s32(__rev0_732), __noswap_splat_laneq_s32(__rev1_732, __p2_732)); \ |
| 58553 | __ret_732 = __builtin_shufflevector(__ret_732, __ret_732, 1, 0); \ |
| 58554 | __ret_732; \ |
| 57199 | 58555 | }) |
| 57200 | 58556 | #endif |
| 57201 | 58557 | |
| 57202 | 58558 | #ifdef __LITTLE_ENDIAN__ |
| 57203 | | #define vqdmull_high_laneq_s16(__p0_641, __p1_641, __p2_641) __extension__ ({ \ |
| 57204 | | int16x8_t __s0_641 = __p0_641; \ |
| 57205 | | int16x8_t __s1_641 = __p1_641; \ |
| 57206 | | int32x4_t __ret_641; \ |
| 57207 | | __ret_641 = vqdmull_s16(vget_high_s16(__s0_641), splat_laneq_s16(__s1_641, __p2_641)); \ |
| 57208 | | __ret_641; \ |
| 58559 | #define vqdmull_high_laneq_s16(__p0_733, __p1_733, __p2_733) __extension__ ({ \ |
| 58560 | int16x8_t __s0_733 = __p0_733; \ |
| 58561 | int16x8_t __s1_733 = __p1_733; \ |
| 58562 | int32x4_t __ret_733; \ |
| 58563 | __ret_733 = vqdmull_s16(vget_high_s16(__s0_733), splat_laneq_s16(__s1_733, __p2_733)); \ |
| 58564 | __ret_733; \ |
| 57209 | 58565 | }) |
| 57210 | 58566 | #else |
| 57211 | | #define vqdmull_high_laneq_s16(__p0_642, __p1_642, __p2_642) __extension__ ({ \ |
| 57212 | | int16x8_t __s0_642 = __p0_642; \ |
| 57213 | | int16x8_t __s1_642 = __p1_642; \ |
| 57214 | | int16x8_t __rev0_642; __rev0_642 = __builtin_shufflevector(__s0_642, __s0_642, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57215 | | int16x8_t __rev1_642; __rev1_642 = __builtin_shufflevector(__s1_642, __s1_642, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57216 | | int32x4_t __ret_642; \ |
| 57217 | | __ret_642 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_642), __noswap_splat_laneq_s16(__rev1_642, __p2_642)); \ |
| 57218 | | __ret_642 = __builtin_shufflevector(__ret_642, __ret_642, 3, 2, 1, 0); \ |
| 57219 | | __ret_642; \ |
| 58567 | #define vqdmull_high_laneq_s16(__p0_734, __p1_734, __p2_734) __extension__ ({ \ |
| 58568 | int16x8_t __s0_734 = __p0_734; \ |
| 58569 | int16x8_t __s1_734 = __p1_734; \ |
| 58570 | int16x8_t __rev0_734; __rev0_734 = __builtin_shufflevector(__s0_734, __s0_734, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58571 | int16x8_t __rev1_734; __rev1_734 = __builtin_shufflevector(__s1_734, __s1_734, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58572 | int32x4_t __ret_734; \ |
| 58573 | __ret_734 = __noswap_vqdmull_s16(__noswap_vget_high_s16(__rev0_734), __noswap_splat_laneq_s16(__rev1_734, __p2_734)); \ |
| 58574 | __ret_734 = __builtin_shufflevector(__ret_734, __ret_734, 3, 2, 1, 0); \ |
| 58575 | __ret_734; \ |
| 57220 | 58576 | }) |
| 57221 | 58577 | #endif |
| 57222 | 58578 | |
| ... | ... | @@ -57253,120 +58609,120 @@ __ai int32x4_t vqdmull_high_n_s16(int16x8_t __p0, int16_t __p1) { |
| 57253 | 58609 | #endif |
| 57254 | 58610 | |
| 57255 | 58611 | #ifdef __LITTLE_ENDIAN__ |
| 57256 | | #define vqdmulls_lane_s32(__p0_643, __p1_643, __p2_643) __extension__ ({ \ |
| 57257 | | int32_t __s0_643 = __p0_643; \ |
| 57258 | | int32x2_t __s1_643 = __p1_643; \ |
| 57259 | | int64_t __ret_643; \ |
| 57260 | | __ret_643 = vqdmulls_s32(__s0_643, vget_lane_s32(__s1_643, __p2_643)); \ |
| 57261 | | __ret_643; \ |
| 58612 | #define vqdmulls_lane_s32(__p0_735, __p1_735, __p2_735) __extension__ ({ \ |
| 58613 | int32_t __s0_735 = __p0_735; \ |
| 58614 | int32x2_t __s1_735 = __p1_735; \ |
| 58615 | int64_t __ret_735; \ |
| 58616 | __ret_735 = vqdmulls_s32(__s0_735, vget_lane_s32(__s1_735, __p2_735)); \ |
| 58617 | __ret_735; \ |
| 57262 | 58618 | }) |
| 57263 | 58619 | #else |
| 57264 | | #define vqdmulls_lane_s32(__p0_644, __p1_644, __p2_644) __extension__ ({ \ |
| 57265 | | int32_t __s0_644 = __p0_644; \ |
| 57266 | | int32x2_t __s1_644 = __p1_644; \ |
| 57267 | | int32x2_t __rev1_644; __rev1_644 = __builtin_shufflevector(__s1_644, __s1_644, 1, 0); \ |
| 57268 | | int64_t __ret_644; \ |
| 57269 | | __ret_644 = vqdmulls_s32(__s0_644, __noswap_vget_lane_s32(__rev1_644, __p2_644)); \ |
| 57270 | | __ret_644; \ |
| 58620 | #define vqdmulls_lane_s32(__p0_736, __p1_736, __p2_736) __extension__ ({ \ |
| 58621 | int32_t __s0_736 = __p0_736; \ |
| 58622 | int32x2_t __s1_736 = __p1_736; \ |
| 58623 | int32x2_t __rev1_736; __rev1_736 = __builtin_shufflevector(__s1_736, __s1_736, 1, 0); \ |
| 58624 | int64_t __ret_736; \ |
| 58625 | __ret_736 = vqdmulls_s32(__s0_736, __noswap_vget_lane_s32(__rev1_736, __p2_736)); \ |
| 58626 | __ret_736; \ |
| 57271 | 58627 | }) |
| 57272 | 58628 | #endif |
| 57273 | 58629 | |
| 57274 | 58630 | #ifdef __LITTLE_ENDIAN__ |
| 57275 | | #define vqdmullh_lane_s16(__p0_645, __p1_645, __p2_645) __extension__ ({ \ |
| 57276 | | int16_t __s0_645 = __p0_645; \ |
| 57277 | | int16x4_t __s1_645 = __p1_645; \ |
| 57278 | | int32_t __ret_645; \ |
| 57279 | | __ret_645 = vqdmullh_s16(__s0_645, vget_lane_s16(__s1_645, __p2_645)); \ |
| 57280 | | __ret_645; \ |
| 58631 | #define vqdmullh_lane_s16(__p0_737, __p1_737, __p2_737) __extension__ ({ \ |
| 58632 | int16_t __s0_737 = __p0_737; \ |
| 58633 | int16x4_t __s1_737 = __p1_737; \ |
| 58634 | int32_t __ret_737; \ |
| 58635 | __ret_737 = vqdmullh_s16(__s0_737, vget_lane_s16(__s1_737, __p2_737)); \ |
| 58636 | __ret_737; \ |
| 57281 | 58637 | }) |
| 57282 | 58638 | #else |
| 57283 | | #define vqdmullh_lane_s16(__p0_646, __p1_646, __p2_646) __extension__ ({ \ |
| 57284 | | int16_t __s0_646 = __p0_646; \ |
| 57285 | | int16x4_t __s1_646 = __p1_646; \ |
| 57286 | | int16x4_t __rev1_646; __rev1_646 = __builtin_shufflevector(__s1_646, __s1_646, 3, 2, 1, 0); \ |
| 57287 | | int32_t __ret_646; \ |
| 57288 | | __ret_646 = vqdmullh_s16(__s0_646, __noswap_vget_lane_s16(__rev1_646, __p2_646)); \ |
| 57289 | | __ret_646; \ |
| 58639 | #define vqdmullh_lane_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \ |
| 58640 | int16_t __s0_738 = __p0_738; \ |
| 58641 | int16x4_t __s1_738 = __p1_738; \ |
| 58642 | int16x4_t __rev1_738; __rev1_738 = __builtin_shufflevector(__s1_738, __s1_738, 3, 2, 1, 0); \ |
| 58643 | int32_t __ret_738; \ |
| 58644 | __ret_738 = vqdmullh_s16(__s0_738, __noswap_vget_lane_s16(__rev1_738, __p2_738)); \ |
| 58645 | __ret_738; \ |
| 57290 | 58646 | }) |
| 57291 | 58647 | #endif |
| 57292 | 58648 | |
| 57293 | 58649 | #ifdef __LITTLE_ENDIAN__ |
| 57294 | | #define vqdmulls_laneq_s32(__p0_647, __p1_647, __p2_647) __extension__ ({ \ |
| 57295 | | int32_t __s0_647 = __p0_647; \ |
| 57296 | | int32x4_t __s1_647 = __p1_647; \ |
| 57297 | | int64_t __ret_647; \ |
| 57298 | | __ret_647 = vqdmulls_s32(__s0_647, vgetq_lane_s32(__s1_647, __p2_647)); \ |
| 57299 | | __ret_647; \ |
| 58650 | #define vqdmulls_laneq_s32(__p0_739, __p1_739, __p2_739) __extension__ ({ \ |
| 58651 | int32_t __s0_739 = __p0_739; \ |
| 58652 | int32x4_t __s1_739 = __p1_739; \ |
| 58653 | int64_t __ret_739; \ |
| 58654 | __ret_739 = vqdmulls_s32(__s0_739, vgetq_lane_s32(__s1_739, __p2_739)); \ |
| 58655 | __ret_739; \ |
| 57300 | 58656 | }) |
| 57301 | 58657 | #else |
| 57302 | | #define vqdmulls_laneq_s32(__p0_648, __p1_648, __p2_648) __extension__ ({ \ |
| 57303 | | int32_t __s0_648 = __p0_648; \ |
| 57304 | | int32x4_t __s1_648 = __p1_648; \ |
| 57305 | | int32x4_t __rev1_648; __rev1_648 = __builtin_shufflevector(__s1_648, __s1_648, 3, 2, 1, 0); \ |
| 57306 | | int64_t __ret_648; \ |
| 57307 | | __ret_648 = vqdmulls_s32(__s0_648, __noswap_vgetq_lane_s32(__rev1_648, __p2_648)); \ |
| 57308 | | __ret_648; \ |
| 58658 | #define vqdmulls_laneq_s32(__p0_740, __p1_740, __p2_740) __extension__ ({ \ |
| 58659 | int32_t __s0_740 = __p0_740; \ |
| 58660 | int32x4_t __s1_740 = __p1_740; \ |
| 58661 | int32x4_t __rev1_740; __rev1_740 = __builtin_shufflevector(__s1_740, __s1_740, 3, 2, 1, 0); \ |
| 58662 | int64_t __ret_740; \ |
| 58663 | __ret_740 = vqdmulls_s32(__s0_740, __noswap_vgetq_lane_s32(__rev1_740, __p2_740)); \ |
| 58664 | __ret_740; \ |
| 57309 | 58665 | }) |
| 57310 | 58666 | #endif |
| 57311 | 58667 | |
| 57312 | 58668 | #ifdef __LITTLE_ENDIAN__ |
| 57313 | | #define vqdmullh_laneq_s16(__p0_649, __p1_649, __p2_649) __extension__ ({ \ |
| 57314 | | int16_t __s0_649 = __p0_649; \ |
| 57315 | | int16x8_t __s1_649 = __p1_649; \ |
| 57316 | | int32_t __ret_649; \ |
| 57317 | | __ret_649 = vqdmullh_s16(__s0_649, vgetq_lane_s16(__s1_649, __p2_649)); \ |
| 57318 | | __ret_649; \ |
| 58669 | #define vqdmullh_laneq_s16(__p0_741, __p1_741, __p2_741) __extension__ ({ \ |
| 58670 | int16_t __s0_741 = __p0_741; \ |
| 58671 | int16x8_t __s1_741 = __p1_741; \ |
| 58672 | int32_t __ret_741; \ |
| 58673 | __ret_741 = vqdmullh_s16(__s0_741, vgetq_lane_s16(__s1_741, __p2_741)); \ |
| 58674 | __ret_741; \ |
| 57319 | 58675 | }) |
| 57320 | 58676 | #else |
| 57321 | | #define vqdmullh_laneq_s16(__p0_650, __p1_650, __p2_650) __extension__ ({ \ |
| 57322 | | int16_t __s0_650 = __p0_650; \ |
| 57323 | | int16x8_t __s1_650 = __p1_650; \ |
| 57324 | | int16x8_t __rev1_650; __rev1_650 = __builtin_shufflevector(__s1_650, __s1_650, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57325 | | int32_t __ret_650; \ |
| 57326 | | __ret_650 = vqdmullh_s16(__s0_650, __noswap_vgetq_lane_s16(__rev1_650, __p2_650)); \ |
| 57327 | | __ret_650; \ |
| 58677 | #define vqdmullh_laneq_s16(__p0_742, __p1_742, __p2_742) __extension__ ({ \ |
| 58678 | int16_t __s0_742 = __p0_742; \ |
| 58679 | int16x8_t __s1_742 = __p1_742; \ |
| 58680 | int16x8_t __rev1_742; __rev1_742 = __builtin_shufflevector(__s1_742, __s1_742, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58681 | int32_t __ret_742; \ |
| 58682 | __ret_742 = vqdmullh_s16(__s0_742, __noswap_vgetq_lane_s16(__rev1_742, __p2_742)); \ |
| 58683 | __ret_742; \ |
| 57328 | 58684 | }) |
| 57329 | 58685 | #endif |
| 57330 | 58686 | |
| 57331 | 58687 | #ifdef __LITTLE_ENDIAN__ |
| 57332 | | #define vqdmull_laneq_s32(__p0_651, __p1_651, __p2_651) __extension__ ({ \ |
| 57333 | | int32x2_t __s0_651 = __p0_651; \ |
| 57334 | | int32x4_t __s1_651 = __p1_651; \ |
| 57335 | | int64x2_t __ret_651; \ |
| 57336 | | __ret_651 = vqdmull_s32(__s0_651, splat_laneq_s32(__s1_651, __p2_651)); \ |
| 57337 | | __ret_651; \ |
| 58688 | #define vqdmull_laneq_s32(__p0_743, __p1_743, __p2_743) __extension__ ({ \ |
| 58689 | int32x2_t __s0_743 = __p0_743; \ |
| 58690 | int32x4_t __s1_743 = __p1_743; \ |
| 58691 | int64x2_t __ret_743; \ |
| 58692 | __ret_743 = vqdmull_s32(__s0_743, splat_laneq_s32(__s1_743, __p2_743)); \ |
| 58693 | __ret_743; \ |
| 57338 | 58694 | }) |
| 57339 | 58695 | #else |
| 57340 | | #define vqdmull_laneq_s32(__p0_652, __p1_652, __p2_652) __extension__ ({ \ |
| 57341 | | int32x2_t __s0_652 = __p0_652; \ |
| 57342 | | int32x4_t __s1_652 = __p1_652; \ |
| 57343 | | int32x2_t __rev0_652; __rev0_652 = __builtin_shufflevector(__s0_652, __s0_652, 1, 0); \ |
| 57344 | | int32x4_t __rev1_652; __rev1_652 = __builtin_shufflevector(__s1_652, __s1_652, 3, 2, 1, 0); \ |
| 57345 | | int64x2_t __ret_652; \ |
| 57346 | | __ret_652 = __noswap_vqdmull_s32(__rev0_652, __noswap_splat_laneq_s32(__rev1_652, __p2_652)); \ |
| 57347 | | __ret_652 = __builtin_shufflevector(__ret_652, __ret_652, 1, 0); \ |
| 57348 | | __ret_652; \ |
| 58696 | #define vqdmull_laneq_s32(__p0_744, __p1_744, __p2_744) __extension__ ({ \ |
| 58697 | int32x2_t __s0_744 = __p0_744; \ |
| 58698 | int32x4_t __s1_744 = __p1_744; \ |
| 58699 | int32x2_t __rev0_744; __rev0_744 = __builtin_shufflevector(__s0_744, __s0_744, 1, 0); \ |
| 58700 | int32x4_t __rev1_744; __rev1_744 = __builtin_shufflevector(__s1_744, __s1_744, 3, 2, 1, 0); \ |
| 58701 | int64x2_t __ret_744; \ |
| 58702 | __ret_744 = __noswap_vqdmull_s32(__rev0_744, __noswap_splat_laneq_s32(__rev1_744, __p2_744)); \ |
| 58703 | __ret_744 = __builtin_shufflevector(__ret_744, __ret_744, 1, 0); \ |
| 58704 | __ret_744; \ |
| 57349 | 58705 | }) |
| 57350 | 58706 | #endif |
| 57351 | 58707 | |
| 57352 | 58708 | #ifdef __LITTLE_ENDIAN__ |
| 57353 | | #define vqdmull_laneq_s16(__p0_653, __p1_653, __p2_653) __extension__ ({ \ |
| 57354 | | int16x4_t __s0_653 = __p0_653; \ |
| 57355 | | int16x8_t __s1_653 = __p1_653; \ |
| 57356 | | int32x4_t __ret_653; \ |
| 57357 | | __ret_653 = vqdmull_s16(__s0_653, splat_laneq_s16(__s1_653, __p2_653)); \ |
| 57358 | | __ret_653; \ |
| 58709 | #define vqdmull_laneq_s16(__p0_745, __p1_745, __p2_745) __extension__ ({ \ |
| 58710 | int16x4_t __s0_745 = __p0_745; \ |
| 58711 | int16x8_t __s1_745 = __p1_745; \ |
| 58712 | int32x4_t __ret_745; \ |
| 58713 | __ret_745 = vqdmull_s16(__s0_745, splat_laneq_s16(__s1_745, __p2_745)); \ |
| 58714 | __ret_745; \ |
| 57359 | 58715 | }) |
| 57360 | 58716 | #else |
| 57361 | | #define vqdmull_laneq_s16(__p0_654, __p1_654, __p2_654) __extension__ ({ \ |
| 57362 | | int16x4_t __s0_654 = __p0_654; \ |
| 57363 | | int16x8_t __s1_654 = __p1_654; \ |
| 57364 | | int16x4_t __rev0_654; __rev0_654 = __builtin_shufflevector(__s0_654, __s0_654, 3, 2, 1, 0); \ |
| 57365 | | int16x8_t __rev1_654; __rev1_654 = __builtin_shufflevector(__s1_654, __s1_654, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57366 | | int32x4_t __ret_654; \ |
| 57367 | | __ret_654 = __noswap_vqdmull_s16(__rev0_654, __noswap_splat_laneq_s16(__rev1_654, __p2_654)); \ |
| 57368 | | __ret_654 = __builtin_shufflevector(__ret_654, __ret_654, 3, 2, 1, 0); \ |
| 57369 | | __ret_654; \ |
| 58717 | #define vqdmull_laneq_s16(__p0_746, __p1_746, __p2_746) __extension__ ({ \ |
| 58718 | int16x4_t __s0_746 = __p0_746; \ |
| 58719 | int16x8_t __s1_746 = __p1_746; \ |
| 58720 | int16x4_t __rev0_746; __rev0_746 = __builtin_shufflevector(__s0_746, __s0_746, 3, 2, 1, 0); \ |
| 58721 | int16x8_t __rev1_746; __rev1_746 = __builtin_shufflevector(__s1_746, __s1_746, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58722 | int32x4_t __ret_746; \ |
| 58723 | __ret_746 = __noswap_vqdmull_s16(__rev0_746, __noswap_splat_laneq_s16(__rev1_746, __p2_746)); \ |
| 58724 | __ret_746 = __builtin_shufflevector(__ret_746, __ret_746, 3, 2, 1, 0); \ |
| 58725 | __ret_746; \ |
| 57370 | 58726 | }) |
| 57371 | 58727 | #endif |
| 57372 | 58728 | |
| ... | ... | @@ -57704,78 +59060,78 @@ __ai int16_t vqrdmulhh_s16(int16_t __p0, int16_t __p1) { |
| 57704 | 59060 | #endif |
| 57705 | 59061 | |
| 57706 | 59062 | #ifdef __LITTLE_ENDIAN__ |
| 57707 | | #define vqrdmulhs_lane_s32(__p0_655, __p1_655, __p2_655) __extension__ ({ \ |
| 57708 | | int32_t __s0_655 = __p0_655; \ |
| 57709 | | int32x2_t __s1_655 = __p1_655; \ |
| 57710 | | int32_t __ret_655; \ |
| 57711 | | __ret_655 = vqrdmulhs_s32(__s0_655, vget_lane_s32(__s1_655, __p2_655)); \ |
| 57712 | | __ret_655; \ |
| 59063 | #define vqrdmulhs_lane_s32(__p0_747, __p1_747, __p2_747) __extension__ ({ \ |
| 59064 | int32_t __s0_747 = __p0_747; \ |
| 59065 | int32x2_t __s1_747 = __p1_747; \ |
| 59066 | int32_t __ret_747; \ |
| 59067 | __ret_747 = vqrdmulhs_s32(__s0_747, vget_lane_s32(__s1_747, __p2_747)); \ |
| 59068 | __ret_747; \ |
| 57713 | 59069 | }) |
| 57714 | 59070 | #else |
| 57715 | | #define vqrdmulhs_lane_s32(__p0_656, __p1_656, __p2_656) __extension__ ({ \ |
| 57716 | | int32_t __s0_656 = __p0_656; \ |
| 57717 | | int32x2_t __s1_656 = __p1_656; \ |
| 57718 | | int32x2_t __rev1_656; __rev1_656 = __builtin_shufflevector(__s1_656, __s1_656, 1, 0); \ |
| 57719 | | int32_t __ret_656; \ |
| 57720 | | __ret_656 = vqrdmulhs_s32(__s0_656, __noswap_vget_lane_s32(__rev1_656, __p2_656)); \ |
| 57721 | | __ret_656; \ |
| 59071 | #define vqrdmulhs_lane_s32(__p0_748, __p1_748, __p2_748) __extension__ ({ \ |
| 59072 | int32_t __s0_748 = __p0_748; \ |
| 59073 | int32x2_t __s1_748 = __p1_748; \ |
| 59074 | int32x2_t __rev1_748; __rev1_748 = __builtin_shufflevector(__s1_748, __s1_748, 1, 0); \ |
| 59075 | int32_t __ret_748; \ |
| 59076 | __ret_748 = vqrdmulhs_s32(__s0_748, __noswap_vget_lane_s32(__rev1_748, __p2_748)); \ |
| 59077 | __ret_748; \ |
| 57722 | 59078 | }) |
| 57723 | 59079 | #endif |
| 57724 | 59080 | |
| 57725 | 59081 | #ifdef __LITTLE_ENDIAN__ |
| 57726 | | #define vqrdmulhh_lane_s16(__p0_657, __p1_657, __p2_657) __extension__ ({ \ |
| 57727 | | int16_t __s0_657 = __p0_657; \ |
| 57728 | | int16x4_t __s1_657 = __p1_657; \ |
| 57729 | | int16_t __ret_657; \ |
| 57730 | | __ret_657 = vqrdmulhh_s16(__s0_657, vget_lane_s16(__s1_657, __p2_657)); \ |
| 57731 | | __ret_657; \ |
| 59082 | #define vqrdmulhh_lane_s16(__p0_749, __p1_749, __p2_749) __extension__ ({ \ |
| 59083 | int16_t __s0_749 = __p0_749; \ |
| 59084 | int16x4_t __s1_749 = __p1_749; \ |
| 59085 | int16_t __ret_749; \ |
| 59086 | __ret_749 = vqrdmulhh_s16(__s0_749, vget_lane_s16(__s1_749, __p2_749)); \ |
| 59087 | __ret_749; \ |
| 57732 | 59088 | }) |
| 57733 | 59089 | #else |
| 57734 | | #define vqrdmulhh_lane_s16(__p0_658, __p1_658, __p2_658) __extension__ ({ \ |
| 57735 | | int16_t __s0_658 = __p0_658; \ |
| 57736 | | int16x4_t __s1_658 = __p1_658; \ |
| 57737 | | int16x4_t __rev1_658; __rev1_658 = __builtin_shufflevector(__s1_658, __s1_658, 3, 2, 1, 0); \ |
| 57738 | | int16_t __ret_658; \ |
| 57739 | | __ret_658 = vqrdmulhh_s16(__s0_658, __noswap_vget_lane_s16(__rev1_658, __p2_658)); \ |
| 57740 | | __ret_658; \ |
| 59090 | #define vqrdmulhh_lane_s16(__p0_750, __p1_750, __p2_750) __extension__ ({ \ |
| 59091 | int16_t __s0_750 = __p0_750; \ |
| 59092 | int16x4_t __s1_750 = __p1_750; \ |
| 59093 | int16x4_t __rev1_750; __rev1_750 = __builtin_shufflevector(__s1_750, __s1_750, 3, 2, 1, 0); \ |
| 59094 | int16_t __ret_750; \ |
| 59095 | __ret_750 = vqrdmulhh_s16(__s0_750, __noswap_vget_lane_s16(__rev1_750, __p2_750)); \ |
| 59096 | __ret_750; \ |
| 57741 | 59097 | }) |
| 57742 | 59098 | #endif |
| 57743 | 59099 | |
| 57744 | 59100 | #ifdef __LITTLE_ENDIAN__ |
| 57745 | | #define vqrdmulhs_laneq_s32(__p0_659, __p1_659, __p2_659) __extension__ ({ \ |
| 57746 | | int32_t __s0_659 = __p0_659; \ |
| 57747 | | int32x4_t __s1_659 = __p1_659; \ |
| 57748 | | int32_t __ret_659; \ |
| 57749 | | __ret_659 = vqrdmulhs_s32(__s0_659, vgetq_lane_s32(__s1_659, __p2_659)); \ |
| 57750 | | __ret_659; \ |
| 59101 | #define vqrdmulhs_laneq_s32(__p0_751, __p1_751, __p2_751) __extension__ ({ \ |
| 59102 | int32_t __s0_751 = __p0_751; \ |
| 59103 | int32x4_t __s1_751 = __p1_751; \ |
| 59104 | int32_t __ret_751; \ |
| 59105 | __ret_751 = vqrdmulhs_s32(__s0_751, vgetq_lane_s32(__s1_751, __p2_751)); \ |
| 59106 | __ret_751; \ |
| 57751 | 59107 | }) |
| 57752 | 59108 | #else |
| 57753 | | #define vqrdmulhs_laneq_s32(__p0_660, __p1_660, __p2_660) __extension__ ({ \ |
| 57754 | | int32_t __s0_660 = __p0_660; \ |
| 57755 | | int32x4_t __s1_660 = __p1_660; \ |
| 57756 | | int32x4_t __rev1_660; __rev1_660 = __builtin_shufflevector(__s1_660, __s1_660, 3, 2, 1, 0); \ |
| 57757 | | int32_t __ret_660; \ |
| 57758 | | __ret_660 = vqrdmulhs_s32(__s0_660, __noswap_vgetq_lane_s32(__rev1_660, __p2_660)); \ |
| 57759 | | __ret_660; \ |
| 59109 | #define vqrdmulhs_laneq_s32(__p0_752, __p1_752, __p2_752) __extension__ ({ \ |
| 59110 | int32_t __s0_752 = __p0_752; \ |
| 59111 | int32x4_t __s1_752 = __p1_752; \ |
| 59112 | int32x4_t __rev1_752; __rev1_752 = __builtin_shufflevector(__s1_752, __s1_752, 3, 2, 1, 0); \ |
| 59113 | int32_t __ret_752; \ |
| 59114 | __ret_752 = vqrdmulhs_s32(__s0_752, __noswap_vgetq_lane_s32(__rev1_752, __p2_752)); \ |
| 59115 | __ret_752; \ |
| 57760 | 59116 | }) |
| 57761 | 59117 | #endif |
| 57762 | 59118 | |
| 57763 | 59119 | #ifdef __LITTLE_ENDIAN__ |
| 57764 | | #define vqrdmulhh_laneq_s16(__p0_661, __p1_661, __p2_661) __extension__ ({ \ |
| 57765 | | int16_t __s0_661 = __p0_661; \ |
| 57766 | | int16x8_t __s1_661 = __p1_661; \ |
| 57767 | | int16_t __ret_661; \ |
| 57768 | | __ret_661 = vqrdmulhh_s16(__s0_661, vgetq_lane_s16(__s1_661, __p2_661)); \ |
| 57769 | | __ret_661; \ |
| 59120 | #define vqrdmulhh_laneq_s16(__p0_753, __p1_753, __p2_753) __extension__ ({ \ |
| 59121 | int16_t __s0_753 = __p0_753; \ |
| 59122 | int16x8_t __s1_753 = __p1_753; \ |
| 59123 | int16_t __ret_753; \ |
| 59124 | __ret_753 = vqrdmulhh_s16(__s0_753, vgetq_lane_s16(__s1_753, __p2_753)); \ |
| 59125 | __ret_753; \ |
| 57770 | 59126 | }) |
| 57771 | 59127 | #else |
| 57772 | | #define vqrdmulhh_laneq_s16(__p0_662, __p1_662, __p2_662) __extension__ ({ \ |
| 57773 | | int16_t __s0_662 = __p0_662; \ |
| 57774 | | int16x8_t __s1_662 = __p1_662; \ |
| 57775 | | int16x8_t __rev1_662; __rev1_662 = __builtin_shufflevector(__s1_662, __s1_662, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57776 | | int16_t __ret_662; \ |
| 57777 | | __ret_662 = vqrdmulhh_s16(__s0_662, __noswap_vgetq_lane_s16(__rev1_662, __p2_662)); \ |
| 57778 | | __ret_662; \ |
| 59128 | #define vqrdmulhh_laneq_s16(__p0_754, __p1_754, __p2_754) __extension__ ({ \ |
| 59129 | int16_t __s0_754 = __p0_754; \ |
| 59130 | int16x8_t __s1_754 = __p1_754; \ |
| 59131 | int16x8_t __rev1_754; __rev1_754 = __builtin_shufflevector(__s1_754, __s1_754, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59132 | int16_t __ret_754; \ |
| 59133 | __ret_754 = vqrdmulhh_s16(__s0_754, __noswap_vgetq_lane_s16(__rev1_754, __p2_754)); \ |
| 59134 | __ret_754; \ |
| 57779 | 59135 | }) |
| 57780 | 59136 | #endif |
| 57781 | 59137 | |
| ... | ... | @@ -57904,128 +59260,128 @@ __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { |
| 57904 | 59260 | return __ret; |
| 57905 | 59261 | } |
| 57906 | 59262 | #ifdef __LITTLE_ENDIAN__ |
| 57907 | | #define vqrshrn_high_n_u32(__p0_663, __p1_663, __p2_663) __extension__ ({ \ |
| 57908 | | uint16x4_t __s0_663 = __p0_663; \ |
| 57909 | | uint32x4_t __s1_663 = __p1_663; \ |
| 57910 | | uint16x8_t __ret_663; \ |
| 57911 | | __ret_663 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_663), (uint16x4_t)(vqrshrn_n_u32(__s1_663, __p2_663)))); \ |
| 57912 | | __ret_663; \ |
| 59263 | #define vqrshrn_high_n_u32(__p0_755, __p1_755, __p2_755) __extension__ ({ \ |
| 59264 | uint16x4_t __s0_755 = __p0_755; \ |
| 59265 | uint32x4_t __s1_755 = __p1_755; \ |
| 59266 | uint16x8_t __ret_755; \ |
| 59267 | __ret_755 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_755), (uint16x4_t)(vqrshrn_n_u32(__s1_755, __p2_755)))); \ |
| 59268 | __ret_755; \ |
| 57913 | 59269 | }) |
| 57914 | 59270 | #else |
| 57915 | | #define vqrshrn_high_n_u32(__p0_664, __p1_664, __p2_664) __extension__ ({ \ |
| 57916 | | uint16x4_t __s0_664 = __p0_664; \ |
| 57917 | | uint32x4_t __s1_664 = __p1_664; \ |
| 57918 | | uint16x4_t __rev0_664; __rev0_664 = __builtin_shufflevector(__s0_664, __s0_664, 3, 2, 1, 0); \ |
| 57919 | | uint32x4_t __rev1_664; __rev1_664 = __builtin_shufflevector(__s1_664, __s1_664, 3, 2, 1, 0); \ |
| 57920 | | uint16x8_t __ret_664; \ |
| 57921 | | __ret_664 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_664), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_664, __p2_664)))); \ |
| 57922 | | __ret_664 = __builtin_shufflevector(__ret_664, __ret_664, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57923 | | __ret_664; \ |
| 59271 | #define vqrshrn_high_n_u32(__p0_756, __p1_756, __p2_756) __extension__ ({ \ |
| 59272 | uint16x4_t __s0_756 = __p0_756; \ |
| 59273 | uint32x4_t __s1_756 = __p1_756; \ |
| 59274 | uint16x4_t __rev0_756; __rev0_756 = __builtin_shufflevector(__s0_756, __s0_756, 3, 2, 1, 0); \ |
| 59275 | uint32x4_t __rev1_756; __rev1_756 = __builtin_shufflevector(__s1_756, __s1_756, 3, 2, 1, 0); \ |
| 59276 | uint16x8_t __ret_756; \ |
| 59277 | __ret_756 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_756), (uint16x4_t)(__noswap_vqrshrn_n_u32(__rev1_756, __p2_756)))); \ |
| 59278 | __ret_756 = __builtin_shufflevector(__ret_756, __ret_756, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59279 | __ret_756; \ |
| 57924 | 59280 | }) |
| 57925 | 59281 | #endif |
| 57926 | 59282 | |
| 57927 | 59283 | #ifdef __LITTLE_ENDIAN__ |
| 57928 | | #define vqrshrn_high_n_u64(__p0_665, __p1_665, __p2_665) __extension__ ({ \ |
| 57929 | | uint32x2_t __s0_665 = __p0_665; \ |
| 57930 | | uint64x2_t __s1_665 = __p1_665; \ |
| 57931 | | uint32x4_t __ret_665; \ |
| 57932 | | __ret_665 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_665), (uint32x2_t)(vqrshrn_n_u64(__s1_665, __p2_665)))); \ |
| 57933 | | __ret_665; \ |
| 59284 | #define vqrshrn_high_n_u64(__p0_757, __p1_757, __p2_757) __extension__ ({ \ |
| 59285 | uint32x2_t __s0_757 = __p0_757; \ |
| 59286 | uint64x2_t __s1_757 = __p1_757; \ |
| 59287 | uint32x4_t __ret_757; \ |
| 59288 | __ret_757 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_757), (uint32x2_t)(vqrshrn_n_u64(__s1_757, __p2_757)))); \ |
| 59289 | __ret_757; \ |
| 57934 | 59290 | }) |
| 57935 | 59291 | #else |
| 57936 | | #define vqrshrn_high_n_u64(__p0_666, __p1_666, __p2_666) __extension__ ({ \ |
| 57937 | | uint32x2_t __s0_666 = __p0_666; \ |
| 57938 | | uint64x2_t __s1_666 = __p1_666; \ |
| 57939 | | uint32x2_t __rev0_666; __rev0_666 = __builtin_shufflevector(__s0_666, __s0_666, 1, 0); \ |
| 57940 | | uint64x2_t __rev1_666; __rev1_666 = __builtin_shufflevector(__s1_666, __s1_666, 1, 0); \ |
| 57941 | | uint32x4_t __ret_666; \ |
| 57942 | | __ret_666 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_666), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_666, __p2_666)))); \ |
| 57943 | | __ret_666 = __builtin_shufflevector(__ret_666, __ret_666, 3, 2, 1, 0); \ |
| 57944 | | __ret_666; \ |
| 59292 | #define vqrshrn_high_n_u64(__p0_758, __p1_758, __p2_758) __extension__ ({ \ |
| 59293 | uint32x2_t __s0_758 = __p0_758; \ |
| 59294 | uint64x2_t __s1_758 = __p1_758; \ |
| 59295 | uint32x2_t __rev0_758; __rev0_758 = __builtin_shufflevector(__s0_758, __s0_758, 1, 0); \ |
| 59296 | uint64x2_t __rev1_758; __rev1_758 = __builtin_shufflevector(__s1_758, __s1_758, 1, 0); \ |
| 59297 | uint32x4_t __ret_758; \ |
| 59298 | __ret_758 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_758), (uint32x2_t)(__noswap_vqrshrn_n_u64(__rev1_758, __p2_758)))); \ |
| 59299 | __ret_758 = __builtin_shufflevector(__ret_758, __ret_758, 3, 2, 1, 0); \ |
| 59300 | __ret_758; \ |
| 57945 | 59301 | }) |
| 57946 | 59302 | #endif |
| 57947 | 59303 | |
| 57948 | 59304 | #ifdef __LITTLE_ENDIAN__ |
| 57949 | | #define vqrshrn_high_n_u16(__p0_667, __p1_667, __p2_667) __extension__ ({ \ |
| 57950 | | uint8x8_t __s0_667 = __p0_667; \ |
| 57951 | | uint16x8_t __s1_667 = __p1_667; \ |
| 57952 | | uint8x16_t __ret_667; \ |
| 57953 | | __ret_667 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_667), (uint8x8_t)(vqrshrn_n_u16(__s1_667, __p2_667)))); \ |
| 57954 | | __ret_667; \ |
| 59305 | #define vqrshrn_high_n_u16(__p0_759, __p1_759, __p2_759) __extension__ ({ \ |
| 59306 | uint8x8_t __s0_759 = __p0_759; \ |
| 59307 | uint16x8_t __s1_759 = __p1_759; \ |
| 59308 | uint8x16_t __ret_759; \ |
| 59309 | __ret_759 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_759), (uint8x8_t)(vqrshrn_n_u16(__s1_759, __p2_759)))); \ |
| 59310 | __ret_759; \ |
| 57955 | 59311 | }) |
| 57956 | 59312 | #else |
| 57957 | | #define vqrshrn_high_n_u16(__p0_668, __p1_668, __p2_668) __extension__ ({ \ |
| 57958 | | uint8x8_t __s0_668 = __p0_668; \ |
| 57959 | | uint16x8_t __s1_668 = __p1_668; \ |
| 57960 | | uint8x8_t __rev0_668; __rev0_668 = __builtin_shufflevector(__s0_668, __s0_668, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57961 | | uint16x8_t __rev1_668; __rev1_668 = __builtin_shufflevector(__s1_668, __s1_668, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57962 | | uint8x16_t __ret_668; \ |
| 57963 | | __ret_668 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_668), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_668, __p2_668)))); \ |
| 57964 | | __ret_668 = __builtin_shufflevector(__ret_668, __ret_668, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57965 | | __ret_668; \ |
| 59313 | #define vqrshrn_high_n_u16(__p0_760, __p1_760, __p2_760) __extension__ ({ \ |
| 59314 | uint8x8_t __s0_760 = __p0_760; \ |
| 59315 | uint16x8_t __s1_760 = __p1_760; \ |
| 59316 | uint8x8_t __rev0_760; __rev0_760 = __builtin_shufflevector(__s0_760, __s0_760, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59317 | uint16x8_t __rev1_760; __rev1_760 = __builtin_shufflevector(__s1_760, __s1_760, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59318 | uint8x16_t __ret_760; \ |
| 59319 | __ret_760 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_760), (uint8x8_t)(__noswap_vqrshrn_n_u16(__rev1_760, __p2_760)))); \ |
| 59320 | __ret_760 = __builtin_shufflevector(__ret_760, __ret_760, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59321 | __ret_760; \ |
| 57966 | 59322 | }) |
| 57967 | 59323 | #endif |
| 57968 | 59324 | |
| 57969 | 59325 | #ifdef __LITTLE_ENDIAN__ |
| 57970 | | #define vqrshrn_high_n_s32(__p0_669, __p1_669, __p2_669) __extension__ ({ \ |
| 57971 | | int16x4_t __s0_669 = __p0_669; \ |
| 57972 | | int32x4_t __s1_669 = __p1_669; \ |
| 57973 | | int16x8_t __ret_669; \ |
| 57974 | | __ret_669 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_669), (int16x4_t)(vqrshrn_n_s32(__s1_669, __p2_669)))); \ |
| 57975 | | __ret_669; \ |
| 59326 | #define vqrshrn_high_n_s32(__p0_761, __p1_761, __p2_761) __extension__ ({ \ |
| 59327 | int16x4_t __s0_761 = __p0_761; \ |
| 59328 | int32x4_t __s1_761 = __p1_761; \ |
| 59329 | int16x8_t __ret_761; \ |
| 59330 | __ret_761 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_761), (int16x4_t)(vqrshrn_n_s32(__s1_761, __p2_761)))); \ |
| 59331 | __ret_761; \ |
| 57976 | 59332 | }) |
| 57977 | 59333 | #else |
| 57978 | | #define vqrshrn_high_n_s32(__p0_670, __p1_670, __p2_670) __extension__ ({ \ |
| 57979 | | int16x4_t __s0_670 = __p0_670; \ |
| 57980 | | int32x4_t __s1_670 = __p1_670; \ |
| 57981 | | int16x4_t __rev0_670; __rev0_670 = __builtin_shufflevector(__s0_670, __s0_670, 3, 2, 1, 0); \ |
| 57982 | | int32x4_t __rev1_670; __rev1_670 = __builtin_shufflevector(__s1_670, __s1_670, 3, 2, 1, 0); \ |
| 57983 | | int16x8_t __ret_670; \ |
| 57984 | | __ret_670 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_670), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_670, __p2_670)))); \ |
| 57985 | | __ret_670 = __builtin_shufflevector(__ret_670, __ret_670, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 57986 | | __ret_670; \ |
| 59334 | #define vqrshrn_high_n_s32(__p0_762, __p1_762, __p2_762) __extension__ ({ \ |
| 59335 | int16x4_t __s0_762 = __p0_762; \ |
| 59336 | int32x4_t __s1_762 = __p1_762; \ |
| 59337 | int16x4_t __rev0_762; __rev0_762 = __builtin_shufflevector(__s0_762, __s0_762, 3, 2, 1, 0); \ |
| 59338 | int32x4_t __rev1_762; __rev1_762 = __builtin_shufflevector(__s1_762, __s1_762, 3, 2, 1, 0); \ |
| 59339 | int16x8_t __ret_762; \ |
| 59340 | __ret_762 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_762), (int16x4_t)(__noswap_vqrshrn_n_s32(__rev1_762, __p2_762)))); \ |
| 59341 | __ret_762 = __builtin_shufflevector(__ret_762, __ret_762, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59342 | __ret_762; \ |
| 57987 | 59343 | }) |
| 57988 | 59344 | #endif |
| 57989 | 59345 | |
| 57990 | 59346 | #ifdef __LITTLE_ENDIAN__ |
| 57991 | | #define vqrshrn_high_n_s64(__p0_671, __p1_671, __p2_671) __extension__ ({ \ |
| 57992 | | int32x2_t __s0_671 = __p0_671; \ |
| 57993 | | int64x2_t __s1_671 = __p1_671; \ |
| 57994 | | int32x4_t __ret_671; \ |
| 57995 | | __ret_671 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_671), (int32x2_t)(vqrshrn_n_s64(__s1_671, __p2_671)))); \ |
| 57996 | | __ret_671; \ |
| 59347 | #define vqrshrn_high_n_s64(__p0_763, __p1_763, __p2_763) __extension__ ({ \ |
| 59348 | int32x2_t __s0_763 = __p0_763; \ |
| 59349 | int64x2_t __s1_763 = __p1_763; \ |
| 59350 | int32x4_t __ret_763; \ |
| 59351 | __ret_763 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_763), (int32x2_t)(vqrshrn_n_s64(__s1_763, __p2_763)))); \ |
| 59352 | __ret_763; \ |
| 57997 | 59353 | }) |
| 57998 | 59354 | #else |
| 57999 | | #define vqrshrn_high_n_s64(__p0_672, __p1_672, __p2_672) __extension__ ({ \ |
| 58000 | | int32x2_t __s0_672 = __p0_672; \ |
| 58001 | | int64x2_t __s1_672 = __p1_672; \ |
| 58002 | | int32x2_t __rev0_672; __rev0_672 = __builtin_shufflevector(__s0_672, __s0_672, 1, 0); \ |
| 58003 | | int64x2_t __rev1_672; __rev1_672 = __builtin_shufflevector(__s1_672, __s1_672, 1, 0); \ |
| 58004 | | int32x4_t __ret_672; \ |
| 58005 | | __ret_672 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_672), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_672, __p2_672)))); \ |
| 58006 | | __ret_672 = __builtin_shufflevector(__ret_672, __ret_672, 3, 2, 1, 0); \ |
| 58007 | | __ret_672; \ |
| 59355 | #define vqrshrn_high_n_s64(__p0_764, __p1_764, __p2_764) __extension__ ({ \ |
| 59356 | int32x2_t __s0_764 = __p0_764; \ |
| 59357 | int64x2_t __s1_764 = __p1_764; \ |
| 59358 | int32x2_t __rev0_764; __rev0_764 = __builtin_shufflevector(__s0_764, __s0_764, 1, 0); \ |
| 59359 | int64x2_t __rev1_764; __rev1_764 = __builtin_shufflevector(__s1_764, __s1_764, 1, 0); \ |
| 59360 | int32x4_t __ret_764; \ |
| 59361 | __ret_764 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_764), (int32x2_t)(__noswap_vqrshrn_n_s64(__rev1_764, __p2_764)))); \ |
| 59362 | __ret_764 = __builtin_shufflevector(__ret_764, __ret_764, 3, 2, 1, 0); \ |
| 59363 | __ret_764; \ |
| 58008 | 59364 | }) |
| 58009 | 59365 | #endif |
| 58010 | 59366 | |
| 58011 | 59367 | #ifdef __LITTLE_ENDIAN__ |
| 58012 | | #define vqrshrn_high_n_s16(__p0_673, __p1_673, __p2_673) __extension__ ({ \ |
| 58013 | | int8x8_t __s0_673 = __p0_673; \ |
| 58014 | | int16x8_t __s1_673 = __p1_673; \ |
| 58015 | | int8x16_t __ret_673; \ |
| 58016 | | __ret_673 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_673), (int8x8_t)(vqrshrn_n_s16(__s1_673, __p2_673)))); \ |
| 58017 | | __ret_673; \ |
| 59368 | #define vqrshrn_high_n_s16(__p0_765, __p1_765, __p2_765) __extension__ ({ \ |
| 59369 | int8x8_t __s0_765 = __p0_765; \ |
| 59370 | int16x8_t __s1_765 = __p1_765; \ |
| 59371 | int8x16_t __ret_765; \ |
| 59372 | __ret_765 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_765), (int8x8_t)(vqrshrn_n_s16(__s1_765, __p2_765)))); \ |
| 59373 | __ret_765; \ |
| 58018 | 59374 | }) |
| 58019 | 59375 | #else |
| 58020 | | #define vqrshrn_high_n_s16(__p0_674, __p1_674, __p2_674) __extension__ ({ \ |
| 58021 | | int8x8_t __s0_674 = __p0_674; \ |
| 58022 | | int16x8_t __s1_674 = __p1_674; \ |
| 58023 | | int8x8_t __rev0_674; __rev0_674 = __builtin_shufflevector(__s0_674, __s0_674, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58024 | | int16x8_t __rev1_674; __rev1_674 = __builtin_shufflevector(__s1_674, __s1_674, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58025 | | int8x16_t __ret_674; \ |
| 58026 | | __ret_674 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_674), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_674, __p2_674)))); \ |
| 58027 | | __ret_674 = __builtin_shufflevector(__ret_674, __ret_674, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58028 | | __ret_674; \ |
| 59376 | #define vqrshrn_high_n_s16(__p0_766, __p1_766, __p2_766) __extension__ ({ \ |
| 59377 | int8x8_t __s0_766 = __p0_766; \ |
| 59378 | int16x8_t __s1_766 = __p1_766; \ |
| 59379 | int8x8_t __rev0_766; __rev0_766 = __builtin_shufflevector(__s0_766, __s0_766, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59380 | int16x8_t __rev1_766; __rev1_766 = __builtin_shufflevector(__s1_766, __s1_766, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59381 | int8x16_t __ret_766; \ |
| 59382 | __ret_766 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_766), (int8x8_t)(__noswap_vqrshrn_n_s16(__rev1_766, __p2_766)))); \ |
| 59383 | __ret_766 = __builtin_shufflevector(__ret_766, __ret_766, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59384 | __ret_766; \ |
| 58029 | 59385 | }) |
| 58030 | 59386 | #endif |
| 58031 | 59387 | |
| ... | ... | @@ -58066,65 +59422,65 @@ __ai int16_t vqrshlh_s16(int16_t __p0, int16_t __p1) { |
| 58066 | 59422 | __ret; \ |
| 58067 | 59423 | }) |
| 58068 | 59424 | #ifdef __LITTLE_ENDIAN__ |
| 58069 | | #define vqrshrun_high_n_s32(__p0_675, __p1_675, __p2_675) __extension__ ({ \ |
| 58070 | | int16x4_t __s0_675 = __p0_675; \ |
| 58071 | | int32x4_t __s1_675 = __p1_675; \ |
| 58072 | | int16x8_t __ret_675; \ |
| 58073 | | __ret_675 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_675), (int16x4_t)(vqrshrun_n_s32(__s1_675, __p2_675)))); \ |
| 58074 | | __ret_675; \ |
| 59425 | #define vqrshrun_high_n_s32(__p0_767, __p1_767, __p2_767) __extension__ ({ \ |
| 59426 | int16x4_t __s0_767 = __p0_767; \ |
| 59427 | int32x4_t __s1_767 = __p1_767; \ |
| 59428 | int16x8_t __ret_767; \ |
| 59429 | __ret_767 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_767), (int16x4_t)(vqrshrun_n_s32(__s1_767, __p2_767)))); \ |
| 59430 | __ret_767; \ |
| 58075 | 59431 | }) |
| 58076 | 59432 | #else |
| 58077 | | #define vqrshrun_high_n_s32(__p0_676, __p1_676, __p2_676) __extension__ ({ \ |
| 58078 | | int16x4_t __s0_676 = __p0_676; \ |
| 58079 | | int32x4_t __s1_676 = __p1_676; \ |
| 58080 | | int16x4_t __rev0_676; __rev0_676 = __builtin_shufflevector(__s0_676, __s0_676, 3, 2, 1, 0); \ |
| 58081 | | int32x4_t __rev1_676; __rev1_676 = __builtin_shufflevector(__s1_676, __s1_676, 3, 2, 1, 0); \ |
| 58082 | | int16x8_t __ret_676; \ |
| 58083 | | __ret_676 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_676), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_676, __p2_676)))); \ |
| 58084 | | __ret_676 = __builtin_shufflevector(__ret_676, __ret_676, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58085 | | __ret_676; \ |
| 59433 | #define vqrshrun_high_n_s32(__p0_768, __p1_768, __p2_768) __extension__ ({ \ |
| 59434 | int16x4_t __s0_768 = __p0_768; \ |
| 59435 | int32x4_t __s1_768 = __p1_768; \ |
| 59436 | int16x4_t __rev0_768; __rev0_768 = __builtin_shufflevector(__s0_768, __s0_768, 3, 2, 1, 0); \ |
| 59437 | int32x4_t __rev1_768; __rev1_768 = __builtin_shufflevector(__s1_768, __s1_768, 3, 2, 1, 0); \ |
| 59438 | int16x8_t __ret_768; \ |
| 59439 | __ret_768 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_768), (int16x4_t)(__noswap_vqrshrun_n_s32(__rev1_768, __p2_768)))); \ |
| 59440 | __ret_768 = __builtin_shufflevector(__ret_768, __ret_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59441 | __ret_768; \ |
| 58086 | 59442 | }) |
| 58087 | 59443 | #endif |
| 58088 | 59444 | |
| 58089 | 59445 | #ifdef __LITTLE_ENDIAN__ |
| 58090 | | #define vqrshrun_high_n_s64(__p0_677, __p1_677, __p2_677) __extension__ ({ \ |
| 58091 | | int32x2_t __s0_677 = __p0_677; \ |
| 58092 | | int64x2_t __s1_677 = __p1_677; \ |
| 58093 | | int32x4_t __ret_677; \ |
| 58094 | | __ret_677 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_677), (int32x2_t)(vqrshrun_n_s64(__s1_677, __p2_677)))); \ |
| 58095 | | __ret_677; \ |
| 59446 | #define vqrshrun_high_n_s64(__p0_769, __p1_769, __p2_769) __extension__ ({ \ |
| 59447 | int32x2_t __s0_769 = __p0_769; \ |
| 59448 | int64x2_t __s1_769 = __p1_769; \ |
| 59449 | int32x4_t __ret_769; \ |
| 59450 | __ret_769 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_769), (int32x2_t)(vqrshrun_n_s64(__s1_769, __p2_769)))); \ |
| 59451 | __ret_769; \ |
| 58096 | 59452 | }) |
| 58097 | 59453 | #else |
| 58098 | | #define vqrshrun_high_n_s64(__p0_678, __p1_678, __p2_678) __extension__ ({ \ |
| 58099 | | int32x2_t __s0_678 = __p0_678; \ |
| 58100 | | int64x2_t __s1_678 = __p1_678; \ |
| 58101 | | int32x2_t __rev0_678; __rev0_678 = __builtin_shufflevector(__s0_678, __s0_678, 1, 0); \ |
| 58102 | | int64x2_t __rev1_678; __rev1_678 = __builtin_shufflevector(__s1_678, __s1_678, 1, 0); \ |
| 58103 | | int32x4_t __ret_678; \ |
| 58104 | | __ret_678 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_678), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_678, __p2_678)))); \ |
| 58105 | | __ret_678 = __builtin_shufflevector(__ret_678, __ret_678, 3, 2, 1, 0); \ |
| 58106 | | __ret_678; \ |
| 59454 | #define vqrshrun_high_n_s64(__p0_770, __p1_770, __p2_770) __extension__ ({ \ |
| 59455 | int32x2_t __s0_770 = __p0_770; \ |
| 59456 | int64x2_t __s1_770 = __p1_770; \ |
| 59457 | int32x2_t __rev0_770; __rev0_770 = __builtin_shufflevector(__s0_770, __s0_770, 1, 0); \ |
| 59458 | int64x2_t __rev1_770; __rev1_770 = __builtin_shufflevector(__s1_770, __s1_770, 1, 0); \ |
| 59459 | int32x4_t __ret_770; \ |
| 59460 | __ret_770 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_770), (int32x2_t)(__noswap_vqrshrun_n_s64(__rev1_770, __p2_770)))); \ |
| 59461 | __ret_770 = __builtin_shufflevector(__ret_770, __ret_770, 3, 2, 1, 0); \ |
| 59462 | __ret_770; \ |
| 58107 | 59463 | }) |
| 58108 | 59464 | #endif |
| 58109 | 59465 | |
| 58110 | 59466 | #ifdef __LITTLE_ENDIAN__ |
| 58111 | | #define vqrshrun_high_n_s16(__p0_679, __p1_679, __p2_679) __extension__ ({ \ |
| 58112 | | int8x8_t __s0_679 = __p0_679; \ |
| 58113 | | int16x8_t __s1_679 = __p1_679; \ |
| 58114 | | int8x16_t __ret_679; \ |
| 58115 | | __ret_679 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_679), (int8x8_t)(vqrshrun_n_s16(__s1_679, __p2_679)))); \ |
| 58116 | | __ret_679; \ |
| 59467 | #define vqrshrun_high_n_s16(__p0_771, __p1_771, __p2_771) __extension__ ({ \ |
| 59468 | int8x8_t __s0_771 = __p0_771; \ |
| 59469 | int16x8_t __s1_771 = __p1_771; \ |
| 59470 | int8x16_t __ret_771; \ |
| 59471 | __ret_771 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_771), (int8x8_t)(vqrshrun_n_s16(__s1_771, __p2_771)))); \ |
| 59472 | __ret_771; \ |
| 58117 | 59473 | }) |
| 58118 | 59474 | #else |
| 58119 | | #define vqrshrun_high_n_s16(__p0_680, __p1_680, __p2_680) __extension__ ({ \ |
| 58120 | | int8x8_t __s0_680 = __p0_680; \ |
| 58121 | | int16x8_t __s1_680 = __p1_680; \ |
| 58122 | | int8x8_t __rev0_680; __rev0_680 = __builtin_shufflevector(__s0_680, __s0_680, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58123 | | int16x8_t __rev1_680; __rev1_680 = __builtin_shufflevector(__s1_680, __s1_680, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58124 | | int8x16_t __ret_680; \ |
| 58125 | | __ret_680 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_680), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_680, __p2_680)))); \ |
| 58126 | | __ret_680 = __builtin_shufflevector(__ret_680, __ret_680, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58127 | | __ret_680; \ |
| 59475 | #define vqrshrun_high_n_s16(__p0_772, __p1_772, __p2_772) __extension__ ({ \ |
| 59476 | int8x8_t __s0_772 = __p0_772; \ |
| 59477 | int16x8_t __s1_772 = __p1_772; \ |
| 59478 | int8x8_t __rev0_772; __rev0_772 = __builtin_shufflevector(__s0_772, __s0_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59479 | int16x8_t __rev1_772; __rev1_772 = __builtin_shufflevector(__s1_772, __s1_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59480 | int8x16_t __ret_772; \ |
| 59481 | __ret_772 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_772), (int8x8_t)(__noswap_vqrshrun_n_s16(__rev1_772, __p2_772)))); \ |
| 59482 | __ret_772 = __builtin_shufflevector(__ret_772, __ret_772, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59483 | __ret_772; \ |
| 58128 | 59484 | }) |
| 58129 | 59485 | #endif |
| 58130 | 59486 | |
| ... | ... | @@ -58259,128 +59615,128 @@ __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { |
| 58259 | 59615 | __ret; \ |
| 58260 | 59616 | }) |
| 58261 | 59617 | #ifdef __LITTLE_ENDIAN__ |
| 58262 | | #define vqshrn_high_n_u32(__p0_681, __p1_681, __p2_681) __extension__ ({ \ |
| 58263 | | uint16x4_t __s0_681 = __p0_681; \ |
| 58264 | | uint32x4_t __s1_681 = __p1_681; \ |
| 58265 | | uint16x8_t __ret_681; \ |
| 58266 | | __ret_681 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_681), (uint16x4_t)(vqshrn_n_u32(__s1_681, __p2_681)))); \ |
| 58267 | | __ret_681; \ |
| 59618 | #define vqshrn_high_n_u32(__p0_773, __p1_773, __p2_773) __extension__ ({ \ |
| 59619 | uint16x4_t __s0_773 = __p0_773; \ |
| 59620 | uint32x4_t __s1_773 = __p1_773; \ |
| 59621 | uint16x8_t __ret_773; \ |
| 59622 | __ret_773 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_773), (uint16x4_t)(vqshrn_n_u32(__s1_773, __p2_773)))); \ |
| 59623 | __ret_773; \ |
| 58268 | 59624 | }) |
| 58269 | 59625 | #else |
| 58270 | | #define vqshrn_high_n_u32(__p0_682, __p1_682, __p2_682) __extension__ ({ \ |
| 58271 | | uint16x4_t __s0_682 = __p0_682; \ |
| 58272 | | uint32x4_t __s1_682 = __p1_682; \ |
| 58273 | | uint16x4_t __rev0_682; __rev0_682 = __builtin_shufflevector(__s0_682, __s0_682, 3, 2, 1, 0); \ |
| 58274 | | uint32x4_t __rev1_682; __rev1_682 = __builtin_shufflevector(__s1_682, __s1_682, 3, 2, 1, 0); \ |
| 58275 | | uint16x8_t __ret_682; \ |
| 58276 | | __ret_682 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_682), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_682, __p2_682)))); \ |
| 58277 | | __ret_682 = __builtin_shufflevector(__ret_682, __ret_682, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58278 | | __ret_682; \ |
| 59626 | #define vqshrn_high_n_u32(__p0_774, __p1_774, __p2_774) __extension__ ({ \ |
| 59627 | uint16x4_t __s0_774 = __p0_774; \ |
| 59628 | uint32x4_t __s1_774 = __p1_774; \ |
| 59629 | uint16x4_t __rev0_774; __rev0_774 = __builtin_shufflevector(__s0_774, __s0_774, 3, 2, 1, 0); \ |
| 59630 | uint32x4_t __rev1_774; __rev1_774 = __builtin_shufflevector(__s1_774, __s1_774, 3, 2, 1, 0); \ |
| 59631 | uint16x8_t __ret_774; \ |
| 59632 | __ret_774 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_774), (uint16x4_t)(__noswap_vqshrn_n_u32(__rev1_774, __p2_774)))); \ |
| 59633 | __ret_774 = __builtin_shufflevector(__ret_774, __ret_774, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59634 | __ret_774; \ |
| 58279 | 59635 | }) |
| 58280 | 59636 | #endif |
| 58281 | 59637 | |
| 58282 | 59638 | #ifdef __LITTLE_ENDIAN__ |
| 58283 | | #define vqshrn_high_n_u64(__p0_683, __p1_683, __p2_683) __extension__ ({ \ |
| 58284 | | uint32x2_t __s0_683 = __p0_683; \ |
| 58285 | | uint64x2_t __s1_683 = __p1_683; \ |
| 58286 | | uint32x4_t __ret_683; \ |
| 58287 | | __ret_683 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_683), (uint32x2_t)(vqshrn_n_u64(__s1_683, __p2_683)))); \ |
| 58288 | | __ret_683; \ |
| 59639 | #define vqshrn_high_n_u64(__p0_775, __p1_775, __p2_775) __extension__ ({ \ |
| 59640 | uint32x2_t __s0_775 = __p0_775; \ |
| 59641 | uint64x2_t __s1_775 = __p1_775; \ |
| 59642 | uint32x4_t __ret_775; \ |
| 59643 | __ret_775 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_775), (uint32x2_t)(vqshrn_n_u64(__s1_775, __p2_775)))); \ |
| 59644 | __ret_775; \ |
| 58289 | 59645 | }) |
| 58290 | 59646 | #else |
| 58291 | | #define vqshrn_high_n_u64(__p0_684, __p1_684, __p2_684) __extension__ ({ \ |
| 58292 | | uint32x2_t __s0_684 = __p0_684; \ |
| 58293 | | uint64x2_t __s1_684 = __p1_684; \ |
| 58294 | | uint32x2_t __rev0_684; __rev0_684 = __builtin_shufflevector(__s0_684, __s0_684, 1, 0); \ |
| 58295 | | uint64x2_t __rev1_684; __rev1_684 = __builtin_shufflevector(__s1_684, __s1_684, 1, 0); \ |
| 58296 | | uint32x4_t __ret_684; \ |
| 58297 | | __ret_684 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_684), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_684, __p2_684)))); \ |
| 58298 | | __ret_684 = __builtin_shufflevector(__ret_684, __ret_684, 3, 2, 1, 0); \ |
| 58299 | | __ret_684; \ |
| 59647 | #define vqshrn_high_n_u64(__p0_776, __p1_776, __p2_776) __extension__ ({ \ |
| 59648 | uint32x2_t __s0_776 = __p0_776; \ |
| 59649 | uint64x2_t __s1_776 = __p1_776; \ |
| 59650 | uint32x2_t __rev0_776; __rev0_776 = __builtin_shufflevector(__s0_776, __s0_776, 1, 0); \ |
| 59651 | uint64x2_t __rev1_776; __rev1_776 = __builtin_shufflevector(__s1_776, __s1_776, 1, 0); \ |
| 59652 | uint32x4_t __ret_776; \ |
| 59653 | __ret_776 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_776), (uint32x2_t)(__noswap_vqshrn_n_u64(__rev1_776, __p2_776)))); \ |
| 59654 | __ret_776 = __builtin_shufflevector(__ret_776, __ret_776, 3, 2, 1, 0); \ |
| 59655 | __ret_776; \ |
| 58300 | 59656 | }) |
| 58301 | 59657 | #endif |
| 58302 | 59658 | |
| 58303 | 59659 | #ifdef __LITTLE_ENDIAN__ |
| 58304 | | #define vqshrn_high_n_u16(__p0_685, __p1_685, __p2_685) __extension__ ({ \ |
| 58305 | | uint8x8_t __s0_685 = __p0_685; \ |
| 58306 | | uint16x8_t __s1_685 = __p1_685; \ |
| 58307 | | uint8x16_t __ret_685; \ |
| 58308 | | __ret_685 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_685), (uint8x8_t)(vqshrn_n_u16(__s1_685, __p2_685)))); \ |
| 58309 | | __ret_685; \ |
| 59660 | #define vqshrn_high_n_u16(__p0_777, __p1_777, __p2_777) __extension__ ({ \ |
| 59661 | uint8x8_t __s0_777 = __p0_777; \ |
| 59662 | uint16x8_t __s1_777 = __p1_777; \ |
| 59663 | uint8x16_t __ret_777; \ |
| 59664 | __ret_777 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_777), (uint8x8_t)(vqshrn_n_u16(__s1_777, __p2_777)))); \ |
| 59665 | __ret_777; \ |
| 58310 | 59666 | }) |
| 58311 | 59667 | #else |
| 58312 | | #define vqshrn_high_n_u16(__p0_686, __p1_686, __p2_686) __extension__ ({ \ |
| 58313 | | uint8x8_t __s0_686 = __p0_686; \ |
| 58314 | | uint16x8_t __s1_686 = __p1_686; \ |
| 58315 | | uint8x8_t __rev0_686; __rev0_686 = __builtin_shufflevector(__s0_686, __s0_686, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58316 | | uint16x8_t __rev1_686; __rev1_686 = __builtin_shufflevector(__s1_686, __s1_686, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58317 | | uint8x16_t __ret_686; \ |
| 58318 | | __ret_686 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_686), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_686, __p2_686)))); \ |
| 58319 | | __ret_686 = __builtin_shufflevector(__ret_686, __ret_686, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58320 | | __ret_686; \ |
| 59668 | #define vqshrn_high_n_u16(__p0_778, __p1_778, __p2_778) __extension__ ({ \ |
| 59669 | uint8x8_t __s0_778 = __p0_778; \ |
| 59670 | uint16x8_t __s1_778 = __p1_778; \ |
| 59671 | uint8x8_t __rev0_778; __rev0_778 = __builtin_shufflevector(__s0_778, __s0_778, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59672 | uint16x8_t __rev1_778; __rev1_778 = __builtin_shufflevector(__s1_778, __s1_778, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59673 | uint8x16_t __ret_778; \ |
| 59674 | __ret_778 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_778), (uint8x8_t)(__noswap_vqshrn_n_u16(__rev1_778, __p2_778)))); \ |
| 59675 | __ret_778 = __builtin_shufflevector(__ret_778, __ret_778, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59676 | __ret_778; \ |
| 58321 | 59677 | }) |
| 58322 | 59678 | #endif |
| 58323 | 59679 | |
| 58324 | 59680 | #ifdef __LITTLE_ENDIAN__ |
| 58325 | | #define vqshrn_high_n_s32(__p0_687, __p1_687, __p2_687) __extension__ ({ \ |
| 58326 | | int16x4_t __s0_687 = __p0_687; \ |
| 58327 | | int32x4_t __s1_687 = __p1_687; \ |
| 58328 | | int16x8_t __ret_687; \ |
| 58329 | | __ret_687 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_687), (int16x4_t)(vqshrn_n_s32(__s1_687, __p2_687)))); \ |
| 58330 | | __ret_687; \ |
| 59681 | #define vqshrn_high_n_s32(__p0_779, __p1_779, __p2_779) __extension__ ({ \ |
| 59682 | int16x4_t __s0_779 = __p0_779; \ |
| 59683 | int32x4_t __s1_779 = __p1_779; \ |
| 59684 | int16x8_t __ret_779; \ |
| 59685 | __ret_779 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_779), (int16x4_t)(vqshrn_n_s32(__s1_779, __p2_779)))); \ |
| 59686 | __ret_779; \ |
| 58331 | 59687 | }) |
| 58332 | 59688 | #else |
| 58333 | | #define vqshrn_high_n_s32(__p0_688, __p1_688, __p2_688) __extension__ ({ \ |
| 58334 | | int16x4_t __s0_688 = __p0_688; \ |
| 58335 | | int32x4_t __s1_688 = __p1_688; \ |
| 58336 | | int16x4_t __rev0_688; __rev0_688 = __builtin_shufflevector(__s0_688, __s0_688, 3, 2, 1, 0); \ |
| 58337 | | int32x4_t __rev1_688; __rev1_688 = __builtin_shufflevector(__s1_688, __s1_688, 3, 2, 1, 0); \ |
| 58338 | | int16x8_t __ret_688; \ |
| 58339 | | __ret_688 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_688), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_688, __p2_688)))); \ |
| 58340 | | __ret_688 = __builtin_shufflevector(__ret_688, __ret_688, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58341 | | __ret_688; \ |
| 59689 | #define vqshrn_high_n_s32(__p0_780, __p1_780, __p2_780) __extension__ ({ \ |
| 59690 | int16x4_t __s0_780 = __p0_780; \ |
| 59691 | int32x4_t __s1_780 = __p1_780; \ |
| 59692 | int16x4_t __rev0_780; __rev0_780 = __builtin_shufflevector(__s0_780, __s0_780, 3, 2, 1, 0); \ |
| 59693 | int32x4_t __rev1_780; __rev1_780 = __builtin_shufflevector(__s1_780, __s1_780, 3, 2, 1, 0); \ |
| 59694 | int16x8_t __ret_780; \ |
| 59695 | __ret_780 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_780), (int16x4_t)(__noswap_vqshrn_n_s32(__rev1_780, __p2_780)))); \ |
| 59696 | __ret_780 = __builtin_shufflevector(__ret_780, __ret_780, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59697 | __ret_780; \ |
| 58342 | 59698 | }) |
| 58343 | 59699 | #endif |
| 58344 | 59700 | |
| 58345 | 59701 | #ifdef __LITTLE_ENDIAN__ |
| 58346 | | #define vqshrn_high_n_s64(__p0_689, __p1_689, __p2_689) __extension__ ({ \ |
| 58347 | | int32x2_t __s0_689 = __p0_689; \ |
| 58348 | | int64x2_t __s1_689 = __p1_689; \ |
| 58349 | | int32x4_t __ret_689; \ |
| 58350 | | __ret_689 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_689), (int32x2_t)(vqshrn_n_s64(__s1_689, __p2_689)))); \ |
| 58351 | | __ret_689; \ |
| 59702 | #define vqshrn_high_n_s64(__p0_781, __p1_781, __p2_781) __extension__ ({ \ |
| 59703 | int32x2_t __s0_781 = __p0_781; \ |
| 59704 | int64x2_t __s1_781 = __p1_781; \ |
| 59705 | int32x4_t __ret_781; \ |
| 59706 | __ret_781 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_781), (int32x2_t)(vqshrn_n_s64(__s1_781, __p2_781)))); \ |
| 59707 | __ret_781; \ |
| 58352 | 59708 | }) |
| 58353 | 59709 | #else |
| 58354 | | #define vqshrn_high_n_s64(__p0_690, __p1_690, __p2_690) __extension__ ({ \ |
| 58355 | | int32x2_t __s0_690 = __p0_690; \ |
| 58356 | | int64x2_t __s1_690 = __p1_690; \ |
| 58357 | | int32x2_t __rev0_690; __rev0_690 = __builtin_shufflevector(__s0_690, __s0_690, 1, 0); \ |
| 58358 | | int64x2_t __rev1_690; __rev1_690 = __builtin_shufflevector(__s1_690, __s1_690, 1, 0); \ |
| 58359 | | int32x4_t __ret_690; \ |
| 58360 | | __ret_690 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_690), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_690, __p2_690)))); \ |
| 58361 | | __ret_690 = __builtin_shufflevector(__ret_690, __ret_690, 3, 2, 1, 0); \ |
| 58362 | | __ret_690; \ |
| 59710 | #define vqshrn_high_n_s64(__p0_782, __p1_782, __p2_782) __extension__ ({ \ |
| 59711 | int32x2_t __s0_782 = __p0_782; \ |
| 59712 | int64x2_t __s1_782 = __p1_782; \ |
| 59713 | int32x2_t __rev0_782; __rev0_782 = __builtin_shufflevector(__s0_782, __s0_782, 1, 0); \ |
| 59714 | int64x2_t __rev1_782; __rev1_782 = __builtin_shufflevector(__s1_782, __s1_782, 1, 0); \ |
| 59715 | int32x4_t __ret_782; \ |
| 59716 | __ret_782 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_782), (int32x2_t)(__noswap_vqshrn_n_s64(__rev1_782, __p2_782)))); \ |
| 59717 | __ret_782 = __builtin_shufflevector(__ret_782, __ret_782, 3, 2, 1, 0); \ |
| 59718 | __ret_782; \ |
| 58363 | 59719 | }) |
| 58364 | 59720 | #endif |
| 58365 | 59721 | |
| 58366 | 59722 | #ifdef __LITTLE_ENDIAN__ |
| 58367 | | #define vqshrn_high_n_s16(__p0_691, __p1_691, __p2_691) __extension__ ({ \ |
| 58368 | | int8x8_t __s0_691 = __p0_691; \ |
| 58369 | | int16x8_t __s1_691 = __p1_691; \ |
| 58370 | | int8x16_t __ret_691; \ |
| 58371 | | __ret_691 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_691), (int8x8_t)(vqshrn_n_s16(__s1_691, __p2_691)))); \ |
| 58372 | | __ret_691; \ |
| 59723 | #define vqshrn_high_n_s16(__p0_783, __p1_783, __p2_783) __extension__ ({ \ |
| 59724 | int8x8_t __s0_783 = __p0_783; \ |
| 59725 | int16x8_t __s1_783 = __p1_783; \ |
| 59726 | int8x16_t __ret_783; \ |
| 59727 | __ret_783 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_783), (int8x8_t)(vqshrn_n_s16(__s1_783, __p2_783)))); \ |
| 59728 | __ret_783; \ |
| 58373 | 59729 | }) |
| 58374 | 59730 | #else |
| 58375 | | #define vqshrn_high_n_s16(__p0_692, __p1_692, __p2_692) __extension__ ({ \ |
| 58376 | | int8x8_t __s0_692 = __p0_692; \ |
| 58377 | | int16x8_t __s1_692 = __p1_692; \ |
| 58378 | | int8x8_t __rev0_692; __rev0_692 = __builtin_shufflevector(__s0_692, __s0_692, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58379 | | int16x8_t __rev1_692; __rev1_692 = __builtin_shufflevector(__s1_692, __s1_692, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58380 | | int8x16_t __ret_692; \ |
| 58381 | | __ret_692 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_692), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_692, __p2_692)))); \ |
| 58382 | | __ret_692 = __builtin_shufflevector(__ret_692, __ret_692, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58383 | | __ret_692; \ |
| 59731 | #define vqshrn_high_n_s16(__p0_784, __p1_784, __p2_784) __extension__ ({ \ |
| 59732 | int8x8_t __s0_784 = __p0_784; \ |
| 59733 | int16x8_t __s1_784 = __p1_784; \ |
| 59734 | int8x8_t __rev0_784; __rev0_784 = __builtin_shufflevector(__s0_784, __s0_784, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59735 | int16x8_t __rev1_784; __rev1_784 = __builtin_shufflevector(__s1_784, __s1_784, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59736 | int8x16_t __ret_784; \ |
| 59737 | __ret_784 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_784), (int8x8_t)(__noswap_vqshrn_n_s16(__rev1_784, __p2_784)))); \ |
| 59738 | __ret_784 = __builtin_shufflevector(__ret_784, __ret_784, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59739 | __ret_784; \ |
| 58384 | 59740 | }) |
| 58385 | 59741 | #endif |
| 58386 | 59742 | |
| ... | ... | @@ -58421,65 +59777,65 @@ __ai int16_t vqshlh_s16(int16_t __p0, int16_t __p1) { |
| 58421 | 59777 | __ret; \ |
| 58422 | 59778 | }) |
| 58423 | 59779 | #ifdef __LITTLE_ENDIAN__ |
| 58424 | | #define vqshrun_high_n_s32(__p0_693, __p1_693, __p2_693) __extension__ ({ \ |
| 58425 | | int16x4_t __s0_693 = __p0_693; \ |
| 58426 | | int32x4_t __s1_693 = __p1_693; \ |
| 58427 | | int16x8_t __ret_693; \ |
| 58428 | | __ret_693 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_693), (int16x4_t)(vqshrun_n_s32(__s1_693, __p2_693)))); \ |
| 58429 | | __ret_693; \ |
| 59780 | #define vqshrun_high_n_s32(__p0_785, __p1_785, __p2_785) __extension__ ({ \ |
| 59781 | int16x4_t __s0_785 = __p0_785; \ |
| 59782 | int32x4_t __s1_785 = __p1_785; \ |
| 59783 | int16x8_t __ret_785; \ |
| 59784 | __ret_785 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_785), (int16x4_t)(vqshrun_n_s32(__s1_785, __p2_785)))); \ |
| 59785 | __ret_785; \ |
| 58430 | 59786 | }) |
| 58431 | 59787 | #else |
| 58432 | | #define vqshrun_high_n_s32(__p0_694, __p1_694, __p2_694) __extension__ ({ \ |
| 58433 | | int16x4_t __s0_694 = __p0_694; \ |
| 58434 | | int32x4_t __s1_694 = __p1_694; \ |
| 58435 | | int16x4_t __rev0_694; __rev0_694 = __builtin_shufflevector(__s0_694, __s0_694, 3, 2, 1, 0); \ |
| 58436 | | int32x4_t __rev1_694; __rev1_694 = __builtin_shufflevector(__s1_694, __s1_694, 3, 2, 1, 0); \ |
| 58437 | | int16x8_t __ret_694; \ |
| 58438 | | __ret_694 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_694), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_694, __p2_694)))); \ |
| 58439 | | __ret_694 = __builtin_shufflevector(__ret_694, __ret_694, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58440 | | __ret_694; \ |
| 59788 | #define vqshrun_high_n_s32(__p0_786, __p1_786, __p2_786) __extension__ ({ \ |
| 59789 | int16x4_t __s0_786 = __p0_786; \ |
| 59790 | int32x4_t __s1_786 = __p1_786; \ |
| 59791 | int16x4_t __rev0_786; __rev0_786 = __builtin_shufflevector(__s0_786, __s0_786, 3, 2, 1, 0); \ |
| 59792 | int32x4_t __rev1_786; __rev1_786 = __builtin_shufflevector(__s1_786, __s1_786, 3, 2, 1, 0); \ |
| 59793 | int16x8_t __ret_786; \ |
| 59794 | __ret_786 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_786), (int16x4_t)(__noswap_vqshrun_n_s32(__rev1_786, __p2_786)))); \ |
| 59795 | __ret_786 = __builtin_shufflevector(__ret_786, __ret_786, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59796 | __ret_786; \ |
| 58441 | 59797 | }) |
| 58442 | 59798 | #endif |
| 58443 | 59799 | |
| 58444 | 59800 | #ifdef __LITTLE_ENDIAN__ |
| 58445 | | #define vqshrun_high_n_s64(__p0_695, __p1_695, __p2_695) __extension__ ({ \ |
| 58446 | | int32x2_t __s0_695 = __p0_695; \ |
| 58447 | | int64x2_t __s1_695 = __p1_695; \ |
| 58448 | | int32x4_t __ret_695; \ |
| 58449 | | __ret_695 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_695), (int32x2_t)(vqshrun_n_s64(__s1_695, __p2_695)))); \ |
| 58450 | | __ret_695; \ |
| 59801 | #define vqshrun_high_n_s64(__p0_787, __p1_787, __p2_787) __extension__ ({ \ |
| 59802 | int32x2_t __s0_787 = __p0_787; \ |
| 59803 | int64x2_t __s1_787 = __p1_787; \ |
| 59804 | int32x4_t __ret_787; \ |
| 59805 | __ret_787 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_787), (int32x2_t)(vqshrun_n_s64(__s1_787, __p2_787)))); \ |
| 59806 | __ret_787; \ |
| 58451 | 59807 | }) |
| 58452 | 59808 | #else |
| 58453 | | #define vqshrun_high_n_s64(__p0_696, __p1_696, __p2_696) __extension__ ({ \ |
| 58454 | | int32x2_t __s0_696 = __p0_696; \ |
| 58455 | | int64x2_t __s1_696 = __p1_696; \ |
| 58456 | | int32x2_t __rev0_696; __rev0_696 = __builtin_shufflevector(__s0_696, __s0_696, 1, 0); \ |
| 58457 | | int64x2_t __rev1_696; __rev1_696 = __builtin_shufflevector(__s1_696, __s1_696, 1, 0); \ |
| 58458 | | int32x4_t __ret_696; \ |
| 58459 | | __ret_696 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_696), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_696, __p2_696)))); \ |
| 58460 | | __ret_696 = __builtin_shufflevector(__ret_696, __ret_696, 3, 2, 1, 0); \ |
| 58461 | | __ret_696; \ |
| 59809 | #define vqshrun_high_n_s64(__p0_788, __p1_788, __p2_788) __extension__ ({ \ |
| 59810 | int32x2_t __s0_788 = __p0_788; \ |
| 59811 | int64x2_t __s1_788 = __p1_788; \ |
| 59812 | int32x2_t __rev0_788; __rev0_788 = __builtin_shufflevector(__s0_788, __s0_788, 1, 0); \ |
| 59813 | int64x2_t __rev1_788; __rev1_788 = __builtin_shufflevector(__s1_788, __s1_788, 1, 0); \ |
| 59814 | int32x4_t __ret_788; \ |
| 59815 | __ret_788 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_788), (int32x2_t)(__noswap_vqshrun_n_s64(__rev1_788, __p2_788)))); \ |
| 59816 | __ret_788 = __builtin_shufflevector(__ret_788, __ret_788, 3, 2, 1, 0); \ |
| 59817 | __ret_788; \ |
| 58462 | 59818 | }) |
| 58463 | 59819 | #endif |
| 58464 | 59820 | |
| 58465 | 59821 | #ifdef __LITTLE_ENDIAN__ |
| 58466 | | #define vqshrun_high_n_s16(__p0_697, __p1_697, __p2_697) __extension__ ({ \ |
| 58467 | | int8x8_t __s0_697 = __p0_697; \ |
| 58468 | | int16x8_t __s1_697 = __p1_697; \ |
| 58469 | | int8x16_t __ret_697; \ |
| 58470 | | __ret_697 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_697), (int8x8_t)(vqshrun_n_s16(__s1_697, __p2_697)))); \ |
| 58471 | | __ret_697; \ |
| 59822 | #define vqshrun_high_n_s16(__p0_789, __p1_789, __p2_789) __extension__ ({ \ |
| 59823 | int8x8_t __s0_789 = __p0_789; \ |
| 59824 | int16x8_t __s1_789 = __p1_789; \ |
| 59825 | int8x16_t __ret_789; \ |
| 59826 | __ret_789 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_789), (int8x8_t)(vqshrun_n_s16(__s1_789, __p2_789)))); \ |
| 59827 | __ret_789; \ |
| 58472 | 59828 | }) |
| 58473 | 59829 | #else |
| 58474 | | #define vqshrun_high_n_s16(__p0_698, __p1_698, __p2_698) __extension__ ({ \ |
| 58475 | | int8x8_t __s0_698 = __p0_698; \ |
| 58476 | | int16x8_t __s1_698 = __p1_698; \ |
| 58477 | | int8x8_t __rev0_698; __rev0_698 = __builtin_shufflevector(__s0_698, __s0_698, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58478 | | int16x8_t __rev1_698; __rev1_698 = __builtin_shufflevector(__s1_698, __s1_698, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58479 | | int8x16_t __ret_698; \ |
| 58480 | | __ret_698 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_698), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_698, __p2_698)))); \ |
| 58481 | | __ret_698 = __builtin_shufflevector(__ret_698, __ret_698, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 58482 | | __ret_698; \ |
| 59830 | #define vqshrun_high_n_s16(__p0_790, __p1_790, __p2_790) __extension__ ({ \ |
| 59831 | int8x8_t __s0_790 = __p0_790; \ |
| 59832 | int16x8_t __s1_790 = __p1_790; \ |
| 59833 | int8x8_t __rev0_790; __rev0_790 = __builtin_shufflevector(__s0_790, __s0_790, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59834 | int16x8_t __rev1_790; __rev1_790 = __builtin_shufflevector(__s1_790, __s1_790, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59835 | int8x16_t __ret_790; \ |
| 59836 | __ret_790 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_790), (int8x8_t)(__noswap_vqshrun_n_s16(__rev1_790, __p2_790)))); \ |
| 59837 | __ret_790 = __builtin_shufflevector(__ret_790, __ret_790, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59838 | __ret_790; \ |
| 58483 | 59839 | }) |
| 58484 | 59840 | #endif |
| 58485 | 59841 | |
| ... | ... | @@ -59789,128 +61145,128 @@ __ai int64_t vrshld_s64(int64_t __p0, int64_t __p1) { |
| 59789 | 61145 | __ret; \ |
| 59790 | 61146 | }) |
| 59791 | 61147 | #ifdef __LITTLE_ENDIAN__ |
| 59792 | | #define vrshrn_high_n_u32(__p0_699, __p1_699, __p2_699) __extension__ ({ \ |
| 59793 | | uint16x4_t __s0_699 = __p0_699; \ |
| 59794 | | uint32x4_t __s1_699 = __p1_699; \ |
| 59795 | | uint16x8_t __ret_699; \ |
| 59796 | | __ret_699 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_699), (uint16x4_t)(vrshrn_n_u32(__s1_699, __p2_699)))); \ |
| 59797 | | __ret_699; \ |
| 61148 | #define vrshrn_high_n_u32(__p0_791, __p1_791, __p2_791) __extension__ ({ \ |
| 61149 | uint16x4_t __s0_791 = __p0_791; \ |
| 61150 | uint32x4_t __s1_791 = __p1_791; \ |
| 61151 | uint16x8_t __ret_791; \ |
| 61152 | __ret_791 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_791), (uint16x4_t)(vrshrn_n_u32(__s1_791, __p2_791)))); \ |
| 61153 | __ret_791; \ |
| 59798 | 61154 | }) |
| 59799 | 61155 | #else |
| 59800 | | #define vrshrn_high_n_u32(__p0_700, __p1_700, __p2_700) __extension__ ({ \ |
| 59801 | | uint16x4_t __s0_700 = __p0_700; \ |
| 59802 | | uint32x4_t __s1_700 = __p1_700; \ |
| 59803 | | uint16x4_t __rev0_700; __rev0_700 = __builtin_shufflevector(__s0_700, __s0_700, 3, 2, 1, 0); \ |
| 59804 | | uint32x4_t __rev1_700; __rev1_700 = __builtin_shufflevector(__s1_700, __s1_700, 3, 2, 1, 0); \ |
| 59805 | | uint16x8_t __ret_700; \ |
| 59806 | | __ret_700 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_700), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_700, __p2_700)))); \ |
| 59807 | | __ret_700 = __builtin_shufflevector(__ret_700, __ret_700, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59808 | | __ret_700; \ |
| 61156 | #define vrshrn_high_n_u32(__p0_792, __p1_792, __p2_792) __extension__ ({ \ |
| 61157 | uint16x4_t __s0_792 = __p0_792; \ |
| 61158 | uint32x4_t __s1_792 = __p1_792; \ |
| 61159 | uint16x4_t __rev0_792; __rev0_792 = __builtin_shufflevector(__s0_792, __s0_792, 3, 2, 1, 0); \ |
| 61160 | uint32x4_t __rev1_792; __rev1_792 = __builtin_shufflevector(__s1_792, __s1_792, 3, 2, 1, 0); \ |
| 61161 | uint16x8_t __ret_792; \ |
| 61162 | __ret_792 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_792), (uint16x4_t)(__noswap_vrshrn_n_u32(__rev1_792, __p2_792)))); \ |
| 61163 | __ret_792 = __builtin_shufflevector(__ret_792, __ret_792, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61164 | __ret_792; \ |
| 59809 | 61165 | }) |
| 59810 | 61166 | #endif |
| 59811 | 61167 | |
| 59812 | 61168 | #ifdef __LITTLE_ENDIAN__ |
| 59813 | | #define vrshrn_high_n_u64(__p0_701, __p1_701, __p2_701) __extension__ ({ \ |
| 59814 | | uint32x2_t __s0_701 = __p0_701; \ |
| 59815 | | uint64x2_t __s1_701 = __p1_701; \ |
| 59816 | | uint32x4_t __ret_701; \ |
| 59817 | | __ret_701 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_701), (uint32x2_t)(vrshrn_n_u64(__s1_701, __p2_701)))); \ |
| 59818 | | __ret_701; \ |
| 61169 | #define vrshrn_high_n_u64(__p0_793, __p1_793, __p2_793) __extension__ ({ \ |
| 61170 | uint32x2_t __s0_793 = __p0_793; \ |
| 61171 | uint64x2_t __s1_793 = __p1_793; \ |
| 61172 | uint32x4_t __ret_793; \ |
| 61173 | __ret_793 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_793), (uint32x2_t)(vrshrn_n_u64(__s1_793, __p2_793)))); \ |
| 61174 | __ret_793; \ |
| 59819 | 61175 | }) |
| 59820 | 61176 | #else |
| 59821 | | #define vrshrn_high_n_u64(__p0_702, __p1_702, __p2_702) __extension__ ({ \ |
| 59822 | | uint32x2_t __s0_702 = __p0_702; \ |
| 59823 | | uint64x2_t __s1_702 = __p1_702; \ |
| 59824 | | uint32x2_t __rev0_702; __rev0_702 = __builtin_shufflevector(__s0_702, __s0_702, 1, 0); \ |
| 59825 | | uint64x2_t __rev1_702; __rev1_702 = __builtin_shufflevector(__s1_702, __s1_702, 1, 0); \ |
| 59826 | | uint32x4_t __ret_702; \ |
| 59827 | | __ret_702 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_702), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_702, __p2_702)))); \ |
| 59828 | | __ret_702 = __builtin_shufflevector(__ret_702, __ret_702, 3, 2, 1, 0); \ |
| 59829 | | __ret_702; \ |
| 61177 | #define vrshrn_high_n_u64(__p0_794, __p1_794, __p2_794) __extension__ ({ \ |
| 61178 | uint32x2_t __s0_794 = __p0_794; \ |
| 61179 | uint64x2_t __s1_794 = __p1_794; \ |
| 61180 | uint32x2_t __rev0_794; __rev0_794 = __builtin_shufflevector(__s0_794, __s0_794, 1, 0); \ |
| 61181 | uint64x2_t __rev1_794; __rev1_794 = __builtin_shufflevector(__s1_794, __s1_794, 1, 0); \ |
| 61182 | uint32x4_t __ret_794; \ |
| 61183 | __ret_794 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_794), (uint32x2_t)(__noswap_vrshrn_n_u64(__rev1_794, __p2_794)))); \ |
| 61184 | __ret_794 = __builtin_shufflevector(__ret_794, __ret_794, 3, 2, 1, 0); \ |
| 61185 | __ret_794; \ |
| 59830 | 61186 | }) |
| 59831 | 61187 | #endif |
| 59832 | 61188 | |
| 59833 | 61189 | #ifdef __LITTLE_ENDIAN__ |
| 59834 | | #define vrshrn_high_n_u16(__p0_703, __p1_703, __p2_703) __extension__ ({ \ |
| 59835 | | uint8x8_t __s0_703 = __p0_703; \ |
| 59836 | | uint16x8_t __s1_703 = __p1_703; \ |
| 59837 | | uint8x16_t __ret_703; \ |
| 59838 | | __ret_703 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_703), (uint8x8_t)(vrshrn_n_u16(__s1_703, __p2_703)))); \ |
| 59839 | | __ret_703; \ |
| 61190 | #define vrshrn_high_n_u16(__p0_795, __p1_795, __p2_795) __extension__ ({ \ |
| 61191 | uint8x8_t __s0_795 = __p0_795; \ |
| 61192 | uint16x8_t __s1_795 = __p1_795; \ |
| 61193 | uint8x16_t __ret_795; \ |
| 61194 | __ret_795 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_795), (uint8x8_t)(vrshrn_n_u16(__s1_795, __p2_795)))); \ |
| 61195 | __ret_795; \ |
| 59840 | 61196 | }) |
| 59841 | 61197 | #else |
| 59842 | | #define vrshrn_high_n_u16(__p0_704, __p1_704, __p2_704) __extension__ ({ \ |
| 59843 | | uint8x8_t __s0_704 = __p0_704; \ |
| 59844 | | uint16x8_t __s1_704 = __p1_704; \ |
| 59845 | | uint8x8_t __rev0_704; __rev0_704 = __builtin_shufflevector(__s0_704, __s0_704, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59846 | | uint16x8_t __rev1_704; __rev1_704 = __builtin_shufflevector(__s1_704, __s1_704, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59847 | | uint8x16_t __ret_704; \ |
| 59848 | | __ret_704 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_704), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_704, __p2_704)))); \ |
| 59849 | | __ret_704 = __builtin_shufflevector(__ret_704, __ret_704, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59850 | | __ret_704; \ |
| 61198 | #define vrshrn_high_n_u16(__p0_796, __p1_796, __p2_796) __extension__ ({ \ |
| 61199 | uint8x8_t __s0_796 = __p0_796; \ |
| 61200 | uint16x8_t __s1_796 = __p1_796; \ |
| 61201 | uint8x8_t __rev0_796; __rev0_796 = __builtin_shufflevector(__s0_796, __s0_796, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61202 | uint16x8_t __rev1_796; __rev1_796 = __builtin_shufflevector(__s1_796, __s1_796, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61203 | uint8x16_t __ret_796; \ |
| 61204 | __ret_796 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_796), (uint8x8_t)(__noswap_vrshrn_n_u16(__rev1_796, __p2_796)))); \ |
| 61205 | __ret_796 = __builtin_shufflevector(__ret_796, __ret_796, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61206 | __ret_796; \ |
| 59851 | 61207 | }) |
| 59852 | 61208 | #endif |
| 59853 | 61209 | |
| 59854 | 61210 | #ifdef __LITTLE_ENDIAN__ |
| 59855 | | #define vrshrn_high_n_s32(__p0_705, __p1_705, __p2_705) __extension__ ({ \ |
| 59856 | | int16x4_t __s0_705 = __p0_705; \ |
| 59857 | | int32x4_t __s1_705 = __p1_705; \ |
| 59858 | | int16x8_t __ret_705; \ |
| 59859 | | __ret_705 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_705), (int16x4_t)(vrshrn_n_s32(__s1_705, __p2_705)))); \ |
| 59860 | | __ret_705; \ |
| 61211 | #define vrshrn_high_n_s32(__p0_797, __p1_797, __p2_797) __extension__ ({ \ |
| 61212 | int16x4_t __s0_797 = __p0_797; \ |
| 61213 | int32x4_t __s1_797 = __p1_797; \ |
| 61214 | int16x8_t __ret_797; \ |
| 61215 | __ret_797 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_797), (int16x4_t)(vrshrn_n_s32(__s1_797, __p2_797)))); \ |
| 61216 | __ret_797; \ |
| 59861 | 61217 | }) |
| 59862 | 61218 | #else |
| 59863 | | #define vrshrn_high_n_s32(__p0_706, __p1_706, __p2_706) __extension__ ({ \ |
| 59864 | | int16x4_t __s0_706 = __p0_706; \ |
| 59865 | | int32x4_t __s1_706 = __p1_706; \ |
| 59866 | | int16x4_t __rev0_706; __rev0_706 = __builtin_shufflevector(__s0_706, __s0_706, 3, 2, 1, 0); \ |
| 59867 | | int32x4_t __rev1_706; __rev1_706 = __builtin_shufflevector(__s1_706, __s1_706, 3, 2, 1, 0); \ |
| 59868 | | int16x8_t __ret_706; \ |
| 59869 | | __ret_706 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_706), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_706, __p2_706)))); \ |
| 59870 | | __ret_706 = __builtin_shufflevector(__ret_706, __ret_706, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59871 | | __ret_706; \ |
| 61219 | #define vrshrn_high_n_s32(__p0_798, __p1_798, __p2_798) __extension__ ({ \ |
| 61220 | int16x4_t __s0_798 = __p0_798; \ |
| 61221 | int32x4_t __s1_798 = __p1_798; \ |
| 61222 | int16x4_t __rev0_798; __rev0_798 = __builtin_shufflevector(__s0_798, __s0_798, 3, 2, 1, 0); \ |
| 61223 | int32x4_t __rev1_798; __rev1_798 = __builtin_shufflevector(__s1_798, __s1_798, 3, 2, 1, 0); \ |
| 61224 | int16x8_t __ret_798; \ |
| 61225 | __ret_798 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_798), (int16x4_t)(__noswap_vrshrn_n_s32(__rev1_798, __p2_798)))); \ |
| 61226 | __ret_798 = __builtin_shufflevector(__ret_798, __ret_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61227 | __ret_798; \ |
| 59872 | 61228 | }) |
| 59873 | 61229 | #endif |
| 59874 | 61230 | |
| 59875 | 61231 | #ifdef __LITTLE_ENDIAN__ |
| 59876 | | #define vrshrn_high_n_s64(__p0_707, __p1_707, __p2_707) __extension__ ({ \ |
| 59877 | | int32x2_t __s0_707 = __p0_707; \ |
| 59878 | | int64x2_t __s1_707 = __p1_707; \ |
| 59879 | | int32x4_t __ret_707; \ |
| 59880 | | __ret_707 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_707), (int32x2_t)(vrshrn_n_s64(__s1_707, __p2_707)))); \ |
| 59881 | | __ret_707; \ |
| 61232 | #define vrshrn_high_n_s64(__p0_799, __p1_799, __p2_799) __extension__ ({ \ |
| 61233 | int32x2_t __s0_799 = __p0_799; \ |
| 61234 | int64x2_t __s1_799 = __p1_799; \ |
| 61235 | int32x4_t __ret_799; \ |
| 61236 | __ret_799 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_799), (int32x2_t)(vrshrn_n_s64(__s1_799, __p2_799)))); \ |
| 61237 | __ret_799; \ |
| 59882 | 61238 | }) |
| 59883 | 61239 | #else |
| 59884 | | #define vrshrn_high_n_s64(__p0_708, __p1_708, __p2_708) __extension__ ({ \ |
| 59885 | | int32x2_t __s0_708 = __p0_708; \ |
| 59886 | | int64x2_t __s1_708 = __p1_708; \ |
| 59887 | | int32x2_t __rev0_708; __rev0_708 = __builtin_shufflevector(__s0_708, __s0_708, 1, 0); \ |
| 59888 | | int64x2_t __rev1_708; __rev1_708 = __builtin_shufflevector(__s1_708, __s1_708, 1, 0); \ |
| 59889 | | int32x4_t __ret_708; \ |
| 59890 | | __ret_708 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_708), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_708, __p2_708)))); \ |
| 59891 | | __ret_708 = __builtin_shufflevector(__ret_708, __ret_708, 3, 2, 1, 0); \ |
| 59892 | | __ret_708; \ |
| 61240 | #define vrshrn_high_n_s64(__p0_800, __p1_800, __p2_800) __extension__ ({ \ |
| 61241 | int32x2_t __s0_800 = __p0_800; \ |
| 61242 | int64x2_t __s1_800 = __p1_800; \ |
| 61243 | int32x2_t __rev0_800; __rev0_800 = __builtin_shufflevector(__s0_800, __s0_800, 1, 0); \ |
| 61244 | int64x2_t __rev1_800; __rev1_800 = __builtin_shufflevector(__s1_800, __s1_800, 1, 0); \ |
| 61245 | int32x4_t __ret_800; \ |
| 61246 | __ret_800 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_800), (int32x2_t)(__noswap_vrshrn_n_s64(__rev1_800, __p2_800)))); \ |
| 61247 | __ret_800 = __builtin_shufflevector(__ret_800, __ret_800, 3, 2, 1, 0); \ |
| 61248 | __ret_800; \ |
| 59893 | 61249 | }) |
| 59894 | 61250 | #endif |
| 59895 | 61251 | |
| 59896 | 61252 | #ifdef __LITTLE_ENDIAN__ |
| 59897 | | #define vrshrn_high_n_s16(__p0_709, __p1_709, __p2_709) __extension__ ({ \ |
| 59898 | | int8x8_t __s0_709 = __p0_709; \ |
| 59899 | | int16x8_t __s1_709 = __p1_709; \ |
| 59900 | | int8x16_t __ret_709; \ |
| 59901 | | __ret_709 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_709), (int8x8_t)(vrshrn_n_s16(__s1_709, __p2_709)))); \ |
| 59902 | | __ret_709; \ |
| 61253 | #define vrshrn_high_n_s16(__p0_801, __p1_801, __p2_801) __extension__ ({ \ |
| 61254 | int8x8_t __s0_801 = __p0_801; \ |
| 61255 | int16x8_t __s1_801 = __p1_801; \ |
| 61256 | int8x16_t __ret_801; \ |
| 61257 | __ret_801 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_801), (int8x8_t)(vrshrn_n_s16(__s1_801, __p2_801)))); \ |
| 61258 | __ret_801; \ |
| 59903 | 61259 | }) |
| 59904 | 61260 | #else |
| 59905 | | #define vrshrn_high_n_s16(__p0_710, __p1_710, __p2_710) __extension__ ({ \ |
| 59906 | | int8x8_t __s0_710 = __p0_710; \ |
| 59907 | | int16x8_t __s1_710 = __p1_710; \ |
| 59908 | | int8x8_t __rev0_710; __rev0_710 = __builtin_shufflevector(__s0_710, __s0_710, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59909 | | int16x8_t __rev1_710; __rev1_710 = __builtin_shufflevector(__s1_710, __s1_710, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59910 | | int8x16_t __ret_710; \ |
| 59911 | | __ret_710 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_710), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_710, __p2_710)))); \ |
| 59912 | | __ret_710 = __builtin_shufflevector(__ret_710, __ret_710, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 59913 | | __ret_710; \ |
| 61261 | #define vrshrn_high_n_s16(__p0_802, __p1_802, __p2_802) __extension__ ({ \ |
| 61262 | int8x8_t __s0_802 = __p0_802; \ |
| 61263 | int16x8_t __s1_802 = __p1_802; \ |
| 61264 | int8x8_t __rev0_802; __rev0_802 = __builtin_shufflevector(__s0_802, __s0_802, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61265 | int16x8_t __rev1_802; __rev1_802 = __builtin_shufflevector(__s1_802, __s1_802, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61266 | int8x16_t __ret_802; \ |
| 61267 | __ret_802 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_802), (int8x8_t)(__noswap_vrshrn_n_s16(__rev1_802, __p2_802)))); \ |
| 61268 | __ret_802 = __builtin_shufflevector(__ret_802, __ret_802, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61269 | __ret_802; \ |
| 59914 | 61270 | }) |
| 59915 | 61271 | #endif |
| 59916 | 61272 | |
| ... | ... | @@ -60190,110 +61546,110 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 60190 | 61546 | __ret; \ |
| 60191 | 61547 | }) |
| 60192 | 61548 | #ifdef __LITTLE_ENDIAN__ |
| 60193 | | #define vshll_high_n_u8(__p0_711, __p1_711) __extension__ ({ \ |
| 60194 | | uint8x16_t __s0_711 = __p0_711; \ |
| 60195 | | uint16x8_t __ret_711; \ |
| 60196 | | __ret_711 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_711), __p1_711)); \ |
| 60197 | | __ret_711; \ |
| 61549 | #define vshll_high_n_u8(__p0_803, __p1_803) __extension__ ({ \ |
| 61550 | uint8x16_t __s0_803 = __p0_803; \ |
| 61551 | uint16x8_t __ret_803; \ |
| 61552 | __ret_803 = (uint16x8_t)(vshll_n_u8(vget_high_u8(__s0_803), __p1_803)); \ |
| 61553 | __ret_803; \ |
| 60198 | 61554 | }) |
| 60199 | 61555 | #else |
| 60200 | | #define vshll_high_n_u8(__p0_712, __p1_712) __extension__ ({ \ |
| 60201 | | uint8x16_t __s0_712 = __p0_712; \ |
| 60202 | | uint8x16_t __rev0_712; __rev0_712 = __builtin_shufflevector(__s0_712, __s0_712, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60203 | | uint16x8_t __ret_712; \ |
| 60204 | | __ret_712 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_712), __p1_712)); \ |
| 60205 | | __ret_712 = __builtin_shufflevector(__ret_712, __ret_712, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60206 | | __ret_712; \ |
| 61556 | #define vshll_high_n_u8(__p0_804, __p1_804) __extension__ ({ \ |
| 61557 | uint8x16_t __s0_804 = __p0_804; \ |
| 61558 | uint8x16_t __rev0_804; __rev0_804 = __builtin_shufflevector(__s0_804, __s0_804, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61559 | uint16x8_t __ret_804; \ |
| 61560 | __ret_804 = (uint16x8_t)(__noswap_vshll_n_u8(__noswap_vget_high_u8(__rev0_804), __p1_804)); \ |
| 61561 | __ret_804 = __builtin_shufflevector(__ret_804, __ret_804, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61562 | __ret_804; \ |
| 60207 | 61563 | }) |
| 60208 | 61564 | #endif |
| 60209 | 61565 | |
| 60210 | 61566 | #ifdef __LITTLE_ENDIAN__ |
| 60211 | | #define vshll_high_n_u32(__p0_713, __p1_713) __extension__ ({ \ |
| 60212 | | uint32x4_t __s0_713 = __p0_713; \ |
| 60213 | | uint64x2_t __ret_713; \ |
| 60214 | | __ret_713 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_713), __p1_713)); \ |
| 60215 | | __ret_713; \ |
| 61567 | #define vshll_high_n_u32(__p0_805, __p1_805) __extension__ ({ \ |
| 61568 | uint32x4_t __s0_805 = __p0_805; \ |
| 61569 | uint64x2_t __ret_805; \ |
| 61570 | __ret_805 = (uint64x2_t)(vshll_n_u32(vget_high_u32(__s0_805), __p1_805)); \ |
| 61571 | __ret_805; \ |
| 60216 | 61572 | }) |
| 60217 | 61573 | #else |
| 60218 | | #define vshll_high_n_u32(__p0_714, __p1_714) __extension__ ({ \ |
| 60219 | | uint32x4_t __s0_714 = __p0_714; \ |
| 60220 | | uint32x4_t __rev0_714; __rev0_714 = __builtin_shufflevector(__s0_714, __s0_714, 3, 2, 1, 0); \ |
| 60221 | | uint64x2_t __ret_714; \ |
| 60222 | | __ret_714 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_714), __p1_714)); \ |
| 60223 | | __ret_714 = __builtin_shufflevector(__ret_714, __ret_714, 1, 0); \ |
| 60224 | | __ret_714; \ |
| 61574 | #define vshll_high_n_u32(__p0_806, __p1_806) __extension__ ({ \ |
| 61575 | uint32x4_t __s0_806 = __p0_806; \ |
| 61576 | uint32x4_t __rev0_806; __rev0_806 = __builtin_shufflevector(__s0_806, __s0_806, 3, 2, 1, 0); \ |
| 61577 | uint64x2_t __ret_806; \ |
| 61578 | __ret_806 = (uint64x2_t)(__noswap_vshll_n_u32(__noswap_vget_high_u32(__rev0_806), __p1_806)); \ |
| 61579 | __ret_806 = __builtin_shufflevector(__ret_806, __ret_806, 1, 0); \ |
| 61580 | __ret_806; \ |
| 60225 | 61581 | }) |
| 60226 | 61582 | #endif |
| 60227 | 61583 | |
| 60228 | 61584 | #ifdef __LITTLE_ENDIAN__ |
| 60229 | | #define vshll_high_n_u16(__p0_715, __p1_715) __extension__ ({ \ |
| 60230 | | uint16x8_t __s0_715 = __p0_715; \ |
| 60231 | | uint32x4_t __ret_715; \ |
| 60232 | | __ret_715 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_715), __p1_715)); \ |
| 60233 | | __ret_715; \ |
| 61585 | #define vshll_high_n_u16(__p0_807, __p1_807) __extension__ ({ \ |
| 61586 | uint16x8_t __s0_807 = __p0_807; \ |
| 61587 | uint32x4_t __ret_807; \ |
| 61588 | __ret_807 = (uint32x4_t)(vshll_n_u16(vget_high_u16(__s0_807), __p1_807)); \ |
| 61589 | __ret_807; \ |
| 60234 | 61590 | }) |
| 60235 | 61591 | #else |
| 60236 | | #define vshll_high_n_u16(__p0_716, __p1_716) __extension__ ({ \ |
| 60237 | | uint16x8_t __s0_716 = __p0_716; \ |
| 60238 | | uint16x8_t __rev0_716; __rev0_716 = __builtin_shufflevector(__s0_716, __s0_716, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60239 | | uint32x4_t __ret_716; \ |
| 60240 | | __ret_716 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_716), __p1_716)); \ |
| 60241 | | __ret_716 = __builtin_shufflevector(__ret_716, __ret_716, 3, 2, 1, 0); \ |
| 60242 | | __ret_716; \ |
| 61592 | #define vshll_high_n_u16(__p0_808, __p1_808) __extension__ ({ \ |
| 61593 | uint16x8_t __s0_808 = __p0_808; \ |
| 61594 | uint16x8_t __rev0_808; __rev0_808 = __builtin_shufflevector(__s0_808, __s0_808, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61595 | uint32x4_t __ret_808; \ |
| 61596 | __ret_808 = (uint32x4_t)(__noswap_vshll_n_u16(__noswap_vget_high_u16(__rev0_808), __p1_808)); \ |
| 61597 | __ret_808 = __builtin_shufflevector(__ret_808, __ret_808, 3, 2, 1, 0); \ |
| 61598 | __ret_808; \ |
| 60243 | 61599 | }) |
| 60244 | 61600 | #endif |
| 60245 | 61601 | |
| 60246 | 61602 | #ifdef __LITTLE_ENDIAN__ |
| 60247 | | #define vshll_high_n_s8(__p0_717, __p1_717) __extension__ ({ \ |
| 60248 | | int8x16_t __s0_717 = __p0_717; \ |
| 60249 | | int16x8_t __ret_717; \ |
| 60250 | | __ret_717 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_717), __p1_717)); \ |
| 60251 | | __ret_717; \ |
| 61603 | #define vshll_high_n_s8(__p0_809, __p1_809) __extension__ ({ \ |
| 61604 | int8x16_t __s0_809 = __p0_809; \ |
| 61605 | int16x8_t __ret_809; \ |
| 61606 | __ret_809 = (int16x8_t)(vshll_n_s8(vget_high_s8(__s0_809), __p1_809)); \ |
| 61607 | __ret_809; \ |
| 60252 | 61608 | }) |
| 60253 | 61609 | #else |
| 60254 | | #define vshll_high_n_s8(__p0_718, __p1_718) __extension__ ({ \ |
| 60255 | | int8x16_t __s0_718 = __p0_718; \ |
| 60256 | | int8x16_t __rev0_718; __rev0_718 = __builtin_shufflevector(__s0_718, __s0_718, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60257 | | int16x8_t __ret_718; \ |
| 60258 | | __ret_718 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_718), __p1_718)); \ |
| 60259 | | __ret_718 = __builtin_shufflevector(__ret_718, __ret_718, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60260 | | __ret_718; \ |
| 61610 | #define vshll_high_n_s8(__p0_810, __p1_810) __extension__ ({ \ |
| 61611 | int8x16_t __s0_810 = __p0_810; \ |
| 61612 | int8x16_t __rev0_810; __rev0_810 = __builtin_shufflevector(__s0_810, __s0_810, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61613 | int16x8_t __ret_810; \ |
| 61614 | __ret_810 = (int16x8_t)(__noswap_vshll_n_s8(__noswap_vget_high_s8(__rev0_810), __p1_810)); \ |
| 61615 | __ret_810 = __builtin_shufflevector(__ret_810, __ret_810, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61616 | __ret_810; \ |
| 60261 | 61617 | }) |
| 60262 | 61618 | #endif |
| 60263 | 61619 | |
| 60264 | 61620 | #ifdef __LITTLE_ENDIAN__ |
| 60265 | | #define vshll_high_n_s32(__p0_719, __p1_719) __extension__ ({ \ |
| 60266 | | int32x4_t __s0_719 = __p0_719; \ |
| 60267 | | int64x2_t __ret_719; \ |
| 60268 | | __ret_719 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_719), __p1_719)); \ |
| 60269 | | __ret_719; \ |
| 61621 | #define vshll_high_n_s32(__p0_811, __p1_811) __extension__ ({ \ |
| 61622 | int32x4_t __s0_811 = __p0_811; \ |
| 61623 | int64x2_t __ret_811; \ |
| 61624 | __ret_811 = (int64x2_t)(vshll_n_s32(vget_high_s32(__s0_811), __p1_811)); \ |
| 61625 | __ret_811; \ |
| 60270 | 61626 | }) |
| 60271 | 61627 | #else |
| 60272 | | #define vshll_high_n_s32(__p0_720, __p1_720) __extension__ ({ \ |
| 60273 | | int32x4_t __s0_720 = __p0_720; \ |
| 60274 | | int32x4_t __rev0_720; __rev0_720 = __builtin_shufflevector(__s0_720, __s0_720, 3, 2, 1, 0); \ |
| 60275 | | int64x2_t __ret_720; \ |
| 60276 | | __ret_720 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_720), __p1_720)); \ |
| 60277 | | __ret_720 = __builtin_shufflevector(__ret_720, __ret_720, 1, 0); \ |
| 60278 | | __ret_720; \ |
| 61628 | #define vshll_high_n_s32(__p0_812, __p1_812) __extension__ ({ \ |
| 61629 | int32x4_t __s0_812 = __p0_812; \ |
| 61630 | int32x4_t __rev0_812; __rev0_812 = __builtin_shufflevector(__s0_812, __s0_812, 3, 2, 1, 0); \ |
| 61631 | int64x2_t __ret_812; \ |
| 61632 | __ret_812 = (int64x2_t)(__noswap_vshll_n_s32(__noswap_vget_high_s32(__rev0_812), __p1_812)); \ |
| 61633 | __ret_812 = __builtin_shufflevector(__ret_812, __ret_812, 1, 0); \ |
| 61634 | __ret_812; \ |
| 60279 | 61635 | }) |
| 60280 | 61636 | #endif |
| 60281 | 61637 | |
| 60282 | 61638 | #ifdef __LITTLE_ENDIAN__ |
| 60283 | | #define vshll_high_n_s16(__p0_721, __p1_721) __extension__ ({ \ |
| 60284 | | int16x8_t __s0_721 = __p0_721; \ |
| 60285 | | int32x4_t __ret_721; \ |
| 60286 | | __ret_721 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_721), __p1_721)); \ |
| 60287 | | __ret_721; \ |
| 61639 | #define vshll_high_n_s16(__p0_813, __p1_813) __extension__ ({ \ |
| 61640 | int16x8_t __s0_813 = __p0_813; \ |
| 61641 | int32x4_t __ret_813; \ |
| 61642 | __ret_813 = (int32x4_t)(vshll_n_s16(vget_high_s16(__s0_813), __p1_813)); \ |
| 61643 | __ret_813; \ |
| 60288 | 61644 | }) |
| 60289 | 61645 | #else |
| 60290 | | #define vshll_high_n_s16(__p0_722, __p1_722) __extension__ ({ \ |
| 60291 | | int16x8_t __s0_722 = __p0_722; \ |
| 60292 | | int16x8_t __rev0_722; __rev0_722 = __builtin_shufflevector(__s0_722, __s0_722, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60293 | | int32x4_t __ret_722; \ |
| 60294 | | __ret_722 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_722), __p1_722)); \ |
| 60295 | | __ret_722 = __builtin_shufflevector(__ret_722, __ret_722, 3, 2, 1, 0); \ |
| 60296 | | __ret_722; \ |
| 61646 | #define vshll_high_n_s16(__p0_814, __p1_814) __extension__ ({ \ |
| 61647 | int16x8_t __s0_814 = __p0_814; \ |
| 61648 | int16x8_t __rev0_814; __rev0_814 = __builtin_shufflevector(__s0_814, __s0_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61649 | int32x4_t __ret_814; \ |
| 61650 | __ret_814 = (int32x4_t)(__noswap_vshll_n_s16(__noswap_vget_high_s16(__rev0_814), __p1_814)); \ |
| 61651 | __ret_814 = __builtin_shufflevector(__ret_814, __ret_814, 3, 2, 1, 0); \ |
| 61652 | __ret_814; \ |
| 60297 | 61653 | }) |
| 60298 | 61654 | #endif |
| 60299 | 61655 | |
| ... | ... | @@ -60310,128 +61666,128 @@ __ai int64_t vshld_s64(int64_t __p0, int64_t __p1) { |
| 60310 | 61666 | __ret; \ |
| 60311 | 61667 | }) |
| 60312 | 61668 | #ifdef __LITTLE_ENDIAN__ |
| 60313 | | #define vshrn_high_n_u32(__p0_723, __p1_723, __p2_723) __extension__ ({ \ |
| 60314 | | uint16x4_t __s0_723 = __p0_723; \ |
| 60315 | | uint32x4_t __s1_723 = __p1_723; \ |
| 60316 | | uint16x8_t __ret_723; \ |
| 60317 | | __ret_723 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_723), (uint16x4_t)(vshrn_n_u32(__s1_723, __p2_723)))); \ |
| 60318 | | __ret_723; \ |
| 61669 | #define vshrn_high_n_u32(__p0_815, __p1_815, __p2_815) __extension__ ({ \ |
| 61670 | uint16x4_t __s0_815 = __p0_815; \ |
| 61671 | uint32x4_t __s1_815 = __p1_815; \ |
| 61672 | uint16x8_t __ret_815; \ |
| 61673 | __ret_815 = (uint16x8_t)(vcombine_u16((uint16x4_t)(__s0_815), (uint16x4_t)(vshrn_n_u32(__s1_815, __p2_815)))); \ |
| 61674 | __ret_815; \ |
| 60319 | 61675 | }) |
| 60320 | 61676 | #else |
| 60321 | | #define vshrn_high_n_u32(__p0_724, __p1_724, __p2_724) __extension__ ({ \ |
| 60322 | | uint16x4_t __s0_724 = __p0_724; \ |
| 60323 | | uint32x4_t __s1_724 = __p1_724; \ |
| 60324 | | uint16x4_t __rev0_724; __rev0_724 = __builtin_shufflevector(__s0_724, __s0_724, 3, 2, 1, 0); \ |
| 60325 | | uint32x4_t __rev1_724; __rev1_724 = __builtin_shufflevector(__s1_724, __s1_724, 3, 2, 1, 0); \ |
| 60326 | | uint16x8_t __ret_724; \ |
| 60327 | | __ret_724 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_724), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_724, __p2_724)))); \ |
| 60328 | | __ret_724 = __builtin_shufflevector(__ret_724, __ret_724, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60329 | | __ret_724; \ |
| 61677 | #define vshrn_high_n_u32(__p0_816, __p1_816, __p2_816) __extension__ ({ \ |
| 61678 | uint16x4_t __s0_816 = __p0_816; \ |
| 61679 | uint32x4_t __s1_816 = __p1_816; \ |
| 61680 | uint16x4_t __rev0_816; __rev0_816 = __builtin_shufflevector(__s0_816, __s0_816, 3, 2, 1, 0); \ |
| 61681 | uint32x4_t __rev1_816; __rev1_816 = __builtin_shufflevector(__s1_816, __s1_816, 3, 2, 1, 0); \ |
| 61682 | uint16x8_t __ret_816; \ |
| 61683 | __ret_816 = (uint16x8_t)(__noswap_vcombine_u16((uint16x4_t)(__rev0_816), (uint16x4_t)(__noswap_vshrn_n_u32(__rev1_816, __p2_816)))); \ |
| 61684 | __ret_816 = __builtin_shufflevector(__ret_816, __ret_816, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61685 | __ret_816; \ |
| 60330 | 61686 | }) |
| 60331 | 61687 | #endif |
| 60332 | 61688 | |
| 60333 | 61689 | #ifdef __LITTLE_ENDIAN__ |
| 60334 | | #define vshrn_high_n_u64(__p0_725, __p1_725, __p2_725) __extension__ ({ \ |
| 60335 | | uint32x2_t __s0_725 = __p0_725; \ |
| 60336 | | uint64x2_t __s1_725 = __p1_725; \ |
| 60337 | | uint32x4_t __ret_725; \ |
| 60338 | | __ret_725 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_725), (uint32x2_t)(vshrn_n_u64(__s1_725, __p2_725)))); \ |
| 60339 | | __ret_725; \ |
| 61690 | #define vshrn_high_n_u64(__p0_817, __p1_817, __p2_817) __extension__ ({ \ |
| 61691 | uint32x2_t __s0_817 = __p0_817; \ |
| 61692 | uint64x2_t __s1_817 = __p1_817; \ |
| 61693 | uint32x4_t __ret_817; \ |
| 61694 | __ret_817 = (uint32x4_t)(vcombine_u32((uint32x2_t)(__s0_817), (uint32x2_t)(vshrn_n_u64(__s1_817, __p2_817)))); \ |
| 61695 | __ret_817; \ |
| 60340 | 61696 | }) |
| 60341 | 61697 | #else |
| 60342 | | #define vshrn_high_n_u64(__p0_726, __p1_726, __p2_726) __extension__ ({ \ |
| 60343 | | uint32x2_t __s0_726 = __p0_726; \ |
| 60344 | | uint64x2_t __s1_726 = __p1_726; \ |
| 60345 | | uint32x2_t __rev0_726; __rev0_726 = __builtin_shufflevector(__s0_726, __s0_726, 1, 0); \ |
| 60346 | | uint64x2_t __rev1_726; __rev1_726 = __builtin_shufflevector(__s1_726, __s1_726, 1, 0); \ |
| 60347 | | uint32x4_t __ret_726; \ |
| 60348 | | __ret_726 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_726), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_726, __p2_726)))); \ |
| 60349 | | __ret_726 = __builtin_shufflevector(__ret_726, __ret_726, 3, 2, 1, 0); \ |
| 60350 | | __ret_726; \ |
| 61698 | #define vshrn_high_n_u64(__p0_818, __p1_818, __p2_818) __extension__ ({ \ |
| 61699 | uint32x2_t __s0_818 = __p0_818; \ |
| 61700 | uint64x2_t __s1_818 = __p1_818; \ |
| 61701 | uint32x2_t __rev0_818; __rev0_818 = __builtin_shufflevector(__s0_818, __s0_818, 1, 0); \ |
| 61702 | uint64x2_t __rev1_818; __rev1_818 = __builtin_shufflevector(__s1_818, __s1_818, 1, 0); \ |
| 61703 | uint32x4_t __ret_818; \ |
| 61704 | __ret_818 = (uint32x4_t)(__noswap_vcombine_u32((uint32x2_t)(__rev0_818), (uint32x2_t)(__noswap_vshrn_n_u64(__rev1_818, __p2_818)))); \ |
| 61705 | __ret_818 = __builtin_shufflevector(__ret_818, __ret_818, 3, 2, 1, 0); \ |
| 61706 | __ret_818; \ |
| 60351 | 61707 | }) |
| 60352 | 61708 | #endif |
| 60353 | 61709 | |
| 60354 | 61710 | #ifdef __LITTLE_ENDIAN__ |
| 60355 | | #define vshrn_high_n_u16(__p0_727, __p1_727, __p2_727) __extension__ ({ \ |
| 60356 | | uint8x8_t __s0_727 = __p0_727; \ |
| 60357 | | uint16x8_t __s1_727 = __p1_727; \ |
| 60358 | | uint8x16_t __ret_727; \ |
| 60359 | | __ret_727 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_727), (uint8x8_t)(vshrn_n_u16(__s1_727, __p2_727)))); \ |
| 60360 | | __ret_727; \ |
| 61711 | #define vshrn_high_n_u16(__p0_819, __p1_819, __p2_819) __extension__ ({ \ |
| 61712 | uint8x8_t __s0_819 = __p0_819; \ |
| 61713 | uint16x8_t __s1_819 = __p1_819; \ |
| 61714 | uint8x16_t __ret_819; \ |
| 61715 | __ret_819 = (uint8x16_t)(vcombine_u8((uint8x8_t)(__s0_819), (uint8x8_t)(vshrn_n_u16(__s1_819, __p2_819)))); \ |
| 61716 | __ret_819; \ |
| 60361 | 61717 | }) |
| 60362 | 61718 | #else |
| 60363 | | #define vshrn_high_n_u16(__p0_728, __p1_728, __p2_728) __extension__ ({ \ |
| 60364 | | uint8x8_t __s0_728 = __p0_728; \ |
| 60365 | | uint16x8_t __s1_728 = __p1_728; \ |
| 60366 | | uint8x8_t __rev0_728; __rev0_728 = __builtin_shufflevector(__s0_728, __s0_728, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60367 | | uint16x8_t __rev1_728; __rev1_728 = __builtin_shufflevector(__s1_728, __s1_728, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60368 | | uint8x16_t __ret_728; \ |
| 60369 | | __ret_728 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_728), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_728, __p2_728)))); \ |
| 60370 | | __ret_728 = __builtin_shufflevector(__ret_728, __ret_728, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60371 | | __ret_728; \ |
| 61719 | #define vshrn_high_n_u16(__p0_820, __p1_820, __p2_820) __extension__ ({ \ |
| 61720 | uint8x8_t __s0_820 = __p0_820; \ |
| 61721 | uint16x8_t __s1_820 = __p1_820; \ |
| 61722 | uint8x8_t __rev0_820; __rev0_820 = __builtin_shufflevector(__s0_820, __s0_820, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61723 | uint16x8_t __rev1_820; __rev1_820 = __builtin_shufflevector(__s1_820, __s1_820, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61724 | uint8x16_t __ret_820; \ |
| 61725 | __ret_820 = (uint8x16_t)(__noswap_vcombine_u8((uint8x8_t)(__rev0_820), (uint8x8_t)(__noswap_vshrn_n_u16(__rev1_820, __p2_820)))); \ |
| 61726 | __ret_820 = __builtin_shufflevector(__ret_820, __ret_820, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61727 | __ret_820; \ |
| 60372 | 61728 | }) |
| 60373 | 61729 | #endif |
| 60374 | 61730 | |
| 60375 | 61731 | #ifdef __LITTLE_ENDIAN__ |
| 60376 | | #define vshrn_high_n_s32(__p0_729, __p1_729, __p2_729) __extension__ ({ \ |
| 60377 | | int16x4_t __s0_729 = __p0_729; \ |
| 60378 | | int32x4_t __s1_729 = __p1_729; \ |
| 60379 | | int16x8_t __ret_729; \ |
| 60380 | | __ret_729 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_729), (int16x4_t)(vshrn_n_s32(__s1_729, __p2_729)))); \ |
| 60381 | | __ret_729; \ |
| 61732 | #define vshrn_high_n_s32(__p0_821, __p1_821, __p2_821) __extension__ ({ \ |
| 61733 | int16x4_t __s0_821 = __p0_821; \ |
| 61734 | int32x4_t __s1_821 = __p1_821; \ |
| 61735 | int16x8_t __ret_821; \ |
| 61736 | __ret_821 = (int16x8_t)(vcombine_s16((int16x4_t)(__s0_821), (int16x4_t)(vshrn_n_s32(__s1_821, __p2_821)))); \ |
| 61737 | __ret_821; \ |
| 60382 | 61738 | }) |
| 60383 | 61739 | #else |
| 60384 | | #define vshrn_high_n_s32(__p0_730, __p1_730, __p2_730) __extension__ ({ \ |
| 60385 | | int16x4_t __s0_730 = __p0_730; \ |
| 60386 | | int32x4_t __s1_730 = __p1_730; \ |
| 60387 | | int16x4_t __rev0_730; __rev0_730 = __builtin_shufflevector(__s0_730, __s0_730, 3, 2, 1, 0); \ |
| 60388 | | int32x4_t __rev1_730; __rev1_730 = __builtin_shufflevector(__s1_730, __s1_730, 3, 2, 1, 0); \ |
| 60389 | | int16x8_t __ret_730; \ |
| 60390 | | __ret_730 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_730), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_730, __p2_730)))); \ |
| 60391 | | __ret_730 = __builtin_shufflevector(__ret_730, __ret_730, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60392 | | __ret_730; \ |
| 61740 | #define vshrn_high_n_s32(__p0_822, __p1_822, __p2_822) __extension__ ({ \ |
| 61741 | int16x4_t __s0_822 = __p0_822; \ |
| 61742 | int32x4_t __s1_822 = __p1_822; \ |
| 61743 | int16x4_t __rev0_822; __rev0_822 = __builtin_shufflevector(__s0_822, __s0_822, 3, 2, 1, 0); \ |
| 61744 | int32x4_t __rev1_822; __rev1_822 = __builtin_shufflevector(__s1_822, __s1_822, 3, 2, 1, 0); \ |
| 61745 | int16x8_t __ret_822; \ |
| 61746 | __ret_822 = (int16x8_t)(__noswap_vcombine_s16((int16x4_t)(__rev0_822), (int16x4_t)(__noswap_vshrn_n_s32(__rev1_822, __p2_822)))); \ |
| 61747 | __ret_822 = __builtin_shufflevector(__ret_822, __ret_822, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61748 | __ret_822; \ |
| 60393 | 61749 | }) |
| 60394 | 61750 | #endif |
| 60395 | 61751 | |
| 60396 | 61752 | #ifdef __LITTLE_ENDIAN__ |
| 60397 | | #define vshrn_high_n_s64(__p0_731, __p1_731, __p2_731) __extension__ ({ \ |
| 60398 | | int32x2_t __s0_731 = __p0_731; \ |
| 60399 | | int64x2_t __s1_731 = __p1_731; \ |
| 60400 | | int32x4_t __ret_731; \ |
| 60401 | | __ret_731 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_731), (int32x2_t)(vshrn_n_s64(__s1_731, __p2_731)))); \ |
| 60402 | | __ret_731; \ |
| 61753 | #define vshrn_high_n_s64(__p0_823, __p1_823, __p2_823) __extension__ ({ \ |
| 61754 | int32x2_t __s0_823 = __p0_823; \ |
| 61755 | int64x2_t __s1_823 = __p1_823; \ |
| 61756 | int32x4_t __ret_823; \ |
| 61757 | __ret_823 = (int32x4_t)(vcombine_s32((int32x2_t)(__s0_823), (int32x2_t)(vshrn_n_s64(__s1_823, __p2_823)))); \ |
| 61758 | __ret_823; \ |
| 60403 | 61759 | }) |
| 60404 | 61760 | #else |
| 60405 | | #define vshrn_high_n_s64(__p0_732, __p1_732, __p2_732) __extension__ ({ \ |
| 60406 | | int32x2_t __s0_732 = __p0_732; \ |
| 60407 | | int64x2_t __s1_732 = __p1_732; \ |
| 60408 | | int32x2_t __rev0_732; __rev0_732 = __builtin_shufflevector(__s0_732, __s0_732, 1, 0); \ |
| 60409 | | int64x2_t __rev1_732; __rev1_732 = __builtin_shufflevector(__s1_732, __s1_732, 1, 0); \ |
| 60410 | | int32x4_t __ret_732; \ |
| 60411 | | __ret_732 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_732), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_732, __p2_732)))); \ |
| 60412 | | __ret_732 = __builtin_shufflevector(__ret_732, __ret_732, 3, 2, 1, 0); \ |
| 60413 | | __ret_732; \ |
| 61761 | #define vshrn_high_n_s64(__p0_824, __p1_824, __p2_824) __extension__ ({ \ |
| 61762 | int32x2_t __s0_824 = __p0_824; \ |
| 61763 | int64x2_t __s1_824 = __p1_824; \ |
| 61764 | int32x2_t __rev0_824; __rev0_824 = __builtin_shufflevector(__s0_824, __s0_824, 1, 0); \ |
| 61765 | int64x2_t __rev1_824; __rev1_824 = __builtin_shufflevector(__s1_824, __s1_824, 1, 0); \ |
| 61766 | int32x4_t __ret_824; \ |
| 61767 | __ret_824 = (int32x4_t)(__noswap_vcombine_s32((int32x2_t)(__rev0_824), (int32x2_t)(__noswap_vshrn_n_s64(__rev1_824, __p2_824)))); \ |
| 61768 | __ret_824 = __builtin_shufflevector(__ret_824, __ret_824, 3, 2, 1, 0); \ |
| 61769 | __ret_824; \ |
| 60414 | 61770 | }) |
| 60415 | 61771 | #endif |
| 60416 | 61772 | |
| 60417 | 61773 | #ifdef __LITTLE_ENDIAN__ |
| 60418 | | #define vshrn_high_n_s16(__p0_733, __p1_733, __p2_733) __extension__ ({ \ |
| 60419 | | int8x8_t __s0_733 = __p0_733; \ |
| 60420 | | int16x8_t __s1_733 = __p1_733; \ |
| 60421 | | int8x16_t __ret_733; \ |
| 60422 | | __ret_733 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_733), (int8x8_t)(vshrn_n_s16(__s1_733, __p2_733)))); \ |
| 60423 | | __ret_733; \ |
| 61774 | #define vshrn_high_n_s16(__p0_825, __p1_825, __p2_825) __extension__ ({ \ |
| 61775 | int8x8_t __s0_825 = __p0_825; \ |
| 61776 | int16x8_t __s1_825 = __p1_825; \ |
| 61777 | int8x16_t __ret_825; \ |
| 61778 | __ret_825 = (int8x16_t)(vcombine_s8((int8x8_t)(__s0_825), (int8x8_t)(vshrn_n_s16(__s1_825, __p2_825)))); \ |
| 61779 | __ret_825; \ |
| 60424 | 61780 | }) |
| 60425 | 61781 | #else |
| 60426 | | #define vshrn_high_n_s16(__p0_734, __p1_734, __p2_734) __extension__ ({ \ |
| 60427 | | int8x8_t __s0_734 = __p0_734; \ |
| 60428 | | int16x8_t __s1_734 = __p1_734; \ |
| 60429 | | int8x8_t __rev0_734; __rev0_734 = __builtin_shufflevector(__s0_734, __s0_734, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60430 | | int16x8_t __rev1_734; __rev1_734 = __builtin_shufflevector(__s1_734, __s1_734, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60431 | | int8x16_t __ret_734; \ |
| 60432 | | __ret_734 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_734), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_734, __p2_734)))); \ |
| 60433 | | __ret_734 = __builtin_shufflevector(__ret_734, __ret_734, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 60434 | | __ret_734; \ |
| 61782 | #define vshrn_high_n_s16(__p0_826, __p1_826, __p2_826) __extension__ ({ \ |
| 61783 | int8x8_t __s0_826 = __p0_826; \ |
| 61784 | int16x8_t __s1_826 = __p1_826; \ |
| 61785 | int8x8_t __rev0_826; __rev0_826 = __builtin_shufflevector(__s0_826, __s0_826, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61786 | int16x8_t __rev1_826; __rev1_826 = __builtin_shufflevector(__s1_826, __s1_826, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61787 | int8x16_t __ret_826; \ |
| 61788 | __ret_826 = (int8x16_t)(__noswap_vcombine_s8((int8x8_t)(__rev0_826), (int8x8_t)(__noswap_vshrn_n_s16(__rev1_826, __p2_826)))); \ |
| 61789 | __ret_826 = __builtin_shufflevector(__ret_826, __ret_826, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61790 | __ret_826; \ |
| 60435 | 61791 | }) |
| 60436 | 61792 | #endif |
| 60437 | 61793 | |
| ... | ... | @@ -61867,54 +63223,54 @@ __ai int32x4_t vsubw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 61867 | 63223 | #endif |
| 61868 | 63224 | |
| 61869 | 63225 | #ifdef __LITTLE_ENDIAN__ |
| 61870 | | #define vsudotq_laneq_s32(__p0_735, __p1_735, __p2_735, __p3_735) __extension__ ({ \ |
| 61871 | | int32x4_t __s0_735 = __p0_735; \ |
| 61872 | | int8x16_t __s1_735 = __p1_735; \ |
| 61873 | | uint8x16_t __s2_735 = __p2_735; \ |
| 61874 | | int32x4_t __ret_735; \ |
| 61875 | | uint8x16_t __reint_735 = __s2_735; \ |
| 61876 | | __ret_735 = vusdotq_s32(__s0_735, (uint8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_735, __p3_735)), __s1_735); \ |
| 61877 | | __ret_735; \ |
| 63226 | #define vsudotq_laneq_s32(__p0_827, __p1_827, __p2_827, __p3_827) __extension__ ({ \ |
| 63227 | int32x4_t __s0_827 = __p0_827; \ |
| 63228 | int8x16_t __s1_827 = __p1_827; \ |
| 63229 | uint8x16_t __s2_827 = __p2_827; \ |
| 63230 | int32x4_t __ret_827; \ |
| 63231 | uint8x16_t __reint_827 = __s2_827; \ |
| 63232 | __ret_827 = vusdotq_s32(__s0_827, (uint8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_827, __p3_827)), __s1_827); \ |
| 63233 | __ret_827; \ |
| 61878 | 63234 | }) |
| 61879 | 63235 | #else |
| 61880 | | #define vsudotq_laneq_s32(__p0_736, __p1_736, __p2_736, __p3_736) __extension__ ({ \ |
| 61881 | | int32x4_t __s0_736 = __p0_736; \ |
| 61882 | | int8x16_t __s1_736 = __p1_736; \ |
| 61883 | | uint8x16_t __s2_736 = __p2_736; \ |
| 61884 | | int32x4_t __rev0_736; __rev0_736 = __builtin_shufflevector(__s0_736, __s0_736, 3, 2, 1, 0); \ |
| 61885 | | int8x16_t __rev1_736; __rev1_736 = __builtin_shufflevector(__s1_736, __s1_736, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61886 | | uint8x16_t __rev2_736; __rev2_736 = __builtin_shufflevector(__s2_736, __s2_736, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61887 | | int32x4_t __ret_736; \ |
| 61888 | | uint8x16_t __reint_736 = __rev2_736; \ |
| 61889 | | __ret_736 = __noswap_vusdotq_s32(__rev0_736, (uint8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_736, __p3_736)), __rev1_736); \ |
| 61890 | | __ret_736 = __builtin_shufflevector(__ret_736, __ret_736, 3, 2, 1, 0); \ |
| 61891 | | __ret_736; \ |
| 63236 | #define vsudotq_laneq_s32(__p0_828, __p1_828, __p2_828, __p3_828) __extension__ ({ \ |
| 63237 | int32x4_t __s0_828 = __p0_828; \ |
| 63238 | int8x16_t __s1_828 = __p1_828; \ |
| 63239 | uint8x16_t __s2_828 = __p2_828; \ |
| 63240 | int32x4_t __rev0_828; __rev0_828 = __builtin_shufflevector(__s0_828, __s0_828, 3, 2, 1, 0); \ |
| 63241 | int8x16_t __rev1_828; __rev1_828 = __builtin_shufflevector(__s1_828, __s1_828, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63242 | uint8x16_t __rev2_828; __rev2_828 = __builtin_shufflevector(__s2_828, __s2_828, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63243 | int32x4_t __ret_828; \ |
| 63244 | uint8x16_t __reint_828 = __rev2_828; \ |
| 63245 | __ret_828 = __noswap_vusdotq_s32(__rev0_828, (uint8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_828, __p3_828)), __rev1_828); \ |
| 63246 | __ret_828 = __builtin_shufflevector(__ret_828, __ret_828, 3, 2, 1, 0); \ |
| 63247 | __ret_828; \ |
| 61892 | 63248 | }) |
| 61893 | 63249 | #endif |
| 61894 | 63250 | |
| 61895 | 63251 | #ifdef __LITTLE_ENDIAN__ |
| 61896 | | #define vsudot_laneq_s32(__p0_737, __p1_737, __p2_737, __p3_737) __extension__ ({ \ |
| 61897 | | int32x2_t __s0_737 = __p0_737; \ |
| 61898 | | int8x8_t __s1_737 = __p1_737; \ |
| 61899 | | uint8x16_t __s2_737 = __p2_737; \ |
| 61900 | | int32x2_t __ret_737; \ |
| 61901 | | uint8x16_t __reint_737 = __s2_737; \ |
| 61902 | | __ret_737 = vusdot_s32(__s0_737, (uint8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_737, __p3_737)), __s1_737); \ |
| 61903 | | __ret_737; \ |
| 63252 | #define vsudot_laneq_s32(__p0_829, __p1_829, __p2_829, __p3_829) __extension__ ({ \ |
| 63253 | int32x2_t __s0_829 = __p0_829; \ |
| 63254 | int8x8_t __s1_829 = __p1_829; \ |
| 63255 | uint8x16_t __s2_829 = __p2_829; \ |
| 63256 | int32x2_t __ret_829; \ |
| 63257 | uint8x16_t __reint_829 = __s2_829; \ |
| 63258 | __ret_829 = vusdot_s32(__s0_829, (uint8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_829, __p3_829)), __s1_829); \ |
| 63259 | __ret_829; \ |
| 61904 | 63260 | }) |
| 61905 | 63261 | #else |
| 61906 | | #define vsudot_laneq_s32(__p0_738, __p1_738, __p2_738, __p3_738) __extension__ ({ \ |
| 61907 | | int32x2_t __s0_738 = __p0_738; \ |
| 61908 | | int8x8_t __s1_738 = __p1_738; \ |
| 61909 | | uint8x16_t __s2_738 = __p2_738; \ |
| 61910 | | int32x2_t __rev0_738; __rev0_738 = __builtin_shufflevector(__s0_738, __s0_738, 1, 0); \ |
| 61911 | | int8x8_t __rev1_738; __rev1_738 = __builtin_shufflevector(__s1_738, __s1_738, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61912 | | uint8x16_t __rev2_738; __rev2_738 = __builtin_shufflevector(__s2_738, __s2_738, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 61913 | | int32x2_t __ret_738; \ |
| 61914 | | uint8x16_t __reint_738 = __rev2_738; \ |
| 61915 | | __ret_738 = __noswap_vusdot_s32(__rev0_738, (uint8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_738, __p3_738)), __rev1_738); \ |
| 61916 | | __ret_738 = __builtin_shufflevector(__ret_738, __ret_738, 1, 0); \ |
| 61917 | | __ret_738; \ |
| 63262 | #define vsudot_laneq_s32(__p0_830, __p1_830, __p2_830, __p3_830) __extension__ ({ \ |
| 63263 | int32x2_t __s0_830 = __p0_830; \ |
| 63264 | int8x8_t __s1_830 = __p1_830; \ |
| 63265 | uint8x16_t __s2_830 = __p2_830; \ |
| 63266 | int32x2_t __rev0_830; __rev0_830 = __builtin_shufflevector(__s0_830, __s0_830, 1, 0); \ |
| 63267 | int8x8_t __rev1_830; __rev1_830 = __builtin_shufflevector(__s1_830, __s1_830, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63268 | uint8x16_t __rev2_830; __rev2_830 = __builtin_shufflevector(__s2_830, __s2_830, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 63269 | int32x2_t __ret_830; \ |
| 63270 | uint8x16_t __reint_830 = __rev2_830; \ |
| 63271 | __ret_830 = __noswap_vusdot_s32(__rev0_830, (uint8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_830, __p3_830)), __rev1_830); \ |
| 63272 | __ret_830 = __builtin_shufflevector(__ret_830, __ret_830, 1, 0); \ |
| 63273 | __ret_830; \ |
| 61918 | 63274 | }) |
| 61919 | 63275 | #endif |
| 61920 | 63276 | |
| ... | ... | @@ -62887,54 +64243,54 @@ __ai int16x4_t vuqadd_s16(int16x4_t __p0, uint16x4_t __p1) { |
| 62887 | 64243 | #endif |
| 62888 | 64244 | |
| 62889 | 64245 | #ifdef __LITTLE_ENDIAN__ |
| 62890 | | #define vusdotq_laneq_s32(__p0_739, __p1_739, __p2_739, __p3_739) __extension__ ({ \ |
| 62891 | | int32x4_t __s0_739 = __p0_739; \ |
| 62892 | | uint8x16_t __s1_739 = __p1_739; \ |
| 62893 | | int8x16_t __s2_739 = __p2_739; \ |
| 62894 | | int32x4_t __ret_739; \ |
| 62895 | | int8x16_t __reint_739 = __s2_739; \ |
| 62896 | | __ret_739 = vusdotq_s32(__s0_739, __s1_739, (int8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_739, __p3_739))); \ |
| 62897 | | __ret_739; \ |
| 64246 | #define vusdotq_laneq_s32(__p0_831, __p1_831, __p2_831, __p3_831) __extension__ ({ \ |
| 64247 | int32x4_t __s0_831 = __p0_831; \ |
| 64248 | uint8x16_t __s1_831 = __p1_831; \ |
| 64249 | int8x16_t __s2_831 = __p2_831; \ |
| 64250 | int32x4_t __ret_831; \ |
| 64251 | int8x16_t __reint_831 = __s2_831; \ |
| 64252 | __ret_831 = vusdotq_s32(__s0_831, __s1_831, (int8x16_t)(splatq_laneq_s32(*(int32x4_t *) &__reint_831, __p3_831))); \ |
| 64253 | __ret_831; \ |
| 62898 | 64254 | }) |
| 62899 | 64255 | #else |
| 62900 | | #define vusdotq_laneq_s32(__p0_740, __p1_740, __p2_740, __p3_740) __extension__ ({ \ |
| 62901 | | int32x4_t __s0_740 = __p0_740; \ |
| 62902 | | uint8x16_t __s1_740 = __p1_740; \ |
| 62903 | | int8x16_t __s2_740 = __p2_740; \ |
| 62904 | | int32x4_t __rev0_740; __rev0_740 = __builtin_shufflevector(__s0_740, __s0_740, 3, 2, 1, 0); \ |
| 62905 | | uint8x16_t __rev1_740; __rev1_740 = __builtin_shufflevector(__s1_740, __s1_740, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62906 | | int8x16_t __rev2_740; __rev2_740 = __builtin_shufflevector(__s2_740, __s2_740, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62907 | | int32x4_t __ret_740; \ |
| 62908 | | int8x16_t __reint_740 = __rev2_740; \ |
| 62909 | | __ret_740 = __noswap_vusdotq_s32(__rev0_740, __rev1_740, (int8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_740, __p3_740))); \ |
| 62910 | | __ret_740 = __builtin_shufflevector(__ret_740, __ret_740, 3, 2, 1, 0); \ |
| 62911 | | __ret_740; \ |
| 64256 | #define vusdotq_laneq_s32(__p0_832, __p1_832, __p2_832, __p3_832) __extension__ ({ \ |
| 64257 | int32x4_t __s0_832 = __p0_832; \ |
| 64258 | uint8x16_t __s1_832 = __p1_832; \ |
| 64259 | int8x16_t __s2_832 = __p2_832; \ |
| 64260 | int32x4_t __rev0_832; __rev0_832 = __builtin_shufflevector(__s0_832, __s0_832, 3, 2, 1, 0); \ |
| 64261 | uint8x16_t __rev1_832; __rev1_832 = __builtin_shufflevector(__s1_832, __s1_832, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64262 | int8x16_t __rev2_832; __rev2_832 = __builtin_shufflevector(__s2_832, __s2_832, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64263 | int32x4_t __ret_832; \ |
| 64264 | int8x16_t __reint_832 = __rev2_832; \ |
| 64265 | __ret_832 = __noswap_vusdotq_s32(__rev0_832, __rev1_832, (int8x16_t)(__noswap_splatq_laneq_s32(*(int32x4_t *) &__reint_832, __p3_832))); \ |
| 64266 | __ret_832 = __builtin_shufflevector(__ret_832, __ret_832, 3, 2, 1, 0); \ |
| 64267 | __ret_832; \ |
| 62912 | 64268 | }) |
| 62913 | 64269 | #endif |
| 62914 | 64270 | |
| 62915 | 64271 | #ifdef __LITTLE_ENDIAN__ |
| 62916 | | #define vusdot_laneq_s32(__p0_741, __p1_741, __p2_741, __p3_741) __extension__ ({ \ |
| 62917 | | int32x2_t __s0_741 = __p0_741; \ |
| 62918 | | uint8x8_t __s1_741 = __p1_741; \ |
| 62919 | | int8x16_t __s2_741 = __p2_741; \ |
| 62920 | | int32x2_t __ret_741; \ |
| 62921 | | int8x16_t __reint_741 = __s2_741; \ |
| 62922 | | __ret_741 = vusdot_s32(__s0_741, __s1_741, (int8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_741, __p3_741))); \ |
| 62923 | | __ret_741; \ |
| 64272 | #define vusdot_laneq_s32(__p0_833, __p1_833, __p2_833, __p3_833) __extension__ ({ \ |
| 64273 | int32x2_t __s0_833 = __p0_833; \ |
| 64274 | uint8x8_t __s1_833 = __p1_833; \ |
| 64275 | int8x16_t __s2_833 = __p2_833; \ |
| 64276 | int32x2_t __ret_833; \ |
| 64277 | int8x16_t __reint_833 = __s2_833; \ |
| 64278 | __ret_833 = vusdot_s32(__s0_833, __s1_833, (int8x8_t)(splat_laneq_s32(*(int32x4_t *) &__reint_833, __p3_833))); \ |
| 64279 | __ret_833; \ |
| 62924 | 64280 | }) |
| 62925 | 64281 | #else |
| 62926 | | #define vusdot_laneq_s32(__p0_742, __p1_742, __p2_742, __p3_742) __extension__ ({ \ |
| 62927 | | int32x2_t __s0_742 = __p0_742; \ |
| 62928 | | uint8x8_t __s1_742 = __p1_742; \ |
| 62929 | | int8x16_t __s2_742 = __p2_742; \ |
| 62930 | | int32x2_t __rev0_742; __rev0_742 = __builtin_shufflevector(__s0_742, __s0_742, 1, 0); \ |
| 62931 | | uint8x8_t __rev1_742; __rev1_742 = __builtin_shufflevector(__s1_742, __s1_742, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62932 | | int8x16_t __rev2_742; __rev2_742 = __builtin_shufflevector(__s2_742, __s2_742, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 62933 | | int32x2_t __ret_742; \ |
| 62934 | | int8x16_t __reint_742 = __rev2_742; \ |
| 62935 | | __ret_742 = __noswap_vusdot_s32(__rev0_742, __rev1_742, (int8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_742, __p3_742))); \ |
| 62936 | | __ret_742 = __builtin_shufflevector(__ret_742, __ret_742, 1, 0); \ |
| 62937 | | __ret_742; \ |
| 64282 | #define vusdot_laneq_s32(__p0_834, __p1_834, __p2_834, __p3_834) __extension__ ({ \ |
| 64283 | int32x2_t __s0_834 = __p0_834; \ |
| 64284 | uint8x8_t __s1_834 = __p1_834; \ |
| 64285 | int8x16_t __s2_834 = __p2_834; \ |
| 64286 | int32x2_t __rev0_834; __rev0_834 = __builtin_shufflevector(__s0_834, __s0_834, 1, 0); \ |
| 64287 | uint8x8_t __rev1_834; __rev1_834 = __builtin_shufflevector(__s1_834, __s1_834, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64288 | int8x16_t __rev2_834; __rev2_834 = __builtin_shufflevector(__s2_834, __s2_834, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 64289 | int32x2_t __ret_834; \ |
| 64290 | int8x16_t __reint_834 = __rev2_834; \ |
| 64291 | __ret_834 = __noswap_vusdot_s32(__rev0_834, __rev1_834, (int8x8_t)(__noswap_splat_laneq_s32(*(int32x4_t *) &__reint_834, __p3_834))); \ |
| 64292 | __ret_834 = __builtin_shufflevector(__ret_834, __ret_834, 1, 0); \ |
| 64293 | __ret_834; \ |
| 62938 | 64294 | }) |
| 62939 | 64295 | #endif |
| 62940 | 64296 | |
| ... | ... | @@ -64988,60 +66344,60 @@ __ai int32x4_t vaddw_s16(int32x4_t __p0, int16x4_t __p1) { |
| 64988 | 66344 | #endif |
| 64989 | 66345 | |
| 64990 | 66346 | #ifdef __LITTLE_ENDIAN__ |
| 64991 | | #define vget_lane_f16(__p0_743, __p1_743) __extension__ ({ \ |
| 64992 | | float16x4_t __s0_743 = __p0_743; \ |
| 64993 | | float16_t __ret_743; \ |
| 64994 | | float16x4_t __reint_743 = __s0_743; \ |
| 64995 | | int16_t __reint1_743 = vget_lane_s16(*(int16x4_t *) &__reint_743, __p1_743); \ |
| 64996 | | __ret_743 = *(float16_t *) &__reint1_743; \ |
| 64997 | | __ret_743; \ |
| 66347 | #define vget_lane_f16(__p0_835, __p1_835) __extension__ ({ \ |
| 66348 | float16x4_t __s0_835 = __p0_835; \ |
| 66349 | float16_t __ret_835; \ |
| 66350 | float16x4_t __reint_835 = __s0_835; \ |
| 66351 | int16_t __reint1_835 = vget_lane_s16(*(int16x4_t *) &__reint_835, __p1_835); \ |
| 66352 | __ret_835 = *(float16_t *) &__reint1_835; \ |
| 66353 | __ret_835; \ |
| 64998 | 66354 | }) |
| 64999 | 66355 | #else |
| 65000 | | #define vget_lane_f16(__p0_744, __p1_744) __extension__ ({ \ |
| 65001 | | float16x4_t __s0_744 = __p0_744; \ |
| 65002 | | float16x4_t __rev0_744; __rev0_744 = __builtin_shufflevector(__s0_744, __s0_744, 3, 2, 1, 0); \ |
| 65003 | | float16_t __ret_744; \ |
| 65004 | | float16x4_t __reint_744 = __rev0_744; \ |
| 65005 | | int16_t __reint1_744 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_744, __p1_744); \ |
| 65006 | | __ret_744 = *(float16_t *) &__reint1_744; \ |
| 65007 | | __ret_744; \ |
| 66356 | #define vget_lane_f16(__p0_836, __p1_836) __extension__ ({ \ |
| 66357 | float16x4_t __s0_836 = __p0_836; \ |
| 66358 | float16x4_t __rev0_836; __rev0_836 = __builtin_shufflevector(__s0_836, __s0_836, 3, 2, 1, 0); \ |
| 66359 | float16_t __ret_836; \ |
| 66360 | float16x4_t __reint_836 = __rev0_836; \ |
| 66361 | int16_t __reint1_836 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_836, __p1_836); \ |
| 66362 | __ret_836 = *(float16_t *) &__reint1_836; \ |
| 66363 | __ret_836; \ |
| 65008 | 66364 | }) |
| 65009 | | #define __noswap_vget_lane_f16(__p0_745, __p1_745) __extension__ ({ \ |
| 65010 | | float16x4_t __s0_745 = __p0_745; \ |
| 65011 | | float16_t __ret_745; \ |
| 65012 | | float16x4_t __reint_745 = __s0_745; \ |
| 65013 | | int16_t __reint1_745 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_745, __p1_745); \ |
| 65014 | | __ret_745 = *(float16_t *) &__reint1_745; \ |
| 65015 | | __ret_745; \ |
| 66365 | #define __noswap_vget_lane_f16(__p0_837, __p1_837) __extension__ ({ \ |
| 66366 | float16x4_t __s0_837 = __p0_837; \ |
| 66367 | float16_t __ret_837; \ |
| 66368 | float16x4_t __reint_837 = __s0_837; \ |
| 66369 | int16_t __reint1_837 = __noswap_vget_lane_s16(*(int16x4_t *) &__reint_837, __p1_837); \ |
| 66370 | __ret_837 = *(float16_t *) &__reint1_837; \ |
| 66371 | __ret_837; \ |
| 65016 | 66372 | }) |
| 65017 | 66373 | #endif |
| 65018 | 66374 | |
| 65019 | 66375 | #ifdef __LITTLE_ENDIAN__ |
| 65020 | | #define vgetq_lane_f16(__p0_746, __p1_746) __extension__ ({ \ |
| 65021 | | float16x8_t __s0_746 = __p0_746; \ |
| 65022 | | float16_t __ret_746; \ |
| 65023 | | float16x8_t __reint_746 = __s0_746; \ |
| 65024 | | int16_t __reint1_746 = vgetq_lane_s16(*(int16x8_t *) &__reint_746, __p1_746); \ |
| 65025 | | __ret_746 = *(float16_t *) &__reint1_746; \ |
| 65026 | | __ret_746; \ |
| 66376 | #define vgetq_lane_f16(__p0_838, __p1_838) __extension__ ({ \ |
| 66377 | float16x8_t __s0_838 = __p0_838; \ |
| 66378 | float16_t __ret_838; \ |
| 66379 | float16x8_t __reint_838 = __s0_838; \ |
| 66380 | int16_t __reint1_838 = vgetq_lane_s16(*(int16x8_t *) &__reint_838, __p1_838); \ |
| 66381 | __ret_838 = *(float16_t *) &__reint1_838; \ |
| 66382 | __ret_838; \ |
| 65027 | 66383 | }) |
| 65028 | 66384 | #else |
| 65029 | | #define vgetq_lane_f16(__p0_747, __p1_747) __extension__ ({ \ |
| 65030 | | float16x8_t __s0_747 = __p0_747; \ |
| 65031 | | float16x8_t __rev0_747; __rev0_747 = __builtin_shufflevector(__s0_747, __s0_747, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65032 | | float16_t __ret_747; \ |
| 65033 | | float16x8_t __reint_747 = __rev0_747; \ |
| 65034 | | int16_t __reint1_747 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_747, __p1_747); \ |
| 65035 | | __ret_747 = *(float16_t *) &__reint1_747; \ |
| 65036 | | __ret_747; \ |
| 66385 | #define vgetq_lane_f16(__p0_839, __p1_839) __extension__ ({ \ |
| 66386 | float16x8_t __s0_839 = __p0_839; \ |
| 66387 | float16x8_t __rev0_839; __rev0_839 = __builtin_shufflevector(__s0_839, __s0_839, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66388 | float16_t __ret_839; \ |
| 66389 | float16x8_t __reint_839 = __rev0_839; \ |
| 66390 | int16_t __reint1_839 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_839, __p1_839); \ |
| 66391 | __ret_839 = *(float16_t *) &__reint1_839; \ |
| 66392 | __ret_839; \ |
| 65037 | 66393 | }) |
| 65038 | | #define __noswap_vgetq_lane_f16(__p0_748, __p1_748) __extension__ ({ \ |
| 65039 | | float16x8_t __s0_748 = __p0_748; \ |
| 65040 | | float16_t __ret_748; \ |
| 65041 | | float16x8_t __reint_748 = __s0_748; \ |
| 65042 | | int16_t __reint1_748 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_748, __p1_748); \ |
| 65043 | | __ret_748 = *(float16_t *) &__reint1_748; \ |
| 65044 | | __ret_748; \ |
| 66394 | #define __noswap_vgetq_lane_f16(__p0_840, __p1_840) __extension__ ({ \ |
| 66395 | float16x8_t __s0_840 = __p0_840; \ |
| 66396 | float16_t __ret_840; \ |
| 66397 | float16x8_t __reint_840 = __s0_840; \ |
| 66398 | int16_t __reint1_840 = __noswap_vgetq_lane_s16(*(int16x8_t *) &__reint_840, __p1_840); \ |
| 66399 | __ret_840 = *(float16_t *) &__reint1_840; \ |
| 66400 | __ret_840; \ |
| 65045 | 66401 | }) |
| 65046 | 66402 | #endif |
| 65047 | 66403 | |
| ... | ... | @@ -65184,98 +66540,98 @@ __ai int32x4_t __noswap_vmlal_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 |
| 65184 | 66540 | #endif |
| 65185 | 66541 | |
| 65186 | 66542 | #ifdef __LITTLE_ENDIAN__ |
| 65187 | | #define vmlal_lane_u32(__p0_749, __p1_749, __p2_749, __p3_749) __extension__ ({ \ |
| 65188 | | uint64x2_t __s0_749 = __p0_749; \ |
| 65189 | | uint32x2_t __s1_749 = __p1_749; \ |
| 65190 | | uint32x2_t __s2_749 = __p2_749; \ |
| 65191 | | uint64x2_t __ret_749; \ |
| 65192 | | __ret_749 = __s0_749 + vmull_u32(__s1_749, splat_lane_u32(__s2_749, __p3_749)); \ |
| 65193 | | __ret_749; \ |
| 66543 | #define vmlal_lane_u32(__p0_841, __p1_841, __p2_841, __p3_841) __extension__ ({ \ |
| 66544 | uint64x2_t __s0_841 = __p0_841; \ |
| 66545 | uint32x2_t __s1_841 = __p1_841; \ |
| 66546 | uint32x2_t __s2_841 = __p2_841; \ |
| 66547 | uint64x2_t __ret_841; \ |
| 66548 | __ret_841 = __s0_841 + vmull_u32(__s1_841, splat_lane_u32(__s2_841, __p3_841)); \ |
| 66549 | __ret_841; \ |
| 65194 | 66550 | }) |
| 65195 | 66551 | #else |
| 65196 | | #define vmlal_lane_u32(__p0_750, __p1_750, __p2_750, __p3_750) __extension__ ({ \ |
| 65197 | | uint64x2_t __s0_750 = __p0_750; \ |
| 65198 | | uint32x2_t __s1_750 = __p1_750; \ |
| 65199 | | uint32x2_t __s2_750 = __p2_750; \ |
| 65200 | | uint64x2_t __rev0_750; __rev0_750 = __builtin_shufflevector(__s0_750, __s0_750, 1, 0); \ |
| 65201 | | uint32x2_t __rev1_750; __rev1_750 = __builtin_shufflevector(__s1_750, __s1_750, 1, 0); \ |
| 65202 | | uint32x2_t __rev2_750; __rev2_750 = __builtin_shufflevector(__s2_750, __s2_750, 1, 0); \ |
| 65203 | | uint64x2_t __ret_750; \ |
| 65204 | | __ret_750 = __rev0_750 + __noswap_vmull_u32(__rev1_750, __noswap_splat_lane_u32(__rev2_750, __p3_750)); \ |
| 65205 | | __ret_750 = __builtin_shufflevector(__ret_750, __ret_750, 1, 0); \ |
| 65206 | | __ret_750; \ |
| 66552 | #define vmlal_lane_u32(__p0_842, __p1_842, __p2_842, __p3_842) __extension__ ({ \ |
| 66553 | uint64x2_t __s0_842 = __p0_842; \ |
| 66554 | uint32x2_t __s1_842 = __p1_842; \ |
| 66555 | uint32x2_t __s2_842 = __p2_842; \ |
| 66556 | uint64x2_t __rev0_842; __rev0_842 = __builtin_shufflevector(__s0_842, __s0_842, 1, 0); \ |
| 66557 | uint32x2_t __rev1_842; __rev1_842 = __builtin_shufflevector(__s1_842, __s1_842, 1, 0); \ |
| 66558 | uint32x2_t __rev2_842; __rev2_842 = __builtin_shufflevector(__s2_842, __s2_842, 1, 0); \ |
| 66559 | uint64x2_t __ret_842; \ |
| 66560 | __ret_842 = __rev0_842 + __noswap_vmull_u32(__rev1_842, __noswap_splat_lane_u32(__rev2_842, __p3_842)); \ |
| 66561 | __ret_842 = __builtin_shufflevector(__ret_842, __ret_842, 1, 0); \ |
| 66562 | __ret_842; \ |
| 65207 | 66563 | }) |
| 65208 | 66564 | #endif |
| 65209 | 66565 | |
| 65210 | 66566 | #ifdef __LITTLE_ENDIAN__ |
| 65211 | | #define vmlal_lane_u16(__p0_751, __p1_751, __p2_751, __p3_751) __extension__ ({ \ |
| 65212 | | uint32x4_t __s0_751 = __p0_751; \ |
| 65213 | | uint16x4_t __s1_751 = __p1_751; \ |
| 65214 | | uint16x4_t __s2_751 = __p2_751; \ |
| 65215 | | uint32x4_t __ret_751; \ |
| 65216 | | __ret_751 = __s0_751 + vmull_u16(__s1_751, splat_lane_u16(__s2_751, __p3_751)); \ |
| 65217 | | __ret_751; \ |
| 66567 | #define vmlal_lane_u16(__p0_843, __p1_843, __p2_843, __p3_843) __extension__ ({ \ |
| 66568 | uint32x4_t __s0_843 = __p0_843; \ |
| 66569 | uint16x4_t __s1_843 = __p1_843; \ |
| 66570 | uint16x4_t __s2_843 = __p2_843; \ |
| 66571 | uint32x4_t __ret_843; \ |
| 66572 | __ret_843 = __s0_843 + vmull_u16(__s1_843, splat_lane_u16(__s2_843, __p3_843)); \ |
| 66573 | __ret_843; \ |
| 65218 | 66574 | }) |
| 65219 | 66575 | #else |
| 65220 | | #define vmlal_lane_u16(__p0_752, __p1_752, __p2_752, __p3_752) __extension__ ({ \ |
| 65221 | | uint32x4_t __s0_752 = __p0_752; \ |
| 65222 | | uint16x4_t __s1_752 = __p1_752; \ |
| 65223 | | uint16x4_t __s2_752 = __p2_752; \ |
| 65224 | | uint32x4_t __rev0_752; __rev0_752 = __builtin_shufflevector(__s0_752, __s0_752, 3, 2, 1, 0); \ |
| 65225 | | uint16x4_t __rev1_752; __rev1_752 = __builtin_shufflevector(__s1_752, __s1_752, 3, 2, 1, 0); \ |
| 65226 | | uint16x4_t __rev2_752; __rev2_752 = __builtin_shufflevector(__s2_752, __s2_752, 3, 2, 1, 0); \ |
| 65227 | | uint32x4_t __ret_752; \ |
| 65228 | | __ret_752 = __rev0_752 + __noswap_vmull_u16(__rev1_752, __noswap_splat_lane_u16(__rev2_752, __p3_752)); \ |
| 65229 | | __ret_752 = __builtin_shufflevector(__ret_752, __ret_752, 3, 2, 1, 0); \ |
| 65230 | | __ret_752; \ |
| 66576 | #define vmlal_lane_u16(__p0_844, __p1_844, __p2_844, __p3_844) __extension__ ({ \ |
| 66577 | uint32x4_t __s0_844 = __p0_844; \ |
| 66578 | uint16x4_t __s1_844 = __p1_844; \ |
| 66579 | uint16x4_t __s2_844 = __p2_844; \ |
| 66580 | uint32x4_t __rev0_844; __rev0_844 = __builtin_shufflevector(__s0_844, __s0_844, 3, 2, 1, 0); \ |
| 66581 | uint16x4_t __rev1_844; __rev1_844 = __builtin_shufflevector(__s1_844, __s1_844, 3, 2, 1, 0); \ |
| 66582 | uint16x4_t __rev2_844; __rev2_844 = __builtin_shufflevector(__s2_844, __s2_844, 3, 2, 1, 0); \ |
| 66583 | uint32x4_t __ret_844; \ |
| 66584 | __ret_844 = __rev0_844 + __noswap_vmull_u16(__rev1_844, __noswap_splat_lane_u16(__rev2_844, __p3_844)); \ |
| 66585 | __ret_844 = __builtin_shufflevector(__ret_844, __ret_844, 3, 2, 1, 0); \ |
| 66586 | __ret_844; \ |
| 65231 | 66587 | }) |
| 65232 | 66588 | #endif |
| 65233 | 66589 | |
| 65234 | 66590 | #ifdef __LITTLE_ENDIAN__ |
| 65235 | | #define vmlal_lane_s32(__p0_753, __p1_753, __p2_753, __p3_753) __extension__ ({ \ |
| 65236 | | int64x2_t __s0_753 = __p0_753; \ |
| 65237 | | int32x2_t __s1_753 = __p1_753; \ |
| 65238 | | int32x2_t __s2_753 = __p2_753; \ |
| 65239 | | int64x2_t __ret_753; \ |
| 65240 | | __ret_753 = __s0_753 + vmull_s32(__s1_753, splat_lane_s32(__s2_753, __p3_753)); \ |
| 65241 | | __ret_753; \ |
| 66591 | #define vmlal_lane_s32(__p0_845, __p1_845, __p2_845, __p3_845) __extension__ ({ \ |
| 66592 | int64x2_t __s0_845 = __p0_845; \ |
| 66593 | int32x2_t __s1_845 = __p1_845; \ |
| 66594 | int32x2_t __s2_845 = __p2_845; \ |
| 66595 | int64x2_t __ret_845; \ |
| 66596 | __ret_845 = __s0_845 + vmull_s32(__s1_845, splat_lane_s32(__s2_845, __p3_845)); \ |
| 66597 | __ret_845; \ |
| 65242 | 66598 | }) |
| 65243 | 66599 | #else |
| 65244 | | #define vmlal_lane_s32(__p0_754, __p1_754, __p2_754, __p3_754) __extension__ ({ \ |
| 65245 | | int64x2_t __s0_754 = __p0_754; \ |
| 65246 | | int32x2_t __s1_754 = __p1_754; \ |
| 65247 | | int32x2_t __s2_754 = __p2_754; \ |
| 65248 | | int64x2_t __rev0_754; __rev0_754 = __builtin_shufflevector(__s0_754, __s0_754, 1, 0); \ |
| 65249 | | int32x2_t __rev1_754; __rev1_754 = __builtin_shufflevector(__s1_754, __s1_754, 1, 0); \ |
| 65250 | | int32x2_t __rev2_754; __rev2_754 = __builtin_shufflevector(__s2_754, __s2_754, 1, 0); \ |
| 65251 | | int64x2_t __ret_754; \ |
| 65252 | | __ret_754 = __rev0_754 + __noswap_vmull_s32(__rev1_754, __noswap_splat_lane_s32(__rev2_754, __p3_754)); \ |
| 65253 | | __ret_754 = __builtin_shufflevector(__ret_754, __ret_754, 1, 0); \ |
| 65254 | | __ret_754; \ |
| 66600 | #define vmlal_lane_s32(__p0_846, __p1_846, __p2_846, __p3_846) __extension__ ({ \ |
| 66601 | int64x2_t __s0_846 = __p0_846; \ |
| 66602 | int32x2_t __s1_846 = __p1_846; \ |
| 66603 | int32x2_t __s2_846 = __p2_846; \ |
| 66604 | int64x2_t __rev0_846; __rev0_846 = __builtin_shufflevector(__s0_846, __s0_846, 1, 0); \ |
| 66605 | int32x2_t __rev1_846; __rev1_846 = __builtin_shufflevector(__s1_846, __s1_846, 1, 0); \ |
| 66606 | int32x2_t __rev2_846; __rev2_846 = __builtin_shufflevector(__s2_846, __s2_846, 1, 0); \ |
| 66607 | int64x2_t __ret_846; \ |
| 66608 | __ret_846 = __rev0_846 + __noswap_vmull_s32(__rev1_846, __noswap_splat_lane_s32(__rev2_846, __p3_846)); \ |
| 66609 | __ret_846 = __builtin_shufflevector(__ret_846, __ret_846, 1, 0); \ |
| 66610 | __ret_846; \ |
| 65255 | 66611 | }) |
| 65256 | 66612 | #endif |
| 65257 | 66613 | |
| 65258 | 66614 | #ifdef __LITTLE_ENDIAN__ |
| 65259 | | #define vmlal_lane_s16(__p0_755, __p1_755, __p2_755, __p3_755) __extension__ ({ \ |
| 65260 | | int32x4_t __s0_755 = __p0_755; \ |
| 65261 | | int16x4_t __s1_755 = __p1_755; \ |
| 65262 | | int16x4_t __s2_755 = __p2_755; \ |
| 65263 | | int32x4_t __ret_755; \ |
| 65264 | | __ret_755 = __s0_755 + vmull_s16(__s1_755, splat_lane_s16(__s2_755, __p3_755)); \ |
| 65265 | | __ret_755; \ |
| 66615 | #define vmlal_lane_s16(__p0_847, __p1_847, __p2_847, __p3_847) __extension__ ({ \ |
| 66616 | int32x4_t __s0_847 = __p0_847; \ |
| 66617 | int16x4_t __s1_847 = __p1_847; \ |
| 66618 | int16x4_t __s2_847 = __p2_847; \ |
| 66619 | int32x4_t __ret_847; \ |
| 66620 | __ret_847 = __s0_847 + vmull_s16(__s1_847, splat_lane_s16(__s2_847, __p3_847)); \ |
| 66621 | __ret_847; \ |
| 65266 | 66622 | }) |
| 65267 | 66623 | #else |
| 65268 | | #define vmlal_lane_s16(__p0_756, __p1_756, __p2_756, __p3_756) __extension__ ({ \ |
| 65269 | | int32x4_t __s0_756 = __p0_756; \ |
| 65270 | | int16x4_t __s1_756 = __p1_756; \ |
| 65271 | | int16x4_t __s2_756 = __p2_756; \ |
| 65272 | | int32x4_t __rev0_756; __rev0_756 = __builtin_shufflevector(__s0_756, __s0_756, 3, 2, 1, 0); \ |
| 65273 | | int16x4_t __rev1_756; __rev1_756 = __builtin_shufflevector(__s1_756, __s1_756, 3, 2, 1, 0); \ |
| 65274 | | int16x4_t __rev2_756; __rev2_756 = __builtin_shufflevector(__s2_756, __s2_756, 3, 2, 1, 0); \ |
| 65275 | | int32x4_t __ret_756; \ |
| 65276 | | __ret_756 = __rev0_756 + __noswap_vmull_s16(__rev1_756, __noswap_splat_lane_s16(__rev2_756, __p3_756)); \ |
| 65277 | | __ret_756 = __builtin_shufflevector(__ret_756, __ret_756, 3, 2, 1, 0); \ |
| 65278 | | __ret_756; \ |
| 66624 | #define vmlal_lane_s16(__p0_848, __p1_848, __p2_848, __p3_848) __extension__ ({ \ |
| 66625 | int32x4_t __s0_848 = __p0_848; \ |
| 66626 | int16x4_t __s1_848 = __p1_848; \ |
| 66627 | int16x4_t __s2_848 = __p2_848; \ |
| 66628 | int32x4_t __rev0_848; __rev0_848 = __builtin_shufflevector(__s0_848, __s0_848, 3, 2, 1, 0); \ |
| 66629 | int16x4_t __rev1_848; __rev1_848 = __builtin_shufflevector(__s1_848, __s1_848, 3, 2, 1, 0); \ |
| 66630 | int16x4_t __rev2_848; __rev2_848 = __builtin_shufflevector(__s2_848, __s2_848, 3, 2, 1, 0); \ |
| 66631 | int32x4_t __ret_848; \ |
| 66632 | __ret_848 = __rev0_848 + __noswap_vmull_s16(__rev1_848, __noswap_splat_lane_s16(__rev2_848, __p3_848)); \ |
| 66633 | __ret_848 = __builtin_shufflevector(__ret_848, __ret_848, 3, 2, 1, 0); \ |
| 66634 | __ret_848; \ |
| 65279 | 66635 | }) |
| 65280 | 66636 | #endif |
| 65281 | 66637 | |
| ... | ... | @@ -65506,98 +66862,98 @@ __ai int32x4_t __noswap_vmlsl_s16(int32x4_t __p0, int16x4_t __p1, int16x4_t __p2 |
| 65506 | 66862 | #endif |
| 65507 | 66863 | |
| 65508 | 66864 | #ifdef __LITTLE_ENDIAN__ |
| 65509 | | #define vmlsl_lane_u32(__p0_757, __p1_757, __p2_757, __p3_757) __extension__ ({ \ |
| 65510 | | uint64x2_t __s0_757 = __p0_757; \ |
| 65511 | | uint32x2_t __s1_757 = __p1_757; \ |
| 65512 | | uint32x2_t __s2_757 = __p2_757; \ |
| 65513 | | uint64x2_t __ret_757; \ |
| 65514 | | __ret_757 = __s0_757 - vmull_u32(__s1_757, splat_lane_u32(__s2_757, __p3_757)); \ |
| 65515 | | __ret_757; \ |
| 66865 | #define vmlsl_lane_u32(__p0_849, __p1_849, __p2_849, __p3_849) __extension__ ({ \ |
| 66866 | uint64x2_t __s0_849 = __p0_849; \ |
| 66867 | uint32x2_t __s1_849 = __p1_849; \ |
| 66868 | uint32x2_t __s2_849 = __p2_849; \ |
| 66869 | uint64x2_t __ret_849; \ |
| 66870 | __ret_849 = __s0_849 - vmull_u32(__s1_849, splat_lane_u32(__s2_849, __p3_849)); \ |
| 66871 | __ret_849; \ |
| 65516 | 66872 | }) |
| 65517 | 66873 | #else |
| 65518 | | #define vmlsl_lane_u32(__p0_758, __p1_758, __p2_758, __p3_758) __extension__ ({ \ |
| 65519 | | uint64x2_t __s0_758 = __p0_758; \ |
| 65520 | | uint32x2_t __s1_758 = __p1_758; \ |
| 65521 | | uint32x2_t __s2_758 = __p2_758; \ |
| 65522 | | uint64x2_t __rev0_758; __rev0_758 = __builtin_shufflevector(__s0_758, __s0_758, 1, 0); \ |
| 65523 | | uint32x2_t __rev1_758; __rev1_758 = __builtin_shufflevector(__s1_758, __s1_758, 1, 0); \ |
| 65524 | | uint32x2_t __rev2_758; __rev2_758 = __builtin_shufflevector(__s2_758, __s2_758, 1, 0); \ |
| 65525 | | uint64x2_t __ret_758; \ |
| 65526 | | __ret_758 = __rev0_758 - __noswap_vmull_u32(__rev1_758, __noswap_splat_lane_u32(__rev2_758, __p3_758)); \ |
| 65527 | | __ret_758 = __builtin_shufflevector(__ret_758, __ret_758, 1, 0); \ |
| 65528 | | __ret_758; \ |
| 66874 | #define vmlsl_lane_u32(__p0_850, __p1_850, __p2_850, __p3_850) __extension__ ({ \ |
| 66875 | uint64x2_t __s0_850 = __p0_850; \ |
| 66876 | uint32x2_t __s1_850 = __p1_850; \ |
| 66877 | uint32x2_t __s2_850 = __p2_850; \ |
| 66878 | uint64x2_t __rev0_850; __rev0_850 = __builtin_shufflevector(__s0_850, __s0_850, 1, 0); \ |
| 66879 | uint32x2_t __rev1_850; __rev1_850 = __builtin_shufflevector(__s1_850, __s1_850, 1, 0); \ |
| 66880 | uint32x2_t __rev2_850; __rev2_850 = __builtin_shufflevector(__s2_850, __s2_850, 1, 0); \ |
| 66881 | uint64x2_t __ret_850; \ |
| 66882 | __ret_850 = __rev0_850 - __noswap_vmull_u32(__rev1_850, __noswap_splat_lane_u32(__rev2_850, __p3_850)); \ |
| 66883 | __ret_850 = __builtin_shufflevector(__ret_850, __ret_850, 1, 0); \ |
| 66884 | __ret_850; \ |
| 65529 | 66885 | }) |
| 65530 | 66886 | #endif |
| 65531 | 66887 | |
| 65532 | 66888 | #ifdef __LITTLE_ENDIAN__ |
| 65533 | | #define vmlsl_lane_u16(__p0_759, __p1_759, __p2_759, __p3_759) __extension__ ({ \ |
| 65534 | | uint32x4_t __s0_759 = __p0_759; \ |
| 65535 | | uint16x4_t __s1_759 = __p1_759; \ |
| 65536 | | uint16x4_t __s2_759 = __p2_759; \ |
| 65537 | | uint32x4_t __ret_759; \ |
| 65538 | | __ret_759 = __s0_759 - vmull_u16(__s1_759, splat_lane_u16(__s2_759, __p3_759)); \ |
| 65539 | | __ret_759; \ |
| 66889 | #define vmlsl_lane_u16(__p0_851, __p1_851, __p2_851, __p3_851) __extension__ ({ \ |
| 66890 | uint32x4_t __s0_851 = __p0_851; \ |
| 66891 | uint16x4_t __s1_851 = __p1_851; \ |
| 66892 | uint16x4_t __s2_851 = __p2_851; \ |
| 66893 | uint32x4_t __ret_851; \ |
| 66894 | __ret_851 = __s0_851 - vmull_u16(__s1_851, splat_lane_u16(__s2_851, __p3_851)); \ |
| 66895 | __ret_851; \ |
| 65540 | 66896 | }) |
| 65541 | 66897 | #else |
| 65542 | | #define vmlsl_lane_u16(__p0_760, __p1_760, __p2_760, __p3_760) __extension__ ({ \ |
| 65543 | | uint32x4_t __s0_760 = __p0_760; \ |
| 65544 | | uint16x4_t __s1_760 = __p1_760; \ |
| 65545 | | uint16x4_t __s2_760 = __p2_760; \ |
| 65546 | | uint32x4_t __rev0_760; __rev0_760 = __builtin_shufflevector(__s0_760, __s0_760, 3, 2, 1, 0); \ |
| 65547 | | uint16x4_t __rev1_760; __rev1_760 = __builtin_shufflevector(__s1_760, __s1_760, 3, 2, 1, 0); \ |
| 65548 | | uint16x4_t __rev2_760; __rev2_760 = __builtin_shufflevector(__s2_760, __s2_760, 3, 2, 1, 0); \ |
| 65549 | | uint32x4_t __ret_760; \ |
| 65550 | | __ret_760 = __rev0_760 - __noswap_vmull_u16(__rev1_760, __noswap_splat_lane_u16(__rev2_760, __p3_760)); \ |
| 65551 | | __ret_760 = __builtin_shufflevector(__ret_760, __ret_760, 3, 2, 1, 0); \ |
| 65552 | | __ret_760; \ |
| 66898 | #define vmlsl_lane_u16(__p0_852, __p1_852, __p2_852, __p3_852) __extension__ ({ \ |
| 66899 | uint32x4_t __s0_852 = __p0_852; \ |
| 66900 | uint16x4_t __s1_852 = __p1_852; \ |
| 66901 | uint16x4_t __s2_852 = __p2_852; \ |
| 66902 | uint32x4_t __rev0_852; __rev0_852 = __builtin_shufflevector(__s0_852, __s0_852, 3, 2, 1, 0); \ |
| 66903 | uint16x4_t __rev1_852; __rev1_852 = __builtin_shufflevector(__s1_852, __s1_852, 3, 2, 1, 0); \ |
| 66904 | uint16x4_t __rev2_852; __rev2_852 = __builtin_shufflevector(__s2_852, __s2_852, 3, 2, 1, 0); \ |
| 66905 | uint32x4_t __ret_852; \ |
| 66906 | __ret_852 = __rev0_852 - __noswap_vmull_u16(__rev1_852, __noswap_splat_lane_u16(__rev2_852, __p3_852)); \ |
| 66907 | __ret_852 = __builtin_shufflevector(__ret_852, __ret_852, 3, 2, 1, 0); \ |
| 66908 | __ret_852; \ |
| 65553 | 66909 | }) |
| 65554 | 66910 | #endif |
| 65555 | 66911 | |
| 65556 | 66912 | #ifdef __LITTLE_ENDIAN__ |
| 65557 | | #define vmlsl_lane_s32(__p0_761, __p1_761, __p2_761, __p3_761) __extension__ ({ \ |
| 65558 | | int64x2_t __s0_761 = __p0_761; \ |
| 65559 | | int32x2_t __s1_761 = __p1_761; \ |
| 65560 | | int32x2_t __s2_761 = __p2_761; \ |
| 65561 | | int64x2_t __ret_761; \ |
| 65562 | | __ret_761 = __s0_761 - vmull_s32(__s1_761, splat_lane_s32(__s2_761, __p3_761)); \ |
| 65563 | | __ret_761; \ |
| 66913 | #define vmlsl_lane_s32(__p0_853, __p1_853, __p2_853, __p3_853) __extension__ ({ \ |
| 66914 | int64x2_t __s0_853 = __p0_853; \ |
| 66915 | int32x2_t __s1_853 = __p1_853; \ |
| 66916 | int32x2_t __s2_853 = __p2_853; \ |
| 66917 | int64x2_t __ret_853; \ |
| 66918 | __ret_853 = __s0_853 - vmull_s32(__s1_853, splat_lane_s32(__s2_853, __p3_853)); \ |
| 66919 | __ret_853; \ |
| 65564 | 66920 | }) |
| 65565 | 66921 | #else |
| 65566 | | #define vmlsl_lane_s32(__p0_762, __p1_762, __p2_762, __p3_762) __extension__ ({ \ |
| 65567 | | int64x2_t __s0_762 = __p0_762; \ |
| 65568 | | int32x2_t __s1_762 = __p1_762; \ |
| 65569 | | int32x2_t __s2_762 = __p2_762; \ |
| 65570 | | int64x2_t __rev0_762; __rev0_762 = __builtin_shufflevector(__s0_762, __s0_762, 1, 0); \ |
| 65571 | | int32x2_t __rev1_762; __rev1_762 = __builtin_shufflevector(__s1_762, __s1_762, 1, 0); \ |
| 65572 | | int32x2_t __rev2_762; __rev2_762 = __builtin_shufflevector(__s2_762, __s2_762, 1, 0); \ |
| 65573 | | int64x2_t __ret_762; \ |
| 65574 | | __ret_762 = __rev0_762 - __noswap_vmull_s32(__rev1_762, __noswap_splat_lane_s32(__rev2_762, __p3_762)); \ |
| 65575 | | __ret_762 = __builtin_shufflevector(__ret_762, __ret_762, 1, 0); \ |
| 65576 | | __ret_762; \ |
| 66922 | #define vmlsl_lane_s32(__p0_854, __p1_854, __p2_854, __p3_854) __extension__ ({ \ |
| 66923 | int64x2_t __s0_854 = __p0_854; \ |
| 66924 | int32x2_t __s1_854 = __p1_854; \ |
| 66925 | int32x2_t __s2_854 = __p2_854; \ |
| 66926 | int64x2_t __rev0_854; __rev0_854 = __builtin_shufflevector(__s0_854, __s0_854, 1, 0); \ |
| 66927 | int32x2_t __rev1_854; __rev1_854 = __builtin_shufflevector(__s1_854, __s1_854, 1, 0); \ |
| 66928 | int32x2_t __rev2_854; __rev2_854 = __builtin_shufflevector(__s2_854, __s2_854, 1, 0); \ |
| 66929 | int64x2_t __ret_854; \ |
| 66930 | __ret_854 = __rev0_854 - __noswap_vmull_s32(__rev1_854, __noswap_splat_lane_s32(__rev2_854, __p3_854)); \ |
| 66931 | __ret_854 = __builtin_shufflevector(__ret_854, __ret_854, 1, 0); \ |
| 66932 | __ret_854; \ |
| 65577 | 66933 | }) |
| 65578 | 66934 | #endif |
| 65579 | 66935 | |
| 65580 | 66936 | #ifdef __LITTLE_ENDIAN__ |
| 65581 | | #define vmlsl_lane_s16(__p0_763, __p1_763, __p2_763, __p3_763) __extension__ ({ \ |
| 65582 | | int32x4_t __s0_763 = __p0_763; \ |
| 65583 | | int16x4_t __s1_763 = __p1_763; \ |
| 65584 | | int16x4_t __s2_763 = __p2_763; \ |
| 65585 | | int32x4_t __ret_763; \ |
| 65586 | | __ret_763 = __s0_763 - vmull_s16(__s1_763, splat_lane_s16(__s2_763, __p3_763)); \ |
| 65587 | | __ret_763; \ |
| 66937 | #define vmlsl_lane_s16(__p0_855, __p1_855, __p2_855, __p3_855) __extension__ ({ \ |
| 66938 | int32x4_t __s0_855 = __p0_855; \ |
| 66939 | int16x4_t __s1_855 = __p1_855; \ |
| 66940 | int16x4_t __s2_855 = __p2_855; \ |
| 66941 | int32x4_t __ret_855; \ |
| 66942 | __ret_855 = __s0_855 - vmull_s16(__s1_855, splat_lane_s16(__s2_855, __p3_855)); \ |
| 66943 | __ret_855; \ |
| 65588 | 66944 | }) |
| 65589 | 66945 | #else |
| 65590 | | #define vmlsl_lane_s16(__p0_764, __p1_764, __p2_764, __p3_764) __extension__ ({ \ |
| 65591 | | int32x4_t __s0_764 = __p0_764; \ |
| 65592 | | int16x4_t __s1_764 = __p1_764; \ |
| 65593 | | int16x4_t __s2_764 = __p2_764; \ |
| 65594 | | int32x4_t __rev0_764; __rev0_764 = __builtin_shufflevector(__s0_764, __s0_764, 3, 2, 1, 0); \ |
| 65595 | | int16x4_t __rev1_764; __rev1_764 = __builtin_shufflevector(__s1_764, __s1_764, 3, 2, 1, 0); \ |
| 65596 | | int16x4_t __rev2_764; __rev2_764 = __builtin_shufflevector(__s2_764, __s2_764, 3, 2, 1, 0); \ |
| 65597 | | int32x4_t __ret_764; \ |
| 65598 | | __ret_764 = __rev0_764 - __noswap_vmull_s16(__rev1_764, __noswap_splat_lane_s16(__rev2_764, __p3_764)); \ |
| 65599 | | __ret_764 = __builtin_shufflevector(__ret_764, __ret_764, 3, 2, 1, 0); \ |
| 65600 | | __ret_764; \ |
| 66946 | #define vmlsl_lane_s16(__p0_856, __p1_856, __p2_856, __p3_856) __extension__ ({ \ |
| 66947 | int32x4_t __s0_856 = __p0_856; \ |
| 66948 | int16x4_t __s1_856 = __p1_856; \ |
| 66949 | int16x4_t __s2_856 = __p2_856; \ |
| 66950 | int32x4_t __rev0_856; __rev0_856 = __builtin_shufflevector(__s0_856, __s0_856, 3, 2, 1, 0); \ |
| 66951 | int16x4_t __rev1_856; __rev1_856 = __builtin_shufflevector(__s1_856, __s1_856, 3, 2, 1, 0); \ |
| 66952 | int16x4_t __rev2_856; __rev2_856 = __builtin_shufflevector(__s2_856, __s2_856, 3, 2, 1, 0); \ |
| 66953 | int32x4_t __ret_856; \ |
| 66954 | __ret_856 = __rev0_856 - __noswap_vmull_s16(__rev1_856, __noswap_splat_lane_s16(__rev2_856, __p3_856)); \ |
| 66955 | __ret_856 = __builtin_shufflevector(__ret_856, __ret_856, 3, 2, 1, 0); \ |
| 66956 | __ret_856; \ |
| 65601 | 66957 | }) |
| 65602 | 66958 | #endif |
| 65603 | 66959 | |
| ... | ... | @@ -65690,151 +67046,151 @@ __ai int32x4_t __noswap_vmlsl_n_s16(int32x4_t __p0, int16x4_t __p1, int16_t __p2 |
| 65690 | 67046 | #endif |
| 65691 | 67047 | |
| 65692 | 67048 | #ifdef __LITTLE_ENDIAN__ |
| 65693 | | #define vset_lane_f16(__p0_765, __p1_765, __p2_765) __extension__ ({ \ |
| 65694 | | float16_t __s0_765 = __p0_765; \ |
| 65695 | | float16x4_t __s1_765 = __p1_765; \ |
| 65696 | | float16x4_t __ret_765; \ |
| 65697 | | float16_t __reint_765 = __s0_765; \ |
| 65698 | | float16x4_t __reint1_765 = __s1_765; \ |
| 65699 | | int16x4_t __reint2_765 = vset_lane_s16(*(int16_t *) &__reint_765, *(int16x4_t *) &__reint1_765, __p2_765); \ |
| 65700 | | __ret_765 = *(float16x4_t *) &__reint2_765; \ |
| 65701 | | __ret_765; \ |
| 67049 | #define vset_lane_f16(__p0_857, __p1_857, __p2_857) __extension__ ({ \ |
| 67050 | float16_t __s0_857 = __p0_857; \ |
| 67051 | float16x4_t __s1_857 = __p1_857; \ |
| 67052 | float16x4_t __ret_857; \ |
| 67053 | float16_t __reint_857 = __s0_857; \ |
| 67054 | float16x4_t __reint1_857 = __s1_857; \ |
| 67055 | int16x4_t __reint2_857 = vset_lane_s16(*(int16_t *) &__reint_857, *(int16x4_t *) &__reint1_857, __p2_857); \ |
| 67056 | __ret_857 = *(float16x4_t *) &__reint2_857; \ |
| 67057 | __ret_857; \ |
| 65702 | 67058 | }) |
| 65703 | 67059 | #else |
| 65704 | | #define vset_lane_f16(__p0_766, __p1_766, __p2_766) __extension__ ({ \ |
| 65705 | | float16_t __s0_766 = __p0_766; \ |
| 65706 | | float16x4_t __s1_766 = __p1_766; \ |
| 65707 | | float16x4_t __rev1_766; __rev1_766 = __builtin_shufflevector(__s1_766, __s1_766, 3, 2, 1, 0); \ |
| 65708 | | float16x4_t __ret_766; \ |
| 65709 | | float16_t __reint_766 = __s0_766; \ |
| 65710 | | float16x4_t __reint1_766 = __rev1_766; \ |
| 65711 | | int16x4_t __reint2_766 = __noswap_vset_lane_s16(*(int16_t *) &__reint_766, *(int16x4_t *) &__reint1_766, __p2_766); \ |
| 65712 | | __ret_766 = *(float16x4_t *) &__reint2_766; \ |
| 65713 | | __ret_766 = __builtin_shufflevector(__ret_766, __ret_766, 3, 2, 1, 0); \ |
| 65714 | | __ret_766; \ |
| 67060 | #define vset_lane_f16(__p0_858, __p1_858, __p2_858) __extension__ ({ \ |
| 67061 | float16_t __s0_858 = __p0_858; \ |
| 67062 | float16x4_t __s1_858 = __p1_858; \ |
| 67063 | float16x4_t __rev1_858; __rev1_858 = __builtin_shufflevector(__s1_858, __s1_858, 3, 2, 1, 0); \ |
| 67064 | float16x4_t __ret_858; \ |
| 67065 | float16_t __reint_858 = __s0_858; \ |
| 67066 | float16x4_t __reint1_858 = __rev1_858; \ |
| 67067 | int16x4_t __reint2_858 = __noswap_vset_lane_s16(*(int16_t *) &__reint_858, *(int16x4_t *) &__reint1_858, __p2_858); \ |
| 67068 | __ret_858 = *(float16x4_t *) &__reint2_858; \ |
| 67069 | __ret_858 = __builtin_shufflevector(__ret_858, __ret_858, 3, 2, 1, 0); \ |
| 67070 | __ret_858; \ |
| 65715 | 67071 | }) |
| 65716 | 67072 | #endif |
| 65717 | 67073 | |
| 65718 | 67074 | #ifdef __LITTLE_ENDIAN__ |
| 65719 | | #define vsetq_lane_f16(__p0_767, __p1_767, __p2_767) __extension__ ({ \ |
| 65720 | | float16_t __s0_767 = __p0_767; \ |
| 65721 | | float16x8_t __s1_767 = __p1_767; \ |
| 65722 | | float16x8_t __ret_767; \ |
| 65723 | | float16_t __reint_767 = __s0_767; \ |
| 65724 | | float16x8_t __reint1_767 = __s1_767; \ |
| 65725 | | int16x8_t __reint2_767 = vsetq_lane_s16(*(int16_t *) &__reint_767, *(int16x8_t *) &__reint1_767, __p2_767); \ |
| 65726 | | __ret_767 = *(float16x8_t *) &__reint2_767; \ |
| 65727 | | __ret_767; \ |
| 67075 | #define vsetq_lane_f16(__p0_859, __p1_859, __p2_859) __extension__ ({ \ |
| 67076 | float16_t __s0_859 = __p0_859; \ |
| 67077 | float16x8_t __s1_859 = __p1_859; \ |
| 67078 | float16x8_t __ret_859; \ |
| 67079 | float16_t __reint_859 = __s0_859; \ |
| 67080 | float16x8_t __reint1_859 = __s1_859; \ |
| 67081 | int16x8_t __reint2_859 = vsetq_lane_s16(*(int16_t *) &__reint_859, *(int16x8_t *) &__reint1_859, __p2_859); \ |
| 67082 | __ret_859 = *(float16x8_t *) &__reint2_859; \ |
| 67083 | __ret_859; \ |
| 65728 | 67084 | }) |
| 65729 | 67085 | #else |
| 65730 | | #define vsetq_lane_f16(__p0_768, __p1_768, __p2_768) __extension__ ({ \ |
| 65731 | | float16_t __s0_768 = __p0_768; \ |
| 65732 | | float16x8_t __s1_768 = __p1_768; \ |
| 65733 | | float16x8_t __rev1_768; __rev1_768 = __builtin_shufflevector(__s1_768, __s1_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65734 | | float16x8_t __ret_768; \ |
| 65735 | | float16_t __reint_768 = __s0_768; \ |
| 65736 | | float16x8_t __reint1_768 = __rev1_768; \ |
| 65737 | | int16x8_t __reint2_768 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_768, *(int16x8_t *) &__reint1_768, __p2_768); \ |
| 65738 | | __ret_768 = *(float16x8_t *) &__reint2_768; \ |
| 65739 | | __ret_768 = __builtin_shufflevector(__ret_768, __ret_768, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65740 | | __ret_768; \ |
| 67086 | #define vsetq_lane_f16(__p0_860, __p1_860, __p2_860) __extension__ ({ \ |
| 67087 | float16_t __s0_860 = __p0_860; \ |
| 67088 | float16x8_t __s1_860 = __p1_860; \ |
| 67089 | float16x8_t __rev1_860; __rev1_860 = __builtin_shufflevector(__s1_860, __s1_860, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67090 | float16x8_t __ret_860; \ |
| 67091 | float16_t __reint_860 = __s0_860; \ |
| 67092 | float16x8_t __reint1_860 = __rev1_860; \ |
| 67093 | int16x8_t __reint2_860 = __noswap_vsetq_lane_s16(*(int16_t *) &__reint_860, *(int16x8_t *) &__reint1_860, __p2_860); \ |
| 67094 | __ret_860 = *(float16x8_t *) &__reint2_860; \ |
| 67095 | __ret_860 = __builtin_shufflevector(__ret_860, __ret_860, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67096 | __ret_860; \ |
| 65741 | 67097 | }) |
| 65742 | 67098 | #endif |
| 65743 | 67099 | |
| 65744 | 67100 | #if defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) |
| 65745 | 67101 | #ifdef __LITTLE_ENDIAN__ |
| 65746 | | #define vbfmlalbq_lane_f32(__p0_769, __p1_769, __p2_769, __p3_769) __extension__ ({ \ |
| 65747 | | float32x4_t __s0_769 = __p0_769; \ |
| 65748 | | bfloat16x8_t __s1_769 = __p1_769; \ |
| 65749 | | bfloat16x4_t __s2_769 = __p2_769; \ |
| 65750 | | float32x4_t __ret_769; \ |
| 65751 | | __ret_769 = vbfmlalbq_f32(__s0_769, __s1_769, (bfloat16x8_t) {vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769), vget_lane_bf16(__s2_769, __p3_769)}); \ |
| 65752 | | __ret_769; \ |
| 67102 | #define vbfmlalbq_lane_f32(__p0_861, __p1_861, __p2_861, __p3_861) __extension__ ({ \ |
| 67103 | float32x4_t __s0_861 = __p0_861; \ |
| 67104 | bfloat16x8_t __s1_861 = __p1_861; \ |
| 67105 | bfloat16x4_t __s2_861 = __p2_861; \ |
| 67106 | float32x4_t __ret_861; \ |
| 67107 | __ret_861 = vbfmlalbq_f32(__s0_861, __s1_861, (bfloat16x8_t) {vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861), vget_lane_bf16(__s2_861, __p3_861)}); \ |
| 67108 | __ret_861; \ |
| 65753 | 67109 | }) |
| 65754 | 67110 | #else |
| 65755 | | #define vbfmlalbq_lane_f32(__p0_770, __p1_770, __p2_770, __p3_770) __extension__ ({ \ |
| 65756 | | float32x4_t __s0_770 = __p0_770; \ |
| 65757 | | bfloat16x8_t __s1_770 = __p1_770; \ |
| 65758 | | bfloat16x4_t __s2_770 = __p2_770; \ |
| 65759 | | float32x4_t __rev0_770; __rev0_770 = __builtin_shufflevector(__s0_770, __s0_770, 3, 2, 1, 0); \ |
| 65760 | | bfloat16x8_t __rev1_770; __rev1_770 = __builtin_shufflevector(__s1_770, __s1_770, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65761 | | bfloat16x4_t __rev2_770; __rev2_770 = __builtin_shufflevector(__s2_770, __s2_770, 3, 2, 1, 0); \ |
| 65762 | | float32x4_t __ret_770; \ |
| 65763 | | __ret_770 = __noswap_vbfmlalbq_f32(__rev0_770, __rev1_770, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770), __noswap_vget_lane_bf16(__rev2_770, __p3_770)}); \ |
| 65764 | | __ret_770 = __builtin_shufflevector(__ret_770, __ret_770, 3, 2, 1, 0); \ |
| 65765 | | __ret_770; \ |
| 67111 | #define vbfmlalbq_lane_f32(__p0_862, __p1_862, __p2_862, __p3_862) __extension__ ({ \ |
| 67112 | float32x4_t __s0_862 = __p0_862; \ |
| 67113 | bfloat16x8_t __s1_862 = __p1_862; \ |
| 67114 | bfloat16x4_t __s2_862 = __p2_862; \ |
| 67115 | float32x4_t __rev0_862; __rev0_862 = __builtin_shufflevector(__s0_862, __s0_862, 3, 2, 1, 0); \ |
| 67116 | bfloat16x8_t __rev1_862; __rev1_862 = __builtin_shufflevector(__s1_862, __s1_862, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67117 | bfloat16x4_t __rev2_862; __rev2_862 = __builtin_shufflevector(__s2_862, __s2_862, 3, 2, 1, 0); \ |
| 67118 | float32x4_t __ret_862; \ |
| 67119 | __ret_862 = __noswap_vbfmlalbq_f32(__rev0_862, __rev1_862, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862), __noswap_vget_lane_bf16(__rev2_862, __p3_862)}); \ |
| 67120 | __ret_862 = __builtin_shufflevector(__ret_862, __ret_862, 3, 2, 1, 0); \ |
| 67121 | __ret_862; \ |
| 65766 | 67122 | }) |
| 65767 | 67123 | #endif |
| 65768 | 67124 | |
| 65769 | 67125 | #ifdef __LITTLE_ENDIAN__ |
| 65770 | | #define vbfmlalbq_laneq_f32(__p0_771, __p1_771, __p2_771, __p3_771) __extension__ ({ \ |
| 65771 | | float32x4_t __s0_771 = __p0_771; \ |
| 65772 | | bfloat16x8_t __s1_771 = __p1_771; \ |
| 65773 | | bfloat16x8_t __s2_771 = __p2_771; \ |
| 65774 | | float32x4_t __ret_771; \ |
| 65775 | | __ret_771 = vbfmlalbq_f32(__s0_771, __s1_771, (bfloat16x8_t) {vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771), vgetq_lane_bf16(__s2_771, __p3_771)}); \ |
| 65776 | | __ret_771; \ |
| 67126 | #define vbfmlalbq_laneq_f32(__p0_863, __p1_863, __p2_863, __p3_863) __extension__ ({ \ |
| 67127 | float32x4_t __s0_863 = __p0_863; \ |
| 67128 | bfloat16x8_t __s1_863 = __p1_863; \ |
| 67129 | bfloat16x8_t __s2_863 = __p2_863; \ |
| 67130 | float32x4_t __ret_863; \ |
| 67131 | __ret_863 = vbfmlalbq_f32(__s0_863, __s1_863, (bfloat16x8_t) {vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863), vgetq_lane_bf16(__s2_863, __p3_863)}); \ |
| 67132 | __ret_863; \ |
| 65777 | 67133 | }) |
| 65778 | 67134 | #else |
| 65779 | | #define vbfmlalbq_laneq_f32(__p0_772, __p1_772, __p2_772, __p3_772) __extension__ ({ \ |
| 65780 | | float32x4_t __s0_772 = __p0_772; \ |
| 65781 | | bfloat16x8_t __s1_772 = __p1_772; \ |
| 65782 | | bfloat16x8_t __s2_772 = __p2_772; \ |
| 65783 | | float32x4_t __rev0_772; __rev0_772 = __builtin_shufflevector(__s0_772, __s0_772, 3, 2, 1, 0); \ |
| 65784 | | bfloat16x8_t __rev1_772; __rev1_772 = __builtin_shufflevector(__s1_772, __s1_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65785 | | bfloat16x8_t __rev2_772; __rev2_772 = __builtin_shufflevector(__s2_772, __s2_772, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65786 | | float32x4_t __ret_772; \ |
| 65787 | | __ret_772 = __noswap_vbfmlalbq_f32(__rev0_772, __rev1_772, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772), __noswap_vgetq_lane_bf16(__rev2_772, __p3_772)}); \ |
| 65788 | | __ret_772 = __builtin_shufflevector(__ret_772, __ret_772, 3, 2, 1, 0); \ |
| 65789 | | __ret_772; \ |
| 67135 | #define vbfmlalbq_laneq_f32(__p0_864, __p1_864, __p2_864, __p3_864) __extension__ ({ \ |
| 67136 | float32x4_t __s0_864 = __p0_864; \ |
| 67137 | bfloat16x8_t __s1_864 = __p1_864; \ |
| 67138 | bfloat16x8_t __s2_864 = __p2_864; \ |
| 67139 | float32x4_t __rev0_864; __rev0_864 = __builtin_shufflevector(__s0_864, __s0_864, 3, 2, 1, 0); \ |
| 67140 | bfloat16x8_t __rev1_864; __rev1_864 = __builtin_shufflevector(__s1_864, __s1_864, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67141 | bfloat16x8_t __rev2_864; __rev2_864 = __builtin_shufflevector(__s2_864, __s2_864, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67142 | float32x4_t __ret_864; \ |
| 67143 | __ret_864 = __noswap_vbfmlalbq_f32(__rev0_864, __rev1_864, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864), __noswap_vgetq_lane_bf16(__rev2_864, __p3_864)}); \ |
| 67144 | __ret_864 = __builtin_shufflevector(__ret_864, __ret_864, 3, 2, 1, 0); \ |
| 67145 | __ret_864; \ |
| 65790 | 67146 | }) |
| 65791 | 67147 | #endif |
| 65792 | 67148 | |
| 65793 | 67149 | #ifdef __LITTLE_ENDIAN__ |
| 65794 | | #define vbfmlaltq_lane_f32(__p0_773, __p1_773, __p2_773, __p3_773) __extension__ ({ \ |
| 65795 | | float32x4_t __s0_773 = __p0_773; \ |
| 65796 | | bfloat16x8_t __s1_773 = __p1_773; \ |
| 65797 | | bfloat16x4_t __s2_773 = __p2_773; \ |
| 65798 | | float32x4_t __ret_773; \ |
| 65799 | | __ret_773 = vbfmlaltq_f32(__s0_773, __s1_773, (bfloat16x8_t) {vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773), vget_lane_bf16(__s2_773, __p3_773)}); \ |
| 65800 | | __ret_773; \ |
| 67150 | #define vbfmlaltq_lane_f32(__p0_865, __p1_865, __p2_865, __p3_865) __extension__ ({ \ |
| 67151 | float32x4_t __s0_865 = __p0_865; \ |
| 67152 | bfloat16x8_t __s1_865 = __p1_865; \ |
| 67153 | bfloat16x4_t __s2_865 = __p2_865; \ |
| 67154 | float32x4_t __ret_865; \ |
| 67155 | __ret_865 = vbfmlaltq_f32(__s0_865, __s1_865, (bfloat16x8_t) {vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865), vget_lane_bf16(__s2_865, __p3_865)}); \ |
| 67156 | __ret_865; \ |
| 65801 | 67157 | }) |
| 65802 | 67158 | #else |
| 65803 | | #define vbfmlaltq_lane_f32(__p0_774, __p1_774, __p2_774, __p3_774) __extension__ ({ \ |
| 65804 | | float32x4_t __s0_774 = __p0_774; \ |
| 65805 | | bfloat16x8_t __s1_774 = __p1_774; \ |
| 65806 | | bfloat16x4_t __s2_774 = __p2_774; \ |
| 65807 | | float32x4_t __rev0_774; __rev0_774 = __builtin_shufflevector(__s0_774, __s0_774, 3, 2, 1, 0); \ |
| 65808 | | bfloat16x8_t __rev1_774; __rev1_774 = __builtin_shufflevector(__s1_774, __s1_774, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65809 | | bfloat16x4_t __rev2_774; __rev2_774 = __builtin_shufflevector(__s2_774, __s2_774, 3, 2, 1, 0); \ |
| 65810 | | float32x4_t __ret_774; \ |
| 65811 | | __ret_774 = __noswap_vbfmlaltq_f32(__rev0_774, __rev1_774, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774), __noswap_vget_lane_bf16(__rev2_774, __p3_774)}); \ |
| 65812 | | __ret_774 = __builtin_shufflevector(__ret_774, __ret_774, 3, 2, 1, 0); \ |
| 65813 | | __ret_774; \ |
| 67159 | #define vbfmlaltq_lane_f32(__p0_866, __p1_866, __p2_866, __p3_866) __extension__ ({ \ |
| 67160 | float32x4_t __s0_866 = __p0_866; \ |
| 67161 | bfloat16x8_t __s1_866 = __p1_866; \ |
| 67162 | bfloat16x4_t __s2_866 = __p2_866; \ |
| 67163 | float32x4_t __rev0_866; __rev0_866 = __builtin_shufflevector(__s0_866, __s0_866, 3, 2, 1, 0); \ |
| 67164 | bfloat16x8_t __rev1_866; __rev1_866 = __builtin_shufflevector(__s1_866, __s1_866, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67165 | bfloat16x4_t __rev2_866; __rev2_866 = __builtin_shufflevector(__s2_866, __s2_866, 3, 2, 1, 0); \ |
| 67166 | float32x4_t __ret_866; \ |
| 67167 | __ret_866 = __noswap_vbfmlaltq_f32(__rev0_866, __rev1_866, (bfloat16x8_t) {__noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866), __noswap_vget_lane_bf16(__rev2_866, __p3_866)}); \ |
| 67168 | __ret_866 = __builtin_shufflevector(__ret_866, __ret_866, 3, 2, 1, 0); \ |
| 67169 | __ret_866; \ |
| 65814 | 67170 | }) |
| 65815 | 67171 | #endif |
| 65816 | 67172 | |
| 65817 | 67173 | #ifdef __LITTLE_ENDIAN__ |
| 65818 | | #define vbfmlaltq_laneq_f32(__p0_775, __p1_775, __p2_775, __p3_775) __extension__ ({ \ |
| 65819 | | float32x4_t __s0_775 = __p0_775; \ |
| 65820 | | bfloat16x8_t __s1_775 = __p1_775; \ |
| 65821 | | bfloat16x8_t __s2_775 = __p2_775; \ |
| 65822 | | float32x4_t __ret_775; \ |
| 65823 | | __ret_775 = vbfmlaltq_f32(__s0_775, __s1_775, (bfloat16x8_t) {vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775), vgetq_lane_bf16(__s2_775, __p3_775)}); \ |
| 65824 | | __ret_775; \ |
| 67174 | #define vbfmlaltq_laneq_f32(__p0_867, __p1_867, __p2_867, __p3_867) __extension__ ({ \ |
| 67175 | float32x4_t __s0_867 = __p0_867; \ |
| 67176 | bfloat16x8_t __s1_867 = __p1_867; \ |
| 67177 | bfloat16x8_t __s2_867 = __p2_867; \ |
| 67178 | float32x4_t __ret_867; \ |
| 67179 | __ret_867 = vbfmlaltq_f32(__s0_867, __s1_867, (bfloat16x8_t) {vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867), vgetq_lane_bf16(__s2_867, __p3_867)}); \ |
| 67180 | __ret_867; \ |
| 65825 | 67181 | }) |
| 65826 | 67182 | #else |
| 65827 | | #define vbfmlaltq_laneq_f32(__p0_776, __p1_776, __p2_776, __p3_776) __extension__ ({ \ |
| 65828 | | float32x4_t __s0_776 = __p0_776; \ |
| 65829 | | bfloat16x8_t __s1_776 = __p1_776; \ |
| 65830 | | bfloat16x8_t __s2_776 = __p2_776; \ |
| 65831 | | float32x4_t __rev0_776; __rev0_776 = __builtin_shufflevector(__s0_776, __s0_776, 3, 2, 1, 0); \ |
| 65832 | | bfloat16x8_t __rev1_776; __rev1_776 = __builtin_shufflevector(__s1_776, __s1_776, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65833 | | bfloat16x8_t __rev2_776; __rev2_776 = __builtin_shufflevector(__s2_776, __s2_776, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65834 | | float32x4_t __ret_776; \ |
| 65835 | | __ret_776 = __noswap_vbfmlaltq_f32(__rev0_776, __rev1_776, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776), __noswap_vgetq_lane_bf16(__rev2_776, __p3_776)}); \ |
| 65836 | | __ret_776 = __builtin_shufflevector(__ret_776, __ret_776, 3, 2, 1, 0); \ |
| 65837 | | __ret_776; \ |
| 67183 | #define vbfmlaltq_laneq_f32(__p0_868, __p1_868, __p2_868, __p3_868) __extension__ ({ \ |
| 67184 | float32x4_t __s0_868 = __p0_868; \ |
| 67185 | bfloat16x8_t __s1_868 = __p1_868; \ |
| 67186 | bfloat16x8_t __s2_868 = __p2_868; \ |
| 67187 | float32x4_t __rev0_868; __rev0_868 = __builtin_shufflevector(__s0_868, __s0_868, 3, 2, 1, 0); \ |
| 67188 | bfloat16x8_t __rev1_868; __rev1_868 = __builtin_shufflevector(__s1_868, __s1_868, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67189 | bfloat16x8_t __rev2_868; __rev2_868 = __builtin_shufflevector(__s2_868, __s2_868, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67190 | float32x4_t __ret_868; \ |
| 67191 | __ret_868 = __noswap_vbfmlaltq_f32(__rev0_868, __rev1_868, (bfloat16x8_t) {__noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868), __noswap_vgetq_lane_bf16(__rev2_868, __p3_868)}); \ |
| 67192 | __ret_868 = __builtin_shufflevector(__ret_868, __ret_868, 3, 2, 1, 0); \ |
| 67193 | __ret_868; \ |
| 65838 | 67194 | }) |
| 65839 | 67195 | #endif |
| 65840 | 67196 | |
| ... | ... | @@ -65873,480 +67229,480 @@ __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) { |
| 65873 | 67229 | #endif |
| 65874 | 67230 | #if defined(__ARM_FEATURE_FP16FML) && defined(__aarch64__) |
| 65875 | 67231 | #ifdef __LITTLE_ENDIAN__ |
| 65876 | | #define vfmlalq_lane_high_f16(__p0_777, __p1_777, __p2_777, __p3_777) __extension__ ({ \ |
| 65877 | | float32x4_t __s0_777 = __p0_777; \ |
| 65878 | | float16x8_t __s1_777 = __p1_777; \ |
| 65879 | | float16x4_t __s2_777 = __p2_777; \ |
| 65880 | | float32x4_t __ret_777; \ |
| 65881 | | __ret_777 = vfmlalq_high_f16(__s0_777, __s1_777, (float16x8_t) {vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777), vget_lane_f16(__s2_777, __p3_777)}); \ |
| 65882 | | __ret_777; \ |
| 67232 | #define vfmlalq_lane_high_f16(__p0_869, __p1_869, __p2_869, __p3_869) __extension__ ({ \ |
| 67233 | float32x4_t __s0_869 = __p0_869; \ |
| 67234 | float16x8_t __s1_869 = __p1_869; \ |
| 67235 | float16x4_t __s2_869 = __p2_869; \ |
| 67236 | float32x4_t __ret_869; \ |
| 67237 | __ret_869 = vfmlalq_high_f16(__s0_869, __s1_869, (float16x8_t) {vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869), vget_lane_f16(__s2_869, __p3_869)}); \ |
| 67238 | __ret_869; \ |
| 65883 | 67239 | }) |
| 65884 | 67240 | #else |
| 65885 | | #define vfmlalq_lane_high_f16(__p0_778, __p1_778, __p2_778, __p3_778) __extension__ ({ \ |
| 65886 | | float32x4_t __s0_778 = __p0_778; \ |
| 65887 | | float16x8_t __s1_778 = __p1_778; \ |
| 65888 | | float16x4_t __s2_778 = __p2_778; \ |
| 65889 | | float32x4_t __rev0_778; __rev0_778 = __builtin_shufflevector(__s0_778, __s0_778, 3, 2, 1, 0); \ |
| 65890 | | float16x8_t __rev1_778; __rev1_778 = __builtin_shufflevector(__s1_778, __s1_778, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65891 | | float16x4_t __rev2_778; __rev2_778 = __builtin_shufflevector(__s2_778, __s2_778, 3, 2, 1, 0); \ |
| 65892 | | float32x4_t __ret_778; \ |
| 65893 | | __ret_778 = __noswap_vfmlalq_high_f16(__rev0_778, __rev1_778, (float16x8_t) {__noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778), __noswap_vget_lane_f16(__rev2_778, __p3_778)}); \ |
| 65894 | | __ret_778 = __builtin_shufflevector(__ret_778, __ret_778, 3, 2, 1, 0); \ |
| 65895 | | __ret_778; \ |
| 67241 | #define vfmlalq_lane_high_f16(__p0_870, __p1_870, __p2_870, __p3_870) __extension__ ({ \ |
| 67242 | float32x4_t __s0_870 = __p0_870; \ |
| 67243 | float16x8_t __s1_870 = __p1_870; \ |
| 67244 | float16x4_t __s2_870 = __p2_870; \ |
| 67245 | float32x4_t __rev0_870; __rev0_870 = __builtin_shufflevector(__s0_870, __s0_870, 3, 2, 1, 0); \ |
| 67246 | float16x8_t __rev1_870; __rev1_870 = __builtin_shufflevector(__s1_870, __s1_870, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67247 | float16x4_t __rev2_870; __rev2_870 = __builtin_shufflevector(__s2_870, __s2_870, 3, 2, 1, 0); \ |
| 67248 | float32x4_t __ret_870; \ |
| 67249 | __ret_870 = __noswap_vfmlalq_high_f16(__rev0_870, __rev1_870, (float16x8_t) {__noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870), __noswap_vget_lane_f16(__rev2_870, __p3_870)}); \ |
| 67250 | __ret_870 = __builtin_shufflevector(__ret_870, __ret_870, 3, 2, 1, 0); \ |
| 67251 | __ret_870; \ |
| 65896 | 67252 | }) |
| 65897 | 67253 | #endif |
| 65898 | 67254 | |
| 65899 | 67255 | #ifdef __LITTLE_ENDIAN__ |
| 65900 | | #define vfmlal_lane_high_f16(__p0_779, __p1_779, __p2_779, __p3_779) __extension__ ({ \ |
| 65901 | | float32x2_t __s0_779 = __p0_779; \ |
| 65902 | | float16x4_t __s1_779 = __p1_779; \ |
| 65903 | | float16x4_t __s2_779 = __p2_779; \ |
| 65904 | | float32x2_t __ret_779; \ |
| 65905 | | __ret_779 = vfmlal_high_f16(__s0_779, __s1_779, (float16x4_t) {vget_lane_f16(__s2_779, __p3_779), vget_lane_f16(__s2_779, __p3_779), vget_lane_f16(__s2_779, __p3_779), vget_lane_f16(__s2_779, __p3_779)}); \ |
| 65906 | | __ret_779; \ |
| 67256 | #define vfmlal_lane_high_f16(__p0_871, __p1_871, __p2_871, __p3_871) __extension__ ({ \ |
| 67257 | float32x2_t __s0_871 = __p0_871; \ |
| 67258 | float16x4_t __s1_871 = __p1_871; \ |
| 67259 | float16x4_t __s2_871 = __p2_871; \ |
| 67260 | float32x2_t __ret_871; \ |
| 67261 | __ret_871 = vfmlal_high_f16(__s0_871, __s1_871, (float16x4_t) {vget_lane_f16(__s2_871, __p3_871), vget_lane_f16(__s2_871, __p3_871), vget_lane_f16(__s2_871, __p3_871), vget_lane_f16(__s2_871, __p3_871)}); \ |
| 67262 | __ret_871; \ |
| 65907 | 67263 | }) |
| 65908 | 67264 | #else |
| 65909 | | #define vfmlal_lane_high_f16(__p0_780, __p1_780, __p2_780, __p3_780) __extension__ ({ \ |
| 65910 | | float32x2_t __s0_780 = __p0_780; \ |
| 65911 | | float16x4_t __s1_780 = __p1_780; \ |
| 65912 | | float16x4_t __s2_780 = __p2_780; \ |
| 65913 | | float32x2_t __rev0_780; __rev0_780 = __builtin_shufflevector(__s0_780, __s0_780, 1, 0); \ |
| 65914 | | float16x4_t __rev1_780; __rev1_780 = __builtin_shufflevector(__s1_780, __s1_780, 3, 2, 1, 0); \ |
| 65915 | | float16x4_t __rev2_780; __rev2_780 = __builtin_shufflevector(__s2_780, __s2_780, 3, 2, 1, 0); \ |
| 65916 | | float32x2_t __ret_780; \ |
| 65917 | | __ret_780 = __noswap_vfmlal_high_f16(__rev0_780, __rev1_780, (float16x4_t) {__noswap_vget_lane_f16(__rev2_780, __p3_780), __noswap_vget_lane_f16(__rev2_780, __p3_780), __noswap_vget_lane_f16(__rev2_780, __p3_780), __noswap_vget_lane_f16(__rev2_780, __p3_780)}); \ |
| 65918 | | __ret_780 = __builtin_shufflevector(__ret_780, __ret_780, 1, 0); \ |
| 65919 | | __ret_780; \ |
| 67265 | #define vfmlal_lane_high_f16(__p0_872, __p1_872, __p2_872, __p3_872) __extension__ ({ \ |
| 67266 | float32x2_t __s0_872 = __p0_872; \ |
| 67267 | float16x4_t __s1_872 = __p1_872; \ |
| 67268 | float16x4_t __s2_872 = __p2_872; \ |
| 67269 | float32x2_t __rev0_872; __rev0_872 = __builtin_shufflevector(__s0_872, __s0_872, 1, 0); \ |
| 67270 | float16x4_t __rev1_872; __rev1_872 = __builtin_shufflevector(__s1_872, __s1_872, 3, 2, 1, 0); \ |
| 67271 | float16x4_t __rev2_872; __rev2_872 = __builtin_shufflevector(__s2_872, __s2_872, 3, 2, 1, 0); \ |
| 67272 | float32x2_t __ret_872; \ |
| 67273 | __ret_872 = __noswap_vfmlal_high_f16(__rev0_872, __rev1_872, (float16x4_t) {__noswap_vget_lane_f16(__rev2_872, __p3_872), __noswap_vget_lane_f16(__rev2_872, __p3_872), __noswap_vget_lane_f16(__rev2_872, __p3_872), __noswap_vget_lane_f16(__rev2_872, __p3_872)}); \ |
| 67274 | __ret_872 = __builtin_shufflevector(__ret_872, __ret_872, 1, 0); \ |
| 67275 | __ret_872; \ |
| 65920 | 67276 | }) |
| 65921 | 67277 | #endif |
| 65922 | 67278 | |
| 65923 | 67279 | #ifdef __LITTLE_ENDIAN__ |
| 65924 | | #define vfmlalq_lane_low_f16(__p0_781, __p1_781, __p2_781, __p3_781) __extension__ ({ \ |
| 65925 | | float32x4_t __s0_781 = __p0_781; \ |
| 65926 | | float16x8_t __s1_781 = __p1_781; \ |
| 65927 | | float16x4_t __s2_781 = __p2_781; \ |
| 65928 | | float32x4_t __ret_781; \ |
| 65929 | | __ret_781 = vfmlalq_low_f16(__s0_781, __s1_781, (float16x8_t) {vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781), vget_lane_f16(__s2_781, __p3_781)}); \ |
| 65930 | | __ret_781; \ |
| 67280 | #define vfmlalq_lane_low_f16(__p0_873, __p1_873, __p2_873, __p3_873) __extension__ ({ \ |
| 67281 | float32x4_t __s0_873 = __p0_873; \ |
| 67282 | float16x8_t __s1_873 = __p1_873; \ |
| 67283 | float16x4_t __s2_873 = __p2_873; \ |
| 67284 | float32x4_t __ret_873; \ |
| 67285 | __ret_873 = vfmlalq_low_f16(__s0_873, __s1_873, (float16x8_t) {vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873), vget_lane_f16(__s2_873, __p3_873)}); \ |
| 67286 | __ret_873; \ |
| 65931 | 67287 | }) |
| 65932 | 67288 | #else |
| 65933 | | #define vfmlalq_lane_low_f16(__p0_782, __p1_782, __p2_782, __p3_782) __extension__ ({ \ |
| 65934 | | float32x4_t __s0_782 = __p0_782; \ |
| 65935 | | float16x8_t __s1_782 = __p1_782; \ |
| 65936 | | float16x4_t __s2_782 = __p2_782; \ |
| 65937 | | float32x4_t __rev0_782; __rev0_782 = __builtin_shufflevector(__s0_782, __s0_782, 3, 2, 1, 0); \ |
| 65938 | | float16x8_t __rev1_782; __rev1_782 = __builtin_shufflevector(__s1_782, __s1_782, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65939 | | float16x4_t __rev2_782; __rev2_782 = __builtin_shufflevector(__s2_782, __s2_782, 3, 2, 1, 0); \ |
| 65940 | | float32x4_t __ret_782; \ |
| 65941 | | __ret_782 = __noswap_vfmlalq_low_f16(__rev0_782, __rev1_782, (float16x8_t) {__noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782), __noswap_vget_lane_f16(__rev2_782, __p3_782)}); \ |
| 65942 | | __ret_782 = __builtin_shufflevector(__ret_782, __ret_782, 3, 2, 1, 0); \ |
| 65943 | | __ret_782; \ |
| 67289 | #define vfmlalq_lane_low_f16(__p0_874, __p1_874, __p2_874, __p3_874) __extension__ ({ \ |
| 67290 | float32x4_t __s0_874 = __p0_874; \ |
| 67291 | float16x8_t __s1_874 = __p1_874; \ |
| 67292 | float16x4_t __s2_874 = __p2_874; \ |
| 67293 | float32x4_t __rev0_874; __rev0_874 = __builtin_shufflevector(__s0_874, __s0_874, 3, 2, 1, 0); \ |
| 67294 | float16x8_t __rev1_874; __rev1_874 = __builtin_shufflevector(__s1_874, __s1_874, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67295 | float16x4_t __rev2_874; __rev2_874 = __builtin_shufflevector(__s2_874, __s2_874, 3, 2, 1, 0); \ |
| 67296 | float32x4_t __ret_874; \ |
| 67297 | __ret_874 = __noswap_vfmlalq_low_f16(__rev0_874, __rev1_874, (float16x8_t) {__noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874), __noswap_vget_lane_f16(__rev2_874, __p3_874)}); \ |
| 67298 | __ret_874 = __builtin_shufflevector(__ret_874, __ret_874, 3, 2, 1, 0); \ |
| 67299 | __ret_874; \ |
| 65944 | 67300 | }) |
| 65945 | 67301 | #endif |
| 65946 | 67302 | |
| 65947 | 67303 | #ifdef __LITTLE_ENDIAN__ |
| 65948 | | #define vfmlal_lane_low_f16(__p0_783, __p1_783, __p2_783, __p3_783) __extension__ ({ \ |
| 65949 | | float32x2_t __s0_783 = __p0_783; \ |
| 65950 | | float16x4_t __s1_783 = __p1_783; \ |
| 65951 | | float16x4_t __s2_783 = __p2_783; \ |
| 65952 | | float32x2_t __ret_783; \ |
| 65953 | | __ret_783 = vfmlal_low_f16(__s0_783, __s1_783, (float16x4_t) {vget_lane_f16(__s2_783, __p3_783), vget_lane_f16(__s2_783, __p3_783), vget_lane_f16(__s2_783, __p3_783), vget_lane_f16(__s2_783, __p3_783)}); \ |
| 65954 | | __ret_783; \ |
| 67304 | #define vfmlal_lane_low_f16(__p0_875, __p1_875, __p2_875, __p3_875) __extension__ ({ \ |
| 67305 | float32x2_t __s0_875 = __p0_875; \ |
| 67306 | float16x4_t __s1_875 = __p1_875; \ |
| 67307 | float16x4_t __s2_875 = __p2_875; \ |
| 67308 | float32x2_t __ret_875; \ |
| 67309 | __ret_875 = vfmlal_low_f16(__s0_875, __s1_875, (float16x4_t) {vget_lane_f16(__s2_875, __p3_875), vget_lane_f16(__s2_875, __p3_875), vget_lane_f16(__s2_875, __p3_875), vget_lane_f16(__s2_875, __p3_875)}); \ |
| 67310 | __ret_875; \ |
| 65955 | 67311 | }) |
| 65956 | 67312 | #else |
| 65957 | | #define vfmlal_lane_low_f16(__p0_784, __p1_784, __p2_784, __p3_784) __extension__ ({ \ |
| 65958 | | float32x2_t __s0_784 = __p0_784; \ |
| 65959 | | float16x4_t __s1_784 = __p1_784; \ |
| 65960 | | float16x4_t __s2_784 = __p2_784; \ |
| 65961 | | float32x2_t __rev0_784; __rev0_784 = __builtin_shufflevector(__s0_784, __s0_784, 1, 0); \ |
| 65962 | | float16x4_t __rev1_784; __rev1_784 = __builtin_shufflevector(__s1_784, __s1_784, 3, 2, 1, 0); \ |
| 65963 | | float16x4_t __rev2_784; __rev2_784 = __builtin_shufflevector(__s2_784, __s2_784, 3, 2, 1, 0); \ |
| 65964 | | float32x2_t __ret_784; \ |
| 65965 | | __ret_784 = __noswap_vfmlal_low_f16(__rev0_784, __rev1_784, (float16x4_t) {__noswap_vget_lane_f16(__rev2_784, __p3_784), __noswap_vget_lane_f16(__rev2_784, __p3_784), __noswap_vget_lane_f16(__rev2_784, __p3_784), __noswap_vget_lane_f16(__rev2_784, __p3_784)}); \ |
| 65966 | | __ret_784 = __builtin_shufflevector(__ret_784, __ret_784, 1, 0); \ |
| 65967 | | __ret_784; \ |
| 67313 | #define vfmlal_lane_low_f16(__p0_876, __p1_876, __p2_876, __p3_876) __extension__ ({ \ |
| 67314 | float32x2_t __s0_876 = __p0_876; \ |
| 67315 | float16x4_t __s1_876 = __p1_876; \ |
| 67316 | float16x4_t __s2_876 = __p2_876; \ |
| 67317 | float32x2_t __rev0_876; __rev0_876 = __builtin_shufflevector(__s0_876, __s0_876, 1, 0); \ |
| 67318 | float16x4_t __rev1_876; __rev1_876 = __builtin_shufflevector(__s1_876, __s1_876, 3, 2, 1, 0); \ |
| 67319 | float16x4_t __rev2_876; __rev2_876 = __builtin_shufflevector(__s2_876, __s2_876, 3, 2, 1, 0); \ |
| 67320 | float32x2_t __ret_876; \ |
| 67321 | __ret_876 = __noswap_vfmlal_low_f16(__rev0_876, __rev1_876, (float16x4_t) {__noswap_vget_lane_f16(__rev2_876, __p3_876), __noswap_vget_lane_f16(__rev2_876, __p3_876), __noswap_vget_lane_f16(__rev2_876, __p3_876), __noswap_vget_lane_f16(__rev2_876, __p3_876)}); \ |
| 67322 | __ret_876 = __builtin_shufflevector(__ret_876, __ret_876, 1, 0); \ |
| 67323 | __ret_876; \ |
| 65968 | 67324 | }) |
| 65969 | 67325 | #endif |
| 65970 | 67326 | |
| 65971 | 67327 | #ifdef __LITTLE_ENDIAN__ |
| 65972 | | #define vfmlalq_laneq_high_f16(__p0_785, __p1_785, __p2_785, __p3_785) __extension__ ({ \ |
| 65973 | | float32x4_t __s0_785 = __p0_785; \ |
| 65974 | | float16x8_t __s1_785 = __p1_785; \ |
| 65975 | | float16x8_t __s2_785 = __p2_785; \ |
| 65976 | | float32x4_t __ret_785; \ |
| 65977 | | __ret_785 = vfmlalq_high_f16(__s0_785, __s1_785, (float16x8_t) {vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785), vgetq_lane_f16(__s2_785, __p3_785)}); \ |
| 65978 | | __ret_785; \ |
| 67328 | #define vfmlalq_laneq_high_f16(__p0_877, __p1_877, __p2_877, __p3_877) __extension__ ({ \ |
| 67329 | float32x4_t __s0_877 = __p0_877; \ |
| 67330 | float16x8_t __s1_877 = __p1_877; \ |
| 67331 | float16x8_t __s2_877 = __p2_877; \ |
| 67332 | float32x4_t __ret_877; \ |
| 67333 | __ret_877 = vfmlalq_high_f16(__s0_877, __s1_877, (float16x8_t) {vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877), vgetq_lane_f16(__s2_877, __p3_877)}); \ |
| 67334 | __ret_877; \ |
| 65979 | 67335 | }) |
| 65980 | 67336 | #else |
| 65981 | | #define vfmlalq_laneq_high_f16(__p0_786, __p1_786, __p2_786, __p3_786) __extension__ ({ \ |
| 65982 | | float32x4_t __s0_786 = __p0_786; \ |
| 65983 | | float16x8_t __s1_786 = __p1_786; \ |
| 65984 | | float16x8_t __s2_786 = __p2_786; \ |
| 65985 | | float32x4_t __rev0_786; __rev0_786 = __builtin_shufflevector(__s0_786, __s0_786, 3, 2, 1, 0); \ |
| 65986 | | float16x8_t __rev1_786; __rev1_786 = __builtin_shufflevector(__s1_786, __s1_786, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65987 | | float16x8_t __rev2_786; __rev2_786 = __builtin_shufflevector(__s2_786, __s2_786, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 65988 | | float32x4_t __ret_786; \ |
| 65989 | | __ret_786 = __noswap_vfmlalq_high_f16(__rev0_786, __rev1_786, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786), __noswap_vgetq_lane_f16(__rev2_786, __p3_786)}); \ |
| 65990 | | __ret_786 = __builtin_shufflevector(__ret_786, __ret_786, 3, 2, 1, 0); \ |
| 65991 | | __ret_786; \ |
| 67337 | #define vfmlalq_laneq_high_f16(__p0_878, __p1_878, __p2_878, __p3_878) __extension__ ({ \ |
| 67338 | float32x4_t __s0_878 = __p0_878; \ |
| 67339 | float16x8_t __s1_878 = __p1_878; \ |
| 67340 | float16x8_t __s2_878 = __p2_878; \ |
| 67341 | float32x4_t __rev0_878; __rev0_878 = __builtin_shufflevector(__s0_878, __s0_878, 3, 2, 1, 0); \ |
| 67342 | float16x8_t __rev1_878; __rev1_878 = __builtin_shufflevector(__s1_878, __s1_878, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67343 | float16x8_t __rev2_878; __rev2_878 = __builtin_shufflevector(__s2_878, __s2_878, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67344 | float32x4_t __ret_878; \ |
| 67345 | __ret_878 = __noswap_vfmlalq_high_f16(__rev0_878, __rev1_878, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878), __noswap_vgetq_lane_f16(__rev2_878, __p3_878)}); \ |
| 67346 | __ret_878 = __builtin_shufflevector(__ret_878, __ret_878, 3, 2, 1, 0); \ |
| 67347 | __ret_878; \ |
| 65992 | 67348 | }) |
| 65993 | 67349 | #endif |
| 65994 | 67350 | |
| 65995 | 67351 | #ifdef __LITTLE_ENDIAN__ |
| 65996 | | #define vfmlal_laneq_high_f16(__p0_787, __p1_787, __p2_787, __p3_787) __extension__ ({ \ |
| 65997 | | float32x2_t __s0_787 = __p0_787; \ |
| 65998 | | float16x4_t __s1_787 = __p1_787; \ |
| 65999 | | float16x8_t __s2_787 = __p2_787; \ |
| 66000 | | float32x2_t __ret_787; \ |
| 66001 | | __ret_787 = vfmlal_high_f16(__s0_787, __s1_787, (float16x4_t) {vgetq_lane_f16(__s2_787, __p3_787), vgetq_lane_f16(__s2_787, __p3_787), vgetq_lane_f16(__s2_787, __p3_787), vgetq_lane_f16(__s2_787, __p3_787)}); \ |
| 66002 | | __ret_787; \ |
| 67352 | #define vfmlal_laneq_high_f16(__p0_879, __p1_879, __p2_879, __p3_879) __extension__ ({ \ |
| 67353 | float32x2_t __s0_879 = __p0_879; \ |
| 67354 | float16x4_t __s1_879 = __p1_879; \ |
| 67355 | float16x8_t __s2_879 = __p2_879; \ |
| 67356 | float32x2_t __ret_879; \ |
| 67357 | __ret_879 = vfmlal_high_f16(__s0_879, __s1_879, (float16x4_t) {vgetq_lane_f16(__s2_879, __p3_879), vgetq_lane_f16(__s2_879, __p3_879), vgetq_lane_f16(__s2_879, __p3_879), vgetq_lane_f16(__s2_879, __p3_879)}); \ |
| 67358 | __ret_879; \ |
| 66003 | 67359 | }) |
| 66004 | 67360 | #else |
| 66005 | | #define vfmlal_laneq_high_f16(__p0_788, __p1_788, __p2_788, __p3_788) __extension__ ({ \ |
| 66006 | | float32x2_t __s0_788 = __p0_788; \ |
| 66007 | | float16x4_t __s1_788 = __p1_788; \ |
| 66008 | | float16x8_t __s2_788 = __p2_788; \ |
| 66009 | | float32x2_t __rev0_788; __rev0_788 = __builtin_shufflevector(__s0_788, __s0_788, 1, 0); \ |
| 66010 | | float16x4_t __rev1_788; __rev1_788 = __builtin_shufflevector(__s1_788, __s1_788, 3, 2, 1, 0); \ |
| 66011 | | float16x8_t __rev2_788; __rev2_788 = __builtin_shufflevector(__s2_788, __s2_788, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66012 | | float32x2_t __ret_788; \ |
| 66013 | | __ret_788 = __noswap_vfmlal_high_f16(__rev0_788, __rev1_788, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_788, __p3_788), __noswap_vgetq_lane_f16(__rev2_788, __p3_788), __noswap_vgetq_lane_f16(__rev2_788, __p3_788), __noswap_vgetq_lane_f16(__rev2_788, __p3_788)}); \ |
| 66014 | | __ret_788 = __builtin_shufflevector(__ret_788, __ret_788, 1, 0); \ |
| 66015 | | __ret_788; \ |
| 67361 | #define vfmlal_laneq_high_f16(__p0_880, __p1_880, __p2_880, __p3_880) __extension__ ({ \ |
| 67362 | float32x2_t __s0_880 = __p0_880; \ |
| 67363 | float16x4_t __s1_880 = __p1_880; \ |
| 67364 | float16x8_t __s2_880 = __p2_880; \ |
| 67365 | float32x2_t __rev0_880; __rev0_880 = __builtin_shufflevector(__s0_880, __s0_880, 1, 0); \ |
| 67366 | float16x4_t __rev1_880; __rev1_880 = __builtin_shufflevector(__s1_880, __s1_880, 3, 2, 1, 0); \ |
| 67367 | float16x8_t __rev2_880; __rev2_880 = __builtin_shufflevector(__s2_880, __s2_880, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67368 | float32x2_t __ret_880; \ |
| 67369 | __ret_880 = __noswap_vfmlal_high_f16(__rev0_880, __rev1_880, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_880, __p3_880), __noswap_vgetq_lane_f16(__rev2_880, __p3_880), __noswap_vgetq_lane_f16(__rev2_880, __p3_880), __noswap_vgetq_lane_f16(__rev2_880, __p3_880)}); \ |
| 67370 | __ret_880 = __builtin_shufflevector(__ret_880, __ret_880, 1, 0); \ |
| 67371 | __ret_880; \ |
| 66016 | 67372 | }) |
| 66017 | 67373 | #endif |
| 66018 | 67374 | |
| 66019 | 67375 | #ifdef __LITTLE_ENDIAN__ |
| 66020 | | #define vfmlalq_laneq_low_f16(__p0_789, __p1_789, __p2_789, __p3_789) __extension__ ({ \ |
| 66021 | | float32x4_t __s0_789 = __p0_789; \ |
| 66022 | | float16x8_t __s1_789 = __p1_789; \ |
| 66023 | | float16x8_t __s2_789 = __p2_789; \ |
| 66024 | | float32x4_t __ret_789; \ |
| 66025 | | __ret_789 = vfmlalq_low_f16(__s0_789, __s1_789, (float16x8_t) {vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789), vgetq_lane_f16(__s2_789, __p3_789)}); \ |
| 66026 | | __ret_789; \ |
| 67376 | #define vfmlalq_laneq_low_f16(__p0_881, __p1_881, __p2_881, __p3_881) __extension__ ({ \ |
| 67377 | float32x4_t __s0_881 = __p0_881; \ |
| 67378 | float16x8_t __s1_881 = __p1_881; \ |
| 67379 | float16x8_t __s2_881 = __p2_881; \ |
| 67380 | float32x4_t __ret_881; \ |
| 67381 | __ret_881 = vfmlalq_low_f16(__s0_881, __s1_881, (float16x8_t) {vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881), vgetq_lane_f16(__s2_881, __p3_881)}); \ |
| 67382 | __ret_881; \ |
| 66027 | 67383 | }) |
| 66028 | 67384 | #else |
| 66029 | | #define vfmlalq_laneq_low_f16(__p0_790, __p1_790, __p2_790, __p3_790) __extension__ ({ \ |
| 66030 | | float32x4_t __s0_790 = __p0_790; \ |
| 66031 | | float16x8_t __s1_790 = __p1_790; \ |
| 66032 | | float16x8_t __s2_790 = __p2_790; \ |
| 66033 | | float32x4_t __rev0_790; __rev0_790 = __builtin_shufflevector(__s0_790, __s0_790, 3, 2, 1, 0); \ |
| 66034 | | float16x8_t __rev1_790; __rev1_790 = __builtin_shufflevector(__s1_790, __s1_790, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66035 | | float16x8_t __rev2_790; __rev2_790 = __builtin_shufflevector(__s2_790, __s2_790, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66036 | | float32x4_t __ret_790; \ |
| 66037 | | __ret_790 = __noswap_vfmlalq_low_f16(__rev0_790, __rev1_790, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790), __noswap_vgetq_lane_f16(__rev2_790, __p3_790)}); \ |
| 66038 | | __ret_790 = __builtin_shufflevector(__ret_790, __ret_790, 3, 2, 1, 0); \ |
| 66039 | | __ret_790; \ |
| 67385 | #define vfmlalq_laneq_low_f16(__p0_882, __p1_882, __p2_882, __p3_882) __extension__ ({ \ |
| 67386 | float32x4_t __s0_882 = __p0_882; \ |
| 67387 | float16x8_t __s1_882 = __p1_882; \ |
| 67388 | float16x8_t __s2_882 = __p2_882; \ |
| 67389 | float32x4_t __rev0_882; __rev0_882 = __builtin_shufflevector(__s0_882, __s0_882, 3, 2, 1, 0); \ |
| 67390 | float16x8_t __rev1_882; __rev1_882 = __builtin_shufflevector(__s1_882, __s1_882, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67391 | float16x8_t __rev2_882; __rev2_882 = __builtin_shufflevector(__s2_882, __s2_882, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67392 | float32x4_t __ret_882; \ |
| 67393 | __ret_882 = __noswap_vfmlalq_low_f16(__rev0_882, __rev1_882, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882), __noswap_vgetq_lane_f16(__rev2_882, __p3_882)}); \ |
| 67394 | __ret_882 = __builtin_shufflevector(__ret_882, __ret_882, 3, 2, 1, 0); \ |
| 67395 | __ret_882; \ |
| 66040 | 67396 | }) |
| 66041 | 67397 | #endif |
| 66042 | 67398 | |
| 66043 | 67399 | #ifdef __LITTLE_ENDIAN__ |
| 66044 | | #define vfmlal_laneq_low_f16(__p0_791, __p1_791, __p2_791, __p3_791) __extension__ ({ \ |
| 66045 | | float32x2_t __s0_791 = __p0_791; \ |
| 66046 | | float16x4_t __s1_791 = __p1_791; \ |
| 66047 | | float16x8_t __s2_791 = __p2_791; \ |
| 66048 | | float32x2_t __ret_791; \ |
| 66049 | | __ret_791 = vfmlal_low_f16(__s0_791, __s1_791, (float16x4_t) {vgetq_lane_f16(__s2_791, __p3_791), vgetq_lane_f16(__s2_791, __p3_791), vgetq_lane_f16(__s2_791, __p3_791), vgetq_lane_f16(__s2_791, __p3_791)}); \ |
| 66050 | | __ret_791; \ |
| 67400 | #define vfmlal_laneq_low_f16(__p0_883, __p1_883, __p2_883, __p3_883) __extension__ ({ \ |
| 67401 | float32x2_t __s0_883 = __p0_883; \ |
| 67402 | float16x4_t __s1_883 = __p1_883; \ |
| 67403 | float16x8_t __s2_883 = __p2_883; \ |
| 67404 | float32x2_t __ret_883; \ |
| 67405 | __ret_883 = vfmlal_low_f16(__s0_883, __s1_883, (float16x4_t) {vgetq_lane_f16(__s2_883, __p3_883), vgetq_lane_f16(__s2_883, __p3_883), vgetq_lane_f16(__s2_883, __p3_883), vgetq_lane_f16(__s2_883, __p3_883)}); \ |
| 67406 | __ret_883; \ |
| 66051 | 67407 | }) |
| 66052 | 67408 | #else |
| 66053 | | #define vfmlal_laneq_low_f16(__p0_792, __p1_792, __p2_792, __p3_792) __extension__ ({ \ |
| 66054 | | float32x2_t __s0_792 = __p0_792; \ |
| 66055 | | float16x4_t __s1_792 = __p1_792; \ |
| 66056 | | float16x8_t __s2_792 = __p2_792; \ |
| 66057 | | float32x2_t __rev0_792; __rev0_792 = __builtin_shufflevector(__s0_792, __s0_792, 1, 0); \ |
| 66058 | | float16x4_t __rev1_792; __rev1_792 = __builtin_shufflevector(__s1_792, __s1_792, 3, 2, 1, 0); \ |
| 66059 | | float16x8_t __rev2_792; __rev2_792 = __builtin_shufflevector(__s2_792, __s2_792, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66060 | | float32x2_t __ret_792; \ |
| 66061 | | __ret_792 = __noswap_vfmlal_low_f16(__rev0_792, __rev1_792, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_792, __p3_792), __noswap_vgetq_lane_f16(__rev2_792, __p3_792), __noswap_vgetq_lane_f16(__rev2_792, __p3_792), __noswap_vgetq_lane_f16(__rev2_792, __p3_792)}); \ |
| 66062 | | __ret_792 = __builtin_shufflevector(__ret_792, __ret_792, 1, 0); \ |
| 66063 | | __ret_792; \ |
| 67409 | #define vfmlal_laneq_low_f16(__p0_884, __p1_884, __p2_884, __p3_884) __extension__ ({ \ |
| 67410 | float32x2_t __s0_884 = __p0_884; \ |
| 67411 | float16x4_t __s1_884 = __p1_884; \ |
| 67412 | float16x8_t __s2_884 = __p2_884; \ |
| 67413 | float32x2_t __rev0_884; __rev0_884 = __builtin_shufflevector(__s0_884, __s0_884, 1, 0); \ |
| 67414 | float16x4_t __rev1_884; __rev1_884 = __builtin_shufflevector(__s1_884, __s1_884, 3, 2, 1, 0); \ |
| 67415 | float16x8_t __rev2_884; __rev2_884 = __builtin_shufflevector(__s2_884, __s2_884, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67416 | float32x2_t __ret_884; \ |
| 67417 | __ret_884 = __noswap_vfmlal_low_f16(__rev0_884, __rev1_884, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_884, __p3_884), __noswap_vgetq_lane_f16(__rev2_884, __p3_884), __noswap_vgetq_lane_f16(__rev2_884, __p3_884), __noswap_vgetq_lane_f16(__rev2_884, __p3_884)}); \ |
| 67418 | __ret_884 = __builtin_shufflevector(__ret_884, __ret_884, 1, 0); \ |
| 67419 | __ret_884; \ |
| 66064 | 67420 | }) |
| 66065 | 67421 | #endif |
| 66066 | 67422 | |
| 66067 | 67423 | #ifdef __LITTLE_ENDIAN__ |
| 66068 | | #define vfmlslq_lane_high_f16(__p0_793, __p1_793, __p2_793, __p3_793) __extension__ ({ \ |
| 66069 | | float32x4_t __s0_793 = __p0_793; \ |
| 66070 | | float16x8_t __s1_793 = __p1_793; \ |
| 66071 | | float16x4_t __s2_793 = __p2_793; \ |
| 66072 | | float32x4_t __ret_793; \ |
| 66073 | | __ret_793 = vfmlslq_high_f16(__s0_793, __s1_793, (float16x8_t) {vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793), vget_lane_f16(__s2_793, __p3_793)}); \ |
| 66074 | | __ret_793; \ |
| 67424 | #define vfmlslq_lane_high_f16(__p0_885, __p1_885, __p2_885, __p3_885) __extension__ ({ \ |
| 67425 | float32x4_t __s0_885 = __p0_885; \ |
| 67426 | float16x8_t __s1_885 = __p1_885; \ |
| 67427 | float16x4_t __s2_885 = __p2_885; \ |
| 67428 | float32x4_t __ret_885; \ |
| 67429 | __ret_885 = vfmlslq_high_f16(__s0_885, __s1_885, (float16x8_t) {vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885), vget_lane_f16(__s2_885, __p3_885)}); \ |
| 67430 | __ret_885; \ |
| 66075 | 67431 | }) |
| 66076 | 67432 | #else |
| 66077 | | #define vfmlslq_lane_high_f16(__p0_794, __p1_794, __p2_794, __p3_794) __extension__ ({ \ |
| 66078 | | float32x4_t __s0_794 = __p0_794; \ |
| 66079 | | float16x8_t __s1_794 = __p1_794; \ |
| 66080 | | float16x4_t __s2_794 = __p2_794; \ |
| 66081 | | float32x4_t __rev0_794; __rev0_794 = __builtin_shufflevector(__s0_794, __s0_794, 3, 2, 1, 0); \ |
| 66082 | | float16x8_t __rev1_794; __rev1_794 = __builtin_shufflevector(__s1_794, __s1_794, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66083 | | float16x4_t __rev2_794; __rev2_794 = __builtin_shufflevector(__s2_794, __s2_794, 3, 2, 1, 0); \ |
| 66084 | | float32x4_t __ret_794; \ |
| 66085 | | __ret_794 = __noswap_vfmlslq_high_f16(__rev0_794, __rev1_794, (float16x8_t) {__noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794), __noswap_vget_lane_f16(__rev2_794, __p3_794)}); \ |
| 66086 | | __ret_794 = __builtin_shufflevector(__ret_794, __ret_794, 3, 2, 1, 0); \ |
| 66087 | | __ret_794; \ |
| 67433 | #define vfmlslq_lane_high_f16(__p0_886, __p1_886, __p2_886, __p3_886) __extension__ ({ \ |
| 67434 | float32x4_t __s0_886 = __p0_886; \ |
| 67435 | float16x8_t __s1_886 = __p1_886; \ |
| 67436 | float16x4_t __s2_886 = __p2_886; \ |
| 67437 | float32x4_t __rev0_886; __rev0_886 = __builtin_shufflevector(__s0_886, __s0_886, 3, 2, 1, 0); \ |
| 67438 | float16x8_t __rev1_886; __rev1_886 = __builtin_shufflevector(__s1_886, __s1_886, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67439 | float16x4_t __rev2_886; __rev2_886 = __builtin_shufflevector(__s2_886, __s2_886, 3, 2, 1, 0); \ |
| 67440 | float32x4_t __ret_886; \ |
| 67441 | __ret_886 = __noswap_vfmlslq_high_f16(__rev0_886, __rev1_886, (float16x8_t) {__noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886), __noswap_vget_lane_f16(__rev2_886, __p3_886)}); \ |
| 67442 | __ret_886 = __builtin_shufflevector(__ret_886, __ret_886, 3, 2, 1, 0); \ |
| 67443 | __ret_886; \ |
| 66088 | 67444 | }) |
| 66089 | 67445 | #endif |
| 66090 | 67446 | |
| 66091 | 67447 | #ifdef __LITTLE_ENDIAN__ |
| 66092 | | #define vfmlsl_lane_high_f16(__p0_795, __p1_795, __p2_795, __p3_795) __extension__ ({ \ |
| 66093 | | float32x2_t __s0_795 = __p0_795; \ |
| 66094 | | float16x4_t __s1_795 = __p1_795; \ |
| 66095 | | float16x4_t __s2_795 = __p2_795; \ |
| 66096 | | float32x2_t __ret_795; \ |
| 66097 | | __ret_795 = vfmlsl_high_f16(__s0_795, __s1_795, (float16x4_t) {vget_lane_f16(__s2_795, __p3_795), vget_lane_f16(__s2_795, __p3_795), vget_lane_f16(__s2_795, __p3_795), vget_lane_f16(__s2_795, __p3_795)}); \ |
| 66098 | | __ret_795; \ |
| 67448 | #define vfmlsl_lane_high_f16(__p0_887, __p1_887, __p2_887, __p3_887) __extension__ ({ \ |
| 67449 | float32x2_t __s0_887 = __p0_887; \ |
| 67450 | float16x4_t __s1_887 = __p1_887; \ |
| 67451 | float16x4_t __s2_887 = __p2_887; \ |
| 67452 | float32x2_t __ret_887; \ |
| 67453 | __ret_887 = vfmlsl_high_f16(__s0_887, __s1_887, (float16x4_t) {vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887), vget_lane_f16(__s2_887, __p3_887)}); \ |
| 67454 | __ret_887; \ |
| 66099 | 67455 | }) |
| 66100 | 67456 | #else |
| 66101 | | #define vfmlsl_lane_high_f16(__p0_796, __p1_796, __p2_796, __p3_796) __extension__ ({ \ |
| 66102 | | float32x2_t __s0_796 = __p0_796; \ |
| 66103 | | float16x4_t __s1_796 = __p1_796; \ |
| 66104 | | float16x4_t __s2_796 = __p2_796; \ |
| 66105 | | float32x2_t __rev0_796; __rev0_796 = __builtin_shufflevector(__s0_796, __s0_796, 1, 0); \ |
| 66106 | | float16x4_t __rev1_796; __rev1_796 = __builtin_shufflevector(__s1_796, __s1_796, 3, 2, 1, 0); \ |
| 66107 | | float16x4_t __rev2_796; __rev2_796 = __builtin_shufflevector(__s2_796, __s2_796, 3, 2, 1, 0); \ |
| 66108 | | float32x2_t __ret_796; \ |
| 66109 | | __ret_796 = __noswap_vfmlsl_high_f16(__rev0_796, __rev1_796, (float16x4_t) {__noswap_vget_lane_f16(__rev2_796, __p3_796), __noswap_vget_lane_f16(__rev2_796, __p3_796), __noswap_vget_lane_f16(__rev2_796, __p3_796), __noswap_vget_lane_f16(__rev2_796, __p3_796)}); \ |
| 66110 | | __ret_796 = __builtin_shufflevector(__ret_796, __ret_796, 1, 0); \ |
| 66111 | | __ret_796; \ |
| 67457 | #define vfmlsl_lane_high_f16(__p0_888, __p1_888, __p2_888, __p3_888) __extension__ ({ \ |
| 67458 | float32x2_t __s0_888 = __p0_888; \ |
| 67459 | float16x4_t __s1_888 = __p1_888; \ |
| 67460 | float16x4_t __s2_888 = __p2_888; \ |
| 67461 | float32x2_t __rev0_888; __rev0_888 = __builtin_shufflevector(__s0_888, __s0_888, 1, 0); \ |
| 67462 | float16x4_t __rev1_888; __rev1_888 = __builtin_shufflevector(__s1_888, __s1_888, 3, 2, 1, 0); \ |
| 67463 | float16x4_t __rev2_888; __rev2_888 = __builtin_shufflevector(__s2_888, __s2_888, 3, 2, 1, 0); \ |
| 67464 | float32x2_t __ret_888; \ |
| 67465 | __ret_888 = __noswap_vfmlsl_high_f16(__rev0_888, __rev1_888, (float16x4_t) {__noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888), __noswap_vget_lane_f16(__rev2_888, __p3_888)}); \ |
| 67466 | __ret_888 = __builtin_shufflevector(__ret_888, __ret_888, 1, 0); \ |
| 67467 | __ret_888; \ |
| 66112 | 67468 | }) |
| 66113 | 67469 | #endif |
| 66114 | 67470 | |
| 66115 | 67471 | #ifdef __LITTLE_ENDIAN__ |
| 66116 | | #define vfmlslq_lane_low_f16(__p0_797, __p1_797, __p2_797, __p3_797) __extension__ ({ \ |
| 66117 | | float32x4_t __s0_797 = __p0_797; \ |
| 66118 | | float16x8_t __s1_797 = __p1_797; \ |
| 66119 | | float16x4_t __s2_797 = __p2_797; \ |
| 66120 | | float32x4_t __ret_797; \ |
| 66121 | | __ret_797 = vfmlslq_low_f16(__s0_797, __s1_797, (float16x8_t) {vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797), vget_lane_f16(__s2_797, __p3_797)}); \ |
| 66122 | | __ret_797; \ |
| 67472 | #define vfmlslq_lane_low_f16(__p0_889, __p1_889, __p2_889, __p3_889) __extension__ ({ \ |
| 67473 | float32x4_t __s0_889 = __p0_889; \ |
| 67474 | float16x8_t __s1_889 = __p1_889; \ |
| 67475 | float16x4_t __s2_889 = __p2_889; \ |
| 67476 | float32x4_t __ret_889; \ |
| 67477 | __ret_889 = vfmlslq_low_f16(__s0_889, __s1_889, (float16x8_t) {vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889), vget_lane_f16(__s2_889, __p3_889)}); \ |
| 67478 | __ret_889; \ |
| 66123 | 67479 | }) |
| 66124 | 67480 | #else |
| 66125 | | #define vfmlslq_lane_low_f16(__p0_798, __p1_798, __p2_798, __p3_798) __extension__ ({ \ |
| 66126 | | float32x4_t __s0_798 = __p0_798; \ |
| 66127 | | float16x8_t __s1_798 = __p1_798; \ |
| 66128 | | float16x4_t __s2_798 = __p2_798; \ |
| 66129 | | float32x4_t __rev0_798; __rev0_798 = __builtin_shufflevector(__s0_798, __s0_798, 3, 2, 1, 0); \ |
| 66130 | | float16x8_t __rev1_798; __rev1_798 = __builtin_shufflevector(__s1_798, __s1_798, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66131 | | float16x4_t __rev2_798; __rev2_798 = __builtin_shufflevector(__s2_798, __s2_798, 3, 2, 1, 0); \ |
| 66132 | | float32x4_t __ret_798; \ |
| 66133 | | __ret_798 = __noswap_vfmlslq_low_f16(__rev0_798, __rev1_798, (float16x8_t) {__noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798), __noswap_vget_lane_f16(__rev2_798, __p3_798)}); \ |
| 66134 | | __ret_798 = __builtin_shufflevector(__ret_798, __ret_798, 3, 2, 1, 0); \ |
| 66135 | | __ret_798; \ |
| 67481 | #define vfmlslq_lane_low_f16(__p0_890, __p1_890, __p2_890, __p3_890) __extension__ ({ \ |
| 67482 | float32x4_t __s0_890 = __p0_890; \ |
| 67483 | float16x8_t __s1_890 = __p1_890; \ |
| 67484 | float16x4_t __s2_890 = __p2_890; \ |
| 67485 | float32x4_t __rev0_890; __rev0_890 = __builtin_shufflevector(__s0_890, __s0_890, 3, 2, 1, 0); \ |
| 67486 | float16x8_t __rev1_890; __rev1_890 = __builtin_shufflevector(__s1_890, __s1_890, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67487 | float16x4_t __rev2_890; __rev2_890 = __builtin_shufflevector(__s2_890, __s2_890, 3, 2, 1, 0); \ |
| 67488 | float32x4_t __ret_890; \ |
| 67489 | __ret_890 = __noswap_vfmlslq_low_f16(__rev0_890, __rev1_890, (float16x8_t) {__noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890), __noswap_vget_lane_f16(__rev2_890, __p3_890)}); \ |
| 67490 | __ret_890 = __builtin_shufflevector(__ret_890, __ret_890, 3, 2, 1, 0); \ |
| 67491 | __ret_890; \ |
| 66136 | 67492 | }) |
| 66137 | 67493 | #endif |
| 66138 | 67494 | |
| 66139 | 67495 | #ifdef __LITTLE_ENDIAN__ |
| 66140 | | #define vfmlsl_lane_low_f16(__p0_799, __p1_799, __p2_799, __p3_799) __extension__ ({ \ |
| 66141 | | float32x2_t __s0_799 = __p0_799; \ |
| 66142 | | float16x4_t __s1_799 = __p1_799; \ |
| 66143 | | float16x4_t __s2_799 = __p2_799; \ |
| 66144 | | float32x2_t __ret_799; \ |
| 66145 | | __ret_799 = vfmlsl_low_f16(__s0_799, __s1_799, (float16x4_t) {vget_lane_f16(__s2_799, __p3_799), vget_lane_f16(__s2_799, __p3_799), vget_lane_f16(__s2_799, __p3_799), vget_lane_f16(__s2_799, __p3_799)}); \ |
| 66146 | | __ret_799; \ |
| 67496 | #define vfmlsl_lane_low_f16(__p0_891, __p1_891, __p2_891, __p3_891) __extension__ ({ \ |
| 67497 | float32x2_t __s0_891 = __p0_891; \ |
| 67498 | float16x4_t __s1_891 = __p1_891; \ |
| 67499 | float16x4_t __s2_891 = __p2_891; \ |
| 67500 | float32x2_t __ret_891; \ |
| 67501 | __ret_891 = vfmlsl_low_f16(__s0_891, __s1_891, (float16x4_t) {vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891), vget_lane_f16(__s2_891, __p3_891)}); \ |
| 67502 | __ret_891; \ |
| 66147 | 67503 | }) |
| 66148 | 67504 | #else |
| 66149 | | #define vfmlsl_lane_low_f16(__p0_800, __p1_800, __p2_800, __p3_800) __extension__ ({ \ |
| 66150 | | float32x2_t __s0_800 = __p0_800; \ |
| 66151 | | float16x4_t __s1_800 = __p1_800; \ |
| 66152 | | float16x4_t __s2_800 = __p2_800; \ |
| 66153 | | float32x2_t __rev0_800; __rev0_800 = __builtin_shufflevector(__s0_800, __s0_800, 1, 0); \ |
| 66154 | | float16x4_t __rev1_800; __rev1_800 = __builtin_shufflevector(__s1_800, __s1_800, 3, 2, 1, 0); \ |
| 66155 | | float16x4_t __rev2_800; __rev2_800 = __builtin_shufflevector(__s2_800, __s2_800, 3, 2, 1, 0); \ |
| 66156 | | float32x2_t __ret_800; \ |
| 66157 | | __ret_800 = __noswap_vfmlsl_low_f16(__rev0_800, __rev1_800, (float16x4_t) {__noswap_vget_lane_f16(__rev2_800, __p3_800), __noswap_vget_lane_f16(__rev2_800, __p3_800), __noswap_vget_lane_f16(__rev2_800, __p3_800), __noswap_vget_lane_f16(__rev2_800, __p3_800)}); \ |
| 66158 | | __ret_800 = __builtin_shufflevector(__ret_800, __ret_800, 1, 0); \ |
| 66159 | | __ret_800; \ |
| 67505 | #define vfmlsl_lane_low_f16(__p0_892, __p1_892, __p2_892, __p3_892) __extension__ ({ \ |
| 67506 | float32x2_t __s0_892 = __p0_892; \ |
| 67507 | float16x4_t __s1_892 = __p1_892; \ |
| 67508 | float16x4_t __s2_892 = __p2_892; \ |
| 67509 | float32x2_t __rev0_892; __rev0_892 = __builtin_shufflevector(__s0_892, __s0_892, 1, 0); \ |
| 67510 | float16x4_t __rev1_892; __rev1_892 = __builtin_shufflevector(__s1_892, __s1_892, 3, 2, 1, 0); \ |
| 67511 | float16x4_t __rev2_892; __rev2_892 = __builtin_shufflevector(__s2_892, __s2_892, 3, 2, 1, 0); \ |
| 67512 | float32x2_t __ret_892; \ |
| 67513 | __ret_892 = __noswap_vfmlsl_low_f16(__rev0_892, __rev1_892, (float16x4_t) {__noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892), __noswap_vget_lane_f16(__rev2_892, __p3_892)}); \ |
| 67514 | __ret_892 = __builtin_shufflevector(__ret_892, __ret_892, 1, 0); \ |
| 67515 | __ret_892; \ |
| 66160 | 67516 | }) |
| 66161 | 67517 | #endif |
| 66162 | 67518 | |
| 66163 | 67519 | #ifdef __LITTLE_ENDIAN__ |
| 66164 | | #define vfmlslq_laneq_high_f16(__p0_801, __p1_801, __p2_801, __p3_801) __extension__ ({ \ |
| 66165 | | float32x4_t __s0_801 = __p0_801; \ |
| 66166 | | float16x8_t __s1_801 = __p1_801; \ |
| 66167 | | float16x8_t __s2_801 = __p2_801; \ |
| 66168 | | float32x4_t __ret_801; \ |
| 66169 | | __ret_801 = vfmlslq_high_f16(__s0_801, __s1_801, (float16x8_t) {vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801), vgetq_lane_f16(__s2_801, __p3_801)}); \ |
| 66170 | | __ret_801; \ |
| 67520 | #define vfmlslq_laneq_high_f16(__p0_893, __p1_893, __p2_893, __p3_893) __extension__ ({ \ |
| 67521 | float32x4_t __s0_893 = __p0_893; \ |
| 67522 | float16x8_t __s1_893 = __p1_893; \ |
| 67523 | float16x8_t __s2_893 = __p2_893; \ |
| 67524 | float32x4_t __ret_893; \ |
| 67525 | __ret_893 = vfmlslq_high_f16(__s0_893, __s1_893, (float16x8_t) {vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893), vgetq_lane_f16(__s2_893, __p3_893)}); \ |
| 67526 | __ret_893; \ |
| 66171 | 67527 | }) |
| 66172 | 67528 | #else |
| 66173 | | #define vfmlslq_laneq_high_f16(__p0_802, __p1_802, __p2_802, __p3_802) __extension__ ({ \ |
| 66174 | | float32x4_t __s0_802 = __p0_802; \ |
| 66175 | | float16x8_t __s1_802 = __p1_802; \ |
| 66176 | | float16x8_t __s2_802 = __p2_802; \ |
| 66177 | | float32x4_t __rev0_802; __rev0_802 = __builtin_shufflevector(__s0_802, __s0_802, 3, 2, 1, 0); \ |
| 66178 | | float16x8_t __rev1_802; __rev1_802 = __builtin_shufflevector(__s1_802, __s1_802, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66179 | | float16x8_t __rev2_802; __rev2_802 = __builtin_shufflevector(__s2_802, __s2_802, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66180 | | float32x4_t __ret_802; \ |
| 66181 | | __ret_802 = __noswap_vfmlslq_high_f16(__rev0_802, __rev1_802, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802), __noswap_vgetq_lane_f16(__rev2_802, __p3_802)}); \ |
| 66182 | | __ret_802 = __builtin_shufflevector(__ret_802, __ret_802, 3, 2, 1, 0); \ |
| 66183 | | __ret_802; \ |
| 67529 | #define vfmlslq_laneq_high_f16(__p0_894, __p1_894, __p2_894, __p3_894) __extension__ ({ \ |
| 67530 | float32x4_t __s0_894 = __p0_894; \ |
| 67531 | float16x8_t __s1_894 = __p1_894; \ |
| 67532 | float16x8_t __s2_894 = __p2_894; \ |
| 67533 | float32x4_t __rev0_894; __rev0_894 = __builtin_shufflevector(__s0_894, __s0_894, 3, 2, 1, 0); \ |
| 67534 | float16x8_t __rev1_894; __rev1_894 = __builtin_shufflevector(__s1_894, __s1_894, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67535 | float16x8_t __rev2_894; __rev2_894 = __builtin_shufflevector(__s2_894, __s2_894, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67536 | float32x4_t __ret_894; \ |
| 67537 | __ret_894 = __noswap_vfmlslq_high_f16(__rev0_894, __rev1_894, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894), __noswap_vgetq_lane_f16(__rev2_894, __p3_894)}); \ |
| 67538 | __ret_894 = __builtin_shufflevector(__ret_894, __ret_894, 3, 2, 1, 0); \ |
| 67539 | __ret_894; \ |
| 66184 | 67540 | }) |
| 66185 | 67541 | #endif |
| 66186 | 67542 | |
| 66187 | 67543 | #ifdef __LITTLE_ENDIAN__ |
| 66188 | | #define vfmlsl_laneq_high_f16(__p0_803, __p1_803, __p2_803, __p3_803) __extension__ ({ \ |
| 66189 | | float32x2_t __s0_803 = __p0_803; \ |
| 66190 | | float16x4_t __s1_803 = __p1_803; \ |
| 66191 | | float16x8_t __s2_803 = __p2_803; \ |
| 66192 | | float32x2_t __ret_803; \ |
| 66193 | | __ret_803 = vfmlsl_high_f16(__s0_803, __s1_803, (float16x4_t) {vgetq_lane_f16(__s2_803, __p3_803), vgetq_lane_f16(__s2_803, __p3_803), vgetq_lane_f16(__s2_803, __p3_803), vgetq_lane_f16(__s2_803, __p3_803)}); \ |
| 66194 | | __ret_803; \ |
| 67544 | #define vfmlsl_laneq_high_f16(__p0_895, __p1_895, __p2_895, __p3_895) __extension__ ({ \ |
| 67545 | float32x2_t __s0_895 = __p0_895; \ |
| 67546 | float16x4_t __s1_895 = __p1_895; \ |
| 67547 | float16x8_t __s2_895 = __p2_895; \ |
| 67548 | float32x2_t __ret_895; \ |
| 67549 | __ret_895 = vfmlsl_high_f16(__s0_895, __s1_895, (float16x4_t) {vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895), vgetq_lane_f16(__s2_895, __p3_895)}); \ |
| 67550 | __ret_895; \ |
| 66195 | 67551 | }) |
| 66196 | 67552 | #else |
| 66197 | | #define vfmlsl_laneq_high_f16(__p0_804, __p1_804, __p2_804, __p3_804) __extension__ ({ \ |
| 66198 | | float32x2_t __s0_804 = __p0_804; \ |
| 66199 | | float16x4_t __s1_804 = __p1_804; \ |
| 66200 | | float16x8_t __s2_804 = __p2_804; \ |
| 66201 | | float32x2_t __rev0_804; __rev0_804 = __builtin_shufflevector(__s0_804, __s0_804, 1, 0); \ |
| 66202 | | float16x4_t __rev1_804; __rev1_804 = __builtin_shufflevector(__s1_804, __s1_804, 3, 2, 1, 0); \ |
| 66203 | | float16x8_t __rev2_804; __rev2_804 = __builtin_shufflevector(__s2_804, __s2_804, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66204 | | float32x2_t __ret_804; \ |
| 66205 | | __ret_804 = __noswap_vfmlsl_high_f16(__rev0_804, __rev1_804, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_804, __p3_804), __noswap_vgetq_lane_f16(__rev2_804, __p3_804), __noswap_vgetq_lane_f16(__rev2_804, __p3_804), __noswap_vgetq_lane_f16(__rev2_804, __p3_804)}); \ |
| 66206 | | __ret_804 = __builtin_shufflevector(__ret_804, __ret_804, 1, 0); \ |
| 66207 | | __ret_804; \ |
| 67553 | #define vfmlsl_laneq_high_f16(__p0_896, __p1_896, __p2_896, __p3_896) __extension__ ({ \ |
| 67554 | float32x2_t __s0_896 = __p0_896; \ |
| 67555 | float16x4_t __s1_896 = __p1_896; \ |
| 67556 | float16x8_t __s2_896 = __p2_896; \ |
| 67557 | float32x2_t __rev0_896; __rev0_896 = __builtin_shufflevector(__s0_896, __s0_896, 1, 0); \ |
| 67558 | float16x4_t __rev1_896; __rev1_896 = __builtin_shufflevector(__s1_896, __s1_896, 3, 2, 1, 0); \ |
| 67559 | float16x8_t __rev2_896; __rev2_896 = __builtin_shufflevector(__s2_896, __s2_896, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67560 | float32x2_t __ret_896; \ |
| 67561 | __ret_896 = __noswap_vfmlsl_high_f16(__rev0_896, __rev1_896, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896), __noswap_vgetq_lane_f16(__rev2_896, __p3_896)}); \ |
| 67562 | __ret_896 = __builtin_shufflevector(__ret_896, __ret_896, 1, 0); \ |
| 67563 | __ret_896; \ |
| 66208 | 67564 | }) |
| 66209 | 67565 | #endif |
| 66210 | 67566 | |
| 66211 | 67567 | #ifdef __LITTLE_ENDIAN__ |
| 66212 | | #define vfmlslq_laneq_low_f16(__p0_805, __p1_805, __p2_805, __p3_805) __extension__ ({ \ |
| 66213 | | float32x4_t __s0_805 = __p0_805; \ |
| 66214 | | float16x8_t __s1_805 = __p1_805; \ |
| 66215 | | float16x8_t __s2_805 = __p2_805; \ |
| 66216 | | float32x4_t __ret_805; \ |
| 66217 | | __ret_805 = vfmlslq_low_f16(__s0_805, __s1_805, (float16x8_t) {vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805), vgetq_lane_f16(__s2_805, __p3_805)}); \ |
| 66218 | | __ret_805; \ |
| 67568 | #define vfmlslq_laneq_low_f16(__p0_897, __p1_897, __p2_897, __p3_897) __extension__ ({ \ |
| 67569 | float32x4_t __s0_897 = __p0_897; \ |
| 67570 | float16x8_t __s1_897 = __p1_897; \ |
| 67571 | float16x8_t __s2_897 = __p2_897; \ |
| 67572 | float32x4_t __ret_897; \ |
| 67573 | __ret_897 = vfmlslq_low_f16(__s0_897, __s1_897, (float16x8_t) {vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897), vgetq_lane_f16(__s2_897, __p3_897)}); \ |
| 67574 | __ret_897; \ |
| 66219 | 67575 | }) |
| 66220 | 67576 | #else |
| 66221 | | #define vfmlslq_laneq_low_f16(__p0_806, __p1_806, __p2_806, __p3_806) __extension__ ({ \ |
| 66222 | | float32x4_t __s0_806 = __p0_806; \ |
| 66223 | | float16x8_t __s1_806 = __p1_806; \ |
| 66224 | | float16x8_t __s2_806 = __p2_806; \ |
| 66225 | | float32x4_t __rev0_806; __rev0_806 = __builtin_shufflevector(__s0_806, __s0_806, 3, 2, 1, 0); \ |
| 66226 | | float16x8_t __rev1_806; __rev1_806 = __builtin_shufflevector(__s1_806, __s1_806, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66227 | | float16x8_t __rev2_806; __rev2_806 = __builtin_shufflevector(__s2_806, __s2_806, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66228 | | float32x4_t __ret_806; \ |
| 66229 | | __ret_806 = __noswap_vfmlslq_low_f16(__rev0_806, __rev1_806, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806), __noswap_vgetq_lane_f16(__rev2_806, __p3_806)}); \ |
| 66230 | | __ret_806 = __builtin_shufflevector(__ret_806, __ret_806, 3, 2, 1, 0); \ |
| 66231 | | __ret_806; \ |
| 67577 | #define vfmlslq_laneq_low_f16(__p0_898, __p1_898, __p2_898, __p3_898) __extension__ ({ \ |
| 67578 | float32x4_t __s0_898 = __p0_898; \ |
| 67579 | float16x8_t __s1_898 = __p1_898; \ |
| 67580 | float16x8_t __s2_898 = __p2_898; \ |
| 67581 | float32x4_t __rev0_898; __rev0_898 = __builtin_shufflevector(__s0_898, __s0_898, 3, 2, 1, 0); \ |
| 67582 | float16x8_t __rev1_898; __rev1_898 = __builtin_shufflevector(__s1_898, __s1_898, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67583 | float16x8_t __rev2_898; __rev2_898 = __builtin_shufflevector(__s2_898, __s2_898, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67584 | float32x4_t __ret_898; \ |
| 67585 | __ret_898 = __noswap_vfmlslq_low_f16(__rev0_898, __rev1_898, (float16x8_t) {__noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898), __noswap_vgetq_lane_f16(__rev2_898, __p3_898)}); \ |
| 67586 | __ret_898 = __builtin_shufflevector(__ret_898, __ret_898, 3, 2, 1, 0); \ |
| 67587 | __ret_898; \ |
| 66232 | 67588 | }) |
| 66233 | 67589 | #endif |
| 66234 | 67590 | |
| 66235 | 67591 | #ifdef __LITTLE_ENDIAN__ |
| 66236 | | #define vfmlsl_laneq_low_f16(__p0_807, __p1_807, __p2_807, __p3_807) __extension__ ({ \ |
| 66237 | | float32x2_t __s0_807 = __p0_807; \ |
| 66238 | | float16x4_t __s1_807 = __p1_807; \ |
| 66239 | | float16x8_t __s2_807 = __p2_807; \ |
| 66240 | | float32x2_t __ret_807; \ |
| 66241 | | __ret_807 = vfmlsl_low_f16(__s0_807, __s1_807, (float16x4_t) {vgetq_lane_f16(__s2_807, __p3_807), vgetq_lane_f16(__s2_807, __p3_807), vgetq_lane_f16(__s2_807, __p3_807), vgetq_lane_f16(__s2_807, __p3_807)}); \ |
| 66242 | | __ret_807; \ |
| 67592 | #define vfmlsl_laneq_low_f16(__p0_899, __p1_899, __p2_899, __p3_899) __extension__ ({ \ |
| 67593 | float32x2_t __s0_899 = __p0_899; \ |
| 67594 | float16x4_t __s1_899 = __p1_899; \ |
| 67595 | float16x8_t __s2_899 = __p2_899; \ |
| 67596 | float32x2_t __ret_899; \ |
| 67597 | __ret_899 = vfmlsl_low_f16(__s0_899, __s1_899, (float16x4_t) {vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899), vgetq_lane_f16(__s2_899, __p3_899)}); \ |
| 67598 | __ret_899; \ |
| 66243 | 67599 | }) |
| 66244 | 67600 | #else |
| 66245 | | #define vfmlsl_laneq_low_f16(__p0_808, __p1_808, __p2_808, __p3_808) __extension__ ({ \ |
| 66246 | | float32x2_t __s0_808 = __p0_808; \ |
| 66247 | | float16x4_t __s1_808 = __p1_808; \ |
| 66248 | | float16x8_t __s2_808 = __p2_808; \ |
| 66249 | | float32x2_t __rev0_808; __rev0_808 = __builtin_shufflevector(__s0_808, __s0_808, 1, 0); \ |
| 66250 | | float16x4_t __rev1_808; __rev1_808 = __builtin_shufflevector(__s1_808, __s1_808, 3, 2, 1, 0); \ |
| 66251 | | float16x8_t __rev2_808; __rev2_808 = __builtin_shufflevector(__s2_808, __s2_808, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66252 | | float32x2_t __ret_808; \ |
| 66253 | | __ret_808 = __noswap_vfmlsl_low_f16(__rev0_808, __rev1_808, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_808, __p3_808), __noswap_vgetq_lane_f16(__rev2_808, __p3_808), __noswap_vgetq_lane_f16(__rev2_808, __p3_808), __noswap_vgetq_lane_f16(__rev2_808, __p3_808)}); \ |
| 66254 | | __ret_808 = __builtin_shufflevector(__ret_808, __ret_808, 1, 0); \ |
| 66255 | | __ret_808; \ |
| 67601 | #define vfmlsl_laneq_low_f16(__p0_900, __p1_900, __p2_900, __p3_900) __extension__ ({ \ |
| 67602 | float32x2_t __s0_900 = __p0_900; \ |
| 67603 | float16x4_t __s1_900 = __p1_900; \ |
| 67604 | float16x8_t __s2_900 = __p2_900; \ |
| 67605 | float32x2_t __rev0_900; __rev0_900 = __builtin_shufflevector(__s0_900, __s0_900, 1, 0); \ |
| 67606 | float16x4_t __rev1_900; __rev1_900 = __builtin_shufflevector(__s1_900, __s1_900, 3, 2, 1, 0); \ |
| 67607 | float16x8_t __rev2_900; __rev2_900 = __builtin_shufflevector(__s2_900, __s2_900, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67608 | float32x2_t __ret_900; \ |
| 67609 | __ret_900 = __noswap_vfmlsl_low_f16(__rev0_900, __rev1_900, (float16x4_t) {__noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900), __noswap_vgetq_lane_f16(__rev2_900, __p3_900)}); \ |
| 67610 | __ret_900 = __builtin_shufflevector(__ret_900, __ret_900, 1, 0); \ |
| 67611 | __ret_900; \ |
| 66256 | 67612 | }) |
| 66257 | 67613 | #endif |
| 66258 | 67614 | |
| 66259 | 67615 | #endif |
| 66260 | 67616 | #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(__aarch64__) |
| 66261 | 67617 | #ifdef __LITTLE_ENDIAN__ |
| 66262 | | #define vmulh_lane_f16(__p0_809, __p1_809, __p2_809) __extension__ ({ \ |
| 66263 | | float16_t __s0_809 = __p0_809; \ |
| 66264 | | float16x4_t __s1_809 = __p1_809; \ |
| 66265 | | float16_t __ret_809; \ |
| 66266 | | __ret_809 = __s0_809 * vget_lane_f16(__s1_809, __p2_809); \ |
| 66267 | | __ret_809; \ |
| 67618 | #define vmulh_lane_f16(__p0_901, __p1_901, __p2_901) __extension__ ({ \ |
| 67619 | float16_t __s0_901 = __p0_901; \ |
| 67620 | float16x4_t __s1_901 = __p1_901; \ |
| 67621 | float16_t __ret_901; \ |
| 67622 | __ret_901 = __s0_901 * vget_lane_f16(__s1_901, __p2_901); \ |
| 67623 | __ret_901; \ |
| 66268 | 67624 | }) |
| 66269 | 67625 | #else |
| 66270 | | #define vmulh_lane_f16(__p0_810, __p1_810, __p2_810) __extension__ ({ \ |
| 66271 | | float16_t __s0_810 = __p0_810; \ |
| 66272 | | float16x4_t __s1_810 = __p1_810; \ |
| 66273 | | float16x4_t __rev1_810; __rev1_810 = __builtin_shufflevector(__s1_810, __s1_810, 3, 2, 1, 0); \ |
| 66274 | | float16_t __ret_810; \ |
| 66275 | | __ret_810 = __s0_810 * __noswap_vget_lane_f16(__rev1_810, __p2_810); \ |
| 66276 | | __ret_810; \ |
| 67626 | #define vmulh_lane_f16(__p0_902, __p1_902, __p2_902) __extension__ ({ \ |
| 67627 | float16_t __s0_902 = __p0_902; \ |
| 67628 | float16x4_t __s1_902 = __p1_902; \ |
| 67629 | float16x4_t __rev1_902; __rev1_902 = __builtin_shufflevector(__s1_902, __s1_902, 3, 2, 1, 0); \ |
| 67630 | float16_t __ret_902; \ |
| 67631 | __ret_902 = __s0_902 * __noswap_vget_lane_f16(__rev1_902, __p2_902); \ |
| 67632 | __ret_902; \ |
| 66277 | 67633 | }) |
| 66278 | 67634 | #endif |
| 66279 | 67635 | |
| 66280 | 67636 | #ifdef __LITTLE_ENDIAN__ |
| 66281 | | #define vmulh_laneq_f16(__p0_811, __p1_811, __p2_811) __extension__ ({ \ |
| 66282 | | float16_t __s0_811 = __p0_811; \ |
| 66283 | | float16x8_t __s1_811 = __p1_811; \ |
| 66284 | | float16_t __ret_811; \ |
| 66285 | | __ret_811 = __s0_811 * vgetq_lane_f16(__s1_811, __p2_811); \ |
| 66286 | | __ret_811; \ |
| 67637 | #define vmulh_laneq_f16(__p0_903, __p1_903, __p2_903) __extension__ ({ \ |
| 67638 | float16_t __s0_903 = __p0_903; \ |
| 67639 | float16x8_t __s1_903 = __p1_903; \ |
| 67640 | float16_t __ret_903; \ |
| 67641 | __ret_903 = __s0_903 * vgetq_lane_f16(__s1_903, __p2_903); \ |
| 67642 | __ret_903; \ |
| 66287 | 67643 | }) |
| 66288 | 67644 | #else |
| 66289 | | #define vmulh_laneq_f16(__p0_812, __p1_812, __p2_812) __extension__ ({ \ |
| 66290 | | float16_t __s0_812 = __p0_812; \ |
| 66291 | | float16x8_t __s1_812 = __p1_812; \ |
| 66292 | | float16x8_t __rev1_812; __rev1_812 = __builtin_shufflevector(__s1_812, __s1_812, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66293 | | float16_t __ret_812; \ |
| 66294 | | __ret_812 = __s0_812 * __noswap_vgetq_lane_f16(__rev1_812, __p2_812); \ |
| 66295 | | __ret_812; \ |
| 67645 | #define vmulh_laneq_f16(__p0_904, __p1_904, __p2_904) __extension__ ({ \ |
| 67646 | float16_t __s0_904 = __p0_904; \ |
| 67647 | float16x8_t __s1_904 = __p1_904; \ |
| 67648 | float16x8_t __rev1_904; __rev1_904 = __builtin_shufflevector(__s1_904, __s1_904, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67649 | float16_t __ret_904; \ |
| 67650 | __ret_904 = __s0_904 * __noswap_vgetq_lane_f16(__rev1_904, __p2_904); \ |
| 67651 | __ret_904; \ |
| 66296 | 67652 | }) |
| 66297 | 67653 | #endif |
| 66298 | 67654 | |
| 66299 | 67655 | #endif |
| 66300 | 67656 | #if defined(__ARM_FEATURE_MATMUL_INT8) |
| 66301 | 67657 | #ifdef __LITTLE_ENDIAN__ |
| 66302 | | #define vsudotq_lane_s32(__p0_813, __p1_813, __p2_813, __p3_813) __extension__ ({ \ |
| 66303 | | int32x4_t __s0_813 = __p0_813; \ |
| 66304 | | int8x16_t __s1_813 = __p1_813; \ |
| 66305 | | uint8x8_t __s2_813 = __p2_813; \ |
| 66306 | | int32x4_t __ret_813; \ |
| 66307 | | uint8x8_t __reint_813 = __s2_813; \ |
| 66308 | | __ret_813 = vusdotq_s32(__s0_813, (uint8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_813, __p3_813)), __s1_813); \ |
| 66309 | | __ret_813; \ |
| 67658 | #define vsudotq_lane_s32(__p0_905, __p1_905, __p2_905, __p3_905) __extension__ ({ \ |
| 67659 | int32x4_t __s0_905 = __p0_905; \ |
| 67660 | int8x16_t __s1_905 = __p1_905; \ |
| 67661 | uint8x8_t __s2_905 = __p2_905; \ |
| 67662 | int32x4_t __ret_905; \ |
| 67663 | uint8x8_t __reint_905 = __s2_905; \ |
| 67664 | __ret_905 = vusdotq_s32(__s0_905, (uint8x16_t)(splatq_lane_s32(*(int32x2_t *) &__reint_905, __p3_905)), __s1_905); \ |
| 67665 | __ret_905; \ |
| 66310 | 67666 | }) |
| 66311 | 67667 | #else |
| 66312 | | #define vsudotq_lane_s32(__p0_814, __p1_814, __p2_814, __p3_814) __extension__ ({ \ |
| 66313 | | int32x4_t __s0_814 = __p0_814; \ |
| 66314 | | int8x16_t __s1_814 = __p1_814; \ |
| 66315 | | uint8x8_t __s2_814 = __p2_814; \ |
| 66316 | | int32x4_t __rev0_814; __rev0_814 = __builtin_shufflevector(__s0_814, __s0_814, 3, 2, 1, 0); \ |
| 66317 | | int8x16_t __rev1_814; __rev1_814 = __builtin_shufflevector(__s1_814, __s1_814, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66318 | | uint8x8_t __rev2_814; __rev2_814 = __builtin_shufflevector(__s2_814, __s2_814, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66319 | | int32x4_t __ret_814; \ |
| 66320 | | uint8x8_t __reint_814 = __rev2_814; \ |
| 66321 | | __ret_814 = __noswap_vusdotq_s32(__rev0_814, (uint8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_814, __p3_814)), __rev1_814); \ |
| 66322 | | __ret_814 = __builtin_shufflevector(__ret_814, __ret_814, 3, 2, 1, 0); \ |
| 66323 | | __ret_814; \ |
| 67668 | #define vsudotq_lane_s32(__p0_906, __p1_906, __p2_906, __p3_906) __extension__ ({ \ |
| 67669 | int32x4_t __s0_906 = __p0_906; \ |
| 67670 | int8x16_t __s1_906 = __p1_906; \ |
| 67671 | uint8x8_t __s2_906 = __p2_906; \ |
| 67672 | int32x4_t __rev0_906; __rev0_906 = __builtin_shufflevector(__s0_906, __s0_906, 3, 2, 1, 0); \ |
| 67673 | int8x16_t __rev1_906; __rev1_906 = __builtin_shufflevector(__s1_906, __s1_906, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67674 | uint8x8_t __rev2_906; __rev2_906 = __builtin_shufflevector(__s2_906, __s2_906, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67675 | int32x4_t __ret_906; \ |
| 67676 | uint8x8_t __reint_906 = __rev2_906; \ |
| 67677 | __ret_906 = __noswap_vusdotq_s32(__rev0_906, (uint8x16_t)(__noswap_splatq_lane_s32(*(int32x2_t *) &__reint_906, __p3_906)), __rev1_906); \ |
| 67678 | __ret_906 = __builtin_shufflevector(__ret_906, __ret_906, 3, 2, 1, 0); \ |
| 67679 | __ret_906; \ |
| 66324 | 67680 | }) |
| 66325 | 67681 | #endif |
| 66326 | 67682 | |
| 66327 | 67683 | #ifdef __LITTLE_ENDIAN__ |
| 66328 | | #define vsudot_lane_s32(__p0_815, __p1_815, __p2_815, __p3_815) __extension__ ({ \ |
| 66329 | | int32x2_t __s0_815 = __p0_815; \ |
| 66330 | | int8x8_t __s1_815 = __p1_815; \ |
| 66331 | | uint8x8_t __s2_815 = __p2_815; \ |
| 66332 | | int32x2_t __ret_815; \ |
| 66333 | | uint8x8_t __reint_815 = __s2_815; \ |
| 66334 | | __ret_815 = vusdot_s32(__s0_815, (uint8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_815, __p3_815)), __s1_815); \ |
| 66335 | | __ret_815; \ |
| 67684 | #define vsudot_lane_s32(__p0_907, __p1_907, __p2_907, __p3_907) __extension__ ({ \ |
| 67685 | int32x2_t __s0_907 = __p0_907; \ |
| 67686 | int8x8_t __s1_907 = __p1_907; \ |
| 67687 | uint8x8_t __s2_907 = __p2_907; \ |
| 67688 | int32x2_t __ret_907; \ |
| 67689 | uint8x8_t __reint_907 = __s2_907; \ |
| 67690 | __ret_907 = vusdot_s32(__s0_907, (uint8x8_t)(splat_lane_s32(*(int32x2_t *) &__reint_907, __p3_907)), __s1_907); \ |
| 67691 | __ret_907; \ |
| 66336 | 67692 | }) |
| 66337 | 67693 | #else |
| 66338 | | #define vsudot_lane_s32(__p0_816, __p1_816, __p2_816, __p3_816) __extension__ ({ \ |
| 66339 | | int32x2_t __s0_816 = __p0_816; \ |
| 66340 | | int8x8_t __s1_816 = __p1_816; \ |
| 66341 | | uint8x8_t __s2_816 = __p2_816; \ |
| 66342 | | int32x2_t __rev0_816; __rev0_816 = __builtin_shufflevector(__s0_816, __s0_816, 1, 0); \ |
| 66343 | | int8x8_t __rev1_816; __rev1_816 = __builtin_shufflevector(__s1_816, __s1_816, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66344 | | uint8x8_t __rev2_816; __rev2_816 = __builtin_shufflevector(__s2_816, __s2_816, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66345 | | int32x2_t __ret_816; \ |
| 66346 | | uint8x8_t __reint_816 = __rev2_816; \ |
| 66347 | | __ret_816 = __noswap_vusdot_s32(__rev0_816, (uint8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_816, __p3_816)), __rev1_816); \ |
| 66348 | | __ret_816 = __builtin_shufflevector(__ret_816, __ret_816, 1, 0); \ |
| 66349 | | __ret_816; \ |
| 67694 | #define vsudot_lane_s32(__p0_908, __p1_908, __p2_908, __p3_908) __extension__ ({ \ |
| 67695 | int32x2_t __s0_908 = __p0_908; \ |
| 67696 | int8x8_t __s1_908 = __p1_908; \ |
| 67697 | uint8x8_t __s2_908 = __p2_908; \ |
| 67698 | int32x2_t __rev0_908; __rev0_908 = __builtin_shufflevector(__s0_908, __s0_908, 1, 0); \ |
| 67699 | int8x8_t __rev1_908; __rev1_908 = __builtin_shufflevector(__s1_908, __s1_908, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67700 | uint8x8_t __rev2_908; __rev2_908 = __builtin_shufflevector(__s2_908, __s2_908, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67701 | int32x2_t __ret_908; \ |
| 67702 | uint8x8_t __reint_908 = __rev2_908; \ |
| 67703 | __ret_908 = __noswap_vusdot_s32(__rev0_908, (uint8x8_t)(__noswap_splat_lane_s32(*(int32x2_t *) &__reint_908, __p3_908)), __rev1_908); \ |
| 67704 | __ret_908 = __builtin_shufflevector(__ret_908, __ret_908, 1, 0); \ |
| 67705 | __ret_908; \ |
| 66350 | 67706 | }) |
| 66351 | 67707 | #endif |
| 66352 | 67708 | |
| ... | ... | @@ -66363,86 +67719,86 @@ __ai int16_t vqrdmlahh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 66363 | 67719 | return __ret; |
| 66364 | 67720 | } |
| 66365 | 67721 | #ifdef __LITTLE_ENDIAN__ |
| 66366 | | #define vqrdmlahs_lane_s32(__p0_817, __p1_817, __p2_817, __p3_817) __extension__ ({ \ |
| 66367 | | int32_t __s0_817 = __p0_817; \ |
| 66368 | | int32_t __s1_817 = __p1_817; \ |
| 66369 | | int32x2_t __s2_817 = __p2_817; \ |
| 66370 | | int32_t __ret_817; \ |
| 66371 | | __ret_817 = vqadds_s32(__s0_817, vqrdmulhs_s32(__s1_817, vget_lane_s32(__s2_817, __p3_817))); \ |
| 66372 | | __ret_817; \ |
| 67722 | #define vqrdmlahs_lane_s32(__p0_909, __p1_909, __p2_909, __p3_909) __extension__ ({ \ |
| 67723 | int32_t __s0_909 = __p0_909; \ |
| 67724 | int32_t __s1_909 = __p1_909; \ |
| 67725 | int32x2_t __s2_909 = __p2_909; \ |
| 67726 | int32_t __ret_909; \ |
| 67727 | __ret_909 = vqadds_s32(__s0_909, vqrdmulhs_s32(__s1_909, vget_lane_s32(__s2_909, __p3_909))); \ |
| 67728 | __ret_909; \ |
| 66373 | 67729 | }) |
| 66374 | 67730 | #else |
| 66375 | | #define vqrdmlahs_lane_s32(__p0_818, __p1_818, __p2_818, __p3_818) __extension__ ({ \ |
| 66376 | | int32_t __s0_818 = __p0_818; \ |
| 66377 | | int32_t __s1_818 = __p1_818; \ |
| 66378 | | int32x2_t __s2_818 = __p2_818; \ |
| 66379 | | int32x2_t __rev2_818; __rev2_818 = __builtin_shufflevector(__s2_818, __s2_818, 1, 0); \ |
| 66380 | | int32_t __ret_818; \ |
| 66381 | | __ret_818 = vqadds_s32(__s0_818, vqrdmulhs_s32(__s1_818, __noswap_vget_lane_s32(__rev2_818, __p3_818))); \ |
| 66382 | | __ret_818; \ |
| 67731 | #define vqrdmlahs_lane_s32(__p0_910, __p1_910, __p2_910, __p3_910) __extension__ ({ \ |
| 67732 | int32_t __s0_910 = __p0_910; \ |
| 67733 | int32_t __s1_910 = __p1_910; \ |
| 67734 | int32x2_t __s2_910 = __p2_910; \ |
| 67735 | int32x2_t __rev2_910; __rev2_910 = __builtin_shufflevector(__s2_910, __s2_910, 1, 0); \ |
| 67736 | int32_t __ret_910; \ |
| 67737 | __ret_910 = vqadds_s32(__s0_910, vqrdmulhs_s32(__s1_910, __noswap_vget_lane_s32(__rev2_910, __p3_910))); \ |
| 67738 | __ret_910; \ |
| 66383 | 67739 | }) |
| 66384 | 67740 | #endif |
| 66385 | 67741 | |
| 66386 | 67742 | #ifdef __LITTLE_ENDIAN__ |
| 66387 | | #define vqrdmlahh_lane_s16(__p0_819, __p1_819, __p2_819, __p3_819) __extension__ ({ \ |
| 66388 | | int16_t __s0_819 = __p0_819; \ |
| 66389 | | int16_t __s1_819 = __p1_819; \ |
| 66390 | | int16x4_t __s2_819 = __p2_819; \ |
| 66391 | | int16_t __ret_819; \ |
| 66392 | | __ret_819 = vqaddh_s16(__s0_819, vqrdmulhh_s16(__s1_819, vget_lane_s16(__s2_819, __p3_819))); \ |
| 66393 | | __ret_819; \ |
| 67743 | #define vqrdmlahh_lane_s16(__p0_911, __p1_911, __p2_911, __p3_911) __extension__ ({ \ |
| 67744 | int16_t __s0_911 = __p0_911; \ |
| 67745 | int16_t __s1_911 = __p1_911; \ |
| 67746 | int16x4_t __s2_911 = __p2_911; \ |
| 67747 | int16_t __ret_911; \ |
| 67748 | __ret_911 = vqaddh_s16(__s0_911, vqrdmulhh_s16(__s1_911, vget_lane_s16(__s2_911, __p3_911))); \ |
| 67749 | __ret_911; \ |
| 66394 | 67750 | }) |
| 66395 | 67751 | #else |
| 66396 | | #define vqrdmlahh_lane_s16(__p0_820, __p1_820, __p2_820, __p3_820) __extension__ ({ \ |
| 66397 | | int16_t __s0_820 = __p0_820; \ |
| 66398 | | int16_t __s1_820 = __p1_820; \ |
| 66399 | | int16x4_t __s2_820 = __p2_820; \ |
| 66400 | | int16x4_t __rev2_820; __rev2_820 = __builtin_shufflevector(__s2_820, __s2_820, 3, 2, 1, 0); \ |
| 66401 | | int16_t __ret_820; \ |
| 66402 | | __ret_820 = vqaddh_s16(__s0_820, vqrdmulhh_s16(__s1_820, __noswap_vget_lane_s16(__rev2_820, __p3_820))); \ |
| 66403 | | __ret_820; \ |
| 67752 | #define vqrdmlahh_lane_s16(__p0_912, __p1_912, __p2_912, __p3_912) __extension__ ({ \ |
| 67753 | int16_t __s0_912 = __p0_912; \ |
| 67754 | int16_t __s1_912 = __p1_912; \ |
| 67755 | int16x4_t __s2_912 = __p2_912; \ |
| 67756 | int16x4_t __rev2_912; __rev2_912 = __builtin_shufflevector(__s2_912, __s2_912, 3, 2, 1, 0); \ |
| 67757 | int16_t __ret_912; \ |
| 67758 | __ret_912 = vqaddh_s16(__s0_912, vqrdmulhh_s16(__s1_912, __noswap_vget_lane_s16(__rev2_912, __p3_912))); \ |
| 67759 | __ret_912; \ |
| 66404 | 67760 | }) |
| 66405 | 67761 | #endif |
| 66406 | 67762 | |
| 66407 | 67763 | #ifdef __LITTLE_ENDIAN__ |
| 66408 | | #define vqrdmlahs_laneq_s32(__p0_821, __p1_821, __p2_821, __p3_821) __extension__ ({ \ |
| 66409 | | int32_t __s0_821 = __p0_821; \ |
| 66410 | | int32_t __s1_821 = __p1_821; \ |
| 66411 | | int32x4_t __s2_821 = __p2_821; \ |
| 66412 | | int32_t __ret_821; \ |
| 66413 | | __ret_821 = vqadds_s32(__s0_821, vqrdmulhs_s32(__s1_821, vgetq_lane_s32(__s2_821, __p3_821))); \ |
| 66414 | | __ret_821; \ |
| 67764 | #define vqrdmlahs_laneq_s32(__p0_913, __p1_913, __p2_913, __p3_913) __extension__ ({ \ |
| 67765 | int32_t __s0_913 = __p0_913; \ |
| 67766 | int32_t __s1_913 = __p1_913; \ |
| 67767 | int32x4_t __s2_913 = __p2_913; \ |
| 67768 | int32_t __ret_913; \ |
| 67769 | __ret_913 = vqadds_s32(__s0_913, vqrdmulhs_s32(__s1_913, vgetq_lane_s32(__s2_913, __p3_913))); \ |
| 67770 | __ret_913; \ |
| 66415 | 67771 | }) |
| 66416 | 67772 | #else |
| 66417 | | #define vqrdmlahs_laneq_s32(__p0_822, __p1_822, __p2_822, __p3_822) __extension__ ({ \ |
| 66418 | | int32_t __s0_822 = __p0_822; \ |
| 66419 | | int32_t __s1_822 = __p1_822; \ |
| 66420 | | int32x4_t __s2_822 = __p2_822; \ |
| 66421 | | int32x4_t __rev2_822; __rev2_822 = __builtin_shufflevector(__s2_822, __s2_822, 3, 2, 1, 0); \ |
| 66422 | | int32_t __ret_822; \ |
| 66423 | | __ret_822 = vqadds_s32(__s0_822, vqrdmulhs_s32(__s1_822, __noswap_vgetq_lane_s32(__rev2_822, __p3_822))); \ |
| 66424 | | __ret_822; \ |
| 67773 | #define vqrdmlahs_laneq_s32(__p0_914, __p1_914, __p2_914, __p3_914) __extension__ ({ \ |
| 67774 | int32_t __s0_914 = __p0_914; \ |
| 67775 | int32_t __s1_914 = __p1_914; \ |
| 67776 | int32x4_t __s2_914 = __p2_914; \ |
| 67777 | int32x4_t __rev2_914; __rev2_914 = __builtin_shufflevector(__s2_914, __s2_914, 3, 2, 1, 0); \ |
| 67778 | int32_t __ret_914; \ |
| 67779 | __ret_914 = vqadds_s32(__s0_914, vqrdmulhs_s32(__s1_914, __noswap_vgetq_lane_s32(__rev2_914, __p3_914))); \ |
| 67780 | __ret_914; \ |
| 66425 | 67781 | }) |
| 66426 | 67782 | #endif |
| 66427 | 67783 | |
| 66428 | 67784 | #ifdef __LITTLE_ENDIAN__ |
| 66429 | | #define vqrdmlahh_laneq_s16(__p0_823, __p1_823, __p2_823, __p3_823) __extension__ ({ \ |
| 66430 | | int16_t __s0_823 = __p0_823; \ |
| 66431 | | int16_t __s1_823 = __p1_823; \ |
| 66432 | | int16x8_t __s2_823 = __p2_823; \ |
| 66433 | | int16_t __ret_823; \ |
| 66434 | | __ret_823 = vqaddh_s16(__s0_823, vqrdmulhh_s16(__s1_823, vgetq_lane_s16(__s2_823, __p3_823))); \ |
| 66435 | | __ret_823; \ |
| 67785 | #define vqrdmlahh_laneq_s16(__p0_915, __p1_915, __p2_915, __p3_915) __extension__ ({ \ |
| 67786 | int16_t __s0_915 = __p0_915; \ |
| 67787 | int16_t __s1_915 = __p1_915; \ |
| 67788 | int16x8_t __s2_915 = __p2_915; \ |
| 67789 | int16_t __ret_915; \ |
| 67790 | __ret_915 = vqaddh_s16(__s0_915, vqrdmulhh_s16(__s1_915, vgetq_lane_s16(__s2_915, __p3_915))); \ |
| 67791 | __ret_915; \ |
| 66436 | 67792 | }) |
| 66437 | 67793 | #else |
| 66438 | | #define vqrdmlahh_laneq_s16(__p0_824, __p1_824, __p2_824, __p3_824) __extension__ ({ \ |
| 66439 | | int16_t __s0_824 = __p0_824; \ |
| 66440 | | int16_t __s1_824 = __p1_824; \ |
| 66441 | | int16x8_t __s2_824 = __p2_824; \ |
| 66442 | | int16x8_t __rev2_824; __rev2_824 = __builtin_shufflevector(__s2_824, __s2_824, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66443 | | int16_t __ret_824; \ |
| 66444 | | __ret_824 = vqaddh_s16(__s0_824, vqrdmulhh_s16(__s1_824, __noswap_vgetq_lane_s16(__rev2_824, __p3_824))); \ |
| 66445 | | __ret_824; \ |
| 67794 | #define vqrdmlahh_laneq_s16(__p0_916, __p1_916, __p2_916, __p3_916) __extension__ ({ \ |
| 67795 | int16_t __s0_916 = __p0_916; \ |
| 67796 | int16_t __s1_916 = __p1_916; \ |
| 67797 | int16x8_t __s2_916 = __p2_916; \ |
| 67798 | int16x8_t __rev2_916; __rev2_916 = __builtin_shufflevector(__s2_916, __s2_916, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67799 | int16_t __ret_916; \ |
| 67800 | __ret_916 = vqaddh_s16(__s0_916, vqrdmulhh_s16(__s1_916, __noswap_vgetq_lane_s16(__rev2_916, __p3_916))); \ |
| 67801 | __ret_916; \ |
| 66446 | 67802 | }) |
| 66447 | 67803 | #endif |
| 66448 | 67804 | |
| ... | ... | @@ -66457,86 +67813,86 @@ __ai int16_t vqrdmlshh_s16(int16_t __p0, int16_t __p1, int16_t __p2) { |
| 66457 | 67813 | return __ret; |
| 66458 | 67814 | } |
| 66459 | 67815 | #ifdef __LITTLE_ENDIAN__ |
| 66460 | | #define vqrdmlshs_lane_s32(__p0_825, __p1_825, __p2_825, __p3_825) __extension__ ({ \ |
| 66461 | | int32_t __s0_825 = __p0_825; \ |
| 66462 | | int32_t __s1_825 = __p1_825; \ |
| 66463 | | int32x2_t __s2_825 = __p2_825; \ |
| 66464 | | int32_t __ret_825; \ |
| 66465 | | __ret_825 = vqsubs_s32(__s0_825, vqrdmulhs_s32(__s1_825, vget_lane_s32(__s2_825, __p3_825))); \ |
| 66466 | | __ret_825; \ |
| 67816 | #define vqrdmlshs_lane_s32(__p0_917, __p1_917, __p2_917, __p3_917) __extension__ ({ \ |
| 67817 | int32_t __s0_917 = __p0_917; \ |
| 67818 | int32_t __s1_917 = __p1_917; \ |
| 67819 | int32x2_t __s2_917 = __p2_917; \ |
| 67820 | int32_t __ret_917; \ |
| 67821 | __ret_917 = vqsubs_s32(__s0_917, vqrdmulhs_s32(__s1_917, vget_lane_s32(__s2_917, __p3_917))); \ |
| 67822 | __ret_917; \ |
| 66467 | 67823 | }) |
| 66468 | 67824 | #else |
| 66469 | | #define vqrdmlshs_lane_s32(__p0_826, __p1_826, __p2_826, __p3_826) __extension__ ({ \ |
| 66470 | | int32_t __s0_826 = __p0_826; \ |
| 66471 | | int32_t __s1_826 = __p1_826; \ |
| 66472 | | int32x2_t __s2_826 = __p2_826; \ |
| 66473 | | int32x2_t __rev2_826; __rev2_826 = __builtin_shufflevector(__s2_826, __s2_826, 1, 0); \ |
| 66474 | | int32_t __ret_826; \ |
| 66475 | | __ret_826 = vqsubs_s32(__s0_826, vqrdmulhs_s32(__s1_826, __noswap_vget_lane_s32(__rev2_826, __p3_826))); \ |
| 66476 | | __ret_826; \ |
| 67825 | #define vqrdmlshs_lane_s32(__p0_918, __p1_918, __p2_918, __p3_918) __extension__ ({ \ |
| 67826 | int32_t __s0_918 = __p0_918; \ |
| 67827 | int32_t __s1_918 = __p1_918; \ |
| 67828 | int32x2_t __s2_918 = __p2_918; \ |
| 67829 | int32x2_t __rev2_918; __rev2_918 = __builtin_shufflevector(__s2_918, __s2_918, 1, 0); \ |
| 67830 | int32_t __ret_918; \ |
| 67831 | __ret_918 = vqsubs_s32(__s0_918, vqrdmulhs_s32(__s1_918, __noswap_vget_lane_s32(__rev2_918, __p3_918))); \ |
| 67832 | __ret_918; \ |
| 66477 | 67833 | }) |
| 66478 | 67834 | #endif |
| 66479 | 67835 | |
| 66480 | 67836 | #ifdef __LITTLE_ENDIAN__ |
| 66481 | | #define vqrdmlshh_lane_s16(__p0_827, __p1_827, __p2_827, __p3_827) __extension__ ({ \ |
| 66482 | | int16_t __s0_827 = __p0_827; \ |
| 66483 | | int16_t __s1_827 = __p1_827; \ |
| 66484 | | int16x4_t __s2_827 = __p2_827; \ |
| 66485 | | int16_t __ret_827; \ |
| 66486 | | __ret_827 = vqsubh_s16(__s0_827, vqrdmulhh_s16(__s1_827, vget_lane_s16(__s2_827, __p3_827))); \ |
| 66487 | | __ret_827; \ |
| 67837 | #define vqrdmlshh_lane_s16(__p0_919, __p1_919, __p2_919, __p3_919) __extension__ ({ \ |
| 67838 | int16_t __s0_919 = __p0_919; \ |
| 67839 | int16_t __s1_919 = __p1_919; \ |
| 67840 | int16x4_t __s2_919 = __p2_919; \ |
| 67841 | int16_t __ret_919; \ |
| 67842 | __ret_919 = vqsubh_s16(__s0_919, vqrdmulhh_s16(__s1_919, vget_lane_s16(__s2_919, __p3_919))); \ |
| 67843 | __ret_919; \ |
| 66488 | 67844 | }) |
| 66489 | 67845 | #else |
| 66490 | | #define vqrdmlshh_lane_s16(__p0_828, __p1_828, __p2_828, __p3_828) __extension__ ({ \ |
| 66491 | | int16_t __s0_828 = __p0_828; \ |
| 66492 | | int16_t __s1_828 = __p1_828; \ |
| 66493 | | int16x4_t __s2_828 = __p2_828; \ |
| 66494 | | int16x4_t __rev2_828; __rev2_828 = __builtin_shufflevector(__s2_828, __s2_828, 3, 2, 1, 0); \ |
| 66495 | | int16_t __ret_828; \ |
| 66496 | | __ret_828 = vqsubh_s16(__s0_828, vqrdmulhh_s16(__s1_828, __noswap_vget_lane_s16(__rev2_828, __p3_828))); \ |
| 66497 | | __ret_828; \ |
| 67846 | #define vqrdmlshh_lane_s16(__p0_920, __p1_920, __p2_920, __p3_920) __extension__ ({ \ |
| 67847 | int16_t __s0_920 = __p0_920; \ |
| 67848 | int16_t __s1_920 = __p1_920; \ |
| 67849 | int16x4_t __s2_920 = __p2_920; \ |
| 67850 | int16x4_t __rev2_920; __rev2_920 = __builtin_shufflevector(__s2_920, __s2_920, 3, 2, 1, 0); \ |
| 67851 | int16_t __ret_920; \ |
| 67852 | __ret_920 = vqsubh_s16(__s0_920, vqrdmulhh_s16(__s1_920, __noswap_vget_lane_s16(__rev2_920, __p3_920))); \ |
| 67853 | __ret_920; \ |
| 66498 | 67854 | }) |
| 66499 | 67855 | #endif |
| 66500 | 67856 | |
| 66501 | 67857 | #ifdef __LITTLE_ENDIAN__ |
| 66502 | | #define vqrdmlshs_laneq_s32(__p0_829, __p1_829, __p2_829, __p3_829) __extension__ ({ \ |
| 66503 | | int32_t __s0_829 = __p0_829; \ |
| 66504 | | int32_t __s1_829 = __p1_829; \ |
| 66505 | | int32x4_t __s2_829 = __p2_829; \ |
| 66506 | | int32_t __ret_829; \ |
| 66507 | | __ret_829 = vqsubs_s32(__s0_829, vqrdmulhs_s32(__s1_829, vgetq_lane_s32(__s2_829, __p3_829))); \ |
| 66508 | | __ret_829; \ |
| 67858 | #define vqrdmlshs_laneq_s32(__p0_921, __p1_921, __p2_921, __p3_921) __extension__ ({ \ |
| 67859 | int32_t __s0_921 = __p0_921; \ |
| 67860 | int32_t __s1_921 = __p1_921; \ |
| 67861 | int32x4_t __s2_921 = __p2_921; \ |
| 67862 | int32_t __ret_921; \ |
| 67863 | __ret_921 = vqsubs_s32(__s0_921, vqrdmulhs_s32(__s1_921, vgetq_lane_s32(__s2_921, __p3_921))); \ |
| 67864 | __ret_921; \ |
| 66509 | 67865 | }) |
| 66510 | 67866 | #else |
| 66511 | | #define vqrdmlshs_laneq_s32(__p0_830, __p1_830, __p2_830, __p3_830) __extension__ ({ \ |
| 66512 | | int32_t __s0_830 = __p0_830; \ |
| 66513 | | int32_t __s1_830 = __p1_830; \ |
| 66514 | | int32x4_t __s2_830 = __p2_830; \ |
| 66515 | | int32x4_t __rev2_830; __rev2_830 = __builtin_shufflevector(__s2_830, __s2_830, 3, 2, 1, 0); \ |
| 66516 | | int32_t __ret_830; \ |
| 66517 | | __ret_830 = vqsubs_s32(__s0_830, vqrdmulhs_s32(__s1_830, __noswap_vgetq_lane_s32(__rev2_830, __p3_830))); \ |
| 66518 | | __ret_830; \ |
| 67867 | #define vqrdmlshs_laneq_s32(__p0_922, __p1_922, __p2_922, __p3_922) __extension__ ({ \ |
| 67868 | int32_t __s0_922 = __p0_922; \ |
| 67869 | int32_t __s1_922 = __p1_922; \ |
| 67870 | int32x4_t __s2_922 = __p2_922; \ |
| 67871 | int32x4_t __rev2_922; __rev2_922 = __builtin_shufflevector(__s2_922, __s2_922, 3, 2, 1, 0); \ |
| 67872 | int32_t __ret_922; \ |
| 67873 | __ret_922 = vqsubs_s32(__s0_922, vqrdmulhs_s32(__s1_922, __noswap_vgetq_lane_s32(__rev2_922, __p3_922))); \ |
| 67874 | __ret_922; \ |
| 66519 | 67875 | }) |
| 66520 | 67876 | #endif |
| 66521 | 67877 | |
| 66522 | 67878 | #ifdef __LITTLE_ENDIAN__ |
| 66523 | | #define vqrdmlshh_laneq_s16(__p0_831, __p1_831, __p2_831, __p3_831) __extension__ ({ \ |
| 66524 | | int16_t __s0_831 = __p0_831; \ |
| 66525 | | int16_t __s1_831 = __p1_831; \ |
| 66526 | | int16x8_t __s2_831 = __p2_831; \ |
| 66527 | | int16_t __ret_831; \ |
| 66528 | | __ret_831 = vqsubh_s16(__s0_831, vqrdmulhh_s16(__s1_831, vgetq_lane_s16(__s2_831, __p3_831))); \ |
| 66529 | | __ret_831; \ |
| 67879 | #define vqrdmlshh_laneq_s16(__p0_923, __p1_923, __p2_923, __p3_923) __extension__ ({ \ |
| 67880 | int16_t __s0_923 = __p0_923; \ |
| 67881 | int16_t __s1_923 = __p1_923; \ |
| 67882 | int16x8_t __s2_923 = __p2_923; \ |
| 67883 | int16_t __ret_923; \ |
| 67884 | __ret_923 = vqsubh_s16(__s0_923, vqrdmulhh_s16(__s1_923, vgetq_lane_s16(__s2_923, __p3_923))); \ |
| 67885 | __ret_923; \ |
| 66530 | 67886 | }) |
| 66531 | 67887 | #else |
| 66532 | | #define vqrdmlshh_laneq_s16(__p0_832, __p1_832, __p2_832, __p3_832) __extension__ ({ \ |
| 66533 | | int16_t __s0_832 = __p0_832; \ |
| 66534 | | int16_t __s1_832 = __p1_832; \ |
| 66535 | | int16x8_t __s2_832 = __p2_832; \ |
| 66536 | | int16x8_t __rev2_832; __rev2_832 = __builtin_shufflevector(__s2_832, __s2_832, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 66537 | | int16_t __ret_832; \ |
| 66538 | | __ret_832 = vqsubh_s16(__s0_832, vqrdmulhh_s16(__s1_832, __noswap_vgetq_lane_s16(__rev2_832, __p3_832))); \ |
| 66539 | | __ret_832; \ |
| 67888 | #define vqrdmlshh_laneq_s16(__p0_924, __p1_924, __p2_924, __p3_924) __extension__ ({ \ |
| 67889 | int16_t __s0_924 = __p0_924; \ |
| 67890 | int16_t __s1_924 = __p1_924; \ |
| 67891 | int16x8_t __s2_924 = __p2_924; \ |
| 67892 | int16x8_t __rev2_924; __rev2_924 = __builtin_shufflevector(__s2_924, __s2_924, 7, 6, 5, 4, 3, 2, 1, 0); \ |
| 67893 | int16_t __ret_924; \ |
| 67894 | __ret_924 = vqsubh_s16(__s0_924, vqrdmulhh_s16(__s1_924, __noswap_vgetq_lane_s16(__rev2_924, __p3_924))); \ |
| 67895 | __ret_924; \ |
| 66540 | 67896 | }) |
| 66541 | 67897 | #endif |
| 66542 | 67898 | |
| ... | ... | @@ -66849,136 +68205,136 @@ __ai int32x4_t vaddw_high_s16(int32x4_t __p0, int16x8_t __p1) { |
| 66849 | 68205 | #endif |
| 66850 | 68206 | |
| 66851 | 68207 | #ifdef __LITTLE_ENDIAN__ |
| 66852 | | #define vcopyq_lane_p64(__p0_833, __p1_833, __p2_833, __p3_833) __extension__ ({ \ |
| 66853 | | poly64x2_t __s0_833 = __p0_833; \ |
| 66854 | | poly64x1_t __s2_833 = __p2_833; \ |
| 66855 | | poly64x2_t __ret_833; \ |
| 66856 | | __ret_833 = vsetq_lane_p64(vget_lane_p64(__s2_833, __p3_833), __s0_833, __p1_833); \ |
| 66857 | | __ret_833; \ |
| 68208 | #define vcopyq_lane_p64(__p0_925, __p1_925, __p2_925, __p3_925) __extension__ ({ \ |
| 68209 | poly64x2_t __s0_925 = __p0_925; \ |
| 68210 | poly64x1_t __s2_925 = __p2_925; \ |
| 68211 | poly64x2_t __ret_925; \ |
| 68212 | __ret_925 = vsetq_lane_p64(vget_lane_p64(__s2_925, __p3_925), __s0_925, __p1_925); \ |
| 68213 | __ret_925; \ |
| 66858 | 68214 | }) |
| 66859 | 68215 | #else |
| 66860 | | #define vcopyq_lane_p64(__p0_834, __p1_834, __p2_834, __p3_834) __extension__ ({ \ |
| 66861 | | poly64x2_t __s0_834 = __p0_834; \ |
| 66862 | | poly64x1_t __s2_834 = __p2_834; \ |
| 66863 | | poly64x2_t __rev0_834; __rev0_834 = __builtin_shufflevector(__s0_834, __s0_834, 1, 0); \ |
| 66864 | | poly64x2_t __ret_834; \ |
| 66865 | | __ret_834 = __noswap_vsetq_lane_p64(vget_lane_p64(__s2_834, __p3_834), __rev0_834, __p1_834); \ |
| 66866 | | __ret_834 = __builtin_shufflevector(__ret_834, __ret_834, 1, 0); \ |
| 66867 | | __ret_834; \ |
| 68216 | #define vcopyq_lane_p64(__p0_926, __p1_926, __p2_926, __p3_926) __extension__ ({ \ |
| 68217 | poly64x2_t __s0_926 = __p0_926; \ |
| 68218 | poly64x1_t __s2_926 = __p2_926; \ |
| 68219 | poly64x2_t __rev0_926; __rev0_926 = __builtin_shufflevector(__s0_926, __s0_926, 1, 0); \ |
| 68220 | poly64x2_t __ret_926; \ |
| 68221 | __ret_926 = __noswap_vsetq_lane_p64(vget_lane_p64(__s2_926, __p3_926), __rev0_926, __p1_926); \ |
| 68222 | __ret_926 = __builtin_shufflevector(__ret_926, __ret_926, 1, 0); \ |
| 68223 | __ret_926; \ |
| 66868 | 68224 | }) |
| 66869 | 68225 | #endif |
| 66870 | 68226 | |
| 66871 | 68227 | #ifdef __LITTLE_ENDIAN__ |
| 66872 | | #define vcopyq_lane_f64(__p0_835, __p1_835, __p2_835, __p3_835) __extension__ ({ \ |
| 66873 | | float64x2_t __s0_835 = __p0_835; \ |
| 66874 | | float64x1_t __s2_835 = __p2_835; \ |
| 66875 | | float64x2_t __ret_835; \ |
| 66876 | | __ret_835 = vsetq_lane_f64(vget_lane_f64(__s2_835, __p3_835), __s0_835, __p1_835); \ |
| 66877 | | __ret_835; \ |
| 68228 | #define vcopyq_lane_f64(__p0_927, __p1_927, __p2_927, __p3_927) __extension__ ({ \ |
| 68229 | float64x2_t __s0_927 = __p0_927; \ |
| 68230 | float64x1_t __s2_927 = __p2_927; \ |
| 68231 | float64x2_t __ret_927; \ |
| 68232 | __ret_927 = vsetq_lane_f64(vget_lane_f64(__s2_927, __p3_927), __s0_927, __p1_927); \ |
| 68233 | __ret_927; \ |
| 66878 | 68234 | }) |
| 66879 | 68235 | #else |
| 66880 | | #define vcopyq_lane_f64(__p0_836, __p1_836, __p2_836, __p3_836) __extension__ ({ \ |
| 66881 | | float64x2_t __s0_836 = __p0_836; \ |
| 66882 | | float64x1_t __s2_836 = __p2_836; \ |
| 66883 | | float64x2_t __rev0_836; __rev0_836 = __builtin_shufflevector(__s0_836, __s0_836, 1, 0); \ |
| 66884 | | float64x2_t __ret_836; \ |
| 66885 | | __ret_836 = __noswap_vsetq_lane_f64(vget_lane_f64(__s2_836, __p3_836), __rev0_836, __p1_836); \ |
| 66886 | | __ret_836 = __builtin_shufflevector(__ret_836, __ret_836, 1, 0); \ |
| 66887 | | __ret_836; \ |
| 68236 | #define vcopyq_lane_f64(__p0_928, __p1_928, __p2_928, __p3_928) __extension__ ({ \ |
| 68237 | float64x2_t __s0_928 = __p0_928; \ |
| 68238 | float64x1_t __s2_928 = __p2_928; \ |
| 68239 | float64x2_t __rev0_928; __rev0_928 = __builtin_shufflevector(__s0_928, __s0_928, 1, 0); \ |
| 68240 | float64x2_t __ret_928; \ |
| 68241 | __ret_928 = __noswap_vsetq_lane_f64(vget_lane_f64(__s2_928, __p3_928), __rev0_928, __p1_928); \ |
| 68242 | __ret_928 = __builtin_shufflevector(__ret_928, __ret_928, 1, 0); \ |
| 68243 | __ret_928; \ |
| 66888 | 68244 | }) |
| 66889 | 68245 | #endif |
| 66890 | 68246 | |
| 66891 | | #define vcopy_lane_p64(__p0_837, __p1_837, __p2_837, __p3_837) __extension__ ({ \ |
| 66892 | | poly64x1_t __s0_837 = __p0_837; \ |
| 66893 | | poly64x1_t __s2_837 = __p2_837; \ |
| 66894 | | poly64x1_t __ret_837; \ |
| 66895 | | __ret_837 = vset_lane_p64(vget_lane_p64(__s2_837, __p3_837), __s0_837, __p1_837); \ |
| 66896 | | __ret_837; \ |
| 68247 | #define vcopy_lane_p64(__p0_929, __p1_929, __p2_929, __p3_929) __extension__ ({ \ |
| 68248 | poly64x1_t __s0_929 = __p0_929; \ |
| 68249 | poly64x1_t __s2_929 = __p2_929; \ |
| 68250 | poly64x1_t __ret_929; \ |
| 68251 | __ret_929 = vset_lane_p64(vget_lane_p64(__s2_929, __p3_929), __s0_929, __p1_929); \ |
| 68252 | __ret_929; \ |
| 66897 | 68253 | }) |
| 66898 | | #define vcopy_lane_f64(__p0_838, __p1_838, __p2_838, __p3_838) __extension__ ({ \ |
| 66899 | | float64x1_t __s0_838 = __p0_838; \ |
| 66900 | | float64x1_t __s2_838 = __p2_838; \ |
| 66901 | | float64x1_t __ret_838; \ |
| 66902 | | __ret_838 = vset_lane_f64(vget_lane_f64(__s2_838, __p3_838), __s0_838, __p1_838); \ |
| 66903 | | __ret_838; \ |
| 68254 | #define vcopy_lane_f64(__p0_930, __p1_930, __p2_930, __p3_930) __extension__ ({ \ |
| 68255 | float64x1_t __s0_930 = __p0_930; \ |
| 68256 | float64x1_t __s2_930 = __p2_930; \ |
| 68257 | float64x1_t __ret_930; \ |
| 68258 | __ret_930 = vset_lane_f64(vget_lane_f64(__s2_930, __p3_930), __s0_930, __p1_930); \ |
| 68259 | __ret_930; \ |
| 66904 | 68260 | }) |
| 66905 | 68261 | #ifdef __LITTLE_ENDIAN__ |
| 66906 | | #define vcopyq_laneq_p64(__p0_839, __p1_839, __p2_839, __p3_839) __extension__ ({ \ |
| 66907 | | poly64x2_t __s0_839 = __p0_839; \ |
| 66908 | | poly64x2_t __s2_839 = __p2_839; \ |
| 66909 | | poly64x2_t __ret_839; \ |
| 66910 | | __ret_839 = vsetq_lane_p64(vgetq_lane_p64(__s2_839, __p3_839), __s0_839, __p1_839); \ |
| 66911 | | __ret_839; \ |
| 68262 | #define vcopyq_laneq_p64(__p0_931, __p1_931, __p2_931, __p3_931) __extension__ ({ \ |
| 68263 | poly64x2_t __s0_931 = __p0_931; \ |
| 68264 | poly64x2_t __s2_931 = __p2_931; \ |
| 68265 | poly64x2_t __ret_931; \ |
| 68266 | __ret_931 = vsetq_lane_p64(vgetq_lane_p64(__s2_931, __p3_931), __s0_931, __p1_931); \ |
| 68267 | __ret_931; \ |
| 66912 | 68268 | }) |
| 66913 | 68269 | #else |
| 66914 | | #define vcopyq_laneq_p64(__p0_840, __p1_840, __p2_840, __p3_840) __extension__ ({ \ |
| 66915 | | poly64x2_t __s0_840 = __p0_840; \ |
| 66916 | | poly64x2_t __s2_840 = __p2_840; \ |
| 66917 | | poly64x2_t __rev0_840; __rev0_840 = __builtin_shufflevector(__s0_840, __s0_840, 1, 0); \ |
| 66918 | | poly64x2_t __rev2_840; __rev2_840 = __builtin_shufflevector(__s2_840, __s2_840, 1, 0); \ |
| 66919 | | poly64x2_t __ret_840; \ |
| 66920 | | __ret_840 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_840, __p3_840), __rev0_840, __p1_840); \ |
| 66921 | | __ret_840 = __builtin_shufflevector(__ret_840, __ret_840, 1, 0); \ |
| 66922 | | __ret_840; \ |
| 68270 | #define vcopyq_laneq_p64(__p0_932, __p1_932, __p2_932, __p3_932) __extension__ ({ \ |
| 68271 | poly64x2_t __s0_932 = __p0_932; \ |
| 68272 | poly64x2_t __s2_932 = __p2_932; \ |
| 68273 | poly64x2_t __rev0_932; __rev0_932 = __builtin_shufflevector(__s0_932, __s0_932, 1, 0); \ |
| 68274 | poly64x2_t __rev2_932; __rev2_932 = __builtin_shufflevector(__s2_932, __s2_932, 1, 0); \ |
| 68275 | poly64x2_t __ret_932; \ |
| 68276 | __ret_932 = __noswap_vsetq_lane_p64(__noswap_vgetq_lane_p64(__rev2_932, __p3_932), __rev0_932, __p1_932); \ |
| 68277 | __ret_932 = __builtin_shufflevector(__ret_932, __ret_932, 1, 0); \ |
| 68278 | __ret_932; \ |
| 66923 | 68279 | }) |
| 66924 | 68280 | #endif |
| 66925 | 68281 | |
| 66926 | 68282 | #ifdef __LITTLE_ENDIAN__ |
| 66927 | | #define vcopyq_laneq_f64(__p0_841, __p1_841, __p2_841, __p3_841) __extension__ ({ \ |
| 66928 | | float64x2_t __s0_841 = __p0_841; \ |
| 66929 | | float64x2_t __s2_841 = __p2_841; \ |
| 66930 | | float64x2_t __ret_841; \ |
| 66931 | | __ret_841 = vsetq_lane_f64(vgetq_lane_f64(__s2_841, __p3_841), __s0_841, __p1_841); \ |
| 66932 | | __ret_841; \ |
| 68283 | #define vcopyq_laneq_f64(__p0_933, __p1_933, __p2_933, __p3_933) __extension__ ({ \ |
| 68284 | float64x2_t __s0_933 = __p0_933; \ |
| 68285 | float64x2_t __s2_933 = __p2_933; \ |
| 68286 | float64x2_t __ret_933; \ |
| 68287 | __ret_933 = vsetq_lane_f64(vgetq_lane_f64(__s2_933, __p3_933), __s0_933, __p1_933); \ |
| 68288 | __ret_933; \ |
| 66933 | 68289 | }) |
| 66934 | 68290 | #else |
| 66935 | | #define vcopyq_laneq_f64(__p0_842, __p1_842, __p2_842, __p3_842) __extension__ ({ \ |
| 66936 | | float64x2_t __s0_842 = __p0_842; \ |
| 66937 | | float64x2_t __s2_842 = __p2_842; \ |
| 66938 | | float64x2_t __rev0_842; __rev0_842 = __builtin_shufflevector(__s0_842, __s0_842, 1, 0); \ |
| 66939 | | float64x2_t __rev2_842; __rev2_842 = __builtin_shufflevector(__s2_842, __s2_842, 1, 0); \ |
| 66940 | | float64x2_t __ret_842; \ |
| 66941 | | __ret_842 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_842, __p3_842), __rev0_842, __p1_842); \ |
| 66942 | | __ret_842 = __builtin_shufflevector(__ret_842, __ret_842, 1, 0); \ |
| 66943 | | __ret_842; \ |
| 68291 | #define vcopyq_laneq_f64(__p0_934, __p1_934, __p2_934, __p3_934) __extension__ ({ \ |
| 68292 | float64x2_t __s0_934 = __p0_934; \ |
| 68293 | float64x2_t __s2_934 = __p2_934; \ |
| 68294 | float64x2_t __rev0_934; __rev0_934 = __builtin_shufflevector(__s0_934, __s0_934, 1, 0); \ |
| 68295 | float64x2_t __rev2_934; __rev2_934 = __builtin_shufflevector(__s2_934, __s2_934, 1, 0); \ |
| 68296 | float64x2_t __ret_934; \ |
| 68297 | __ret_934 = __noswap_vsetq_lane_f64(__noswap_vgetq_lane_f64(__rev2_934, __p3_934), __rev0_934, __p1_934); \ |
| 68298 | __ret_934 = __builtin_shufflevector(__ret_934, __ret_934, 1, 0); \ |
| 68299 | __ret_934; \ |
| 66944 | 68300 | }) |
| 66945 | 68301 | #endif |
| 66946 | 68302 | |
| 66947 | 68303 | #ifdef __LITTLE_ENDIAN__ |
| 66948 | | #define vcopy_laneq_p64(__p0_843, __p1_843, __p2_843, __p3_843) __extension__ ({ \ |
| 66949 | | poly64x1_t __s0_843 = __p0_843; \ |
| 66950 | | poly64x2_t __s2_843 = __p2_843; \ |
| 66951 | | poly64x1_t __ret_843; \ |
| 66952 | | __ret_843 = vset_lane_p64(vgetq_lane_p64(__s2_843, __p3_843), __s0_843, __p1_843); \ |
| 66953 | | __ret_843; \ |
| 68304 | #define vcopy_laneq_p64(__p0_935, __p1_935, __p2_935, __p3_935) __extension__ ({ \ |
| 68305 | poly64x1_t __s0_935 = __p0_935; \ |
| 68306 | poly64x2_t __s2_935 = __p2_935; \ |
| 68307 | poly64x1_t __ret_935; \ |
| 68308 | __ret_935 = vset_lane_p64(vgetq_lane_p64(__s2_935, __p3_935), __s0_935, __p1_935); \ |
| 68309 | __ret_935; \ |
| 66954 | 68310 | }) |
| 66955 | 68311 | #else |
| 66956 | | #define vcopy_laneq_p64(__p0_844, __p1_844, __p2_844, __p3_844) __extension__ ({ \ |
| 66957 | | poly64x1_t __s0_844 = __p0_844; \ |
| 66958 | | poly64x2_t __s2_844 = __p2_844; \ |
| 66959 | | poly64x2_t __rev2_844; __rev2_844 = __builtin_shufflevector(__s2_844, __s2_844, 1, 0); \ |
| 66960 | | poly64x1_t __ret_844; \ |
| 66961 | | __ret_844 = vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_844, __p3_844), __s0_844, __p1_844); \ |
| 66962 | | __ret_844; \ |
| 68312 | #define vcopy_laneq_p64(__p0_936, __p1_936, __p2_936, __p3_936) __extension__ ({ \ |
| 68313 | poly64x1_t __s0_936 = __p0_936; \ |
| 68314 | poly64x2_t __s2_936 = __p2_936; \ |
| 68315 | poly64x2_t __rev2_936; __rev2_936 = __builtin_shufflevector(__s2_936, __s2_936, 1, 0); \ |
| 68316 | poly64x1_t __ret_936; \ |
| 68317 | __ret_936 = vset_lane_p64(__noswap_vgetq_lane_p64(__rev2_936, __p3_936), __s0_936, __p1_936); \ |
| 68318 | __ret_936; \ |
| 66963 | 68319 | }) |
| 66964 | 68320 | #endif |
| 66965 | 68321 | |
| 66966 | 68322 | #ifdef __LITTLE_ENDIAN__ |
| 66967 | | #define vcopy_laneq_f64(__p0_845, __p1_845, __p2_845, __p3_845) __extension__ ({ \ |
| 66968 | | float64x1_t __s0_845 = __p0_845; \ |
| 66969 | | float64x2_t __s2_845 = __p2_845; \ |
| 66970 | | float64x1_t __ret_845; \ |
| 66971 | | __ret_845 = vset_lane_f64(vgetq_lane_f64(__s2_845, __p3_845), __s0_845, __p1_845); \ |
| 66972 | | __ret_845; \ |
| 68323 | #define vcopy_laneq_f64(__p0_937, __p1_937, __p2_937, __p3_937) __extension__ ({ \ |
| 68324 | float64x1_t __s0_937 = __p0_937; \ |
| 68325 | float64x2_t __s2_937 = __p2_937; \ |
| 68326 | float64x1_t __ret_937; \ |
| 68327 | __ret_937 = vset_lane_f64(vgetq_lane_f64(__s2_937, __p3_937), __s0_937, __p1_937); \ |
| 68328 | __ret_937; \ |
| 66973 | 68329 | }) |
| 66974 | 68330 | #else |
| 66975 | | #define vcopy_laneq_f64(__p0_846, __p1_846, __p2_846, __p3_846) __extension__ ({ \ |
| 66976 | | float64x1_t __s0_846 = __p0_846; \ |
| 66977 | | float64x2_t __s2_846 = __p2_846; \ |
| 66978 | | float64x2_t __rev2_846; __rev2_846 = __builtin_shufflevector(__s2_846, __s2_846, 1, 0); \ |
| 66979 | | float64x1_t __ret_846; \ |
| 66980 | | __ret_846 = vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_846, __p3_846), __s0_846, __p1_846); \ |
| 66981 | | __ret_846; \ |
| 68331 | #define vcopy_laneq_f64(__p0_938, __p1_938, __p2_938, __p3_938) __extension__ ({ \ |
| 68332 | float64x1_t __s0_938 = __p0_938; \ |
| 68333 | float64x2_t __s2_938 = __p2_938; \ |
| 68334 | float64x2_t __rev2_938; __rev2_938 = __builtin_shufflevector(__s2_938, __s2_938, 1, 0); \ |
| 68335 | float64x1_t __ret_938; \ |
| 68336 | __ret_938 = vset_lane_f64(__noswap_vgetq_lane_f64(__rev2_938, __p3_938), __s0_938, __p1_938); \ |
| 68337 | __ret_938; \ |
| 66982 | 68338 | }) |
| 66983 | 68339 | #endif |
| 66984 | 68340 | |
| ... | ... | @@ -67334,38 +68690,38 @@ __ai int32x4_t vmlsl_high_n_s16(int32x4_t __p0, int16x8_t __p1, int16_t __p2) { |
| 67334 | 68690 | } |
| 67335 | 68691 | #endif |
| 67336 | 68692 | |
| 67337 | | #define vmulx_lane_f64(__p0_847, __p1_847, __p2_847) __extension__ ({ \ |
| 67338 | | float64x1_t __s0_847 = __p0_847; \ |
| 67339 | | float64x1_t __s1_847 = __p1_847; \ |
| 67340 | | float64x1_t __ret_847; \ |
| 67341 | | float64_t __x_847 = vget_lane_f64(__s0_847, 0); \ |
| 67342 | | float64_t __y_847 = vget_lane_f64(__s1_847, __p2_847); \ |
| 67343 | | float64_t __z_847 = vmulxd_f64(__x_847, __y_847); \ |
| 67344 | | __ret_847 = vset_lane_f64(__z_847, __s0_847, __p2_847); \ |
| 67345 | | __ret_847; \ |
| 68693 | #define vmulx_lane_f64(__p0_939, __p1_939, __p2_939) __extension__ ({ \ |
| 68694 | float64x1_t __s0_939 = __p0_939; \ |
| 68695 | float64x1_t __s1_939 = __p1_939; \ |
| 68696 | float64x1_t __ret_939; \ |
| 68697 | float64_t __x_939 = vget_lane_f64(__s0_939, 0); \ |
| 68698 | float64_t __y_939 = vget_lane_f64(__s1_939, __p2_939); \ |
| 68699 | float64_t __z_939 = vmulxd_f64(__x_939, __y_939); \ |
| 68700 | __ret_939 = vset_lane_f64(__z_939, __s0_939, __p2_939); \ |
| 68701 | __ret_939; \ |
| 67346 | 68702 | }) |
| 67347 | 68703 | #ifdef __LITTLE_ENDIAN__ |
| 67348 | | #define vmulx_laneq_f64(__p0_848, __p1_848, __p2_848) __extension__ ({ \ |
| 67349 | | float64x1_t __s0_848 = __p0_848; \ |
| 67350 | | float64x2_t __s1_848 = __p1_848; \ |
| 67351 | | float64x1_t __ret_848; \ |
| 67352 | | float64_t __x_848 = vget_lane_f64(__s0_848, 0); \ |
| 67353 | | float64_t __y_848 = vgetq_lane_f64(__s1_848, __p2_848); \ |
| 67354 | | float64_t __z_848 = vmulxd_f64(__x_848, __y_848); \ |
| 67355 | | __ret_848 = vset_lane_f64(__z_848, __s0_848, 0); \ |
| 67356 | | __ret_848; \ |
| 68704 | #define vmulx_laneq_f64(__p0_940, __p1_940, __p2_940) __extension__ ({ \ |
| 68705 | float64x1_t __s0_940 = __p0_940; \ |
| 68706 | float64x2_t __s1_940 = __p1_940; \ |
| 68707 | float64x1_t __ret_940; \ |
| 68708 | float64_t __x_940 = vget_lane_f64(__s0_940, 0); \ |
| 68709 | float64_t __y_940 = vgetq_lane_f64(__s1_940, __p2_940); \ |
| 68710 | float64_t __z_940 = vmulxd_f64(__x_940, __y_940); \ |
| 68711 | __ret_940 = vset_lane_f64(__z_940, __s0_940, 0); \ |
| 68712 | __ret_940; \ |
| 67357 | 68713 | }) |
| 67358 | 68714 | #else |
| 67359 | | #define vmulx_laneq_f64(__p0_849, __p1_849, __p2_849) __extension__ ({ \ |
| 67360 | | float64x1_t __s0_849 = __p0_849; \ |
| 67361 | | float64x2_t __s1_849 = __p1_849; \ |
| 67362 | | float64x2_t __rev1_849; __rev1_849 = __builtin_shufflevector(__s1_849, __s1_849, 1, 0); \ |
| 67363 | | float64x1_t __ret_849; \ |
| 67364 | | float64_t __x_849 = vget_lane_f64(__s0_849, 0); \ |
| 67365 | | float64_t __y_849 = __noswap_vgetq_lane_f64(__rev1_849, __p2_849); \ |
| 67366 | | float64_t __z_849 = vmulxd_f64(__x_849, __y_849); \ |
| 67367 | | __ret_849 = vset_lane_f64(__z_849, __s0_849, 0); \ |
| 67368 | | __ret_849; \ |
| 68715 | #define vmulx_laneq_f64(__p0_941, __p1_941, __p2_941) __extension__ ({ \ |
| 68716 | float64x1_t __s0_941 = __p0_941; \ |
| 68717 | float64x2_t __s1_941 = __p1_941; \ |
| 68718 | float64x2_t __rev1_941; __rev1_941 = __builtin_shufflevector(__s1_941, __s1_941, 1, 0); \ |
| 68719 | float64x1_t __ret_941; \ |
| 68720 | float64_t __x_941 = vget_lane_f64(__s0_941, 0); \ |
| 68721 | float64_t __y_941 = __noswap_vgetq_lane_f64(__rev1_941, __p2_941); \ |
| 68722 | float64_t __z_941 = vmulxd_f64(__x_941, __y_941); \ |
| 68723 | __ret_941 = vset_lane_f64(__z_941, __s0_941, 0); \ |
| 68724 | __ret_941; \ |
| 67369 | 68725 | }) |
| 67370 | 68726 | #endif |
| 67371 | 68727 | |